Commit 0d28aa19 authored by Vladimir Svoboda's avatar Vladimir Svoboda Committed by David Gibson
Browse files

ppc: BOOK3E: nothing should be done when MSR:PR is set 



The server architecture (BOOK3S) specifies that any instruction that
sets MSR:PR will also set MSR:EE, IR and DR.
However there is no such behavior specification for the embedded
architecture (BOOK3E).

Signed-off-by: default avatarVladimir Svoboda <ze.vlad@gmail.com>
Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
Reviewed-by: default avatarThomas Huth <thuth@redhat.com>
parent 62ef3760

target-ppc/helper_regs.h

+7 −4
Original line number Diff line number Diff line
@@ -131,11 +131,14 @@ static inline int hreg_store_msr(CPUPPCState *env, target_ulong value, 
    }

    /* If PR=1 then EE, IR and DR must be 1

     *

     * Note: We only enforce this on 64-bit processors. It appears that

     * 32-bit implementations supports PR=1 and EE/DR/IR=0 and MacOS

     * Note: We only enforce this on 64-bit server processors.

     * It appears that:

     * - 32-bit implementations supports PR=1 and EE/DR/IR=0 and MacOS

     *   exploits it.

     * - 64-bit embedded implementations do not need any operation to be

     *   performed when PR is set.

     */

    if ((env->insns_flags & PPC_64B) && ((value >> MSR_PR) & 1)) {

    if ((env->insns_flags & PPC_SEGMENT_64B) && ((value >> MSR_PR) & 1)) {

        value |= (1 << MSR_EE) | (1 << MSR_DR) | (1 << MSR_IR);

    }

#endif