Commit 0d16fdd7 authored by Anthony Liguori's avatar Anthony Liguori
Browse files

Merge remote-tracking branch 'agraf/ppc-for-upstream' into staging 

* agraf/ppc-for-upstream: (24 commits)
  openpic: Added BRR1 register
  pseries: Update SLOF firmware image
  pseries dma: DMA window params added to PHB and DT population changed
  pseries: Add PCI MSI/MSI-X support
  pseries: Add trace event for PCI irqs
  pseries: Export find_phb() utility function for PCI code
  pseries: added allocator for a block of IRQs
  pseries: Separate PCI RTAS setup from common from emulation specific PCI setup
  pseries: Rework irq assignment to avoid carrying qemu_irqs around
  pseries: Remove extraneous prints
  pseries: Update SLOF
  PPC: spapr: Remove global variable
  PPC: spapr: Rework VGA select logic
  xbzrle: fix compilation on ppc32
  spapr: Add support for -vga option
  Add one new file vga-pci.h and cleanup on all platforms
  Revert "PPC: e500: Use new MPIC dt format"
  ppc: Fix bug in handling of PAPR hypercall exits
  PPC: e500: add generic e500 platform
  PPC: e500: split mpc8544ds machine from generic e500 code
  ...
parents 76b64a7a 3e772232

hw/alpha_pci.c

+1 −0
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ 
#include "qemu-log.h"

#include "sysemu.h"

#include "vmware_vga.h"

#include "vga-pci.h"





/* PCI IO reads/writes, to byte-word addressable memory.  */

hw/cirrus_vga.c

+1 −1
Original line number Diff line number Diff line
@@ -27,8 +27,8 @@ 
 *   available at http://home.worldonline.dk/~finth/

 */

#include "hw.h"

#include "pc.h"

#include "pci.h"

#include "vga-pci.h"

#include "console.h"

#include "vga_int.h"

#include "loader.h"

hw/mips_malta.c

+1 −0
Original line number Diff line number Diff line
@@ -48,6 +48,7 @@ 
#include "blockdev.h"

#include "exec-memory.h"

#include "sysbus.h"             /* SysBusDevice */

#include "vga-pci.h"



//#define DEBUG_BOARD_INIT

hw/openpic.c

+17 −0
Original line number Diff line number Diff line
@@ -130,6 +130,17 @@ enum { 
#define MPIC_CPU_REG_START        0x20000

#define MPIC_CPU_REG_SIZE         0x100 + ((MAX_CPU - 1) * 0x1000)



/*

 * Block Revision Register1 (BRR1): QEMU does not fully emulate

 * any version on MPIC. So to start with, set the IP version to 0.

 *

 * NOTE: This is Freescale MPIC specific register. Keep it here till

 * this code is refactored for different variants of OPENPIC and MPIC.

 */

#define FSL_BRR1_IPID (0x0040 << 16) /* 16 bit IP-block ID */

#define FSL_BRR1_IPMJ (0x00 << 8) /* 8 bit IP major number */

#define FSL_BRR1_IPMN 0x00 /* 8 bit IP minor number */



enum mpic_ide_bits {

    IDR_EP     = 31,

    IDR_CI0     = 30,
@@ -595,6 +606,8 @@ static void openpic_gbl_write (void *opaque, target_phys_addr_t addr, uint32_t v 
    if (addr & 0xF)

        return;

    switch (addr) {

    case 0x00: /* Block Revision Register1 (BRR1) is Readonly */

        break;

    case 0x40:

    case 0x50:

    case 0x60:
@@ -671,6 +684,7 @@ static uint32_t openpic_gbl_read (void *opaque, target_phys_addr_t addr) 
    case 0x1090: /* PINT */

        retval = 0x00000000;

        break;

    case 0x00: /* Block Revision Register1 (BRR1) */

    case 0x40:

    case 0x50:

    case 0x60:
@@ -893,6 +907,9 @@ static uint32_t openpic_cpu_read_internal(void *opaque, target_phys_addr_t addr, 
    dst = &opp->dst[idx];

    addr &= 0xFF0;

    switch (addr) {

    case 0x00: /* Block Revision Register1 (BRR1) */

        retval = FSL_BRR1_IPID | FSL_BRR1_IPMJ | FSL_BRR1_IPMN;

        break;

    case 0x80: /* PCTP */

        retval = dst->pctp;

        break;

hw/pc.c

+1 −0
Original line number Diff line number Diff line
@@ -51,6 +51,7 @@ 
#include "exec-memory.h"

#include "arch_init.h"

#include "bitmap.h"

#include "vga-pci.h"



/* output Bochs bios info messages */

//#define DEBUG_BIOS