Commit 0c4e9931 authored by Philippe Mathieu-Daudé's avatar Philippe Mathieu-Daudé Committed by Laurent Vivier
Browse files

target/riscv/cpu: Restrict CPU migration to system-mode 



Reviewed-by: default avatarAlistair Francis <alistair.francis@wdc.com>
Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Reviewed-by: default avatarLaurent Vivier <laurent@vivier.eu>
Tested-by: default avatarLaurent Vivier <laurent@vivier.eu>
Signed-off-by: default avatarPhilippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20200522172510.25784-8-philmd@redhat.com>
Signed-off-by: default avatarLaurent Vivier <laurent@vivier.eu>
parent dc70f80f

target/riscv/cpu.c

+4 −2
Original line number Diff line number Diff line
@@ -485,10 +485,12 @@ static void riscv_cpu_init(Object *obj) 
    cpu_set_cpustate_pointers(cpu);

}



#ifndef CONFIG_USER_ONLY

static const VMStateDescription vmstate_riscv_cpu = {

    .name = "cpu",

    .unmigratable = 1,

};

#endif



static Property riscv_cpu_properties[] = {

    DEFINE_PROP_BOOL("i", RISCVCPU, cfg.ext_i, true),
@@ -544,13 +546,13 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data) 
    cc->do_transaction_failed = riscv_cpu_do_transaction_failed;

    cc->do_unaligned_access = riscv_cpu_do_unaligned_access;

    cc->get_phys_page_debug = riscv_cpu_get_phys_page_debug;

    /* For now, mark unmigratable: */

    cc->vmsd = &vmstate_riscv_cpu;

#endif

#ifdef CONFIG_TCG

    cc->tcg_initialize = riscv_translate_init;

    cc->tlb_fill = riscv_cpu_tlb_fill;

#endif

    /* For now, mark unmigratable: */

    cc->vmsd = &vmstate_riscv_cpu;

    device_class_set_props(dc, riscv_cpu_properties);

}