Commit 0b2ff2ce authored Jun 02, 2015 by Victor CLEMENT Committed by Peter Maydell Jun 02, 2015

pl061: fix wrong calculation of GPIOMIS register



The masked interrupt status register should be the state of the interrupt
after masking.
There should be a logical AND instead of a logical OR between the
interrupt status and the interrupt mask.

Signed-off-by: Victor CLEMENT <victor.clement@openwide.fr>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 1433154824-6927-1-git-send-email-victor.clement@openwide.fr
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

parent bd204e63

hw/gpio/pl061.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -173,7 +173,7 @@ static uint64_t pl061_read(void *opaque, hwaddr offset,
		case 0x414: /* Raw interrupt status */
		return s->istate;
		case 0x418: /* Masked interrupt status */
		return s->istate \| s->im;
		return s->istate & s->im;
		case 0x420: /* Alternate function select */
		return s->afsel;
		case 0x500: /* 2mA drive */