Loading hw/core/machine.c +7 −1 Original line number Diff line number Diff line Loading @@ -24,7 +24,13 @@ #include "hw/pci/pci.h" #include "hw/mem/nvdimm.h" GlobalProperty hw_compat_4_0_1[] = {}; GlobalProperty hw_compat_4_0_1[] = { { "VGA", "edid", "false" }, { "secondary-vga", "edid", "false" }, { "bochs-display", "edid", "false" }, { "virtio-vga", "edid", "false" }, { "virtio-gpu-pci", "edid", "false" }, }; const size_t hw_compat_4_0_1_len = G_N_ELEMENTS(hw_compat_4_0_1); GlobalProperty hw_compat_4_0[] = {}; Loading hw/display/bochs-display.c +1 −1 Original line number Diff line number Diff line Loading @@ -338,7 +338,7 @@ static void bochs_display_exit(PCIDevice *dev) static Property bochs_display_properties[] = { DEFINE_PROP_SIZE("vgamem", BochsDisplayState, vgamem, 16 * MiB), DEFINE_PROP_BOOL("edid", BochsDisplayState, enable_edid, false), DEFINE_PROP_BOOL("edid", BochsDisplayState, enable_edid, true), DEFINE_EDID_PROPERTIES(BochsDisplayState, edid_info), DEFINE_PROP_END_OF_LIST(), }; Loading hw/display/vga-pci.c +2 −2 Original line number Diff line number Diff line Loading @@ -340,7 +340,7 @@ static Property vga_pci_properties[] = { DEFINE_PROP_BIT("qemu-extended-regs", PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_QEXT, true), DEFINE_PROP_BIT("edid", PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_EDID, false), PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_EDID, true), DEFINE_EDID_PROPERTIES(PCIVGAState, edid_info), DEFINE_PROP_BOOL("global-vmstate", PCIVGAState, vga.global_vmstate, false), DEFINE_PROP_END_OF_LIST(), Loading @@ -351,7 +351,7 @@ static Property secondary_pci_properties[] = { DEFINE_PROP_BIT("qemu-extended-regs", PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_QEXT, true), DEFINE_PROP_BIT("edid", PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_EDID, false), PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_EDID, true), DEFINE_EDID_PROPERTIES(PCIVGAState, edid_info), DEFINE_PROP_END_OF_LIST(), }; Loading include/hw/virtio/virtio-gpu.h +1 −1 Original line number Diff line number Diff line Loading @@ -125,7 +125,7 @@ typedef struct VirtIOGPUBaseClass { #define VIRTIO_GPU_BASE_PROPERTIES(_state, _conf) \ DEFINE_PROP_UINT32("max_outputs", _state, _conf.max_outputs, 1), \ DEFINE_PROP_BIT("edid", _state, _conf.flags, \ VIRTIO_GPU_FLAG_EDID_ENABLED, false), \ VIRTIO_GPU_FLAG_EDID_ENABLED, true), \ DEFINE_PROP_UINT32("xres", _state, _conf.xres, 1024), \ DEFINE_PROP_UINT32("yres", _state, _conf.yres, 768) Loading Loading
hw/core/machine.c +7 −1 Original line number Diff line number Diff line Loading @@ -24,7 +24,13 @@ #include "hw/pci/pci.h" #include "hw/mem/nvdimm.h" GlobalProperty hw_compat_4_0_1[] = {}; GlobalProperty hw_compat_4_0_1[] = { { "VGA", "edid", "false" }, { "secondary-vga", "edid", "false" }, { "bochs-display", "edid", "false" }, { "virtio-vga", "edid", "false" }, { "virtio-gpu-pci", "edid", "false" }, }; const size_t hw_compat_4_0_1_len = G_N_ELEMENTS(hw_compat_4_0_1); GlobalProperty hw_compat_4_0[] = {}; Loading
hw/display/bochs-display.c +1 −1 Original line number Diff line number Diff line Loading @@ -338,7 +338,7 @@ static void bochs_display_exit(PCIDevice *dev) static Property bochs_display_properties[] = { DEFINE_PROP_SIZE("vgamem", BochsDisplayState, vgamem, 16 * MiB), DEFINE_PROP_BOOL("edid", BochsDisplayState, enable_edid, false), DEFINE_PROP_BOOL("edid", BochsDisplayState, enable_edid, true), DEFINE_EDID_PROPERTIES(BochsDisplayState, edid_info), DEFINE_PROP_END_OF_LIST(), }; Loading
hw/display/vga-pci.c +2 −2 Original line number Diff line number Diff line Loading @@ -340,7 +340,7 @@ static Property vga_pci_properties[] = { DEFINE_PROP_BIT("qemu-extended-regs", PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_QEXT, true), DEFINE_PROP_BIT("edid", PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_EDID, false), PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_EDID, true), DEFINE_EDID_PROPERTIES(PCIVGAState, edid_info), DEFINE_PROP_BOOL("global-vmstate", PCIVGAState, vga.global_vmstate, false), DEFINE_PROP_END_OF_LIST(), Loading @@ -351,7 +351,7 @@ static Property secondary_pci_properties[] = { DEFINE_PROP_BIT("qemu-extended-regs", PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_QEXT, true), DEFINE_PROP_BIT("edid", PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_EDID, false), PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_EDID, true), DEFINE_EDID_PROPERTIES(PCIVGAState, edid_info), DEFINE_PROP_END_OF_LIST(), }; Loading
include/hw/virtio/virtio-gpu.h +1 −1 Original line number Diff line number Diff line Loading @@ -125,7 +125,7 @@ typedef struct VirtIOGPUBaseClass { #define VIRTIO_GPU_BASE_PROPERTIES(_state, _conf) \ DEFINE_PROP_UINT32("max_outputs", _state, _conf.max_outputs, 1), \ DEFINE_PROP_BIT("edid", _state, _conf.flags, \ VIRTIO_GPU_FLAG_EDID_ENABLED, false), \ VIRTIO_GPU_FLAG_EDID_ENABLED, true), \ DEFINE_PROP_UINT32("xres", _state, _conf.xres, 1024), \ DEFINE_PROP_UINT32("yres", _state, _conf.yres, 768) Loading