Commit 0a1bb912 authored by Aleksandar Markovic's avatar Aleksandar Markovic
Browse files

target/mips: msa: Move helpers for <AND|NOR|OR|XOR>.V 



Cosmetic reorganization.

Signed-off-by: default avatarAleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: default avatarAleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1569415572-19635-21-git-send-email-aleksandar.markovic@rt-rk.com>
parent 26f0e079

target/mips/helper.h

+5 −4
Original line number Diff line number Diff line
@@ -887,6 +887,11 @@ DEF_HELPER_4(msa_mod_s_h, void, env, i32, i32, i32) 
DEF_HELPER_4(msa_mod_s_w, void, env, i32, i32, i32)

DEF_HELPER_4(msa_mod_s_d, void, env, i32, i32, i32)



DEF_HELPER_4(msa_and_v, void, env, i32, i32, i32)

DEF_HELPER_4(msa_nor_v, void, env, i32, i32, i32)

DEF_HELPER_4(msa_or_v, void, env, i32, i32, i32)

DEF_HELPER_4(msa_xor_v, void, env, i32, i32, i32)



DEF_HELPER_3(msa_move_v, void, env, i32, i32)



DEF_HELPER_4(msa_andi_b, void, env, i32, i32, i32)
@@ -1021,10 +1026,6 @@ DEF_HELPER_5(msa_mulr_q_df, void, env, i32, i32, i32, i32) 
DEF_HELPER_5(msa_maddr_q_df, void, env, i32, i32, i32, i32)

DEF_HELPER_5(msa_msubr_q_df, void, env, i32, i32, i32, i32)



DEF_HELPER_4(msa_and_v, void, env, i32, i32, i32)

DEF_HELPER_4(msa_or_v, void, env, i32, i32, i32)

DEF_HELPER_4(msa_nor_v, void, env, i32, i32, i32)

DEF_HELPER_4(msa_xor_v, void, env, i32, i32, i32)

DEF_HELPER_4(msa_fill_df, void, env, i32, i32, i32)



DEF_HELPER_4(msa_copy_s_b, void, env, i32, i32, i32)

target/mips/msa_helper.c

+40 −41
Original line number Diff line number Diff line
@@ -2010,7 +2010,46 @@ void helper_msa_mod_u_d(CPUMIPSState *env, 
 * +---------------+----------------------------------------------------------+

 */



/* TODO: insert Logic group helpers here */



void helper_msa_and_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)

{

    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);

    wr_t *pws = &(env->active_fpu.fpr[ws].wr);

    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);



    pwd->d[0] = pws->d[0] & pwt->d[0];

    pwd->d[1] = pws->d[1] & pwt->d[1];

}



void helper_msa_nor_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)

{

    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);

    wr_t *pws = &(env->active_fpu.fpr[ws].wr);

    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);



    pwd->d[0] = ~(pws->d[0] | pwt->d[0]);

    pwd->d[1] = ~(pws->d[1] | pwt->d[1]);

}



void helper_msa_or_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)

{

    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);

    wr_t *pws = &(env->active_fpu.fpr[ws].wr);

    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);



    pwd->d[0] = pws->d[0] | pwt->d[0];

    pwd->d[1] = pws->d[1] | pwt->d[1];

}



void helper_msa_xor_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)

{

    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);

    wr_t *pws = &(env->active_fpu.fpr[ws].wr);

    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);



    pwd->d[0] = pws->d[0] ^ pwt->d[0];

    pwd->d[1] = pws->d[1] ^ pwt->d[1];

}





/*
@@ -2160,46 +2199,6 @@ void helper_msa_shf_df(CPUMIPSState *env, uint32_t df, uint32_t wd, 
    msa_move_v(pwd, pwx);

}



void helper_msa_and_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)

{

    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);

    wr_t *pws = &(env->active_fpu.fpr[ws].wr);

    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);



    pwd->d[0] = pws->d[0] & pwt->d[0];

    pwd->d[1] = pws->d[1] & pwt->d[1];

}



void helper_msa_or_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)

{

    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);

    wr_t *pws = &(env->active_fpu.fpr[ws].wr);

    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);



    pwd->d[0] = pws->d[0] | pwt->d[0];

    pwd->d[1] = pws->d[1] | pwt->d[1];

}



void helper_msa_nor_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)

{

    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);

    wr_t *pws = &(env->active_fpu.fpr[ws].wr);

    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);



    pwd->d[0] = ~(pws->d[0] | pwt->d[0]);

    pwd->d[1] = ~(pws->d[1] | pwt->d[1]);

}



void helper_msa_xor_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)

{

    wr_t *pwd = &(env->active_fpu.fpr[wd].wr);

    wr_t *pws = &(env->active_fpu.fpr[ws].wr);

    wr_t *pwt = &(env->active_fpu.fpr[wt].wr);



    pwd->d[0] = pws->d[0] ^ pwt->d[0];

    pwd->d[1] = pws->d[1] ^ pwt->d[1];

}



static inline int64_t msa_addv_df(uint32_t df, int64_t arg1, int64_t arg2)

{

    return arg1 + arg2;