Commit 08b8e0f5 authored by Peter Maydell's avatar Peter Maydell
Browse files

target-arm: Bring AArch64 debug CPU display of PSTATE into line with AArch32 



The AArch64 debug CPU display of PSTATE as "PSTATE=200003c5 (flags --C-)"
on the end of the same line as the last of the general purpose registers
is unnecessarily different from the AArch32 display of PSR as
"PSR=200001d3 --C- A svc32" on its own line. Update the AArch64
code to put PSTATE in its own line and in the same format, including
printing the exception level (mode).

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Reviewed-by: default avatarEdgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: default avatarAlex Bennée <alex.bennee@linaro.org>
Message-id: 1445883178-576-2-git-send-email-peter.maydell@linaro.org
parent b4f2bd1c

target-arm/translate-a64.c

+5 −3
Original line number Diff line number Diff line
@@ -126,6 +126,7 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f, 
    CPUARMState *env = &cpu->env;

    uint32_t psr = pstate_read(env);

    int i;

    int el = arm_current_el(env);



    cpu_fprintf(f, "PC=%016"PRIx64"  SP=%016"PRIx64"\n",

            env->pc, env->xregs[31]);
@@ -137,13 +138,14 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f, 
            cpu_fprintf(f, " ");

        }

    }

    cpu_fprintf(f, "PSTATE=%08x (flags %c%c%c%c)\n",

    cpu_fprintf(f, "\nPSTATE=%08x %c%c%c%c EL%d%c\n",

                psr,

                psr & PSTATE_N ? 'N' : '-',

                psr & PSTATE_Z ? 'Z' : '-',

                psr & PSTATE_C ? 'C' : '-',

                psr & PSTATE_V ? 'V' : '-');

    cpu_fprintf(f, "\n");

                psr & PSTATE_V ? 'V' : '-',

                el,

                psr & PSTATE_SP ? 'h' : 't');



    if (flags & CPU_DUMP_FPU) {

        int numvfpregs = 32;