Loading hw/i386/intel_iommu.c +7 −8 Original line number Diff line number Diff line Loading @@ -237,8 +237,7 @@ out: static void vtd_update_iotlb(IntelIOMMUState *s, uint16_t source_id, uint16_t domain_id, hwaddr addr, uint64_t slpte, bool read_flags, bool write_flags, uint32_t level) uint8_t access_flags, uint32_t level) { VTDIOTLBEntry *entry = g_malloc(sizeof(*entry)); uint64_t *key = g_malloc(sizeof(*key)); Loading @@ -253,8 +252,7 @@ static void vtd_update_iotlb(IntelIOMMUState *s, uint16_t source_id, entry->gfn = gfn; entry->domain_id = domain_id; entry->slpte = slpte; entry->read_flags = read_flags; entry->write_flags = write_flags; entry->access_flags = access_flags; entry->mask = vtd_slpt_level_page_mask(level); *key = vtd_get_iotlb_key(gfn, source_id, level); g_hash_table_replace(s->iotlb, key, entry); Loading Loading @@ -1087,6 +1085,7 @@ static bool vtd_do_iommu_translate(VTDAddressSpace *vtd_as, PCIBus *bus, bool is_fpd_set = false; bool reads = true; bool writes = true; uint8_t access_flags; VTDIOTLBEntry *iotlb_entry; /* Loading @@ -1101,8 +1100,7 @@ static bool vtd_do_iommu_translate(VTDAddressSpace *vtd_as, PCIBus *bus, trace_vtd_iotlb_page_hit(source_id, addr, iotlb_entry->slpte, iotlb_entry->domain_id); slpte = iotlb_entry->slpte; reads = iotlb_entry->read_flags; writes = iotlb_entry->write_flags; access_flags = iotlb_entry->access_flags; page_mask = iotlb_entry->mask; goto out; } Loading Loading @@ -1172,13 +1170,14 @@ static bool vtd_do_iommu_translate(VTDAddressSpace *vtd_as, PCIBus *bus, } page_mask = vtd_slpt_level_page_mask(level); access_flags = IOMMU_ACCESS_FLAG(reads, writes); vtd_update_iotlb(s, source_id, VTD_CONTEXT_ENTRY_DID(ce.hi), addr, slpte, reads, writes, level); access_flags, level); out: entry->iova = addr & page_mask; entry->translated_addr = vtd_get_slpte_addr(slpte) & page_mask; entry->addr_mask = ~page_mask; entry->perm = IOMMU_ACCESS_FLAG(reads, writes); entry->perm = access_flags; return true; error: Loading include/hw/i386/intel_iommu.h +1 −2 Original line number Diff line number Diff line Loading @@ -103,8 +103,7 @@ struct VTDIOTLBEntry { uint16_t domain_id; uint64_t slpte; uint64_t mask; bool read_flags; bool write_flags; uint8_t access_flags; }; /* VT-d Source-ID Qualifier types */ Loading Loading
hw/i386/intel_iommu.c +7 −8 Original line number Diff line number Diff line Loading @@ -237,8 +237,7 @@ out: static void vtd_update_iotlb(IntelIOMMUState *s, uint16_t source_id, uint16_t domain_id, hwaddr addr, uint64_t slpte, bool read_flags, bool write_flags, uint32_t level) uint8_t access_flags, uint32_t level) { VTDIOTLBEntry *entry = g_malloc(sizeof(*entry)); uint64_t *key = g_malloc(sizeof(*key)); Loading @@ -253,8 +252,7 @@ static void vtd_update_iotlb(IntelIOMMUState *s, uint16_t source_id, entry->gfn = gfn; entry->domain_id = domain_id; entry->slpte = slpte; entry->read_flags = read_flags; entry->write_flags = write_flags; entry->access_flags = access_flags; entry->mask = vtd_slpt_level_page_mask(level); *key = vtd_get_iotlb_key(gfn, source_id, level); g_hash_table_replace(s->iotlb, key, entry); Loading Loading @@ -1087,6 +1085,7 @@ static bool vtd_do_iommu_translate(VTDAddressSpace *vtd_as, PCIBus *bus, bool is_fpd_set = false; bool reads = true; bool writes = true; uint8_t access_flags; VTDIOTLBEntry *iotlb_entry; /* Loading @@ -1101,8 +1100,7 @@ static bool vtd_do_iommu_translate(VTDAddressSpace *vtd_as, PCIBus *bus, trace_vtd_iotlb_page_hit(source_id, addr, iotlb_entry->slpte, iotlb_entry->domain_id); slpte = iotlb_entry->slpte; reads = iotlb_entry->read_flags; writes = iotlb_entry->write_flags; access_flags = iotlb_entry->access_flags; page_mask = iotlb_entry->mask; goto out; } Loading Loading @@ -1172,13 +1170,14 @@ static bool vtd_do_iommu_translate(VTDAddressSpace *vtd_as, PCIBus *bus, } page_mask = vtd_slpt_level_page_mask(level); access_flags = IOMMU_ACCESS_FLAG(reads, writes); vtd_update_iotlb(s, source_id, VTD_CONTEXT_ENTRY_DID(ce.hi), addr, slpte, reads, writes, level); access_flags, level); out: entry->iova = addr & page_mask; entry->translated_addr = vtd_get_slpte_addr(slpte) & page_mask; entry->addr_mask = ~page_mask; entry->perm = IOMMU_ACCESS_FLAG(reads, writes); entry->perm = access_flags; return true; error: Loading
include/hw/i386/intel_iommu.h +1 −2 Original line number Diff line number Diff line Loading @@ -103,8 +103,7 @@ struct VTDIOTLBEntry { uint16_t domain_id; uint64_t slpte; uint64_t mask; bool read_flags; bool write_flags; uint8_t access_flags; }; /* VT-d Source-ID Qualifier types */ Loading