Commit 07d1be3b authored Mar 31, 2020 by Peter Maydell

target/arm: Remove obsolete TODO note from get_phys_addr_lpae()



An old comment in get_phys_addr_lpae() claims that the code does not
support the different format TCR for VTCR_EL2.  This used to be true
but it is not true now (in particular the aa64_va_parameters() and
aa32_va_parameters() functions correctly handle the different
register format by checking whether the mmu_idx is Stage2).
Remove the out of date parts of the comment.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200331143407.3186-1-peter.maydell@linaro.org

parent f4e1dbc5

target/arm/helper.c

+1 −6

Original line number	Diff line number	Diff line
		@@ -10753,12 +10753,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
		bool aarch64 = arm_el_is_aa64(env, el);
		bool guarded = false;

		/* TODO:
		* This code does not handle the different format TCR for VTCR_EL2.
		* This code also does not support shareability levels.
		* Attribute and permission bit handling should also be checked when adding
		* support for those page table walks.
		*/
		/* TODO: This code does not support shareability levels. */
		if (aarch64) {
		param = aa64_va_parameters(env, address, mmu_idx,
		access_type != MMU_INST_FETCH);