Commit 06312feb authored Jun 02, 2017 by Peter Maydell

arm: Don't let no-MPU PMSA cores write to SCTLR.M



If the CPU is a PMSA config with no MPU implemented, then the
SCTLR.M bit should be RAZ/WI, so that the guest can never
turn on the non-existent MPU.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 1493122030-32191-7-git-send-email-peter.maydell@linaro.org

parent f50cd314

target/arm/helper.c

+5 −0

Original line number	Diff line number	Diff line
		@@ -3258,6 +3258,11 @@ static void sctlr_write(CPUARMState env, const ARMCPRegInfo ri,
		return;
		}

		if (arm_feature(env, ARM_FEATURE_PMSA) && !cpu->has_mpu) {
		/* M bit is RAZ/WI for PMSA with no MPU implemented */
		value &= ~SCTLR_M;
		}

		raw_write(env, ri, value);
		/* ??? Lots of these bits are not implemented. */
		/* This may enable/disable the MMU, so do a TLB flush. */