Unverified Commit 05446f41 authored by Bin Meng's avatar Bin Meng Committed by Palmer Dabbelt
Browse files

riscv: sifive_u: Update the plic hart config to support multicore 



At present the PLIC is instantiated to support only one hart, while
the machine allows at most 4 harts to be created. When more than 1
hart is configured, PLIC needs to instantiated to support multicore,
otherwise an SMP OS does not work.

Signed-off-by: default avatarBin Meng <bmeng.cn@gmail.com>
Reviewed-by: default avatarAlistair Francis <alistair.francis@wdc.com>
Signed-off-by: default avatarPalmer Dabbelt <palmer@sifive.com>
parent 382cb439

hw/riscv/sifive_u.c

+15 −1
Original line number Diff line number Diff line
@@ -344,6 +344,8 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp) 
    MemoryRegion *system_memory = get_system_memory();

    MemoryRegion *mask_rom = g_new(MemoryRegion, 1);

    qemu_irq plic_gpios[SIFIVE_U_PLIC_NUM_SOURCES];

    char *plic_hart_config;

    size_t plic_hart_config_len;

    int i;

    Error *err = NULL;

    NICInfo *nd = &nd_table[0];
@@ -357,9 +359,21 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp) 
    memory_region_add_subregion(system_memory, memmap[SIFIVE_U_MROM].base,

                                mask_rom);



    /* create PLIC hart topology configuration string */

    plic_hart_config_len = (strlen(SIFIVE_U_PLIC_HART_CONFIG) + 1) * smp_cpus;

    plic_hart_config = g_malloc0(plic_hart_config_len);

    for (i = 0; i < smp_cpus; i++) {

        if (i != 0) {

            strncat(plic_hart_config, ",", plic_hart_config_len);

        }

        strncat(plic_hart_config, SIFIVE_U_PLIC_HART_CONFIG,

                plic_hart_config_len);

        plic_hart_config_len -= (strlen(SIFIVE_U_PLIC_HART_CONFIG) + 1);

    }



    /* MMIO */

    s->plic = sifive_plic_create(memmap[SIFIVE_U_PLIC].base,

        (char *)SIFIVE_U_PLIC_HART_CONFIG,

        plic_hart_config,

        SIFIVE_U_PLIC_NUM_SOURCES,

        SIFIVE_U_PLIC_NUM_PRIORITIES,

        SIFIVE_U_PLIC_PRIORITY_BASE,