Commit 043b7f8d authored by Edgar E. Iglesias's avatar Edgar E. Iglesias Committed by Peter Maydell
Browse files

target-arm: Break out exception masking to a separate func 



Reviewed-by: default avatarGreg Bellows <greg.bellows@linaro.org>
Signed-off-by: default avatarEdgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1411718914-6608-5-git-send-email-edgar.iglesias@gmail.com
[PMM: updated to account for recent cpu-exec refactoring]
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent 9e729b57

target-arm/cpu.c

+2 −5
Original line number Diff line number Diff line
@@ -187,12 +187,10 @@ static void arm_cpu_reset(CPUState *s) 
bool arm_cpu_exec_interrupt(CPUState *cs, int interrupt_request)

{

    CPUClass *cc = CPU_GET_CLASS(cs);

    ARMCPU *cpu = ARM_CPU(cs);

    CPUARMState *env = &cpu->env;

    bool ret = false;



    if (interrupt_request & CPU_INTERRUPT_FIQ

        && !(env->daif & PSTATE_F)) {

        && arm_excp_unmasked(cs, EXCP_FIQ)) {

        cs->exception_index = EXCP_FIQ;

        cc->do_interrupt(cs);

        ret = true;
@@ -207,8 +205,7 @@ bool arm_cpu_exec_interrupt(CPUState *cs, int interrupt_request) 
       We avoid this by disabling interrupts when

       pc contains a magic address.  */

    if (interrupt_request & CPU_INTERRUPT_HARD

        && !(env->daif & PSTATE_I)

        && (!IS_M(env) || env->regs[15] < 0xfffffff0)) {

        && arm_excp_unmasked(cs, EXCP_IRQ)) {

        cs->exception_index = EXCP_IRQ;

        cc->do_interrupt(cs);

        ret = true;

target-arm/cpu.h

+15 −0
Original line number Diff line number Diff line
@@ -1172,6 +1172,21 @@ bool write_cpustate_to_list(ARMCPU *cpu); 
#  define TARGET_VIRT_ADDR_SPACE_BITS 32

#endif



static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx)

{

    CPUARMState *env = cs->env_ptr;



    switch (excp_idx) {

    case EXCP_FIQ:

        return !(env->daif & PSTATE_F);

    case EXCP_IRQ:

        return !(env->daif & PSTATE_I)

               && (!IS_M(env) || env->regs[15] < 0xfffffff0);

    default:

        g_assert_not_reached();

    }

}



static inline CPUARMState *cpu_init(const char *cpu_model)

{

    ARMCPU *cpu = cpu_arm_init(cpu_model);