Commit 0383ac00 authored by Peter Maydell's avatar Peter Maydell
Browse files

Add dummy implementation of generic timer cp15 registers 



Add a dummy implementation of the cp15 registers for the generic
timer (found in the Cortex-A15), just sufficient for Linux to
decide that it can't use it. This requires at least CNTP_CTL and
CNTFRQ to be implemented as RAZ/WI; we RAZ/WI all of c14.

Reviewed-by: default avatarAndreas Färber <afaerber@suse.de>
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent 5fe91019

target-arm/cpu.h

+1 −0
Original line number Diff line number Diff line
@@ -382,6 +382,7 @@ enum arm_features { 
    ARM_FEATURE_VAPA, /* cp15 VA to PA lookups */

    ARM_FEATURE_ARM_DIV, /* divide supported in ARM encoding */

    ARM_FEATURE_VFP4, /* VFPv4 (implies that NEON is v2) */

    ARM_FEATURE_GENERIC_TIMER,

};



static inline int arm_feature(CPUARMState *env, int feature)

target-arm/helper.c

+10 −2
Original line number Diff line number Diff line
@@ -1764,7 +1764,11 @@ void HELPER(set_cp15)(CPUState *env, uint32_t insn, uint32_t val) 
            goto bad_reg;

        }

        break;

    case 14: /* Reserved.  */

    case 14: /* Generic timer */

        if (arm_feature(env, ARM_FEATURE_GENERIC_TIMER)) {

            /* Dummy implementation: RAZ/WI for all */

            break;

        }

        goto bad_reg;

    case 15: /* Implementation specific.  */

        if (arm_feature(env, ARM_FEATURE_XSCALE)) {
@@ -2134,7 +2138,11 @@ uint32_t HELPER(get_cp15)(CPUState *env, uint32_t insn) 
        default:

            goto bad_reg;

        }

    case 14: /* Reserved.  */

    case 14: /* Generic timer */

        if (arm_feature(env, ARM_FEATURE_GENERIC_TIMER)) {

            /* Dummy implementation: RAZ/WI for all */

            return 0;

        }

        goto bad_reg;

    case 15: /* Implementation specific.  */

        if (arm_feature(env, ARM_FEATURE_XSCALE)) {