Commit 036793ae authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging 



Machine and x86 queue, 2018-03-19

* cpu_model/cpu_type cleanups
* x86: Fix on Intel Processor Trace CPUID checks

# gpg: Signature made Mon 19 Mar 2018 20:07:14 GMT
# gpg:                using RSA key 2807936F984DC5A6
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>"
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF  D1AA 2807 936F 984D C5A6

* remotes/ehabkost/tags/machine-next-pull-request:
  i386: Disable Intel PT if packets IP payloads have LIP values
  cpu: drop unnecessary NULL check and cpu_common_class_by_name()
  cpu: get rid of unused cpu_init() defines
  Use cpu_create(type) instead of cpu_init(cpu_model)
  cpu: add CPU_RESOLVING_TYPE macro
  tests: add machine 'none' with -cpu test
  nios2: 10m50_devboard: replace cpu_model with cpu_type

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents d1fd31f8 c078ca96

bsd-user/main.c

+3 −1
Original line number Diff line number Diff line
@@ -723,6 +723,7 @@ int main(int argc, char **argv) 
{

    const char *filename;

    const char *cpu_model;

    const char *cpu_type;

    const char *log_file = NULL;

    const char *log_mask = NULL;

    struct target_pt_regs regs1, *regs = &regs1;
@@ -900,7 +901,8 @@ int main(int argc, char **argv) 
    tcg_exec_init(0);

    /* NOTE: we need to init the CPU at this stage to get

       qemu_host_page_size */

    cpu = cpu_init(cpu_model);

    cpu_type = parse_cpu_model(cpu_model);

    cpu = cpu_create(cpu_type);

    env = cpu->env_ptr;

#if defined(TARGET_SPARC) || defined(TARGET_PPC)

    cpu_reset(cpu);

exec.c

+23 −0
Original line number Diff line number Diff line
@@ -817,6 +817,29 @@ void cpu_exec_realizefn(CPUState *cpu, Error **errp) 
#endif

}



const char *parse_cpu_model(const char *cpu_model)

{

    ObjectClass *oc;

    CPUClass *cc;

    gchar **model_pieces;

    const char *cpu_type;



    model_pieces = g_strsplit(cpu_model, ",", 2);



    oc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]);

    if (oc == NULL) {

        error_report("unable to find CPU model '%s'", model_pieces[0]);

        g_strfreev(model_pieces);

        exit(EXIT_FAILURE);

    }



    cpu_type = object_class_get_name(oc);

    cc = CPU_CLASS(oc);

    cc->parse_features(cpu_type, model_pieces[1], &error_fatal);

    g_strfreev(model_pieces);

    return cpu_type;

}



#if defined(CONFIG_USER_ONLY)

static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)

{

hw/core/null-machine.c

+3 −3
Original line number Diff line number Diff line
@@ -24,9 +24,9 @@ static void machine_none_init(MachineState *mch) 
{

    CPUState *cpu = NULL;



    /* Initialize CPU (if a model has been specified) */

    if (mch->cpu_model) {

        cpu = cpu_init(mch->cpu_model);

    /* Initialize CPU (if user asked for it) */

    if (mch->cpu_type) {

        cpu = cpu_create(mch->cpu_type);

        if (!cpu) {

            error_report("Unable to initialize CPU");

            exit(1);

hw/nios2/10m50_devboard.c

+1 −1
Original line number Diff line number Diff line
@@ -75,7 +75,7 @@ static void nios2_10m50_ghrd_init(MachineState *machine) 
                                phys_ram_alias);



    /* Create CPU -- FIXME */

    cpu = NIOS2_CPU(cpu_generic_init(TYPE_NIOS2_CPU, "nios2"));

    cpu = NIOS2_CPU(cpu_create(TYPE_NIOS2_CPU));



    /* Register: CPU interrupt controller (PIC) */

    cpu_irq = nios2_cpu_pic_init(cpu);

include/hw/boards.h

+0 −1
Original line number Diff line number Diff line
@@ -252,7 +252,6 @@ struct MachineState { 
    char *kernel_filename;

    char *kernel_cmdline;

    char *initrd_filename;

    const char *cpu_model;

    const char *cpu_type;

    AccelState *accelerator;

    CPUArchIdList *possible_cpus;