Commit 033e1fcd authored by Mark Cave-Ayland's avatar Mark Cave-Ayland Committed by David Gibson
Browse files

target/ppc: introduce GEN_VSX_HELPER_X2_AB macro to fpu_helper.c 



Rather than perform the VSR register decoding within the helper itself,
introduce a new GEN_VSX_HELPER_X2_AB macro which performs the decode based
upon xA and xB at translation time.

Signed-off-by: default avatarMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Message-Id: <20190616123751.781-9-mark.cave-ayland@ilande.co.uk>
Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
parent 75cf84cb

target/ppc/fpu_helper.c

+6 −9
Original line number Diff line number Diff line
@@ -2179,10 +2179,9 @@ VSX_RSQRTE(xvrsqrtesp, 4, float32, VsrW(i), 0, 0) 
 *   nbits - number of fraction bits

 */

#define VSX_TDIV(op, nels, tp, fld, emin, emax, nbits)                  \

void helper_##op(CPUPPCState *env, uint32_t opcode)                     \

void helper_##op(CPUPPCState *env, uint32_t opcode,                     \

                 ppc_vsr_t *xa, ppc_vsr_t *xb)                          \

{                                                                       \

    ppc_vsr_t *xa = &env->vsr[xA(opcode)];                              \

    ppc_vsr_t *xb = &env->vsr[xB(opcode)];                              \

    int i;                                                              \

    int fe_flag = 0;                                                    \

    int fg_flag = 0;                                                    \
@@ -2431,10 +2430,9 @@ VSX_SCALAR_CMP_DP(xscmpgedp, le, 1, 1) 
VSX_SCALAR_CMP_DP(xscmpgtdp, lt, 1, 1)

VSX_SCALAR_CMP_DP(xscmpnedp, eq, 0, 0)



void helper_xscmpexpdp(CPUPPCState *env, uint32_t opcode)

void helper_xscmpexpdp(CPUPPCState *env, uint32_t opcode,

                       ppc_vsr_t *xa, ppc_vsr_t *xb)

{

    ppc_vsr_t *xa = &env->vsr[xA(opcode)];

    ppc_vsr_t *xb = &env->vsr[xB(opcode)];

    int64_t exp_a, exp_b;

    uint32_t cc;
@@ -2492,10 +2490,9 @@ void helper_xscmpexpqp(CPUPPCState *env, uint32_t opcode) 
}



#define VSX_SCALAR_CMP(op, ordered)                                      \

void helper_##op(CPUPPCState *env, uint32_t opcode)                      \

void helper_##op(CPUPPCState *env, uint32_t opcode,                      \

                 ppc_vsr_t *xa, ppc_vsr_t *xb)                           \

{                                                                        \

    ppc_vsr_t *xa = &env->vsr[xA(opcode)];                               \

    ppc_vsr_t *xb = &env->vsr[xB(opcode)];                               \

    uint32_t cc = 0;                                                     \

    bool vxsnan_flag = false, vxvc_flag = false;                         \

                                                                         \

target/ppc/helper.h

+6 −6
Original line number Diff line number Diff line
@@ -375,7 +375,7 @@ DEF_HELPER_2(xsdivqp, void, env, i32) 
DEF_HELPER_3(xsredp, void, env, vsr, vsr)

DEF_HELPER_3(xssqrtdp, void, env, vsr, vsr)

DEF_HELPER_3(xsrsqrtedp, void, env, vsr, vsr)

DEF_HELPER_2(xstdivdp, void, env, i32)

DEF_HELPER_4(xstdivdp, void, env, i32, vsr, vsr)

DEF_HELPER_2(xstsqrtdp, void, env, i32)

DEF_HELPER_4(xsmaddadp, void, env, vsr, vsr, vsr)

DEF_HELPER_4(xsmaddmdp, void, env, vsr, vsr, vsr)
@@ -389,10 +389,10 @@ DEF_HELPER_4(xscmpeqdp, void, env, vsr, vsr, vsr) 
DEF_HELPER_4(xscmpgtdp, void, env, vsr, vsr, vsr)

DEF_HELPER_4(xscmpgedp, void, env, vsr, vsr, vsr)

DEF_HELPER_4(xscmpnedp, void, env, vsr, vsr, vsr)

DEF_HELPER_2(xscmpexpdp, void, env, i32)

DEF_HELPER_4(xscmpexpdp, void, env, i32, vsr, vsr)

DEF_HELPER_2(xscmpexpqp, void, env, i32)

DEF_HELPER_2(xscmpodp, void, env, i32)

DEF_HELPER_2(xscmpudp, void, env, i32)

DEF_HELPER_4(xscmpodp, void, env, i32, vsr, vsr)

DEF_HELPER_4(xscmpudp, void, env, i32, vsr, vsr)

DEF_HELPER_2(xscmpoqp, void, env, i32)

DEF_HELPER_2(xscmpuqp, void, env, i32)

DEF_HELPER_4(xsmaxdp, void, env, vsr, vsr, vsr)
@@ -460,7 +460,7 @@ DEF_HELPER_4(xvdivdp, void, env, vsr, vsr, vsr) 
DEF_HELPER_3(xvredp, void, env, vsr, vsr)

DEF_HELPER_3(xvsqrtdp, void, env, vsr, vsr)

DEF_HELPER_3(xvrsqrtedp, void, env, vsr, vsr)

DEF_HELPER_2(xvtdivdp, void, env, i32)

DEF_HELPER_4(xvtdivdp, void, env, i32, vsr, vsr)

DEF_HELPER_2(xvtsqrtdp, void, env, i32)

DEF_HELPER_4(xvmaddadp, void, env, vsr, vsr, vsr)

DEF_HELPER_4(xvmaddmdp, void, env, vsr, vsr, vsr)
@@ -498,7 +498,7 @@ DEF_HELPER_4(xvdivsp, void, env, vsr, vsr, vsr) 
DEF_HELPER_3(xvresp, void, env, vsr, vsr)

DEF_HELPER_3(xvsqrtsp, void, env, vsr, vsr)

DEF_HELPER_3(xvrsqrtesp, void, env, vsr, vsr)

DEF_HELPER_2(xvtdivsp, void, env, i32)

DEF_HELPER_4(xvtdivsp, void, env, i32, vsr, vsr)

DEF_HELPER_2(xvtsqrtsp, void, env, i32)

DEF_HELPER_4(xvmaddasp, void, env, vsr, vsr, vsr)

DEF_HELPER_4(xvmaddmsp, void, env, vsr, vsr, vsr)

target/ppc/translate/vsx-impl.inc.c

+24 −6
Original line number Diff line number Diff line
@@ -1061,6 +1061,24 @@ static void gen_##name(DisasContext *ctx) \ 
    tcg_temp_free_ptr(xb);                                                    \

}



#define GEN_VSX_HELPER_X2_AB(name, op1, op2, inval, type)                     \

static void gen_##name(DisasContext *ctx)                                     \

{                                                                             \

    TCGv_i32 opc;                                                             \

    TCGv_ptr xa, xb;                                                          \

    if (unlikely(!ctx->vsx_enabled)) {                                        \

        gen_exception(ctx, POWERPC_EXCP_VSXU);                                \

        return;                                                               \

    }                                                                         \

    opc = tcg_const_i32(ctx->opcode);                                         \

    xa = gen_vsr_ptr(xA(ctx->opcode));                                        \

    xb = gen_vsr_ptr(xB(ctx->opcode));                                        \

    gen_helper_##name(cpu_env, opc, xa, xb);                                  \

    tcg_temp_free_i32(opc);                                                   \

    tcg_temp_free_ptr(xa);                                                    \

    tcg_temp_free_ptr(xb);                                                    \

}



#define GEN_VSX_HELPER_XT_XB_ENV(name, op1, op2, inval, type) \

static void gen_##name(DisasContext *ctx)                     \

{                                                             \
@@ -1089,7 +1107,7 @@ GEN_VSX_HELPER_2(xsdivqp, 0x04, 0x11, 0, PPC2_ISA300) 
GEN_VSX_HELPER_X2(xsredp, 0x14, 0x05, 0, PPC2_VSX)

GEN_VSX_HELPER_X2(xssqrtdp, 0x16, 0x04, 0, PPC2_VSX)

GEN_VSX_HELPER_X2(xsrsqrtedp, 0x14, 0x04, 0, PPC2_VSX)

GEN_VSX_HELPER_2(xstdivdp, 0x14, 0x07, 0, PPC2_VSX)

GEN_VSX_HELPER_X2_AB(xstdivdp, 0x14, 0x07, 0, PPC2_VSX)

GEN_VSX_HELPER_2(xstsqrtdp, 0x14, 0x06, 0, PPC2_VSX)

GEN_VSX_HELPER_X3(xsmaddadp, 0x04, 0x04, 0, PPC2_VSX)

GEN_VSX_HELPER_X3(xsmaddmdp, 0x04, 0x05, 0, PPC2_VSX)
@@ -1103,10 +1121,10 @@ GEN_VSX_HELPER_X3(xscmpeqdp, 0x0C, 0x00, 0, PPC2_ISA300) 
GEN_VSX_HELPER_X3(xscmpgtdp, 0x0C, 0x01, 0, PPC2_ISA300)

GEN_VSX_HELPER_X3(xscmpgedp, 0x0C, 0x02, 0, PPC2_ISA300)

GEN_VSX_HELPER_X3(xscmpnedp, 0x0C, 0x03, 0, PPC2_ISA300)

GEN_VSX_HELPER_2(xscmpexpdp, 0x0C, 0x07, 0, PPC2_ISA300)

GEN_VSX_HELPER_X2_AB(xscmpexpdp, 0x0C, 0x07, 0, PPC2_ISA300)

GEN_VSX_HELPER_2(xscmpexpqp, 0x04, 0x05, 0, PPC2_ISA300)

GEN_VSX_HELPER_2(xscmpodp, 0x0C, 0x05, 0, PPC2_VSX)

GEN_VSX_HELPER_2(xscmpudp, 0x0C, 0x04, 0, PPC2_VSX)

GEN_VSX_HELPER_X2_AB(xscmpodp, 0x0C, 0x05, 0, PPC2_VSX)

GEN_VSX_HELPER_X2_AB(xscmpudp, 0x0C, 0x04, 0, PPC2_VSX)

GEN_VSX_HELPER_2(xscmpoqp, 0x04, 0x04, 0, PPC2_VSX)

GEN_VSX_HELPER_2(xscmpuqp, 0x04, 0x14, 0, PPC2_VSX)

GEN_VSX_HELPER_X3(xsmaxdp, 0x00, 0x14, 0, PPC2_VSX)
@@ -1174,7 +1192,7 @@ GEN_VSX_HELPER_X3(xvdivdp, 0x00, 0x0F, 0, PPC2_VSX) 
GEN_VSX_HELPER_X2(xvredp, 0x14, 0x0D, 0, PPC2_VSX)

GEN_VSX_HELPER_X2(xvsqrtdp, 0x16, 0x0C, 0, PPC2_VSX)

GEN_VSX_HELPER_X2(xvrsqrtedp, 0x14, 0x0C, 0, PPC2_VSX)

GEN_VSX_HELPER_2(xvtdivdp, 0x14, 0x0F, 0, PPC2_VSX)

GEN_VSX_HELPER_X2_AB(xvtdivdp, 0x14, 0x0F, 0, PPC2_VSX)

GEN_VSX_HELPER_2(xvtsqrtdp, 0x14, 0x0E, 0, PPC2_VSX)

GEN_VSX_HELPER_X3(xvmaddadp, 0x04, 0x0C, 0, PPC2_VSX)

GEN_VSX_HELPER_X3(xvmaddmdp, 0x04, 0x0D, 0, PPC2_VSX)
@@ -1208,7 +1226,7 @@ GEN_VSX_HELPER_X3(xvdivsp, 0x00, 0x0B, 0, PPC2_VSX) 
GEN_VSX_HELPER_X2(xvresp, 0x14, 0x09, 0, PPC2_VSX)

GEN_VSX_HELPER_X2(xvsqrtsp, 0x16, 0x08, 0, PPC2_VSX)

GEN_VSX_HELPER_X2(xvrsqrtesp, 0x14, 0x08, 0, PPC2_VSX)

GEN_VSX_HELPER_2(xvtdivsp, 0x14, 0x0B, 0, PPC2_VSX)

GEN_VSX_HELPER_X2_AB(xvtdivsp, 0x14, 0x0B, 0, PPC2_VSX)

GEN_VSX_HELPER_2(xvtsqrtsp, 0x14, 0x0A, 0, PPC2_VSX)

GEN_VSX_HELPER_X3(xvmaddasp, 0x04, 0x08, 0, PPC2_VSX)

GEN_VSX_HELPER_X3(xvmaddmsp, 0x04, 0x09, 0, PPC2_VSX)