Loading target/ppc/gdbstub.c +19 −15 Original line number Diff line number Diff line Loading @@ -84,11 +84,14 @@ static int ppc_gdb_register_len(int n) } } /* We need to present the registers to gdb in the "current" memory ordering. For user-only mode we get this for free; TARGET_WORDS_BIGENDIAN is set to the proper ordering for the binary, and cannot be changed. For system mode, TARGET_WORDS_BIGENDIAN is always set, and we must check the current mode of the chip to see if we're running in little-endian. */ /* * We need to present the registers to gdb in the "current" memory * ordering. For user-only mode we get this for free; * TARGET_WORDS_BIGENDIAN is set to the proper ordering for the * binary, and cannot be changed. For system mode, * TARGET_WORDS_BIGENDIAN is always set, and we must check the current * mode of the chip to see if we're running in little-endian. */ void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len) { #ifndef CONFIG_USER_ONLY Loading @@ -104,11 +107,12 @@ void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len) #endif } /* Old gdb always expects FP registers. Newer (xml-aware) gdb only /* * Old gdb always expects FP registers. Newer (xml-aware) gdb only * expects whatever the target description contains. Due to a * historical mishap the FP registers appear in between core integer * regs and PC, MSR, CR, and so forth. We hack round this by giving the * FP regs zero size when talking to a newer gdb. * regs and PC, MSR, CR, and so forth. We hack round this by giving * the FP regs zero size when talking to a newer gdb. */ int ppc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) Loading Loading
target/ppc/gdbstub.c +19 −15 Original line number Diff line number Diff line Loading @@ -84,11 +84,14 @@ static int ppc_gdb_register_len(int n) } } /* We need to present the registers to gdb in the "current" memory ordering. For user-only mode we get this for free; TARGET_WORDS_BIGENDIAN is set to the proper ordering for the binary, and cannot be changed. For system mode, TARGET_WORDS_BIGENDIAN is always set, and we must check the current mode of the chip to see if we're running in little-endian. */ /* * We need to present the registers to gdb in the "current" memory * ordering. For user-only mode we get this for free; * TARGET_WORDS_BIGENDIAN is set to the proper ordering for the * binary, and cannot be changed. For system mode, * TARGET_WORDS_BIGENDIAN is always set, and we must check the current * mode of the chip to see if we're running in little-endian. */ void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len) { #ifndef CONFIG_USER_ONLY Loading @@ -104,11 +107,12 @@ void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len) #endif } /* Old gdb always expects FP registers. Newer (xml-aware) gdb only /* * Old gdb always expects FP registers. Newer (xml-aware) gdb only * expects whatever the target description contains. Due to a * historical mishap the FP registers appear in between core integer * regs and PC, MSR, CR, and so forth. We hack round this by giving the * FP regs zero size when talking to a newer gdb. * regs and PC, MSR, CR, and so forth. We hack round this by giving * the FP regs zero size when talking to a newer gdb. */ int ppc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) Loading