Commit 0159a643 authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'mst/tags/for_anthony' into staging 



acpi,pci,pc,virtio fixes and enhancements

This includes new unit-tests for acpi by Marcel,
hotplug for pci bridges by myself (piix only so far)
and cpu hotplug for q35.
And a bunch of fixes all over the place as usual.

I included the patch to fix memory alignment for q35
as well - even though it limits 32 bit guests to 3G (they
previously could address more memory with PAE).
To remove the limit, this will have to be fixed in seabios.

I also added self as virtio co-maintainer so I don't need
to troll the list for patches to review.

Signed-off-by: default avatarMichael S. Tsirkin <mst@redhat.com>

# gpg: Signature made Sun 26 Jan 2014 11:12:09 GMT using RSA key ID D28D5469
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>"
# gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
#      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469

* mst/tags/for_anthony: (35 commits)
  MAINTAINERS: add self as virtio co-maintainer
  q35: document gigabyte_align
  q35: gigabyte alignment for ram
  acpi: Fix PCI hole handling on build_srat()
  pc: Save size of RAM below 4GB
  hw/pci: fix error flow in pci multifunction init
  acpi-test: update expected AML since recent changes
  pc: ACPI: update acpi-dsdt.hex.generated q35-acpi-dsdt.hex.generated
  pc: ACPI: unify source of CPU hotplug IO base/len
  pc: ACPI: expose PRST IO range via _CRS
  pc: Q35 DSDT: exclude CPU hotplug IO range from PCI bus resources
  pc: PIIX DSDT: exclude CPU/PCI hotplug & GPE0 IO range from PCI bus resources
  pc: set PRST base in DSDT depending on chipset
  acpi: ich9: add CPU hotplug handling to Q35 machine
  acpi: factor out common cpu hotplug code for PIIX4/Q35
  acpi-build: enable hotplug for PCI bridges
  piix4: add acpi pci hotplug support
  pcihp: generalization of piix4 acpi
  pci: add pci_for_each_bus_depth_first
  pc: make: fix dependencies: rebuild when included file is changed
  ...

Message-id: 1390735289-15563-1-git-send-email-mst@redhat.com
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 97374ce5 a75143ed

MAINTAINERS

+1 −0
Original line number Diff line number Diff line
@@ -610,6 +610,7 @@ F: hw/*/*vhost* 


virtio

M: Anthony Liguori <aliguori@amazon.com>

M: Michael S. Tsirkin <mst@redhat.com>

S: Supported

F: hw/*/virtio*

configure

+4 −0
Original line number Diff line number Diff line
@@ -4774,6 +4774,10 @@ for bios_file in \ 
do

    FILES="$FILES pc-bios/`basename $bios_file`"

done

for test_file in `find $source_path/tests/acpi-test-data -type f`

do

    FILES="$FILES tests/acpi-test-data`echo $test_file | sed -e 's/.*acpi-test-data//'`"

done

mkdir -p $DIRS

for f in $FILES ; do

    if [ -e "$source_path/$f" ] && [ "$source_path" != `pwd` ]; then

docs/specs/acpi_cpu_hotplug.txt

+3 −1
Original line number Diff line number Diff line
@@ -10,7 +10,9 @@ ACPI GPE block (IO ports 0xafe0-0xafe3, byte access): 
Generic ACPI GPE block. Bit 2 (GPE.2) used to notify CPU

hot-add/remove event to ACPI BIOS, via SCI interrupt.



CPU present bitmap (IO port 0xaf00-0xaf1f, 1-byte access):

CPU present bitmap for:

  ICH9-LPC (IO port 0x0cd8-0xcf7, 1-byte access)

  PIIX-PM  (IO port 0xaf00-0xaf1f, 1-byte access)

---------------------------------------------------------------

One bit per CPU. Bit position reflects corresponding CPU APIC ID.

Read-only.

hw/acpi/Makefile.objs

+1 −2
Original line number Diff line number Diff line 
common-obj-$(CONFIG_ACPI) += core.o piix4.o ich9.o

common-obj-$(CONFIG_ACPI) += core.o piix4.o ich9.o pcihp.o cpu_hotplug.o

hw/acpi/cpu_hotplug.c

0 → 100644
+64 −0
Original line number Diff line number Diff line 
/*

 * QEMU ACPI hotplug utilities

 *

 * Copyright (C) 2013 Red Hat Inc

 *

 * Authors:

 *   Igor Mammedov <imammedo@redhat.com>

 *

 * This work is licensed under the terms of the GNU GPL, version 2 or later.

 * See the COPYING file in the top-level directory.

 */

#include "hw/hw.h"

#include "hw/acpi/cpu_hotplug.h"



static uint64_t cpu_status_read(void *opaque, hwaddr addr, unsigned int size)

{

    AcpiCpuHotplug *cpus = opaque;

    uint64_t val = cpus->sts[addr];



    return val;

}



static void cpu_status_write(void *opaque, hwaddr addr, uint64_t data,

                             unsigned int size)

{

    /* TODO: implement VCPU removal on guest signal that CPU can be removed */

}



static const MemoryRegionOps AcpiCpuHotplug_ops = {

    .read = cpu_status_read,

    .write = cpu_status_write,

    .endianness = DEVICE_LITTLE_ENDIAN,

    .valid = {

        .min_access_size = 1,

        .max_access_size = 1,

    },

};



void AcpiCpuHotplug_add(ACPIGPE *gpe, AcpiCpuHotplug *g, CPUState *cpu)

{

    CPUClass *k = CPU_GET_CLASS(cpu);

    int64_t cpu_id;



    *gpe->sts = *gpe->sts | ACPI_CPU_HOTPLUG_STATUS;

    cpu_id = k->get_arch_id(CPU(cpu));

    g->sts[cpu_id / 8] |= (1 << (cpu_id % 8));

}



void AcpiCpuHotplug_init(MemoryRegion *parent, Object *owner,

                         AcpiCpuHotplug *gpe_cpu, uint16_t base)

{

    CPUState *cpu;



    CPU_FOREACH(cpu) {

        CPUClass *cc = CPU_GET_CLASS(cpu);

        int64_t id = cc->get_arch_id(cpu);



        g_assert((id / 8) < ACPI_GPE_PROC_LEN);

        gpe_cpu->sts[id / 8] |= (1 << (id % 8));

    }

    memory_region_init_io(&gpe_cpu->io, owner, &AcpiCpuHotplug_ops,

                          gpe_cpu, "acpi-cpu-hotplug", ACPI_GPE_PROC_LEN);

    memory_region_add_subregion(parent, base, &gpe_cpu->io);

}