Commit 00988da4 authored Feb 18, 2019 by Max Filippov

tests/tcg/xtensa: conditionalize and fix s32c1i tests



Make s32c1i tests conditional on the presence of this option. Initialize
ATOMCTL SR when it's present to allow RCW transactions on uncached
memory.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>

parent 9b2d08a0

tests/tcg/xtensa/test_s32c1i.S

+12 −0

Original line number	Diff line number	Diff line
		@@ -2,7 +2,13 @@

		test_suite s32c1i

		#if XCHAL_HAVE_S32C1I

		test s32c1i_nowrite
		#if XCHAL_HW_VERSION >= 230000
		movi a2, 0x29
		wsr a2, atomctl
		#endif
		movi a2, 1f
		movi a3, 1
		wsr a3, scompare1
		@@ -20,6 +26,10 @@ test s32c1i_nowrite
		test_end

		test s32c1i_write
		#if XCHAL_HW_VERSION >= 230000
		movi a2, 0x29
		wsr a2, atomctl
		#endif
		movi a2, 1f
		movi a3, 3
		wsr a3, scompare1
		@@ -36,4 +46,6 @@ test s32c1i_write
		.text
		test_end

		#endif

		test_suite_end