defxx: Clean up DEFEA resource management
Reserve DEFEA resources according to actual use. There are three regions, for the ESIC ASIC's CSRs, for the discrete Burst Holdoff register, and for the PDQ ASIC's CSRs. The latter is mapped in the memory or port I/O address space depending on configuration. The two formers are hardwired and always mapped in the port I/O address space. Signed-off-by:Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by:
David S. Miller <davem@davemloft.net>
parent
6a931423
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