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Commit d2754355 authored by Victor Shih's avatar Victor Shih Committed by Ulf Hansson
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mmc: sdhci-pci-gli: Set SDR104's clock to 205MHz and enable SSC for GL9767



Set GL9767 SDR104's clock to 205MHz and enable SSC feature
depend on register 0x888 BIT(1).

Signed-off-by: default avatarBen Chuang <ben.chuang@genesyslogic.com.tw>
Signed-off-by: default avatarVictor Shih <victor.shih@genesyslogic.com.tw>
Acked-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20230609071441.451464-3-victorshihgli@gmail.com


Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent f3a5b56c
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