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Commit ccd8ab03 authored by Varadarajan Narayanan's avatar Varadarajan Narayanan Committed by Bjorn Andersson
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clk: qcom: ipq5332: Drop set rate parent from gpll0 dependent clocks



IPQ5332's GPLL0's nominal/turbo frequency is 800MHz.
This must not be scaled based on the requirement of
dependent clocks. Hence remove the CLK_SET_RATE_PARENT
flag.

Fixes: 3d89d529 ("clk: qcom: add Global Clock controller (GCC) driver for IPQ5332 SoC")
Signed-off-by: default avatarVaradarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: default avatarKathiravan T <quic_kathirav@quicinc.com>
Link: https://lore.kernel.org/r/1693474133-10467-1-git-send-email-quic_varada@quicinc.com


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 07c34b37
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