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Commit 8d11f21a authored by Guo Ren's avatar Guo Ren
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csky: Fixup barrier design



Remove shareable bit for ordering barrier, just keep ordering
in current hart is enough for SMP. Using three continuous
sync.is as PTW barrier to prevent speculative PTW in 860
microarchitecture.

Signed-off-by: default avatarGuo Ren <guoren@linux.alibaba.com>
parent f92ddfb7
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