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Commit 7bcae251 authored by Will Deacon's avatar Will Deacon Committed by Jiri Slaby
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arm64: flush TLS registers during exec



commit eb35bdd7 upstream.

Nathan reports that we leak TLS information from the parent context
during an exec, as we don't clear the TLS registers when flushing the
thread state.

This patch updates the flushing code so that we:

  (1) Unconditionally zero the tpidr_el0 register (since this is fully
      context switched for native tasks and zeroed for compat tasks)

  (2) Zero the tp_value state in thread_info before clearing the
      tpidrr0_el0 register for compat tasks (since this is only writable
      by the set_tls compat syscall and therefore not fully switched).

A missing compiler barrier is also added to the compat set_tls syscall.

Acked-by: default avatarNathan Lynch <Nathan_Lynch@mentor.com>
Reported-by: default avatarNathan Lynch <Nathan_Lynch@mentor.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
Signed-off-by: default avatarJiri Slaby <jslaby@suse.cz>
parent 0fbdd4f7
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