ARM: dts: vf610twr: assign Ethernet clock explicitly
Assign Ethernet clock parents explicitly. The VF610 Tower Board uses the external Ethernet clock input which is connected to a 50MHz clock. The Vybrid SoC has two ethernet interfaces (fec0 and fec1) which use the same clock source (VF610_CLK_ENET). Therefore this parent configuration affects multiple consumer devices and need to be specified in the clock provider node. Signed-off-by:Stefan Agner <stefan@agner.ch> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
parent
ddcc6cad
Please register or sign in to comment