drm/ingenic: Fix pixclock rate for 24-bit serial panels
When using a 24-bit panel on a 8-bit serial bus, the pixel clock requested by the panel has to be multiplied by 3, since the subpixels are shifted sequentially. The code (in ingenic_drm_encoder_atomic_check) already computed crtc_state->adjusted_mode->crtc_clock accordingly, but clk_set_rate() used crtc_state->adjusted_mode->clock instead. Fixes: 28ab7d35 ("drm/ingenic: Properly compute timings when using a 3x8-bit panel") Cc: stable@vger.kernel.org # v5.10 Signed-off-by:Paul Cercueil <paul@crapouillou.net> Tested-by: H. Nikolaus Schaller <hns@goldelico.com> # CI20/jz4780 (HDMI) and Alpha400/jz4730 (LCD) Acked-by:
Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20210323144008.166248-1-paul@crapouillou.net
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