mtd: chips: Add support for PMC SPI Flash chips in m25p80.c

Add support for PMC (now Chingis, part of ISSI) Pm25LV512 (512 Kib),
Pm25LV010 (1 Mib) and Pm25LQ032 (32 Mib) SPI Flash chips.

This patch addresses two generations of PMC SPI Flash chips:

 - Pm25LV512 and Pm25LV010: these have 4KiB sectors and 32KiB
   blocks. The 4KiB sector erase uses a non-standard opcode
   (0xd7). They do not support JEDEC RDID (0x9f), and so they can only
   be detected by matching their name string with pre-configured
   platform data. Because of the cascaded acquisitions, the datasheet
   is no longer available on the current manufacturer's website,
   although it is still commonly used in some recent wireless routers
   (<https://forum.openwrt.org/viewtopic.php?pid=186360#p186360>). The
   only public datasheet available seems to be on GeoCities:
   <http://www.geocities.jp/scottle556/pdf/Pm25LV512-010.pdf>

 - Pm25LQ032: a newer generation flash, with 4KiB sectors and 64KiB
   blocks. It uses the standard erase and JEDEC read-ID
   opcodes. Manufacturer's datasheet is here:
   <http://www.chingistek.com/img/Product_Files/Pm25LQ032C%20datasheet%20v1.6.1.pdf

>

This patch is resent in order to take into account both Brian Norris
remarks and this upstream patch:

commit e534ee4f
Author: Krzysztof Mazur <krzysiek@podlesie.net>
Date:   Fri Feb 22 15:51:05 2013 +0100

    mtd: m25p80: introduce SST_WRITE flag for SST byte programming

    Not all SST devices implement the SST byte programming command.
    Some devices (like SST25VF064C) implement only standard m25p80 page
    write command.

    Now SPI flash devices that need sst_write() are explicitly marked
    with new SST_WRITE flag and the decision to use sst_write() is based
    on this flag instead of manufacturer id.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Michel Stempin <michel.stempin@wanadoo.fr>
[Brian: fixed conflict]
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>