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Commit f2afa78d authored by Yoshihiro Shimoda's avatar Yoshihiro Shimoda Committed by Geert Uytterhoeven
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dt-bindings: clock: Add r8a779g0 CPG Core Clock Definitions 



Add all Clock Pulse Generator Core Clock Outputs for the Renesas
R-Car V4H (R8A779G0) SoC.

Signed-off-by: default avatarYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20220425064201.459633-3-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 90715507
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