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Commit dcea1a81 authored by Tan, Tee Min's avatar Tan, Tee Min Committed by Jakub Kicinski
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stmmac: intel: Update PCH PTP clock rate from 200MHz to 204.8MHz



Current Intel platform has an output of ~976ms interval
when probed on 1 Pulse-per-Second(PPS) hardware pin.

The correct PTP clock frequency for PCH GbE should be 204.8MHz
instead of 200MHz. PSE GbE PTP clock rate remains at 200MHz.

Fixes: 58da0cfa ("net: stmmac: create dwmac-intel.c to contain all Intel platform")
Signed-off-by: default avatarLing Pei Lee <pei.lee.ling@intel.com>
Signed-off-by: default avatarTan, Tee Min <tee.min.tan@intel.com>
Signed-off-by: default avatarVoon Weifeng <weifeng.voon@intel.com>
Signed-off-by: default avatarGan Yi Fang <yi.fang.gan@intel.com>
Link: https://lore.kernel.org/r/20221108020811.12919-1-yi.fang.gan@intel.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent d75aed14
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