net/mlx5e: Add SW implementation to support IPsec 64 bit soft and hard limits

The CX7 cards which support IPsec packet offload use 32 bits to
configure soft and hard packet limits. This is not enough as the
software part using 64 bits.

The needed functionality of supporting 64 bits is implemented through
mlx5 abstraction layer, which will ensure that HW is reconfigured
on-demand every 2^31 packets.

To simulate the 64 bit IPsec soft/hard limits, we divide the soft/hard
limits to multiple interrupts (rounds). Each round counts 2^31 packets.
Once the counter is less than or equal to 2^31, the soft event is raised
and software sets the bit 31 of the counter and decrement the round
counter.

Link: https://lore.kernel.org/r/5a86c890b6dccb6865acf9042a8b03f899d1f3f9.1680162300.git.leonro@nvidia.com


Reviewed-by: Raed Salem <raeds@nvidia.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>