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Commit 95bf15f3 authored by Aaron Brice's avatar Aaron Brice Committed by Mark Brown
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spi: fsl-dspi: Add ~50ns delay between cs and sck 



Add delay between chip select and clock signals, before clock starts and
after clock stops.

Signed-off-by: default avatarAaron Brice <aaron.brice@datasoft.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent c1c14957
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