Skip to content
Commit 1fdaaa13 authored by Ajit Kumar Pandey's avatar Ajit Kumar Pandey Committed by Stephen Boyd
Browse files

clk: x86: Fix clk_gate_flags for RV_CLK_GATE



In newer SoC we have to clear bit for disabling 48MHz oscillator
clock gate. Remove CLK_GATE_SET_TO_DISABLE flag for proper enable
and disable of 48MHz clock.

Signed-off-by: default avatarAjit Kumar Pandey <AjitKumar.Pandey@amd.com>
Reviewed-by: default avatarMario Limonciello <Mario.Limonciello@amd.com>
Link: https://lore.kernel.org/r/20211212180527.1641362-6-AjitKumar.Pandey@amd.com


Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent c33917b4
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment