diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index 8801ff7d81b34ee3c96fdad550503a95430d99aa..670bbc0e163621d7f11d03b728b9dd857e49b6a9 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -49,6 +49,33 @@ jobs: -j$(sysctl -n hw.logicalcpu) displayName: 'Perform tools-only build' + - job: check_for_migrated_symbols_in_board_header + displayName: 'Check for migrated symbols in board header' + pool: + vmImage: $(ubuntu_vm) + container: + image: $(ci_runner_image) + options: $(container_option) + steps: + - script: | + KSYMLST=`mktemp` + KUSEDLST=`mktemp` + cat `find . -name "Kconfig*"` | \ + sed -n -e 's/^\s*config *\([A-Za-z0-9_]*\).*$/CONFIG_\1/p' \ + -e 's/^\s*menuconfig *\([A-Za-z0-9_]*\).*$/CONFIG_\1/p' \ + | sort -u > $KSYMLST + for CFG in `find include/configs -name "*.h"`; do + grep '#define[[:blank:]]CONFIG_' $CFG | \ + sed -n 's/#define.\(CONFIG_[A-Za-z0-9_]*\).*/\1/p' | \ + sort -u > ${KUSEDLST} || true + NUM=`comm -12 --total --output-delimiter=, ${KSYMLST} ${KUSEDLST} | \ + cut -d , -f 3` + if [[ $NUM -ne 0 ]]; then + echo "Unmigrated symbols found in $CFG" + exit 1 + fi + done + - job: cppcheck displayName: 'Static code analysis with cppcheck' pool: diff --git a/.gitattributes b/.gitattributes index 899473ab0fbbd38f4f5cc0690042da3c1c619ac5..1879a2dfb3c9253291d7f709b549bea27205c2d1 100644 --- a/.gitattributes +++ b/.gitattributes @@ -3,3 +3,4 @@ # Denote all files that are truly binary and should not be modified *.bmp binary *.ttf binary +*.gz binary diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 4c89daeadcf319ab6eff7e2dac75027f06365830..d06cca45fd042cac27ca7ccf81962f29842ce573 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -105,6 +105,27 @@ build all other platforms: exit $ret; fi; +check for migrated symbols in board header: + stage: testsuites + script: + - KSYMLST=`mktemp`; + KUSEDLST=`mktemp`; + cat `find . -name "Kconfig*"` | + sed -n -e 's/^\s*config *\([A-Za-z0-9_]*\).*$/CONFIG_\1/p' + -e 's/^\s*menuconfig *\([A-Za-z0-9_]*\).*$/CONFIG_\1/p' + | sort -u > $KSYMLST; + for CFG in `find include/configs -name "*.h"`; do + grep '#define[[:blank:]]CONFIG_' $CFG | + sed -n 's/#define.\(CONFIG_[A-Za-z0-9_]*\).*/\1/p' | + sort -u > ${KUSEDLST} || true; + NUM=`comm -12 --total --output-delimiter=, ${KSYMLST} ${KUSEDLST} | + cut -d , -f 3`; + if [[ $NUM -ne 0 ]]; then + echo "Unmigrated symbols found in $CFG"; + exit 1; + fi; + done + # QA jobs for code analytics # static code analysis with cppcheck (we can add --enable=all later) cppcheck: diff --git a/MAINTAINERS b/MAINTAINERS index 90666ce376cd2af5615d5884fcebcf6dd6770075..f4bd3d79e22b2630b33a4d7d988c8e837f90e6a2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -115,6 +115,7 @@ F: arch/arm/include/asm/arch-m1/ F: arch/arm/mach-apple/ F: configs/apple_m1_defconfig F: drivers/iommu/apple_dart.c +F: drivers/pinctrl/pinctrl-apple.c F: include/configs/apple.h ARM @@ -273,10 +274,24 @@ F: drivers/ata/ahci_mvebu.c F: drivers/ddr/marvell/ F: drivers/gpio/mvebu_gpio.c F: drivers/spi/kirkwood_spi.c -F: drivers/pci/pci_mvebu.c F: drivers/pci/pcie_dw_mvebu.c F: drivers/watchdog/orion_wdt.c +ARM MARVELL PCIE CONTROLLER DRIVERS +M: Pali Rohár +M: Stefan Roese +S: Maintained +T: git https://source.denx.de/u-boot/custodians/u-boot-marvell.git +F: drivers/pci/pci-aardvark.c +F: drivers/pci/pci_mvebu.c + +ARM MARVELL SERIAL DRIVERS +M: Pali Rohár +M: Stefan Roese +S: Maintained +T: git https://source.denx.de/u-boot/custodians/u-boot-marvell.git +F: drivers/serial/serial_mvebu_a3700.c + ARM MARVELL PXA M: Marek Vasut S: Maintained @@ -764,6 +779,13 @@ F: test/env/ F: tools/env* F: tools/mkenvimage.c +ENVIRONMENT AS TEXT +M: Simon Glass +R: Wolfgang Denk +S: Maintained +F: doc/usage/environment.rst +F: scripts/env2string.awk + FASTBOOT S: Orphaned F: cmd/fastboot.c diff --git a/Makefile b/Makefile index a30098c66f8d711d23ff279d6c5801cb020a1605..95afb98292f1ae0cbb18b9c8f9d62bf42b3f054c 100644 --- a/Makefile +++ b/Makefile @@ -517,6 +517,7 @@ version_h := include/generated/version_autogenerated.h timestamp_h := include/generated/timestamp_autogenerated.h defaultenv_h := include/generated/defaultenv_autogenerated.h dt_h := include/generated/dt.h +env_h := include/generated/environment.h no-dot-config-targets := clean clobber mrproper distclean \ help %docs check% coccicheck \ @@ -943,8 +944,9 @@ INPUTS-$(CONFIG_SPL_FRAMEWORK) += u-boot.img endif endif INPUTS-$(CONFIG_TPL) += tpl/u-boot-tpl.bin -INPUTS-$(CONFIG_OF_SEPARATE) += u-boot.dtb -INPUTS-$(CONFIG_BINMAN_STANDALONE_FDT) += u-boot.dtb + +# Allow omitting the .dtb output if it is not normally used +INPUTS-$(CONFIG_OF_SEPARATE) += $(if $(CONFIG_OF_OMIT_DTB),dts/dt.dtb,u-boot.dtb) ifeq ($(CONFIG_SPL_FRAMEWORK),y) INPUTS-$(CONFIG_OF_SEPARATE) += u-boot-dtb.img endif @@ -1053,6 +1055,10 @@ quiet_cmd_cfgcheck = CFGCHK $2 cmd_cfgcheck = $(srctree)/scripts/check-config.sh $2 \ $(srctree)/scripts/config_whitelist.txt $(srctree) +quiet_cmd_ofcheck = OFCHK $2 +cmd_ofcheck = $(srctree)/scripts/check-of.sh $2 \ + $(srctree)/scripts/of_allowlist.txt + # Concat the value of all the CONFIGs (result is 'y' or 'yy', etc. ) got = $(foreach cfg,$(1),$($(cfg))) @@ -1122,10 +1128,14 @@ endif $(CONFIG_WATCHDOG)$(CONFIG_HW_WATCHDOG)) $(call deprecated,CONFIG_DM_ETH,Ethernet drivers,v2020.07,$(CONFIG_NET)) $(call deprecated,CONFIG_DM_I2C,I2C drivers,v2022.04,$(CONFIG_SYS_I2C_LEGACY)) + $(call deprecated,CONFIG_DM_KEYBOARD,Keyboard drivers,v2022.10,$(CONFIG_KEYBOARD)) @# Check that this build does not use CONFIG options that we do not @# know about unless they are in Kconfig. All the existing CONFIG @# options are whitelisted, so new ones should not be added. $(call cmd,cfgcheck,u-boot.cfg) + @# Check that this build does not override OF_HAS_PRIOR_STAGE by + @# disabling OF_BOARD. + $(call cmd,ofcheck,$(KCONFIG_CONFIG)) PHONY += dtbs dtbs: dts/dt.dtb @@ -1179,7 +1189,7 @@ u-boot.bin: u-boot-fit-dtb.bin FORCE u-boot-dtb.bin: u-boot-nodtb.bin dts/dt.dtb FORCE $(call if_changed,cat) -else ifeq ($(CONFIG_OF_SEPARATE),y) +else ifeq ($(CONFIG_OF_SEPARATE).$(CONFIG_OF_OMIT_DTB),y.) u-boot-dtb.bin: u-boot-nodtb.bin dts/dt.dtb FORCE $(call if_changed,cat) @@ -1302,11 +1312,13 @@ default_dt := $(if $(DEVICE_TREE),$(DEVICE_TREE),$(CONFIG_DEFAULT_DEVICE_TREE)) quiet_cmd_binman = BINMAN $@ cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \ + $(foreach f,$(BINMAN_TOOLPATHS),--toolpath $(f)) \ --toolpath $(objtree)/tools \ $(if $(BINMAN_VERBOSE),-v$(BINMAN_VERBOSE)) \ build -u -d u-boot.dtb -O . -m --allow-missing \ -I . -I $(srctree) -I $(srctree)/board/$(BOARDDIR) \ -I arch/$(ARCH)/dts -a of-list=$(CONFIG_OF_LIST) \ + $(foreach f,$(BINMAN_INDIRS),-I $(f)) \ -a atf-bl31-path=${BL31} \ -a opensbi-path=${OPENSBI} \ -a default-dt=$(default_dt) \ @@ -1412,7 +1424,7 @@ u-boot-lzma.img: u-boot.bin.lzma FORCE u-boot-dtb.img u-boot.img u-boot.kwb u-boot.pbl u-boot-ivt.img: \ $(if $(CONFIG_SPL_LOAD_FIT),u-boot-nodtb.bin \ - $(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_SANDBOX)$(CONFIG_BINMAN_STANDALONE_FDT),dts/dt.dtb) \ + $(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_SANDBOX),dts/dt.dtb) \ ,$(UBOOT_BIN)) FORCE $(call if_changed,mkimage) $(BOARD_SIZE_CHECK) @@ -1795,6 +1807,69 @@ quiet_cmd_sym ?= SYM $@ u-boot.sym: u-boot FORCE $(call if_changed,sym) +# Environment processing +# --------------------------------------------------------------------------- + +# Directory where we expect the .env file, if it exists +ENV_DIR := $(srctree)/board/$(BOARDDIR) + +# Basename of .env file, stripping quotes +ENV_SOURCE_FILE := $(CONFIG_ENV_SOURCE_FILE:"%"=%) + +# Filename of .env file +ENV_FILE_CFG := $(ENV_DIR)/$(ENV_SOURCE_FILE).env + +# Default filename, if CONFIG_ENV_SOURCE_FILE is empty +ENV_FILE_BOARD := $(ENV_DIR)/$(CONFIG_SYS_BOARD:"%"=%).env + +# Select between the CONFIG_ENV_SOURCE_FILE and the default one +ENV_FILE := $(if $(ENV_SOURCE_FILE),$(ENV_FILE_CFG),$(wildcard $(ENV_FILE_BOARD))) + +# Run the environment text file through the preprocessor, but only if it is +# non-empty, to save time and possible build errors if something is wonky with +# the board +quiet_cmd_gen_envp = ENVP $@ + cmd_gen_envp = \ + if [ -s "$(ENV_FILE)" ]; then \ + $(CPP) -P $(CFLAGS) -x assembler-with-cpp -D__ASSEMBLY__ \ + -D__UBOOT_CONFIG__ \ + -I . -I include -I $(srctree)/include \ + -include linux/kconfig.h -include include/config.h \ + -I$(srctree)/arch/$(ARCH)/include \ + $< -o $@; \ + else \ + echo -n >$@ ; \ + fi +include/generated/env.in: include/generated/env.txt FORCE + $(call cmd,gen_envp) + +# Regenerate the environment if it changes +# We use 'wildcard' since the file is not required to exist (at present), in +# which case we don't want this dependency, but instead should create an empty +# file +# This rule is useful since it shows the source file for the environment +quiet_cmd_envc = ENVC $@ + cmd_envc = \ + if [ -f "$<" ]; then \ + cat $< > $@; \ + elif [ -n "$(ENV_SOURCE_FILE)" ]; then \ + echo "Missing file $(ENV_FILE_CFG)"; \ + else \ + echo -n >$@ ; \ + fi + +include/generated/env.txt: $(wildcard $(ENV_FILE)) FORCE + $(call cmd,envc) + +# Write out the resulting environment, converted to a C string +quiet_cmd_gen_envt = ENVT $@ + cmd_gen_envt = \ + awk -f $(srctree)/scripts/env2string.awk $< >$@ +$(env_h): include/generated/env.in + $(call cmd,gen_envt) + +# --------------------------------------------------------------------------- + # The actual objects are generated when descending, # make sure no implicit rule kicks in $(sort $(u-boot-init) $(u-boot-main)): $(u-boot-dirs) ; @@ -1850,7 +1925,7 @@ endif # prepare2 creates a makefile if using a separate output directory prepare2: prepare3 outputmakefile cfg -prepare1: prepare2 $(version_h) $(timestamp_h) $(dt_h) \ +prepare1: prepare2 $(version_h) $(timestamp_h) $(dt_h) $(env_h) \ include/config/auto.conf ifeq ($(wildcard $(LDSCRIPT)),) @echo >&2 " Could not find linker script." diff --git a/README b/README index 9606a8b3acf5477e1417c15ff9a072568093f05e..77782d0ae74a5e2fd9c8880394eb1481aae8acf1 100644 --- a/README +++ b/README @@ -565,11 +565,6 @@ The following options need to be configured: boards with QUICC Engines require OF_QE to set UCC MAC addresses - CONFIG_OF_BOARD_SETUP - - Board code has addition modification that it wants to make - to the flat device tree before handing it off to the kernel - CONFIG_OF_SYSTEM_SETUP Other code has addition modification that it wants to make @@ -596,9 +591,6 @@ The following options need to be configured: Note: If a "bootargs" environment is defined, it will override the defaults discussed just above. -- Cache Configuration: - CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot - - Cache Configuration for ARM: CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache controller @@ -622,19 +614,6 @@ The following options need to be configured: Define this variable to enable hw flow control in serial driver. Current user of this option is drivers/serial/nsl16550.c driver -- Autoboot Command: - CONFIG_BOOTCOMMAND - Only needed when CONFIG_BOOTDELAY is enabled; - define a command string that is automatically executed - when no character is read on the console interface - within "Boot Delay" after reset. - - CONFIG_RAMBOOT and CONFIG_NFSBOOT - The value of these goes into the environment as - "ramboot" and "nfsboot" respectively, and can be used - as a convenience, when switching between booting from - RAM and NFS. - - Serial Download Echo Mode: CONFIG_LOADS_ECHO If defined to 1, all characters received during a @@ -659,50 +638,7 @@ The following options need to be configured: which adds regex support to some commands, as for example "env grep" and "setexpr". -- Device tree: - CONFIG_OF_CONTROL - If this variable is defined, U-Boot will use a device tree - to configure its devices, instead of relying on statically - compiled #defines in the board file. This option is - experimental and only available on a few boards. The device - tree is available in the global data as gd->fdt_blob. - - U-Boot needs to get its device tree from somewhere. This can - be done using one of the three options below: - - CONFIG_OF_SEPARATE - If this variable is defined, U-Boot will build a device tree - binary. It will be called u-boot.dtb. Architecture-specific - code will locate it at run-time. Generally this works by: - - cat u-boot.bin u-boot.dtb >image.bin - - and in fact, U-Boot does this for you, creating a file called - u-boot-dtb.bin which is useful in the common case. You can - still use the individual files if you need something more - exotic. - - CONFIG_OF_BOARD - If this variable is defined, U-Boot will use the device tree - provided by the board at runtime instead of embedding one with - the image. Only boards defining board_fdt_blob_setup() support - this option (see include/fdtdec.h file). - - Watchdog: - CONFIG_WATCHDOG - If this variable is defined, it enables watchdog - support for the SoC. There must be support in the SoC - specific code for a watchdog. For the 8xx - CPUs, the SIU Watchdog feature is enabled in the SYPCR - register. When supported for a specific SoC is - available, then no further board specific code should - be needed to use it. - - CONFIG_HW_WATCHDOG - When using a watchdog circuitry external to the used - SoC, then define this variable and provide board - specific code for the "hw_watchdog_reset" function. - CONFIG_SYS_WATCHDOG_FREQ Some platforms automatically call WATCHDOG_RESET() from the timer interrupt handler every @@ -785,9 +721,6 @@ The following options need to be configured: least one non-MTD partition type as well. - IDE Reset method: - CONFIG_IDE_RESET_ROUTINE - this is defined in several - board configurations files but used nowhere! - CONFIG_IDE_RESET - is this is defined, IDE Reset will be performed by calling the function ide_set_reset(int reset) @@ -1066,9 +999,6 @@ The following options need to be configured: sending again an USB request to the device. - Journaling Flash filesystem support: - CONFIG_JFFS2_NAND - Define these for a default partition on a NAND device - CONFIG_SYS_JFFS2_FIRST_SECTOR, CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS Define these for a default partition on a NOR device @@ -1076,14 +1006,6 @@ The following options need to be configured: - Keyboard Support: See Kconfig help for available keyboard drivers. - CONFIG_KEYBOARD - - Define this to enable a custom keyboard support. - This simply calls drv_keyboard_init() which must be - defined in your board-specific files. This option is deprecated - and is only used by novena. For new boards, use driver model - instead. - - Video support: CONFIG_FSL_DIU_FB Enable the Freescale DIU video driver. Reference boards for @@ -1095,7 +1017,6 @@ The following options need to be configured: CONFIG_CFB_CONSOLE CONFIG_VIDEO_SW_CURSOR CONFIG_VGA_AS_SINGLE_DEVICE - CONFIG_VIDEO_LOGO CONFIG_VIDEO_BMP_LOGO The DIU driver will look for the 'video-mode' environment @@ -1573,16 +1494,6 @@ The following options need to be configured: SPI EEPROM, also an instance works with Crystal A/D and D/As on the SACSng board) - CONFIG_SOFT_SPI - - Enables a software (bit-bang) SPI driver rather than - using hardware support. This is a general purpose - driver that only requires three general I/O port pins - (two outputs, one input) to function. If this is - defined, the board configuration must define several - SPI configuration items (port pins to use, etc). For - an example, see include/configs/sacsng.h. - CONFIG_SYS_SPI_MXC_WAIT Timeout for waiting until spi transfer completed. default: (CONFIG_SYS_HZ/100) /* 10 ms */ @@ -1648,13 +1559,6 @@ The following options need to be configured: Time to wait after FPGA configuration. The default is 200 ms. -- Configuration Management: - - CONFIG_IDENT_STRING - - If defined, this string will be added to the U-Boot - version information (U_BOOT_VERSION) - - Vendor Parameter Protection: U-Boot considers the values of the environment @@ -1716,14 +1620,6 @@ The following options need to be configured: HERMES, IP860, RPXlite, LWMON, FLAGADM -- Access to physical memory region (> 4GB) - Some basic support is provided for operations on memory not - normally accessible to U-Boot - e.g. some architectures - support access to more than 4GB of memory on 32-bit - machines using physical address extension or similar. - Define CONFIG_PHYSMEM to access this basic support, which - currently only supports clearing the memory. - - Error Recovery: CONFIG_NET_RETRY_COUNT @@ -1983,10 +1879,6 @@ The following options need to be configured: CONFIG_SPL_INIT_MINIMAL Arch init code should be built for a very small image - CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION - Partition on the MMC to load U-Boot from when the MMC is being - used in raw mode - CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR Sector to load kernel uImage from when MMC is being used in raw mode (for Falcon mode) @@ -2567,17 +2459,6 @@ Low Level (hardware related) configuration options: - CONFIG_SYS_MAMR_PTA: periodic timer for refresh -- FLASH_BASE0_PRELIM, FLASH_BASE1_PRELIM, CONFIG_SYS_REMAP_OR_AM, - CONFIG_SYS_PRELIM_OR_AM, CONFIG_SYS_OR_TIMING_FLASH, CONFIG_SYS_OR0_REMAP, - CONFIG_SYS_OR0_PRELIM, CONFIG_SYS_BR0_PRELIM, CONFIG_SYS_OR1_REMAP, CONFIG_SYS_OR1_PRELIM, - CONFIG_SYS_BR1_PRELIM: - Memory Controller Definitions: BR0/1 and OR0/1 (FLASH) - -- SDRAM_BASE2_PRELIM, SDRAM_BASE3_PRELIM, SDRAM_MAX_SIZE, - CONFIG_SYS_OR_TIMING_SDRAM, CONFIG_SYS_OR2_PRELIM, CONFIG_SYS_BR2_PRELIM, - CONFIG_SYS_OR3_PRELIM, CONFIG_SYS_BR3_PRELIM: - Memory Controller Definitions: BR2/3 and OR2/3 (SDRAM) - - CONFIG_SYS_SRIO: Chip has SRIO or not @@ -2966,334 +2847,6 @@ TODO. For now: just type "help ". -Environment Variables: -====================== - -U-Boot supports user configuration using Environment Variables which -can be made persistent by saving to Flash memory. - -Environment Variables are set using "setenv", printed using -"printenv", and saved to Flash using "saveenv". Using "setenv" -without a value can be used to delete a variable from the -environment. As long as you don't save the environment you are -working with an in-memory copy. In case the Flash area containing the -environment is erased by accident, a default environment is provided. - -Some configuration options can be set using Environment Variables. - -List of environment variables (most likely not complete): - - baudrate - see CONFIG_BAUDRATE - - bootdelay - see CONFIG_BOOTDELAY - - bootcmd - see CONFIG_BOOTCOMMAND - - bootargs - Boot arguments when booting an RTOS image - - bootfile - Name of the image to load with TFTP - - bootm_low - Memory range available for image processing in the bootm - command can be restricted. This variable is given as - a hexadecimal number and defines lowest address allowed - for use by the bootm command. See also "bootm_size" - environment variable. Address defined by "bootm_low" is - also the base of the initial memory mapping for the Linux - kernel -- see the description of CONFIG_SYS_BOOTMAPSZ and - bootm_mapsize. - - bootm_mapsize - Size of the initial memory mapping for the Linux kernel. - This variable is given as a hexadecimal number and it - defines the size of the memory region starting at base - address bootm_low that is accessible by the Linux kernel - during early boot. If unset, CONFIG_SYS_BOOTMAPSZ is used - as the default value if it is defined, and bootm_size is - used otherwise. - - bootm_size - Memory range available for image processing in the bootm - command can be restricted. This variable is given as - a hexadecimal number and defines the size of the region - allowed for use by the bootm command. See also "bootm_low" - environment variable. - - bootstopkeysha256, bootdelaykey, bootstopkey - See README.autoboot - - updatefile - Location of the software update file on a TFTP server, used - by the automatic software update feature. Please refer to - documentation in doc/README.update for more details. - - autoload - if set to "no" (any string beginning with 'n'), - "bootp" will just load perform a lookup of the - configuration from the BOOTP server, but not try to - load any image using TFTP - - autostart - if set to "yes", an image loaded using the "bootp", - "rarpboot", "tftpboot" or "diskboot" commands will - be automatically started (by internally calling - "bootm") - - If set to "no", a standalone image passed to the - "bootm" command will be copied to the load address - (and eventually uncompressed), but NOT be started. - This can be used to load and uncompress arbitrary - data. - - fdt_high - if set this restricts the maximum address that the - flattened device tree will be copied into upon boot. - For example, if you have a system with 1 GB memory - at physical address 0x10000000, while Linux kernel - only recognizes the first 704 MB as low memory, you - may need to set fdt_high as 0x3C000000 to have the - device tree blob be copied to the maximum address - of the 704 MB low memory, so that Linux kernel can - access it during the boot procedure. - - If this is set to the special value 0xFFFFFFFF then - the fdt will not be copied at all on boot. For this - to work it must reside in writable memory, have - sufficient padding on the end of it for u-boot to - add the information it needs into it, and the memory - must be accessible by the kernel. - - fdtcontroladdr- if set this is the address of the control flattened - device tree used by U-Boot when CONFIG_OF_CONTROL is - defined. - - i2cfast - (PPC405GP|PPC405EP only) - if set to 'y' configures Linux I2C driver for fast - mode (400kHZ). This environment variable is used in - initialization code. So, for changes to be effective - it must be saved and board must be reset. - - initrd_high - restrict positioning of initrd images: - If this variable is not set, initrd images will be - copied to the highest possible address in RAM; this - is usually what you want since it allows for - maximum initrd size. If for some reason you want to - make sure that the initrd image is loaded below the - CONFIG_SYS_BOOTMAPSZ limit, you can set this environment - variable to a value of "no" or "off" or "0". - Alternatively, you can set it to a maximum upper - address to use (U-Boot will still check that it - does not overwrite the U-Boot stack and data). - - For instance, when you have a system with 16 MB - RAM, and want to reserve 4 MB from use by Linux, - you can do this by adding "mem=12M" to the value of - the "bootargs" variable. However, now you must make - sure that the initrd image is placed in the first - 12 MB as well - this can be done with - - setenv initrd_high 00c00000 - - If you set initrd_high to 0xFFFFFFFF, this is an - indication to U-Boot that all addresses are legal - for the Linux kernel, including addresses in flash - memory. In this case U-Boot will NOT COPY the - ramdisk at all. This may be useful to reduce the - boot time on your system, but requires that this - feature is supported by your Linux kernel. - - ipaddr - IP address; needed for tftpboot command - - loadaddr - Default load address for commands like "bootp", - "rarpboot", "tftpboot", "loadb" or "diskboot" - - loads_echo - see CONFIG_LOADS_ECHO - - serverip - TFTP server IP address; needed for tftpboot command - - bootretry - see CONFIG_BOOT_RETRY_TIME - - bootdelaykey - see CONFIG_AUTOBOOT_DELAY_STR - - bootstopkey - see CONFIG_AUTOBOOT_STOP_STR - - ethprime - controls which interface is used first. - - ethact - controls which interface is currently active. - For example you can do the following - - => setenv ethact FEC - => ping 192.168.0.1 # traffic sent on FEC - => setenv ethact SCC - => ping 10.0.0.1 # traffic sent on SCC - - ethrotate - When set to "no" U-Boot does not go through all - available network interfaces. - It just stays at the currently selected interface. - - netretry - When set to "no" each network operation will - either succeed or fail without retrying. - When set to "once" the network operation will - fail when all the available network interfaces - are tried once without success. - Useful on scripts which control the retry operation - themselves. - - npe_ucode - set load address for the NPE microcode - - silent_linux - If set then Linux will be told to boot silently, by - changing the console to be empty. If "yes" it will be - made silent. If "no" it will not be made silent. If - unset, then it will be made silent if the U-Boot console - is silent. - - tftpsrcp - If this is set, the value is used for TFTP's - UDP source port. - - tftpdstp - If this is set, the value is used for TFTP's UDP - destination port instead of the Well Know Port 69. - - tftpblocksize - Block size to use for TFTP transfers; if not set, - we use the TFTP server's default block size - - tftptimeout - Retransmission timeout for TFTP packets (in milli- - seconds, minimum value is 1000 = 1 second). Defines - when a packet is considered to be lost so it has to - be retransmitted. The default is 5000 = 5 seconds. - Lowering this value may make downloads succeed - faster in networks with high packet loss rates or - with unreliable TFTP servers. - - tftptimeoutcountmax - maximum count of TFTP timeouts (no - unit, minimum value = 0). Defines how many timeouts - can happen during a single file transfer before that - transfer is aborted. The default is 10, and 0 means - 'no timeouts allowed'. Increasing this value may help - downloads succeed with high packet loss rates, or with - unreliable TFTP servers or client hardware. - - tftpwindowsize - if this is set, the value is used for TFTP's - window size as described by RFC 7440. - This means the count of blocks we can receive before - sending ack to server. - - vlan - When set to a value < 4095 the traffic over - Ethernet is encapsulated/received over 802.1q - VLAN tagged frames. - - bootpretryperiod - Period during which BOOTP/DHCP sends retries. - Unsigned value, in milliseconds. If not set, the period will - be either the default (28000), or a value based on - CONFIG_NET_RETRY_COUNT, if defined. This value has - precedence over the valu based on CONFIG_NET_RETRY_COUNT. - - memmatches - Number of matches found by the last 'ms' command, in hex - - memaddr - Address of the last match found by the 'ms' command, in hex, - or 0 if none - - mempos - Index position of the last match found by the 'ms' command, - in units of the size (.b, .w, .l) of the search - - zbootbase - (x86 only) Base address of the bzImage 'setup' block - - zbootaddr - (x86 only) Address of the loaded bzImage, typically - BZIMAGE_LOAD_ADDR which is 0x100000 - -The following image location variables contain the location of images -used in booting. The "Image" column gives the role of the image and is -not an environment variable name. The other columns are environment -variable names. "File Name" gives the name of the file on a TFTP -server, "RAM Address" gives the location in RAM the image will be -loaded to, and "Flash Location" gives the image's address in NOR -flash or offset in NAND flash. - -*Note* - these variables don't have to be defined for all boards, some -boards currently use other variables for these purposes, and some -boards use these variables for other purposes. - -Image File Name RAM Address Flash Location ------ --------- ----------- -------------- -u-boot u-boot u-boot_addr_r u-boot_addr -Linux kernel bootfile kernel_addr_r kernel_addr -device tree blob fdtfile fdt_addr_r fdt_addr -ramdisk ramdiskfile ramdisk_addr_r ramdisk_addr - -The following environment variables may be used and automatically -updated by the network boot commands ("bootp" and "rarpboot"), -depending the information provided by your boot server: - - bootfile - see above - dnsip - IP address of your Domain Name Server - dnsip2 - IP address of your secondary Domain Name Server - gatewayip - IP address of the Gateway (Router) to use - hostname - Target hostname - ipaddr - see above - netmask - Subnet Mask - rootpath - Pathname of the root filesystem on the NFS server - serverip - see above - - -There are two special Environment Variables: - - serial# - contains hardware identification information such - as type string and/or serial number - ethaddr - Ethernet address - -These variables can be set only once (usually during manufacturing of -the board). U-Boot refuses to delete or overwrite these variables -once they have been set once. - - -Further special Environment Variables: - - ver - Contains the U-Boot version string as printed - with the "version" command. This variable is - readonly (see CONFIG_VERSION_VARIABLE). - - -Please note that changes to some configuration parameters may take -only effect after the next boot (yes, that's just like Windoze :-). - - -Callback functions for environment variables: ---------------------------------------------- - -For some environment variables, the behavior of u-boot needs to change -when their values are changed. This functionality allows functions to -be associated with arbitrary variables. On creation, overwrite, or -deletion, the callback will provide the opportunity for some side -effect to happen or for the change to be rejected. - -The callbacks are named and associated with a function using the -U_BOOT_ENV_CALLBACK macro in your board or driver code. - -These callbacks are associated with variables in one of two ways. The -static list can be added to by defining CONFIG_ENV_CALLBACK_LIST_STATIC -in the board configuration to a string that defines a list of -associations. The list must be in the following format: - - entry = variable_name[:callback_name] - list = entry[,list] - -If the callback name is not specified, then the callback is deleted. -Spaces are also allowed anywhere in the list. - -Callbacks can also be associated by defining the ".callbacks" variable -with the same list format above. Any association in ".callbacks" will -override any association in the static list. You can define -CONFIG_ENV_CALLBACK_LIST_DEFAULT to a list (string) to define the -".callbacks" environment variable in the default or embedded environment. - -If CONFIG_REGEX is defined, the variable_name above is evaluated as a -regular expression. This allows multiple variables to be connected to -the same callback without explicitly listing them all out. - -The signature of the callback functions is: - - int callback(const char *name, const char *value, enum env_op op, int flags) - -* name - changed environment variable -* value - new value of the environment variable -* op - operation (create, overwrite, or delete) -* flags - attributes of the environment variable change, see flags H_* in - include/search.h - -The return value is 0 if the variable change is accepted and 1 otherwise. - - Note for Redundant Ethernet Interfaces: ======================================= diff --git a/arch/Kconfig b/arch/Kconfig index 3e2cc84ab2c45d33f456b9e5ac12bc791219c805..ee32e8366e88b6c378520e5163cf339d2b56d5b5 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -1,3 +1,7 @@ +config ARCH_MAP_SYSMEM + depends on SANDBOX || NDS32 + def_bool y + config CREATE_ARCH_SYMLINK bool @@ -194,6 +198,8 @@ config SANDBOX imply PHY_FIXED imply DM_DSA imply CMD_EXTENSION + imply KEYBOARD + imply PHYSMEM config SH bool "SuperH architecture" @@ -245,6 +251,7 @@ config X86 imply USB_ETHER_SMSC95XX imply USB_HOST_ETHER imply PCH + imply PHYSMEM imply RTC_MC146818 imply ACPIGEN if !QEMU imply SYSINFO if GENERATE_SMBIOS_TABLE @@ -350,6 +357,18 @@ config SYS_DISABLE_DCACHE_OPS Note that, its up to the individual architectures to implement this functionality. +config SYS_IMMR + hex + depends on PPC || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A + default 0xFF000000 if MPC8xx + default 0xF0000000 if ARCH_MPC8313 + default 0xE0000000 if MPC83xx && !ARCH_MPC8313 + default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3 + default SYS_CCSRBAR_DEFAULT + help + Address for the Internal Memory-Mapped Registers (IMMR) window used + to configure the features of many Freescale / NXP SoCs. + config SKIP_LOWLEVEL_INIT bool "Skip the calls to certain low level initialization functions" depends on ARM || NDS32 || MIPS || RISCV diff --git a/arch/arc/lib/cpu.c b/arch/arc/lib/cpu.c index 07f57878ef14c792f5932159ed960d8d0d5ecc29..6b215206a2728d4821d7e82b520b8f4f64e201fa 100644 --- a/arch/arc/lib/cpu.c +++ b/arch/arc/lib/cpu.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -18,7 +19,7 @@ int arch_cpu_init(void) { timer_init(); - gd->cpu_clk = CONFIG_SYS_CLK_FREQ; + gd->cpu_clk = get_board_sys_clk(); gd->ram_size = CONFIG_SYS_SDRAM_SIZE; cache_init(); diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f7f03837feb4800c1caa568b0ba445ae81e1e413..7264d72bde99b8c45ec4e3ca27d02103194c0d05 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -311,6 +311,10 @@ config CPU_PXA select SYS_CACHE_SHIFT_5 imply SYS_ARM_MMU +config CPU_PXA27X + bool + select CPU_PXA + config CPU_SA1100 bool select SYS_CACHE_SHIFT_5 @@ -635,6 +639,7 @@ config ARCH_BCMSTB select GPIO_EXTRA_HEADER select OF_CONTROL imply CMD_DM + imply OF_HAS_PRIOR_STAGE help This enables support for Broadcom ARM-based set-top box chipsets, including the 7445 family of chips. @@ -707,12 +712,12 @@ config ARCH_HIGHBANK select DM select DM_SERIAL select OF_CONTROL - select OF_BOARD select CLK select CLK_CCF select AHCI select DM_ETH select PHYS_64BIT + imply OF_HAS_PRIOR_STAGE config ARCH_INTEGRATOR bool "ARM Ltd. Integrator family" @@ -927,6 +932,7 @@ config ARCH_APPLE select CLK select CMD_USB select DM + select DM_GPIO select DM_KEYBOARD select DM_SERIAL select DM_USB @@ -934,12 +940,13 @@ config ARCH_APPLE select IOMMU select LINUX_KERNEL_IMAGE_HEADER select OF_CONTROL - select OF_BOARD + select PINCTRL select POSITION_INDEPENDENT select USB imply CMD_DM imply CMD_GPT imply DISTRO_DEFAULTS + imply OF_HAS_PRIOR_STAGE config ARCH_OWL bool "Actions Semi OWL SoCs" @@ -964,6 +971,7 @@ config ARCH_QEMU imply DM_RNG imply DM_RTC imply RTC_PL031 + imply OF_HAS_PRIOR_STAGE config ARCH_RMOBILE bool "Renesas ARM SoCs" @@ -1241,7 +1249,6 @@ config TARGET_VEXPRESS64_JUNO select PL01X_SERIAL select DM select OF_CONTROL - select OF_BOARD select CLK select DM_SERIAL select ARM_PSCI_FW @@ -1249,6 +1256,7 @@ config TARGET_VEXPRESS64_JUNO select DM_ETH select BLK select USB + imply OF_HAS_PRIOR_STAGE config TARGET_TOTAL_COMPUTE bool "Support Total Compute Platform" @@ -1763,7 +1771,7 @@ config TARGET_SL28 config TARGET_COLIBRI_PXA270 bool "Support colibri_pxa270" - select CPU_PXA + select CPU_PXA27X select GPIO_EXTRA_HEADER config ARCH_UNIPHIER @@ -1905,6 +1913,8 @@ config ARCH_OCTEONTX select OF_LIVE select BOARD_LATE_INIT select SYS_CACHE_SHIFT_7 + select SYS_PCI_64BIT if PCI + imply OF_HAS_PRIOR_STAGE config ARCH_OCTEONTX2 bool "Support OcteonTX2 SoCs" @@ -1916,6 +1926,8 @@ config ARCH_OCTEONTX2 select OF_LIVE select BOARD_LATE_INIT select SYS_CACHE_SHIFT_7 + select SYS_PCI_64BIT if PCI + imply OF_HAS_PRIOR_STAGE config TARGET_THUNDERX_88XX bool "Support ThunderX 88xx" @@ -1952,6 +1964,8 @@ config TARGET_XENGUEST_ARM64 select LINUX_KERNEL_IMAGE_HEADER select XEN_SERIAL select SSCANF + imply OF_HAS_PRIOR_STAGE + endchoice config SUPPORT_PASSING_ATAGS @@ -2038,6 +2052,14 @@ config ISW_ENTRY_ADDR image headers. endif +config SYS_KWD_CONFIG + string "kwbimage config file path" + depends on ARCH_KIRKWOOD || ARCH_MVEBU + default "arch/arm/mach-mvebu/kwbimage.cfg" + help + Path within the source directory to the kwbimage.cfg file to use + when packaging the U-Boot image for use. + source "arch/arm/mach-apple/Kconfig" source "arch/arm/mach-aspeed/Kconfig" diff --git a/arch/arm/cpu/arm920t/ep93xx/speed.c b/arch/arm/cpu/arm920t/ep93xx/speed.c index 51e9dda0550d8ca804dd6c641c3bd1481fd258e8..8dd3904e82c8ad123fd931a8039e47b9a5bd73b6 100644 --- a/arch/arm/cpu/arm920t/ep93xx/speed.c +++ b/arch/arm/cpu/arm920t/ep93xx/speed.c @@ -6,12 +6,13 @@ */ #include +#include #include #include #include /* - * CONFIG_SYS_CLK_FREQ should be defined as the input frequency of the PLL. + * get_board_sys_clk() should be defined as the input frequency of the PLL. * * get_FCLK(), get_HCLK(), get_PCLK() and get_UCLK() return the clock of * the specified bus in HZ. @@ -20,14 +21,14 @@ /* * return the PLL output frequency * - * PLL rate = CONFIG_SYS_CLK_FREQ * (X1FBD + 1) * (X2FBD + 1) + * PLL rate = get_board_sys_clk() * (X1FBD + 1) * (X2FBD + 1) * / (X2IPD + 1) / 2^PS */ static ulong get_PLLCLK(uint32_t *pllreg) { uint8_t i; const uint32_t clkset = readl(pllreg); - uint64_t rate = CONFIG_SYS_CLK_FREQ; + uint64_t rate = get_board_sys_clk(); rate *= ((clkset >> SYSCON_CLKSET_PLL_X1FBD1_SHIFT) & 0x1f) + 1; rate *= ((clkset >> SYSCON_CLKSET_PLL_X2FBD2_SHIFT) & 0x3f) + 1; do_div(rate, (clkset & 0x1f) + 1); /* X2IPD */ @@ -87,9 +88,9 @@ ulong get_UCLK(void) const uint32_t value = readl(&syscon->pwrcnt); if (value & SYSCON_PWRCNT_UART_BAUD) - uclk_rate = CONFIG_SYS_CLK_FREQ; + uclk_rate = get_board_sys_clk(); else - uclk_rate = CONFIG_SYS_CLK_FREQ / 2; + uclk_rate = get_board_sys_clk() / 2; return uclk_rate; } diff --git a/arch/arm/cpu/arm920t/imx/speed.c b/arch/arm/cpu/arm920t/imx/speed.c index eff611319d567b2091f7ddb1e0969aebcc89434d..c19206ac39a72ef98c02ce5806c7e42d7e02d8ab 100644 --- a/arch/arm/cpu/arm920t/imx/speed.c +++ b/arch/arm/cpu/arm920t/imx/speed.c @@ -7,13 +7,14 @@ #include #if defined (CONFIG_IMX) +#include #include /* ------------------------------------------------------------------------- */ /* NOTE: This describes the proper use of this file. * - * CONFIG_SYS_CLK_FREQ should be defined as the input frequency of the PLL. + * get_board_sys_clk() should be defined as the input frequency of the PLL. * SH FIXME: 16780000 in our case * get_FCLK(), get_HCLK(), get_PCLK() and get_UCLK() return the clock of * the specified bus in HZ. @@ -45,7 +46,7 @@ ulong get_mcuPLLCLK(void) mfi = mfi<=5 ? 5 : mfi; - return (2*(CONFIG_SYS_CLK_FREQ>>10)*( (mfi<<10) + (mfn<<10)/(mfd+1)))/(pd+1); + return (2*(get_board_sys_clk()>>10)*( (mfi<<10) + (mfn<<10)/(mfd+1)))/(pd+1); } ulong get_FCLK(void) diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig index f919d02db428cadc96801c0568e90f2b85e2c3aa..6a948d7ba7f4233a65357c53fa0d8a1c34086f74 100644 --- a/arch/arm/cpu/armv7/ls102xa/Kconfig +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig @@ -1,5 +1,6 @@ config ARCH_LS1021A bool + select FSL_IFC if !QSPI_BOOT && !SD_BOOT_QSPI select SYS_FSL_DDR_BE if SYS_FSL_DDR select SYS_FSL_DDR_VER_50 if SYS_FSL_DDR select SYS_FSL_ERRATUM_A008378 diff --git a/arch/arm/cpu/armv7/ls102xa/clock.c b/arch/arm/cpu/armv7/ls102xa/clock.c index 984ae8b87bd6c3cbcc5049a59ec29adb35c14bfd..c5e6118cba5da734219e1825960ec66f5448c6d8 100644 --- a/arch/arm/cpu/armv7/ls102xa/clock.c +++ b/arch/arm/cpu/armv7/ls102xa/clock.c @@ -39,7 +39,7 @@ void get_sys_info(struct sys_info *sys_info) uint i; uint freq_c_pll[CONFIG_SYS_FSL_NUM_CC_PLLS]; uint ratio[CONFIG_SYS_FSL_NUM_CC_PLLS]; - unsigned long sysclk = CONFIG_SYS_CLK_FREQ; + unsigned long sysclk = get_board_sys_clk(); sys_info->freq_systembus = sysclk; #if defined(CONFIG_DYNAMIC_DDR_CLK_FREQ) || defined(CONFIG_STATIC_DDR_CLK_FREQ) diff --git a/arch/arm/cpu/armv7/ls102xa/fdt.c b/arch/arm/cpu/armv7/ls102xa/fdt.c index 0daf8234fb1495bf9af8b7111706887e61e79185..e63a905eda189f706409c9578f8e19809849c314 100644 --- a/arch/arm/cpu/armv7/ls102xa/fdt.c +++ b/arch/arm/cpu/armv7/ls102xa/fdt.c @@ -131,9 +131,9 @@ void ft_cpu_setup(void *blob, struct bd_info *bd) sysclk_path = fdt_get_alias(blob, "sysclk"); if (sysclk_path) do_fixup_by_path_u32(blob, sysclk_path, "clock-frequency", - CONFIG_SYS_CLK_FREQ, 1); + get_board_sys_clk(), 1); do_fixup_by_compat_u32(blob, "fsl,qoriq-sysclk-2.0", - "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); + "clock-frequency", get_board_sys_clk(), 1); #if defined(CONFIG_DEEP_SLEEP) && defined(CONFIG_SD_BOOT) #define UBOOT_HEAD_LEN 0x1000 @@ -184,13 +184,13 @@ void ft_cpu_setup(void *blob, struct bd_info *bd) #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) off = fdt_node_offset_by_compat_reg(blob, FSL_IFC_COMPAT, CONFIG_SYS_IFC_ADDR); - fdt_set_node_status(blob, off, FDT_STATUS_DISABLED, 0); + fdt_set_node_status(blob, off, FDT_STATUS_DISABLED); #else off = fdt_node_offset_by_compat_reg(blob, FSL_QSPI_COMPAT, QSPI0_BASE_ADDR); - fdt_set_node_status(blob, off, FDT_STATUS_DISABLED, 0); + fdt_set_node_status(blob, off, FDT_STATUS_DISABLED); off = fdt_node_offset_by_compat_reg(blob, FSL_DSPI_COMPAT, DSPI1_BASE_ADDR); - fdt_set_node_status(blob, off, FDT_STATUS_DISABLED, 0); + fdt_set_node_status(blob, off, FDT_STATUS_DISABLED); #endif } diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 1a057f7059b72f554759a0c44a147fb0408fe332..da53afcea93dfc8e0933435fffe9e7ae30dadbb1 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -41,6 +41,7 @@ config ARCH_LS1028A select SYS_FSL_SEC_COMPAT_5 select SYS_FSL_SEC_LE select FSL_TZASC_1 + select FSL_TZPC_BP147 select ARCH_EARLY_INIT_R select BOARD_EARLY_INIT_F select SYS_I2C_MXC @@ -59,6 +60,7 @@ config ARCH_LS1043A bool select ARMV8_SET_SMPEN select ARM_ERRATA_855873 if !TFABOOT + select FSL_IFC if TFABOOT || (!QSPI_BOOT && !SD_BOOT_QSPI) select FSL_LAYERSCAPE select FSL_LSCH2 select GICV2 @@ -94,6 +96,7 @@ config ARCH_LS1043A config ARCH_LS1046A bool select ARMV8_SET_SMPEN + select FSL_IFC if TFABOOT || (!QSPI_BOOT && !SD_BOOT_QSPI) select FSL_LAYERSCAPE select FSL_LSCH2 select GICV2 @@ -134,6 +137,7 @@ config ARCH_LS1088A bool select ARMV8_SET_SMPEN select ARM_ERRATA_855873 if !TFABOOT + select FSL_IFC select FSL_LAYERSCAPE select FSL_LSCH3 select GICV3 @@ -182,6 +186,7 @@ config ARCH_LS2080A select ARM_ERRATA_828024 select ARM_ERRATA_829520 select ARM_ERRATA_833471 + select FSL_IFC select FSL_LAYERSCAPE select FSL_LSCH3 select GICV3 @@ -233,8 +238,11 @@ config ARCH_LS2080A config ARCH_LX2162A bool select ARMV8_SET_SMPEN + select FSL_DDR_BIST + select FSL_DDR_INTERACTIVE select FSL_LAYERSCAPE select FSL_LSCH3 + select FSL_TZPC_BP147 select GICV3 select NXP_LSCH3_2 select SYS_HAS_SERDES @@ -254,6 +262,7 @@ config ARCH_LX2162A select SYS_FSL_HAS_DDR4 select SYS_FSL_SEC_COMPAT_5 select SYS_FSL_SEC_LE + select SYS_PCI_64BIT if PCI select ARCH_EARLY_INIT_R select BOARD_EARLY_INIT_F select SYS_I2C_MXC @@ -267,8 +276,11 @@ config ARCH_LX2162A config ARCH_LX2160A bool select ARMV8_SET_SMPEN + select FSL_DDR_BIST + select FSL_DDR_INTERACTIVE select FSL_LAYERSCAPE select FSL_LSCH3 + select FSL_TZPC_BP147 select GICV3 select HAS_FSL_XHCI_USB if USB_HOST select NXP_LSCH3_2 @@ -290,6 +302,7 @@ config ARCH_LX2160A select SYS_FSL_HAS_DDR4 select SYS_FSL_SEC_COMPAT_5 select SYS_FSL_SEC_LE + select SYS_PCI_64BIT if PCI select ARCH_EARLY_INIT_R select BOARD_EARLY_INIT_F select SYS_I2C_MXC @@ -517,10 +530,6 @@ endmenu menu "Layerscape clock tree configuration" depends on FSL_LSCH2 || FSL_LSCH3 -config SYS_FSL_CLK - bool "Enable clock tree initialization" - default y - config CLUSTER_CLK_FREQ int "Reference clock of core cluster" depends on ARCH_LS1012A diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 1a359d060e82e53f78d788704832fdd6e968e1d2..2ded3e4efc902037a29321db69b41fb8be90b923 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c index 4ec0dbf516d397e351a7079a6d97ae0eef123488..4354aa251e16b7c55997c695e2f2795f680c6abd 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c @@ -161,7 +161,7 @@ void fsl_fdt_disable_usb(void *blob) * controller is used, SYSCLK must meet the additional requirement * of 100 MHz. */ - if (CONFIG_SYS_CLK_FREQ != 100000000) { + if (get_board_sys_clk() != 100000000) { off = fdt_node_offset_by_compatible(blob, -1, "snps,dwc3"); while (off != -FDT_ERR_NOTFOUND) { fdt_status_disabled(blob, off); @@ -655,7 +655,7 @@ void ft_cpu_setup(void *blob, struct bd_info *bd) #endif do_fixup_by_path_u32(blob, "/sysclk", "clock-frequency", - CONFIG_SYS_CLK_FREQ, 1); + get_board_sys_clk(), 1); #ifdef CONFIG_GIC_V3_ITS ls_gic_rd_tables_init(blob); diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c index 3f97c8aee4abf462f1eba775e493388eeccb69c5..570105a75ed1b87bde174a1a59fd4b2c059fef29 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c @@ -52,12 +52,12 @@ void get_sys_info(struct sys_info *sys_info) uint i, cluster; uint freq_c_pll[CONFIG_SYS_FSL_NUM_CC_PLLS]; uint ratio[CONFIG_SYS_FSL_NUM_CC_PLLS]; - unsigned long sysclk = CONFIG_SYS_CLK_FREQ; + unsigned long sysclk = get_board_sys_clk(); unsigned long cluster_clk; sys_info->freq_systembus = sysclk; #ifndef CONFIG_CLUSTER_CLK_FREQ -#define CONFIG_CLUSTER_CLK_FREQ CONFIG_SYS_CLK_FREQ +#define CONFIG_CLUSTER_CLK_FREQ get_board_sys_clk() #endif cluster_clk = CONFIG_CLUSTER_CLK_FREQ; diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c index 6f50cbad2ba94ac6ee2f3bb3df6225c69e71d051..1c04a5b5b7ea974caa54677c40de5a20a719b4a0 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c @@ -72,7 +72,7 @@ void get_sys_info(struct sys_info *sys_info) #endif uint freq_c_pll[CONFIG_SYS_FSL_NUM_CC_PLLS]; uint ratio[CONFIG_SYS_FSL_NUM_CC_PLLS]; - unsigned long sysclk = CONFIG_SYS_CLK_FREQ; + unsigned long sysclk = get_board_sys_clk(); int cc_group[12] = CONFIG_SYS_FSL_CLUSTER_CLOCKS; u32 c_pll_sel, cplx_pll; void *offset; diff --git a/arch/arm/cpu/armv8/fsl-layerscape/mp.c b/arch/arm/cpu/armv8/fsl-layerscape/mp.c index d28ab265335f183ce56a459042165a835371a700..2e2688eadca562be5e219bdf00b016f7640616a9 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/mp.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/mp.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c index 68111b6eff8cfdddf325af3f9b8c5f5938c79446..564cc27c8b28397bec6a8e4ef33074f9a6d29a6a 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c @@ -93,7 +93,9 @@ void board_init_f(ulong dummy) i2c_init_all(); #endif #endif -#ifdef CONFIG_VID +#if defined(CONFIG_VID) && (defined(CONFIG_ARCH_LS1088A) || \ + defined(CONFIG_ARCH_LX2160A) || \ + defined(CONFIG_ARCH_LX2162A)) init_func_vid(); #endif dram_init(); diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index b3e2a9c9d77b012eaf437a433f081b0e61bc8fd3..aeaec7136ffaaa00064b674d55e82da43dd62219 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -361,7 +361,8 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \ dtb-$(CONFIG_ARCH_VERSAL) += \ versal-mini.dtb \ versal-mini-emmc0.dtb \ - versal-mini-emmc1.dtb + versal-mini-emmc1.dtb \ + xilinx-versal-virt.dtb dtb-$(CONFIG_ARCH_ZYNQMP_R5) += \ zynqmp-r5.dtb dtb-$(CONFIG_AM33XX) += \ @@ -871,6 +872,8 @@ dtb-$(CONFIG_MX7) += imx7d-sdb.dtb \ dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-com.dtb \ imx7ulp-evk.dtb +dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb + dtb-$(CONFIG_ARCH_IMX8) += \ fsl-imx8qm-apalis.dtb \ fsl-imx8qm-mek.dtb \ @@ -1078,7 +1081,8 @@ dtb-$(CONFIG_ARCH_BCM283X) += \ bcm2837-rpi-3-a-plus.dtb \ bcm2837-rpi-3-b.dtb \ bcm2837-rpi-3-b-plus.dtb \ - bcm2837-rpi-cm3-io3.dtb + bcm2837-rpi-cm3-io3.dtb \ + bcm2711-rpi-4-b.dtb dtb-$(CONFIG_ARCH_BCM63158) += \ bcm963158.dtb @@ -1091,6 +1095,8 @@ dtb-$(CONFIG_ARCH_BCM6858) += \ dtb-$(CONFIG_TARGET_BCMNS3) += ns3-board.dtb +dtb-$(CONFIG_ARCH_BCMSTB) += bcm7xxx.dtb + dtb-$(CONFIG_ASPEED_AST2500) += ast2500-evb.dtb dtb-$(CONFIG_ASPEED_AST2600) += ast2600-evb.dtb @@ -1140,6 +1146,11 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ mt8516-pumpkin.dtb \ mt8518-ap1-emmc.dtb +dtb-$(CONFIG_XEN) += xenguest-arm64.dtb + +dtb-$(CONFIG_ARCH_OCTEONTX) += octeontx.dtb +dtb-$(CONFIG_ARCH_OCTEONTX2) += octeontx.dtb + dtb-$(CONFIG_TARGET_GE_BX50V3) += \ imx6q-bx50v3.dtb \ imx6q-b850v3.dtb \ @@ -1149,7 +1160,10 @@ dtb-$(CONFIG_TARGET_GE_BX50V3) += \ dtb-$(CONFIG_TARGET_GE_B1X5V2) += imx6dl-b1x5v2.dtb dtb-$(CONFIG_TARGET_MX53PPD) += imx53-ppd.dtb +# TODO(Linus Walleij ): Should us a single vexpress +# Kconfig option to build all of these. See examples above. dtb-$(CONFIG_TARGET_VEXPRESS_CA9X4) += vexpress-v2p-ca9.dtb +dtb-$(CONFIG_TARGET_VEXPRESS64_JUNO) += juno-r2.dtb dtb-$(CONFIG_TARGET_TOTAL_COMPUTE) += total_compute.dtb @@ -1163,6 +1177,8 @@ dtb-$(CONFIG_TARGET_IMX8MM_CL_IOT_GATE_OPTEE) += imx8mm-cl-iot-gate-optee.dtb dtb-$(CONFIG_TARGET_EA_LPC3250DEVKITV2) += lpc3250-ea3250.dtb +dtb-$(CONFIG_ARCH_QEMU) += qemu-arm.dtb qemu-arm64.dtb + targets += $(dtb-y) # Add any required device tree compiler flags here diff --git a/arch/arm/dts/armada-3720-espressobin.dts b/arch/arm/dts/armada-3720-espressobin.dts index cba6139be690ca9b9cc9cfd6c7136763311c2617..360d521bbada48fda7bdbca13c9abcb3cf4b4e11 100644 --- a/arch/arm/dts/armada-3720-espressobin.dts +++ b/arch/arm/dts/armada-3720-espressobin.dts @@ -80,24 +80,6 @@ }; }; -&comphy { - max-lanes = <3>; - phy0 { - phy-type = ; - phy-speed = ; - }; - - phy1 { - phy-type = ; - phy-speed = ; - }; - - phy2 { - phy-type = ; - phy-speed = ; - }; -}; - ð0 { status = "okay"; pinctrl-names = "default"; @@ -119,6 +101,7 @@ /* CON3 */ &sata { status = "okay"; + phys = <&comphy2 0>; }; &sdhci0 { @@ -200,6 +183,7 @@ /* CON31 */ &usb3 { status = "okay"; + phys = <&comphy0 0>; }; &pcie0 { @@ -207,4 +191,5 @@ pinctrl-0 = <&pcie_pins>; reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>; status = "okay"; + phys = <&comphy1 0>; }; diff --git a/arch/arm/dts/armada-3720-turris-mox.dts b/arch/arm/dts/armada-3720-turris-mox.dts index f47ced05c531b9211e08df8178e95ef122069c7a..d01757062fa5424444062330b23e4047cf339c0b 100644 --- a/arch/arm/dts/armada-3720-turris-mox.dts +++ b/arch/arm/dts/armada-3720-turris-mox.dts @@ -94,24 +94,6 @@ }; }; -&comphy { - max-lanes = <3>; - phy0 { - phy-type = ; - phy-speed = ; - }; - - phy1 { - phy-type = ; - phy-speed = ; - }; - - phy2 { - phy-type = ; - phy-speed = ; - }; -}; - ð0 { status = "okay"; pinctrl-names = "default"; @@ -120,6 +102,11 @@ phy = <ð_phy1>; }; +ð1 { + phy-mode = "2500base-x"; + phys = <&comphy0 1>; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins>; @@ -222,6 +209,7 @@ &usb3 { vbus-supply = <®_usb3_vbus>; status = "okay"; + phys = <&comphy2 0>; }; &pcie0 { @@ -229,4 +217,5 @@ pinctrl-0 = <&pcie_pins>; reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>; status = "disabled"; + phys = <&comphy1 0>; }; diff --git a/arch/arm/dts/armada-3720-uDPU.dts b/arch/arm/dts/armada-3720-uDPU.dts index 4bf6d2eac798b99302e057b42baa3ba951b84362..58557c680a4d14832b9fe033db34219415f2be09 100644 --- a/arch/arm/dts/armada-3720-uDPU.dts +++ b/arch/arm/dts/armada-3720-uDPU.dts @@ -106,36 +106,21 @@ }; }; -&comphy { - phy0 { - phy-type = ; - phy-speed = ; - }; - - phy1 { - phy-type = ; - phy-speed = ; - }; - - phy2 { - phy-type = ; - phy-speed = ; - }; -}; - ð0 { pinctrl-0 = <&pcie_pins>; status = "okay"; - phy-mode = "2500base-x"; + phy-mode = "sgmii"; managed = "in-band-status"; phy = <ðphy0>; + phys = <&comphy1 0>; }; ð1 { status = "okay"; - phy-mode = "2500base-x"; + phy-mode = "sgmii"; managed = "in-band-status"; phy = <ðphy1>; + phys = <&comphy0 1>; }; &i2c0 { diff --git a/arch/arm/dts/armada-37xx.dtsi b/arch/arm/dts/armada-37xx.dtsi index fec34609cf8282e3165425f0d4139afadec7f167..bef6ef03df6872d453498936828fd3d9de28c72a 100644 --- a/arch/arm/dts/armada-37xx.dtsi +++ b/arch/arm/dts/armada-37xx.dtsi @@ -316,9 +316,23 @@ compatible = "marvell,mvebu-comphy", "marvell,comphy-armada-3700"; reg = <0x18300 0x28>, <0x1f300 0x3d000>; - mux-bitcount = <4>; - mux-lane-order = <1 0 2>; - max-lanes = <3>; + #address-cells = <1>; + #size-cells = <0>; + + comphy0: phy@0 { + reg = <0>; + #phy-cells = <1>; + }; + + comphy1: phy@1 { + reg = <1>; + #phy-cells = <1>; + }; + + comphy2: phy@2 { + reg = <2>; + #phy-cells = <1>; + }; }; }; diff --git a/arch/arm/dts/armada-xp-theadorable.dts b/arch/arm/dts/armada-xp-theadorable.dts index 6a1df870ab56cac84a4a7ea9a5fa73ddde1ac5f5..24cc1cc5278edf59877d2e7f7d48e056ac3ab37f 100644 --- a/arch/arm/dts/armada-xp-theadorable.dts +++ b/arch/arm/dts/armada-xp-theadorable.dts @@ -71,6 +71,8 @@ spi0 = &spi0; spi1 = &spi1; ethernet0 = ð0; + i2c0 = &i2c0; + i2c1 = &i2c1; }; memory { @@ -156,6 +158,16 @@ }; }; +&i2c0 { + status = "okay"; + clock-frequency = <100000>; +}; + +&i2c1 { + status = "okay"; + clock-frequency = <100000>; +}; + &spi0 { status = "okay"; u-boot,dm-pre-reloc; diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts index 2abd31341c11055aa8debe01eec75aa7c52112a7..05362d19bdc053038d4a5766b658a843fb29dff0 100644 --- a/arch/arm/dts/ast2600-evb.dts +++ b/arch/arm/dts/ast2600-evb.dts @@ -177,3 +177,13 @@ 0x08 0x04 0x08 0x04>; }; + +&hace { + u-boot,dm-pre-reloc; + status = "okay"; +}; + +&acry { + u-boot,dm-pre-reloc; + status = "okay"; +}; diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi index f121f547e6d47bb5e3118a41cdb4b790c50d140b..31905fd2085d6daeefafa691e38501d71ea41f9e 100644 --- a/arch/arm/dts/ast2600.dtsi +++ b/arch/arm/dts/ast2600.dtsi @@ -187,6 +187,23 @@ }; }; + hace: hace@1e6d0000 { + compatible = "aspeed,ast2600-hace"; + reg = <0x1e6d0000 0x200>; + interrupts = ; + clocks = <&scu ASPEED_CLK_GATE_YCLK>; + status = "disabled"; + }; + + acry: acry@1e6fa000 { + compatible = "aspeed,ast2600-acry"; + reg = <0x1e6fa000 0x1000>, + <0x1e710000 0x10000>; + interrupts = ; + clocks = <&scu ASPEED_CLK_GATE_RSACLK>; + status = "disabled"; + }; + edac: sdram@1e6e0000 { compatible = "aspeed,ast2600-sdram-edac"; reg = <0x1e6e0000 0x174>; diff --git a/arch/arm/dts/bcm2711-rpi-4-b.dts b/arch/arm/dts/bcm2711-rpi-4-b.dts new file mode 100644 index 0000000000000000000000000000000000000000..72ce80fbf26626f45729b257914f2baab2078217 --- /dev/null +++ b/arch/arm/dts/bcm2711-rpi-4-b.dts @@ -0,0 +1,262 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; +#include "bcm2711.dtsi" +#include "bcm2711-rpi.dtsi" +#include "bcm283x-rpi-usb-peripheral.dtsi" + +/ { + compatible = "raspberrypi,4-model-b", "brcm,bcm2711"; + model = "Raspberry Pi 4 Model B"; + + chosen { + /* 8250 auxiliary UART instead of pl011 */ + stdout-path = "serial1:115200n8"; + }; + + leds { + led-act { + gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; + }; + + led-pwr { + label = "PWR"; + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; + default-state = "keep"; + linux,default-trigger = "default-on"; + }; + }; + + wifi_pwrseq: wifi-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>; + }; + + sd_io_1v8_reg: sd_io_1v8_reg { + compatible = "regulator-gpio"; + regulator-name = "vdd-sd-io"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + regulator-settling-time-us = <5000>; + gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>; + states = <1800000 0x1>, + <3300000 0x0>; + status = "okay"; + }; + + sd_vcc_reg: sd_vcc_reg { + compatible = "regulator-fixed"; + regulator-name = "vcc-sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + enable-active-high; + gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>; + }; +}; + +&ddc0 { + status = "okay"; +}; + +&ddc1 { + status = "okay"; +}; + +&expgpio { + gpio-line-names = "BT_ON", + "WL_ON", + "PWR_LED_OFF", + "GLOBAL_RESET", + "VDD_SD_IO_SEL", + "CAM_GPIO", + "SD_PWR_ON", + ""; +}; + +&gpio { + /* + * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and + * the official GPU firmware DT blob. + * + * Legend: + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "ID_SDA", + "ID_SCL", + "SDA1", + "SCL1", + "GPIO_GCLK", + "GPIO5", + "GPIO6", + "SPI_CE1_N", + "SPI_CE0_N", + "SPI_MISO", + "SPI_MOSI", + "SPI_SCLK", + "GPIO12", + "GPIO13", + /* Serial port */ + "TXD1", + "RXD1", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "RGMII_MDIO", + "RGMIO_MDC", + /* Used by BT module */ + "CTS0", + "RTS0", + "TXD0", + "RXD0", + /* Used by Wifi */ + "SD1_CLK", + "SD1_CMD", + "SD1_DATA0", + "SD1_DATA1", + "SD1_DATA2", + "SD1_DATA3", + /* Shared with SPI flash */ + "PWM0_MISO", + "PWM1_MOSI", + "STATUS_LED_G_CLK", + "SPIFLASH_CE_N", + "SDA0", + "SCL0", + "RGMII_RXCLK", + "RGMII_RXCTL", + "RGMII_RXD0", + "RGMII_RXD1", + "RGMII_RXD2", + "RGMII_RXD3", + "RGMII_TXCLK", + "RGMII_TXCTL", + "RGMII_TXD0", + "RGMII_TXD1", + "RGMII_TXD2", + "RGMII_TXD3"; +}; + +&hdmi0 { + status = "okay"; +}; + +&hdmi1 { + status = "okay"; +}; + +&pixelvalve0 { + status = "okay"; +}; + +&pixelvalve1 { + status = "okay"; +}; + +&pixelvalve2 { + status = "okay"; +}; + +&pixelvalve4 { + status = "okay"; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>; + status = "okay"; +}; + +/* SDHCI is used to control the SDIO for wireless */ +&sdhci { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_gpio34>; + bus-width = <4>; + non-removable; + mmc-pwrseq = <&wifi_pwrseq>; + status = "okay"; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +/* EMMC2 is used to drive the SD card */ +&emmc2 { + vqmmc-supply = <&sd_io_1v8_reg>; + vmmc-supply = <&sd_vcc_reg>; + broken-cd; + status = "okay"; +}; + +&genet { + phy-handle = <&phy1>; + phy-mode = "rgmii-rxid"; + status = "okay"; +}; + +&genet_mdio { + phy1: ethernet-phy@1 { + /* No PHY interrupt */ + reg = <0x1>; + }; +}; + +&pcie0 { + pci@0,0 { + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + reg = <0 0 0 0 0>; + + usb@0,0 { + reg = <0 0 0 0 0>; + resets = <&reset RASPBERRYPI_FIRMWARE_RESET_ID_USB>; + }; + }; +}; + +/* uart0 communicates with the BT module */ +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>; + uart-has-rtscts; + status = "okay"; + + bluetooth { + compatible = "brcm,bcm43438-bt"; + max-speed = <2000000>; + shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>; + }; +}; + +/* uart1 is mapped to the pin header */ +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_gpio14>; + status = "okay"; +}; + +&vc4 { + status = "okay"; +}; + +&vec { + status = "disabled"; +}; diff --git a/arch/arm/dts/bcm2711-rpi.dtsi b/arch/arm/dts/bcm2711-rpi.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..ca266c5d9f9bb24a3e116b41588433e88314ae26 --- /dev/null +++ b/arch/arm/dts/bcm2711-rpi.dtsi @@ -0,0 +1,74 @@ +// SPDX-License-Identifier: GPL-2.0 +#include "bcm2835-rpi.dtsi" + +#include + +/ { + /* Will be filled by the bootloader */ + memory@0 { + device_type = "memory"; + reg = <0 0 0>; + }; + + aliases { + emmc2bus = &emmc2bus; + ethernet0 = &genet; + pcie0 = &pcie0; + blconfig = &blconfig; + }; +}; + +&firmware { + firmware_clocks: clocks { + compatible = "raspberrypi,firmware-clocks"; + #clock-cells = <1>; + }; + + expgpio: gpio { + compatible = "raspberrypi,firmware-gpio"; + gpio-controller; + #gpio-cells = <2>; + status = "okay"; + }; + + reset: reset { + compatible = "raspberrypi,firmware-reset"; + #reset-cells = <1>; + }; +}; + +&hdmi0 { + clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>; + clock-names = "hdmi", "bvb", "audio", "cec"; + wifi-2.4ghz-coexistence; +}; + +&hdmi1 { + clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>; + clock-names = "hdmi", "bvb", "audio", "cec"; + wifi-2.4ghz-coexistence; +}; + +&hvs { + clocks = <&firmware_clocks 4>; +}; + +&rmem { + /* + * RPi4's co-processor will copy the board's bootloader configuration + * into memory for the OS to consume. It'll also update this node with + * its placement information. + */ + blconfig: nvram@0 { + compatible = "raspberrypi,bootloader-config", "nvmem-rmem"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x0 0x0 0x0>; + no-map; + status = "disabled"; + }; +}; + +&vchiq { + interrupts = ; +}; diff --git a/arch/arm/dts/bcm2711.dtsi b/arch/arm/dts/bcm2711.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..3b60297af7f60b09f4c625e121f7e2d938eb9b58 --- /dev/null +++ b/arch/arm/dts/bcm2711.dtsi @@ -0,0 +1,1100 @@ +// SPDX-License-Identifier: GPL-2.0 +#include "bcm283x.dtsi" + +#include +#include + +/ { + compatible = "brcm,bcm2711"; + + #address-cells = <2>; + #size-cells = <1>; + + interrupt-parent = <&gicv2>; + + vc4: gpu { + compatible = "brcm,bcm2711-vc5"; + status = "disabled"; + }; + + clk_27MHz: clk-27M { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <27000000>; + clock-output-names = "27MHz-clock"; + }; + + clk_108MHz: clk-108M { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <108000000>; + clock-output-names = "108MHz-clock"; + }; + + soc { + /* + * Defined ranges: + * Common BCM283x peripherals + * BCM2711-specific peripherals + * ARM-local peripherals + */ + ranges = <0x7e000000 0x0 0xfe000000 0x01800000>, + <0x7c000000 0x0 0xfc000000 0x02000000>, + <0x40000000 0x0 0xff800000 0x00800000>; + /* Emulate a contiguous 30-bit address range for DMA */ + dma-ranges = <0xc0000000 0x0 0x00000000 0x40000000>; + + /* + * This node is the provider for the enable-method for + * bringing up secondary cores. + */ + local_intc: local_intc@40000000 { + compatible = "brcm,bcm2836-l1-intc"; + reg = <0x40000000 0x100>; + }; + + gicv2: interrupt-controller@40041000 { + interrupt-controller; + #interrupt-cells = <3>; + compatible = "arm,gic-400"; + reg = <0x40041000 0x1000>, + <0x40042000 0x2000>, + <0x40044000 0x2000>, + <0x40046000 0x2000>; + interrupts = ; + }; + + avs_monitor: avs-monitor@7d5d2000 { + compatible = "brcm,bcm2711-avs-monitor", + "syscon", "simple-mfd"; + reg = <0x7d5d2000 0xf00>; + + thermal: thermal { + compatible = "brcm,bcm2711-thermal"; + #thermal-sensor-cells = <0>; + }; + }; + + dma: dma@7e007000 { + compatible = "brcm,bcm2835-dma"; + reg = <0x7e007000 0xb00>; + interrupts = , + , + , + , + , + , + , + /* DMA lite 7 - 10 */ + , + , + , + ; + interrupt-names = "dma0", + "dma1", + "dma2", + "dma3", + "dma4", + "dma5", + "dma6", + "dma7", + "dma8", + "dma9", + "dma10"; + #dma-cells = <1>; + brcm,dma-channel-mask = <0x07f5>; + }; + + pm: watchdog@7e100000 { + compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt"; + #power-domain-cells = <1>; + #reset-cells = <1>; + reg = <0x7e100000 0x114>, + <0x7e00a000 0x24>, + <0x7ec11000 0x20>; + clocks = <&clocks BCM2835_CLOCK_V3D>, + <&clocks BCM2835_CLOCK_PERI_IMAGE>, + <&clocks BCM2835_CLOCK_H264>, + <&clocks BCM2835_CLOCK_ISP>; + clock-names = "v3d", "peri_image", "h264", "isp"; + system-power-controller; + }; + + rng@7e104000 { + compatible = "brcm,bcm2711-rng200"; + reg = <0x7e104000 0x28>; + }; + + uart2: serial@7e201400 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x7e201400 0x200>; + interrupts = ; + clocks = <&clocks BCM2835_CLOCK_UART>, + <&clocks BCM2835_CLOCK_VPU>; + clock-names = "uartclk", "apb_pclk"; + arm,primecell-periphid = <0x00241011>; + status = "disabled"; + }; + + uart3: serial@7e201600 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x7e201600 0x200>; + interrupts = ; + clocks = <&clocks BCM2835_CLOCK_UART>, + <&clocks BCM2835_CLOCK_VPU>; + clock-names = "uartclk", "apb_pclk"; + arm,primecell-periphid = <0x00241011>; + status = "disabled"; + }; + + uart4: serial@7e201800 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x7e201800 0x200>; + interrupts = ; + clocks = <&clocks BCM2835_CLOCK_UART>, + <&clocks BCM2835_CLOCK_VPU>; + clock-names = "uartclk", "apb_pclk"; + arm,primecell-periphid = <0x00241011>; + status = "disabled"; + }; + + uart5: serial@7e201a00 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x7e201a00 0x200>; + interrupts = ; + clocks = <&clocks BCM2835_CLOCK_UART>, + <&clocks BCM2835_CLOCK_VPU>; + clock-names = "uartclk", "apb_pclk"; + arm,primecell-periphid = <0x00241011>; + status = "disabled"; + }; + + spi3: spi@7e204600 { + compatible = "brcm,bcm2835-spi"; + reg = <0x7e204600 0x0200>; + interrupts = ; + clocks = <&clocks BCM2835_CLOCK_VPU>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi4: spi@7e204800 { + compatible = "brcm,bcm2835-spi"; + reg = <0x7e204800 0x0200>; + interrupts = ; + clocks = <&clocks BCM2835_CLOCK_VPU>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi5: spi@7e204a00 { + compatible = "brcm,bcm2835-spi"; + reg = <0x7e204a00 0x0200>; + interrupts = ; + clocks = <&clocks BCM2835_CLOCK_VPU>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi6: spi@7e204c00 { + compatible = "brcm,bcm2835-spi"; + reg = <0x7e204c00 0x0200>; + interrupts = ; + clocks = <&clocks BCM2835_CLOCK_VPU>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c3: i2c@7e205600 { + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; + reg = <0x7e205600 0x200>; + interrupts = ; + clocks = <&clocks BCM2835_CLOCK_VPU>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c4: i2c@7e205800 { + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; + reg = <0x7e205800 0x200>; + interrupts = ; + clocks = <&clocks BCM2835_CLOCK_VPU>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c5: i2c@7e205a00 { + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; + reg = <0x7e205a00 0x200>; + interrupts = ; + clocks = <&clocks BCM2835_CLOCK_VPU>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c6: i2c@7e205c00 { + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; + reg = <0x7e205c00 0x200>; + interrupts = ; + clocks = <&clocks BCM2835_CLOCK_VPU>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + pixelvalve0: pixelvalve@7e206000 { + compatible = "brcm,bcm2711-pixelvalve0"; + reg = <0x7e206000 0x100>; + interrupts = ; + status = "disabled"; + }; + + pixelvalve1: pixelvalve@7e207000 { + compatible = "brcm,bcm2711-pixelvalve1"; + reg = <0x7e207000 0x100>; + interrupts = ; + status = "disabled"; + }; + + pixelvalve2: pixelvalve@7e20a000 { + compatible = "brcm,bcm2711-pixelvalve2"; + reg = <0x7e20a000 0x100>; + interrupts = ; + status = "disabled"; + }; + + pwm1: pwm@7e20c800 { + compatible = "brcm,bcm2835-pwm"; + reg = <0x7e20c800 0x28>; + clocks = <&clocks BCM2835_CLOCK_PWM>; + assigned-clocks = <&clocks BCM2835_CLOCK_PWM>; + assigned-clock-rates = <10000000>; + #pwm-cells = <2>; + status = "disabled"; + }; + + pixelvalve4: pixelvalve@7e216000 { + compatible = "brcm,bcm2711-pixelvalve4"; + reg = <0x7e216000 0x100>; + interrupts = ; + status = "disabled"; + }; + + hvs: hvs@7e400000 { + compatible = "brcm,bcm2711-hvs"; + interrupts = ; + }; + + pixelvalve3: pixelvalve@7ec12000 { + compatible = "brcm,bcm2711-pixelvalve3"; + reg = <0x7ec12000 0x100>; + interrupts = ; + status = "disabled"; + }; + + vec: vec@7ec13000 { + compatible = "brcm,bcm2711-vec"; + reg = <0x7ec13000 0x1000>; + clocks = <&clocks BCM2835_CLOCK_VEC>; + interrupts = ; + status = "disabled"; + }; + + dvp: clock@7ef00000 { + compatible = "brcm,brcm2711-dvp"; + reg = <0x7ef00000 0x10>; + clocks = <&clk_108MHz>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + aon_intr: interrupt-controller@7ef00100 { + compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc"; + reg = <0x7ef00100 0x30>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + }; + + hdmi0: hdmi@7ef00700 { + compatible = "brcm,bcm2711-hdmi0"; + reg = <0x7ef00700 0x300>, + <0x7ef00300 0x200>, + <0x7ef00f00 0x80>, + <0x7ef00f80 0x80>, + <0x7ef01b00 0x200>, + <0x7ef01f00 0x400>, + <0x7ef00200 0x80>, + <0x7ef04300 0x100>, + <0x7ef20000 0x100>; + reg-names = "hdmi", + "dvp", + "phy", + "rm", + "packet", + "metadata", + "csc", + "cec", + "hd"; + clock-names = "hdmi", "bvb", "audio", "cec"; + resets = <&dvp 0>; + interrupt-parent = <&aon_intr>; + interrupts = <0>, <1>, <2>, + <3>, <4>, <5>; + interrupt-names = "cec-tx", "cec-rx", "cec-low", + "wakeup", "hpd-connected", "hpd-removed"; + ddc = <&ddc0>; + dmas = <&dma 10>; + dma-names = "audio-rx"; + status = "disabled"; + }; + + ddc0: i2c@7ef04500 { + compatible = "brcm,bcm2711-hdmi-i2c"; + reg = <0x7ef04500 0x100>, <0x7ef00b00 0x300>; + reg-names = "bsc", "auto-i2c"; + clock-frequency = <97500>; + status = "disabled"; + }; + + hdmi1: hdmi@7ef05700 { + compatible = "brcm,bcm2711-hdmi1"; + reg = <0x7ef05700 0x300>, + <0x7ef05300 0x200>, + <0x7ef05f00 0x80>, + <0x7ef05f80 0x80>, + <0x7ef06b00 0x200>, + <0x7ef06f00 0x400>, + <0x7ef00280 0x80>, + <0x7ef09300 0x100>, + <0x7ef20000 0x100>; + reg-names = "hdmi", + "dvp", + "phy", + "rm", + "packet", + "metadata", + "csc", + "cec", + "hd"; + ddc = <&ddc1>; + clock-names = "hdmi", "bvb", "audio", "cec"; + resets = <&dvp 1>; + interrupt-parent = <&aon_intr>; + interrupts = <8>, <7>, <6>, + <9>, <10>, <11>; + interrupt-names = "cec-tx", "cec-rx", "cec-low", + "wakeup", "hpd-connected", "hpd-removed"; + dmas = <&dma 17>; + dma-names = "audio-rx"; + status = "disabled"; + }; + + ddc1: i2c@7ef09500 { + compatible = "brcm,bcm2711-hdmi-i2c"; + reg = <0x7ef09500 0x100>, <0x7ef05b00 0x300>; + reg-names = "bsc", "auto-i2c"; + clock-frequency = <97500>; + status = "disabled"; + }; + }; + + /* + * emmc2 has different DMA constraints based on SoC revisions. It was + * moved into its own bus, so as for RPi4's firmware to update them. + * The firmware will find whether the emmc2bus alias is defined, and if + * so, it'll edit the dma-ranges property below accordingly. + */ + emmc2bus: emmc2bus { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + + ranges = <0x0 0x7e000000 0x0 0xfe000000 0x01800000>; + dma-ranges = <0x0 0xc0000000 0x0 0x00000000 0x40000000>; + + emmc2: mmc@7e340000 { + compatible = "brcm,bcm2711-emmc2"; + reg = <0x0 0x7e340000 0x100>; + interrupts = ; + clocks = <&clocks BCM2711_CLOCK_EMMC2>; + status = "disabled"; + }; + }; + + arm-pmu { + compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3"; + interrupts = , + , + , + ; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + /* This only applies to the ARMv7 stub */ + arm,cpu-registers-not-fw-configured; + }; + + cpus: cpus { + #address-cells = <1>; + #size-cells = <0>; + enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x000000d8>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <1>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x000000e0>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <2>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x000000e8>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <3>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x000000f0>; + }; + }; + + scb { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + + ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>, + <0x6 0x00000000 0x6 0x00000000 0x40000000>; + + pcie0: pcie@7d500000 { + compatible = "brcm,bcm2711-pcie"; + reg = <0x0 0x7d500000 0x9310>; + device_type = "pci"; + #address-cells = <3>; + #interrupt-cells = <1>; + #size-cells = <2>; + interrupts = , + ; + interrupt-names = "pcie", "msi"; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 + IRQ_TYPE_LEVEL_HIGH>; + msi-controller; + msi-parent = <&pcie0>; + + ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 + 0x0 0x04000000>; + /* + * The wrapper around the PCIe block has a bug + * preventing it from accessing beyond the first 3GB of + * memory. + */ + dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 + 0x0 0xc0000000>; + brcm,enable-ssc; + }; + + genet: ethernet@7d580000 { + compatible = "brcm,bcm2711-genet-v5"; + reg = <0x0 0x7d580000 0x10000>; + #address-cells = <0x1>; + #size-cells = <0x1>; + interrupts = , + ; + status = "disabled"; + + genet_mdio: mdio@e14 { + compatible = "brcm,genet-mdio-v5"; + reg = <0xe14 0x8>; + reg-names = "mdio"; + #address-cells = <0x1>; + #size-cells = <0x0>; + }; + }; + }; +}; + +&clk_osc { + clock-frequency = <54000000>; +}; + +&clocks { + compatible = "brcm,bcm2711-cprman"; +}; + +&cpu_thermal { + coefficients = <(-487) 410040>; + thermal-sensors = <&thermal>; +}; + +&dsi0 { + interrupts = ; +}; + +&dsi1 { + interrupts = ; + compatible = "brcm,bcm2711-dsi1"; +}; + +&gpio { + compatible = "brcm,bcm2711-gpio"; + interrupts = , + , + , + ; + + gpclk0_gpio49: gpclk0_gpio49 { + pin-gpclk { + pins = "gpio49"; + function = "alt1"; + bias-disable; + }; + }; + gpclk1_gpio50: gpclk1_gpio50 { + pin-gpclk { + pins = "gpio50"; + function = "alt1"; + bias-disable; + }; + }; + gpclk2_gpio51: gpclk2_gpio51 { + pin-gpclk { + pins = "gpio51"; + function = "alt1"; + bias-disable; + }; + }; + + i2c0_gpio46: i2c0_gpio46 { + pin-sda { + function = "alt0"; + pins = "gpio46"; + bias-pull-up; + }; + pin-scl { + function = "alt0"; + pins = "gpio47"; + bias-disable; + }; + }; + i2c1_gpio46: i2c1_gpio46 { + pin-sda { + function = "alt1"; + pins = "gpio46"; + bias-pull-up; + }; + pin-scl { + function = "alt1"; + pins = "gpio47"; + bias-disable; + }; + }; + i2c3_gpio2: i2c3_gpio2 { + pin-sda { + function = "alt5"; + pins = "gpio2"; + bias-pull-up; + }; + pin-scl { + function = "alt5"; + pins = "gpio3"; + bias-disable; + }; + }; + i2c3_gpio4: i2c3_gpio4 { + pin-sda { + function = "alt5"; + pins = "gpio4"; + bias-pull-up; + }; + pin-scl { + function = "alt5"; + pins = "gpio5"; + bias-disable; + }; + }; + i2c4_gpio6: i2c4_gpio6 { + pin-sda { + function = "alt5"; + pins = "gpio6"; + bias-pull-up; + }; + pin-scl { + function = "alt5"; + pins = "gpio7"; + bias-disable; + }; + }; + i2c4_gpio8: i2c4_gpio8 { + pin-sda { + function = "alt5"; + pins = "gpio8"; + bias-pull-up; + }; + pin-scl { + function = "alt5"; + pins = "gpio9"; + bias-disable; + }; + }; + i2c5_gpio10: i2c5_gpio10 { + pin-sda { + function = "alt5"; + pins = "gpio10"; + bias-pull-up; + }; + pin-scl { + function = "alt5"; + pins = "gpio11"; + bias-disable; + }; + }; + i2c5_gpio12: i2c5_gpio12 { + pin-sda { + function = "alt5"; + pins = "gpio12"; + bias-pull-up; + }; + pin-scl { + function = "alt5"; + pins = "gpio13"; + bias-disable; + }; + }; + i2c6_gpio0: i2c6_gpio0 { + pin-sda { + function = "alt5"; + pins = "gpio0"; + bias-pull-up; + }; + pin-scl { + function = "alt5"; + pins = "gpio1"; + bias-disable; + }; + }; + i2c6_gpio22: i2c6_gpio22 { + pin-sda { + function = "alt5"; + pins = "gpio22"; + bias-pull-up; + }; + pin-scl { + function = "alt5"; + pins = "gpio23"; + bias-disable; + }; + }; + i2c_slave_gpio8: i2c_slave_gpio8 { + pins-i2c-slave { + pins = "gpio8", + "gpio9", + "gpio10", + "gpio11"; + function = "alt3"; + }; + }; + + jtag_gpio48: jtag_gpio48 { + pins-jtag { + pins = "gpio48", + "gpio49", + "gpio50", + "gpio51", + "gpio52", + "gpio53"; + function = "alt4"; + }; + }; + + mii_gpio28: mii_gpio28 { + pins-mii { + pins = "gpio28", + "gpio29", + "gpio30", + "gpio31"; + function = "alt4"; + }; + }; + mii_gpio36: mii_gpio36 { + pins-mii { + pins = "gpio36", + "gpio37", + "gpio38", + "gpio39"; + function = "alt5"; + }; + }; + + pcm_gpio50: pcm_gpio50 { + pins-pcm { + pins = "gpio50", + "gpio51", + "gpio52", + "gpio53"; + function = "alt2"; + }; + }; + + pwm0_0_gpio12: pwm0_0_gpio12 { + pin-pwm { + pins = "gpio12"; + function = "alt0"; + bias-disable; + }; + }; + pwm0_0_gpio18: pwm0_0_gpio18 { + pin-pwm { + pins = "gpio18"; + function = "alt5"; + bias-disable; + }; + }; + pwm1_0_gpio40: pwm1_0_gpio40 { + pin-pwm { + pins = "gpio40"; + function = "alt0"; + bias-disable; + }; + }; + pwm0_1_gpio13: pwm0_1_gpio13 { + pin-pwm { + pins = "gpio13"; + function = "alt0"; + bias-disable; + }; + }; + pwm0_1_gpio19: pwm0_1_gpio19 { + pin-pwm { + pins = "gpio19"; + function = "alt5"; + bias-disable; + }; + }; + pwm1_1_gpio41: pwm1_1_gpio41 { + pin-pwm { + pins = "gpio41"; + function = "alt0"; + bias-disable; + }; + }; + pwm0_1_gpio45: pwm0_1_gpio45 { + pin-pwm { + pins = "gpio45"; + function = "alt0"; + bias-disable; + }; + }; + pwm0_0_gpio52: pwm0_0_gpio52 { + pin-pwm { + pins = "gpio52"; + function = "alt1"; + bias-disable; + }; + }; + pwm0_1_gpio53: pwm0_1_gpio53 { + pin-pwm { + pins = "gpio53"; + function = "alt1"; + bias-disable; + }; + }; + + rgmii_gpio35: rgmii_gpio35 { + pin-start-stop { + pins = "gpio35"; + function = "alt4"; + }; + pin-rx-ok { + pins = "gpio36"; + function = "alt4"; + }; + }; + rgmii_irq_gpio34: rgmii_irq_gpio34 { + pin-irq { + pins = "gpio34"; + function = "alt5"; + }; + }; + rgmii_irq_gpio39: rgmii_irq_gpio39 { + pin-irq { + pins = "gpio39"; + function = "alt4"; + }; + }; + rgmii_mdio_gpio28: rgmii_mdio_gpio28 { + pins-mdio { + pins = "gpio28", + "gpio29"; + function = "alt5"; + }; + }; + rgmii_mdio_gpio37: rgmii_mdio_gpio37 { + pins-mdio { + pins = "gpio37", + "gpio38"; + function = "alt4"; + }; + }; + + spi0_gpio46: spi0_gpio46 { + pins-spi { + pins = "gpio46", + "gpio47", + "gpio48", + "gpio49"; + function = "alt2"; + }; + }; + spi2_gpio46: spi2_gpio46 { + pins-spi { + pins = "gpio46", + "gpio47", + "gpio48", + "gpio49", + "gpio50"; + function = "alt5"; + }; + }; + spi3_gpio0: spi3_gpio0 { + pins-spi { + pins = "gpio0", + "gpio1", + "gpio2", + "gpio3"; + function = "alt3"; + }; + }; + spi4_gpio4: spi4_gpio4 { + pins-spi { + pins = "gpio4", + "gpio5", + "gpio6", + "gpio7"; + function = "alt3"; + }; + }; + spi5_gpio12: spi5_gpio12 { + pins-spi { + pins = "gpio12", + "gpio13", + "gpio14", + "gpio15"; + function = "alt3"; + }; + }; + spi6_gpio18: spi6_gpio18 { + pins-spi { + pins = "gpio18", + "gpio19", + "gpio20", + "gpio21"; + function = "alt3"; + }; + }; + + uart2_gpio0: uart2_gpio0 { + pin-tx { + pins = "gpio0"; + function = "alt4"; + bias-disable; + }; + pin-rx { + pins = "gpio1"; + function = "alt4"; + bias-pull-up; + }; + }; + uart2_ctsrts_gpio2: uart2_ctsrts_gpio2 { + pin-cts { + pins = "gpio2"; + function = "alt4"; + bias-pull-up; + }; + pin-rts { + pins = "gpio3"; + function = "alt4"; + bias-disable; + }; + }; + uart3_gpio4: uart3_gpio4 { + pin-tx { + pins = "gpio4"; + function = "alt4"; + bias-disable; + }; + pin-rx { + pins = "gpio5"; + function = "alt4"; + bias-pull-up; + }; + }; + uart3_ctsrts_gpio6: uart3_ctsrts_gpio6 { + pin-cts { + pins = "gpio6"; + function = "alt4"; + bias-pull-up; + }; + pin-rts { + pins = "gpio7"; + function = "alt4"; + bias-disable; + }; + }; + uart4_gpio8: uart4_gpio8 { + pin-tx { + pins = "gpio8"; + function = "alt4"; + bias-disable; + }; + pin-rx { + pins = "gpio9"; + function = "alt4"; + bias-pull-up; + }; + }; + uart4_ctsrts_gpio10: uart4_ctsrts_gpio10 { + pin-cts { + pins = "gpio10"; + function = "alt4"; + bias-pull-up; + }; + pin-rts { + pins = "gpio11"; + function = "alt4"; + bias-disable; + }; + }; + uart5_gpio12: uart5_gpio12 { + pin-tx { + pins = "gpio12"; + function = "alt4"; + bias-disable; + }; + pin-rx { + pins = "gpio13"; + function = "alt4"; + bias-pull-up; + }; + }; + uart5_ctsrts_gpio14: uart5_ctsrts_gpio14 { + pin-cts { + pins = "gpio14"; + function = "alt4"; + bias-pull-up; + }; + pin-rts { + pins = "gpio15"; + function = "alt4"; + bias-disable; + }; + }; +}; + +&rmem { + #address-cells = <2>; +}; + +&cma { + /* + * arm64 reserves the CMA by default somewhere in ZONE_DMA32, + * that's not good enough for the BCM2711 as some devices can + * only address the lower 1G of memory (ZONE_DMA). + */ + alloc-ranges = <0x0 0x00000000 0x40000000>; +}; + +&i2c0 { + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; + interrupts = ; +}; + +&i2c1 { + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; + interrupts = ; +}; + +&mailbox { + interrupts = ; +}; + +&sdhci { + interrupts = ; +}; + +&sdhost { + interrupts = ; +}; + +&spi { + interrupts = ; +}; + +&spi1 { + interrupts = ; +}; + +&spi2 { + interrupts = ; +}; + +&system_timer { + interrupts = , + , + , + ; +}; + +&txp { + interrupts = ; +}; + +&uart0 { + interrupts = ; +}; + +&uart1 { + interrupts = ; +}; + +&usb { + interrupts = ; +}; + +&vec { + compatible = "brcm,bcm2711-vec"; + interrupts = ; +}; diff --git a/arch/arm/dts/bcm2835-common.dtsi b/arch/arm/dts/bcm2835-common.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..c25e797b90600a26a5ed510084bef57e65ee80ae --- /dev/null +++ b/arch/arm/dts/bcm2835-common.dtsi @@ -0,0 +1,207 @@ +// SPDX-License-Identifier: GPL-2.0 + +/* This include file covers the common peripherals and configuration between + * bcm2835, bcm2836 and bcm2837 implementations. + */ + +/ { + interrupt-parent = <&intc>; + + soc { + dma: dma@7e007000 { + compatible = "brcm,bcm2835-dma"; + reg = <0x7e007000 0xf00>; + interrupts = <1 16>, + <1 17>, + <1 18>, + <1 19>, + <1 20>, + <1 21>, + <1 22>, + <1 23>, + <1 24>, + <1 25>, + <1 26>, + /* dma channel 11-14 share one irq */ + <1 27>, + <1 27>, + <1 27>, + <1 27>, + /* unused shared irq for all channels */ + <1 28>; + interrupt-names = "dma0", + "dma1", + "dma2", + "dma3", + "dma4", + "dma5", + "dma6", + "dma7", + "dma8", + "dma9", + "dma10", + "dma11", + "dma12", + "dma13", + "dma14", + "dma-shared-all"; + #dma-cells = <1>; + brcm,dma-channel-mask = <0x7f35>; + }; + + intc: interrupt-controller@7e00b200 { + compatible = "brcm,bcm2835-armctrl-ic"; + reg = <0x7e00b200 0x200>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + pm: watchdog@7e100000 { + compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt"; + #power-domain-cells = <1>; + #reset-cells = <1>; + reg = <0x7e100000 0x114>, + <0x7e00a000 0x24>; + clocks = <&clocks BCM2835_CLOCK_V3D>, + <&clocks BCM2835_CLOCK_PERI_IMAGE>, + <&clocks BCM2835_CLOCK_H264>, + <&clocks BCM2835_CLOCK_ISP>; + clock-names = "v3d", "peri_image", "h264", "isp"; + system-power-controller; + }; + + rng@7e104000 { + compatible = "brcm,bcm2835-rng"; + reg = <0x7e104000 0x10>; + interrupts = <2 29>; + }; + + pixelvalve@7e206000 { + compatible = "brcm,bcm2835-pixelvalve0"; + reg = <0x7e206000 0x100>; + interrupts = <2 13>; /* pwa0 */ + }; + + pixelvalve@7e207000 { + compatible = "brcm,bcm2835-pixelvalve1"; + reg = <0x7e207000 0x100>; + interrupts = <2 14>; /* pwa1 */ + }; + + thermal: thermal@7e212000 { + compatible = "brcm,bcm2835-thermal"; + reg = <0x7e212000 0x8>; + clocks = <&clocks BCM2835_CLOCK_TSENS>; + #thermal-sensor-cells = <0>; + status = "disabled"; + }; + + i2c2: i2c@7e805000 { + compatible = "brcm,bcm2835-i2c"; + reg = <0x7e805000 0x1000>; + interrupts = <2 21>; + clocks = <&clocks BCM2835_CLOCK_VPU>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + }; + + vec: vec@7e806000 { + compatible = "brcm,bcm2835-vec"; + reg = <0x7e806000 0x1000>; + clocks = <&clocks BCM2835_CLOCK_VEC>; + interrupts = <2 27>; + status = "disabled"; + }; + + pixelvalve@7e807000 { + compatible = "brcm,bcm2835-pixelvalve2"; + reg = <0x7e807000 0x100>; + interrupts = <2 10>; /* pixelvalve */ + }; + + hdmi: hdmi@7e902000 { + compatible = "brcm,bcm2835-hdmi"; + reg = <0x7e902000 0x600>, + <0x7e808000 0x100>; + interrupts = <2 8>, <2 9>; + ddc = <&i2c2>; + clocks = <&clocks BCM2835_PLLH_PIX>, + <&clocks BCM2835_CLOCK_HSM>; + clock-names = "pixel", "hdmi"; + dmas = <&dma 17>; + dma-names = "audio-rx"; + status = "disabled"; + }; + + v3d: v3d@7ec00000 { + compatible = "brcm,bcm2835-v3d"; + reg = <0x7ec00000 0x1000>; + interrupts = <1 10>; + }; + + vc4: gpu { + compatible = "brcm,bcm2835-vc4"; + }; + }; +}; + +&cpu_thermal { + thermal-sensors = <&thermal>; +}; + +&gpio { + i2c_slave_gpio18: i2c_slave_gpio18 { + brcm,pins = <18 19 20 21>; + brcm,function = ; + }; + + jtag_gpio4: jtag_gpio4 { + brcm,pins = <4 5 6 12 13>; + brcm,function = ; + }; + + pwm0_gpio12: pwm0_gpio12 { + brcm,pins = <12>; + brcm,function = ; + }; + pwm0_gpio18: pwm0_gpio18 { + brcm,pins = <18>; + brcm,function = ; + }; + pwm0_gpio40: pwm0_gpio40 { + brcm,pins = <40>; + brcm,function = ; + }; + pwm1_gpio13: pwm1_gpio13 { + brcm,pins = <13>; + brcm,function = ; + }; + pwm1_gpio19: pwm1_gpio19 { + brcm,pins = <19>; + brcm,function = ; + }; + pwm1_gpio41: pwm1_gpio41 { + brcm,pins = <41>; + brcm,function = ; + }; + pwm1_gpio45: pwm1_gpio45 { + brcm,pins = <45>; + brcm,function = ; + }; +}; + +&i2s { + dmas = <&dma 2>, <&dma 3>; + dma-names = "tx", "rx"; +}; + +&sdhost { + dmas = <&dma 13>; + dma-names = "rx-tx"; +}; + +&spi { + dmas = <&dma 6>, <&dma 7>; + dma-names = "tx", "rx"; +}; diff --git a/arch/arm/dts/bcm2835-rpi-a-plus.dts b/arch/arm/dts/bcm2835-rpi-a-plus.dts index db8a6017f220a2b737b5e0af002e9b1077572f03..40b9405f1a8e439e7396bb728238eddea73d5602 100644 --- a/arch/arm/dts/bcm2835-rpi-a-plus.dts +++ b/arch/arm/dts/bcm2835-rpi-a-plus.dts @@ -8,12 +8,17 @@ compatible = "raspberrypi,model-a-plus", "brcm,bcm2835"; model = "Raspberry Pi Model A+"; + memory@0 { + device_type = "memory"; + reg = <0 0x10000000>; + }; + leds { - act { + led-act { gpios = <&gpio 47 GPIO_ACTIVE_HIGH>; }; - pwr { + led-pwr { label = "PWR"; gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; default-state = "keep"; @@ -99,6 +104,8 @@ &hdmi { hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; + power-domains = <&power RPI_POWER_DOMAIN_HDMI>; + status = "okay"; }; &pwm { @@ -107,6 +114,13 @@ status = "okay"; }; +&sdhost { + pinctrl-names = "default"; + pinctrl-0 = <&sdhost_gpio48>; + bus-width = <4>; + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_gpio14>; diff --git a/arch/arm/dts/bcm2835-rpi-a.dts b/arch/arm/dts/bcm2835-rpi-a.dts index 067d1f07a2d36c1653e47b2b3d64d77a0c81b813..11edb581dbaf0b42e5cb8209dc1aa7b4fa6e6cb6 100644 --- a/arch/arm/dts/bcm2835-rpi-a.dts +++ b/arch/arm/dts/bcm2835-rpi-a.dts @@ -8,8 +8,13 @@ compatible = "raspberrypi,model-a", "brcm,bcm2835"; model = "Raspberry Pi Model A"; + memory@0 { + device_type = "memory"; + reg = <0 0x10000000>; + }; + leds { - act { + led-act { gpios = <&gpio 16 GPIO_ACTIVE_LOW>; }; }; @@ -94,6 +99,8 @@ &hdmi { hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; + power-domains = <&power RPI_POWER_DOMAIN_HDMI>; + status = "okay"; }; &pwm { @@ -102,6 +109,13 @@ status = "okay"; }; +&sdhost { + pinctrl-names = "default"; + pinctrl-0 = <&sdhost_gpio48>; + bus-width = <4>; + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_gpio14>; diff --git a/arch/arm/dts/bcm2835-rpi-b-plus.dts b/arch/arm/dts/bcm2835-rpi-b-plus.dts index 1e40d672b05522c628e77eaf31b011f7d4341192..1b435c64bd9c18f2a7e45e9d1a2fce61f158263a 100644 --- a/arch/arm/dts/bcm2835-rpi-b-plus.dts +++ b/arch/arm/dts/bcm2835-rpi-b-plus.dts @@ -9,12 +9,17 @@ compatible = "raspberrypi,model-b-plus", "brcm,bcm2835"; model = "Raspberry Pi Model B+"; + memory@0 { + device_type = "memory"; + reg = <0 0x20000000>; + }; + leds { - act { + led-act { gpios = <&gpio 47 GPIO_ACTIVE_HIGH>; }; - pwr { + led-pwr { label = "PWR"; gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; default-state = "keep"; @@ -101,6 +106,8 @@ &hdmi { hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; + power-domains = <&power RPI_POWER_DOMAIN_HDMI>; + status = "okay"; }; &pwm { @@ -109,6 +116,13 @@ status = "okay"; }; +&sdhost { + pinctrl-names = "default"; + pinctrl-0 = <&sdhost_gpio48>; + bus-width = <4>; + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_gpio14>; diff --git a/arch/arm/dts/bcm2835-rpi-b-rev2.dts b/arch/arm/dts/bcm2835-rpi-b-rev2.dts index 28e7513ce61713a084bc5f91f96cc2426d3f50a8..a23c25c00eea7c3da990c47d6f035231424c790b 100644 --- a/arch/arm/dts/bcm2835-rpi-b-rev2.dts +++ b/arch/arm/dts/bcm2835-rpi-b-rev2.dts @@ -9,8 +9,13 @@ compatible = "raspberrypi,model-b-rev2", "brcm,bcm2835"; model = "Raspberry Pi Model B rev2"; + memory@0 { + device_type = "memory"; + reg = <0 0x10000000>; + }; + leds { - act { + led-act { gpios = <&gpio 16 GPIO_ACTIVE_LOW>; }; }; @@ -94,6 +99,8 @@ &hdmi { hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; + power-domains = <&power RPI_POWER_DOMAIN_HDMI>; + status = "okay"; }; &pwm { @@ -102,6 +109,13 @@ status = "okay"; }; +&sdhost { + pinctrl-names = "default"; + pinctrl-0 = <&sdhost_gpio48>; + bus-width = <4>; + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_gpio14>; diff --git a/arch/arm/dts/bcm2835-rpi-b.dts b/arch/arm/dts/bcm2835-rpi-b.dts index 31ff602e2cd3644a5524443dbc817023852c01a9..1b63d6b19750bf43474865b2aac785c9c254842f 100644 --- a/arch/arm/dts/bcm2835-rpi-b.dts +++ b/arch/arm/dts/bcm2835-rpi-b.dts @@ -9,8 +9,13 @@ compatible = "raspberrypi,model-b", "brcm,bcm2835"; model = "Raspberry Pi Model B"; + memory@0 { + device_type = "memory"; + reg = <0 0x10000000>; + }; + leds { - act { + led-act { gpios = <&gpio 16 GPIO_ACTIVE_LOW>; }; }; @@ -89,6 +94,8 @@ &hdmi { hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; + power-domains = <&power RPI_POWER_DOMAIN_HDMI>; + status = "okay"; }; &pwm { @@ -97,6 +104,13 @@ status = "okay"; }; +&sdhost { + pinctrl-names = "default"; + pinctrl-0 = <&sdhost_gpio48>; + bus-width = <4>; + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_gpio14>; diff --git a/arch/arm/dts/bcm2835-rpi-cm1-io1.dts b/arch/arm/dts/bcm2835-rpi-cm1-io1.dts index 4764a25585ab69f9a79868f7746380f4b09d000f..a75c882e65751fae008e4d8d8807b927ea5b88c6 100644 --- a/arch/arm/dts/bcm2835-rpi-cm1-io1.dts +++ b/arch/arm/dts/bcm2835-rpi-cm1-io1.dts @@ -79,6 +79,15 @@ &hdmi { hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; + power-domains = <&power RPI_POWER_DOMAIN_HDMI>; + status = "okay"; +}; + +&sdhost { + pinctrl-names = "default"; + pinctrl-0 = <&sdhost_gpio48>; + bus-width = <4>; + status = "okay"; }; &uart0 { diff --git a/arch/arm/dts/bcm2835-rpi-cm1.dtsi b/arch/arm/dts/bcm2835-rpi-cm1.dtsi index ef22c2da783afe706548637ca0ca39c816c04e23..e4e6b6abbfc13337caf240d2a269fca03f06d8e4 100644 --- a/arch/arm/dts/bcm2835-rpi-cm1.dtsi +++ b/arch/arm/dts/bcm2835-rpi-cm1.dtsi @@ -5,11 +5,16 @@ / { leds { - act { + led-act { gpios = <&gpio 47 GPIO_ACTIVE_LOW>; }; }; + memory@0 { + device_type = "memory"; + reg = <0 0x20000000>; + }; + reg_3v3: fixed-regulator { compatible = "regulator-fixed"; regulator-name = "3V3"; diff --git a/arch/arm/dts/bcm2835-rpi-common.dtsi b/arch/arm/dts/bcm2835-rpi-common.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..8a55b6cded592eb822f95eca86fde4f9a684855f --- /dev/null +++ b/arch/arm/dts/bcm2835-rpi-common.dtsi @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * This include file covers the common peripherals and configuration between + * bcm2835, bcm2836 and bcm2837 implementations that interact with RPi's + * firmware interface. + */ + +#include + +&v3d { + power-domains = <&power RPI_POWER_DOMAIN_V3D>; +}; diff --git a/arch/arm/dts/bcm2835-rpi-zero-w.dts b/arch/arm/dts/bcm2835-rpi-zero-w.dts index ba0167df6c5fe5a9a11bce1f87ee12f19a3f48df..33b2b77aa47db3de10e8f85eca14622eef892675 100644 --- a/arch/arm/dts/bcm2835-rpi-zero-w.dts +++ b/arch/arm/dts/bcm2835-rpi-zero-w.dts @@ -12,14 +12,19 @@ compatible = "raspberrypi,model-zero-w", "brcm,bcm2835"; model = "Raspberry Pi Zero W"; + memory@0 { + device_type = "memory"; + reg = <0 0x20000000>; + }; + chosen { /* 8250 auxiliary UART instead of pl011 */ stdout-path = "serial1:115200n8"; }; leds { - act { - gpios = <&gpio 47 GPIO_ACTIVE_HIGH>; + led-act { + gpios = <&gpio 47 GPIO_ACTIVE_LOW>; }; }; @@ -100,12 +105,16 @@ &hdmi { hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; + power-domains = <&power RPI_POWER_DOMAIN_HDMI>; + status = "okay"; }; &sdhci { #address-cells = <1>; #size-cells = <0>; + pinctrl-names = "default"; pinctrl-0 = <&emmc_gpio34 &gpclk2_gpio43>; + bus-width = <4>; mmc-pwrseq = <&wifi_pwrseq>; non-removable; status = "okay"; @@ -116,6 +125,13 @@ }; }; +&sdhost { + pinctrl-names = "default"; + pinctrl-0 = <&sdhost_gpio48>; + bus-width = <4>; + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_gpio32 &uart0_ctsrts_gpio30>; diff --git a/arch/arm/dts/bcm2835-rpi-zero.dts b/arch/arm/dts/bcm2835-rpi-zero.dts index 3b35a8a4a55f92afa680afcf2cd5ad9da636770b..6f9b3a908f287fc62b8d395b8f01599fa67f2559 100644 --- a/arch/arm/dts/bcm2835-rpi-zero.dts +++ b/arch/arm/dts/bcm2835-rpi-zero.dts @@ -12,8 +12,13 @@ compatible = "raspberrypi,model-zero", "brcm,bcm2835"; model = "Raspberry Pi Zero"; + memory@0 { + device_type = "memory"; + reg = <0 0x20000000>; + }; + leds { - act { + led-act { gpios = <&gpio 47 GPIO_ACTIVE_HIGH>; }; }; @@ -96,6 +101,15 @@ &hdmi { hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; + power-domains = <&power RPI_POWER_DOMAIN_HDMI>; + status = "okay"; +}; + +&sdhost { + pinctrl-names = "default"; + pinctrl-0 = <&sdhost_gpio48>; + bus-width = <4>; + status = "okay"; }; &uart0 { diff --git a/arch/arm/dts/bcm2835-rpi.dtsi b/arch/arm/dts/bcm2835-rpi.dtsi index 715d50c64529ad7217e9906a69f873f23e68a337..87ddcad760834548584699d9f69e93be66f8b5c8 100644 --- a/arch/arm/dts/bcm2835-rpi.dtsi +++ b/arch/arm/dts/bcm2835-rpi.dtsi @@ -1,15 +1,10 @@ #include / { - memory@0 { - device_type = "memory"; - reg = <0 0x10000000>; - }; - leds { compatible = "gpio-leds"; - act { + led-act { label = "ACT"; default-state = "keep"; linux,default-trigger = "heartbeat"; @@ -18,8 +13,12 @@ soc { firmware: firmware { - compatible = "raspberrypi,bcm2835-firmware", "simple-bus"; + compatible = "raspberrypi,bcm2835-firmware", "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + mboxes = <&mailbox>; + dma-ranges; }; power: power { @@ -64,32 +63,10 @@ clock-frequency = <100000>; }; -&i2c2 { - status = "okay"; -}; - -&sdhci { - pinctrl-names = "default"; - pinctrl-0 = <&emmc_gpio48>; - bus-width = <4>; -}; - -&sdhost { - pinctrl-names = "default"; - pinctrl-0 = <&sdhost_gpio48>; - status = "okay"; - bus-width = <4>; -}; - &usb { power-domains = <&power RPI_POWER_DOMAIN_USB>; }; -&hdmi { - power-domains = <&power RPI_POWER_DOMAIN_HDMI>; - status = "okay"; -}; - &vec { power-domains = <&power RPI_POWER_DOMAIN_VEC>; status = "okay"; diff --git a/arch/arm/dts/bcm2835.dtsi b/arch/arm/dts/bcm2835.dtsi index a5c3824c80563cf3222f77af9a6ffe39e22b1e0f..0549686134ea67a4bd9567270138a09d2dd0cb94 100644 --- a/arch/arm/dts/bcm2835.dtsi +++ b/arch/arm/dts/bcm2835.dtsi @@ -1,5 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 #include "bcm283x.dtsi" +#include "bcm2835-common.dtsi" +#include "bcm2835-rpi-common.dtsi" / { compatible = "brcm,bcm2835"; diff --git a/arch/arm/dts/bcm2836-rpi-2-b.dts b/arch/arm/dts/bcm2836-rpi-2-b.dts index 7b4e651bafddab48bcb22ff3cc7d8184d6c9996c..d8af8eeac7b6f9024c43b3341c5ae6c5fd182462 100644 --- a/arch/arm/dts/bcm2836-rpi-2-b.dts +++ b/arch/arm/dts/bcm2836-rpi-2-b.dts @@ -10,15 +10,16 @@ model = "Raspberry Pi 2 Model B"; memory@0 { + device_type = "memory"; reg = <0 0x40000000>; }; leds { - act { + led-act { gpios = <&gpio 47 GPIO_ACTIVE_HIGH>; }; - pwr { + led-pwr { label = "PWR"; gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; default-state = "keep"; @@ -105,6 +106,8 @@ &hdmi { hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; + power-domains = <&power RPI_POWER_DOMAIN_HDMI>; + status = "okay"; }; &pwm { @@ -113,6 +116,13 @@ status = "okay"; }; +&sdhost { + pinctrl-names = "default"; + pinctrl-0 = <&sdhost_gpio48>; + bus-width = <4>; + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_gpio14>; diff --git a/arch/arm/dts/bcm2836.dtsi b/arch/arm/dts/bcm2836.dtsi index c933e841388421045d908e0147012d0fca0ae670..b390006aef79a33dd7817039c7df9bb03bdb7dd6 100644 --- a/arch/arm/dts/bcm2836.dtsi +++ b/arch/arm/dts/bcm2836.dtsi @@ -1,5 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 #include "bcm283x.dtsi" +#include "bcm2835-common.dtsi" +#include "bcm2835-rpi-common.dtsi" / { compatible = "brcm,bcm2836"; diff --git a/arch/arm/dts/bcm2837-rpi-3-a-plus.dts b/arch/arm/dts/bcm2837-rpi-3-a-plus.dts index 7f4437a8eedbe338e00332a3e7e82e1587aad874..77099a7871b03b84fa7e02e690091882e01415c0 100644 --- a/arch/arm/dts/bcm2837-rpi-3-a-plus.dts +++ b/arch/arm/dts/bcm2837-rpi-3-a-plus.dts @@ -14,17 +14,20 @@ }; memory@0 { + device_type = "memory"; reg = <0 0x20000000>; }; leds { - act { + led-act { gpios = <&gpio 29 GPIO_ACTIVE_HIGH>; }; - pwr { + led-pwr { label = "PWR"; gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; + default-state = "keep"; + linux,default-trigger = "default-on"; }; }; }; @@ -117,6 +120,8 @@ &hdmi { hpd-gpios = <&gpio 28 GPIO_ACTIVE_LOW>; + power-domains = <&power RPI_POWER_DOMAIN_HDMI>; + status = "okay"; }; &pwm { diff --git a/arch/arm/dts/bcm2837-rpi-3-b-plus.dts b/arch/arm/dts/bcm2837-rpi-3-b-plus.dts index c6fa34c24100d43f053f5b64a4e5b4a8e801da7f..61010266ca9a3b3fad4d23cf7edf59e878bf66d7 100644 --- a/arch/arm/dts/bcm2837-rpi-3-b-plus.dts +++ b/arch/arm/dts/bcm2837-rpi-3-b-plus.dts @@ -15,17 +15,20 @@ }; memory@0 { + device_type = "memory"; reg = <0 0x40000000>; }; leds { - act { + led-act { gpios = <&gpio 29 GPIO_ACTIVE_HIGH>; }; - pwr { + led-pwr { label = "PWR"; gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; + default-state = "keep"; + linux,default-trigger = "default-on"; }; }; @@ -124,6 +127,8 @@ &hdmi { hpd-gpios = <&gpio 28 GPIO_ACTIVE_LOW>; + power-domains = <&power RPI_POWER_DOMAIN_HDMI>; + status = "okay"; }; &pwm { diff --git a/arch/arm/dts/bcm2837-rpi-3-b.dts b/arch/arm/dts/bcm2837-rpi-3-b.dts index ce71f578c51a7b5a210aad098ad283292cba5317..dd4a486040971334b12b0e0b81a5ca9f1322da74 100644 --- a/arch/arm/dts/bcm2837-rpi-3-b.dts +++ b/arch/arm/dts/bcm2837-rpi-3-b.dts @@ -15,11 +15,12 @@ }; memory@0 { + device_type = "memory"; reg = <0 0x40000000>; }; leds { - act { + led-act { gpios = <&expgpio 2 GPIO_ACTIVE_HIGH>; }; }; @@ -125,6 +126,8 @@ &hdmi { hpd-gpios = <&expgpio 4 GPIO_ACTIVE_LOW>; + power-domains = <&power RPI_POWER_DOMAIN_HDMI>; + status = "okay"; }; /* uart0 communicates with the BT module */ diff --git a/arch/arm/dts/bcm2837-rpi-cm3-io3.dts b/arch/arm/dts/bcm2837-rpi-cm3-io3.dts index 6c8233a36d86b66492a8425b94b360b5ea1db193..588d9411ceb61a9af583d3677d4916acf415b82d 100644 --- a/arch/arm/dts/bcm2837-rpi-cm3-io3.dts +++ b/arch/arm/dts/bcm2837-rpi-cm3-io3.dts @@ -78,6 +78,15 @@ &hdmi { hpd-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>; + power-domains = <&power RPI_POWER_DOMAIN_HDMI>; + status = "okay"; +}; + +&sdhost { + pinctrl-names = "default"; + pinctrl-0 = <&sdhost_gpio48>; + bus-width = <4>; + status = "okay"; }; &uart0 { diff --git a/arch/arm/dts/bcm2837-rpi-cm3.dtsi b/arch/arm/dts/bcm2837-rpi-cm3.dtsi index 81399b2c5af9e1f46e4d7e61fb2567bb84146aab..828a20561b9694b2ba3ca8f7f2d77549b7122e17 100644 --- a/arch/arm/dts/bcm2837-rpi-cm3.dtsi +++ b/arch/arm/dts/bcm2837-rpi-cm3.dtsi @@ -5,9 +5,18 @@ / { memory@0 { + device_type = "memory"; reg = <0 0x40000000>; }; + leds { + /* + * Since there is no upstream GPIO driver yet, + * remove the incomplete node. + */ + /delete-node/ led-act; + }; + reg_3v3: fixed-regulator { compatible = "regulator-fixed"; regulator-name = "3V3"; diff --git a/arch/arm/dts/bcm2837.dtsi b/arch/arm/dts/bcm2837.dtsi index beb6c502dadc7bc09537f37e6d7b12e44ec466b7..0199ec98cd61690ad964c1bbe782fcf64583b236 100644 --- a/arch/arm/dts/bcm2837.dtsi +++ b/arch/arm/dts/bcm2837.dtsi @@ -1,4 +1,6 @@ #include "bcm283x.dtsi" +#include "bcm2835-common.dtsi" +#include "bcm2835-rpi-common.dtsi" / { compatible = "brcm,bcm2837"; diff --git a/arch/arm/dts/bcm283x-rpi-usb-peripheral.dtsi b/arch/arm/dts/bcm283x-rpi-usb-peripheral.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..0ff0e9e2532725e50f7480bbd911463136c24765 --- /dev/null +++ b/arch/arm/dts/bcm283x-rpi-usb-peripheral.dtsi @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0 +&usb { + dr_mode = "peripheral"; + g-rx-fifo-size = <256>; + g-np-tx-fifo-size = <32>; + g-tx-fifo-size = <256 256 512 512 512 768 768>; +}; diff --git a/arch/arm/dts/bcm283x.dtsi b/arch/arm/dts/bcm283x.dtsi index 9777644c6c2b44d34ca67b7781b524b8d0998ea8..a3e06b6809476c3431e0a85ae9781d6bc37c600f 100644 --- a/arch/arm/dts/bcm283x.dtsi +++ b/arch/arm/dts/bcm283x.dtsi @@ -18,7 +18,6 @@ / { compatible = "brcm,bcm2835"; model = "BCM2835"; - interrupt-parent = <&intc>; #address-cells = <1>; #size-cells = <1>; @@ -31,16 +30,27 @@ stdout-path = "serial0:115200n8"; }; + rmem: reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + cma: linux,cma { + compatible = "shared-dma-pool"; + size = <0x4000000>; /* 64MB */ + reusable; + linux,cma-default; + }; + }; + thermal-zones { cpu_thermal: cpu-thermal { polling-delay-passive = <0>; polling-delay = <1000>; - thermal-sensors = <&thermal>; - trips { cpu-crit { - temperature = <80000>; + temperature = <90000>; hysteresis = <0>; type = "critical"; }; @@ -56,7 +66,7 @@ #address-cells = <1>; #size-cells = <1>; - timer@7e003000 { + system_timer: timer@7e003000 { compatible = "brcm,bcm2835-system-timer"; reg = <0x7e003000 0x1000>; interrupts = <1 0>, <1 1>, <1 2>, <1 3>; @@ -67,74 +77,12 @@ clock-frequency = <1000000>; }; - txp@7e004000 { + txp: txp@7e004000 { compatible = "brcm,bcm2835-txp"; reg = <0x7e004000 0x20>; interrupts = <1 11>; }; - dma: dma@7e007000 { - compatible = "brcm,bcm2835-dma"; - reg = <0x7e007000 0xf00>; - interrupts = <1 16>, - <1 17>, - <1 18>, - <1 19>, - <1 20>, - <1 21>, - <1 22>, - <1 23>, - <1 24>, - <1 25>, - <1 26>, - /* dma channel 11-14 share one irq */ - <1 27>, - <1 27>, - <1 27>, - <1 27>, - /* unused shared irq for all channels */ - <1 28>; - interrupt-names = "dma0", - "dma1", - "dma2", - "dma3", - "dma4", - "dma5", - "dma6", - "dma7", - "dma8", - "dma9", - "dma10", - "dma11", - "dma12", - "dma13", - "dma14", - "dma-shared-all"; - #dma-cells = <1>; - brcm,dma-channel-mask = <0x7f35>; - }; - - intc: interrupt-controller@7e00b200 { - compatible = "brcm,bcm2835-armctrl-ic"; - reg = <0x7e00b200 0x200>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - pm: watchdog@7e100000 { - compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt"; - #power-domain-cells = <1>; - #reset-cells = <1>; - reg = <0x7e100000 0x114>, - <0x7e00a000 0x24>; - clocks = <&clocks BCM2835_CLOCK_V3D>, - <&clocks BCM2835_CLOCK_PERI_IMAGE>, - <&clocks BCM2835_CLOCK_H264>, - <&clocks BCM2835_CLOCK_ISP>; - clock-names = "v3d", "peri_image", "h264", "isp"; - system-power-controller; - }; - clocks: cprman@7e101000 { compatible = "brcm,bcm2835-cprman"; #clock-cells = <1>; @@ -149,12 +97,6 @@ <&dsi1 0>, <&dsi1 1>, <&dsi1 2>; }; - rng@7e104000 { - compatible = "brcm,bcm2835-rng"; - reg = <0x7e104000 0x10>; - interrupts = <2 29>; - }; - mailbox: mailbox@7e00b880 { compatible = "brcm,bcm2835-mbox"; reg = <0x7e00b880 0x40>; @@ -184,8 +126,7 @@ interrupt-controller; #interrupt-cells = <2>; - /* Defines pin muxing groups according to - * BCM2835-ARM-Peripherals.pdf page 102. + /* Defines common pin muxing groups * * While each pin can have its mux selected * for various functions individually, some @@ -263,15 +204,7 @@ brcm,pins = <44 45>; brcm,function = ; }; - i2c_slave_gpio18: i2c_slave_gpio18 { - brcm,pins = <18 19 20 21>; - brcm,function = ; - }; - jtag_gpio4: jtag_gpio4 { - brcm,pins = <4 5 6 12 13>; - brcm,function = ; - }; jtag_gpio22: jtag_gpio22 { brcm,pins = <22 23 24 25 26 27>; brcm,function = ; @@ -286,35 +219,6 @@ brcm,function = ; }; - pwm0_gpio12: pwm0_gpio12 { - brcm,pins = <12>; - brcm,function = ; - }; - pwm0_gpio18: pwm0_gpio18 { - brcm,pins = <18>; - brcm,function = ; - }; - pwm0_gpio40: pwm0_gpio40 { - brcm,pins = <40>; - brcm,function = ; - }; - pwm1_gpio13: pwm1_gpio13 { - brcm,pins = <13>; - brcm,function = ; - }; - pwm1_gpio19: pwm1_gpio19 { - brcm,pins = <19>; - brcm,function = ; - }; - pwm1_gpio41: pwm1_gpio41 { - brcm,pins = <41>; - brcm,function = ; - }; - pwm1_gpio45: pwm1_gpio45 { - brcm,pins = <45>; - brcm,function = ; - }; - sdhost_gpio48: sdhost_gpio48 { brcm,pins = <48 49 50 51 52 53>; brcm,function = ; @@ -396,8 +300,8 @@ }; uart0: serial@7e201000 { - compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell"; - reg = <0x7e201000 0x1000>; + compatible = "arm,pl011", "arm,primecell"; + reg = <0x7e201000 0x200>; interrupts = <2 25>; clocks = <&clocks BCM2835_CLOCK_UART>, <&clocks BCM2835_CLOCK_VPU>; @@ -410,8 +314,6 @@ reg = <0x7e202000 0x100>; interrupts = <2 24>; clocks = <&clocks BCM2835_CLOCK_VPU>; - dmas = <&dma 13>; - dma-names = "rx-tx"; status = "disabled"; }; @@ -419,16 +321,12 @@ compatible = "brcm,bcm2835-i2s"; reg = <0x7e203000 0x24>; clocks = <&clocks BCM2835_CLOCK_PCM>; - - dmas = <&dma 2>, - <&dma 3>; - dma-names = "tx", "rx"; status = "disabled"; }; spi: spi@7e204000 { compatible = "brcm,bcm2835-spi"; - reg = <0x7e204000 0x1000>; + reg = <0x7e204000 0x200>; interrupts = <2 22>; clocks = <&clocks BCM2835_CLOCK_VPU>; #address-cells = <1>; @@ -438,7 +336,7 @@ i2c0: i2c@7e205000 { compatible = "brcm,bcm2835-i2c"; - reg = <0x7e205000 0x1000>; + reg = <0x7e205000 0x200>; interrupts = <2 21>; clocks = <&clocks BCM2835_CLOCK_VPU>; #address-cells = <1>; @@ -446,18 +344,6 @@ status = "disabled"; }; - pixelvalve@7e206000 { - compatible = "brcm,bcm2835-pixelvalve0"; - reg = <0x7e206000 0x100>; - interrupts = <2 13>; /* pwa0 */ - }; - - pixelvalve@7e207000 { - compatible = "brcm,bcm2835-pixelvalve1"; - reg = <0x7e207000 0x100>; - interrupts = <2 14>; /* pwa1 */ - }; - dpi: dpi@7e208000 { compatible = "brcm,bcm2835-dpi"; reg = <0x7e208000 0x8c>; @@ -486,13 +372,6 @@ "dsi0_ddr2", "dsi0_ddr"; - }; - - thermal: thermal@7e212000 { - compatible = "brcm,bcm2835-thermal"; - reg = <0x7e212000 0x8>; - clocks = <&clocks BCM2835_CLOCK_TSENS>; - #thermal-sensor-cells = <0>; status = "disabled"; }; @@ -541,7 +420,7 @@ status = "disabled"; }; - sdhci: sdhci@7e300000 { + sdhci: mmc@7e300000 { compatible = "brcm,bcm2835-sdhci"; reg = <0x7e300000 0x100>; interrupts = <2 30>; @@ -585,44 +464,6 @@ status = "disabled"; }; - i2c2: i2c@7e805000 { - compatible = "brcm,bcm2835-i2c"; - reg = <0x7e805000 0x1000>; - interrupts = <2 21>; - clocks = <&clocks BCM2835_CLOCK_VPU>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - vec: vec@7e806000 { - compatible = "brcm,bcm2835-vec"; - reg = <0x7e806000 0x1000>; - clocks = <&clocks BCM2835_CLOCK_VEC>; - interrupts = <2 27>; - status = "disabled"; - }; - - pixelvalve@7e807000 { - compatible = "brcm,bcm2835-pixelvalve2"; - reg = <0x7e807000 0x100>; - interrupts = <2 10>; /* pixelvalve */ - }; - - hdmi: hdmi@7e902000 { - compatible = "brcm,bcm2835-hdmi"; - reg = <0x7e902000 0x600>, - <0x7e808000 0x100>; - interrupts = <2 8>, <2 9>; - ddc = <&i2c2>; - clocks = <&clocks BCM2835_PLLH_PIX>, - <&clocks BCM2835_CLOCK_HSM>; - clock-names = "pixel", "hdmi"; - dmas = <&dma 17>; - dma-names = "audio-rx"; - status = "disabled"; - }; - usb: usb@7e980000 { compatible = "brcm,bcm2835-usb"; reg = <0x7e980000 0x10000>; @@ -634,36 +475,19 @@ phys = <&usbphy>; phy-names = "usb2-phy"; }; - - v3d: v3d@7ec00000 { - compatible = "brcm,bcm2835-v3d"; - reg = <0x7ec00000 0x1000>; - interrupts = <1 10>; - power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>; - }; - - vc4: gpu { - compatible = "brcm,bcm2835-vc4"; - }; }; clocks { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - /* The oscillator is the root of the clock tree. */ - clk_osc: clock@3 { + clk_osc: clk-osc { compatible = "fixed-clock"; - reg = <3>; #clock-cells = <0>; clock-output-names = "osc"; clock-frequency = <19200000>; }; - clk_usb: clock@4 { + clk_usb: clk-usb { compatible = "fixed-clock"; - reg = <4>; #clock-cells = <0>; clock-output-names = "otg"; clock-frequency = <480000000>; diff --git a/arch/arm/dts/bcm7xxx.dts b/arch/arm/dts/bcm7xxx.dts new file mode 100644 index 0000000000000000000000000000000000000000..786ce3ff9597fac2fd257959a42986a0f99b8848 --- /dev/null +++ b/arch/arm/dts/bcm7xxx.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Empty devicetre file for bcm7260 board + * + * This is required to make the board build with CONFIG OF_SEPARATE + * In-tree document explains how to obtain a real devicetree using 'bolt' but + * I did not attempt this. + * + * Copyright 2021 Google LLC + */ + +/dts-v1/; + +/ { +}; diff --git a/arch/arm/dts/highbank.dts b/arch/arm/dts/highbank.dts new file mode 100644 index 0000000000000000000000000000000000000000..1480bad910406238c878254a63d49ec33b89fd70 --- /dev/null +++ b/arch/arm/dts/highbank.dts @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Empty devicetree for highbank/midway + */ + +/dts-v1/; + +/ { +}; diff --git a/arch/arm/dts/juno-base.dtsi b/arch/arm/dts/juno-base.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..6288e104a0893f65377ee70706c95137fe4e63ba --- /dev/null +++ b/arch/arm/dts/juno-base.dtsi @@ -0,0 +1,831 @@ +// SPDX-License-Identifier: GPL-2.0 +#include "juno-clocks.dtsi" +#include "juno-motherboard.dtsi" + +/ { + /* + * Devices shared by all Juno boards + */ + + memtimer: timer@2a810000 { + compatible = "arm,armv7-timer-mem"; + reg = <0x0 0x2a810000 0x0 0x10000>; + clock-frequency = <50000000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x0 0x2a820000 0x20000>; + status = "disabled"; + frame@2a830000 { + frame-number = <1>; + interrupts = ; + reg = <0x10000 0x10000>; + }; + }; + + mailbox: mhu@2b1f0000 { + compatible = "arm,mhu", "arm,primecell"; + reg = <0x0 0x2b1f0000 0x0 0x1000>; + interrupts = , + ; + #mbox-cells = <1>; + clocks = <&soc_refclk100mhz>; + clock-names = "apb_pclk"; + }; + + smmu_gpu: iommu@2b400000 { + compatible = "arm,mmu-400", "arm,smmu-v1"; + reg = <0x0 0x2b400000 0x0 0x10000>; + interrupts = , + ; + #iommu-cells = <1>; + #global-interrupts = <1>; + power-domains = <&scpi_devpd 1>; + dma-coherent; + status = "disabled"; + }; + + smmu_pcie: iommu@2b500000 { + compatible = "arm,mmu-401", "arm,smmu-v1"; + reg = <0x0 0x2b500000 0x0 0x10000>; + interrupts = , + ; + #iommu-cells = <1>; + #global-interrupts = <1>; + dma-coherent; + status = "disabled"; + }; + + smmu_etr: iommu@2b600000 { + compatible = "arm,mmu-401", "arm,smmu-v1"; + reg = <0x0 0x2b600000 0x0 0x10000>; + interrupts = , + ; + #iommu-cells = <1>; + #global-interrupts = <1>; + dma-coherent; + power-domains = <&scpi_devpd 0>; + }; + + gic: interrupt-controller@2c010000 { + compatible = "arm,gic-400", "arm,cortex-a15-gic"; + reg = <0x0 0x2c010000 0 0x1000>, + <0x0 0x2c02f000 0 0x2000>, + <0x0 0x2c04f000 0 0x2000>, + <0x0 0x2c06f000 0 0x2000>; + #address-cells = <1>; + #interrupt-cells = <3>; + #size-cells = <1>; + interrupt-controller; + interrupts = ; + ranges = <0 0 0x2c1c0000 0x40000>; + + v2m_0: v2m@0 { + compatible = "arm,gic-v2m-frame"; + msi-controller; + reg = <0 0x10000>; + }; + + v2m@10000 { + compatible = "arm,gic-v2m-frame"; + msi-controller; + reg = <0x10000 0x10000>; + }; + + v2m@20000 { + compatible = "arm,gic-v2m-frame"; + msi-controller; + reg = <0x20000 0x10000>; + }; + + v2m@30000 { + compatible = "arm,gic-v2m-frame"; + msi-controller; + reg = <0x30000 0x10000>; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + /* + * Juno TRMs specify the size for these coresight components as 64K. + * The actual size is just 4K though 64K is reserved. Access to the + * unmapped reserved region results in a DECERR response. + */ + etf@20010000 { /* etf0 */ + compatible = "arm,coresight-tmc", "arm,primecell"; + reg = <0 0x20010000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + + in-ports { + port { + etf0_in_port: endpoint { + remote-endpoint = <&main_funnel_out_port>; + }; + }; + }; + + out-ports { + port { + etf0_out_port: endpoint { + }; + }; + }; + }; + + tpiu@20030000 { + compatible = "arm,coresight-tpiu", "arm,primecell"; + reg = <0 0x20030000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + in-ports { + port { + tpiu_in_port: endpoint { + remote-endpoint = <&replicator_out_port0>; + }; + }; + }; + }; + + /* main funnel on Juno r0, cssys0 funnel on Juno r1/r2 as per TRM*/ + main_funnel: funnel@20040000 { + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; + reg = <0 0x20040000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + + out-ports { + port { + main_funnel_out_port: endpoint { + remote-endpoint = <&etf0_in_port>; + }; + }; + }; + + main_funnel_in_ports: in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + main_funnel_in_port0: endpoint { + remote-endpoint = <&cluster0_funnel_out_port>; + }; + }; + + port@1 { + reg = <1>; + main_funnel_in_port1: endpoint { + remote-endpoint = <&cluster1_funnel_out_port>; + }; + }; + }; + }; + + etr@20070000 { + compatible = "arm,coresight-tmc", "arm,primecell"; + reg = <0 0x20070000 0 0x1000>; + iommus = <&smmu_etr 0>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + arm,scatter-gather; + in-ports { + port { + etr_in_port: endpoint { + remote-endpoint = <&replicator_out_port1>; + }; + }; + }; + }; + + stm@20100000 { + compatible = "arm,coresight-stm", "arm,primecell"; + reg = <0 0x20100000 0 0x1000>, + <0 0x28000000 0 0x1000000>; + reg-names = "stm-base", "stm-stimulus-base"; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + out-ports { + port { + stm_out_port: endpoint { + }; + }; + }; + }; + + replicator@20120000 { + compatible = "arm,coresight-dynamic-replicator", "arm,primecell"; + reg = <0 0x20120000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + + out-ports { + #address-cells = <1>; + #size-cells = <0>; + + /* replicator output ports */ + port@0 { + reg = <0>; + replicator_out_port0: endpoint { + remote-endpoint = <&tpiu_in_port>; + }; + }; + + port@1 { + reg = <1>; + replicator_out_port1: endpoint { + remote-endpoint = <&etr_in_port>; + }; + }; + }; + in-ports { + port { + replicator_in_port0: endpoint { + }; + }; + }; + }; + + cpu_debug0: cpu-debug@22010000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0x0 0x22010000 0x0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + }; + + etm0: etm@22040000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x22040000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + out-ports { + port { + cluster0_etm0_out_port: endpoint { + remote-endpoint = <&cluster0_funnel_in_port0>; + }; + }; + }; + }; + + funnel@220c0000 { /* cluster0 funnel */ + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; + reg = <0 0x220c0000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + out-ports { + port { + cluster0_funnel_out_port: endpoint { + remote-endpoint = <&main_funnel_in_port0>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + cluster0_funnel_in_port0: endpoint { + remote-endpoint = <&cluster0_etm0_out_port>; + }; + }; + + port@1 { + reg = <1>; + cluster0_funnel_in_port1: endpoint { + remote-endpoint = <&cluster0_etm1_out_port>; + }; + }; + }; + }; + + cpu_debug1: cpu-debug@22110000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0x0 0x22110000 0x0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + }; + + etm1: etm@22140000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x22140000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + out-ports { + port { + cluster0_etm1_out_port: endpoint { + remote-endpoint = <&cluster0_funnel_in_port1>; + }; + }; + }; + }; + + cpu_debug2: cpu-debug@23010000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0x0 0x23010000 0x0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + }; + + etm2: etm@23040000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x23040000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + out-ports { + port { + cluster1_etm0_out_port: endpoint { + remote-endpoint = <&cluster1_funnel_in_port0>; + }; + }; + }; + }; + + funnel@230c0000 { /* cluster1 funnel */ + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; + reg = <0 0x230c0000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + out-ports { + port { + cluster1_funnel_out_port: endpoint { + remote-endpoint = <&main_funnel_in_port1>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + cluster1_funnel_in_port0: endpoint { + remote-endpoint = <&cluster1_etm0_out_port>; + }; + }; + + port@1 { + reg = <1>; + cluster1_funnel_in_port1: endpoint { + remote-endpoint = <&cluster1_etm1_out_port>; + }; + }; + port@2 { + reg = <2>; + cluster1_funnel_in_port2: endpoint { + remote-endpoint = <&cluster1_etm2_out_port>; + }; + }; + port@3 { + reg = <3>; + cluster1_funnel_in_port3: endpoint { + remote-endpoint = <&cluster1_etm3_out_port>; + }; + }; + }; + }; + + cpu_debug3: cpu-debug@23110000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0x0 0x23110000 0x0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + }; + + etm3: etm@23140000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x23140000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + out-ports { + port { + cluster1_etm1_out_port: endpoint { + remote-endpoint = <&cluster1_funnel_in_port1>; + }; + }; + }; + }; + + cpu_debug4: cpu-debug@23210000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0x0 0x23210000 0x0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + }; + + etm4: etm@23240000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x23240000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + out-ports { + port { + cluster1_etm2_out_port: endpoint { + remote-endpoint = <&cluster1_funnel_in_port2>; + }; + }; + }; + }; + + cpu_debug5: cpu-debug@23310000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0x0 0x23310000 0x0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + }; + + etm5: etm@23340000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x23340000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + out-ports { + port { + cluster1_etm3_out_port: endpoint { + remote-endpoint = <&cluster1_funnel_in_port3>; + }; + }; + }; + }; + + gpu: gpu@2d000000 { + compatible = "arm,juno-mali", "arm,mali-t624"; + reg = <0 0x2d000000 0 0x10000>; + interrupts = , + , + ; + interrupt-names = "job", "mmu", "gpu"; + clocks = <&scpi_dvfs 2>; + power-domains = <&scpi_devpd 1>; + dma-coherent; + /* The SMMU is only really of interest to bare-metal hypervisors */ + /* iommus = <&smmu_gpu 0>; */ + status = "disabled"; + }; + + sram: sram@2e000000 { + compatible = "arm,juno-sram-ns", "mmio-sram"; + reg = <0x0 0x2e000000 0x0 0x8000>; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x0 0x2e000000 0x8000>; + + cpu_scp_lpri: scp-sram@0 { + compatible = "arm,juno-scp-shmem"; + reg = <0x0 0x200>; + }; + + cpu_scp_hpri: scp-sram@200 { + compatible = "arm,juno-scp-shmem"; + reg = <0x200 0x200>; + }; + }; + + pcie_ctlr: pcie@40000000 { + compatible = "arm,juno-r1-pcie", "plda,xpressrich3-axi", "pci-host-ecam-generic"; + device_type = "pci"; + reg = <0 0x40000000 0 0x10000000>; /* ECAM config space */ + bus-range = <0 255>; + linux,pci-domain = <0>; + #address-cells = <3>; + #size-cells = <2>; + dma-coherent; + ranges = <0x01000000 0x00 0x00000000 0x00 0x5f800000 0x0 0x00800000>, + <0x02000000 0x00 0x50000000 0x00 0x50000000 0x0 0x08000000>, + <0x42000000 0x40 0x00000000 0x40 0x00000000 0x1 0x00000000>; + /* Standard AXI Translation entries as programmed by EDK2 */ + dma-ranges = <0x02000000 0x0 0x2c1c0000 0x0 0x2c1c0000 0x0 0x00040000>, + <0x02000000 0x0 0x80000000 0x0 0x80000000 0x0 0x80000000>, + <0x43000000 0x8 0x00000000 0x8 0x00000000 0x2 0x00000000>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &gic 0 GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &gic 0 GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &gic 0 GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &gic 0 GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; + msi-parent = <&v2m_0>; + status = "disabled"; + iommu-map-mask = <0x0>; /* RC has no means to output PCI RID */ + iommu-map = <0x0 &smmu_pcie 0x0 0x1>; + }; + + scpi { + compatible = "arm,scpi"; + mboxes = <&mailbox 1>; + shmem = <&cpu_scp_hpri>; + + clocks { + compatible = "arm,scpi-clocks"; + + scpi_dvfs: clocks-0 { + compatible = "arm,scpi-dvfs-clocks"; + #clock-cells = <1>; + clock-indices = <0>, <1>, <2>; + clock-output-names = "atlclk", "aplclk","gpuclk"; + }; + scpi_clk: clocks-1 { + compatible = "arm,scpi-variable-clocks"; + #clock-cells = <1>; + clock-indices = <3>; + clock-output-names = "pxlclk"; + }; + }; + + scpi_devpd: power-controller { + compatible = "arm,scpi-power-domains"; + num-domains = <2>; + #power-domain-cells = <1>; + }; + + scpi_sensors0: sensors { + compatible = "arm,scpi-sensors"; + #thermal-sensor-cells = <1>; + }; + }; + + thermal-zones { + pmic { + polling-delay = <1000>; + polling-delay-passive = <100>; + thermal-sensors = <&scpi_sensors0 0>; + }; + + soc { + polling-delay = <1000>; + polling-delay-passive = <100>; + thermal-sensors = <&scpi_sensors0 3>; + }; + + big_cluster_thermal_zone: big-cluster { + polling-delay = <1000>; + polling-delay-passive = <100>; + thermal-sensors = <&scpi_sensors0 21>; + status = "disabled"; + }; + + little_cluster_thermal_zone: little-cluster { + polling-delay = <1000>; + polling-delay-passive = <100>; + thermal-sensors = <&scpi_sensors0 22>; + status = "disabled"; + }; + + gpu0_thermal_zone: gpu0 { + polling-delay = <1000>; + polling-delay-passive = <100>; + thermal-sensors = <&scpi_sensors0 23>; + status = "disabled"; + }; + + gpu1_thermal_zone: gpu1 { + polling-delay = <1000>; + polling-delay-passive = <100>; + thermal-sensors = <&scpi_sensors0 24>; + status = "disabled"; + }; + }; + + smmu_dma: iommu@7fb00000 { + compatible = "arm,mmu-401", "arm,smmu-v1"; + reg = <0x0 0x7fb00000 0x0 0x10000>; + interrupts = , + ; + #iommu-cells = <1>; + #global-interrupts = <1>; + dma-coherent; + }; + + smmu_hdlcd1: iommu@7fb10000 { + compatible = "arm,mmu-401", "arm,smmu-v1"; + reg = <0x0 0x7fb10000 0x0 0x10000>; + interrupts = , + ; + #iommu-cells = <1>; + #global-interrupts = <1>; + }; + + smmu_hdlcd0: iommu@7fb20000 { + compatible = "arm,mmu-401", "arm,smmu-v1"; + reg = <0x0 0x7fb20000 0x0 0x10000>; + interrupts = , + ; + #iommu-cells = <1>; + #global-interrupts = <1>; + }; + + smmu_usb: iommu@7fb30000 { + compatible = "arm,mmu-401", "arm,smmu-v1"; + reg = <0x0 0x7fb30000 0x0 0x10000>; + interrupts = , + ; + #iommu-cells = <1>; + #global-interrupts = <1>; + dma-coherent; + }; + + dma@7ff00000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x0 0x7ff00000 0 0x1000>; + #dma-cells = <1>; + #dma-channels = <8>; + #dma-requests = <32>; + interrupts = , + , + , + , + , + , + , + , + ; + iommus = <&smmu_dma 0>, + <&smmu_dma 1>, + <&smmu_dma 2>, + <&smmu_dma 3>, + <&smmu_dma 4>, + <&smmu_dma 5>, + <&smmu_dma 6>, + <&smmu_dma 7>, + <&smmu_dma 8>; + clocks = <&soc_faxiclk>; + clock-names = "apb_pclk"; + }; + + hdlcd@7ff50000 { + compatible = "arm,hdlcd"; + reg = <0 0x7ff50000 0 0x1000>; + interrupts = ; + iommus = <&smmu_hdlcd1 0>; + clocks = <&scpi_clk 3>; + clock-names = "pxlclk"; + + port { + hdlcd1_output: endpoint { + remote-endpoint = <&tda998x_1_input>; + }; + }; + }; + + hdlcd@7ff60000 { + compatible = "arm,hdlcd"; + reg = <0 0x7ff60000 0 0x1000>; + interrupts = ; + iommus = <&smmu_hdlcd0 0>; + clocks = <&scpi_clk 3>; + clock-names = "pxlclk"; + + port { + hdlcd0_output: endpoint { + remote-endpoint = <&tda998x_0_input>; + }; + }; + }; + + soc_uart0: serial@7ff80000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0 0x7ff80000 0x0 0x1000>; + interrupts = ; + clocks = <&soc_uartclk>, <&soc_refclk100mhz>; + clock-names = "uartclk", "apb_pclk"; + }; + + i2c@7ffa0000 { + compatible = "snps,designware-i2c"; + reg = <0x0 0x7ffa0000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clock-frequency = <400000>; + i2c-sda-hold-time-ns = <500>; + clocks = <&soc_smc50mhz>; + + hdmi-transmitter@70 { + compatible = "nxp,tda998x"; + reg = <0x70>; + port { + tda998x_0_input: endpoint { + remote-endpoint = <&hdlcd0_output>; + }; + }; + }; + + hdmi-transmitter@71 { + compatible = "nxp,tda998x"; + reg = <0x71>; + port { + tda998x_1_input: endpoint { + remote-endpoint = <&hdlcd1_output>; + }; + }; + }; + }; + + usb@7ffb0000 { + compatible = "generic-ohci"; + reg = <0x0 0x7ffb0000 0x0 0x10000>; + interrupts = ; + iommus = <&smmu_usb 0>; + clocks = <&soc_usb48mhz>; + }; + + usb@7ffc0000 { + compatible = "generic-ehci"; + reg = <0x0 0x7ffc0000 0x0 0x10000>; + interrupts = ; + iommus = <&smmu_usb 0>; + clocks = <&soc_usb48mhz>; + }; + + memory-controller@7ffd0000 { + compatible = "arm,pl354", "arm,primecell"; + reg = <0 0x7ffd0000 0 0x1000>; + interrupts = , + ; + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + }; + + memory@80000000 { + device_type = "memory"; + /* last 16MB of the first memory area is reserved for secure world use by firmware */ + reg = <0x00000000 0x80000000 0x0 0x7f000000>, + <0x00000008 0x80000000 0x1 0x80000000>; + }; + + bus@8000000 { + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 15>; + interrupt-map = <0 0 0 &gic 0 GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, + <0 0 1 &gic 0 GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, + <0 0 2 &gic 0 GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, + <0 0 3 &gic 0 GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, + <0 0 4 &gic 0 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, + <0 0 5 &gic 0 GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, + <0 0 6 &gic 0 GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, + <0 0 7 &gic 0 GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>, + <0 0 8 &gic 0 GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>, + <0 0 9 &gic 0 GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>, + <0 0 10 &gic 0 GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>, + <0 0 11 &gic 0 GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, + <0 0 12 &gic 0 GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; + }; + + site2: tlx-bus@60000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0x60000000 0x10000000>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0>; + interrupt-map = <0 0 &gic 0 GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; + }; +}; diff --git a/arch/arm/dts/juno-clocks.dtsi b/arch/arm/dts/juno-clocks.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..b0f8ccaac9e32b97a456b309bd72fec1c3f58d55 --- /dev/null +++ b/arch/arm/dts/juno-clocks.dtsi @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * ARM Juno Platform clocks + * + * Copyright (c) 2013-2014 ARM Ltd + * + * This file is licensed under a dual GPLv2 or BSD license. + * + */ +/ { + /* SoC fixed clocks */ + soc_uartclk: refclk7372800hz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <7372800>; + clock-output-names = "juno:uartclk"; + }; + + soc_usb48mhz: clk48mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <48000000>; + clock-output-names = "clk48mhz"; + }; + + soc_smc50mhz: clk50mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + clock-output-names = "smc_clk"; + }; + + soc_refclk100mhz: refclk100mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + clock-output-names = "apb_pclk"; + }; + + soc_faxiclk: refclk400mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <400000000>; + clock-output-names = "faxi_clk"; + }; +}; diff --git a/arch/arm/dts/juno-cs-r1r2.dtsi b/arch/arm/dts/juno-cs-r1r2.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..eda3d9e18af65a1eca66cb2efd8b953bd02e11ba --- /dev/null +++ b/arch/arm/dts/juno-cs-r1r2.dtsi @@ -0,0 +1,85 @@ +// SPDX-License-Identifier: GPL-2.0 +/ { + funnel@20130000 { /* cssys1 */ + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; + reg = <0 0x20130000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + out-ports { + port { + csys1_funnel_out_port: endpoint { + remote-endpoint = <&etf1_in_port>; + }; + }; + }; + in-ports { + port { + csys1_funnel_in_port0: endpoint { + }; + }; + + }; + }; + + etf@20140000 { /* etf1 */ + compatible = "arm,coresight-tmc", "arm,primecell"; + reg = <0 0x20140000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + in-ports { + port { + etf1_in_port: endpoint { + remote-endpoint = <&csys1_funnel_out_port>; + }; + }; + }; + out-ports { + port { + etf1_out_port: endpoint { + remote-endpoint = <&csys2_funnel_in_port1>; + }; + }; + }; + }; + + funnel@20150000 { /* cssys2 */ + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; + reg = <0 0x20150000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + out-ports { + port { + csys2_funnel_out_port: endpoint { + remote-endpoint = <&replicator_in_port0>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + csys2_funnel_in_port0: endpoint { + slave-mode; + remote-endpoint = <&etf0_out_port>; + }; + }; + + port@1 { + reg = <1>; + csys2_funnel_in_port1: endpoint { + slave-mode; + remote-endpoint = <&etf1_out_port>; + }; + }; + + }; + }; +}; diff --git a/arch/arm/dts/juno-motherboard.dtsi b/arch/arm/dts/juno-motherboard.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..42b17542ab16e80d48451baf0dd148b26afd10c8 --- /dev/null +++ b/arch/arm/dts/juno-motherboard.dtsi @@ -0,0 +1,303 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * ARM Juno Platform motherboard peripherals + * + * Copyright (c) 2013-2014 ARM Ltd + * + * This file is licensed under a dual GPLv2 or BSD license. + * + */ + +/ { + mb_clk24mhz: clk24mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + clock-output-names = "juno_mb:clk24mhz"; + }; + + mb_clk25mhz: clk25mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + clock-output-names = "juno_mb:clk25mhz"; + }; + + v2m_refclk1mhz: refclk1mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <1000000>; + clock-output-names = "juno_mb:refclk1mhz"; + }; + + v2m_refclk32khz: refclk32khz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "juno_mb:refclk32khz"; + }; + + mb_fixed_3v3: mcc-sb-3v3 { + compatible = "regulator-fixed"; + regulator-name = "MCC_SB_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + gpio-keys { + compatible = "gpio-keys"; + + power-button { + debounce-interval = <50>; + wakeup-source; + linux,code = <116>; + label = "POWER"; + gpios = <&iofpga_gpio0 0 0x4>; + }; + home-button { + debounce-interval = <50>; + wakeup-source; + linux,code = <102>; + label = "HOME"; + gpios = <&iofpga_gpio0 1 0x4>; + }; + rlock-button { + debounce-interval = <50>; + wakeup-source; + linux,code = <152>; + label = "RLOCK"; + gpios = <&iofpga_gpio0 2 0x4>; + }; + vol-up-button { + debounce-interval = <50>; + wakeup-source; + linux,code = <115>; + label = "VOL+"; + gpios = <&iofpga_gpio0 3 0x4>; + }; + vol-down-button { + debounce-interval = <50>; + wakeup-source; + linux,code = <114>; + label = "VOL-"; + gpios = <&iofpga_gpio0 4 0x4>; + }; + nmi-button { + debounce-interval = <50>; + wakeup-source; + linux,code = <99>; + label = "NMI"; + gpios = <&iofpga_gpio0 5 0x4>; + }; + }; + + bus@8000000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0x8000000 0 0x8000000 0x18000000>; + + motherboard-bus@8000000 { + compatible = "arm,vexpress,v2p-p1", "simple-bus"; + #address-cells = <2>; /* SMB chipselect number and offset */ + #size-cells = <1>; + ranges = <0 0 0 0x08000000 0x04000000>, + <1 0 0 0x14000000 0x04000000>, + <2 0 0 0x18000000 0x04000000>, + <3 0 0 0x1c000000 0x04000000>, + <4 0 0 0x0c000000 0x04000000>, + <5 0 0 0x10000000 0x04000000>; + arm,hbi = <0x252>; + arm,vexpress,site = <0>; + + flash@0 { + /* 2 * 32MiB NOR Flash memory mounted on CS0 */ + compatible = "arm,vexpress-flash", "cfi-flash"; + reg = <0 0x00000000 0x04000000>; + bank-width = <4>; + /* + * Unfortunately, accessing the flash disturbs + * the CPU idle states (suspend) and CPU + * hotplug of the platform. For this reason, + * flash hardware access is disabled by default. + */ + status = "disabled"; + partitions { + compatible = "arm,arm-firmware-suite"; + }; + }; + + ethernet@200000000 { + compatible = "smsc,lan9118", "smsc,lan9115"; + reg = <2 0x00000000 0x10000>; + interrupts = <3>; + phy-mode = "mii"; + reg-io-width = <4>; + smsc,irq-active-high; + smsc,irq-push-pull; + clocks = <&mb_clk25mhz>; + vdd33a-supply = <&mb_fixed_3v3>; + vddvario-supply = <&mb_fixed_3v3>; + }; + + iofpga-bus@300000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 3 0 0x200000>; + + v2m_sysctl: sysctl@20000 { + compatible = "arm,sp810", "arm,primecell"; + reg = <0x020000 0x1000>; + clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&mb_clk24mhz>; + clock-names = "refclk", "timclk", "apb_pclk"; + #clock-cells = <1>; + clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3"; + assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_sysctl 3>, <&v2m_sysctl 3>; + assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>; + }; + + apbregs@10000 { + compatible = "syscon", "simple-mfd"; + reg = <0x010000 0x1000>; + + led0 { + compatible = "register-bit-led"; + offset = <0x08>; + mask = <0x01>; + label = "vexpress:0"; + linux,default-trigger = "heartbeat"; + default-state = "on"; + }; + led1 { + compatible = "register-bit-led"; + offset = <0x08>; + mask = <0x02>; + label = "vexpress:1"; + linux,default-trigger = "mmc0"; + default-state = "off"; + }; + led2 { + compatible = "register-bit-led"; + offset = <0x08>; + mask = <0x04>; + label = "vexpress:2"; + linux,default-trigger = "cpu0"; + default-state = "off"; + }; + led3 { + compatible = "register-bit-led"; + offset = <0x08>; + mask = <0x08>; + label = "vexpress:3"; + linux,default-trigger = "cpu1"; + default-state = "off"; + }; + led4 { + compatible = "register-bit-led"; + offset = <0x08>; + mask = <0x10>; + label = "vexpress:4"; + linux,default-trigger = "cpu2"; + default-state = "off"; + }; + led5 { + compatible = "register-bit-led"; + offset = <0x08>; + mask = <0x20>; + label = "vexpress:5"; + linux,default-trigger = "cpu3"; + default-state = "off"; + }; + led6 { + compatible = "register-bit-led"; + offset = <0x08>; + mask = <0x40>; + label = "vexpress:6"; + default-state = "off"; + }; + led7 { + compatible = "register-bit-led"; + offset = <0x08>; + mask = <0x80>; + label = "vexpress:7"; + default-state = "off"; + }; + }; + + mmc@50000 { + compatible = "arm,pl180", "arm,primecell"; + reg = <0x050000 0x1000>; + interrupts = <5>; + /* cd-gpios = <&v2m_mmc_gpios 0 0>; + wp-gpios = <&v2m_mmc_gpios 1 0>; */ + max-frequency = <12000000>; + vmmc-supply = <&mb_fixed_3v3>; + clocks = <&mb_clk24mhz>, <&soc_smc50mhz>; + clock-names = "mclk", "apb_pclk"; + }; + + kmi@60000 { + compatible = "arm,pl050", "arm,primecell"; + reg = <0x060000 0x1000>; + interrupts = <8>; + clocks = <&mb_clk24mhz>, <&soc_smc50mhz>; + clock-names = "KMIREFCLK", "apb_pclk"; + }; + + kmi@70000 { + compatible = "arm,pl050", "arm,primecell"; + reg = <0x070000 0x1000>; + interrupts = <8>; + clocks = <&mb_clk24mhz>, <&soc_smc50mhz>; + clock-names = "KMIREFCLK", "apb_pclk"; + }; + + watchdog@f0000 { + compatible = "arm,sp805", "arm,primecell"; + reg = <0x0f0000 0x10000>; + interrupts = <7>; + clocks = <&mb_clk24mhz>, <&soc_smc50mhz>; + clock-names = "wdog_clk", "apb_pclk"; + }; + + v2m_timer01: timer@110000 { + compatible = "arm,sp804", "arm,primecell"; + reg = <0x110000 0x10000>; + interrupts = <9>; + clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&mb_clk24mhz>; + clock-names = "timclken1", "timclken2", "apb_pclk"; + }; + + v2m_timer23: timer@120000 { + compatible = "arm,sp804", "arm,primecell"; + reg = <0x120000 0x10000>; + interrupts = <9>; + clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&mb_clk24mhz>; + clock-names = "timclken1", "timclken2", "apb_pclk"; + }; + + rtc@170000 { + compatible = "arm,pl031", "arm,primecell"; + reg = <0x170000 0x10000>; + interrupts = <0>; + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + }; + + iofpga_gpio0: gpio@1d0000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0x1d0000 0x1000>; + interrupts = <6>; + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + }; + }; +}; diff --git a/arch/arm/dts/juno-r2-u-boot.dtsi b/arch/arm/dts/juno-r2-u-boot.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..72790666bb8bbb1afb371665b35e6f52935cae16 --- /dev/null +++ b/arch/arm/dts/juno-r2-u-boot.dtsi @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * ARM Juno Platform additions for U-Boot + */ + +/ { + bus@8000000 { + motherboard-bus@8000000 { + /* + * This should not be marked "disabled" in U-Boot. The + * boot loader is not using some CPU idle states and + * hotplug but may be very interested in accessing the + * flash. + */ + flash@0 { + status = "okay"; + }; + }; + }; +}; diff --git a/arch/arm/dts/juno-r2.dts b/arch/arm/dts/juno-r2.dts new file mode 100644 index 0000000000000000000000000000000000000000..52a6517d1654b78fce84c7944b03fe0d19656629 --- /dev/null +++ b/arch/arm/dts/juno-r2.dts @@ -0,0 +1,322 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * ARM Ltd. Juno Platform + * + * Copyright (c) 2015 ARM Ltd. + * + * This file is licensed under a dual GPLv2 or BSD license. + */ + +/dts-v1/; + +#include +#include "juno-base.dtsi" +#include "juno-cs-r1r2.dtsi" + +/ { + model = "ARM Juno development board (r2)"; + compatible = "arm,juno-r2", "arm,juno", "arm,vexpress"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &soc_uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&A72_0>; + }; + core1 { + cpu = <&A72_1>; + }; + }; + + cluster1 { + core0 { + cpu = <&A53_0>; + }; + core1 { + cpu = <&A53_1>; + }; + core2 { + cpu = <&A53_2>; + }; + core3 { + cpu = <&A53_3>; + }; + }; + }; + + idle-states { + entry-method = "psci"; + + CPU_SLEEP_0: cpu-sleep-0 { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x0010000>; + local-timer-stop; + entry-latency-us = <300>; + exit-latency-us = <1200>; + min-residency-us = <2000>; + }; + + CLUSTER_SLEEP_0: cluster-sleep-0 { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x1010000>; + local-timer-stop; + entry-latency-us = <400>; + exit-latency-us = <1200>; + min-residency-us = <2500>; + }; + }; + + A72_0: cpu@0 { + compatible = "arm,cortex-a72"; + reg = <0x0 0x0>; + device_type = "cpu"; + enable-method = "psci"; + i-cache-size = <0xc000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; + next-level-cache = <&A72_L2>; + clocks = <&scpi_dvfs 0>; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <450>; + }; + + A72_1: cpu@1 { + compatible = "arm,cortex-a72"; + reg = <0x0 0x1>; + device_type = "cpu"; + enable-method = "psci"; + i-cache-size = <0xc000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; + next-level-cache = <&A72_L2>; + clocks = <&scpi_dvfs 0>; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <450>; + }; + + A53_0: cpu@100 { + compatible = "arm,cortex-a53"; + reg = <0x0 0x100>; + device_type = "cpu"; + enable-method = "psci"; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; + next-level-cache = <&A53_L2>; + clocks = <&scpi_dvfs 1>; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <485>; + dynamic-power-coefficient = <140>; + }; + + A53_1: cpu@101 { + compatible = "arm,cortex-a53"; + reg = <0x0 0x101>; + device_type = "cpu"; + enable-method = "psci"; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; + next-level-cache = <&A53_L2>; + clocks = <&scpi_dvfs 1>; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <485>; + dynamic-power-coefficient = <140>; + }; + + A53_2: cpu@102 { + compatible = "arm,cortex-a53"; + reg = <0x0 0x102>; + device_type = "cpu"; + enable-method = "psci"; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; + next-level-cache = <&A53_L2>; + clocks = <&scpi_dvfs 1>; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <485>; + dynamic-power-coefficient = <140>; + }; + + A53_3: cpu@103 { + compatible = "arm,cortex-a53"; + reg = <0x0 0x103>; + device_type = "cpu"; + enable-method = "psci"; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; + next-level-cache = <&A53_L2>; + clocks = <&scpi_dvfs 1>; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <485>; + dynamic-power-coefficient = <140>; + }; + + A72_L2: l2-cache0 { + compatible = "cache"; + cache-size = <0x200000>; + cache-line-size = <64>; + cache-sets = <2048>; + }; + + A53_L2: l2-cache1 { + compatible = "cache"; + cache-size = <0x100000>; + cache-line-size = <64>; + cache-sets = <1024>; + }; + }; + + pmu-a72 { + compatible = "arm,cortex-a72-pmu"; + interrupts = , + ; + interrupt-affinity = <&A72_0>, + <&A72_1>; + }; + + pmu-a53 { + compatible = "arm,cortex-a53-pmu"; + interrupts = , + , + , + ; + interrupt-affinity = <&A53_0>, + <&A53_1>, + <&A53_2>, + <&A53_3>; + }; +}; + +&memtimer { + status = "okay"; +}; + +&pcie_ctlr { + status = "okay"; +}; + +&smmu_pcie { + status = "okay"; +}; + +&etm0 { + cpu = <&A72_0>; +}; + +&etm1 { + cpu = <&A72_1>; +}; + +&etm2 { + cpu = <&A53_0>; +}; + +&etm3 { + cpu = <&A53_1>; +}; + +&etm4 { + cpu = <&A53_2>; +}; + +&etm5 { + cpu = <&A53_3>; +}; + +&big_cluster_thermal_zone { + status = "okay"; +}; + +&little_cluster_thermal_zone { + status = "okay"; +}; + +&gpu0_thermal_zone { + status = "okay"; +}; + +&gpu1_thermal_zone { + status = "okay"; +}; + +&etf0_out_port { + remote-endpoint = <&csys2_funnel_in_port0>; +}; + +&replicator_in_port0 { + remote-endpoint = <&csys2_funnel_out_port>; +}; + +&csys1_funnel_in_port0 { + remote-endpoint = <&stm_out_port>; +}; + +&stm_out_port { + remote-endpoint = <&csys1_funnel_in_port0>; +}; + +&cpu_debug0 { + cpu = <&A72_0>; +}; + +&cpu_debug1 { + cpu = <&A72_1>; +}; + +&cpu_debug2 { + cpu = <&A53_0>; +}; + +&cpu_debug3 { + cpu = <&A53_1>; +}; + +&cpu_debug4 { + cpu = <&A53_2>; +}; + +&cpu_debug5 { + cpu = <&A53_3>; +}; diff --git a/arch/arm/dts/k3-am642-r5-sk.dts b/arch/arm/dts/k3-am642-r5-sk.dts index 79eff8259f9402237141080ad5cc903074813727..71fcf61ff9fbd9ef8db3c439245caecb9b35ab02 100644 --- a/arch/arm/dts/k3-am642-r5-sk.dts +++ b/arch/arm/dts/k3-am642-r5-sk.dts @@ -5,6 +5,8 @@ /dts-v1/; +#include +#include #include "k3-am642.dtsi" #include "k3-am64-sk-lp4-1333MTs.dtsi" #include "k3-am64-ddr.dtsi" @@ -107,6 +109,13 @@ AM64X_IOPAD(0x029c, PIN_INPUT_PULLUP, 0) /* (C20) MMC1_SDWP */ >; }; + + main_usb0_pins_default: main-usb0-pins-default { + u-boot,dm-spl; + pinctrl-single,pins = < + AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */ + >; + }; }; &dmsc { @@ -142,4 +151,35 @@ pinctrl-0 = <&main_mmc1_pins_default>; }; +&serdes_ln_ctrl { + idle-states = ; +}; + +&serdes_wiz0 { + status = "okay"; +}; + +&serdes0 { + serdes0_usb_link: link@0 { + reg = <0>; + cdns,num-lanes = <1>; + #phy-cells = <0>; + cdns,phy-type = ; + resets = <&serdes_wiz0 1>; + }; +}; + +&usbss0 { + ti,vbus-divider; +}; + +&usb0 { + dr_mode = "host"; + maximum-speed = "super-speed"; + pinctrl-names = "default"; + pinctrl-0 = <&main_usb0_pins_default>; + phys = <&serdes0_usb_link>; + phy-names = "cdns3,usb3-phy"; +}; + #include "k3-am642-sk-u-boot.dtsi" diff --git a/arch/arm/dts/k3-am642-sk-u-boot.dtsi b/arch/arm/dts/k3-am642-sk-u-boot.dtsi index efbcfb36e92a44f111c128791593a25e6568cdce..95cf52c37fab27bf541eb3fb75b2ea275dc79f11 100644 --- a/arch/arm/dts/k3-am642-sk-u-boot.dtsi +++ b/arch/arm/dts/k3-am642-sk-u-boot.dtsi @@ -110,3 +110,36 @@ &cpsw_port2 { status = "disabled"; }; + +&main_usb0_pins_default { + u-boot,dm-spl; +}; + +&serdes_ln_ctrl { + u-boot,mux-autoprobe; +}; + +&usbss0 { + u-boot,dm-spl; +}; + +&usb0 { + dr_mode = "host"; + u-boot,dm-spl; +}; + +&serdes_wiz0 { + u-boot,dm-spl; +}; + +&serdes0_usb_link { + u-boot,dm-spl; +}; + +&serdes0 { + u-boot,dm-spl; +}; + +&serdes_refclk { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi b/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi index 69479d7b18e16c124cca72ced485231cb7b882a0..27058370cccbb0592e09419c558cb15b85e278ad 100644 --- a/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi +++ b/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi @@ -18,6 +18,7 @@ blob-ext@0x000000 { offset = <0x000000>; filename = "tiboot3.bin"; + missing-msg = "iot2050-seboot"; }; blob@0x080000 { @@ -153,21 +154,25 @@ blob-ext@0x6c0000 { offset = <0x6c0000>; filename = "sysfw.itb"; + missing-msg = "iot2050-sysfw"; }; /* PG1 sysfw, advanced variant */ blob-ext@0x740000 { offset = <0x740000>; filename = "sysfw.itb_HS"; + missing-msg = "iot2050-sysfw"; }; /* PG2 sysfw, basic variant */ blob-ext@0x7c0000 { offset = <0x7c0000>; filename = "sysfw_sr2.itb"; + missing-msg = "iot2050-sysfw"; }; /* PG2 sysfw, advanced variant */ blob-ext@0x840000 { offset = <0x840000>; filename = "sysfw_sr2.itb_HS"; + missing-msg = "iot2050-sysfw"; }; }; }; diff --git a/arch/arm/dts/ls1021a-tsn.dts b/arch/arm/dts/ls1021a-tsn.dts index 8e0f4eaf684a63fd8c6bba6dce0d5fc51c73ce80..68f5543644ea92d29987db353dba4e1c11ac301d 100644 --- a/arch/arm/dts/ls1021a-tsn.dts +++ b/arch/arm/dts/ls1021a-tsn.dts @@ -14,6 +14,81 @@ enet1-sgmii-phy = &sgmii_phy1; spi0 = &qspi; spi1 = &dspi1; + ethernet0 = &enet0; + ethernet1 = &enet1; + ethernet2 = &enet2; + ethernet3 = &swp2; + ethernet4 = &swp3; + ethernet5 = &swp4; + ethernet6 = &swp5; + }; +}; + +&dspi0 { + bus-num = <0>; + status = "okay"; + + sja1105: ethernet-switch@1 { + reg = <0x1>; + #address-cells = <1>; + #size-cells = <0>; + compatible = "nxp,sja1105t"; + /* 12 MHz */ + spi-max-frequency = <12000000>; + /* Sample data on trailing clock edge */ + spi-cpha; + /* SPI controller settings for SJA1105 timing requirements */ + fsl,spi-cs-sck-delay = <1000>; + fsl,spi-sck-cs-delay = <1000>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + swp5: port@0 { + /* ETH5 written on chassis */ + label = "swp5"; + phy-handle = <&rgmii_phy6>; + phy-mode = "rgmii-id"; + reg = <0>; + }; + + swp2: port@1 { + /* ETH2 written on chassis */ + label = "swp2"; + phy-handle = <&rgmii_phy3>; + phy-mode = "rgmii-id"; + reg = <1>; + }; + + swp3: port@2 { + /* ETH3 written on chassis */ + label = "swp3"; + phy-handle = <&rgmii_phy4>; + phy-mode = "rgmii-id"; + reg = <2>; + }; + + swp4: port@3 { + /* ETH4 written on chassis */ + label = "swp4"; + phy-handle = <&rgmii_phy5>; + phy-mode = "rgmii-id"; + reg = <3>; + }; + + port@4 { + /* Internal port connected to eth2 */ + ethernet = <&enet2>; + phy-mode = "rgmii"; + reg = <4>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; }; }; @@ -31,6 +106,17 @@ status = "okay"; }; +/* RGMII delays added via PCB traces */ +&enet2 { + phy-mode = "rgmii"; + status = "okay"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + &i2c0 { status = "okay"; }; @@ -46,6 +132,23 @@ reg = <0x2>; }; + /* BCM5464 quad PHY */ + rgmii_phy3: ethernet-phy@3 { + reg = <0x3>; + }; + + rgmii_phy4: ethernet-phy@4 { + reg = <0x4>; + }; + + rgmii_phy5: ethernet-phy@5 { + reg = <0x5>; + }; + + rgmii_phy6: ethernet-phy@6 { + reg = <0x6>; + }; + /* SGMII PCS for enet0 */ tbi0: tbi-phy@1f { reg = <0x1f>; diff --git a/arch/arm/dts/octeontx.dts b/arch/arm/dts/octeontx.dts new file mode 100644 index 0000000000000000000000000000000000000000..60a15f5df23fcec9bdcab0c2e9bc5135ba1e4f3a --- /dev/null +++ b/arch/arm/dts/octeontx.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Dummy devicetre file for octeontx2 boards + * + * This is required to make the board build with CONFIG OF_SEPARATE + * I could not find any in-tree documentation at all so this is a dummy file. + * + * Copyright 2021 Google LLC + */ + +/dts-v1/; + +/ { +}; diff --git a/arch/arm/dts/qemu-arm.dts b/arch/arm/dts/qemu-arm.dts new file mode 100644 index 0000000000000000000000000000000000000000..230c630f04fd0c5836cd50739d84928974abdee7 --- /dev/null +++ b/arch/arm/dts/qemu-arm.dts @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Empty device tree for qemu_arm + + * Copyright 2021 Google LLC + */ + +/dts-v1/; + +/ { +}; diff --git a/arch/arm/dts/qemu-arm64.dts b/arch/arm/dts/qemu-arm64.dts new file mode 100644 index 0000000000000000000000000000000000000000..096b3910728f754120da36b293796239eedd6dfd --- /dev/null +++ b/arch/arm/dts/qemu-arm64.dts @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Empty device tree for qemu_arm64 + + * Copyright 2021 Google LLC + */ + +/dts-v1/; + +/ { +}; diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi index e801331d80a14f85cf8f8c5472b82fb70cca3703..be44519934b9c998fa6cfe05bdde1eb9f3db3308 100644 --- a/arch/arm/dts/sam9x60.dtsi +++ b/arch/arm/dts/sam9x60.dtsi @@ -22,6 +22,7 @@ serial0 = &dbgu; gpio0 = &pioA; gpio1 = &pioB; + gpio2 = &pioC; gpio3 = &pioD; spi0 = &qspi; }; @@ -197,6 +198,14 @@ clocks = <&pmc PMC_TYPE_PERIPHERAL 3>; }; + pioC: gpio@fffff800 { + compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; + reg = <0xfffff800 0x200>; + #gpio-cells = <2>; + gpio-controller; + clocks = <&pmc PMC_TYPE_PERIPHERAL 4>; + }; + pioD: gpio@fffffa00 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffffa00 0x200>; diff --git a/arch/arm/dts/sama7g5-pinfunc.h b/arch/arm/dts/sama7g5-pinfunc.h index b5472fa4c9575233b9bb7a240b64b0ac53b497bf..38d6962d004281c2fa4cafa72018ff707984b961 100644 --- a/arch/arm/dts/sama7g5-pinfunc.h +++ b/arch/arm/dts/sama7g5-pinfunc.h @@ -765,7 +765,7 @@ #define PIN_PD20__PCK0 PINMUX_PIN(PIN_PD20, 1, 3) #define PIN_PD20__FLEXCOM2_IO3 PINMUX_PIN(PIN_PD20, 2, 2) #define PIN_PD20__PWMH3 PINMUX_PIN(PIN_PD20, 3, 4) -#define PIN_PD20__CANTX4 PINMUX_PIN(PIN_PD20, 5, 2) +#define PIN_PD20__CANTX4 PINMUX_PIN(PIN_PD20, 4, 2) #define PIN_PD20__FLEXCOM5_IO0 PINMUX_PIN(PIN_PD20, 6, 5) #define PIN_PD21 117 #define PIN_PD21__GPIO PINMUX_PIN(PIN_PD21, 0, 0) diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index b951aff43e23923786a4c6bdfd2b8b374de1c165..4a3c675d344b025259e7365ac4ea96827c821261 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -91,6 +91,32 @@ #clock-cells = <1>; }; + qspi0: spi@e080c000 { + compatible = "microchip,sama7g5-ospi"; + reg = <0xe080c000 0x400>, <0x20000000 0x10000000>; + reg-names = "qspi_base", "qspi_mmap"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 78>, <&pmc PMC_TYPE_GCK 78>; + clock-names = "pclk", "gclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 78>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div. */ + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + qspi1: spi@e0810000 { + compatible = "microchip,sama7g5-qspi"; + reg = <0xe0810000 0x400>, <0x30000000 0x10000000>; + reg-names = "qspi_base", "qspi_mmap"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 79>, <&pmc PMC_TYPE_GCK 79>; + clock-names = "pclk", "gclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 78>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div. */ + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + sdmmc0: sdio-host@e1204000 { compatible = "microchip,sama7g5-sdhci"; reg = <0xe1204000 0x300>; diff --git a/arch/arm/dts/sama7g5ek.dts b/arch/arm/dts/sama7g5ek.dts index 1c59a8aaf8fc7690a64479b4ae3e963cb011a4ce..16192ca0b15a0a6a242cb3ba91b987b2701e765d 100644 --- a/arch/arm/dts/sama7g5ek.dts +++ b/arch/arm/dts/sama7g5ek.dts @@ -11,6 +11,7 @@ #include #include "sama7g5.dtsi" #include "sama7g5-pinfunc.h" +#include / { model = "Microchip SAMA7G5 Evaluation Kit"; @@ -64,6 +65,24 @@ }; }; +&qspi0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_qspi>; + status = "okay"; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <133000000>; + spi-tx-bus-width = <8>; + spi-rx-bus-width = <8>; + m25p,fast-read; + + }; +}; + &flx1 { atmel,flexcom-mode = ; status = "okay"; @@ -126,6 +145,25 @@ bias-pull-up; }; + pinctrl_qspi: qspi { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + ; + bias-disable; + slew-rate = <0>; + atmel,drive-strength = ; + }; + pinctrl_sdmmc0_cmd_data_default: sdmmc0_cmd_data_default { pinmux = , , diff --git a/arch/arm/dts/stm32429i-eval-u-boot.dtsi b/arch/arm/dts/stm32429i-eval-u-boot.dtsi index 09d9d9ab9b6b92110ddcaae6fb01ace55a359a8b..fcab9ae9771a39b66062b603d20d41bde4eca2f0 100644 --- a/arch/arm/dts/stm32429i-eval-u-boot.dtsi +++ b/arch/arm/dts/stm32429i-eval-u-boot.dtsi @@ -33,7 +33,7 @@ fmc: fmc@A0000000 { compatible = "st,stm32-fmc"; - reg = <0xA0000000 0x1000>; + reg = <0xa0000000 0x1000>; clocks = <&rcc 0 STM32F4_AHB3_CLOCK(FMC)>; st,syscfg = <&syscfg>; pinctrl-0 = <&fmc_pins_d32>; diff --git a/arch/arm/dts/stm32746g-eval-u-boot.dtsi b/arch/arm/dts/stm32746g-eval-u-boot.dtsi index f2195a6c5170d553897cdb769eb1e136823839c9..8550ef78636d8f3d5b86440017e8c1aa0fd6d224 100644 --- a/arch/arm/dts/stm32746g-eval-u-boot.dtsi +++ b/arch/arm/dts/stm32746g-eval-u-boot.dtsi @@ -177,7 +177,7 @@ }; &qspi { - reg = <0xA0001000 0x1000>, <0x90000000 0x4000000>; + reg = <0xa0001000 0x1000>, <0x90000000 0x4000000>; qflash0: n25q512a@0 { #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/dts/stm32f429-disco-u-boot.dtsi b/arch/arm/dts/stm32f429-disco-u-boot.dtsi index 297cc561445d5fd52e2f847f821e6b4c65c83c59..c993f86be8382865036998ad0b435428e63de615 100644 --- a/arch/arm/dts/stm32f429-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f429-disco-u-boot.dtsi @@ -33,7 +33,7 @@ fmc: fmc@A0000000 { compatible = "st,stm32-fmc"; - reg = <0xA0000000 0x1000>; + reg = <0xa0000000 0x1000>; clocks = <&rcc 0 STM32F4_AHB3_CLOCK(FMC)>; pinctrl-0 = <&fmc_pins>; pinctrl-names = "default"; diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi b/arch/arm/dts/stm32f469-disco-u-boot.dtsi index 9eda8f535b76c5f5cc0443b82e281364da33f7f7..cd173623eff84fcdf348b0a3391df8dbebe36df2 100644 --- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi @@ -34,7 +34,7 @@ fmc: fmc@A0000000 { compatible = "st,stm32-fmc"; - reg = <0xA0000000 0x1000>; + reg = <0xa0000000 0x1000>; clocks = <&rcc 0 STM32F4_AHB3_CLOCK(FMC)>; st,syscfg = <&syscfg>; pinctrl-0 = <&fmc_pins_d32>; @@ -70,7 +70,7 @@ compatible = "st,stm32f469-qspi"; #address-cells = <1>; #size-cells = <0>; - reg = <0xA0001000 0x1000>, <0x90000000 0x10000000>; + reg = <0xa0001000 0x1000>, <0x90000000 0x10000000>; reg-names = "qspi", "qspi_mm"; interrupts = <91>; spi-max-frequency = <108000000>; @@ -236,7 +236,7 @@ }; &qspi { - reg = <0xA0001000 0x1000>, <0x90000000 0x1000000>; + reg = <0xa0001000 0x1000>, <0x90000000 0x1000000>; flash0: n25q128a@0 { #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/dts/stm32f7-u-boot.dtsi b/arch/arm/dts/stm32f7-u-boot.dtsi index 46bd1102df5a05c17be98cb2bc4e1bbe17d39415..c1b2ac25c316fe8762bfaf2e329cdb66486d6303 100644 --- a/arch/arm/dts/stm32f7-u-boot.dtsi +++ b/arch/arm/dts/stm32f7-u-boot.dtsi @@ -7,7 +7,7 @@ fmc: fmc@A0000000 { compatible = "st,stm32-fmc"; - reg = <0xA0000000 0x1000>; + reg = <0xa0000000 0x1000>; clocks = <&rcc 0 STM32F7_AHB3_CLOCK(FMC)>; pinctrl-0 = <&fmc_pins>; pinctrl-names = "default"; @@ -46,7 +46,7 @@ compatible = "st,stm32f469-qspi"; #address-cells = <1>; #size-cells = <0>; - reg = <0xA0001000 0x1000>, <0x90000000 0x10000000>; + reg = <0xa0001000 0x1000>, <0x90000000 0x10000000>; reg-names = "qspi", "qspi_mm"; interrupts = <92>; spi-max-frequency = <108000000>; diff --git a/arch/arm/dts/stm32f746-disco-u-boot.dtsi b/arch/arm/dts/stm32f746-disco-u-boot.dtsi index 4f34fc9a8cbeca92098e7e52e0b8fae389d5cacd..f88466fa60ee7b77a93c042a8db99e1141065768 100644 --- a/arch/arm/dts/stm32f746-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f746-disco-u-boot.dtsi @@ -228,7 +228,7 @@ }; &qspi { - reg = <0xA0001000 0x1000>, <0x90000000 0x1000000>; + reg = <0xa0001000 0x1000>, <0x90000000 0x1000000>; qflash0: n25q128a@0 { #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/dts/stm32f769-disco-u-boot.dtsi b/arch/arm/dts/stm32f769-disco-u-boot.dtsi index 7dfe430a40296633f6f1db6b7d5b75b498969e4d..5589b416522140e9db5744c0682d9be72533aebf 100644 --- a/arch/arm/dts/stm32f769-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f769-disco-u-boot.dtsi @@ -53,9 +53,9 @@ soc { dsi: dsi@40016c00 { compatible = "st,stm32-dsi"; - reg = <0x40016C00 0x800>; + reg = <0x40016c00 0x800>; resets = <&rcc STM32F7_APB2_RESET(DSI)>; - clocks = <&rcc 0 STM32F7_APB2_CLOCK(DSI)>, + clocks = <&rcc 0 STM32F7_APB2_CLOCK(DSI)>, <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>, <&clk_hse>; clock-names = "pclk", "px_clk", "ref"; @@ -227,7 +227,7 @@ }; &qspi { - reg = <0xA0001000 0x1000>, <0x90000000 0x4000000>; + reg = <0xa0001000 0x1000>, <0x90000000 0x4000000>; flash0: mx66l51235l@0 { #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/dts/stm32mp15-ddr.dtsi b/arch/arm/dts/stm32mp15-ddr.dtsi index 2a139c54e902a468e436179c5bc86e81e012262d..0aac9131a602fbec940a2350d9f9e9dfacb13348 100644 --- a/arch/arm/dts/stm32mp15-ddr.dtsi +++ b/arch/arm/dts/stm32mp15-ddr.dtsi @@ -116,24 +116,6 @@ DDR_MR3 >; -#ifdef DDR_PHY_CAL_SKIP - st,phy-cal = < - DDR_DX0DLLCR - DDR_DX0DQTR - DDR_DX0DQSTR - DDR_DX1DLLCR - DDR_DX1DQTR - DDR_DX1DQSTR - DDR_DX2DLLCR - DDR_DX2DQTR - DDR_DX2DQSTR - DDR_DX3DLLCR - DDR_DX3DQTR - DDR_DX3DQSTR - >; - -#endif - status = "okay"; }; }; @@ -224,18 +206,6 @@ #undef DDR_ODTCR #undef DDR_ZQ0CR1 #undef DDR_DX0GCR -#undef DDR_DX0DLLCR -#undef DDR_DX0DQTR -#undef DDR_DX0DQSTR #undef DDR_DX1GCR -#undef DDR_DX1DLLCR -#undef DDR_DX1DQTR -#undef DDR_DX1DQSTR #undef DDR_DX2GCR -#undef DDR_DX2DLLCR -#undef DDR_DX2DQTR -#undef DDR_DX2DQSTR #undef DDR_DX3GCR -#undef DDR_DX3DLLCR -#undef DDR_DX3DQTR -#undef DDR_DX3DQSTR diff --git a/arch/arm/dts/stm32mp15-ddr3-1x4Gb-1066-binG.dtsi b/arch/arm/dts/stm32mp15-ddr3-1x4Gb-1066-binG.dtsi index 978331b279d7afd11a161714d830f82aefe6574c..e60d0ae6066f288fdd69207827455b9d3cebe3d9 100644 --- a/arch/arm/dts/stm32mp15-ddr3-1x4Gb-1066-binG.dtsi +++ b/arch/arm/dts/stm32mp15-ddr3-1x4Gb-1066-binG.dtsi @@ -100,20 +100,8 @@ #define DDR_ODTCR 0x00010000 #define DDR_ZQ0CR1 0x00000038 #define DDR_DX0GCR 0x0000CE81 -#define DDR_DX0DLLCR 0x40000000 -#define DDR_DX0DQTR 0xFFFFFFFF -#define DDR_DX0DQSTR 0x3DB02000 #define DDR_DX1GCR 0x0000CE81 -#define DDR_DX1DLLCR 0x40000000 -#define DDR_DX1DQTR 0xFFFFFFFF -#define DDR_DX1DQSTR 0x3DB02000 #define DDR_DX2GCR 0x0000CE80 -#define DDR_DX2DLLCR 0x40000000 -#define DDR_DX2DQTR 0xFFFFFFFF -#define DDR_DX2DQSTR 0x3DB02000 #define DDR_DX3GCR 0x0000CE80 -#define DDR_DX3DLLCR 0x40000000 -#define DDR_DX3DQTR 0xFFFFFFFF -#define DDR_DX3DQSTR 0x3DB02000 #include "stm32mp15-ddr.dtsi" diff --git a/arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi b/arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi index 426be21f42e694ada1e7c5061de6513bccc85420..1a6fa80edf4f96873b74079c451123a964fbb692 100644 --- a/arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi +++ b/arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi @@ -100,20 +100,8 @@ #define DDR_ODTCR 0x00010000 #define DDR_ZQ0CR1 0x00000038 #define DDR_DX0GCR 0x0000CE81 -#define DDR_DX0DLLCR 0x40000000 -#define DDR_DX0DQTR 0xFFFFFFFF -#define DDR_DX0DQSTR 0x3DB02000 #define DDR_DX1GCR 0x0000CE81 -#define DDR_DX1DLLCR 0x40000000 -#define DDR_DX1DQTR 0xFFFFFFFF -#define DDR_DX1DQSTR 0x3DB02000 #define DDR_DX2GCR 0x0000CE81 -#define DDR_DX2DLLCR 0x40000000 -#define DDR_DX2DQTR 0xFFFFFFFF -#define DDR_DX2DQSTR 0x3DB02000 #define DDR_DX3GCR 0x0000CE81 -#define DDR_DX3DLLCR 0x40000000 -#define DDR_DX3DQTR 0xFFFFFFFF -#define DDR_DX3DQSTR 0x3DB02000 #include "stm32mp15-ddr.dtsi" diff --git a/arch/arm/dts/stm32mp15-ddr3-dhsom-2x1Gb-1066-binG.dtsi b/arch/arm/dts/stm32mp15-ddr3-dhsom-2x1Gb-1066-binG.dtsi index b3eb280f96835eb83e8a52cc40042f8dbafaeee2..0a277cd6751cc6979ea330e5865832d3ed7092c1 100644 --- a/arch/arm/dts/stm32mp15-ddr3-dhsom-2x1Gb-1066-binG.dtsi +++ b/arch/arm/dts/stm32mp15-ddr3-dhsom-2x1Gb-1066-binG.dtsi @@ -101,20 +101,8 @@ #define DDR_ODTCR 0x00010000 #define DDR_ZQ0CR1 0x00000038 #define DDR_DX0GCR 0x0000CE81 -#define DDR_DX0DLLCR 0x40000000 -#define DDR_DX0DQTR 0xFFFFFFFF -#define DDR_DX0DQSTR 0x3DB02000 #define DDR_DX1GCR 0x0000CE81 -#define DDR_DX1DLLCR 0x40000000 -#define DDR_DX1DQTR 0xFFFFFFFF -#define DDR_DX1DQSTR 0x3DB02000 #define DDR_DX2GCR 0x0000CE81 -#define DDR_DX2DLLCR 0x40000000 -#define DDR_DX2DQTR 0xFFFFFFFF -#define DDR_DX2DQSTR 0x3DB02000 #define DDR_DX3GCR 0x0000CE81 -#define DDR_DX3DLLCR 0x40000000 -#define DDR_DX3DQTR 0xFFFFFFFF -#define DDR_DX3DQSTR 0x3DB02000 #include "stm32mp15-ddr.dtsi" diff --git a/arch/arm/dts/stm32mp15-ddr3-dhsom-2x2Gb-1066-binG.dtsi b/arch/arm/dts/stm32mp15-ddr3-dhsom-2x2Gb-1066-binG.dtsi index ed3a5248f88c10365f07a4d7c0fd38f34f47186f..92774fffb95c5469765fceae872c4c7afe48776a 100644 --- a/arch/arm/dts/stm32mp15-ddr3-dhsom-2x2Gb-1066-binG.dtsi +++ b/arch/arm/dts/stm32mp15-ddr3-dhsom-2x2Gb-1066-binG.dtsi @@ -101,20 +101,8 @@ #define DDR_ODTCR 0x00010000 #define DDR_ZQ0CR1 0x00000038 #define DDR_DX0GCR 0x0000CE81 -#define DDR_DX0DLLCR 0x40000000 -#define DDR_DX0DQTR 0xFFFFFFFF -#define DDR_DX0DQSTR 0x3DB02000 #define DDR_DX1GCR 0x0000CE81 -#define DDR_DX1DLLCR 0x40000000 -#define DDR_DX1DQTR 0xFFFFFFFF -#define DDR_DX1DQSTR 0x3DB02000 #define DDR_DX2GCR 0x0000CE81 -#define DDR_DX2DLLCR 0x40000000 -#define DDR_DX2DQTR 0xFFFFFFFF -#define DDR_DX2DQSTR 0x3DB02000 #define DDR_DX3GCR 0x0000CE81 -#define DDR_DX3DLLCR 0x40000000 -#define DDR_DX3DQTR 0xFFFFFFFF -#define DDR_DX3DQSTR 0x3DB02000 #include "stm32mp15-ddr.dtsi" diff --git a/arch/arm/dts/stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi b/arch/arm/dts/stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi index d5813d64b0b8bc457b46faecc5bb17aa5ae4810a..e53ab18a6930f85f16aaa0752bb318e17a8ed41e 100644 --- a/arch/arm/dts/stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi +++ b/arch/arm/dts/stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi @@ -101,20 +101,8 @@ #define DDR_ODTCR 0x00010000 #define DDR_ZQ0CR1 0x00000038 #define DDR_DX0GCR 0x0000CE81 -#define DDR_DX0DLLCR 0x40000000 -#define DDR_DX0DQTR 0xFFFFFFFF -#define DDR_DX0DQSTR 0x3DB02000 #define DDR_DX1GCR 0x0000CE81 -#define DDR_DX1DLLCR 0x40000000 -#define DDR_DX1DQTR 0xFFFFFFFF -#define DDR_DX1DQSTR 0x3DB02000 #define DDR_DX2GCR 0x0000CE81 -#define DDR_DX2DLLCR 0x40000000 -#define DDR_DX2DQTR 0xFFFFFFFF -#define DDR_DX2DQSTR 0x3DB02000 #define DDR_DX3GCR 0x0000CE81 -#define DDR_DX3DLLCR 0x40000000 -#define DDR_DX3DQTR 0xFFFFFFFF -#define DDR_DX3DQSTR 0x3DB02000 #include "stm32mp15-ddr.dtsi" diff --git a/arch/arm/dts/stm32mp15-ddr3-icore-1x4Gb-1066-binG.dtsi b/arch/arm/dts/stm32mp15-ddr3-icore-1x4Gb-1066-binG.dtsi index 24c81269b09489f0642a83cdf8ddf5abf7b95a8e..ff582ac6af9a071dbfed227a8db2f7cb34d19651 100644 --- a/arch/arm/dts/stm32mp15-ddr3-icore-1x4Gb-1066-binG.dtsi +++ b/arch/arm/dts/stm32mp15-ddr3-icore-1x4Gb-1066-binG.dtsi @@ -100,20 +100,8 @@ #define DDR_ODTCR 0x00010000 #define DDR_ZQ0CR1 0x00000038 #define DDR_DX0GCR 0x0000CE81 -#define DDR_DX0DLLCR 0x40000000 -#define DDR_DX0DQTR 0xFFFFFFFF -#define DDR_DX0DQSTR 0x3DB02000 #define DDR_DX1GCR 0x0000CE81 -#define DDR_DX1DLLCR 0x40000000 -#define DDR_DX1DQTR 0xFFFFFFFF -#define DDR_DX1DQSTR 0x3DB02000 #define DDR_DX2GCR 0x0000CE81 -#define DDR_DX2DLLCR 0x40000000 -#define DDR_DX2DQTR 0xFFFFFFFF -#define DDR_DX2DQSTR 0x3DB02000 #define DDR_DX3GCR 0x0000CE81 -#define DDR_DX3DLLCR 0x40000000 -#define DDR_DX3DQTR 0xFFFFFFFF -#define DDR_DX3DQSTR 0x3DB02000 #include "stm32mp15-ddr.dtsi" diff --git a/arch/arm/dts/stm32mp15-u-boot.dtsi b/arch/arm/dts/stm32mp15-u-boot.dtsi index db23d80eef8c2bee328ee6fbb27b52d3f9457e99..e23d6c7d7ebf145fb165ae4f945c8e0a6df55d77 100644 --- a/arch/arm/dts/stm32mp15-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15-u-boot.dtsi @@ -50,8 +50,8 @@ compatible = "st,stm32mp1-ddr"; - reg = <0x5A003000 0x550 - 0x5A004000 0x234>; + reg = <0x5a003000 0x550 + 0x5a004000 0x234>; clocks = <&rcc AXIDCG>, <&rcc DDRC1>, @@ -237,7 +237,7 @@ u-boot-stm32 { filename = "u-boot.stm32"; mkimage { - args = "-T stm32image -a 0xC0100000 -e 0xC0100000"; + args = "-T stm32image -a 0xc0100000 -e 0xc0100000"; u-boot { }; }; @@ -250,7 +250,7 @@ spl-stm32 { filename = "u-boot-spl.stm32"; mkimage { - args = "-T stm32image -a 0x2FFC2500 -e 0x2FFC2500"; + args = "-T stm32image -a 0x2ffc2500 -e 0x2ffc2500"; u-boot-spl { }; }; diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi index 71b0486f02a940d7c9fb0f2b44eefbccae9ca28e..5b2b09bcfb9e63c39bac81157b5ecb240d7dca97 100644 --- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi @@ -216,6 +216,10 @@ &sdmmc1 { u-boot,dm-spl; + st,use-ckin; + st,cmd-gpios = <&gpiod 2 0>; + st,ck-gpios = <&gpioc 12 0>; + st,ckin-gpios = <&gpioe 4 0>; }; &sdmmc1_b4_pins_a { diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi index 4b1dbf0838752edaf8125b9ad9e07bfa619a0962..c96eba99c5ee1ee5f94c1dd812cdc116ce7d9622 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi @@ -32,6 +32,10 @@ &sdmmc1 { u-boot,dm-spl; + st,use-ckin; + st,cmd-gpios = <&gpiod 2 0>; + st,ck-gpios = <&gpioc 12 0>; + st,ckin-gpios = <&gpioe 4 0>; }; &sdmmc1_b4_pins_a { diff --git a/arch/arm/dts/xenguest-arm64.dts b/arch/arm/dts/xenguest-arm64.dts new file mode 100644 index 0000000000000000000000000000000000000000..d8734433763cc9edad66acc233f6880bfca7a8ad --- /dev/null +++ b/arch/arm/dts/xenguest-arm64.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Empty devicetree file for xenguest_arm64 + * + * This is required to make the board build with CONFIG OF_SEPARATE + * Build instructions at xenguest_arm64.rst are inadequate for obtaining a real + * devicetree. + * + * Copyright 2021 Google LLC + */ + +/dts-v1/; + +/ { +}; diff --git a/arch/arm/dts/xilinx-versal-virt.dts b/arch/arm/dts/xilinx-versal-virt.dts new file mode 100644 index 0000000000000000000000000000000000000000..733e532f9874e8f93e3bda5f14684c9af6baccce --- /dev/null +++ b/arch/arm/dts/xilinx-versal-virt.dts @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Empty device tree for versal-virt board + * + * Copyright 2021 Google LLC + */ + +/dts-v1/; + +/ { +}; diff --git a/arch/arm/include/asm/arch-aspeed/platform.h b/arch/arm/include/asm/arch-aspeed/platform.h index d50ec5f8a9f4b4c2136a53d3734f8177203f233a..589abd4a3f6fd95d1421e893d9710697412bb5c8 100644 --- a/arch/arm/include/asm/arch-aspeed/platform.h +++ b/arch/arm/include/asm/arch-aspeed/platform.h @@ -17,7 +17,7 @@ #define ASPEED_MAC_COUNT 4 #define ASPEED_DRAM_BASE 0x80000000 #define ASPEED_SRAM_BASE 0x10000000 -#define ASPEED_SRAM_SIZE 0x10000 +#define ASPEED_SRAM_SIZE 0x16000 #else #err "Unrecognized Aspeed platform." #endif diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2600.h b/arch/arm/include/asm/arch-aspeed/scu_ast2600.h index a205fb1f762c821f657a3f9bbcfea0681c5e9a83..7c5aab98b636104a1cbf0abbf3892b23d0ff73b9 100644 --- a/arch/arm/include/asm/arch-aspeed/scu_ast2600.h +++ b/arch/arm/include/asm/arch-aspeed/scu_ast2600.h @@ -8,10 +8,12 @@ #define SCU_UNLOCK_KEY 0x1688a8a8 #define SCU_CLKGATE1_EMMC BIT(27) +#define SCU_CLKGATE1_ACRY BIT(24) #define SCU_CLKGATE1_MAC2 BIT(21) #define SCU_CLKGATE1_MAC1 BIT(20) -#define SCU_CLKGATE1_USB_HUB BIT(14) -#define SCU_CLKGATE1_USB_HOST2 BIT(7) +#define SCU_CLKGATE1_USB_HUB BIT(14) +#define SCU_CLKGATE1_HACE BIT(13) +#define SCU_CLKGATE1_USB_HOST2 BIT(7) #define SCU_CLKGATE2_FSI BIT(30) #define SCU_CLKGATE2_MAC4 BIT(21) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index 733373ecf0b1df3a7d39d19bc4804dc1604493a3..1315bebb56f7c76155a2841ba501b445198f2445 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -234,7 +234,6 @@ #elif defined(CONFIG_ARCH_LS1028A) #define CONFIG_SYS_FSL_NUM_CC_PLLS 3 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1 } -#define CONFIG_FSL_TZPC_BP147 #define CONFIG_FSL_TZASC_400 /* TZ Protection Controller Definitions */ diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index c9be0768e34fb1b154ac2ba530518fef20e3320e..06adf669390f2041011978141ac6bf70d85c8a45 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -11,7 +11,6 @@ #include #endif -#define CONFIG_SYS_IMMR 0x01000000 #define CONFIG_SYS_DCSRBAR 0x20000000 #define CONFIG_SYS_DCSR_DCFG_ADDR (CONFIG_SYS_DCSRBAR + 0x00140000) #define CONFIG_SYS_DCSR_COP_CCP_ADDR (CONFIG_SYS_DCSRBAR + 0x02008040) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index b64d7fbc1b38018d91ee6699658b8e34f3c52511..863618a5f3d0a65a00eeb96946b5cb5f9e9b4f88 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -9,7 +9,6 @@ #ifndef __ARCH_FSL_LSCH3_IMMAP_H_ #define __ARCH_FSL_LSCH3_IMMAP_H_ -#define CONFIG_SYS_IMMR 0x01000000 #define CONFIG_SYS_FSL_DDR_ADDR (CONFIG_SYS_IMMR + 0x00080000) #define CONFIG_SYS_FSL_DDR2_ADDR (CONFIG_SYS_IMMR + 0x00090000) #define CONFIG_SYS_FSL_DDR3_ADDR 0x08210000 diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index 3884948a2c550a0a69f25091384489be1645f645..0e1f9e0c0d8c11d3a1d60c825e59ae9d383c0aec 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -11,7 +11,6 @@ #define OCRAM_BASE_S_ADDR 0x10010000 #define OCRAM_S_SIZE 0x00010000 -#define CONFIG_SYS_IMMR 0x01000000 #define CONFIG_SYS_DCSRBAR 0x20000000 #define CONFIG_SYS_DCSR_DCFG_ADDR (CONFIG_SYS_DCSRBAR + 0x00220000) diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S index 956d258c9da476cd10545dac70a45cbe3df8407b..ba312901f33172ca57d316dd009160e8d320b23c 100644 --- a/arch/arm/lib/crt0.S +++ b/arch/arm/lib/crt0.S @@ -109,6 +109,10 @@ ENTRY(_main) mov r9, r0 bl board_init_f_init_reserve +#if defined(CONFIG_DEBUG_UART) && CONFIG_IS_ENABLED(SERIAL) + bl debug_uart_init +#endif + #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_EARLY_BSS) CLEAR_BSS #endif diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S index 28c8356aeea2ead21e1c8825a61080c30d9ddcc4..84c04bd43a2db565154cea2fb79f8f48b11baaba 100644 --- a/arch/arm/lib/crt0_64.S +++ b/arch/arm/lib/crt0_64.S @@ -91,6 +91,10 @@ ENTRY(_main) mov x18, x0 bl board_init_f_init_reserve +#if defined(CONFIG_DEBUG_UART) && CONFIG_IS_ENABLED(SERIAL) + bl debug_uart_init +#endif + mov x0, #0 bl board_init_f diff --git a/arch/arm/mach-apple/Kconfig b/arch/arm/mach-apple/Kconfig index 66cab91b2a3870850e7d41e50c0e1ffb09d46d49..80e8eb23079542b5da7eb3db42e9a362d0e97072 100644 --- a/arch/arm/mach-apple/Kconfig +++ b/arch/arm/mach-apple/Kconfig @@ -15,4 +15,7 @@ config SYS_MALLOC_LEN config SYS_MALLOC_F_LEN default 0x4000 +config LNX_KRNL_IMG_TEXT_OFFSET_BASE + default SYS_TEXT_BASE + endif diff --git a/arch/arm/mach-aspeed/ast2600/spl.c b/arch/arm/mach-aspeed/ast2600/spl.c index 0d8cb29678b2f76bacac3c9caf4aa29cf8ad6567..6c49d6aede87830f2a91deff7d9adb336add4033 100644 --- a/arch/arm/mach-aspeed/ast2600/spl.c +++ b/arch/arm/mach-aspeed/ast2600/spl.c @@ -28,14 +28,7 @@ u32 spl_boot_device(void) struct image_header *spl_get_load_buffer(ssize_t offset, size_t size) { - /* - * When boot from SPI, AST2600 already remap 0x00000000 ~ 0x0fffffff - * to BMC SPI memory space 0x20000000 ~ 0x2fffffff. The next stage BL - * has been located in SPI for XIP. In this case, the load buffer for - * SPL image loading will be set to the remapped address of the next - * BL instead of the DRAM space CONFIG_SYS_LOAD_ADDR - */ - return (struct image_header *)(CONFIG_SYS_TEXT_BASE); + return (struct image_header *)(CONFIG_SYS_LOAD_ADDR); } #ifdef CONFIG_SPL_OS_BOOT diff --git a/arch/arm/mach-at91/arm926ejs/Makefile b/arch/arm/mach-at91/arm926ejs/Makefile index 8de6a2f9661e00857870b18b6c2fdd658ae19c53..c1904d535be28b95a1a951e1c61754a22b7de053 100644 --- a/arch/arm/mach-at91/arm926ejs/Makefile +++ b/arch/arm/mach-at91/arm926ejs/Makefile @@ -20,8 +20,11 @@ obj-$(CONFIG_AT91_LED) += led.o obj-y += clock.o obj-y += cpu.o obj-y += reset.o -ifeq ($(CONFIG_ATMEL_PIT_TIMER),) -obj-y += timer.o +ifneq ($(CONFIG_ATMEL_PIT_TIMER),y) +ifneq ($(CONFIG_MCHP_PIT64B_TIMER),y) +# old non-DM timer driver +obj-y += timer.o +endif endif ifndef CONFIG_SKIP_LOWLEVEL_INIT diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig index b3287ce8bcea9d6cf5af272ba08bc7dd44e559b1..6ce278c6d29678c7062f406530ffc8fb26bd4fa7 100644 --- a/arch/arm/mach-bcm283x/Kconfig +++ b/arch/arm/mach-bcm283x/Kconfig @@ -163,6 +163,7 @@ config TARGET_RPI_4_32B This option creates a build targeting the ARMv7/AArch32 ISA. select BCM2711_32B + imply OF_HAS_PRIOR_STAGE config TARGET_RPI_4 bool "Raspberry Pi 4 64-bit build" @@ -188,6 +189,7 @@ config TARGET_RPI_4 This option creates a build targeting the ARMv8/AArch64 ISA. select BCM2711_64B + imply OF_HAS_PRIOR_STAGE config TARGET_RPI_ARM64 bool "Raspberry Pi one binary 64-bit build" @@ -195,6 +197,7 @@ config TARGET_RPI_ARM64 Support for all armv8 based Raspberry Pi variants, such as the RPi 4 model B, in AArch64 (64-bit) mode. select ARM64 + imply OF_HAS_PRIOR_STAGE endchoice diff --git a/arch/arm/mach-davinci/cpu.c b/arch/arm/mach-davinci/cpu.c index aefd21dc458a4ac5b505714939bb3e23eda6c956..0f68f9fe59e5377b42e1a331dcd26b26004850ad 100644 --- a/arch/arm/mach-davinci/cpu.c +++ b/arch/arm/mach-davinci/cpu.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include @@ -91,3 +92,8 @@ int set_cpu_clk_info(void) gd->bd->bi_dsp_freq = 0; return 0; } + +unsigned long get_board_sys_clk(void) +{ + return clk_get(DAVINCI_ARM_CLKID); +} diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 7f3aee57129041dadcb1b382c111a857a549b6e5..10301c10888e0890f565cf30a22f7fabd7d00e96 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -23,6 +23,7 @@ config ARCH_EXYNOS5 imply CMD_HASH imply CRC32_VERIFY imply HASH_VERIFY + imply KEYBOARD imply USB_ETHER_ASIX imply USB_ETHER_RTL8152 imply USB_ETHER_SMSC95XX diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c index ef48d35aa4c216be628188c5b2cb1071422a5ae9..99bca549b604de0a5c3e6c4dd265f02cdd76acf0 100644 --- a/arch/arm/mach-exynos/clock.c +++ b/arch/arm/mach-exynos/clock.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include @@ -136,7 +137,7 @@ static int exynos_get_pll_clk(int pllreg, unsigned int r, unsigned int k) /* SDIV [2:0] */ s = r & 0x7; - freq = CONFIG_SYS_CLK_FREQ; + freq = get_board_sys_clk(); if (pllreg == EPLL || pllreg == RPLL) { k = k & 0xffff; @@ -1051,7 +1052,7 @@ static unsigned long exynos5800_get_lcd_clk(void) RPLL}; sclk = get_pll_clk(reg_map[sel]); } else - sclk = CONFIG_SYS_CLK_FREQ; + sclk = get_board_sys_clk(); /* * CLK_DIV_DISP10 * FIMD1_RATIO [3:0] diff --git a/arch/arm/mach-imx/imxrt/Kconfig b/arch/arm/mach-imx/imxrt/Kconfig index d275fdf72e5431aa874be85c142be8ce6b346304..8c891339657e28c2d9cf679c1949009b6943c2f0 100644 --- a/arch/arm/mach-imx/imxrt/Kconfig +++ b/arch/arm/mach-imx/imxrt/Kconfig @@ -2,6 +2,7 @@ if ARCH_IMXRT config IMXRT bool + select SYS_FSL_ERRATUM_ESDHC135 config IMXRT1020 bool diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig index cb4e9f29ef6dcc8fdd47f71c6a8514a9880000ab..c060cc8546b6fa78efbd01db8f8afb4072f6ad33 100644 --- a/arch/arm/mach-kirkwood/Kconfig +++ b/arch/arm/mach-kirkwood/Kconfig @@ -1,66 +1,115 @@ if ARCH_KIRKWOOD +config FEROCEON_88FR131 + bool + +config KW88F6192 + bool + +config KW88F6281 + bool + +config SHEEVA_88SV131 + bool + choice prompt "Marvell Kirkwood board select" optional config TARGET_OPENRD bool "Marvell OpenRD Board" + select KW88F6281 + select SHEEVA_88SV131 config TARGET_DREAMPLUG bool "DreamPlug Board" + select KW88F6281 + select SHEEVA_88SV131 config TARGET_DS109 bool "Synology DS109" + select KW88F6281 + select SHEEVA_88SV131 config TARGET_GURUPLUG bool "GuruPlug Board" + select KW88F6281 + select SHEEVA_88SV131 config TARGET_SHEEVAPLUG bool "SheevaPlug Board" + select FEROCEON_88FR131 + select KW88F6281 config TARGET_LSXL bool "lsxl Board" + select FEROCEON_88FR131 + select KW88F6281 config TARGET_POGO_E02 bool "pogo_e02 Board" + select FEROCEON_88FR131 + select KW88F6281 config TARGET_DNS325 bool "dns325 Board" + select FEROCEON_88FR131 + select KW88F6281 config TARGET_ICONNECT bool "iconnect Board" + select FEROCEON_88FR131 + select KW88F6281 config TARGET_KM_KIRKWOOD bool "KM Kirkwood Board" + select FEROCEON_88FR131 + select KW88F6281 select VENDOR_KM config TARGET_NET2BIG_V2 bool "LaCie 2Big Network v2 NAS Board" + select FEROCEON_88FR131 + select KW88F6281 config TARGET_NETSPACE_V2 bool "LaCie netspace_v2 Board" + select FEROCEON_88FR131 config TARGET_IB62X0 bool "ib62x0 Board" + select FEROCEON_88FR131 + select KW88F6281 config TARGET_DOCKSTAR bool "Dockstar Board" + select FEROCEON_88FR131 + select KW88F6281 config TARGET_GOFLEXHOME bool "GoFlex Home Board" + select FEROCEON_88FR131 + select KW88F6281 config TARGET_NAS220 bool "BlackArmor NAS220" + select FEROCEON_88FR131 + select KW88F6192 config TARGET_NSA310S bool "Zyxel NSA310S" + select FEROCEON_88FR131 + select KW88F6192 config TARGET_SBx81LIFKW bool "Allied Telesis SBx81GS24/SBx81GT40/SBx81XS6/SBx81XS16" + select FEROCEON_88FR131 + select KW88F6281 config TARGET_SBx81LIFXCAT bool "Allied Telesis SBx81GP24/SBx81GT24" + select FEROCEON_88FR131 + select KW88F6281 endchoice diff --git a/arch/arm/mach-kirkwood/include/mach/config.h b/arch/arm/mach-kirkwood/include/mach/config.h index cf6b1b9b63473f782ab7f0683763d22f865781e3..eb9502361eef03f910df1e4f6735c63e7562cad8 100644 --- a/arch/arm/mach-kirkwood/include/mach/config.h +++ b/arch/arm/mach-kirkwood/include/mach/config.h @@ -27,15 +27,6 @@ #define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ #define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 for kernel */ -/* - * By default kwbimage.cfg from board specific folder is used - * If for some board, different configuration file need to be used, - * CONFIG_SYS_KWD_CONFIG should be defined in board specific header file - */ -#ifndef CONFIG_SYS_KWD_CONFIG -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg -#endif /* CONFIG_SYS_KWD_CONFIG */ - /* Kirkwood has 2k of Security SRAM, use it for SP */ #define CONFIG_SYS_INIT_SP_ADDR 0xC8012000 @@ -67,8 +58,6 @@ */ #ifdef CONFIG_IDE #define __io -/* Needs byte-swapping for ATA data register */ -#define CONFIG_IDE_SWAP_IO /* Data, registers and alternate blocks are at the same offset */ #define CONFIG_SYS_ATA_DATA_OFFSET (0x0100) #define CONFIG_SYS_ATA_REG_OFFSET (0x0100) diff --git a/arch/arm/mach-mvebu/include/mach/config.h b/arch/arm/mach-mvebu/include/mach/config.h index 6ecd394a533d56266e208e4a5e7f84929e35d81b..681f64961f0b3533f7e7f146e9d7a55f360d745b 100644 --- a/arch/arm/mach-mvebu/include/mach/config.h +++ b/arch/arm/mach-mvebu/include/mach/config.h @@ -27,15 +27,6 @@ #define CONFIG_SYS_L2_PL310 -/* - * By default the generated mvebu kwbimage.cfg is used - * If for some board, different configuration file need to be used, - * CONFIG_SYS_KWD_CONFIG should be defined in board specific header file - */ -#ifndef CONFIG_SYS_KWD_CONFIG -#define CONFIG_SYS_KWD_CONFIG arch/arm/mach-mvebu/kwbimage.cfg -#endif /* CONFIG_SYS_KWD_CONFIG */ - /* end of 16M scrubbed by training in bootrom */ #define CONFIG_SYS_INIT_SP_ADDR 0x00FF0000 diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c index d2bc3ab25c3ffa08d4a0fea4bef9cb7fa738e842..9ba60b57aac8f432ff650465d8cbf4fafdb760a5 100644 --- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c +++ b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c @@ -459,18 +459,41 @@ struct op_params usb3_electrical_config_serdes_rev1_params[] = { }; struct op_params usb3_electrical_config_serdes_rev2_params[] = { - /* Spread Spectrum Clock Enable */ - {LANE_CFG4_REG, 0x800, 0x80, {0x80}, 0, 0}, + /* Spread Spectrum Clock Enable, CFG_DFE_OVERRIDE and PIN_DFE_PAT_DIS */ + {LANE_CFG4_REG, 0x800, 0xc2, {0xc0}, 0, 0}, + /* CFG_SQ_DET_SEL and CFG_RX_INIT_SEL */ + {LANE_CFG5_REG, 0x800, 0x3, {0x3}, 0, 0}, /* G2_TX_SSC_AMP[6:0]=4.5k_p_pM and TX emphasis mode=m_v */ {G2_SETTINGS_2_REG, 0x800, 0xfe40, {0x4440}, 0, 0}, - /* G2_RX SELMUFF, SELMUFI, SELMUPF and SELMUPI */ + /* FFE Setting Force, FFE_RES[2:0]=0x6 and FFE_CAP[3:0]=0xf */ + {G2_SETTINGS_3_REG, 0x800, 0xff, {0xef}, 0, 0}, + /* G2_DFE_RES[1:0]=0x0(3mV)*/ + {G2_SETTINGS_4_REG, 0x800, 0x300, {0x300}, 0, 0}, + /* HPF_Bw[1:0]=0x3 */ + {PLLINTP_REG1, 0x800, 0x300, {0x300}, 0, 0}, + /* TXIMPCAL_TH[3:0]=0x3, RXIMPCAL_TH[3:0]=0x0 */ + {VTHIMPCAL_CTRL_REG, 0x800, 0xff00, {0x3000}, 0, 0}, + /* CFG_SQ_DET_SEL and CFG_RX_INIT_SEL*/ + {LANE_CFG5_REG, 0x800, 0x3, {0x3}, 0, 0}, + /* REFCLK_SEL(25Mhz), ICP_FORCE, ICP[3:0]=0xa(210uA); */ + {MISC_REG, 0x800, 0x42f, {0x42a}, 0, 0}, + /* REF_FREF_SEL[4:0]=0x2(25Mhz) */ + {POWER_AND_PLL_CTRL_REG, 0x800, 0x1f, {0x02}, 0, 0}, + /* + * G2_RX SELMUFF[1:0]=3, G2_RX_SELMUFI[1:0]=3, G2_RX_SELMUPF[2:0]=2 + * and G2_RX_SELMUPI[2:0]=2 + */ {G2_SETTINGS_1_REG, 0x800, 0x3ff, {0x3d2}, 0, 0}, /* Dtl Clamping disable and Dtl-clamping-Sel(6000ppm) */ {RX_REG2, 0x800, 0xf0, {0x70}, 0, 0}, + /* tx_amp_pipe_v0[4:0]=0x1a */ + {PCIE_REG1, 0x800, 0xf80, {0xd00}, 0, 0}, /* vco_cal_vth_sel */ {REF_REG0, 0x800, 0x38, {0x20}, 0, 0}, - /* Spread Spectrum Clock Enable */ - {LANE_CFG5_REG, 0x800, 0x4, {0x4}, 0, 0}, + /* PRD_TXDEEMPH0 */ + {LANE_CFG0_REG, 0x800, 0x1, {0x1}, 0, 0}, + /* MODE_MARGIN_OVERRIDE */ + {GLOBAL_TEST_CTRL, 0x800, 0x4, {0x4}, 0, 0}, }; /* PEX and USB3 - TX config seq */ @@ -490,11 +513,11 @@ struct op_params pex_and_usb3_tx_config_params1[] = { /* 10ms delay */ {0x0, 0x0, 0x0, {0x0, 0x0}, 10, 0}, /* os_ph_offset_force (align 90) */ - {RX_REG3, 0x800, 0xff, {0xdc, NO_DATA}, 0, 0}, + {RX_REG3, 0x800, 0xff, {0xdc, 0xd8}, 0, 0}, /* Set os_ph_valid */ - {RX_REG3, 0x800, 0x100, {0x100, NO_DATA}, 0, 0}, + {RX_REG3, 0x800, 0x100, {0x100, 0x100}, 0, 0}, /* Unset os_ph_valid */ - {RX_REG3, 0x800, 0x100, {0x0, NO_DATA}, 0, 0}, + {RX_REG3, 0x800, 0x100, {0x0, 0x0}, 0, 0}, }; struct op_params pex_and_usb3_tx_config_params2[] = { @@ -1204,7 +1227,7 @@ int hws_serdes_seq_db_init(void) sizeof(usb3_electrical_config_serdes_rev2_params) / sizeof(struct op_params); } - serdes_seq_db[USB3_ELECTRICAL_CONFIG_SEQ].data_arr_idx = USB3; + serdes_seq_db[USB3_ELECTRICAL_CONFIG_SEQ].data_arr_idx = 0; /* USB3_TX_CONFIG_SEQ sequence init */ serdes_seq_db[USB3_TX_CONFIG_SEQ1].op_params_ptr = diff --git a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h index 118bf56602a63fd7173d355168134a6df5bfff0c..94c43b4dafa27a49b7c66d441242bd0efe00d37a 100644 --- a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h +++ b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h @@ -50,6 +50,7 @@ #define MISC_REG 0xa013c #define GLUE_REG 0xa0140 #define GENERATION_DIVIDER_FORCE_REG 0xa0144 +#define PLLINTP_REG1 0xa0150 #define PCIE_REG0 0xa0120 #define LANE_ALIGN_REG0 0xa0124 #define SQUELCH_FFE_SETTING_REG 0xa0018 @@ -78,6 +79,7 @@ #define LANE_CFG4_REG 0xa0620 #define LANE_CFG5_REG 0xa0624 #define GLOBAL_CLK_CTRL 0xa0704 +#define GLOBAL_TEST_CTRL 0xa0708 #define GLOBAL_MISC_CTRL 0xa0718 #define GLOBAL_CLK_SRC_HI 0xa0710 diff --git a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c index ea3b4c7d5b72d9deade83025637b4f23384793e4..0b63664dd8be8becca7ae28aeefdb8a7c2e107de 100644 --- a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c +++ b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c @@ -77,6 +77,7 @@ static u32 board_id_get(void) __weak u8 board_sat_r_get(u8 dev_num, u8 reg) { + struct udevice *udev; u8 data; u8 *dev; u32 board_id = board_id_get(); @@ -107,8 +108,11 @@ __weak u8 board_sat_r_get(u8 dev_num, u8 reg) } /* Read MPP module ID */ - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); - ret = i2c_read(dev[dev_num], 0, 1, (u8 *)&data, 1); + ret = i2c_get_chip_for_busnum(0, dev[dev_num], 1, &udev); + if (ret) + return MV_ERROR; + + ret = dm_i2c_read(udev, 0, &data, 1); if (ret) return MV_ERROR; @@ -124,13 +128,18 @@ static int board_modules_scan(void) /* Perform scan only for DB board */ if ((board_id == DB_88F78XX0_BP_ID) || (board_id == DB_88F78XX0_BP_REV2_ID)) { + struct udevice *udev; + /* reset modules flags */ config_module = 0; - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + ret = i2c_get_chip_for_busnum(0, MV_BOARD_PEX_MODULE_ADDR, + 1, &udev); + if (ret) + return MV_ERROR; /* SERDES module (only PEX model is supported now) */ - ret = i2c_read(MV_BOARD_PEX_MODULE_ADDR, 0, 1, (u8 *)&val, 1); + ret = dm_i2c_read(udev, 0, &val, 1); if (ret) return MV_ERROR; diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c index 73c4b9af3e6d36586eb81a6657eacd247569c8c7..aada83f1902a683743ad18dd4954090d3e1ab194 100644 --- a/arch/arm/mach-mvebu/spl.c +++ b/arch/arm/mach-mvebu/spl.c @@ -5,7 +5,6 @@ #include #include -#include #include #include #include @@ -250,18 +249,6 @@ void board_init_f(ulong dummy) */ board_early_init_f(); - /* Example code showing how to enable the debug UART on MVEBU */ -#ifdef EARLY_UART - /* - * Debug UART can be used from here if required: - * - * debug_uart_init(); - * printch('a'); - * printhex8(0x1234); - * printascii("string"); - */ -#endif - /* * Use special translation offset for SPL. This needs to be * configured *before* spl_init() is called as this function @@ -273,7 +260,7 @@ void board_init_f(ulong dummy) ret = spl_init(); if (ret) { - debug("spl_init() failed: %d\n", ret); + printf("spl_init() failed: %d\n", ret); hang(); } @@ -289,7 +276,7 @@ void board_init_f(ulong dummy) /* Setup DDR */ ret = ddr3_init(); if (ret) { - debug("ddr3_init() failed: %d\n", ret); + printf("ddr3_init() failed: %d\n", ret); hang(); } #endif diff --git a/arch/arm/mach-nexell/Kconfig b/arch/arm/mach-nexell/Kconfig index ffa4d4865a61e72930f5888f25de2060e55b5f52..86a23986373291002a14bb9cb7ed638409f75bc0 100644 --- a/arch/arm/mach-nexell/Kconfig +++ b/arch/arm/mach-nexell/Kconfig @@ -33,6 +33,12 @@ config TARGET_NANOPI2 endchoice +config SYS_PLLFIN + int + +config TIMER_SYS_TICK_CH + int + config SYS_BOARD default "nanopi2" @@ -45,13 +51,13 @@ config SYS_SOC config SYS_CONFIG_NAME default "s5p4418_nanopi2" -endmenu - config SYS_PLLFIN - int + default 24000000 config TIMER_SYS_TICK_CH - int + default 0 + +endmenu source "board/friendlyarm/Kconfig" diff --git a/arch/arm/mach-octeontx/Kconfig b/arch/arm/mach-octeontx/Kconfig index 28ecf9821f9d0a79012e22f595fad1f9babfe46b..542f4804760779c8984ea2b94a22353d013372fb 100644 --- a/arch/arm/mach-octeontx/Kconfig +++ b/arch/arm/mach-octeontx/Kconfig @@ -16,8 +16,4 @@ config SYS_SOC string default "octeontx" -config SYS_PCI_64BIT - bool - default y - endif diff --git a/arch/arm/mach-octeontx2/Kconfig b/arch/arm/mach-octeontx2/Kconfig index 8e5cb0f6380e89e8c7a0e5e61c7f93553d65cbf4..f6158df9086588350dc544cadb1ddfa07d7ed12f 100644 --- a/arch/arm/mach-octeontx2/Kconfig +++ b/arch/arm/mach-octeontx2/Kconfig @@ -16,8 +16,4 @@ config SYS_SOC string default "octeontx2" -config SYS_PCI_64BIT - bool - default y - endif diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig index 5baa6fb935ae4260f2daee452a938e3352596a6e..b8b45a048ca33c4bf9846efbcddfb5c628a58fe4 100644 --- a/arch/arm/mach-orion5x/Kconfig +++ b/arch/arm/mach-orion5x/Kconfig @@ -1,11 +1,19 @@ if ARCH_ORION5X +config 88F5182 + bool + +config FEROCEON + bool + choice prompt "Marvell Orion board select" optional config TARGET_EDMINIV2 bool "LaCie Ethernet Disk mini V2" + select 88F5182 + select FEROCEON select SUPPORT_SPL endchoice diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index d840c59d457e1f0c2e3a0dcc0b6470896840154f..92f35309e4a614b0bbdc1698cfea6e1a17d22d2e 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -8,7 +8,6 @@ config ROCKCHIP_PX30 select SPL select TPL select TPL_TINY_FRAMEWORK if TPL - select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL select TPL_NEEDS_SEPARATE_STACK if TPL imply SPL_SEPARATE_BSS select SPL_SERIAL @@ -80,7 +79,6 @@ config ROCKCHIP_RK322X select TPL select TPL_DM select TPL_OF_LIBFDT - select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL select TPL_NEEDS_SEPARATE_STACK if TPL select SPL_DRIVERS_MISC imply ROCKCHIP_COMMON_BOARD @@ -112,7 +110,6 @@ config ROCKCHIP_RK3288 imply TPL_DRIVERS_MISC imply TPL_LIBCOMMON_SUPPORT imply TPL_LIBGENERIC_SUPPORT - imply TPL_NEEDS_SEPARATE_TEXT_BASE imply TPL_NEEDS_SEPARATE_STACK imply TPL_OF_CONTROL imply TPL_OF_PLATDATA @@ -160,7 +157,6 @@ config ROCKCHIP_RK3328 select SPL select SUPPORT_TPL select TPL - select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL select TPL_NEEDS_SEPARATE_STACK if TPL imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_SDRAM_COMMON @@ -183,7 +179,6 @@ config ROCKCHIP_RK3368 select ARM64 select SUPPORT_SPL select SUPPORT_TPL - select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL select TPL_NEEDS_SEPARATE_STACK if TPL imply ROCKCHIP_COMMON_BOARD imply SPL_ROCKCHIP_COMMON_BOARD @@ -216,7 +211,6 @@ config ROCKCHIP_RK3399 select SPL_RAM if SPL select SPL_REGMAP if SPL select SPL_SYSCON if SPL - select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL select TPL_NEEDS_SEPARATE_STACK if TPL select SPL_SEPARATE_BSS select SPL_SERIAL diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index 2bc8e60b99ba1da963902eecb5539804e50e16e6..d40969c88898348363470068044683c70cdd7441 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -118,10 +118,6 @@ void board_debug_uart_init(void) #define GPIO0_BASE 0xff720000 #define PMUGRF_BASE 0xff320000 struct rk3399_grf_regs * const grf = (void *)GRF_BASE; -#ifdef CONFIG_TARGET_CHROMEBOOK_BOB - struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE; - struct rockchip_gpio_regs * const gpio = (void *)GPIO0_BASE; -#endif #if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000) /* Enable early UART0 on the RK3399 */ @@ -140,19 +136,25 @@ void board_debug_uart_init(void) GRF_GPIO3B7_SEL_MASK, GRF_UART3_SOUT << GRF_GPIO3B7_SEL_SHIFT); #else -# ifdef CONFIG_TARGET_CHROMEBOOK_BOB - rk_setreg(&grf->io_vsel, 1 << 0); - - /* - * Let's enable these power rails here, we are already running the SPI - * Flash based code. - */ - spl_gpio_output(gpio, GPIO(BANK_B, 2), 1); /* PP1500_EN */ - spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_B, 2), GPIO_PULL_NORMAL); + struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE; + struct rockchip_gpio_regs * const gpio = (void *)GPIO0_BASE; - spl_gpio_output(gpio, GPIO(BANK_B, 4), 1); /* PP3000_EN */ - spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_B, 4), GPIO_PULL_NORMAL); -#endif /* CONFIG_TARGET_CHROMEBOOK_BOB */ + if (IS_ENABLED(CONFIG_SPL_BUILD) && + IS_ENABLED(CONFIG_TARGET_CHROMEBOOK_BOB)) { + rk_setreg(&grf->io_vsel, 1 << 0); + + /* + * Let's enable these power rails here, we are already running + * the SPI-Flash-based code. + */ + spl_gpio_output(gpio, GPIO(BANK_B, 2), 1); /* PP1500_EN */ + spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_B, 2), + GPIO_PULL_NORMAL); + + spl_gpio_output(gpio, GPIO(BANK_B, 4), 1); /* PP3000_EN */ + spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_B, 4), + GPIO_PULL_NORMAL); + } /* Enable early UART2 channel C on the RK3399 */ rk_clrsetreg(&grf->gpio4c_iomux, diff --git a/arch/arm/mach-s5pc1xx/clock.c b/arch/arm/mach-s5pc1xx/clock.c index 555228a52083dd34fbf26958005c4206c598d450..c90c341b5082eb224dbcec8d9f74905084605e19 100644 --- a/arch/arm/mach-s5pc1xx/clock.c +++ b/arch/arm/mach-s5pc1xx/clock.c @@ -14,12 +14,8 @@ #define CLK_D 1 #define CLK_P 2 -#ifndef CONFIG_SYS_CLK_FREQ_C100 -#define CONFIG_SYS_CLK_FREQ_C100 12000000 -#endif -#ifndef CONFIG_SYS_CLK_FREQ_C110 -#define CONFIG_SYS_CLK_FREQ_C110 24000000 -#endif +#define CFG_SYS_CLK_FREQ_C100 12000000 +#define CFG_SYS_CLK_FREQ_C110 24000000 /* s5pc110: return pll clock frequency */ static unsigned long s5pc100_get_pll_clk(int pllreg) @@ -66,7 +62,7 @@ static unsigned long s5pc100_get_pll_clk(int pllreg) s = r & 0x7; /* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */ - freq = CONFIG_SYS_CLK_FREQ_C100; + freq = CFG_SYS_CLK_FREQ_C100; fout = m * (freq / (p * (1 << s))); return fout; @@ -116,7 +112,7 @@ static unsigned long s5pc110_get_pll_clk(int pllreg) /* SDIV [2:0] */ s = r & 0x7; - freq = CONFIG_SYS_CLK_FREQ_C110; + freq = CFG_SYS_CLK_FREQ_C110; if (pllreg == APLL) { if (s < 1) s = 1; diff --git a/arch/arm/mach-zynqmp-r5/Kconfig b/arch/arm/mach-zynqmp-r5/Kconfig index 5e017541339554f77c05fe6e383b5675ade37d5e..f14514b3c7c16348f8dff03ce97f11ea5b2419c4 100644 --- a/arch/arm/mach-zynqmp-r5/Kconfig +++ b/arch/arm/mach-zynqmp-r5/Kconfig @@ -21,6 +21,12 @@ config SYS_CONFIG_NAME Based on this option include/configs/.h header will be used for board configuration. +config CPU_FREQ_HZ + int "CPU frequency" + default 800000000 + help + The value, in Hz, that the CPU clock is running at. + config SYS_MALLOC_F_LEN default 0x600 diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig index 1ab37cc9fc3d45468ca9bc7f6c716b3c8acf1ed6..97c0b7b834e7ff60309f5ad5e0cb2521a19cfbad 100644 --- a/arch/m68k/Kconfig +++ b/arch/m68k/Kconfig @@ -128,6 +128,7 @@ config TARGET_COBRA5272 config TARGET_EB_CPU5282 bool "Support eb_cpu5282" select M5282 + select HW_WATCHDOG config TARGET_M5208EVBE bool "Support M5208EVBE" diff --git a/arch/nds32/cpu/n1213/ag101/timer.c b/arch/nds32/cpu/n1213/ag101/timer.c index 394fc10ec3ad6b13f9cab9f5bac10b576eef4f80..f6dcbf199c7497283fc0fb3399c9db494c5d6f3c 100644 --- a/arch/nds32/cpu/n1213/ag101/timer.c +++ b/arch/nds32/cpu/n1213/ag101/timer.c @@ -9,6 +9,7 @@ */ #ifndef CONFIG_TIMER #include +#include #include #include #include @@ -76,7 +77,7 @@ void reset_timer_masked(void) lastdec = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ); #else lastdec = readl(&tmr->timer3_counter) / - (CONFIG_SYS_CLK_FREQ / 2 / CONFIG_SYS_HZ); + (get_board_sys_clk() / 2 / CONFIG_SYS_HZ); #endif timestamp = 0; /* start "advancing" time stamp from 0 */ @@ -101,7 +102,7 @@ ulong get_timer_masked(void) ulong now = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ); #else ulong now = readl(&tmr->timer3_counter) / - (CONFIG_SYS_CLK_FREQ / 2 / CONFIG_SYS_HZ); + (get_board_sys_clk() / 2 / CONFIG_SYS_HZ); #endif debug("%s(): now = %lx, lastdec = %lx\n", __func__, now, lastdec); @@ -155,7 +156,7 @@ void __udelay(unsigned long usec) #ifdef CONFIG_FTTMR010_EXT_CLK long tmo = usec * (TIMER_CLOCK / 1000) / 1000; #else - long tmo = usec * ((CONFIG_SYS_CLK_FREQ / 2) / 1000) / 1000; + long tmo = usec * ((get_board_sys_clk() / 2) / 1000) / 1000; #endif unsigned long now, last = readl(&tmr->timer3_counter); @@ -190,7 +191,7 @@ ulong get_tbclk(void) #ifdef CONFIG_FTTMR010_EXT_CLK return CONFIG_SYS_HZ; #else - return CONFIG_SYS_CLK_FREQ; + return get_board_sys_clk(); #endif } #endif /* CONFIG_TIMER */ diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig index cff98f7599fa783f977fcb1e1426f1047aa38722..bcd8375087897d0fff80196918565500cff32c23 100644 --- a/arch/powerpc/cpu/mpc83xx/Kconfig +++ b/arch/powerpc/cpu/mpc83xx/Kconfig @@ -179,13 +179,6 @@ config ARCH_MPC837X select SYS_CACHE_SHIFT_5 select FSL_ELBC -config SYS_IMMR - hex "Value for IMMR" - default 0xE0000000 - help - Address for the Internal Memory-Mapped Registers (IMMR) window used - to configure the features of the SoC. - source "arch/powerpc/cpu/mpc83xx/hrcw/Kconfig" source "arch/powerpc/cpu/mpc83xx/bats/Kconfig" source "arch/powerpc/cpu/mpc83xx/lblaw/Kconfig" @@ -195,6 +188,13 @@ source "arch/powerpc/cpu/mpc83xx/sysio/Kconfig" source "arch/powerpc/cpu/mpc83xx/arbiter/Kconfig" source "arch/powerpc/cpu/mpc83xx/initreg/Kconfig" +config 83XX_PCICLK + hex "PCI clock frequency" + default 0xDEADBEEF + help + If required, the PCI clock frequency to use when configuring + the host bridge. + config FSL_ELBC bool diff --git a/arch/powerpc/cpu/mpc83xx/elbc/elbc.h b/arch/powerpc/cpu/mpc83xx/elbc/elbc.h index 245fe7c6fb799ed4e6afdcd27d0f9c2515f151b0..e795cd10cb950a12bcb03285ac3ad8d7bd839f90 100644 --- a/arch/powerpc/cpu/mpc83xx/elbc/elbc.h +++ b/arch/powerpc/cpu/mpc83xx/elbc/elbc.h @@ -1,173 +1,3 @@ -#ifdef CONFIG_ELBC_BR0_OR0 -#define CONFIG_SYS_BR0_PRELIM (\ - CONFIG_BR0_OR0_BASE |\ - CONFIG_BR0_PORTSIZE |\ - CONFIG_BR0_ERRORCHECKING |\ - CONFIG_BR0_WRITE_PROTECT_BIT |\ - CONFIG_BR0_MACHINE |\ - CONFIG_BR0_ATOMIC |\ - CONFIG_BR0_VALID_BIT \ -) -#define CONFIG_SYS_OR0_PRELIM (\ - CONFIG_OR0_AM |\ - CONFIG_OR0_XAM |\ - CONFIG_OR0_BCTLD |\ - CONFIG_OR0_BI |\ - CONFIG_OR0_COLS |\ - CONFIG_OR0_ROWS |\ - CONFIG_OR0_PMSEL |\ - CONFIG_OR0_SCY |\ - CONFIG_OR0_PGS |\ - CONFIG_OR0_CSCT |\ - CONFIG_OR0_CST |\ - CONFIG_OR0_CHT |\ - CONFIG_OR0_RST |\ - CONFIG_OR0_CSNT |\ - CONFIG_OR0_ACS |\ - CONFIG_OR0_XACS |\ - CONFIG_OR0_SETA |\ - CONFIG_OR0_TRLX |\ - CONFIG_OR0_EHTR |\ - CONFIG_OR0_EAD \ -) -#endif /* CONFIG_ELBC_BR0_OR0 */ - -#ifdef CONFIG_ELBC_BR1_OR1 -#define CONFIG_SYS_BR1_PRELIM (\ - CONFIG_BR1_OR1_BASE |\ - CONFIG_BR1_PORTSIZE |\ - CONFIG_BR1_ERRORCHECKING |\ - CONFIG_BR1_WRITE_PROTECT_BIT |\ - CONFIG_BR1_MACHINE |\ - CONFIG_BR1_ATOMIC |\ - CONFIG_BR1_VALID_BIT \ -) -#define CONFIG_SYS_OR1_PRELIM (\ - CONFIG_OR1_AM |\ - CONFIG_OR1_XAM |\ - CONFIG_OR1_BCTLD |\ - CONFIG_OR1_BI |\ - CONFIG_OR1_COLS |\ - CONFIG_OR1_ROWS |\ - CONFIG_OR1_PMSEL |\ - CONFIG_OR1_SCY |\ - CONFIG_OR1_PGS |\ - CONFIG_OR1_CSCT |\ - CONFIG_OR1_CST |\ - CONFIG_OR1_CHT |\ - CONFIG_OR1_RST |\ - CONFIG_OR1_CSNT |\ - CONFIG_OR1_ACS |\ - CONFIG_OR1_XACS |\ - CONFIG_OR1_SETA |\ - CONFIG_OR1_TRLX |\ - CONFIG_OR1_EHTR |\ - CONFIG_OR1_EAD \ -) -#endif /* CONFIG_ELBC_BR1_OR1 */ - -#ifdef CONFIG_ELBC_BR2_OR2 -#define CONFIG_SYS_BR2_PRELIM (\ - CONFIG_BR2_OR2_BASE |\ - CONFIG_BR2_PORTSIZE |\ - CONFIG_BR2_ERRORCHECKING |\ - CONFIG_BR2_WRITE_PROTECT_BIT |\ - CONFIG_BR2_MACHINE |\ - CONFIG_BR2_ATOMIC |\ - CONFIG_BR2_VALID_BIT \ -) -#define CONFIG_SYS_OR2_PRELIM (\ - CONFIG_OR2_AM |\ - CONFIG_OR2_XAM |\ - CONFIG_OR2_BCTLD |\ - CONFIG_OR2_BI |\ - CONFIG_OR2_COLS |\ - CONFIG_OR2_ROWS |\ - CONFIG_OR2_PMSEL |\ - CONFIG_OR2_SCY |\ - CONFIG_OR2_PGS |\ - CONFIG_OR2_CSCT |\ - CONFIG_OR2_CST |\ - CONFIG_OR2_CHT |\ - CONFIG_OR2_RST |\ - CONFIG_OR2_CSNT |\ - CONFIG_OR2_ACS |\ - CONFIG_OR2_XACS |\ - CONFIG_OR2_SETA |\ - CONFIG_OR2_TRLX |\ - CONFIG_OR2_EHTR |\ - CONFIG_OR2_EAD \ -) -#endif /* CONFIG_ELBC_BR2_OR2 */ - -#ifdef CONFIG_ELBC_BR3_OR3 -#define CONFIG_SYS_BR3_PRELIM (\ - CONFIG_BR3_OR3_BASE |\ - CONFIG_BR3_PORTSIZE |\ - CONFIG_BR3_ERRORCHECKING |\ - CONFIG_BR3_WRITE_PROTECT_BIT |\ - CONFIG_BR3_MACHINE |\ - CONFIG_BR3_ATOMIC |\ - CONFIG_BR3_VALID_BIT \ -) -#define CONFIG_SYS_OR3_PRELIM (\ - CONFIG_OR3_AM |\ - CONFIG_OR3_XAM |\ - CONFIG_OR3_BCTLD |\ - CONFIG_OR3_BI |\ - CONFIG_OR3_COLS |\ - CONFIG_OR3_ROWS |\ - CONFIG_OR3_PMSEL |\ - CONFIG_OR3_SCY |\ - CONFIG_OR3_PGS |\ - CONFIG_OR3_CSCT |\ - CONFIG_OR3_CST |\ - CONFIG_OR3_CHT |\ - CONFIG_OR3_RST |\ - CONFIG_OR3_CSNT |\ - CONFIG_OR3_ACS |\ - CONFIG_OR3_XACS |\ - CONFIG_OR3_SETA |\ - CONFIG_OR3_TRLX |\ - CONFIG_OR3_EHTR |\ - CONFIG_OR3_EAD \ -) -#endif /* CONFIG_ELBC_BR3_OR3 */ - -#ifdef CONFIG_ELBC_BR4_OR4 -#define CONFIG_SYS_BR4_PRELIM (\ - CONFIG_BR4_OR4_BASE |\ - CONFIG_BR4_PORTSIZE |\ - CONFIG_BR4_ERRORCHECKING |\ - CONFIG_BR4_WRITE_PROTECT_BIT |\ - CONFIG_BR4_MACHINE |\ - CONFIG_BR4_ATOMIC |\ - CONFIG_BR4_VALID_BIT \ -) -#define CONFIG_SYS_OR4_PRELIM (\ - CONFIG_OR4_AM |\ - CONFIG_OR4_XAM |\ - CONFIG_OR4_BCTLD |\ - CONFIG_OR4_BI |\ - CONFIG_OR4_COLS |\ - CONFIG_OR4_ROWS |\ - CONFIG_OR4_PMSEL |\ - CONFIG_OR4_SCY |\ - CONFIG_OR4_PGS |\ - CONFIG_OR4_CSCT |\ - CONFIG_OR4_CST |\ - CONFIG_OR4_CHT |\ - CONFIG_OR4_RST |\ - CONFIG_OR4_CSNT |\ - CONFIG_OR4_ACS |\ - CONFIG_OR4_XACS |\ - CONFIG_OR4_SETA |\ - CONFIG_OR4_TRLX |\ - CONFIG_OR4_EHTR |\ - CONFIG_OR4_EAD \ -) -#endif /* CONFIG_ELBC_BR4_OR4 */ - #if defined(CONFIG_ELBC_BR_OR_NAND_PRELIM_0) #define CONFIG_SYS_NAND_BR_PRELIM CONFIG_SYS_BR0_PRELIM #define CONFIG_SYS_NAND_OR_PRELIM CONFIG_SYS_OR0_PRELIM diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c index c386e4ed3fde5330bfd040b29f28da10a105ce15..d2b6b05bdaf9c1ec5d457f56be06da5f7ca3c069 100644 --- a/arch/powerpc/cpu/mpc83xx/pcie.c +++ b/arch/powerpc/cpu/mpc83xx/pcie.c @@ -8,6 +8,7 @@ */ #include +#include #include #include #include @@ -46,7 +47,7 @@ int get_pcie_clk(int index) clkin_div = ((im->clk.spmr & SPMR_CKID) >> SPMR_CKID_SHIFT); sccr = im->clk.sccr; - pci_sync_in = CONFIG_SYS_CLK_FREQ / (1 + clkin_div); + pci_sync_in = get_board_sys_clk() / (1 + clkin_div); spmf = (im->clk.spmr & SPMR_SPMF) >> SPMR_SPMF_SHIFT; csb_clk = pci_sync_in * (1 + clkin_div) * spmf; diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c index e5db96b328d5966e0170cf7bc8ed879fa4221ed4..f835263f25d8ff9431916b7c98dc443baae58e34 100644 --- a/arch/powerpc/cpu/mpc83xx/speed.c +++ b/arch/powerpc/cpu/mpc83xx/speed.c @@ -137,8 +137,8 @@ int get_clocks(void) clkin_div = ((im->clk.spmr & SPMR_CKID) >> SPMR_CKID_SHIFT); if (im->reset.rcwh & HRCWH_PCI_HOST) { -#if defined(CONFIG_SYS_CLK_FREQ) - pci_sync_in = CONFIG_SYS_CLK_FREQ / (1 + clkin_div); +#if CONFIG_SYS_CLK_FREQ != 0 + pci_sync_in = get_board_sys_clk() / (1 + clkin_div); #else pci_sync_in = 0xDEADBEEF; #endif diff --git a/arch/powerpc/cpu/mpc83xx/spl_minimal.c b/arch/powerpc/cpu/mpc83xx/spl_minimal.c index 00cb2bd044efb89b6959d81ed6336893465f1693..11b1e613fb90da056ea1f3868f12a37b4555a971 100644 --- a/arch/powerpc/cpu/mpc83xx/spl_minimal.c +++ b/arch/powerpc/cpu/mpc83xx/spl_minimal.c @@ -102,5 +102,5 @@ ulong get_bus_freq(ulong dummy) volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; u8 spmf = (im->clk.spmr & SPMR_SPMF) >> SPMR_SPMF_SHIFT; - return CONFIG_SYS_CLK_FREQ * spmf; + return get_board_sys_clk() * spmf; } diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S index c4953df4a27170870744ccc29c248df0e217489d..0944d19105737ff9444c92f6ed472bd3f057997f 100644 --- a/arch/powerpc/cpu/mpc83xx/start.S +++ b/arch/powerpc/cpu/mpc83xx/start.S @@ -14,8 +14,6 @@ #include #include -#define CONFIG_83XX 1 /* needed for Linux kernel header files*/ - #include #include @@ -115,9 +113,6 @@ disable_addr_trans: #ifndef CONFIG_DEFAULT_IMMR #error CONFIG_DEFAULT_IMMR must be defined #endif /* CONFIG_DEFAULT_IMMR */ -#ifndef CONFIG_SYS_IMMR -#define CONFIG_SYS_IMMR CONFIG_DEFAULT_IMMR -#endif /* CONFIG_SYS_IMMR */ /* * After configuration, a system reset exception is executed using the diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 836aeddbe29f78111dde6c7363bef8d90ab04115..4471754d026402e8ca18e50839a6d20c3301ef06 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -109,6 +109,7 @@ config TARGET_QEMU_PPCE500 bool "Support qemu-ppce500" select ARCH_QEMU_E500 select PHYS_64BIT + imply OF_HAS_PRIOR_STAGE config TARGET_T1024RDB bool "Support T1024RDB" @@ -353,6 +354,7 @@ config ARCH_P1010 bool select FSL_LAW select SYS_CACHE_SHIFT_5 + select SYS_HAS_SERDES select SYS_FSL_ERRATUM_A004477 select SYS_FSL_ERRATUM_A004508 select SYS_FSL_ERRATUM_A005125 @@ -1000,6 +1002,9 @@ config SYS_FSL_ERRATUM_SRIO_A004034 config SYS_FSL_ERRATUM_USB14 bool +config SYS_HAS_SERDES + bool + config SYS_P4080_ERRATUM_CPU22 bool @@ -1083,9 +1088,6 @@ config SYS_PPC64 config SYS_PPC_E500_USE_DEBUG_TLB bool -config FSL_IFC - bool - config FSL_ELBC bool diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index 3f2fc062b2b0719b90bc61d9c4baba52dbbfe321..d4b828e3824cf77155d66ed5cb3666cb646cbdc4 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -662,9 +662,9 @@ void ft_cpu_setup(void *blob, struct bd_info *bd) #ifdef CONFIG_FSL_CORENET do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-1.0", - "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); + "clock-frequency", get_board_sys_clk(), 1); do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-2.0", - "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); + "clock-frequency", get_board_sys_clk(), 1); do_fixup_by_compat_u32(blob, "fsl,mpic", "clock-frequency", get_bus_freq(0)/2, 1); #else diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index 1fe914a4e43157dba9cd074139b976e385282105..5a9cd281617b4c54386341d228d387add0de8b06 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -75,7 +75,7 @@ void get_sys_info(sys_info_t *sys_info) uint rcw_tmp; #endif uint ratio[CONFIG_SYS_FSL_NUM_CC_PLLS]; - unsigned long sysclk = CONFIG_SYS_CLK_FREQ; + unsigned long sysclk = get_board_sys_clk(); uint mem_pll_rat; sys_info->freq_systembus = sysclk; @@ -102,7 +102,7 @@ void get_sys_info(sys_info_t *sys_info) * are driven by differential sysclock. */ if (ddr_refclk_sel == FSL_CORENET2_RCWSR5_DDR_REFCLK_SINGLE_CLK) - sys_info->freq_ddrbus = CONFIG_SYS_CLK_FREQ; + sys_info->freq_ddrbus = get_board_sys_clk(); else #endif #if defined(CONFIG_DYNAMIC_DDR_CLK_FREQ) || defined(CONFIG_STATIC_DDR_CLK_FREQ) @@ -526,7 +526,7 @@ void get_sys_info(sys_info_t *sys_info) plat_ratio = (gur->porpllsr) & 0x0000003e; plat_ratio >>= 1; - sys_info->freq_systembus = plat_ratio * CONFIG_SYS_CLK_FREQ; + sys_info->freq_systembus = plat_ratio * get_board_sys_clk(); /* Divide before multiply to avoid integer * overflow for processor speeds above 2GHz */ @@ -554,7 +554,7 @@ void get_sys_info(sys_info_t *sys_info) #else qe_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_QE_RATIO) >> MPC85xx_PORPLLSR_QE_RATIO_SHIFT; - sys_info->freq_qe = qe_ratio * CONFIG_SYS_CLK_FREQ; + sys_info->freq_qe = qe_ratio * get_board_sys_clk(); #endif #endif diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig index 936cbda11bc37126e4cab13084c48b7ad9fc6dae..d63071104c4d6f6609444d6e91b9770a558caf4f 100644 --- a/arch/powerpc/cpu/mpc8xx/Kconfig +++ b/arch/powerpc/cpu/mpc8xx/Kconfig @@ -84,94 +84,6 @@ config SYS_DER help Debug Event Register (37-47) -comment "Memory mapping" - -config SYS_BR0_PRELIM - hex "Preliminary value for BR0" - -config SYS_OR0_PRELIM - hex "Preliminary value for OR0" - -config SYS_BR1_PRELIM_BOOL - bool "Define Bank 1" - -config SYS_BR1_PRELIM - hex "Preliminary value for BR1" - depends on SYS_BR1_PRELIM_BOOL - -config SYS_OR1_PRELIM - hex "Preliminary value for OR1" - depends on SYS_BR1_PRELIM_BOOL - -config SYS_BR2_PRELIM_BOOL - bool "Define Bank 2" - -config SYS_BR2_PRELIM - hex "Preliminary value for BR2" - depends on SYS_BR2_PRELIM_BOOL - -config SYS_OR2_PRELIM - hex "Preliminary value for OR2" - depends on SYS_BR2_PRELIM_BOOL - -config SYS_BR3_PRELIM_BOOL - bool "Define Bank 3" - -config SYS_BR3_PRELIM - hex "Preliminary value for BR3" - depends on SYS_BR3_PRELIM_BOOL - -config SYS_OR3_PRELIM - hex "Preliminary value for OR3" - depends on SYS_BR3_PRELIM_BOOL - -config SYS_BR4_PRELIM_BOOL - bool "Define Bank 4" - -config SYS_BR4_PRELIM - hex "Preliminary value for BR4" - depends on SYS_BR4_PRELIM_BOOL - -config SYS_OR4_PRELIM - hex "Preliminary value for OR4" - depends on SYS_BR4_PRELIM_BOOL - -config SYS_BR5_PRELIM_BOOL - bool "Define Bank 5" - -config SYS_BR5_PRELIM - hex "Preliminary value for BR5" - depends on SYS_BR5_PRELIM_BOOL - -config SYS_OR5_PRELIM - hex "Preliminary value for OR5" - depends on SYS_BR5_PRELIM_BOOL - -config SYS_BR6_PRELIM_BOOL - bool "Define Bank 6" - -config SYS_BR6_PRELIM - hex "Preliminary value for BR6" - depends on SYS_BR6_PRELIM_BOOL - -config SYS_OR6_PRELIM - hex "Preliminary value for OR6" - depends on SYS_BR6_PRELIM_BOOL - -config SYS_BR7_PRELIM_BOOL - bool "Define Bank 7" - -config SYS_BR7_PRELIM - hex "Preliminary value for BR7" - depends on SYS_BR7_PRELIM_BOOL - -config SYS_OR7_PRELIM - hex "Preliminary value for OR7" - depends on SYS_BR7_PRELIM_BOOL - -config SYS_IMMR - hex "Value for IMMR" - source "board/cssi/MCR3000/Kconfig" endmenu diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile index ceaa8ce5c829506aa68421eaeea691f619b62102..66d22ae8a45db4304c8b34b0c0b40a27200fc404 100644 --- a/arch/powerpc/dts/Makefile +++ b/arch/powerpc/dts/Makefile @@ -18,6 +18,7 @@ dtb-$(CONFIG_TARGET_P2041RDB) += p2041rdb.dtb dtb-$(CONFIG_TARGET_P3041DS) += p3041ds.dtb dtb-$(CONFIG_TARGET_P4080DS) += p4080ds.dtb dtb-$(CONFIG_TARGET_P5040DS) += p5040ds.dtb +dtb-$(CONFIG_TARGET_QEMU_PPCE500) += qemu-ppce500.dtb dtb-$(CONFIG_TARGET_SOCRATES) += socrates.dtb dtb-$(CONFIG_TARGET_T1024RDB) += t1024rdb.dtb dtb-$(CONFIG_TARGET_T1042D4RDB) += t1042d4rdb.dtb diff --git a/arch/powerpc/dts/qemu-ppce500.dts b/arch/powerpc/dts/qemu-ppce500.dts new file mode 100644 index 0000000000000000000000000000000000000000..e88e09e17961900230388987dfce48af1a8076cb --- /dev/null +++ b/arch/powerpc/dts/qemu-ppce500.dts @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Empty device tree for qemu-ppce400 + * + * Copyright 2021 Google LLC + */ +/dts-v1/; + +/ { +}; diff --git a/arch/powerpc/include/asm/config.h b/arch/powerpc/include/asm/config.h index a97b72de1b8846eb33389034bd3e4039038d14b0..354137124d89d1aeb0d0bb0e25f7158bbc4c870b 100644 --- a/arch/powerpc/include/asm/config.h +++ b/arch/powerpc/include/asm/config.h @@ -51,9 +51,6 @@ /* The FMAN driver uses the PHYLIB infrastructure */ -/* All PPC boards must swap IDE bytes */ -#define CONFIG_IDE_SWAP_IO - #if defined(CONFIG_DM_SERIAL) && !defined(CONFIG_CLK_MPC83XX) /* * TODO: Convert this to a clock driver exists that can give us the UART diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile index b6e9166767b8d94d3b554c3fbc21d09c27451233..90d3f35e6e3ee04133cdaed2afd537c08c37b32f 100644 --- a/arch/riscv/dts/Makefile +++ b/arch/riscv/dts/Makefile @@ -2,7 +2,7 @@ dtb-$(CONFIG_TARGET_AX25_AE350) += ae350_32.dtb ae350_64.dtb dtb-$(CONFIG_TARGET_MICROCHIP_ICICLE) += microchip-mpfs-icicle-kit.dtb -dtb-$(CONFIG_TARGET_QEMU_VIRT) += qemu-virt.dtb +dtb-$(CONFIG_TARGET_QEMU_VIRT) += qemu-virt32.dtb qemu-virt64.dtb dtb-$(CONFIG_TARGET_OPENPITON_RISCV64) += openpiton-riscv64.dtb dtb-$(CONFIG_TARGET_SIFIVE_UNLEASHED) += hifive-unleashed-a00.dtb dtb-$(CONFIG_TARGET_SIFIVE_UNMATCHED) += hifive-unmatched-a00.dtb diff --git a/arch/riscv/dts/qemu-virt.dts b/arch/riscv/dts/qemu-virt32.dts similarity index 94% rename from arch/riscv/dts/qemu-virt.dts rename to arch/riscv/dts/qemu-virt32.dts index fecff542b91a52584e41a917e26b37aa5f651d8c..17e2f0dea414d75b15ee663c9b78388ea7c97ea7 100644 --- a/arch/riscv/dts/qemu-virt.dts +++ b/arch/riscv/dts/qemu-virt32.dts @@ -6,3 +6,6 @@ /dts-v1/; #include "binman.dtsi" + +/ { +}; diff --git a/arch/riscv/dts/qemu-virt64.dts b/arch/riscv/dts/qemu-virt64.dts new file mode 100644 index 0000000000000000000000000000000000000000..17e2f0dea414d75b15ee663c9b78388ea7c97ea7 --- /dev/null +++ b/arch/riscv/dts/qemu-virt64.dts @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2021, Bin Meng + */ + +/dts-v1/; + +#include "binman.dtsi" + +/ { +}; diff --git a/arch/sandbox/Kconfig b/arch/sandbox/Kconfig index 7606469c94ece368c55971c2eb7a4f3f6824adc8..477c51960da2cad2ffe349312cdd34e628b2547e 100644 --- a/arch/sandbox/Kconfig +++ b/arch/sandbox/Kconfig @@ -1,9 +1,6 @@ menu "Sandbox architecture" depends on SANDBOX -config ARCH_MAP_SYSMEM - def_bool y - config SYS_ARCH default "sandbox" @@ -68,4 +65,14 @@ config SANDBOX_BITS_PER_LONG default 32 if HOST_32BIT default 64 if HOST_64BIT +config SYS_FDT_LOAD_ADDR + hex "Address at which to load devicetree" + default 0x100 + help + With sandbox the devicetree is loaded into the emulated RAM. This sets + the address that is used. There must be enough space at this address + to load the full devicetree without it overwriting anything else. + + See `doc/arch/sandbox.rst` for more information. + endmenu diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c index b72dafca2ba602eb97088a6cbffdfc3e358f3fc2..6837bfceaf6c79c35ced07916537fde779238b7e 100644 --- a/arch/sandbox/cpu/os.c +++ b/arch/sandbox/cpu/os.c @@ -211,6 +211,16 @@ int os_map_file(const char *pathname, int os_flags, void **bufp, int *sizep) return 0; } +int os_unmap(void *buf, int size) +{ + if (munmap(buf, size)) { + printf("Can't unmap %p %x\n", buf, size); + return -EIO; + } + + return 0; +} + /* Restore tty state when we exit */ static struct termios orig_term; static bool term_setup; @@ -628,7 +638,7 @@ int os_get_filesize(const char *fname, loff_t *size) void os_putc(int ch) { - putchar(ch); + fputc(ch, stdout); } void os_puts(const char *str) diff --git a/arch/sandbox/cpu/sdl.c b/arch/sandbox/cpu/sdl.c index bef5abd039d7ef448d708a6f7104141e54c6fcc0..f4ca36b35c8c49f676ea49cfa3a0289ef9ff8c36 100644 --- a/arch/sandbox/cpu/sdl.c +++ b/arch/sandbox/cpu/sdl.c @@ -44,6 +44,9 @@ struct buf_info { * @stopping: true if audio will stop once it runs out of data * @texture: SDL texture to use for U-Boot display contents * @renderer: SDL renderer to use + * @screen: SDL window to use + * @src_depth: Number of bits per pixel in the source frame buffer (that we read + * from and render to SDL) */ static struct sdl_info { int width; @@ -61,6 +64,8 @@ static struct sdl_info { bool stopping; SDL_Texture *texture; SDL_Renderer *renderer; + SDL_Window *screen; + int src_depth; } sdl; static void sandbox_sdl_poll_events(void) @@ -98,6 +103,23 @@ static int sandbox_sdl_ensure_init(void) return 0; } +int sandbox_sdl_remove_display(void) +{ + if (!sdl.renderer) { + printf("SDL renderer does not exist\n"); + return -ENOENT; + } + + SDL_DestroyTexture(sdl.texture); + SDL_DestroyRenderer(sdl.renderer); + SDL_DestroyWindow(sdl.screen); + sdl.texture = NULL; + sdl.renderer = NULL; + sdl.screen = NULL; + + return 0; +} + int sandbox_sdl_init_display(int width, int height, int log2_bpp, bool double_size) { @@ -109,6 +131,9 @@ int sandbox_sdl_init_display(int width, int height, int log2_bpp, err = sandbox_sdl_ensure_init(); if (err) return err; + if (sdl.renderer) + sandbox_sdl_remove_display(); + if (SDL_InitSubSystem(SDL_INIT_VIDEO) < 0) { printf("Unable to initialise SDL LCD: %s\n", SDL_GetError()); return -EPERM; @@ -126,22 +151,20 @@ int sandbox_sdl_init_display(int width, int height, int log2_bpp, if (!SDL_SetHint(SDL_HINT_RENDER_SCALE_QUALITY, "1")) printf("Unable to init hinting: %s", SDL_GetError()); + sdl.src_depth = 1 << log2_bpp; + if (log2_bpp != 4 && log2_bpp != 5) + log2_bpp = 5; sdl.depth = 1 << log2_bpp; sdl.pitch = sdl.width * sdl.depth / 8; - SDL_Window *screen = SDL_CreateWindow("U-Boot", SDL_WINDOWPOS_UNDEFINED, - SDL_WINDOWPOS_UNDEFINED, - sdl.vis_width, sdl.vis_height, - SDL_WINDOW_RESIZABLE); - if (!screen) { + sdl.screen = SDL_CreateWindow("U-Boot", SDL_WINDOWPOS_UNDEFINED, + SDL_WINDOWPOS_UNDEFINED, sdl.vis_width, + sdl.vis_height, SDL_WINDOW_RESIZABLE); + if (!sdl.screen) { printf("Unable to initialise SDL screen: %s\n", SDL_GetError()); return -EIO; } - if (log2_bpp != 4 && log2_bpp != 5) { - printf("U-Boot SDL does not support depth %d\n", log2_bpp); - return -EINVAL; - } - sdl.renderer = SDL_CreateRenderer(screen, -1, + sdl.renderer = SDL_CreateRenderer(sdl.screen, -1, SDL_RENDERER_ACCELERATED | SDL_RENDERER_PRESENTVSYNC); if (!sdl.renderer) { @@ -165,6 +188,55 @@ int sandbox_sdl_init_display(int width, int height, int log2_bpp, return 0; } +static int copy_to_texture(void *lcd_base) +{ + char *dest; + int pitch, x, y; + int src_pitch; + void *pixels; + char *src; + int ret; + + if (sdl.src_depth == sdl.depth) { + SDL_UpdateTexture(sdl.texture, NULL, lcd_base, sdl.pitch); + return 0; + } + + /* + * We only support copying from an 8bpp to a 32bpp texture since the + * other cases are supported directly by the texture. + */ + if (sdl.depth != 32 && sdl.src_depth != 8) { + printf("Need depth 32bpp for copy\n"); + return -EINVAL; + } + + ret = SDL_LockTexture(sdl.texture, NULL, &pixels, &pitch); + if (ret) { + printf("SDL lock %d: %s\n", ret, SDL_GetError()); + return ret; + } + + /* Copy the pixels one by one */ + src_pitch = sdl.width * sdl.src_depth / 8; + for (y = 0; y < sdl.height; y++) { + char val; + + dest = pixels + y * pitch; + src = lcd_base + src_pitch * y; + for (x = 0; x < sdl.width; x++, dest += 4) { + val = *src++; + dest[0] = val; + dest[1] = val; + dest[2] = val; + dest[3] = 0; + } + } + SDL_UnlockTexture(sdl.texture); + + return 0; +} + int sandbox_sdl_sync(void *lcd_base) { struct SDL_Rect rect; @@ -173,7 +245,11 @@ int sandbox_sdl_sync(void *lcd_base) if (!sdl.texture) return 0; SDL_RenderClear(sdl.renderer); - SDL_UpdateTexture(sdl.texture, NULL, lcd_base, sdl.pitch); + ret = copy_to_texture(lcd_base); + if (ret) { + printf("copy_to_texture: %d: %s\n", ret, SDL_GetError()); + return -EIO; + } ret = SDL_RenderCopy(sdl.renderer, sdl.texture, NULL, NULL); if (ret) { printf("SDL copy %d: %s\n", ret, SDL_GetError()); diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 2cea4a43c8772453423427270fa2043ec7304dff..48ca3e1e472122645586b6e8b864b3789ee9e032 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -207,6 +207,7 @@ test4-gpios = <&gpio_a 14>, <&gpio_b 4 1 3 2 1>; test5-gpios = <&gpio_a 19>; + bool-value; int-value = <1234>; uint-value = <(-1234)>; int64-value = /bits/ 64 <0x1111222233334444>; diff --git a/arch/sandbox/include/asm/sdl.h b/arch/sandbox/include/asm/sdl.h index 47fc4889d2074c2c7d734cb1e86d8acf95413262..25dbdb59442820766cbaabb01490c3aab40ac1da 100644 --- a/arch/sandbox/include/asm/sdl.h +++ b/arch/sandbox/include/asm/sdl.h @@ -25,6 +25,13 @@ int sandbox_sdl_init_display(int width, int height, int log2_bpp, bool double_size); +/** + * sandbox_sdl_remove_display() - Remove the SDL screen + * + * @return 0 if OK, -ENOENT if the SDL had not been inited. + */ +int sandbox_sdl_remove_display(void); + /** * sandbox_sdl_sync() - Sync current U-Boot LCD frame buffer to SDL * diff --git a/arch/sandbox/include/asm/test.h b/arch/sandbox/include/asm/test.h index dab1a4ea01b3500ec001cba4d5cebec6e6289c83..0aad827e9c67a9bd31728de26babed6f006789e2 100644 --- a/arch/sandbox/include/asm/test.h +++ b/arch/sandbox/include/asm/test.h @@ -8,6 +8,8 @@ #ifndef __ASM_TEST_H #define __ASM_TEST_H +#include + /* The sandbox driver always permits an I2C device with this address */ #define SANDBOX_I2C_TEST_ADDR 0x59 @@ -285,4 +287,20 @@ void sandbox_cros_ec_set_test_flags(struct udevice *dev, uint flags); */ int sandbox_cros_ec_get_pwm_duty(struct udevice *dev, uint index, uint *duty); +/** + * sandbox_sdl_set_bpp() - Set the depth of the sandbox display + * + * The device must not be active when this function is called. It activiates it + * before returning. + * + * This updates the depth value and adjusts a few other settings accordingly. + * It must be called before the display is probed. + * + * @dev: Device to adjust + * @l2bpp: depth to set + * @return 0 if the device was already active, other error if it fails to probe + * after the change + */ +int sandbox_sdl_set_bpp(struct udevice *dev, enum video_log2_bpp l2bpp); + #endif diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 7836869c55dcd685f4f6eb1f9cf098cfdc48156c..7e6cb7015896c74d472dc53be0bc1f5eb4cd4954 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -4,13 +4,17 @@ menu "SuperH architecture" config CPU_SH4 bool +config CPU_SH7751 + bool + select CPU_SH4 + choice prompt "Target select" optional config TARGET_R2DPLUS bool "Renesas R2D-PLUS" - select CPU_SH4 + select CPU_SH7751 endchoice diff --git a/arch/sh/include/asm/config.h b/arch/sh/include/asm/config.h index 406156dff51d612ba30d43a68b2c0e12ed33085e..09a15da4859d605080f45008453d1e3aa97726ef 100644 --- a/arch/sh/include/asm/config.h +++ b/arch/sh/include/asm/config.h @@ -11,6 +11,6 @@ /* Timer */ #define CONFIG_SYS_TIMER_COUNTS_DOWN #define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */ -#define CONFIG_SYS_TIMER_RATE (CONFIG_SYS_CLK_FREQ / 4) +#define CONFIG_SYS_TIMER_RATE (get_board_sys_clk() / 4) #endif diff --git a/arch/x86/cpu/efi/payload.c b/arch/x86/cpu/efi/payload.c index 3a9f7d72868863c73c967f7107742f0972cc5b46..04ce1880b4debfba202938a2bca2518d2bbb573d 100644 --- a/arch/x86/cpu/efi/payload.c +++ b/arch/x86/cpu/efi/payload.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -296,8 +297,14 @@ void setup_efi_info(struct efi_info *efi_info) void efi_show_bdinfo(void) { struct efi_entry_systable *table = NULL; + struct efi_system_table *sys_table; int size, ret; ret = efi_info_get(EFIET_SYS_TABLE, (void **)&table, &size); - bdinfo_print_num_l("efi_table", (ulong)table); + if (!ret) { + bdinfo_print_num_l("efi_table", table->sys_table); + sys_table = (struct efi_system_table *)(uintptr_t) + table->sys_table; + bdinfo_print_num_l(" revision", sys_table->fw_revision); + } } diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile index be209aaaf8f83b4dca3fa263cfe05e5d5128bdd8..5c8c05ec4995016dbde1174dd614e11289f9eb0b 100644 --- a/arch/x86/dts/Makefile +++ b/arch/x86/dts/Makefile @@ -24,7 +24,7 @@ dtb-y += bayleybay.dtb \ targets += $(dtb-y) -DTC_FLAGS += -R 4 -p 0x1000 +DTC_FLAGS += -R 4 -p $(if $(CONFIG_EFI_APP),0x8000,0x1000) PHONY += dtbs dtbs: $(addprefix $(obj)/, $(dtb-y)) diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c index 667e5e689e35435305d8cf18ef446a83211f9abe..57cba5c65d3b7554b76111edcf3a060e8c161e04 100644 --- a/arch/x86/lib/bootm.c +++ b/arch/x86/lib/bootm.c @@ -179,10 +179,14 @@ int boot_linux_kernel(ulong setup_base, ulong load_address, bool image_64bit) * U-Boot is setting them up that way for itself in * arch/i386/cpu/cpu.c. * - * Note that we cannot currently boot a kernel while running as - * an EFI application. Please use the payload option for that. + * Note: this is incomplete for EFI kernels! + * + * This can boot a kernel while running as an EFI application, + * but if the kernel requires EFI support then that support needs + * to be enabled first (see EFI_LOADER). Also the EFI information + * must enabled with setup_efi_info(). See setup_zimage() for + * how this is done with the stub. */ -#ifndef CONFIG_EFI_APP __asm__ __volatile__ ( "movl $0, %%ebp\n" "cli\n" @@ -191,7 +195,6 @@ int boot_linux_kernel(ulong setup_base, ulong load_address, bool image_64bit) [boot_params] "S"(setup_base), "b"(0), "D"(0) ); -#endif } /* We can't get to here */ diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c index 7ce02226ef958842e6ba51a3fe066bee9785414a..9cc04490307c7069b3b74e06aad97a57060a7864 100644 --- a/arch/x86/lib/zimage.c +++ b/arch/x86/lib/zimage.c @@ -365,11 +365,14 @@ int setup_zimage(struct boot_params *setup_base, char *cmd_line, int auto_boot, strcpy(cmd_line, (char *)cmdline_force); else build_command_line(cmd_line, auto_boot); - ret = bootm_process_cmdline(cmd_line, max_size, BOOTM_CL_ALL); - if (ret) { - printf("Cmdline setup failed (max_size=%x, bootproto=%x, err=%d)\n", - max_size, bootproto, ret); - return ret; + if (IS_ENABLED(CONFIG_CMD_BOOTM)) { + ret = bootm_process_cmdline(cmd_line, max_size, + BOOTM_CL_ALL); + if (ret) { + printf("Cmdline setup failed (max_size=%x, bootproto=%x, err=%d)\n", + max_size, bootproto, ret); + return ret; + } } printf("Kernel command line: \""); puts(cmd_line); diff --git a/arch/xtensa/lib/time.c b/arch/xtensa/lib/time.c index 3a02c384934cf58c37eff989cc796f83f044254d..1c927d2a6a3cdcdd3eac807a60064f4544dd37ba 100644 --- a/arch/xtensa/lib/time.c +++ b/arch/xtensa/lib/time.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -51,7 +52,7 @@ static void delay_cycles(unsigned cycles) void __udelay(unsigned long usec) { ulong lo, hi, i; - ulong mhz = CONFIG_SYS_CLK_FREQ / 1000000; + ulong mhz = get_board_sys_clk() / 1000000; /* Scale to support full 32-bit usec range */ @@ -74,7 +75,7 @@ ulong get_timer(ulong base) #if XCHAL_HAVE_CCOUNT register ulong ccount; __asm__ volatile ("rsr %0, CCOUNT" : "=a"(ccount)); - return ccount / (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ) - base; + return ccount / (get_board_sys_clk() / CONFIG_SYS_HZ) - base; #else /* * Add at least the overhead of this call (in cycles). @@ -85,7 +86,7 @@ ulong get_timer(ulong base) */ fake_ccount += 20; - return fake_ccount / (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ) - base; + return fake_ccount / (get_board_sys_clk() / CONFIG_SYS_HZ) - base; #endif } @@ -114,6 +115,6 @@ unsigned long timer_get_us(void) unsigned long ccount; __asm__ volatile ("rsr %0, CCOUNT" : "=a"(ccount)); - return ccount / (CONFIG_SYS_CLK_FREQ / 1000000); + return ccount / (get_board_sys_clk() / 1000000); } #endif diff --git a/board/CZ.NIC/turris_mox/turris_mox.c b/board/CZ.NIC/turris_mox/turris_mox.c index 2202eb8cfb86208013485899fd79eb47c82b8928..3eb5cb425606bb6700bf510077b11a3a2f542abc 100644 --- a/board/CZ.NIC/turris_mox/turris_mox.c +++ b/board/CZ.NIC/turris_mox/turris_mox.c @@ -41,22 +41,14 @@ #define ARMADA_37XX_SPI_DOUT (MVEBU_REGISTER(0x10608)) #define ARMADA_37XX_SPI_DIN (MVEBU_REGISTER(0x1060c)) -#define ETH1_PATH "/soc/internal-regs@d0000000/ethernet@40000" -#define MDIO_PATH "/soc/internal-regs@d0000000/mdio@32004" -#define SFP_GPIO_PATH "/soc/internal-regs@d0000000/spi@10600/moxtet@1/gpio@0" -#define PCIE_PATH "/soc/pcie@d0070000" -#define SFP_PATH "/sfp" -#define LED_PATH "/leds/led" -#define BUTTON_PATH "/gpio-keys/reset" - DECLARE_GLOBAL_DATA_PTR; #if defined(CONFIG_OF_BOARD_FIXUP) int board_fix_fdt(void *blob) { + enum fdt_status status_pcie, status_eth1; u8 topology[MAX_MOX_MODULES]; - int i, size, node; - bool enable; + int i, size, ret; /* * SPI driver is not loaded in driver model yet, but we have to find out @@ -64,15 +56,20 @@ int board_fix_fdt(void *blob) * to read SPI by reading/writing SPI registers directly */ - writel(0x10df, ARMADA_37XX_SPI_CFG); /* put pin from GPIO to SPI mode */ clrbits_le32(ARMADA_37XX_NB_GPIO_SEL, BIT(12)); + /* configure cpol, cpha, prescale */ + writel(0x10df, ARMADA_37XX_SPI_CFG); + mdelay(1); /* enable SPI CS1 */ setbits_le32(ARMADA_37XX_SPI_CTRL, BIT(17)); while (!(readl(ARMADA_37XX_SPI_CTRL) & 0x2)) udelay(1); + status_pcie = FDT_STATUS_DISABLED; + status_eth1 = FDT_STATUS_DISABLED; + for (i = 0; i < MAX_MOX_MODULES; ++i) { writel(0x0, ARMADA_37XX_SPI_DOUT); @@ -84,6 +81,11 @@ int board_fix_fdt(void *blob) break; topology[i] &= 0xf; + + if (topology[i] == MOX_MODULE_SFP || + topology[i] == MOX_MODULE_TOPAZ || + topology[i] == MOX_MODULE_PERIDOT) + status_eth1 = FDT_STATUS_OKAY; } size = i; @@ -91,24 +93,21 @@ int board_fix_fdt(void *blob) /* disable SPI CS1 */ clrbits_le32(ARMADA_37XX_SPI_CTRL, BIT(17)); + ret = fdt_set_status_by_alias(blob, "ethernet1", status_eth1); + if (ret < 0) + printf("Cannot set status for eth1 in U-Boot's device tree: %s!\n", + fdt_strerror(ret)); + if (size > 1 && (topology[1] == MOX_MODULE_PCI || topology[1] == MOX_MODULE_USB3 || topology[1] == MOX_MODULE_PASSPCI)) - enable = true; - else - enable = false; - - node = fdt_path_offset(blob, PCIE_PATH); - - if (node < 0) { - printf("Cannot find PCIe node in U-Boot's device tree!\n"); - return 0; - } + status_pcie = FDT_STATUS_OKAY; - if (fdt_setprop_string(blob, node, "status", - enable ? "okay" : "disabled") < 0) { - printf("Cannot %s PCIe in U-Boot's device tree!\n", - enable ? "enable" : "disable"); + ret = fdt_set_status_by_compatible(blob, "marvell,armada-3700-pcie", + status_pcie); + if (ret < 0) { + printf("Cannot set status for PCIe in U-Boot's device tree: %s!\n", + fdt_strerror(ret)); return 0; } @@ -416,12 +415,18 @@ static bool read_reset_button(void) struct udevice *button, *led; int i; - if (device_get_global_by_ofnode(ofnode_path(BUTTON_PATH), &button)) { + if (device_get_global_by_ofnode( + ofnode_first_subnode(ofnode_by_compatible(ofnode_null(), + "gpio-keys")), + &button)) { printf("Cannot find reset button!\n"); return false; } - if (device_get_global_by_ofnode(ofnode_path(LED_PATH), &led)) { + if (device_get_global_by_ofnode( + ofnode_first_subnode(ofnode_by_compatible(ofnode_null(), + "gpio-leds")), + &led)) { printf("Cannot find status LED!\n"); return false; } @@ -607,9 +612,6 @@ int show_board_info(void) } } - if (module_count) - printf("\n"); - return 0; } @@ -664,92 +666,34 @@ handle_reset_btn: #if defined(CONFIG_OF_BOARD_SETUP) -static int vnode_by_path(void *blob, const char *fmt, va_list ap) +static bool is_topaz(int id) { - char path[128]; - - vsnprintf(path, 128, fmt, ap); - return fdt_path_offset(blob, path); + return topaz && id == peridot + topaz - 1; } -static int node_by_path(void *blob, const char *fmt, ...) +static int switch_addr(int id) { - va_list ap; - int res; - - va_start(ap, fmt); - res = vnode_by_path(blob, fmt, ap); - va_end(ap); - - return res; + return is_topaz(id) ? 0x2 : 0x10 + id; } -static int phandle_by_path(void *blob, const char *fmt, ...) +static int setup_switch(void *blob, int id) { - va_list ap; - int node, phandle, res; - - va_start(ap, fmt); - node = vnode_by_path(blob, fmt, ap); - va_end(ap); + int res, addr, i, node; + char mdio_path[64]; + node = fdt_node_offset_by_compatible(blob, -1, "marvell,orion-mdio"); if (node < 0) return node; - phandle = fdt_get_phandle(blob, node); - if (phandle > 0) - return phandle; - - phandle = fdt_get_max_phandle(blob); - if (phandle < 0) - return phandle; - - phandle += 1; - - res = fdt_setprop_u32(blob, node, "linux,phandle", phandle); + res = fdt_get_path(blob, node, mdio_path, sizeof(mdio_path)); if (res < 0) return res; - res = fdt_setprop_u32(blob, node, "phandle", phandle); - if (res < 0) - return res; - - return phandle; -} - -static int enable_by_path(void *blob, const char *fmt, ...) -{ - va_list ap; - int node; - - va_start(ap, fmt); - node = vnode_by_path(blob, fmt, ap); - va_end(ap); - - if (node < 0) - return node; - - return fdt_setprop_string(blob, node, "status", "okay"); -} - -static bool is_topaz(int id) -{ - return topaz && id == peridot + topaz - 1; -} - -static int switch_addr(int id) -{ - return is_topaz(id) ? 0x2 : 0x10 + id; -} - -static int setup_switch(void *blob, int id) -{ - int res, addr, i, node, phandle; - addr = switch_addr(id); /* first enable the switch by setting status = "okay" */ - res = enable_by_path(blob, MDIO_PATH "/switch%i@%x", id, addr); + res = fdt_status_okay_by_pathf(blob, "%s/switch%i@%x", mdio_path, id, + addr); if (res < 0) return res; @@ -758,13 +702,13 @@ static int setup_switch(void *blob, int id) * enable corresponding ports */ if (id < peridot + topaz - 1) { - res = enable_by_path(blob, - MDIO_PATH "/switch%i@%x/ports/port@a", - id, addr); + res = fdt_status_okay_by_pathf(blob, + "%s/switch%i@%x/ports/port@a", + mdio_path, id, addr); } else if (id == peridot - 1 && !topaz && sfp) { - res = enable_by_path(blob, - MDIO_PATH "/switch%i@%x/ports/port-sfp@a", - id, addr); + res = fdt_status_okay_by_pathf(blob, + "%s/switch%i@%x/ports/port-sfp@a", + mdio_path, id, addr); } else { res = 0; } @@ -775,18 +719,21 @@ static int setup_switch(void *blob, int id) return 0; /* finally change link property if needed */ - node = node_by_path(blob, MDIO_PATH "/switch%i@%x/ports/port@a", id, - addr); + node = fdt_node_offset_by_pathf(blob, "%s/switch%i@%x/ports/port@a", + mdio_path, id, addr); if (node < 0) return node; for (i = id + 1; i < peridot + topaz; ++i) { - phandle = phandle_by_path(blob, - MDIO_PATH "/switch%i@%x/ports/port@%x", - i, switch_addr(i), - is_topaz(i) ? 5 : 9); - if (phandle < 0) - return phandle; + unsigned int phandle; + + phandle = fdt_create_phandle_by_pathf(blob, + "%s/switch%i@%x/ports/port@%x", + mdio_path, i, + switch_addr(i), + is_topaz(i) ? 5 : 9); + if (!phandle) + return -FDT_ERR_NOPHANDLES; if (i == id + 1) res = fdt_setprop_u32(blob, node, "link", phandle); @@ -799,38 +746,17 @@ static int setup_switch(void *blob, int id) return 0; } -static int remove_disabled_nodes(void *blob) -{ - while (1) { - int res, offset; - - offset = fdt_node_offset_by_prop_value(blob, -1, "status", - "disabled", 9); - if (offset < 0) - break; - - res = fdt_del_node(blob, offset); - if (res < 0) - return res; - } - - return 0; -} - int ft_board_setup(void *blob, struct bd_info *bd) { - int node, phandle, res; + int res; /* * If MOX B (PCI), MOX F (USB) or MOX G (Passthrough PCI) modules are * connected, enable the PCIe node. */ if (pci || usb || passpci) { - node = fdt_path_offset(blob, PCIE_PATH); - if (node < 0) - return node; - - res = fdt_setprop_string(blob, node, "status", "okay"); + res = fdt_status_okay_by_compatible(blob, + "marvell,armada-3700-pcie"); if (res < 0) return res; @@ -847,7 +773,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) if (peridot || topaz) { int i; - res = enable_by_path(blob, ETH1_PATH); + res = fdt_status_okay_by_alias(blob, "ethernet1"); if (res < 0) return res; @@ -865,20 +791,25 @@ int ft_board_setup(void *blob, struct bd_info *bd) * Also enable and configure SFP GPIO controller node. */ if (sfp) { - res = enable_by_path(blob, SFP_PATH); + int node; + + res = fdt_status_okay_by_compatible(blob, "sff,sfp"); if (res < 0) return res; - res = enable_by_path(blob, ETH1_PATH); + res = fdt_status_okay_by_alias(blob, "ethernet1"); if (res < 0) return res; if (!peridot) { - phandle = phandle_by_path(blob, SFP_PATH); - if (phandle < 0) - return res; + unsigned int phandle; + + phandle = fdt_create_phandle_by_compatible(blob, + "sff,sfp"); + if (!phandle) + return -FDT_ERR_NOPHANDLES; - node = node_by_path(blob, ETH1_PATH); + node = fdt_path_offset(blob, "ethernet1"); if (node < 0) return node; @@ -892,7 +823,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) return res; } - res = enable_by_path(blob, SFP_GPIO_PATH); + res = fdt_status_okay_by_compatible(blob, "cznic,moxtet-gpio"); if (res < 0) return res; @@ -900,7 +831,8 @@ int ft_board_setup(void *blob, struct bd_info *bd) char newname[16]; /* moxtet-sfp is on non-zero position, change default */ - node = node_by_path(blob, SFP_GPIO_PATH); + node = fdt_node_offset_by_compatible(blob, -1, + "cznic,moxtet-gpio"); if (node < 0) return node; @@ -919,7 +851,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) fdt_fixup_ethernet(blob); /* Finally remove disabled nodes, as per Rob Herring's request. */ - remove_disabled_nodes(blob); + fdt_delete_disabled_nodes(blob); return 0; } diff --git a/board/LaCie/net2big_v2/Kconfig b/board/LaCie/net2big_v2/Kconfig index ba460dba45ec7a94ce82eeec1a1594bd7e10a8e8..758d25e007141d5e5f892723b3a0f6e7fd081ffe 100644 --- a/board/LaCie/net2big_v2/Kconfig +++ b/board/LaCie/net2big_v2/Kconfig @@ -1,5 +1,16 @@ if TARGET_NET2BIG_V2 +choice + prompt "Board variant" + +config D2NET_V2 + bool "D2NET v2" + +config NET2BIG_V2 + bool "NET2BIG v2" + +endchoice + config SYS_BOARD default "net2big_v2" diff --git a/board/LaCie/netspace_v2/Kconfig b/board/LaCie/netspace_v2/Kconfig index 930b822dfbe71ea29b16de9620a52a6de99a6893..4eca1d47de516fb145be9e1a97bf5821e52d7404 100644 --- a/board/LaCie/netspace_v2/Kconfig +++ b/board/LaCie/netspace_v2/Kconfig @@ -1,5 +1,30 @@ if TARGET_NETSPACE_V2 +choice + prompt "Board variant" + +config INETSPACE_V2 + bool "INETSPACE v2" + select KW88F6281 + +config NETSPACE_LITE_V2 + bool "NETSPACE LITE v2" + select KW88F6192 + +config NETSPACE_MAX_V2 + bool "NETSPACE MAX v2" + select KW88F6281 + +config NETSPACE_MINI_V2 + bool "NETSPACE MINI v2" + select KW88F6192 + +config NETSPACE_V2 + bool "NETSPACE v2" + select KW88F6281 + +endchoice + config SYS_BOARD default "netspace_v2" diff --git a/board/Marvell/octeon_ebb7304/board.c b/board/Marvell/octeon_ebb7304/board.c index e8e2d547c1ee029b7710066a72bd977c36840235..c6c7c13483f44ab69b86e74b67b503b5ab755dd8 100644 --- a/board/Marvell/octeon_ebb7304/board.c +++ b/board/Marvell/octeon_ebb7304/board.c @@ -205,7 +205,7 @@ static int fdt_fix_mix(const void *fdt) int env_lmac = -1; int lmac_fdt_node = -1; int mix_fdt_node = -1; - int lmac_phandle; + unsigned int lmac_phandle; char *compat; /* Get the lmac for this environment variable */ @@ -229,8 +229,7 @@ static int fdt_fix_mix(const void *fdt) } } - lmac_phandle = fdt_alloc_phandle((void *)fdt); - fdt_set_phandle((void *)fdt, lmac_fdt_node, lmac_phandle); + lmac_phandle = fdt_create_phandle((void *)fdt, lmac_fdt_node); /* Get the fdt mix node corresponding to this lmac */ mix_fdt_node = get_mix_fdt_node(fdt, env_node, env_lmac); diff --git a/board/Marvell/openrd/Kconfig b/board/Marvell/openrd/Kconfig index 124b66da0f134c2af976772a2ba3bbec97ab170c..dc26ed2f42f44a98db4af43be22fbcd573c2bc77 100644 --- a/board/Marvell/openrd/Kconfig +++ b/board/Marvell/openrd/Kconfig @@ -1,5 +1,19 @@ if TARGET_OPENRD +choice + prompt "Board variant" + +config BOARD_IS_OPENRD_BASE + bool "Base" + +config BOARD_IS_OPENRD_CLIENT + bool "Client" + +config BOARD_IS_OPENRD_ULTIMATE + bool "Ultimate" + +endchoice + config SYS_BOARD default "openrd" diff --git a/board/amlogic/vim3/MAINTAINERS b/board/amlogic/vim3/MAINTAINERS index 92b426f66df910d92f240b59258a657c5dcc9dc6..d8848495c71712733be8da7939cb513a6835eb4c 100644 --- a/board/amlogic/vim3/MAINTAINERS +++ b/board/amlogic/vim3/MAINTAINERS @@ -4,6 +4,10 @@ S: Maintained L: u-boot-amlogic@groups.io F: board/amlogic/vim3/ F: configs/khadas-vim3_defconfig +F: configs/khadas-vim3_android_defconfig +F: configs/khadas-vim3_android_ab_defconfig F: configs/khadas-vim3l_defconfig +F: configs/khadas-vim3l_android_defconfig +F: configs/khadas-vim3l_android_ab_defconfig F: doc/board/amlogic/khadas-vim3.rst F: doc/board/amlogic/khadas-vim3l.rst diff --git a/board/armltd/vexpress64/Kconfig b/board/armltd/vexpress64/Kconfig index 1d13f542e677ac9b59ec311d706a70a9c4cb0ffb..4aab3f092ecb24c446184f2a5b3239f0e887d9e8 100644 --- a/board/armltd/vexpress64/Kconfig +++ b/board/armltd/vexpress64/Kconfig @@ -7,7 +7,7 @@ config SYS_VENDOR default "armltd" config SYS_CONFIG_NAME - default "vexpress_aemv8a" + default "vexpress_aemv8" config JUNO_DTB_PART string "NOR flash partition holding DTB" diff --git a/board/armltd/vexpress64/Makefile b/board/armltd/vexpress64/Makefile index 868dc4f629f242e1f7946ecf9a95a3289cb39c56..1878fbed4ec9432f4fe0014bc8b23b74578efa86 100644 --- a/board/armltd/vexpress64/Makefile +++ b/board/armltd/vexpress64/Makefile @@ -3,5 +3,5 @@ # (C) Copyright 2000-2004 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. -obj-y := vexpress64.o +obj-y := vexpress64.o lowlevel_init.o obj-$(CONFIG_TARGET_VEXPRESS64_JUNO) += pcie.o diff --git a/board/armltd/vexpress64/lowlevel_init.S b/board/armltd/vexpress64/lowlevel_init.S new file mode 100644 index 0000000000000000000000000000000000000000..3dcfb85d0e9a8210d186b5ea0c8bb206b7fbca71 --- /dev/null +++ b/board/armltd/vexpress64/lowlevel_init.S @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * (C) Copyright 2021 Arm Limited + */ + +.global save_boot_params +save_boot_params: + + adr x8, prior_stage_fdt_address + str x0, [x8] + + b save_boot_params_ret diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c index d2f307cca5d21b8eeb93e18721093c3b407f0238..5e22e89824eec57e9c21192a93c35398a419a948 100644 --- a/board/armltd/vexpress64/vexpress64.c +++ b/board/armltd/vexpress64/vexpress64.c @@ -18,6 +18,10 @@ #include #include "pcie.h" #include +#ifdef CONFIG_VIRTIO_NET +#include +#include +#endif DECLARE_GLOBAL_DATA_PTR; @@ -64,6 +68,9 @@ __weak void vexpress64_pcie_init(void) int board_init(void) { vexpress64_pcie_init(); +#ifdef CONFIG_VIRTIO_NET + virtio_init(); +#endif return 0; } @@ -85,7 +92,15 @@ int dram_init_banksize(void) return 0; } +/* Assigned in lowlevel_init.S + * Push the variable into the .data section so that it + * does not get cleared later. + */ +unsigned long __section(".data") prior_stage_fdt_address; + #ifdef CONFIG_OF_BOARD + +#ifdef CONFIG_TARGET_VEXPRESS64_JUNO #define JUNO_FLASH_SEC_SIZE (256 * 1024) static phys_addr_t find_dtb_in_nor_flash(const char *partname) { @@ -130,9 +145,11 @@ static phys_addr_t find_dtb_in_nor_flash(const char *partname) return ~0; } +#endif void *board_fdt_blob_setup(int *err) { +#ifdef CONFIG_TARGET_VEXPRESS64_JUNO phys_addr_t fdt_rom_addr = find_dtb_in_nor_flash(CONFIG_JUNO_DTB_PART); *err = 0; @@ -142,6 +159,22 @@ void *board_fdt_blob_setup(int *err) } return (void *)fdt_rom_addr; +#endif + +#ifdef VEXPRESS_FDT_ADDR + if (fdt_magic(VEXPRESS_FDT_ADDR) == FDT_MAGIC) { + *err = 0; + return (void *)VEXPRESS_FDT_ADDR; + } +#endif + + if (fdt_magic(prior_stage_fdt_address) == FDT_MAGIC) { + *err = 0; + return (void *)prior_stage_fdt_address; + } + + *err = -ENXIO; + return NULL; } #endif diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c index 32acf367842a84faeaff5423185794623842d43f..88036c16c951f7511ae888ab879ef101f4c3b497 100644 --- a/board/broadcom/bcmns3/ns3.c +++ b/board/broadcom/bcmns3/ns3.c @@ -150,7 +150,10 @@ int board_init(void) if (bl33_info->version != BL33_INFO_VERSION) printf("*** warning: ATF BL31 and U-Boot not in sync! ***\n"); - +#if CONFIG_IS_ENABLED(BNXT_ETH) + if (chimp_fastboot_optee() != 0) + printf("*** warning: secure chimp fastboot failed! ***\n"); +#endif return 0; } diff --git a/board/cadence/xtfpga/xtfpga.c b/board/cadence/xtfpga/xtfpga.c index c26793d76cc8325fe15e3b9708e9297b670f347f..ade7f9d120aeaf3cd8b9fc89f3cd3b8192a81106 100644 --- a/board/cadence/xtfpga/xtfpga.c +++ b/board/cadence/xtfpga/xtfpga.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include @@ -49,7 +50,7 @@ int checkboard(void) return 0; } -int board_postclk_init(void) +unsigned long get_board_sys_clk(void) { /* * Obtain CPU clock frequency from board and cache in global @@ -58,11 +59,17 @@ int board_postclk_init(void) */ #ifdef CONFIG_SYS_FPGAREG_FREQ - gd->cpu_clk = (*(volatile unsigned long *)CONFIG_SYS_FPGAREG_FREQ); + return (*(volatile unsigned long *)CONFIG_SYS_FPGAREG_FREQ); #else /* early Tensilica bitstreams lack this reg, but most run at 50 MHz */ - gd->cpu_clk = 50000000UL; + return 50000000; #endif +} + +int board_postclk_init(void) +{ + gd->cpu_clk = get_board_sys_clk(); + return 0; } diff --git a/board/compulab/cl-som-imx7/Kconfig b/board/compulab/cl-som-imx7/Kconfig index 6d69cf31f446a00de1b1ee872c88ac21da196ba2..ffd857ced11ac86d30044446b304fc1478b9d36b 100644 --- a/board/compulab/cl-som-imx7/Kconfig +++ b/board/compulab/cl-som-imx7/Kconfig @@ -17,10 +17,6 @@ config SYS_USB_DEV int default 0 -config SYS_MMC_IMG_LOAD_PART - int - default 1 - config SYS_USB_IMG_LOAD_PART int default 1 diff --git a/board/coreboot/coreboot/coreboot.c b/board/coreboot/coreboot/coreboot.c index 11294d6e870e78c662b85cc31d02e287d64e7faf..3b90ae75386bf86da2893227b1a442f011495efb 100644 --- a/board/coreboot/coreboot/coreboot.c +++ b/board/coreboot/coreboot/coreboot.c @@ -4,10 +4,11 @@ */ #include -#include -#include +#include #include #include +#include +#include int board_early_init_r(void) { @@ -65,3 +66,18 @@ fallback: return checkboard(); } #endif + +static struct splash_location coreboot_splash_locations[] = { + { + .name = "virtio_fs", + .storage = SPLASH_STORAGE_VIRTIO, + .flags = SPLASH_STORAGE_RAW, + .devpart = "0", + }, +}; + +int splash_screen_prepare(void) +{ + return splash_source_load(coreboot_splash_locations, + ARRAY_SIZE(coreboot_splash_locations)); +} diff --git a/board/emulation/qemu-riscv/Kconfig b/board/emulation/qemu-riscv/Kconfig index 1bbf1bc84aff62f5747c51e61e3217cef0f90267..a380db61a0fd5ce15c7e42417f6dc71f2388c843 100644 --- a/board/emulation/qemu-riscv/Kconfig +++ b/board/emulation/qemu-riscv/Kconfig @@ -65,5 +65,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy imply VIRTIO_BLK imply MTD_NOR_FLASH imply CFI_FLASH + imply OF_HAS_PRIOR_STAGE endif diff --git a/board/freescale/common/Kconfig b/board/freescale/common/Kconfig index 69620dbb74e41ec9b225afa775e7240a7f10ce3d..300b01e040060018769049e61b97914a9f209e9f 100644 --- a/board/freescale/common/Kconfig +++ b/board/freescale/common/Kconfig @@ -28,36 +28,67 @@ config FSL_USE_PCA9547_MUX This option enables the PCA9547 I2C mux on Freescale boards. config VID - depends on DM_I2C bool "Enable Freescale VID" + depends on I2C || DM_I2C help This option enables setting core voltage based on individual values saved in SoC fuses. +config SPL_VID + bool "Enable Freescale VID in SPL" + depends on I2C || DM_I2C + help + This option enables setting core voltage based on individual + values saved in SoC fuses, in SPL. + +if VID || SPL_VID + +config VID_FLS_ENV + string "Environment variable for overriding VDD" + help + This option allows for specifying the environment variable + to check to override VDD information. + +config VOL_MONITOR_INA220 + bool "Enable the INA220 voltage monitor read" + help + This option enables INA220 voltage monitor read + functionality. It is used by the common VID driver. + +config VOL_MONITOR_IR36021_READ + bool "Enable the IR36021 voltage monitor read" + help + This option enables IR36021 voltage monitor read + functionality. It is used by the common VID driver. + +config VOL_MONITOR_IR36021_SET + bool "Enable the IR36021 voltage monitor set" + help + This option enables IR36021 voltage monitor set + functionality. It is used by the common VID driver. + config VOL_MONITOR_LTC3882_READ - depends on VID bool "Enable the LTC3882 voltage monitor read" help This option enables LTC3882 voltage monitor read functionality. It is used by the common VID driver. config VOL_MONITOR_LTC3882_SET - depends on VID bool "Enable the LTC3882 voltage monitor set" help This option enables LTC3882 voltage monitor set functionality. It is used by the common VID driver. config VOL_MONITOR_ISL68233_READ - depends on VID bool "Enable the ISL68233 voltage monitor read" help This option enables ISL68233 voltage monitor read functionality. It is used by the common VID driver. config VOL_MONITOR_ISL68233_SET - depends on VID bool "Enable the ISL68233 voltage monitor set" help This option enables ISL68233 voltage monitor set functionality. It is used by the common VID driver. + +endif diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile index 3a171688c3f736e0df97b760003d3a65acd85575..0ddfb59d7de236abef7002675ce6fa1bb0557e06 100644 --- a/board/freescale/common/Makefile +++ b/board/freescale/common/Makefile @@ -33,7 +33,7 @@ obj-$(CONFIG_FSL_NGPIXIS) += ngpixis.o endif obj-$(I2C_COMMON) += i2c_common.o obj-$(CONFIG_FSL_USE_PCA9547_MUX) += i2c_mux.o -obj-$(CONFIG_VID) += vid.o +obj-$(CONFIG_$(SPL_)VID) += vid.o obj-$(CONFIG_FSL_QIXIS) += qixis.o obj-$(CONFIG_PQ_MDS_PIB) += pq-mds-pib.o ifndef CONFIG_SPL_BUILD diff --git a/board/freescale/common/cadmus.c b/board/freescale/common/cadmus.c index 7e7394f333e7cca7667cbc07b7ea63bc99931e64..8f3fb5fa81b246900a2af6d092ce5ac7909a4314 100644 --- a/board/freescale/common/cadmus.c +++ b/board/freescale/common/cadmus.c @@ -5,7 +5,7 @@ #include - +#include /* * CADMUS Board System Registers @@ -37,7 +37,7 @@ get_board_version(void) unsigned long -get_clock_freq(void) +get_board_sys_clk(void) { volatile cadmus_reg_t *cadmus = (cadmus_reg_t *)CONFIG_SYS_CADMUS_BASE_REG; diff --git a/board/freescale/common/cadmus.h b/board/freescale/common/cadmus.h index ddc2bb6c1f6659302c74e5ee0b65079f6dec51cd..fb74e8f6db5ed04e10d994ac79e4f857a8dde92c 100644 --- a/board/freescale/common/cadmus.h +++ b/board/freescale/common/cadmus.h @@ -19,7 +19,7 @@ extern unsigned int get_board_version(void); /* * Returns either 33000000 or 66000000 as the SYS_CLK_FREQ. */ -extern unsigned long get_clock_freq(void); +extern unsigned long get_board_sys_clk(void); /* diff --git a/board/freescale/common/ics307_clk.c b/board/freescale/common/ics307_clk.c index 2143395781a19b5fd778b1d5f76ed2d9677877f3..01662d36e9fb99d13b88676d0980966f5e789994 100644 --- a/board/freescale/common/ics307_clk.c +++ b/board/freescale/common/ics307_clk.c @@ -4,6 +4,7 @@ */ #include +#include #include #include @@ -137,6 +138,7 @@ unsigned long get_board_sys_clk(void) in_8(&fpga_reg->sclk[2])); } +#ifdef CONFIG_DYNAMIC_DDR_CLK_FREQ unsigned long get_board_ddr_clk(void) { return ics307_clk_freq( @@ -144,3 +146,4 @@ unsigned long get_board_ddr_clk(void) in_8(&fpga_reg->dclk[1]), in_8(&fpga_reg->dclk[2])); } +#endif diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c index fbbd27d9d71eb156dbe846201bdcb7b0212302e2..0647622cde5936c0d3505f89e78d3efe0f9c250c 100644 --- a/board/freescale/ls1021aqds/ls1021aqds.c +++ b/board/freescale/ls1021aqds/ls1021aqds.c @@ -102,6 +102,7 @@ int checkboard(void) return 0; } +#ifdef CONFIG_DYNAMIC_SYS_CLK_FREQ unsigned long get_board_sys_clk(void) { u8 sysclk_conf = QIXIS_READ(brdcfg[1]); @@ -126,6 +127,7 @@ unsigned long get_board_sys_clk(void) } return 66666666; } +#endif #ifdef CONFIG_DYNAMIC_DDR_CLK_FREQ unsigned long get_board_ddr_clk(void) diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index 2d5322406aa1043c80553243bdc66d672e22fc9d..13359f947bb56a83562166a804b0f944a8f81b47 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c index cc95d441b607c05256202c1fc4b485c2aaf9fe05..8481c45a583ae314ae9cf4e39049deaa6a8fa0d7 100644 --- a/board/freescale/ls1046aqds/ls1046aqds.c +++ b/board/freescale/ls1046aqds/ls1046aqds.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c index 7046fbaeb5d6d899a07abe5ba55ad45ddfef282c..aa548b20d7f79e0266df213f796bf9c18368e613 100644 --- a/board/freescale/ls1088a/ls1088a.c +++ b/board/freescale/ls1088a/ls1088a.c @@ -3,6 +3,7 @@ * Copyright 2017-2018 NXP */ #include +#include #include #include #include @@ -374,6 +375,7 @@ bool if_board_diff_clk(void) #endif } +#ifdef CONFIG_DYNAMIC_SYS_CLK_FREQ unsigned long get_board_sys_clk(void) { u8 sysclk_conf = QIXIS_READ(brdcfg[1]); @@ -397,7 +399,9 @@ unsigned long get_board_sys_clk(void) return 66666666; } +#endif +#ifdef CONFIG_DYNAMIC_DDR_CLK_FREQ unsigned long get_board_ddr_clk(void) { u8 ddrclk_conf = QIXIS_READ(brdcfg[1]); @@ -415,6 +419,7 @@ unsigned long get_board_ddr_clk(void) return 66666666; } +#endif #if !defined(CONFIG_SPL_BUILD) void board_retimer_init(void) diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c index 2f0139edef49118ab880dc8540794b0f4d19dd01..297629d5efb869e3cbaf8ac9dcb89a152217d3e8 100644 --- a/board/freescale/ls2080aqds/ls2080aqds.c +++ b/board/freescale/ls2080aqds/ls2080aqds.c @@ -3,6 +3,7 @@ * Copyright 2015 Freescale Semiconductor */ #include +#include #include #include #include diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index bf660a8e656104088542f7bf3afc3e4d079d870a..1975b0f47ddc47d115b250a0116b92a9c7b0592f 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -4,6 +4,7 @@ * Copyright 2017 NXP */ #include +#include #include #include #include diff --git a/board/freescale/lx2160a/eth_lx2160aqds.c b/board/freescale/lx2160a/eth_lx2160aqds.c index a2b6442b542a9ba781ea6813405a5179cc94c422..1819b27561edf9fbccbb66ca6136cdf0886fc6cf 100644 --- a/board/freescale/lx2160a/eth_lx2160aqds.c +++ b/board/freescale/lx2160a/eth_lx2160aqds.c @@ -775,10 +775,11 @@ int fdt_fixup_board_phy(void *fdt) int fpga_offset, offset, subnodeoffset; struct mii_dev *mii_dev; struct list_head *mii_devs, *entry; - int ret, dpmac_id, phandle, i; + int ret, dpmac_id, i; struct phy_device *phy_dev; char ethname[ETH_NAME_LEN]; phy_interface_t phy_iface; + uint32_t phandle; ret = 0; /* we know FPGA is connected to i2c0, therefore search path directly, @@ -794,7 +795,10 @@ int fdt_fixup_board_phy(void *fdt) return fpga_offset; } - phandle = fdt_alloc_phandle(fdt); + ret = fdt_generate_phandle(fdt, &phandle); + if (ret < 0) + return ret; + mii_devs = mdio_get_list_head(); list_for_each(entry, mii_devs) { diff --git a/board/freescale/lx2160a/eth_lx2162aqds.c b/board/freescale/lx2160a/eth_lx2162aqds.c index 3b04dea39cd391e7acaf0717543d8172f47c06c8..ac6218ebe4ace4e789435a1335351331d2169218 100644 --- a/board/freescale/lx2160a/eth_lx2162aqds.c +++ b/board/freescale/lx2160a/eth_lx2162aqds.c @@ -787,10 +787,11 @@ int fdt_fixup_board_phy(void *fdt) int fpga_offset, offset, subnodeoffset; struct mii_dev *mii_dev; struct list_head *mii_devs, *entry; - int ret, dpmac_id, phandle, i; + int ret, dpmac_id, i; struct phy_device *phy_dev; char ethname[ETH_NAME_LEN]; phy_interface_t phy_iface; + uint32_t phandle; ret = 0; /* we know FPGA is connected to i2c0, therefore search path directly, @@ -806,7 +807,10 @@ int fdt_fixup_board_phy(void *fdt) return fpga_offset; } - phandle = fdt_alloc_phandle(fdt); + ret = fdt_generate_phandle(fdt, &phandle); + if (ret < 0) + return ret; + mii_devs = mdio_get_list_head(); list_for_each(entry, mii_devs) { diff --git a/board/freescale/p1010rdb/spl.c b/board/freescale/p1010rdb/spl.c index 6c84eef398e234d0be0e3afee62c64ea2d06fd3a..7eaa2047facb076501e2f91852fd0ddb1450ce31 100644 --- a/board/freescale/p1010rdb/spl.c +++ b/board/freescale/p1010rdb/spl.c @@ -43,7 +43,7 @@ void board_init_f(ulong bootflag) /* initialize selected port with appropriate baud rate */ plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; plat_ratio >>= 1; - gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio; + gd->bus_clk = get_board_sys_clk() * plat_ratio; ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1, gd->bus_clk / 16 / CONFIG_BAUDRATE); diff --git a/board/freescale/p1010rdb/spl_minimal.c b/board/freescale/p1010rdb/spl_minimal.c index 989c5b139aca9b8e41ddab0611932d75cd0944a1..a956c5af5b00e8d673eb7370c18ac7db57b360c9 100644 --- a/board/freescale/p1010rdb/spl_minimal.c +++ b/board/freescale/p1010rdb/spl_minimal.c @@ -3,6 +3,7 @@ * Copyright 2011 Freescale Semiconductor, Inc. */ #include +#include #include #include #include @@ -29,7 +30,7 @@ void board_init_f(ulong bootflag) /* initialize selected port with appropriate baud rate */ plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; plat_ratio >>= 1; - gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio; + gd->bus_clk = get_board_sys_clk() * plat_ratio; ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1, gd->bus_clk / 16 / CONFIG_BAUDRATE); diff --git a/board/freescale/p1_p2_rdb_pc/spl.c b/board/freescale/p1_p2_rdb_pc/spl.c index 118468408e2bc47257e0b92e3fa0736a72372c4f..f855f3a81c3df72e0f6cbd6dca8f844f08d419bc 100644 --- a/board/freescale/p1_p2_rdb_pc/spl.c +++ b/board/freescale/p1_p2_rdb_pc/spl.c @@ -48,7 +48,7 @@ void board_init_f(ulong bootflag) /* initialize selected port with appropriate baud rate */ plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; plat_ratio >>= 1; - bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio; + bus_clk = get_board_sys_clk() * plat_ratio; gd->bus_clk = bus_clk; ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1, diff --git a/board/freescale/p1_p2_rdb_pc/spl_minimal.c b/board/freescale/p1_p2_rdb_pc/spl_minimal.c index eb3f2c83fa2636955adc3dad978e1a68a75e467e..72beeadf55c45e3ad3c9e2929b28de809c3c4072 100644 --- a/board/freescale/p1_p2_rdb_pc/spl_minimal.c +++ b/board/freescale/p1_p2_rdb_pc/spl_minimal.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -28,7 +29,7 @@ void board_init_f(ulong bootflag) /* initialize selected port with appropriate baud rate */ plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; plat_ratio >>= 1; - gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio; + gd->bus_clk = get_board_sys_clk() * plat_ratio; ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1, gd->bus_clk / 16 / CONFIG_BAUDRATE); diff --git a/board/freescale/p2041rdb/p2041rdb.c b/board/freescale/p2041rdb/p2041rdb.c index 4ece1e6ea0a4fd94c90677555311f7b6c8430261..5bd2b9950602a114f622a5a1258350dff7c49cfb 100644 --- a/board/freescale/p2041rdb/p2041rdb.c +++ b/board/freescale/p2041rdb/p2041rdb.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -148,7 +149,7 @@ int board_early_init_r(void) return 0; } -unsigned long get_board_sys_clk(unsigned long dummy) +unsigned long get_board_sys_clk(void) { u8 sysclk_conf = CPLD_READ(sysclk_sw1); diff --git a/board/freescale/t102xrdb/spl.c b/board/freescale/t102xrdb/spl.c index ac373d7724788f2df6c632feeaa6f1c72871b940..af15da5427c75ee73bbd8fdb91f0b808076bad07 100644 --- a/board/freescale/t102xrdb/spl.c +++ b/board/freescale/t102xrdb/spl.c @@ -25,11 +25,6 @@ phys_size_t get_effective_memsize(void) return CONFIG_SYS_L3_SIZE; } -unsigned long get_board_sys_clk(void) -{ - return CONFIG_SYS_CLK_FREQ; -} - #if defined(CONFIG_SPL_MMC_BOOT) #define GPIO1_SD_SEL 0x00020000 int board_mmc_getcd(struct mmc *mmc) diff --git a/board/freescale/t102xrdb/t102xrdb.c b/board/freescale/t102xrdb/t102xrdb.c index ab7675e2090ca857b0fce68d2eca6e3ec4c7c637..539a5c73444ec517ee95f0dacfeafa0b0c83df7c 100644 --- a/board/freescale/t102xrdb/t102xrdb.c +++ b/board/freescale/t102xrdb/t102xrdb.c @@ -162,11 +162,6 @@ int board_early_init_r(void) return 0; } -unsigned long get_board_sys_clk(void) -{ - return CONFIG_SYS_CLK_FREQ; -} - #ifdef CONFIG_TARGET_T1024RDB void board_reset(void) { diff --git a/board/freescale/t104xrdb/spl.c b/board/freescale/t104xrdb/spl.c index c7df11100e04371cf3443b0a6d05bb4033115b87..dfaff1a9165ceffa4b306c938f9e671ee19213e1 100644 --- a/board/freescale/t104xrdb/spl.c +++ b/board/freescale/t104xrdb/spl.c @@ -25,11 +25,6 @@ phys_size_t get_effective_memsize(void) return CONFIG_SYS_L3_SIZE; } -unsigned long get_board_sys_clk(void) -{ - return CONFIG_SYS_CLK_FREQ; -} - #define FSL_CORENET_CCSR_PORSR1_RCW_MASK 0xFF800000 void board_init_f(ulong bootflag) { diff --git a/board/freescale/t208xqds/t208xqds.c b/board/freescale/t208xqds/t208xqds.c index e54672a80ba40caca299b2f49874d72813b4aa8d..1da3a714f27f8481469009f7c6ad50ca9b09e3e5 100644 --- a/board/freescale/t208xqds/t208xqds.c +++ b/board/freescale/t208xqds/t208xqds.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/board/freescale/t208xrdb/spl.c b/board/freescale/t208xrdb/spl.c index 2204a98ac8ae136aa28e94dd46d8e8a3c6dcba92..60fe084bbb2a8e10eeb7e06f95dae210b62c78a0 100644 --- a/board/freescale/t208xrdb/spl.c +++ b/board/freescale/t208xrdb/spl.c @@ -24,11 +24,6 @@ phys_size_t get_effective_memsize(void) return CONFIG_SYS_L3_SIZE; } -unsigned long get_board_sys_clk(void) -{ - return CONFIG_SYS_CLK_FREQ; -} - void board_init_f(ulong bootflag) { u32 plat_ratio, sys_clk, ccb_clk; diff --git a/board/freescale/t208xrdb/t208xrdb.c b/board/freescale/t208xrdb/t208xrdb.c index 3611dbbf3273743b54f9b0fc19392ffb7d429310..1c8017b593aa5d88fcde580c6447955940347dec 100644 --- a/board/freescale/t208xrdb/t208xrdb.c +++ b/board/freescale/t208xrdb/t208xrdb.c @@ -109,11 +109,6 @@ int board_early_init_r(void) return 0; } -unsigned long get_board_sys_clk(void) -{ - return CONFIG_SYS_CLK_FREQ; -} - int misc_init_r(void) { u8 reg; diff --git a/board/freescale/t4rdb/spl.c b/board/freescale/t4rdb/spl.c index 69d1449b070ca0a7e0de78b94a51b1ba70f233da..c7d5de35d58b013241fdd01b5103a20fb8318127 100644 --- a/board/freescale/t4rdb/spl.c +++ b/board/freescale/t4rdb/spl.c @@ -30,11 +30,6 @@ phys_size_t get_effective_memsize(void) return CONFIG_SYS_L3_SIZE; } -unsigned long get_board_sys_clk(void) -{ - return CONFIG_SYS_CLK_FREQ; -} - void board_init_f(ulong bootflag) { u32 plat_ratio, sys_clk, ccb_clk; diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c index 2be921f47a811b620297e6527fff21aab4b0bed3..7ec931c8a83129ffce0ab2e31917053e8a770d68 100644 --- a/board/gateworks/gw_ventana/common.c +++ b/board/gateworks/gw_ventana/common.c @@ -1681,8 +1681,7 @@ void ft_early_fixup(void *blob, int board_type) * disable serial2 node for GW54xx for compatibility with older * 3.10.x kernel that improperly had this node enabled in the DT */ - fdt_set_status_by_alias(blob, "serial2", FDT_STATUS_DISABLED, - 0); + fdt_set_status_by_alias(blob, "serial2", FDT_STATUS_DISABLED); /* GW54xx-E adds WDOG2_B external reset */ if (rev < 'E') diff --git a/board/keymile/kmcent2/kmcent2.c b/board/keymile/kmcent2/kmcent2.c index 4f5164e63ca9b2a960fde4419add60a319e804ba..ca24b960c7624babb29ca700550f018158531c72 100644 --- a/board/keymile/kmcent2/kmcent2.c +++ b/board/keymile/kmcent2/kmcent2.c @@ -181,11 +181,6 @@ unsigned long get_serial_clock(unsigned long dummy) return (gd->bus_clk / 2); } -unsigned long get_board_sys_clk(unsigned long dummy) -{ - return 66666666; -} - int misc_init_f(void) { /* configure QRIO pis for i2c deblocking */ diff --git a/board/kontron/sl28/sl28.c b/board/kontron/sl28/sl28.c index c8ed7ac81abe43f0f83a55be996b1aca3430e22b..e84b35691865dbb6234f921b845f6e7de9393373 100644 --- a/board/kontron/sl28/sl28.c +++ b/board/kontron/sl28/sl28.c @@ -75,7 +75,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) if (CONFIG_IS_ENABLED(SL28_SPL_LOADS_OPTEE_BL32)) { node = fdt_node_offset_by_compatible(blob, -1, "linaro,optee-tz"); if (node) - fdt_set_node_status(blob, node, FDT_STATUS_OKAY, 0); + fdt_set_node_status(blob, node, FDT_STATUS_OKAY); } return 0; diff --git a/board/liebherr/display5/spl.c b/board/liebherr/display5/spl.c index d5fe336d22dec5e144c59226613a63091ae02932..5c1af1a7720fded226e29904d0ed2c81a1e7541d 100644 --- a/board/liebherr/display5/spl.c +++ b/board/liebherr/display5/spl.c @@ -327,8 +327,10 @@ void board_init_f(ulong dummy) displ5_set_iomux_misc_spl(); /* Initialize and reset WDT in SPL */ +#ifdef CONFIG_SPL_WATCHDOG hw_watchdog_init(); WATCHDOG_RESET(); +#endif /* load/boot image from boot device */ board_init_r(NULL, 0); diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c index ff69607d3ccdae0490625448d2fee47bb32167b1..17b8108cc88f84b5b841b8109ca78ab5b12c94c5 100644 --- a/board/raspberrypi/rpi/rpi.c +++ b/board/raspberrypi/rpi/rpi.c @@ -510,7 +510,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) node = fdt_node_offset_by_compatible(blob, -1, "simple-framebuffer"); if (node < 0) - lcd_dt_simplefb_add_node(blob); + fdt_simplefb_add_node(blob); #ifdef CONFIG_EFI_LOADER /* Reserve the spin table */ diff --git a/board/renesas/eagle/eagle.c b/board/renesas/eagle/eagle.c index 3417b50f3b0d0c0e839c1b6d25aabe0170e67558..9af935c33f6de92752aea6b4f0070928eff942ab 100644 --- a/board/renesas/eagle/eagle.c +++ b/board/renesas/eagle/eagle.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include @@ -50,7 +51,7 @@ void s_init(void) writel(0xA5A5A500, &swdt->swtcsra); /* CPU frequency setting. Set to 0.8GHz */ - stc = ((800 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_OFFSET; + stc = ((800 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_OFFSET; clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc); } diff --git a/board/renesas/gose/gose.c b/board/renesas/gose/gose.c index 51768c315ef5a69f37708bcb1c24eea2de5a8644..6197e549c2e51b77d0d1399550a9b9769e0728c7 100644 --- a/board/renesas/gose/gose.c +++ b/board/renesas/gose/gose.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include @@ -45,7 +46,7 @@ void s_init(void) writel(0xA5A5A500, &swdt->swtcsra); /* CPU frequency setting. Set to 1.5GHz */ - stc = ((1500 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_BIT; + stc = ((1500 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_BIT; clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc); /* QoS */ diff --git a/board/renesas/koelsch/koelsch.c b/board/renesas/koelsch/koelsch.c index 7e94bd82052477213e7fd8376b5fb86a7ece994b..87607df20d5eee9919a6d276e7be6907f927b9e9 100644 --- a/board/renesas/koelsch/koelsch.c +++ b/board/renesas/koelsch/koelsch.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include @@ -47,7 +48,7 @@ void s_init(void) writel(0xA5A5A500, &swdt->swtcsra); /* CPU frequency setting. Set to 1.5GHz */ - stc = ((1500 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_BIT; + stc = ((1500 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_BIT; clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc); /* QoS */ diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c index 87c5e013711dfd5c3f302b62ef1679bffbf84ff8..8e24ac013c05a305c7464183f5716c3ad2c9e675 100644 --- a/board/renesas/lager/lager.c +++ b/board/renesas/lager/lager.c @@ -8,6 +8,7 @@ */ #include +#include #include #include #include @@ -50,7 +51,7 @@ void s_init(void) /* CPU frequency setting. Set to 1.4GHz */ if (rmobile_get_cpu_rev_integer() >= R8A7790_CUT_ES2X) { u32 stat = 0; - u32 stc = ((1400 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) + u32 stc = ((1400 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_BIT; clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc); diff --git a/board/renesas/porter/porter.c b/board/renesas/porter/porter.c index b0f8505252aa3b5ae167d7f568168fc09d48b711..1a3a4c11a17267ef0f28259d774604ded42d3a47 100644 --- a/board/renesas/porter/porter.c +++ b/board/renesas/porter/porter.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include @@ -47,7 +48,7 @@ void s_init(void) writel(0xA5A5A500, &swdt->swtcsra); /* CPU frequency setting. Set to 1.5GHz */ - stc = ((1500 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_BIT; + stc = ((1500 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_BIT; clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc); /* QoS */ diff --git a/board/renesas/stout/stout.c b/board/renesas/stout/stout.c index 3fdf936ddcac6b8e743cdd7f263bd876823376f3..56bdb34329a7f0ec31dfd73502be50bfed6ce73c 100644 --- a/board/renesas/stout/stout.c +++ b/board/renesas/stout/stout.c @@ -9,6 +9,7 @@ */ #include +#include #include #include #include @@ -50,7 +51,7 @@ void s_init(void) /* CPU frequency setting. Set to 1.4GHz */ if (rmobile_get_cpu_rev_integer() >= R8A7790_CUT_ES2X) { u32 stat = 0; - u32 stc = ((1400 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) + u32 stc = ((1400 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_BIT; clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc); diff --git a/board/sandbox/sandbox.env b/board/sandbox/sandbox.env new file mode 100644 index 0000000000000000000000000000000000000000..b4c04635a48eed53ff4186a34f3779608fef0f59 --- /dev/null +++ b/board/sandbox/sandbox.env @@ -0,0 +1,25 @@ +stdin=serial +#ifdef CONFIG_SANDBOX_SDL +stdin+=,cros-ec-keyb,usbkbd +#endif +stdout=serial,vidconsole +stderr=serial,vidconsole + +ethaddr=02:00:11:22:33:44 +eth2addr=02:00:11:22:33:48 +eth3addr=02:00:11:22:33:45 +eth4addr=02:00:11:22:33:48 +eth5addr=02:00:11:22:33:46 +eth6addr=02:00:11:22:33:47 +ipaddr=192.0.2.1 + +/* + * These are used for distro boot which is not supported. But once bootmethod + * is provided these will be used again. + */ +bootm_size=0x10000000 +kernel_addr_r=0x1000000 +fdt_addr_r=0xc00000 +ramdisk_addr_r=0x2000000 +scriptaddr=0x1000 +pxefile_addr_r=0x2000 diff --git a/board/siemens/capricorn/MAINTAINERS b/board/siemens/capricorn/MAINTAINERS index bc7d163e1796278f0f217206ccae1760d793d9a8..b4c52032cc9a160d832c786685671e07e7684b19 100644 --- a/board/siemens/capricorn/MAINTAINERS +++ b/board/siemens/capricorn/MAINTAINERS @@ -5,7 +5,6 @@ F: board/siemens/capricorn/ F: include/configs/capricorn-common.h F: include/configs/deneb.h F: include/configs/giedi.h -F: include/configs/siemens-ccp-common.h F: include/configs/siemens-env-common.h F: configs/deneb_defconfig F: configs/giedi_defconfig diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c index a81cb7b2ba661a610e540d76511ce3c8ebfc3fa7..f6a3cc1793cd40c62b4071dd633c1a35a005a23e 100644 --- a/board/socrates/socrates.c +++ b/board/socrates/socrates.c @@ -57,7 +57,7 @@ int checkboard (void) /* Check the PCI_clk sel bit */ if (in_be32(&gur->porpllsr) & (1<<15)) { src = "SYSCLK"; - f = CONFIG_SYS_CLK_FREQ; + f = get_board_sys_clk(); } else { src = "PCI_CLK"; f = CONFIG_PCI_CLK_FREQ; diff --git a/board/st/common/stm32mp_dfu.c b/board/st/common/stm32mp_dfu.c index 00d1fb8f598276d8a77c39aa974a66597b430d88..a3f0da5b5b867afd2bef1951c9d6f6f6e7a8ba28 100644 --- a/board/st/common/stm32mp_dfu.c +++ b/board/st/common/stm32mp_dfu.c @@ -132,6 +132,10 @@ void set_dfu_alt_info(char *interface, char *devstr) mtd = get_mtd_device_nm("nor0"); if (!IS_ERR_OR_NULL(mtd)) board_get_alt_info_mtd(mtd, buf); + + mtd = get_mtd_device_nm("nor1"); + if (!IS_ERR_OR_NULL(mtd)) + board_get_alt_info_mtd(mtd, buf); } mtd = get_mtd_device_nm("nand0"); diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index 84592677e4af563bc3a3bc58e48a10350891c33d..45f2ca81a64f7e032351b232954b0f79addde0f2 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -914,6 +915,9 @@ int ft_board_setup(void *blob, struct bd_info *bd) if (IS_ENABLED(CONFIG_FDT_FIXUP_PARTITIONS)) fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes)); + if (CONFIG_IS_ENABLED(FDT_SIMPLEFB)) + fdt_simplefb_enable_and_mem_rsv(blob); + return 0; } #endif diff --git a/board/sunxi/board.c b/board/sunxi/board.c index fdbcd4026938f4a16f6b34b315d5e3ff7fd2975d..2790a0f9e874477f646fb2963970ec5a869540c1 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -11,6 +11,7 @@ */ #include +#include #include #include #include @@ -667,7 +668,7 @@ void sunxi_board_init(void) * assured it's being powered with suitable core voltage */ if (!power_failed) - clock_set_pll1(CONFIG_SYS_CLK_FREQ); + clock_set_pll1(get_board_sys_clk()); else printf("Failed to set core voltage! Can't set CPU frequency\n"); } diff --git a/board/theadorable/theadorable.c b/board/theadorable/theadorable.c index bb2d51495638a1ae0fe8d3311e7d3dcad9ba51ea..6e41ca239919b9a06a352caad50a4bac05f3ac99 100644 --- a/board/theadorable/theadorable.c +++ b/board/theadorable/theadorable.c @@ -298,10 +298,19 @@ int board_late_init(void) bootcount_inc(); if (bootcount > PEX_SWITCH_NOT_FOUNT_LIMIT) { - printf("Issuing power-switch via uC!\n"); + struct udevice *dev; printf("Issuing power-switch via uC!\n"); - i2c_set_bus_num(STM_I2C_BUS); + ret = i2c_get_chip_for_busnum(STM_I2C_BUS, STM_I2C_ADDR, + 1, &dev); + if (ret) { + printf("Error selecting STM on I2C bus (ret=%d)\n", + ret); + printf("Issuing soft-reset...\n"); + /* default handling: SOFT reset */ + do_reset(NULL, 0, 0, NULL); + } + i2c_buf[0] = STM_I2C_ADDR << 1; i2c_buf[1] = 0xc5; /* cmd */ i2c_buf[2] = 0x01; /* enable */ @@ -313,7 +322,7 @@ int board_late_init(void) i2c_buf[6] = 0x00; i2c_buf[7] = crc8(0x72, &i2c_buf[0], 7); - ret = i2c_write(STM_I2C_ADDR, 0, 0, &i2c_buf[1], 7); + ret = dm_i2c_write(dev, 0, &i2c_buf[1], 7); if (ret) { printf("I2C write error (ret=%d)\n", ret); printf("Issuing soft-reset...\n"); diff --git a/board/warp7/Kconfig b/board/warp7/Kconfig index e5051cdda66a49929509d1cf6a7c8623c44388ed..05b4420afc82676e9fab9a708599392a4d0bfb8b 100644 --- a/board/warp7/Kconfig +++ b/board/warp7/Kconfig @@ -14,12 +14,6 @@ config WARP7_ROOT_PART partition that is typically specified with root=/dev/sdaX or which gets converted into a root=PARTUUID=some_uuid. -config SYS_FDT_ADDR - hex "FDT load address" - default 0x83000000 - help - The address the FDT file should be loaded to. - config IMX_CONFIG default "board/warp7/imximage.cfg" diff --git a/board/xen/xenguest_arm64/Kconfig b/board/xen/xenguest_arm64/Kconfig index cc131ed5b96d83afa0ea2e53763491747520685f..4d8aa35007039d982113d0c8e697753e832f049a 100644 --- a/board/xen/xenguest_arm64/Kconfig +++ b/board/xen/xenguest_arm64/Kconfig @@ -9,4 +9,7 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "xenguest_arm64" +config LNX_KRNL_IMG_TEXT_OFFSET_BASE + default SYS_LOAD_ADDR + endif diff --git a/board/xes/common/Makefile b/board/xes/common/Makefile index 49320305470e88a09cf31dd27f0fa6e818541f2c..002821916c4bd40a73fe1a2876b9b00d85e725cc 100644 --- a/board/xes/common/Makefile +++ b/board/xes/common/Makefile @@ -3,7 +3,6 @@ # (C) Copyright 2006 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. -obj-$(CONFIG_FSL_PCI_INIT) += fsl_8xxx_pci.o obj-$(CONFIG_MPC86xx) += fsl_8xxx_clk.o obj-$(CONFIG_ARCH_P2020) += fsl_8xxx_clk.o obj-$(CONFIG_MPC85xx) += fsl_8xxx_misc.o board.o diff --git a/board/xes/common/fsl_8xxx_clk.c b/board/xes/common/fsl_8xxx_clk.c index 8ca65ca859310c251234aa698a9ae10009c31d09..20e88d43604fff7df8857e4c6ffa4b1f7b884a55 100644 --- a/board/xes/common/fsl_8xxx_clk.c +++ b/board/xes/common/fsl_8xxx_clk.c @@ -4,12 +4,13 @@ */ #include +#include #include /* * Return SYSCLK input frequency - 50 MHz or 66 MHz depending on POR config */ -unsigned long get_board_sys_clk(ulong dummy) +unsigned long get_board_sys_clk(void) { #if defined(CONFIG_MPC85xx) volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); @@ -33,13 +34,13 @@ unsigned long get_board_sys_clk(ulong dummy) * Return DDR input clock - synchronous with SYSCLK or 66 MHz * Note: 86xx doesn't support asynchronous DDR clk */ -unsigned long get_board_ddr_clk(ulong dummy) +unsigned long get_board_ddr_clk(void) { volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); u32 ddr_ratio = (in_be32(&gur->porpllsr) & 0x00003e00) >> 9; if (ddr_ratio == 0x7) - return get_board_sys_clk(dummy); + return get_board_sys_clk(); #ifdef CONFIG_ARCH_P2020 if (in_be32(&gur->gpporcr) & 0x20000) diff --git a/board/xes/common/fsl_8xxx_pci.c b/board/xes/common/fsl_8xxx_pci.c deleted file mode 100644 index c1fce7d33135843a46e1c3fc3888db482eaf41c9..0000000000000000000000000000000000000000 --- a/board/xes/common/fsl_8xxx_pci.c +++ /dev/null @@ -1,22 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2008 Extreme Engineering Solutions, Inc. - * Copyright 2007-2008 Freescale Semiconductor, Inc. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#if defined(CONFIG_OF_BOARD_SETUP) -void ft_board_pci_setup(void *blob, struct bd_info *bd) -{ - FT_FSL_PCI_SETUP; -} -#endif /* CONFIG_OF_BOARD_SETUP */ diff --git a/boot/Kconfig b/boot/Kconfig index d3a12be2281681137c13fdd6f007d7ffb3a8a4c4..f1ce576ab2f01b3887cfafb5cc0b8a0555e7b5d6 100644 --- a/boot/Kconfig +++ b/boot/Kconfig @@ -358,11 +358,27 @@ config SYS_TEXT_BASE help The address in memory that U-Boot will be running from, initially. +config DYNAMIC_SYS_CLK_FREQ + bool "Determine CPU clock frequency at run-time" + help + Implement a get_board_sys_clk function that will determine the CPU + clock frequency at run time, rather than define it statically. + config SYS_CLK_FREQ - depends on ARC || ARCH_SUNXI || MPC83xx + depends on !DYNAMIC_SYS_CLK_FREQ int "CPU clock frequency" + default 125000000 if ARCH_LS1012A + default 100000000 if ARCH_P2020 || ARCH_T1024 || ARCH_T1042 || \ + ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3 + default 66666666 if ARCH_P1010 || ARCH_P1020 || ARCH_T4240 + default 66660000 if ARCH_T2080 + default 33333333 if RCAR_GEN3 + default 24000000 if ARCH_EXYNOS + default 20000000 if RCAR_GEN2 + default 0 help - TODO: Move CONFIG_SYS_CLK_FREQ for all the architecture + A static value for the CPU frequency. Note that if not required + for a given SoC, this can be left at 0. config ARCH_FIXUP_FDT_MEMORY bool "Enable arch_fixup_memory_banks() call" @@ -762,6 +778,13 @@ config SD_BOOT booted via SD/EMMC. This is not a must, some SoCs need this, some not. +config SD_BOOT_QSPI + bool "Support for booting from SD/EMMC and enable QSPI" + help + Enabling this will make a U-Boot binary that is capable of being + booted via SD/EMMC while enabling QSPI on the platform as well. This + is not a must, some SoCs need this, some not. + config SPI_BOOT bool "Support for booting from SPI flash" help diff --git a/boot/bootm_os.c b/boot/bootm_os.c index e635c72709ccd5a19e06a8a8897bcb87ddc7ddfd..f31820cd07ef00d440f3fb2454c0f0eb028193ee 100644 --- a/boot/bootm_os.c +++ b/boot/bootm_os.c @@ -26,12 +26,9 @@ DECLARE_GLOBAL_DATA_PTR; static int do_bootm_standalone(int flag, int argc, char *const argv[], bootm_headers_t *images) { - char *s; int (*appl)(int, char *const[]); - /* Don't start if "autostart" is set to "no" */ - s = env_get("autostart"); - if ((s != NULL) && !strcmp(s, "no")) { + if (!env_get_autostart()) { env_set_hex("filesize", images->os.image_len); return 0; } diff --git a/boot/fdt_region.c b/boot/fdt_region.c index e4ef0ca770332089d86f63d171975c59be8e86a8..bac5559329477489d62d4b266b806f939bd5b387 100644 --- a/boot/fdt_region.c +++ b/boot/fdt_region.c @@ -185,6 +185,8 @@ static int fdt_add_region(struct fdt_region_state *info, int offset, int size) reg++; reg->offset = offset; reg->size = size; + if (!(offset - fdt_off_dt_struct(info->fdt))) + info->have_node = true; } } else { return -1; @@ -342,13 +344,19 @@ static int fdt_include_supernodes(struct fdt_region_state *info, int depth) return 0; } +/* + * Tracks the progress through the device tree. Everything fdt_next_region() is + * called it picks up at the same state as last time, looks at info->start and + * decides what region to add next + */ enum { - FDT_DONE_NOTHING, - FDT_DONE_MEM_RSVMAP, - FDT_DONE_STRUCT, - FDT_DONE_END, - FDT_DONE_STRINGS, - FDT_DONE_ALL, + FDT_DONE_NOTHING, /* Starting */ + FDT_DONE_MEM_RSVMAP, /* Completed mem_rsvmap region */ + FDT_DONE_STRUCT, /* Completed struct region */ + FDT_DONE_EMPTY, /* Completed checking for empty struct region */ + FDT_DONE_END, /* Completed the FDT_END tag */ + FDT_DONE_STRINGS, /* Completed the strings */ + FDT_DONE_ALL, /* All done */ }; int fdt_first_region(const void *fdt, @@ -365,6 +373,7 @@ int fdt_first_region(const void *fdt, info->can_merge = 1; info->max_regions = 1; info->start = -1; + info->have_node = false; p->want = WANT_NOTHING; p->end = path; *p->end = '\0'; @@ -633,6 +642,8 @@ int fdt_next_region(const void *fdt, * region. */ if (!include && info->start != -1) { + if (!info->start) + info->have_node = true; if (fdt_add_region(info, base + info->start, stop_at - info->start)) return 0; @@ -644,11 +655,31 @@ int fdt_next_region(const void *fdt, info->ptrs = p; } + if (info->ptrs.done < FDT_DONE_EMPTY) { + /* + * Handle a special case where no nodes have been written. Write + * the first { so we have at least something, since + * FDT_REG_SUPERNODES means that a valid tree is required. A + * tree with no nodes is not valid + */ + if ((flags & FDT_REG_SUPERNODES) && !info->have_node && + info->start) { + /* Output the FDT_BEGIN_NODE and the empty name */ + if (fdt_add_region(info, base, 8)) + return 0; + } + info->ptrs.done++; + } + /* Add a region for the END tag and a separate one for string table */ if (info->ptrs.done < FDT_DONE_END) { if (info->ptrs.nextoffset != fdt_size_dt_struct(fdt)) return -FDT_ERR_BADSTRUCTURE; + /* Output the } before the end tag to finish it off */ + if (info->start == fdt_size_dt_struct(fdt) - 4) + info->start -= 4; + if (fdt_add_region(info, base + info->start, info->ptrs.nextoffset - info->start)) return 0; diff --git a/boot/image-fit.c b/boot/image-fit.c index 33b4a46028b2b3da3f907d9f2c46ae71871bba00..b629339f4e0ad46c5ce76848553b0c6d3da4ee35 100644 --- a/boot/image-fit.c +++ b/boot/image-fit.c @@ -1202,7 +1202,7 @@ int fit_set_timestamp(void *fit, int noffset, time_t timestamp) * calculate_hash - calculate and return hash for provided input data * @data: pointer to the input data * @data_len: data length - * @algo: requested hash algorithm + * @name: requested hash algorithm name * @value: pointer to the char, will hold hash value data (caller must * allocate enough free space) * value_len: length of the calculated hash @@ -1230,7 +1230,7 @@ int calculate_hash(const void *data, int data_len, const char *name, return -1; } - hash_algo = hash_algo_lookup_by_name(algo); + hash_algo = hash_algo_lookup_by_name(name); if (hash_algo == HASH_ALGO_INVALID) { debug("Unsupported hash algorithm\n"); return -1; diff --git a/boot/pxe_utils.c b/boot/pxe_utils.c index a7a84f26c1d56556ef8f4cb2ca539b3b419bacec..a32acca8ee8a21de9f0a61b93aa52abf5eba0a9f 100644 --- a/boot/pxe_utils.c +++ b/boot/pxe_utils.c @@ -550,7 +550,10 @@ static int label_boot(struct pxe_context *ctx, struct pxe_label *label) * Scenario 2: If there is an fdt_addr specified, pass it along to * bootm, and adjust argc appropriately. * - * Scenario 3: fdt blob is not available. + * Scenario 3: If there is an fdtcontroladdr specified, pass it along to + * bootm, and adjust argc appropriately. + * + * Scenario 4: fdt blob is not available. */ bootm_argv[3] = env_get("fdt_addr_r"); @@ -652,6 +655,9 @@ static int label_boot(struct pxe_context *ctx, struct pxe_label *label) if (!bootm_argv[3]) bootm_argv[3] = env_get("fdt_addr"); + if (!bootm_argv[3]) + bootm_argv[3] = env_get("fdtcontroladdr"); + if (bootm_argv[3]) { if (!bootm_argv[2]) bootm_argv[2] = "-"; diff --git a/cmd/Kconfig b/cmd/Kconfig index 02c298fdbe4b1ecbe042d6a702f678a168b5c266..d70dbd47880603a009d91884e06b01c870b88961 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -741,7 +741,7 @@ endif config SYS_MEMTEST_START hex "default start address for mtest" - default 0 + default 0x0 help This is the default start address for mtest for simple read/write test. If no arguments are given to mtest, default address is used @@ -2226,6 +2226,27 @@ config CMD_JFFS2 provide the ability to load files, list directories and obtain filesystem information. +config JFFS2_DEV + string "Default device for JFFS2" + depends on CMD_JFFS2 + default "nor0" + help + The default device to use with the jffs2 command. + +config JFFS2_PART_OFFSET + hex "Default offset within flash to locate the JFFS2 image" + depends on CMD_JFFS2 + default 0x0 + help + The default offset within flash to locate the JFFS2 image. + +config JFFS2_PART_SIZE + hex "Default size of JFFS2 partition" + depends on CMD_JFFS2 + default 0xFFFFFFFF + help + The default size of the JFFS2 partition + config CMD_MTDPARTS bool "MTD partition support" depends on MTD @@ -2357,6 +2378,8 @@ config CMD_LOG config CMD_TRACE bool "trace - Support tracing of function calls and timing" + depends on TRACE + default y help Enables a command to control using of function tracing within U-Boot. This allows recording of call traces including timing diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c index bf63cc6d649e21e95bfa75b1669b7dc69ac90bd6..c56b3f4f6ec2768f838341ea30a9887129ec763a 100644 --- a/cmd/bdinfo.c +++ b/cmd/bdinfo.c @@ -128,6 +128,8 @@ int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) lmb_init_and_reserve(&lmb, gd->bd, (void *)gd->fdt_blob); lmb_dump_all_force(&lmb); + if (IS_ENABLED(CONFIG_OF_REAL)) + printf("devicetree = %s\n", fdtdec_get_srcname()); } arch_print_bdinfo(); diff --git a/cmd/bootm.c b/cmd/bootm.c index 92468d09a1f9ff75461f58f6815f6ce3fa672432..b82a872a86c4b548ac7d26f901126efcbbaeda11 100644 --- a/cmd/bootm.c +++ b/cmd/bootm.c @@ -140,9 +140,7 @@ int do_bootm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) int bootm_maybe_autostart(struct cmd_tbl *cmdtp, const char *cmd) { - const char *ep = env_get("autostart"); - - if (ep && !strcmp(ep, "yes")) { + if (env_get_autostart()) { char *local_args[2]; local_args[0] = (char *)cmd; local_args[1] = NULL; diff --git a/cmd/elf.c b/cmd/elf.c index d75b21461c2096f5b4deb1d9211d4c485947ed22..2b33c50bd026b31ea359d323d783a44d89e8a2a1 100644 --- a/cmd/elf.c +++ b/cmd/elf.c @@ -41,7 +41,6 @@ int do_bootelf(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) unsigned long addr; /* Address of the ELF image */ unsigned long rc; /* Return value from user code */ char *sload = NULL; - const char *ep = env_get("autostart"); int rcode = 0; /* Consume 'bootelf' */ @@ -69,7 +68,7 @@ int do_bootelf(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) else addr = load_elf_image_shdr(addr); - if (ep && !strcmp(ep, "no")) + if (!env_get_autostart()) return rcode; printf("## Starting application at 0x%08lx ...\n", addr); diff --git a/cmd/host.c b/cmd/host.c index 2e998abbcdca35371f765b6ee4e825bdf8f0d675..f0d989ac0f9e914f5da16f1eeb91e09aff78d56a 100644 --- a/cmd/host.c +++ b/cmd/host.c @@ -78,7 +78,7 @@ static int do_host_info(struct cmd_tbl *cmdtp, int flag, int argc, if (argc < 1 || argc > 2) return CMD_RET_USAGE; int min_dev = 0; - int max_dev = CONFIG_HOST_MAX_DEVICES - 1; + int max_dev = SANDBOX_HOST_MAX_DEVICES - 1; if (argc >= 2) { char *ep; char *dev_str = argv[1]; diff --git a/cmd/jffs2.c b/cmd/jffs2.c index 63bd55263a29611037bf75395bc5622d0a2e2d9b..6f15b57b6a18eb0132877271cfb3b70e0dc4d0d3 100644 --- a/cmd/jffs2.c +++ b/cmd/jffs2.c @@ -360,11 +360,7 @@ int mtdparts_init(void) /* id */ id->mtd_id = "single part"; -#if defined(CONFIG_JFFS2_DEV) dev_name = CONFIG_JFFS2_DEV; -#else - dev_name = "nor0"; -#endif if ((mtd_id_parse(dev_name, NULL, &id->type, &id->num) != 0) || (mtd_device_validate(id->type, id->num, &size) != 0)) { @@ -382,17 +378,9 @@ int mtdparts_init(void) part->name = "static"; part->auto_name = 0; -#if defined(CONFIG_JFFS2_PART_SIZE) part->size = CONFIG_JFFS2_PART_SIZE; -#else - part->size = SIZE_REMAINING; -#endif -#if defined(CONFIG_JFFS2_PART_OFFSET) part->offset = CONFIG_JFFS2_PART_OFFSET; -#else - part->offset = 0x00000000; -#endif part->dev = current_mtd_dev; INIT_LIST_HEAD(&part->link); diff --git a/cmd/mbr.c b/cmd/mbr.c index e7e229809691a2aee72d7acb4cb8350921582b74..c269833eb82fc5ec570ff173615cd4846605ff73 100644 --- a/cmd/mbr.c +++ b/cmd/mbr.c @@ -244,12 +244,12 @@ static int do_verify_mbr(struct blk_desc *dev, const char *str) for (i = 0; i < count; i++) { struct disk_partition p; - if (part_get_info(dev, i+1, &p)) + if (part_get_info(dev, i + 1, &p)) goto fail; - if ((partitions[i].size && p.size < partitions[i].size) || - (partitions[i].start && p.start < partitions[i].start) || - (p.sys_ind != partitions[i].sys_ind)) + if ((partitions[i].size && p.size != partitions[i].size) || + (partitions[i].start && p.start != partitions[i].start) || + p.sys_ind != partitions[i].sys_ind) goto fail; } ret = 0; diff --git a/cmd/mvebu/bubt.c b/cmd/mvebu/bubt.c index a7f3ff3c6fc0ec7b95c102df80051f6803d92606..1362c03bcee57842834d81f7a6173ab7e9371024 100644 --- a/cmd/mvebu/bubt.c +++ b/cmd/mvebu/bubt.c @@ -271,8 +271,8 @@ static int spi_burn_image(size_t image_size) u32 erase_bytes; /* Probe the SPI bus to get the flash device */ - flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, - CONFIG_ENV_SPI_CS, + flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS, + CONFIG_SF_DEFAULT_CS, CONFIG_SF_DEFAULT_SPEED, CONFIG_SF_DEFAULT_MODE); if (!flash) { diff --git a/cmd/sf.c b/cmd/sf.c index eac27ed2d77d2bd2e702c73cab82c0f040751d0d..72246d912fe71c5a699dd6b48c051b4ff0626032 100644 --- a/cmd/sf.c +++ b/cmd/sf.c @@ -384,7 +384,6 @@ static int do_spi_protect(int argc, char *const argv[]) return ret == 0 ? 0 : 1; } -#ifdef CONFIG_CMD_SF_TEST enum { STAGE_ERASE, STAGE_CHECK, @@ -394,7 +393,7 @@ enum { STAGE_COUNT, }; -static char *stage_name[STAGE_COUNT] = { +static const char *stage_name[STAGE_COUNT] = { "erase", "check", "write", @@ -548,7 +547,6 @@ static int do_spi_flash_test(int argc, char *const argv[]) return 0; } -#endif /* CONFIG_CMD_SF_TEST */ static int do_spi_flash(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) @@ -582,10 +580,8 @@ static int do_spi_flash(struct cmd_tbl *cmdtp, int flag, int argc, ret = do_spi_flash_erase(argc, argv); else if (strcmp(cmd, "protect") == 0) ret = do_spi_protect(argc, argv); -#ifdef CONFIG_CMD_SF_TEST - else if (!strcmp(cmd, "test")) + else if (IS_ENABLED(CONFIG_CMD_SF_TEST) && !strcmp(cmd, "test")) ret = do_spi_flash_test(argc, argv); -#endif else ret = -1; @@ -597,16 +593,8 @@ usage: return CMD_RET_USAGE; } -#ifdef CONFIG_CMD_SF_TEST -#define SF_TEST_HELP "\nsf test offset len " \ - "- run a very basic destructive test" -#else -#define SF_TEST_HELP -#endif - -U_BOOT_CMD( - sf, 5, 1, do_spi_flash, - "SPI flash sub-system", +#ifdef CONFIG_SYS_LONGHELP +static const char long_help[] = "probe [[bus:]cs] [hz] [mode] - init flash device on given SPI bus\n" " and chip select\n" "sf read addr offset|partition len - read `len' bytes starting at\n" @@ -622,6 +610,14 @@ U_BOOT_CMD( " at `addr' to flash at `offset'\n" " or to start of mtd `partition'\n" "sf protect lock/unlock sector len - protect/unprotect 'len' bytes starting\n" - " at address 'sector'\n" - SF_TEST_HELP + " at address 'sector'" +#ifdef CONFIG_CMD_SF_TEST + "\nsf test offset len - run a very basic destructive test" +#endif +#endif /* CONFIG_SYS_LONGHELP */ + ; + +U_BOOT_CMD( + sf, 5, 1, do_spi_flash, + "SPI flash sub-system", long_help ); diff --git a/cmd/unzip.c b/cmd/unzip.c index 3d1f5f3ac1066e06dde8f54ca04e6c47125f206f..bc6cee060432fc6040ba51d51f55ca3879360de7 100644 --- a/cmd/unzip.c +++ b/cmd/unzip.c @@ -8,6 +8,7 @@ #include #include #include +#include #include static int do_unzip(struct cmd_tbl *cmdtp, int flag, int argc, @@ -28,7 +29,8 @@ static int do_unzip(struct cmd_tbl *cmdtp, int flag, int argc, return CMD_RET_USAGE; } - if (gunzip((void *) dst, dst_len, (void *) src, &src_len) != 0) + if (gunzip(map_sysmem(dst, dst_len), dst_len, map_sysmem(src, 0), + &src_len) != 0) return 1; printf("Uncompressed size: %lu = 0x%lX\n", src_len, src_len); diff --git a/common/Kconfig b/common/Kconfig index fdcf4536d0f0abae28984238a5908416bc0e8235..0892d9be362c481137e44048562d215838bfeee9 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -32,6 +32,16 @@ config CONSOLE_RECORD_OUT_SIZE more data will be recorded until some is removed. The buffer is allocated immediately after the malloc() region is ready. +config CONSOLE_RECORD_OUT_SIZE_F + hex "Output buffer size before relocation" + depends on CONSOLE_RECORD + default 0x400 if CONSOLE_RECORD + help + Set the size of the console output buffer before relocation. When + this fills up, no more data will be recorded until some is removed. + The buffer is allocated immediately after the early malloc() region is + ready. + config CONSOLE_RECORD_IN_SIZE hex "Input buffer size" depends on CONSOLE_RECORD @@ -524,6 +534,15 @@ config BOARD_LATE_INIT So this config enable the late init code with the help of board_late_init function which should defined on respective boards. +config SYS_FSL_CLK + bool + depends on ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3 || \ + (FSL_ESDHC_IMX && (ARCH_MX5 || ARCH_MX6 || ARCH_MX7)) + default y + help + Enable to call get_clocks() in board_init_f() for platforms other + than PowerPC or M68k. This is a legacy option. If not TARGET_BRPPT2 + config LAST_STAGE_INIT bool "Call board-specific as last setup step" help @@ -717,6 +736,8 @@ config TPL_BLOBLIST This enables a bloblist in TPL. The bloblist is set up in TPL and passed to SPL and U-Boot proper. +if BLOBLIST + config BLOBLIST_SIZE hex "Size of bloblist" depends on BLOBLIST @@ -727,17 +748,24 @@ config BLOBLIST_SIZE is set up in the first part of U-Boot to run (TPL, SPL or U-Boot proper), and this sane bloblist is used for subsequent stages. +config BLOBLIST_ALLOC + bool "Allocate bloblist" + help + Allocate the bloblist using malloc(). This avoids the need to + specify a fixed address on systems where this is unknown or can + change at runtime. + config BLOBLIST_ADDR hex "Address of bloblist" - depends on BLOBLIST default 0xc000 if SANDBOX help Sets the address of the bloblist, set up by the first part of U-Boot which runs. Subsequent U-Boot stages typically use the same address. + This is not used if BLOBLIST_ALLOC is selected. + config BLOBLIST_SIZE_RELOC hex "Size of bloblist after relocation" - depends on BLOBLIST default BLOBLIST_SIZE help Sets the size of the bloblist in bytes after relocation. Since U-Boot @@ -745,6 +773,8 @@ config BLOBLIST_SIZE_RELOC size than the one set up by SPL. This bloblist is set up during the relocation process. +endif # BLOBLIST + endmenu source "common/spl/Kconfig" @@ -766,3 +796,12 @@ config SPL_IMAGE_SIGN_INFO Enable image_sign_info helper functions in SPL. endif + +config FDT_SIMPLEFB + bool "FDT tools for simplefb support" + depends on OF_LIBFDT + help + Enable the fdt tools to manage the simple fb nodes in device tree. + These functions can be used by board to indicate to the OS + the presence of the simple frame buffer with associated reserved + memory diff --git a/common/Makefile b/common/Makefile index c500bcd7d8a0cdb3439143078861d1a4ab0710d2..24be05c368d096b65fc2e894bc14e3f297a86cec 100644 --- a/common/Makefile +++ b/common/Makefile @@ -18,6 +18,7 @@ obj-$(CONFIG_DISPLAY_BOARDINFO) += board_info.o obj-$(CONFIG_DISPLAY_BOARDINFO_LATE) += board_info.o obj-$(CONFIG_CMD_BEDBUG) += bedbug.o +obj-$(CONFIG_FDT_SIMPLEFB) += fdt_simplefb.o obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += fdt_support.o obj-$(CONFIG_MII) += miiphyutil.o obj-$(CONFIG_CMD_MII) += miiphyutil.o @@ -40,7 +41,6 @@ ifndef CONFIG_DM_VIDEO obj-$(CONFIG_LCD) += lcd.o lcd_console.o endif obj-$(CONFIG_LCD_ROTATION) += lcd_console_rotation.o -obj-$(CONFIG_LCD_DT_SIMPLEFB) += lcd_simplefb.o obj-$(CONFIG_MENU) += menu.o obj-$(CONFIG_UPDATE_COMMON) += update.o obj-$(CONFIG_USB_KEYBOARD) += usb_kbd.o diff --git a/common/bloblist.c b/common/bloblist.c index 1290fff850413e603747ac9e84141b014864f28e..01b04103d9164eb95ad3a1aae421e42e6f6396a5 100644 --- a/common/bloblist.c +++ b/common/bloblist.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -416,10 +417,21 @@ int bloblist_init(void) ret = bloblist_check(CONFIG_BLOBLIST_ADDR, CONFIG_BLOBLIST_SIZE); if (ret) { + ulong addr; + log(LOGC_BLOBLIST, expected ? LOGL_WARNING : LOGL_DEBUG, "Existing bloblist not found: creating new bloblist\n"); - ret = bloblist_new(CONFIG_BLOBLIST_ADDR, CONFIG_BLOBLIST_SIZE, - 0); + if (IS_ENABLED(CONFIG_BLOBLIST_ALLOC)) { + void *ptr = memalign(BLOBLIST_ALIGN, + CONFIG_BLOBLIST_SIZE); + + if (!ptr) + return log_msg_ret("alloc", -ENOMEM); + addr = map_to_sysmem(ptr); + } else { + addr = CONFIG_BLOBLIST_ADDR; + } + ret = bloblist_new(addr, CONFIG_BLOBLIST_SIZE, 0); } else { log(LOGC_BLOBLIST, LOGL_DEBUG, "Found existing bloblist\n"); } diff --git a/common/board_f.c b/common/board_f.c index f7ea7c7a1e4507867aaff72510403fed4b6742e3..dd69c3b6b779449db3c91225b267f46cbace6c74 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -655,8 +655,14 @@ static int reloc_bootstage(void) static int reloc_bloblist(void) { #ifdef CONFIG_BLOBLIST - if (gd->flags & GD_FLG_SKIP_RELOC) + /* + * Relocate only if we are supposed to send it + */ + if ((gd->flags & GD_FLG_SKIP_RELOC) && + CONFIG_BLOBLIST_SIZE == CONFIG_BLOBLIST_SIZE_RELOC) { + debug("Not relocating bloblist\n"); return 0; + } if (gd->new_bloblist) { int size = CONFIG_BLOBLIST_SIZE; diff --git a/common/board_r.c b/common/board_r.c index 31a59c585a8d93861c2a39b92891b10ffb76da41..760c2d05ed00b75956999790d6e199f294459ebf 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -586,6 +586,29 @@ int initr_mem(void) } #endif +static int dm_announce(void) +{ + int device_count; + int uclass_count; + + if (IS_ENABLED(CONFIG_DM)) { + dm_get_stats(&device_count, &uclass_count); + printf("Core: %d devices, %d uclasses", device_count, + uclass_count); + if (CONFIG_IS_ENABLED(OF_REAL)) + printf(", devicetree: %s", fdtdec_get_srcname()); + printf("\n"); + if (IS_ENABLED(CONFIG_OF_HAS_PRIOR_STAGE) && + (gd->fdt_src == FDTSRC_SEPARATE || + gd->fdt_src == FDTSRC_EMBED)) { + printf("Warning: Unexpected devicetree source (not from a prior stage)"); + printf("Warning: U-Boot may not function properly\n"); + } + } + + return 0; +} + static int run_main_loop(void) { #ifdef CONFIG_SANDBOX @@ -661,6 +684,7 @@ static init_fnc_t init_sequence_r[] = { stdio_init_tables, serial_initialize, initr_announce, + dm_announce, #if CONFIG_IS_ENABLED(WDT) initr_watchdog, #endif @@ -817,9 +841,8 @@ void board_init_r(gd_t *new_gd, ulong dest_addr) * TODO(sjg@chromium.org): Consider doing this for all archs, or * dropping the new_gd parameter. */ -#if CONFIG_IS_ENABLED(X86_64) - arch_setup_gd(new_gd); -#endif + if (CONFIG_IS_ENABLED(X86_64) && !IS_ENABLED(CONFIG_EFI_APP)) + arch_setup_gd(new_gd); #ifdef CONFIG_NEEDS_MANUAL_RELOC int i; diff --git a/common/console.c b/common/console.c index 0013d183aeb5499f10cd51e99b30369f7c9165c2..2bccc8ab1032f66b45a2d5f28b95331431ed2ca1 100644 --- a/common/console.c +++ b/common/console.c @@ -348,7 +348,8 @@ static void console_puts_select(int file, bool serial_only, const char *s) void console_puts_select_stderr(bool serial_only, const char *s) { - console_puts_select(stderr, serial_only, s); + if (gd->flags & GD_FLG_DEVINIT) + console_puts_select(stderr, serial_only, s); } static void console_puts(int file, const char *s) @@ -401,7 +402,8 @@ static inline void console_putc(int file, const char c) void console_puts_select(int file, bool serial_only, const char *s) { - if (serial_only == console_dev_is_serial(stdio_devices[file])) + if ((gd->flags & GD_FLG_DEVINIT) && + serial_only == console_dev_is_serial(stdio_devices[file])) stdio_devices[file]->puts(stdio_devices[file], s); } @@ -735,7 +737,9 @@ int console_record_init(void) int ret; ret = membuff_new((struct membuff *)&gd->console_out, - CONFIG_CONSOLE_RECORD_OUT_SIZE); + gd->flags & GD_FLG_RELOC ? + CONFIG_CONSOLE_RECORD_OUT_SIZE : + CONFIG_CONSOLE_RECORD_OUT_SIZE_F); if (ret) return ret; ret = membuff_new((struct membuff *)&gd->console_in, diff --git a/common/lcd_simplefb.c b/common/fdt_simplefb.c similarity index 65% rename from common/lcd_simplefb.c rename to common/fdt_simplefb.c index 1650615cdb9f0494b70a4d9df2c7c08c0c16040f..c52846f4bc59476ccc19bce8975e1ddadbfebedb 100644 --- a/common/lcd_simplefb.c +++ b/common/fdt_simplefb.c @@ -16,7 +16,7 @@ DECLARE_GLOBAL_DATA_PTR; -static int lcd_dt_simplefb_configure_node(void *blob, int off) +static int fdt_simplefb_configure_node(void *blob, int off) { int xsize, ysize; int bpix; /* log2 of bits per pixel */ @@ -58,7 +58,7 @@ static int lcd_dt_simplefb_configure_node(void *blob, int off) xsize * (1 << bpix) / 8, name); } -int lcd_dt_simplefb_add_node(void *blob) +int fdt_simplefb_add_node(void *blob) { static const char compat[] = "simple-framebuffer"; static const char disabled[] = "disabled"; @@ -76,10 +76,10 @@ int lcd_dt_simplefb_add_node(void *blob) if (ret < 0) return -1; - return lcd_dt_simplefb_configure_node(blob, off); + return fdt_simplefb_configure_node(blob, off); } -int lcd_dt_simplefb_enable_existing_node(void *blob) +int fdt_simplefb_enable_existing_node(void *blob) { int off; @@ -87,5 +87,32 @@ int lcd_dt_simplefb_enable_existing_node(void *blob) if (off < 0) return -1; - return lcd_dt_simplefb_configure_node(blob, off); + return fdt_simplefb_configure_node(blob, off); } + +#if CONFIG_IS_ENABLED(DM_VIDEO) +int fdt_simplefb_enable_and_mem_rsv(void *blob) +{ + struct fdt_memory mem; + int ret; + + /* nothing to do when video is not active */ + if (!video_is_active()) + return 0; + + ret = fdt_simplefb_enable_existing_node(blob); + if (ret) + return ret; + + /* nothing to do when the frame buffer is not defined */ + if (gd->video_bottom == gd->video_top) + return 0; + + /* reserved with no-map tag the video buffer */ + mem.start = gd->video_bottom; + mem.end = gd->video_top - 1; + + return fdtdec_add_reserved_memory(blob, "framebuffer", &mem, NULL, 0, NULL, + FDTDEC_RESERVED_MEMORY_NO_MAP); +} +#endif diff --git a/common/fdt_support.c b/common/fdt_support.c index 8992ac5d3fca0c1bbce6ff0b7ba4c52845453608..b2ba0825df3b0a47fcac27b62639f3413abfe254 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -695,6 +695,29 @@ int fdt_shrink_to_minimum(void *blob, uint extrasize) return actualsize; } +/** + * fdt_delete_disabled_nodes: Delete all nodes with status == "disabled" + * + * @blob: ptr to device tree + */ +int fdt_delete_disabled_nodes(void *blob) +{ + while (1) { + int ret, offset; + + offset = fdt_node_offset_by_prop_value(blob, -1, "status", + "disabled", 9); + if (offset < 0) + break; + + ret = fdt_del_node(blob, offset); + if (ret < 0) + return ret; + } + + return 0; +} + #ifdef CONFIG_PCI #define CONFIG_SYS_PCI_NR_INBOUND_WIN 4 @@ -1463,22 +1486,35 @@ int fdt_node_offset_by_compat_reg(void *blob, const char *compat, return -FDT_ERR_NOTFOUND; } +static int vnode_offset_by_pathf(void *blob, const char *fmt, va_list ap) +{ + char path[512]; + int len; + + len = vsnprintf(path, sizeof(path), fmt, ap); + if (len < 0 || len + 1 > sizeof(path)) + return -FDT_ERR_NOSPACE; + + return fdt_path_offset(blob, path); +} + /** - * fdt_alloc_phandle: Return next free phandle value + * fdt_node_offset_by_pathf: Find node offset by sprintf formatted path * * @blob: ptr to device tree + * @fmt: path format + * @ap: vsnprintf arguments */ -int fdt_alloc_phandle(void *blob) +int fdt_node_offset_by_pathf(void *blob, const char *fmt, ...) { - int offset; - uint32_t phandle = 0; + va_list ap; + int res; - for (offset = fdt_next_node(blob, -1, NULL); offset >= 0; - offset = fdt_next_node(blob, offset, NULL)) { - phandle = max(phandle, fdt_get_phandle(blob, offset)); - } + va_start(ap, fmt); + res = vnode_offset_by_pathf(blob, fmt, ap); + va_end(ap); - return phandle + 1; + return res; } /* @@ -1522,7 +1558,7 @@ int fdt_set_phandle(void *fdt, int nodeoffset, uint32_t phandle) } /* - * fdt_create_phandle: Create a phandle property for the given node + * fdt_create_phandle: Get or create a phandle property for the given node * * @fdt: ptr to device tree * @nodeoffset: node to update @@ -1530,13 +1566,19 @@ int fdt_set_phandle(void *fdt, int nodeoffset, uint32_t phandle) unsigned int fdt_create_phandle(void *fdt, int nodeoffset) { /* see if there is a phandle already */ - int phandle = fdt_get_phandle(fdt, nodeoffset); + uint32_t phandle = fdt_get_phandle(fdt, nodeoffset); /* if we got 0, means no phandle so create one */ if (phandle == 0) { int ret; - phandle = fdt_alloc_phandle(fdt); + ret = fdt_generate_phandle(fdt, &phandle); + if (ret < 0) { + printf("Can't generate phandle: %s\n", + fdt_strerror(ret)); + return 0; + } + ret = fdt_set_phandle(fdt, nodeoffset, phandle); if (ret < 0) { printf("Can't set phandle %u: %s\n", phandle, @@ -1548,19 +1590,60 @@ unsigned int fdt_create_phandle(void *fdt, int nodeoffset) return phandle; } +/** + * fdt_create_phandle_by_compatible: Get or create a phandle for first node with + * given compatible + * + * @fdt: ptr to device tree + * @compat: node's compatible string + */ +unsigned int fdt_create_phandle_by_compatible(void *fdt, const char *compat) +{ + int offset = fdt_node_offset_by_compatible(fdt, -1, compat); + + if (offset < 0) { + printf("Can't find node with compatible \"%s\": %s\n", compat, + fdt_strerror(offset)); + return 0; + } + + return fdt_create_phandle(fdt, offset); +} + +/** + * fdt_create_phandle_by_pathf: Get or create a phandle for node given by + * sprintf-formatted path + * + * @fdt: ptr to device tree + * @fmt, ...: path format string and arguments to pass to sprintf + */ +unsigned int fdt_create_phandle_by_pathf(void *fdt, const char *fmt, ...) +{ + va_list ap; + int offset; + + va_start(ap, fmt); + offset = vnode_offset_by_pathf(fdt, fmt, ap); + va_end(ap); + + if (offset < 0) { + printf("Can't find node by given path: %s\n", + fdt_strerror(offset)); + return 0; + } + + return fdt_create_phandle(fdt, offset); +} + /* * fdt_set_node_status: Set status for the given node * * @fdt: ptr to device tree * @nodeoffset: node to update - * @status: FDT_STATUS_OKAY, FDT_STATUS_DISABLED, - * FDT_STATUS_FAIL, FDT_STATUS_FAIL_ERROR_CODE - * @error_code: optional, only used if status is FDT_STATUS_FAIL_ERROR_CODE + * @status: FDT_STATUS_OKAY, FDT_STATUS_DISABLED, FDT_STATUS_FAIL */ -int fdt_set_node_status(void *fdt, int nodeoffset, - enum fdt_status status, unsigned int error_code) +int fdt_set_node_status(void *fdt, int nodeoffset, enum fdt_status status) { - char buf[16]; int ret = 0; if (nodeoffset < 0) @@ -1576,10 +1659,6 @@ int fdt_set_node_status(void *fdt, int nodeoffset, case FDT_STATUS_FAIL: ret = fdt_setprop_string(fdt, nodeoffset, "status", "fail"); break; - case FDT_STATUS_FAIL_ERROR_CODE: - sprintf(buf, "fail-%d", error_code); - ret = fdt_setprop_string(fdt, nodeoffset, "status", buf); - break; default: printf("Invalid fdt status: %x\n", status); ret = -1; @@ -1594,16 +1673,57 @@ int fdt_set_node_status(void *fdt, int nodeoffset, * * @fdt: ptr to device tree * @alias: alias of node to update - * @status: FDT_STATUS_OKAY, FDT_STATUS_DISABLED, - * FDT_STATUS_FAIL, FDT_STATUS_FAIL_ERROR_CODE - * @error_code: optional, only used if status is FDT_STATUS_FAIL_ERROR_CODE + * @status: FDT_STATUS_OKAY, FDT_STATUS_DISABLED, FDT_STATUS_FAIL */ int fdt_set_status_by_alias(void *fdt, const char* alias, - enum fdt_status status, unsigned int error_code) + enum fdt_status status) { int offset = fdt_path_offset(fdt, alias); - return fdt_set_node_status(fdt, offset, status, error_code); + return fdt_set_node_status(fdt, offset, status); +} + +/** + * fdt_set_status_by_compatible: Set node status for first node with given + * compatible + * + * @fdt: ptr to device tree + * @compat: node's compatible string + * @status: FDT_STATUS_OKAY, FDT_STATUS_DISABLED, FDT_STATUS_FAIL + */ +int fdt_set_status_by_compatible(void *fdt, const char *compat, + enum fdt_status status) +{ + int offset = fdt_node_offset_by_compatible(fdt, -1, compat); + + if (offset < 0) + return offset; + + return fdt_set_node_status(fdt, offset, status); +} + +/** + * fdt_set_status_by_pathf: Set node status for node given by sprintf-formatted + * path + * + * @fdt: ptr to device tree + * @status: FDT_STATUS_OKAY, FDT_STATUS_DISABLED, FDT_STATUS_FAIL + * @fmt, ...: path format string and arguments to pass to sprintf + */ +int fdt_set_status_by_pathf(void *fdt, enum fdt_status status, const char *fmt, + ...) +{ + va_list ap; + int offset; + + va_start(ap, fmt); + offset = vnode_offset_by_pathf(fdt, fmt, ap); + va_end(ap); + + if (offset < 0) + return offset; + + return fdt_set_node_status(fdt, offset, status); } #if defined(CONFIG_VIDEO) || defined(CONFIG_LCD) diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 17ce2f6b615dafe8c2fbbec3827e744980250561..4a739a742154b96fa8fda065d3c28f9869b621c0 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -1351,14 +1351,6 @@ config TPL_LDSCRIPT May be left empty to trigger the Makefile infrastructure to fall back to the linker-script used for the SPL stage. -config TPL_NEEDS_SEPARATE_TEXT_BASE - bool "TPL needs a separate text-base" - depends on TPL - help - Enable, if the TPL stage should not inherit its text-base - from the SPL stage. When enabled, a base address for the - .text sections of the TPL stage has to be set below. - config TPL_NEEDS_SEPARATE_STACK bool "TPL needs a separate initial stack-pointer" depends on TPL @@ -1380,7 +1372,6 @@ config TPL_POWER config TPL_TEXT_BASE hex "Base address for the .text section of the TPL stage" - depends on TPL_NEEDS_SEPARATE_TEXT_BASE help The base address for the .text section of the TPL stage. diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c index 5fe0273d66d4683ce40ed8235882a7ae77b67db7..774072b85c56ec597b68615c4d91fc349cf89a80 100644 --- a/common/spl/spl_fit.c +++ b/common/spl/spl_fit.c @@ -286,6 +286,13 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector, if (fit_image_get_data_size(fit, node, &len)) return -ENOENT; + /* Dont bother to copy 0 byte data, but warn, though */ + if (!len) { + log_warning("%s: Skip load '%s': image size is 0!\n", + __func__, fit_get_name(fit, node, NULL)); + return 0; + } + src_ptr = map_sysmem(ALIGN(load_addr, ARCH_DMA_MINALIGN), len); length = len; diff --git a/common/splash.c b/common/splash.c index de720df9f58394c87a5c162d0f55c4e7c0384693..98f0089266d40f135612eaefe983153c47f6224c 100644 --- a/common/splash.c +++ b/common/splash.c @@ -52,7 +52,7 @@ static struct splash_location default_splash_locations[] = { }, }; -#if defined(CONFIG_DM_VIDEO) && defined(CONFIG_VIDEO_LOGO) +#ifdef CONFIG_VIDEO_LOGO #include diff --git a/common/splash_source.c b/common/splash_source.c index d05670f5ee8768f1a04ce18a1502e18e41265b7e..2c03cbdf928b30ba35f806a0f17239394542d029 100644 --- a/common/splash_source.c +++ b/common/splash_source.c @@ -20,6 +20,7 @@ #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; @@ -179,6 +180,16 @@ static inline int splash_init_sata(void) } #endif +static int splash_init_virtio(void) +{ + if (!IS_ENABLED(CONFIG_VIRTIO)) { + printf("Cannot load splash image: no virtio support\n"); + return -ENOSYS; + } else { + return virtio_init(); + } +} + #ifdef CONFIG_CMD_UBIFS static int splash_mount_ubifs(struct splash_location *location) { @@ -233,6 +244,9 @@ static int splash_load_fs(struct splash_location *location, u32 bmp_load_addr) if (location->storage == SPLASH_STORAGE_SATA) res = splash_init_sata(); + if (location->storage == SPLASH_STORAGE_VIRTIO) + res = splash_init_virtio(); + if (location->ubivol != NULL) res = splash_mount_ubifs(location); diff --git a/config.mk b/config.mk index 7bb1fd4ed1b5036e76d083ff00f425ef54f98834..2595aed218b951fa240789dfa3dba2a507565328 100644 --- a/config.mk +++ b/config.mk @@ -50,8 +50,10 @@ endif ifneq ($(BOARD),) ifdef VENDOR BOARDDIR = $(VENDOR)/$(BOARD) +ENVDIR=${vendor}/env else BOARDDIR = $(BOARD) +ENVDIR=${board}/env endif endif ifdef BOARD diff --git a/configs/M5272C3_defconfig b/configs/M5272C3_defconfig index 3d32a6f13e9e48485e362a3a858ea4cb06583936..e46b097be0de97ddbdb65b7177faba31aa8dcafd 100644 --- a/configs/M5272C3_defconfig +++ b/configs/M5272C3_defconfig @@ -20,6 +20,30 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_ENV_ADDR=0xFFE04000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xFFE00201 +CONFIG_SYS_OR0_PRELIM=0xFFE00014 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0x0 +CONFIG_SYS_OR1_PRELIM=0x0 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0x30000001 +CONFIG_SYS_OR2_PRELIM=0xFFF80000 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0x0 +CONFIG_SYS_OR3_PRELIM=0x0 +CONFIG_SYS_BR4_PRELIM_BOOL=y +CONFIG_SYS_BR4_PRELIM=0x0 +CONFIG_SYS_OR4_PRELIM=0x0 +CONFIG_SYS_BR5_PRELIM_BOOL=y +CONFIG_SYS_BR5_PRELIM=0x0 +CONFIG_SYS_OR5_PRELIM=0x0 +CONFIG_SYS_BR6_PRELIM_BOOL=y +CONFIG_SYS_BR6_PRELIM=0x0 +CONFIG_SYS_OR6_PRELIM=0x0 +CONFIG_SYS_BR7_PRELIM_BOOL=y +CONFIG_SYS_BR7_PRELIM=0x701 +CONFIG_SYS_OR7_PRELIM=0xFFC0007C CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/M5275EVB_defconfig b/configs/M5275EVB_defconfig index aed36ce2a846173dfc10c85de80baa5aeac6a707..3cb77b77cf0135ef5f9a0c733234cab457b2074c 100644 --- a/configs/M5275EVB_defconfig +++ b/configs/M5275EVB_defconfig @@ -7,6 +7,8 @@ CONFIG_DEFAULT_DEVICE_TREE="M5275EVB" CONFIG_TARGET_M5275EVB=y CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_BOOTDELAY=5 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="bootm ffe40000" # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig index 625465557f5a1483de5d25f488a7166876b5f411..04fe75651337dba9282e01fd4139e365604033b4 100644 --- a/configs/MCR3000_defconfig +++ b/configs/MCR3000_defconfig @@ -4,7 +4,6 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="mcr3000" CONFIG_MPC8xx=y -CONFIG_SYS_IMMR=0xFF000000 CONFIG_TARGET_MCR3000=y CONFIG_8xx_GCLK_FREQ=132000000 CONFIG_CMD_IMMAP=y @@ -17,29 +16,6 @@ CONFIG_SYS_PLPRCR=0x00460004 CONFIG_SYS_SCCR=0x00C20000 CONFIG_SYS_SCCR_MASK=0x60000000 CONFIG_SYS_DER=0x2002000F -CONFIG_SYS_BR0_PRELIM=0x04000801 -CONFIG_SYS_OR0_PRELIM=0xFFC00926 -CONFIG_SYS_BR1_PRELIM_BOOL=y -CONFIG_SYS_BR1_PRELIM=0x00000081 -CONFIG_SYS_OR1_PRELIM=0xFE000E00 -CONFIG_SYS_BR2_PRELIM_BOOL=y -CONFIG_SYS_BR2_PRELIM=0x08000801 -CONFIG_SYS_OR2_PRELIM=0xFFFF8F2A -CONFIG_SYS_BR3_PRELIM_BOOL=y -CONFIG_SYS_BR3_PRELIM=0x0C000401 -CONFIG_SYS_OR3_PRELIM=0xFFFF8142 -CONFIG_SYS_BR4_PRELIM_BOOL=y -CONFIG_SYS_BR4_PRELIM=0x10000801 -CONFIG_SYS_OR4_PRELIM=0xFFFF8D08 -CONFIG_SYS_BR5_PRELIM_BOOL=y -CONFIG_SYS_BR5_PRELIM=0x14000801 -CONFIG_SYS_OR5_PRELIM=0xFFFF8916 -CONFIG_SYS_BR6_PRELIM_BOOL=y -CONFIG_SYS_BR6_PRELIM=0x18000801 -CONFIG_SYS_OR6_PRELIM=0xFFFF0908 -CONFIG_SYS_BR7_PRELIM_BOOL=y -CONFIG_SYS_BR7_PRELIM=0x1C000001 -CONFIG_SYS_OR7_PRELIM=0xFFFF810A CONFIG_SYS_LOAD_ADDR=0x200000 CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=5 @@ -74,6 +50,30 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0x4004000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0x4000801 +CONFIG_SYS_OR0_PRELIM=0xFFC00926 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0x81 +CONFIG_SYS_OR1_PRELIM=0xFE000E00 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0x8000801 +CONFIG_SYS_OR2_PRELIM=0xFFFF8F2A +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xC000401 +CONFIG_SYS_OR3_PRELIM=0xFFFF8142 +CONFIG_SYS_BR4_PRELIM_BOOL=y +CONFIG_SYS_BR4_PRELIM=0x10000801 +CONFIG_SYS_OR4_PRELIM=0xFFFF8D08 +CONFIG_SYS_BR5_PRELIM_BOOL=y +CONFIG_SYS_BR5_PRELIM=0x14000801 +CONFIG_SYS_OR5_PRELIM=0xFFFF8916 +CONFIG_SYS_BR6_PRELIM_BOOL=y +CONFIG_SYS_BR6_PRELIM=0x18000801 +CONFIG_SYS_OR6_PRELIM=0xFFFF0908 +CONFIG_SYS_BR7_PRELIM_BOOL=y +CONFIG_SYS_BR7_PRELIM=0x1C000001 +CONFIG_SYS_OR7_PRELIM=0xFFFF810A # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig index 52785ce7229a481cc73c3173dfcae316dde223b3..192bcae704e0c0bd6de7ad0e68d9166da201226a 100644 --- a/configs/MPC837XERDB_defconfig +++ b/configs/MPC837XERDB_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="mpc8379erdb" CONFIG_SYS_CLK_FREQ=66666667 +# CONFIG_SYS_PCI_64BIT is not set CONFIG_MPC83xx=y CONFIG_HIGH_BATS=y CONFIG_TARGET_MPC837XERDB=y @@ -169,6 +170,15 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_ADDR=0xFE080000 CONFIG_DM=y CONFIG_FSL_SATA=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xFE001001 +CONFIG_SYS_OR0_PRELIM=0xFF800193 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xE0600C21 +CONFIG_SYS_OR1_PRELIM=0xFFFF8396 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xF0000801 +CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y CONFIG_SYS_FSL_I2C_OFFSET=0x3000 @@ -189,3 +199,4 @@ CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_FSL=y diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig index 3b4377526348bf5a9ad6298d7ae15f239dd511b9..e2afcdee7c673d54cbbbc020b08b7bc5d93926f2 100644 --- a/configs/MPC8548CDS_36BIT_defconfig +++ b/configs/MPC8548CDS_36BIT_defconfig @@ -11,7 +11,10 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_PHYS_64BIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" # CONFIG_MISC_INIT_R is not set CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y @@ -29,6 +32,18 @@ CONFIG_ENV_ADDR=0xFFF60000 CONFIG_DM=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xFF807001 +CONFIG_SYS_OR0_PRELIM=0xFF806E65 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xFF007001 +CONFIG_SYS_OR1_PRELIM=0xFF806E65 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xF0007861 +CONFIG_SYS_OR2_PRELIM=0xFC006901 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xF8006801 +CONFIG_SYS_OR3_PRELIM=0xFFF00FF7 CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_FSL=y diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig index 551630b34b34e40b040bb5c03810b90811f57204..e8f44cfcd41f0e981e9826e7faa580fd7b5dbfda 100644 --- a/configs/MPC8548CDS_defconfig +++ b/configs/MPC8548CDS_defconfig @@ -10,7 +10,10 @@ CONFIG_TARGET_MPC8548CDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" # CONFIG_MISC_INIT_R is not set CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y @@ -28,6 +31,18 @@ CONFIG_ENV_ADDR=0xFFF60000 CONFIG_DM=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xFF801001 +CONFIG_SYS_OR0_PRELIM=0xFF806E65 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xFF001001 +CONFIG_SYS_OR1_PRELIM=0xFF806E65 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xF0001861 +CONFIG_SYS_OR2_PRELIM=0xFC006901 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xF8000801 +CONFIG_SYS_OR3_PRELIM=0xFFF00FF7 CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_FSL=y diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig index 6584f67d0b2071855cddcfd262f5c1c31011b5cc..577385d60efb70e4e324b4d9b96f1e22fe2103dc 100644 --- a/configs/MPC8548CDS_legacy_defconfig +++ b/configs/MPC8548CDS_legacy_defconfig @@ -11,7 +11,10 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="LEGACY" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" # CONFIG_MISC_INIT_R is not set CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y @@ -28,6 +31,18 @@ CONFIG_ENV_ADDR=0xFFF60000 CONFIG_DM=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xFF801001 +CONFIG_SYS_OR0_PRELIM=0xFF806E65 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xFF001001 +CONFIG_SYS_OR1_PRELIM=0xFF806E65 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xF0001861 +CONFIG_SYS_OR2_PRELIM=0xFC006901 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xF8000801 +CONFIG_SYS_OR3_PRELIM=0xFFF00FF7 CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_FSL=y diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index 84e0c64f13bb13869bc4a8ed302f74a2cfe781f1..ef7f24b85fa4558e7a70d6ca2ff380e7d9aff04c 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL=y +CONFIG_TPL_TEXT_BASE=0xD0001000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y @@ -20,6 +21,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y @@ -69,6 +72,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y @@ -94,4 +99,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_ADDR_MAP=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index f33cc22e27e49d6b4f2d852bc91ebd908648b570..892a8a6e056df5fd39b0d593e52f1f661ae75b42 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -13,6 +13,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y @@ -74,4 +76,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_ADDR_MAP=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index 2bbb5a6ea39b0c651421df2e9b0d2f2e1cd434f6..705d0dad62fa7917209da36fdc0640677a4207a5 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -20,6 +20,8 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y @@ -86,4 +88,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_ADDR_MAP=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index 28ad6a947509882f72cbee1a1cf16d2e8d676489..e4ad50fc7bb13d8cfd386c9953fa719652675e51 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -22,6 +22,8 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y @@ -88,4 +90,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_ADDR_MAP=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index adf39899564e21ac6a7a0894c1f3fb00934ddaf7..b303c4c46c0f288a7456dbcdd644aca68ba00b81 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL=y +CONFIG_TPL_TEXT_BASE=0xD0001000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y @@ -19,6 +20,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y @@ -68,6 +71,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y @@ -93,3 +98,4 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index 65468233c081a62bae89c123e69c1e91191c16f9..8db09ba2b83f4b55dc6886cc64bb46a831fafbef 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -12,6 +12,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y @@ -73,3 +75,4 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 8a32201fd8a635ad6e9d8719c89c9cc4c1d75d9a..f02757dd6b4f8c44177efd8bf36c8de12d660182 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -19,6 +19,8 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y @@ -85,3 +87,4 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index cbf5f38b821a975d985e13d847aca9a50c134508..9a09473ad410827123907b8efca3bda084455efd 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -21,6 +21,8 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y @@ -87,3 +89,4 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index c8e7847e3f557187c7bf7e3a94b8619d813dd8eb..85828682837223915ecb3880ff6feab01f647fde 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL=y +CONFIG_TPL_TEXT_BASE=0xD0001000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y @@ -20,6 +21,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y @@ -72,6 +75,8 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y @@ -97,4 +102,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_ADDR_MAP=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 88cd0bdce25b9b494ea60c0cc49579e4bebe0e45..84173e2d60f0cb1354d0926621b41cbb70aab024 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -13,6 +13,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y @@ -76,4 +78,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_ADDR_MAP=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index fa919b024500289287d46ddca26c5c5ebdfe7e7f..4b0a1ab53b7d1aec8bca556b9a1c3f5a9d2dffb6 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -20,6 +20,8 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y @@ -88,4 +90,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_ADDR_MAP=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index 92776771417f06431d23a28f6143e2ffda26c9d7..986b992e6b93d2b9ffbf92cd4922a8534bcae188 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -22,6 +22,8 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y @@ -90,4 +92,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_ADDR_MAP=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 56c05c36acee86b8747a3fef85034c7f7bd85ced..e4364769f9f837787da1d7438d2db591cc78934b 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL=y +CONFIG_TPL_TEXT_BASE=0xD0001000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y @@ -19,6 +20,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y @@ -71,6 +74,8 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y @@ -96,3 +101,4 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index d374297107e6e48d341d69a10c105380de753802..62f4c892709de30ef96a5e52c586c3d3550bde9d 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -12,6 +12,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y @@ -75,3 +77,4 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index ec4f1e81588ad06e4e07a2a8ac38a7c036ef969c..9cdb3599f761d08015c60120fc1f0b94cbbc0122 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -19,6 +19,8 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y @@ -87,3 +89,4 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 1c53b96db2ade142cc2fa9024e281295d5ed3f64..299564c9caf2164f80df7ce69b08b41d36a2bf67 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -21,6 +21,8 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y @@ -89,3 +91,4 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 7e3db2ddc44538f7c55a36a453e6efb57e71e68c..7c4bdb8a79a21c11980a501afc1f963b26bf929f 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL=y +CONFIG_TPL_TEXT_BASE=0xF8F81000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y @@ -20,6 +21,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set @@ -52,6 +55,18 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xFF800C21 +CONFIG_SYS_OR0_PRELIM=0xFFFF8396 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xEF001001 +CONFIG_SYS_OR1_PRELIM=0xFC000FF7 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xFFB00801 +CONFIG_SYS_OR2_PRELIM=0xFFFE09FF +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFA00801 +CONFIG_SYS_OR3_PRELIM=0xFFF009F7 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y @@ -70,6 +85,8 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_ELBC=y CONFIG_SYS_NAND_BLOCK_SIZE=0x4000 +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y @@ -96,5 +113,6 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 4bee5d82a29039837f4c2fa909b519ef86658b34..24b5f2e048925e4dba21cc523b37e332b537c501 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -20,6 +20,8 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set @@ -48,6 +50,15 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xEF001001 +CONFIG_SYS_OR0_PRELIM=0xFC000FF7 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xFFB00801 +CONFIG_SYS_OR2_PRELIM=0xFFFE09FF +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFA00801 +CONFIG_SYS_OR3_PRELIM=0xFFF009F7 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -88,5 +99,6 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index 58db2f68e03807919e50f7cc210407c1ead7a4b7..a008103cc63f75032a8bf649ca587820efa3c8e2 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -22,6 +22,8 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set @@ -50,6 +52,15 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xEF001001 +CONFIG_SYS_OR0_PRELIM=0xFC000FF7 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xFFB00801 +CONFIG_SYS_OR2_PRELIM=0xFFFE09FF +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFA00801 +CONFIG_SYS_OR3_PRELIM=0xFFF009F7 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -90,5 +101,6 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index fd45e51faf46061235a40ff7257bdc7d646dc03a..fe8bf09cc2385b46fb8d1151a7f106e92bf9f67d 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -14,6 +14,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set @@ -37,6 +39,15 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xEF001001 +CONFIG_SYS_OR0_PRELIM=0xFC000FF7 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xFFB00801 +CONFIG_SYS_OR2_PRELIM=0xFFFE09FF +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFA00801 +CONFIG_SYS_OR3_PRELIM=0xFFF009F7 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -77,5 +88,6 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index d799201ad4b3fe0818119d124f8c35c0f01dd13e..9ccc62a964fc8c852de469c457609021f32edfdc 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL=y +CONFIG_TPL_TEXT_BASE=0xF8F81000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y @@ -19,6 +20,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set @@ -51,6 +54,18 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xFF800C21 +CONFIG_SYS_OR0_PRELIM=0xFFFF8396 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xEF001001 +CONFIG_SYS_OR1_PRELIM=0xFC000FF7 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xFFB00801 +CONFIG_SYS_OR2_PRELIM=0xFFFE09FF +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFA00801 +CONFIG_SYS_OR3_PRELIM=0xFFF009F7 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y @@ -69,6 +84,8 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_ELBC=y CONFIG_SYS_NAND_BLOCK_SIZE=0x4000 +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y @@ -95,4 +112,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 196356c834bf65b24357f7fb4092658ad6ff4c8a..3f92788e9a15fb12b925dbb7c368f7b5065e02ce 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -19,6 +19,8 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set @@ -47,6 +49,15 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xEF001001 +CONFIG_SYS_OR0_PRELIM=0xFC000FF7 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xFFB00801 +CONFIG_SYS_OR2_PRELIM=0xFFFE09FF +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFA00801 +CONFIG_SYS_OR3_PRELIM=0xFFF009F7 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -87,4 +98,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 4207a1b2909fe4d561cd401d46dbbc0607e560c9..cc8fbb0294be711e2d58759191a0ad36e7b0ca0a 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -21,6 +21,8 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set @@ -49,6 +51,15 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xEF001001 +CONFIG_SYS_OR0_PRELIM=0xFC000FF7 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xFFB00801 +CONFIG_SYS_OR2_PRELIM=0xFFFE09FF +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFA00801 +CONFIG_SYS_OR3_PRELIM=0xFFF009F7 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -89,4 +100,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 2bc929b5dd3afbe3051db4ec462e79af317c14df..9eb502789ed6dda7c5fcd8dd87a07f4d93a4c988 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -13,6 +13,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set @@ -36,6 +38,15 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xEF001001 +CONFIG_SYS_OR0_PRELIM=0xFC000FF7 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xFFB00801 +CONFIG_SYS_OR2_PRELIM=0xFFFE09FF +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFA00801 +CONFIG_SYS_OR3_PRELIM=0xFFF009F7 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -76,4 +87,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index e1e5b06f771c815de43a7a767952a975f3f5415f..874b338700c4d748ac9ef2af33a09ce38099eec2 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL=y +CONFIG_TPL_TEXT_BASE=0xF8F81000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y @@ -19,6 +20,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set @@ -54,6 +57,18 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xFF800C21 +CONFIG_SYS_OR0_PRELIM=0xFFFF8796 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xEC001001 +CONFIG_SYS_OR1_PRELIM=0xFC000FF7 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xFFB00801 +CONFIG_SYS_OR2_PRELIM=0xFFFE09FF +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFA00801 +CONFIG_SYS_OR3_PRELIM=0xFFF009F7 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y @@ -73,6 +88,8 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_ELBC=y CONFIG_SYS_NAND_BLOCK_SIZE=0x20000 +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y @@ -99,4 +116,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index 448412e2a1bea8d3db1d3d44d835db959bf57d67..24e90bea4756440d47e8fdce87b55ba4a15f8078 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -19,6 +19,8 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set @@ -50,6 +52,15 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xEC001001 +CONFIG_SYS_OR0_PRELIM=0xFC000FF7 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xFFB00801 +CONFIG_SYS_OR2_PRELIM=0xFFFE09FF +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFA00801 +CONFIG_SYS_OR3_PRELIM=0xFFF009F7 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -91,4 +102,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index bcedde3922b5aa2044bcd24a448987198f80d434..bac13aa2d22c9cb626d9113a720b7067b17f90aa 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -21,6 +21,8 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set @@ -52,6 +54,15 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xEC001001 +CONFIG_SYS_OR0_PRELIM=0xFC000FF7 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xFFB00801 +CONFIG_SYS_OR2_PRELIM=0xFFFE09FF +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFA00801 +CONFIG_SYS_OR3_PRELIM=0xFFF009F7 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -93,4 +104,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index c2b3e058ba892a4822701511ab25e9213753f6fb..58ef741cbe69f099588fe096b192716af60f424f 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -13,6 +13,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set @@ -39,6 +41,15 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xEC001001 +CONFIG_SYS_OR0_PRELIM=0xFC000FF7 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xFFB00801 +CONFIG_SYS_OR2_PRELIM=0xFFFE09FF +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFA00801 +CONFIG_SYS_OR3_PRELIM=0xFFF009F7 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -80,4 +91,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index 205c042d096bace37f17425a893c817eb5314add..ab30b8edfa6d11565ba69ef558a92717e4c882cf 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL=y +CONFIG_TPL_TEXT_BASE=0xF8F81000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y @@ -20,6 +21,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set @@ -56,6 +59,18 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xFF800C21 +CONFIG_SYS_OR0_PRELIM=0xFFFF8396 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xEF001001 +CONFIG_SYS_OR1_PRELIM=0xFC000FF7 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xFFB00801 +CONFIG_SYS_OR2_PRELIM=0xFFFE09FF +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFA00801 +CONFIG_SYS_OR3_PRELIM=0xFFF009F7 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y @@ -75,6 +90,8 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_ELBC=y CONFIG_SYS_NAND_BLOCK_SIZE=0x4000 +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y @@ -101,5 +118,6 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 6f421ace86b74288161f71ea38153fd6b0bede63..7137d2069b49637cb6cafa9ae50dd1713fdee806 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -20,6 +20,8 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set @@ -52,6 +54,15 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xEF001001 +CONFIG_SYS_OR0_PRELIM=0xFC000FF7 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xFFB00801 +CONFIG_SYS_OR2_PRELIM=0xFFFE09FF +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFA00801 +CONFIG_SYS_OR3_PRELIM=0xFFF009F7 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -93,5 +104,6 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 64281ead3b968d8f3de31bd7220e179d7d2cd9b2..97326486c2045736a0c396102186f6ef6347ffd0 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -22,6 +22,8 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set @@ -54,6 +56,15 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xEF001001 +CONFIG_SYS_OR0_PRELIM=0xFC000FF7 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xFFB00801 +CONFIG_SYS_OR2_PRELIM=0xFFFE09FF +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFA00801 +CONFIG_SYS_OR3_PRELIM=0xFFF009F7 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -95,5 +106,6 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index 0b74fa132cf6e951548353e3085312e309864282..535f859671a223d8f315d9c2790bcb8f3a892482 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -14,6 +14,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set @@ -41,6 +43,15 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xEF001001 +CONFIG_SYS_OR0_PRELIM=0xFC000FF7 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xFFB00801 +CONFIG_SYS_OR2_PRELIM=0xFFFE09FF +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFA00801 +CONFIG_SYS_OR3_PRELIM=0xFFF009F7 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -82,5 +93,6 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index f7625351c90017ee77ef86ee45a37c3e7a613cba..9de2f762c39e5e53c9a1ebaa64dd9f15c1f08321 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL=y +CONFIG_TPL_TEXT_BASE=0xF8F81000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y @@ -19,6 +20,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set @@ -55,6 +58,18 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xFF800C21 +CONFIG_SYS_OR0_PRELIM=0xFFFF8396 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xEF001001 +CONFIG_SYS_OR1_PRELIM=0xFC000FF7 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xFFB00801 +CONFIG_SYS_OR2_PRELIM=0xFFFE09FF +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFA00801 +CONFIG_SYS_OR3_PRELIM=0xFFF009F7 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y @@ -74,6 +89,8 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_ELBC=y CONFIG_SYS_NAND_BLOCK_SIZE=0x4000 +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y @@ -100,4 +117,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index fd76c2b3c1595ba00bf47730077fca548e6c868f..72e12b5a826a3bbaea53a99990ec278dbd504777 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -19,6 +19,8 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set @@ -51,6 +53,15 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xEF001001 +CONFIG_SYS_OR0_PRELIM=0xFC000FF7 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xFFB00801 +CONFIG_SYS_OR2_PRELIM=0xFFFE09FF +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFA00801 +CONFIG_SYS_OR3_PRELIM=0xFFF009F7 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -92,3 +103,4 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 2e8882a4a89d86f9c8e057c51f37b5e7507f5249..bddbcec8e56cf8a3708aec9cd67ed7549b4af969 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -21,6 +21,8 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set @@ -53,6 +55,15 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xEF001001 +CONFIG_SYS_OR0_PRELIM=0xFC000FF7 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xFFB00801 +CONFIG_SYS_OR2_PRELIM=0xFFFE09FF +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFA00801 +CONFIG_SYS_OR3_PRELIM=0xFFF009F7 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -94,4 +105,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index 783f04663e4aeeaee40020e262128bd06f6fc472..cce0fe28e98cf359b067d112f8072cd24537f193 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -13,6 +13,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set @@ -40,6 +42,15 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xEF001001 +CONFIG_SYS_OR0_PRELIM=0xFC000FF7 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xFFB00801 +CONFIG_SYS_OR2_PRELIM=0xFFFE09FF +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFA00801 +CONFIG_SYS_OR3_PRELIM=0xFFF009F7 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -81,4 +92,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index 63a15ced49f6c34bc900d2cbe25539783364ec52..b7acfe05ae30c9c78580bfa4e4f3ab529957c5e1 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -11,10 +11,13 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p2041rdb.cfg" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y @@ -38,6 +41,15 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_FSL_CAAM=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xFFA00C21 +CONFIG_SYS_OR0_PRELIM=0xFFFC0796 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xE8001001 +CONFIG_SYS_OR1_PRELIM=0xF8000F85 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFDF0801 +CONFIG_SYS_OR3_PRELIM=0xFFFFEFF7 CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_FSL=y @@ -71,6 +83,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index eb97360e710c92342586c12e812386d1cd2f9e3a..fa21910b421a7aa770b46a3f6732cba1ff48a35a 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -12,10 +12,13 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p2041rdb.cfg" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y @@ -39,6 +42,12 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_FSL_CAAM=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xE8001001 +CONFIG_SYS_OR0_PRELIM=0xF8000F85 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFDF0801 +CONFIG_SYS_OR3_PRELIM=0xFFFFEFF7 CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_FSL=y @@ -70,6 +79,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index 193711086273be16b06d5d3a24499b94c508c4d8..ba9b8dfb5f1faa903d7516213d0a8ae618f936a3 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -13,10 +13,13 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p2041rdb.cfg" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y @@ -40,6 +43,12 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_FSL_CAAM=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xE8001001 +CONFIG_SYS_OR0_PRELIM=0xF8000F85 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFDF0801 +CONFIG_SYS_OR3_PRELIM=0xFFFFEFF7 CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_FSL=y @@ -71,6 +80,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index 7b430f69e2ffa6a9dc5aee478b49799fdda3972f..53130ccf822880ee2d2660da9fd30499ce006fb5 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -11,7 +11,10 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y @@ -35,6 +38,12 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 CONFIG_DM=y CONFIG_FSL_CAAM=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xE8001001 +CONFIG_SYS_OR0_PRELIM=0xF8000F85 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFDF0801 +CONFIG_SYS_OR3_PRELIM=0xFFFFEFF7 CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_FSL=y @@ -66,6 +75,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index 96a6161f16756aea023136ea61c5e4ca67fbec41..29a968d9a328a07f15c99c3c02caee23caf48f6f 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -11,10 +11,13 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p3041ds.cfg" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y @@ -38,6 +41,18 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xFFA00C21 +CONFIG_SYS_OR0_PRELIM=0xFFFC0796 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xE0001001 +CONFIG_SYS_OR1_PRELIM=0xF8000FF7 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xE8001001 +CONFIG_SYS_OR2_PRELIM=0xF8000F85 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFDF0801 +CONFIG_SYS_OR3_PRELIM=0xFFFFEFF7 CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_FSL=y @@ -70,6 +85,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index 49a30ddca168f93858bb763a25e89d9e2e2f7733..72c3b7af295d5df54b5a808c116fbcb242bd7170 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -12,10 +12,13 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p3041ds.cfg" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y @@ -39,6 +42,15 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xE8001001 +CONFIG_SYS_OR0_PRELIM=0xF8000F85 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xE0001001 +CONFIG_SYS_OR1_PRELIM=0xF8000FF7 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFDF0801 +CONFIG_SYS_OR3_PRELIM=0xFFFFEFF7 CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_FSL=y @@ -69,6 +81,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index 047d65b3319b0dfa3ba476114a0821c971f3c618..abb9ce611d358075dcaa2a9c2a49edd28d6dcf7a 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -13,10 +13,13 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p3041ds.cfg" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y @@ -40,6 +43,15 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xE8001001 +CONFIG_SYS_OR0_PRELIM=0xF8000F85 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xE0001001 +CONFIG_SYS_OR1_PRELIM=0xF8000FF7 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFDF0801 +CONFIG_SYS_OR3_PRELIM=0xFFFFEFF7 CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_FSL=y @@ -70,6 +82,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index 821a7c3bc10115d84b3617a67e3a1657bbff8808..39dd70888cde3221f6dbd86e7bcce05e8bf15141 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -11,7 +11,10 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y @@ -35,6 +38,15 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xE8001001 +CONFIG_SYS_OR0_PRELIM=0xF8000F85 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xE0001001 +CONFIG_SYS_OR1_PRELIM=0xF8000FF7 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFDF0801 +CONFIG_SYS_OR3_PRELIM=0xFFFFEFF7 CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_FSL=y @@ -65,6 +77,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index 9186ed1a5eaf52af00d75aabbe1e18f64ac5390c..bd66e31fe134624dd57a543bf1b23bedd0b8fa28 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -12,10 +12,13 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p4080ds.cfg" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y @@ -39,6 +42,15 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xE8001001 +CONFIG_SYS_OR0_PRELIM=0xF8000F85 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xE0001001 +CONFIG_SYS_OR1_PRELIM=0xF8000FF7 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFDF0801 +CONFIG_SYS_OR3_PRELIM=0xFFFFEFF7 CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_FSL=y @@ -68,6 +80,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index 2a4dc5db7d5fafb351b5a2285f696cc14be93965..79f51c91d43430c8f2def5824ccbb10063a4b187 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -13,10 +13,13 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p4080ds.cfg" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y @@ -40,6 +43,15 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xE8001001 +CONFIG_SYS_OR0_PRELIM=0xF8000F85 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xE0001001 +CONFIG_SYS_OR1_PRELIM=0xF8000FF7 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFDF0801 +CONFIG_SYS_OR3_PRELIM=0xFFFFEFF7 CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_FSL=y @@ -69,6 +81,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index 564f28cabaa15ec9cc51fc138565ec73d7415cc2..43f16d45e2c0af7838d82ba4789b489381c95e1d 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -11,7 +11,10 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y @@ -35,6 +38,15 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xE8001001 +CONFIG_SYS_OR0_PRELIM=0xF8000F85 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xE0001001 +CONFIG_SYS_OR1_PRELIM=0xF8000FF7 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFDF0801 +CONFIG_SYS_OR3_PRELIM=0xFFFFEFF7 CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_FSL=y @@ -64,6 +76,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index 370eb23e05cb1b24d0dee6d01e340c3198d3fd72..6f31034573b348b02bdc947b27150e878539cdaa 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -11,10 +11,13 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p5040ds.cfg" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y @@ -39,6 +42,18 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xFFA00C21 +CONFIG_SYS_OR0_PRELIM=0xFFFC0796 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xE0001001 +CONFIG_SYS_OR1_PRELIM=0xF8000FF7 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xE8001001 +CONFIG_SYS_OR2_PRELIM=0xF8000F85 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFDF0801 +CONFIG_SYS_OR3_PRELIM=0xFFFFEFF7 CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_FSL=y @@ -71,6 +86,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index 8e0d33212c1a7ea1ebd782f3e035042f7bba8932..0a881d8417b700ad163bb3e9c4ab8253547ddc21 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -12,10 +12,13 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p5040ds.cfg" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y @@ -39,6 +42,15 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xE8001001 +CONFIG_SYS_OR0_PRELIM=0xF8000F85 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xE0001001 +CONFIG_SYS_OR1_PRELIM=0xF8000FF7 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFDF0801 +CONFIG_SYS_OR3_PRELIM=0xFFFFEFF7 CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_FSL=y @@ -69,6 +81,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index 172f5ed250cced79ea1bfcf3d080a74f7cec7f58..0e4a5457efd988e1cbb5af58ed167a99e32c4ba3 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -13,10 +13,13 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p5040ds.cfg" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y @@ -40,6 +43,15 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xE8001001 +CONFIG_SYS_OR0_PRELIM=0xF8000F85 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xE0001001 +CONFIG_SYS_OR1_PRELIM=0xF8000FF7 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFDF0801 +CONFIG_SYS_OR3_PRELIM=0xFFFFEFF7 CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_FSL=y @@ -70,6 +82,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index 79c6e466c7e04ef542c8451efe8612a181ba9469..d614917385c652f5b1b3b23e0f25b62c3fa096e4 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -11,7 +11,10 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y @@ -35,6 +38,15 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xE8001001 +CONFIG_SYS_OR0_PRELIM=0xF8000F85 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xE0001001 +CONFIG_SYS_OR1_PRELIM=0xF8000FF7 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xFFDF0801 +CONFIG_SYS_OR3_PRELIM=0xFFFFEFF7 CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_FSL=y @@ -65,6 +77,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/SBx81LIFKW_defconfig b/configs/SBx81LIFKW_defconfig index 8988ed9e96a1eb4e8a2fbf2d016c11fe7a0ee983..77f44f6329edc5432c86071bd5691be56d8eb416 100644 --- a/configs/SBx81LIFKW_defconfig +++ b/configs/SBx81LIFKW_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/alliedtelesis/SBx81LIFKW/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x00600000 CONFIG_TARGET_SBx81LIFKW=y CONFIG_ENV_SIZE=0x2000 @@ -30,11 +31,11 @@ CONFIG_DOS_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y CONFIG_DM=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y @@ -45,16 +46,17 @@ CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set -CONFIG_PHYLIB=y CONFIG_MV88E61XX_SWITCH=y CONFIG_MV88E61XX_CPU_PORT=10 CONFIG_MV88E61XX_PHY_PORTS=0x003 CONFIG_MV88E61XX_FIXED_PORTS=0x300 CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y +CONFIG_MVGBE=y CONFIG_MII=y CONFIG_DM_RTC=y CONFIG_RTC_MV=y +CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/SBx81LIFXCAT_defconfig b/configs/SBx81LIFXCAT_defconfig index cd491c4fee7f0bdc5ee0e5a7756a6717368f6b1b..b84e3bd9d6ac402657a35ec50ad0ea9ddbbff8e9 100644 --- a/configs/SBx81LIFXCAT_defconfig +++ b/configs/SBx81LIFXCAT_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/alliedtelesis/SBx81LIFXCAT/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x00600000 CONFIG_TARGET_SBx81LIFXCAT=y CONFIG_ENV_SIZE=0x2000 @@ -32,11 +33,11 @@ CONFIG_DOS_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y CONFIG_DM=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y @@ -49,14 +50,15 @@ CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set -CONFIG_PHYLIB=y CONFIG_MV88E61XX_SWITCH=y CONFIG_MV88E61XX_CPU_PORT=10 CONFIG_MV88E61XX_PHY_PORTS=0x003 CONFIG_MV88E61XX_FIXED_PORTS=0x300 CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y +CONFIG_MVGBE=y CONFIG_MII=y +CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index 5e7116ea91f920739283e1d4899ecd911c048f29..086e5790908f8940997bd776cfc3482205f39c89 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -24,6 +24,8 @@ CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/t102xrdb/t1024_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/t102xrdb/t1024_nand_rcw.cfg" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y @@ -82,6 +84,8 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x40000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y @@ -102,6 +106,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index e5b129ea2ab0fe552b4bdaaaa01927d979f1c44e..5afce3849919d712ccdca128987740e1865c680b 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -24,6 +24,8 @@ CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/t102xrdb/t1024_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/t102xrdb/t1024_sd_rcw.cfg" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y @@ -99,6 +101,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index bea715960091803209a7ba296332767632f30c3a..90d745bf345020271317b091bb2c672a59d36314 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -26,6 +26,8 @@ CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/t102xrdb/t1024_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/t102xrdb/t1024_spi_rcw.cfg" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y @@ -101,6 +103,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index 3ed1c6db4be8983941984dc2b55b7336b475d424..98f1d6c794a2a5be634c95ecc05307eb731fb2b3 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -14,6 +14,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y @@ -84,6 +86,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index c447fef5b51f99e2e9a1cb449c0a55d11c4acd4e..ca22e1e4f255193d1e9b95feafba1c7ad860e2f8 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -21,6 +21,8 @@ CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="$(SRCTREE)/board/freescale/t104xrdb/t104x_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="$(SRCTREE)/board/freescale/t104xrdb/t1042d4_nand_rcw.cfg" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y @@ -76,6 +78,8 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x40000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y @@ -90,6 +94,7 @@ CONFIG_FMAN_ENET=y CONFIG_SYS_FMAN_FW_ADDR=0x280000 CONFIG_MII=y CONFIG_PCIE_FSL=y +CONFIG_U_QE=y CONFIG_SYS_QE_FW_ADDR=0x380000 CONFIG_SYS_QE_FMAN_FW_IN_NAND=y CONFIG_DM_RTC=y @@ -98,6 +103,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index 92037c544f113089be3b1a5e1442f7bf50c96025..b9f7992d357ceeac0b6de2fa6e4029133de01319 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -21,6 +21,8 @@ CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="$(SRCTREE)/board/freescale/t104xrdb/t104x_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="$(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y @@ -86,6 +88,7 @@ CONFIG_FMAN_ENET=y CONFIG_SYS_FMAN_FW_ADDR=0x10400 CONFIG_MII=y CONFIG_PCIE_FSL=y +CONFIG_U_QE=y CONFIG_SYS_QE_FMAN_FW_IN_MMC=y CONFIG_DM_RTC=y CONFIG_SYS_NS16550=y @@ -93,6 +96,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 37b5fae0ae93ada52d3963cdba4e07131a49875b..f8e2b6d2ee0036911b307ae847615191456e14a1 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -23,6 +23,8 @@ CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="$(SRCTREE)/board/freescale/t104xrdb/t104x_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="$(SRCTREE)/board/freescale/t104xrdb/t1042d4_spi_rcw.cfg" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y @@ -88,6 +90,7 @@ CONFIG_FMAN_ENET=y CONFIG_SYS_FMAN_FW_ADDR=0x110000 CONFIG_MII=y CONFIG_PCIE_FSL=y +CONFIG_U_QE=y CONFIG_SYS_QE_FW_ADDR=0x130000 CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y CONFIG_DM_RTC=y @@ -96,6 +99,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig index f1ec4006369fb51fbc3c1ce19fcaa11e4cb28fd8..4797f2907f10891cdabcc33a24fde02eb61bab11 100644 --- a/configs/T1042D4RDB_defconfig +++ b/configs/T1042D4RDB_defconfig @@ -11,6 +11,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y @@ -71,6 +73,7 @@ CONFIG_FMAN_ENET=y CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000 CONFIG_MII=y CONFIG_PCIE_FSL=y +CONFIG_U_QE=y CONFIG_SYS_QE_FW_ADDR=0xEFF10000 CONFIG_SYS_QE_FMAN_FW_IN_NOR=y CONFIG_DM_RTC=y @@ -79,6 +82,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index c39329b751df152b70f6418600fecb40f247cd79..ba07ce8feb07e0da70e6698a455fc30f41ca9c42 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -7,6 +7,10 @@ CONFIG_ENV_OFFSET=0x140000 CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xqds_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y @@ -18,10 +22,13 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xqds/t208x_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xqds/t2080_nand_rcw.cfg" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NAND_BOOT=y @@ -74,6 +81,8 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x40000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_EON=y @@ -96,6 +105,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index 1075acf561d3046d2a72500f59cd957ff0efed19..bf5410b34470985c58eda54cdbef684249fc2109 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -7,6 +7,10 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xqds_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -18,10 +22,13 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xqds/t208x_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xqds/t2080_sd_rcw.cfg" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MMC_BOOT=y @@ -92,6 +99,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index b761a1f8500b1de52b915d4c379de62e59518693..3165b9090ad017c5a491ef3467481f7347e029d4 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -4,6 +4,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xqds_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y @@ -12,7 +16,10 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y @@ -76,6 +83,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 11a0ed4555123995ba1c7f7611a77d149a2df177..367416f33741d2a01fbf9ea1d66648d09dbe15a5 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -8,6 +8,10 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xqds_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y @@ -20,10 +24,13 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xqds/t208x_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xqds/t2080_spi_rcw.cfg" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_SPI_BOOT=y @@ -94,6 +101,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig index e3ff9260be49552755fea63722b15ff7e7d40b7d..ef4d8888b6708cbead95c50e2d5d3613a2d934dc 100644 --- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig @@ -3,6 +3,10 @@ CONFIG_SYS_TEXT_BASE=0xFFF40000 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xqds_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y @@ -11,7 +15,10 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y @@ -69,6 +76,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index d76547ab637155b66b718ed990833ee7c6cdff7e..db9e970e647a8f164a387973ff8f0bb78c302cff 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -4,6 +4,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xqds_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y @@ -11,7 +15,10 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y @@ -77,6 +84,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index 88f29f408a7583d27a62e3d8465053b5b4277d13..4501cf64e4f89838a054ba6324900950cb66f0a3 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -8,6 +8,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y @@ -23,6 +27,8 @@ CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xrdb/t2080_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xrdb/t2080_nand_rcw.cfg" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NAND_BOOT=y @@ -80,6 +86,8 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x40000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y @@ -104,6 +112,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index 07de4bcebf969272898b20971272b5229fee4229..f62c85c80517d1ea3ec4ef002396e208d3e59498 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -8,6 +8,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -23,6 +27,8 @@ CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xrdb/t2080_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xrdb/t2080_sd_rcw.cfg" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MMC_BOOT=y @@ -100,6 +106,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index ea43361aa6d1795074ef14d50aeaa54ac9ff2396..2a7529d1ccb525ecbf28b4a47872f79b05be9f7d 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -9,6 +9,10 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y @@ -25,6 +29,8 @@ CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xrdb/t2080_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xrdb/t2080_spi_rcw.cfg" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_SPI_BOOT=y @@ -102,6 +108,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index 610f7064739823e042a26285941bc73abd060c43..6b076405d61f3f069aac9b89fed8b04361797f2c 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -5,6 +5,10 @@ CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y @@ -13,6 +17,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y @@ -83,6 +89,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index ed7cf4f96c214a4b0da33d0a6fa3afa693c86856..cdd7524ec44f46c1d425515ac8315be32f4716f9 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -8,6 +8,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y @@ -24,6 +28,8 @@ CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xrdb/t2080_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xrdb/t2080_nand_rcw.cfg" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NAND_BOOT=y @@ -81,6 +87,8 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x40000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y @@ -106,6 +114,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index 0e80031c397d0c8f514ade3975d116dd776e10e0..1771c240036e9a626c06ae661720f38fc50931f9 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -8,6 +8,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -24,6 +28,8 @@ CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xrdb/t2080_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xrdb/t2080_sd_rcw.cfg" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MMC_BOOT=y @@ -102,6 +108,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index 00b19f52905441551afd4b1a638b91b6462fe58b..bb9d5c809e61c3adfca780dcf1fb231e21cbc61d 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -9,6 +9,10 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y @@ -26,6 +30,8 @@ CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xrdb/t2080_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xrdb/t2080_spi_rcw.cfg" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_SPI_BOOT=y @@ -104,6 +110,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig index f8f459f27b1979a6c831636e208c11858a672cc2..472463fabb0992a2ebec547f9ce0e2f58d162e48 100644 --- a/configs/T2080RDB_revD_defconfig +++ b/configs/T2080RDB_revD_defconfig @@ -5,6 +5,10 @@ CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y @@ -14,6 +18,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y @@ -86,6 +92,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index bfd913a4e58770d4da009b40137206d6591e9ed2..526c4749557c6e37fb592e819659a5d7e858ed12 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -6,6 +6,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="t4240rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t4240rdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -21,6 +25,8 @@ CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="$(SRCTREE)/board/freescale/t4rdb/t4_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="$(SRCTREE)/board/freescale/t4rdb/t4_sd_rcw.cfg" CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MMC_BOOT=y @@ -86,6 +92,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index c66b152d2032cc51df62fb432f1955ae3207469a..bbaab35fd81a89cd4931c0afba642ff6efeea39f 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -3,6 +3,10 @@ CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="t4240rdb" +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t4240rdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y @@ -11,6 +15,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y @@ -71,6 +77,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/a3y17lte_defconfig b/configs/a3y17lte_defconfig index 6c87825b5d25678a9846d6247ca473560df97e88..ddc1801a59b4c51b42a716fd1f4cd3703778f03b 100644 --- a/configs/a3y17lte_defconfig +++ b/configs/a3y17lte_defconfig @@ -9,6 +9,8 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_DEFAULT_DEVICE_TREE="exynos78x0-axy17lte" CONFIG_SYS_LOAD_ADDR=0x40001000 CONFIG_FIT=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="echo Read pressed buttons status;KEY_VOLUMEUP=gpa20;KEY_HOME=gpa17;KEY_VOLUMEDOWN=gpa21;KEY_POWER=gpa00;PRESSED=0;RELEASED=1;if gpio input $KEY_VOLUMEUP; then setenv VOLUME_UP $PRESSED; else setenv VOLUME_UP $RELEASED; fi;if gpio input $KEY_VOLUMEDOWN; then setenv VOLUME_DOWN $PRESSED; else setenv VOLUME_DOWN $RELEASED; fi;if gpio input $KEY_HOME; then setenv HOME $PRESSED; else setenv HOME $RELEASED; fi;if gpio input $KEY_POWER; then setenv POWER $PRESSED; else setenv POWER $RELEASED; fi;" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_GPIO=y diff --git a/configs/a5y17lte_defconfig b/configs/a5y17lte_defconfig index 2d8782eae4430ab32148f072f6a0a8a2a9827cc6..2534ab05737fa8e8cab3f42e4bf459964d982d80 100644 --- a/configs/a5y17lte_defconfig +++ b/configs/a5y17lte_defconfig @@ -9,6 +9,8 @@ CONFIG_NR_DRAM_BANKS=12 CONFIG_DEFAULT_DEVICE_TREE="exynos78x0-axy17lte" CONFIG_SYS_LOAD_ADDR=0x40001000 CONFIG_FIT=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="echo Read pressed buttons status;KEY_VOLUMEUP=gpa20;KEY_HOME=gpa17;KEY_VOLUMEDOWN=gpa21;KEY_POWER=gpa00;PRESSED=0;RELEASED=1;if gpio input $KEY_VOLUMEUP; then setenv VOLUME_UP $PRESSED; else setenv VOLUME_UP $RELEASED; fi;if gpio input $KEY_VOLUMEDOWN; then setenv VOLUME_DOWN $PRESSED; else setenv VOLUME_DOWN $RELEASED; fi;if gpio input $KEY_HOME; then setenv HOME $PRESSED; else setenv HOME $RELEASED; fi;if gpio input $KEY_POWER; then setenv POWER $PRESSED; else setenv POWER $RELEASED; fi;" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_GPIO=y diff --git a/configs/a7y17lte_defconfig b/configs/a7y17lte_defconfig index 39b9741c8a20164455a37dc8d489d6c653b55f4e..a2d76377ab07d3d1a40dd3d3ae8a8201a583a237 100644 --- a/configs/a7y17lte_defconfig +++ b/configs/a7y17lte_defconfig @@ -9,6 +9,8 @@ CONFIG_NR_DRAM_BANKS=12 CONFIG_DEFAULT_DEVICE_TREE="exynos78x0-axy17lte" CONFIG_SYS_LOAD_ADDR=0x40001000 CONFIG_FIT=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="echo Read pressed buttons status;KEY_VOLUMEUP=gpa20;KEY_HOME=gpa17;KEY_VOLUMEDOWN=gpa21;KEY_POWER=gpa00;PRESSED=0;RELEASED=1;if gpio input $KEY_VOLUMEUP; then setenv VOLUME_UP $PRESSED; else setenv VOLUME_UP $RELEASED; fi;if gpio input $KEY_VOLUMEDOWN; then setenv VOLUME_DOWN $PRESSED; else setenv VOLUME_DOWN $RELEASED; fi;if gpio input $KEY_HOME; then setenv HOME $PRESSED; else setenv HOME $RELEASED; fi;if gpio input $KEY_POWER; then setenv POWER $PRESSED; else setenv POWER $RELEASED; fi;" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_GPIO=y diff --git a/configs/adp-ae3xx_defconfig b/configs/adp-ae3xx_defconfig index 3fa00fb4cc40faf0e48697edf24265f9290449a4..b79b5b6ffa8d004efe8df2b29bf71a411b8a38ab 100644 --- a/configs/adp-ae3xx_defconfig +++ b/configs/adp-ae3xx_defconfig @@ -7,6 +7,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x140000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="ae3xx" +CONFIG_SYS_CLK_FREQ=39062500 CONFIG_TARGET_ADP_AE3XX=y CONFIG_SYS_LOAD_ADDR=0x300000 CONFIG_FIT=y diff --git a/configs/adp-ag101p_defconfig b/configs/adp-ag101p_defconfig index cc6541b1e3b265578964dabd29ac40bc7c5cdd1f..503f2ae13120f883433db4f5e7eee55d828a0b71 100644 --- a/configs/adp-ag101p_defconfig +++ b/configs/adp-ag101p_defconfig @@ -6,6 +6,7 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="ag101p" +CONFIG_SYS_CLK_FREQ=39062500 CONFIG_TARGET_ADP_AG101P=y CONFIG_SYS_LOAD_ADDR=0x300000 CONFIG_FIT=y diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig index fe18a1cee4e70a9556fc41e5752b95b0fb80010c..0324f1e7def150f1522976304100fee2cd22a6a7 100644 --- a/configs/ae350_rv32_defconfig +++ b/configs/ae350_rv32_defconfig @@ -17,7 +17,6 @@ CONFIG_CMD_SF_TEST=y # CONFIG_CMD_SETEXPR is not set CONFIG_BOOTP_PREFER_SERVERIP=y CONFIG_CMD_CACHE=y -CONFIG_OF_BOARD=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y @@ -31,7 +30,6 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SPI_FLASH_MACRONIX=y CONFIG_FTMAC100=y CONFIG_BAUDRATE=38400 diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig index 9287544781f8426eb49ec93f3233bda37cbaa6d9..2484d194459efdd5a234b99098d0a6e42e196237 100644 --- a/configs/ae350_rv32_spl_defconfig +++ b/configs/ae350_rv32_spl_defconfig @@ -21,7 +21,6 @@ CONFIG_CMD_SF_TEST=y # CONFIG_CMD_SETEXPR is not set CONFIG_BOOTP_PREFER_SERVERIP=y CONFIG_CMD_CACHE=y -CONFIG_OF_BOARD=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_BOOTP_SEND_HOSTNAME=y @@ -33,7 +32,6 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SPI_FLASH_MACRONIX=y CONFIG_FTMAC100=y CONFIG_BAUDRATE=38400 diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig index 18d114e24c431f70fd21cf6c52ba4c83e1516534..9f21084a54133069150660d7a6f3a69d6fe29ac4 100644 --- a/configs/ae350_rv32_spl_xip_defconfig +++ b/configs/ae350_rv32_spl_xip_defconfig @@ -23,7 +23,6 @@ CONFIG_CMD_SF_TEST=y # CONFIG_CMD_SETEXPR is not set CONFIG_BOOTP_PREFER_SERVERIP=y CONFIG_CMD_CACHE=y -CONFIG_OF_BOARD=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_BOOTP_SEND_HOSTNAME=y @@ -35,7 +34,6 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SPI_FLASH_MACRONIX=y CONFIG_FTMAC100=y CONFIG_BAUDRATE=38400 diff --git a/configs/ae350_rv32_xip_defconfig b/configs/ae350_rv32_xip_defconfig index 524996c8709b532b0b3aa3a8d8a8c2584d2f0dce..d69a585b82dcc9e31b86f50172183eeb6a4deb32 100644 --- a/configs/ae350_rv32_xip_defconfig +++ b/configs/ae350_rv32_xip_defconfig @@ -31,7 +31,6 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SPI_FLASH_MACRONIX=y CONFIG_FTMAC100=y CONFIG_BAUDRATE=38400 diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig index 01016c238c8be474c2e754eaf0df88f8c78b366f..c30763ac1e8508cf1cf5ed01a9bc22384c46a285 100644 --- a/configs/ae350_rv64_defconfig +++ b/configs/ae350_rv64_defconfig @@ -18,7 +18,6 @@ CONFIG_CMD_SF_TEST=y # CONFIG_CMD_SETEXPR is not set CONFIG_BOOTP_PREFER_SERVERIP=y CONFIG_CMD_CACHE=y -CONFIG_OF_BOARD=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y @@ -32,7 +31,6 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SPI_FLASH_MACRONIX=y CONFIG_FTMAC100=y CONFIG_BAUDRATE=38400 diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig index 42b93f52751cd000f7fad98e2004516e5b5bfca8..8ef8e91a4f87f734e3e3fdc9943221fc8a4047b1 100644 --- a/configs/ae350_rv64_spl_defconfig +++ b/configs/ae350_rv64_spl_defconfig @@ -22,7 +22,6 @@ CONFIG_CMD_SF_TEST=y # CONFIG_CMD_SETEXPR is not set CONFIG_BOOTP_PREFER_SERVERIP=y CONFIG_CMD_CACHE=y -CONFIG_OF_BOARD=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_BOOTP_SEND_HOSTNAME=y @@ -34,7 +33,6 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SPI_FLASH_MACRONIX=y CONFIG_FTMAC100=y CONFIG_BAUDRATE=38400 diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig index 9071b7c65302aa85addb04c7971de8cd532a27b2..2bf3dd66ac210867fafc0e4e086d182c4d6c68e4 100644 --- a/configs/ae350_rv64_spl_xip_defconfig +++ b/configs/ae350_rv64_spl_xip_defconfig @@ -24,7 +24,6 @@ CONFIG_CMD_SF_TEST=y # CONFIG_CMD_SETEXPR is not set CONFIG_BOOTP_PREFER_SERVERIP=y CONFIG_CMD_CACHE=y -CONFIG_OF_BOARD=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_BOOTP_SEND_HOSTNAME=y @@ -36,7 +35,6 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SPI_FLASH_MACRONIX=y CONFIG_FTMAC100=y CONFIG_BAUDRATE=38400 diff --git a/configs/ae350_rv64_xip_defconfig b/configs/ae350_rv64_xip_defconfig index 190206fe444ac38e87e80ce6565acafd99a83005..e8dc44787457298f638e3ec6839337b862f6d1fa 100644 --- a/configs/ae350_rv64_xip_defconfig +++ b/configs/ae350_rv64_xip_defconfig @@ -32,7 +32,6 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SPI_FLASH_MACRONIX=y CONFIG_FTMAC100=y CONFIG_BAUDRATE=38400 diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig index 492f7b98d44aff5ca28fd13b6a41d4517ed03e58..90612e6e2c3e5f01a7bc9eeca978142012a3dcff 100644 --- a/configs/am335x_baltos_defconfig +++ b/configs/am335x_baltos_defconfig @@ -14,7 +14,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run findfdt; run usbboot;run mmcboot;setenv mmcdev 1; setenv bootpart 1:2; run mmcboot;run nandboot;" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_FS_EXT4=y diff --git a/configs/am335x_igep003x_defconfig b/configs/am335x_igep003x_defconfig index d46861c1f686f04c5aef104536b2fe4bd292e958..2c0cd1a283d6e0c68ce9de3791e55b59178d6222 100644 --- a/configs/am335x_igep003x_defconfig +++ b/configs/am335x_igep003x_defconfig @@ -16,7 +16,7 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run findfdt;run mmcboot;run nandboot;run netboot;" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C=y diff --git a/configs/am335x_pdu001_defconfig b/configs/am335x_pdu001_defconfig index ffadc909fc6b23054126c793c3404e06f62c051d..1c4c7118585bb6c8a7ea7460fde2405957a72671 100644 --- a/configs/am335x_pdu001_defconfig +++ b/configs/am335x_pdu001_defconfig @@ -19,7 +19,7 @@ CONFIG_BOOTDELAY=1 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" CONFIG_AUTOBOOT_STOP_STR=" " -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run eval_boot_device;part uuid mmc ${mmc_boot}:${root_fs_partition} root_fs_partuuid;setenv bootargs console=${console} vt.global_cursor_default=0 root=PARTUUID=${root_fs_partuuid} rootfstype=ext4 rootwait rootdelay=1;fatload mmc ${mmc_boot} ${fdtaddr} ${fdtfile};fatload mmc ${mmc_boot} ${loadaddr} ${bootfile};bootz ${loadaddr} - ${fdtaddr}" CONFIG_BOARD_LATE_INIT=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_I2C=y diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig index 4169d13d2a82fe484a165487fecc12f872b439ac..f2a61080a74ae2d850760343fd7341b57e907787 100644 --- a/configs/am335x_shc_defconfig +++ b/configs/am335x_shc_defconfig @@ -22,7 +22,7 @@ CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Enter 'shc' to enter prompt (times out) %d \nEnter 'noautoboot' to enter prompt without timeout\n" CONFIG_AUTOBOOT_DELAY_STR="shc" CONFIG_AUTOBOOT_STOP_STR="noautoboot" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="if mmc dev 1; mmc rescan; then run emmc_setup; else echo ERROR: eMMC device not detected!; panic; fi; if run loaduimage; then run mmcboot; else echo ERROR Unable to load uImage from eMMC!; echo Performing Rollback!; setenv _active_ ${active_root}; setenv _inactive_ ${inactive_root}; setenv active_root ${_inactive_}; setenv inactive_root ${_active_}; saveenv; reset; fi; " CONFIG_DEFAULT_FDT_FILE="am335x-shc" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig index 1d25adf7cde5197da25c46d63801ac5712543e35..49e18d873989ada40fe7678bc59b7a8f2568fc74 100644 --- a/configs/am335x_shc_ict_defconfig +++ b/configs/am335x_shc_ict_defconfig @@ -23,7 +23,7 @@ CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Enter 'shc' to enter prompt (times out) %d \nEnter 'noautoboot' to enter prompt without timeout\n" CONFIG_AUTOBOOT_DELAY_STR="shc" CONFIG_AUTOBOOT_STOP_STR="noautoboot" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="if mmc dev 0; mmc rescan; then run sd_setup; else echo ERROR: SD/MMC-Card not detected!; panic; fi; run fusecmd; " CONFIG_DEFAULT_FDT_FILE="am335x-shc" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig index 0ab3acb77e18601bc4d86701a311fd0ba6dfd023..c63ffb7248691fad240609474de5585884472920 100644 --- a/configs/am335x_shc_netboot_defconfig +++ b/configs/am335x_shc_netboot_defconfig @@ -23,7 +23,7 @@ CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Enter 'shc' to enter prompt (times out) %d \nEnter 'noautoboot' to enter prompt without timeout\n" CONFIG_AUTOBOOT_DELAY_STR="shc" CONFIG_AUTOBOOT_STOP_STR="noautoboot" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run fusecmd; if run netboot; then echo Booting from network; else echo ERROR: Cannot boot from network!; panic; fi; " CONFIG_DEFAULT_FDT_FILE="am335x-shc" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig index 914f21cb7cbf8b6f6ca15ddb558b3f8ee9e618ac..24409b8db45f59f308e0cc7c0e5f72b0f28bdf2e 100644 --- a/configs/am335x_shc_sdboot_defconfig +++ b/configs/am335x_shc_sdboot_defconfig @@ -23,7 +23,7 @@ CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Enter 'shc' to enter prompt (times out) %d \nEnter 'noautoboot' to enter prompt without timeout\n" CONFIG_AUTOBOOT_DELAY_STR="shc" CONFIG_AUTOBOOT_STOP_STR="noautoboot" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="if mmc dev 0; mmc rescan; then run sd_setup; else echo ERROR: SD/MMC-Card not detected!; panic; fi; if run loaduimage; then echo Bootable SD/MMC-Card inserted, booting from it!; run mmcboot; else echo ERROR: Unable to load uImage from SD/MMC-Card!; panic; fi; " CONFIG_DEFAULT_FDT_FILE="am335x-shc" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig index c24986c134866664838096566815317d6ec0334f..75e6589a2597857b260af68381bd6974372ab45a 100644 --- a/configs/am3517_evm_defconfig +++ b/configs/am3517_evm_defconfig @@ -15,7 +15,7 @@ CONFIG_SPL=y CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=10 -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then echo SD/MMC found on device $mmcdev; if run loadbootenv; then run importbootenv; fi; echo Checking if uenvcmd is set ...; if test -n $uenvcmd; then echo Running uenvcmd ...; run uenvcmd; fi; echo Running default loadimage ...; setenv bootfile zImage; if run loadimage; then run loadfdt; run mmcboot; fi; else run nandboot; fi" CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index 79f949f7cdc8f5e3f9c6d5f935bc216dbc213ddb..9b24b60e808c07f7eabbcde359d4e05b0527d28b 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -21,7 +21,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS2,115200 androidboot.console=ttyS2 androidboot.hardware=beagle_x15board" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="if test ${dofastboot} -eq 1; then echo Boot fastboot requested, resetting dofastboot ...;setenv dofastboot 0; saveenv;echo Booting into fastboot ...; fastboot 1;fi;if test ${boot_fit} -eq 1; then run update_to_fit;fi;run findfdt; run finduuid; run distro_bootcmd;run emmc_android_boot; " CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_MISC_INIT_R is not set diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index 608982a17b0c15b57b62a214b470feae6464af85..7d9e2549cea56d0f6ace3d650c6a7d4b4e85aaf6 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -26,7 +26,7 @@ CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS2,115200 androidboot.console=ttyS2 androidboot.hardware=beagle_x15board" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="if test ${dofastboot} -eq 1; then echo Boot fastboot requested, resetting dofastboot ...;setenv dofastboot 0; saveenv;echo Booting into fastboot ...; fastboot 1;fi;if test ${boot_fit} -eq 1; then run update_to_fit;fi;run findfdt; run finduuid; run distro_bootcmd;run emmc_android_boot; " CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_MISC_INIT_R is not set diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index 99496e380d7717a7605688edba2fb90f2fa10b4f..7f19d991c554ca9f8b6d5021891784930968267b 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -29,7 +29,7 @@ CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS2,115200 androidboot.console=ttyS2 androidboot.hardware=beagle_x15board" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="if test ${dofastboot} -eq 1; then echo Boot fastboot requested, resetting dofastboot ...;setenv dofastboot 0; saveenv;echo Booting into fastboot ...; fastboot 1;fi;if test ${boot_fit} -eq 1; then run update_to_fit;fi;run findfdt; run finduuid; run distro_bootcmd;run emmc_android_boot; " CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_MISC_INIT_R is not set diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig index aafbb410b6c6ff4332a9edc6725c2eaedef6b629..3ce2129e491be99f354b9536c89b5745f635044c 100644 --- a/configs/am64x_evm_a53_defconfig +++ b/configs/am64x_evm_a53_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_ARCH_K3=y CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 @@ -11,6 +12,7 @@ CONFIG_K3_ATF_LOAD_ADDR=0x701c0000 CONFIG_TARGET_AM642_A53_EVM=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x680000 +CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-am642-evm" CONFIG_SPL_TEXT_BASE=0x80080000 @@ -70,9 +72,13 @@ CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_CLK=y CONFIG_SPL_CLK=y +CONFIG_SPL_CLK_CCF=y +CONFIG_CLK_CCF=y CONFIG_CLK_TI_SCI=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y @@ -96,10 +102,16 @@ CONFIG_MMC_SDHCI_AM654=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_MULTIPLEXER=y +CONFIG_MUX_MMIO=y CONFIG_PHY_TI_DP83867=y CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y CONFIG_TI_AM65_CPSW_NUSS=y +CONFIG_PHY=y +CONFIG_SPL_PHY=y +CONFIG_PHY_CADENCE_TORRENT=y +CONFIG_PHY_J721E_WIZ=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_SINGLE=y diff --git a/configs/am64x_evm_r5_defconfig b/configs/am64x_evm_r5_defconfig index f564fa064e83dbfeb2a4b3024e387a6856cc8cdb..2b609ad9accfab1fd8825a66bca67c4cf46702f8 100644 --- a/configs/am64x_evm_r5_defconfig +++ b/configs/am64x_evm_r5_defconfig @@ -25,6 +25,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run distro_bootcmd" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y @@ -76,9 +78,13 @@ CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_CLK=y CONFIG_SPL_CLK=y +CONFIG_SPL_CLK_CCF=y +CONFIG_CLK_CCF=y CONFIG_CLK_TI_SCI=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y @@ -97,6 +103,11 @@ CONFIG_MMC_SDHCI_AM654=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PHY=y +CONFIG_SPL_PHY=y +CONFIG_PHY_CADENCE_SIERRA=y +CONFIG_PHY_CADENCE_TORRENT=y +CONFIG_PHY_J721E_WIZ=y CONFIG_PINCTRL=y # CONFIG_PINCTRL_GENERIC is not set CONFIG_SPL_PINCTRL=y diff --git a/configs/amcore_defconfig b/configs/amcore_defconfig index 1170dd33cba3315af0725f07d41c0eac0cc9c959..afb3a7707fdb13f0c8f51ea8e691866ef82d28da 100644 --- a/configs/amcore_defconfig +++ b/configs/amcore_defconfig @@ -8,6 +8,8 @@ CONFIG_DEFAULT_DEVICE_TREE="amcore" CONFIG_TARGET_AMCORE=y CONFIG_SYS_LOAD_ADDR=0x20000 CONFIG_BOOTDELAY=1 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="bootm ffc20000" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/ap121_defconfig b/configs/ap121_defconfig index 0206aaa7d6216c2980eb5c9358fca6eb350e45b1..3af41e8fed4a3e233adcbaa5152297f730e01a60 100644 --- a/configs/ap121_defconfig +++ b/configs/ap121_defconfig @@ -17,6 +17,8 @@ CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe;mtdparts default;bootm 0x9f650000" CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="ap121 # " @@ -38,7 +40,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=spi-flash.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-flash.0:256k(u-boot),64k(u-boot-env),6144k(rootfs),1600k(uImage),64k(NVRAM),64k(ART)" # CONFIG_ISO_PARTITION is not set CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=25000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/ap143_defconfig b/configs/ap143_defconfig index 639265dbede555fe0c797302a756091a70149c64..17aeda48e2c8c029fb94fb0d1edc2a20bc475b53 100644 --- a/configs/ap143_defconfig +++ b/configs/ap143_defconfig @@ -18,6 +18,8 @@ CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe;mtdparts default;bootm 0x9f680000" CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="ap143 # " @@ -37,7 +39,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=spi-flash.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-flash.0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1472k(uImage),64k(ART)" # CONFIG_ISO_PARTITION is not set CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=25000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set diff --git a/configs/ap152_defconfig b/configs/ap152_defconfig index fd69ad57df0e33b2c10628cb2b0a1ff768137706..3aa0ea5c56316a3b76465dbbea0d4c561652d18b 100644 --- a/configs/ap152_defconfig +++ b/configs/ap152_defconfig @@ -18,6 +18,8 @@ CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe;mtdparts default;bootm 0x9f060000" CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="ap152 # " @@ -37,6 +39,7 @@ CONFIG_MTDIDS_DEFAULT="nor0=spi-flash.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-flash.0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1472k(uImage),64k(ART)" # CONFIG_ISO_PARTITION is not set CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_ENV_SPI_MAX_HZ=25000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set CONFIG_MTD=y diff --git a/configs/apalis-tk1_defconfig b/configs/apalis-tk1_defconfig index 659e58f0933ca570767a7780dbe5164a713cd8fc..9645c2f21088a8e4ddf30f35b421cabb17aa82c0 100644 --- a/configs/apalis-tk1_defconfig +++ b/configs/apalis-tk1_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index b5c846aa6a4cfe0aa38e8b503da9022d2a6741aa..878bbf8fde62dca13625572dd6e7d3a76e09ba54 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -27,6 +27,7 @@ CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=1 +CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y @@ -105,6 +106,7 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y # CONFIG_VIDEO_BPP8 is not set # CONFIG_VIDEO_BPP32 is not set CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/configs/apalis_t30_defconfig b/configs/apalis_t30_defconfig index 59e5113e37aefb7eb396f92e18a13ccf0ae1275a..86d48eb6d92c0a2732133f6f119a25c50d98288e 100644 --- a/configs/apalis_t30_defconfig +++ b/configs/apalis_t30_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/configs/aristainetos2c_defconfig b/configs/aristainetos2c_defconfig index ad4e8350c3a07175565d12ba034fa723ca7e6fbb..27607d2ace41ba5d8d0177bb809e7e308dc908f2 100644 --- a/configs/aristainetos2c_defconfig +++ b/configs/aristainetos2c_defconfig @@ -109,6 +109,7 @@ CONFIG_SYSRESET_WATCHDOG=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_DISPLAY=y CONFIG_VIDEO_IPUV3=y diff --git a/configs/aristainetos2ccslb_defconfig b/configs/aristainetos2ccslb_defconfig index e4ecd81c1e2a7d8142137749a1e8a1ebe0310664..bfc967b38e6c73337b48cdcb4c8b0bf952f87fca 100644 --- a/configs/aristainetos2ccslb_defconfig +++ b/configs/aristainetos2ccslb_defconfig @@ -109,6 +109,7 @@ CONFIG_SYSRESET_WATCHDOG=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_DISPLAY=y CONFIG_VIDEO_IPUV3=y diff --git a/configs/armadillo-800eva_defconfig b/configs/armadillo-800eva_defconfig index 4a72ae4876d3a15a58f7a9e44af5851b77fef57b..2f5c115d84f47f390c9c24a824e193829ffc7ef2 100644 --- a/configs/armadillo-800eva_defconfig +++ b/configs/armadillo-800eva_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_ARCH_RMOBILE_BOARD_STRING="Armadillo-800EVA Board" CONFIG_R8A7740=y CONFIG_TARGET_ARMADILLO_800EVA=y +CONFIG_SYS_CLK_FREQ=50000000 CONFIG_SYS_LOAD_ADDR=0x44000000 CONFIG_BOOTDELAY=3 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/astro_mcf5373l_defconfig b/configs/astro_mcf5373l_defconfig index 39910c5053f3b89fce5d7c8bbc73c400f8646514..a97c4ffd488160c602bb4cce1e5cd086134c20db 100644 --- a/configs/astro_mcf5373l_defconfig +++ b/configs/astro_mcf5373l_defconfig @@ -9,6 +9,8 @@ CONFIG_SYS_LOAD_ADDR=0x20000 CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS=" console=ttyS2,115200 rootfstype=romfs loaderversion=$loaderversion" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="protect off 0x80000 0x1ffffff;run env_check;run xilinxload&&run alteraload&&bootm 0x80000;update;reset" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y @@ -38,3 +40,4 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_MCFUART=y +CONFIG_WATCHDOG=y diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig index de28327bfe6af65308eb67707b88ddb0aeeec614..ebcf14daa31fb4e326ed5076d6da148d97889e46 100644 --- a/configs/at91sam9260ek_dataflash_cs0_defconfig +++ b/configs/at91sam9260ek_dataflash_cs0_defconfig @@ -21,6 +21,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS0" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set @@ -35,7 +37,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig index d68c2795f623f2803876f0df57171acedde59022..7b9e0a4928ca127cc002ce9d6bbad5b9a647dff4 100644 --- a/configs/at91sam9260ek_dataflash_cs1_defconfig +++ b/configs/at91sam9260ek_dataflash_cs1_defconfig @@ -21,6 +21,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS1" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe 0:1; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set @@ -35,7 +37,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/at91sam9260ek_nandflash_defconfig b/configs/at91sam9260ek_nandflash_defconfig index 04cbcf901d7c050d664662f89bfaac378759e446..6e7da8595108ffff1e74998e003c35fd6cd868ab 100644 --- a/configs/at91sam9260ek_nandflash_defconfig +++ b/configs/at91sam9260ek_nandflash_defconfig @@ -19,6 +19,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig index bb97f2d87d5bbe8fe31192cfb4e900f77b0815c1..5ec1e61ebdeba91916ed58be96b5a324332b00a9 100644 --- a/configs/at91sam9261ek_dataflash_cs0_defconfig +++ b/configs/at91sam9261ek_dataflash_cs0_defconfig @@ -20,6 +20,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS0" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " @@ -34,7 +36,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig index 0defac90e8160ff088dcf1fa6e219e92c20ce372..94c283404b1728ea13abac4366b2a5de5335ccec 100644 --- a/configs/at91sam9261ek_dataflash_cs3_defconfig +++ b/configs/at91sam9261ek_dataflash_cs3_defconfig @@ -20,6 +20,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS3" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe 0:3; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " @@ -34,7 +36,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig index 3ec505aade34242bc374d4a3c3d0d7db8cdca27c..ed2b04b881c75d71476ee6a51d2d6a51ddf1263a 100644 --- a/configs/at91sam9261ek_nandflash_defconfig +++ b/configs/at91sam9261ek_nandflash_defconfig @@ -18,6 +18,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig index d407496162a3a812abb5bb7cd2923660f918c975..29b392374f3beebb94f967f3cb6a1529d94d65ae 100644 --- a/configs/at91sam9263ek_dataflash_cs0_defconfig +++ b/configs/at91sam9263ek_dataflash_cs0_defconfig @@ -21,6 +21,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y @@ -38,7 +40,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig index d407496162a3a812abb5bb7cd2923660f918c975..29b392374f3beebb94f967f3cb6a1529d94d65ae 100644 --- a/configs/at91sam9263ek_dataflash_defconfig +++ b/configs/at91sam9263ek_dataflash_defconfig @@ -21,6 +21,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y @@ -38,7 +40,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/at91sam9263ek_nandflash_defconfig b/configs/at91sam9263ek_nandflash_defconfig index 589fc1dbb1e369521d2f95b0207ee888357b0420..4551cfdacf51839921922aa94c676bf70d58871e 100644 --- a/configs/at91sam9263ek_nandflash_defconfig +++ b/configs/at91sam9263ek_nandflash_defconfig @@ -19,6 +19,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig index 31c2e7d57145be754e10285ca88a2c50661c0286..f4d5dba4a46856c38594bff4e4a246302b1a8c67 100644 --- a/configs/at91sam9g10ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig @@ -20,6 +20,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS0" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " @@ -34,7 +36,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig index 6c5737c3fc0cabdb9585bf21f810b06e36a52630..72228b559712d7794c09eecce6e145498e683c98 100644 --- a/configs/at91sam9g10ek_dataflash_cs3_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig @@ -20,6 +20,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS3" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe 0:3; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " @@ -34,7 +36,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/at91sam9g10ek_nandflash_defconfig b/configs/at91sam9g10ek_nandflash_defconfig index ac8cb514fb16cb1a4bfd5d36be66da65214e35a9..293683cec9ceee0f806d90fb9433b3faa3cc8ee4 100644 --- a/configs/at91sam9g10ek_nandflash_defconfig +++ b/configs/at91sam9g10ek_nandflash_defconfig @@ -18,6 +18,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " diff --git a/configs/at91sam9g20ek_2mmc_defconfig b/configs/at91sam9g20ek_2mmc_defconfig index 33d5e59d1c788e4ae514c397f38ed933fec9cfdb..97057b5edf251ceb82f104fe4aed93795627f840 100644 --- a/configs/at91sam9g20ek_2mmc_defconfig +++ b/configs/at91sam9g20ek_2mmc_defconfig @@ -20,6 +20,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_MMC" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x22000000 uImage; bootm" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig b/configs/at91sam9g20ek_2mmc_nandflash_defconfig index 95b96c949d639e9a8d5c72a6b25e05db4f4ee6d8..cb381e2d8cb4ff33814c771e839d9aa26a736f25 100644 --- a/configs/at91sam9g20ek_2mmc_nandflash_defconfig +++ b/configs/at91sam9g20ek_2mmc_nandflash_defconfig @@ -19,6 +19,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig index 12d7fd34da1c72a63d57c8ce28144878fe4c14c9..cff3b1ae026e62a4516433594d8c9ae6540539bf 100644 --- a/configs/at91sam9g20ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig @@ -21,6 +21,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS0" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set @@ -35,7 +37,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig index 32128fb6c62d2fdd42ac8b2a54a91e2a6cda7ba6..350faaf5f2836887976e280d23dcdb71ac7e0e88 100644 --- a/configs/at91sam9g20ek_dataflash_cs1_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig @@ -21,6 +21,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS1" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe 0:1; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set @@ -35,7 +37,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/at91sam9g20ek_nandflash_defconfig b/configs/at91sam9g20ek_nandflash_defconfig index 851f15e00d976f2c5d945c07980acb2ae4d3bf6d..ef376951d264928f3caede0ee52eea200b904ea6 100644 --- a/configs/at91sam9g20ek_nandflash_defconfig +++ b/configs/at91sam9g20ek_nandflash_defconfig @@ -19,6 +19,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig index 71ca5d372a0550265c863a5a5f8db1b9ca755381..21ad96224bd35cf4ed25f1efe116e7ca25a2ff20 100644 --- a/configs/at91sam9m10g45ek_mmc_defconfig +++ b/configs/at91sam9m10g45ek_mmc_defconfig @@ -18,6 +18,8 @@ CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 mtdparts=atmel_nand:8M(bootstrap/uboot/kernel)ro,-(rootfs) root=/dev/mmcblk0p2 rw rootwait" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x71000000 dtb; fatload mmc 0:1 0x72000000 zImage; bootz 0x72000000 - 0x71000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig b/configs/at91sam9m10g45ek_nandflash_defconfig index 0437cb71864d931010f0785675012003713bd2c0..695b4c501a31eac6776f94b42597bb7805eb242d 100644 --- a/configs/at91sam9m10g45ek_nandflash_defconfig +++ b/configs/at91sam9m10g45ek_nandflash_defconfig @@ -18,6 +18,8 @@ CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="nand read 0x70000000 0x200000 0x300000;bootm 0x70000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig index e82d9ab5d96ecc0105015abd67a8f8cca62f7993..998bacf276d59c9afb4195bce8a54d5bb1bfd9be 100644 --- a/configs/at91sam9n12ek_mmc_defconfig +++ b/configs/at91sam9n12ek_mmc_defconfig @@ -15,6 +15,8 @@ CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};fatload mmc 0:1 0x21000000 dtb;fatload mmc 0:1 0x22000000 uImage;bootm 0x22000000 - 0x21000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig index 984289f2d8c777a65c3377baa8ec41bb6d5072e0..90a832a3985e1f2de7c91cd348b040be32f3eec2 100644 --- a/configs/at91sam9n12ek_nandflash_defconfig +++ b/configs/at91sam9n12ek_nandflash_defconfig @@ -15,6 +15,8 @@ CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_nand};nand read 0x21000000 0x180000 0x080000;nand read 0x22000000 0x200000 0x400000;bootm 0x22000000 - 0x21000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig index 5a9b5c2e27bf9bda04307816cfe38a8fd6021edf..e704ee0ebd05c6bc13d94d19e8ee6400bb2bc5da 100644 --- a/configs/at91sam9n12ek_spiflash_defconfig +++ b/configs/at91sam9n12ek_spiflash_defconfig @@ -17,6 +17,8 @@ CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_nand};sf probe 0; sf read 0x22000000 0x100000 0x300000; bootm 0x22000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y diff --git a/configs/at91sam9rlek_dataflash_defconfig b/configs/at91sam9rlek_dataflash_defconfig index 32d73e65e4cc18d1f2eee73059c2345041c78322..9943b868c0da07ad662e44c389304cd89338d5bc 100644 --- a/configs/at91sam9rlek_dataflash_defconfig +++ b/configs/at91sam9rlek_dataflash_defconfig @@ -21,6 +21,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_DATAFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y @@ -36,7 +38,6 @@ CONFIG_CMD_NAND=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set diff --git a/configs/at91sam9rlek_mmc_defconfig b/configs/at91sam9rlek_mmc_defconfig index c8bb88e07f54a106880a850d477291dc8ac7b6d1..9fd20428afe1dfc0821792243707c5462dbb1573 100644 --- a/configs/at91sam9rlek_mmc_defconfig +++ b/configs/at91sam9rlek_mmc_defconfig @@ -19,6 +19,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_MMC" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 mtdparts=atmel_nand:8M(bootstrap/uboot/kernel)ro,-(rootfs) root=/dev/mmcblk0p2 rw rootwait" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x21000000 at91sam9rlek.dtb; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y diff --git a/configs/at91sam9rlek_nandflash_defconfig b/configs/at91sam9rlek_nandflash_defconfig index 677c0ae178966fa1340d668a416182b6e18166a1..a922780eaee1f9375946c5d392dda60fdc4a1d4c 100644 --- a/configs/at91sam9rlek_nandflash_defconfig +++ b/configs/at91sam9rlek_nandflash_defconfig @@ -19,6 +19,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256K(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x600000; nand read 0x21000000 0x180000 0x80000; bootz 0x22000000 - 0x21000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig index 5a47339d53f5578fa79587d27396bd12b01089d1..f00f3c8af43ff55ee925959a5eaf7641d6fb2300 100644 --- a/configs/at91sam9x5ek_dataflash_defconfig +++ b/configs/at91sam9x5ek_dataflash_defconfig @@ -21,6 +21,8 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_USE_DATAFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs rw" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig index e919b81d4144bc887ba5c3d4bfd73846e6dbbf79..124c58d331bdfb9be3c91ab6bf3682adce0a940d 100644 --- a/configs/at91sam9x5ek_nandflash_defconfig +++ b/configs/at91sam9x5ek_nandflash_defconfig @@ -19,6 +19,8 @@ CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs rw" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x600000; nand read 0x21000000 0x180000 0x20000; bootz 0x22000000 - 0x21000000" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig index 3a74e1099e49bca59b251ba3db480d278829462f..4eecdf3b6ef3d45556385b8720ce2613eab7217f 100644 --- a/configs/at91sam9x5ek_spiflash_defconfig +++ b/configs/at91sam9x5ek_spiflash_defconfig @@ -21,6 +21,8 @@ CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs rw" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x22000000 0x100000 0x300000; bootm 0x22000000" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig index 6f9bd2c2622739fee5d38e1f47e55968ae75b953..28479b92c7ca7c8908d7884d38cb16e8456deb35 100644 --- a/configs/at91sam9xeek_dataflash_cs0_defconfig +++ b/configs/at91sam9xeek_dataflash_cs0_defconfig @@ -21,6 +21,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS0" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set @@ -35,7 +37,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig index 6b7f8e039baffff343b74d36abfa0ecc41369a12..5072a9bcd213a77ea022f6354e1b8ad4a3b31d6f 100644 --- a/configs/at91sam9xeek_dataflash_cs1_defconfig +++ b/configs/at91sam9xeek_dataflash_cs1_defconfig @@ -21,6 +21,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS1" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe 0:1; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set @@ -35,7 +37,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/at91sam9xeek_nandflash_defconfig b/configs/at91sam9xeek_nandflash_defconfig index 04e761f2aae3afac33cff5614e67eacce7a8e18c..fa7f0525753142a9656722e341175bfa07cf76e5 100644 --- a/configs/at91sam9xeek_nandflash_defconfig +++ b/configs/at91sam9xeek_nandflash_defconfig @@ -19,6 +19,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set diff --git a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig index 3609fd94e2c15bdadaaf80a1d8ad0e5a9c279c34..55aa939978a413adef92f47a3c83a0e1a21ad26e 100644 --- a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig +++ b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_ZYNQ_MAC_IN_EEPROM=y CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0xfa +CONFIG_ZYNQMP_PSU_INIT_ENABLED=y CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x8000000 diff --git a/configs/bananapi-m5_defconfig b/configs/bananapi-m5_defconfig index 7ca14a5f6afa027cb921f931b548f8a54565957b..4bf81b2faa2d5d059be2974b3447396c3f78c239 100644 --- a/configs/bananapi-m5_defconfig +++ b/configs/bananapi-m5_defconfig @@ -25,7 +25,6 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_ADC=y CONFIG_SARADC_MESON=y CONFIG_MMC_MESON_GX=y diff --git a/configs/bayleybay_defconfig b/configs/bayleybay_defconfig index 95a91353c78cbe77fa1f6502a839c29074830c10..40743ea0cd3442602a75f8082487a258ada998d8 100644 --- a/configs/bayleybay_defconfig +++ b/configs/bayleybay_defconfig @@ -21,6 +21,8 @@ CONFIG_BOOTSTAGE_REPORT=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y diff --git a/configs/bcm7260_defconfig b/configs/bcm7260_defconfig index 257d81052a8fd00e2f9e252736d91de7fce80b64..c3fff0f4a94fba49a0a3998a196a9849e48ca09c 100644 --- a/configs/bcm7260_defconfig +++ b/configs/bcm7260_defconfig @@ -7,6 +7,7 @@ CONFIG_TARGET_BCM7260=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x814800 +CONFIG_DEFAULT_DEVICE_TREE="bcm7xxx" CONFIG_ENV_OFFSET_REDUND=0x824800 CONFIG_SYS_LOAD_ADDR=0x02000000 CONFIG_FIT=y @@ -26,7 +27,6 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_FS_GENERIC=y CONFIG_DOS_PARTITION=y -CONFIG_OF_BOARD=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y @@ -35,4 +35,5 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_BCMSTB=y CONFIG_MTD=y +CONFIG_SYS_NS16550=y # CONFIG_EFI_LOADER is not set diff --git a/configs/bcm7445_defconfig b/configs/bcm7445_defconfig index 9ffa436e454898128424a417a233d987192bbb5a..46909e9cc0caf6955693b99a3be227cd42093c13 100644 --- a/configs/bcm7445_defconfig +++ b/configs/bcm7445_defconfig @@ -8,6 +8,7 @@ CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1E0000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="bcm7xxx" CONFIG_ENV_OFFSET_REDUND=0x1F0000 CONFIG_SYS_LOAD_ADDR=0x02000000 CONFIG_FIT=y @@ -27,7 +28,6 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_FS_GENERIC=y CONFIG_DOS_PARTITION=y -CONFIG_OF_BOARD=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y @@ -37,6 +37,9 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_BCMSTB=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_BCMSTB_SPI=y diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig index 13054345df7c20b2be10e374ace84c37269edd1b..86ef5e3b99f329325d5e28a45bd06e19327dd73c 100644 --- a/configs/bcm_ns3_defconfig +++ b/configs/bcm_ns3_defconfig @@ -14,6 +14,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run flash_pending_rfs_imgs;run fastboot_nitro && run bootcmd_mmc_fits || run bootcmd_usb || run bootcmd_pxe" CONFIG_LOGLEVEL=7 CONFIG_SILENT_CONSOLE=y CONFIG_SILENT_U_BOOT_ONLY=y diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig index 3db80046400b2e269a40b950868afd61c513c6ef..8aa8438467bd3d04434c623ba38718e90048a294 100644 --- a/configs/beaver_defconfig +++ b/configs/beaver_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_SYS_MALLOC_LEN=0x2500000 diff --git a/configs/beelink-gsking-x_defconfig b/configs/beelink-gsking-x_defconfig index 54ac1c93156ff2b94ed7aad5768c81526e48e0e6..e60e754f56e6b374b3f4106cf737e8c92bea69b6 100644 --- a/configs/beelink-gsking-x_defconfig +++ b/configs/beelink-gsking-x_defconfig @@ -26,7 +26,6 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y CONFIG_DM_MTD=y diff --git a/configs/beelink-gtking_defconfig b/configs/beelink-gtking_defconfig index 7735c70e3f42880835ada7b6450f39e68bc4d5c7..2ec322156376113af33aa6a67f9121a5d3171adf 100644 --- a/configs/beelink-gtking_defconfig +++ b/configs/beelink-gtking_defconfig @@ -26,7 +26,6 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y CONFIG_DM_MTD=y diff --git a/configs/beelink-gtkingpro_defconfig b/configs/beelink-gtkingpro_defconfig index 93c5739672d16250c0042f50bfae352963583c3d..60d316d80a4030af9220de9072de03122271f967 100644 --- a/configs/beelink-gtkingpro_defconfig +++ b/configs/beelink-gtkingpro_defconfig @@ -26,7 +26,6 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y CONFIG_DM_MTD=y diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig index 4cd6a7c102d840137725f0c9397119835423b297..ffeee33fe5c8ebf5d1df6c54579f3d32a48ea4e0 100644 --- a/configs/bitmain_antminer_s9_defconfig +++ b/configs/bitmain_antminer_s9_defconfig @@ -3,6 +3,7 @@ CONFIG_SYS_VENDOR="bitmain" CONFIG_SYS_BOARD="antminer_s9" CONFIG_SYS_CONFIG_NAME="bitmain_antminer_s9" CONFIG_SPL_SYS_DCACHE_OFF=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_ENV_OFFSET=0x300000 diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig index 1000cc9dfe163c73269f3f447a96dd6f67345cba..1cee1308cb69088dd52053f3d0e66f3dfcce3655 100644 --- a/configs/bk4r1_defconfig +++ b/configs/bk4r1_defconfig @@ -23,6 +23,8 @@ CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Enter passphrase to stop autoboot, booting in %d seconds\n" CONFIG_AUTOBOOT_STOP_STR="123" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run set_gpio122; run set_gpio96; sf probe; run manage_userdata; run bootcmd_nand" CONFIG_USE_PREBOOT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y diff --git a/configs/cardhu_defconfig b/configs/cardhu_defconfig index 47995eab20973adc22e1c06c2ead617d0bd9bfba..a2126eeadff1332983ef23da274d08abd9b60fb5 100644 --- a/configs/cardhu_defconfig +++ b/configs/cardhu_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/cei-tk1-som_defconfig b/configs/cei-tk1-som_defconfig index 10d1194569894336d3a6368fb7a1c8de8bc93a6c..197d462ce061fb035e3bfef37535290a6dda66cd 100644 --- a/configs/cei-tk1-som_defconfig +++ b/configs/cei-tk1-som_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_SYS_MALLOC_LEN=0x2500000 diff --git a/configs/cgtqmx8_defconfig b/configs/cgtqmx8_defconfig index f69b5662fd0662440850be5f6ee0ee8241e02e8d..91b309af03fc20037a9482e6c66865ecab951fb4 100644 --- a/configs/cgtqmx8_defconfig +++ b/configs/cgtqmx8_defconfig @@ -21,11 +21,16 @@ CONFIG_SYS_LOAD_ADDR=0x80280000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 CONFIG_SYS_MMCSD_FS_BOOT_PARTITION=0 CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/cherryhill_defconfig b/configs/cherryhill_defconfig index c3231032ca441f71e5e269b4b92515f197914262..73120b5b423cf07df1f3026ea1c8ccce56e35b63 100644 --- a/configs/cherryhill_defconfig +++ b/configs/cherryhill_defconfig @@ -13,6 +13,8 @@ CONFIG_DEBUG_UART=y CONFIG_SMP=y CONFIG_GENERATE_MP_TABLE=y CONFIG_SHOW_BOOT_PROGRESS=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig index a024fe754082c6086c3ce7c0d25fcb3a5a9f0a6a..023cd196103586a56fae485c173290376e46681f 100644 --- a/configs/chiliboard_defconfig +++ b/configs/chiliboard_defconfig @@ -17,7 +17,7 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=1 -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run mmcboot; run nandboot; run netboot" CONFIG_DEFAULT_FDT_FILE="am335x-chiliboard.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index 80ed1f0a1450f498dc723e78837227e38ab81104..091b060c5bb09f31a94e4cf62b501c822c12bd3f 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_ARCH_TIMER=y # CONFIG_SPL_USE_ARCH_MEMCPY is not set CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 @@ -61,6 +62,7 @@ CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_I2C_MUX=y CONFIG_DM_KEYBOARD=y +CONFIG_KEYBOARD=y CONFIG_CROS_EC_KEYB=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index 321ad7de5b7fcd70621994fde1a14aeeefc64cf2..785314a362568db5fd9e46b2e238ec08a29dba67 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -6,6 +6,7 @@ CONFIG_MAX_CPUS=8 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="chromebook_coral" CONFIG_SPL_TEXT_BASE=0xfef10000 +CONFIG_TPL_TEXT_BASE=0xffff8000 CONFIG_SPL_SYS_MALLOC_F_LEN=0xf000 CONFIG_BOOTSTAGE_STASH_ADDR=0xfef00000 CONFIG_DEBUG_UART_BOARD_INIT=y @@ -31,6 +32,8 @@ CONFIG_SPL_BOOTSTAGE_RECORD_COUNT=10 CONFIG_BOOTSTAGE_STASH=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS_SUBST=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="tpm init; tpm startup TPM2_SU_CLEAR; read mmc 0:2 100000 0 80; setexpr loader *001004f0; setexpr size *00100518; setexpr blocks $size / 200; read mmc 0:2 100000 80 $blocks; setexpr setup $loader - 1000; setexpr cmdline_ptr $loader - 2000; setexpr.s cmdline *$cmdline_ptr; setexpr cmdline gsub %U \\\\${uuid}; if part uuid mmc 0:2 uuid; then zboot start 100000 0 0 0 $setup cmdline; zboot load; zboot setup; zboot dump; zboot go;fi" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index 85f612093df4844373915a53d32272096a214ac6..521795dc6603651c174bb3b81e9473edac26ac00 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_ARCH_TIMER=y # CONFIG_SPL_USE_ARCH_MEMCPY is not set CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 @@ -63,6 +64,7 @@ CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_I2C_MUX=y CONFIG_DM_KEYBOARD=y +CONFIG_KEYBOARD=y CONFIG_CROS_EC_KEYB=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig index c43d9dcb927cdc9f99fdf5aa24956c34ff8a39df..7059be847741ecc56e87257b464e13eb2a6c7b4f 100644 --- a/configs/chromebook_link64_defconfig +++ b/configs/chromebook_link64_defconfig @@ -26,6 +26,8 @@ CONFIG_BOOTSTAGE_REPORT=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig index ad9e9dd961ee88d6bcedff93e94d660202122395..a6efb191f643a06f3608b53c901b543955e88b72 100644 --- a/configs/chromebook_link_defconfig +++ b/configs/chromebook_link_defconfig @@ -21,6 +21,8 @@ CONFIG_BOOTSTAGE_REPORT=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index 41a3fe1a3c5eb780595a4369d6b38a391111fbff..41a9e7f37a35d179fd6e3b9473353b802407fc61 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_ARCH_TIMER=y # CONFIG_SPL_USE_ARCH_MEMCPY is not set CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 @@ -63,6 +64,7 @@ CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_I2C_MUX=y CONFIG_DM_KEYBOARD=y +CONFIG_KEYBOARD=y CONFIG_CROS_EC_KEYB=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y diff --git a/configs/chromebook_samus_defconfig b/configs/chromebook_samus_defconfig index ef36d081092d4481e9bd16ba6f3f5c8533a3e8c6..fc1292b2e2336feca92a1ce999ad3c75e522280e 100644 --- a/configs/chromebook_samus_defconfig +++ b/configs/chromebook_samus_defconfig @@ -21,6 +21,8 @@ CONFIG_BOOTSTAGE_REPORT=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y diff --git a/configs/chromebook_samus_tpl_defconfig b/configs/chromebook_samus_tpl_defconfig index b231b3b0dbdcd9b7213ded088be875f372544b68..c3c133baee0cea1610a8540fa9f5dbc9fdedb329 100644 --- a/configs/chromebook_samus_tpl_defconfig +++ b/configs/chromebook_samus_tpl_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="chromebook_samus" CONFIG_SPL_TEXT_BASE=0xffe70000 +CONFIG_TPL_TEXT_BASE=0xfffd8000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 @@ -24,6 +25,8 @@ CONFIG_BOOTSTAGE_REPORT=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig index b396d9f70551b102ad798c8e4b2abeea3bb6c85d..03dfc6825ab78d9f4354563490ae1f983df50dfe 100644 --- a/configs/chromebook_speedy_defconfig +++ b/configs/chromebook_speedy_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_ARCH_TIMER=y # CONFIG_SPL_USE_ARCH_MEMCPY is not set CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 @@ -62,6 +63,7 @@ CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_I2C_MUX=y CONFIG_DM_KEYBOARD=y +CONFIG_KEYBOARD=y CONFIG_CROS_EC_KEYB=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y diff --git a/configs/chromebox_panther_defconfig b/configs/chromebox_panther_defconfig index 5f11c59100768352a01f4176537b7d1512937968..748a0e70a5209739fde343bb56402953ae245c59 100644 --- a/configs/chromebox_panther_defconfig +++ b/configs/chromebox_panther_defconfig @@ -17,6 +17,8 @@ CONFIG_BOOTSTAGE_REPORT=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y diff --git a/configs/ci20_mmc_defconfig b/configs/ci20_mmc_defconfig index 3c455208f5c0874fe1aea50eb1e2724f222555b3..962215701560ee26d4d50743ab85537aa6019bd7 100644 --- a/configs/ci20_mmc_defconfig +++ b/configs/ci20_mmc_defconfig @@ -24,6 +24,8 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y # CONFIG_SPL_BANNER_PRINT is not set +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1c CONFIG_SPL_MMC_TINY=y CONFIG_HUSH_PARSER=y CONFIG_CMD_DM=y @@ -35,6 +37,7 @@ CONFIG_CMD_FAT=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_VERSION_VARIABLE=y # CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_JZ4780_EFUSE=y diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig index faad487040868c0eb7230c52bf1552155bdf2cc6..3de52843a8cf25cfbe05f6bab83863800ab78dae 100644 --- a/configs/cl-som-imx7_defconfig +++ b/configs/cl-som-imx7_defconfig @@ -22,6 +22,8 @@ CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="echo SD boot attempt ...; run sdbootscript; run sdboot; echo eMMC boot attempt ...; run emmcbootscript; run emmcboot; echo USB boot attempt ...; run usbbootscript; " CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80 diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index b823a150dc0d1878e558d64fc93f1f168fecf4e3..4e7f152185ba322280464128ce273350cd96915a 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -106,6 +106,7 @@ CONFIG_USB=y CONFIG_USB_KEYBOARD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y CONFIG_VIDEO_IPUV3=y CONFIG_SPLASH_SCREEN=y CONFIG_SPLASH_SOURCE=y diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig index 0d87d26d4ab98c03ac3481e7fbf2df35aeeebcf5..d8aab5853ec1aae1a8362f36c544567123993902 100644 --- a/configs/cm_t43_defconfig +++ b/configs/cm_t43_defconfig @@ -21,7 +21,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DISTRO_DEFAULTS=y -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="mmc dev 0; if mmc rescan; then if run loadbootscript; then run bootscript; fi; fi; mmc dev 1; if mmc rescan; then run emmcboot; fi;" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/cobra5272_defconfig b/configs/cobra5272_defconfig index 7ae7ff3432f1b4c785c262a7a85122c3aa065d74..ff81f76b88e12940ff40d237ab2680eb23e66bd2 100644 --- a/configs/cobra5272_defconfig +++ b/configs/cobra5272_defconfig @@ -18,6 +18,30 @@ CONFIG_CMD_IMLS=y CONFIG_CMD_PING=y CONFIG_ENV_ADDR=0xFFE04000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xFFE00201 +CONFIG_SYS_OR0_PRELIM=0xFFE00014 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0x0 +CONFIG_SYS_OR1_PRELIM=0x0 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0x0 +CONFIG_SYS_OR2_PRELIM=0x0 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0x0 +CONFIG_SYS_OR3_PRELIM=0x0 +CONFIG_SYS_BR4_PRELIM_BOOL=y +CONFIG_SYS_BR4_PRELIM=0x0 +CONFIG_SYS_OR4_PRELIM=0x0 +CONFIG_SYS_BR5_PRELIM_BOOL=y +CONFIG_SYS_BR5_PRELIM=0x0 +CONFIG_SYS_OR5_PRELIM=0x0 +CONFIG_SYS_BR6_PRELIM_BOOL=y +CONFIG_SYS_BR6_PRELIM=0x0 +CONFIG_SYS_OR6_PRELIM=0x0 +CONFIG_SYS_BR7_PRELIM_BOOL=y +CONFIG_SYS_BR7_PRELIM=0x701 +CONFIG_SYS_OR7_PRELIM=0xFF00007C CONFIG_MTD_NOR_FLASH=y CONFIG_DM_ETH=y CONFIG_MCFFEC=y diff --git a/configs/colibri-imx6ull-emmc_defconfig b/configs/colibri-imx6ull-emmc_defconfig index 4b346a987938bd26647e4ae2404cbecc4762a801..6374be32705d5d1999189cf029be23ad75bc5b5f 100644 --- a/configs/colibri-imx6ull-emmc_defconfig +++ b/configs/colibri-imx6ull-emmc_defconfig @@ -14,7 +14,6 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6ull-colibri-emmc" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=1 -# CONFIG_USE_BOOTCOMMAND is not set CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="setenv fdtfile imx6ull-colibri${variant}-${fdt_board}.dtb" # CONFIG_CONSOLE_MUX is not set @@ -80,6 +79,7 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_SPLASH_SCREEN=y CONFIG_SPLASH_SCREEN_ALIGN=y diff --git a/configs/colibri-imx6ull_defconfig b/configs/colibri-imx6ull_defconfig index 7d15b7b58bf37271bd920c46792b35c6cdcbe221..21b0aee26ae6a6bd2cea28e5b4cf1ba6190c07f7 100644 --- a/configs/colibri-imx6ull_defconfig +++ b/configs/colibri-imx6ull_defconfig @@ -15,7 +15,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6ull-colibri" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=1 -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run ubiboot || run distro_bootcmd;" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="setenv fdtfile imx6ull-colibri${variant}-${fdt_board}.dtb" # CONFIG_CONSOLE_MUX is not set @@ -95,6 +95,7 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_MXS=y CONFIG_SPLASH_SCREEN=y diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 1f3c0f17d0ca5f12716fc14cbbc8d5249e506b4d..683a8e1dc1ef7941a16645b722aa4aa8fc4e1fa9 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -26,6 +26,7 @@ CONFIG_CMD_HDMIDETECT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=1 +CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y @@ -103,6 +104,7 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y # CONFIG_VIDEO_BPP8 is not set # CONFIG_VIDEO_BPP32 is not set CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig index 129f625acabb9ea94c076f27ee179af86428cd51..da0d06bdc80f6238057cde509e18e378ed72821b 100644 --- a/configs/colibri_imx7_defconfig +++ b/configs/colibri_imx7_defconfig @@ -14,7 +14,7 @@ CONFIG_IMX_BOOTAUX=y CONFIG_IMX_HAB=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=1 -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run ubiboot ; echo ; echo ubiboot failed ; run distro_bootcmd;" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="setenv fdtfile ${soc}-colibri-${fdt_board}.dtb " # CONFIG_CONSOLE_MUX is not set @@ -91,6 +91,7 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_MXS=y CONFIG_SPLASH_SCREEN=y diff --git a/configs/colibri_imx7_emmc_defconfig b/configs/colibri_imx7_emmc_defconfig index c06ef33eb0bdd62dfc4b651792c3158af7ee087f..a8080a3d6ca2050b9fa9d34827c0b9e965e3f87c 100644 --- a/configs/colibri_imx7_emmc_defconfig +++ b/configs/colibri_imx7_emmc_defconfig @@ -16,7 +16,6 @@ CONFIG_IMX_HAB=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=1 -# CONFIG_USE_BOOTCOMMAND is not set CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="setenv fdtfile ${soc}-colibri-emmc-${fdt_board}.dtb" # CONFIG_CONSOLE_MUX is not set @@ -85,6 +84,7 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 CONFIG_CI_UDC=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_SPLASH_SCREEN=y CONFIG_SPLASH_SCREEN_ALIGN=y diff --git a/configs/colibri_pxa270_defconfig b/configs/colibri_pxa270_defconfig index ee5b31d3ed72dd8353bcd4e591eb23a921d38431..f13170c09e3be214af2f0d392b2273960940e0fc 100644 --- a/configs/colibri_pxa270_defconfig +++ b/configs/colibri_pxa270_defconfig @@ -12,6 +12,8 @@ CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_SYS_LOAD_ADDR=0xa0000000 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=tty0 console=ttyS0,115200" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="if fatload mmc 0 0xa0000000 uImage; then bootm 0xa0000000; fi; if usb reset && fatload usb 0 0xa0000000 uImage; then bootm 0xa0000000; fi; bootm 0xc0000;" CONFIG_SYS_DEVICE_NULLDEV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig index 88ee270a32288c3ae6d659a76249c0d2b3f4d1cb..b883fc105f54829b40c9f002f2c95706ea315451 100644 --- a/configs/colibri_t20_defconfig +++ b/configs/colibri_t20_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_SYS_MALLOC_F_LEN=0x2000 @@ -21,7 +22,6 @@ CONFIG_SYS_PROMPT="Colibri T20 # " CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y -CONFIG_CMD_NAND=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_NFS is not set @@ -48,6 +48,7 @@ CONFIG_SYS_I2C_TEGRA=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_TEGRA_NAND=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_MTD_UBI_FASTMAP=y CONFIG_DM_PMIC=y diff --git a/configs/colibri_t30_defconfig b/configs/colibri_t30_defconfig index 3c37341932ebd04aa7624af2f6dc34f5435bf190..abbc0662baee8d975fec1ea7effacd6dac709b95 100644 --- a/configs/colibri_t30_defconfig +++ b/configs/colibri_t30_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig index 4306ff485e9f76058e3a56e529f2f25681e54ce1..350e1cf30e4e2445f8db6a391c5a3142f1a812fc 100644 --- a/configs/colibri_vf_defconfig +++ b/configs/colibri_vf_defconfig @@ -16,6 +16,8 @@ CONFIG_TARGET_COLIBRI_VF=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_SYS_LOAD_ADDR=0x80008000 CONFIG_BOOTDELAY=1 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run ubiboot || run distro_bootcmd;" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="setenv fdtfile ${soc}-colibri-${fdt_board}.dtb" CONFIG_LOGLEVEL=3 @@ -97,6 +99,7 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y # CONFIG_VIDEO_BPP8 is not set # CONFIG_VIDEO_BPP16 is not set CONFIG_VIDEO_FSL_DCU_FB=y diff --git a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig index f4ee9fee61a481013d604f1b03b6b5b49b6f1bad..d35221c18319f97f22e07b54b141194df83e1a20 100644 --- a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig +++ b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig @@ -26,6 +26,8 @@ CONFIG_BOOTSTAGE_REPORT=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sda2 ro quiet" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="load scsi 0:2 03000000 /boot/vmlinuz-${kernel-ver}-generic;load scsi 0:2 04000000 /boot/initrd.img-${kernel-ver}-generic;run boot" CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/conga-qeval20-qa3-e3845_defconfig b/configs/conga-qeval20-qa3-e3845_defconfig index 203306d51dc2a2bb77354fb82a16cb14f2079e55..98015a8e12f03d788a17bf20e6e125a6d850ea88 100644 --- a/configs/conga-qeval20-qa3-e3845_defconfig +++ b/configs/conga-qeval20-qa3-e3845_defconfig @@ -22,6 +22,8 @@ CONFIG_BOOTSTAGE_REPORT=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sda2 ro quiet" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="load scsi 0:2 03000000 /boot/vmlinuz-${kernel-ver}-generic;load scsi 0:2 04000000 /boot/initrd.img-${kernel-ver}-generic;run boot" CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig index 13f093f3eff887e79b5325443924217733fd9fe5..d6844a48ac1bd1b016e3db73a6688ec11c204d7e 100644 --- a/configs/controlcenterdc_defconfig +++ b/configs/controlcenterdc_defconfig @@ -26,6 +26,8 @@ CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="if env exists keyprogram; then; setenv keyprogram; run nfsboot; fi; run dobootfail" CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -52,7 +54,6 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_OF_TRANSLATE=y diff --git a/configs/coreboot64_defconfig b/configs/coreboot64_defconfig index 799a83caa2f32a8f313af62e2549867351387ae6..8146569a9d038c9163e737d33e3d4fbfb49ddf30 100644 --- a/configs/coreboot64_defconfig +++ b/configs/coreboot64_defconfig @@ -13,6 +13,8 @@ CONFIG_FIT_SIGNATURE=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000" CONFIG_PRE_CONSOLE_BUFFER=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/coreboot_defconfig b/configs/coreboot_defconfig index 131de75d9295e252ff09f33683afca9422e313c1..a12e4cd41264579af64edd1b4defb49b0e362957 100644 --- a/configs/coreboot_defconfig +++ b/configs/coreboot_defconfig @@ -11,6 +11,8 @@ CONFIG_FIT_SIGNATURE=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000" CONFIG_PRE_CONSOLE_BUFFER=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/cortina_presidio-asic-base_defconfig b/configs/cortina_presidio-asic-base_defconfig index 426c3388b3ca3b23e73fee474a7bc4c36d7ede87..a6d7178a1b6fe805a0bac945e3a428ed70d03fdc 100644 --- a/configs/cortina_presidio-asic-base_defconfig +++ b/configs/cortina_presidio-asic-base_defconfig @@ -9,6 +9,7 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard" CONFIG_IDENT_STRING="Presidio-SoC" CONFIG_SYS_LOAD_ADDR=0x10000000 +CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/cortina_presidio-asic-emmc_defconfig b/configs/cortina_presidio-asic-emmc_defconfig index a96e251dc52e8e679b2ee244a36fe08c3129f52e..8ba4b6796c913bc5c761fa8ceaabb3cbb88061c3 100644 --- a/configs/cortina_presidio-asic-emmc_defconfig +++ b/configs/cortina_presidio-asic-emmc_defconfig @@ -9,6 +9,7 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard" CONFIG_IDENT_STRING="Presidio-SoC" CONFIG_SYS_LOAD_ADDR=0x10000000 +CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_R=y diff --git a/configs/cortina_presidio-asic-pnand_defconfig b/configs/cortina_presidio-asic-pnand_defconfig index 86947507efd578f4df4d9d59e2f5d8c33239d682..83e3aea1fd7d212a7c58d25c610dbf3502c3eb62 100644 --- a/configs/cortina_presidio-asic-pnand_defconfig +++ b/configs/cortina_presidio-asic-pnand_defconfig @@ -9,6 +9,7 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard" CONFIG_IDENT_STRING="Presidio-SoC" CONFIG_SYS_LOAD_ADDR=0x10000000 +CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig index 2f3803a05828025bfde374863202184386a2ab9e..d4481131087b2927da3b974c92eb9e81ded7a585 100644 --- a/configs/corvus_defconfig +++ b/configs/corvus_defconfig @@ -24,6 +24,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="nand read 0x70000000 0x200000 0x300000;bootm 0x70000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y @@ -59,6 +61,7 @@ CONFIG_AT91_GPIO=y # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT=y # CONFIG_SYS_NAND_USE_FLASH_BBT is not set CONFIG_NAND_ATMEL=y CONFIG_SYS_NAND_BLOCK_SIZE=0x20000 diff --git a/configs/cougarcanyon2_defconfig b/configs/cougarcanyon2_defconfig index b771a2a691e52bc953356011d61a7cad127c84b1..073807b1d0776c98f4039120c5326e1e5d7c4aec 100644 --- a/configs/cougarcanyon2_defconfig +++ b/configs/cougarcanyon2_defconfig @@ -15,6 +15,8 @@ CONFIG_GENERATE_MP_TABLE=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig index 58c370a98933e2d75ae71fa51377c52425d2743a..650d7686cf23c676fddecb8e4aadbde8a36ac61a 100644 --- a/configs/crownbay_defconfig +++ b/configs/crownbay_defconfig @@ -17,6 +17,8 @@ CONFIG_FIT=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y diff --git a/configs/crs305-1g-4s-bit_defconfig b/configs/crs305-1g-4s-bit_defconfig index bf6186030cffa853bc3228844a56f32d42f6f1ef..ff8f413810fd05599e0a88229f39fef87743c9d8 100644 --- a/configs/crs305-1g-4s-bit_defconfig +++ b/configs/crs305-1g-4s-bit_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y +CONFIG_SYS_KWD_CONFIG="board/mikrotik/crs3xx-98dx3236/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x00800000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_CRS3XX_98DX3236=y diff --git a/configs/crs305-1g-4s_defconfig b/configs/crs305-1g-4s_defconfig index 5fc805875bde5d3c467146533cdc917eaaa1f8f6..a71b6425ea5b32072f2dbf9bf77d3497d2d4c334 100644 --- a/configs/crs305-1g-4s_defconfig +++ b/configs/crs305-1g-4s_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y +CONFIG_SYS_KWD_CONFIG="board/mikrotik/crs3xx-98dx3236/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x00800000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_CRS3XX_98DX3236=y diff --git a/configs/crs326-24g-2s-bit_defconfig b/configs/crs326-24g-2s-bit_defconfig index 3de29490e89862e980e5b38e8c60a6b093857c4a..c0746be76427391de41e8155f996282a9fa31b2e 100644 --- a/configs/crs326-24g-2s-bit_defconfig +++ b/configs/crs326-24g-2s-bit_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y +CONFIG_SYS_KWD_CONFIG="board/mikrotik/crs3xx-98dx3236/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x00800000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_CRS3XX_98DX3236=y diff --git a/configs/crs326-24g-2s_defconfig b/configs/crs326-24g-2s_defconfig index 77296abfc9bfb06ee3a23994f0253182ded51982..344f1b08245390401f62848e57362793ef0c15d8 100644 --- a/configs/crs326-24g-2s_defconfig +++ b/configs/crs326-24g-2s_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y +CONFIG_SYS_KWD_CONFIG="board/mikrotik/crs3xx-98dx3236/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x00800000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_CRS3XX_98DX3236=y diff --git a/configs/crs328-4c-20s-4s-bit_defconfig b/configs/crs328-4c-20s-4s-bit_defconfig index 513cc52562edc40b57951771b083aad8c27e71d9..edfd0a4faf9322410c0c46780fa47831459d7a2c 100644 --- a/configs/crs328-4c-20s-4s-bit_defconfig +++ b/configs/crs328-4c-20s-4s-bit_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y +CONFIG_SYS_KWD_CONFIG="board/mikrotik/crs3xx-98dx3236/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x00800000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_CRS3XX_98DX3236=y diff --git a/configs/crs328-4c-20s-4s_defconfig b/configs/crs328-4c-20s-4s_defconfig index dd0cd63b90c84b93aad73947d20f8c027969b86b..d6f93534dd9dbd653c92730a0e9cd6ed15ae7dda 100644 --- a/configs/crs328-4c-20s-4s_defconfig +++ b/configs/crs328-4c-20s-4s_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y +CONFIG_SYS_KWD_CONFIG="board/mikrotik/crs3xx-98dx3236/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x00800000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_CRS3XX_98DX3236=y diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig index d32a9affe52d9e6d30eb91b49805949ca537235b..a856202d110e6a7d91eb44f98fabca550fceb73a 100644 --- a/configs/d2net_v2_defconfig +++ b/configs/d2net_v2_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/LaCie/net2big_v2/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_NET2BIG_V2=y @@ -13,10 +14,11 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-d2net" CONFIG_IDENT_STRING=" D2 v2" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_SYS_EXTRA_OPTIONS="D2NET_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="dhcp && run netconsole; if run usbload || run diskload; then bootm; fi" CONFIG_USE_PREBOOT=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -40,12 +42,12 @@ CONFIG_EFI_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_ENV_ADDR=0x70000 CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_SATA_MV=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x0 diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index 33d1cf3f9e3a0778146be46d00b10efd70584819..0c276775470e77544d4e8949b588471586c21cc8 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -24,7 +24,10 @@ CONFIG_SPL_SPI=y CONFIG_LTO=y CONFIG_SYS_LOAD_ADDR=0xc0700000 CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run envboot; run mmcboot; " CONFIG_DEFAULT_FDT_FILE="da850-evm.dtb" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig index 21ac042bc940206f82366feae1d756e23b6950e1..694e17c1847933966932b89e667a9307bec8bc35 100644 --- a/configs/da850evm_direct_nor_defconfig +++ b/configs/da850evm_direct_nor_defconfig @@ -15,9 +15,12 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="da850-evm" CONFIG_LTO=y CONFIG_SYS_LOAD_ADDR=0xc0700000 +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run envboot; run mmcboot; " # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig index aef30ae2679b3c891e13631c44b81c8e787d61ca..aeb9c35b5dcf1f198e54a881d8883409d7c43ba2 100644 --- a/configs/da850evm_nand_defconfig +++ b/configs/da850evm_nand_defconfig @@ -22,7 +22,10 @@ CONFIG_SPL_SPI=y CONFIG_LTO=y CONFIG_SYS_LOAD_ADDR=0xc0700000 CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run envboot; run mmcboot; " CONFIG_DEFAULT_FDT_FILE="da850-evm.dtb" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig index 399cecb947e37be7c436aa8a37d31e79cd380f72..03f938455edad3b5ecb5da0ab7cf5680fb106c31 100644 --- a/configs/dalmore_defconfig +++ b/configs/dalmore_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_SYS_MALLOC_LEN=0x2500000 diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig index dfc27ba48b8de16a1c22e644696305be4c346808..32a7349993cab9ef155851c54705b43f2dfaf01c 100644 --- a/configs/db-88f6720_defconfig +++ b/configs/db-88f6720_defconfig @@ -41,7 +41,6 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y # CONFIG_DOS_PARTITION is not set CONFIG_ENV_OVERWRITE=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig index 54edfff4bdd149b73e4c6f1d10ef2aa4670092e4..9c54e7fe8048d1a2147dd2e45b495872318bca6c 100644 --- a/configs/db-88f6820-amc_defconfig +++ b/configs/db-88f6820-amc_defconfig @@ -45,7 +45,6 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_EFI_PARTITION=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_OVERWRITE=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_OF_TRANSLATE=y diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig index 8435f155fd651d39401b9e8b7cf0185b3330d25a..90fd8e82988eb7434f11386fe6fc423812117227 100644 --- a/configs/db-88f6820-gp_defconfig +++ b/configs/db-88f6820-gp_defconfig @@ -44,7 +44,6 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_EFI_PARTITION=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_OVERWRITE=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_OF_TRANSLATE=y diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig index b82b637c23d500b9ace6c3a84f021a89dd0aeeff..3d0b06fbc61bc7df542be5bf3a2186161c859e47 100644 --- a/configs/db-mv784mp-gp_defconfig +++ b/configs/db-mv784mp-gp_defconfig @@ -45,15 +45,12 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_EFI_PARTITION=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_OVERWRITE=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_SATA_MV=y -CONFIG_SYS_I2C_LEGACY=y -CONFIG_SPL_SYS_I2C_LEGACY=y +CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y -CONFIG_SYS_I2C_SLAVE=0x0 # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/db-xc3-24g4xg_defconfig b/configs/db-xc3-24g4xg_defconfig index b2ee2c284313d7022908c8e393a7293f74e12ea8..3c0b045a21fa737d905b7254e490bde3344b440a 100644 --- a/configs/db-xc3-24g4xg_defconfig +++ b/configs/db-xc3-24g4xg_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y +CONFIG_SYS_KWD_CONFIG="board/Marvell/db-xc3-24g4xg/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x00800000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SYS_MEMTEST_START=0x00800000 diff --git a/configs/deneb_defconfig b/configs/deneb_defconfig index c51d6a3aa7db9065e8eef96c844391e0ac073ddf..572d7443d69413897bc6fc7bcc5baa8169b4b61a 100644 --- a/configs/deneb_defconfig +++ b/configs/deneb_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x2000 +CONFIG_IDENT_STRING=" ##v01.06" CONFIG_SPL_LOAD_IMX_CONTAINER=y CONFIG_IMX_CONTAINER_CFG="board/siemens/capricorn/uboot-container.cfg" CONFIG_SYS_LOAD_ADDR=0x80280000 @@ -28,11 +29,15 @@ CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"\" to stop\n" CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" CONFIG_AUTOBOOT_KEYED_CTRLC=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="if usrbutton; then run flash_self_test; reset; fi;run flash_self;reset;" CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig index 47f730cf9c18b1e669fdb24bf8156d4dafdf1027..af17900a78924d4a39f8831b87711df93f6bb888 100644 --- a/configs/devkit3250_defconfig +++ b/configs/devkit3250_defconfig @@ -18,6 +18,8 @@ CONFIG_SYS_LOAD_ADDR=0x80008000 CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="dhcp; tftp ${loadaddr} ${serverip}:${tftpdir}/${bootfile}; tftp ${dtbaddr} ${serverip}:${tftpdir}/devkit3250.dtb; setenv nfsargs ip=dhcp root=/dev/nfs nfsroot=${serverip}:${nfsroot},tcp; setenv bootargs ${bootargs} ${nfsargs} ${userargs}; bootm ${loadaddr} - ${dtbaddr}" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_BOARD_INIT=y @@ -41,6 +43,7 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y CONFIG_DMA_LPC32XX=y +CONFIG_LPC32XX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_LPC32XX=y diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index 19ceae14ad6c34c940a5edcbed8dae709568b280..4034f9ca751244eeae1089ae7922e0a012f49bbd 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -7,7 +7,7 @@ CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_DEVKIT8000=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run autoboot" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y @@ -27,6 +27,9 @@ CONFIG_CMD_NAND_LOCK_UNLOCK=y CONFIG_BOOTP_DNS2=y CONFIG_BOOTP_NTPSERVER=y CONFIG_CMD_JFFS2=y +CONFIG_JFFS2_DEV="nand0" +CONFIG_JFFS2_PART_OFFSET=0x680000 +CONFIG_JFFS2_PART_SIZE=0xF980000 CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=nand:512k(x-loader),1920k(u-boot),128k(u-boot-env),4m(kernel),-(fs)" @@ -50,4 +53,5 @@ CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000 CONFIG_CONS_INDEX=3 +CONFIG_JFFS2_NAND=y CONFIG_OF_LIBFDT=y diff --git a/configs/dfi-bt700-q7x-151_defconfig b/configs/dfi-bt700-q7x-151_defconfig index 268fbfee7b739f6cbb1c6ce2cd41c6b9bb7c7b3e..3af6c043edc7fb9adb08f7c2107556337d80519f 100644 --- a/configs/dfi-bt700-q7x-151_defconfig +++ b/configs/dfi-bt700-q7x-151_defconfig @@ -21,6 +21,8 @@ CONFIG_BOOTSTAGE_REPORT=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sda1 ro quiet" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="load scsi 0:1 03000000 /boot/vmlinuz-${kernel-ver}-generic;load scsi 0:1 04000000 /boot/initrd.img-${kernel-ver}-generic;run boot" CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index 1f63bc8467dfb0caf7921c631d501765988ca37d..d62bd961decc2f3509040954277816ae7755f561 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -37,7 +37,6 @@ CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x11400 -CONFIG_SPL_WATCHDOG=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_UNZIP=y CONFIG_CMD_DFU=y diff --git a/configs/display5_defconfig b/configs/display5_defconfig index e68fae72e6d79d0c44edc202afe7749e38f0547c..26af4a6bfee3195bf83654e58ac3417a5661d927 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -33,6 +33,8 @@ CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="if run check_em_pad; then run recovery;else if test ${BOOT_FROM} = FACTORY; then run factory_nfs;else run boot_mmc;fi;fi" CONFIG_MISC_INIT_R=y CONFIG_SPL_BOOTCOUNT_LIMIT=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set @@ -43,7 +45,6 @@ CONFIG_SPL_I2C=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 -CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="display5 > " CONFIG_CMD_BOOTZ=y diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig index e0b36f4cdbfa39768f87cb35fee471c514e7e6ac..218a33d9a02bfec89f2e975012c7b466d0130f49 100644 --- a/configs/display5_factory_defconfig +++ b/configs/display5_factory_defconfig @@ -43,7 +43,6 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y -CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="display5 factory > " CONFIG_CMD_BOOTZ=y diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig index c6598f7b7a3c8a234d7dae96bd7f186ca2439c56..144fd30706b5bff03a044a549abf6f82394fa64a 100644 --- a/configs/dns325_defconfig +++ b/configs/dns325_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/d-link/dns325/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=1 CONFIG_TARGET_DNS325=y @@ -13,6 +14,8 @@ CONFIG_IDENT_STRING="\nD-Link DNS-325" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="if test -n ${bootenv} && usb start; then if run loadbootenv; then echo Loaded environment ${bootenv} from usb;run importbootenv;fi;if test -n ${bootenvcmd}; then echo Running bootenvcmd ...;run bootenvcmd;fi;fi;run setnandbootenv subbootcmd;" CONFIG_USE_PREBOOT=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -38,6 +41,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_NETCONSOLE=y CONFIG_DM=y +CONFIG_KIRKWOOD_GPIO=y # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig index d82dfd02697684ea08ae4de0760b065c20ff97b1..6c89a9a6fb219f3da372a35e9b4216a4f76b2e10 100644 --- a/configs/dockstar_defconfig +++ b/configs/dockstar_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/Seagate/dockstar/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_DOCKSTAR=y @@ -13,6 +14,8 @@ CONFIG_IDENT_STRING="\nSeagate FreeAgent DockStar" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_root}; ubi part root; ubifsmount ubi:root; ubifsload 0x800000 ${kernel}; ubifsload 0x1100000 ${initrd}; bootm 0x800000 0x1100000" CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="DockStar> " diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 1826b116c00468138ddf1e1961f37e648de17290..d1aa91d676e11a13bf8e7ec8a60d77e73be7dcb6 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -22,7 +22,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS0,115200 androidboot.console=ttyS0 androidboot.hardware=jacinto6evmboard" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="if test ${dofastboot} -eq 1; then echo Boot fastboot requested, resetting dofastboot ...;setenv dofastboot 0; saveenv;echo Booting into fastboot ...; fastboot 1;fi;if test ${boot_fit} -eq 1; then run update_to_fit;fi;run findfdt; run finduuid; run distro_bootcmd;run emmc_android_boot; " CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_MISC_INIT_R is not set diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index a74d0fb79e62541d02de532bef7263f07a3f59aa..db8716e2d156ed737ec9be1cbc1641b6ba54df2e 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -27,7 +27,7 @@ CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS0,115200 androidboot.console=ttyS0 androidboot.hardware=jacinto6evmboard" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="if test ${dofastboot} -eq 1; then echo Boot fastboot requested, resetting dofastboot ...;setenv dofastboot 0; saveenv;echo Booting into fastboot ...; fastboot 1;fi;if test ${boot_fit} -eq 1; then run update_to_fit;fi;run findfdt; run finduuid; run distro_bootcmd;run emmc_android_boot; " CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_MISC_INIT_R is not set diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig index fc941b4f0eb8fcf167881a080f5fa7cb571e1fa9..169b57004828bac0522b64573ec5e50ed768c72d 100644 --- a/configs/dra7xx_hs_evm_usb_defconfig +++ b/configs/dra7xx_hs_evm_usb_defconfig @@ -29,7 +29,7 @@ CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS0,115200 androidboot.console=ttyS0 androidboot.hardware=jacinto6evmboard" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="if test ${dofastboot} -eq 1; then echo Boot fastboot requested, resetting dofastboot ...;setenv dofastboot 0; saveenv;echo Booting into fastboot ...; fastboot 1;fi;if test ${boot_fit} -eq 1; then run update_to_fit;fi;run findfdt; run finduuid; run distro_bootcmd;run emmc_android_boot; " CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_MISC_INIT_R is not set diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig index c112389c5e270a8b49265ece5becf47c97a80c94..557013dbacd1b40d4af0f4401998b5d19f91163a 100644 --- a/configs/dreamplug_defconfig +++ b/configs/dreamplug_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/Marvell/dreamplug/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_DREAMPLUG=y @@ -14,6 +15,8 @@ CONFIG_IDENT_STRING="\nMarvell-DreamPlug" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv ethact ethernet-controller@72000; ${x_bootcmd_ethernet}; setenv ethact ethernet-controller@76000; ${x_bootcmd_ethernet}; ${x_bootcmd_usb}; ${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_bootargs_root}; bootm 0x6400000;" CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y @@ -32,7 +35,6 @@ CONFIG_ISO_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_ENV_ADDR=0x100000 CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/ds109_defconfig b/configs/ds109_defconfig index d7e865111f4d9b3060414ed9c6d4a007220ea9b7..8e2aea9ad624ff42d454f0c263565a2086bd553a 100644 --- a/configs/ds109_defconfig +++ b/configs/ds109_defconfig @@ -8,6 +8,7 @@ CONFIG_CMDLINE_TAG=y CONFIG_INITRD_TAG=y CONFIG_STATIC_MACH_TYPE=y CONFIG_MACH_TYPE=527 +CONFIG_SYS_KWD_CONFIG="board/Synology/ds109/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_DS109=y @@ -17,6 +18,8 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ds109" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv ethact egiga0; ${x_bootcmd_ethernet}; ${x_bootcmd_usb}; ${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_bootargs_root}; bootm 0x6400000;" CONFIG_USE_PREBOOT=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_FLASH is not set @@ -32,7 +35,6 @@ CONFIG_ISO_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_ENV_ADDR=0x3D0000 CONFIG_NETCONSOLE=y diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig index 4b867bcbe642dbf09a5bb95a76ee554e06675ed0..d33246786cc5d1e5edce4745e424481137a1301f 100644 --- a/configs/ds414_defconfig +++ b/configs/ds414_defconfig @@ -27,6 +27,8 @@ CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 ip=off initrd=0x8000040,8M root=/dev/md0 rw syno_hw_version=DS414r1 ihd_num=4 netif_num=2 flash_size=8 SataLedSpecial=1 HddHotplug=1" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe; sf read ${loadaddr} 0xd0000 0x2d0000; sf read ${ramdisk_addr_r} 0x3a0000 0x430000; bootm ${loadaddr} ${ramdisk_addr_r}" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y @@ -49,14 +51,11 @@ CONFIG_CMD_MTDPARTS=y CONFIG_CMD_UBI=y CONFIG_ISO_PARTITION=y CONFIG_ENV_OVERWRITE=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_OF_TRANSLATE=y -CONFIG_SYS_I2C_LEGACY=y -CONFIG_SPL_SYS_I2C_LEGACY=y +CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y -CONFIG_SYS_I2C_SLAVE=0x0 # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/durian_defconfig b/configs/durian_defconfig index 158fec2dc432cae283ed2e83d25686eee0a9b795..b44fd90df53c2f1b5a988a8f1c935c5a7372e1c4 100644 --- a/configs/durian_defconfig +++ b/configs/durian_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="phytium-durian" # CONFIG_PSCI_RESET is not set +CONFIG_SYS_PCI_64BIT=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x90000000 diff --git a/configs/eb_cpu5282_defconfig b/configs/eb_cpu5282_defconfig index 5b372e12b6e93d5f5ae9dcd64b7e46f19bd94cc1..f6954291e0c4f9b500a14fd1d4cc0ba2344d7b2b 100644 --- a/configs/eb_cpu5282_defconfig +++ b/configs/eb_cpu5282_defconfig @@ -7,6 +7,8 @@ CONFIG_TARGET_EB_CPU5282=y CONFIG_SYS_LOAD_ADDR=0x20000 CONFIG_SYS_EXTRA_OPTIONS="SYS_MONITOR_BASE=0xFF000400" CONFIG_BOOTDELAY=5 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="printenv" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/eb_cpu5282_internal_defconfig b/configs/eb_cpu5282_internal_defconfig index ad0f6f821b930ee53a6eb098268eb84177b8ec34..0c00ead852404e1c468aaed6dfcd070035563034 100644 --- a/configs/eb_cpu5282_internal_defconfig +++ b/configs/eb_cpu5282_internal_defconfig @@ -7,6 +7,8 @@ CONFIG_TARGET_EB_CPU5282=y CONFIG_SYS_LOAD_ADDR=0x20000 CONFIG_SYS_EXTRA_OPTIONS="SYS_MONITOR_BASE=0xF0000418" CONFIG_BOOTDELAY=5 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="printenv" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/efi-x86_app32_defconfig b/configs/efi-x86_app32_defconfig index 480ef648eaa6197a461c56ab2fd45e31ec636471..bb4c4050223ad39e582fc85d934d0973137b536b 100644 --- a/configs/efi-x86_app32_defconfig +++ b/configs/efi-x86_app32_defconfig @@ -11,6 +11,8 @@ CONFIG_FIT=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y diff --git a/configs/efi-x86_app64_defconfig b/configs/efi-x86_app64_defconfig index bffbf6958a2f7421bbfa67aa19f09a7c7eef6e25..3a2e7896339bc171f9a12bbd1acac7d1aaa18231 100644 --- a/configs/efi-x86_app64_defconfig +++ b/configs/efi-x86_app64_defconfig @@ -11,6 +11,8 @@ CONFIG_FIT=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y diff --git a/configs/efi-x86_payload32_defconfig b/configs/efi-x86_payload32_defconfig index 4f1d6a9198926489ab299de6c1280b301ac9ea57..d7be9579cce7b7822f4c323ec501f85d3dc6fa76 100644 --- a/configs/efi-x86_payload32_defconfig +++ b/configs/efi-x86_payload32_defconfig @@ -10,6 +10,8 @@ CONFIG_FIT_SIGNATURE=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000" CONFIG_PRE_CONSOLE_BUFFER=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/efi-x86_payload64_defconfig b/configs/efi-x86_payload64_defconfig index 26cfc4949001d2ea640d34bf08d03067ce6a51c4..36dd0647c23d658e6dfe99af9fa8c8c696f744c9 100644 --- a/configs/efi-x86_payload64_defconfig +++ b/configs/efi-x86_payload64_defconfig @@ -10,6 +10,8 @@ CONFIG_FIT_SIGNATURE=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000" CONFIG_PRE_CONSOLE_BUFFER=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/elgin-rv1108_defconfig b/configs/elgin-rv1108_defconfig index ee5bfddc438380f71c8c495904ffb6778b2d8594..e600978f5702db3f0ecfb74b8ce77b4115d70879 100644 --- a/configs/elgin-rv1108_defconfig +++ b/configs/elgin-rv1108_defconfig @@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rv1108-elgin-r1" CONFIG_ROCKCHIP_RV1108=y CONFIG_ROCKCHIP_BOOT_MODE_REG=0 CONFIG_TARGET_ELGIN_RV1108=y +# CONFIG_DEBUG_UART_BOARD_INIT is not set CONFIG_DEBUG_UART_BASE=0x10210000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig index 1cf38b8d77b1e8622fa0a8acbf0ebcbc38aabfa1..1821b23ed5f2f5cb8de05371688d059b52f84139 100644 --- a/configs/ethernut5_defconfig +++ b/configs/ethernut5_defconfig @@ -17,6 +17,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x22000000 0xc6000 0x294000; bootm 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set @@ -52,7 +54,6 @@ CONFIG_CMD_REISER=y CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y @@ -62,6 +63,7 @@ CONFIG_AT91_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_SOFT=y CONFIG_SYS_I2C_SOFT_SLAVE=0 +CONFIG_GENERIC_ATMEL_MCI=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_RAW_NAND=y @@ -79,3 +81,4 @@ CONFIG_ATMEL_USART=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_USB=y +CONFIG_JFFS2_NAND=y diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index 5f00d6a944a696611ad05318120d14203bb3a72c..ebdc06b35afeb5796f3b3903eb3a0ebee10a7576 100644 --- a/configs/evb-ast2600_defconfig +++ b/configs/evb-ast2600_defconfig @@ -1,7 +1,8 @@ CONFIG_ARM=y CONFIG_SYS_DCACHE_OFF=y +CONFIG_SPL_SYS_THUMB_BUILD=y CONFIG_ARCH_ASPEED=y -CONFIG_SYS_TEXT_BASE=0x10000 +CONFIG_SYS_TEXT_BASE=0x80000000 CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SYS_MALLOC_F_LEN=0x800 CONFIG_ASPEED_AST2600=y @@ -12,22 +13,28 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="ast2600-evb" CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK_R_ADDR=0x83000000 CONFIG_SPL_SIZE_LIMIT=0x10000 CONFIG_SPL=y # CONFIG_ARMV7_NONSEC is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SYS_LOAD_ADDR=0x83000000 CONFIG_FIT=y -# CONFIG_LEGACY_IMAGE_FORMAT is not set +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_LOAD_FIT_ADDRESS=0x10000 +# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS4,115200n8 root=/dev/ram rw" CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="bootm 20100000" +CONFIG_BOOTCOMMAND="run bootspi" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y -# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000000 +CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y @@ -47,6 +54,9 @@ CONFIG_REGMAP=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_CLK=y CONFIG_SPL_CLK=y +CONFIG_DM_HASH=y +CONFIG_HASH_ASPEED=y +CONFIG_ASPEED_ACRY=y CONFIG_DM_I2C=y CONFIG_MISC=y CONFIG_SPL_MISC=y @@ -65,5 +75,7 @@ CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y CONFIG_WDT=y +CONFIG_SHA384=y CONFIG_HEXDUMP=y # CONFIG_EFI_LOADER is not set +CONFIG_PHANDLE_CHECK_SEQ=y diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig index 9488fc040acddb673aceb96d6c762bd6c8bcbf68..7d7e7f469ab47c89202a7e47da7f39686c723e36 100644 --- a/configs/evb-px30_defconfig +++ b/configs/evb-px30_defconfig @@ -68,6 +68,7 @@ CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y CONFIG_ROCKCHIP_OTP=y +CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PHY_REALTEK=y diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig index ce44c3602b50439d0115f10e27b14c1e78a24374..f94e5cbd61512ed191b7e35ae58089a2703a56dd 100644 --- a/configs/evb-rk3036_defconfig +++ b/configs/evb-rk3036_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_ARCH_TIMER=y # CONFIG_SPL_USE_ARCH_MEMCPY is not set # CONFIG_SPL_USE_ARCH_MEMSET is not set CONFIG_ARCH_ROCKCHIP=y diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig index e446a226415ce46a4d5d6c0bb38a009901a1fa3a..c2f15f18308642447461e8238dc7498aa2b5a411 100644 --- a/configs/evb-rk3128_defconfig +++ b/configs/evb-rk3128_defconfig @@ -1,11 +1,13 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x60000000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_OFFSET=0x0 CONFIG_DEFAULT_DEVICE_TREE="rk3128-evb" CONFIG_ROCKCHIP_RK3128=y +# CONFIG_DEBUG_UART_BOARD_INIT is not set CONFIG_DEBUG_UART_BASE=0x20068000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig index a8b1c42ac6ec2b073c3260a51393104e7a2ce478..5dc6d9577e6c95ee71ec41feb4c5d83ece42b94e 100644 --- a/configs/evb-rk3229_defconfig +++ b/configs/evb-rk3229_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y CONFIG_TPL_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x61000000 CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index eca9f5c54dfca84cc60d7613511b6f03a0253d6c..97d4c14f659f2638b56a1e2428b98fad755b8ac8 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y +CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig index 3194a2bb62dd904b901429d50b6526f9545fa001..a3a319f4c247a8a9107c8d5151d758b6dea5b979 100644 --- a/configs/evb-rk3308_defconfig +++ b/configs/evb-rk3308_defconfig @@ -49,6 +49,7 @@ CONFIG_CLK=y # CONFIG_USB_FUNCTION_FASTBOOT is not set CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_DM_ETH=y diff --git a/configs/evb-rk3568_defconfig b/configs/evb-rk3568_defconfig index 17664e12cb9275ef2964ad27b7411ccaf04b08c6..b07bcf963a2908dc3b453026433db1441080bef4 100644 --- a/configs/evb-rk3568_defconfig +++ b/configs/evb-rk3568_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_CLK=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig index 916a6fb8510fa2bf06d0a67fe259cf858a43046b..06ad04b921b2d22db0c8b122f930695139321dd3 100644 --- a/configs/evb-rv1108_defconfig +++ b/configs/evb-rv1108_defconfig @@ -5,11 +5,12 @@ CONFIG_SYS_TEXT_BASE=0x60000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb" CONFIG_ROCKCHIP_RV1108=y +# CONFIG_DEBUG_UART_BOARD_INIT is not set CONFIG_DEBUG_UART_BASE=0x10210000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x62000000 -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="sf probe;sf read 0x62000000 0x140800 0x500000;dcache off;go 0x62000000" CONFIG_DEFAULT_FDT_FILE="rv1108-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/firefly-px30_defconfig b/configs/firefly-px30_defconfig index 7207028403bd8a0f274f7f75addc16c07e805963..0a84ccef2678bb8f5298bb84a17f8e995486ac20 100644 --- a/configs/firefly-px30_defconfig +++ b/configs/firefly-px30_defconfig @@ -69,6 +69,7 @@ CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y CONFIG_ROCKCHIP_OTP=y +CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PHY_REALTEK=y diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 057e9095f0509edf8b9afce4aaf78ddc2bf87534..2f722082a3816c58bb4cc53888fc2f450e759b51 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y +CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig index 60e3c5620b1fdc56c20a476afb8c08717b4b4baa..eaa90219b240d395dffacab01add6acccbebab2f 100644 --- a/configs/galileo_defconfig +++ b/configs/galileo_defconfig @@ -14,6 +14,8 @@ CONFIG_FIT=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig index 396b2d9ab2a760d42434cd3a5b653a8cba11830c..97ed6709b3f0e35fed5ed97f3589169dc4c180bc 100644 --- a/configs/gardena-smart-gateway-at91sam_defconfig +++ b/configs/gardena-smart-gateway-at91sam_defconfig @@ -11,7 +11,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x0 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g25-gardena-smart-gateway" diff --git a/configs/gardena-smart-gateway-mt7688_defconfig b/configs/gardena-smart-gateway-mt7688_defconfig index 36d68f8b517e7f8266779c45629e718344e910c4..2bd302f76be0e9c2b5cf5fca82f7e3ad8a2a2723 100644 --- a/configs/gardena-smart-gateway-mt7688_defconfig +++ b/configs/gardena-smart-gateway-mt7688_defconfig @@ -4,7 +4,6 @@ CONFIG_SYS_MALLOC_LEN=0x1000000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x0 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0xA0000 CONFIG_ENV_SECT_SIZE=0x10000 diff --git a/configs/gazerbeam_defconfig b/configs/gazerbeam_defconfig index 8232340023d6f5c901b7122c34f7afb97e06a453..5d8d1998d620db2d61acbd14cbb1f85ab8fc9e8d 100644 --- a/configs/gazerbeam_defconfig +++ b/configs/gazerbeam_defconfig @@ -119,6 +119,8 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=5 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/mmcblk0p3 rw rootwait console=$consoledev,$baudrate $othbootargs;ext2load mmc 0:2 ${kernel_addr} $bootfile;ext2load mmc 0:2 ${fdt_addr} $fdtfile;bootm ${kernel_addr} - ${fdt_addr}" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_CPUINFO=y @@ -158,6 +160,15 @@ CONFIG_CLK=y CONFIG_ICS8N3QV01=y CONFIG_CPU=y CONFIG_CPU_MPC83XX=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xFE001001 +CONFIG_SYS_OR0_PRELIM=0xFF800FF6 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xE0601001 +CONFIG_SYS_OR1_PRELIM=0xFFF00850 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xE0701001 +CONFIG_SYS_OR2_PRELIM=0xFFF00850 CONFIG_DM_PCA953X=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y diff --git a/configs/ge_b1x5v2_defconfig b/configs/ge_b1x5v2_defconfig index e4bd0f8114c3a3e654c546ba2d9fea0b26c4d468..a1cf676f3f576e5333502d7d751da93f8490574b 100644 --- a/configs/ge_b1x5v2_defconfig +++ b/configs/ge_b1x5v2_defconfig @@ -29,6 +29,8 @@ CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=1 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run tryboot;" CONFIG_DEFAULT_FDT_FILE="imx6dl-b1x5v2.dtb" CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_LOG_MAX_LEVEL=8 diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index 21cb0f3a5972516bc84e7c9b7f9553fe38917292..8cfe772f4ed63305c935a69607dd132c0f5b093b 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -15,6 +15,8 @@ CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=1 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run doquiet; run tryboot" CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/giedi_defconfig b/configs/giedi_defconfig index d27278ea940b1582cf15ad9a84fee8274ce8f866..a106b89fabd0ad1c7f86799d485e5a25116c2a95 100644 --- a/configs/giedi_defconfig +++ b/configs/giedi_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x2000 +CONFIG_IDENT_STRING=" ##v01.07" CONFIG_SPL_LOAD_IMX_CONTAINER=y CONFIG_IMX_CONTAINER_CFG="board/siemens/capricorn/uboot-container.cfg" CONFIG_SYS_LOAD_ADDR=0x80280000 @@ -28,11 +29,15 @@ CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"\" to stop\n" CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" CONFIG_AUTOBOOT_KEYED_CTRLC=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="if usrbutton; then run flash_self_test; reset; fi;run flash_self;reset;" CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig index e8a2f36761979cde14f6ae5fb6686b0c5f894a28..ec8b7398d0a8064447610f11823ad3f1724843d2 100644 --- a/configs/goflexhome_defconfig +++ b/configs/goflexhome_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/Seagate/goflexhome/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_GOFLEXHOME=y @@ -13,6 +14,8 @@ CONFIG_IDENT_STRING="\nSeagate GoFlex Home" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_root}; ubi part root; ubifsmount ubi:root; ubifsload 0x800000 ${kernel}; bootm 0x800000" CONFIG_USE_PREBOOT=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/grpeach_defconfig b/configs/grpeach_defconfig index 72707511f0838ff53f27ed3f1e4d605c41f848bd..678dbd31d5cdfe939c5a78a9ad5403fa6abf2e17 100644 --- a/configs/grpeach_defconfig +++ b/configs/grpeach_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="r7s72100-gr-peach-u-boot" CONFIG_RZA1=y +CONFIG_SYS_CLK_FREQ=66666666 CONFIG_SYS_LOAD_ADDR=0x20400000 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -31,14 +32,7 @@ CONFIG_MAC_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=0 -CONFIG_USE_ENV_SPI_CS=y -CONFIG_ENV_SPI_CS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 -CONFIG_USE_ENV_SPI_MODE=y -CONFIG_ENV_SPI_MODE=0x0 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_RZA1_GPIO=y diff --git a/configs/gurnard_defconfig b/configs/gurnard_defconfig index 7c7974c123c13c3074b6425dbb0e30d53238be22..05e9d18505329d92b0e79719cf5ab86c712c5824 100644 --- a/configs/gurnard_defconfig +++ b/configs/gurnard_defconfig @@ -38,6 +38,7 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_TFTP_TSIZE=y CONFIG_AT91_GPIO=y +CONFIG_GENERIC_ATMEL_MCI=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y # CONFIG_SYS_NAND_USE_FLASH_BBT is not set @@ -50,5 +51,6 @@ CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_DM_VIDEO=y +# CONFIG_VIDEO_LOGO is not set # CONFIG_VIDEO_BPP32 is not set CONFIG_CMD_DHRYSTONE=y diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig index 4a9cd23113c87feafa05b1c034945c3e4febf2d1..e7802afb0a0c1ba82df7d6ccac38f0f7942efbf1 100644 --- a/configs/guruplug_defconfig +++ b/configs/guruplug_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/Marvell/guruplug/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_GURUPLUG=y @@ -13,6 +14,8 @@ CONFIG_IDENT_STRING="\nMarvell-GuruPlug" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_root}; ubi part root; ubifsmount ubi:rootfs; ubifsload 0x800000 ${kernel}; ubifsload 0x700000 ${fdt}; ubifsumount; fdt addr 0x700000; fdt resize; fdt chosen; bootz 0x800000 - 0x700000" CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index 3c94c0a592799df904b2e00864d2d4c4e1c87154..dd85723a2d16776c094fadedd85a77070c375003 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -31,6 +31,8 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="for btype in ${bootdevs}; do echo; echo Attempting ${btype} boot...; if run ${btype}_boot; then; fi; done" CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -138,6 +140,7 @@ CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_ETHER=y CONFIG_USB_ETH_CDC=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y # CONFIG_BACKLIGHT is not set # CONFIG_CMD_VIDCONSOLE is not set # CONFIG_VIDEO_BPP8 is not set diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index 3309c657f1953fb5b161d1d03ba5079a835f589a..b54982093121b8e695dddee3a3e41e6e574c81e3 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -31,6 +31,8 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="for btype in ${bootdevs}; do echo; echo Attempting ${btype} boot...; if run ${btype}_boot; then; fi; done" CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -142,6 +144,7 @@ CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_ETHER=y CONFIG_USB_ETH_CDC=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y # CONFIG_BACKLIGHT is not set # CONFIG_CMD_VIDCONSOLE is not set # CONFIG_VIDEO_BPP8 is not set diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index b64d4ae15920d87e0c1c3aa5d869e17163266a0c..f75e73fa514ea6af6bf79039f0c20b5f044f7459 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -31,6 +31,8 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="for btype in ${bootdevs}; do echo; echo Attempting ${btype} boot...; if run ${btype}_boot; then; fi; done" CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -146,6 +148,7 @@ CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_ETHER=y CONFIG_USB_ETH_CDC=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y # CONFIG_BACKLIGHT is not set # CONFIG_CMD_VIDCONSOLE is not set # CONFIG_VIDEO_BPP8 is not set diff --git a/configs/harmony_defconfig b/configs/harmony_defconfig index 6ce4f559e13e2eac696c24392551d07cbcdb15e3..9763b21a34b411d731d765d8c98a9956fcac9dbf 100644 --- a/configs/harmony_defconfig +++ b/configs/harmony_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 @@ -16,7 +17,6 @@ CONFIG_SYS_PROMPT="Tegra20 (Harmony) # " # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y -CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set @@ -37,6 +37,7 @@ CONFIG_SPL_DM=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_TEGRA_NAND=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_MTD_UBI_FASTMAP=y CONFIG_PCI=y diff --git a/configs/highbank_defconfig b/configs/highbank_defconfig index 85b42c70f551e2598108383fcd91cf1aac35ae94..3e8bfcf73a69ea00bcbd900697009eb53a7fc80b 100644 --- a/configs/highbank_defconfig +++ b/configs/highbank_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_TEXT_BASE=0x00008000 CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="highbank" CONFIG_SYS_BOOTCOUNT_ADDR=0xfff3cf0c CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_DISTRO_DEFAULTS=y @@ -21,7 +22,6 @@ CONFIG_AUTOBOOT_KEYED_CTRLC=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y # CONFIG_CMD_SETEXPR is not set -CONFIG_OF_BOARD=y CONFIG_ENV_IS_IN_NVRAM=y CONFIG_ENV_ADDR=0xFFF88000 CONFIG_SCSI_AHCI=y diff --git a/configs/hihope_rzg2_defconfig b/configs/hihope_rzg2_defconfig index 747fe29cc94db799a6a51cd5c6244b4c79076fef..5cc396c41065983952fb2f926b6ca36e90ca5398 100644 --- a/configs/hihope_rzg2_defconfig +++ b/configs/hihope_rzg2_defconfig @@ -14,6 +14,8 @@ CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a774a1-hihope-rzg2m.dtb; booti 0x48080000 - 0x48000000" CONFIG_DEFAULT_FDT_FILE="r8a774a1-hihope-rzg2m.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_HUSH_PARSER=y diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig index eeab2e8c119f4dfd0f823b1b2f1aa58be1785d6f..23a211c39134388e3ef9bd5bdba2c4cf0022f2ec 100644 --- a/configs/ib62x0_defconfig +++ b/configs/ib62x0_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/raidsonic/ib62x0/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_IB62X0=y @@ -13,6 +14,8 @@ CONFIG_IDENT_STRING=" RaidSonic ICY BOX IB-NAS62x0" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_root}; ubi part root; ubifsmount ubi:rootfs; ubifsload 0x800000 ${kernel}; ubifsload 0x700000 ${fdt}; ubifsumount; fdt addr 0x700000; fdt resize; fdt chosen; bootz 0x800000 - 0x700000" CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig index d8593bcdd2835cf7c8220a57769921a4fdc4910a..605b98b1642b933a09bf9ffd61414d8826495a82 100644 --- a/configs/iconnect_defconfig +++ b/configs/iconnect_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/iomega/iconnect/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_ICONNECT=y @@ -13,6 +14,8 @@ CONFIG_IDENT_STRING=" Iomega iConnect" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_root}; ubi part rootfs; ubifsmount ubi:rootfs; ubifsload 0x800000 ${kernel}; bootm 0x800000" CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="iconnect => " diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig index cf4e8c0e4a07024b722fc6fa734c2c73beb3d8ff..246cc3d045f894c4878b5374ec6d7bce4e6baab7 100644 --- a/configs/ids8313_defconfig +++ b/configs/ids8313_defconfig @@ -8,7 +8,6 @@ CONFIG_SYS_CLK_FREQ=66000000 CONFIG_MPC83xx=y CONFIG_HIGH_BATS=y CONFIG_TARGET_IDS8313=y -CONFIG_SYS_IMMR=0xF0000000 CONFIG_CORE_PLL_RATIO_2_1=y CONFIG_PCI_HOST_MODE_ENABLE=y CONFIG_BOOT_ROM_INTERFACE_GPCM_8BIT=y @@ -128,6 +127,8 @@ CONFIG_BOOTDELAY=1 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Enter password - autoboot in %d seconds...\n" CONFIG_AUTOBOOT_DELAY_STR="ids" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run boot_cramfs" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="echo;echo Type \"run nfsboot\" to mount root filesystem over NFS;echo" # CONFIG_DISPLAY_BOARDINFO is not set @@ -156,6 +157,18 @@ CONFIG_ENV_ADDR_REDUND=0xFFFE0000 CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_I2C=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xFF800801 +CONFIG_SYS_OR0_PRELIM=0xFF8008A7 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xE1000C21 +CONFIG_SYS_OR1_PRELIM=0xFFFF87CE +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xE2000801 +CONFIG_SYS_OR2_PRELIM=0xFFFE0C74 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xE3000801 +CONFIG_SYS_OR3_PRELIM=0xFFFF8814 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y CONFIG_SYS_FSL_I2C_OFFSET=0x3100 @@ -185,4 +198,6 @@ CONFIG_TSEC_ENET=y # CONFIG_PCI is not set CONFIG_RTC_PCF8563=y CONFIG_SYS_NS16550=y +CONFIG_WATCHDOG=y +CONFIG_JFFS2_NAND=y CONFIG_OF_LIBFDT=y diff --git a/configs/imx28_xea_defconfig b/configs/imx28_xea_defconfig index 63ab8349cddd144ec53bcdaba63b8d287581a13a..5192dd224b7c6705ed29d907f3d6bb3a394724b5 100644 --- a/configs/imx28_xea_defconfig +++ b/configs/imx28_xea_defconfig @@ -26,6 +26,8 @@ CONFIG_FIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200n8" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run ${bootpri} ; run ${bootsec}" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="run prebootcmd" CONFIG_BOARD_EARLY_INIT_F=y @@ -33,7 +35,7 @@ CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y -CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0 +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x0 CONFIG_SUPPORT_EMMC_BOOT_OVERRIDE_PART_CONFIG=y CONFIG_SPL_DMA=y CONFIG_SPL_MMC_TINY=y @@ -70,14 +72,6 @@ CONFIG_SPL_OF_PLATDATA=y # CONFIG_SPL_OF_PLATDATA_PARENT is not set CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=3 -CONFIG_USE_ENV_SPI_CS=y -CONFIG_ENV_SPI_CS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=40000000 -CONFIG_USE_ENV_SPI_MODE=y -CONFIG_ENV_SPI_MODE=0x0 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y @@ -89,7 +83,6 @@ CONFIG_MMC_MXS=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=3 -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SF_DEFAULT_SPEED=40000000 CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_ISSI=y diff --git a/configs/imx6dl_icore_nand_defconfig b/configs/imx6dl_icore_nand_defconfig index 3076dced10b01343a38a8e5e831b5329562fc3d4..14bafc6deb40faa681aa890276e48bb316bedf6b 100644 --- a/configs/imx6dl_icore_nand_defconfig +++ b/configs/imx6dl_icore_nand_defconfig @@ -22,6 +22,8 @@ CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y @@ -64,6 +66,7 @@ CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y # CONFIG_VIDEO_BPP8 is not set # CONFIG_VIDEO_BPP32 is not set CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/configs/imx6q_icore_nand_defconfig b/configs/imx6q_icore_nand_defconfig index 439917bf243a80c048c212a9d40468eec2aad7db..1e428d325457a6e3ab4693c217d95c43a4b5c9c0 100644 --- a/configs/imx6q_icore_nand_defconfig +++ b/configs/imx6q_icore_nand_defconfig @@ -23,6 +23,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y @@ -65,6 +67,7 @@ CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y # CONFIG_VIDEO_BPP8 is not set # CONFIG_VIDEO_BPP32 is not set CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index 96736f91490abf1e5b0e029277210090c7e3f7c7..3f59b99faf76624688560114ae2090ec6bea7b01 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -23,7 +23,7 @@ CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run autoboot" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SPL_RAW_IMAGE_SUPPORT=y @@ -77,7 +77,6 @@ CONFIG_LED_GPIO=y CONFIG_MISC=y CONFIG_I2C_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x0 -CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0 CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_DM_MTD=y diff --git a/configs/imx6qdl_icore_mipi_defconfig b/configs/imx6qdl_icore_mipi_defconfig index 42128c515aad6bb3952fc6719180b00f25dd9acb..9c6e7e33e92b52978b438fcfff493e3f89e0602f 100644 --- a/configs/imx6qdl_icore_mipi_defconfig +++ b/configs/imx6qdl_icore_mipi_defconfig @@ -30,6 +30,8 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_RAW_IMAGE_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index 61d8a7b2e63508807a6996b0e4f7a6affa298921..dbd422799abd8571c3f445f23a5f745ca6acc2eb 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -33,6 +33,8 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_RAW_IMAGE_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_WATCHDOG=y @@ -82,6 +84,7 @@ CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y # CONFIG_VIDEO_BPP8 is not set # CONFIG_VIDEO_BPP32 is not set CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index 439917bf243a80c048c212a9d40468eec2aad7db..1e428d325457a6e3ab4693c217d95c43a4b5c9c0 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -23,6 +23,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y @@ -65,6 +67,7 @@ CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y # CONFIG_VIDEO_BPP8 is not set # CONFIG_VIDEO_BPP32 is not set CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig index 697644b4cb630cd320f27de230d4c59f85d22dff..4a4fcdf77b1d720d8c05d2c793da67a780ec3160 100644 --- a/configs/imx6qdl_icore_rqs_defconfig +++ b/configs/imx6qdl_icore_rqs_defconfig @@ -27,6 +27,8 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_RAW_IMAGE_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig index 27cfa7ff3023cbc9429b72af11d0df21463d9b2c..cd11c95d7a75c32fc029b98ac0d5648dc7cb8ade 100644 --- a/configs/imx6ul_geam_mmc_defconfig +++ b/configs/imx6ul_geam_mmc_defconfig @@ -25,6 +25,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_RAW_IMAGE_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig index 3863b8a88f67e0894aafbb6357186e20c47e605c..7ceb1ae930957d26207bdae0a2f399e230b8b6d0 100644 --- a/configs/imx6ul_geam_nand_defconfig +++ b/configs/imx6ul_geam_nand_defconfig @@ -23,6 +23,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig index 256d7329bb40c6a2dd737b7c8d88b3d0d2c128d5..e701d0681330cdd63feb21f9d30b0d9c6b9d38d1 100644 --- a/configs/imx6ul_isiot_emmc_defconfig +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -25,6 +25,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_RAW_IMAGE_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig index f1c97e57bd15d2466e6c526bb37b312cd54decd0..d4438126bcd40fda10a951233d9b049103b0b590 100644 --- a/configs/imx6ul_isiot_nand_defconfig +++ b/configs/imx6ul_isiot_nand_defconfig @@ -23,6 +23,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx7_cm_defconfig b/configs/imx7_cm_defconfig index 3f8f6181d7ffbf890a2f63a605c911849b9c53f1..a1aa6804ae32d0d36dc10a808c31d0c97eaffad6 100644 --- a/configs/imx7_cm_defconfig +++ b/configs/imx7_cm_defconfig @@ -21,7 +21,7 @@ CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" +CONFIG_BOOTCOMMAND="run boot${boot-mode}" CONFIG_DEFAULT_FDT_FILE="ask" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_SPL_I2C=y diff --git a/configs/imx8mm-cl-iot-gate-optee_defconfig b/configs/imx8mm-cl-iot-gate-optee_defconfig index 29d060166b0b26959732d8ab1e274eb5b04d9756..777d452ce40c9d110253f9f6319e08f96e385308 100644 --- a/configs/imx8mm-cl-iot-gate-optee_defconfig +++ b/configs/imx8mm-cl-iot-gate-optee_defconfig @@ -26,6 +26,8 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig index 72848914b5743c806f1314e450faf03e63adfe1f..b72f219c786cc77eb359235f629a9b442d04bc2d 100644 --- a/configs/imx8mm-cl-iot-gate_defconfig +++ b/configs/imx8mm-cl-iot-gate_defconfig @@ -29,6 +29,8 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig index b0b562aebc08a3cd1e9a0ec3f467351efb721161..9c8dd246a572cb97a0b262e0c7fbec06dceb46f5 100644 --- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig +++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig @@ -26,6 +26,8 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-ctouch2.dtb" CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_POWER=y CONFIG_SYS_PROMPT="u-boot=> " # CONFIG_CMD_EXPORTENV is not set diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig index 88e3b04a50fe3f33dced6de8b7e82ee93aa046f5..98ac1c32b1eaeae2dea0d2e25f9b0684331085b8 100644 --- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig +++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig @@ -26,6 +26,8 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-edimm2.2.dtb" CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_POWER=y CONFIG_SYS_PROMPT="u-boot=> " # CONFIG_CMD_EXPORTENV is not set diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig index 9aea5bf18174ed1fb2728b5f16ccbc8ae5416a20..ba9c9a3ee009806feb481b60584c271f81e83a68 100644 --- a/configs/imx8mm_beacon_defconfig +++ b/configs/imx8mm_beacon_defconfig @@ -23,9 +23,13 @@ CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; fi;" CONFIG_DEFAULT_FDT_FILE="imx8mm-beacon-kit.dtb" CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y @@ -79,7 +83,6 @@ CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_DM_SPI_FLASH=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index d03bba797b71aaabcc39850d16ee63cbcdd5f94a..01395fc7eb7a1fcf6b57db94049e110fcca5a9df 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -26,6 +26,8 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig index 6f522880d70d3e98894065e8002fb214376827a6..02a65c5abf0baa7ec5fca723cb0aed7158413f53 100644 --- a/configs/imx8mm_venice_defconfig +++ b/configs/imx8mm_venice_defconfig @@ -33,6 +33,8 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="gsc wd-disable" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig index 80e0bbb015dfb0c32e4c482c9b6049798a39ffbb..8b98d687ec81aa00950ba4c6d8d53179bf2dca40 100644 --- a/configs/imx8mn_beacon_2g_defconfig +++ b/configs/imx8mn_beacon_2g_defconfig @@ -28,11 +28,15 @@ CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" CONFIG_DEFAULT_FDT_FILE="imx8mn-beacon-kit.dtb" CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_HUSH_PARSER=y diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig index 1d2a825e19ad265f8ed3d824c73a8ccfb78e2684..cfe43102a72912ebfae6ab53c3a4cf1973c35e0c 100644 --- a/configs/imx8mn_beacon_defconfig +++ b/configs/imx8mn_beacon_defconfig @@ -27,11 +27,15 @@ CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" CONFIG_DEFAULT_FDT_FILE="imx8mn-beacon-kit.dtb" CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig index 8a0b85a5c270131a5ca221de42c14672fa605e96..28cc551dc418cfd3cea0c0f1ec146987bcccc32b 100644 --- a/configs/imx8mn_ddr4_evk_defconfig +++ b/configs/imx8mn_ddr4_evk_defconfig @@ -29,6 +29,8 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig index 3ee15d3edfa5ad836ee29b8cf683875c60c85f49..865d657a6d15e581079b02f5b4a86bc5f8095fc4 100644 --- a/configs/imx8mn_evk_defconfig +++ b/configs/imx8mn_evk_defconfig @@ -31,6 +31,8 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index a448734a9298bb7f3b9c8d9301d2cb547c6ce037..0ff549f0bebfa182910d371de32024cad268dd0f 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -34,6 +34,8 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx8mq_cm_defconfig b/configs/imx8mq_cm_defconfig index 907b1d2f158726046494dae645ef66b8f2a4b0be..f8a9d701d557edc7baa9915f83084d34bb1464d3 100644 --- a/configs/imx8mq_cm_defconfig +++ b/configs/imx8mq_cm_defconfig @@ -28,6 +28,8 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_CMD_FUSE=y diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index f82ce632811bc2e031d36253566a53ad40572ba6..389a5cb00eae5033b92e0511923d5cca5b87c9e2 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -25,9 +25,12 @@ CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set +CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y @@ -51,6 +54,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 +CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SUPPORT_EMMC_BOOT=y diff --git a/configs/imx8mq_phanbell_defconfig b/configs/imx8mq_phanbell_defconfig index da6a06c13ab31ca90fdf02b2dda87fbb6513903d..d5f45a4b012df7d9f3650a26163ecdd4b579625e 100644 --- a/configs/imx8mq_phanbell_defconfig +++ b/configs/imx8mq_phanbell_defconfig @@ -25,9 +25,14 @@ CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set +CONFIG_OF_SYSTEM_SETUP=y CONFIG_SD_BOOT=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_BOARD_INIT=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_HUSH_PARSER=y @@ -55,6 +60,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 +CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SUPPORT_EMMC_BOOT=y diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig index bf330ab22bcb282ff409915722e1adb6c03d3a91..c58c5ffed9ff2fbbf4095adeb3bbfea94856c1cf 100644 --- a/configs/imx8qm_mek_defconfig +++ b/configs/imx8qm_mek_defconfig @@ -20,13 +20,18 @@ CONFIG_SPL=y CONFIG_SPL_LOAD_IMX_CONTAINER=y CONFIG_IMX_CONTAINER_CFG="board/freescale/imx8qm_mek/uboot-container.cfg" CONFIG_SYS_LOAD_ADDR=0x80280000 +CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if test ${sec_boot} = yes; then if run loadcntr; then run mmcboot; else run netboot; fi; else if run loadimage; then run mmcboot; else run netboot; fi; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y diff --git a/configs/imx8qm_rom7720_a1_4G_defconfig b/configs/imx8qm_rom7720_a1_4G_defconfig index fb43fa1962eb70249e4c41b3ec64ecc6b6df18da..0cc30d33a317d3e69876d3ed040f16c9c13a30f2 100644 --- a/configs/imx8qm_rom7720_a1_4G_defconfig +++ b/configs/imx8qm_rom7720_a1_4G_defconfig @@ -20,6 +20,8 @@ CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_BOARD_INIT=y diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index 3f6fca606b61201f879ab7a8a3644f819dc406a8..8a336cb23a86a0dabd11e82285cfa7e0cd273712 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -20,13 +20,18 @@ CONFIG_SPL=y CONFIG_SPL_LOAD_IMX_CONTAINER=y CONFIG_IMX_CONTAINER_CFG="board/freescale/imx8qxp_mek/uboot-container.cfg" CONFIG_SYS_LOAD_ADDR=0x80280000 +CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if test ${sec_boot} = yes; then if run loadcntr; then run mmcboot; else run netboot; fi; else if run loadimage; then run mmcboot; else run netboot; fi; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 CONFIG_SPL_POWER_DOMAIN=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CPU=y diff --git a/configs/imx8ulp_evk_defconfig b/configs/imx8ulp_evk_defconfig index 129931f4c353fc2a6fe9e9bc0b7952bd2a6f4020..b444713b86bab75ea344cdc7bc1249fe995b27b9 100644 --- a/configs/imx8ulp_evk_defconfig +++ b/configs/imx8ulp_evk_defconfig @@ -30,6 +30,8 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_WATCHDOG=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_FUSE=y diff --git a/configs/imxrt1050-evk_defconfig b/configs/imxrt1050-evk_defconfig index ca3f810e025b0c471ca9900a496b3dbfb1d68781..bc438b9fa6c28194cc9a74e6bffea38f115b1da7 100644 --- a/configs/imxrt1050-evk_defconfig +++ b/configs/imxrt1050-evk_defconfig @@ -72,6 +72,7 @@ CONFIG_USB=y # CONFIG_SPL_DM_USB is not set CONFIG_USB_EHCI_HCD=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y CONFIG_BACKLIGHT_GPIO=y CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_MXS=y diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig index cd62a9d8eab44ca9187949188e15694183ddfb37..8779e58b932249e56b2a10a6d542281cc408256a 100644 --- a/configs/inetspace_v2_defconfig +++ b/configs/inetspace_v2_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/LaCie/netspace_v2/kwbimage-is2.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_NETSPACE_V2=y @@ -13,10 +14,11 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-is2" CONFIG_IDENT_STRING=" IS v2" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_SYS_EXTRA_OPTIONS="INETSPACE_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="dhcp && run netconsole; if run usbload || run diskload; then bootm; fi" CONFIG_USE_PREBOOT=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -40,12 +42,12 @@ CONFIG_EFI_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_ENV_ADDR=0x70000 CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_SATA_MV=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x0 diff --git a/configs/integratorap_cm720t_defconfig b/configs/integratorap_cm720t_defconfig index b22ebc952188b8c650746c9b3086b618f9d638cd..420aae6cd719f1d9988dea8c2e0e30526e0db817 100644 --- a/configs/integratorap_cm720t_defconfig +++ b/configs/integratorap_cm720t_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_SIZE=0x8000 CONFIG_SYS_LOAD_ADDR=0x7fc0 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty" +CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y diff --git a/configs/integratorap_cm920t_defconfig b/configs/integratorap_cm920t_defconfig index e03db981c6cef6b5ebe491308ff1162a55bf2115..3ff47e1ebee1226325050486a40a50896fc4d775 100644 --- a/configs/integratorap_cm920t_defconfig +++ b/configs/integratorap_cm920t_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_SIZE=0x8000 CONFIG_SYS_LOAD_ADDR=0x7fc0 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty" +CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y diff --git a/configs/integratorap_cm926ejs_defconfig b/configs/integratorap_cm926ejs_defconfig index c79b66b8bb2e12e66d377d65359ffdc5f03bd7dd..216088773379e2b81171f9de4951200d42f6bb50 100644 --- a/configs/integratorap_cm926ejs_defconfig +++ b/configs/integratorap_cm926ejs_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_SIZE=0x8000 CONFIG_SYS_LOAD_ADDR=0x7fc0 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty" +CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y diff --git a/configs/integratorap_cm946es_defconfig b/configs/integratorap_cm946es_defconfig index fd551893d4234041de8894df0af15cfa41fdb6ba..b384dc6b03f42ccab96103d94c2f6e4336372391 100644 --- a/configs/integratorap_cm946es_defconfig +++ b/configs/integratorap_cm946es_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_SIZE=0x8000 CONFIG_SYS_LOAD_ADDR=0x7fc0 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty" +CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y diff --git a/configs/integratorcp_cm1136_defconfig b/configs/integratorcp_cm1136_defconfig index 841e8e47fb6cd8e35361df2e825a4a972917da3f..ba6450b11eea8b8c57bb87209536bf215e17b88d 100644 --- a/configs/integratorcp_cm1136_defconfig +++ b/configs/integratorcp_cm1136_defconfig @@ -10,6 +10,8 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_LOAD_ADDR=0x7fc0 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="tftpboot ; bootm" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y diff --git a/configs/integratorcp_cm920t_defconfig b/configs/integratorcp_cm920t_defconfig index fcaccdf9cbe82020fe8ea186d8d711e115c40f3d..06bfdff663c40ae66383d3eda105b1d779e023d9 100644 --- a/configs/integratorcp_cm920t_defconfig +++ b/configs/integratorcp_cm920t_defconfig @@ -10,6 +10,8 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_LOAD_ADDR=0x7fc0 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="tftpboot ; bootm" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y diff --git a/configs/integratorcp_cm926ejs_defconfig b/configs/integratorcp_cm926ejs_defconfig index 12004f198e4b61ccad8aad941d8028dfe906cbdb..3d158874acea76634b6c2074e0fd0aac1489e155 100644 --- a/configs/integratorcp_cm926ejs_defconfig +++ b/configs/integratorcp_cm926ejs_defconfig @@ -10,6 +10,8 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_LOAD_ADDR=0x7fc0 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="tftpboot ; bootm" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y diff --git a/configs/integratorcp_cm946es_defconfig b/configs/integratorcp_cm946es_defconfig index c852d23dd299bf62681ab1bfc77fced202680ac4..8d49ef49705f67c5e28f156ec969639c46302caf 100644 --- a/configs/integratorcp_cm946es_defconfig +++ b/configs/integratorcp_cm946es_defconfig @@ -10,6 +10,8 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_LOAD_ADDR=0x7fc0 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="tftpboot ; bootm" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y diff --git a/configs/iot2050_defconfig b/configs/iot2050_defconfig index 4a87a3394dee168010f2ab626055592c87181376..10abb77c18eea1463dcce98ce1ede39a5aa463a9 100644 --- a/configs/iot2050_defconfig +++ b/configs/iot2050_defconfig @@ -60,7 +60,6 @@ CONFIG_CMD_TIME=y # CONFIG_ISO_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y -CONFIG_OF_LIST="k3-am6528-iot2050-basic k3-am6548-iot2050-advanced" CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_OF_LIST="k3-am65-iot2050-spl" CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y diff --git a/configs/jethub_j80_defconfig b/configs/jethub_j80_defconfig index ad6bec0c4337d86066a6ad2a93207ff6879ab1fc..eb1e4c4a53c824871b1acd9685487c6a73eb7bf6 100644 --- a/configs/jethub_j80_defconfig +++ b/configs/jethub_j80_defconfig @@ -33,7 +33,6 @@ CONFIG_CMD_REGULATOR=y CONFIG_PARTITION_TYPE_GUID=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SARADC_MESON=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MESON=y diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig index bb37175d5198ff034bf02d5557b6d55eb4573519..425b123ba1d0e3854d26f8820f1586f87e5bbce9 100644 --- a/configs/jetson-tk1_defconfig +++ b/configs/jetson-tk1_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_SYS_MALLOC_LEN=0x2500000 diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index 014d526f48e5cb4eb6cb8bc764637456a423cef3..2c49187b01a9c30f495aec89ae823214372d0880 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -22,7 +22,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run init_${boot}; run get_mon_${boot} run_mon; run get_kern_${boot}; run init_fw_rd_${boot}; run get_fdt_${boot}; run run_kern" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_I2C=y diff --git a/configs/k2e_hs_evm_defconfig b/configs/k2e_hs_evm_defconfig index fc1969c2403fb2ab0861880b83c12bc660035547..7d739de62932aad2376c236f799a4f7a872b1a23 100644 --- a/configs/k2e_hs_evm_defconfig +++ b/configs/k2e_hs_evm_defconfig @@ -16,7 +16,7 @@ CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_IMAGE_POST_PROCESS=y CONFIG_OF_BOARD_SETUP=y -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run run_mon_hs; run init_${boot}; run get_fit_${boot}; bootm ${addr_fit}#${name_fdt}" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index 831ff69922b7c91e05f50d084a004077d51cd71c..f0a7d839f4e5db5af86a7106b29c81a4fbce6a25 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -21,7 +21,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run get_mon_${boot} run_mon; run set_name_pmmc get_pmmc_${boot} run_pmmc; run get_kern_${boot}; run init_fw_rd_${boot}; run get_fdt_${boot}; run run_kern" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_I2C=y diff --git a/configs/k2g_hs_evm_defconfig b/configs/k2g_hs_evm_defconfig index 2c20ee30c86b5c7697d1ac42966f3ebadc21b710..a5ebb426b6e503f28041f797afea67f73a550366 100644 --- a/configs/k2g_hs_evm_defconfig +++ b/configs/k2g_hs_evm_defconfig @@ -15,7 +15,7 @@ CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_IMAGE_POST_PROCESS=y CONFIG_OF_BOARD_SETUP=y -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run findfdt; run envboot; run run_mon_hs; run init_${boot}; run get_fit_${boot}; bootm ${addr_fit}#${name_fdt}" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index 94e3a764dc7dbf818841771a88bd36221ffe83bc..a2d92015be855cb36fc0e87e001973c2ded24e7c 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -22,7 +22,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run init_${boot}; run get_mon_${boot} run_mon; run get_kern_${boot}; run init_fw_rd_${boot}; run get_fdt_${boot}; run run_kern" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_I2C=y diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig index 04c576a84b4eb18f1c36579f656323560e4677a0..c3ef1a7e26b3fef59aff6503d5348d074420936e 100644 --- a/configs/k2hk_hs_evm_defconfig +++ b/configs/k2hk_hs_evm_defconfig @@ -16,7 +16,7 @@ CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_IMAGE_POST_PROCESS=y CONFIG_OF_BOARD_SETUP=y -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run run_mon_hs; run init_${boot}; run get_fit_${boot}; bootm ${addr_fit}#${name_fdt}" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index f2a19a52a7cbbb6f1bdcf0ec54e1ffe039fcc8b1..6ef1de7d829b97dbc940788f72ea7c22a1ec04c9 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -22,7 +22,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run init_${boot}; run get_mon_${boot} run_mon; run get_kern_${boot}; run init_fw_rd_${boot}; run get_fdt_${boot}; run run_kern" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_I2C=y diff --git a/configs/k2l_hs_evm_defconfig b/configs/k2l_hs_evm_defconfig index d4d80242377a1cb111a29d7f471ee3a01eaefe93..718ceff99439d6d73f24a5c048901f144f953b5e 100644 --- a/configs/k2l_hs_evm_defconfig +++ b/configs/k2l_hs_evm_defconfig @@ -15,6 +15,8 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="keystone-k2l-evm" CONFIG_FIT_IMAGE_POST_PROCESS=y CONFIG_OF_BOARD_SETUP=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run run_mon_hs; run init_${boot}; run get_fit_${boot}; bootm ${addr_fit}#${name_fdt}" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y diff --git a/configs/khadas-vim2_defconfig b/configs/khadas-vim2_defconfig index c852f7f3f9eddf4de9b16592b315f440dfb13226..81cff3cee841c0374cb896a8e2cdc28d80a8eca6 100644 --- a/configs/khadas-vim2_defconfig +++ b/configs/khadas-vim2_defconfig @@ -29,7 +29,6 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SARADC_MESON=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y diff --git a/configs/khadas-vim3_android_ab_defconfig b/configs/khadas-vim3_android_ab_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..88325c37db1501c9755dda26cbe0285a8eafb85e --- /dev/null +++ b/configs/khadas-vim3_android_ab_defconfig @@ -0,0 +1,109 @@ +CONFIG_ARM=y +CONFIG_SYS_BOARD="vim3" +CONFIG_SYS_CONFIG_NAME="khadas-vim3_android" +CONFIG_ARCH_MESON=y +CONFIG_SYS_TEXT_BASE=0x01000000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x10000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-a311d-khadas-vim3" +CONFIG_MESON_G12A=y +CONFIG_DEBUG_UART_BASE=0xff803000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_IDENT_STRING=" khadas-vim3" +CONFIG_DEBUG_UART=y +CONFIG_SYS_LOAD_ADDR=0x1000000 +CONFIG_OF_BOARD_SETUP=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_MISC_INIT_R=y +CONFIG_AVB_VERIFY=y +CONFIG_ANDROID_AB=y +# CONFIG_CMD_BDI is not set +CONFIG_CMD_ADTIMG=y +CONFIG_CMD_ABOOTIMG=y +# CONFIG_CMD_IMI is not set +CONFIG_CMD_BCB=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SF_TEST=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_AB_SELECT=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_AVB=y +CONFIG_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_ADC=y +CONFIG_SARADC_MESON=y +CONFIG_BUTTON=y +CONFIG_BUTTON_ADC=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x6000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=2 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MESON=y +CONFIG_MMC_MESON_GX=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_DM_MDIO_MUX=y +CONFIG_ETH_DESIGNWARE_MESON8B=y +CONFIG_MDIO_MUX_MESON_G12A=y +CONFIG_NVME=y +CONFIG_PCI=y +CONFIG_PCIE_DW_MESON=y +CONFIG_MESON_G12A_USB_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_G12A=y +CONFIG_POWER_DOMAIN=y +CONFIG_MESON_EE_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_MESON_SPIFC=y +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_MESON_G12A=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e +CONFIG_USB_GADGET_PRODUCT_NUM=0xfada +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y +CONFIG_DM_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_MESON=y +CONFIG_VIDEO_DT_SIMPLEFB=y +CONFIG_SPLASH_SCREEN=y +CONFIG_SPLASH_SCREEN_ALIGN=y +CONFIG_VIDEO_BMP_RLE8=y +CONFIG_BMP_16BPP=y +CONFIG_BMP_24BPP=y +CONFIG_BMP_32BPP=y +CONFIG_LIBAVB=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/khadas-vim3_android_defconfig b/configs/khadas-vim3_android_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..9305a54b1b6f8512e5a3c3be41c1c11a3f9b15d4 --- /dev/null +++ b/configs/khadas-vim3_android_defconfig @@ -0,0 +1,107 @@ +CONFIG_ARM=y +CONFIG_SYS_BOARD="vim3" +CONFIG_SYS_CONFIG_NAME="khadas-vim3_android" +CONFIG_ARCH_MESON=y +CONFIG_SYS_TEXT_BASE=0x01000000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x10000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-a311d-khadas-vim3" +CONFIG_MESON_G12A=y +CONFIG_DEBUG_UART_BASE=0xff803000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_IDENT_STRING=" khadas-vim3" +CONFIG_DEBUG_UART=y +CONFIG_SYS_LOAD_ADDR=0x1000000 +CONFIG_OF_BOARD_SETUP=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_MISC_INIT_R=y +CONFIG_AVB_VERIFY=y +# CONFIG_CMD_BDI is not set +CONFIG_CMD_ADTIMG=y +CONFIG_CMD_ABOOTIMG=y +# CONFIG_CMD_IMI is not set +CONFIG_CMD_BCB=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SF_TEST=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_AVB=y +CONFIG_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_ADC=y +CONFIG_SARADC_MESON=y +CONFIG_BUTTON=y +CONFIG_BUTTON_ADC=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x6000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=2 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MESON=y +CONFIG_MMC_MESON_GX=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_DM_MDIO_MUX=y +CONFIG_ETH_DESIGNWARE_MESON8B=y +CONFIG_MDIO_MUX_MESON_G12A=y +CONFIG_NVME=y +CONFIG_PCI=y +CONFIG_PCIE_DW_MESON=y +CONFIG_MESON_G12A_USB_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_G12A=y +CONFIG_POWER_DOMAIN=y +CONFIG_MESON_EE_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_MESON_SPIFC=y +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_MESON_G12A=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e +CONFIG_USB_GADGET_PRODUCT_NUM=0xfada +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y +CONFIG_DM_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_MESON=y +CONFIG_VIDEO_DT_SIMPLEFB=y +CONFIG_SPLASH_SCREEN=y +CONFIG_SPLASH_SCREEN_ALIGN=y +CONFIG_VIDEO_BMP_RLE8=y +CONFIG_BMP_16BPP=y +CONFIG_BMP_24BPP=y +CONFIG_BMP_32BPP=y +CONFIG_LIBAVB=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/khadas-vim3_defconfig b/configs/khadas-vim3_defconfig index a225a564b2803501053c11756facbc2d6b308cb5..65050efd3f7b414afff591ee0311361e44e6462f 100644 --- a/configs/khadas-vim3_defconfig +++ b/configs/khadas-vim3_defconfig @@ -30,7 +30,6 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_ADC=y CONFIG_SARADC_MESON=y CONFIG_BUTTON=y diff --git a/configs/khadas-vim3l_android_ab_defconfig b/configs/khadas-vim3l_android_ab_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..608b54dca241dedbc804bbc1eab135bebf192888 --- /dev/null +++ b/configs/khadas-vim3l_android_ab_defconfig @@ -0,0 +1,109 @@ +CONFIG_ARM=y +CONFIG_SYS_BOARD="vim3" +CONFIG_SYS_CONFIG_NAME="khadas-vim3l_android" +CONFIG_ARCH_MESON=y +CONFIG_SYS_TEXT_BASE=0x01000000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x10000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-khadas-vim3l" +CONFIG_MESON_G12A=y +CONFIG_DEBUG_UART_BASE=0xff803000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_IDENT_STRING=" khadas-vim3l" +CONFIG_DEBUG_UART=y +CONFIG_SYS_LOAD_ADDR=0x1000000 +CONFIG_OF_BOARD_SETUP=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_MISC_INIT_R=y +CONFIG_AVB_VERIFY=y +CONFIG_ANDROID_AB=y +# CONFIG_CMD_BDI is not set +CONFIG_CMD_ADTIMG=y +CONFIG_CMD_ABOOTIMG=y +# CONFIG_CMD_IMI is not set +CONFIG_CMD_BCB=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SF_TEST=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_AB_SELECT=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_AVB=y +CONFIG_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_ADC=y +CONFIG_SARADC_MESON=y +CONFIG_BUTTON=y +CONFIG_BUTTON_ADC=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x6000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=2 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MESON=y +CONFIG_MMC_MESON_GX=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_DM_MDIO_MUX=y +CONFIG_ETH_DESIGNWARE_MESON8B=y +CONFIG_MDIO_MUX_MESON_G12A=y +CONFIG_NVME=y +CONFIG_PCI=y +CONFIG_PCIE_DW_MESON=y +CONFIG_MESON_G12A_USB_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_G12A=y +CONFIG_POWER_DOMAIN=y +CONFIG_MESON_EE_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_MESON_SPIFC=y +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_MESON_G12A=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e +CONFIG_USB_GADGET_PRODUCT_NUM=0xfada +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y +CONFIG_DM_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_MESON=y +CONFIG_VIDEO_DT_SIMPLEFB=y +CONFIG_SPLASH_SCREEN=y +CONFIG_SPLASH_SCREEN_ALIGN=y +CONFIG_VIDEO_BMP_RLE8=y +CONFIG_BMP_16BPP=y +CONFIG_BMP_24BPP=y +CONFIG_BMP_32BPP=y +CONFIG_LIBAVB=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/khadas-vim3l_android_defconfig b/configs/khadas-vim3l_android_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..5eed79b263969ecbf41ec5527ee77900dfa2b8a3 --- /dev/null +++ b/configs/khadas-vim3l_android_defconfig @@ -0,0 +1,107 @@ +CONFIG_ARM=y +CONFIG_SYS_BOARD="vim3" +CONFIG_SYS_CONFIG_NAME="khadas-vim3l_android" +CONFIG_ARCH_MESON=y +CONFIG_SYS_TEXT_BASE=0x01000000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x10000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-khadas-vim3l" +CONFIG_MESON_G12A=y +CONFIG_DEBUG_UART_BASE=0xff803000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_IDENT_STRING=" khadas-vim3l" +CONFIG_DEBUG_UART=y +CONFIG_SYS_LOAD_ADDR=0x1000000 +CONFIG_OF_BOARD_SETUP=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_MISC_INIT_R=y +CONFIG_AVB_VERIFY=y +# CONFIG_CMD_BDI is not set +CONFIG_CMD_ADTIMG=y +CONFIG_CMD_ABOOTIMG=y +# CONFIG_CMD_IMI is not set +CONFIG_CMD_BCB=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SF_TEST=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_AVB=y +CONFIG_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_ADC=y +CONFIG_SARADC_MESON=y +CONFIG_BUTTON=y +CONFIG_BUTTON_ADC=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x6000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=2 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MESON=y +CONFIG_MMC_MESON_GX=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_DM_MDIO_MUX=y +CONFIG_ETH_DESIGNWARE_MESON8B=y +CONFIG_MDIO_MUX_MESON_G12A=y +CONFIG_NVME=y +CONFIG_PCI=y +CONFIG_PCIE_DW_MESON=y +CONFIG_MESON_G12A_USB_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_G12A=y +CONFIG_POWER_DOMAIN=y +CONFIG_MESON_EE_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_MESON_SPIFC=y +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_MESON_G12A=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e +CONFIG_USB_GADGET_PRODUCT_NUM=0xfada +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y +CONFIG_DM_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_MESON=y +CONFIG_VIDEO_DT_SIMPLEFB=y +CONFIG_SPLASH_SCREEN=y +CONFIG_SPLASH_SCREEN_ALIGN=y +CONFIG_VIDEO_BMP_RLE8=y +CONFIG_BMP_16BPP=y +CONFIG_BMP_24BPP=y +CONFIG_BMP_32BPP=y +CONFIG_LIBAVB=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/khadas-vim3l_defconfig b/configs/khadas-vim3l_defconfig index 9d94c31891c6fff92279e39c9a91669ce2017b06..b9162c9f1e9f6da73ad330f82d7e13343bb54d7f 100644 --- a/configs/khadas-vim3l_defconfig +++ b/configs/khadas-vim3l_defconfig @@ -30,7 +30,6 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_ADC=y CONFIG_SARADC_MESON=y CONFIG_BUTTON=y diff --git a/configs/khadas-vim_defconfig b/configs/khadas-vim_defconfig index 5565635ab1397cea6e033fab50c9197a2b3113d4..81eeff4982c127d0af06e7ebed740bab4d91a52c 100644 --- a/configs/khadas-vim_defconfig +++ b/configs/khadas-vim_defconfig @@ -27,7 +27,6 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SARADC_MESON=y CONFIG_MMC_MESON_GX=y CONFIG_PHY_MESON_GXL=y diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig index d6624dd9551d54184e800dc8c5d150bdff030038..f4b1abfd6a9d6aa26f4bb77afbedabc7f575fda2 100644 --- a/configs/km_kirkwood_128m16_defconfig +++ b/configs/km_kirkwood_128m16_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/keymile/km_arm/kwbimage_128M16_1.cfg" CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_ENV_SIZE=0x2000 @@ -48,6 +49,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NETCONSOLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_SOFT=y CONFIG_SYS_I2C_SOFT_SLAVE=0x0 diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig index bf696cd2db28883c99c4c1a59cd42f8f4393a0f3..eba4f097775d3d703d5e2b57f607a2792f8c7df8 100644 --- a/configs/km_kirkwood_defconfig +++ b/configs/km_kirkwood_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/keymile/km_arm/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_ENV_SIZE=0x2000 @@ -48,6 +49,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NETCONSOLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_SOFT=y CONFIG_SYS_I2C_SOFT_SLAVE=0x0 diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig index 0731bb5572930fa8c38b831b89140b4fb7bb9c28..5d19c51176021ef06d945a739f59f438f4a2ecc3 100644 --- a/configs/km_kirkwood_pci_defconfig +++ b/configs/km_kirkwood_pci_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/keymile/km_arm/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_KM_FPGA_CONFIG=y @@ -49,6 +50,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NETCONSOLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_SOFT=y CONFIG_SYS_I2C_SOFT_SLAVE=0x0 diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig index 9361e81e8039c9131b4b384fe405870f2c7da653..baffe81a35e1267eaa461773a2ed5faf2d52a764 100644 --- a/configs/kmcent2_defconfig +++ b/configs/kmcent2_defconfig @@ -7,6 +7,7 @@ CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="kmcent2" CONFIG_SYS_BOOTCOUNT_ADDR=0xFB000020 +CONFIG_SYS_CLK_FREQ=66666666 CONFIG_MPC85xx=y CONFIG_TARGET_KMCENT2=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig index 9a56f44c7cc6823c76741cae1d7ab2176748fb52..53f7abc3fd098f379854a31108704aeaf3268a3c 100644 --- a/configs/kmcoge5ne_defconfig +++ b/configs/kmcoge5ne_defconfig @@ -156,6 +156,7 @@ CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_DBYP_PLL_BYPASSED=y CONFIG_LCRR_EADC_2=y CONFIG_LCRR_CLKDIV_4=y +CONFIG_83XX_PCICLK=0x3ef1480 CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y @@ -193,6 +194,18 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_BOOTCOUNT_MEM=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xF0001001 +CONFIG_SYS_OR0_PRELIM=0xF0000E55 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xE8000801 +CONFIG_SYS_OR1_PRELIM=0xFC000E25 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xA0000801 +CONFIG_SYS_OR3_PRELIM=0xF0000E25 +CONFIG_SYS_BR4_PRELIM_BOOL=y +CONFIG_SYS_BR4_PRELIM=0xB0000801 +CONFIG_SYS_OR4_PRELIM=0xF0000E25 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y CONFIG_SYS_FSL_I2C_OFFSET=0x3000 diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig index 12aa23095cced530a1ab41668cd1e002e66908c0..9124504e3232a6af74481af2347f3675f96946c3 100644 --- a/configs/kmcoge5un_defconfig +++ b/configs/kmcoge5un_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/keymile/km_arm/kwbimage_256M8_1.cfg" CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 @@ -52,6 +53,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NETCONSOLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_SOFT=y CONFIG_SYS_I2C_SOFT_SLAVE=0x0 diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig index e1bce4a7d07454dda3bc114d1373614dca259749..228bbe6e8401a59be6fe8e53a921db4195cc497a 100644 --- a/configs/kmeter1_defconfig +++ b/configs/kmeter1_defconfig @@ -163,6 +163,15 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_BOOTCOUNT_MEM=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xF0001001 +CONFIG_SYS_OR0_PRELIM=0xF0000E55 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xE8000801 +CONFIG_SYS_OR1_PRELIM=0xFC000E25 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xA0000801 +CONFIG_SYS_OR3_PRELIM=0xF0000E25 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y CONFIG_SYS_FSL_I2C_OFFSET=0x3000 diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig index 06b2d1fb571d65b46fc40114cb495266134d1497..d81c7876120203c7c2526d542a59a3eb8d559097 100644 --- a/configs/kmnusa_defconfig +++ b/configs/kmnusa_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/keymile/km_arm/kwbimage_128M16_1.cfg" CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_KM_FPGA_CONFIG=y @@ -52,6 +53,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NETCONSOLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_SOFT=y CONFIG_SYS_I2C_SOFT_SLAVE=0x0 diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig index 75ab1ae1a7871bba9ae9eae4400438292282b730..d230638548b89b17118f8d9412f6ca522e7cd7cd 100644 --- a/configs/kmopti2_defconfig +++ b/configs/kmopti2_defconfig @@ -139,6 +139,7 @@ CONFIG_ACR_APARK_MASTER=y CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_EADC_1=y CONFIG_LCRR_CLKDIV_2=y +CONFIG_83XX_PCICLK=0x3ef1480 CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y @@ -174,6 +175,18 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_BOOTCOUNT_MEM=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xF0001001 +CONFIG_SYS_OR0_PRELIM=0xF0000E55 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xE8000801 +CONFIG_SYS_OR1_PRELIM=0xF8000E25 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xA0000801 +CONFIG_SYS_OR2_PRELIM=0xF0000C25 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xB0001001 +CONFIG_SYS_OR3_PRELIM=0xF0000040 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y CONFIG_SYS_FSL_I2C_OFFSET=0x3000 diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig index be5034f4d70f400abca6bfb4754b910f5dc12c53..b0b59262dec34f87c90cacd25868c31a5db86d2e 100644 --- a/configs/kmsupx5_defconfig +++ b/configs/kmsupx5_defconfig @@ -119,6 +119,7 @@ CONFIG_ACR_APARK_MASTER=y CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_EADC_1=y CONFIG_LCRR_CLKDIV_2=y +CONFIG_83XX_PCICLK=0x3ef1480 CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y @@ -153,6 +154,15 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_BOOTCOUNT_MEM=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xF0001001 +CONFIG_SYS_OR0_PRELIM=0xF0000E55 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xE8000801 +CONFIG_SYS_OR1_PRELIM=0xF8000E25 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xA0000801 +CONFIG_SYS_OR2_PRELIM=0xF0000C25 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y CONFIG_SYS_FSL_I2C_OFFSET=0x3000 diff --git a/configs/kmsuse2_defconfig b/configs/kmsuse2_defconfig index a528bf5cfe90485b3955b56ec951e7cf2c3c89a2..d274c9576414ce1d09e2a1403e63267041e03d3d 100644 --- a/configs/kmsuse2_defconfig +++ b/configs/kmsuse2_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/keymile/km_arm/kwbimage_128M16_1.cfg" CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_KM_FPGA_CONFIG=y @@ -53,6 +54,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NETCONSOLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_SOFT=y CONFIG_SYS_I2C_SOFT_SLAVE=0x0 diff --git a/configs/kmtegr1_defconfig b/configs/kmtegr1_defconfig index b683d37ef85d6b308f0437636f0d453dd6b0fac4..53aaf6caa25c8e7f9b449d909fa5e1d4174db07d 100644 --- a/configs/kmtegr1_defconfig +++ b/configs/kmtegr1_defconfig @@ -118,6 +118,7 @@ CONFIG_ACR_APARK_MASTER=y CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_EADC_1=y CONFIG_LCRR_CLKDIV_2=y +CONFIG_83XX_PCICLK=0x3ef1480 CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y @@ -155,6 +156,15 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_BOOTCOUNT_MEM=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xF0001001 +CONFIG_SYS_OR0_PRELIM=0xF0000E55 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xE8000801 +CONFIG_SYS_OR1_PRELIM=0xF8000E25 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xB0001001 +CONFIG_SYS_OR3_PRELIM=0xF0000050 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y CONFIG_SYS_FSL_I2C_OFFSET=0x3000 diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig index 4c5509bfc1295067d964ed129be3b6c5caa92fc8..b333769dc4f540913abe7d98b2a9ea9970546470 100644 --- a/configs/kmtepr2_defconfig +++ b/configs/kmtepr2_defconfig @@ -139,6 +139,7 @@ CONFIG_ACR_APARK_MASTER=y CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_EADC_1=y CONFIG_LCRR_CLKDIV_2=y +CONFIG_83XX_PCICLK=0x3ef1480 CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y @@ -173,6 +174,18 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_BOOTCOUNT_MEM=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xF0001001 +CONFIG_SYS_OR0_PRELIM=0xF0000E55 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xE8000801 +CONFIG_SYS_OR1_PRELIM=0xF8000E25 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xA0000801 +CONFIG_SYS_OR2_PRELIM=0xF0000C25 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xB0001001 +CONFIG_SYS_OR3_PRELIM=0xF0000040 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y CONFIG_SYS_FSL_I2C_OFFSET=0x3000 diff --git a/configs/kontron-sl-mx6ul_defconfig b/configs/kontron-sl-mx6ul_defconfig index 47faca8a268dbba0cd9bfa4a93c19cda62ee03cd..6d67475dc6ad2327e2cef45d854dd55443a84c26 100644 --- a/configs/kontron-sl-mx6ul_defconfig +++ b/configs/kontron-sl-mx6ul_defconfig @@ -29,7 +29,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_LEGACY_IMAGE_SUPPORT=y CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y CONFIG_SPL_SEPARATE_BSS=y -CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8A CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_WATCHDOG=y @@ -55,7 +54,6 @@ CONFIG_OF_LIST="imx6ul-kontron-n631x-s imx6ull-kontron-n641x-s" CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y CONFIG_ENV_SPI_BUS=2 CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig index d8567031a44f787c77bf07d361688d6ff22d46ef..35d12fca325a4de184bf294f4525d99078900b68 100644 --- a/configs/kontron-sl-mx8mm_defconfig +++ b/configs/kontron-sl-mx8mm_defconfig @@ -57,10 +57,6 @@ CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIST="imx8mm-kontron-n801x-s imx8mm-kontron-n801x-s-lvds" CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=80000000 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y diff --git a/configs/kp_imx53_defconfig b/configs/kp_imx53_defconfig index 1246615168698ec15a0100a9ca47dc87790696de..d2e09ac6977c8a2c0dfd8e50778ab9f9e6ec5cff 100644 --- a/configs/kp_imx53_defconfig +++ b/configs/kp_imx53_defconfig @@ -15,6 +15,8 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_STOP_STR="." +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run usbupd; run distro_bootcmd" CONFIG_SILENT_CONSOLE=y # CONFIG_SILENT_CONSOLE_UPDATE_ON_SET is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig index 00c156409ff984ce983f31f675a6d2afdd11ab3f..6c7df1e24dd86c33315adc5c6d9cef20185471c0 100644 --- a/configs/kylin-rk3036_defconfig +++ b/configs/kylin-rk3036_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_ARCH_TIMER=y # CONFIG_SPL_USE_ARCH_MEMCPY is not set # CONFIG_SPL_USE_ARCH_MEMSET is not set CONFIG_ARCH_ROCKCHIP=y diff --git a/configs/legoev3_defconfig b/configs/legoev3_defconfig index 632f35dcbc21f042ed727f302819ed8a5fa21d96..87890cd6a7e96a7a6fc3f9d6f77f7557a40ded56 100644 --- a/configs/legoev3_defconfig +++ b/configs/legoev3_defconfig @@ -8,10 +8,13 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="da850-lego-ev3" CONFIG_SYS_LOAD_ADDR=0xc0700000 +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=0 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autoboot in %d seconds - press 'l' to stop...\n" CONFIG_AUTOBOOT_STOP_STR="l" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="if mmc rescan; then if run loadbootscr; then run bootscript; else if run loadbootenv; then echo Loaded env from ${bootenvfile};run importbootenv;fi;if test -n $uenvcmd; then echo Running uenvcmd...;run uenvcmd;fi;if run loadimage; then run mmcargs; if run loadfdt; then echo Using ${fdtfile}...;run fdtfixup; run fdtboot; fi; run mmcboot; fi; fi; fi; run flashargs; run flashboot" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/libretech-ac_defconfig b/configs/libretech-ac_defconfig index fa4427a815a93fdfc5084055ea15031b50f99629..945521b97d48b490c2c0302551fc9e52d779408a 100644 --- a/configs/libretech-ac_defconfig +++ b/configs/libretech-ac_defconfig @@ -34,13 +34,11 @@ CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SARADC_MESON=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_DM_SPI_FLASH=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MESON_GXL=y diff --git a/configs/libretech-cc_defconfig b/configs/libretech-cc_defconfig index b729308c8eeb25877741c7e4b378f3a8b4d4cb02..b4413ed9b7ff0ee888c086e289a141250006b1a1 100644 --- a/configs/libretech-cc_defconfig +++ b/configs/libretech-cc_defconfig @@ -26,7 +26,6 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SARADC_MESON=y CONFIG_MMC_MESON_GX=y CONFIG_PHY_MESON_GXL=y diff --git a/configs/libretech-cc_v2_defconfig b/configs/libretech-cc_v2_defconfig index 9f8a914bb7412b0c44b88dfcebb9436a7053d3f2..0dae22321c6bea013855e870fdf40f0f637a24da 100644 --- a/configs/libretech-cc_v2_defconfig +++ b/configs/libretech-cc_v2_defconfig @@ -30,13 +30,11 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SARADC_MESON=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_DM_SPI_FLASH=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_PHY_MESON_GXL=y CONFIG_DM_ETH=y diff --git a/configs/libretech-s905d-pc_defconfig b/configs/libretech-s905d-pc_defconfig index bde2bb877ca628db104b2c09916f865a65b43985..ca9619158d9fab898f4c10712b2a079cc8a1b796 100644 --- a/configs/libretech-s905d-pc_defconfig +++ b/configs/libretech-s905d-pc_defconfig @@ -32,12 +32,10 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SARADC_MESON=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_PHY_REALTEK=y CONFIG_DM_ETH=y diff --git a/configs/libretech-s912-pc_defconfig b/configs/libretech-s912-pc_defconfig index 536f9e8d121f3edf638226741afe79a952c039db..02626cbc4976a914fa79ca0920bc7e68f5658246 100644 --- a/configs/libretech-s912-pc_defconfig +++ b/configs/libretech-s912-pc_defconfig @@ -31,12 +31,10 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SARADC_MESON=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_PHY_REALTEK=y CONFIG_DM_ETH=y diff --git a/configs/liteboard_defconfig b/configs/liteboard_defconfig index ab62c20255b407003f452a22e562c321e1d32fb5..041495f57f2943b66ee302df5cf28ffa093a0ed8 100644 --- a/configs/liteboard_defconfig +++ b/configs/liteboard_defconfig @@ -20,6 +20,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=1 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev};if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_DEFAULT_FDT_FILE="imx6ul-liteboard.dtb" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/ls1012a2g5rdb_qspi_defconfig b/configs/ls1012a2g5rdb_qspi_defconfig index cc4a738dfe13e3f476d997943362d9512a8f5c5a..312713e5200af8b620335a5f24a395a1ccad0db8 100644 --- a/configs/ls1012a2g5rdb_qspi_defconfig +++ b/configs/ls1012a2g5rdb_qspi_defconfig @@ -22,6 +22,7 @@ CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000" +CONFIG_BOOTCOMMAND="run distro_bootcmd; run qspi_bootcmd; env exists secureboot && esbc_halt;" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CMD_GREPENV=y @@ -39,7 +40,9 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_FSL_ESDHC=y diff --git a/configs/ls1012a2g5rdb_tfa_defconfig b/configs/ls1012a2g5rdb_tfa_defconfig index 74112bb5170e372b8f621e7cfe5377a89cdb0476..6129881d146c8f6691211e916d6ff60cfde3ea62 100644 --- a/configs/ls1012a2g5rdb_tfa_defconfig +++ b/configs/ls1012a2g5rdb_tfa_defconfig @@ -40,7 +40,9 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_FSL_ESDHC=y diff --git a/configs/ls1012afrdm_qspi_defconfig b/configs/ls1012afrdm_qspi_defconfig index b40c6323e1570aa317f3cd73f93067394132f4bd..ad3b7bff428c860699279c4c797d6a1cfcf2ac4b 100644 --- a/configs/ls1012afrdm_qspi_defconfig +++ b/configs/ls1012afrdm_qspi_defconfig @@ -21,6 +21,7 @@ CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000" +CONFIG_BOOTCOMMAND="run distro_bootcmd;run qspi_bootcmd" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CMD_GREPENV=y @@ -37,6 +38,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y # CONFIG_MMC is not set diff --git a/configs/ls1012afrdm_tfa_defconfig b/configs/ls1012afrdm_tfa_defconfig index 34e3568aab910c1d52b6941207ee6c10cb2bbe11..3317a0592b0ef63744e03e983ff0d3cf77ad2f4c 100644 --- a/configs/ls1012afrdm_tfa_defconfig +++ b/configs/ls1012afrdm_tfa_defconfig @@ -38,6 +38,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y # CONFIG_MMC is not set diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig index e878a2ca844ed8e6176bf26160508bb49823feb2..cb8b288c396308adecf8241e3b5536430233d6de 100644 --- a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig @@ -20,6 +20,7 @@ CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000" +CONFIG_BOOTCOMMAND="run distro_bootcmd; run sd_bootcmd; env exists secureboot && esbc_halt;" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CMD_GREPENV=y @@ -37,6 +38,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_FSL_ESDHC=y diff --git a/configs/ls1012afrwy_qspi_defconfig b/configs/ls1012afrwy_qspi_defconfig index 8ed1336cf007bbc9671417205119df046f02d453..610f32cd9990edba20079559dced0d808d7f6889 100644 --- a/configs/ls1012afrwy_qspi_defconfig +++ b/configs/ls1012afrwy_qspi_defconfig @@ -21,6 +21,7 @@ CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000" +CONFIG_BOOTCOMMAND="run distro_bootcmd; run sd_bootcmd; env exists secureboot && esbc_halt;" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CMD_GREPENV=y @@ -42,6 +43,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_FSL_ESDHC=y diff --git a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig index 83ee702d0b5f404804132b7502e4463c2e6c19a8..b3cb6f706dc8ec4116e061b55c206340f974d95d 100644 --- a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig @@ -38,6 +38,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_FSL_ESDHC=y diff --git a/configs/ls1012afrwy_tfa_defconfig b/configs/ls1012afrwy_tfa_defconfig index 44d50172e2fd2e60d820e5b3c45f14d7e91e3036..afec07cf8e3db3f6101c24bc0ab75df07fc59eba 100644 --- a/configs/ls1012afrwy_tfa_defconfig +++ b/configs/ls1012afrwy_tfa_defconfig @@ -42,6 +42,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_FSL_ESDHC=y diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig index 692c83fe1614108b46587c352a3a534715223943..93e76d95f1ed9bf3f9bc34e0ff0727604729ec96 100644 --- a/configs/ls1012aqds_qspi_defconfig +++ b/configs/ls1012aqds_qspi_defconfig @@ -22,7 +22,7 @@ CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run distro_bootcmd; run qspi_bootcmd; env exists secureboot && esbc_halt;" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y @@ -45,17 +45,15 @@ CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y CONFIG_ENV_SPI_BUS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=1000000 -CONFIG_USE_ENV_SPI_MODE=y CONFIG_ENV_SPI_MODE=0x03 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 @@ -65,7 +63,10 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_SF_DEFAULT_SPEED=10000000 # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_FSL_PFE=y CONFIG_DM_ETH=y diff --git a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig index dd472baec510ebb03990b7e8a34ce956fa4143d3..476ebd04151848e44e5a2e7ca909af3a64844164 100644 --- a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig @@ -45,6 +45,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 @@ -54,7 +55,10 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_SF_DEFAULT_SPEED=10000000 # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_FSL_PFE=y CONFIG_DM_ETH=y diff --git a/configs/ls1012aqds_tfa_defconfig b/configs/ls1012aqds_tfa_defconfig index 10f6ddfab3915be1bf9842225396e8714065c9c9..d4d9b8f76bd8fd24d801924a5e3605895d228d77 100644 --- a/configs/ls1012aqds_tfa_defconfig +++ b/configs/ls1012aqds_tfa_defconfig @@ -46,17 +46,15 @@ CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y CONFIG_ENV_SPI_BUS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=1000000 -CONFIG_USE_ENV_SPI_MODE=y CONFIG_ENV_SPI_MODE=0x03 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 @@ -66,7 +64,10 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_SF_DEFAULT_SPEED=10000000 # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_FSL_PFE=y CONFIG_DM_ETH=y diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig index 4270f3a7a87620f2e302b05b015f34d8afd62c8b..8767c87cc63c29da06816b1ef907040a38cf747d 100644 --- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig @@ -21,7 +21,7 @@ CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run distro_bootcmd; run qspi_bootcmd; env exists secureboot && esbc_halt;" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CMD_GREPENV=y @@ -41,6 +41,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_FSL_ESDHC=y diff --git a/configs/ls1012ardb_qspi_defconfig b/configs/ls1012ardb_qspi_defconfig index 0f61fa336b963ded03ec57c573b04c44ac41c38e..fccbef70ea37f6d41bc9fe1a13ecbdf1879709c3 100644 --- a/configs/ls1012ardb_qspi_defconfig +++ b/configs/ls1012ardb_qspi_defconfig @@ -22,6 +22,7 @@ CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000" +CONFIG_BOOTCOMMAND="run distro_bootcmd; run qspi_bootcmd; env exists secureboot && esbc_halt;" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CMD_GREPENV=y @@ -43,6 +44,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_FSL_ESDHC=y diff --git a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig index 7527271c78f24db35a4af8710d24849f87b76655..bf352868480466f1603aa5c4c38d4135dd290587 100644 --- a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig @@ -41,6 +41,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_FSL_ESDHC=y diff --git a/configs/ls1012ardb_tfa_defconfig b/configs/ls1012ardb_tfa_defconfig index 652e459a852401ef3867b2e6a7b9e90367ff5c0d..7a175d3c7496927b1718bef5c3f3a4df1512f187 100644 --- a/configs/ls1012ardb_tfa_defconfig +++ b/configs/ls1012ardb_tfa_defconfig @@ -43,6 +43,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_FSL_ESDHC=y diff --git a/configs/ls1021aiot_qspi_defconfig b/configs/ls1021aiot_qspi_defconfig index 2a999e87984a4a4d41175bd53600bba26f020b1c..4705e34e1d9db1e9fea91b8e108031715628f929 100644 --- a/configs/ls1021aiot_qspi_defconfig +++ b/configs/ls1021aiot_qspi_defconfig @@ -13,6 +13,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart" CONFIG_AHCI=y CONFIG_SYS_LOAD_ADDR=0x82000000 +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_QSPI_BOOT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y @@ -44,6 +46,7 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x51 CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_GIGE=y diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig index f25c9c7b70371a85cc7e1080cfc37562e28decf6..e387264d8956359fbcd037c8cab020b025b9c57f 100644 --- a/configs/ls1021aiot_sdcard_defconfig +++ b/configs/ls1021aiot_sdcard_defconfig @@ -18,10 +18,13 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_AHCI=y CONFIG_SYS_LOAD_ADDR=0x82000000 -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT,SD_BOOT_QSPI" +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021aiot/ls102xa_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021aiot/ls102xa_rcw_sd.cfg" +CONFIG_SD_BOOT=y +CONFIG_SD_BOOT_QSPI=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y @@ -60,6 +63,7 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x51 CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_GIGE=y @@ -70,6 +74,7 @@ CONFIG_NVME=y CONFIG_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE_RC=y +CONFIG_U_QE=y CONFIG_SYS_QE_FW_ADDR=0xf40000 CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig index 8571ca392e403c4cfcd55f0cd64ae6676c3f04d6..79ccc41a4398b4137cd643bec73dfb019824f294 100644 --- a/configs/ls1021aqds_ddr4_nor_defconfig +++ b/configs/ls1021aqds_ddr4_nor_defconfig @@ -20,6 +20,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -54,6 +55,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig index ff274777400c11342e31574a39433ad5f83932e1..0a2a0763321c77fc1a170a726c24e5e4c164b67b 100644 --- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig +++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig @@ -21,6 +21,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="LPUART" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -55,6 +56,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index d6b36e61bceeaaac2855ee89ee2ecce0750eba53..0b12f100d46fa28b2d4cb08012f8b9133ef0c871 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -28,6 +28,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="NAND_BOOT" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021aqds/ls102xa_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg" @@ -76,6 +77,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig index 725e2f44122719f193c68e5a6c24e5db67733f59..63930e4a1310a0363972027329552940c606ae9e 100644 --- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig @@ -21,6 +21,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -53,6 +54,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig index 3a2fe0313905692c56a53c6ab8234398da38dc37..f4e2274fb8a7df3b5e6af3b52c51c7e1fdd5efa5 100644 --- a/configs/ls1021aqds_nor_defconfig +++ b/configs/ls1021aqds_nor_defconfig @@ -20,6 +20,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -55,6 +56,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig index 6a0523b8e01cf74b1ebb51facaab7cf21fde557d..0eacaa3354ed5248db0a5a9729bf678773a1aeb4 100644 --- a/configs/ls1021aqds_nor_lpuart_defconfig +++ b/configs/ls1021aqds_nor_lpuart_defconfig @@ -21,6 +21,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="LPUART" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -56,6 +57,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig index a787ce0b7ca266027b39d9743b040ef7a668d472..f967619ef9d51af433685c8cadcd4747dc369613 100644 --- a/configs/ls1021aqds_qspi_defconfig +++ b/configs/ls1021aqds_qspi_defconfig @@ -54,6 +54,7 @@ CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index e9efcd7fbcc16c63203505018cd72026aba1fad6..fa190a7502aea8072724f869c76d2ca388ddb56d 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -26,7 +26,7 @@ CONFIG_AHCI=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021aqds/ls102xa_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021aqds/ls102xa_rcw_sd_ifc.cfg" @@ -74,6 +74,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index 082ef4c54f7c68b575fb782bbca3c25ef5721b42..625dd086abf56758a0491bc1a56d2cfff5eda2a1 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -26,11 +26,11 @@ CONFIG_AHCI=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT,SD_BOOT_QSPI" CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021aqds/ls102xa_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021aqds/ls102xa_rcw_sd_qspi.cfg" CONFIG_SD_BOOT=y +CONFIG_SD_BOOT_QSPI=y CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -71,6 +71,7 @@ CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021atsn_qspi_defconfig b/configs/ls1021atsn_qspi_defconfig index d92fdf4a1536b00efb65563d25968a02ae28fc22..5c8cee3ea91523c46da17b1fa9f1f507e081e7d0 100644 --- a/configs/ls1021atsn_qspi_defconfig +++ b/configs/ls1021atsn_qspi_defconfig @@ -35,6 +35,7 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DM_I2C=y @@ -53,8 +54,10 @@ CONFIG_PHY_BROADCOM=y CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y CONFIG_DM_MDIO=y +CONFIG_DM_DSA=y CONFIG_PHY_GIGE=y CONFIG_MII=y +CONFIG_SJA1105=y CONFIG_TSEC_ENET=y CONFIG_NVME=y CONFIG_PCI=y diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig index a745857b92900cc7d50e63cb7d3002e0fae65529..a3b8f248c7d5fbdd27f38805cd8f0722ccba6b50 100644 --- a/configs/ls1021atsn_sdcard_defconfig +++ b/configs/ls1021atsn_sdcard_defconfig @@ -22,11 +22,12 @@ CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI" +CONFIG_SYS_EXTRA_OPTIONS="SPL_FSL_PBL" CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021atsn/ls102xa_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021atsn/ls102xa_rcw_sd.cfg" CONFIG_SD_BOOT=y +CONFIG_SD_BOOT_QSPI=y CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y CONFIG_MISC_INIT_R=y @@ -50,6 +51,7 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DM_I2C=y @@ -68,8 +70,10 @@ CONFIG_PHY_BROADCOM=y CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y CONFIG_DM_MDIO=y +CONFIG_DM_DSA=y CONFIG_PHY_GIGE=y CONFIG_MII=y +CONFIG_SJA1105=y CONFIG_TSEC_ENET=y CONFIG_NVME=y CONFIG_PCI=y diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig index 3bd0e1da50f381820a1ce6a188d8b93f94c7ff0f..f61d29ce89acd2a7ac4ac38982035df12b0d912a 100644 --- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig @@ -24,6 +24,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" +CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd;env exists secureboot && esbc_halt;" CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_MISC_INIT_R=y @@ -43,6 +44,7 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_DM=y CONFIG_SATA_CEVA=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig index 548ec897bc07176a58e2765245b810d4fd07d61e..02c25cda7d3406dc5beef027f3cd1b3ee46a162a 100644 --- a/configs/ls1021atwr_nor_defconfig +++ b/configs/ls1021atwr_nor_defconfig @@ -23,6 +23,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" +CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd;env exists secureboot && esbc_halt;" CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_MISC_INIT_R=y @@ -45,6 +46,7 @@ CONFIG_ENV_ADDR=0x60300000 CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig index f7ccb4b30e2ed7c65839b52b98db9b020913d13f..49d6dda6a54b13eee41bc7ce46180c502a099d2b 100644 --- a/configs/ls1021atwr_nor_lpuart_defconfig +++ b/configs/ls1021atwr_nor_lpuart_defconfig @@ -24,7 +24,7 @@ CONFIG_SYS_EXTRA_OPTIONS="LPUART" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd;env exists secureboot && esbc_halt;" CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_MISC_INIT_R=y @@ -47,6 +47,7 @@ CONFIG_ENV_ADDR=0x60300000 CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig index 16af46177e7e50724424d3a484d23dce476e307f..36a8aee0b112e542578434f21ee1469051761e6f 100644 --- a/configs/ls1021atwr_qspi_defconfig +++ b/configs/ls1021atwr_qspi_defconfig @@ -25,7 +25,7 @@ CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run distro_bootcmd; run qspi_bootcmd; env exists secureboot && esbc_halt" CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_MISC_INIT_R=y @@ -47,6 +47,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index 404b33f938f9670e23f9e8de92cb22ef6824b4f3..756e072f9cb77f37e9e84e1925760f111980a141 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -27,13 +27,14 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT" CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021atwr/ls102xa_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021atwr/ls102xa_rcw_sd_ifc.cfg" +CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=0 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" +CONFIG_BOOTCOMMAND="run distro_bootcmd; run sd_bootcmd; env exists secureboot && esbc_halt;" CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_MISC_INIT_R=y @@ -62,6 +63,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y # CONFIG_SPL_DM_I2C is not set CONFIG_SPL_SYS_I2C_LEGACY=y @@ -83,6 +85,7 @@ CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_PCI=y CONFIG_PCIE_LAYERSCAPE_RC=y +CONFIG_U_QE=y CONFIG_SYS_QE_FW_ADDR=0x940000 CONFIG_SYS_NS16550=y CONFIG_USB=y diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index 1377ce64621c8588c99228dbff56f1a7a4bd3fca..ede4c95dd11d34840184ef19881aefbdd75e2f9a 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -27,7 +27,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT" CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021atwr/ls102xa_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021atwr/ls102xa_rcw_sd_ifc.cfg" @@ -35,6 +34,7 @@ CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" +CONFIG_BOOTCOMMAND="run distro_bootcmd; run sd_bootcmd; env exists secureboot && esbc_halt;" CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_MISC_INIT_R=y @@ -64,6 +64,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index 84bab312187e0582762316f64dc90125a387803d..1315043094c07bec178f58f0e1e11c3339fc301d 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -27,14 +27,15 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT,SD_BOOT_QSPI" CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021atwr/ls102xa_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021atwr/ls102xa_rcw_sd_qspi.cfg" CONFIG_SD_BOOT=y +CONFIG_SD_BOOT_QSPI=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" +CONFIG_BOOTCOMMAND="run distro_bootcmd; run qspi_bootcmd; env exists secureboot && esbc_halt" CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_MISC_INIT_R=y @@ -63,6 +64,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig index 2c4a60e38c75bd56d427f1424dec662d740cf1f8..2fb90735ab64f09c443bc13e595dc8b39c67bbc9 100644 --- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig @@ -37,6 +37,7 @@ CONFIG_CMD_PCI=y CONFIG_CMD_USB=y CONFIG_CMD_WDT=y CONFIG_CMD_CACHE=y +CONFIG_MP=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_NET_RANDOM_ETHADDR=y @@ -45,6 +46,7 @@ CONFIG_DM=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y # CONFIG_DDR_SPD is not set +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig index 0aa91b183bf855021debcc3518c49c76951823d5..0bdca833f1313f05897d3c0c638339f2525927b3 100644 --- a/configs/ls1028aqds_tfa_defconfig +++ b/configs/ls1028aqds_tfa_defconfig @@ -39,6 +39,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_WDT=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y +CONFIG_MP=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y @@ -51,6 +52,7 @@ CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y # CONFIG_DDR_SPD is not set +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y diff --git a/configs/ls1028aqds_tfa_lpuart_defconfig b/configs/ls1028aqds_tfa_lpuart_defconfig index 0a761669873bd470220461109ce7121b69c8ea88..dbf6af99f51f8882f032e73e9b7131556a1ac120 100644 --- a/configs/ls1028aqds_tfa_lpuart_defconfig +++ b/configs/ls1028aqds_tfa_lpuart_defconfig @@ -39,6 +39,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_WDT=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y +CONFIG_MP=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y @@ -51,6 +52,7 @@ CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y # CONFIG_DDR_SPD is not set +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig index c385978d37a9fb29acbb1432abb74ee65303b71d..5cb55d046d442f558104a889fa961278a8f455a9 100644 --- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig @@ -36,6 +36,7 @@ CONFIG_CMD_PCI=y CONFIG_CMD_USB=y CONFIG_CMD_WDT=y CONFIG_CMD_CACHE=y +CONFIG_MP=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_NET_RANDOM_ETHADDR=y @@ -44,6 +45,7 @@ CONFIG_DM=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y # CONFIG_DDR_SPD is not set +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig index 035974afd8f9c750c2f4a87051848c10a9d81f22..b58254dc6522e6a10bb800556efb73a41eee1192 100644 --- a/configs/ls1028ardb_tfa_defconfig +++ b/configs/ls1028ardb_tfa_defconfig @@ -38,6 +38,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_WDT=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y +CONFIG_MP=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y @@ -50,6 +51,7 @@ CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y # CONFIG_DDR_SPD is not set +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index d6d64deaef8c35c2ef3d2d20c1bb81c74d8ba2bf..1a484ff483a012376aaa4268311ba9a7fa943357 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -14,11 +14,16 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" @@ -49,6 +54,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -63,6 +69,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig index ba3a382958a18c3219654bb603af95d454c002d7..dfd7fb881b3694bc75203b346d989d6774f89093 100644 --- a/configs/ls1043aqds_lpuart_defconfig +++ b/configs/ls1043aqds_lpuart_defconfig @@ -14,12 +14,17 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="LPUART" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" @@ -50,6 +55,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -64,6 +70,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index e2dd6e61ac61f115f13dd652e39ae9dbb30a6b29..9e87f0fd8864803c368330ef78b1cada1d07ad17 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -17,6 +17,10 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -26,6 +30,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="NAND_BOOT" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1043aqds/ls1043aqds_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1043aqds/ls1043aqds_rcw_nand.cfg" @@ -69,6 +74,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -84,6 +90,9 @@ CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig index 8dd5faf259910a132e4f137c16f9efedac008a60..bffe105220edf656762027aeb0ecfe2058447605 100644 --- a/configs/ls1043aqds_nor_ddr3_defconfig +++ b/configs/ls1043aqds_nor_ddr3_defconfig @@ -14,11 +14,16 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" @@ -50,6 +55,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -64,6 +70,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig index 6b13c492f0b139f01e78e54808a7dcef249bab50..e01324ccef6810f817db3b21a42715d6f91ba3af 100644 --- a/configs/ls1043aqds_qspi_defconfig +++ b/configs/ls1043aqds_qspi_defconfig @@ -15,11 +15,16 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y @@ -50,6 +55,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EARLY_INIT=y @@ -57,7 +63,10 @@ CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index 31aa2be844716c5268b802646597be000c2a6baa..b487b370b52565188e94140393109d422aba809d 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -17,6 +17,10 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y @@ -26,7 +30,7 @@ CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1043aqds/ls1043aqds_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1043aqds/ls1043aqds_rcw_sd_ifc.cfg" @@ -69,6 +73,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -83,6 +88,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index 8c6a3df880ebf145b3838ff9e8318c3d8fa1b87f..084d104ea44442614da3f6f33c05dfd191c529ce 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -17,6 +17,10 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y @@ -26,11 +30,12 @@ CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT,SD_BOOT_QSPI" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1043aqds/ls1043aqds_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1043aqds/ls1043aqds_rcw_sd_qspi.cfg" CONFIG_SD_BOOT=y +CONFIG_SD_BOOT_QSPI=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" @@ -67,6 +72,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EARLY_INIT=y @@ -74,7 +80,10 @@ CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig index a680590c1e2fe5b7538d9ce24a42e218123f1082..3e303c5311f6cdc14c09c5d6b04352d658daaaf1 100644 --- a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig @@ -15,12 +15,17 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" @@ -48,6 +53,7 @@ CONFIG_SATA_CEVA=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EARLY_INIT=y @@ -64,7 +70,10 @@ CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SF_DEFAULT_BUS=1 # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1043aqds_tfa_defconfig b/configs/ls1043aqds_tfa_defconfig index cce59cdb5a58a6db9375709f140e39cf51d8ccdb..8d02bed8e1c80fa973af5af69121b8bdcd956583 100644 --- a/configs/ls1043aqds_tfa_defconfig +++ b/configs/ls1043aqds_tfa_defconfig @@ -16,12 +16,17 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" @@ -48,7 +53,6 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_NAND=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y CONFIG_ENV_SPI_BUS=0 CONFIG_ENV_ADDR=0x60500000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y @@ -58,6 +62,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EARLY_INIT=y @@ -74,7 +79,10 @@ CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SF_DEFAULT_BUS=1 # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index 8d6d4015df9ab84800378de6bc2657adcc350736..2d85f671cc2e7a41da9fd260403c796d920b8453 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -18,6 +18,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" +CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 @@ -36,6 +37,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_DM=y # CONFIG_DDR_SPD is not set CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -50,6 +52,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_REALTEK=y CONFIG_PHY_VITESSE=y diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig index 331d5e1f5a376f54e10bbe197b39d6a5af4a2e37..ca6958fdb4424819c0a49b70c1610d41403ace59 100644 --- a/configs/ls1043ardb_defconfig +++ b/configs/ls1043ardb_defconfig @@ -18,6 +18,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" +CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 @@ -39,6 +40,7 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y # CONFIG_DDR_SPD is not set CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -53,6 +55,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index 94b4f13ed42f4af523dbb8c9b09a38dc2a059524..bbc775a4d9afe34e1190724cdd146af9ec2f40a7 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -52,6 +52,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SPL_DM=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x53 @@ -66,6 +67,9 @@ CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index a188dd03fe43e0e4e0e0ec89d0af5c51acc49c2f..e8986db42be8abda0b83a09df9045518ef97ee78 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -59,6 +59,7 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_FSL_CAAM=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -74,6 +75,9 @@ CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index 762f349ba122ac022777cf1725ba32441b21bd97..31380eb85be7bbf2842346be3545e5bce490857e 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -18,7 +18,6 @@ CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT" CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1043ardb/ls1043ardb_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1043ardb/ls1043ardb_rcw_sd.cfg" @@ -26,6 +25,7 @@ CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" +CONFIG_BOOTCOMMAND="run distro_bootcmd; run sd_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y @@ -53,6 +53,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x53 @@ -67,6 +68,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_REALTEK=y CONFIG_PHY_VITESSE=y diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index ba0b2cdca178dc7c8d35d02beeb4bf9c50b4f932..c399ed08918259328e34335210566d04e32d7549 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -22,7 +22,6 @@ CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT" CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1043ardb/ls1043ardb_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1043ardb/ls1043ardb_rcw_sd.cfg" @@ -30,6 +29,7 @@ CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" +CONFIG_BOOTCOMMAND="run distro_bootcmd; run sd_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y @@ -58,6 +58,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_FSL_CAAM=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -72,6 +73,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig index 966a3ff7d150340e7edfef26e5b78a2f8cce228d..8ac9a06c721ba48c57a0a1988efdb1bf81f1a691 100644 --- a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig @@ -38,6 +38,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_DM=y # CONFIG_DDR_SPD is not set CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -52,6 +53,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_REALTEK=y CONFIG_PHY_VITESSE=y diff --git a/configs/ls1043ardb_tfa_defconfig b/configs/ls1043ardb_tfa_defconfig index 7e741c7183bb16670f2ea1e4695f58c2fd58334f..99c125731ffb375cc3965b1991f693f6f19bc34b 100644 --- a/configs/ls1043ardb_tfa_defconfig +++ b/configs/ls1043ardb_tfa_defconfig @@ -44,6 +44,7 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y # CONFIG_DDR_SPD is not set CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -58,6 +59,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig index 0b14f273986064d1b48c6f18ef87a2d93e90474f..cd1915bc812fe6e118a7529a89f30acea154b5f4 100644 --- a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig @@ -35,6 +35,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y # CONFIG_DDR_SPD is not set +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x52 diff --git a/configs/ls1046afrwy_tfa_defconfig b/configs/ls1046afrwy_tfa_defconfig index 85db989f96e37e4d54f2224001b430729cd3841b..af07b1cd463b370e9752b4e8621e8ef4a4c2037c 100644 --- a/configs/ls1046afrwy_tfa_defconfig +++ b/configs/ls1046afrwy_tfa_defconfig @@ -41,6 +41,7 @@ CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y # CONFIG_DDR_SPD is not set +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x52 diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig index eb32965146ce6318366a077d89d9a67b81e4c94a..55426320d8076753657686c1a8c5d99d95edf9b0 100644 --- a/configs/ls1046aqds_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_SECURE_BOOT_defconfig @@ -14,15 +14,20 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd; env exists secureboot && esbc_halt;;" CONFIG_MISC_INIT_R=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y @@ -47,6 +52,7 @@ CONFIG_SATA_CEVA=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig index a8d9441df312bc54ec6670d57bec7ca2fea76cec..f136aeafaefe682c1cef32af0ddfdfadd3e58890 100644 --- a/configs/ls1046aqds_defconfig +++ b/configs/ls1046aqds_defconfig @@ -14,15 +14,20 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd; env exists secureboot && esbc_halt;;" CONFIG_MISC_INIT_R=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y @@ -50,6 +55,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig index e41c91619e984f1b08ab6938db88a5e7c170abb2..6d448905ef431612e332152fb7eefaa114e4a8b8 100644 --- a/configs/ls1046aqds_lpuart_defconfig +++ b/configs/ls1046aqds_lpuart_defconfig @@ -14,16 +14,21 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-lpuart" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="LPUART" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd; env exists secureboot && esbc_halt;;" CONFIG_MISC_INIT_R=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y @@ -51,6 +56,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig index 25a178f793e2e97605dca9a152e68bf227fb69f8..e4cd4a2f6005df7e188f8ac6a54f9784631db005 100644 --- a/configs/ls1046aqds_nand_defconfig +++ b/configs/ls1046aqds_nand_defconfig @@ -17,6 +17,10 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -25,6 +29,7 @@ CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1046aqds/ls1046aqds_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1046aqds/ls1046aqds_rcw_nand.cfg" @@ -32,7 +37,7 @@ CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run distro_bootcmd; run nand_bootcmd; env exists secureboot && esbc_halt;;" CONFIG_MISC_INIT_R=y CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y @@ -69,6 +74,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig index dad335af1d6fbcf34e9a57ae07f35241ba235205..fe295c51e42ce58a7646e2927b39ffb02a9373dc 100644 --- a/configs/ls1046aqds_qspi_defconfig +++ b/configs/ls1046aqds_qspi_defconfig @@ -15,16 +15,21 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:2m(uboot),14m(free)" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd; env exists secureboot && esbc_halt;;" CONFIG_MISC_INIT_R=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y @@ -51,6 +56,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_EARLY_INIT=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index d9d4bf264abe180d1f14df1a248d1e02e40e04b7..fe1fe6f1626ae02d0218ead4f2c1f5d8ef958369 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -17,6 +17,10 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y @@ -26,6 +30,7 @@ CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1046aqds/ls1046aqds_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1046aqds/ls1046aqds_rcw_sd_ifc.cfg" @@ -33,7 +38,7 @@ CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run distro_bootcmd; run sd_bootcmd; env exists secureboot && esbc_halt;;" CONFIG_MISC_INIT_R=y CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y @@ -70,6 +75,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index 10b3b668ad42ffcdc4f669e07e2c48b618f096dd..18f560e9473df81a5a238a70772349876a09fdb6 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -17,6 +17,10 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y @@ -26,15 +30,16 @@ CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT_QSPI" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1046aqds/ls1046aqds_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1046aqds/ls1046aqds_rcw_sd_qspi.cfg" CONFIG_SD_BOOT=y +CONFIG_SD_BOOT_QSPI=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:2m(uboot),14m(free)" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run distro_bootcmd; run sd_bootcmd; env exists secureboot && esbc_halt;;" CONFIG_MISC_INIT_R=y CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y @@ -69,6 +74,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_EARLY_INIT=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig index a73ced200c497bae4bc045faa132065c4313c112..b84f8772c619039a0cf8966f689369588122f479 100644 --- a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig @@ -15,12 +15,17 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" @@ -49,6 +54,7 @@ CONFIG_SATA_CEVA=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_EARLY_INIT=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1046aqds_tfa_defconfig b/configs/ls1046aqds_tfa_defconfig index 4bf413c0eb58d1433a7af1136fc29b2263c4bed0..f706dd6179c4488688134c622b62e852c7f2a42c 100644 --- a/configs/ls1046aqds_tfa_defconfig +++ b/configs/ls1046aqds_tfa_defconfig @@ -16,12 +16,17 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" @@ -49,7 +54,6 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_NAND=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y CONFIG_ENV_SPI_BUS=0 CONFIG_ENV_ADDR=0x60500000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y @@ -59,6 +63,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_EARLY_INIT=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig index 0fb5998a4b5aa2f143f1036097ebec4ba20e0d98..46301fb1837e23d108f32fedfe376711b210a715 100644 --- a/configs/ls1046ardb_emmc_defconfig +++ b/configs/ls1046ardb_emmc_defconfig @@ -63,6 +63,7 @@ CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x53 diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig index a50f381f0849110cbffa1f1a2133821b05826999..a4696f1a16cfdfed4447fec1e0f487123a8ba681 100644 --- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig @@ -24,6 +24,7 @@ CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_BOOTCOMMAND="run distro_bootcmd; run qspi_bootcmd; env exists secureboot && esbc_halt;;" CONFIG_MISC_INIT_R=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y @@ -44,6 +45,7 @@ CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x53 diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig index eeb0b8ac8591db3eaf6360b52c18614bf0a044f4..1837833a8d6627ed58c970c7a2a628734a278b61 100644 --- a/configs/ls1046ardb_qspi_defconfig +++ b/configs/ls1046ardb_qspi_defconfig @@ -25,6 +25,7 @@ CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_BOOTCOMMAND="run distro_bootcmd; run qspi_bootcmd; env exists secureboot && esbc_halt;;" CONFIG_MISC_INIT_R=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y @@ -48,6 +49,7 @@ CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x53 diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig index 4556713b8a5d16891963c2f9045268544e594407..777b7678a3b913b8b7b90e68f6bb5b09e91a60ca 100644 --- a/configs/ls1046ardb_qspi_spl_defconfig +++ b/configs/ls1046ardb_qspi_spl_defconfig @@ -34,6 +34,7 @@ CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_BOOTCOMMAND="run distro_bootcmd; run qspi_bootcmd; env exists secureboot && esbc_halt;;" CONFIG_MISC_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_ENV_SUPPORT=y @@ -67,6 +68,7 @@ CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x53 diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig index 47c63217ce0de19874be5e2a0285fc3bd13cd65f..2abbbaf6db3bd1517df060f58d2d15ef9f32d91c 100644 --- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -29,6 +29,7 @@ CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_BOOTCOMMAND="run distro_bootcmd;run sd_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y @@ -58,6 +59,7 @@ CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y # CONFIG_SPL_DM_I2C is not set CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig index 0ea465c698d002aee1146c04a076a9a71bdc4896..ac8f2bcb1bb3221c84217c61af96993fdae33c77 100644 --- a/configs/ls1046ardb_sdcard_defconfig +++ b/configs/ls1046ardb_sdcard_defconfig @@ -30,6 +30,7 @@ CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_BOOTCOMMAND="run distro_bootcmd;run sd_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y @@ -61,6 +62,7 @@ CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x53 diff --git a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig index 995daae10ebe324ca185e2277867ed714afbaa84..bd1dc05c5803ab24fb0aef6d3bb58e542b9c8803 100644 --- a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig @@ -41,6 +41,7 @@ CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x53 diff --git a/configs/ls1046ardb_tfa_defconfig b/configs/ls1046ardb_tfa_defconfig index 3501764e6f100262ddafbc2a074a55b6a81c544e..149091af4a7a8372ce6834596167b74f73eb5cbb 100644 --- a/configs/ls1046ardb_tfa_defconfig +++ b/configs/ls1046ardb_tfa_defconfig @@ -47,6 +47,7 @@ CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x53 diff --git a/configs/ls1088aqds_defconfig b/configs/ls1088aqds_defconfig index 51e5622226bd912d7bfd33769e77de1e9a26cfbf..a2b2a34e3f3990c38ef9c1730c3c2948d803913c 100644 --- a/configs/ls1088aqds_defconfig +++ b/configs/ls1088aqds_defconfig @@ -11,14 +11,22 @@ CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="ls1088aqds_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="fsl_mc lazyapply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y @@ -48,6 +56,7 @@ CONFIG_SATA_CEVA=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EARLY_INIT=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 diff --git a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig index f108c3866985782b008821533598f1319f6dd411..dbcd6e2ea2e9dfc655a9171779cba29be11c3de5 100644 --- a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig @@ -11,6 +11,11 @@ CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="ls1088aqds_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y @@ -22,7 +27,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_QSPI_BOOT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="sf probe 0:0;sf read 0x80001000 0xd00000 0x100000; fsl_mc lazyapply dpl 0x80001000 && sf read $kernel_load $kernel_start $kernel_size && bootm $kernel_load" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CMD_GREPENV=y @@ -46,6 +51,7 @@ CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y @@ -55,7 +61,10 @@ CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y diff --git a/configs/ls1088aqds_qspi_defconfig b/configs/ls1088aqds_qspi_defconfig index 37d42f35b7e207bb56c44aeba1adcca81c489cf6..7033c92897b7add1241aa671713cdd53249e2408 100644 --- a/configs/ls1088aqds_qspi_defconfig +++ b/configs/ls1088aqds_qspi_defconfig @@ -12,6 +12,11 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="ls1088aqds_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y @@ -23,7 +28,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_QSPI_BOOT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="sf probe 0:0;sf read 0x80001000 0xd00000 0x100000; fsl_mc lazyapply dpl 0x80001000 && sf read $kernel_load $kernel_start $kernel_size && bootm $kernel_load" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CMD_GREPENV=y @@ -49,6 +54,7 @@ CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y @@ -58,7 +64,10 @@ CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig index 5a85ac40e4e1f078aaa4d3db298fdd614188cd6d..e5372317c3c228a5f2517b80a07848a3c2adae8c 100644 --- a/configs/ls1088aqds_sdcard_ifc_defconfig +++ b/configs/ls1088aqds_sdcard_ifc_defconfig @@ -14,6 +14,11 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_SPL_TEXT_BASE=0x1800a000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="ls1088aqds_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y @@ -22,9 +27,12 @@ CONFIG_SPL=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_OF_BOARD_SETUP=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_SD_BOOT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmcinfo;mmc read 0x80001000 0x6800 0x800; fsl_mc lazyapply dpl 0x80001000 && mmc read $kernel_load $kernel_start $kernel_size && bootm $kernel_load" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y @@ -59,6 +67,7 @@ CONFIG_SATA_CEVA=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EARLY_INIT=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig index bd43c859b2cdd78b458b8ea52ffe4327d841ca47..9df98452967fdb83fc32acfe99976c59a9cfbb30 100644 --- a/configs/ls1088aqds_sdcard_qspi_defconfig +++ b/configs/ls1088aqds_sdcard_qspi_defconfig @@ -14,6 +14,11 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_SPL_TEXT_BASE=0x1800a000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="ls1088aqds_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y @@ -24,11 +29,11 @@ CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT_QSPI" CONFIG_SD_BOOT=y +CONFIG_SD_BOOT_QSPI=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="mmcinfo;mmc read 0x80001000 0x6800 0x800; fsl_mc lazyapply dpl 0x80001000 && mmc read $kernel_load $kernel_start $kernel_size && bootm $kernel_load" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y @@ -59,6 +64,7 @@ CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y @@ -68,7 +74,10 @@ CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y diff --git a/configs/ls1088aqds_tfa_defconfig b/configs/ls1088aqds_tfa_defconfig index eeb43134204ddbdf20de44d8822f3e0e56ea66bc..aac8486bc3b7227ef53a4bb325ffabe8204b77c6 100644 --- a/configs/ls1088aqds_tfa_defconfig +++ b/configs/ls1088aqds_tfa_defconfig @@ -14,6 +14,11 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="ls1088aqds_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y @@ -22,9 +27,9 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" -# CONFIG_USE_BOOTCOMMAND is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y @@ -59,6 +64,7 @@ CONFIG_SATA_CEVA=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y @@ -75,7 +81,10 @@ CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y diff --git a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig index 668ec3d80fea1c3f889e7effb2686cc5980367da..ed0943b6ec7540857349fa82bcbe201ddc17be39 100644 --- a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig @@ -11,6 +11,11 @@ CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="ls1088ardb_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y @@ -48,6 +53,7 @@ CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_MXC_I2C1_SPEED=40000000 CONFIG_SYS_MXC_I2C2_SPEED=40000000 diff --git a/configs/ls1088ardb_qspi_defconfig b/configs/ls1088ardb_qspi_defconfig index 7953d9bb8022663b7ffe3abb1037c4889acfee46..486a20dbc559dec695e624b546ff9308b87db6fb 100644 --- a/configs/ls1088ardb_qspi_defconfig +++ b/configs/ls1088ardb_qspi_defconfig @@ -12,6 +12,11 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="ls1088ardb_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y @@ -51,6 +56,7 @@ CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_MXC_I2C1_SPEED=40000000 CONFIG_SYS_MXC_I2C2_SPEED=40000000 diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig index 8dea9787c327e867214207c2a19e808986b9a182..f0beb9fdfc71aac883a6015b7f7f1b87e09dd706 100644 --- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig @@ -14,6 +14,11 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_SPL_TEXT_BASE=0x1800a000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="ls1088ardb_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y @@ -23,8 +28,8 @@ CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT_QSPI" CONFIG_SD_BOOT=y +CONFIG_SD_BOOT_QSPI=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" # CONFIG_USE_BOOTCOMMAND is not set @@ -60,6 +65,7 @@ CONFIG_SCSI_AHCI=y # CONFIG_SPL_BLK is not set CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_MXC_I2C1_SPEED=40000000 CONFIG_SYS_MXC_I2C2_SPEED=40000000 diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig index 580f6a2e94ed286899fa5e940c8b06b880e297ef..d54ff504a84738e4266ed99f6d35b745ca73b7c9 100644 --- a/configs/ls1088ardb_sdcard_qspi_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_defconfig @@ -14,6 +14,11 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_SPL_TEXT_BASE=0x1800a000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="ls1088ardb_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y @@ -24,8 +29,8 @@ CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT_QSPI" CONFIG_SD_BOOT=y +CONFIG_SD_BOOT_QSPI=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" # CONFIG_USE_BOOTCOMMAND is not set @@ -61,6 +66,7 @@ CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_MXC_I2C1_SPEED=40000000 CONFIG_SYS_MXC_I2C2_SPEED=40000000 diff --git a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig index 1f9a15bd06a3de5e5754317c54e7ca7f1b349d63..dd547f797b3aaa3c429ead9ee6ba082c0218eacf 100644 --- a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig @@ -13,6 +13,11 @@ CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="ls1088ardb_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y @@ -48,6 +53,7 @@ CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y diff --git a/configs/ls1088ardb_tfa_defconfig b/configs/ls1088ardb_tfa_defconfig index c3542257afe996546df50200016864a7527f4d4c..fc2d1b475c6a683e667a10e784819d4a79f46728 100644 --- a/configs/ls1088ardb_tfa_defconfig +++ b/configs/ls1088ardb_tfa_defconfig @@ -14,6 +14,11 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="ls1088ardb_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y @@ -54,6 +59,7 @@ CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig index d56a6ac1f848b3178aa78f67c3a125da8d86037b..0ad25aca76a0856f3f154b9b8a55092f059d5765 100644 --- a/configs/ls2080aqds_SECURE_BOOT_defconfig +++ b/configs/ls2080aqds_SECURE_BOOT_defconfig @@ -14,10 +14,11 @@ CONFIG_AHCI=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load" CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y @@ -54,6 +55,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y @@ -66,6 +70,7 @@ CONFIG_NVME=y CONFIG_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE_RC=y +CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig index a8cad445b8c263a79ac6312be847e6427ea67072..30cdad6fbec098ce7689119ce7a6d2eec1a147bd 100644 --- a/configs/ls2080aqds_defconfig +++ b/configs/ls2080aqds_defconfig @@ -14,10 +14,11 @@ CONFIG_AHCI=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load" CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y @@ -57,6 +58,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y @@ -69,6 +73,7 @@ CONFIG_NVME=y CONFIG_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE_RC=y +CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index b902d3195bbe6906c357322355d64d6fc46a79f0..47f09b6288c5a200a7c631bcd30822cc153f4605 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -19,11 +19,12 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load" CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y @@ -67,6 +68,7 @@ CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y CONFIG_SYS_NAND_U_BOOT_OFFS=0x40000 CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y @@ -79,6 +81,7 @@ CONFIG_NVME=y CONFIG_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE_RC=y +CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig index 7d87fa6f9136d1320f55883a83fa96bd02f41c3f..bbc9f3d113c80b3f4223fd0db6cd040227a36878 100644 --- a/configs/ls2080aqds_qspi_defconfig +++ b/configs/ls2080aqds_qspi_defconfig @@ -14,11 +14,12 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load" CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 @@ -56,6 +57,7 @@ CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y @@ -68,6 +70,7 @@ CONFIG_NVME=y CONFIG_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE_RC=y +CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig index 84a8f5da9acf7b2739893cab415eb21aab72285d..c7a6e2a8512fcbebfabdc9bda88121f5e2c84e7e 100644 --- a/configs/ls2080aqds_sdcard_defconfig +++ b/configs/ls2080aqds_sdcard_defconfig @@ -20,11 +20,12 @@ CONFIG_AHCI=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="mmc read 0x80200000 0x6800 0x800; fsl_mc apply dpl 0x80200000 && mmc read $kernel_load $kernel_start $kernel_size && bootm $kernel_load" CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y @@ -62,6 +63,7 @@ CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y @@ -74,6 +76,7 @@ CONFIG_NVME=y CONFIG_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE_RC=y +CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig index b333932865c41ade04ed3bb4fa82f0e852e03476..15dec62dd43101f73030f8f3c70a3df9326c0106 100644 --- a/configs/ls2080ardb_SECURE_BOOT_defconfig +++ b/configs/ls2080ardb_SECURE_BOOT_defconfig @@ -8,16 +8,21 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls2080ardb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="env exists mcinitcmd && env exists secureboot && esbc_validate 0x5806C0000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x580d00000;run distro_bootcmd;run nor_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y @@ -54,6 +59,7 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig index 9216ffb78b7d929422ded3b17535326842c7cfc9..909c10b631633128ef2f2c33c8511102dafbb653 100644 --- a/configs/ls2080ardb_defconfig +++ b/configs/ls2080ardb_defconfig @@ -8,16 +8,21 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls2080ardb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="env exists mcinitcmd && env exists secureboot && esbc_validate 0x5806C0000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x580d00000;run distro_bootcmd;run nor_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y @@ -57,6 +62,7 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index 1e94c861e15037fa459f323d09c4aa9c06cbc1f8..f40ecb7e68463e881a0e5a3adca0bb749ed2ac79 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -11,6 +11,10 @@ CONFIG_ENV_OFFSET=0x200000 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" CONFIG_SPL_TEXT_BASE=0x1800a000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls2080ardb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y @@ -19,11 +23,12 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="env exists mcinitcmd && env exists secureboot && esbc_validate 0x5806C0000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x580d00000;run distro_bootcmd;run nor_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig index fb122776e83010e46ccaaf5eb0ab2582f67858ae..ed0b1b762295a0d22e7ada6db7c86b5396ee97b5 100644 --- a/configs/ls2081ardb_defconfig +++ b/configs/ls2081ardb_defconfig @@ -9,6 +9,10 @@ CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2081a-rdb" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls2080ardb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y @@ -16,11 +20,12 @@ CONFIG_AHCI=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x806c0000 0x6c0000 0x40000; env exists mcinitcmd && env exists secureboot && esbc_validate 0x806C0000; sf read 0x80d00000 0xd00000 0x100000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x80d00000; run distro_bootcmd;run qspi_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 @@ -50,6 +55,7 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y diff --git a/configs/ls2088aqds_tfa_defconfig b/configs/ls2088aqds_tfa_defconfig index 6821ed1a45c59d888e28bbca3eb08f9afbb3683d..61e0fdf1131e22ed4f6fe3f4c0fd5ca13e4b26c4 100644 --- a/configs/ls2088aqds_tfa_defconfig +++ b/configs/ls2088aqds_tfa_defconfig @@ -18,10 +18,10 @@ CONFIG_AHCI=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" -# CONFIG_USE_BOOTCOMMAND is not set CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y @@ -55,6 +55,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y @@ -70,6 +71,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y @@ -87,6 +91,7 @@ CONFIG_NVME=y CONFIG_PCI=y CONFIG_PCIE_LAYERSCAPE_RC=y CONFIG_DM_RTC=y +CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig index 3c436ab548eac545bb1fd77b914bac1be5e735a3..c49d163346ce5b86984e0443115124110dfe6ab3 100644 --- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig @@ -9,6 +9,10 @@ CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls2080ardb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y @@ -16,9 +20,10 @@ CONFIG_AHCI=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x806c0000 0x6c0000 0x40000; env exists mcinitcmd && env exists secureboot && esbc_validate 0x806C0000; sf read 0x80d00000 0xd00000 0x100000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x80d00000; run distro_bootcmd;run qspi_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 @@ -40,6 +45,7 @@ CONFIG_SATA_CEVA=y CONFIG_DDR_CLK_FREQ=133333333 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EARLY_INIT=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 @@ -48,6 +54,7 @@ CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig index b99273b559b39e726a26d85b10c8ad07967966cc..b8c7c78b8e684a766e0c6812112cf0706e24fca2 100644 --- a/configs/ls2088ardb_qspi_defconfig +++ b/configs/ls2088ardb_qspi_defconfig @@ -10,6 +10,10 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls2080ardb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y @@ -17,11 +21,12 @@ CONFIG_AHCI=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x806c0000 0x6c0000 0x40000; env exists mcinitcmd && env exists secureboot && esbc_validate 0x806C0000; sf read 0x80d00000 0xd00000 0x100000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x80d00000; run distro_bootcmd;run qspi_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 @@ -47,6 +52,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=133333333 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EARLY_INIT=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 @@ -55,6 +61,7 @@ CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y diff --git a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig index f9b464b5c487a59a87eaf4c6a3551d68da75b1c5..3cc9168290dfca8bec0989e28b80454663fce1ef 100644 --- a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig @@ -11,6 +11,10 @@ CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls2080ardb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y @@ -18,10 +22,10 @@ CONFIG_AHCI=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" -# CONFIG_USE_BOOTCOMMAND is not set CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y @@ -46,6 +50,7 @@ CONFIG_SATA_CEVA=y CONFIG_DDR_CLK_FREQ=133333333 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y @@ -63,6 +68,7 @@ CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y diff --git a/configs/ls2088ardb_tfa_defconfig b/configs/ls2088ardb_tfa_defconfig index 8e76f59b924fbb1fc0ea5406976a3aca8c8c2d9f..a28b45b1296ca41eb14e2077cb0475182bbc5021 100644 --- a/configs/ls2088ardb_tfa_defconfig +++ b/configs/ls2088ardb_tfa_defconfig @@ -12,6 +12,10 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls2080ardb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y @@ -19,10 +23,10 @@ CONFIG_AHCI=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" -# CONFIG_USE_BOOTCOMMAND is not set CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y @@ -53,6 +57,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=133333333 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y @@ -70,6 +75,7 @@ CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig index 471b17e2efb3bbaf4091e8b3ae0c4e49ddd31895..497da09d43998c7142d00c96bf5e2cc6d1c673f6 100644 --- a/configs/lschlv2_defconfig +++ b/configs/lschlv2_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/buffalo/lsxl/kwbimage-lschl.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_LSXL=y @@ -38,6 +39,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_SATA_MV=y +CONFIG_KIRKWOOD_GPIO=y # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig index 4188c3264f23894b279433744198c23f2667ad49..cadeb9afd3cb41da9ad9614f6ebec5869d8f5830 100644 --- a/configs/lsxhl_defconfig +++ b/configs/lsxhl_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/buffalo/lsxl/kwbimage-lsxhl.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_LSXL=y @@ -38,6 +39,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_SATA_MV=y +CONFIG_KIRKWOOD_GPIO=y # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig index 261154b5e69ae0c014f86e6199fbb7fca9acccfa..a9a0a27888ce9c38afd8d63fdf7aa7a189d41302 100644 --- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig @@ -12,6 +12,11 @@ CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-qds" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="lx2160aqds_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y @@ -20,9 +25,9 @@ CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" -# CONFIG_USE_BOOTCOMMAND is not set CONFIG_BOARD_EARLY_INIT_R=y CONFIG_MISC_INIT_R=y CONFIG_CMD_GREPENV=y @@ -48,6 +53,7 @@ CONFIG_SATA_CEVA=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig index ddcf6812550eb894affbe78ae53fe085b067e826..de8dc553d10bfe60cb678427f89e58d4b912b260 100644 --- a/configs/lx2160aqds_tfa_defconfig +++ b/configs/lx2160aqds_tfa_defconfig @@ -13,6 +13,11 @@ CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-qds" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="lx2160aqds_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y @@ -21,10 +26,10 @@ CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" -# CONFIG_USE_BOOTCOMMAND is not set CONFIG_BOARD_EARLY_INIT_R=y CONFIG_MISC_INIT_R=y CONFIG_CMD_GREPENV=y @@ -55,6 +60,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig index a8af790286930d7f73d8cbc870cba62a99abd127..ac42c2508cda0e7b7956044933685d6bb029db5e 100644 --- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig @@ -12,6 +12,11 @@ CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="lx2160ardb_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_EMC2305=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y @@ -21,9 +26,9 @@ CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" -# CONFIG_USE_BOOTCOMMAND is not set CONFIG_MISC_INIT_R=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y @@ -46,6 +51,7 @@ CONFIG_SATA_CEVA=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig index d81a4b10b1493e4b42a255d18dee2b4a5b7d8b50..59955eebbeb646571f38b1e674b466fc266e0562 100644 --- a/configs/lx2160ardb_tfa_defconfig +++ b/configs/lx2160ardb_tfa_defconfig @@ -13,6 +13,11 @@ CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="lx2160ardb_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_EMC2305=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y @@ -22,10 +27,10 @@ CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" -# CONFIG_USE_BOOTCOMMAND is not set CONFIG_MISC_INIT_R=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y @@ -54,6 +59,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 diff --git a/configs/lx2160ardb_tfa_stmm_defconfig b/configs/lx2160ardb_tfa_stmm_defconfig index 1d6ed44140286ca3bc881898f77d9b6bd7c78e6b..149e82bed37e64216368538197107bf3c8e209f5 100644 --- a/configs/lx2160ardb_tfa_stmm_defconfig +++ b/configs/lx2160ardb_tfa_stmm_defconfig @@ -13,6 +13,11 @@ CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="lx2160ardb_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_EMC2305=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y @@ -22,10 +27,10 @@ CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" -# CONFIG_USE_BOOTCOMMAND is not set CONFIG_MISC_INIT_R=y CONFIG_CMD_GREPENV=y CONFIG_CMD_NVEDIT_EFI=y @@ -54,6 +59,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 diff --git a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig index 38e2307766e24c76e23342cf18efe68d03f6e63e..d017a53efff865ac8ca8ce1994f87f833f10f01e 100644 --- a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig @@ -12,6 +12,11 @@ CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2162a-qds" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="lx2162aqds_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y @@ -20,9 +25,9 @@ CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" -# CONFIG_USE_BOOTCOMMAND is not set CONFIG_BOARD_EARLY_INIT_R=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y diff --git a/configs/lx2162aqds_tfa_defconfig b/configs/lx2162aqds_tfa_defconfig index 2028bfc5241bf02f4fc6b5edfbac7c3e41179139..203554b61f3a7b7db8c3fc930414831cede87d81 100644 --- a/configs/lx2162aqds_tfa_defconfig +++ b/configs/lx2162aqds_tfa_defconfig @@ -13,6 +13,11 @@ CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2162a-qds" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="lx2162aqds_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y @@ -21,10 +26,10 @@ CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" -# CONFIG_USE_BOOTCOMMAND is not set CONFIG_BOARD_EARLY_INIT_R=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y diff --git a/configs/lx2162aqds_tfa_verified_boot_defconfig b/configs/lx2162aqds_tfa_verified_boot_defconfig index 0b08589ef23cae43c85e5e9d3368d60312a6ee16..32487eb41cf42e2ac05408b5b9a6b71b9398962c 100644 --- a/configs/lx2162aqds_tfa_verified_boot_defconfig +++ b/configs/lx2162aqds_tfa_verified_boot_defconfig @@ -13,6 +13,11 @@ CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2162a-qds" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="lx2162aqds_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y @@ -22,10 +27,10 @@ CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" -# CONFIG_USE_BOOTCOMMAND is not set CONFIG_BOARD_EARLY_INIT_R=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index 48d75669cb5ed9f753d9267a2c3d44b7d389c2d7..26a48c16c31fc045bf7f2854213ff840626da0d3 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -29,12 +29,13 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttymxc0,115200" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run mmc_mmc" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="run try_bootscript" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_NAND_SUPPORT=y -CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y @@ -109,6 +110,7 @@ CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y # CONFIG_VIDEO_BPP8 is not set # CONFIG_VIDEO_BPP32 is not set CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/configs/marsboard_defconfig b/configs/marsboard_defconfig index 281563401f599d7553ee2ddddbb4f3cba3027c1b..0ce228d320dc3d88e4bd5fb23ee8c9df644f0810 100644 --- a/configs/marsboard_defconfig +++ b/configs/marsboard_defconfig @@ -57,6 +57,7 @@ CONFIG_USB=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y # CONFIG_BACKLIGHT is not set # CONFIG_CMD_VIDCONSOLE is not set # CONFIG_VIDEO_BPP8 is not set diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig index ce870c91c78ae2fa68ea5a243914db5026a94505..a69c0351b10954faaf76be5dd93c88aad7084309 100644 --- a/configs/maxbcm_defconfig +++ b/configs/maxbcm_defconfig @@ -33,14 +33,11 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_TIME=y CONFIG_ENV_OVERWRITE=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_OF_TRANSLATE=y -CONFIG_SYS_I2C_LEGACY=y -CONFIG_SPL_SYS_I2C_LEGACY=y +CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y -CONFIG_SYS_I2C_SLAVE=0x0 # CONFIG_MMC is not set CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/medcom-wide_defconfig b/configs/medcom-wide_defconfig index 2a6f8d09d99d29c48ebf0be949316456be11aece..d1eedc6aa88c6eac7201b00f9f98e965a1b54edc 100644 --- a/configs/medcom-wide_defconfig +++ b/configs/medcom-wide_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 @@ -17,7 +18,6 @@ CONFIG_SYS_PROMPT="Tegra20 (Medcom-Wide) # " # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y -CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set @@ -32,6 +32,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_DM=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_TEGRA_NAND=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_PMIC=y CONFIG_DM_REGULATOR=y diff --git a/configs/meesc_dataflash_defconfig b/configs/meesc_dataflash_defconfig index 6fda013ab12fb5ef0d1f43db8f1f89b35173d8af..5d9f783c95f2081dc525827e380f491fb61554a2 100644 --- a/configs/meesc_dataflash_defconfig +++ b/configs/meesc_dataflash_defconfig @@ -28,7 +28,6 @@ CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig index 8a8c55bc88d1dc765bd9e10154f139db274bf146..83accc38077e4e55716959d697d88a0eea59a78a 100644 --- a/configs/minnowmax_defconfig +++ b/configs/minnowmax_defconfig @@ -26,6 +26,8 @@ CONFIG_BOOTSTAGE_REPORT=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig index ddffbc612540851c5f68cd6e9acef06a67d78d28..f85292d5b17d96a0d0e1129bee6decab53ea2c78 100644 --- a/configs/miqi-rk3288_defconfig +++ b/configs/miqi-rk3288_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y +CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/mt8183_pumpkin_defconfig b/configs/mt8183_pumpkin_defconfig index 08fc60394d62534f388d28e5de895be1cbfcc510..8e43acd51996df81066d915b6d410c1114af6cf2 100644 --- a/configs/mt8183_pumpkin_defconfig +++ b/configs/mt8183_pumpkin_defconfig @@ -17,6 +17,8 @@ CONFIG_SYS_LOAD_ADDR=0x4c000000 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="mt8183-pumpkin" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y diff --git a/configs/mt8516_pumpkin_defconfig b/configs/mt8516_pumpkin_defconfig index b073579a37a314b5f9cddb89bcbb5da3c31a255d..53ea0508232c22add0e20aab3c9c8412fbfe1b7f 100644 --- a/configs/mt8516_pumpkin_defconfig +++ b/configs/mt8516_pumpkin_defconfig @@ -15,6 +15,8 @@ CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x4c000000 CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="mt8516-pumpkin" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_LATE_INIT=y diff --git a/configs/mx23_olinuxino_defconfig b/configs/mx23_olinuxino_defconfig index 8a77aa4641bf4d3817b5e7ae30a10f8cfd4dc97f..fc1606a2578112e2e110289139ed99f2d7216c07 100644 --- a/configs/mx23_olinuxino_defconfig +++ b/configs/mx23_olinuxino_defconfig @@ -16,6 +16,8 @@ CONFIG_SPL=y # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x42000000 CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loaduimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y # CONFIG_SPL_FRAMEWORK is not set diff --git a/configs/mx23evk_defconfig b/configs/mx23evk_defconfig index ba468adb9f3bef6517eb91c29f193962df843313..f51398c0502120ae11250bda52c8bd3c9515824e 100644 --- a/configs/mx23evk_defconfig +++ b/configs/mx23evk_defconfig @@ -15,6 +15,8 @@ CONFIG_TARGET_MX23EVK=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x42000000 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else echo ERR: Fail to boot from MMC; fi; fi; else exit; fi" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y diff --git a/configs/mx28evk_auart_console_defconfig b/configs/mx28evk_auart_console_defconfig index d57db5f1a7b7a01c2ca8ff1ff52eed5c64263600..22310f59291ddfd8ed4961693e18266ebf45b240 100644 --- a/configs/mx28evk_auart_console_defconfig +++ b/configs/mx28evk_auart_console_defconfig @@ -14,6 +14,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x42000000 CONFIG_SYS_EXTRA_OPTIONS="MXS_AUART,MXS_AUART_BASE=MXS_UARTAPP3_BASE" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig index 4e6426b124e8e09ac39fbdd344cdbcc49a00da94..b7502aa4a287bca87a100ab902b4a57d46d993b5 100644 --- a/configs/mx28evk_defconfig +++ b/configs/mx28evk_defconfig @@ -16,6 +16,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x42000000 CONFIG_FIT=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y diff --git a/configs/mx28evk_nand_defconfig b/configs/mx28evk_nand_defconfig index 2f708de5a04354702251ef2bcf558af0b9f5b136..090e5fa06b0f0ba015d7355772d646eb3cd0b24f 100644 --- a/configs/mx28evk_nand_defconfig +++ b/configs/mx28evk_nand_defconfig @@ -14,6 +14,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x380000 CONFIG_SYS_LOAD_ADDR=0x42000000 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y diff --git a/configs/mx28evk_spi_defconfig b/configs/mx28evk_spi_defconfig index 424ebcfb25b800b76a8f1bc4492b89b501d7ac16..6cb21b94aca4dc8ecb42daf0a74d501fdb68ef8f 100644 --- a/configs/mx28evk_spi_defconfig +++ b/configs/mx28evk_spi_defconfig @@ -12,6 +12,8 @@ CONFIG_TARGET_MX28EVK=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x42000000 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig index 06c43b7057dfd8434fa9768948a3c8b0b9d52a49..7ee220a8104b2909a8b44de54c218b9b8b5909ee 100644 --- a/configs/mx51evk_defconfig +++ b/configs/mx51evk_defconfig @@ -10,6 +10,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx51-babbage" # CONFIG_CMD_BMODE is not set CONFIG_SYS_LOAD_ADDR=0x92000000 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y diff --git a/configs/mx53loco_defconfig b/configs/mx53loco_defconfig index 492b2e8a600aeb62c7288f41b8dcd6769ac31f30..2fb44bcde10155b8e9aa4fb97e51a8908629edf6 100644 --- a/configs/mx53loco_defconfig +++ b/configs/mx53loco_defconfig @@ -15,6 +15,8 @@ CONFIG_DEFAULT_DEVICE_TREE="imx53-qsb" # CONFIG_CMD_BMODE is not set CONFIG_SYS_LOAD_ADDR=0x72000000 CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig index 854d5640004b32978a8a4de3818bbc40e0ef7ee9..71db59f70711abe77085a43f45671d30b5e17260 100644 --- a/configs/mx53ppd_defconfig +++ b/configs/mx53ppd_defconfig @@ -14,6 +14,8 @@ CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=1 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run doquiet; run tryboot" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index 70374515abe9901e2bb9d6a84ae9070596282ffd..4fbd83f0a5d097165ba6bf3bcf3b99c6d29a08a6 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -70,6 +70,7 @@ CONFIG_IMX_THERMAL=y CONFIG_USB=y CONFIG_USB_KEYBOARD=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y # CONFIG_BACKLIGHT is not set # CONFIG_CMD_VIDCONSOLE is not set # CONFIG_VIDEO_BPP8 is not set diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig index 8625189294b7070fc9f46076f18d1e40bb0a9861..2b77a46badd52b21ae3cebee87948c8e856c1988 100644 --- a/configs/mx6qsabrelite_defconfig +++ b/configs/mx6qsabrelite_defconfig @@ -21,7 +21,6 @@ CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 -# CONFIG_USE_BOOTCOMMAND is not set CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig index c5cdc3ac17fbfdbd8160e78b06b1d2fe3d8ee132..e03ac323eec72b790e15753c497a1e8a6ea9d415 100644 --- a/configs/mx6sabreauto_defconfig +++ b/configs/mx6sabreauto_defconfig @@ -27,6 +27,8 @@ CONFIG_SPL_FIT_PRINT=y CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y @@ -109,6 +111,7 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y # CONFIG_VIDEO_BPP8 is not set # CONFIG_VIDEO_BPP32 is not set CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index 6733038060a90c34492ddcee1ddb8aa5c4aae8d5..6cb74132d59d3c9e59bd5cfb0c4e931bff6dfa11 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -26,6 +26,8 @@ CONFIG_SPL_FIT_PRINT=y CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y @@ -116,6 +118,7 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y # CONFIG_VIDEO_BPP8 is not set # CONFIG_VIDEO_BPP32 is not set CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig index d12c1a092845293781799f7c50202e7bf27d800a..12789c934c0fb19fd41342342e77c08151beeeb4 100644 --- a/configs/mx6slevk_defconfig +++ b/configs/mx6slevk_defconfig @@ -11,6 +11,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk" # CONFIG_CMD_BMODE is not set CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig index 7877a4e3ef9c034b26189267daa090dce7307fbf..2bfeac35877dc9b605a80b3bc922a17ee2ae4c32 100644 --- a/configs/mx6slevk_spinor_defconfig +++ b/configs/mx6slevk_spinor_defconfig @@ -13,6 +13,8 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk" # CONFIG_CMD_BMODE is not set CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SPI_BOOT=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig index acf59217402190e4afaa85874527d619adefe19a..09d71ae905f7fb9aa158a63d4dc430861a20260d 100644 --- a/configs/mx6slevk_spl_defconfig +++ b/configs/mx6slevk_spl_defconfig @@ -22,6 +22,8 @@ CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C=y diff --git a/configs/mx6sllevk_defconfig b/configs/mx6sllevk_defconfig index b7abb8fc665e5b98a847165fd0008068f352a718..48162fc2e584d3c6d5d8a8feb15a9560f1a8ea3e 100644 --- a/configs/mx6sllevk_defconfig +++ b/configs/mx6sllevk_defconfig @@ -13,6 +13,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx6sll-evk" # CONFIG_CMD_BMODE is not set CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/mx6sllevk_plugin_defconfig b/configs/mx6sllevk_plugin_defconfig index 92ba9ca3bd69c8302633d159f44a6b3b5d80c542..70969438897f247500165aeddb22f68fcc87124e 100644 --- a/configs/mx6sllevk_plugin_defconfig +++ b/configs/mx6sllevk_plugin_defconfig @@ -14,6 +14,8 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6sll-evk" CONFIG_USE_IMXIMG_PLUGIN=y # CONFIG_CMD_BMODE is not set CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig index c85a7932be8c8a947d9dc27138ba862372218e44..6d3895f2d54894d4c412a8ac36b2e8656bada13b 100644 --- a/configs/mx6sxsabreauto_defconfig +++ b/configs/mx6sxsabreauto_defconfig @@ -11,6 +11,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx6sx-sabreauto" # CONFIG_CMD_BMODE is not set CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig index 4b22c8e03e0c81a60f82ab12b7ae93550e8b8a40..03670c73f8e0207f529c5a56f6833b9f06ab51de 100644 --- a/configs/mx6sxsabresd_defconfig +++ b/configs/mx6sxsabresd_defconfig @@ -12,6 +12,8 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6sx-sdb" # CONFIG_CMD_BMODE is not set CONFIG_NXP_BOARD_REVISION=y CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run findfdt; mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig index 5fa9d341f98b6260090ff0e0728502b25e0404e9..1b84a65a49be16dd330962996c32b754ba7e6703 100644 --- a/configs/mx6ul_14x14_evk_defconfig +++ b/configs/mx6ul_14x14_evk_defconfig @@ -22,6 +22,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y @@ -92,6 +94,7 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_MXS=y CONFIG_SPLASH_SCREEN=y diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig index 1b80f043bd79277e76f78c45f1d465c81644f384..9b418d6784479d3d0fd9adee2f8725c5029e464e 100644 --- a/configs/mx6ul_9x9_evk_defconfig +++ b/configs/mx6ul_9x9_evk_defconfig @@ -22,6 +22,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y @@ -82,6 +84,7 @@ CONFIG_IMX_THERMAL=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_MXS=y CONFIG_SPLASH_SCREEN=y diff --git a/configs/mx6ull_14x14_evk_defconfig b/configs/mx6ull_14x14_evk_defconfig index d5ae040e552cfa26a7f8c4723ab236c101e5dcfc..a053d2f7610071d9200390b807e94f0ef0b9c246 100644 --- a/configs/mx6ull_14x14_evk_defconfig +++ b/configs/mx6ull_14x14_evk_defconfig @@ -12,6 +12,8 @@ CONFIG_TARGET_MX6ULL_14X14_EVK=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx6ull-14x14-evk" CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -58,4 +60,5 @@ CONFIG_MXC_UART=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_QSPI=y +CONFIG_SOFT_SPI=y CONFIG_IMX_THERMAL=y diff --git a/configs/mx6ull_14x14_evk_plugin_defconfig b/configs/mx6ull_14x14_evk_plugin_defconfig index e5b68b0dfaa9fbc02f82de0c2bbc956e91be4416..07e5e2357575eb6b50f2934be924d7e8d312b6a1 100644 --- a/configs/mx6ull_14x14_evk_plugin_defconfig +++ b/configs/mx6ull_14x14_evk_plugin_defconfig @@ -13,6 +13,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx6ull-14x14-evk" CONFIG_USE_IMXIMG_PLUGIN=y CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -57,4 +59,5 @@ CONFIG_MXC_UART=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_QSPI=y +CONFIG_SOFT_SPI=y CONFIG_IMX_THERMAL=y diff --git a/configs/mx6ulz_14x14_evk_defconfig b/configs/mx6ulz_14x14_evk_defconfig index e871b20763ec704959362b80eec9bc3a97f0d3c5..2f9c7a2b595cb3f5ddb1bf2d69d9fa964f1e6f09 100644 --- a/configs/mx6ulz_14x14_evk_defconfig +++ b/configs/mx6ulz_14x14_evk_defconfig @@ -12,6 +12,8 @@ CONFIG_TARGET_MX6ULL_14X14_EVK=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx6ulz-14x14-evk" CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -48,4 +50,5 @@ CONFIG_MXC_UART=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_QSPI=y +CONFIG_SOFT_SPI=y CONFIG_IMX_THERMAL=y diff --git a/configs/mx7ulp_evk_defconfig b/configs/mx7ulp_evk_defconfig index eb6da95fb839d90c21e86f193a85b0cc51d68246..4f641471acbcf51d349fb1a8632c1c480b4fa058 100644 --- a/configs/mx7ulp_evk_defconfig +++ b/configs/mx7ulp_evk_defconfig @@ -12,6 +12,8 @@ CONFIG_DEFAULT_DEVICE_TREE="imx7ulp-evk" CONFIG_TARGET_MX7ULP_EVK=y CONFIG_SYS_LOAD_ADDR=0x60800000 CONFIG_OF_BOARD_SETUP=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; fi; fi; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/mx7ulp_evk_plugin_defconfig b/configs/mx7ulp_evk_plugin_defconfig index 141592f4400ffabcdbd079c0d65298144412461f..0f8e9e886ed0dbb460414ac2b1b7acf324040eb9 100644 --- a/configs/mx7ulp_evk_plugin_defconfig +++ b/configs/mx7ulp_evk_plugin_defconfig @@ -11,6 +11,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx7ulp-evk" CONFIG_TARGET_MX7ULP_EVK=y CONFIG_SYS_LOAD_ADDR=0x60800000 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; fi; fi; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_MEMTEST=y diff --git a/configs/myir_mys_6ulx_defconfig b/configs/myir_mys_6ulx_defconfig index 1c6ebc104aa8772bf152995f9467b960dfaa5933..6c39b5e8b82417d6dbf9840f78c5c2ba61352a34 100644 --- a/configs/myir_mys_6ulx_defconfig +++ b/configs/myir_mys_6ulx_defconfig @@ -18,7 +18,6 @@ CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=3 -# CONFIG_USE_BOOTCOMMAND is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig index 386ebcae7f95f8c1b106e325b1d6c98e0daad43f..7e4e19a9f7885d34667dec6075744fa4113532f6 100644 --- a/configs/nas220_defconfig +++ b/configs/nas220_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/Seagate/nas220/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_NAS220=y @@ -13,6 +14,7 @@ CONFIG_IDENT_STRING="\nNAS 220" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y @@ -40,6 +42,7 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y CONFIG_DM=y +CONFIG_KIRKWOOD_GPIO=y # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y @@ -51,3 +54,5 @@ CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y +CONFIG_JFFS2_LZO=y +CONFIG_JFFS2_NAND=y diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig index 5d84a5dd1264f3f0f75bd3780f8f3d5eecd49a51..985f530fb8738c9e78189f9eacc3e9ab748f2292 100644 --- a/configs/net2big_v2_defconfig +++ b/configs/net2big_v2_defconfig @@ -3,9 +3,11 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/LaCie/net2big_v2/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_NET2BIG_V2=y +CONFIG_NET2BIG_V2=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -13,10 +15,11 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-net2big" CONFIG_IDENT_STRING=" 2Big v2" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_SYS_EXTRA_OPTIONS="NET2BIG_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="dhcp && run netconsole; if run usbload || run diskload; then bootm; fi" CONFIG_USE_PREBOOT=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -40,12 +43,12 @@ CONFIG_EFI_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_ENV_ADDR=0x70000 CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_SATA_MV=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x0 diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig index 15cc556f0ae1b5889dc3858ceba025595f38b3b3..668f4ea291d43e0f6c9027e91572b6ceadb49619 100644 --- a/configs/netspace_lite_v2_defconfig +++ b/configs/netspace_lite_v2_defconfig @@ -3,9 +3,11 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/LaCie/netspace_v2/kwbimage-ns2l.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_NETSPACE_V2=y +CONFIG_NETSPACE_LITE_V2=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -13,10 +15,11 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2lite" CONFIG_IDENT_STRING=" NS v2 Lite" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_LITE_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="dhcp && run netconsole; if run usbload || run diskload; then bootm; fi" CONFIG_USE_PREBOOT=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -40,12 +43,12 @@ CONFIG_EFI_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_ENV_ADDR=0x70000 CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_SATA_MV=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x0 diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig index 1946e440062c00ea2e61e6e0bac388d01f07e6d8..25ce3c61a1f8f53fc5eb2ae6fb6ae622933f8a1c 100644 --- a/configs/netspace_max_v2_defconfig +++ b/configs/netspace_max_v2_defconfig @@ -3,9 +3,11 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/LaCie/netspace_v2/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_NETSPACE_V2=y +CONFIG_NETSPACE_MAX_V2=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -13,10 +15,11 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2max" CONFIG_IDENT_STRING=" NS Max v2" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MAX_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="dhcp && run netconsole; if run usbload || run diskload; then bootm; fi" CONFIG_USE_PREBOOT=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -40,12 +43,12 @@ CONFIG_EFI_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_ENV_ADDR=0x70000 CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_SATA_MV=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x0 diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig index 2bcb8498b505feb18b22e7c544c68d23fa0b2d27..0c9a3036eb133e8de14ad8e7f1b39c4494ce22ec 100644 --- a/configs/netspace_mini_v2_defconfig +++ b/configs/netspace_mini_v2_defconfig @@ -3,9 +3,11 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/LaCie/netspace_v2/kwbimage-ns2l.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_NETSPACE_V2=y +CONFIG_NETSPACE_MINI_V2=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -13,10 +15,11 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2mini" CONFIG_IDENT_STRING=" NS v2 Mini" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MINI_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="dhcp && run netconsole; if run usbload || run diskload; then bootm; fi" CONFIG_USE_PREBOOT=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -38,13 +41,13 @@ CONFIG_EFI_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_ENV_ADDR=0x70000 CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_BLK=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x0 diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig index b281a40c4140ab9ab20c6ede32b65f3e69768b44..8f662edd16824eebe313278048cb1a6b419be637 100644 --- a/configs/netspace_v2_defconfig +++ b/configs/netspace_v2_defconfig @@ -3,9 +3,11 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/LaCie/netspace_v2/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_NETSPACE_V2=y +CONFIG_NETSPACE_V2=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -13,10 +15,11 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2" CONFIG_IDENT_STRING=" NS v2" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="dhcp && run netconsole; if run usbload || run diskload; then bootm; fi" CONFIG_USE_PREBOOT=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -40,12 +43,12 @@ CONFIG_EFI_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_ENV_ADDR=0x70000 CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_SATA_MV=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x0 diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig index 20c5d3025777b35d7c1e840292608d1c5b0ad00f..553380e663b7f51d62b3b8f5ad15bd1a308591be 100644 --- a/configs/nitrogen6dl2g_defconfig +++ b/configs/nitrogen6dl2g_defconfig @@ -22,6 +22,8 @@ CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig index 796bd66bc23315be4c8b133a462d06ea536e9e0a..336e3b264b68142d31d566011c2c01fe09e3531f 100644 --- a/configs/nitrogen6dl_defconfig +++ b/configs/nitrogen6dl_defconfig @@ -22,6 +22,8 @@ CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig index b42220db064af8aea2ffe57d357f65f4a0bb4096..dbc1818caa466e44b14bed452e563ed986f52465 100644 --- a/configs/nitrogen6q2g_defconfig +++ b/configs/nitrogen6q2g_defconfig @@ -22,6 +22,8 @@ CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig index cc0855949673ea2a7bedb767acf12721daf0f84e..d88d0719407a158b09595f4c333b9ed73002a497 100644 --- a/configs/nitrogen6q_defconfig +++ b/configs/nitrogen6q_defconfig @@ -22,6 +22,8 @@ CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig index 17133c5cd6008c75d4edaa84f84ffd6a22a266cc..6c7b8b7491106d2a949d2b8185f85762ddeeb796 100644 --- a/configs/nitrogen6s1g_defconfig +++ b/configs/nitrogen6s1g_defconfig @@ -22,6 +22,8 @@ CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig index 242580e3e9f38ae6e378555d9a52e01c5d68d462..440c7733ea6665e8a87977943d09d9e5de750d98 100644 --- a/configs/nitrogen6s_defconfig +++ b/configs/nitrogen6s_defconfig @@ -22,6 +22,8 @@ CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/nokia_rx51_defconfig b/configs/nokia_rx51_defconfig index 87f8ab993df33b851cf17441349dbca99691379f..4a95f42e4eb4795cb83fc5413f34a83d2cbd24a4 100644 --- a/configs/nokia_rx51_defconfig +++ b/configs/nokia_rx51_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y # CONFIG_SYS_THUMB_BUILD is not set +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SUPPORT_PASSING_ATAGS=y CONFIG_CMDLINE_TAG=y @@ -20,6 +21,8 @@ CONFIG_SYS_LOAD_ADDR=0x80000000 CONFIG_BOOTDELAY=30 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_MENU_SHOW=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run sdboot;run emmcboot;run attachboot;echo" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="run preboot" CONFIG_CONSOLE_MUX=y diff --git a/configs/novena_defconfig b/configs/novena_defconfig index 06864db00d53a34c6ca5745227f5feb28d4df422..5022441fbd5ec2efe4408bad874d83bef5a65a95 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -60,6 +60,7 @@ CONFIG_DWC_AHSATA=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MXC=y +CONFIG_KEYBOARD=y CONFIG_FSL_USDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y @@ -84,6 +85,7 @@ CONFIG_USB_GADGET=y CONFIG_CI_UDC=y CONFIG_USB_ETHER=y CONFIG_USB_ETH_CDC=y +CONFIG_VIDEO_LOGO=y # CONFIG_VIDEO_BPP8 is not set # CONFIG_VIDEO_BPP32 is not set CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig index c2c5994315a201d8368a868ebf8d97b65839e0d3..46ca3bac4797f65c4bf10484c1627c5c21297834 100644 --- a/configs/nsa310s_defconfig +++ b/configs/nsa310s_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/zyxel/nsa310s/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_NSA310S=y @@ -12,6 +13,8 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-nsa310s" CONFIG_IDENT_STRING="\nZyXEL NSA310S/320S 1/2-Bay Power Media Server" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_root}; ubi part root; ubifsmount ubi:rootfs; ubifsload 0x800000 ${kernel}; ubifsload 0x700000 ${fdt}; ubifsumount; fdt addr 0x700000; fdt resize; fdt chosen; bootz 0x800000 - 0x700000" CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig index 601786ccd43a3c4ce804a9d3292699a679dae175..a5bd3e8798ca2933713a44ea11c785b19737c312 100644 --- a/configs/nyan-big_defconfig +++ b/configs/nyan-big_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x81000100 CONFIG_SYS_MALLOC_LEN=0x2500000 diff --git a/configs/octeontx2_95xx_defconfig b/configs/octeontx2_95xx_defconfig index e1b86a5a8b69875461015511ada5df7576a9d1a9..d29c850518df3d489ce69bbb464883581fc1452c 100644 --- a/configs/octeontx2_95xx_defconfig +++ b/configs/octeontx2_95xx_defconfig @@ -12,12 +12,14 @@ CONFIG_ENV_OFFSET=0xF00000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_TARGET_OCTEONTX2_95XX=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="octeontx" CONFIG_DEBUG_UART_BASE=0x87e028000000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x4000000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y +CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y @@ -63,28 +65,19 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_EFI_PARTITION=y CONFIG_PARTITION_TYPE_GUID=y -CONFIG_OF_BOARD=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=0 -CONFIG_USE_ENV_SPI_CS=y -CONFIG_ENV_SPI_CS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=125000000 -CONFIG_USE_ENV_SPI_MODE=y -CONFIG_ENV_SPI_MODE=0x0 CONFIG_VERSION_VARIABLE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TFTP_TSIZE=y CONFIG_DM_I2C=y CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_HS400_SUPPORT=y CONFIG_MMC_OCTEONTX=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SF_DEFAULT_SPEED=125000000 CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/octeontx2_96xx_defconfig b/configs/octeontx2_96xx_defconfig index ec03d959771b669712172229c634913fe6a2946d..1298bfe3092e224c366391d6471dd30f637fd6c7 100644 --- a/configs/octeontx2_96xx_defconfig +++ b/configs/octeontx2_96xx_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_OFFSET=0xF00000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_TARGET_OCTEONTX2_96XX=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="octeontx" CONFIG_DEBUG_UART_BASE=0x87e028000000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y @@ -18,6 +19,7 @@ CONFIG_AHCI=y CONFIG_SYS_LOAD_ADDR=0x4000000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y +CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y @@ -64,17 +66,8 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_EFI_PARTITION=y CONFIG_PARTITION_TYPE_GUID=y -CONFIG_OF_BOARD=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=0 -CONFIG_USE_ENV_SPI_CS=y -CONFIG_ENV_SPI_CS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=125000000 -CONFIG_USE_ENV_SPI_MODE=y -CONFIG_ENV_SPI_MODE=0x0 CONFIG_VERSION_VARIABLE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TFTP_TSIZE=y @@ -85,12 +78,12 @@ CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y CONFIG_I2C_MUX_PCA954x=y CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_HS400_SUPPORT=y CONFIG_MMC_OCTEONTX=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SF_DEFAULT_SPEED=125000000 CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/octeontx_81xx_defconfig b/configs/octeontx_81xx_defconfig index d0728ac3c670ad7d514bfee28f621bab6dbdb4ae..ba8cc97ab87c885ee840dcb92b893c2582f0f15d 100644 --- a/configs/octeontx_81xx_defconfig +++ b/configs/octeontx_81xx_defconfig @@ -12,6 +12,7 @@ CONFIG_ENV_OFFSET=0xF00000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_TARGET_OCTEONTX_81XX=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="octeontx" CONFIG_DEBUG_UART_BASE=0x87e028000000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y @@ -65,17 +66,8 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_EFI_PARTITION=y CONFIG_PARTITION_TYPE_GUID=y -CONFIG_OF_BOARD=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=0 -CONFIG_USE_ENV_SPI_CS=y -CONFIG_ENV_SPI_CS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=16000000 -CONFIG_USE_ENV_SPI_MODE=y -CONFIG_ENV_SPI_MODE=0x0 CONFIG_VERSION_VARIABLE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TFTP_TSIZE=y @@ -83,11 +75,11 @@ CONFIG_SCSI_AHCI=y CONFIG_AHCI_PCI=y CONFIG_DM_I2C=y CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_OCTEONTX=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SF_DEFAULT_SPEED=16000000 CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/octeontx_83xx_defconfig b/configs/octeontx_83xx_defconfig index 6c9609b0cd3014dbed2809ab9f91f86bb5f46d01..26759341c518d4f36303cc84b68ad618c7b2e064 100644 --- a/configs/octeontx_83xx_defconfig +++ b/configs/octeontx_83xx_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_OFFSET=0xF00000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_TARGET_OCTEONTX_83XX=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="octeontx" CONFIG_DEBUG_UART_BASE=0x87e028000000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y @@ -62,17 +63,8 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_EFI_PARTITION=y CONFIG_PARTITION_TYPE_GUID=y -CONFIG_OF_BOARD=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=0 -CONFIG_USE_ENV_SPI_CS=y -CONFIG_ENV_SPI_CS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=16000000 -CONFIG_USE_ENV_SPI_MODE=y -CONFIG_ENV_SPI_MODE=0x0 CONFIG_VERSION_VARIABLE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TFTP_TSIZE=y @@ -80,11 +72,11 @@ CONFIG_SCSI_AHCI=y CONFIG_AHCI_PCI=y CONFIG_DM_I2C=y CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_OCTEONTX=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SF_DEFAULT_SPEED=16000000 CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/odroid-c4_defconfig b/configs/odroid-c4_defconfig index bc778a641a35da266a69af22c9c24980b2768b24..1ea003f3f8dc632ee6e6487f8af481d813e878bd 100644 --- a/configs/odroid-c4_defconfig +++ b/configs/odroid-c4_defconfig @@ -26,7 +26,6 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_ADC=y CONFIG_SARADC_MESON=y CONFIG_MMC_MESON_GX=y diff --git a/configs/odroid-hc4_defconfig b/configs/odroid-hc4_defconfig index 2fe761e9391d3f359f0a7978932f4bc8e0650e98..d632670db0daf011d92a8569fc5de4f52aecff37 100644 --- a/configs/odroid-hc4_defconfig +++ b/configs/odroid-hc4_defconfig @@ -29,7 +29,6 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_ADC=y CONFIG_SARADC_MESON=y CONFIG_SATA=y diff --git a/configs/odroid-n2_defconfig b/configs/odroid-n2_defconfig index 8e9e8f8fb78403482cb3280ddbe5811aa0a68360..7f87504a9cd76e2acb45ab3fc4442a5d48f142db 100644 --- a/configs/odroid-n2_defconfig +++ b/configs/odroid-n2_defconfig @@ -26,7 +26,6 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_ADC=y CONFIG_SARADC_MESON=y CONFIG_MMC_MESON_GX=y diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig index 25a10997ad9f659da4bb7652629e37e7e542a9b0..54ff5799cb73b1ce957e1bf352ae0fb9e6c1dcd8 100644 --- a/configs/odroid_defconfig +++ b/configs/odroid_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_ARCH_CPU_INIT=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_EXYNOS=y CONFIG_SYS_TEXT_BASE=0x43e00000 CONFIG_SYS_MALLOC_LEN=0x5004000 @@ -17,7 +18,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="Please use defined boot" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run distro_bootcmd ; run autoboot" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_TYPES=y diff --git a/configs/omap35_logic_defconfig b/configs/omap35_logic_defconfig index 124a3b372fb9ceb499633b78a2bf2fe3c12ae0ce..433e6d7452d8d680befe7b14ca3330b077ca719f 100644 --- a/configs/omap35_logic_defconfig +++ b/configs/omap35_logic_defconfig @@ -15,7 +15,7 @@ CONFIG_SPL=y CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_ANDROID_BOOT_IMAGE=y -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run autoboot" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="setenv preboot;saveenv;" CONFIG_DEFAULT_FDT_FILE="logicpd-torpedo-35xx-devkit.dtb" diff --git a/configs/omap35_logic_somlv_defconfig b/configs/omap35_logic_somlv_defconfig index d7e4f363a5c120d01153ee356b5e39402cc8cea3..b33a27cf77b0dad753a3320ed18f85ca552b5ceb 100644 --- a/configs/omap35_logic_somlv_defconfig +++ b/configs/omap35_logic_somlv_defconfig @@ -15,7 +15,7 @@ CONFIG_SPL=y CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_ANDROID_BOOT_IMAGE=y -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run autoboot" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="setenv preboot;saveenv;" CONFIG_DEFAULT_FDT_FILE="logicpd-som-lv-35xx-devkit.dtb" diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index 0142a7a93c1bc4f5b4d475ac160f00c5740ee232..8616a6557a681b55be9b2ef2bc4fc834ebca01d6 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -15,7 +15,7 @@ CONFIG_SPL=y CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_ANDROID_BOOT_IMAGE=y -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run autoboot" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="setenv preboot;saveenv;" CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/omap3_logic_somlv_defconfig b/configs/omap3_logic_somlv_defconfig index ee475160847aebac8c330e82aeafe0ceac2a420c..79a51023f8aba48e0988cc6c3e61f29c9ff175ba 100644 --- a/configs/omap3_logic_somlv_defconfig +++ b/configs/omap3_logic_somlv_defconfig @@ -15,7 +15,7 @@ CONFIG_SPL=y CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_ANDROID_BOOT_IMAGE=y -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run autoboot" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="setenv preboot;saveenv;" CONFIG_DEFAULT_FDT_FILE="logicpd-som-lv-37xx-devkit.dtb" diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig index 0280b4ac8d073cd03f61d1a958ec6ebe99ca70e1..7a4418c069771707983f0fd8ca68ba706e467bb8 100644 --- a/configs/omap5_uevm_defconfig +++ b/configs/omap5_uevm_defconfig @@ -11,7 +11,7 @@ CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_ARMV7_LPAE=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="if test ${dofastboot} -eq 1; then echo Boot fastboot requested, resetting dofastboot ...;setenv dofastboot 0; saveenv;echo Booting into fastboot ...; fastboot 1;fi;if test ${boot_fit} -eq 1; then run update_to_fit;fi;run findfdt; run finduuid; run distro_bootcmd;run emmc_android_boot; " CONFIG_DEFAULT_FDT_FILE="omap5-uevm.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_SPL_NAND_SUPPORT is not set diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index a0f6f3e838e223f28d18d156af30f419874068a3..ca1a58178e81872259215a94f34e68d305304a70 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -22,7 +22,10 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0xc0700000 +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run envboot; run mmcboot; " CONFIG_LOGLEVEL=3 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/openpiton_riscv64_defconfig b/configs/openpiton_riscv64_defconfig index 38a3b3f37517937fcca7998c8d3ee6ef16ae1865..6dbb0799d8481ab3bab47c8d56af6b275f9fd9df 100644 --- a/configs/openpiton_riscv64_defconfig +++ b/configs/openpiton_riscv64_defconfig @@ -14,6 +14,8 @@ CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_SYS_LOAD_ADDR=0x87000000 # CONFIG_LEGACY_IMAGE_FORMAT is not set # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="fdt addr ${fdtcontroladdr}; fdt move ${fdtcontroladdr} ${fdt_addr_r}; load mmc ${mmcdev}:${mmcpart} ${kernel_addr_r} ${image}; booti ${kernel_addr_r} - ${fdt_addr_r}; " CONFIG_SYS_PROMPT="openpiton$ " # CONFIG_CMD_CPU is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/openpiton_riscv64_spl_defconfig b/configs/openpiton_riscv64_spl_defconfig index a1db07170669bc5a40c9f5d503e86562e43ea395..629b20499ed4d455101da04ae8500d4a54ad5736 100644 --- a/configs/openpiton_riscv64_spl_defconfig +++ b/configs/openpiton_riscv64_spl_defconfig @@ -18,6 +18,8 @@ CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_SYS_LOAD_ADDR=0x87000000 # CONFIG_LEGACY_IMAGE_FORMAT is not set # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="fdt addr ${fdtcontroladdr}; fdt move ${fdtcontroladdr} ${fdt_addr_r}; load mmc ${mmcdev}:${mmcpart} ${kernel_addr_r} ${image}; booti ${kernel_addr_r} - ${fdt_addr_r}; " # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig index 0e22f6902aa30b28bc3d638e7b08cabb53545822..2c5a29cfe35f1a84d303b0a24152efeaaabc48ef 100644 --- a/configs/openrd_base_defconfig +++ b/configs/openrd_base_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/Marvell/openrd/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_OPENRD=y @@ -13,8 +14,9 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-base" CONFIG_IDENT_STRING="\nOpenRD-Base" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_BASE" CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_bootargs_root}; ${x_bootcmd_usb}; bootm 0x6400000;" CONFIG_USE_PREBOOT=y CONFIG_LOGLEVEL=2 # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig index 069f96ce2a5fc03a282a7d9f75ad34f7f8c7fa4b..b21d41b1ed4f232a523d5038f2412ff9ae8433d5 100644 --- a/configs/openrd_client_defconfig +++ b/configs/openrd_client_defconfig @@ -4,17 +4,20 @@ CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/Marvell/openrd/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_OPENRD=y +CONFIG_BOARD_IS_OPENRD_CLIENT=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x80000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-client" CONFIG_IDENT_STRING="\nOpenRD-Client" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_CLIENT" CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_bootargs_root}; ${x_bootcmd_usb}; bootm 0x6400000;" CONFIG_USE_PREBOOT=y CONFIG_LOGLEVEL=2 # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig index 7483c45b23dde6b9248803f33a78d2993c726bcb..ceeb62109aa44260fc2fa0129e96e02879e34a66 100644 --- a/configs/openrd_ultimate_defconfig +++ b/configs/openrd_ultimate_defconfig @@ -4,17 +4,20 @@ CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/Marvell/openrd/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_OPENRD=y +CONFIG_BOARD_IS_OPENRD_ULTIMATE=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x80000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-ultimate" CONFIG_IDENT_STRING="\nOpenRD-Ultimate" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_ULTIMATE" CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_bootargs_root}; ${x_bootcmd_usb}; bootm 0x6400000;" CONFIG_USE_PREBOOT=y CONFIG_LOGLEVEL=2 # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig index c52d2a5d3961b37ecb9960cc64c84dc037be738d..1f064992cd32722dcffc55262b4732cfd10e9a80 100644 --- a/configs/opos6uldev_defconfig +++ b/configs/opos6uldev_defconfig @@ -23,6 +23,8 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttymxc0,115200" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run emmcboot" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="run check_env" CONFIG_DEFAULT_FDT_FILE="imx6ul-opos6uldev.dtb" @@ -103,6 +105,7 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y # CONFIG_VIDEO_BPP8 is not set # CONFIG_VIDEO_BPP32 is not set CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/configs/origen_defconfig b/configs/origen_defconfig index fe9fc33cc1062f8d9bf11770d8e7f57d776a8080..83a83ab13b14746e991e9443542381f2bb4973f0 100644 --- a/configs/origen_defconfig +++ b/configs/origen_defconfig @@ -16,7 +16,7 @@ CONFIG_SPL=y CONFIG_IDENT_STRING=" for ORIGEN" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x43e00000 -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadbootenv; then echo Loaded environment from ${bootenv};run importbootenv;fi;if test -n $uenvcmd; then echo Running uenvcmd ...;run uenvcmd;fi;if run loadbootscript; then run bootscript; fi; fi;load mmc ${mmcdev} ${loadaddr} uImage; bootm ${loadaddr} " CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_SPL_FRAMEWORK is not set diff --git a/configs/p212_defconfig b/configs/p212_defconfig index b1d2ca83500fa499779537d551cab803af387727..bca0fa84040e0884ec2eb1b7f9959262fc18bfb3 100644 --- a/configs/p212_defconfig +++ b/configs/p212_defconfig @@ -25,7 +25,6 @@ CONFIG_CMD_USB=y CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_MMC_MESON_GX=y CONFIG_PHY_MESON_GXL=y CONFIG_DM_ETH=y diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig index 38836696c07017527deea3cfbfeb992a55e0871c..b335d851bfc0c270b686feb9cd201cef34038677 100644 --- a/configs/p2371-0000_defconfig +++ b/configs/p2371-0000_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_SYS_MALLOC_LEN=0x2500000 diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig index ea9594312239874581d0207a06587792fedb409e..67657b0369c97838d762ab6da846f4e3d9c002e2 100644 --- a/configs/p2371-2180_defconfig +++ b/configs/p2371-2180_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_SYS_MALLOC_LEN=0x2500000 diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig index da33f88d836a40e6425fb6c0cf3c774066d7e713..d3f169ae2418bd3223bcc9d809350735a35f3120 100644 --- a/configs/p2571_defconfig +++ b/configs/p2571_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_SYS_MALLOC_LEN=0x2500000 diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig index 90e93960489db08202d05cda9082a86db4fe2ff0..53d98b11f5d31fece536fe7bf151eb3580fdbdb2 100644 --- a/configs/p2771-0000-000_defconfig +++ b/configs/p2771-0000-000_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_NR_DRAM_BANKS=1026 diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig index 6bdc1132f6d356cef87b57590c26c45fffb482ec..2e3eec0ee130e4153ec9d4af9704237095695ef3 100644 --- a/configs/p2771-0000-500_defconfig +++ b/configs/p2771-0000-500_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_NR_DRAM_BANKS=1026 diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig index 85402e9b8297b44aaad8ac0abc60bec026fca4b9..e4265d632158b5dd41ed4d57f703423bd076eb7f 100644 --- a/configs/p3450-0000_defconfig +++ b/configs/p3450-0000_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_SYS_MALLOC_LEN=0x2500000 @@ -32,6 +33,7 @@ CONFIG_OF_LIVE=y CONFIG_ENV_OVERWRITE=y # CONFIG_ENV_IS_IN_MMC is not set CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_ENV_SPI_MAX_HZ=48000000 CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y CONFIG_DFU_SF=y diff --git a/configs/paz00_defconfig b/configs/paz00_defconfig index a209e41d428534437f3f458ef9c2043a95f4fe0d..f11b57dde7587fc558d841af7b6872cb41c7fd06 100644 --- a/configs/paz00_defconfig +++ b/configs/paz00_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig index afdba34b773bfe7a8ab4d966fbb2f0cea4f80555..83f7d931221d32212576d8aededa43921f6c6521 100644 --- a/configs/pcm052_defconfig +++ b/configs/pcm052_defconfig @@ -15,6 +15,8 @@ CONFIG_ENV_OFFSET_REDUND=0xC0000 CONFIG_TARGET_PCM052=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run bootcmd_nand" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig index ce7be03f30ac764ce325705a005b8612a49b0eb4..b30270af71bd85e8794868cedba2ab74b9c6b9ad 100644 --- a/configs/pcm058_defconfig +++ b/configs/pcm058_defconfig @@ -27,7 +27,7 @@ CONFIG_CMD_HDMIDETECT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=3 -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run mmcboot;run nandboot" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SEPARATE_BSS=y diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig index dcd9a6b8896d392015f11e719a7ddb327228c0df..930191d7619090f511a245a1e5ffb1f5fff12e02 100644 --- a/configs/peach-pi_defconfig +++ b/configs/peach-pi_defconfig @@ -38,7 +38,6 @@ CONFIG_CMD_TPM_TEST=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y CONFIG_ENV_SPI_BUS=1 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_I2C_CROS_EC_TUNNEL=y diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig index 4259f1416e6602bef3c4f1145531ae4a24973968..16fde6d49ed12021eb9d6f3e68b302ae611b588b 100644 --- a/configs/peach-pit_defconfig +++ b/configs/peach-pit_defconfig @@ -37,7 +37,6 @@ CONFIG_CMD_TPM_TEST=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y CONFIG_ENV_SPI_BUS=1 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_I2C_CROS_EC_TUNNEL=y diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig index 267864f9ce8a1159c1c16604ab0098b5712a3f61..53d57e0ba20e62be88c77343c334ee6647ffc7a0 100644 --- a/configs/pg_wcom_expu1_defconfig +++ b/configs/pg_wcom_expu1_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-expu1" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x70000020 +CONFIG_SYS_CLK_FREQ=66666666 CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x82000000 diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig index 5b1aa8f1d7b637f235cac9b084bf0b7400c352b5..3eaf7fde9c91c6d3503803f0822c11447578911b 100644 --- a/configs/pg_wcom_seli8_defconfig +++ b/configs/pg_wcom_seli8_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-seli8" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x70000020 +CONFIG_SYS_CLK_FREQ=66666666 CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x82000000 diff --git a/configs/phycore-am335x-r2-regor_defconfig b/configs/phycore-am335x-r2-regor_defconfig index 3fd061ae950c3e32537622a9993413edadaacfb0..e2a5731c5e1661553134a712a36d4e3da010e4e5 100644 --- a/configs/phycore-am335x-r2-regor_defconfig +++ b/configs/phycore-am335x-r2-regor_defconfig @@ -17,6 +17,8 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_PAYLOAD="u-boot.img" # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="am335x-regor-rdk.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y diff --git a/configs/phycore-am335x-r2-wega_defconfig b/configs/phycore-am335x-r2-wega_defconfig index 70b7d9effd4deabf07860e56c58ce2d23eb13876..9459787992d8db9b8b5630c9089b3323abbc9080 100644 --- a/configs/phycore-am335x-r2-wega_defconfig +++ b/configs/phycore-am335x-r2-wega_defconfig @@ -17,6 +17,8 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_PAYLOAD="u-boot.img" # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="am335x-wega-rdk.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig index 89a4f28bba4f93fc6ecb6f5d0a7f864f1836178a..c6b2719350dac468fe5d8aabc164f424a4d8c70a 100644 --- a/configs/phycore-imx8mm_defconfig +++ b/configs/phycore-imx8mm_defconfig @@ -23,10 +23,14 @@ CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadimage; then run mmcboot; else run netboot; fi; fi;" CONFIG_DEFAULT_FDT_FILE="oftree" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_SPI_FLASH_MTD=y @@ -74,7 +78,6 @@ CONFIG_DM_I2C=y CONFIG_MISC=y CONFIG_I2C_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x51 -CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y @@ -85,7 +88,6 @@ CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=3 -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SF_DEFAULT_SPEED=80000000 CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig index 758c2881cb82611296f960ddd4e0f049769c3b48..2391aa4914104dd78ab4d02ddedf3d96639bef22 100644 --- a/configs/phycore-imx8mp_defconfig +++ b/configs/phycore-imx8mp_defconfig @@ -24,12 +24,16 @@ CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadimage; then run mmcboot; else run netboot; fi; fi;" CONFIG_DEFAULT_FDT_FILE="oftree" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y @@ -75,7 +79,6 @@ CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_MISC=y CONFIG_I2C_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x51 -CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig index a20274702046808cb6ce817e95b9dc9b2e48474d..63aabfbe81b5b9a045891f55f4b809550d0e6e3c 100644 --- a/configs/phycore-rk3288_defconfig +++ b/configs/phycore-rk3288_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y +CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/phycore_pcl063_defconfig b/configs/phycore_pcl063_defconfig index b89cdd90339beeca0ccb248c77ef2346186fb566..0a5e6c5458a42802fd60fc7e7f86a7d13427f939 100644 --- a/configs/phycore_pcl063_defconfig +++ b/configs/phycore_pcl063_defconfig @@ -17,7 +17,6 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 -# CONFIG_USE_BOOTCOMMAND is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/phycore_pcl063_ull_defconfig b/configs/phycore_pcl063_ull_defconfig index 694beb60fc565462475bbd2dcf3d36f8475cd6e7..a672b16f2370bc388c674ad0ed618b4779b94d59 100644 --- a/configs/phycore_pcl063_ull_defconfig +++ b/configs/phycore_pcl063_ull_defconfig @@ -16,7 +16,7 @@ CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=3 -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run mmc_mmc_fit" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/pic32mzdask_defconfig b/configs/pic32mzdask_defconfig index 4e86f32c190757413c665c1d6cd7786c8abcb395..ff6be7871d43f2233aacb77951cb9e2bf623e415 100644 --- a/configs/pic32mzdask_defconfig +++ b/configs/pic32mzdask_defconfig @@ -13,6 +13,7 @@ CONFIG_MIPS_BOOT_FDT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x88500000 CONFIG_BOOTDELAY=5 +CONFIG_BOOTCOMMAND="run distro_bootcmd || run legacy_bootcmd" CONFIG_SYS_PROMPT="dask # " # CONFIG_CMD_SAVEENV is not set CONFIG_LOOPW=y diff --git a/configs/pico-dwarf-imx7d_defconfig b/configs/pico-dwarf-imx7d_defconfig index 6df4d44e1ede6cfc24dd914a4148120fe4bffc66..13e4d9b0c202e0c91a226eee19ee04212c3cc61b 100644 --- a/configs/pico-dwarf-imx7d_defconfig +++ b/configs/pico-dwarf-imx7d_defconfig @@ -85,6 +85,7 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_SPLASH_SCREEN=y CONFIG_SPLASH_SCREEN_ALIGN=y diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig index a5b6a30556e040ce6e69c65229ae2eccefd4f220..7dc7e5d6ec34aa0fed9fd6d568247bf63fb208d9 100644 --- a/configs/pico-hobbit-imx7d_defconfig +++ b/configs/pico-hobbit-imx7d_defconfig @@ -85,6 +85,7 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_SPLASH_SCREEN=y CONFIG_SPLASH_SCREEN_ALIGN=y diff --git a/configs/pico-imx6_defconfig b/configs/pico-imx6_defconfig index 20c7d45a463bc60d5533d69af8391dafcedab2c9..2353dd762be4a379e3bcb569a232ceb8d64a7081 100644 --- a/configs/pico-imx6_defconfig +++ b/configs/pico-imx6_defconfig @@ -82,6 +82,7 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y # CONFIG_BACKLIGHT is not set # CONFIG_CMD_VIDCONSOLE is not set # CONFIG_VIDEO_BPP8 is not set diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig index 215537e8cd4d147706b0f2a0cc731f810fbae1d0..35021ac39b7cdfdbfb1d677fa8b2c804f3c4a0bb 100644 --- a/configs/pico-imx6ul_defconfig +++ b/configs/pico-imx6ul_defconfig @@ -79,6 +79,7 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y CONFIG_VIDEO_MXS=y CONFIG_SPLASH_SCREEN=y CONFIG_SPLASH_SCREEN_ALIGN=y diff --git a/configs/pico-imx7d_bl33_defconfig b/configs/pico-imx7d_bl33_defconfig index 3c669e7fe9dd54ab3d7236ea1c7e4bcd2b63addc..47aeda67a0662f962fe7e61125af861214e2f3d3 100644 --- a/configs/pico-imx7d_bl33_defconfig +++ b/configs/pico-imx7d_bl33_defconfig @@ -22,6 +22,8 @@ CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y @@ -81,6 +83,7 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_MXS=y CONFIG_SPLASH_SCREEN=y diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig index 8e7e10e1149fcf807753e33511fd70c9ec8fd9d9..ed20aeae685ce1170df60247d03d5aa7699a9c4a 100644 --- a/configs/pico-imx7d_defconfig +++ b/configs/pico-imx7d_defconfig @@ -85,6 +85,7 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_MXS=y CONFIG_SPLASH_SCREEN=y diff --git a/configs/pico-imx8mq_defconfig b/configs/pico-imx8mq_defconfig index e1bed3430a755c2d1c19f42e4ea56865fc346996..fae9dfd1f3bd474d1b16de16ea46a9b6a41a3b9c 100644 --- a/configs/pico-imx8mq_defconfig +++ b/configs/pico-imx8mq_defconfig @@ -24,9 +24,14 @@ CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set +CONFIG_OF_SYSTEM_SETUP=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y @@ -54,6 +59,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 +CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SUPPORT_EMMC_BOOT=y diff --git a/configs/pico-nymph-imx7d_defconfig b/configs/pico-nymph-imx7d_defconfig index 6df4d44e1ede6cfc24dd914a4148120fe4bffc66..13e4d9b0c202e0c91a226eee19ee04212c3cc61b 100644 --- a/configs/pico-nymph-imx7d_defconfig +++ b/configs/pico-nymph-imx7d_defconfig @@ -85,6 +85,7 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_SPLASH_SCREEN=y CONFIG_SPLASH_SCREEN_ALIGN=y diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig index 40a7232b65e34d849a83ce886596ad5441b64112..f74e83e96d3dc12970c97d0f401710070665bb4d 100644 --- a/configs/pico-pi-imx7d_defconfig +++ b/configs/pico-pi-imx7d_defconfig @@ -85,6 +85,7 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_SPLASH_SCREEN=y CONFIG_SPLASH_SCREEN_ALIGN=y diff --git a/configs/pine64_plus_defconfig b/configs/pine64_plus_defconfig index d1c2c3c3cc17ce7119be349a62fd339e278c915a..f42f4e5923abd79b5ebabed09916bd96e49f8957 100644 --- a/configs/pine64_plus_defconfig +++ b/configs/pine64_plus_defconfig @@ -8,7 +8,6 @@ CONFIG_PINE64_DT_SELECTION=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_OF_LIST="sun50i-a64-pine64 sun50i-a64-pine64-plus" CONFIG_PHY_REALTEK=y -CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/plutux_defconfig b/configs/plutux_defconfig index fc339d56b845795de1a3847891d7b65d1f650cd6..3a179fa5ae5ef49285a318b9441b5dfbdcb7314c 100644 --- a/configs/plutux_defconfig +++ b/configs/plutux_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 @@ -18,7 +19,6 @@ CONFIG_SYS_PROMPT="Tegra20 (Plutux) # " # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y -CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set @@ -31,6 +31,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_DM=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_TEGRA_NAND=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SYS_NS16550=y CONFIG_USB=y diff --git a/configs/pm9261_defconfig b/configs/pm9261_defconfig index 070769d9bd687f13d2afb7dba7bbd4b1a6befe66..eb07b420a3d362c8d139beca3bd446ff3090d067 100644 --- a/configs/pm9261_defconfig +++ b/configs/pm9261_defconfig @@ -15,6 +15,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock4 rootfstype=jffs2 fbcon=rotate:3 " +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run flashboot" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig index d2f48e3c40af886f65e302594f23fc84e1ea5135..e8a5b4df9bdf368b6aa41c4ba3b29da1f572b56e 100644 --- a/configs/pm9263_defconfig +++ b/configs/pm9263_defconfig @@ -15,6 +15,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock4 rootfstype=jffs2 fbcon=rotate:3 " +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run flashboot" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y @@ -29,6 +31,8 @@ CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_JFFS2=y +CONFIG_JFFS2_DEV="nand0" +CONFIG_JFFS2_PART_SIZE=0x10000000 CONFIG_MTDIDS_DEFAULT="nor0=physmap-flash.0,nand0=nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=physmap-flash.0:256k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),-(rootfs);nand:-(nand)" CONFIG_OF_CONTROL=y @@ -61,3 +65,4 @@ CONFIG_USB=y CONFIG_DM_VIDEO=y # CONFIG_VIDEO_BPP32 is not set CONFIG_LCD=y +CONFIG_JFFS2_NAND=y diff --git a/configs/pm9g45_defconfig b/configs/pm9g45_defconfig index 9382c389678f11f50073286bcd958ef3aa5f9b9d..7fbbbabf22f757b89a001f1005d40ff03e23eb36 100644 --- a/configs/pm9g45_defconfig +++ b/configs/pm9g45_defconfig @@ -8,7 +8,6 @@ CONFIG_TARGET_PM9G45=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 @@ -18,6 +17,8 @@ CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="fbcon=rotate:3 console=tty0 console=ttyS0,115200 root=/dev/mtdblock4 mtdparts=atmel_nand:128k(bootstrap)ro,256k(uboot)ro,1664k(env),2M(linux)ro,-(root) rw rootfstype=jffs2" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="nand read 0x70000000 0x200000 0x300000;bootm 0x70000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y @@ -46,6 +47,7 @@ CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y CONFIG_GENERIC_ATMEL_MCI=y CONFIG_MTD=y +CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT=y # CONFIG_SYS_NAND_USE_FLASH_BBT is not set CONFIG_NAND_ATMEL=y CONFIG_DM_ETH=y diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig index 056c1902977c9dc4477c90c565b6edccca4d22b5..10f08a515d967503cc200b5b570b5ee07a49dc66 100644 --- a/configs/pogo_e02_defconfig +++ b/configs/pogo_e02_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/cloudengines/pogo_e02/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_POGO_E02=y @@ -13,6 +14,8 @@ CONFIG_IDENT_STRING="\nPogo E02" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs $(bootargs_console); run bootcmd_usb; bootm 0x00800000 0x01100000" CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="PogoE02> " diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig index 98fb823c928b5206f416f46869b86de2af3ce775..46988d91a26d23f180618e2eb1133c07890f823a 100644 --- a/configs/popmetal-rk3288_defconfig +++ b/configs/popmetal-rk3288_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y +CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig index 55f646537b245f2a696780f51042cf628c7ffcb2..d1f928d69128b47c45572245ed83c911d9de467a 100644 --- a/configs/qemu-ppce500_defconfig +++ b/configs/qemu-ppce500_defconfig @@ -1,6 +1,8 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xf01000 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="qemu-ppce500" +CONFIG_SYS_CLK_FREQ=33000000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_QEMU_PPCE500=y @@ -8,6 +10,8 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=1 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $fdtcontroladdr" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y @@ -24,7 +28,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_DOS_PARTITION=y CONFIG_OF_CONTROL=y -CONFIG_OF_BOARD=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y @@ -53,4 +56,5 @@ CONFIG_VIRTIO_PCI=y CONFIG_VIRTIO_NET=y CONFIG_VIRTIO_BLK=y CONFIG_ADDR_MAP=y +# CONFIG_BINMAN_FDT is not set CONFIG_PANIC_HANG=y diff --git a/configs/qemu-riscv32_defconfig b/configs/qemu-riscv32_defconfig index 0b8cd191618687f9e61714c585837e1de44fa944..b892fd6d6ecb3e32d8544fdb0732be295ba26d5c 100644 --- a/configs/qemu-riscv32_defconfig +++ b/configs/qemu-riscv32_defconfig @@ -2,6 +2,7 @@ CONFIG_RISCV=y CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="qemu-virt32" CONFIG_TARGET_QEMU_VIRT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x80200000 @@ -11,6 +12,5 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set -CONFIG_OF_BOARD=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y diff --git a/configs/qemu-riscv32_smode_defconfig b/configs/qemu-riscv32_smode_defconfig index 4d65104f7b4a46cccbec4772b2b5a67cd0a77e75..b4856fd3852459413a32eafbd3922ff55b706137 100644 --- a/configs/qemu-riscv32_smode_defconfig +++ b/configs/qemu-riscv32_smode_defconfig @@ -2,6 +2,7 @@ CONFIG_RISCV=y CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="qemu-virt32" CONFIG_TARGET_QEMU_VIRT=y CONFIG_RISCV_SMODE=y CONFIG_DISTRO_DEFAULTS=y @@ -12,7 +13,6 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set -CONFIG_OF_BOARD=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y CONFIG_SYSRESET_SBI=y diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig index eb64c51a2144de65a90af44761c68579c77185b8..efe8d390fd9980389d2d3d8f30dad6d11148de09 100644 --- a/configs/qemu-riscv32_spl_defconfig +++ b/configs/qemu-riscv32_spl_defconfig @@ -2,10 +2,11 @@ CONFIG_RISCV=y CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 -CONFIG_DEFAULT_DEVICE_TREE="qemu-virt" +CONFIG_DEFAULT_DEVICE_TREE="qemu-virt32" CONFIG_SPL=y CONFIG_TARGET_QEMU_VIRT=y CONFIG_RISCV_SMODE=y +# CONFIG_OF_BOARD_FIXUP is not set CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x80200000 CONFIG_FIT=y @@ -14,7 +15,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_CMD_SBI=y # CONFIG_CMD_MII is not set -CONFIG_OF_BOARD=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y CONFIG_SYSRESET_SBI=y +# CONFIG_BINMAN_FDT is not set diff --git a/configs/qemu-riscv64_defconfig b/configs/qemu-riscv64_defconfig index 4faa6dad8d600b585f6d75a3a81e79d649b78b16..036484c7f7959db0b5865765a37fe691badaec34 100644 --- a/configs/qemu-riscv64_defconfig +++ b/configs/qemu-riscv64_defconfig @@ -2,6 +2,7 @@ CONFIG_RISCV=y CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="qemu-virt64" CONFIG_TARGET_QEMU_VIRT=y CONFIG_ARCH_RV64I=y CONFIG_DISTRO_DEFAULTS=y @@ -12,6 +13,5 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set -CONFIG_OF_BOARD=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig index f575c127b7cdff17ee60b3bd50277f011aefb07c..e519bb6bb78d51cf8f5142e8a86f175e54033dc7 100644 --- a/configs/qemu-riscv64_smode_defconfig +++ b/configs/qemu-riscv64_smode_defconfig @@ -2,6 +2,7 @@ CONFIG_RISCV=y CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="qemu-virt64" CONFIG_TARGET_QEMU_VIRT=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y @@ -15,7 +16,6 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set -CONFIG_OF_BOARD=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y CONFIG_SYSRESET_SBI=y diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig index 0fbdb7564c6ce44a766d788162c7116cc7e0329b..8b512372d6c36eed1cb82feded65cc93284359c8 100644 --- a/configs/qemu-riscv64_spl_defconfig +++ b/configs/qemu-riscv64_spl_defconfig @@ -2,7 +2,7 @@ CONFIG_RISCV=y CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 -CONFIG_DEFAULT_DEVICE_TREE="qemu-virt" +CONFIG_DEFAULT_DEVICE_TREE="qemu-virt64" CONFIG_SPL=y CONFIG_TARGET_QEMU_VIRT=y CONFIG_ARCH_RV64I=y @@ -15,7 +15,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_CMD_SBI=y # CONFIG_CMD_MII is not set -CONFIG_OF_BOARD=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y CONFIG_SYSRESET_SBI=y +# CONFIG_BINMAN_FDT is not set diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig index e8a6f752cda27ea358e64019454e8e9dce6a011d..5e41ea980f3b002dacbe7b195ec676d08f1ed3ca 100644 --- a/configs/qemu_arm64_defconfig +++ b/configs/qemu_arm64_defconfig @@ -5,6 +5,10 @@ CONFIG_SYS_MALLOC_LEN=0x1000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_DEFAULT_DEVICE_TREE="qemu-arm64" +CONFIG_DEBUG_UART_BASE=0x9000000 +CONFIG_DEBUG_UART_CLOCK=0 +CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x40200000 @@ -25,7 +29,6 @@ CONFIG_CMD_PCI=y CONFIG_CMD_USB=y CONFIG_CMD_TPM=y CONFIG_CMD_MTDPARTS=y -CONFIG_OF_BOARD=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0x4000000 CONFIG_SCSI_AHCI=y @@ -48,6 +51,8 @@ CONFIG_PCI=y CONFIG_PCIE_ECAM_GENERIC=y CONFIG_SCSI=y CONFIG_DM_SCSI=y +CONFIG_DEBUG_UART_PL011=y +CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_TPM2_MMIO=y diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig index b4593051444d1ec1f8cf4765c23baee280a97fc7..4197cb0f92b42fe252a7904262e8a6ffdf61ad3e 100644 --- a/configs/qemu_arm_defconfig +++ b/configs/qemu_arm_defconfig @@ -5,8 +5,12 @@ CONFIG_SYS_MALLOC_LEN=0x1000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_DEFAULT_DEVICE_TREE="qemu-arm" CONFIG_TARGET_QEMU_ARM_32BIT=y +CONFIG_DEBUG_UART_BASE=0x9000000 +CONFIG_DEBUG_UART_CLOCK=0 CONFIG_ARMV7_LPAE=y +CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x40200000 @@ -27,7 +31,6 @@ CONFIG_CMD_PCI=y CONFIG_CMD_USB=y CONFIG_CMD_TPM=y CONFIG_CMD_MTDPARTS=y -CONFIG_OF_BOARD=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0x4000000 CONFIG_SCSI_AHCI=y @@ -50,6 +53,8 @@ CONFIG_PCI=y CONFIG_PCIE_ECAM_GENERIC=y CONFIG_SCSI=y CONFIG_DM_SCSI=y +CONFIG_DEBUG_UART_PL011=y +CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_TPM2_MMIO=y diff --git a/configs/r2dplus_defconfig b/configs/r2dplus_defconfig index 7d06dea72135e210e3c02fb5c594835220124a5b..9e2036a946b9a23e9cb8f747c629519d0f14eeb6 100644 --- a/configs/r2dplus_defconfig +++ b/configs/r2dplus_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="sh7751-r2dplus" +CONFIG_SYS_CLK_FREQ=60000000 CONFIG_TARGET_R2DPLUS=y CONFIG_SYS_LOAD_ADDR=0x8e000000 CONFIG_BOOTDELAY=-1 diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig index b47745b9addb9502fbeb31a5ae28d2dbc23abfa3..07a0b095498af6cfe3379a637747f49dda48cb4b 100644 --- a/configs/r8a77970_eagle_defconfig +++ b/configs/r8a77970_eagle_defconfig @@ -16,6 +16,8 @@ CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77970-eagle.dtb; booti 0x48080000 - 0x48000000" CONFIG_DEFAULT_FDT_FILE="r8a77970-eagle.dtb" CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/r8a77980_condor_defconfig b/configs/r8a77980_condor_defconfig index 22815d7d5ac7977425f7cd616ccd8807a1f40651..582d717aeeb3187507f34b6dbcdbc23a3f76ef7f 100644 --- a/configs/r8a77980_condor_defconfig +++ b/configs/r8a77980_condor_defconfig @@ -16,6 +16,8 @@ CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77980-condor.dtb; booti 0x48080000 - 0x48000000" CONFIG_DEFAULT_FDT_FILE="r8a77980-condor.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_HUSH_PARSER=y diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig index 0c1e5a1592b66c65db43fd42a7ec9e2a5843e977..79ec7009c5055bafcd96736e10af9f91a2ec6e92 100644 --- a/configs/r8a77990_ebisu_defconfig +++ b/configs/r8a77990_ebisu_defconfig @@ -15,6 +15,8 @@ CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77990-ebisu.dtb; booti 0x48080000 - 0x48000000" CONFIG_DEFAULT_FDT_FILE="r8a77990-ebisu.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_UPDATE_TFTP=y @@ -67,6 +69,7 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_RENESAS_RPC_HF=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig index fcf4268592e4be095741015aca52fd5b6af175e7..726609ad62a038864810dab10697d700af244db5 100644 --- a/configs/r8a77995_draak_defconfig +++ b/configs/r8a77995_draak_defconfig @@ -15,6 +15,8 @@ CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77995-draak.dtb; booti 0x48080000 - 0x48000000" CONFIG_DEFAULT_FDT_FILE="r8a77995-draak.dtb" CONFIG_UPDATE_TFTP=y CONFIG_HUSH_PARSER=y diff --git a/configs/r8a779a0_falcon_defconfig b/configs/r8a779a0_falcon_defconfig index bad55854223155cbd1c210de09c151a7a4c08f1d..e857da96ca07011f748c026b660494a7a2097fc1 100644 --- a/configs/r8a779a0_falcon_defconfig +++ b/configs/r8a779a0_falcon_defconfig @@ -11,6 +11,7 @@ CONFIG_DEFAULT_DEVICE_TREE="r8a779a0-falcon-u-boot" CONFIG_SPL_TEXT_BASE=0xe6338000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_FALCON=y +CONFIG_SYS_CLK_FREQ=16666666 # CONFIG_PSCI_RESET is not set CONFIG_ARMV8_PSCI=y CONFIG_SYS_LOAD_ADDR=0x58000000 @@ -18,6 +19,8 @@ CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a779a0-falcon.dtb; booti 0x48080000 - 0x48000000" CONFIG_DEFAULT_FDT_FILE="r8a779a0-falcon.dtb" CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/rcar3_salvator-x_defconfig b/configs/rcar3_salvator-x_defconfig index 2b2c273f6af7f71504cc41d06907a8bd0b05238c..57a2c01932f873e754c715c22d5cfb8701f7e41f 100644 --- a/configs/rcar3_salvator-x_defconfig +++ b/configs/rcar3_salvator-x_defconfig @@ -13,6 +13,8 @@ CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77950-salvator-x.dtb; booti 0x48080000 - 0x48000000" CONFIG_DEFAULT_FDT_FILE="r8a77950-salvator-x.dtb" CONFIG_UPDATE_TFTP=y CONFIG_HUSH_PARSER=y @@ -68,6 +70,7 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_RENESAS_RPC_HF=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/rcar3_ulcb_defconfig b/configs/rcar3_ulcb_defconfig index 0a9bed36a2fdc7bd2278f1c18f9383840f7805b1..b18ef389e460bd20213e8079ac2c1700e8b5ade2 100644 --- a/configs/rcar3_ulcb_defconfig +++ b/configs/rcar3_ulcb_defconfig @@ -15,6 +15,8 @@ CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77950-ulcb.dtb; booti 0x48080000 - 0x48000000" CONFIG_DEFAULT_FDT_FILE="r8a77950-ulcb.dtb" CONFIG_UPDATE_TFTP=y CONFIG_HUSH_PARSER=y @@ -69,6 +71,7 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_RENESAS_RPC_HF=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig index 0dd538e5c1adc1168576432dd8a1208cf081c780..3c277ed65a0cf1f9fc91a0f54674ff5c2cab21a1 100644 --- a/configs/riotboard_defconfig +++ b/configs/riotboard_defconfig @@ -69,6 +69,7 @@ CONFIG_USB=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y # CONFIG_BACKLIGHT is not set # CONFIG_CMD_VIDCONSOLE is not set # CONFIG_VIDEO_BPP8 is not set diff --git a/configs/roc-cc-rk3308_defconfig b/configs/roc-cc-rk3308_defconfig index c867cff4b271b3339979d6222657650a87c018da..94492648f553fdb6d5aa22ff32d6de6e8b17ecc0 100644 --- a/configs/roc-cc-rk3308_defconfig +++ b/configs/roc-cc-rk3308_defconfig @@ -49,6 +49,7 @@ CONFIG_CLK=y # CONFIG_USB_FUNCTION_FASTBOOT is not set CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_DM_ETH=y diff --git a/configs/rock-pi-n8-rk3288_defconfig b/configs/rock-pi-n8-rk3288_defconfig index c06094145ea593d2a3750121beb101f9c964d611..ab29c5b4bd9a29dcb1eab7ef1fc0a49802570cb9 100644 --- a/configs/rock-pi-n8-rk3288_defconfig +++ b/configs/rock-pi-n8-rk3288_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y +CONFIG_SYS_ARCH_TIMER=y # CONFIG_SPL_USE_ARCH_MEMCPY is not set # CONFIG_SPL_USE_ARCH_MEMSET is not set CONFIG_ARCH_ROCKCHIP=y diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig index c9a5ba2bba52480f2118fcb98899f2808790fe7a..b97aa6b02f330a9624461d752583387e3476b648 100644 --- a/configs/rock2_defconfig +++ b/configs/rock2_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y +CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/rock_defconfig b/configs/rock_defconfig index bc97636d10bbb4228fc02056a85ead81d0d04d41..46df66994b3e2e3f5b69b7c156ac74c75443f2ab 100644 --- a/configs/rock_defconfig +++ b/configs/rock_defconfig @@ -55,6 +55,7 @@ CONFIG_REGULATOR_ACT8846=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_RAM=y CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_ROCKCHIP_SERIAL=y CONFIG_SYSRESET=y CONFIG_TIMER=y CONFIG_SPL_TIMER=y diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig index 6d76d12910d3c84553bffbc875fe067388514358..195541c6e7658bbfb73908ba5fa0305ed6218c93 100644 --- a/configs/rpi_0_w_defconfig +++ b/configs/rpi_0_w_defconfig @@ -13,6 +13,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig index 19316071322ac9017d926d033c3c92e422bae299..eb63fbdd8d9cdeeed3caffd58eeefc19b7bcf29b 100644 --- a/configs/rpi_2_defconfig +++ b/configs/rpi_2_defconfig @@ -14,6 +14,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig index 060fd36da539a8e575001b0d7f6ff75a9a55f2f9..46102899f0372dd0b006c55ed0df28521b9885a4 100644 --- a/configs/rpi_3_32b_defconfig +++ b/configs/rpi_3_32b_defconfig @@ -15,6 +15,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/rpi_3_b_plus_defconfig b/configs/rpi_3_b_plus_defconfig index 0a69f97342e562bf58b65ab252a3997156bae72c..91b63b62721cbbef1f72ca98004caf2847b108f9 100644 --- a/configs/rpi_3_b_plus_defconfig +++ b/configs/rpi_3_b_plus_defconfig @@ -14,6 +14,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig index 8016fe1d557d059ef55e8d6f7a2690c3a8b33186..528b12ea5b557353d206fe4e08341a37a31f4887 100644 --- a/configs/rpi_3_defconfig +++ b/configs/rpi_3_defconfig @@ -14,6 +14,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig index 990589de643e9b9af866101fea665fa80f34fd71..8f87a4336d22aa1af7866ccb429eb60a5600029c 100644 --- a/configs/rpi_4_32b_defconfig +++ b/configs/rpi_4_32b_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00008000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_RPI_4_32B=y CONFIG_ENV_SIZE=0x4000 +CONFIG_DEFAULT_DEVICE_TREE="bcm2711-rpi-4-b" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_OF_BOARD_SETUP=y @@ -12,6 +13,7 @@ CONFIG_PREBOOT="pci enum; usb start;" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y @@ -19,7 +21,6 @@ CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y CONFIG_CMD_FS_UUID=y -CONFIG_OF_BOARD=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig index 0720505c6a5166104558c7b4ba76d9b1cd9da417..461a7655ab9015e0d6cceae16cbc6e71c790d394 100644 --- a/configs/rpi_4_defconfig +++ b/configs/rpi_4_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00080000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_RPI_4=y CONFIG_ENV_SIZE=0x4000 +CONFIG_DEFAULT_DEVICE_TREE="bcm2711-rpi-4-b" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_OF_BOARD_SETUP=y @@ -12,6 +13,7 @@ CONFIG_PREBOOT="pci enum; usb start;" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y @@ -19,7 +21,6 @@ CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y CONFIG_CMD_FS_UUID=y -CONFIG_OF_BOARD=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig index 06ae3e93b2d89780af429fcde49162087fd97df2..351d247daeb7b2d6dc72e40ad5aff3524f3ea064 100644 --- a/configs/rpi_arm64_defconfig +++ b/configs/rpi_arm64_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00080000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_RPI_ARM64=y CONFIG_ENV_SIZE=0x4000 +CONFIG_DEFAULT_DEVICE_TREE="bcm2711-rpi-4-b" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_OF_BOARD_SETUP=y @@ -12,13 +13,13 @@ CONFIG_PREBOOT="pci enum; usb start;" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y CONFIG_CMD_FS_UUID=y -CONFIG_OF_BOARD=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_TFTP_TSIZE=y diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig index 8acf04d0e43214bf471e5e0013673762db7f7b6a..0baef3b6abfa4aa7ed364d1c8d9687fe1cdb78a7 100644 --- a/configs/rpi_defconfig +++ b/configs/rpi_defconfig @@ -13,6 +13,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/rzg2_beacon_defconfig b/configs/rzg2_beacon_defconfig index 6c48c3b8c91d79050bff0c778f3a5d5d19e18433..e1af7b48158ace25db29b17e17bb98d75b9a40b8 100644 --- a/configs/rzg2_beacon_defconfig +++ b/configs/rzg2_beacon_defconfig @@ -14,6 +14,8 @@ CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" CONFIG_DEFAULT_FDT_FILE="r8a774a1-beacon-rzg2m-kit.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_HUSH_PARSER=y diff --git a/configs/s400_defconfig b/configs/s400_defconfig index 4467e66929962c5f6f0d814d5a1fa59bd04b5f30..8483694685a4dff28f29f83ec0283ed9473cc026 100644 --- a/configs/s400_defconfig +++ b/configs/s400_defconfig @@ -25,7 +25,6 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_MMC_MESON_GX=y CONFIG_PHY_REALTEK=y CONFIG_DM_ETH=y diff --git a/configs/s5p4418_nanopi2_defconfig b/configs/s5p4418_nanopi2_defconfig index fa59cfd069239a908349f917df7b452861f0a0cf..0e17e759b5877a2c57fb633774aa0d4cedf9408c 100644 --- a/configs/s5p4418_nanopi2_defconfig +++ b/configs/s5p4418_nanopi2_defconfig @@ -50,6 +50,7 @@ CONFIG_DM_PMIC=y CONFIG_DM_REGULATOR=y CONFIG_CONS_INDEX=0 CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y CONFIG_DISPLAY=y CONFIG_VIDEO_NX=y CONFIG_VIDEO_NX_RGB=y diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig index ed5045c27712212ae2b50b6375d72f0cc89966c1..80f693e35e817eacaf606f1460c3f28bedb605dc 100644 --- a/configs/s5p_goni_defconfig +++ b/configs/s5p_goni_defconfig @@ -13,6 +13,8 @@ CONFIG_SYS_LOAD_ADDR=0x34000000 # CONFIG_AUTOBOOT is not set CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock8 rootfstype=ext4 ${console} ${meminfo} ${mtdparts}" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run mmcboot" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y diff --git a/configs/s5pc210_universal_defconfig b/configs/s5pc210_universal_defconfig index 87001d321aeb1f043a1a0454baf9eda14ce3a4f5..3c0c7b53547bd5018133a129ef1a10616596b84e 100644 --- a/configs/s5pc210_universal_defconfig +++ b/configs/s5pc210_universal_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_ARCH_CPU_INIT=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_EXYNOS=y CONFIG_SYS_TEXT_BASE=0x44800000 CONFIG_SYS_MALLOC_LEN=0x5001000 @@ -14,7 +15,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x44800000 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="Please use defined boot" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run mmcboot" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_MISC_INIT_R=y @@ -45,6 +46,7 @@ CONFIG_MMC_SDHCI_S5P=y CONFIG_MTD=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_MAX8998=y +CONFIG_SOFT_SPI=y CONFIG_USB=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Samsung" diff --git a/configs/sam9x60ek_mmc_defconfig b/configs/sam9x60ek_mmc_defconfig index d417899f810dc16715062600e4de06d649754106..59fc4a983d88951fddffff3fc780ac6366d450b7 100644 --- a/configs/sam9x60ek_mmc_defconfig +++ b/configs/sam9x60ek_mmc_defconfig @@ -19,13 +19,17 @@ CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="mem=256M console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x21000000 at91-sam9x60ek.dtb;fatload mmc 0:1 0x22000000 zImage;bootz 0x22000000 - 0x21000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_BOOTZ=y +CONFIG_CMD_CLK=y CONFIG_CMD_DM=y +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/sam9x60ek_nandflash_defconfig b/configs/sam9x60ek_nandflash_defconfig index 590e887c94c76e8bbdd872b47172560085bfc9cf..48b6a6a77468ee56417a8666a04e2b8d853e5873 100644 --- a/configs/sam9x60ek_nandflash_defconfig +++ b/configs/sam9x60ek_nandflash_defconfig @@ -19,14 +19,18 @@ CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=12 root=ubi0:rootfs rw" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x600000; nand read 0x21000000 0x180000 0x20000; bootz 0x22000000 - 0x21000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_BOOTZ=y +CONFIG_CMD_CLK=y CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/sam9x60ek_qspiflash_defconfig b/configs/sam9x60ek_qspiflash_defconfig index 292a1abcc4f0ab39400beaaac9faa14eb62226f2..4e46e46175afd81574c69e215893465d343249ac 100644 --- a/configs/sam9x60ek_qspiflash_defconfig +++ b/configs/sam9x60ek_qspiflash_defconfig @@ -20,14 +20,18 @@ CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=12 root=ubi0:rootfs rw" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x180000 0x80000; sf read 0x22000000 0x200000 0x600000; bootz 0x22000000 - 0x21000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_BOOTZ=y +CONFIG_CMD_CLK=y CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y @@ -42,14 +46,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=0 -CONFIG_USE_ENV_SPI_CS=y -CONFIG_ENV_SPI_CS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 -CONFIG_USE_ENV_SPI_MODE=y -CONFIG_ENV_SPI_MODE=0x0 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_CLK=y diff --git a/configs/sama5d27_giantboard_defconfig b/configs/sama5d27_giantboard_defconfig index 9e0eb673172b58f14ef0c16d0d5b61948a1e7982..9ca984c1c95408454f8b5d744d71e841d2bee2ea 100644 --- a/configs/sama5d27_giantboard_defconfig +++ b/configs/sama5d27_giantboard_defconfig @@ -34,6 +34,8 @@ CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_AUTOBOOT_KEYED_CTRLC=y CONFIG_USE_BOOTARGS=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="fatload mmc 0 0x22000000 at91-sama5d27_giantboard.dtb; fatload mmc 0 0x23000000 zImage; bootz 0x23000000 - 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig index fe2ca072ba943b0892d2bade2619c5da9d2dc879..afcd41a965558785f7caca1f099ffa97e5ce77b2 100644 --- a/configs/sama5d27_som1_ek_mmc1_defconfig +++ b/configs/sama5d27_som1_ek_mmc1_defconfig @@ -30,11 +30,15 @@ CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk1p2 rw rootwait" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="fatload mmc 1 0x22000000 at91-sama5d27_som1_ek.dtb; fatload mmc 1 0x23000000 zImage; bootz 0x23000000 - 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig index d685391ca51346de70bfe9d4b095a5b0b365ef14..149e4802c9c2e88bf109950645c87ba68d5c1107 100644 --- a/configs/sama5d27_som1_ek_mmc_defconfig +++ b/configs/sama5d27_som1_ek_mmc_defconfig @@ -31,11 +31,15 @@ CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="fatload mmc 0 0x22000000 at91-sama5d27_som1_ek.dtb; fatload mmc 0 0x23000000 zImage; bootz 0x23000000 - 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig index bd59526b41f847be8d8e6d541224c509723b0bfc..3fb79bed2a6fe6bcb2a1608c89632d22bf2dc998 100644 --- a/configs/sama5d27_som1_ek_qspiflash_defconfig +++ b/configs/sama5d27_som1_ek_qspiflash_defconfig @@ -35,7 +35,9 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwai CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -50,14 +52,7 @@ CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=0 -CONFIG_USE_ENV_SPI_CS=y -CONFIG_ENV_SPI_CS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 -CONFIG_USE_ENV_SPI_MODE=y -CONFIG_ENV_SPI_MODE=0x0 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SPL_DM=y diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig index 75a80753c949e47b4dd078b25cee0a6f2e3e3ed8..d1dee0226e0dc14e96e48596a0c2d6b0db1e6936 100644 --- a/configs/sama5d27_wlsom1_ek_mmc_defconfig +++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig @@ -29,6 +29,8 @@ CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_name}.dtb; fi; fatload mmc 0:1 0x21000000 ${dtb_name}; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y @@ -37,7 +39,9 @@ CONFIG_SPL_DISPLAY_PRINT=y CONFIG_SPL_AT91_MCK_BYPASS=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig index 42ebb1aa05d68ee89541cf9950c76dfdde738b3b..700aef75ecebeea54ffc7bfb0f0f12d38b7d6051 100644 --- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig +++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig @@ -29,6 +29,8 @@ CONFIG_QSPI_BOOT=y CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x22000000 0x6c000 0x394000; bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y @@ -40,7 +42,9 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_AT91_MCK_BYPASS=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -56,14 +60,6 @@ CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=2 -CONFIG_USE_ENV_SPI_CS=y -CONFIG_ENV_SPI_CS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=50000000 -CONFIG_USE_ENV_SPI_MODE=y -CONFIG_ENV_SPI_MODE=0x0 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SPL_DM=y diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig index 2e699a71807faffe11afefe0425203055daaaaae..7761a57e0ccb2a1456c20bd4e416a1849e8f64a9 100644 --- a/configs/sama5d2_icp_mmc_defconfig +++ b/configs/sama5d2_icp_mmc_defconfig @@ -29,6 +29,8 @@ CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x21000000 at91-sama5d2_icp.dtb; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_DISPLAY_PRINT=y @@ -39,6 +41,8 @@ CONFIG_SPL_AT91_MCK_BYPASS=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set +CONFIG_CMD_DM=y +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/sama5d2_icp_qspiflash_defconfig b/configs/sama5d2_icp_qspiflash_defconfig index 7722a5e893764f35d690705053f0697803a411d2..88bbbb4d3fa0a0032938f349a7d815036f2d0d06 100644 --- a/configs/sama5d2_icp_qspiflash_defconfig +++ b/configs/sama5d2_icp_qspiflash_defconfig @@ -24,6 +24,8 @@ CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlycon earlyprintk=serial,ttyS0, ignore_loglevel root=/dev/mmcblk0p2 memtest=0 rootfstype=ext4 rw rootwait" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x21000000 at91-sama5d2_icp.dtb; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y @@ -51,14 +53,6 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=2 -CONFIG_USE_ENV_SPI_CS=y -CONFIG_ENV_SPI_CS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=66000000 -CONFIG_USE_ENV_SPI_MODE=y -CONFIG_ENV_SPI_MODE=0x0 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_CLK=y diff --git a/configs/sama5d2_ptc_ek_mmc_defconfig b/configs/sama5d2_ptc_ek_mmc_defconfig index 5a8e20a0988d9c13ff1dbb11dcf5c094b4d4e963..9f458e100b2319a2fea8cab279a0c62d383b5d0e 100644 --- a/configs/sama5d2_ptc_ek_mmc_defconfig +++ b/configs/sama5d2_ptc_ek_mmc_defconfig @@ -21,12 +21,16 @@ CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_name}.dtb; fi; fatload mmc 0:1 0x21000000 ${dtb_name}; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000" CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/sama5d2_ptc_ek_nandflash_defconfig b/configs/sama5d2_ptc_ek_nandflash_defconfig index 4d09a97b1f35f468b1faa0f43a7992833b080767..6460ff3dad5fda879a045fe753440caf37ce45ca 100644 --- a/configs/sama5d2_ptc_ek_nandflash_defconfig +++ b/configs/sama5d2_ptc_ek_nandflash_defconfig @@ -21,12 +21,16 @@ CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0x200000 0x600000;bootz 0x22000000 - 0x21000000" CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig index 8e1b3a5cc3024b76c4939d4d7d52567642590713..844a9cde64764f3912a860bafaa32f66e6f98f7e 100644 --- a/configs/sama5d2_xplained_emmc_defconfig +++ b/configs/sama5d2_xplained_emmc_defconfig @@ -30,10 +30,14 @@ CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x22000000 at91-sama5d2_xplained.dtb; fatload mmc 0:1 0x23000000 zImage; bootz 0x23000000 - 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index 18e3c37053a1a4a6af8a96607abc3c1aeb49d82b..0de063658788b5e26a435d116208243d0800f67b 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -31,11 +31,15 @@ CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk1p2 rw rootwait" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="fatload mmc 1:1 0x22000000 at91-sama5d2_xplained.dtb; fatload mmc 1:1 0x23000000 zImage; bootz 0x23000000 - 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig index 6a5e0f99259c10ff29de77a76649ea033451af1e..a6e002e59ef767fb6e12b4642836176f2c85fcb3 100644 --- a/configs/sama5d2_xplained_qspiflash_defconfig +++ b/configs/sama5d2_xplained_qspiflash_defconfig @@ -31,11 +31,15 @@ CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p1 rw rootwait" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe 1:0; sf read 0x22000000 0x180000 0x80000; sf read 0x23000000 0x200000 0x600000; bootz 0x23000000 - 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index 65dcf396bcce168d00119f11a98ec6157cac3725..676385fe5585e466c16dcaff4f3743e7b6820803 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -32,6 +32,8 @@ CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p1 rw rootwait" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="ext4load mmc 0:1 0x22000000 /boot/at91-sama5d2_xplained.dtb; ext4load mmc 0:1 0x23000000 /boot/zImage; bootz 0x23000000 - 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_DM_SPI_FLASH=y @@ -39,7 +41,9 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/sama5d36ek_cmp_mmc_defconfig b/configs/sama5d36ek_cmp_mmc_defconfig index db31942227c69bfc5e06db304744493c0869d0fd..19673525f1f4b883d6729fbedf1c60eabeaaeb73 100644 --- a/configs/sama5d36ek_cmp_mmc_defconfig +++ b/configs/sama5d36ek_cmp_mmc_defconfig @@ -20,6 +20,8 @@ CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_name}.dtb; fi; fatload mmc 0:1 0x21000000 ${dtb_name}; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig index 84260c265ad40f426a69a36fc321c7e272ce630e..a7cf6b2d9964abe6df2f566cd2af26e6f3d20117 100644 --- a/configs/sama5d36ek_cmp_nandflash_defconfig +++ b/configs/sama5d36ek_cmp_nandflash_defconfig @@ -20,6 +20,8 @@ CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0x200000 0x600000;bootz 0x22000000 - 0x21000000" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig index a66d5233794ee77f00755fb95b90831055dc40d6..33ce03c9ffed0da574386667bb08240fa84ab280 100644 --- a/configs/sama5d36ek_cmp_spiflash_defconfig +++ b/configs/sama5d36ek_cmp_spiflash_defconfig @@ -22,6 +22,8 @@ CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x22000000 0x6c000 0x394000; bootz 0x22000000 - 0x21000000" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index e0b69616ebca60379ba06fa5e90c76c9c0e3d91f..7660dbede2df8b1e09b9889abaf9446e5087eaed 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -30,6 +30,8 @@ CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_name}.dtb; fi; fatload mmc 0:1 0x21000000 ${dtb_name}; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index 75dfc808b75ee6c821aff387c74cfe661acfbdcc..97361a0f90145dfe950eff1639f8d2e8837047cb 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -27,6 +27,8 @@ CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0x200000 0x600000;bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index 7cc69e9823078301a744361fc4d1f26cefe4a864..7828bfdd42d2416a026fcfc9b3fca3fe570815e1 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -30,6 +30,8 @@ CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_name}.dtb; fi; fatload mmc 0:1 0x21000000 ${dtb_name}; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index aab4b9932154f9a16d4be009794f59c57c3a7eb9..5e2b79e10ee4e93473d1911693741b58f847a26f 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -27,6 +27,8 @@ CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0x200000 0x600000;bootz 0x22000000 - 0x21000000" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index 54461f0c768ad235764852ac5239636fc4c409cc..bffcc49e1c35c768d958fd674bef908547a7015b 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -32,6 +32,8 @@ CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x22000000 0x6c000 0x394000; bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index d9f58ef90a82cbd9dbbb3ff2e428906ab8798138..c664274bfb8004cef8b4d463943263d0241978fa 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -30,6 +30,8 @@ CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_name}.dtb; fi; fatload mmc 0:1 0x21000000 ${dtb_name}; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index 5e605d7bdd409629ca9a390ab8cd85a2667e888d..c6cb19e43863b4ca15e9305cfcd7de0f5868d580 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -27,6 +27,8 @@ CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0x200000 0x600000;bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index a9f8d8795657173cb1ed397f2d55eae56a13183b..3a7da73090ff419666239a842f022fc526df1283 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -32,6 +32,8 @@ CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x22000000 0x6c000 0x394000; bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_DM_SPI_FLASH=y diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig index ed5955d0696f04679177643acc6496061e3f2b76..b0689fbe816bd50c94787151584271469bd5f1e4 100644 --- a/configs/sama5d4ek_mmc_defconfig +++ b/configs/sama5d4ek_mmc_defconfig @@ -30,6 +30,8 @@ CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_name}.dtb; fi; fatload mmc 0:1 0x21000000 ${dtb_name}; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig index c39ad413b6b27eae9b30d1e8d2f1354fc6970919..a8530264157ccb0aa684948381c388b47b8de3e7 100644 --- a/configs/sama5d4ek_nandflash_defconfig +++ b/configs/sama5d4ek_nandflash_defconfig @@ -27,6 +27,8 @@ CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0x200000 0x600000;bootz 0x22000000 - 0x21000000" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig index e1f66a241689e10cb35bd7033dc8b9e3fcec5254..b36f4b519f44272eef5e7892e7dfa19be525d987 100644 --- a/configs/sama5d4ek_spiflash_defconfig +++ b/configs/sama5d4ek_spiflash_defconfig @@ -32,6 +32,8 @@ CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x22000000 0x6c000 0x394000; bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index c390afe9de519db44c939188311ab6cdff12212a..4f413582fb2d32ca455b68a5e324901927eec4db 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -285,6 +285,8 @@ CONFIG_OSD=y CONFIG_SANDBOX_OSD=y CONFIG_SPLASH_SCREEN_ALIGN=y CONFIG_VIDEO_BMP_RLE8=y +CONFIG_BMP_16BPP=y +CONFIG_BMP_24BPP=y CONFIG_W1=y CONFIG_W1_GPIO=y CONFIG_W1_EEPROM=y diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig index 7cc76bf2713a6d3c505ada9376eb19ce2cab0138..4d5a73fce0932a8acdb81ed6972a35b8734a7a73 100644 --- a/configs/sandbox_flattree_defconfig +++ b/configs/sandbox_flattree_defconfig @@ -198,11 +198,14 @@ CONFIG_VIDEO_SANDBOX_SDL=y CONFIG_OSD=y CONFIG_SANDBOX_OSD=y CONFIG_VIDEO_BMP_RLE8=y +CONFIG_BMP_16BPP=y +CONFIG_BMP_24BPP=y CONFIG_CMD_DHRYSTONE=y CONFIG_RSA_VERIFY_WITH_PKEY=y CONFIG_TPM=y CONFIG_LZ4=y CONFIG_ERRNO_STR=y +CONFIG_HEXDUMP=y CONFIG_UNIT_TEST=y CONFIG_UT_TIME=y CONFIG_UT_DM=y diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig index f915b5b0036441b6d98ec01e13a70d1530668b74..f3d3b0a498021debb77c92ef1ecb8ad440ddb5a0 100644 --- a/configs/seaboard_defconfig +++ b/configs/seaboard_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 @@ -17,7 +18,6 @@ CONFIG_SYS_PROMPT="Tegra20 (SeaBoard) # " CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y -CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set @@ -35,6 +35,7 @@ CONFIG_SYS_I2C_TEGRA=y CONFIG_TEGRA_KEYBOARD=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_TEGRA_NAND=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_PMIC=y CONFIG_DM_REGULATOR=y diff --git a/configs/seeed_npi_imx6ull_defconfig b/configs/seeed_npi_imx6ull_defconfig index 6489e8bc61aabb55eea72b1da632b253acec2c63..d417a5c962a8b1deed142ec54d65e16d4fc00d6e 100644 --- a/configs/seeed_npi_imx6ull_defconfig +++ b/configs/seeed_npi_imx6ull_defconfig @@ -19,7 +19,6 @@ CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=3 -# CONFIG_USE_BOOTCOMMAND is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/sei510_defconfig b/configs/sei510_defconfig index 690a0ca8d4b6ea01635d950af69e8a56d62ac82c..5e2496edbeebd7e0a75ba699e1ccbdc9307eb4b4 100644 --- a/configs/sei510_defconfig +++ b/configs/sei510_defconfig @@ -43,7 +43,6 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=2 CONFIG_SYS_MMC_ENV_PART=1 -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x6000000 CONFIG_FASTBOOT_FLASH=y diff --git a/configs/sei610_defconfig b/configs/sei610_defconfig index 63080aec2d807f8c8927de79e8341138f63011c2..df53c91d8bfab31b61421267c0627dba22c54cbf 100644 --- a/configs/sei610_defconfig +++ b/configs/sei610_defconfig @@ -43,7 +43,6 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=2 CONFIG_SYS_MMC_ENV_PART=1 -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x6000000 CONFIG_FASTBOOT_FLASH=y diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig index 24d416e7877b87c61d6e7aef0bde924e3f27fcfa..6e39aa178a633704f20b067b243ea081ead06679 100644 --- a/configs/sheevaplug_defconfig +++ b/configs/sheevaplug_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/Marvell/sheevaplug/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_SHEEVAPLUG=y @@ -14,6 +15,8 @@ CONFIG_IDENT_STRING="\nMarvell-Sheevaplug" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_bootargs_root}; bootm 0x6400000;" CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y diff --git a/configs/sifive_unleashed_defconfig b/configs/sifive_unleashed_defconfig index 1d17f2da7156d876ec856e56f3ab4d6d0273b117..58c6212c99ef59171b8d42ece23d4eebc0a01d09 100644 --- a/configs/sifive_unleashed_defconfig +++ b/configs/sifive_unleashed_defconfig @@ -16,6 +16,8 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x80200000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x84000000 +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr};fdt addr ${fdtcontroladdr};" CONFIG_DEFAULT_FDT_FILE="sifive/hifive-unleashed-a00.dtb" CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig index d400ed0b23c06f1a9bf1b6056b99fe0b3be5f77e..299580894c4e00e13ad5b6e096fd4c7923f5418a 100644 --- a/configs/sifive_unmatched_defconfig +++ b/configs/sifive_unmatched_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_MMC=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y +CONFIG_SYS_PCI_64BIT=y CONFIG_AHCI=y CONFIG_TARGET_SIFIVE_UNMATCHED=y CONFIG_ARCH_RV64I=y @@ -18,6 +19,8 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x80200000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x84000000 +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr};fdt addr ${fdtcontroladdr};" CONFIG_DEFAULT_FDT_FILE="sifive/hifive-unmatched-a00.dtb" CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y @@ -33,14 +36,13 @@ CONFIG_CMD_PWM=y CONFIG_CMD_GPT_RENAME=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y -CONFIG_USE_ENV_SPI_BUS=y CONFIG_ENV_SPI_BUS=1 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SCSI_AHCI=y CONFIG_AHCI_PCI=y CONFIG_SPL_CLK=y -CONFIG_SPI_FLASH_ISSI=y CONFIG_SYS_I2C_EEPROM_ADDR=0x54 +CONFIG_SPI_FLASH_ISSI=y CONFIG_E1000=y CONFIG_NVME=y CONFIG_PCI=y diff --git a/configs/silinux_ek874_defconfig b/configs/silinux_ek874_defconfig index eecddbaaee63e0860dacff370fe02f7ea1b99ce3..894a99616c768d3e4a4309674512ab0f30f860f8 100644 --- a/configs/silinux_ek874_defconfig +++ b/configs/silinux_ek874_defconfig @@ -17,6 +17,8 @@ CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a774c0-ek874.dtb; booti 0x48080000 - 0x48000000" CONFIG_DEFAULT_FDT_FILE="r8a774c0-ek874.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_HUSH_PARSER=y diff --git a/configs/slimbootloader_defconfig b/configs/slimbootloader_defconfig index 5cfbaa224fafd16c303f680290ed56c0a5757f7b..fb2091bd59aa54bdbf8b22a97e4b1e7f84c1fcc8 100644 --- a/configs/slimbootloader_defconfig +++ b/configs/slimbootloader_defconfig @@ -7,6 +7,8 @@ CONFIG_TARGET_SLIMBOOTLOADER=y CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE_REPORT=y CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="if test ${bootdev} = 'usb'; then ${bootdev} start; fi; if test ${bootdev} = 'scsi'; then ${bootdev} scan; fi; ${bootdev} info; ${bootfsload} ${bootdev} ${bootdevnum}:${bootdevpart} ${loadaddr} ${bootfile}; ${bootfsload} ${bootdev} ${bootdevnum}:${bootdevpart} ${ramdiskaddr} ${ramdiskfile}; zboot ${loadaddr} 0 ${ramdiskaddr} ${filesize}" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig index af6e9257acb6095fbd5e68491723c381784b889a..0e99c3662684032d6c5f6b143997a7a3e24997e6 100644 --- a/configs/smartweb_defconfig +++ b/configs/smartweb_defconfig @@ -27,6 +27,8 @@ CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"\" to stop\n" CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run flashboot" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/smdk5250_defconfig b/configs/smdk5250_defconfig index 9429114932cb332186c364bc9549c13e7e2ec353..26a20602364cfdfee32ce800302f985c7d0313e8 100644 --- a/configs/smdk5250_defconfig +++ b/configs/smdk5250_defconfig @@ -39,10 +39,10 @@ CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y CONFIG_ENV_SPI_BUS=1 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_I2C_S3C24X0=y +# CONFIG_KEYBOARD is not set CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_DW=y CONFIG_MMC_SDHCI=y diff --git a/configs/smdk5420_defconfig b/configs/smdk5420_defconfig index e62f432e43acedd1015ed462d28f7b7b8139c852..34aacc663f8ef02bc74d8a795ed0c0e3fa9d9fe8 100644 --- a/configs/smdk5420_defconfig +++ b/configs/smdk5420_defconfig @@ -34,10 +34,10 @@ CONFIG_CMD_TIME=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y CONFIG_ENV_SPI_BUS=1 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_I2C_S3C24X0=y +# CONFIG_KEYBOARD is not set CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_DW=y CONFIG_MMC_SDHCI=y diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig index 8e0b999bd95e1724fc9ad4f21f0e8f7a26c946e0..f2d0845d207059fa3a8c8e3b5249ff4109629a05 100644 --- a/configs/smdkc100_defconfig +++ b/configs/smdkc100_defconfig @@ -8,10 +8,13 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-smdkc100" CONFIG_TARGET_SMDKC100=y CONFIG_IDENT_STRING=" for SMDKC100" +CONFIG_SYS_CLK_FREQ=12000000 CONFIG_SYS_LOAD_ADDR=0x30000000 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock5 ubi.mtd=4 rootfstype=cramfs console=ttySAC0,115200n8 mem=128M mtdparts=s3c-onenand:256k(bootloader),128k@0x40000(params),3m@0x60000(kernel),16m@0x360000(test),-(UBI)" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run ubifsboot" CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="SMDKC100 # " diff --git a/configs/smdkv310_defconfig b/configs/smdkv310_defconfig index 2f2b4de8102cbe1fbdfe09f775cb2c06ed0d585c..add0585e87ff70bd8e8ba80fc8f7857670f5200a 100644 --- a/configs/smdkv310_defconfig +++ b/configs/smdkv310_defconfig @@ -14,7 +14,7 @@ CONFIG_SPL=y CONFIG_IDENT_STRING=" for SMDKC210/V310" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x43e00000 -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="fatload mmc 0 40007000 uImage; bootm 40007000" # CONFIG_SPL_FRAMEWORK is not set CONFIG_SYS_PROMPT="SMDKV310 # " # CONFIG_CMD_XIMG is not set diff --git a/configs/smegw01_defconfig b/configs/smegw01_defconfig index 2288c5859c148239094ff8d0acf9333d47bc5901..829cb4a559ba814f9958df739d468018ef0c3e22 100644 --- a/configs/smegw01_defconfig +++ b/configs/smegw01_defconfig @@ -17,6 +17,8 @@ CONFIG_IMX_BOOTAUX=y CONFIG_IMX_HAB=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="if run loadimage; then run mmcboot; fi; " CONFIG_HUSH_PARSER=y # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/sniper_defconfig b/configs/sniper_defconfig index 354f2908558eaa72bd37ecad66f27d82d74f929e..5b030889cc5c3746d3b9b3c7a7259d137a403013 100644 --- a/configs/sniper_defconfig +++ b/configs/sniper_defconfig @@ -8,7 +8,7 @@ CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_SNIPER=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="setenv boot_mmc_part ${kernel_mmc_part}; if test reboot-${reboot-mode} = reboot-r; then echo recovery; setenv boot_mmc_part ${recovery_mmc_part}; fi; if test reboot-${reboot-mode} = reboot-b; then echo fastboot; fastboot 0; fi; part start mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_start; part size mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_size; mmc dev ${boot_mmc_dev}; mmc read ${kernel_addr_r} ${boot_mmc_start} ${boot_mmc_size} && bootm ${kernel_addr_r};" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y diff --git a/configs/snow_defconfig b/configs/snow_defconfig index e5bac37808ecb5150790d46bab1b1b926d674fe7..2b98401461eb78ff380e9ea699e7559d531b3c58 100644 --- a/configs/snow_defconfig +++ b/configs/snow_defconfig @@ -43,7 +43,6 @@ CONFIG_CMD_TPM_TEST=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y CONFIG_ENV_SPI_BUS=1 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_I2C_CROS_EC_LDO=y diff --git a/configs/socfpga_dbm_soc1_defconfig b/configs/socfpga_dbm_soc1_defconfig index 78b7cc7b340410d084f920ad7b3d87d2e2bbfd59..baae2f2e480e9df13aa86084f20ab2886cd9f8bb 100644 --- a/configs/socfpga_dbm_soc1_defconfig +++ b/configs/socfpga_dbm_soc1_defconfig @@ -10,6 +10,8 @@ CONFIG_TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1=y CONFIG_FIT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run mmc_mmc" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="run try_bootscript" CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig index 12817e5cd90af8078720dc5a4bcc903f4dcf8a6b..2a2899d93ec00d0bad1fcf952017a232c0cbf00f 100644 --- a/configs/socfpga_mcvevk_defconfig +++ b/configs/socfpga_mcvevk_defconfig @@ -11,7 +11,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run mmc_mmc" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig index db4800684211b166db6d5e31811af4b5e1560558..f7bdb906bca3af593fd951ab2f0616ebd73bd0ba 100644 --- a/configs/socfpga_secu1_defconfig +++ b/configs/socfpga_secu1_defconfig @@ -19,7 +19,7 @@ CONFIG_SYS_LOAD_ADDR=0x02000000 CONFIG_FIT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 ubi.fm_autoconvert=1 uio_pdrv_genirq.of_id=\"idq,regbank\"" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="setenv bootcmd 'bridge enable; if test ${bootnum} = 'b'; then run _fpga_loadsafe; else if test ${bootcount} -eq 4; then echo 'Switching copy...'; setexpr x $bootnum % 2 && setexpr bootnum $x + 1; saveenv; fi; run _fpga_loaduser; fi;echo 'Booting bank $bootnum' && run userload && run userboot;' && setenv altbootcmd 'setenv bootnum b && saveenv && boot;' && saveenv && saveenv && boot;" CONFIG_DEFAULT_FDT_FILE="socfpga_arria5_secu1.dtb" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y @@ -29,7 +29,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set -# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is not set +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1 +# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE is not set CONFIG_SPL_MTD_SUPPORT=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y @@ -92,6 +93,7 @@ CONFIG_RTC_M41T62=y CONFIG_SPI=y CONFIG_SPI_MEM=y CONFIG_DESIGNWARE_SPI=y +CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_DESIGNWARE_WATCHDOG=y CONFIG_WDT=y # CONFIG_GZIP is not set diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index 83dc267ebda125d72c3cecae3fca1ddb13e29213..e647314ad9935dcfdfc7bbd5a3f67874d64047cf 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -14,7 +14,7 @@ CONFIG_FIT=y CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run selboot" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="setenv hostname vining-${unit_serial} ; setenv PS1 \"${unit_ident} (${unit_serial}) => \" ; if gpio input 78 ; then setenv bootdelay 10 ; setenv boottype rcvr ; elif test -n \"$force_boottype\" ; then setenv bootdelay 1 ; setenv boottype \"$force_boottype\" ; setenv force_boottype ; saveenv ; else setenv bootdelay 5 ; setenv boottype norm ; fi" CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -76,7 +76,6 @@ CONFIG_I2C_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x50 CONFIG_MMC_DW=y CONFIG_MTD=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SF_DEFAULT_SPEED=40000000 CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig index 72c07179dbf3f158b523d06288dbc6266763b5df..ea0224d650358226bb2a682a0696bcae56eeea18 100644 --- a/configs/socrates_defconfig +++ b/configs/socrates_defconfig @@ -3,6 +3,7 @@ CONFIG_SYS_TEXT_BASE=0xfff80000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="socrates" +# CONFIG_SYS_PCI_64BIT is not set CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_SOCRATES=y @@ -10,6 +11,8 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=1 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run boot_nor" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="echo;echo Welcome on the ABB Socrates Board;echo" CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -42,6 +45,18 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR=0xFFF40000 CONFIG_ENV_ADDR_REDUND=0xFFF20000 CONFIG_DM=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xFE001001 +CONFIG_SYS_OR0_PRELIM=0xFE000030 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xFC001001 +CONFIG_SYS_OR1_PRELIM=0xFE000030 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xC80018A1 +CONFIG_SYS_OR2_PRELIM=0xFC000000 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xC0001881 +CONFIG_SYS_OR3_PRELIM=0xFFF00000 CONFIG_DM_I2C=y CONFIG_SYS_I2C_FSL=y # CONFIG_MMC is not set diff --git a/configs/som-db5800-som-6867_defconfig b/configs/som-db5800-som-6867_defconfig index a053718f8336028b66b3ba8df6cae7b6c007d513..9c9b397b6f78c3e6b5bb68e4b98b927733113488 100644 --- a/configs/som-db5800-som-6867_defconfig +++ b/configs/som-db5800-som-6867_defconfig @@ -23,6 +23,8 @@ CONFIG_BOOTSTAGE_REPORT=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y diff --git a/configs/somlabs_visionsom_6ull_defconfig b/configs/somlabs_visionsom_6ull_defconfig index 7dad016628fec4abbbe15aa8d46ccaf808589d53..956a6ca427179d3b80c8587f5d8cc8d138448701 100644 --- a/configs/somlabs_visionsom_6ull_defconfig +++ b/configs/somlabs_visionsom_6ull_defconfig @@ -12,6 +12,8 @@ CONFIG_TARGET_SOMLABS_VISIONSOM_6ULL=y CONFIG_DEFAULT_DEVICE_TREE="imx6ull-somlabs-visionsom" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run setfdtfile; run checkbootdev; run loadfdt;if run loadbootscript; then run bootscript; else if run loadimage; then run setbootargs; bootz ${loadaddr} - ${fdt_addr}; fi; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/spring_defconfig b/configs/spring_defconfig index 8838b556b91eefa5362e8017babfd91689aefb82..ef5688f861c0bcaa373efcfe08abe58d0ec9b32c 100644 --- a/configs/spring_defconfig +++ b/configs/spring_defconfig @@ -43,7 +43,6 @@ CONFIG_CMD_TPM_TEST=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y CONFIG_ENV_SPI_BUS=1 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_I2C_CROS_EC_LDO=y diff --git a/configs/stm32f429-evaluation_defconfig b/configs/stm32f429-evaluation_defconfig index 71f0bd06a85b2d9f120e4a24dc2ad7a52354c4b1..a1afb5ece1bce0d5e2254a25a77926a323953817 100644 --- a/configs/stm32f429-evaluation_defconfig +++ b/configs/stm32f429-evaluation_defconfig @@ -11,7 +11,6 @@ CONFIG_TARGET_STM32F429_EVALUATION=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x400000 CONFIG_BOOTDELAY=3 -# CONFIG_USE_BOOTCOMMAND is not set # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="U-Boot > " diff --git a/configs/stm32f469-discovery_defconfig b/configs/stm32f469-discovery_defconfig index 7dcf12da318a54ffffc678cd6c1ac2c0cf7cc90b..330426499c24f49d9c6e8933a4e4d857b6342bbe 100644 --- a/configs/stm32f469-discovery_defconfig +++ b/configs/stm32f469-discovery_defconfig @@ -11,7 +11,6 @@ CONFIG_TARGET_STM32F469_DISCOVERY=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x400000 CONFIG_BOOTDELAY=3 -# CONFIG_USE_BOOTCOMMAND is not set # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="U-Boot > " diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig index 352a3d430bab97245d70271bb83dfd6e934325e3..ee7e3293ad367d3b9e1aeed99f43928aa3f3e24c 100644 --- a/configs/stm32f746-disco_defconfig +++ b/configs/stm32f746-disco_defconfig @@ -17,7 +17,6 @@ CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" -# CONFIG_USE_BOOTCOMMAND is not set # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SYS_PROMPT="U-Boot > " diff --git a/configs/stm32f769-disco_defconfig b/configs/stm32f769-disco_defconfig index 07ec261ba6c9fc23e01a1227448b4e25bf6969a2..0ba01843597291eb75a5477bb12d20c8b37d50ea 100644 --- a/configs/stm32f769-disco_defconfig +++ b/configs/stm32f769-disco_defconfig @@ -17,7 +17,6 @@ CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" -# CONFIG_USE_BOOTCOMMAND is not set # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="U-Boot > " CONFIG_CMD_GPT=y diff --git a/configs/stm32h743-disco_defconfig b/configs/stm32h743-disco_defconfig index 4ec045aaaf19b20e3552c9c1f9dc11c854d00c85..62a826ebbc817b02fe14af71eb2ac766e2386726 100644 --- a/configs/stm32h743-disco_defconfig +++ b/configs/stm32h743-disco_defconfig @@ -14,7 +14,6 @@ CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" CONFIG_AUTOBOOT_STOP_STR=" " -# CONFIG_USE_BOOTCOMMAND is not set CONFIG_DEFAULT_FDT_FILE="stm32h743i-disco" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="U-Boot > " diff --git a/configs/stm32h743-eval_defconfig b/configs/stm32h743-eval_defconfig index 1176feb825ff84bf69e97bc5ba86b553ae81f749..2fe83e1b561d2bba63e51616878a824bd2531853 100644 --- a/configs/stm32h743-eval_defconfig +++ b/configs/stm32h743-eval_defconfig @@ -14,7 +14,6 @@ CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" CONFIG_AUTOBOOT_STOP_STR=" " -# CONFIG_USE_BOOTCOMMAND is not set CONFIG_DEFAULT_FDT_FILE="stm32h743i-eval" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="U-Boot > " diff --git a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig index adb8f10b17164c7e7bcededf9febeba65ecdc4b7..11a2885a5cf11d38f965b469d1edb7e65c3c828d 100644 --- a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig @@ -51,8 +51,6 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_STM32F7=y CONFIG_LED=y CONFIG_LED_GPIO=y -CONFIG_DM_MAILBOX=y -CONFIG_STM32_IPCC=y CONFIG_STM32_FMC2_EBI=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_STM32_SDMMC2=y diff --git a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig index dca35db014f78d92fe94caa0a11766c1e7dc36eb..7973e0f46f75be4f5df7eb12dc7bbf614ae04acc 100644 --- a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig @@ -51,8 +51,6 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_STM32F7=y CONFIG_LED=y CONFIG_LED_GPIO=y -CONFIG_DM_MAILBOX=y -CONFIG_STM32_IPCC=y CONFIG_STM32_FMC2_EBI=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_STM32_SDMMC2=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig index aa6a28e6a7fe7aaf8be1a36a4869402902f45a59..5eadd63100a5e6462dc6ae07a254f2307ec10e17 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig @@ -51,8 +51,6 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_STM32F7=y CONFIG_LED=y CONFIG_LED_GPIO=y -CONFIG_DM_MAILBOX=y -CONFIG_STM32_IPCC=y CONFIG_STM32_FMC2_EBI=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_STM32_SDMMC2=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig index 9abd1a100cd719b491ae93c1854ef2d6d08778ab..1dde46a0ced7b71fd33a23007887e9f823e24d85 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig @@ -51,8 +51,6 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_STM32F7=y CONFIG_LED=y CONFIG_LED_GPIO=y -CONFIG_DM_MAILBOX=y -CONFIG_STM32_IPCC=y CONFIG_STM32_FMC2_EBI=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_STM32_SDMMC2=y diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 2cc26d40668a9619c74d7ac18d95008860fc6ba6..341aaf370268c77d399a047341614a8657b9d027 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_POWER=y CONFIG_SPL_SPI_FLASH_MTD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 +CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="STM32MP> " CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y @@ -102,8 +103,6 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_STM32F7=y CONFIG_LED=y CONFIG_LED_GPIO=y -CONFIG_DM_MAILBOX=y -CONFIG_STM32_IPCC=y CONFIG_STM32_FMC2_EBI=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_STM32_SDMMC2=y diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index 4c6a52fc54311355bf9664677a63001dd67aa4e3..db1947f7a46de01c573a0c4845a7479e47cfce4d 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_FIT=y CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" +CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="STM32MP> " CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y @@ -84,8 +85,6 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_STM32F7=y CONFIG_LED=y CONFIG_LED_GPIO=y -CONFIG_DM_MAILBOX=y -CONFIG_STM32_IPCC=y CONFIG_STM32_FMC2_EBI=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_STM32_SDMMC2=y diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 84375589c5342a2c557565b54330ad9f2e91c48e..c422c47775ea3a353ef2c8f6ad6cf10870ef5df8 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -69,14 +69,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=nor0:256k(fsbl1),256k(fsbl2),1408k(uboot),64k( CONFIG_OF_LIST="stm32mp15xx-dhcom-pdk2 stm32mp15xx-dhcom-drc02 stm32mp15xx-dhcom-picoitx" CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-names interrupts-extended interrupt-controller \\\#interrupt-cells interrupt-parent dmas dma-names assigned-clocks assigned-clock-rates assigned-clock-parents hwlocks" CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=0 -CONFIG_USE_ENV_SPI_CS=y -CONFIG_ENV_SPI_CS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=50000000 -CONFIG_USE_ENV_SPI_MODE=y -CONFIG_ENV_SPI_MODE=0x0 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y @@ -96,8 +88,6 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_STM32F7=y CONFIG_LED=y CONFIG_LED_GPIO=y -CONFIG_DM_MAILBOX=y -CONFIG_STM32_IPCC=y CONFIG_I2C_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x50 CONFIG_SUPPORT_EMMC_BOOT=y diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index 2356de76baf7a68d38bd6adf4341613e6d439fa4..38b050f667a986860e59efe4109e128b6439e1a7 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -66,14 +66,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=nor0:256k(fsbl1),256k(fsbl2),1408k(uboot),64k( # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-names interrupts-extended interrupt-controller \\\#interrupt-cells interrupt-parent dmas dma-names assigned-clocks assigned-clock-rates assigned-clock-parents hwlocks" CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=0 -CONFIG_USE_ENV_SPI_CS=y -CONFIG_ENV_SPI_CS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=50000000 -CONFIG_USE_ENV_SPI_MODE=y -CONFIG_ENV_SPI_MODE=0x0 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y @@ -92,8 +84,6 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_STM32F7=y CONFIG_LED=y CONFIG_LED_GPIO=y -CONFIG_DM_MAILBOX=y -CONFIG_STM32_IPCC=y CONFIG_I2C_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x53 CONFIG_SUPPORT_EMMC_BOOT=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index feca26e97364eb9cc630299aa2d3bc531ac35859..b6a5b6197bc801384aa178201ae26f40ba9a0f5a 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_FIT=y CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" +CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="STM32MP> " CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y @@ -85,8 +86,6 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_STM32F7=y CONFIG_LED=y CONFIG_LED_GPIO=y -CONFIG_DM_MAILBOX=y -CONFIG_STM32_IPCC=y CONFIG_STM32_FMC2_EBI=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_STM32_SDMMC2=y diff --git a/configs/stmark2_defconfig b/configs/stmark2_defconfig index e7b68cdd9146f4380c5d48ddd6c16ce6fefd956d..53510eaadf555c23ab026280f68e56583557c46c 100644 --- a/configs/stmark2_defconfig +++ b/configs/stmark2_defconfig @@ -10,6 +10,8 @@ CONFIG_SYS_LOAD_ADDR=0x40010000 CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=30000000" CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 rw rootfstype=ramfs rdinit=/bin/init devtmpfs.mount=1" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe 0:1 50000000; sf read ${loadaddr} 0x100000 ${kern_size}; bootm ${loadaddr}" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y # CONFIG_CMDLINE_EDITING is not set @@ -27,7 +29,6 @@ CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=spi-flash.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-flash.0:1m(u-boot),7m(kernel),-(rootfs)" CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_CS=y CONFIG_ENV_SPI_CS=1 CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set diff --git a/configs/stv0991_defconfig b/configs/stv0991_defconfig index f46efa692a2d494774ee37c13d8481b69f27d48f..fa1ae108385b1b5fa118726ad3482ab336bf8358 100644 --- a/configs/stv0991_defconfig +++ b/configs/stv0991_defconfig @@ -16,6 +16,8 @@ CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="go 0x40040000" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/synquacer_developerbox_defconfig b/configs/synquacer_developerbox_defconfig index 4fb0fba4416daae90e8fd8cd09d91e2f328bd6af..da57dc288fd2731072e542b82f5f20bdac997b8d 100644 --- a/configs/synquacer_developerbox_defconfig +++ b/configs/synquacer_developerbox_defconfig @@ -40,10 +40,6 @@ CONFIG_CMD_LOG=y CONFIG_PARTITION_TYPE_GUID=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=0 -CONFIG_USE_ENV_SPI_CS=y -CONFIG_ENV_SPI_CS=0 CONFIG_PROT_UDP=y CONFIG_SCSI_AHCI=y CONFIG_AHCI_PCI=y diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig index 6e4e101a8813839c6dd3c6c8ddc326860379a010..4eb113f3a407a564d9b923d237bd0f61cf99720f 100644 --- a/configs/syzygy_hub_defconfig +++ b/configs/syzygy_hub_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SYS_VENDOR="opalkelly" CONFIG_SYS_CONFIG_NAME="syzygy_hub" CONFIG_SPL_SYS_DCACHE_OFF=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_DM_GPIO=y diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index c623a547733307558f56a554168f6538881ba310..e1278f2e70a536d060d13b433711c7e9a911c8de 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -94,6 +94,7 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_DM_VIDEO=y +# CONFIG_VIDEO_LOGO is not set # CONFIG_BACKLIGHT is not set # CONFIG_CMD_VIDCONSOLE is not set # CONFIG_VIDEO_BPP8 is not set diff --git a/configs/tec-ng_defconfig b/configs/tec-ng_defconfig index df9c2429d562f8b7160427b6d633fce61697b640..ea568d4bf700cc0375ed54b1e736aba8980d6033 100644 --- a/configs/tec-ng_defconfig +++ b/configs/tec-ng_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/tec_defconfig b/configs/tec_defconfig index 7e2aef2dbfb2179e74a3eef0e3115f0d657bfb35..ec6ecbce6fb17b82fe0bcbbb52fc02f695612cc1 100644 --- a/configs/tec_defconfig +++ b/configs/tec_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 @@ -17,7 +18,6 @@ CONFIG_SYS_PROMPT="Tegra20 (TEC) # " # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y -CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set @@ -32,6 +32,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_DM=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_TEGRA_NAND=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_PMIC=y CONFIG_DM_REGULATOR=y diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index 556c91fe3ed09a3613c3775b1799af694433dafd..a781f150e483e0108e62a085827a69ebee04dbe6 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -49,7 +49,6 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_EFI_PARTITION=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_OVERWRITE=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y @@ -58,10 +57,8 @@ CONFIG_SATA_MV=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y CONFIG_FPGA_ALTERA=y -CONFIG_SYS_I2C_LEGACY=y -CONFIG_SPL_SYS_I2C_LEGACY=y +CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y -CONFIG_SYS_I2C_SLAVE=0x0 # CONFIG_MMC is not set CONFIG_SF_DEFAULT_SPEED=27777777 CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig index 9e2613a03c1ae94f5e0d11237f29868a54c9508c..9631395d38c701636911d2d05a4923cef8b1f20f 100644 --- a/configs/ti816x_evm_defconfig +++ b/configs/ti816x_evm_defconfig @@ -15,13 +15,14 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x1E0000 +CONFIG_SYS_CLK_FREQ=27000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyO2,115200n8 noinitrd earlyprintk" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="mmc rescan;fatload mmc 0 ${loadaddr} uImage;bootm ${loadaddr}" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_MISC_INIT_R is not set diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig index a9c9a122f64c4984155807513e3a41ed32445fcc..85dcb9eb885e9343c422d0e7a0c2df31af3a1f49 100644 --- a/configs/tinker-rk3288_defconfig +++ b/configs/tinker-rk3288_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y +CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_SPL_GPIO=y diff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig index f367c9370f015280dfe9e194cd5506487a185d01..8d8cbd78a1a92ea4913769321b1f18c5ba38fd12 100644 --- a/configs/tinker-s-rk3288_defconfig +++ b/configs/tinker-s-rk3288_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y +CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_SYS_MALLOC_F_LEN=0x4000 diff --git a/configs/tools-only_defconfig b/configs/tools-only_defconfig index f482c9a1c1b06338f6f9c50bd4f45499ec7be44f..5ffc625b0dd2e6de8da5b9dd7516c000f1d83835 100644 --- a/configs/tools-only_defconfig +++ b/configs/tools-only_defconfig @@ -6,28 +6,29 @@ CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_MISC_INIT_F=y # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_BOOTM is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXTENSION is not set -CONFIG_BOOTP_DNS2=y # CONFIG_CMD_DATE is not set CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_BOOTP_SEND_HOSTNAME=y -CONFIG_IP_DEFRAG=y +# CONFIG_NET is not set # CONFIG_ACPIGEN is not set CONFIG_AXI=y CONFIG_AXI_SANDBOX=y -# CONFIG_UDP_FUNCTION_FASTBOOT is not set CONFIG_SANDBOX_GPIO=y CONFIG_PCI=y CONFIG_PCI_SANDBOX=y CONFIG_DM_RTC=y CONFIG_SOUND=y CONFIG_SYSRESET=y +CONFIG_TIMER=y CONFIG_I2C_EDID=y # CONFIG_VIRTIO_MMIO is not set # CONFIG_VIRTIO_PCI is not set # CONFIG_VIRTIO_SANDBOX is not set +# CONFIG_EFI_LOADER is not set diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig index f8ba64db14d3600b8408dca1b1bd2d30b08361bd..dfd465cc28eeb87fdc159e795267d31298a884d3 100644 --- a/configs/topic_miami_defconfig +++ b/configs/topic_miami_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SYS_VENDOR="topic" CONFIG_SYS_CONFIG_NAME="topic_miami" CONFIG_SPL_SYS_DCACHE_OFF=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SYS_MEMTEST_START=0x00000000 @@ -20,6 +21,7 @@ CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds" CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_BOOTDELAY=0 +CONFIG_BOOTCOMMAND="if mmcinfo; then if fatload mmc 0 0x1900000 ${bootscript}; then source 0x1900000; fi; fi; run $modeboot" CONFIG_USE_PREBOOT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig index 94d7afd5d1732de4fbe5c389f72d712b0714f178..bf336c7b0963c4a64d225aec9f9131e4deda0f21 100644 --- a/configs/topic_miamilite_defconfig +++ b/configs/topic_miamilite_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SYS_VENDOR="topic" CONFIG_SYS_CONFIG_NAME="topic_miami" CONFIG_SPL_SYS_DCACHE_OFF=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SYS_MEMTEST_START=0x00000000 @@ -20,6 +21,7 @@ CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds" CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_BOOTDELAY=0 +CONFIG_BOOTCOMMAND="if mmcinfo; then if fatload mmc 0 0x1900000 ${bootscript}; then source 0x1900000; fi; fi; run $modeboot" CONFIG_USE_PREBOOT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig index dc03caa649ff1025a8285faa773e0154700a76ef..c700ea4d8483fefa4c81e387e1c0aa7cce27710e 100644 --- a/configs/topic_miamiplus_defconfig +++ b/configs/topic_miamiplus_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SYS_VENDOR="topic" CONFIG_SYS_CONFIG_NAME="topic_miami" CONFIG_SPL_SYS_DCACHE_OFF=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SYS_MEMTEST_START=0x00000000 @@ -20,6 +21,7 @@ CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds" CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_BOOTDELAY=0 +CONFIG_BOOTCOMMAND="if mmcinfo; then if fatload mmc 0 0x1900000 ${bootscript}; then source 0x1900000; fi; fi; run $modeboot" CONFIG_USE_PREBOOT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/total_compute_defconfig b/configs/total_compute_defconfig index 7c70eb0a7c36e75f03635ba38d9e62ba6d69f6a2..8fafee0c18002a849dbebd74c46c2dd904aab0d6 100644 --- a/configs/total_compute_defconfig +++ b/configs/total_compute_defconfig @@ -15,7 +15,7 @@ CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_BOOTDELAY=5 -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="if part number mmc 0 vbmeta is_avb; then echo MMC with vbmeta partition detected.; echo starting Android Verified boot.; avb init 0; if avb verify; then set bootargs $bootargs $avb_bootargs; part start mmc 0 boot boot_start; part size mmc 0 boot boot_size; mmc read ${load_addr} ${boot_start} ${boot_size}; bootm ${load_addr} ${load_addr} ${fdt_addr_r}; else; echo AVB verification failed.; exit; fi; elif part number mmc 0 system is_non_avb_android; then booti ${kernel_addr_r} ${initrd_addr_r} ${fdt_addr_r};else; echo Booting FIT image.; bootm ${load_addr} ${load_addr} ${fdt_addr_r}; fi;" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_AVB_VERIFY=y diff --git a/configs/tplink_wdr4300_defconfig b/configs/tplink_wdr4300_defconfig index 6b55c935afd679bbe0dfd2b1c0793170d011edee..5de4ada9e630b3acf6d9e307d1350a9b9b49cdc8 100644 --- a/configs/tplink_wdr4300_defconfig +++ b/configs/tplink_wdr4300_defconfig @@ -12,6 +12,8 @@ CONFIG_SYS_LOAD_ADDR=0xa1000000 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="dhcp 192.168.1.1:wdr4300.fit && bootm $loadaddr" CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y diff --git a/configs/tqma6dl_mba6_mmc_defconfig b/configs/tqma6dl_mba6_mmc_defconfig index ec31e9aa62e5dbc027b99170bea55d102693c9a5..3e386c26d466cadcb85a4b8c810895b58b3b37fb 100644 --- a/configs/tqma6dl_mba6_mmc_defconfig +++ b/configs/tqma6dl_mba6_mmc_defconfig @@ -12,6 +12,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run mmcboot; run netboot; run panicboot" CONFIG_DEFAULT_FDT_FILE="imx6dl-mba6x.dtb" CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/tqma6dl_mba6_spi_defconfig b/configs/tqma6dl_mba6_spi_defconfig index 839d6a0b7e2fecd7eb1dc12363d910605fdb1911..304d139956c72d416b25fc5c4cf8710f32a7233f 100644 --- a/configs/tqma6dl_mba6_spi_defconfig +++ b/configs/tqma6dl_mba6_spi_defconfig @@ -15,6 +15,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe; run mmcboot; run netboot; run panicboot" CONFIG_DEFAULT_FDT_FILE="imx6dl-mba6x.dtb" CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/tqma6q_mba6_mmc_defconfig b/configs/tqma6q_mba6_mmc_defconfig index c2f66587a8a0e438e40a0d19c259ad651f62f7dc..b4203da15f4d6d1392ee6961c72ba8a31cfc29d7 100644 --- a/configs/tqma6q_mba6_mmc_defconfig +++ b/configs/tqma6q_mba6_mmc_defconfig @@ -12,6 +12,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run mmcboot; run netboot; run panicboot" CONFIG_DEFAULT_FDT_FILE="imx6q-mba6x.dtb" CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/tqma6q_mba6_spi_defconfig b/configs/tqma6q_mba6_spi_defconfig index c7faa10eac4a2c1e0773eb9769f334336603dd5d..8d96c600fba7222574adaa376c766abcfb931530 100644 --- a/configs/tqma6q_mba6_spi_defconfig +++ b/configs/tqma6q_mba6_spi_defconfig @@ -15,6 +15,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe; run mmcboot; run netboot; run panicboot" CONFIG_DEFAULT_FDT_FILE="imx6q-mba6x.dtb" CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/tqma6s_mba6_mmc_defconfig b/configs/tqma6s_mba6_mmc_defconfig index 023b3df74a26f7d0884b2afe083f034ce517c2cf..566ecc0c5405cc48fc752c47edf09ec07864aceb 100644 --- a/configs/tqma6s_mba6_mmc_defconfig +++ b/configs/tqma6s_mba6_mmc_defconfig @@ -12,6 +12,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run mmcboot; run netboot; run panicboot" CONFIG_DEFAULT_FDT_FILE="imx6dl-mba6x.dtb" CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/tqma6s_mba6_spi_defconfig b/configs/tqma6s_mba6_spi_defconfig index 6d05d750ee2ee4bb6ad0f72123e3d915cb7fffc5..78b978f1ad0d83099b27d5b6603f2efb069cf80c 100644 --- a/configs/tqma6s_mba6_spi_defconfig +++ b/configs/tqma6s_mba6_spi_defconfig @@ -15,6 +15,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe; run mmcboot; run netboot; run panicboot" CONFIG_DEFAULT_FDT_FILE="imx6dl-mba6x.dtb" CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/trats2_defconfig b/configs/trats2_defconfig index 60e7e2caf490032021119f5ae38dd6776b48fb8c..b93c9eb7175b9460b45354eca67b3d4a0a7729f1 100644 --- a/configs/trats2_defconfig +++ b/configs/trats2_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_ARCH_CPU_INIT=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_EXYNOS=y CONFIG_SYS_TEXT_BASE=0x43e00000 CONFIG_SYS_MALLOC_LEN=0x5001000 @@ -16,7 +17,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="Please use defined boot" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run autoboot" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_MISC_INIT_R=y diff --git a/configs/trats_defconfig b/configs/trats_defconfig index 63c5a4b2a80dee4cf6ec619a81382ce0d613487a..d55c1d70e64b7aaef3989b9c31dffcbce1a6999c 100644 --- a/configs/trats_defconfig +++ b/configs/trats_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_ARCH_CPU_INIT=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_EXYNOS=y CONFIG_SYS_TEXT_BASE=0x63300000 CONFIG_SYS_MALLOC_LEN=0x5001000 @@ -15,7 +16,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="Please use defined boot" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run autoboot" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_MISC_INIT_R=y diff --git a/configs/trimslice_defconfig b/configs/trimslice_defconfig index 50b08cb8f801a6c4ece59071415fcddd58db130a..b28349dc1c8e4d6d25c8eb1f7a9f54055a405fd7 100644 --- a/configs/trimslice_defconfig +++ b/configs/trimslice_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 @@ -28,7 +29,6 @@ CONFIG_CMD_EXT4_WRITE=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=48000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_DM=y diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig index a8fa07c4c072c47eca0fcc365a62f7d8718dde29..6078b46410af57951f247315aad23be93fe98c51 100644 --- a/configs/tuge1_defconfig +++ b/configs/tuge1_defconfig @@ -119,6 +119,7 @@ CONFIG_ACR_APARK_MASTER=y CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_EADC_1=y CONFIG_LCRR_CLKDIV_2=y +CONFIG_83XX_PCICLK=0x3ef1480 CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y @@ -153,6 +154,15 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_BOOTCOUNT_MEM=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xF0001001 +CONFIG_SYS_OR0_PRELIM=0xF0000E55 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xE8000801 +CONFIG_SYS_OR1_PRELIM=0xF8000E25 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xA0000801 +CONFIG_SYS_OR2_PRELIM=0xF0000C25 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y CONFIG_SYS_FSL_I2C_OFFSET=0x3000 diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index e6f901ea7797e2145cd7509ec7905cb6e6d44a27..9d121b79826d38e41a0d12c69870914f0413696d 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -59,8 +59,6 @@ CONFIG_CMD_BTRFS=y CONFIG_CMD_FS_UUID=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_OVERWRITE=y -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=40000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_AHCI_PCI=y @@ -71,7 +69,6 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_MV=y CONFIG_MTD=y CONFIG_DM_MTD=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SF_DEFAULT_SPEED=40000000 CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/tuxx1_defconfig b/configs/tuxx1_defconfig index fd94323384efb2520dd15c59b49500fd87c18832..cc9bbab8c6bbc336476bb0fdc9c0f944dc448967 100644 --- a/configs/tuxx1_defconfig +++ b/configs/tuxx1_defconfig @@ -141,6 +141,7 @@ CONFIG_ACR_APARK_MASTER=y CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_EADC_1=y CONFIG_LCRR_CLKDIV_2=y +CONFIG_83XX_PCICLK=0x3ef1480 CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y @@ -175,6 +176,18 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_BOOTCOUNT_MEM=y +CONFIG_SYS_BR0_PRELIM_BOOL=y +CONFIG_SYS_BR0_PRELIM=0xF0001001 +CONFIG_SYS_OR0_PRELIM=0xF0000E55 +CONFIG_SYS_BR1_PRELIM_BOOL=y +CONFIG_SYS_BR1_PRELIM=0xE8000801 +CONFIG_SYS_OR1_PRELIM=0xF8000E25 +CONFIG_SYS_BR2_PRELIM_BOOL=y +CONFIG_SYS_BR2_PRELIM=0xA0000801 +CONFIG_SYS_OR2_PRELIM=0xF0000C25 +CONFIG_SYS_BR3_PRELIM_BOOL=y +CONFIG_SYS_BR3_PRELIM=0xB0000801 +CONFIG_SYS_OR3_PRELIM=0xF0000E24 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y CONFIG_SYS_FSL_I2C_OFFSET=0x3000 diff --git a/configs/u200_defconfig b/configs/u200_defconfig index 144c394010f3ccce243b54eef210010feedbf56c..7f46dcf5c231731e3c5f79d574bee5e1af14c2ef 100644 --- a/configs/u200_defconfig +++ b/configs/u200_defconfig @@ -25,7 +25,6 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_MMC_MESON_GX=y CONFIG_DM_ETH=y CONFIG_DM_MDIO=y diff --git a/configs/usb_a9263_dataflash_defconfig b/configs/usb_a9263_dataflash_defconfig index f1385147ed9458e83c9300d85d1b22f8ff7de92e..5792d78995052d19caae4e57b24112d691926407 100644 --- a/configs/usb_a9263_dataflash_defconfig +++ b/configs/usb_a9263_dataflash_defconfig @@ -17,6 +17,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock1 mtdparts=mtdparts=atmel_nand:16m(kernel)ro,120m(root1),-(root2) rw rootfstype=jffs2" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="nboot 21000000 0" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " @@ -32,7 +34,6 @@ CONFIG_CMD_PING=y CONFIG_MTDPARTS_DEFAULT="mtdparts=atmel_nand:16m(kernel)ro,120m(root1),-(root2)" CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/usbarmory_defconfig b/configs/usbarmory_defconfig index d70b9cf52cbf24757112cdbf875c832cee13c31b..727720c66054023855840c97b8d3b111c4cf2a9e 100644 --- a/configs/usbarmory_defconfig +++ b/configs/usbarmory_defconfig @@ -15,7 +15,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx53-usbarmory" # CONFIG_CMD_BMODE is not set CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x72000000 -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run distro_bootcmd; setenv bootargs console=${console} ${bootargs_default}; ext2load mmc 0:1 ${kernel_addr_r} /boot/zImage; ext2load mmc 0:1 ${fdt_addr_r} /boot/${fdtfile}; bootz ${kernel_addr_r} - ${fdt_addr_r}" CONFIG_CMD_MEMTEST=y CONFIG_CMD_FUSE=y CONFIG_CMD_I2C=y diff --git a/configs/variscite_dart6ul_defconfig b/configs/variscite_dart6ul_defconfig index 53a49cc4867c6b56fc11b4453cace27a6412901d..bcca038f94c8fb7d029720a63cf8e5f816169276 100644 --- a/configs/variscite_dart6ul_defconfig +++ b/configs/variscite_dart6ul_defconfig @@ -17,7 +17,7 @@ CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=3 -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="run mmc_mmc_fit" CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y CONFIG_CMD_DM=y diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig index ca2399213921bd14cf8003b7e1d8e5bfc0550ca5..aa47fbca5ba86376fd8c065daa682c4dc7ae28c9 100644 --- a/configs/venice2_defconfig +++ b/configs/venice2_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_SYS_MALLOC_LEN=0x2500000 diff --git a/configs/ventana_defconfig b/configs/ventana_defconfig index 4472f9655e1df75823923ba5cf80418709038ebf..1c8857e44cbbcab5a6c61e8e07c831096b881648 100644 --- a/configs/ventana_defconfig +++ b/configs/ventana_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig index 6312d8a0b058bd8bbdd5a5b44f7303476add97de..f2da12e92f650bbd7b8a819e6f7bbcc517255c6b 100644 --- a/configs/verdin-imx8mm_defconfig +++ b/configs/verdin-imx8mm_defconfig @@ -34,6 +34,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig index cfc3949fd77b8bc30ad031912cc6f6f20934fcdb..ffadfc03eeb270605476717c4214e1cc481351f5 100644 --- a/configs/vexpress_aemv8a_juno_defconfig +++ b/configs/vexpress_aemv8a_juno_defconfig @@ -8,13 +8,13 @@ CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0xff000000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="juno-r2" CONFIG_IDENT_STRING=" vexpress_aemv8a" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x90000000 CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/sda2 rw rootwait earlycon=pl011,0x7ff80000 debug user_debug=31 androidboot.hardware=juno loglevel=9" -# CONFIG_USE_BOOTCOMMAND is not set # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="VExpress64# " @@ -33,7 +33,6 @@ CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y # CONFIG_CMD_SLEEP is not set CONFIG_CMD_UBI=y -CONFIG_OF_BOARD=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xBFC0000 CONFIG_SATA_SIL=y diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig index 11759a020181245fdc7956c39ed2de9d5fadf678..f9abf29b26036980eaa5b6da14c4ad304ccdd802 100644 --- a/configs/vexpress_aemv8a_semi_defconfig +++ b/configs/vexpress_aemv8a_semi_defconfig @@ -15,7 +15,7 @@ CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1c090000 debug user_debug=31 loglevel=9" -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTCOMMAND="if smhload ${boot_name} ${boot_addr_r}; then set bootargs; abootimg addr ${boot_addr_r}; abootimg get dtb --index=0 fdt_addr_r; bootm ${boot_addr_r} ${boot_addr_r} ${fdt_addr_r}; else; set fdt_high 0xffffffffffffffff; set initrd_high 0xffffffffffffffff; smhload ${kernel_name} ${kernel_addr}; smhload ${fdtfile} ${fdt_addr_r}; smhload ${ramdisk_name} ${ramdisk_addr_r} ramdisk_end; fdt addr ${fdt_addr_r}; fdt resize; fdt chosen ${ramdisk_addr_r} ${ramdisk_end}; booti $kernel_addr - $fdt_addr_r; fi" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="VExpress64# " diff --git a/configs/vexpress_ca9x4_defconfig b/configs/vexpress_ca9x4_defconfig index 1e59d27fc40e2d13a8f9440dce922ab2bfedf17b..2daa1fc267af9b7b5a0c434ee1ad2253b54ddbaa 100644 --- a/configs/vexpress_ca9x4_defconfig +++ b/configs/vexpress_ca9x4_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_TARGET_VEXPRESS_CA9X4=y CONFIG_SYS_TEXT_BASE=0x60800000 CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig index eafd5b3641f7c64b54339a75786a53e349665329..2fb69c1be2f6b5ad685fe6cbfabb23c7c4cfe8cf 100644 --- a/configs/vf610twr_defconfig +++ b/configs/vf610twr_defconfig @@ -15,6 +15,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="vf610-twr" CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_LOGLEVEL=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y diff --git a/configs/vf610twr_nand_defconfig b/configs/vf610twr_nand_defconfig index 44a0028f1f3888e453ed736fcb3441651c680e6c..6af2839f9327f41d52388de4cb685afbcfcfbab9 100644 --- a/configs/vf610twr_nand_defconfig +++ b/configs/vf610twr_nand_defconfig @@ -15,6 +15,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="vf610-twr" CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_LOGLEVEL=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y diff --git a/configs/vinco_defconfig b/configs/vinco_defconfig index fbc217694a65322ed8dd206217ed8bc741333e04..52d5506495b0392417ef2086f94ac9a995007e44 100644 --- a/configs/vinco_defconfig +++ b/configs/vinco_defconfig @@ -15,6 +15,8 @@ CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk rw root=/dev/mmcblk0p2 rootfstype=ext4 rootwait quiet lpj=1990656" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev 0 0;mmc read ${loadaddr} ${k_offset} ${k_blksize};mmc read ${oftaddr} ${dtb_offset} ${dtb_blksize};bootz ${loadaddr} - ${oftaddr}" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y @@ -34,8 +36,10 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_AT91_GPIO=y CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_GENERIC_ATMEL_MCI=y CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=50000000 +CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_SMSC=y CONFIG_ETH_DESIGNWARE=y CONFIG_MACB=y diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig index ccdaf2403086a3061b16d58a5091347745bfbcb6..097fbc5cea0b841570811ee878d8cf6e1323e1c0 100644 --- a/configs/vining_2000_defconfig +++ b/configs/vining_2000_defconfig @@ -27,6 +27,8 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=0 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_FS_EXT4=y diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig index 84d28c7bfcbc174a9bf0af1372ce48a37bed0ae9..6c8c7bb8fd05b6feb384f1f239474749aa02b722 100644 --- a/configs/vyasa-rk3288_defconfig +++ b/configs/vyasa-rk3288_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y +CONFIG_SYS_ARCH_TIMER=y # CONFIG_SPL_USE_ARCH_MEMCPY is not set # CONFIG_SPL_USE_ARCH_MEMSET is not set CONFIG_ARCH_ROCKCHIP=y diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index 4015c39143ffbad3639a662fbdfbed338133adb0..2160dd852edba6e332364b04cb2c07dcfb336c88 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -74,6 +74,7 @@ CONFIG_MXC_UART=y CONFIG_DM_THERMAL=y CONFIG_USB=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_LOGO=y # CONFIG_VIDEO_BPP8 is not set # CONFIG_VIDEO_BPP32 is not set CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/configs/warp7_bl33_defconfig b/configs/warp7_bl33_defconfig index 245a73f6ed41278afe895601d3b96fdb437634c8..8deee6d97bd420c89cd3d6f1b5d9a8cea6eb4c72 100644 --- a/configs/warp7_bl33_defconfig +++ b/configs/warp7_bl33_defconfig @@ -13,6 +13,8 @@ CONFIG_IMX_HAB=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then run do_bootscript_hab;if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; fi; fi; fi" CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig index 3e2ea6a5e06c57f81eab9da0961287d8202d94bf..a76565edfd4a1d3359faf2f0b723520fe9e30c7f 100644 --- a/configs/warp7_defconfig +++ b/configs/warp7_defconfig @@ -17,6 +17,8 @@ CONFIG_IMX_BOOTAUX=y CONFIG_IMX_HAB=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then run do_bootscript_hab;if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; fi; fi; fi" CONFIG_HUSH_PARSER=y # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/warp_defconfig b/configs/warp_defconfig index 9cf099c6c825053950685b2460237e6dbbe13985..a3bc5b68528cd25db945910b02092916e883e56f 100644 --- a/configs/warp_defconfig +++ b/configs/warp_defconfig @@ -12,6 +12,8 @@ CONFIG_SYS_I2C_MXC_I2C2=y # CONFIG_CMD_BMODE is not set CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/wetek-core2_defconfig b/configs/wetek-core2_defconfig index ce947b5625863b30d4bf476777093725b7cd0e8c..006cebc71109aee3571dc679a9b422dbcceed1a5 100644 --- a/configs/wetek-core2_defconfig +++ b/configs/wetek-core2_defconfig @@ -26,7 +26,6 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SARADC_MESON=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig index 97327ca9509732cea1973ee3b5a503b20c0166ab..8b21dc2493e36b022e6af3ded2d27deaa7b09149 100644 --- a/configs/work_92105_defconfig +++ b/configs/work_92105_defconfig @@ -46,6 +46,7 @@ CONFIG_DOS_PARTITION=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_VERSION_VARIABLE=y +CONFIG_LPC32XX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_LPC32XX=y diff --git a/configs/xenguest_arm64_defconfig b/configs/xenguest_arm64_defconfig index 8d9d9133a2e7eb909993d540e2bac9ac91e0769e..4997c25a8ac0eddb6728a81d3c0392dc93b98882 100644 --- a/configs/xenguest_arm64_defconfig +++ b/configs/xenguest_arm64_defconfig @@ -3,9 +3,11 @@ CONFIG_POSITION_INDEPENDENT=y CONFIG_TARGET_XENGUEST_ARM64=y CONFIG_SYS_TEXT_BASE=0x40080000 CONFIG_SYS_MALLOC_LEN=0x2000000 -CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="xenguest-arm64" CONFIG_IDENT_STRING=" xenguest" CONFIG_SYS_LOAD_ADDR=0x40000000 +CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTDELAY=10 CONFIG_SYS_PROMPT="xenguest# " # CONFIG_CMD_BDI is not set @@ -33,7 +35,6 @@ CONFIG_CMD_PVBLOCK=y # CONFIG_CMD_SLEEP is not set CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y -CONFIG_OF_BOARD=y CONFIG_DM=y # CONFIG_MMC is not set # CONFIG_REQUIRE_SERIAL_CONSOLE is not set diff --git a/configs/xilinx_versal_mini_defconfig b/configs/xilinx_versal_mini_defconfig index 03e145f75fe9f8d8d872ab3c7732c9af279e17c9..c90899b344f9de6ac77c4e73595384b2e9be50ee 100644 --- a/configs/xilinx_versal_mini_defconfig +++ b/configs/xilinx_versal_mini_defconfig @@ -16,6 +16,8 @@ CONFIG_COUNTER_FREQUENCY=100000000 CONFIG_SYS_LOAD_ADDR=0x8000000 # CONFIG_LEGACY_IMAGE_FORMAT is not set # CONFIG_AUTOBOOT is not set +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_R=y diff --git a/configs/xilinx_versal_mini_emmc0_defconfig b/configs/xilinx_versal_mini_emmc0_defconfig index 9c848e9df3d51dbb407cea1e75663a1a428daeec..c897339fe17742162ae48d725479b1ad2136376b 100644 --- a/configs/xilinx_versal_mini_emmc0_defconfig +++ b/configs/xilinx_versal_mini_emmc0_defconfig @@ -12,6 +12,8 @@ CONFIG_COUNTER_FREQUENCY=100000000 # CONFIG_EXPERT is not set CONFIG_SYS_LOAD_ADDR=0x8000000 # CONFIG_AUTOBOOT is not set +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_R=y diff --git a/configs/xilinx_versal_mini_emmc1_defconfig b/configs/xilinx_versal_mini_emmc1_defconfig index 80b14aef59952a8355296ed9f7ccc0580e37970e..90bfca78e797e1dec6ea2688d273557dfc250813 100644 --- a/configs/xilinx_versal_mini_emmc1_defconfig +++ b/configs/xilinx_versal_mini_emmc1_defconfig @@ -12,6 +12,8 @@ CONFIG_COUNTER_FREQUENCY=100000000 # CONFIG_EXPERT is not set CONFIG_SYS_LOAD_ADDR=0x8000000 # CONFIG_AUTOBOOT is not set +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_R=y diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index 11598623954da3f2f48a7e87d094470ef7e5f639..711439b2413ab527ba02a121af6f763690d9afe1 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x100000 CONFIG_SYS_MEMTEST_START=0x00000000 CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="xilinx-versal-virt" CONFIG_CMD_FRU=y CONFIG_DEFINE_TCM_OCM_MMAP=y CONFIG_COUNTER_FREQUENCY=100000000 @@ -62,7 +63,6 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_CADENCE=y CONFIG_MISC=y CONFIG_I2C_EEPROM=y -CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index f343430f5d07405a1955a24ae76079c4bae23a0c..b19a7884ef474ffa0313fe5e0455d9b72e5492d1 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SPL_SYS_DCACHE_OFF=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SYS_MEMTEST_START=0x00000000 @@ -84,7 +85,6 @@ CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_MISC=y CONFIG_I2C_EEPROM=y -CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0 CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MTD=y diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index d4a8517513db8f7bd138ef26be9e96e0b3da8809..08e90f6101b9da3d158d7b0cb2e0967b91e86a39 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc0" CONFIG_SPL_SYS_MALLOC_F_LEN=0x600 CONFIG_SPL=y +CONFIG_ZYNQMP_PSU_INIT_ENABLED=y # CONFIG_CMD_ZYNQMP is not set CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_FIT=y diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index 67cf60317d3af37aa2c32313bd38b3add1bc6222..43e9cebbb0101770b87ee892dd08b7569a5e491d 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc1" CONFIG_SPL_SYS_MALLOC_F_LEN=0x600 CONFIG_SPL=y +CONFIG_ZYNQMP_PSU_INIT_ENABLED=y # CONFIG_CMD_ZYNQMP is not set CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_FIT=y diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig index 68e7586d89a81efa52e6c6a086ab4ec6af7c808f..a45203e02ace7fcf01cc90d58033bc1589d4eded 100644 --- a/configs/xilinx_zynqmp_mini_nand_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-nand" +CONFIG_ZYNQMP_PSU_INIT_ENABLED=y # CONFIG_CMD_ZYNQMP is not set CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_FIT=y diff --git a/configs/xilinx_zynqmp_mini_nand_single_defconfig b/configs/xilinx_zynqmp_mini_nand_single_defconfig index 723c61128ffc981da405012816173d6fc3bc06e0..13a479f19d17f4a355a8939d8d1c1feda9125c3a 100644 --- a/configs/xilinx_zynqmp_mini_nand_single_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_single_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-nand" +CONFIG_ZYNQMP_PSU_INIT_ENABLED=y # CONFIG_CMD_ZYNQMP is not set CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_FIT=y diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index 8d7c70475618646be48dbb515f3623570b3e5fa9..78c9d29af095028d1e65e43d76297d7ffa2d652a 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -10,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-qspi" CONFIG_SPL=y CONFIG_SYS_MEM_RSVD_FOR_MMU=y CONFIG_ZYNQMP_NO_DDR=y +CONFIG_ZYNQMP_PSU_INIT_ENABLED=y # CONFIG_CMD_ZYNQMP is not set # CONFIG_PSCI_RESET is not set # CONFIG_EXPERT is not set diff --git a/configs/xilinx_zynqmp_r5_defconfig b/configs/xilinx_zynqmp_r5_defconfig index a9c3c4a03e81e18ecba9f918202fba0541217839..98f46cf0205a0d2045b4d81ad9e2d82346abfa9e 100644 --- a/configs/xilinx_zynqmp_r5_defconfig +++ b/configs/xilinx_zynqmp_r5_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-r5" CONFIG_DEBUG_UART_BASE=0xff010000 CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_CPU_FREQ_HZ=500000000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_BOOTSTAGE=y diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 687b41bfb148ea6384ffffe9262e3a1603afa46c..86223cd39c80d3cad70402a77332d21d22512aae 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -18,6 +18,7 @@ CONFIG_ZYNQ_MAC_IN_EEPROM=y CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20 CONFIG_CMD_FRU=y CONFIG_ZYNQMP_USB=y +CONFIG_ZYNQMP_PSU_INIT_ENABLED=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x8000000 @@ -124,7 +125,6 @@ CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_MISC=y CONFIG_I2C_EEPROM=y -CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y diff --git a/configs/xtfpga_defconfig b/configs/xtfpga_defconfig index daa17d1502ca5193e49d148d5d943494741730a9..1c8d57b555c1a6c76ab1edbae7a63c1e7d756a96 100644 --- a/configs/xtfpga_defconfig +++ b/configs/xtfpga_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_XTFPGA_KC705=y CONFIG_SYS_LOAD_ADDR=0x02000000 +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_BOOTDELAY=10 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig index cab0e4f081fd6851b6026120252ccc96c283a6e1..82f3ae65d696e8251ce3193abf4c334d15105ecb 100644 --- a/configs/zynq_cse_nand_defconfig +++ b/configs/zynq_cse_nand_defconfig @@ -4,6 +4,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_ICACHE_OFF=y CONFIG_SYS_DCACHE_OFF=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x100000 CONFIG_SYS_MALLOC_LEN=0x8000 diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig index 5caecaece0a5ba3784ce8a0fbfaf0fbac4ed9278..b3d1202749bff61d995708ef4abe0de3c2354eeb 100644 --- a/configs/zynq_cse_nor_defconfig +++ b/configs/zynq_cse_nor_defconfig @@ -4,6 +4,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_ICACHE_OFF=y CONFIG_SYS_DCACHE_OFF=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0xFFFC0000 CONFIG_SYS_MALLOC_LEN=0x1000 diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index bc5e8aa1b0a1c7f86a5573b821cb98164f3611c5..831382f2a02cec5e86473e93bb84e5fc70a5e46d 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -4,6 +4,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_ICACHE_OFF=y CONFIG_SYS_DCACHE_OFF=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0xFFFC0000 CONFIG_SYS_MALLOC_LEN=0x1000 diff --git a/disk/part_dos.c b/disk/part_dos.c index 9e29aa6583a93f938dc4d89cbdb9bb84ad115114..94fae7166d7b169731edd7d41c5d7f0eb37237e5 100644 --- a/disk/part_dos.c +++ b/disk/part_dos.c @@ -459,10 +459,12 @@ int layout_mbr_partitions(struct disk_partition *p, int count, ext = &p[i]; } - if (i >= 4 && !ext) { - printf("%s: extended partition is needed for more than 4 partitions\n", - __func__); - return -1; + if (count < 4) + return 0; + + if (!ext) { + log_err("extended partition is needed for more than 4 partitions\n"); + return -EINVAL; } /* calculate extended volumes start and size if needed */ diff --git a/doc/README.fsl-clk b/doc/README.fsl-clk deleted file mode 100644 index 3a9927f0793274e65001bde2439b67e66b995133..0000000000000000000000000000000000000000 --- a/doc/README.fsl-clk +++ /dev/null @@ -1,5 +0,0 @@ -Freescale system clock options - - - CONFIG_SYS_FSL_CLK - Enable to call get_clocks() in board_init_f() for - non-PPC platforms. diff --git a/doc/README.semihosting b/doc/README.semihosting index c019999bedd8f0f394b98710d8fa35d7465abb0f..f382d0131eb341a40d6af341ce78cb470eb25c43 100644 --- a/doc/README.semihosting +++ b/doc/README.semihosting @@ -25,7 +25,7 @@ or turning on CONFIG_BASE_FVP for the more full featured model. Rather than create a new armv8 board similar to armltd/vexpress64, add semihosting calls to the existing one, enabled with CONFIG_SEMIHOSTING and CONFIG_BASE_FVP both set. Also reuse the existing board config file -vexpress_aemv8a.h but differentiate the two models by the presence or +vexpress_aemv8.h but differentiate the two models by the presence or absence of CONFIG_BASE_FVP. This change is tested and works on both the Foundation and Base fastmodel simulators. diff --git a/doc/board/allwinner/index.rst b/doc/board/allwinner/index.rst new file mode 100644 index 0000000000000000000000000000000000000000..7352ccd5c0ad39fc18dcc0f8aef74bea7a300a3a --- /dev/null +++ b/doc/board/allwinner/index.rst @@ -0,0 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Allwinner (sunxi) boards +======================== + +.. toctree:: + :maxdepth: 2 + + sunxi diff --git a/doc/board/allwinner/sunxi.rst b/doc/board/allwinner/sunxi.rst new file mode 100644 index 0000000000000000000000000000000000000000..797222d8d34ade26ef831678a6b9288e2731abb4 --- /dev/null +++ b/doc/board/allwinner/sunxi.rst @@ -0,0 +1,319 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. Copyright (C) 2021 Arm Ltd. + +Allwinner SoC based boards +========================== +For boards using an Allwinner ARM based SoC ("sunxi"), the U-Boot build +system generates a single integrated image file: ``u-boot-sunxi-with-spl.bin.`` +This file can be used on SD cards, eMMC devices, SPI flash and for the +USB-OTG based boot method (FEL). To build this file: + +* For 64-bit SoCs, build Trusted Firmware (TF-A, formerly known as ATF) first, + you will need its ``bl31.bin``. See below for more details. +* Optionally on 64-bit SoCs, build the `crust`_ management processor firmware, + you will need its ``scp.bin``. See below for more details. +* Build U-Boot:: + + $ export BL31=/path/to/bl31.bin # required for 64-bit SoCs + $ export SCP=/path/to/scp.bin # optional for some 64-bit SoCs + $ make _defconfig + $ make +* Transfer to an (micro)SD card (see below for more details):: + + $ sudo dd if=u-boot-sunxi-with-spl.bin of=/dev/sdX bs=8k seek=1 +* Boot and enjoy! + +.. note:: + The traditional SD card location the Allwinner BootROM loads from is 8KB + (sector 16). This works fine with the old MBR partitioning scheme, which most + SD cards come formatted with. However this is in the middle of a potential + GPT partition table, which will become invalid in this step. Newer SoCs + (starting with the H3 from late 2014) also support booting from 128KB, which + is beyond even a GPT and thus a safer location. + +For more details, and alternative boot locations or installations, see below. + +Building Arm Trusted Firmware (TF-A) +------------------------------------ +Boards using a 64-bit Soc (A64, H5, H6, H616, R329) require the BL31 stage of +the `Arm Trusted Firmware-A`_ firmware. This provides the reference +implementation of secure software for Armv8-A, offering PSCI and SMCCC +services. Allwinner support is fully mainlined. To build bl31.bin:: + + $ git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git + $ cd trusted-firmware-a + $ make CROSS_COMPILE=aarch64-linux-gnu- PLAT=sun50i_a64 DEBUG=1 + $ export BL31=$(pwd)/build/sun50i_a64/debug/bl31.bin + +The target platform (``PLAT=``) for A64 and H5 SoCs is sun50i_a64, for the H6 +sun50i_h6, for the H616 sun50i_h616, and for the R329 sun50i_r329. Use:: + + $ find plat/allwinner -name platform.mk + +to find all supported platforms. TF-A's `docs/plat/allwinner.rst`_ contains +more information and lists some build options. + +Building the Crust management processor firmware +------------------------------------------------ +For some SoCs and boards, the integrated OpenRISC management controller can +be used to provide power management services, foremost suspend to RAM. +There is a community supported Open Source implementation called `crust`_, +which runs on most SoCs featuring a management controller. + +This firmware part is optional, setting the SCP environment variable to +/dev/null avoids the warning message when building without one. + +To build crust's scp.bin, you need an OpenRISC (or1k) cross compiler, then:: + + $ git clone https://github.com/crust-firmware/crust.git + $ cd crust + $ make _defconfig + $ make CROSS_COMPILE=or1k-none-elf- scp + $ export SCP=$(pwd)/build/scp/scp.bin + +Find a list of supported board configurations in the `configs/`_ directory. +The `crust README`_ has more information about the building process, including +information about where to get OpenRISC cross compilers. + +Building the U-Boot image +------------------------- +Find the U-Boot defconfig file for your board first. Those files live in +the ``configs/`` directory; you can grep for the stub name of the devicetree +file, if you know that, or for the SoC name to find the right version:: + + $ git grep -l MACH_SUN8I_H3 configs + $ git grep -l sun50i-h6-orangepi-3 configs + +The `linux-sunxi`_ wiki also lists the name of the defconfig file in the +respective board page. Then use this defconfig file to create the .config +file, and build the image:: + + $ make _defconfig + $ make + +For 64-bit boards, this requires either the BL31 environment variable to be +set (as shown above in the TF-A build example), or it to be supplied on the +build command line:: + + $ make BL31=/src/tf-a.git/build/sun50i_h616/debug/bl31.bin + +The same applies to the (optional) SCP firmware. + +The file containing everything you need is called ``u-boot-sunxi-with-spl.bin``, +you will find it in the root folder of your U-Boot (build) tree. Except for +raw NAND flash devices this very same file can be used for any boot source. +It will contain the SPL image, fitted with the proper signature recognised by +the BROM, and the required checksum. Also it will contain at least U-Boot +proper, either wrapped in the legacy U-Boot image format, or in a FIT image. +The board's devicetree is also included, either appended to the U-Boot proper +image, or contained in the FIT image. If required by the SoC, this FIT file will +also include the other firmware images. + +Installing U-Boot +----------------- + +Installing on a (micro-) SD card +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +All Allwinner SoCs will try to find a boot image at sector 16 (8KB) of +an SD card, connected to the first MMC controller. To transfer the generated +image to an SD card, from any Linux device (including the board itself) with +an (micro-)SD card reader, type:: + + $ sudo dd if=u-boot-sunxi-with-spl.bin of=/dev/sdX bs=1k seek=8 + +``/dev/sdx`` needs to be replaced with the block device name of the SD card +reader. On some machines this could be ``/dev/mmcblkX``. +Newer SoCs (starting from the H3 from 2014, and including all ARM64 SoCs), +also look at sector 256 (128KB) for the signature (after having checked the +8KB location). Installing the firmware there has the advantage of not +overlapping with a GPT partition table. Simply replace the "``seek=8``" above +with "``seek=128``". + +You can also use an existing (mainline) U-Boot to write to the SD card. Load +the generated U-Boot image somewhere into DRAM (via ``ext4load``, ``fatload``, +or ``tftpboot``), then write to MMC device 0:: + + => fatload mmc 0:1 $kernel_addr_r u-boot-sunxi-with-spl.bin + => mmc dev 0 + => mmc write $kernel_addr_r 0x10 0x7f0 + +To use the alternative boot location on newer SoCs:: + + => mmc write $kernel_addr_r 0x100 0x700 + +Installing on eMMC (on-board flash memory) +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +Some boards have a soldered eMMC chip, some other boards have an eMMC socket +to receive an optional eMMC module. U-Boot can be installed to those chips, +to boot without an SD card inserted. The Boot-ROM can boot either from the +regular user data partition, or from one of the separate eMMC boot partitions. +U-Boot can be installed either from a running Linux instance on the device, +from a running (mainline) U-Boot, or via an adapter for the (removable) +eMMC module. + +Installing on an eMMC user data partition from Linux +```````````````````````````````````````````````````` +If you have a running Linux instance on the device, and have somehow copied +over the image file to that device, you can write the image directly into the +eMMC device from there. +Find the name of the block device file first, it is one of the +``/dev/mmcblk`` devices. eMMC devices typically also list a +``/dev/mmcblkboot0`` partition (see below), this helps you to tell it apart +from the SD card device. +To install onto the user data partition:: + + $ sudo dd if=u-boot-sunxi-with-spl.bin of=/dev/dev/mmcblkX bs=1k seek=8 + +Similar to SD cards, the BROM in newer SoCs (H3 and above) also checks +sector 256 of an eMMC, so you can use "``seek=128``" as well. Having a GPT +on an eMMC device is much more likely than on an SD card, so you should +probably stick to the alternative location, or use one of the boot partitions. + +Installing on an eMMC boot partition from Linux +``````````````````````````````````````````````` +In the following examples, ``/dev/mmcblkX`` needs to be replaced with the block +device name of the eMMC device. The eMMC device can be recognised by also +listing the boot partitions (``/dev/mmcblkXboot0``) in ``/proc/partitions``. + +To allow booting from one of the eMMC boot partitions, this one needs to be +enabled first. This only needs to be done once, as this setting is +persistent, even though the boot partition can be disabled or changed again +any time later:: + + # apt-get install mmc-utils + # mmc bootbus set single_hs x1 x4 /dev/mmcblkX + # mmc bootpart enable 1 1 /dev/mmcblkX + +The first "1" in the last command points to the boot partition number to be +used, typically devices offer two boot partitions. + +By default Linux disables write access to the boot partitions, to prevent +accidental overwrites. You need to disable the write protection (until the +next reboot), then can write the U-Boot image to the *first* sector of the +selected boot partition:: + + # echo 0 > /sys/block/mmcblkXboot0/force_ro + # dd if=u-boot-sunxi-with-spl.bin of=/dev/mmcblkXboot0 bs=1k + +Installing on an eMMC user data partition from U-Boot +````````````````````````````````````````````````````` +You can also write the generated image file to an SD card, boot the device +from there, and burn the very same image to the eMMC device from U-Boot. +The following commands copy the image from the SD card to the eMMC device:: + + => mmc dev 0 + => mmc read $kernel_addr_r 0x10 0x7f0 + => mmc dev 1 + => mmc write $kernel_addr_r 0x10 0x7f0 + +You can also copy an image from the 8K offset of an SD card to the 128K +offset of the eMMC (or any combination), just change the "``0x10 0x7f0``" above +to "``0x100 0x700``", respectively. Of course the image file can be loaded via +any other loading method, including ``fatload``, ``ext4load``, ``tftpboot``. + +Installing on an eMMC boot partition from U-Boot +```````````````````````````````````````````````` +The selected eMMC boot partition needs to be initially enabled first (same +as in Linux above), you can do this from U-Boot with:: + + => mmc dev 1 + => mmc bootbus 1 1 0 0 + => mmc partconf 1 1 1 1 + +The first "1" in both commands denotes the MMC device number. The second "1" +in the partconf command sets the required ``BOOT_ACK`` option, the last two "1"s +selects the active boot partition and the target for the next data access, +respectively. So for the next "``mmc write``" command to address one of the boot +partitions, the last number must either be "1" or "2", "0" would switch (back) +to the normal user data partition. + +Then load the ``u-boot-sunxi-with-spl.bin`` image file into DRAM, either by +reading directly from an SD card or eMMC user data partition, or from a +file system or TFTP (see above), and transfer it to the boot partition:: + + => tftpboot $kernel_addr_r u-boot-sunxi-with-spl.bin + => mmc write $kernel_addr_r 0 0x7f0 + +After that the device should boot from the selected boot partition, which takes +precedence over booting from the user data partition. + +Installing on SPI flash +^^^^^^^^^^^^^^^^^^^^^^^ +Some devices have a SPI NOR flash chip soldered on the board. If it is +connected to the SPI0 pins on PortC, the BROM can also boot from there. +Typically the SPI flash has the lowest boot priority, so SD card and eMMC +devices will be considered first. + +Installing on SPI flash from Linux +`````````````````````````````````` +If the devicetree enables and describes the SPI flash device, you can access +the SPI flash content from Linux, using the `MTD utils`_:: + + # apt-get install mtd-utils + # mtdinfo + # mtd_debug erase /dev/mtdX 0 0xf0000 + # mtd_debug write /dev/mtdX 0 0xf0000 u-boot-sunxi-with-spl.bin + +``/dev/mtdX`` needs to be replaced with the respective device name, as listed +in the output of ``mtdinfo``. + +Installing on SPI flash from U-Boot +``````````````````````````````````` +If SPI flash driver and command support (``CONFIG_CMD_SF``) is enabled in the +U-Boot configuration, the image file can be installed via U-Boot as well:: + + => tftpboot $kernel_addr_r u-boot-sunxi-with-spl.bin + => sf probe + => sf erase 0 +0xf0000 + => sf write $kernel_addr_r 0 $filesize + +Installing on SPI flash via USB in FEL mode +``````````````````````````````````````````` +If the device is in FEL mode (see below), the SPI flash can also be written to +with the sunxi-fel utility, via an USB(-OTG) cable from any USB host machine:: + + $ sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin + +Booting via the USB(-OTG) FEL mode +---------------------------------- +If none of the boot locations checked by the BROM contains a medium or valid +signature, the BROM will enter the so-called FEL mode, in which it will +listen to commands from a host on the SoC's USB-OTG interface. Those commands +allow to read from and write to arbitrary memory locations, also to start +execution at any address, which allows to bootstrap a board solely via an +USB cable. Some boards feature a "FEL" or "U-Boot" button, which forces +FEL mode despite a valid boot location being present. The same can be achieved +via a `magic binary`_ on an SD card, which allows to enter FEL mode on any +board. + +To use FEL booting, let the board enter FEL mode, via any of the mentioned +methods (no boot media, FEL button, SD card with FEL binary), then connect +a USB cable to the board's USB OTG port. Some boards (Pine64, TV boxes) don't +have a separate OTG port. In this case mostly one of the USB-A ports is +connected to USB0, and can be used via a non-standard USB-A to USB-A cable. + +Typically there is no on-board indication of FEL mode, other than a new USB +device appearing on the connected host computer. The USB vendor/device ID +is 1f3a:efe8. Mostly this will identify as "sunxi SoC OTG connector in +FEL/flashing mode", but older distributions might still report "Onda +(unverified) V972 tablet in flashing mode". + +The `sunxi_fel`_ tool implements the proprietary BROM protocol, and allows to +bootstrap U-Boot by just providing our venerable u-boot-sunxi-with-spl.bin:: + + $ sudo apt-get install sunxi-tools + $ sunxi-fel uboot u-boot-sunxi-with-spl.bin + +Additional binaries like a kernel, an initial ramdisk or a boot script, can +also be uploaded via FEL, check the Wiki's `FEL page`_ for more details. + +.. _`Arm Trusted Firmware-A`: https://www.trustedfirmware.org/projects/tf-a/ +.. _`docs/plat/allwinner.rst`: https://trustedfirmware-a.readthedocs.io/en/latest/plat/allwinner.html +.. _`crust`: https://github.com/crust-firmware/crust +.. _`configs/`: https://github.com/crust-firmware/crust/tree/master/configs +.. _`crust README`: https://github.com/crust-firmware/crust/blob/master/README.md#building-the-firmware +.. _`linux-sunxi`: https://linux-sunxi.org +.. _`MTD utils`: http://www.linux-mtd.infradead.org/ +.. _`magic binary`: https://github.com/linux-sunxi/sunxi-tools/raw/master/bin/fel-sdboot.sunxi +.. _`sunxi_fel`: https://github.com/linux-sunxi/sunxi-tools +.. _`FEL page`: https://linux-sunxi.org/FEL/USBBoot diff --git a/doc/board/armltd/index.rst b/doc/board/armltd/index.rst new file mode 100644 index 0000000000000000000000000000000000000000..c20d8a0a26b42be4f993b76a0f75dffd5be72d75 --- /dev/null +++ b/doc/board/armltd/index.rst @@ -0,0 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Arm Ltd +============= + +.. toctree:: + :maxdepth: 2 + + vexpress64.rst diff --git a/doc/board/armltd/vexpress64.rst b/doc/board/armltd/vexpress64.rst new file mode 100644 index 0000000000000000000000000000000000000000..d87b1c38f5b27ec79f1be4addafc0a0155accfbe --- /dev/null +++ b/doc/board/armltd/vexpress64.rst @@ -0,0 +1,51 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Arm Versatile Express +===================== + +The vexpress_* board configuration supports the following platforms: + + * FVP_Base_RevC-2xAEMvA + * Juno development board + +Fixed Virtual Platforms +----------------------- + +The Fixed Virtual Platforms (FVP) are complete simulations of an Arm system, +including processor, memory and peripherals. They are set out in a "programmer's +view", which gives a comprehensive model on which to build and test software. + +The supported FVPs are available free of charge and can be downloaded from the +Arm developer site [1]_ (user registration might be required). + +Supported features: + + * GICv3 + * Generic timer + * PL011 UART + +The default configuration assumes that U-Boot is bootstrapped using a suitable +bootloader, such as Trusted Firmware-A [4]_. The u-boot binary can be passed +into the TF-A build: ``make PLAT= all fip BL33=u-boot.bin`` + +The FVPs can be debugged using Arm Development Studio [2]_. + +Juno +---- + +Juno is an Arm development board with the following features: + + * Arm Cortex-A72/A57 and Arm Cortex-A53 in a "big.LITTLE" configuration + * A PCIe Gen2.0 bus with 4 lanes + * 8GB of DRAM + * GICv2 + +More details can be found in the board documentation [3]_. + +References +---------- + +.. [1] https://developer.arm.com/tools-and-software/simulation-models/fixed-virtual-platforms +.. [2] https://developer.arm.com/tools-and-software/embedded/arm-development-studio +.. [3] https://developer.arm.com/tools-and-software/development-boards/juno-development-board +.. [4] https://trustedfirmware-a.readthedocs.io/ \ No newline at end of file diff --git a/doc/board/emulation/qemu-arm.rst b/doc/board/emulation/qemu-arm.rst index 7c24e29410046f5a5d366553d46bab1202269c78..16f66388eb1f4f12746fbbdd206c71446c087e62 100644 --- a/doc/board/emulation/qemu-arm.rst +++ b/doc/board/emulation/qemu-arm.rst @@ -21,6 +21,9 @@ The 'virt' platform provides the following as the basic functionality: Additionally, a number of optional peripherals can be added to the PCI bus. +See :doc:`../../develop/devicetree/dt_qemu` for information on how to see +the devicetree actually generated by QEMU. + Building U-Boot --------------- Set the CROSS_COMPILE environment variable as usual, and run: @@ -41,14 +44,15 @@ The minimal QEMU command line to get U-Boot up and running is: - For ARM:: - qemu-system-arm -machine virt -bios u-boot.bin + qemu-system-arm -machine virt -nographic -bios u-boot.bin - For AArch64:: - qemu-system-aarch64 -machine virt -cpu cortex-a57 -bios u-boot.bin + qemu-system-aarch64 -machine virt -nographic -cpu cortex-a57 -bios u-boot.bin Note that for some odd reason qemu-system-aarch64 needs to be explicitly -told to use a 64-bit CPU or it will boot in 32-bit mode. +told to use a 64-bit CPU or it will boot in 32-bit mode. The -nographic argument +ensures that output appears on the terminal. Use Ctrl-A X to quit. Additional persistent U-boot environment support can be added as follows: diff --git a/doc/board/emulation/qemu-riscv.rst b/doc/board/emulation/qemu-riscv.rst index 4b8e104a2151a781b48cf22f9f7e4785cdd6ecfd..3409fff8117ea5d0e18942d70b8e96d5fcc89e55 100644 --- a/doc/board/emulation/qemu-riscv.rst +++ b/doc/board/emulation/qemu-riscv.rst @@ -13,6 +13,9 @@ The QEMU virt machine models a generic RISC-V virtual machine with support for the VirtIO standard networking and block storage devices. It has CLINT, PLIC, 16550A UART devices in addition to VirtIO and it also uses device-tree to pass configuration information to guest software. It implements RISC-V privileged + +See :doc:`../../develop/devicetree/dt_qemu` for information on how to see +the devicetree actually generated by QEMU. architecture spec v1.10. Building U-Boot diff --git a/doc/board/index.rst b/doc/board/index.rst index 13f4db848e7c55105d08bc45428d98ebe96a1d34..5607e1f9463899392e70a13e7a9f00a19408afca 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -9,8 +9,10 @@ Board-specific doc actions/index advantech/index AndesTech/index + allwinner/index amlogic/index apple/index + armltd/index atmel/index congatec/index coreboot/index diff --git a/doc/board/st/stm32mp1.rst b/doc/board/st/stm32mp1.rst index 42bb94148d9d4e0dc66970b92b77d29b5e065742..0c5d3a90f04ee8e353ab8783d722d6732cf40e76 100644 --- a/doc/board/st/stm32mp1.rst +++ b/doc/board/st/stm32mp1.rst @@ -645,16 +645,18 @@ On EV1 board, booting from SD card, without OP-TEE_:: dev: eMMC alt: 15 name: mmc1_rootfs layout: RAW_ADDR dev: eMMC alt: 16 name: mmc1_userfs layout: RAW_ADDR dev: MTD alt: 17 name: nor0 layout: RAW_ADDR - dev: MTD alt: 18 name: nand0 layout: RAW_ADDR - dev: VIRT alt: 19 name: OTP layout: RAW_ADDR - dev: VIRT alt: 20 name: PMIC layout: RAW_ADDR + dev: MTD alt: 18 name: nor1 layout: RAW_ADDR + dev: MTD alt: 19 name: nand0 layout: RAW_ADDR + dev: VIRT alt: 20 name: OTP layout: RAW_ADDR + dev: VIRT alt: 21 name: PMIC layout: RAW_ADDR All the supported device are exported for dfu-util tool:: $> dfu-util -l - Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=20, name="PMIC", serial="002700333338511934383330" - Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=19, name="OTP", serial="002700333338511934383330" - Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=18, name="nand0", serial="002700333338511934383330" + Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=21, name="PMIC", serial="002700333338511934383330" + Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=20, name="OTP", serial="002700333338511934383330" + Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=19, name="nand0", serial="002700333338511934383330" + Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=18, name="nor1", serial="002700333338511934383330" Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=17, name="nor0", serial="002700333338511934383330" Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=16, name="mmc1_userfs", serial="002700333338511934383330" Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=15, name="mmc1_rootfs", serial="002700333338511934383330" @@ -705,12 +707,12 @@ You can update the boot device: When the board is booting for nor0 or nand0, only the MTD partition on the boot devices are available, for example: -- NOR (nor0 = alt 20) & NAND (nand0 = alt 26) :: +- NOR (nor0 = alt 20, nor1 = alt 26) & NAND (nand0 = alt 27) : $> dfu-util -d 0483:5720 -a 21 -D tf-a-stm32mp157c-ev1.stm32 $> dfu-util -d 0483:5720 -a 22 -D tf-a-stm32mp157c-ev1.stm32 $> dfu-util -d 0483:5720 -a 23 -D fip-stm32mp157c-ev1.bin - $> dfu-util -d 0483:5720 -a 27 -D st-image-weston-openstlinux-weston-stm32mp1_nand_4_256_multivolume.ubi + $> dfu-util -d 0483:5720 -a 28 -D st-image-weston-openstlinux-weston-stm32mp1_nand_4_256_multivolume.ubi - NAND (nand0 = alt 21):: diff --git a/doc/develop/bloblist.rst b/doc/develop/bloblist.rst index 317ebc4919dd3776bda9c5e6ea5033e4ea451b8f..47274cf8e26cc90e98d1c1bde6c4863b17a66292 100644 --- a/doc/develop/bloblist.rst +++ b/doc/develop/bloblist.rst @@ -59,6 +59,22 @@ Bloblist provides a fairly simple API which allows blobs to be created and found. All access is via the blob's tag. Blob records are zeroed when added. +Placing the bloblist +-------------------- + +The bloblist is typically positioned at a fixed address by TPL, or SPL. This +is controlled by `CONFIG_BLOBLIST_ADDR`. But in some cases it is preferable to +allocate the bloblist in the malloc() space. Use the `CONFIG_BLOBLIST_ALLOC` +option to enable this. + +The bloblist is automatically relocated as part of U-Boot relocation. Sometimes +it is useful to expand the bloblist in U-Boot proper, since it may want to add +information for use by Linux. Note that this does not mean that Linux needs to +know anything about the bloblist format, just that it is convenient to use +bloblist to place things contiguously in memory. Set +`CONFIG_BLOBLIST_SIZE_RELOC` to define the expanded size, if needed. + + Finishing the bloblist ---------------------- diff --git a/doc/develop/devicetree/dt_qemu.rst b/doc/develop/devicetree/dt_qemu.rst new file mode 100644 index 0000000000000000000000000000000000000000..c25c4fb053d2c9d512effe8207c52d8de5012131 --- /dev/null +++ b/doc/develop/devicetree/dt_qemu.rst @@ -0,0 +1,48 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Devicetree in QEMU +================== + +For QEMU on ARM, RISC-V and one PPC target, the devicetree is created on-the-fly +by QEMU. It is intended for use in Linux but can be used by U-Boot also, so long +as any nodes/properties needed by U-Boot are merged in. + +When `CONFIG_OF_BOARD` is enabled + + +Obtaining the QEMU devicetree +----------------------------- + +Where QEMU generates its own devicetree to pass to U-Boot tou can use +`-dtb u-boot.dtb` to force QEMU to use U-Boot's in-tree version. + +To obtain the devicetree that qemu generates, add `-machine dumpdtb=qemu.dtb`, +e.g.:: + + qemu-system-arm -machine virt -machine dumpdtb=qemu.dtb + + qemu-system-aarch64 -machine virt -machine dumpdtb=qemu.dtb + + qemu-system-riscv64 -machine virt -machine dumpdtb=qemu.dtb + + +Merging in U-Boot nodes/properties +---------------------------------- + +Various U-Boot features require nodes and properties in the U-Boot devicetree +and at present QEMU is unaware of these. To use these you must manually merge +in the appropriate pieces. + +One way to do this is with dtc. This command runs dtc on each .dtb file in turn, +to produce a text file. It drops the duplicate header on the qemu one. Then it +joins them up and runs them through dtc to compile the output:: + + qemu-system-arm -machine virt -machine dumpdtb=qemu.dtb + cat <(dtc -I dtb qemu.dtb) <(dtc -I dtb u-boot.dtb |grep -v /dts-v1/) |dtc - -o merged.dtb + +You can then run qemu with the merged devicetree, e.g.:: + + qemu-system-arm -machine virt -nographic -bios u-boot.bin -dtb merged.dtb + +Note that there seems to be a bug in some versions of qemu where the output of +dumpdtb does not quite match what is provided to U-Boot. diff --git a/doc/develop/devicetree/index.rst b/doc/develop/devicetree/index.rst index fa5db3eb76e40b7c30027508150c4f82d67a95cf..2edb69572ddae2c83f1ad822c22f76fd26f73210 100644 --- a/doc/develop/devicetree/index.rst +++ b/doc/develop/devicetree/index.rst @@ -11,3 +11,4 @@ build-time and runtime configuration. intro control + dt_qemu diff --git a/doc/develop/driver-model/migration.rst b/doc/develop/driver-model/migration.rst index 8bb8601c5826b00c044ab85277ce2512bf0b1eb5..3dbeea6537ccc138e5d027ab2aa18db5cc600bf1 100644 --- a/doc/develop/driver-model/migration.rst +++ b/doc/develop/driver-model/migration.rst @@ -98,3 +98,11 @@ Deadline: 2021.10 The I2C subsystem has supported the driver model since early 2015. Maintainers should submit patches switching over to using CONFIG_DM_I2C and other base driver model options in time for inclusion in the 2021.10 release. + +CONFIG_KEYBOARD +--------------- +Deadline: 2022.10 + +This is a legacy option which has been replaced by driver model. +Maintainers should submit patches switching over to using CONFIG_DM_KEYBOARD and +other base driver model options in time for inclusion in the 2022.10 release. diff --git a/doc/develop/environment.rst b/doc/develop/environment.rst new file mode 100644 index 0000000000000000000000000000000000000000..0b86fafbff7ee64eee64a8f81f2d89e5c1521524 --- /dev/null +++ b/doc/develop/environment.rst @@ -0,0 +1,51 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Environment implementation +========================== + +See :doc:`../usage/environment` for usage information. + +Callback functions for environment variables +-------------------------------------------- + +For some environment variables, the behavior of u-boot needs to change +when their values are changed. This functionality allows functions to +be associated with arbitrary variables. On creation, overwrite, or +deletion, the callback will provide the opportunity for some side +effect to happen or for the change to be rejected. + +The callbacks are named and associated with a function using the +U_BOOT_ENV_CALLBACK macro in your board or driver code. + +These callbacks are associated with variables in one of two ways. The +static list can be added to by defining CONFIG_ENV_CALLBACK_LIST_STATIC +in the board configuration to a string that defines a list of +associations. The list must be in the following format:: + + entry = variable_name[:callback_name] + list = entry[,list] + +If the callback name is not specified, then the callback is deleted. +Spaces are also allowed anywhere in the list. + +Callbacks can also be associated by defining the ".callbacks" variable +with the same list format above. Any association in ".callbacks" will +override any association in the static list. You can define +CONFIG_ENV_CALLBACK_LIST_DEFAULT to a list (string) to define the +".callbacks" environment variable in the default or embedded environment. + +If CONFIG_REGEX is defined, the variable_name above is evaluated as a +regular expression. This allows multiple variables to be connected to +the same callback without explicitly listing them all out. + +The signature of the callback functions is:: + + int callback(const char *name, const char *value, enum env_op op, int flags) + +* name - changed environment variable +* value - new value of the environment variable +* op - operation (create, overwrite, or delete) +* flags - attributes of the environment variable change, see flags H_* in + include/search.h + +The return value is 0 if the variable change is accepted and 1 otherwise. diff --git a/doc/develop/index.rst b/doc/develop/index.rst index b3871b16f3596d3c225e75954c9420d37c9ebaaf..9592d193fca1770ab4e74cc9e525fc29410805f1 100644 --- a/doc/develop/index.rst +++ b/doc/develop/index.rst @@ -16,6 +16,7 @@ Implementation devicetree/index distro driver-model/index + environment global_data logging makefiles diff --git a/doc/develop/trace.rst b/doc/develop/trace.rst index 09f5745a909dfade0dcee0d412f6c20b258a9d41..b22e068ef9e8a09ea2b4bc50d3d7b4074c2eb901 100644 --- a/doc/develop/trace.rst +++ b/doc/develop/trace.rst @@ -30,16 +30,11 @@ Sandbox is a build of U-Boot that can run under Linux so it is a convenient way of trying out tracing before you use it on your actual board. To do this, follow these steps: -Add the following to include/configs/sandbox.h (if not already there) +Add the following to config/sandbox_defconfig .. code-block:: c - #define CONFIG_TRACE - #define CONFIG_CMD_TRACE - #define CONFIG_TRACE_BUFFER_SIZE (16 << 20) - #define CONFIG_TRACE_EARLY_SIZE (8 << 20) - #define CONFIG_TRACE_EARLY - #define CONFIG_TRACE_EARLY_ADDR 0x00100000 + CONFIG_TRACE=y Build sandbox U-Boot with tracing enabled: diff --git a/doc/develop/uefi/u-boot_on_efi.rst b/doc/develop/uefi/u-boot_on_efi.rst index 5f2f850f07120f895e23ce35c0805b761c665d01..acad6397e81da824e629a6b6c62d9bd507a01d30 100644 --- a/doc/develop/uefi/u-boot_on_efi.rst +++ b/doc/develop/uefi/u-boot_on_efi.rst @@ -265,13 +265,11 @@ This work could be extended in a number of ways: - Figure out how to solve the interrupt problem -- Add more drivers to the application side (e.g. block devices, USB, - environment access). This would mostly be an academic exercise as a strong - use case is not readily apparent, but it might be fun. +- Add more drivers to the application side (e.g.USB, environment access). - Avoid turning off boot services in the stub. Instead allow U-Boot to make use of boot services in case it wants to. It is unclear what it might want - though. + though. It is better to use the app. Where is the code? ------------------ diff --git a/doc/device-tree-bindings/arm/arm,scmi.txt b/doc/device-tree-bindings/arm/arm,scmi.txt index a76124f4a303727fa4cb21dcbbf62b0f3249eaea..92572eabb58b972263422c8c5a11924159e2d05d 100644 --- a/doc/device-tree-bindings/arm/arm,scmi.txt +++ b/doc/device-tree-bindings/arm/arm,scmi.txt @@ -14,7 +14,8 @@ Required properties: The scmi node with the following properties shall be under the /firmware/ node. -- compatible : shall be "arm,scmi" or "arm,scmi-smc" for smc/hvc transports +- compatible : shall be "arm,scmi" or "arm,scmi-smc" for smc/hvc transports, + or "linaro,scmi-optee" for OP-TEE transport. - mboxes: List of phandle and mailbox channel specifiers. It should contain exactly one or two mailboxes, one for transmitting messages("tx") and another optional for receiving the notifications("rx") if @@ -26,6 +27,8 @@ The scmi node with the following properties shall be under the /firmware/ node. - #size-cells : should be '0' as 'reg' property doesn't have any size associated with it. - arm,smc-id : SMC id required when using smc or hvc transports +- linaro,optee-channel-id : Channel specifier required when using OP-TEE + transport. Optional properties: @@ -33,16 +36,16 @@ Optional properties: See Documentation/devicetree/bindings/mailbox/mailbox.txt for more details about the generic mailbox controller and client driver bindings. - -The mailbox is the only permitted method of calling the SCMI firmware. Mailbox doorbell is used as a mechanism to alert the presence of a messages and/or notification. Each protocol supported shall have a sub-node with corresponding compatible as described in the following sections. If the platform supports dedicated -communication channel for a particular protocol, the 3 properties namely: -mboxes, mbox-names and shmem shall be present in the sub-node corresponding -to that protocol. +communication channel for a particular protocol, properties shall be present +in the sub-node corresponding to that protocol. These properties are: +- mboxes, mbox-names and shmem for mailbox transport +- arm,smc-id and shmem for smc/hvc transport +- linaro,optee-channel-id and possibly shmem for OP-TEE transport Clock/Performance bindings for the clocks/OPPs based on SCMI Message Protocol ------------------------------------------------------------ diff --git a/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt b/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt index ac6a7df4327d15013b441add9df9ef5c88d52dba..926e3e83b3fa70024b6633e9987e6cadb060c639 100644 --- a/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt +++ b/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt @@ -128,23 +128,6 @@ phyc attributes: MR2 MR3 -- st,phy-cal : phy cal depending of calibration or tuning of DDR - This parameter is optional; when it is absent the built-in PHY - calibration is done. - for STM32MP15x: 12 values are requested in this order - DX0DLLCR - DX0DQTR - DX0DQSTR - DX1DLLCR - DX1DQTR - DX1DQSTR - DX2DLLCR - DX2DQTR - DX2DQSTR - DX3DLLCR - DX3DQTR - DX3DQSTR - Example: / { @@ -280,21 +263,6 @@ Example: 0x00000000 /*MR3*/ >; - st,phy-cal = < - 0x40000000 /*DX0DLLCR*/ - 0xFFFFFFFF /*DX0DQTR*/ - 0x3DB02000 /*DX0DQSTR*/ - 0x40000000 /*DX1DLLCR*/ - 0xFFFFFFFF /*DX1DQTR*/ - 0x3DB02000 /*DX1DQSTR*/ - 0x40000000 /*DX2DLLCR*/ - 0xFFFFFFFF /*DX2DQTR*/ - 0x3DB02000 /*DX2DQSTR*/ - 0x40000000 /*DX3DLLCR*/ - 0xFFFFFFFF /*DX3DQTR*/ - 0x3DB02000 /*DX3DQSTR*/ - >; - status = "okay"; }; }; diff --git a/doc/device-tree-bindings/mmc/sandbox,mmc.txt b/doc/device-tree-bindings/mmc/sandbox,mmc.txt new file mode 100644 index 0000000000000000000000000000000000000000..1170bcd6a009c47e69de12ce571e24252801d299 --- /dev/null +++ b/doc/device-tree-bindings/mmc/sandbox,mmc.txt @@ -0,0 +1,18 @@ +Sandbox MMC +=========== + +Required properties: +- compatible : "sandbox,mmc" + +Optional properties: +- filename : Name of backing file, if any. This is mapped into the MMC device + so can be used to provide a filesystem or other test data + + +Example +------- + +mmc2 { + compatible = "sandbox,mmc"; + non-removable; +}; diff --git a/doc/device-tree-bindings/pinctrl/apple,pinctrl.yaml b/doc/device-tree-bindings/pinctrl/apple,pinctrl.yaml new file mode 100644 index 0000000000000000000000000000000000000000..d50571affd1f24a4b5bd2c42fd026d2acd574eda --- /dev/null +++ b/doc/device-tree-bindings/pinctrl/apple,pinctrl.yaml @@ -0,0 +1,106 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/apple,pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Apple GPIO controller + +maintainers: + - Mark Kettenis + +description: | + The Apple GPIO controller is a simple combined pin and GPIO + controller present on Apple ARM SoC platforms, including various + iPhone and iPad devices and the "Apple Silicon" Macs. + +properties: + compatible: + items: + - const: apple,t8103-pinctrl + - const: apple,pinctrl + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + gpio-controller: true + + '#gpio-cells': + const: 2 + + gpio-ranges: + maxItems: 1 + + interrupts: + description: One interrupt for each of the (up to 7) interrupt + groups supported by the controller sorted by interrupt group + number in ascending order. + minItems: 1 + maxItems: 7 + + interrupt-controller: true + +patternProperties: + '-pins$': + type: object + $ref: pinmux-node.yaml# + + properties: + pinmux: + description: + Values are constructed from pin number and alternate function + configuration number using the APPLE_PINMUX() helper macro + defined in include/dt-bindings/pinctrl/apple.h. + + required: + - pinmux + + additionalProperties: false + +required: + - compatible + - reg + - gpio-controller + - '#gpio-cells' + - gpio-ranges + +additionalProperties: false + +examples: + - | + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + pinctrl: pinctrl@23c100000 { + compatible = "apple,t8103-pinctrl", "apple,pinctrl"; + reg = <0x2 0x3c100000 0x0 0x100000>; + clocks = <&gpio_clk>; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 212>; + + interrupt-controller; + interrupt-parent = <&aic>; + interrupts = , + , + , + , + , + , + ; + + pcie_pins: pcie-pins { + pinmux = , + , + ; + }; + }; + }; diff --git a/doc/usage/environment.rst b/doc/usage/environment.rst new file mode 100644 index 0000000000000000000000000000000000000000..d295cc898785961298c3bd2cac9f97a7d038450d --- /dev/null +++ b/doc/usage/environment.rst @@ -0,0 +1,465 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Environment Variables +===================== + +U-Boot supports user configuration using environment variables which +can be made persistent by saving to persistent storage, for example flash +memory. + +Environment variables are set using "env set" (alias "setenv"), printed using +"env print" (alias "printenv"), and saved to persistent storage using +"env save" (alias "saveenv"). Using "env set" +without a value can be used to delete a variable from the +environment. As long as you don't save the environment, you are +working with an in-memory copy. In case the Flash area containing the +environment is erased by accident, a default environment is provided. + +Some configuration is controlled by Environment Variables, so that setting the +variable can adjust the behaviour of U-Boot (e.g. autoboot delay, autoloading +from tftp). + +Text-based Environment +---------------------- + +The default environment for a board is created using a `.env` environment file +using a simple text format. The base filename for this is defined by +`CONFIG_ENV_SOURCE_FILE`, or `CONFIG_SYS_BOARD` if that is empty. + +The file must be in the board directory and have a .env extension, so +assuming that there is a board vendor, the resulting filename is therefore:: + + board///.env + +or:: + + board///.env + +This is a plain text file where you can type your environment variables in +the form `var=value`. Blank lines and multi-line variables are supported. +The conversion script looks for a line that starts in column 1 with a string +and has an equals sign immediately afterwards. Spaces before the = are not +permitted. It is a good idea to indent your scripts so that only the 'var=' +appears at the start of a line. + +To add additional text to a variable you can use `var+=value`. This text is +merged into the variable during the make process and made available as a +single value to U-Boot. Variables can contain `+` characters but in the unlikely +event that you want to have a variable name ending in plus, put a backslash +before the `+` so that the script knows you are not adding to an existing +variable but assigning to a new one:: + + maximum\+=value + +This file can include C-style comments. Blank lines and multi-line +variables are supported, and you can use normal C preprocessor directives +and CONFIG defines from your board config also. + +For example, for snapper9260 you would create a text file called +`board/bluewater/snapper9260.env` containing the environment text. + +Example:: + + stdout=serial + #ifdef CONFIG_LCD + stdout+=,lcd + #endif + bootcmd= + /* U-Boot script for booting */ + + if [ -z ${tftpserverip} ]; then + echo "Use 'setenv tftpserverip a.b.c.d' to set IP address." + fi + + usb start; setenv autoload n; bootp; + tftpboot ${tftpserverip}: + bootm + failed= + /* Print a message when boot fails */ + echo CONFIG_SYS_BOARD boot failed - please check your image + echo Load address is CONFIG_SYS_LOAD_ADDR + +If CONFIG_ENV_SOURCE_FILE is empty and the default filename is not present, then +the old-style C environment is used instead. See below. + +Old-style C environment +----------------------- + +Traditionally, the default environment is created in `include/env_default.h`, +and can be augmented by various `CONFIG` defines. See that file for details. In +particular you can define `CONFIG_EXTRA_ENV_SETTINGS` in your board file +to add environment variables. + +Board maintainers are encouraged to migrate to the text-based environment as it +is easier to maintain. The distro-board script still requires the old-style +environment but work is underway to address this. + + +List of environment variables +----------------------------- + +Some device configuration options can be set using environment variables. In +many cases the value in the default environment comes from a CONFIG option - see +`include/env_default.h`) for this. + +This is most-likely not complete: + +baudrate + Used to set the baudrate of the UART - it defaults to CONFIG_BAUDRATE (which + defaults to 115200). + +bootdelay + Delay before automatically running bootcmd. During this time the user + can choose to enter the shell (or the boot menu if + CONFIG_AUTOBOOT_MENU_SHOW=y): + + - 0 to autoboot with no delay, but you can stop it by key input. + - -1 to disable autoboot. + - -2 to autoboot with no delay and not check for abort + + The default value is defined by CONFIG_BOOTDELAY. + The value of 'bootdelay' is overridden by the /config/bootdelay value in + the device-tree if CONFIG_OF_CONTROL=y. + Does it really make sense that the devicetree overrides the user setting? + +bootcmd + The command that is run if the user does not enter the shell during the + boot delay. + +bootargs + Command line arguments passed when booting an operating system or binary + image + +bootfile + Name of the image to load with TFTP + +bootm_low + Memory range available for image processing in the bootm + command can be restricted. This variable is given as + a hexadecimal number and defines lowest address allowed + for use by the bootm command. See also "bootm_size" + environment variable. Address defined by "bootm_low" is + also the base of the initial memory mapping for the Linux + kernel -- see the description of CONFIG_SYS_BOOTMAPSZ and + bootm_mapsize. + +bootm_mapsize + Size of the initial memory mapping for the Linux kernel. + This variable is given as a hexadecimal number and it + defines the size of the memory region starting at base + address bootm_low that is accessible by the Linux kernel + during early boot. If unset, CONFIG_SYS_BOOTMAPSZ is used + as the default value if it is defined, and bootm_size is + used otherwise. + +bootm_size + Memory range available for image processing in the bootm + command can be restricted. This variable is given as + a hexadecimal number and defines the size of the region + allowed for use by the bootm command. See also "bootm_low" + environment variable. + +bootstopkeysha256, bootdelaykey, bootstopkey + See README.autoboot + +updatefile + Location of the software update file on a TFTP server, used + by the automatic software update feature. Please refer to + documentation in doc/README.update for more details. + +autoload + if set to "no" (any string beginning with 'n'), + "bootp" and "dhcp" will just load perform a lookup of the + configuration from the BOOTP server, but not try to + load any image using TFTP or DHCP. + +autostart + if set to "yes", an image loaded using the "bootp", "dhcp", + "rarpboot", "tftpboot" or "diskboot" commands will + be automatically started (by internally calling + "bootm") + + If unset, or set to "1"/"yes"/"true" (case insensitive, just the first + character is enough), a standalone image + passed to the "bootm" command will be copied to the load address + (and eventually uncompressed), but NOT be started. + This can be used to load and uncompress arbitrary + data. + +fdt_high + if set this restricts the maximum address that the + flattened device tree will be copied into upon boot. + For example, if you have a system with 1 GB memory + at physical address 0x10000000, while Linux kernel + only recognizes the first 704 MB as low memory, you + may need to set fdt_high as 0x3C000000 to have the + device tree blob be copied to the maximum address + of the 704 MB low memory, so that Linux kernel can + access it during the boot procedure. + + If this is set to the special value 0xffffffff (32-bit machines) or + 0xffffffffffffffff (64-bit machines) then + the fdt will not be copied at all on boot. For this + to work it must reside in writable memory, have + sufficient padding on the end of it for u-boot to + add the information it needs into it, and the memory + must be accessible by the kernel. + +fdtcontroladdr + if set this is the address of the control flattened + device tree used by U-Boot when CONFIG_OF_CONTROL is + defined. + +initrd_high + restrict positioning of initrd images: + If this variable is not set, initrd images will be + copied to the highest possible address in RAM; this + is usually what you want since it allows for + maximum initrd size. If for some reason you want to + make sure that the initrd image is loaded below the + CONFIG_SYS_BOOTMAPSZ limit, you can set this environment + variable to a value of "no" or "off" or "0". + Alternatively, you can set it to a maximum upper + address to use (U-Boot will still check that it + does not overwrite the U-Boot stack and data). + + For instance, when you have a system with 16 MB + RAM, and want to reserve 4 MB from use by Linux, + you can do this by adding "mem=12M" to the value of + the "bootargs" variable. However, now you must make + sure that the initrd image is placed in the first + 12 MB as well - this can be done with:: + + setenv initrd_high 00c00000 + + If you set initrd_high to 0xffffffff (32-bit machines) or + 0xffffffffffffffff (64-bit machines), this is an + indication to U-Boot that all addresses are legal + for the Linux kernel, including addresses in flash + memory. In this case U-Boot will NOT COPY the + ramdisk at all. This may be useful to reduce the + boot time on your system, but requires that this + feature is supported by your Linux kernel. + +ipaddr + IP address; needed for tftpboot command + +loadaddr + Default load address for commands like "bootp", + "rarpboot", "tftpboot", "loadb" or "diskboot" + +loads_echo + see CONFIG_LOADS_ECHO + +serverip + TFTP server IP address; needed for tftpboot command + +bootretry + see CONFIG_BOOT_RETRY_TIME + +bootdelaykey + see CONFIG_AUTOBOOT_DELAY_STR + +bootstopkey + see CONFIG_AUTOBOOT_STOP_STR + +ethprime + controls which network interface is used first. + +ethact + controls which interface is currently active. + For example you can do the following:: + + => setenv ethact FEC + => ping 192.168.0.1 # traffic sent on FEC + => setenv ethact SCC + => ping 10.0.0.1 # traffic sent on SCC + +ethrotate + When set to "no" U-Boot does not go through all + available network interfaces. + It just stays at the currently selected interface. When unset or set to + anything other than "no", U-Boot does go through all + available network interfaces. + +netretry + When set to "no" each network operation will + either succeed or fail without retrying. + When set to "once" the network operation will + fail when all the available network interfaces + are tried once without success. + Useful on scripts which control the retry operation + themselves. + +silent_linux + If set then Linux will be told to boot silently, by + adding 'console=' to its command line. If "yes" it will be + made silent. If "no" it will not be made silent. If + unset, then it will be made silent if the U-Boot console + is silent. + +tftpsrcp + If this is set, the value is used for TFTP's + UDP source port. + +tftpdstp + If this is set, the value is used for TFTP's UDP + destination port instead of the default port 69. + +tftpblocksize + Block size to use for TFTP transfers; if not set, + we use the TFTP server's default block size + +tftptimeout + Retransmission timeout for TFTP packets (in milli- + seconds, minimum value is 1000 = 1 second). Defines + when a packet is considered to be lost so it has to + be retransmitted. The default is 5000 = 5 seconds. + Lowering this value may make downloads succeed + faster in networks with high packet loss rates or + with unreliable TFTP servers. + +tftptimeoutcountmax + maximum count of TFTP timeouts (no + unit, minimum value = 0). Defines how many timeouts + can happen during a single file transfer before that + transfer is aborted. The default is 10, and 0 means + 'no timeouts allowed'. Increasing this value may help + downloads succeed with high packet loss rates, or with + unreliable TFTP servers or client hardware. + +tftpwindowsize + if this is set, the value is used for TFTP's + window size as described by RFC 7440. + This means the count of blocks we can receive before + sending ack to server. + +vlan + When set to a value < 4095 the traffic over + Ethernet is encapsulated/received over 802.1q + VLAN tagged frames. + + Note: This appears not to be used in U-Boot. See `README.VLAN`. + +bootpretryperiod + Period during which BOOTP/DHCP sends retries. + Unsigned value, in milliseconds. If not set, the period will + be either the default (28000), or a value based on + CONFIG_NET_RETRY_COUNT, if defined. This value has + precedence over the valu based on CONFIG_NET_RETRY_COUNT. + +memmatches + Number of matches found by the last 'ms' command, in hex + +memaddr + Address of the last match found by the 'ms' command, in hex, + or 0 if none + +mempos + Index position of the last match found by the 'ms' command, + in units of the size (.b, .w, .l) of the search + +zbootbase + (x86 only) Base address of the bzImage 'setup' block + +zbootaddr + (x86 only) Address of the loaded bzImage, typically + BZIMAGE_LOAD_ADDR which is 0x100000 + + +Image locations +--------------- + +The following image location variables contain the location of images +used in booting. The "Image" column gives the role of the image and is +not an environment variable name. The other columns are environment +variable names. "File Name" gives the name of the file on a TFTP +server, "RAM Address" gives the location in RAM the image will be +loaded to, and "Flash Location" gives the image's address in NOR +flash or offset in NAND flash. + +*Note* - these variables don't have to be defined for all boards, some +boards currently use other variables for these purposes, and some +boards use these variables for other purposes. + +Also note that most of these variables are just a commonly used set of variable +names, used in some other variable definitions, but are not hard-coded anywhere +in U-Boot code. + +================= ============== ================ ============== +Image File Name RAM Address Flash Location +================= ============== ================ ============== +u-boot u-boot u-boot_addr_r u-boot_addr +Linux kernel bootfile kernel_addr_r kernel_addr +device tree blob fdtfile fdt_addr_r fdt_addr +ramdisk ramdiskfile ramdisk_addr_r ramdisk_addr +================= ============== ================ ============== + + +Automatically updated variables +------------------------------- + +The following environment variables may be used and automatically +updated by the network boot commands ("bootp" and "rarpboot"), +depending the information provided by your boot server: + +========= =================================================== +Variable Notes +========= =================================================== +bootfile see above +dnsip IP address of your Domain Name Server +dnsip2 IP address of your secondary Domain Name Server +gatewayip IP address of the Gateway (Router) to use +hostname Target hostname +ipaddr See above +netmask Subnet Mask +rootpath Pathname of the root filesystem on the NFS server +serverip see above +========= =================================================== + + +Special environment variables +----------------------------- + +There are two special Environment Variables: + +serial# + contains hardware identification information such as type string and/or + serial number +ethaddr + Ethernet address. If CONFIG_REGEX=y, also eth*addr (where * is an integer). + +These variables can be set only once (usually during manufacturing of +the board). U-Boot refuses to delete or overwrite these variables +once they have been set, unless CONFIG_ENV_OVERWRITE is enabled in the board +configuration. + +Also: + +ver + Contains the U-Boot version string as printed + with the "version" command. This variable is + readonly (see CONFIG_VERSION_VARIABLE). + +Please note that changes to some configuration parameters may take +only effect after the next boot (yes, that's just like Windows). + + +External environment file +------------------------- + +The `CONFIG_USE_DEFAULT_ENV_FILE` option provides a way to bypass the +environment generation in U-Boot. If enabled, then `CONFIG_DEFAULT_ENV_FILE` +provides the name of a file which is converted into the environment, +completely bypassing the standard environment variables in `env_default.h`. + +The format is the same as accepted by the mkenvimage tool, with lines containing +key=value pairs. Blank lines and lines beginning with # are ignored. + +Future work may unify this feature with the text-based environment, perhaps +moving the contents of `env_default.h` to a text file. + +Implementation +-------------- + +See :doc:`../develop/environment` for internal development details. diff --git a/doc/usage/index.rst b/doc/usage/index.rst index 356f2a56181b2bbdcbc6ddb8ad494f1af0969ef9..33761af96afb563f05c0ba5d21ebe6faec6f38e7 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -5,6 +5,7 @@ Use U-Boot :maxdepth: 1 dfu + environment fdt_overlays fit netconsole @@ -43,6 +44,7 @@ Shell commands qfw reset sbi + sf scp03 setexpr size diff --git a/doc/usage/sf.rst b/doc/usage/sf.rst new file mode 100644 index 0000000000000000000000000000000000000000..71bd1be51758ba3d48fcd2bdeeb69671522fc927 --- /dev/null +++ b/doc/usage/sf.rst @@ -0,0 +1,245 @@ +.. SPDX-License-Identifier: GPL-2.0+: + +sf command +========== + +Synopis +------- + +:: + + sf probe [[[:]] [ []]] + sf read | + sf write | + sf erase | + sf update | + sf protect lock|unlock + sf test | + +Description +----------- + +The *sf* command is used to access SPI flash, supporting read/write/erase and +a few other functions. + +Probe +----- + +The flash must first be probed with *sf probe* before any of the other +subcommands can be used. All of the parameters are optional: + +bus + SPI bus number containing the SPI-flash chip, e.g. 0. If you don't know + the number, you can use 'dm uclass' to see all the spi devices, + and check the value for 'seq' for each one (here 0 and 2):: + + uclass 89: spi + 0 spi@0 @ 05484960, seq 0 + 1 spi@1 @ 05484b40, seq 2 + +cs + SPI chip-select to use for the chip. This is often 0 and can be omitted, + but in some cases multiple slaves are attached to a SPI controller, + selected by a chip-select line for each one. + +hz + Speed of the SPI bus in hertz. This normally defaults to 100000, i.e. + 100KHz, which is very slow. Note that if the device exists in the + device tree, there might be a speed provided there, in which case this + setting is ignored. + +mode + SPI mode to use: + + ===== ================ + Mode Meaning + ===== ================ + 0 CPOL=0, CPHA=0 + 1 CPOL=0, CPHA=1 + 2 CPOL=1, CPHA=0 + 3 CPOL=1, CPHA=1 + ===== ================ + + Clock phase (CPHA) 0 means that data is transferred (sampled) on the + first clock edge; 1 means the second. + + Clock polarity (CPOL) controls the idle state of the clock, 0 for low, + 1 for high. + The active state is the opposite of idle. + + You may find this `SPI documentation`_ useful. + +Parameters for other subcommands (described below) are as follows: + +addr + Memory address to start transfer + +offset + Flash offset to start transfer + +partition + If the parameter is not numeric, it is assumed to be a partition + description in the format , which is not + covered here. This requires CONFIG_CMD_MTDPARTS. + +len + Number of bytes to transfer + +Read +~~~~ + +Use *sf read* to read from SPI flash to memory. The read will fail if an +attempt is made to read past the end of the flash. + + +Write +~~~~~ + +Use *sf write* to write from memory to SPI flash. The SPI flash should be +erased first, since otherwise the result is undefined. + +The write will fail if an attempt is made to read past the end of the flash. + + +Erase +~~~~~ + +Use *sf erase* to erase a region of SPI flash. The erase will fail if any part +of the region to be erased is protected or lies past the end of the flash. It +may also fail if the start offset or length are not aligned to an erase region +(e.g. 256 bytes). + + +Update +~~~~~~ + +Use *sf update* to automatically erase and update a region of SPI flash from +memory. This works a sector at a time (typical 4KB or 64KB). For each +sector it first checks if the sector already has the right data. If so it is +skipped. If not, the sector is erased and the new data written. Note that if +the length is not a multiple of the erase size, the space after the data in +the last sector will be erased. If the offset does not start at the beginning +of an erase block, the operation will fail. + +Speed statistics are shown including the number of bytes that were already +correct. + + +Protect +~~~~~~~ + +SPI-flash chips often have a protection feature where the chip is split up into +regions which can be locked or unlocked. With *sf protect* it is possible to +change these settings, if supported by the driver. + +lock|unlock + Selects whether to lock or unlock the sectors + + + Start sector number to lock/unlock. This may be the byte offset or some + other value, depending on the chip. + + + Number of bytes to lock/unlock + + +Test +~~~~ + +A convenient and fast *sf test* subcommand provides a way to check that SPI +flash is working as expected. This works in four stages: + + * erase - erases the entire region + * check - checks that the region is erased + * write - writes a test pattern to the region, consisting of the U-Boot code + * read - reads back the test pattern to check that it was written correctly + +Memory is allocated for two buffers, each bytes in size. At typical +size is 64KB to 1MB. The offset and size must be aligned to an erase boundary. + +Note that this test will fail if any part of the SPI flash is write-protected. + + +Examples +-------- + +This first example uses sandbox:: + + => sf probe + SF: Detected m25p16 with page size 256 Bytes, erase size 64 KiB, total 2 MiB + => sf read 1000 1100 80000 + device 0 offset 0x1100, size 0x80000 + SF: 524288 bytes @ 0x1100 Read: OK + => md 1000 + 00001000: edfe0dd0 f33a0000 78000000 84250000 ......:....x..%. + 00001010: 28000000 11000000 10000000 00000000 ...(............ + 00001020: 6f050000 0c250000 00000000 00000000 ...o..%......... + 00001030: 00000000 00000000 00000000 00000000 ................ + 00001040: 00000000 00000000 00000000 00000000 ................ + 00001050: 00000000 00000000 00000000 00000000 ................ + 00001060: 00000000 00000000 00000000 00000000 ................ + 00001070: 00000000 00000000 01000000 00000000 ................ + 00001080: 03000000 04000000 00000000 01000000 ................ + 00001090: 03000000 04000000 0f000000 01000000 ................ + 000010a0: 03000000 08000000 1b000000 646e6173 ............sand + 000010b0: 00786f62 03000000 08000000 21000000 box............! + 000010c0: 646e6173 00786f62 01000000 61696c61 sandbox.....alia + 000010d0: 00736573 03000000 07000000 2c000000 ses............, + 000010e0: 6332692f 00003040 03000000 07000000 /i2c@0.......... + 000010f0: 31000000 6963702f 00003040 03000000 ...1/pci@0...... + => sf erase 0 80000 + SF: 524288 bytes @ 0x0 Erased: OK + => sf read 1000 1100 80000 + device 0 offset 0x1100, size 0x80000 + SF: 524288 bytes @ 0x1100 Read: OK + => md 1000 + 00001000: ffffffff ffffffff ffffffff ffffffff ................ + 00001010: ffffffff ffffffff ffffffff ffffffff ................ + 00001020: ffffffff ffffffff ffffffff ffffffff ................ + 00001030: ffffffff ffffffff ffffffff ffffffff ................ + 00001040: ffffffff ffffffff ffffffff ffffffff ................ + 00001050: ffffffff ffffffff ffffffff ffffffff ................ + 00001060: ffffffff ffffffff ffffffff ffffffff ................ + 00001070: ffffffff ffffffff ffffffff ffffffff ................ + 00001080: ffffffff ffffffff ffffffff ffffffff ................ + 00001090: ffffffff ffffffff ffffffff ffffffff ................ + 000010a0: ffffffff ffffffff ffffffff ffffffff ................ + 000010b0: ffffffff ffffffff ffffffff ffffffff ................ + 000010c0: ffffffff ffffffff ffffffff ffffffff ................ + 000010d0: ffffffff ffffffff ffffffff ffffffff ................ + 000010e0: ffffffff ffffffff ffffffff ffffffff ................ + 000010f0: ffffffff ffffffff ffffffff ffffffff ................ + +This second example is running on coral, an x86 Chromebook:: + + => sf probe + SF: Detected w25q128fw with page size 256 Bytes, erase size 4 KiB, total 16 MiB + => sf erase 300000 80000 + SF: 524288 bytes @ 0x300000 Erased: OK + => sf update 1110000 300000 80000 + device 0 offset 0x300000, size 0x80000 + 524288 bytes written, 0 bytes skipped in 0.457s, speed 1164578 B/s + + # This does nothing as the flash is already updated + => sf update 1110000 300000 80000 + device 0 offset 0x300000, size 0x80000 + 0 bytes written, 524288 bytes skipped in 0.196s, speed 2684354 B/s + => sf test 00000 80000 # try a protected region + SPI flash test: + Erase failed (err = -5) + Test failed + => sf test 800000 80000 + SPI flash test: + 0 erase: 18 ticks, 28444 KiB/s 227.552 Mbps + 1 check: 192 ticks, 2666 KiB/s 21.328 Mbps + 2 write: 227 ticks, 2255 KiB/s 18.040 Mbps + 3 read: 189 ticks, 2708 KiB/s 21.664 Mbps + Test passed + 0 erase: 18 ticks, 28444 KiB/s 227.552 Mbps + 1 check: 192 ticks, 2666 KiB/s 21.328 Mbps + 2 write: 227 ticks, 2255 KiB/s 18.040 Mbps + 3 read: 189 ticks, 2708 KiB/s 21.664 Mbps + + +.. _SPI documentation: + https://en.wikipedia.org/wiki/Serial_Peripheral_Interface diff --git a/drivers/block/ide.c b/drivers/block/ide.c index c99076c6f45d0a0490231dde3f1e54b7c91376e8..085aa356feef568ae16639984d0bf2847a152769 100644 --- a/drivers/block/ide.c +++ b/drivers/block/ide.c @@ -45,10 +45,6 @@ struct blk_desc ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE]; #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */ -#ifndef CONFIG_SYS_ATA_PORT_ADDR -#define CONFIG_SYS_ATA_PORT_ADDR(port) (port) -#endif - #ifdef CONFIG_IDE_RESET extern void ide_set_reset(int idereset); @@ -678,8 +674,7 @@ static void ide_ident(struct blk_desc *dev_desc) __weak void ide_outb(int dev, int port, unsigned char val) { debug("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n", - dev, port, val, - (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port))); + dev, port, val, ATA_CURR_BASE(dev) + port); #if defined(CONFIG_IDE_AHB) if (port) { @@ -690,7 +685,7 @@ __weak void ide_outb(int dev, int port, unsigned char val) outb(val, (ATA_CURR_BASE(dev))); } #else - outb(val, (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port))); + outb(val, ATA_CURR_BASE(dev) + port); #endif } @@ -701,12 +696,11 @@ __weak unsigned char ide_inb(int dev, int port) #if defined(CONFIG_IDE_AHB) val = ide_read_register(dev, port); #else - val = inb((ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port))); + val = inb(ATA_CURR_BASE(dev) + port); #endif debug("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n", - dev, port, - (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)), val); + dev, port, ATA_CURR_BASE(dev) + port, val); return val; } diff --git a/drivers/block/sandbox.c b/drivers/block/sandbox.c index 1c2c3b4f886edc214cb2a5283a027321d02b48b6..53925ce9b6921da543eb06baec519edf61db9df8 100644 --- a/drivers/block/sandbox.c +++ b/drivers/block/sandbox.c @@ -19,11 +19,11 @@ DECLARE_GLOBAL_DATA_PTR; #ifndef CONFIG_BLK -static struct host_block_dev host_devices[CONFIG_HOST_MAX_DEVICES]; +static struct host_block_dev host_devices[SANDBOX_HOST_MAX_DEVICES]; static struct host_block_dev *find_host_device(int dev) { - if (dev >= 0 && dev < CONFIG_HOST_MAX_DEVICES) + if (dev >= 0 && dev < SANDBOX_HOST_MAX_DEVICES) return &host_devices[dev]; return NULL; @@ -259,7 +259,7 @@ U_BOOT_DRIVER(sandbox_host_blk) = { U_BOOT_LEGACY_BLK(sandbox_host) = { .if_typename = "host", .if_type = IF_TYPE_HOST, - .max_devs = CONFIG_HOST_MAX_DEVICES, + .max_devs = SANDBOX_HOST_MAX_DEVICES, .get_dev = host_get_dev_err, }; #endif diff --git a/drivers/clk/aspeed/clk_ast2600.c b/drivers/clk/aspeed/clk_ast2600.c index 3a92739f5cf5332a11d3502c8243bfbd7c7fbb73..42ca39421cff7c04af530cafae449cfb1888f649 100644 --- a/drivers/clk/aspeed/clk_ast2600.c +++ b/drivers/clk/aspeed/clk_ast2600.c @@ -1013,6 +1013,46 @@ static ulong ast2600_enable_usbbhclk(struct ast2600_scu *scu) return 0; } +static ulong ast2600_enable_haceclk(struct ast2600_scu *scu) +{ + uint32_t reset_bit; + uint32_t clkgate_bit; + + /* share the same reset control bit with ACRY */ + reset_bit = BIT(ASPEED_RESET_HACE); + clkgate_bit = SCU_CLKGATE1_HACE; + + /* + * we don't do reset assertion here as HACE + * shares the same reset control with ACRY + */ + writel(clkgate_bit, &scu->clkgate_clr1); + mdelay(20); + writel(reset_bit, &scu->modrst_clr1); + + return 0; +} + +static ulong ast2600_enable_rsaclk(struct ast2600_scu *scu) +{ + uint32_t reset_bit; + uint32_t clkgate_bit; + + /* same reset control bit with HACE */ + reset_bit = BIT(ASPEED_RESET_HACE); + clkgate_bit = SCU_CLKGATE1_ACRY; + + /* + * we don't do reset assertion here as HACE + * shares the same reset control with ACRY + */ + writel(clkgate_bit, &scu->clkgate_clr1); + mdelay(20); + writel(reset_bit, &scu->modrst_clr1); + + return 0; +} + static int ast2600_clk_enable(struct clk *clk) { struct ast2600_clk_priv *priv = dev_get_priv(clk->dev); @@ -1051,6 +1091,12 @@ static int ast2600_clk_enable(struct clk *clk) case ASPEED_CLK_GATE_USBPORT2CLK: ast2600_enable_usbbhclk(priv->scu); break; + case ASPEED_CLK_GATE_YCLK: + ast2600_enable_haceclk(priv->scu); + break; + case ASPEED_CLK_GATE_RSACLK: + ast2600_enable_rsaclk(priv->scu); + break; default: pr_err("can't enable clk\n"); return -ENOENT; diff --git a/drivers/clk/clk_scmi.c b/drivers/clk/clk_scmi.c index 93a4819501cac1ed3a9c9dd2dd4d409c3ff766e6..9a0a6f66434438c682281695dc1c5acc0ac5b459 100644 --- a/drivers/clk/clk_scmi.c +++ b/drivers/clk/clk_scmi.c @@ -2,6 +2,9 @@ /* * Copyright (C) 2019-2020 Linaro Limited */ + +#define LOG_CATEGORY UCLASS_CLK + #include #include #include diff --git a/drivers/clk/mpc83xx_clk.h b/drivers/clk/mpc83xx_clk.h index 8a31a4c868f1c0eb0f2ea364563f369120104915..c06a51ecd43a426e8ecd4e99a3f8ff3e902f9106 100644 --- a/drivers/clk/mpc83xx_clk.h +++ b/drivers/clk/mpc83xx_clk.h @@ -317,7 +317,7 @@ static inline u32 get_pci_sync_in(immap_t *im) u8 clkin_div; clkin_div = (get_spmr(im) & SPMR_CKID) >> SPMR_CKID_SHIFT; - return CONFIG_SYS_CLK_FREQ / (1 + clkin_div); + return get_board_sys_clk() / (1 + clkin_div); } /** @@ -331,7 +331,7 @@ static inline u32 get_csb_clk(immap_t *im) u8 spmf; spmf = (get_spmr(im) & SPMR_SPMF) >> SPMR_SPMF_SHIFT; - return CONFIG_SYS_CLK_FREQ * spmf; + return get_board_sys_clk() * spmf; } /** diff --git a/drivers/core/device-remove.c b/drivers/core/device-remove.c index 11d3959d20f4b23eb23fd9d720c821b9c24e4b48..69c50da44a9966405c3fd0cbb3c58bdc84cbd0c2 100644 --- a/drivers/core/device-remove.c +++ b/drivers/core/device-remove.c @@ -95,6 +95,9 @@ int device_unbind(struct udevice *dev) if (ret) return log_msg_ret("child unbind", ret); + ret = uclass_pre_unbind_device(dev); + if (ret) + return log_msg_ret("uc", ret); if (dev_get_flags(dev) & DM_FLAG_ALLOC_PDATA) { free(dev_get_plat(dev)); dev_set_plat(dev, NULL); @@ -142,10 +145,8 @@ void device_free(struct udevice *dev) } if (dev->parent) { size = dev->parent->driver->per_child_auto; - if (!size) { - size = dev->parent->uclass->uc_drv-> - per_child_auto; - } + if (!size) + size = dev->parent->uclass->uc_drv->per_child_auto; if (size) { free(dev_get_parent_priv(dev)); dev_set_parent_priv(dev, NULL); diff --git a/drivers/core/device.c b/drivers/core/device.c index efd07176e37485b4cb910a2dda231e50dda7aa8e..4873c47d10ba04b02680d2dc1dec3cf9f781f6df 100644 --- a/drivers/core/device.c +++ b/drivers/core/device.c @@ -533,8 +533,12 @@ int device_probe(struct udevice *dev) * is set just above. However, the PCI bus' probe() method and * associated uclass methods have not yet been called. */ - if (dev->parent && device_get_uclass_id(dev) != UCLASS_PINCTRL) - pinctrl_select_state(dev, "default"); + if (dev->parent && device_get_uclass_id(dev) != UCLASS_PINCTRL) { + ret = pinctrl_select_state(dev, "default"); + if (ret && ret != -ENOSYS) + log_debug("Device '%s' failed to configure default pinctrl: %d (%s)\n", + dev->name, ret, errno_str(ret)); + } if (CONFIG_IS_ENABLED(POWER_DOMAIN) && dev->parent && (device_get_uclass_id(dev) != UCLASS_POWER_DOMAIN) && @@ -586,8 +590,12 @@ int device_probe(struct udevice *dev) if (ret) goto fail_uclass; - if (dev->parent && device_get_uclass_id(dev) == UCLASS_PINCTRL) - pinctrl_select_state(dev, "default"); + if (dev->parent && device_get_uclass_id(dev) == UCLASS_PINCTRL) { + ret = pinctrl_select_state(dev, "default"); + if (ret && ret != -ENOSYS) + log_debug("Device '%s' failed to configure default pinctrl: %d (%s)\n", + dev->name, ret, errno_str(ret)); + } return 0; fail_uclass: @@ -731,6 +739,17 @@ int device_get_child_count(const struct udevice *parent) return count; } +int device_get_decendent_count(const struct udevice *parent) +{ + const struct udevice *dev; + int count = 1; + + list_for_each_entry(dev, &parent->child_head, sibling_node) + count += device_get_decendent_count(dev); + + return count; +} + int device_find_child_by_seq(const struct udevice *parent, int seq, struct udevice **devp) { @@ -902,15 +921,16 @@ int device_find_first_child_by_uclass(const struct udevice *parent, return -ENODEV; } -int device_find_child_by_name(const struct udevice *parent, const char *name, - struct udevice **devp) +int device_find_child_by_namelen(const struct udevice *parent, const char *name, + int len, struct udevice **devp) { struct udevice *dev; *devp = NULL; list_for_each_entry(dev, &parent->child_head, sibling_node) { - if (!strcmp(dev->name, name)) { + if (!strncmp(dev->name, name, len) && + strlen(dev->name) == len) { *devp = dev; return 0; } @@ -919,6 +939,12 @@ int device_find_child_by_name(const struct udevice *parent, const char *name, return -ENODEV; } +int device_find_child_by_name(const struct udevice *parent, const char *name, + struct udevice **devp) +{ + return device_find_child_by_namelen(parent, name, strlen(name), devp); +} + int device_first_child_err(struct udevice *parent, struct udevice **devp) { struct udevice *dev; diff --git a/drivers/core/lists.c b/drivers/core/lists.c index 5d4f2ea0e3ad055058b02d9317a529de4fd3ba99..d2e9dc5719be262b3bc0cfcbaec61fd2f1311640 100644 --- a/drivers/core/lists.c +++ b/drivers/core/lists.c @@ -58,7 +58,7 @@ static int bind_drivers_pass(struct udevice *parent, bool pre_reloc_only) const int n_ents = ll_entry_count(struct driver_info, driver_info); bool missing_parent = false; int result = 0; - uint idx; + int idx; /* * Do one iteration through the driver_info records. For of-platdata, diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c index 9960e6b310b8a572a72ce7b4537011a5154ab80b..3707143ae667f0a75f1c05009247a5a4b822eb0b 100644 --- a/drivers/core/of_access.c +++ b/drivers/core/of_access.c @@ -581,7 +581,8 @@ int of_property_match_string(const struct device_node *np, const char *propname, * @propname: name of the property to be searched. * @out_strs: output array of string pointers. * @sz: number of array elements to read. - * @skip: Number of strings to skip over at beginning of list. + * @skip: Number of strings to skip over at beginning of list (cannot be + * negative) * * Don't call this function directly. It is a utility helper for the * of_property_read_string*() family of functions. diff --git a/drivers/core/of_extra.c b/drivers/core/of_extra.c index 632a1c2210e8e426bd65b766e9514146bbca743d..59ce9174ad076bff7795c108c06620b026e6688f 100644 --- a/drivers/core/of_extra.c +++ b/drivers/core/of_extra.c @@ -155,3 +155,15 @@ bool ofnode_phy_is_fixed_link(ofnode eth_node, ofnode *phy_node) return true; } + +bool ofnode_eth_uses_inband_aneg(ofnode eth_node) +{ + bool inband_aneg = false; + const char *managed; + + managed = ofnode_read_string(eth_node, "managed"); + if (managed && !strcmp(managed, "in-band-status")) + inband_aneg = true; + + return inband_aneg; +} diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c index 08705ef8d99b98a8b77f988982af24aae0440787..709bea272a6eed0b4ac8256b1e3f62c1a29fc3f4 100644 --- a/drivers/core/ofnode.c +++ b/drivers/core/ofnode.c @@ -456,6 +456,32 @@ int ofnode_read_string_count(ofnode node, const char *property) } } +int ofnode_read_string_list(ofnode node, const char *property, + const char ***listp) +{ + const char **prop; + int count; + int i; + + *listp = NULL; + count = ofnode_read_string_count(node, property); + if (count < 0) + return count; + if (!count) + return 0; + + prop = calloc(count + 1, sizeof(char *)); + if (!prop) + return -ENOMEM; + + for (i = 0; i < count; i++) + ofnode_read_string_index(node, property, i, &prop[i]); + prop[count] = NULL; + *listp = prop; + + return count; +} + static void ofnode_from_fdtdec_phandle_args(struct fdtdec_phandle_args *in, struct ofnode_phandle_args *out) { diff --git a/drivers/core/read.c b/drivers/core/read.c index 4307ca45799356c4371f1c54cc29df5e2de7d778..31f9e78a06251d7e0e343315e563ad53a6e9f6e4 100644 --- a/drivers/core/read.c +++ b/drivers/core/read.c @@ -205,6 +205,12 @@ int dev_read_string_count(const struct udevice *dev, const char *propname) return ofnode_read_string_count(dev_ofnode(dev), propname); } +int dev_read_string_list(const struct udevice *dev, const char *propname, + const char ***listp) +{ + return ofnode_read_string_list(dev_ofnode(dev), propname, listp); +} + int dev_read_phandle_with_args(const struct udevice *dev, const char *list_name, const char *cells_name, int cell_count, int index, struct ofnode_phandle_args *out_args) diff --git a/drivers/core/root.c b/drivers/core/root.c index 26b8195faa3b59cdf4104d2a2bbd75d9075642a2..815173f86ebd0892e4be30b3773033e79f8cf714 100644 --- a/drivers/core/root.c +++ b/drivers/core/root.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include @@ -407,6 +408,12 @@ int dm_init_and_scan(bool pre_reloc_only) return 0; } +void dm_get_stats(int *device_countp, int *uclass_countp) +{ + *device_countp = device_get_decendent_count(gd->dm_root); + *uclass_countp = uclass_get_count(); +} + #ifdef CONFIG_ACPIGEN static int root_acpi_get_name(const struct udevice *dev, char *out_name) { diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c index c5a50952fd0d29729aafe7355cd5b2bd1e115e6f..336ea8d243ddff92992d3778922449fdf63f0388 100644 --- a/drivers/core/uclass.c +++ b/drivers/core/uclass.c @@ -180,20 +180,25 @@ void uclass_set_priv(struct uclass *uc, void *priv) uc->priv_ = priv; } -enum uclass_id uclass_get_by_name(const char *name) +enum uclass_id uclass_get_by_name_len(const char *name, int len) { int i; for (i = 0; i < UCLASS_COUNT; i++) { struct uclass_driver *uc_drv = lists_uclass_lookup(i); - if (uc_drv && !strcmp(uc_drv->name, name)) + if (uc_drv && !strncmp(uc_drv->name, name, len)) return i; } return UCLASS_INVALID; } +enum uclass_id uclass_get_by_name(const char *name) +{ + return uclass_get_by_name_len(name, strlen(name)); +} + int dev_get_uclass_index(struct udevice *dev, struct uclass **ucp) { struct udevice *iter; @@ -638,6 +643,19 @@ int uclass_next_device_check(struct udevice **devp) return device_probe(*devp); } +int uclass_get_count(void) +{ + const struct uclass *uc; + int count = 0; + + if (gd->dm_root) { + list_for_each_entry(uc, gd->uclass_root, sibling_node) + count++; + } + + return count; +} + int uclass_first_device_drvdata(enum uclass_id id, ulong driver_data, struct udevice **devp) { @@ -682,7 +700,7 @@ err: } #if CONFIG_IS_ENABLED(DM_DEVICE_REMOVE) -int uclass_unbind_device(struct udevice *dev) +int uclass_pre_unbind_device(struct udevice *dev) { struct uclass *uc; int ret; @@ -694,7 +712,13 @@ int uclass_unbind_device(struct udevice *dev) return ret; } + return 0; +} + +int uclass_unbind_device(struct udevice *dev) +{ list_del(&dev->uclass_node); + return 0; } #endif @@ -783,6 +807,18 @@ int uclass_probe_all(enum uclass_id id) return 0; } +int uclass_id_count(enum uclass_id id) +{ + struct udevice *dev; + struct uclass *uc; + int count = 0; + + uclass_id_foreach_dev(id, dev, uc) + count++; + + return count; +} + UCLASS_DRIVER(nop) = { .id = UCLASS_NOP, .name = "nop", diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig index 0082177c21f00c80ff64b3c3078aed6c000f16e2..675081ecd3706a8ad01ffe42039552d851044e22 100644 --- a/drivers/crypto/Kconfig +++ b/drivers/crypto/Kconfig @@ -4,4 +4,6 @@ source drivers/crypto/hash/Kconfig source drivers/crypto/fsl/Kconfig +source drivers/crypto/aspeed/Kconfig + endmenu diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile index e8bae43e3f09ed41ff31dc8b87fdc6c8bc153a09..6b762565a1f6c9dfd643fcb8933696a51bdd0447 100644 --- a/drivers/crypto/Makefile +++ b/drivers/crypto/Makefile @@ -7,3 +7,4 @@ obj-$(CONFIG_EXYNOS_ACE_SHA) += ace_sha.o obj-y += rsa_mod_exp/ obj-y += fsl/ obj-y += hash/ +obj-y += aspeed/ diff --git a/drivers/crypto/aspeed/Kconfig b/drivers/crypto/aspeed/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..9bf317177aad54889294f8489102d2a25b4aa553 --- /dev/null +++ b/drivers/crypto/aspeed/Kconfig @@ -0,0 +1,20 @@ +config ASPEED_HACE + bool "ASPEED Hash and Crypto Engine" + depends on DM_HASH + help + Select this option to enable a driver for using the SHA engine in + the ASPEED BMC SoCs. + + Enabling this allows the use of SHA operations in hardware without + requiring the SHA software implementations. It also improves performance + and saves code size. + +config ASPEED_ACRY + bool "ASPEED RSA and ECC Engine" + depends on ASPEED_AST2600 + help + Select this option to enable a driver for using the RSA/ECC engine in + the ASPEED BMC SoCs. + + Enabling this allows the use of RSA/ECC operations in hardware without requiring the + software implementations. It also improves performance and saves code size. diff --git a/drivers/crypto/aspeed/Makefile b/drivers/crypto/aspeed/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..58b55fc46e4a6d57893b402ce5702b3ebc58ebb1 --- /dev/null +++ b/drivers/crypto/aspeed/Makefile @@ -0,0 +1,2 @@ +obj-$(CONFIG_ASPEED_HACE) += aspeed_hace.o +obj-$(CONFIG_ASPEED_ACRY) += aspeed_acry.o diff --git a/drivers/crypto/aspeed/aspeed_acry.c b/drivers/crypto/aspeed/aspeed_acry.c new file mode 100644 index 0000000000000000000000000000000000000000..c28cdf374b688ae8bfba6750b903b2f3859f7af4 --- /dev/null +++ b/drivers/crypto/aspeed/aspeed_acry.c @@ -0,0 +1,190 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2021 ASPEED Technology Inc. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* ACRY register offsets */ +#define ACRY_CTRL1 0x00 +#define ACRY_CTRL1_RSA_DMA BIT(1) +#define ACRY_CTRL1_RSA_START BIT(0) +#define ACRY_CTRL2 0x44 +#define ACRY_CTRL3 0x48 +#define ACRY_CTRL3_SRAM_AHB_ACCESS BIT(8) +#define ACRY_CTRL3_ECC_RSA_MODE_MASK GENMASK(5, 4) +#define ACRY_CTRL3_ECC_RSA_MODE_SHIFT 4 +#define ACRY_DMA_DRAM_SADDR 0x4c +#define ACRY_DMA_DMEM_TADDR 0x50 +#define ACRY_DMA_DMEM_TADDR_LEN_MASK GENMASK(15, 0) +#define ACRY_DMA_DMEM_TADDR_LEN_SHIFT 0 +#define ACRY_RSA_PARAM 0x58 +#define ACRY_RSA_PARAM_EXP_MASK GENMASK(31, 16) +#define ACRY_RSA_PARAM_EXP_SHIFT 16 +#define ACRY_RSA_PARAM_MOD_MASK GENMASK(15, 0) +#define ACRY_RSA_PARAM_MOD_SHIFT 0 +#define ACRY_RSA_INT_EN 0x3f8 +#define ACRY_RSA_INT_EN_RSA_READY BIT(2) +#define ACRY_RSA_INT_EN_RSA_CMPLT BIT(1) +#define ACRY_RSA_INT_STS 0x3fc +#define ACRY_RSA_INT_STS_RSA_READY BIT(2) +#define ACRY_RSA_INT_STS_RSA_CMPLT BIT(1) + +/* misc. constant */ +#define ACRY_ECC_MODE 2 +#define ACRY_RSA_MODE 3 +#define ACRY_CTX_BUFSZ 0x600 + +struct aspeed_acry { + phys_addr_t base; + phys_addr_t sram_base; /* internal sram */ + struct clk clk; +}; + +static int aspeed_acry_mod_exp(struct udevice *dev, const uint8_t *sig, uint32_t sig_len, + struct key_prop *prop, uint8_t *out) +{ + int i, j; + u8 *ctx; + u8 *ptr; + u32 reg; + struct aspeed_acry *acry = dev_get_priv(dev); + + ctx = memalign(16, ACRY_CTX_BUFSZ); + if (!ctx) + return -ENOMEM; + + memset(ctx, 0, ACRY_CTX_BUFSZ); + + ptr = (u8 *)prop->public_exponent; + for (i = prop->exp_len - 1, j = 0; i >= 0; --i) { + ctx[j] = ptr[i]; + j++; + j = (j % 16) ? j : j + 32; + } + + ptr = (u8 *)prop->modulus; + for (i = (prop->num_bits >> 3) - 1, j = 0; i >= 0; --i) { + ctx[j + 16] = ptr[i]; + j++; + j = (j % 16) ? j : j + 32; + } + + ptr = (u8 *)sig; + for (i = sig_len - 1, j = 0; i >= 0; --i) { + ctx[j + 32] = ptr[i]; + j++; + j = (j % 16) ? j : j + 32; + } + + writel((u32)ctx, acry->base + ACRY_DMA_DRAM_SADDR); + + reg = (((prop->exp_len << 3) << ACRY_RSA_PARAM_EXP_SHIFT) & ACRY_RSA_PARAM_EXP_MASK) | + ((prop->num_bits << ACRY_RSA_PARAM_MOD_SHIFT) & ACRY_RSA_PARAM_MOD_MASK); + writel(reg, acry->base + ACRY_RSA_PARAM); + + reg = (ACRY_CTX_BUFSZ << ACRY_DMA_DMEM_TADDR_LEN_SHIFT) & ACRY_DMA_DMEM_TADDR_LEN_MASK; + writel(reg, acry->base + ACRY_DMA_DMEM_TADDR); + + reg = (ACRY_RSA_MODE << ACRY_CTRL3_ECC_RSA_MODE_SHIFT) & ACRY_CTRL3_ECC_RSA_MODE_MASK; + writel(reg, acry->base + ACRY_CTRL3); + + writel(ACRY_CTRL1_RSA_DMA | ACRY_CTRL1_RSA_START, acry->base + ACRY_CTRL1); + + /* polling RSA status */ + while (1) { + reg = readl(acry->base + ACRY_RSA_INT_STS); + if ((reg & ACRY_RSA_INT_STS_RSA_READY) && (reg & ACRY_RSA_INT_STS_RSA_CMPLT)) { + writel(reg, ACRY_RSA_INT_STS); + break; + } + udelay(20); + } + + /* grant SRAM access permission to CPU */ + writel(0x0, acry->base + ACRY_CTRL1); + writel(ACRY_CTRL3_SRAM_AHB_ACCESS, acry->base + ACRY_CTRL3); + udelay(20); + + for (i = (prop->num_bits / 8) - 1, j = 0; i >= 0; --i) { + out[i] = readb(acry->sram_base + (j + 32)); + j++; + j = (j % 16) ? j : j + 32; + } + + /* return SRAM access permission to ACRY */ + writel(0, acry->base + ACRY_CTRL3); + + free(ctx); + + return 0; +} + +static int aspeed_acry_probe(struct udevice *dev) +{ + struct aspeed_acry *acry = dev_get_priv(dev); + int ret; + + ret = clk_get_by_index(dev, 0, &acry->clk); + if (ret < 0) { + debug("Can't get clock for %s: %d\n", dev->name, ret); + return ret; + } + + ret = clk_enable(&acry->clk); + if (ret) { + debug("Failed to enable acry clock (%d)\n", ret); + return ret; + } + + acry->base = devfdt_get_addr_index(dev, 0); + if (acry->base == FDT_ADDR_T_NONE) { + debug("Failed to get acry base\n"); + return acry->base; + } + + acry->sram_base = devfdt_get_addr_index(dev, 1); + if (acry->sram_base == FDT_ADDR_T_NONE) { + debug("Failed to get acry SRAM base\n"); + return acry->sram_base; + } + + return ret; +} + +static int aspeed_acry_remove(struct udevice *dev) +{ + struct aspeed_acry *acry = dev_get_priv(dev); + + clk_disable(&acry->clk); + + return 0; +} + +static const struct mod_exp_ops aspeed_acry_ops = { + .mod_exp = aspeed_acry_mod_exp, +}; + +static const struct udevice_id aspeed_acry_ids[] = { + { .compatible = "aspeed,ast2600-acry" }, + { } +}; + +U_BOOT_DRIVER(aspeed_acry) = { + .name = "aspeed_acry", + .id = UCLASS_MOD_EXP, + .of_match = aspeed_acry_ids, + .probe = aspeed_acry_probe, + .remove = aspeed_acry_remove, + .priv_auto = sizeof(struct aspeed_acry), + .ops = &aspeed_acry_ops, + .flags = DM_FLAG_PRE_RELOC, +}; diff --git a/drivers/crypto/aspeed/aspeed_hace.c b/drivers/crypto/aspeed/aspeed_hace.c new file mode 100644 index 0000000000000000000000000000000000000000..1178cc6a76947fbf5d963ef6b3ea9593117a7612 --- /dev/null +++ b/drivers/crypto/aspeed/aspeed_hace.c @@ -0,0 +1,381 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2021 ASPEED Technology Inc. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* register offsets*/ +#define HACE_STS 0x1C +#define HACE_HASH_DATA_OVF BIT(23) +#define HACE_HASH_INT BIT(9) +#define HACE_HASH_BUSY BIT(0) +#define HACE_HASH_DATA 0x20 +#define HACE_HASH_DIGEST 0x24 +#define HACE_HASH_HMAC_KEY 0x28 +#define HACE_HASH_DATA_LEN 0x2C +#define HACE_HASH_CMD 0x30 +#define HACE_HASH_MODE_ACCUM BIT(8) +#define HACE_HASH_ALGO_SHA1 BIT(5) +#define HACE_HASH_ALGO_SHA256 (BIT(6) | BIT(4)) +#define HACE_HASH_ALGO_SHA384 (BIT(10) | BIT(6) | BIT(5)) +#define HACE_HASH_ALGO_SHA512 (BIT(6) | BIT(5)) +#define HACE_HASH_SHA_BE_EN BIT(3) + +/* buffer size based on SHA-512 need*/ +#define HASH_BLOCK_BUFSZ 128 +#define HASH_DIGEST_BUFSZ 64 + +struct aspeed_hace_ctx { + uint8_t digest[HASH_DIGEST_BUFSZ]; + + uint32_t cmd; + enum HASH_ALGO algo; + + uint32_t blk_size; + uint32_t pad_size; + uint64_t total[2]; + + uint8_t buf[HASH_BLOCK_BUFSZ]; + uint32_t buf_cnt; +} __aligned((8)); + +struct aspeed_hace { + phys_addr_t base; + struct clk clk; +}; + +static const uint32_t iv_sha1[8] = { + 0x01234567, 0x89abcdef, 0xfedcba98, 0x76543210, + 0xf0e1d2c3, 0, 0, 0 +}; + +static const uint32_t iv_sha256[8] = { + 0x67e6096a, 0x85ae67bb, 0x72f36e3c, 0x3af54fa5, + 0x7f520e51, 0x8c68059b, 0xabd9831f, 0x19cde05bUL +}; + +static const uint32_t iv_sha384[16] = { + 0x5d9dbbcb, 0xd89e05c1, 0x2a299a62, 0x07d57c36, + 0x5a015991, 0x17dd7030, 0xd8ec2f15, 0x39590ef7, + 0x67263367, 0x310bc0ff, 0x874ab48e, 0x11155868, + 0x0d2e0cdb, 0xa78ff964, 0x1d48b547, 0xa44ffabeUL +}; + +static const uint32_t iv_sha512[16] = { + 0x67e6096a, 0x08c9bcf3, 0x85ae67bb, 0x3ba7ca84, + 0x72f36e3c, 0x2bf894fe, 0x3af54fa5, 0xf1361d5f, + 0x7f520e51, 0xd182e6ad, 0x8c68059b, 0x1f6c3e2b, + 0xabd9831f, 0x6bbd41fb, 0x19cde05b, 0x79217e13UL +}; + +static int aspeed_hace_wait_completion(uint32_t reg, uint32_t flag, int timeout_us) +{ + uint32_t val; + + return readl_poll_timeout(reg, val, (val & flag) == flag, timeout_us); +} + +static int aspeed_hace_process(struct udevice *dev, void *ctx, const void *ibuf, uint32_t ilen) +{ + struct aspeed_hace *hace = dev_get_priv(dev); + struct aspeed_hace_ctx *hace_ctx = (struct aspeed_hace_ctx *)ctx; + uint32_t sts = readl(hace->base + HACE_STS); + + if (sts & HACE_HASH_BUSY) { + debug("HACE engine busy\n"); + return -EBUSY; + } + + writel(HACE_HASH_INT, hace->base + HACE_STS); + + writel((uint32_t)ibuf, hace->base + HACE_HASH_DATA); + writel((uint32_t)hace_ctx->digest, hace->base + HACE_HASH_DIGEST); + writel((uint32_t)hace_ctx->digest, hace->base + HACE_HASH_HMAC_KEY); + writel(ilen, hace->base + HACE_HASH_DATA_LEN); + writel(hace_ctx->cmd, hace->base + HACE_HASH_CMD); + + return aspeed_hace_wait_completion(hace->base + HACE_STS, + HACE_HASH_INT, + 1000 + (ilen >> 3)); +} + +static int aspeed_hace_init(struct udevice *dev, enum HASH_ALGO algo, void **ctxp) +{ + struct aspeed_hace_ctx *hace_ctx; + + hace_ctx = memalign(8, sizeof(struct aspeed_hace_ctx)); + if (!hace_ctx) + return -ENOMEM; + + memset(hace_ctx, 0, sizeof(struct aspeed_hace_ctx)); + + hace_ctx->algo = algo; + hace_ctx->cmd = HACE_HASH_MODE_ACCUM | HACE_HASH_SHA_BE_EN; + + switch (algo) { + case HASH_ALGO_SHA1: + hace_ctx->blk_size = 64; + hace_ctx->pad_size = 8; + hace_ctx->cmd |= HACE_HASH_ALGO_SHA1; + memcpy(hace_ctx->digest, iv_sha1, sizeof(iv_sha1)); + break; + case HASH_ALGO_SHA256: + hace_ctx->blk_size = 64; + hace_ctx->pad_size = 8; + hace_ctx->cmd |= HACE_HASH_ALGO_SHA256; + memcpy(hace_ctx->digest, iv_sha256, sizeof(iv_sha256)); + break; + case HASH_ALGO_SHA384: + hace_ctx->blk_size = 128; + hace_ctx->pad_size = 16; + hace_ctx->cmd |= HACE_HASH_ALGO_SHA384; + memcpy(hace_ctx->digest, iv_sha384, sizeof(iv_sha384)); + break; + case HASH_ALGO_SHA512: + hace_ctx->blk_size = 128; + hace_ctx->pad_size = 16; + hace_ctx->cmd |= HACE_HASH_ALGO_SHA512; + memcpy(hace_ctx->digest, iv_sha512, sizeof(iv_sha512)); + break; + default: + debug("Unsupported hash algorithm '%s'\n", hash_algo_name(algo)); + goto free_n_out; + }; + + *ctxp = hace_ctx; + + return 0; + +free_n_out: + free(hace_ctx); + + return -EINVAL; +} + +static int aspeed_hace_update(struct udevice *dev, void *ctx, const void *ibuf, uint32_t ilen) +{ + int rc; + uint32_t left, fill; + struct aspeed_hace_ctx *hace_ctx = ctx; + + left = hace_ctx->total[0] & (hace_ctx->blk_size - 1); + fill = hace_ctx->blk_size - left; + + hace_ctx->total[0] += ilen; + if (hace_ctx->total[0] < ilen) + hace_ctx->total[1]++; + + if (left && ilen >= fill) { + memcpy(hace_ctx->buf + left, ibuf, fill); + rc = aspeed_hace_process(dev, ctx, hace_ctx->buf, hace_ctx->blk_size); + if (rc) { + debug("failed to process hash, rc=%d\n", rc); + return rc; + } + ilen -= fill; + ibuf += fill; + left = 0; + } + + while (ilen >= hace_ctx->blk_size) { + rc = aspeed_hace_process(dev, ctx, ibuf, hace_ctx->blk_size); + if (rc) { + debug("failed to process hash, rc=%d\n", rc); + return rc; + } + + ibuf += hace_ctx->blk_size; + ilen -= hace_ctx->blk_size; + } + + if (ilen) + memcpy(hace_ctx->buf + left, ibuf, ilen); + + return 0; +} + +static int aspeed_hace_finish(struct udevice *dev, void *ctx, void *obuf) +{ + int rc = 0; + uint8_t pad[HASH_BLOCK_BUFSZ * 2]; + uint32_t last, padn; + uint64_t ibits_h, ibits_l; + uint64_t ibits_be_h, ibits_be_l; + struct aspeed_hace_ctx *hace_ctx = ctx; + + memset(pad, 0, sizeof(pad)); + pad[0] = 0x80; + + ibits_h = (hace_ctx->total[0] >> 61) | (hace_ctx->total[1] << 3); + ibits_be_h = cpu_to_be64(ibits_h); + + ibits_l = (hace_ctx->total[0] << 3); + ibits_be_l = cpu_to_be64(ibits_l); + + last = hace_ctx->total[0] & (hace_ctx->blk_size - 1); + + switch (hace_ctx->algo) { + case HASH_ALGO_SHA1: + case HASH_ALGO_SHA256: + padn = (last < 56) ? (56 - last) : (120 - last); + + rc = aspeed_hace_update(dev, ctx, pad, padn); + if (rc) { + debug("failed to append padding, rc=%d\n", rc); + goto free_n_out; + } + + rc = aspeed_hace_update(dev, ctx, &ibits_be_l, sizeof(ibits_be_l)); + if (rc) { + debug("failed to append message bits length, rc=%d\n", rc); + goto free_n_out; + } + + break; + case HASH_ALGO_SHA384: + case HASH_ALGO_SHA512: + padn = (last < 112) ? (112 - last) : (240 - last); + + rc = aspeed_hace_update(dev, ctx, pad, padn); + if (rc) { + debug("failed to append padding, rc=%d\n", rc); + goto free_n_out; + } + + rc = aspeed_hace_update(dev, ctx, &ibits_be_h, sizeof(ibits_be_h)) | + aspeed_hace_update(dev, ctx, &ibits_be_l, sizeof(ibits_be_l)); + if (rc) { + debug("failed to append message bits length, rc=%d\n", rc); + goto free_n_out; + } + + break; + default: + rc = -EINVAL; + break; + } + + memcpy(obuf, hace_ctx->digest, hash_algo_digest_size(hace_ctx->algo)); + +free_n_out: + free(ctx); + + return rc; +} + +static int aspeed_hace_digest_wd(struct udevice *dev, enum HASH_ALGO algo, + const void *ibuf, const uint32_t ilen, + void *obuf, uint32_t chunk_sz) +{ + int rc; + void *ctx; + const void *cur, *end; + uint32_t chunk; + + rc = aspeed_hace_init(dev, algo, &ctx); + if (rc) + return rc; + + if (CONFIG_IS_ENABLED(HW_WATCHDOG) || CONFIG_IS_ENABLED(WATCHDOG)) { + cur = ibuf; + end = ibuf + ilen; + + while (cur < end) { + chunk = end - cur; + if (chunk > chunk_sz) + chunk = chunk_sz; + + rc = aspeed_hace_update(dev, ctx, cur, chunk); + if (rc) + return rc; + + cur += chunk; + WATCHDOG_RESET(); + } + } else { + rc = aspeed_hace_update(dev, ctx, ibuf, ilen); + if (rc) + return rc; + } + + rc = aspeed_hace_finish(dev, ctx, obuf); + if (rc) + return rc; + + return 0; +} + +static int aspeed_hace_digest(struct udevice *dev, enum HASH_ALGO algo, + const void *ibuf, const uint32_t ilen, + void *obuf) +{ + /* re-use the watchdog version with input length as the chunk_sz */ + return aspeed_hace_digest_wd(dev, algo, ibuf, ilen, obuf, ilen); +} + +static int aspeed_hace_probe(struct udevice *dev) +{ + int rc; + struct aspeed_hace *hace = dev_get_priv(dev); + + rc = clk_get_by_index(dev, 0, &hace->clk); + if (rc < 0) { + debug("cannot get clock for %s: %d\n", dev->name, rc); + return rc; + } + + rc = clk_enable(&hace->clk); + if (rc) { + debug("cannot enable clock for %s: %d\n", dev->name, rc); + return rc; + } + + hace->base = devfdt_get_addr(dev); + + return rc; +} + +static int aspeed_hace_remove(struct udevice *dev) +{ + struct aspeed_hace *hace = dev_get_priv(dev); + + clk_disable(&hace->clk); + + return 0; +} + +static const struct hash_ops aspeed_hace_ops = { + .hash_init = aspeed_hace_init, + .hash_update = aspeed_hace_update, + .hash_finish = aspeed_hace_finish, + .hash_digest_wd = aspeed_hace_digest_wd, + .hash_digest = aspeed_hace_digest, +}; + +static const struct udevice_id aspeed_hace_ids[] = { + { .compatible = "aspeed,ast2600-hace" }, + { } +}; + +U_BOOT_DRIVER(aspeed_hace) = { + .name = "aspeed_hace", + .id = UCLASS_HASH, + .of_match = aspeed_hace_ids, + .ops = &aspeed_hace_ops, + .probe = aspeed_hace_probe, + .remove = aspeed_hace_remove, + .priv_auto = sizeof(struct aspeed_hace), + .flags = DM_FLAG_PRE_RELOC, +}; diff --git a/drivers/crypto/hash/Kconfig b/drivers/crypto/hash/Kconfig index cd29a5c6a4f39c69e03b26825f0db15faf13e7ee..bf9540eca67d785d4a694b5245b34cfc0a2aa3bd 100644 --- a/drivers/crypto/hash/Kconfig +++ b/drivers/crypto/hash/Kconfig @@ -14,3 +14,11 @@ config HASH_SOFTWARE help Enable driver for hashing operations in software. Currently it support multiple hash algorithm including CRC/MD5/SHA. + +config HASH_ASPEED + bool "Enable Hash with ASPEED hash accelerator" + depends on DM_HASH + select ASPEED_HACE + help + Enable this to support HW-assisted hashing operations using ASPEED Hash + and Crypto engine - HACE diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig index fe3d6fc9700e922b3196512ba6f78d7b55b16493..b0e6df8be4124e7f181a605adc7330ad0095321a 100644 --- a/drivers/ddr/fsl/Kconfig +++ b/drivers/ddr/fsl/Kconfig @@ -163,6 +163,98 @@ config ECC_INIT_VIA_DDRCONTROLLER endif +menu "PowerPC / M68K initial memory controller definitions (FLASH, SDRAM, etc)" + depends on MCF52x2 || MPC8xx || MPC83xx || MPC85xx + +config SYS_BR0_PRELIM_BOOL + bool "Define Bank 0" + +config SYS_BR0_PRELIM + hex "Preliminary value for BR0" + depends on SYS_BR0_PRELIM_BOOL + +config SYS_OR0_PRELIM + hex "Preliminary value for OR0" + depends on SYS_BR0_PRELIM_BOOL + +config SYS_BR1_PRELIM_BOOL + bool "Define Bank 1" + +config SYS_BR1_PRELIM + hex "Preliminary value for BR1" + depends on SYS_BR1_PRELIM_BOOL + +config SYS_OR1_PRELIM + hex "Preliminary value for OR1" + depends on SYS_BR1_PRELIM_BOOL + +config SYS_BR2_PRELIM_BOOL + bool "Define Bank 2" + +config SYS_BR2_PRELIM + hex "Preliminary value for BR2" + depends on SYS_BR2_PRELIM_BOOL + +config SYS_OR2_PRELIM + hex "Preliminary value for OR2" + depends on SYS_BR2_PRELIM_BOOL + +config SYS_BR3_PRELIM_BOOL + bool "Define Bank 3" + +config SYS_BR3_PRELIM + hex "Preliminary value for BR3" + depends on SYS_BR3_PRELIM_BOOL + +config SYS_OR3_PRELIM + hex "Preliminary value for OR3" + depends on SYS_BR3_PRELIM_BOOL + +config SYS_BR4_PRELIM_BOOL + bool "Define Bank 4" + +config SYS_BR4_PRELIM + hex "Preliminary value for BR4" + depends on SYS_BR4_PRELIM_BOOL + +config SYS_OR4_PRELIM + hex "Preliminary value for OR4" + depends on SYS_BR4_PRELIM_BOOL + +config SYS_BR5_PRELIM_BOOL + bool "Define Bank 5" + +config SYS_BR5_PRELIM + hex "Preliminary value for BR5" + depends on SYS_BR5_PRELIM_BOOL + +config SYS_OR5_PRELIM + hex "Preliminary value for OR5" + depends on SYS_BR5_PRELIM_BOOL + +config SYS_BR6_PRELIM_BOOL + bool "Define Bank 6" + +config SYS_BR6_PRELIM + hex "Preliminary value for BR6" + depends on SYS_BR6_PRELIM_BOOL + +config SYS_OR6_PRELIM + hex "Preliminary value for OR6" + depends on SYS_BR6_PRELIM_BOOL + +config SYS_BR7_PRELIM_BOOL + bool "Define Bank 7" + +config SYS_BR7_PRELIM + hex "Preliminary value for BR7" + depends on SYS_BR7_PRELIM_BOOL + +config SYS_OR7_PRELIM + hex "Preliminary value for OR7" + depends on SYS_BR7_PRELIM_BOOL +endmenu + config SYS_FSL_ERRATUM_A008378 bool diff --git a/drivers/ddr/marvell/axp/ddr3_hw_training.h b/drivers/ddr/marvell/axp/ddr3_hw_training.h index 30daaa9831b9402d3aaea242d297628a95f3267f..fcdef792c76a6b6e42242e2019dcf290d8e34035 100644 --- a/drivers/ddr/marvell/axp/ddr3_hw_training.h +++ b/drivers/ddr/marvell/axp/ddr3_hw_training.h @@ -373,7 +373,6 @@ int ddr3_load_dqs_patterns(MV_DRAM_INFO *dram_info); void ddr3_static_training_init(void); -u8 ddr3_get_eprom_fabric(void); void ddr3_set_performance_params(MV_DRAM_INFO *dram_info); int ddr3_dram_sram_burst(u32 src, u32 dst, u32 len); void ddr3_save_training(MV_DRAM_INFO *dram_info); diff --git a/drivers/ddr/marvell/axp/ddr3_init.c b/drivers/ddr/marvell/axp/ddr3_init.c index 607f3e12c3aece61f2339c32bc27caa78dd9caa3..a9dcb74cecb74adcad1b100db15dc06751e077da 100644 --- a/drivers/ddr/marvell/axp/ddr3_init.c +++ b/drivers/ddr/marvell/axp/ddr3_init.c @@ -361,12 +361,18 @@ static u32 ddr3_init_main(void) __maybe_unused u32 ddr_width = BUS_WIDTH; __maybe_unused int status; __maybe_unused u32 win_backup[16]; + __maybe_unused struct udevice *udev; + __maybe_unused int ret; /* SoC/Board special Initializtions */ fab_opt = ddr3_get_fab_opt(); #ifdef CONFIG_SPD_EEPROM - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + ret = i2c_get_chip_for_busnum(0, BUS_WIDTH_ECC_TWSI_ADDR, 1, &udev); + if (ret) { + printf("Cannot find SPD EEPROM\n"); + return MV_DDR3_TRAINING_ERR_BAD_DIMM_SETUP; + } #endif ddr3_print_version(); @@ -438,7 +444,7 @@ static u32 ddr3_init_main(void) #if defined(ECC_SUPPORT) && defined(AUTO_DETECTION_SUPPORT) ecc = 0; - if (ddr3_check_config(BUS_WIDTH_ECC_TWSI_ADDR, CONFIG_ECC)) + if (ddr3_check_config(udev, CONFIG_ECC)) ecc = 1; #endif @@ -483,7 +489,7 @@ static u32 ddr3_init_main(void) * Dynamically Set 32Bit and ECC for AXP (Relevant only for * Marvell DB boards) */ - if (ddr3_check_config(BUS_WIDTH_ECC_TWSI_ADDR, CONFIG_BUS_WIDTH)) { + if (ddr3_check_config(udev, CONFIG_BUS_WIDTH)) { ddr_width = 32; DEBUG_INIT_S("DDR3 Training Sequence - DRAM bus width 32Bit\n"); } @@ -904,7 +910,7 @@ void ddr3_static_mc_init(void) * Notes: Only Available for ArmadaXP/Armada 370 DB boards * Returns: None. */ -int ddr3_check_config(u32 twsi_addr, MV_CONFIG_TYPE config_type) +int ddr3_check_config(struct udevice *udev, MV_CONFIG_TYPE config_type) { #ifdef AUTO_DETECTION_SUPPORT u8 data = 0; @@ -916,7 +922,7 @@ int ddr3_check_config(u32 twsi_addr, MV_CONFIG_TYPE config_type) else offset = 0; - ret = i2c_read(twsi_addr, offset, 1, (u8 *)&data, 1); + ret = dm_i2c_read(udev, offset, &data, 1); if (!ret) { switch (config_type) { case CONFIG_ECC: @@ -943,30 +949,6 @@ int ddr3_check_config(u32 twsi_addr, MV_CONFIG_TYPE config_type) return 0; } -#if defined(DB_88F78X60_REV2) -/* - * Name: ddr3_get_eprom_fabric - Get Fabric configuration from EPROM - * Desc: - * Args: twsi Address - * Notes: Only Available for ArmadaXP DB Rev2 boards - * Returns: None. - */ -u8 ddr3_get_eprom_fabric(void) -{ -#ifdef AUTO_DETECTION_SUPPORT - u8 data = 0; - int ret; - - ret = i2c_read(NEW_FABRIC_TWSI_ADDR, 1, 1, (u8 *)&data, 1); - if (!ret) - return data & 0x1F; -#endif - - return 0; -} - -#endif - /* * Name: ddr3_cl_to_valid_cl - this return register matching CL value * Desc: diff --git a/drivers/ddr/marvell/axp/ddr3_init.h b/drivers/ddr/marvell/axp/ddr3_init.h index 569a14b7184f7097fc068a3ad1fe786be3807b0e..a26bd2a120e9694df2b113386ca91c4e8116b151 100644 --- a/drivers/ddr/marvell/axp/ddr3_init.h +++ b/drivers/ddr/marvell/axp/ddr3_init.h @@ -98,11 +98,10 @@ int ddr3_hw_training(u32 target_freq, u32 ddr_width, void ddr3_print_version(void); void fix_pll_val(u8 target_fab); -u8 ddr3_get_eprom_fabric(void); u32 ddr3_get_fab_opt(void); u32 ddr3_get_cpu_freq(void); u32 ddr3_get_vco_freq(void); -int ddr3_check_config(u32 addr, MV_CONFIG_TYPE config_type); +int ddr3_check_config(struct udevice *udev, MV_CONFIG_TYPE config_type); u32 ddr3_get_static_mc_value(u32 reg_addr, u32 offset1, u32 mask1, u32 offset2, u32 mask2); u32 ddr3_cl_to_valid_cl(u32 cl); diff --git a/drivers/ddr/marvell/axp/ddr3_spd.c b/drivers/ddr/marvell/axp/ddr3_spd.c index dd772e63ab19303efbfd2db8b2abbf0572e116fc..4763403c127886bcbae83a66811b638360418d2c 100644 --- a/drivers/ddr/marvell/axp/ddr3_spd.c +++ b/drivers/ddr/marvell/axp/ddr3_spd.c @@ -209,13 +209,19 @@ static u32 ddr3_get_dimm_num(u32 *dimm_addr) /* Read the dimm eeprom */ for (dimm_cur_addr = MAX_DIMM_ADDR; dimm_cur_addr > MIN_DIMM_ADDR; dimm_cur_addr--) { + struct udevice *udev; + data[SPD_DEV_TYPE_BYTE] = 0; /* Far-End DIMM must be connected */ if ((dimm_num == 0) && (dimm_cur_addr < FAR_END_DIMM_ADDR)) return 0; - ret = i2c_read(dimm_cur_addr, 0, 1, (uchar *)data, 3); + ret = i2c_get_chip_for_busnum(0, dimm_cur_addr, 1, &udev); + if (ret) + continue; + + ret = dm_i2c_read(udev, 0, data, 3); if (!ret) { if (data[SPD_DEV_TYPE_BYTE] == SPD_MEM_TYPE_DDR3) { dimm_addr[dimm_num] = dimm_cur_addr; @@ -245,9 +251,15 @@ int ddr3_spd_init(MV_DIMM_INFO *info, u32 dimm_addr, u32 dimm_width) __maybe_unused u8 vendor_high, vendor_low; if (dimm_addr != 0) { + struct udevice *udev; + memset(spd_data, 0, SPD_SIZE * sizeof(u8)); - ret = i2c_read(dimm_addr, 0, 1, (uchar *)spd_data, SPD_SIZE); + ret = i2c_get_chip_for_busnum(0, dimm_addr, 1, &udev); + if (ret) + return MV_DDR3_TRAINING_ERR_TWSI_FAIL; + + ret = dm_i2c_read(udev, 0, spd_data, SPD_SIZE); if (ret) return MV_DDR3_TRAINING_ERR_TWSI_FAIL; } diff --git a/drivers/firmware/scmi/Kconfig b/drivers/firmware/scmi/Kconfig index c3a109beac713d4a4ce56be1d11525fb12192985..8cf85f0d7a12c9e58dc249539727081ec25dd7b3 100644 --- a/drivers/firmware/scmi/Kconfig +++ b/drivers/firmware/scmi/Kconfig @@ -2,7 +2,7 @@ config SCMI_FIRMWARE bool "Enable SCMI support" select FIRMWARE select OF_TRANSLATE - depends on SANDBOX || DM_MAILBOX || ARM_SMCCC + depends on SANDBOX || DM_MAILBOX || ARM_SMCCC || OPTEE help System Control and Management Interface (SCMI) is a communication protocol that defines standard interfaces for power, performance @@ -14,6 +14,30 @@ config SCMI_FIRMWARE or a companion host in the CPU system. Communications between agent (client) and the SCMI server are - based on message exchange. Messages can be exchange over tranport + based on message exchange. Messages can be exchanged over transport channels as a mailbox device or an Arm SMCCC service with some piece of identified shared memory. + +config SCMI_AGENT_MAILBOX + bool "Enable SCMI agent mailbox" + depends on SCMI_FIRMWARE && DM_MAILBOX + default y + help + Enable the SCMI communication channel based on mailbox + for compatible "arm,scmi". + +config SCMI_AGENT_SMCCC + bool "Enable SCMI agent SMCCC" + depends on SCMI_FIRMWARE && ARM_SMCCC + default y + help + Enable the SCMI communication channel based on Arm SMCCC service for + compatible "arm,scmi-smc". + +config SCMI_AGENT_OPTEE + bool "Enable SCMI agent OP-TEE" + depends on SCMI_FIRMWARE && OPTEE + default y + help + Enable the SCMI communication channel based on OP-TEE transport + for compatible "linaro,scmi-optee". diff --git a/drivers/firmware/scmi/Makefile b/drivers/firmware/scmi/Makefile index 966475ec10af0657ef83903660a4c54eccc2a795..b2ff483c75a10a87ce1ae4a93e5afb2a22d8fc15 100644 --- a/drivers/firmware/scmi/Makefile +++ b/drivers/firmware/scmi/Makefile @@ -1,5 +1,6 @@ obj-y += scmi_agent-uclass.o obj-y += smt.o -obj-$(CONFIG_ARM_SMCCC) += smccc_agent.o -obj-$(CONFIG_DM_MAILBOX) += mailbox_agent.o +obj-$(CONFIG_SCMI_AGENT_SMCCC) += smccc_agent.o +obj-$(CONFIG_SCMI_AGENT_MAILBOX) += mailbox_agent.o +obj-$(CONFIG_SCMI_AGENT_OPTEE) += optee_agent.o obj-$(CONFIG_SANDBOX) += sandbox-scmi_agent.o sandbox-scmi_devices.o diff --git a/drivers/firmware/scmi/mailbox_agent.c b/drivers/firmware/scmi/mailbox_agent.c index ea35e7e09edcbd1b18374af042169222cd41188a..8e4af0c8faf08e06a7f903a624d33858eee12069 100644 --- a/drivers/firmware/scmi/mailbox_agent.c +++ b/drivers/firmware/scmi/mailbox_agent.c @@ -33,7 +33,7 @@ struct scmi_mbox_channel { static int scmi_mbox_process_msg(struct udevice *dev, struct scmi_msg *msg) { - struct scmi_mbox_channel *chan = dev_get_priv(dev); + struct scmi_mbox_channel *chan = dev_get_plat(dev); int ret; ret = scmi_write_msg_to_smt(dev, &chan->smt, msg); @@ -62,9 +62,9 @@ out: return ret; } -int scmi_mbox_probe(struct udevice *dev) +int scmi_mbox_of_to_plat(struct udevice *dev) { - struct scmi_mbox_channel *chan = dev_get_priv(dev); + struct scmi_mbox_channel *chan = dev_get_plat(dev); int ret; chan->timeout_us = TIMEOUT_US_10MS; @@ -72,17 +72,13 @@ int scmi_mbox_probe(struct udevice *dev) ret = mbox_get_by_index(dev, 0, &chan->mbox); if (ret) { dev_err(dev, "Failed to find mailbox: %d\n", ret); - goto out; + return ret; } ret = scmi_dt_get_smt_buffer(dev, &chan->smt); if (ret) dev_err(dev, "Failed to get shm resources: %d\n", ret); -out: - if (ret) - devm_kfree(dev, chan); - return ret; } @@ -99,7 +95,7 @@ U_BOOT_DRIVER(scmi_mbox) = { .name = "scmi-over-mailbox", .id = UCLASS_SCMI_AGENT, .of_match = scmi_mbox_ids, - .priv_auto = sizeof(struct scmi_mbox_channel), - .probe = scmi_mbox_probe, + .plat_auto = sizeof(struct scmi_mbox_channel), + .of_to_plat = scmi_mbox_of_to_plat, .ops = &scmi_mbox_ops, }; diff --git a/drivers/firmware/scmi/optee_agent.c b/drivers/firmware/scmi/optee_agent.c new file mode 100644 index 0000000000000000000000000000000000000000..1f2659223434a3c0db58c043a519ad85ccc8534f --- /dev/null +++ b/drivers/firmware/scmi/optee_agent.c @@ -0,0 +1,312 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020-2021 Linaro Limited. + */ + +#define LOG_CATEGORY UCLASS_SCMI_AGENT + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "smt.h" + +#define SCMI_SHM_SIZE 128 + +/** + * struct scmi_optee_channel - Description of an SCMI OP-TEE transport + * @channel_id: Channel identifier + * @smt: Shared memory buffer with synchronisation protocol + * @dyn_shm: True if using dynamically allocated shared memory + */ +struct scmi_optee_channel { + unsigned int channel_id; + struct scmi_smt smt; + bool dyn_shm; +}; + +/** + * struct channel_session - Aggreates SCMI service session context references + * @tee: OP-TEE device to invoke + * @tee_session: OP-TEE session identifier + * @tee_shm: Dynamically allocated OP-TEE shared memory, or NULL + * @channel_hdl: Channel handle provided by OP-TEE SCMI service + */ +struct channel_session { + struct udevice *tee; + u32 tee_session; + struct tee_shm *tee_shm; + u32 channel_hdl; +}; + +#define TA_SCMI_UUID { 0xa8cfe406, 0xd4f5, 0x4a2e, \ + { 0x9f, 0x8d, 0xa2, 0x5d, 0xc7, 0x54, 0xc0, 0x99 } } + +enum optee_smci_pta_cmd { + /* + * PTA_SCMI_CMD_CAPABILITIES - Get channel capabilities + * + * [out] value[0].a: Capability bit mask (enum pta_scmi_caps) + * [out] value[0].b: Extended capabilities or 0 + */ + PTA_SCMI_CMD_CAPABILITIES = 0, + + /* + * PTA_SCMI_CMD_PROCESS_SMT_CHANNEL - Process SCMI message in SMT buffer + * + * [in] value[0].a: Channel handle + * + * Shared memory used for SCMI message/response exhange is expected + * already identified and bound to channel handle in both SCMI agent + * and SCMI server (OP-TEE) parts. + * The memory uses SMT header to carry SCMI meta-data (protocol ID and + * protocol message ID). + */ + PTA_SCMI_CMD_PROCESS_SMT_CHANNEL = 1, + + /* + * PTA_SCMI_CMD_PROCESS_SMT_CHANNEL_MESSAGE - Process SMT/SCMI message + * + * [in] value[0].a: Channel handle + * [in/out] memref[1]: Message/response buffer (SMT and SCMI payload) + * + * Shared memory used for SCMI message/response is a SMT buffer + * referenced by param[1]. It shall be 128 bytes large to fit response + * payload whatever message playload size. + * The memory uses SMT header to carry SCMI meta-data (protocol ID and + * protocol message ID). + */ + PTA_SCMI_CMD_PROCESS_SMT_CHANNEL_MESSAGE = 2, + + /* + * PTA_SCMI_CMD_GET_CHANNEL - Get channel handle + * + * SCMI shm information are 0 if agent expects to use OP-TEE regular SHM + * + * [in] value[0].a: Channel identifier + * [out] value[0].a: Returned channel handle + * [in] value[0].b: Requested capabilities mask (enum pta_scmi_caps) + */ + PTA_SCMI_CMD_GET_CHANNEL = 3, +}; + +/* + * OP-TEE SCMI service capabilities bit flags (32bit) + * + * PTA_SCMI_CAPS_SMT_HEADER + * When set, OP-TEE supports command using SMT header protocol (SCMI shmem) in + * shared memory buffers to carry SCMI protocol synchronisation information. + */ +#define PTA_SCMI_CAPS_NONE 0 +#define PTA_SCMI_CAPS_SMT_HEADER BIT(0) + +static int open_channel(struct udevice *dev, struct channel_session *sess) +{ + const struct tee_optee_ta_uuid uuid = TA_SCMI_UUID; + struct scmi_optee_channel *chan = dev_get_plat(dev); + struct tee_open_session_arg sess_arg = { }; + struct tee_invoke_arg cmd_arg = { }; + struct tee_param param[1] = { }; + int ret; + + memset(sess, 0, sizeof(sess)); + + sess->tee = tee_find_device(NULL, NULL, NULL, NULL); + if (!sess->tee) + return -ENODEV; + + sess_arg.clnt_login = TEE_LOGIN_REE_KERNEL; + tee_optee_ta_uuid_to_octets(sess_arg.uuid, &uuid); + + ret = tee_open_session(sess->tee, &sess_arg, 0, NULL); + if (ret) { + dev_err(dev, "can't open session: %d\n", ret); + return ret; + } + + cmd_arg.func = PTA_SCMI_CMD_GET_CHANNEL; + cmd_arg.session = sess_arg.session; + + param[0].attr = TEE_PARAM_ATTR_TYPE_VALUE_INOUT; + param[0].u.value.a = chan->channel_id; + param[0].u.value.b = PTA_SCMI_CAPS_SMT_HEADER; + + ret = tee_invoke_func(sess->tee, &cmd_arg, ARRAY_SIZE(param), param); + if (ret || cmd_arg.ret) { + dev_err(dev, "Invoke failed: %d, 0x%x\n", ret, cmd_arg.ret); + if (!ret) + ret = -EPROTO; + + tee_close_session(sess->tee, sess_arg.session); + return ret; + } + + sess->tee_session = sess_arg.session; + sess->channel_hdl = param[0].u.value.a; + + return 0; +} + +static void close_channel(struct channel_session *sess) +{ + tee_close_session(sess->tee, sess->tee_session); +} + +static int invoke_cmd(struct udevice *dev, struct channel_session *sess, + struct scmi_msg *msg) +{ + struct scmi_optee_channel *chan = dev_get_plat(dev); + struct tee_invoke_arg arg = { }; + struct tee_param param[2] = { }; + int ret; + + scmi_write_msg_to_smt(dev, &chan->smt, msg); + + arg.session = sess->tee_session; + param[0].attr = TEE_PARAM_ATTR_TYPE_VALUE_INPUT; + param[0].u.value.a = sess->channel_hdl; + + if (chan->dyn_shm) { + arg.func = PTA_SCMI_CMD_PROCESS_SMT_CHANNEL_MESSAGE; + param[1].attr = TEE_PARAM_ATTR_TYPE_MEMREF_INOUT; + param[1].u.memref.shm = sess->tee_shm; + param[1].u.memref.size = SCMI_SHM_SIZE; + } else { + arg.func = PTA_SCMI_CMD_PROCESS_SMT_CHANNEL; + } + + ret = tee_invoke_func(sess->tee, &arg, ARRAY_SIZE(param), param); + if (ret || arg.ret) { + if (!ret) + ret = -EPROTO; + } else { + ret = scmi_read_resp_from_smt(dev, &chan->smt, msg); + } + + scmi_clear_smt_channel(&chan->smt); + + return ret; +} + +static int prepare_shm(struct udevice *dev, struct channel_session *sess) +{ + struct scmi_optee_channel *chan = dev_get_plat(dev); + int ret; + + /* Static shm is already prepared by the firmware: nothing to do */ + if (!chan->dyn_shm) + return 0; + + chan->smt.size = SCMI_SHM_SIZE; + + ret = tee_shm_alloc(sess->tee, chan->smt.size, 0, &sess->tee_shm); + if (ret) { + dev_err(dev, "Failed to allocated shmem: %d\n", ret); + return ret; + } + + chan->smt.buf = sess->tee_shm->addr; + + /* Initialize shm buffer for message exchanges */ + scmi_clear_smt_channel(&chan->smt); + + return 0; +} + +static void release_shm(struct udevice *dev, struct channel_session *sess) +{ + struct scmi_optee_channel *chan = dev_get_plat(dev); + + if (chan->dyn_shm) + tee_shm_free(sess->tee_shm); +} + +static int scmi_optee_process_msg(struct udevice *dev, struct scmi_msg *msg) +{ + struct channel_session sess; + int ret; + + ret = open_channel(dev, &sess); + if (ret) + return ret; + + ret = prepare_shm(dev, &sess); + if (ret) + goto out; + + ret = invoke_cmd(dev, &sess, msg); + + release_shm(dev, &sess); + +out: + close_channel(&sess); + + return ret; +} + +static int scmi_optee_of_to_plat(struct udevice *dev) +{ + struct scmi_optee_channel *chan = dev_get_plat(dev); + int ret; + + if (dev_read_u32(dev, "linaro,optee-channel-id", &chan->channel_id)) { + dev_err(dev, "Missing property linaro,optee-channel-id\n"); + return -EINVAL; + } + + if (dev_read_prop(dev, "shmem", NULL)) { + ret = scmi_dt_get_smt_buffer(dev, &chan->smt); + if (ret) { + dev_err(dev, "Failed to get smt resources: %d\n", ret); + return ret; + } + chan->dyn_shm = false; + } else { + chan->dyn_shm = true; + } + + return 0; +} + +static int scmi_optee_probe(struct udevice *dev) +{ + struct channel_session sess; + int ret; + + /* Check OP-TEE service acknowledges the SCMI channel */ + ret = open_channel(dev, &sess); + if (!ret) + close_channel(&sess); + + return ret; +} + +static const struct udevice_id scmi_optee_ids[] = { + { .compatible = "linaro,scmi-optee" }, + { } +}; + +static const struct scmi_agent_ops scmi_optee_ops = { + .process_msg = scmi_optee_process_msg, +}; + +U_BOOT_DRIVER(scmi_optee) = { + .name = "scmi-over-optee", + .id = UCLASS_SCMI_AGENT, + .of_match = scmi_optee_ids, + .plat_auto = sizeof(struct scmi_optee_channel), + .of_to_plat = scmi_optee_of_to_plat, + .probe = scmi_optee_probe, + .flags = DM_FLAG_OS_PREPARE, + .ops = &scmi_optee_ops, +}; diff --git a/drivers/firmware/scmi/smccc_agent.c b/drivers/firmware/scmi/smccc_agent.c index f185891e8fd876e0e7eb985629caf6acf513d9a4..5e166ca93ee1f4dd332f623800e2278a826b715b 100644 --- a/drivers/firmware/scmi/smccc_agent.c +++ b/drivers/firmware/scmi/smccc_agent.c @@ -32,7 +32,7 @@ struct scmi_smccc_channel { static int scmi_smccc_process_msg(struct udevice *dev, struct scmi_msg *msg) { - struct scmi_smccc_channel *chan = dev_get_priv(dev); + struct scmi_smccc_channel *chan = dev_get_plat(dev); struct arm_smccc_res res; int ret; @@ -51,9 +51,9 @@ static int scmi_smccc_process_msg(struct udevice *dev, struct scmi_msg *msg) return ret; } -static int scmi_smccc_probe(struct udevice *dev) +static int scmi_smccc_of_to_plat(struct udevice *dev) { - struct scmi_smccc_channel *chan = dev_get_priv(dev); + struct scmi_smccc_channel *chan = dev_get_plat(dev); u32 func_id; int ret; @@ -65,12 +65,10 @@ static int scmi_smccc_probe(struct udevice *dev) chan->func_id = func_id; ret = scmi_dt_get_smt_buffer(dev, &chan->smt); - if (ret) { + if (ret) dev_err(dev, "Failed to get smt resources: %d\n", ret); - return ret; - } - return 0; + return ret; } static const struct udevice_id scmi_smccc_ids[] = { @@ -86,7 +84,7 @@ U_BOOT_DRIVER(scmi_smccc) = { .name = "scmi-over-smccc", .id = UCLASS_SCMI_AGENT, .of_match = scmi_smccc_ids, - .priv_auto = sizeof(struct scmi_smccc_channel), - .probe = scmi_smccc_probe, + .plat_auto = sizeof(struct scmi_smccc_channel), + .of_to_plat = scmi_smccc_of_to_plat, .ops = &scmi_smccc_ops, }; diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 40abc33772eb0a174d652ee806119a23bed37e17..b41a755fc7586ed1821542b8dd72ac3a9c3d873b 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -177,6 +177,11 @@ config HSDK_CREG_GPIO help This driver supports CREG GPIOs on Synopsys HSDK SOC. +config KIRKWOOD_GPIO + bool "Kirkwood GPIO driver" + help + This drdiver supports GPIOs on Kirkwood platforms + config LPC32XX_GPIO bool "LPC32XX GPIO driver" depends on DM diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c index eafd801cdc3af047750fb4d8d489e04d6df041b7..9a3c8241bc64f01550f4d75e846accff191881f4 100644 --- a/drivers/i2c/fsl_i2c.c +++ b/drivers/i2c/fsl_i2c.c @@ -40,6 +40,10 @@ DECLARE_GLOBAL_DATA_PTR; +#ifdef CONFIG_M68K +#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR +#endif + #if !CONFIG_IS_ENABLED(DM_I2C) static const struct fsl_i2c_base *i2c_base[4] = { (struct fsl_i2c_base *)(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_I2C_OFFSET), diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig index a17e55e9972104e4d1d0f4637eacb1fb4067ea96..0b753f37bf49adfd8425a750b6ce861cd8c581e7 100644 --- a/drivers/input/Kconfig +++ b/drivers/input/Kconfig @@ -38,6 +38,15 @@ config TPL_DM_KEYBOARD includes methods to start/stop the device, check for available input and update LEDs if the keyboard has them. +config KEYBOARD + bool "Enable legacy keyboard support (deprecated)" + help + Enable this to enable a custom keyboard support. + This simply calls drv_keyboard_init() which must be + defined in your board-specific files. This option is deprecated + and is only used by novena. For new boards, use driver model + instead. + config CROS_EC_KEYB bool "Enable Chrome OS EC keyboard support" depends on INPUT diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 3bae072005839690123a1bdd34f8ebbd6d1b8b5a..a8baaeaf5cfe6bfb045ab664da7c8a35c9045acd 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -416,7 +416,7 @@ if I2C_EEPROM config SYS_I2C_EEPROM_ADDR_OVERFLOW hex "EEPROM Address Overflow" - default 0 + default 0x0 help EEPROM chips that implement "address overflow" are ones like Catalyst 24WC04/08/16 which has 9/10/11 bits of @@ -500,4 +500,7 @@ config ESM_PMIC Support ESM (Error Signal Monitor) on PMIC devices. ESM is used typically to reboot the board in error condition. +config FSL_IFC + bool + endmenu diff --git a/drivers/misc/fsl_portals.c b/drivers/misc/fsl_portals.c index 632430e42099518232f720c25b59e1c7ba0f75dd..02bc3f86cae054e0c066220399b5c0ff2b9e9376 100644 --- a/drivers/misc/fsl_portals.c +++ b/drivers/misc/fsl_portals.c @@ -106,7 +106,7 @@ static int fdt_qportal(void *blob, int off, int id, char *name, enum fsl_dpaa_dev dev, int create) { int childoff, dev_off, ret = 0; - u32 dev_handle; + unsigned int dev_handle; #ifdef CONFIG_FSL_CORENET int num; u32 liodns[2]; @@ -142,11 +142,9 @@ static int fdt_qportal(void *blob, int off, int id, char *name, if (childoff > 0) { dev_handle = fdt_get_phandle(blob, dev_off); if (dev_handle <= 0) { - dev_handle = fdt_alloc_phandle(blob); - ret = fdt_set_phandle(blob, dev_off, - dev_handle); - if (ret < 0) - return ret; + dev_handle = fdt_create_phandle(blob, dev_off); + if (!dev_handle) + return -FDT_ERR_NOPHANDLES; } ret = fdt_setprop(blob, childoff, "dev-handle", diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c index 3ee92d03ca2314032100cdff234a5838b1652d9a..b80e838066ca70bd1b37282fbf378b145653e502 100644 --- a/drivers/mmc/mmc-uclass.c +++ b/drivers/mmc/mmc-uclass.c @@ -320,7 +320,7 @@ struct blk_desc *mmc_get_blk_desc(struct mmc *mmc) struct blk_desc *desc; struct udevice *dev; - device_find_first_child(mmc->dev, &dev); + device_find_first_child_by_uclass(mmc->dev, UCLASS_BLK, &dev); if (!dev) return NULL; desc = dev_get_uclass_plat(dev); @@ -425,7 +425,7 @@ int mmc_unbind(struct udevice *dev) { struct udevice *bdev; - device_find_first_child(dev, &bdev); + device_find_first_child_by_uclass(dev, UCLASS_BLK, &bdev); if (bdev) { device_remove(bdev, DM_REMOVE_NORMAL); device_unbind(bdev); diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-sd.c index 8599f095bcd2635b7a556a8f86a5b5c1a5498f5e..97182ffd7f58a64895ab696efa0cd2c5269cce70 100644 --- a/drivers/mmc/mtk-sd.c +++ b/drivers/mmc/mtk-sd.c @@ -1724,6 +1724,20 @@ static int msdc_drv_bind(struct udevice *dev) return mmc_bind(dev, &plat->mmc, &plat->cfg); } +static int msdc_ops_wait_dat0(struct udevice *dev, int state, int timeout_us) +{ + struct msdc_host *host = dev_get_priv(dev); + int ret; + u32 reg; + + ret = readl_poll_sleep_timeout(&host->base->msdc_ps, reg, + !!(reg & MSDC_PS_DAT0) == !!state, + 1000, /* 1 ms */ + timeout_us); + + return ret; +} + static const struct dm_mmc_ops msdc_ops = { .send_cmd = msdc_ops_send_cmd, .set_ios = msdc_ops_set_ios, @@ -1732,6 +1746,7 @@ static const struct dm_mmc_ops msdc_ops = { #ifdef MMC_SUPPORTS_TUNING .execute_tuning = msdc_execute_tuning, #endif + .wait_dat0 = msdc_ops_wait_dat0, }; static const struct msdc_compatible mt7620_compat = { diff --git a/drivers/mmc/sandbox_mmc.c b/drivers/mmc/sandbox_mmc.c index 895fbffecfcdb3ad108031f62b04fc02e1e8cf7c..451fe4a4e5a28bd5ff290cec5e4ad9289cb469b4 100644 --- a/drivers/mmc/sandbox_mmc.c +++ b/drivers/mmc/sandbox_mmc.c @@ -9,23 +9,26 @@ #include #include #include +#include #include +#include #include struct sandbox_mmc_plat { struct mmc_config cfg; struct mmc mmc; + const char *fname; }; -#define MMC_CSIZE 0 -#define MMC_CMULT 8 /* 8 because the card is high-capacity */ -#define MMC_BL_LEN_SHIFT 10 -#define MMC_BL_LEN BIT(MMC_BL_LEN_SHIFT) -#define MMC_CAPACITY (((MMC_CSIZE + 1) << (MMC_CMULT + 2)) \ - * MMC_BL_LEN) /* 1 MiB */ +#define MMC_CMULT 8 /* 8 because the card is high-capacity */ +#define MMC_BL_LEN_SHIFT 10 +#define MMC_BL_LEN BIT(MMC_BL_LEN_SHIFT) +#define SIZE_MULTIPLE ((1 << (MMC_CMULT + 2)) * MMC_BL_LEN) struct sandbox_mmc_priv { - u8 buf[MMC_CAPACITY]; + char *buf; + int csize; /* CSIZE value to report */ + int size; }; /** @@ -60,8 +63,8 @@ static int sandbox_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, case MMC_CMD_SEND_CSD: cmd->response[0] = 0; cmd->response[1] = (MMC_BL_LEN_SHIFT << 16) | - ((MMC_CSIZE >> 16) & 0x3f); - cmd->response[2] = (MMC_CSIZE & 0xffff) << 16; + ((priv->csize >> 16) & 0x3f); + cmd->response[2] = (priv->csize & 0xffff) << 16; cmd->response[3] = 0; break; case SD_CMD_SWITCH_FUNC: { @@ -143,6 +146,8 @@ static int sandbox_mmc_of_to_plat(struct udevice *dev) struct blk_desc *blk; int ret; + plat->fname = dev_read_string(dev, "filename"); + ret = mmc_of_parse(dev, cfg); if (ret) return ret; @@ -156,10 +161,46 @@ static int sandbox_mmc_of_to_plat(struct udevice *dev) static int sandbox_mmc_probe(struct udevice *dev) { struct sandbox_mmc_plat *plat = dev_get_plat(dev); + struct sandbox_mmc_priv *priv = dev_get_priv(dev); + int ret; + + if (plat->fname) { + ret = os_map_file(plat->fname, OS_O_RDWR | OS_O_CREAT, + (void **)&priv->buf, &priv->size); + if (ret) { + log_err("%s: Unable to map file '%s'\n", dev->name, + plat->fname); + return ret; + } + priv->csize = priv->size / SIZE_MULTIPLE - 1; + } else { + priv->csize = 0; + priv->size = (priv->csize + 1) * SIZE_MULTIPLE; /* 1 MiB */ + + priv->buf = malloc(priv->size); + if (!priv->buf) { + log_err("%s: Not enough memory (%x bytes)\n", + dev->name, priv->size); + return -ENOMEM; + } + } return mmc_init(&plat->mmc); } +static int sandbox_mmc_remove(struct udevice *dev) +{ + struct sandbox_mmc_plat *plat = dev_get_plat(dev); + struct sandbox_mmc_priv *priv = dev_get_priv(dev); + + if (plat->fname) + os_unmap(priv->buf, priv->size); + else + free(priv->buf); + + return 0; +} + static int sandbox_mmc_bind(struct udevice *dev) { struct sandbox_mmc_plat *plat = dev_get_plat(dev); @@ -196,6 +237,7 @@ U_BOOT_DRIVER(mmc_sandbox) = { .unbind = sandbox_mmc_unbind, .of_to_plat = sandbox_mmc_of_to_plat, .probe = sandbox_mmc_probe, + .remove = sandbox_mmc_remove, .priv_auto = sizeof(struct sandbox_mmc_priv), .plat_auto = sizeof(struct sandbox_mmc_plat), }; diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c index a3cdf7bcd9f7de3ecd32c95c928f212649956e3f..44bfc911af23e6637f9c0ecb58610de46973d6db 100644 --- a/drivers/mmc/stm32_sdmmc2.c +++ b/drivers/mmc/stm32_sdmmc2.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -645,6 +646,66 @@ static const struct dm_mmc_ops stm32_sdmmc2_ops = { .host_power_cycle = stm32_sdmmc2_host_power_cycle, }; +static int stm32_sdmmc2_probe_level_translator(struct udevice *dev) +{ + struct stm32_sdmmc2_priv *priv = dev_get_priv(dev); + struct gpio_desc cmd_gpio; + struct gpio_desc ck_gpio; + struct gpio_desc ckin_gpio; + int clk_hi, clk_lo, ret; + + /* + * Assume the level translator is present if st,use-ckin is set. + * This is to cater for DTs which do not implement this test. + */ + priv->clk_reg_msk |= SDMMC_CLKCR_SELCLKRX_CKIN; + + ret = gpio_request_by_name(dev, "st,cmd-gpios", 0, &cmd_gpio, + GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE); + if (ret) + goto exit_cmd; + + ret = gpio_request_by_name(dev, "st,ck-gpios", 0, &ck_gpio, + GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE); + if (ret) + goto exit_ck; + + ret = gpio_request_by_name(dev, "st,ckin-gpios", 0, &ckin_gpio, + GPIOD_IS_IN); + if (ret) + goto exit_ckin; + + /* All GPIOs are valid, test whether level translator works */ + + /* Sample CKIN */ + clk_hi = !!dm_gpio_get_value(&ckin_gpio); + + /* Set CK low */ + dm_gpio_set_value(&ck_gpio, 0); + + /* Sample CKIN */ + clk_lo = !!dm_gpio_get_value(&ckin_gpio); + + /* Tristate all */ + dm_gpio_set_dir_flags(&cmd_gpio, GPIOD_IS_IN); + dm_gpio_set_dir_flags(&ck_gpio, GPIOD_IS_IN); + + /* Level translator is present if CK signal is propagated to CKIN */ + if (!clk_hi || clk_lo) + priv->clk_reg_msk &= ~SDMMC_CLKCR_SELCLKRX_CKIN; + + dm_gpio_free(dev, &ckin_gpio); + +exit_ckin: + dm_gpio_free(dev, &ck_gpio); +exit_ck: + dm_gpio_free(dev, &cmd_gpio); +exit_cmd: + pinctrl_select_state(dev, "default"); + + return 0; +} + static int stm32_sdmmc2_probe(struct udevice *dev) { struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); @@ -662,7 +723,7 @@ static int stm32_sdmmc2_probe(struct udevice *dev) if (dev_read_bool(dev, "st,sig-dir")) priv->pwr_reg_msk |= SDMMC_POWER_DIRPOL; if (dev_read_bool(dev, "st,use-ckin")) - priv->clk_reg_msk |= SDMMC_CLKCR_SELCLKRX_CKIN; + stm32_sdmmc2_probe_level_translator(dev); ret = clk_get_by_index(dev, 0, &priv->clk); if (ret) diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index df9eae1691c487a113366154423a83dfe05b18d0..0e826c19298689b3b4b317184c217b4e3184c2aa 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -9,10 +9,24 @@ config SYS_NAND_SELF_INIT This option, if enabled, provides more flexible and linux-like NAND initialization process. -config SYS_NAND_DRIVER_ECC_LAYOUT +config SPL_SYS_NAND_SELF_INIT + bool + depends on !SPL_NAND_SIMPLE + help + This option, if enabled, provides more flexible and linux-like + NAND initialization process, in SPL. + +config TPL_SYS_NAND_SELF_INIT bool + depends on TPL_NAND_SUPPORT + help + This option, if enabled, provides more flexible and linux-like + NAND initialization process, in SPL. + +config SYS_NAND_DRIVER_ECC_LAYOUT + bool "Omit standard ECC layouts to save space" help - Omit standard ECC layouts to safe space. Select this if your driver + Omit standard ECC layouts to save space. Select this if your driver is known to provide its own ECC layout. config SYS_NAND_USE_FLASH_BBT @@ -22,6 +36,7 @@ config SYS_NAND_USE_FLASH_BBT config NAND_ATMEL bool "Support Atmel NAND controller" + select SYS_NAND_SELF_INIT imply SYS_NAND_USE_FLASH_BBT help Enable this driver for NAND flash platforms using an Atmel NAND @@ -65,6 +80,7 @@ endif config NAND_BRCMNAND bool "Support Broadcom NAND controller" depends on OF_CONTROL && DM && DM_MTD + select SYS_NAND_SELF_INIT help Enable the driver for NAND flash on platforms using a Broadcom NAND controller. @@ -101,6 +117,7 @@ config NAND_BRCMNAND_63158 config NAND_DAVINCI bool "Support TI Davinci NAND controller" + select SYS_NAND_SELF_INIT if TARGET_DA850EVM help Enable this driver for NAND flash controllers available in TI Davinci and Keystone2 platforms @@ -128,17 +145,25 @@ config NAND_DENALI_DT config NAND_FSL_ELBC bool "Support Freescale Enhanced Local Bus Controller FCM NAND driver" + select TPL_SYS_NAND_SELF_INIT if TPL_NAND_SUPPORT + select SPL_SYS_NAND_SELF_INIT + select SYS_NAND_SELF_INIT depends on FSL_ELBC help Enable the Freescale Enhanced Local Bus Controller FCM NAND driver. config NAND_FSL_IFC bool "Support Freescale Integrated Flash Controller NAND driver" + select TPL_SYS_NAND_SELF_INIT if TPL_NAND_SUPPORT + select SPL_SYS_NAND_SELF_INIT + select SYS_NAND_SELF_INIT + select FSL_IFC help Enable the Freescale Integrated Flash Controller NAND driver. config NAND_LPC32XX_MLC bool "Support LPC32XX_MLC controller" + select SYS_NAND_SELF_INIT help Enable the LPC32XX MLC NAND controller. @@ -330,6 +355,7 @@ config NAND_SUNXI select SYS_NAND_SELF_INIT select SYS_NAND_U_BOOT_LOCATIONS select SPL_NAND_SUPPORT + select SPL_SYS_NAND_SELF_INIT imply CMD_NAND ---help--- Enable support for NAND. This option enables the standard and @@ -374,6 +400,7 @@ config NAND_MXC config NAND_MXS bool "MXS NAND support" depends on MX23 || MX28 || MX6 || MX7 || IMX8 || IMX8M + select SPL_SYS_NAND_SELF_INIT select SYS_NAND_SELF_INIT imply CMD_NAND select APBH_DMA @@ -406,6 +433,7 @@ config NAND_MXIC config NAND_ZYNQ bool "Support for Zynq Nand controller" + select SPL_SYS_NAND_SELF_INIT select SYS_NAND_SELF_INIT select DM_MTD imply CMD_NAND @@ -475,6 +503,14 @@ config ROCKCHIP_NAND NFC v800: RK3308, RV1108 NFC v900: PX30, RK3326 +config TEGRA_NAND + bool "Support for NAND controller on Tegra SoCs" + depends on ARCH_TEGRA + select SYS_NAND_SELF_INIT + imply CMD_NAND + help + Enables support for NAND Flash chips on Tegra SoCs platforms. + comment "Generic NAND options" config SYS_NAND_BLOCK_SIZE diff --git a/drivers/mtd/nand/raw/davinci_nand.c b/drivers/mtd/nand/raw/davinci_nand.c index ef7ee395c0ca38d9be747ef57ec3af316e576327..9158d94de25a36d2db217484ae49d2ff9ef21d63 100644 --- a/drivers/mtd/nand/raw/davinci_nand.c +++ b/drivers/mtd/nand/raw/davinci_nand.c @@ -788,7 +788,7 @@ static void davinci_nand_init(struct nand_chip *nand) nand->dev_ready = nand_davinci_dev_ready; } -#ifdef CONFIG_SYS_NAND_SELF_INIT +#if CONFIG_IS_ENABLED(SYS_NAND_SELF_INIT) static int davinci_nand_probe(struct udevice *dev) { struct nand_chip *nand = dev_get_priv(dev); diff --git a/drivers/mtd/nand/raw/nand.c b/drivers/mtd/nand/raw/nand.c index 59ad1392b0e602789bc908659c557a63ca8544b7..4b5560dd24cd4e9131acc131829c27d67bfacbee 100644 --- a/drivers/mtd/nand/raw/nand.c +++ b/drivers/mtd/nand/raw/nand.c @@ -76,7 +76,7 @@ int nand_register(int devnum, struct mtd_info *mtd) return 0; } -#ifndef CONFIG_SYS_NAND_SELF_INIT +#if !CONFIG_IS_ENABLED(SYS_NAND_SELF_INIT) static void nand_init_chip(int i) { struct nand_chip *nand = &nand_chip[i]; @@ -155,7 +155,7 @@ void nand_init(void) return; initialized = 1; -#ifdef CONFIG_SYS_NAND_SELF_INIT +#if CONFIG_IS_ENABLED(SYS_NAND_SELF_INIT) board_nand_init(); #else int i; diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig index 2f56d46a384c1f2662ccb8a3891d149ad1d66afc..f350c7e5dc218f3584b56ebbd55f2190d3265f4a 100644 --- a/drivers/mtd/spi/Kconfig +++ b/drivers/mtd/spi/Kconfig @@ -57,7 +57,7 @@ config SF_DEFAULT_CS config SF_DEFAULT_MODE hex "SPI Flash default mode (see include/spi.h)" depends on SPI_FLASH || DM_SPI_FLASH - default 0 + default 0x0 help The default mode may be provided by the platform to handle the common case when only a single serial diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index c1a49173c28358b22b5a4e9acda06c90fb254d02..71e0cbafb4121c7798e6829aac63e16b0d2b2d45 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -1,6 +1,7 @@ source "drivers/net/phy/Kconfig" source "drivers/net/pfe_eth/Kconfig" source "drivers/net/fsl-mc/Kconfig" +source "drivers/net/bnxt/Kconfig" config ETH def_bool y @@ -554,6 +555,22 @@ config RTL8169 This driver supports Realtek 8169 series gigabit ethernet family of PCI/PCIe chipsets/adapters. +config SJA1105 + bool "NXP SJA1105 Ethernet switch family driver" + depends on DM_DSA && DM_SPI + select BITREVERSE + help + This is the driver for the NXP SJA1105 automotive Ethernet switch + family. These are 5-port devices and are managed over an SPI + interface. Probing is handled based on OF bindings. The driver + supports the following revisions: + - SJA1105E (Gen. 1, No TT-Ethernet) + - SJA1105T (Gen. 1, TT-Ethernet) + - SJA1105P (Gen. 2, No SGMII, No TT-Ethernet) + - SJA1105Q (Gen. 2, No SGMII, TT-Ethernet) + - SJA1105R (Gen. 2, SGMII, No TT-Ethernet) + - SJA1105S (Gen. 2, SGMII, TT-Ethernet) + config SMC911X bool "SMSC LAN911x and LAN921x controller driver" @@ -835,6 +852,13 @@ config FSL_LS_MDIO This driver supports the MDIO bus found on the Fman 10G Ethernet MACs and on the mEMAC (which supports both Clauses 22 and 45). +config ASPEED_MDIO + bool "Aspeed MDIO interface support" + depends on DM_MDIO + help + This driver supports the MDIO bus of Aspeed AST2600 SOC. The driver + currently supports Clause 22. + config MDIO_MUX_MMIOREG bool "MDIO MUX accessed as a MMIO register access" depends on DM_MDIO_MUX diff --git a/drivers/net/Makefile b/drivers/net/Makefile index e4078d15a99f868e4a3dd7aebcf40a4594f748ad..a6d0c23f02d325da450bead4073b6f2af9538112 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -3,43 +3,53 @@ # (C) Copyright 2006 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. -obj-y += phy/ -obj-$(CONFIG_ALTERA_TSE) += altera_tse.o obj-$(CONFIG_AG7XXX) += ag7xxx.o +obj-$(CONFIG_ALTERA_TSE) += altera_tse.o obj-$(CONFIG_ARMADA100_FEC) += armada100_fec.o +obj-$(CONFIG_ASPEED_MDIO) += aspeed_mdio.o obj-$(CONFIG_BCM6348_ETH) += bcm6348-eth.o obj-$(CONFIG_BCM6368_ETH) += bcm6368-eth.o obj-$(CONFIG_BCMGENET) += bcmgenet.o -obj-$(CONFIG_DRIVER_AX88180) += ax88180.o obj-$(CONFIG_BCM_SF2_ETH) += bcm-sf2-eth.o obj-$(CONFIG_BCM_SF2_ETH_GMAC) += bcm-sf2-eth-gmac.o +obj-$(CONFIG_BNXT_ETH) += bnxt/ obj-$(CONFIG_CALXEDA_XGMAC) += calxedaxgmac.o obj-$(CONFIG_CORTINA_NI_ENET) += cortina_ni.o obj-$(CONFIG_CS8900) += cs8900.o -obj-$(CONFIG_TULIP) += dc2114x.o -obj-$(CONFIG_ETH_DESIGNWARE) += designware.o -obj-$(CONFIG_ETH_DESIGNWARE_MESON8B) += dwmac_meson8b.o -obj-$(CONFIG_ETH_DESIGNWARE_SOCFPGA) += dwmac_socfpga.o -obj-$(CONFIG_ETH_DESIGNWARE_S700) += dwmac_s700.o -obj-$(CONFIG_DRIVER_DM9000) += dm9000x.o +obj-$(CONFIG_DM_ETH_PHY) += eth-phy-uclass.o obj-$(CONFIG_DNET) += dnet.o +obj-$(CONFIG_DRIVER_AX88180) += ax88180.o +obj-$(CONFIG_DRIVER_DM9000) += dm9000x.o obj-$(CONFIG_DSA_SANDBOX) += dsa_sandbox.o -obj-$(CONFIG_DM_ETH_PHY) += eth-phy-uclass.o +obj-$(CONFIG_DWC_ETH_QOS) += dwc_eth_qos.o obj-$(CONFIG_E1000) += e1000.o obj-$(CONFIG_E1000_SPI) += e1000_spi.o obj-$(CONFIG_EEPRO100) += eepro100.o -obj-$(CONFIG_SUN4I_EMAC) += sunxi_emac.o -obj-$(CONFIG_SUN8I_EMAC) += sun8i_emac.o obj-$(CONFIG_EP93XX) += ep93xx_eth.o obj-$(CONFIG_ETHOC) += ethoc.o +obj-$(CONFIG_ETH_DESIGNWARE) += designware.o +obj-$(CONFIG_ETH_DESIGNWARE_MESON8B) += dwmac_meson8b.o +obj-$(CONFIG_ETH_DESIGNWARE_S700) += dwmac_s700.o +obj-$(CONFIG_ETH_DESIGNWARE_SOCFPGA) += dwmac_socfpga.o +obj-$(CONFIG_ETH_SANDBOX) += sandbox.o +obj-$(CONFIG_ETH_SANDBOX_RAW) += sandbox-raw-bus.o +obj-$(CONFIG_ETH_SANDBOX_RAW) += sandbox-raw.o obj-$(CONFIG_FEC_MXC) += fec_mxc.o obj-$(CONFIG_FMAN_ENET) += fm/ +obj-$(CONFIG_FMAN_ENET) += fsl_mdio.o obj-$(CONFIG_FSLDMAFEC) += fsl_mcdmafec.o mcfmii.o +obj-$(CONFIG_FSL_ENETC) += fsl_enetc.o fsl_enetc_mdio.o +obj-$(CONFIG_FSL_LS_MDIO) += fsl_ls_mdio.o +obj-$(CONFIG_FSL_MC_ENET) += fsl-mc/ +obj-$(CONFIG_FSL_MC_ENET) += ldpaa_eth/ +obj-$(CONFIG_FSL_MEMAC) += fm/memac_phy.o +obj-$(CONFIG_FSL_PFE) += pfe_eth/ obj-$(CONFIG_FTGMAC100) += ftgmac100.o -obj-$(CONFIG_FTMAC110) += ftmac110.o obj-$(CONFIG_FTMAC100) += ftmac100.o +obj-$(CONFIG_FTMAC110) += ftmac110.o obj-$(CONFIG_GMAC_ROCKCHIP) += gmac_rockchip.o +obj-$(CONFIG_HIGMACV300_ETH) += higmacv300.o obj-$(CONFIG_KS8851_MLL) += ks8851_mll.o obj-$(CONFIG_KSZ9477) += ksz9477.o obj-$(CONFIG_LAN91C96) += lan91c96.o @@ -51,6 +61,8 @@ obj-$(CONFIG_MDIO_MUX_I2CREG) += mdio_mux_i2creg.o obj-$(CONFIG_MDIO_MUX_MESON_G12A) += mdio_mux_meson_g12a.o obj-$(CONFIG_MDIO_MUX_MMIOREG) += mdio_mux_mmioreg.o obj-$(CONFIG_MDIO_MUX_SANDBOX) += mdio_mux_sandbox.o +obj-$(CONFIG_MDIO_SANDBOX) += mdio_sandbox.o +obj-$(CONFIG_MEDIATEK_ETH) += mtk_eth.o obj-$(CONFIG_MPC8XX_FEC) += mpc8xx_fec.o obj-$(CONFIG_MT7620_ETH) += mt7620-eth.o obj-$(CONFIG_MT7628_ETH) += mt7628-eth.o @@ -60,44 +72,35 @@ obj-$(CONFIG_MVNETA) += mvneta.o obj-$(CONFIG_MVPP2) += mvpp2.o obj-$(CONFIG_NATSEMI) += natsemi.o obj-$(CONFIG_NETCONSOLE) += netconsole.o +obj-$(CONFIG_NET_OCTEONTX) += octeontx/ +obj-$(CONFIG_NET_OCTEONTX2) += octeontx2/ obj-$(CONFIG_NS8382X) += ns8382x.o +obj-$(CONFIG_OCTEONTX2_CGX_INTF) += octeontx2/cgx_intf.o +obj-$(CONFIG_OCTEONTX_SMI) += octeontx/smi.o obj-$(CONFIG_PCH_GBE) += pch_gbe.o obj-$(CONFIG_PCNET) += pcnet.o +obj-$(CONFIG_PIC32_ETH) += pic32_mdio.o pic32_eth.o +obj-$(CONFIG_RENESAS_RAVB) += ravb.o obj-$(CONFIG_RTL8139) += rtl8139.o obj-$(CONFIG_RTL8169) += rtl8169.o -obj-$(CONFIG_ETH_SANDBOX) += sandbox.o -obj-$(CONFIG_ETH_SANDBOX_RAW) += sandbox-raw.o -obj-$(CONFIG_ETH_SANDBOX_RAW) += sandbox-raw-bus.o obj-$(CONFIG_SH_ETHER) += sh_eth.o -obj-$(CONFIG_RENESAS_RAVB) += ravb.o +obj-$(CONFIG_SJA1105) += sja1105.o obj-$(CONFIG_SMC91111) += smc91111.o obj-$(CONFIG_SMC911X) += smc911x.o +obj-$(CONFIG_SNI_AVE) += sni_ave.o +obj-$(CONFIG_SNI_NETSEC) += sni_netsec.o +obj-$(CONFIG_SUN4I_EMAC) += sunxi_emac.o +obj-$(CONFIG_SUN8I_EMAC) += sun8i_emac.o obj-$(CONFIG_TSEC_ENET) += tsec.o fsl_mdio.o -obj-$(CONFIG_NET_OCTEONTX) += octeontx/ -obj-$(CONFIG_NET_OCTEONTX2) += octeontx2/ -obj-$(CONFIG_OCTEONTX_SMI) += octeontx/smi.o -obj-$(CONFIG_OCTEONTX2_CGX_INTF) += octeontx2/cgx_intf.o -obj-$(CONFIG_FMAN_ENET) += fsl_mdio.o +obj-$(CONFIG_TULIP) += dc2114x.o obj-$(CONFIG_ULI526X) += uli526x.o obj-$(CONFIG_VSC7385_ENET) += vsc7385.o +obj-$(CONFIG_VSC9953) += vsc9953.o obj-$(CONFIG_XILINX_AXIEMAC) += xilinx_axi_emac.o obj-$(CONFIG_XILINX_AXIMRMAC) += xilinx_axi_mrmac.o obj-$(CONFIG_XILINX_EMACLITE) += xilinx_emaclite.o obj-$(CONFIG_ZYNQ_GEM) += zynq_gem.o -obj-$(CONFIG_FSL_MC_ENET) += fsl-mc/ -obj-$(CONFIG_FSL_MC_ENET) += ldpaa_eth/ -obj-$(CONFIG_FSL_MEMAC) += fm/memac_phy.o -obj-$(CONFIG_VSC9953) += vsc9953.o -obj-$(CONFIG_PIC32_ETH) += pic32_mdio.o pic32_eth.o -obj-$(CONFIG_DWC_ETH_QOS) += dwc_eth_qos.o -obj-$(CONFIG_FSL_PFE) += pfe_eth/ +obj-y += mscc_eswitch/ +obj-y += phy/ obj-y += qe/ -obj-$(CONFIG_SNI_AVE) += sni_ave.o -obj-$(CONFIG_SNI_NETSEC) += sni_netsec.o obj-y += ti/ -obj-$(CONFIG_MEDIATEK_ETH) += mtk_eth.o -obj-y += mscc_eswitch/ -obj-$(CONFIG_HIGMACV300_ETH) += higmacv300.o -obj-$(CONFIG_MDIO_SANDBOX) += mdio_sandbox.o -obj-$(CONFIG_FSL_ENETC) += fsl_enetc.o fsl_enetc_mdio.o -obj-$(CONFIG_FSL_LS_MDIO) += fsl_ls_mdio.o diff --git a/drivers/net/aspeed_mdio.c b/drivers/net/aspeed_mdio.c new file mode 100644 index 0000000000000000000000000000000000000000..a99715a7282947996fabdcee936fd538759ceb0c --- /dev/null +++ b/drivers/net/aspeed_mdio.c @@ -0,0 +1,128 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Aspeed MDIO driver + * + * (C) Copyright 2021 Aspeed Technology Inc. + * + * This file is inspired from the Linux kernel driver drivers/net/phy/mdio-aspeed.c + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define ASPEED_MDIO_CTRL 0x0 +#define ASPEED_MDIO_CTRL_FIRE BIT(31) +#define ASPEED_MDIO_CTRL_ST BIT(28) +#define ASPEED_MDIO_CTRL_ST_C45 0 +#define ASPEED_MDIO_CTRL_ST_C22 1 +#define ASPEED_MDIO_CTRL_OP GENMASK(27, 26) +#define MDIO_C22_OP_WRITE 0b01 +#define MDIO_C22_OP_READ 0b10 +#define ASPEED_MDIO_CTRL_PHYAD GENMASK(25, 21) +#define ASPEED_MDIO_CTRL_REGAD GENMASK(20, 16) +#define ASPEED_MDIO_CTRL_MIIWDATA GENMASK(15, 0) + +#define ASPEED_MDIO_DATA 0x4 +#define ASPEED_MDIO_DATA_MDC_THRES GENMASK(31, 24) +#define ASPEED_MDIO_DATA_MDIO_EDGE BIT(23) +#define ASPEED_MDIO_DATA_MDIO_LATCH GENMASK(22, 20) +#define ASPEED_MDIO_DATA_IDLE BIT(16) +#define ASPEED_MDIO_DATA_MIIRDATA GENMASK(15, 0) + +#define ASPEED_MDIO_TIMEOUT_US 1000 + +struct aspeed_mdio_priv { + void *base; +}; + +static int aspeed_mdio_read(struct udevice *mdio_dev, int addr, int devad, int reg) +{ + struct aspeed_mdio_priv *priv = dev_get_priv(mdio_dev); + u32 ctrl; + u32 data; + int rc; + + if (devad != MDIO_DEVAD_NONE) + return -EOPNOTSUPP; + + ctrl = ASPEED_MDIO_CTRL_FIRE + | FIELD_PREP(ASPEED_MDIO_CTRL_ST, ASPEED_MDIO_CTRL_ST_C22) + | FIELD_PREP(ASPEED_MDIO_CTRL_OP, MDIO_C22_OP_READ) + | FIELD_PREP(ASPEED_MDIO_CTRL_PHYAD, addr) + | FIELD_PREP(ASPEED_MDIO_CTRL_REGAD, reg); + + writel(ctrl, priv->base + ASPEED_MDIO_CTRL); + + rc = readl_poll_timeout(priv->base + ASPEED_MDIO_DATA, data, + data & ASPEED_MDIO_DATA_IDLE, + ASPEED_MDIO_TIMEOUT_US); + + if (rc < 0) + return rc; + + return FIELD_GET(ASPEED_MDIO_DATA_MIIRDATA, data); +} + +static int aspeed_mdio_write(struct udevice *mdio_dev, int addr, int devad, int reg, u16 val) +{ + struct aspeed_mdio_priv *priv = dev_get_priv(mdio_dev); + u32 ctrl; + + if (devad != MDIO_DEVAD_NONE) + return -EOPNOTSUPP; + + ctrl = ASPEED_MDIO_CTRL_FIRE + | FIELD_PREP(ASPEED_MDIO_CTRL_ST, ASPEED_MDIO_CTRL_ST_C22) + | FIELD_PREP(ASPEED_MDIO_CTRL_OP, MDIO_C22_OP_WRITE) + | FIELD_PREP(ASPEED_MDIO_CTRL_PHYAD, addr) + | FIELD_PREP(ASPEED_MDIO_CTRL_REGAD, reg) + | FIELD_PREP(ASPEED_MDIO_CTRL_MIIWDATA, val); + + writel(ctrl, priv->base + ASPEED_MDIO_CTRL); + + return readl_poll_timeout(priv->base + ASPEED_MDIO_CTRL, ctrl, + !(ctrl & ASPEED_MDIO_CTRL_FIRE), + ASPEED_MDIO_TIMEOUT_US); +} + +static const struct mdio_ops aspeed_mdio_ops = { + .read = aspeed_mdio_read, + .write = aspeed_mdio_write, +}; + +static int aspeed_mdio_probe(struct udevice *dev) +{ + struct aspeed_mdio_priv *priv = dev_get_priv(dev); + struct reset_ctl reset_ctl; + int ret = 0; + + priv->base = dev_read_addr_ptr(dev); + + ret = reset_get_by_index(dev, 0, &reset_ctl); + reset_deassert(&reset_ctl); + + return 0; +} + +static const struct udevice_id aspeed_mdio_ids[] = { + { .compatible = "aspeed,ast2600-mdio" }, + { } +}; + +U_BOOT_DRIVER(aspeed_mdio) = { + .name = "aspeed_mdio", + .id = UCLASS_MDIO, + .of_match = aspeed_mdio_ids, + .probe = aspeed_mdio_probe, + .ops = &aspeed_mdio_ops, + .plat_auto = sizeof(struct mdio_perdev_priv), + .priv_auto = sizeof(struct aspeed_mdio_priv), +}; diff --git a/drivers/net/bnxt/Kconfig b/drivers/net/bnxt/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..412ecd4303353d50641fdbc3de2bbe58de673ff4 --- /dev/null +++ b/drivers/net/bnxt/Kconfig @@ -0,0 +1,7 @@ +config BNXT_ETH + bool "BNXT PCI support" + depends on DM_ETH + select PCI_INIT_R + help + This driver implements support for bnxt pci controller + driver of ethernet class. diff --git a/drivers/net/bnxt/Makefile b/drivers/net/bnxt/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..a9d6ce00d5e0e2e2649a0edca39dd8498bf3d81a --- /dev/null +++ b/drivers/net/bnxt/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright 2019-2021 Broadcom. + +# Broadcom nxe Ethernet driver +obj-y += bnxt.o diff --git a/drivers/net/bnxt/bnxt.c b/drivers/net/bnxt/bnxt.c new file mode 100644 index 0000000000000000000000000000000000000000..9844e96072e77b7f850e02ad91e46e9464f8e8ba --- /dev/null +++ b/drivers/net/bnxt/bnxt.c @@ -0,0 +1,1708 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019-2021 Broadcom. + */ + +#include + +#include +#include +#include +#include +#include + +#include "bnxt.h" +#include "bnxt_dbg.h" + +#define bnxt_down_chip(bp) bnxt_hwrm_run(down_chip, bp, 0) +#define bnxt_bring_chip(bp) bnxt_hwrm_run(bring_chip, bp, 1) + +/* Broadcom ethernet driver PCI APIs. */ +static void bnxt_bring_pci(struct bnxt *bp) +{ + u16 cmd_reg = 0; + + dm_pci_read_config16(bp->pdev, PCI_VENDOR_ID, &bp->vendor_id); + dm_pci_read_config16(bp->pdev, PCI_DEVICE_ID, &bp->device_id); + dm_pci_read_config16(bp->pdev, PCI_SUBSYSTEM_VENDOR_ID, &bp->subsystem_vendor); + dm_pci_read_config16(bp->pdev, PCI_SUBSYSTEM_ID, &bp->subsystem_device); + dm_pci_read_config16(bp->pdev, PCI_COMMAND, &bp->cmd_reg); + dm_pci_read_config8(bp->pdev, PCI_INTERRUPT_LINE, &bp->irq); + bp->bar0 = dm_pci_map_bar(bp->pdev, PCI_BASE_ADDRESS_0, PCI_REGION_MEM); + bp->bar1 = dm_pci_map_bar(bp->pdev, PCI_BASE_ADDRESS_2, PCI_REGION_MEM); + bp->bar2 = dm_pci_map_bar(bp->pdev, PCI_BASE_ADDRESS_4, PCI_REGION_MEM); + cmd_reg = bp->cmd_reg | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER; + cmd_reg |= PCI_COMMAND_INTX_DISABLE; /* disable intr */ + dm_pci_write_config16(bp->pdev, PCI_COMMAND, cmd_reg); + dm_pci_read_config16(bp->pdev, PCI_COMMAND, &cmd_reg); + dbg_pci(bp, __func__, cmd_reg); +} + +int bnxt_free_rx_iob(struct bnxt *bp) +{ + unsigned int i; + + if (!(FLAG_TEST(bp->flag_hwrm, VALID_RX_IOB))) + return STATUS_SUCCESS; + + for (i = 0; i < bp->rx.buf_cnt; i++) { + if (bp->rx.iob[i]) { + free(bp->rx.iob[i]); + bp->rx.iob[i] = NULL; + } + } + + FLAG_RESET(bp->flag_hwrm, VALID_RX_IOB); + + return STATUS_SUCCESS; +} + +static void set_rx_desc(u8 *buf, void *iob, u16 cons_id, u32 iob_idx) +{ + struct rx_prod_pkt_bd *desc; + u16 off = cons_id * sizeof(struct rx_prod_pkt_bd); + + desc = (struct rx_prod_pkt_bd *)&buf[off]; + desc->flags_type = RX_PROD_PKT_BD_TYPE_RX_PROD_PKT; + desc->len = MAX_ETHERNET_PACKET_BUFFER_SIZE; + desc->opaque = iob_idx; + desc->dma.addr = virt_to_bus(iob); +} + +static int bnxt_alloc_rx_iob(struct bnxt *bp, u16 cons_id, u16 iob_idx) +{ + void *iob; + + iob = memalign(BNXT_DMA_ALIGNMENT, RX_STD_DMA_ALIGNED); + if (!iob) + return -ENOMEM; + + dbg_rx_iob(iob, iob_idx, cons_id); + set_rx_desc((u8 *)bp->rx.bd_virt, iob, cons_id, (u32)iob_idx); + bp->rx.iob[iob_idx] = iob; + + return 0; +} + +void bnxt_mm_init(struct bnxt *bp, const char *func) +{ + memset(bp->hwrm_addr_req, 0, REQ_BUFFER_SIZE); + memset(bp->hwrm_addr_resp, 0, RESP_BUFFER_SIZE); + memset(bp->cq.bd_virt, 0, CQ_RING_DMA_BUFFER_SIZE); + memset(bp->tx.bd_virt, 0, TX_RING_DMA_BUFFER_SIZE); + memset(bp->rx.bd_virt, 0, RX_RING_DMA_BUFFER_SIZE); + + bp->data_addr_mapping = virt_to_bus(bp->hwrm_addr_data); + bp->req_addr_mapping = virt_to_bus(bp->hwrm_addr_req); + bp->resp_addr_mapping = virt_to_bus(bp->hwrm_addr_resp); + bp->wait_link_timeout = LINK_DEFAULT_TIMEOUT; + bp->link_status = STATUS_LINK_DOWN; + bp->media_change = 1; + bp->mtu = MAX_ETHERNET_PACKET_BUFFER_SIZE; + bp->hwrm_max_req_len = HWRM_MAX_REQ_LEN; + bp->rx.buf_cnt = NUM_RX_BUFFERS; + bp->rx.ring_cnt = MAX_RX_DESC_CNT; + bp->tx.ring_cnt = MAX_TX_DESC_CNT; + bp->cq.ring_cnt = MAX_CQ_DESC_CNT; + bp->cq.completion_bit = 0x1; + bp->link_set = LINK_SPEED_DRV_100G; + dbg_mem(bp, func); +} + +void bnxt_free_mem(struct bnxt *bp) +{ + if (bp->cq.bd_virt) { + free(bp->cq.bd_virt); + bp->cq.bd_virt = NULL; + } + + if (bp->rx.bd_virt) { + free(bp->rx.bd_virt); + bp->rx.bd_virt = NULL; + } + + if (bp->tx.bd_virt) { + free(bp->tx.bd_virt); + bp->tx.bd_virt = NULL; + } + + if (bp->hwrm_addr_resp) { + free(bp->hwrm_addr_resp); + bp->resp_addr_mapping = 0; + bp->hwrm_addr_resp = NULL; + } + + if (bp->hwrm_addr_req) { + free(bp->hwrm_addr_req); + bp->req_addr_mapping = 0; + bp->hwrm_addr_req = NULL; + } + + if (bp->hwrm_addr_data) { + free(bp->hwrm_addr_data); + bp->data_addr_mapping = 0; + bp->hwrm_addr_data = NULL; + } + + dbg_mem_free_done(__func__); +} + +int bnxt_alloc_mem(struct bnxt *bp) +{ + bp->hwrm_addr_data = memalign(BNXT_DMA_ALIGNMENT, DMA_BUF_SIZE_ALIGNED); + bp->hwrm_addr_req = memalign(BNXT_DMA_ALIGNMENT, REQ_BUF_SIZE_ALIGNED); + bp->hwrm_addr_resp = MEM_HWRM_RESP; + + memset(&bp->tx, 0, sizeof(struct lm_tx_info_t)); + memset(&bp->rx, 0, sizeof(struct lm_rx_info_t)); + memset(&bp->cq, 0, sizeof(struct lm_cmp_info_t)); + + bp->tx.bd_virt = memalign(BNXT_DMA_ALIGNMENT, TX_RING_DMA_BUFFER_SIZE); + bp->rx.bd_virt = memalign(BNXT_DMA_ALIGNMENT, RX_RING_DMA_BUFFER_SIZE); + bp->cq.bd_virt = memalign(BNXT_DMA_ALIGNMENT, CQ_RING_DMA_BUFFER_SIZE); + + if (bp->hwrm_addr_req && + bp->hwrm_addr_resp && + bp->hwrm_addr_data && + bp->tx.bd_virt && + bp->rx.bd_virt && + bp->cq.bd_virt) { + bnxt_mm_init(bp, __func__); + return STATUS_SUCCESS; + } + + dbg_mem_alloc_fail(__func__); + bnxt_free_mem(bp); + + return -ENOMEM; +} + +static void hwrm_init(struct bnxt *bp, struct input *req, u16 cmd, u16 len) +{ + memset(req, 0, len); + req->req_type = cmd; + req->cmpl_ring = (u16)HWRM_NA_SIGNATURE; + req->target_id = (u16)HWRM_NA_SIGNATURE; + req->resp_addr = bp->resp_addr_mapping; + req->seq_id = bp->seq_id++; +} + +static void hwrm_write_req(struct bnxt *bp, void *req, u32 cnt) +{ + u32 i = 0; + + for (i = 0; i < cnt; i++) + writel(((u32 *)req)[i], bp->bar0 + GRC_COM_CHAN_BASE + (i * 4)); + + writel(0x1, (bp->bar0 + GRC_COM_CHAN_BASE + GRC_COM_CHAN_TRIG)); +} + +static void short_hwrm_cmd_req(struct bnxt *bp, u16 len) +{ + struct hwrm_short_input sreq; + + memset(&sreq, 0, sizeof(struct hwrm_short_input)); + sreq.req_type = (u16)((struct input *)bp->hwrm_addr_req)->req_type; + sreq.signature = SHORT_REQ_SIGNATURE_SHORT_CMD; + sreq.size = len; + sreq.req_addr = bp->req_addr_mapping; + dbg_short_cmd((u8 *)&sreq, __func__, sizeof(struct hwrm_short_input)); + hwrm_write_req(bp, &sreq, sizeof(struct hwrm_short_input) / 4); +} + +static int wait_resp(struct bnxt *bp, u32 tmo, u16 len, const char *func) +{ + struct input *req = (struct input *)bp->hwrm_addr_req; + struct output *resp = (struct output *)bp->hwrm_addr_resp; + u8 *ptr = (u8 *)resp; + u32 idx; + u32 wait_cnt = HWRM_CMD_DEFAULT_MULTIPLAYER((u32)tmo); + u16 resp_len = 0; + u16 ret = STATUS_TIMEOUT; + + if (len > bp->hwrm_max_req_len) + short_hwrm_cmd_req(bp, len); + else + hwrm_write_req(bp, req, (u32)(len / 4)); + + for (idx = 0; idx < wait_cnt; idx++) { + resp_len = resp->resp_len; + if (resp->seq_id == req->seq_id && resp->req_type == req->req_type && + ptr[resp_len - 1] == 1) { + bp->last_resp_code = resp->error_code; + ret = resp->error_code; + break; + } + + udelay(HWRM_CMD_POLL_WAIT_TIME); + } + + dbg_hw_cmd(bp, func, len, resp_len, tmo, ret); + + return (int)ret; +} + +static void bnxt_db_cq(struct bnxt *bp) +{ + writel(CQ_DOORBELL_KEY_IDX(bp->cq.cons_idx), bp->bar1); +} + +static void bnxt_db_rx(struct bnxt *bp, u32 idx) +{ + writel(RX_DOORBELL_KEY_RX | idx, bp->bar1); +} + +static void bnxt_db_tx(struct bnxt *bp, u32 idx) +{ + writel((u32)(TX_DOORBELL_KEY_TX | idx), bp->bar1); +} + +int iob_pad(void *packet, int length) +{ + if (length >= ETH_ZLEN) + return length; + + memset(((u8 *)packet + length), 0x00, (ETH_ZLEN - length)); + + return ETH_ZLEN; +} + +static inline u32 bnxt_tx_avail(struct bnxt *bp) +{ + barrier(); + + return TX_AVAIL(bp->tx.ring_cnt) - + ((bp->tx.prod_id - bp->tx.cons_id) & + (bp->tx.ring_cnt - 1)); +} + +void set_txq(struct bnxt *bp, int entry, dma_addr_t mapping, int len) +{ + struct tx_bd_short *prod_bd; + + prod_bd = (struct tx_bd_short *)BD_NOW(bp->tx.bd_virt, + entry, + sizeof(struct tx_bd_short)); + if (len < 512) + prod_bd->flags_type = TX_BD_SHORT_FLAGS_LHINT_LT512; + else if (len < 1024) + prod_bd->flags_type = TX_BD_SHORT_FLAGS_LHINT_LT1K; + else if (len < 2048) + prod_bd->flags_type = TX_BD_SHORT_FLAGS_LHINT_LT2K; + else + prod_bd->flags_type = TX_BD_SHORT_FLAGS_LHINT_GTE2K; + + prod_bd->flags_type |= TX_BD_FLAGS; + prod_bd->dma.addr = mapping; + prod_bd->len = len; + prod_bd->opaque = (u32)entry; + dump_tx_bd(prod_bd, (u16)(sizeof(struct tx_bd_short))); +} + +static void bnxt_tx_complete(struct bnxt *bp) +{ + bp->tx.cons_id = NEXT_IDX(bp->tx.cons_id, bp->tx.ring_cnt); + bp->tx.cnt++; + dump_tx_stat(bp); +} + +int post_rx_buffers(struct bnxt *bp) +{ + u16 cons_id = (bp->rx.cons_idx % bp->rx.ring_cnt); + u16 iob_idx; + + while (bp->rx.iob_cnt < bp->rx.buf_cnt) { + iob_idx = (cons_id % bp->rx.buf_cnt); + if (!bp->rx.iob[iob_idx]) { + if (bnxt_alloc_rx_iob(bp, cons_id, iob_idx) < 0) { + dbg_rx_alloc_iob_fail(iob_idx, cons_id); + break; + } + } + + cons_id = NEXT_IDX(cons_id, bp->rx.ring_cnt); + bp->rx.iob_cnt++; + } + + if (cons_id != bp->rx.cons_idx) { + dbg_rx_cid(bp->rx.cons_idx, cons_id); + bp->rx.cons_idx = cons_id; + bnxt_db_rx(bp, (u32)cons_id); + } + + FLAG_SET(bp->flag_hwrm, VALID_RX_IOB); + + return STATUS_SUCCESS; +} + +u8 bnxt_rx_drop(struct bnxt *bp, u8 *rx_buf, struct rx_pkt_cmpl_hi *rx_cmp_hi) +{ + u8 chksum_err = 0; + u8 i; + u16 error_flags; + + error_flags = (rx_cmp_hi->errors_v2 >> + RX_PKT_CMPL_ERRORS_BUFFER_ERROR_SFT); + if (rx_cmp_hi->errors_v2 == 0x20 || rx_cmp_hi->errors_v2 == 0x21) + chksum_err = 1; + + if (error_flags && !chksum_err) { + bp->rx.err++; + return 1; + } + + for (i = 0; i < 6; i++) { + if (rx_buf[6 + i] != bp->mac_set[i]) + break; + } + + if (i == 6) { + bp->rx.dropped++; + return 2; /* Drop the loopback packets */ + } + + return 0; +} + +static void bnxt_adv_cq_index(struct bnxt *bp, u16 count) +{ + u16 cons_idx = bp->cq.cons_idx + count; + + if (cons_idx >= MAX_CQ_DESC_CNT) { + /* Toggle completion bit when the ring wraps. */ + bp->cq.completion_bit ^= 1; + cons_idx = cons_idx - MAX_CQ_DESC_CNT; + } + + bp->cq.cons_idx = cons_idx; +} + +void bnxt_adv_rx_index(struct bnxt *bp, u8 *iob, u32 iob_idx) +{ + u16 cons_id = (bp->rx.cons_idx % bp->rx.ring_cnt); + + set_rx_desc((u8 *)bp->rx.bd_virt, (void *)iob, cons_id, iob_idx); + cons_id = NEXT_IDX(cons_id, bp->rx.ring_cnt); + if (cons_id != bp->rx.cons_idx) { + dbg_rx_cid(bp->rx.cons_idx, cons_id); + bp->rx.cons_idx = cons_id; + bnxt_db_rx(bp, (u32)cons_id); + } +} + +void rx_process(struct bnxt *bp, struct rx_pkt_cmpl *rx_cmp, + struct rx_pkt_cmpl_hi *rx_cmp_hi) +{ + u32 desc_idx = rx_cmp->opaque; + u8 *iob = bp->rx.iob[desc_idx]; + + dump_rx_bd(rx_cmp, rx_cmp_hi, desc_idx); + bp->rx.iob_len = rx_cmp->len; + bp->rx.iob_rx = iob; + if (bnxt_rx_drop(bp, iob, rx_cmp_hi)) + bp->rx.iob_recv = PKT_DROPPED; + else + bp->rx.iob_recv = PKT_RECEIVED; + + bp->rx.rx_cnt++; + + dbg_rxp(bp->rx.iob_rx, bp->rx.iob_len, bp->rx.iob_recv); + bnxt_adv_rx_index(bp, iob, desc_idx); + bnxt_adv_cq_index(bp, 2); /* Rx completion is 2 entries. */ +} + +static int bnxt_rx_complete(struct bnxt *bp, struct rx_pkt_cmpl *rx_cmp) +{ + struct rx_pkt_cmpl_hi *rx_cmp_hi; + u8 completion_bit = bp->cq.completion_bit; + + if (bp->cq.cons_idx == (bp->cq.ring_cnt - 1)) { + rx_cmp_hi = (struct rx_pkt_cmpl_hi *)bp->cq.bd_virt; + completion_bit ^= 0x1; /* Ring has wrapped. */ + } else { + rx_cmp_hi = (struct rx_pkt_cmpl_hi *)(rx_cmp + 1); + } + + if (!((rx_cmp_hi->errors_v2 & RX_PKT_CMPL_V2) ^ completion_bit)) + rx_process(bp, rx_cmp, rx_cmp_hi); + + return NO_MORE_CQ_BD_TO_SERVICE; +} + +static int bnxt_hwrm_ver_get(struct bnxt *bp) +{ + u16 cmd_len = (u16)sizeof(struct hwrm_ver_get_input); + struct hwrm_ver_get_input *req; + struct hwrm_ver_get_output *resp; + int rc; + + req = (struct hwrm_ver_get_input *)bp->hwrm_addr_req; + resp = (struct hwrm_ver_get_output *)bp->hwrm_addr_resp; + hwrm_init(bp, (void *)req, (u16)HWRM_VER_GET, cmd_len); + req->hwrm_intf_maj = HWRM_VERSION_MAJOR; + req->hwrm_intf_min = HWRM_VERSION_MINOR; + req->hwrm_intf_upd = HWRM_VERSION_UPDATE; + rc = wait_resp(bp, HWRM_CMD_DEFAULT_TIMEOUT, cmd_len, __func__); + if (rc) + return STATUS_FAILURE; + + bp->hwrm_spec_code = + resp->hwrm_intf_maj_8b << 16 | + resp->hwrm_intf_min_8b << 8 | + resp->hwrm_intf_upd_8b; + bp->hwrm_cmd_timeout = (u32)resp->def_req_timeout; + if (!bp->hwrm_cmd_timeout) + bp->hwrm_cmd_timeout = (u32)HWRM_CMD_DEFAULT_TIMEOUT; + + if (resp->hwrm_intf_maj_8b >= 1) + bp->hwrm_max_req_len = resp->max_req_win_len; + + bp->chip_id = + resp->chip_rev << 24 | + resp->chip_metal << 16 | + resp->chip_bond_id << 8 | + resp->chip_platform_type; + bp->chip_num = resp->chip_num; + if ((resp->dev_caps_cfg & SHORT_CMD_SUPPORTED) && + (resp->dev_caps_cfg & SHORT_CMD_REQUIRED)) + FLAG_SET(bp->flags, BNXT_FLAG_HWRM_SHORT_CMD_SUPP); + + bp->hwrm_max_ext_req_len = resp->max_ext_req_len; + bp->fw_maj = resp->hwrm_fw_maj_8b; + bp->fw_min = resp->hwrm_fw_min_8b; + bp->fw_bld = resp->hwrm_fw_bld_8b; + bp->fw_rsvd = resp->hwrm_fw_rsvd_8b; + print_fw_ver(resp, bp->hwrm_cmd_timeout); + + return STATUS_SUCCESS; +} + +/* Broadcom ethernet driver Function HW cmds APIs. */ +static int bnxt_hwrm_func_resource_qcaps(struct bnxt *bp) +{ + u16 cmd_len = (u16)sizeof(struct hwrm_func_resource_qcaps_input); + struct hwrm_func_resource_qcaps_input *req; + struct hwrm_func_resource_qcaps_output *resp; + int rc; + + req = (struct hwrm_func_resource_qcaps_input *)bp->hwrm_addr_req; + resp = (struct hwrm_func_resource_qcaps_output *)bp->hwrm_addr_resp; + hwrm_init(bp, (void *)req, (u16)HWRM_FUNC_RESOURCE_QCAPS, cmd_len); + req->fid = (u16)HWRM_NA_SIGNATURE; + rc = wait_resp(bp, bp->hwrm_cmd_timeout, cmd_len, __func__); + if (rc != STATUS_SUCCESS) + return STATUS_SUCCESS; + + FLAG_SET(bp->flags, BNXT_FLAG_RESOURCE_QCAPS_SUPPORT); + /* VFs */ + bp->max_vfs = resp->max_vfs; + bp->vf_res_strategy = resp->vf_reservation_strategy; + /* vNICs */ + bp->min_vnics = resp->min_vnics; + bp->max_vnics = resp->max_vnics; + /* MSI-X */ + bp->max_msix = resp->max_msix; + /* Ring Groups */ + bp->min_hw_ring_grps = resp->min_hw_ring_grps; + bp->max_hw_ring_grps = resp->max_hw_ring_grps; + /* TX Rings */ + bp->min_tx_rings = resp->min_tx_rings; + bp->max_tx_rings = resp->max_tx_rings; + /* RX Rings */ + bp->min_rx_rings = resp->min_rx_rings; + bp->max_rx_rings = resp->max_rx_rings; + /* Completion Rings */ + bp->min_cp_rings = resp->min_cmpl_rings; + bp->max_cp_rings = resp->max_cmpl_rings; + /* RSS Contexts */ + bp->min_rsscos_ctxs = resp->min_rsscos_ctx; + bp->max_rsscos_ctxs = resp->max_rsscos_ctx; + /* L2 Contexts */ + bp->min_l2_ctxs = resp->min_l2_ctxs; + bp->max_l2_ctxs = resp->max_l2_ctxs; + /* Statistic Contexts */ + bp->min_stat_ctxs = resp->min_stat_ctx; + bp->max_stat_ctxs = resp->max_stat_ctx; + dbg_func_resource_qcaps(bp); + + return STATUS_SUCCESS; +} + +static u32 set_ring_info(struct bnxt *bp) +{ + u32 enables = 0; + + bp->num_cmpl_rings = DEFAULT_NUMBER_OF_CMPL_RINGS; + bp->num_tx_rings = DEFAULT_NUMBER_OF_TX_RINGS; + bp->num_rx_rings = DEFAULT_NUMBER_OF_RX_RINGS; + bp->num_hw_ring_grps = DEFAULT_NUMBER_OF_RING_GRPS; + bp->num_stat_ctxs = DEFAULT_NUMBER_OF_STAT_CTXS; + if (bp->min_cp_rings <= DEFAULT_NUMBER_OF_CMPL_RINGS) + bp->num_cmpl_rings = bp->min_cp_rings; + + if (bp->min_tx_rings <= DEFAULT_NUMBER_OF_TX_RINGS) + bp->num_tx_rings = bp->min_tx_rings; + + if (bp->min_rx_rings <= DEFAULT_NUMBER_OF_RX_RINGS) + bp->num_rx_rings = bp->min_rx_rings; + + if (bp->min_hw_ring_grps <= DEFAULT_NUMBER_OF_RING_GRPS) + bp->num_hw_ring_grps = bp->min_hw_ring_grps; + + if (bp->min_stat_ctxs <= DEFAULT_NUMBER_OF_STAT_CTXS) + bp->num_stat_ctxs = bp->min_stat_ctxs; + + print_num_rings(bp); + enables = (FUNC_CFG_REQ_ENABLES_NUM_CMPL_RINGS | + FUNC_CFG_REQ_ENABLES_NUM_TX_RINGS | + FUNC_CFG_REQ_ENABLES_NUM_RX_RINGS | + FUNC_CFG_REQ_ENABLES_NUM_STAT_CTXS | + FUNC_CFG_REQ_ENABLES_NUM_HW_RING_GRPS); + + return enables; +} + +static void bnxt_hwrm_assign_resources(struct bnxt *bp) +{ + struct hwrm_func_cfg_input *req; + u32 enables = 0; + + if (FLAG_TEST(bp->flags, BNXT_FLAG_RESOURCE_QCAPS_SUPPORT)) + enables = set_ring_info(bp); + + req = (struct hwrm_func_cfg_input *)bp->hwrm_addr_req; + req->num_cmpl_rings = bp->num_cmpl_rings; + req->num_tx_rings = bp->num_tx_rings; + req->num_rx_rings = bp->num_rx_rings; + req->num_stat_ctxs = bp->num_stat_ctxs; + req->num_hw_ring_grps = bp->num_hw_ring_grps; + req->enables = enables; +} + +int bnxt_hwrm_nvm_flush(struct bnxt *bp) +{ + u16 cmd_len = (u16)sizeof(struct hwrm_nvm_flush_input); + struct hwrm_nvm_flush_input *req; + int rc; + + req = (struct hwrm_nvm_flush_input *)bp->hwrm_addr_req; + + hwrm_init(bp, (void *)req, (u16)HWRM_NVM_FLUSH, cmd_len); + + rc = wait_resp(bp, bp->hwrm_cmd_timeout, cmd_len, __func__); + if (rc) + return STATUS_FAILURE; + + return STATUS_SUCCESS; +} + +static int bnxt_hwrm_func_qcaps_req(struct bnxt *bp) +{ + u16 cmd_len = (u16)sizeof(struct hwrm_func_qcaps_input); + struct hwrm_func_qcaps_input *req; + struct hwrm_func_qcaps_output *resp; + int rc; + + req = (struct hwrm_func_qcaps_input *)bp->hwrm_addr_req; + resp = (struct hwrm_func_qcaps_output *)bp->hwrm_addr_resp; + hwrm_init(bp, (void *)req, (u16)HWRM_FUNC_QCAPS, cmd_len); + req->fid = (u16)HWRM_NA_SIGNATURE; + rc = wait_resp(bp, bp->hwrm_cmd_timeout, cmd_len, __func__); + if (rc) + return STATUS_FAILURE; + + bp->fid = resp->fid; + bp->port_idx = (u8)resp->port_id; + + /* Get MAC address for this PF */ + memcpy(&bp->mac_addr[0], &resp->mac_address[0], ETH_ALEN); + + memcpy(&bp->mac_set[0], &bp->mac_addr[0], ETH_ALEN); + + print_func_qcaps(bp); + + return STATUS_SUCCESS; +} + +static int bnxt_hwrm_func_qcfg_req(struct bnxt *bp) +{ + u16 cmd_len = (u16)sizeof(struct hwrm_func_qcfg_input); + struct hwrm_func_qcfg_input *req; + struct hwrm_func_qcfg_output *resp; + int rc; + + req = (struct hwrm_func_qcfg_input *)bp->hwrm_addr_req; + resp = (struct hwrm_func_qcfg_output *)bp->hwrm_addr_resp; + hwrm_init(bp, (void *)req, (u16)HWRM_FUNC_QCFG, cmd_len); + req->fid = (u16)HWRM_NA_SIGNATURE; + rc = wait_resp(bp, bp->hwrm_cmd_timeout, cmd_len, __func__); + if (rc) + return STATUS_FAILURE; + + if (resp->flags & FUNC_QCFG_RESP_FLAGS_MULTI_HOST) + FLAG_SET(bp->flags, BNXT_FLAG_MULTI_HOST); + + if (resp->port_partition_type & + FUNC_QCFG_RESP_PORT_PARTITION_TYPE_NPAR1_0) + FLAG_SET(bp->flags, BNXT_FLAG_NPAR_MODE); + + bp->ordinal_value = (u8)resp->pci_id & 0x0F; + bp->stat_ctx_id = resp->stat_ctx_id; + memcpy(&bp->mac_addr[0], &resp->mac_address[0], ETH_ALEN); + print_func_qcfg(bp); + dbg_flags(__func__, bp->flags); + + return STATUS_SUCCESS; +} + +static int bnxt_hwrm_func_reset_req(struct bnxt *bp) +{ + u16 cmd_len = (u16)sizeof(struct hwrm_func_reset_input); + struct hwrm_func_reset_input *req; + + req = (struct hwrm_func_reset_input *)bp->hwrm_addr_req; + hwrm_init(bp, (void *)req, (u16)HWRM_FUNC_RESET, cmd_len); + req->func_reset_level = FUNC_RESET_REQ_FUNC_RESET_LEVEL_RESETME; + + return wait_resp(bp, bp->hwrm_cmd_timeout, cmd_len, __func__); +} + +static int bnxt_hwrm_func_cfg_req(struct bnxt *bp) +{ + u16 cmd_len = (u16)sizeof(struct hwrm_func_cfg_input); + struct hwrm_func_cfg_input *req; + + req = (struct hwrm_func_cfg_input *)bp->hwrm_addr_req; + hwrm_init(bp, (void *)req, (u16)HWRM_FUNC_CFG, cmd_len); + req->fid = (u16)HWRM_NA_SIGNATURE; + bnxt_hwrm_assign_resources(bp); + + return wait_resp(bp, bp->hwrm_cmd_timeout, cmd_len, __func__); +} + +static int bnxt_hwrm_func_drv_rgtr(struct bnxt *bp) +{ + u16 cmd_len = (u16)sizeof(struct hwrm_func_drv_rgtr_input); + struct hwrm_func_drv_rgtr_input *req; + int rc; + + req = (struct hwrm_func_drv_rgtr_input *)bp->hwrm_addr_req; + hwrm_init(bp, (void *)req, (u16)HWRM_FUNC_DRV_RGTR, cmd_len); + /* Register with HWRM */ + req->enables = FUNC_DRV_RGTR_REQ_ENABLES_OS_TYPE | + FUNC_DRV_RGTR_REQ_ENABLES_ASYNC_EVENT_FWD | + FUNC_DRV_RGTR_REQ_ENABLES_VER; + req->async_event_fwd[0] |= 0x01; + req->os_type = FUNC_DRV_RGTR_REQ_OS_TYPE_OTHER; + req->ver_maj = DRIVER_VERSION_MAJOR; + req->ver_min = DRIVER_VERSION_MINOR; + req->ver_upd = DRIVER_VERSION_UPDATE; + rc = wait_resp(bp, bp->hwrm_cmd_timeout, cmd_len, __func__); + if (rc) + return STATUS_FAILURE; + + FLAG_SET(bp->flag_hwrm, VALID_DRIVER_REG); + + return STATUS_SUCCESS; +} + +static int bnxt_hwrm_func_drv_unrgtr(struct bnxt *bp) +{ + u16 cmd_len = (u16)sizeof(struct hwrm_func_drv_unrgtr_input); + struct hwrm_func_drv_unrgtr_input *req; + int rc; + + if (!(FLAG_TEST(bp->flag_hwrm, VALID_DRIVER_REG))) + return STATUS_SUCCESS; + + req = (struct hwrm_func_drv_unrgtr_input *)bp->hwrm_addr_req; + hwrm_init(bp, (void *)req, (u16)HWRM_FUNC_DRV_UNRGTR, cmd_len); + req->flags = FUNC_DRV_UNRGTR_REQ_FLAGS_PREPARE_FOR_SHUTDOWN; + rc = wait_resp(bp, bp->hwrm_cmd_timeout, cmd_len, __func__); + if (rc) + return STATUS_FAILURE; + + FLAG_RESET(bp->flag_hwrm, VALID_DRIVER_REG); + + return STATUS_SUCCESS; +} + +static int bnxt_hwrm_cfa_l2_filter_alloc(struct bnxt *bp) +{ + u16 cmd_len = (u16)sizeof(struct hwrm_cfa_l2_filter_alloc_input); + struct hwrm_cfa_l2_filter_alloc_input *req; + struct hwrm_cfa_l2_filter_alloc_output *resp; + int rc; + u32 flags = CFA_L2_FILTER_ALLOC_REQ_FLAGS_PATH_RX; + u32 enables; + + req = (struct hwrm_cfa_l2_filter_alloc_input *)bp->hwrm_addr_req; + resp = (struct hwrm_cfa_l2_filter_alloc_output *)bp->hwrm_addr_resp; + enables = CFA_L2_FILTER_ALLOC_REQ_ENABLES_DST_ID | + CFA_L2_FILTER_ALLOC_REQ_ENABLES_L2_ADDR | + CFA_L2_FILTER_ALLOC_REQ_ENABLES_L2_ADDR_MASK; + + hwrm_init(bp, (void *)req, (u16)HWRM_CFA_L2_FILTER_ALLOC, cmd_len); + req->flags = flags; + req->enables = enables; + memcpy((char *)&req->l2_addr[0], (char *)&bp->mac_set[0], ETH_ALEN); + memset((char *)&req->l2_addr_mask[0], 0xff, ETH_ALEN); + memcpy((char *)&req->t_l2_addr[0], (char *)&bp->mac_set[0], ETH_ALEN); + memset((char *)&req->t_l2_addr_mask[0], 0xff, ETH_ALEN); + req->src_type = CFA_L2_FILTER_ALLOC_REQ_SRC_TYPE_NPORT; + req->src_id = (u32)bp->port_idx; + req->dst_id = bp->vnic_id; + rc = wait_resp(bp, bp->hwrm_cmd_timeout, cmd_len, __func__); + if (rc) + return STATUS_FAILURE; + + FLAG_SET(bp->flag_hwrm, VALID_L2_FILTER); + bp->l2_filter_id = resp->l2_filter_id; + + return STATUS_SUCCESS; +} + +static int bnxt_hwrm_cfa_l2_filter_free(struct bnxt *bp) +{ + u16 cmd_len = (u16)sizeof(struct hwrm_cfa_l2_filter_free_input); + struct hwrm_cfa_l2_filter_free_input *req; + int rc; + + if (!(FLAG_TEST(bp->flag_hwrm, VALID_L2_FILTER))) + return STATUS_SUCCESS; + + req = (struct hwrm_cfa_l2_filter_free_input *)bp->hwrm_addr_req; + hwrm_init(bp, (void *)req, (u16)HWRM_CFA_L2_FILTER_FREE, cmd_len); + req->l2_filter_id = bp->l2_filter_id; + rc = wait_resp(bp, bp->hwrm_cmd_timeout, cmd_len, __func__); + if (rc) + return STATUS_FAILURE; + + FLAG_RESET(bp->flag_hwrm, VALID_L2_FILTER); + + return STATUS_SUCCESS; +} + +u32 bnxt_set_rx_mask(u32 rx_mask) +{ + u32 mask = 0; + + if (!rx_mask) + return mask; + mask = CFA_L2_SET_RX_MASK_REQ_MASK_BCAST; + if (rx_mask != RX_MASK_ACCEPT_NONE) { + if (rx_mask & RX_MASK_ACCEPT_MULTICAST) + mask |= CFA_L2_SET_RX_MASK_REQ_MASK_MCAST; + + if (rx_mask & RX_MASK_ACCEPT_ALL_MULTICAST) + mask |= CFA_L2_SET_RX_MASK_REQ_MASK_ALL_MCAST; + + if (rx_mask & RX_MASK_PROMISCUOUS_MODE) + mask |= CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS; + } + + return mask; +} + +static int bnxt_hwrm_set_rx_mask(struct bnxt *bp, u32 rx_mask) +{ + u16 cmd_len = (u16)sizeof(struct hwrm_cfa_l2_set_rx_mask_input); + struct hwrm_cfa_l2_set_rx_mask_input *req; + u32 mask = bnxt_set_rx_mask(rx_mask); + + req = (struct hwrm_cfa_l2_set_rx_mask_input *)bp->hwrm_addr_req; + hwrm_init(bp, (void *)req, (u16)HWRM_CFA_L2_SET_RX_MASK, cmd_len); + req->vnic_id = bp->vnic_id; + req->mask = mask; + + return wait_resp(bp, bp->hwrm_cmd_timeout, cmd_len, __func__); +} + +static int bnxt_hwrm_port_mac_cfg(struct bnxt *bp) +{ + u16 cmd_len = (u16)sizeof(struct hwrm_port_mac_cfg_input); + struct hwrm_port_mac_cfg_input *req; + + req = (struct hwrm_port_mac_cfg_input *)bp->hwrm_addr_req; + hwrm_init(bp, (void *)req, (u16)HWRM_PORT_MAC_CFG, cmd_len); + req->lpbk = PORT_MAC_CFG_REQ_LPBK_NONE; + + return wait_resp(bp, bp->hwrm_cmd_timeout, cmd_len, __func__); +} + +static int bnxt_hwrm_port_phy_qcfg(struct bnxt *bp, u16 idx) +{ + u16 cmd_len = (u16)sizeof(struct hwrm_port_phy_qcfg_input); + struct hwrm_port_phy_qcfg_input *req; + struct hwrm_port_phy_qcfg_output *resp; + int rc; + + req = (struct hwrm_port_phy_qcfg_input *)bp->hwrm_addr_req; + resp = (struct hwrm_port_phy_qcfg_output *)bp->hwrm_addr_resp; + hwrm_init(bp, (void *)req, (u16)HWRM_PORT_PHY_QCFG, cmd_len); + rc = wait_resp(bp, bp->hwrm_cmd_timeout, cmd_len, __func__); + if (rc) + return STATUS_FAILURE; + + if (idx & SUPPORT_SPEEDS) + bp->support_speeds = resp->support_speeds; + + if (idx & DETECT_MEDIA) + bp->media_detect = resp->module_status; + + if (idx & PHY_SPEED) + bp->current_link_speed = resp->link_speed; + + if (idx & PHY_STATUS) { + if (resp->link == PORT_PHY_QCFG_RESP_LINK_LINK) + bp->link_status = STATUS_LINK_ACTIVE; + else + bp->link_status = STATUS_LINK_DOWN; + } + + return STATUS_SUCCESS; +} + +u16 set_link_speed_mask(u16 link_cap) +{ + u16 speed_mask = 0; + + if (link_cap & SPEED_CAPABILITY_DRV_100M) + speed_mask |= PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_100MB; + + if (link_cap & SPEED_CAPABILITY_DRV_1G) + speed_mask |= PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_1GB; + + if (link_cap & SPEED_CAPABILITY_DRV_10G) + speed_mask |= PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_10GB; + + if (link_cap & SPEED_CAPABILITY_DRV_25G) + speed_mask |= PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_25GB; + + if (link_cap & SPEED_CAPABILITY_DRV_40G) + speed_mask |= PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_40GB; + + if (link_cap & SPEED_CAPABILITY_DRV_50G) + speed_mask |= PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_50GB; + + if (link_cap & SPEED_CAPABILITY_DRV_100G) + speed_mask |= PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_100GB; + + return speed_mask; +} + +static int bnxt_hwrm_port_phy_cfg(struct bnxt *bp) +{ + u16 cmd_len = (u16)sizeof(struct hwrm_port_phy_cfg_input); + struct hwrm_port_phy_cfg_input *req; + u32 flags; + u32 enables = 0; + u16 force_link_speed = 0; + u16 auto_link_speed_mask = 0; + u8 auto_mode = 0; + u8 auto_pause = 0; + u8 auto_duplex = 0; + + /* + * If multi_host or NPAR is set to TRUE, + * do not issue hwrm_port_phy_cfg + */ + if (FLAG_TEST(bp->flags, PORT_PHY_FLAGS)) { + dbg_flags(__func__, bp->flags); + return STATUS_SUCCESS; + } + + req = (struct hwrm_port_phy_cfg_input *)bp->hwrm_addr_req; + flags = PORT_PHY_CFG_REQ_FLAGS_FORCE | + PORT_PHY_CFG_REQ_FLAGS_RESET_PHY; + + switch (GET_MEDIUM_SPEED(bp->medium)) { + case MEDIUM_SPEED_1000MBPS: + force_link_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB; + break; + case MEDIUM_SPEED_10GBPS: + force_link_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB; + break; + case MEDIUM_SPEED_25GBPS: + force_link_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB; + break; + case MEDIUM_SPEED_40GBPS: + force_link_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB; + break; + case MEDIUM_SPEED_50GBPS: + force_link_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB; + break; + case MEDIUM_SPEED_100GBPS: + force_link_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_100GB; + break; + default: + /* Enable AUTONEG by default */ + auto_mode = PORT_PHY_CFG_REQ_AUTO_MODE_SPEED_MASK; + flags &= ~PORT_PHY_CFG_REQ_FLAGS_FORCE; + enables |= PORT_PHY_CFG_REQ_ENABLES_AUTO_MODE | + PORT_PHY_CFG_REQ_ENABLES_AUTO_LINK_SPEED_MASK | + PORT_PHY_CFG_REQ_ENABLES_AUTO_DUPLEX | + PORT_PHY_CFG_REQ_ENABLES_AUTO_PAUSE; + auto_pause = PORT_PHY_CFG_REQ_AUTO_PAUSE_TX | + PORT_PHY_CFG_REQ_AUTO_PAUSE_RX; + auto_duplex = PORT_PHY_CFG_REQ_AUTO_DUPLEX_BOTH; + auto_link_speed_mask = bp->support_speeds; + break; + } + + hwrm_init(bp, (void *)req, (u16)HWRM_PORT_PHY_CFG, cmd_len); + req->flags = flags; + req->enables = enables; + req->port_id = bp->port_idx; + req->force_link_speed = force_link_speed; + req->auto_mode = auto_mode; + req->auto_duplex = auto_duplex; + req->auto_pause = auto_pause; + req->auto_link_speed_mask = auto_link_speed_mask; + + return wait_resp(bp, bp->hwrm_cmd_timeout, cmd_len, __func__); +} + +static int bnxt_qphy_link(struct bnxt *bp) +{ + u16 flag = QCFG_PHY_ALL; + + /* Query Link Status */ + if (bnxt_hwrm_port_phy_qcfg(bp, flag) != STATUS_SUCCESS) + return STATUS_FAILURE; + + if (bp->link_status != STATUS_LINK_ACTIVE) { + /* + * Configure link if it is not up. + * try to bring link up, but don't return + * failure if port_phy_cfg() fails + */ + bnxt_hwrm_port_phy_cfg(bp); + /* refresh link speed values after bringing link up */ + if (bnxt_hwrm_port_phy_qcfg(bp, flag) != STATUS_SUCCESS) + return STATUS_FAILURE; + } + + return STATUS_SUCCESS; +} + +static int bnxt_hwrm_stat_ctx_alloc(struct bnxt *bp) +{ + u16 cmd_len = (u16)sizeof(struct hwrm_stat_ctx_alloc_input); + struct hwrm_stat_ctx_alloc_input *req; + struct hwrm_stat_ctx_alloc_output *resp; + int rc; + + req = (struct hwrm_stat_ctx_alloc_input *)bp->hwrm_addr_req; + resp = (struct hwrm_stat_ctx_alloc_output *)bp->hwrm_addr_resp; + hwrm_init(bp, (void *)req, (u16)HWRM_STAT_CTX_ALLOC, cmd_len); + rc = wait_resp(bp, bp->hwrm_cmd_timeout, cmd_len, __func__); + if (rc) + return STATUS_FAILURE; + + FLAG_SET(bp->flag_hwrm, VALID_STAT_CTX); + bp->stat_ctx_id = (u16)resp->stat_ctx_id; + + return STATUS_SUCCESS; +} + +static int bnxt_hwrm_stat_ctx_free(struct bnxt *bp) +{ + u16 cmd_len = (u16)sizeof(struct hwrm_stat_ctx_free_input); + struct hwrm_stat_ctx_free_input *req; + int rc; + + if (!(FLAG_TEST(bp->flag_hwrm, VALID_STAT_CTX))) + return STATUS_SUCCESS; + + req = (struct hwrm_stat_ctx_free_input *)bp->hwrm_addr_req; + hwrm_init(bp, (void *)req, (u16)HWRM_STAT_CTX_FREE, cmd_len); + req->stat_ctx_id = (u32)bp->stat_ctx_id; + rc = wait_resp(bp, bp->hwrm_cmd_timeout, cmd_len, __func__); + if (rc) + return STATUS_FAILURE; + + FLAG_RESET(bp->flag_hwrm, VALID_STAT_CTX); + + return STATUS_SUCCESS; +} + +static int bnxt_hwrm_ring_free_grp(struct bnxt *bp) +{ + u16 cmd_len = (u16)sizeof(struct hwrm_ring_grp_free_input); + struct hwrm_ring_grp_free_input *req; + int rc; + + if (!(FLAG_TEST(bp->flag_hwrm, VALID_RING_GRP))) + return STATUS_SUCCESS; + + req = (struct hwrm_ring_grp_free_input *)bp->hwrm_addr_req; + hwrm_init(bp, (void *)req, (u16)HWRM_RING_GRP_FREE, cmd_len); + req->ring_group_id = (u32)bp->ring_grp_id; + rc = wait_resp(bp, bp->hwrm_cmd_timeout, cmd_len, __func__); + if (rc) + return STATUS_FAILURE; + + FLAG_RESET(bp->flag_hwrm, VALID_RING_GRP); + + return STATUS_SUCCESS; +} + +static int bnxt_hwrm_ring_alloc_grp(struct bnxt *bp) +{ + u16 cmd_len = (u16)sizeof(struct hwrm_ring_grp_alloc_input); + struct hwrm_ring_grp_alloc_input *req; + struct hwrm_ring_grp_alloc_output *resp; + int rc; + + req = (struct hwrm_ring_grp_alloc_input *)bp->hwrm_addr_req; + resp = (struct hwrm_ring_grp_alloc_output *)bp->hwrm_addr_resp; + hwrm_init(bp, (void *)req, (u16)HWRM_RING_GRP_ALLOC, cmd_len); + req->cr = bp->cq_ring_id; + req->rr = bp->rx_ring_id; + req->ar = (u16)HWRM_NA_SIGNATURE; + rc = wait_resp(bp, bp->hwrm_cmd_timeout, cmd_len, __func__); + if (rc) + return STATUS_FAILURE; + + FLAG_SET(bp->flag_hwrm, VALID_RING_GRP); + bp->ring_grp_id = (u16)resp->ring_group_id; + + return STATUS_SUCCESS; +} + +int bnxt_hwrm_ring_free(struct bnxt *bp, u16 ring_id, u8 ring_type) +{ + u16 cmd_len = (u16)sizeof(struct hwrm_ring_free_input); + struct hwrm_ring_free_input *req; + + req = (struct hwrm_ring_free_input *)bp->hwrm_addr_req; + hwrm_init(bp, (void *)req, (u16)HWRM_RING_FREE, cmd_len); + req->ring_type = ring_type; + req->ring_id = ring_id; + + return wait_resp(bp, bp->hwrm_cmd_timeout, cmd_len, __func__); +} + +static int bnxt_hwrm_ring_alloc(struct bnxt *bp, + dma_addr_t ring_map, + u16 length, + u16 ring_id, + u8 ring_type, + u8 int_mode) +{ + u16 cmd_len = (u16)sizeof(struct hwrm_ring_alloc_input); + struct hwrm_ring_alloc_input *req; + struct hwrm_ring_alloc_output *resp; + int rc; + + req = (struct hwrm_ring_alloc_input *)bp->hwrm_addr_req; + resp = (struct hwrm_ring_alloc_output *)bp->hwrm_addr_resp; + hwrm_init(bp, (void *)req, (u16)HWRM_RING_ALLOC, cmd_len); + req->ring_type = ring_type; + req->page_tbl_addr = ring_map; + req->page_size = LM_PAGE_SIZE; + req->length = (u32)length; + req->cmpl_ring_id = ring_id; + req->int_mode = int_mode; + if (ring_type == RING_ALLOC_REQ_RING_TYPE_TX) { + req->queue_id = TX_RING_QID; + } else if (ring_type == RING_ALLOC_REQ_RING_TYPE_RX) { + req->queue_id = RX_RING_QID; + req->enables = RING_ALLOC_REQ_ENABLES_RX_BUF_SIZE_VALID; + req->rx_buf_size = MAX_ETHERNET_PACKET_BUFFER_SIZE; + } + + rc = wait_resp(bp, bp->hwrm_cmd_timeout, cmd_len, __func__); + if (rc) + return STATUS_FAILURE; + + if (ring_type == RING_ALLOC_REQ_RING_TYPE_L2_CMPL) { + FLAG_SET(bp->flag_hwrm, VALID_RING_CQ); + bp->cq_ring_id = resp->ring_id; + } else if (ring_type == RING_ALLOC_REQ_RING_TYPE_TX) { + FLAG_SET(bp->flag_hwrm, VALID_RING_TX); + bp->tx_ring_id = resp->ring_id; + } else if (ring_type == RING_ALLOC_REQ_RING_TYPE_RX) { + FLAG_SET(bp->flag_hwrm, VALID_RING_RX); + bp->rx_ring_id = resp->ring_id; + } + + return STATUS_SUCCESS; +} + +static int bnxt_hwrm_ring_alloc_cq(struct bnxt *bp) +{ + return bnxt_hwrm_ring_alloc(bp, + virt_to_bus(bp->cq.bd_virt), + bp->cq.ring_cnt, + 0, + RING_ALLOC_REQ_RING_TYPE_L2_CMPL, + BNXT_CQ_INTR_MODE()); +} + +static int bnxt_hwrm_ring_alloc_tx(struct bnxt *bp) +{ + return bnxt_hwrm_ring_alloc(bp, + virt_to_bus(bp->tx.bd_virt), + bp->tx.ring_cnt, bp->cq_ring_id, + RING_ALLOC_REQ_RING_TYPE_TX, + BNXT_INTR_MODE()); +} + +static int bnxt_hwrm_ring_alloc_rx(struct bnxt *bp) +{ + return bnxt_hwrm_ring_alloc(bp, + virt_to_bus(bp->rx.bd_virt), + bp->rx.ring_cnt, + bp->cq_ring_id, + RING_ALLOC_REQ_RING_TYPE_RX, + BNXT_INTR_MODE()); +} + +static int bnxt_hwrm_ring_free_cq(struct bnxt *bp) +{ + int ret = STATUS_SUCCESS; + + if (!(FLAG_TEST(bp->flag_hwrm, VALID_RING_CQ))) + return ret; + + ret = RING_FREE(bp, bp->cq_ring_id, RING_FREE_REQ_RING_TYPE_L2_CMPL); + if (ret == STATUS_SUCCESS) + FLAG_RESET(bp->flag_hwrm, VALID_RING_CQ); + + return ret; +} + +static int bnxt_hwrm_ring_free_tx(struct bnxt *bp) +{ + int ret = STATUS_SUCCESS; + + if (!(FLAG_TEST(bp->flag_hwrm, VALID_RING_TX))) + return ret; + + ret = RING_FREE(bp, bp->tx_ring_id, RING_FREE_REQ_RING_TYPE_TX); + if (ret == STATUS_SUCCESS) + FLAG_RESET(bp->flag_hwrm, VALID_RING_TX); + + return ret; +} + +static int bnxt_hwrm_ring_free_rx(struct bnxt *bp) +{ + int ret = STATUS_SUCCESS; + + if (!(FLAG_TEST(bp->flag_hwrm, VALID_RING_RX))) + return ret; + + ret = RING_FREE(bp, bp->rx_ring_id, RING_FREE_REQ_RING_TYPE_RX); + if (ret == STATUS_SUCCESS) + FLAG_RESET(bp->flag_hwrm, VALID_RING_RX); + + return ret; +} + +static int bnxt_hwrm_vnic_alloc(struct bnxt *bp) +{ + u16 cmd_len = (u16)sizeof(struct hwrm_vnic_alloc_input); + struct hwrm_vnic_alloc_input *req; + struct hwrm_vnic_alloc_output *resp; + int rc; + + req = (struct hwrm_vnic_alloc_input *)bp->hwrm_addr_req; + resp = (struct hwrm_vnic_alloc_output *)bp->hwrm_addr_resp; + hwrm_init(bp, (void *)req, (u16)HWRM_VNIC_ALLOC, cmd_len); + req->flags = VNIC_ALLOC_REQ_FLAGS_DEFAULT; + rc = wait_resp(bp, bp->hwrm_cmd_timeout, cmd_len, __func__); + if (rc) + return STATUS_FAILURE; + + FLAG_SET(bp->flag_hwrm, VALID_VNIC_ID); + bp->vnic_id = resp->vnic_id; + + return STATUS_SUCCESS; +} + +static int bnxt_hwrm_vnic_free(struct bnxt *bp) +{ + u16 cmd_len = (u16)sizeof(struct hwrm_vnic_free_input); + struct hwrm_vnic_free_input *req; + int rc; + + if (!(FLAG_TEST(bp->flag_hwrm, VALID_VNIC_ID))) + return STATUS_SUCCESS; + + req = (struct hwrm_vnic_free_input *)bp->hwrm_addr_req; + hwrm_init(bp, (void *)req, (u16)HWRM_VNIC_FREE, cmd_len); + req->vnic_id = bp->vnic_id; + rc = wait_resp(bp, bp->hwrm_cmd_timeout, cmd_len, __func__); + if (rc) + return STATUS_FAILURE; + + FLAG_RESET(bp->flag_hwrm, VALID_VNIC_ID); + + return STATUS_SUCCESS; +} + +static int bnxt_hwrm_vnic_cfg(struct bnxt *bp) +{ + u16 cmd_len = (u16)sizeof(struct hwrm_vnic_cfg_input); + struct hwrm_vnic_cfg_input *req; + + req = (struct hwrm_vnic_cfg_input *)bp->hwrm_addr_req; + hwrm_init(bp, (void *)req, (u16)HWRM_VNIC_CFG, cmd_len); + req->enables = VNIC_CFG_REQ_ENABLES_MRU; + req->mru = bp->mtu; + req->enables |= VNIC_CFG_REQ_ENABLES_DFLT_RING_GRP; + req->dflt_ring_grp = bp->ring_grp_id; + req->vnic_id = bp->vnic_id; + + return wait_resp(bp, bp->hwrm_cmd_timeout, cmd_len, __func__); +} + +static int set_phy_speed(struct bnxt *bp) +{ + char name[20]; + u16 flag = PHY_STATUS | PHY_SPEED | DETECT_MEDIA; + + /* Query Link Status */ + if (bnxt_hwrm_port_phy_qcfg(bp, flag) != STATUS_SUCCESS) + return STATUS_FAILURE; + + switch (bp->current_link_speed) { + case PORT_PHY_QCFG_RESP_LINK_SPEED_100GB: + sprintf(name, "%s %s", str_100, str_gbps); + break; + case PORT_PHY_QCFG_RESP_LINK_SPEED_50GB: + sprintf(name, "%s %s", str_50, str_gbps); + break; + case PORT_PHY_QCFG_RESP_LINK_SPEED_40GB: + sprintf(name, "%s %s", str_40, str_gbps); + break; + case PORT_PHY_QCFG_RESP_LINK_SPEED_25GB: + sprintf(name, "%s %s", str_25, str_gbps); + break; + case PORT_PHY_QCFG_RESP_LINK_SPEED_20GB: + sprintf(name, "%s %s", str_20, str_gbps); + break; + case PORT_PHY_QCFG_RESP_LINK_SPEED_10GB: + sprintf(name, "%s %s", str_10, str_gbps); + break; + case PORT_PHY_QCFG_RESP_LINK_SPEED_2_5GB: + sprintf(name, "%s %s", str_2_5, str_gbps); + break; + case PORT_PHY_QCFG_RESP_LINK_SPEED_2GB: + sprintf(name, "%s %s", str_2, str_gbps); + break; + case PORT_PHY_QCFG_RESP_LINK_SPEED_1GB: + sprintf(name, "%s %s", str_1, str_gbps); + break; + case PORT_PHY_QCFG_RESP_LINK_SPEED_100MB: + sprintf(name, "%s %s", str_100, str_mbps); + break; + case PORT_PHY_QCFG_RESP_LINK_SPEED_10MB: + sprintf(name, "%s %s", str_10, str_mbps); + break; + default: + sprintf(name, "%s %x", str_unknown, bp->current_link_speed); + } + + dbg_phy_speed(bp, name); + + return STATUS_SUCCESS; +} + +static int set_phy_link(struct bnxt *bp, u32 tmo) +{ + int ret; + + set_phy_speed(bp); + dbg_link_status(bp); + ret = STATUS_FAILURE; + if (bp->link_status == STATUS_LINK_ACTIVE) { + dbg_link_state(bp, tmo); + ret = STATUS_SUCCESS; + } + + return ret; +} + +static int get_phy_link(struct bnxt *bp) +{ + u16 flag = PHY_STATUS | PHY_SPEED | DETECT_MEDIA; + + dbg_chip_info(bp); + /* Query Link Status */ + if (bnxt_hwrm_port_phy_qcfg(bp, flag) != STATUS_SUCCESS) + return STATUS_FAILURE; + + set_phy_link(bp, 100); + + return STATUS_SUCCESS; +} + +static int bnxt_hwrm_set_async_event(struct bnxt *bp) +{ + int rc; + u16 cmd_len = (u16)sizeof(struct hwrm_func_cfg_input); + struct hwrm_func_cfg_input *req; + + req = (struct hwrm_func_cfg_input *)bp->hwrm_addr_req; + hwrm_init(bp, (void *)req, (u16)HWRM_FUNC_CFG, cmd_len); + req->fid = (u16)HWRM_NA_SIGNATURE; + req->enables = FUNC_CFG_REQ_ENABLES_ASYNC_EVENT_CR; + req->async_event_cr = bp->cq_ring_id; + rc = wait_resp(bp, bp->hwrm_cmd_timeout, cmd_len, __func__); + + return rc; +} + +int bnxt_hwrm_get_nvmem(struct bnxt *bp, + u16 data_len, + u16 option_num, + u16 dimensions, + u16 index_0) +{ + u16 cmd_len = (u16)sizeof(struct hwrm_nvm_get_variable_input); + struct hwrm_nvm_get_variable_input *req; + + req = (struct hwrm_nvm_get_variable_input *)bp->hwrm_addr_req; + hwrm_init(bp, (void *)req, (u16)HWRM_NVM_GET_VARIABLE, cmd_len); + req->dest_data_addr = bp->data_addr_mapping; + req->data_len = data_len; + req->option_num = option_num; + req->dimensions = dimensions; + req->index_0 = index_0; + + return wait_resp(bp, + HWRM_CMD_FLASH_MULTIPLAYER(bp->hwrm_cmd_timeout), + cmd_len, + __func__); +} + +static void set_medium(struct bnxt *bp) +{ + switch (bp->link_set & LINK_SPEED_DRV_MASK) { + case LINK_SPEED_DRV_1G: + bp->medium = SET_MEDIUM_SPEED(bp, MEDIUM_SPEED_1000MBPS); + break; + case LINK_SPEED_DRV_2_5G: + bp->medium = SET_MEDIUM_SPEED(bp, MEDIUM_SPEED_2500MBPS); + break; + case LINK_SPEED_DRV_10G: + bp->medium = SET_MEDIUM_SPEED(bp, MEDIUM_SPEED_10GBPS); + break; + case LINK_SPEED_DRV_25G: + bp->medium = SET_MEDIUM_SPEED(bp, MEDIUM_SPEED_25GBPS); + break; + case LINK_SPEED_DRV_40G: + bp->medium = SET_MEDIUM_SPEED(bp, MEDIUM_SPEED_40GBPS); + break; + case LINK_SPEED_DRV_50G: + bp->medium = SET_MEDIUM_SPEED(bp, MEDIUM_SPEED_50GBPS); + break; + case LINK_SPEED_DRV_100G: + bp->medium = SET_MEDIUM_SPEED(bp, MEDIUM_SPEED_100GBPS); + break; + case LINK_SPEED_DRV_200G: + bp->medium = SET_MEDIUM_SPEED(bp, MEDIUM_SPEED_200GBPS); + break; + case LINK_SPEED_DRV_AUTONEG: + bp->medium = SET_MEDIUM_SPEED(bp, MEDIUM_SPEED_AUTONEG); + break; + default: + bp->medium = SET_MEDIUM_DUPLEX(bp, MEDIUM_FULL_DUPLEX); + break; + } +} + +static int bnxt_hwrm_get_link_speed(struct bnxt *bp) +{ + u32 *ptr32 = (u32 *)bp->hwrm_addr_data; + + if (bnxt_hwrm_get_nvmem(bp, + 4, + (u16)LINK_SPEED_DRV_NUM, + 1, + (u16)bp->port_idx) != STATUS_SUCCESS) + return STATUS_FAILURE; + + bp->link_set = *ptr32; + bp->link_set &= SPEED_DRV_MASK; + set_medium(bp); + + return STATUS_SUCCESS; +} + +typedef int (*hwrm_func_t)(struct bnxt *bp); + +hwrm_func_t down_chip[] = { + bnxt_hwrm_cfa_l2_filter_free, /* Free l2 filter */ + bnxt_free_rx_iob, /* Free rx iob */ + bnxt_hwrm_vnic_free, /* Free vnic */ + bnxt_hwrm_ring_free_grp, /* Free ring group */ + bnxt_hwrm_ring_free_rx, /* Free rx ring */ + bnxt_hwrm_ring_free_tx, /* Free tx ring */ + bnxt_hwrm_ring_free_cq, /* Free CQ ring */ + bnxt_hwrm_stat_ctx_free, /* Free Stat ctx */ + bnxt_hwrm_func_drv_unrgtr, /* unreg driver */ + NULL, +}; + +hwrm_func_t bring_chip[] = { + bnxt_hwrm_ver_get, /* HWRM_VER_GET */ + bnxt_hwrm_func_reset_req, /* HWRM_FUNC_RESET */ + bnxt_hwrm_func_drv_rgtr, /* HWRM_FUNC_DRV_RGTR */ + bnxt_hwrm_func_resource_qcaps, /* HWRM_FUNC_RESOURCE_QCAPS */ + bnxt_hwrm_func_qcfg_req, /* HWRM_FUNC_QCFG */ + bnxt_hwrm_func_qcaps_req, /* HWRM_FUNC_QCAPS */ + bnxt_hwrm_get_link_speed, /* HWRM_NVM_GET_VARIABLE - 203 */ + bnxt_hwrm_port_mac_cfg, /* HWRM_PORT_MAC_CFG */ + bnxt_qphy_link, /* HWRM_PORT_PHY_QCFG */ + bnxt_hwrm_func_cfg_req, /* HWRM_FUNC_CFG - ring resource*/ + bnxt_hwrm_stat_ctx_alloc, /* Allocate Stat Ctx ID */ + bnxt_hwrm_ring_alloc_cq, /* Allocate CQ Ring */ + bnxt_hwrm_ring_alloc_tx, /* Allocate Tx ring */ + bnxt_hwrm_ring_alloc_rx, /* Allocate Rx Ring */ + bnxt_hwrm_ring_alloc_grp, /* Create Ring Group */ + post_rx_buffers, /* Post RX buffers */ + bnxt_hwrm_set_async_event, /* ENABLES_ASYNC_EVENT_CR */ + bnxt_hwrm_vnic_alloc, /* Alloc VNIC */ + bnxt_hwrm_vnic_cfg, /* Config VNIC */ + bnxt_hwrm_cfa_l2_filter_alloc, /* Alloc L2 Filter */ + get_phy_link, /* Get Physical Link */ + NULL, +}; + +int bnxt_hwrm_run(hwrm_func_t cmds[], struct bnxt *bp, int flag) +{ + hwrm_func_t *ptr; + int ret; + int status = STATUS_SUCCESS; + + for (ptr = cmds; *ptr; ++ptr) { + ret = (*ptr)(bp); + if (ret) { + status = STATUS_FAILURE; + /* Continue till all cleanup routines are called */ + if (flag) + return STATUS_FAILURE; + } + } + + return status; +} + +/* Broadcom ethernet driver Network interface APIs. */ +static int bnxt_start(struct udevice *dev) +{ + struct bnxt *bp = dev_get_priv(dev); + + if (bnxt_hwrm_set_rx_mask(bp, RX_MASK) != STATUS_SUCCESS) + return STATUS_FAILURE; + + bp->card_en = true; + return STATUS_SUCCESS; +} + +static int bnxt_send(struct udevice *dev, void *packet, int length) +{ + struct bnxt *bp = dev_get_priv(dev); + int len; + u16 entry; + dma_addr_t mapping; + + if (bnxt_tx_avail(bp) < 1) { + dbg_no_tx_bd(); + return -ENOBUFS; + } + + entry = bp->tx.prod_id; + len = iob_pad(packet, length); + mapping = virt_to_bus(packet); + set_txq(bp, entry, mapping, len); + entry = NEXT_IDX(entry, bp->tx.ring_cnt); + dump_tx_pkt(packet, mapping, len); + bnxt_db_tx(bp, (u32)entry); + bp->tx.prod_id = entry; + bp->tx.cnt_req++; + bnxt_tx_complete(bp); + + return 0; +} + +static void bnxt_link_evt(struct bnxt *bp, struct cmpl_base *cmp) +{ + struct hwrm_async_event_cmpl *evt; + + evt = (struct hwrm_async_event_cmpl *)cmp; + switch (evt->event_id) { + case ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE: + if (evt->event_data1 & 0x01) + bp->link_status = STATUS_LINK_ACTIVE; + else + bp->link_status = STATUS_LINK_DOWN; + + set_phy_link(bp, 0); + break; + default: + break; + } +} + +static int bnxt_recv(struct udevice *dev, int flags, uchar **packetp) +{ + struct bnxt *bp = dev_get_priv(dev); + struct cmpl_base *cmp; + u16 old_cons_idx = bp->cq.cons_idx; + int done = SERVICE_NEXT_CQ_BD; + u32 cq_type; + + while (done == SERVICE_NEXT_CQ_BD) { + cmp = (struct cmpl_base *)BD_NOW(bp->cq.bd_virt, + bp->cq.cons_idx, + sizeof(struct cmpl_base)); + if ((cmp->info3_v & CMPL_BASE_V) ^ bp->cq.completion_bit) + break; + + cq_type = cmp->type & CMPL_BASE_TYPE_MASK; + dump_evt((u8 *)cmp, cq_type, bp->cq.cons_idx); + dump_CQ(cmp, bp->cq.cons_idx); + switch (cq_type) { + case CMPL_BASE_TYPE_HWRM_ASYNC_EVENT: + bnxt_link_evt(bp, cmp); + fallthrough; + case CMPL_BASE_TYPE_TX_L2: + case CMPL_BASE_TYPE_STAT_EJECT: + bnxt_adv_cq_index(bp, 1); + break; + case CMPL_BASE_TYPE_RX_L2: + done = bnxt_rx_complete(bp, (struct rx_pkt_cmpl *)cmp); + break; + default: + done = NO_MORE_CQ_BD_TO_SERVICE; + break; + } + } + + if (bp->cq.cons_idx != old_cons_idx) + bnxt_db_cq(bp); + + if (bp->rx.iob_recv == PKT_RECEIVED) { + *packetp = bp->rx.iob_rx; + return bp->rx.iob_len; + } + + return -EAGAIN; +} + +static void bnxt_stop(struct udevice *dev) +{ + struct bnxt *bp = dev_get_priv(dev); + + if (bp->card_en) { + bnxt_hwrm_set_rx_mask(bp, 0); + bp->card_en = false; + } +} + +static int bnxt_free_pkt(struct udevice *dev, uchar *packet, int length) +{ + struct bnxt *bp = dev_get_priv(dev); + + dbg_rx_pkt(bp, __func__, packet, length); + bp->rx.iob_recv = PKT_DONE; + bp->rx.iob_len = 0; + bp->rx.iob_rx = NULL; + + return 0; +} + +static int bnxt_read_rom_hwaddr(struct udevice *dev) +{ + struct eth_pdata *plat = dev_get_plat(dev); + struct bnxt *bp = dev_get_priv(dev); + + memcpy(plat->enetaddr, bp->mac_set, ETH_ALEN); + + return 0; +} + +static const struct eth_ops bnxt_eth_ops = { + .start = bnxt_start, + .send = bnxt_send, + .recv = bnxt_recv, + .stop = bnxt_stop, + .free_pkt = bnxt_free_pkt, + .read_rom_hwaddr = bnxt_read_rom_hwaddr, +}; + +static const struct udevice_id bnxt_eth_ids[] = { + { .compatible = "broadcom,nxe" }, + { } +}; + +static int bnxt_eth_bind(struct udevice *dev) +{ + char name[20]; + + sprintf(name, "bnxt_eth%u", dev_seq(dev)); + + return device_set_name(dev, name); +} + +static int bnxt_eth_probe(struct udevice *dev) +{ + struct bnxt *bp = dev_get_priv(dev); + int ret; + + ret = bnxt_alloc_mem(bp); + if (ret) { + printf("*** error: bnxt_alloc_mem failed! ***\n"); + return ret; + } + + bp->cardnum = dev_seq(dev); + bp->name = dev->name; + bp->pdev = (struct udevice *)dev; + + bnxt_bring_pci(bp); + + ret = bnxt_bring_chip(bp); + if (ret) { + printf("*** error: bnxt_bring_chip failed! ***\n"); + return -ENODATA; + } + + return 0; +} + +static int bnxt_eth_remove(struct udevice *dev) +{ + struct bnxt *bp = dev_get_priv(dev); + + bnxt_down_chip(bp); + bnxt_free_mem(bp); + + return 0; +} + +static struct pci_device_id bnxt_nics[] = { + {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_NXT_57320)}, + {} +}; + +U_BOOT_DRIVER(eth_bnxt) = { + .name = "eth_bnxt", + .id = UCLASS_ETH, + .of_match = bnxt_eth_ids, + .bind = bnxt_eth_bind, + .probe = bnxt_eth_probe, + .remove = bnxt_eth_remove, + .ops = &bnxt_eth_ops, + .priv_auto = sizeof(struct bnxt), + .plat_auto = sizeof(struct eth_pdata), + .flags = DM_FLAG_ACTIVE_DMA, +}; + +U_BOOT_PCI_DEVICE(eth_bnxt, bnxt_nics); diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h new file mode 100644 index 0000000000000000000000000000000000000000..6c648272af1b1a7c7572ae57ebaf8b21bb34ae89 --- /dev/null +++ b/drivers/net/bnxt/bnxt.h @@ -0,0 +1,390 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2019-2021 Broadcom. + */ + +#ifndef _BNXT_H_ +#define _BNXT_H_ + +#include +#include + +#include "bnxt_hsi.h" + +union dma_addr64_t { + dma_addr_t addr; + u64 as_u64; +}; + +#define DRIVER_VERSION_MAJOR 1 +#define DRIVER_VERSION_MINOR 0 +#define DRIVER_VERSION_UPDATE 0 + +/* Broadcom ethernet driver defines. */ +#define FLAG_SET(f, b) ((f) |= (b)) +#define FLAG_TEST(f, b) ((f) & (b)) +#define FLAG_RESET(f, b) ((f) &= ~(b)) +#define BNXT_FLAG_HWRM_SHORT_CMD_SUPP BIT(0) +#define BNXT_FLAG_HWRM_SHORT_CMD_REQ BIT(1) +#define BNXT_FLAG_RESOURCE_QCAPS_SUPPORT BIT(2) +#define BNXT_FLAG_MULTI_HOST BIT(3) +#define BNXT_FLAG_NPAR_MODE BIT(4) +/******************************************************************************* + * Status codes. + ******************************************************************************/ +#define STATUS_SUCCESS 0 +#define STATUS_FAILURE 1 +#define STATUS_LINK_ACTIVE 4 +#define STATUS_LINK_DOWN 5 +#define STATUS_TIMEOUT 0xffff +/******************************************************************************* + * Receive filter masks. + ******************************************************************************/ +#define RX_MASK_ACCEPT_NONE 0x0000 +#define RX_MASK_ACCEPT_MULTICAST 0x0002 +#define RX_MASK_ACCEPT_ALL_MULTICAST 0x0004 +#define RX_MASK_ACCEPT_BROADCAST 0x0008 +#define RX_MASK_PROMISCUOUS_MODE 0x10000 +/******************************************************************************* + * media speed. + ******************************************************************************/ +#define MEDIUM_SPEED_AUTONEG 0x0000L +#define MEDIUM_SPEED_1000MBPS 0x0300L +#define MEDIUM_SPEED_2500MBPS 0x0400L +#define MEDIUM_SPEED_10GBPS 0x0600L +#define MEDIUM_SPEED_25GBPS 0x0800L +#define MEDIUM_SPEED_40GBPS 0x0900L +#define MEDIUM_SPEED_50GBPS 0x0a00L +#define MEDIUM_SPEED_100GBPS 0x0b00L +#define MEDIUM_SPEED_200GBPS 0x0c00L +#define MEDIUM_SPEED_MASK 0xff00L +#define GET_MEDIUM_SPEED(m) ((m) & MEDIUM_SPEED_MASK) +#define SET_MEDIUM_SPEED(bp, s) (((bp)->medium & ~MEDIUM_SPEED_MASK) | (s)) +#define MEDIUM_UNKNOWN_DUPLEX 0x00000L +#define MEDIUM_FULL_DUPLEX 0x00000L +#define MEDIUM_HALF_DUPLEX 0x10000L +#define GET_MEDIUM_DUPLEX(m) ((m) & MEDIUM_HALF_DUPLEX) +#define SET_MEDIUM_DUPLEX(bp, d) (((bp)->medium & ~MEDIUM_HALF_DUPLEX) | (d)) +#define MEDIUM_SELECTIVE_AUTONEG 0x01000000L +#define GET_MEDIUM_AUTONEG_MODE(m) ((m) & 0xff000000L) +#define GRC_COM_CHAN_BASE 0 +#define GRC_COM_CHAN_TRIG 0x100 +#define HWRM_CMD_DEFAULT_TIMEOUT 500 /* in Miliseconds */ +#define HWRM_CMD_POLL_WAIT_TIME 100 /* In MicroeSconds */ +#define HWRM_CMD_DEFAULT_MULTIPLAYER(a) ((a) * 10) +#define HWRM_CMD_FLASH_MULTIPLAYER(a) ((a) * 100) +#define HWRM_CMD_FLASH_ERASE_MULTIPLAYER(a) ((a) * 1000) +#define MAX_ETHERNET_PACKET_BUFFER_SIZE 1536 +#define DEFAULT_NUMBER_OF_CMPL_RINGS 0x01 +#define DEFAULT_NUMBER_OF_TX_RINGS 0x01 +#define DEFAULT_NUMBER_OF_RX_RINGS 0x01 +#define DEFAULT_NUMBER_OF_RING_GRPS 0x01 +#define DEFAULT_NUMBER_OF_STAT_CTXS 0x01 +#define NUM_RX_BUFFERS 512 +#define MAX_RX_DESC_CNT 1024 +#define MAX_TX_DESC_CNT 512 +#define MAX_CQ_DESC_CNT 2048 +#define TX_RING_DMA_BUFFER_SIZE (MAX_TX_DESC_CNT * sizeof(struct tx_bd_short)) +#define RX_RING_DMA_BUFFER_SIZE \ + (MAX_RX_DESC_CNT * sizeof(struct rx_prod_pkt_bd)) +#define CQ_RING_DMA_BUFFER_SIZE (MAX_CQ_DESC_CNT * sizeof(struct cmpl_base)) +#define BNXT_DMA_ALIGNMENT 256 //64 +#define REQ_BUFFER_SIZE 1024 +#define RESP_BUFFER_SIZE 1024 +#define DMA_BUFFER_SIZE 1024 +#define LM_PAGE_BITS 8 +#define BNXT_RX_STD_DMA_SZ 1536 +#define NEXT_IDX(N, S) (((N) + 1) & ((S) - 1)) +#define BD_NOW(bd, entry, len) (&((u8 *)(bd))[(entry) * (len)]) +#define BNXT_CQ_INTR_MODE() RING_ALLOC_REQ_INT_MODE_POLL +#define BNXT_INTR_MODE() RING_ALLOC_REQ_INT_MODE_POLL +/* Set default link timeout period to 500 millseconds */ +#define LINK_DEFAULT_TIMEOUT 500 +#define RX_MASK \ + (RX_MASK_ACCEPT_BROADCAST | \ + RX_MASK_ACCEPT_ALL_MULTICAST | \ + RX_MASK_ACCEPT_MULTICAST) +#define TX_RING_QID ((u16)bp->port_idx * 10) +#define RX_RING_QID 0 +#define LM_PAGE_SIZE LM_PAGE_BITS +#define virt_to_bus(a) ((dma_addr_t)(a)) +#define REQ_BUF_SIZE_ALIGNED ALIGN(REQ_BUFFER_SIZE, BNXT_DMA_ALIGNMENT) +#define RESP_BUF_SIZE_ALIGNED ALIGN(RESP_BUFFER_SIZE, BNXT_DMA_ALIGNMENT) +#define DMA_BUF_SIZE_ALIGNED ALIGN(DMA_BUFFER_SIZE, BNXT_DMA_ALIGNMENT) +#define RX_STD_DMA_ALIGNED ALIGN(BNXT_RX_STD_DMA_SZ, BNXT_DMA_ALIGNMENT) +#define PCI_COMMAND_INTX_DISABLE 0x0400 /* Interrupt disable */ +#define TX_AVAIL(r) ((r) - 1) +#define NO_MORE_CQ_BD_TO_SERVICE 1 +#define SERVICE_NEXT_CQ_BD 0 +#define PHY_STATUS 0x0001 +#define PHY_SPEED 0x0002 +#define DETECT_MEDIA 0x0004 +#define SUPPORT_SPEEDS 0x0008 +#define str_1 "1" +#define str_2 "2" +#define str_2_5 "2.5" +#define str_10 "10" +#define str_20 "20" +#define str_25 "25" +#define str_40 "40" +#define str_50 "50" +#define str_100 "100" +#define str_gbps "Gbps" +#define str_mbps "Mbps" +#define str_unknown "Unknown" +/* Broadcom ethernet driver nvm defines. */ +/* nvm cfg 1 - MAC settings */ +#define FUNC_MAC_ADDR_NUM 1 +/* nvm cfg 203 - u32 link_settings */ +#define LINK_SPEED_DRV_NUM 203 +#define LINK_SPEED_DRV_MASK 0x0000000F +#define LINK_SPEED_DRV_SHIFT 0 +#define LINK_SPEED_DRV_AUTONEG 0x0 +#define LINK_SPEED_DRV_1G 0x1 +#define LINK_SPEED_DRV_10G 0x2 +#define LINK_SPEED_DRV_25G 0x3 +#define LINK_SPEED_DRV_40G 0x4 +#define LINK_SPEED_DRV_50G 0x5 +#define LINK_SPEED_DRV_100G 0x6 +#define LINK_SPEED_DRV_200G 0x7 +#define LINK_SPEED_DRV_2_5G 0xE +#define LINK_SPEED_DRV_100M 0xF +/* nvm cfg 201 - u32 speed_cap_mask */ +#define SPEED_CAPABILITY_DRV_1G 0x1 +#define SPEED_CAPABILITY_DRV_10G 0x2 +#define SPEED_CAPABILITY_DRV_25G 0x4 +#define SPEED_CAPABILITY_DRV_40G 0x8 +#define SPEED_CAPABILITY_DRV_50G 0x10 +#define SPEED_CAPABILITY_DRV_100G 0x20 +#define SPEED_CAPABILITY_DRV_100M 0x8000 +/* nvm cfg 202 */ +/* nvm cfg 205 */ +#define LINK_SPEED_FW_NUM 205 +/* nvm cfg 210 */ +/* nvm cfg 211 */ +/* nvm cfg 213 */ +#define SPEED_DRV_MASK LINK_SPEED_DRV_MASK +/****************************************************************************** + * Doorbell info. + *****************************************************************************/ +#define RX_DOORBELL_KEY_RX (0x1UL << 28) +#define TX_DOORBELL_KEY_TX (0x0UL << 28) + +#define CMPL_DOORBELL_IDX_VALID 0x4000000UL +#define CMPL_DOORBELL_KEY_CMPL (0x2UL << 28) + +/****************************************************************************** + * Transmit info. + *****************************************************************************/ +struct tx_bd_short { + u16 flags_type; +#define TX_BD_SHORT_TYPE_TX_BD_SHORT 0x0UL +#define TX_BD_SHORT_FLAGS_PACKET_END 0x40UL +#define TX_BD_SHORT_FLAGS_NO_CMPL 0x80UL +#define TX_BD_SHORT_FLAGS_BD_CNT_SFT 8 +#define TX_BD_SHORT_FLAGS_LHINT_LT512 (0x0UL << 13) +#define TX_BD_SHORT_FLAGS_LHINT_LT1K (0x1UL << 13) +#define TX_BD_SHORT_FLAGS_LHINT_LT2K (0x2UL << 13) +#define TX_BD_SHORT_FLAGS_LHINT_GTE2K (0x3UL << 13) +#define TX_BD_SHORT_FLAGS_COAL_NOW 0x8000UL + u16 len; + u32 opaque; + union dma_addr64_t dma; +}; + +struct lm_tx_info_t { + void *bd_virt; + u16 prod_id; /* Tx producer index. */ + u16 cons_id; + u16 ring_cnt; + u32 cnt; /* Tx statistics. */ + u32 cnt_req; +}; + +struct cmpl_base { + u16 type; +#define CMPL_BASE_TYPE_MASK 0x3fUL +#define CMPL_BASE_TYPE_TX_L2 0x0UL +#define CMPL_BASE_TYPE_RX_L2 0x11UL +#define CMPL_BASE_TYPE_STAT_EJECT 0x1aUL +#define CMPL_BASE_TYPE_HWRM_ASYNC_EVENT 0x2eUL + u16 info1; + u32 info2; + u32 info3_v; +#define CMPL_BASE_V 0x1UL + u32 info4; +}; + +struct lm_cmp_info_t { + void *bd_virt; + u16 cons_idx; + u16 ring_cnt; + u8 completion_bit; + u8 res[3]; +}; + +struct rx_pkt_cmpl { + u16 flags_type; + u16 len; + u32 opaque; + u8 agg_bufs_v1; + u8 rss_hash_type; + u8 payload_offset; + u8 unused1; + u32 rss_hash; +}; + +struct rx_pkt_cmpl_hi { + u32 flags2; + u32 metadata; + u16 errors_v2; +#define RX_PKT_CMPL_V2 0x1UL +#define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_SFT 1 + u16 cfa_code; + u32 reorder; +}; + +struct rx_prod_pkt_bd { + u16 flags_type; +#define RX_PROD_PKT_BD_TYPE_RX_PROD_PKT 0x4UL + u16 len; + u32 opaque; + union dma_addr64_t dma; +}; + +struct lm_rx_info_t { + void *bd_virt; + void *iob[NUM_RX_BUFFERS]; + void *iob_rx; + u16 iob_len; + u16 iob_recv; + u16 iob_cnt; + u16 buf_cnt; /* Total Rx buffer descriptors. */ + u16 ring_cnt; + u16 cons_idx; /* Last processed consumer index. */ + u32 rx_cnt; + u32 rx_buf_cnt; + u32 err; + u32 crc; + u32 dropped; +}; + +#define VALID_DRIVER_REG 0x0001 +#define VALID_STAT_CTX 0x0002 +#define VALID_RING_CQ 0x0004 +#define VALID_RING_TX 0x0008 +#define VALID_RING_RX 0x0010 +#define VALID_RING_GRP 0x0020 +#define VALID_VNIC_ID 0x0040 +#define VALID_RX_IOB 0x0080 +#define VALID_L2_FILTER 0x0100 + +enum RX_FLAGS { + PKT_DONE = 0, + PKT_RECEIVED = 1, + PKT_DROPPED = 2, +}; + +struct bnxt { + struct udevice *pdev; + const char *name; + unsigned int cardnum; + void *hwrm_addr_req; + void *hwrm_addr_resp; + void *hwrm_addr_data; + dma_addr_t data_addr_mapping; + dma_addr_t req_addr_mapping; + dma_addr_t resp_addr_mapping; + struct lm_tx_info_t tx; /* Tx info. */ + struct lm_rx_info_t rx; /* Rx info. */ + struct lm_cmp_info_t cq; /* completion info. */ + u16 last_resp_code; + u16 seq_id; + u32 flag_hwrm; + u32 flags; + u16 vendor_id; + u16 device_id; + u16 subsystem_vendor; + u16 subsystem_device; + u16 cmd_reg; + u8 irq; + void __iomem *bar0; + void __iomem *bar1; + void __iomem *bar2; + u16 chip_num; + /* chip num:16-31, rev:12-15, metal:4-11, bond_id:0-3 */ + u32 chip_id; + u32 hwrm_cmd_timeout; + u16 hwrm_spec_code; + u16 hwrm_max_req_len; + u16 hwrm_max_ext_req_len; + u8 fw_maj; + u8 fw_min; + u8 fw_bld; + u8 fw_rsvd; + u8 mac_addr[ETH_ALEN]; /* HW MAC address */ + u8 mac_set[ETH_ALEN]; /* NVM Configured MAC */ + u16 fid; + u8 port_idx; + u8 ordinal_value; + u16 mtu; + u16 ring_grp_id; + u16 cq_ring_id; + u16 tx_ring_id; + u16 rx_ring_id; + u16 current_link_speed; + u16 link_status; + u16 wait_link_timeout; + u64 l2_filter_id; + u16 vnic_id; + u16 stat_ctx_id; + u32 medium; + u16 support_speeds; + u32 link_set; + u8 media_detect; + u8 media_change; + u16 max_vfs; + u16 vf_res_strategy; + u16 min_vnics; + u16 max_vnics; + u16 max_msix; + u16 min_hw_ring_grps; + u16 max_hw_ring_grps; + u16 min_tx_rings; + u16 max_tx_rings; + u16 min_rx_rings; + u16 max_rx_rings; + u16 min_cp_rings; + u16 max_cp_rings; + u16 min_rsscos_ctxs; + u16 max_rsscos_ctxs; + u16 min_l2_ctxs; + u16 max_l2_ctxs; + u16 min_stat_ctxs; + u16 max_stat_ctxs; + u16 num_cmpl_rings; + u16 num_tx_rings; + u16 num_rx_rings; + u16 num_stat_ctxs; + u16 num_hw_ring_grps; + bool card_en; +}; + +#define SHORT_CMD_SUPPORTED VER_GET_RESP_DEV_CAPS_CFG_SHORT_CMD_SUPPORTED +#define SHORT_CMD_REQUIRED VER_GET_RESP_DEV_CAPS_CFG_SHORT_CMD_REQUIRED +#define CQ_DOORBELL_KEY_IDX(a) \ + (CMPL_DOORBELL_KEY_CMPL | \ + CMPL_DOORBELL_IDX_VALID | \ + (u32)(a)) +#define TX_BD_FLAGS \ + (TX_BD_SHORT_TYPE_TX_BD_SHORT | \ + TX_BD_SHORT_FLAGS_NO_CMPL | \ + TX_BD_SHORT_FLAGS_COAL_NOW | \ + TX_BD_SHORT_FLAGS_PACKET_END | \ + (1 << TX_BD_SHORT_FLAGS_BD_CNT_SFT)) +#define MEM_HWRM_RESP memalign(BNXT_DMA_ALIGNMENT, RESP_BUF_SIZE_ALIGNED) +#define PORT_PHY_FLAGS (BNXT_FLAG_NPAR_MODE | BNXT_FLAG_MULTI_HOST) +#define RING_FREE(bp, rid, flag) bnxt_hwrm_ring_free(bp, rid, flag) +#define QCFG_PHY_ALL (SUPPORT_SPEEDS | DETECT_MEDIA | PHY_SPEED | PHY_STATUS) + +#endif /* _BNXT_H_ */ diff --git a/drivers/net/bnxt/bnxt_dbg.h b/drivers/net/bnxt/bnxt_dbg.h new file mode 100644 index 0000000000000000000000000000000000000000..e9e9f6efefd7477db034eca9db70c8c52f0cf21b --- /dev/null +++ b/drivers/net/bnxt/bnxt_dbg.h @@ -0,0 +1,536 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2019-2021 Broadcom. + */ + +#ifndef _BXNT_DBG_H_ +#define _BXNT_DBG_H_ + +/* Adjust commented out lines below to enable debug. */ +/* #define DEBUG_PCI */ +/* #define DEBUG_MEMORY */ +/* #define DEBUG_LINK */ +/* #define DEBUG_CHIP */ +/* #define DEBUG_FAIL */ +/* #define DEBUG_HWRM_CMDS */ +/* #define DEBUG_HWRM_DUMP */ +/* #define DEBUG_CQ */ +/* #define DEBUG_CQ_DUMP */ +/* #define DEBUG_TX */ +/* #define DEBUG_TX_DUMP */ +/* #define DEBUG_RX */ +/* #define DEBUG_RX_DUMP */ + +#if \ + defined(DEBUG_PCI) || \ + defined(DEBUG_MEMORY) || \ + defined(DEBUG_LINK) || \ + defined(DEBUG_CHIP) || \ + defined(DEBUG_FAIL) || \ + defined(DEBUG_HWRM_CMDS) || \ + defined(DEBUG_HWRM_DUMP) || \ + defined(DEBUG_CQ) || \ + defined(DEBUG_CQ_DUMP) || \ + defined(DEBUG_TX) || \ + defined(DEBUG_TX_DUMP) || \ + defined(DEBUG_RX) || \ + defined(DEBUG_RX_DUMP) +#define DEBUG_DEFAULT +#endif + +#if defined(DEBUG_DEFAULT) +#define dbg_prn printf +#define MAX_CHAR_SIZE(a) (u32)((1 << (a)) - 1) +#define DISP_U8 0x00 +#define DISP_U16 0x01 +#define DISP_U32 0x02 +#define DISP_U64 0x03 + +void dumpmemory1(u8 *buffer, u32 length, u8 flag) +{ + u32 jj = 0; + u8 i, c; + + printf("\n %p:", buffer); + for (jj = 0; jj < 16; jj++) { + if (!(jj & MAX_CHAR_SIZE(flag))) + printf(" "); + if (jj < length) + printf("%02x", buffer[jj]); + else + printf(" "); + if ((jj & 0xF) == 0xF) { + printf(" "); + for (i = 0; i < 16; i++) { + if (i < length) { + c = buffer[jj + i - 15]; + if (c >= 0x20 && c < 0x7F) + ; + else + c = '.'; + printf("%c", c); + } + } + } + } +} + +void dump_mem(u8 *buffer, u32 length, u8 flag) +{ + u32 length16, remlen, jj; + + length16 = length & 0xFFFFFFF0; + remlen = length & 0xF; + for (jj = 0; jj < length16; jj += 16) + dumpmemory1((u8 *)&buffer[jj], 16, flag); + if (remlen) + dumpmemory1((u8 *)&buffer[length16], remlen, flag); + if (length16 || remlen) + printf("\n"); +} +#endif + +#if defined(DEBUG_PCI) +void dbg_pci(struct bnxt *bp, const char *func, u16 cmd_reg) +{ + printf("- %s()\n", func); + printf(" Vendor id : %04X\n", bp->vendor_id); + printf(" Device id : %04X\n", bp->device_id); + printf(" Irq : %d\n", bp->irq); + printf(" PCI Command Reg : %04X %04X\n", bp->cmd_reg, cmd_reg); + printf(" Sub Vendor id : %04X\n", bp->subsystem_vendor); + printf(" Sub Device id : %04X\n", bp->subsystem_device); + printf(" BAR (0) : %p\n", bp->bar0); + printf(" BAR (1) : %p\n", bp->bar1); + printf(" BAR (2) : %p\n", bp->bar2); +} +#else +#define dbg_pci(bp, func, creg) +#endif + +#if defined(DEBUG_MEMORY) +void dbg_mem(struct bnxt *bp, const char *func) +{ + printf("- %s()\n", func); + printf(" bp Addr : %p", bp); + printf(" Len %4d", (u16)sizeof(struct bnxt)); + printf(" phy %llx\n", virt_to_bus(bp)); + printf(" bp->hwrm_req_addr : %p", bp->hwrm_addr_req); + printf(" Len %4d", (u16)REQ_BUFFER_SIZE); + printf(" phy %llx\n", bp->req_addr_mapping); + printf(" bp->hwrm_resp_addr : %p", bp->hwrm_addr_resp); + printf(" Len %4d", (u16)RESP_BUFFER_SIZE); + printf(" phy %llx\n", bp->resp_addr_mapping); + printf(" bp->tx.bd_virt : %p", bp->tx.bd_virt); + printf(" Len %4d", (u16)TX_RING_DMA_BUFFER_SIZE); + printf(" phy %llx\n", virt_to_bus(bp->tx.bd_virt)); + printf(" bp->rx.bd_virt : %p", bp->rx.bd_virt); + printf(" Len %4d", (u16)RX_RING_DMA_BUFFER_SIZE); + printf(" phy %llx\n", virt_to_bus(bp->rx.bd_virt)); + printf(" bp->cq.bd_virt : %p", bp->cq.bd_virt); + printf(" Len %4d", (u16)CQ_RING_DMA_BUFFER_SIZE); + printf(" phy %llx\n", virt_to_bus(bp->cq.bd_virt)); +} +#else +#define dbg_mem(bp, func) +#endif + +#if defined(DEBUG_CHIP) +void print_fw_ver(struct hwrm_ver_get_output *resp, u32 tmo) +{ + if (resp->hwrm_intf_maj_8b < 1) { + dbg_prn(" HWRM interface %d.%d.%d is older than 1.0.0.\n", + resp->hwrm_intf_maj_8b, resp->hwrm_intf_min_8b, + resp->hwrm_intf_upd_8b); + dbg_prn(" Update FW with HWRM interface 1.0.0 or newer.\n"); + } + dbg_prn(" FW Version : %d.%d.%d.%d\n", + resp->hwrm_fw_maj_8b, resp->hwrm_fw_min_8b, + resp->hwrm_fw_bld_8b, resp->hwrm_fw_rsvd_8b); + printf(" cmd timeout : %d\n", tmo); +} + +void dbg_func_resource_qcaps(struct bnxt *bp) +{ + /* Ring Groups */ + printf(" min_hw_ring_grps : %d\n", bp->min_hw_ring_grps); + printf(" max_hw_ring_grps : %d\n", bp->max_hw_ring_grps); + /* TX Rings */ + printf(" min_tx_rings : %d\n", bp->min_tx_rings); + printf(" max_tx_rings : %d\n", bp->max_tx_rings); + /* RX Rings */ + printf(" min_rx_rings : %d\n", bp->min_rx_rings); + printf(" max_rx_rings : %d\n", bp->max_rx_rings); + /* Completion Rings */ + printf(" min_cq_rings : %d\n", bp->min_cp_rings); + printf(" max_cq_rings : %d\n", bp->max_cp_rings); + /* Statistic Contexts */ + printf(" min_stat_ctxs : %d\n", bp->min_stat_ctxs); + printf(" max_stat_ctxs : %d\n", bp->max_stat_ctxs); +} + +void print_func_qcaps(struct bnxt *bp) +{ + printf(" Port Number : %d\n", bp->port_idx); + printf(" fid : 0x%04x\n", bp->fid); + dbg_prn(" PF MAC : %02x:%02x:%02x:%02x:%02x:%02x\n", + bp->mac_addr[0], + bp->mac_addr[1], + bp->mac_addr[2], + bp->mac_addr[3], + bp->mac_addr[4], + bp->mac_addr[5]); +} + +void print_func_qcfg(struct bnxt *bp) +{ + printf(" ordinal_value : %d\n", bp->ordinal_value); + printf(" stat_ctx_id : %x\n", bp->stat_ctx_id); + dbg_prn(" FW MAC : %02x:%02x:%02x:%02x:%02x:%02x\n", + bp->mac_addr[0], + bp->mac_addr[1], + bp->mac_addr[2], + bp->mac_addr[3], + bp->mac_addr[4], + bp->mac_addr[5]); +} + +void dbg_set_speed(u32 speed) +{ + u32 speed1 = ((speed & LINK_SPEED_DRV_MASK) >> LINK_SPEED_DRV_SHIFT); + + printf(" Set Link Speed : "); + switch (speed & LINK_SPEED_DRV_MASK) { + case LINK_SPEED_DRV_1G: + printf("1 GBPS"); + break; + case LINK_SPEED_DRV_10G: + printf("10 GBPS"); + break; + case LINK_SPEED_DRV_25G: + printf("25 GBPS"); + break; + case LINK_SPEED_DRV_40G: + printf("40 GBPS"); + break; + case LINK_SPEED_DRV_50G: + printf("50 GBPS"); + break; + case LINK_SPEED_DRV_100G: + printf("100 GBPS"); + break; + case LINK_SPEED_DRV_AUTONEG: + printf("AUTONEG"); + break; + default: + printf("%x", speed1); + break; + } + printf("\n"); +} + +void dbg_chip_info(struct bnxt *bp) +{ + printf(" Stat Ctx ID : %d\n", bp->stat_ctx_id); + printf(" Grp ID : %d\n", bp->ring_grp_id); + printf(" CQ Ring Id : %d\n", bp->cq_ring_id); + printf(" Tx Ring Id : %d\n", bp->tx_ring_id); + printf(" Rx ring Id : %d\n", bp->rx_ring_id); +} + +void print_num_rings(struct bnxt *bp) +{ + printf(" num_cmpl_rings : %d\n", bp->num_cmpl_rings); + printf(" num_tx_rings : %d\n", bp->num_tx_rings); + printf(" num_rx_rings : %d\n", bp->num_rx_rings); + printf(" num_ring_grps : %d\n", bp->num_hw_ring_grps); + printf(" num_stat_ctxs : %d\n", bp->num_stat_ctxs); +} + +void dbg_flags(const char *func, u32 flags) +{ + printf("- %s()\n", func); + printf(" bp->flags : 0x%04x\n", flags); +} +#else +#define print_fw_ver(resp, tmo) +#define dbg_func_resource_qcaps(bp) +#define print_func_qcaps(bp) +#define print_func_qcfg(bp) +#define dbg_set_speed(speed) +#define dbg_chip_info(bp) +#define print_num_rings(bp) +#define dbg_flags(func, flags) +#endif + +#if defined(DEBUG_HWRM_CMDS) || defined(DEBUG_FAIL) +void dump_hwrm_req(struct bnxt *bp, const char *func, u32 len, u32 tmo) +{ + dbg_prn("- %s(0x%04x) cmd_len %d cmd_tmo %d", + func, (u16)((struct input *)bp->hwrm_addr_req)->req_type, + len, tmo); +#if defined(DEBUG_HWRM_DUMP) + dump_mem((u8 *)bp->hwrm_addr_req, len, DISP_U8); +#else + printf("\n"); +#endif +} + +void debug_resp(struct bnxt *bp, const char *func, u32 resp_len, u16 err) +{ + dbg_prn("- %s(0x%04x) - ", + func, (u16)((struct input *)bp->hwrm_addr_req)->req_type); + if (err == STATUS_SUCCESS) + printf("Done"); + else if (err != STATUS_TIMEOUT) + printf("Fail err 0x%04x", err); + else + printf("timedout"); +#if defined(DEBUG_HWRM_DUMP) + if (err != STATUS_TIMEOUT) + dump_mem((u8 *)bp->hwrm_addr_resp, resp_len, DISP_U8); + else + printf("\n"); +#else + printf("\n"); +#endif +} + +void dbg_hw_cmd(struct bnxt *bp, + const char *func, u16 cmd_len, + u16 resp_len, u32 cmd_tmo, u16 err) +{ +#if !defined(DEBUG_HWRM_CMDS) + if (err && err != STATUS_TIMEOUT) +#endif + { + dump_hwrm_req(bp, func, cmd_len, cmd_tmo); + debug_resp(bp, func, resp_len, err); + } +} +#else +#define dbg_hw_cmd(bp, func, cmd_len, resp_len, cmd_tmo, err) +#endif + +#if defined(DEBUG_HWRM_CMDS) +void dbg_short_cmd(u8 *req, const char *func, u32 len) +{ + struct hwrm_short_input *sreq; + + sreq = (struct hwrm_short_input *)req; + dbg_prn("- %s(0x%04x) short_cmd_len %d", + func, + sreq->req_type, + (int)len); +#if defined(DEBUG_HWRM_DUMP) + dump_mem((u8 *)sreq, len, DISP_U8); +#else + printf("\n"); +#endif +} +#else +#define dbg_short_cmd(sreq, func, len) +#endif + +#if defined(DEBUG_RX) +void dump_rx_bd(struct rx_pkt_cmpl *rx_cmp, + struct rx_pkt_cmpl_hi *rx_cmp_hi, + u32 desc_idx) +{ + printf(" RX desc_idx %d\n", desc_idx); + printf("- rx_cmp %llx", virt_to_bus(rx_cmp)); +#if defined(DEBUG_RX_DUMP) + dump_mem((u8 *)rx_cmp, (u32)sizeof(struct rx_pkt_cmpl), DISP_U8); +#else + printf("\n"); +#endif + printf("- rx_cmp_hi %llx", virt_to_bus(rx_cmp_hi)); +#if defined(DEBUG_RX_DUMP) + dump_mem((u8 *)rx_cmp_hi, (u32)sizeof(struct rx_pkt_cmpl_hi), DISP_U8); +#else + printf("\n"); +#endif +} + +void dbg_rxp(u8 *iob, u16 rx_len, u16 flag) +{ + printf("- RX iob %llx Len %d ", virt_to_bus(iob), rx_len); + if (flag == PKT_RECEIVED) + printf(" PKT RECEIVED"); + else if (flag == PKT_DROPPED) + printf(" PKT DROPPED"); +#if defined(DEBUG_RX_DUMP) + dump_mem(iob, (u32)rx_len, DISP_U8); +#else + printf("\n"); +#endif +} + +void dbg_rx_cid(u16 idx, u16 cid) +{ + dbg_prn("- RX old cid %d new cid %d\n", idx, cid); +} + +void dbg_rx_alloc_iob_fail(u16 idx, u16 cid) +{ + dbg_prn(" Rx alloc_iob (%d) failed", idx); + dbg_prn(" for cons_id %d\n", cid); +} + +void dbg_rx_iob(void *iob, u16 idx, u16 cid) +{ + dbg_prn(" Rx alloc_iob (%d) %p bd_virt (%d)\n", + idx, iob, cid); +} + +void dbg_rx_pkt(struct bnxt *bp, const char *func, uchar *pkt, int len) +{ + if (bp->rx.iob_recv == PKT_RECEIVED) { + dbg_prn("- %s: %llx %d\n", func, + virt_to_bus(pkt), len); + } +} +#else +#define dump_rx_bd(rx_cmp, rx_cmp_hi, desc_idx) +#define dbg_rxp(iob, rx_len, flag) +#define dbg_rx_cid(idx, cid) +#define dbg_rx_alloc_iob_fail(idx, cid) +#define dbg_rx_iob(iob, idx, cid) +#define dbg_rx_pkt(bp, func, pkt, len) +#endif + +#if defined(DEBUG_CQ) +void dump_CQ(struct cmpl_base *cmp, u16 cons_idx) +{ + printf("- CQ Type "); + + switch (cmp->type & CMPL_BASE_TYPE_MASK) { + case CMPL_BASE_TYPE_STAT_EJECT: + printf("(se)"); + break; + case CMPL_BASE_TYPE_HWRM_ASYNC_EVENT: + printf("(ae)"); + break; + case CMPL_BASE_TYPE_TX_L2: + printf("(tx)"); + break; + case CMPL_BASE_TYPE_RX_L2: + printf("(rx)"); + break; + default: + printf("%04x", (u16)(cmp->type & CMPL_BASE_TYPE_MASK)); + break; + } + printf(" cid %d", cons_idx); +#if defined(DEBUG_CQ_DUMP) + dump_mem((u8 *)cmp, (u32)sizeof(struct cmpl_base), DISP_U8); +#else + printf("\n"); +#endif +} +#else +#define dump_CQ(cq, id) +#endif + +#if defined(DEBUG_TX) +void dump_tx_stat(struct bnxt *bp) +{ + printf(" TX stats cnt %d req_cnt %d", bp->tx.cnt, bp->tx.cnt_req); + printf(" prod_id %d cons_id %d\n", bp->tx.prod_id, bp->tx.cons_id); +} + +void dump_tx_pkt(void *packet, dma_addr_t mapping, int len) +{ + printf(" TX Addr %llx Size %d", mapping, len); +#if defined(DEBUG_TX_DUMP) + dump_mem((u8 *)packet, len, DISP_U8); +#else + printf("\n"); +#endif +} + +void dump_tx_bd(struct tx_bd_short *tx_bd, u16 len) +{ + printf(" Tx BD Addr %llx Size %d", virt_to_bus(tx_bd), len); +#if defined(DEBUG_TX_DUMP) + dump_mem((u8 *)tx_bd, (u32)len, DISP_U8); +#else + printf("\n"); +#endif +} + +void dbg_no_tx_bd(void) +{ + printf(" Tx ring full\n"); +} +#else +#define dump_tx_stat(bp) +#define dump_tx_pkt(packet, mapping, len) +#define dump_tx_bd(prod_bd, len) +#define dbg_no_tx_bd() +#endif + +#if defined(DEBUG_MEMORY) +void dbg_mem_free_done(const char *func) +{ + printf("- %s - Done\n", func); +} +#else +#define dbg_mem_free_done(func) +#endif + +#if defined(DEBUG_FAIL) +void dbg_mem_alloc_fail(const char *func) +{ + printf("- %s() Fail\n", func); +} +#else +#define dbg_mem_alloc_fail(func) +#endif + +#if defined(DEBUG_LINK) +static void dump_evt(u8 *cmp, u32 type, u16 cid) +{ + u32 size = sizeof(struct cmpl_base); + u8 c = 'C'; + + switch (type) { + case CMPL_BASE_TYPE_HWRM_ASYNC_EVENT: + break; + default: + return; + } + dbg_prn("- %cQ Type (ae) cid %d", c, cid); + dump_mem(cmp, size, DISP_U8); +} + +void dbg_link_status(struct bnxt *bp) +{ + dbg_prn(" Port(%d) : Link", bp->port_idx); + if (bp->link_status == STATUS_LINK_ACTIVE) { + dbg_prn("Up"); + } else { + dbg_prn("Down\n"); + dbg_prn(" media_detect : %x", bp->media_detect); + } + dbg_prn("\n"); +} + +void dbg_link_state(struct bnxt *bp, u32 tmo) +{ + if (bp->link_status == STATUS_LINK_ACTIVE) + printf(" Link wait time : %d ms\n", tmo); +} + +void dbg_phy_speed(struct bnxt *bp, char *name) +{ + printf(" Current Speed : %s\n", name); +} +#else +#define dump_evt(cmp, ty, cid) +#define dbg_link_status(bp) +#define dbg_link_state(bp, tmo) +#define dbg_phy_speed(bp, name) +#endif + +#endif /* _BXNT_DBG_H_ */ diff --git a/drivers/net/bnxt/bnxt_hsi.h b/drivers/net/bnxt/bnxt_hsi.h new file mode 100644 index 0000000000000000000000000000000000000000..81cc5da9e4d7d619cfa3d5f43b881f82a133c079 --- /dev/null +++ b/drivers/net/bnxt/bnxt_hsi.h @@ -0,0 +1,889 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + /* + * Copyright 2019-2021 Broadcom. + */ + +#ifndef _BNXT_HSI_H_ +#define _BNXT_HSI_H_ + +/* input (size:128b/16B) */ +struct input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; +}; + +/* output (size:64b/8B) */ +struct output { + __le16 error_code; + __le16 req_type; + __le16 seq_id; + __le16 resp_len; +}; + +/* hwrm_short_input (size:128b/16B) */ +struct hwrm_short_input { + __le16 req_type; + __le16 signature; +#define SHORT_REQ_SIGNATURE_SHORT_CMD 0x4321UL + __le16 unused_0; + __le16 size; + __le64 req_addr; +}; + +#define HWRM_VER_GET 0x0UL +#define HWRM_FUNC_RESET 0x11UL +#define HWRM_FUNC_QCAPS 0x15UL +#define HWRM_FUNC_QCFG 0x16UL +#define HWRM_FUNC_CFG 0x17UL +#define HWRM_FUNC_DRV_UNRGTR 0x1aUL +#define HWRM_FUNC_DRV_RGTR 0x1dUL +#define HWRM_PORT_PHY_CFG 0x20UL +#define HWRM_PORT_MAC_CFG 0x21UL +#define HWRM_PORT_PHY_QCFG 0x27UL +#define HWRM_VNIC_ALLOC 0x40UL +#define HWRM_VNIC_FREE 0x41UL +#define HWRM_VNIC_CFG 0x42UL +#define HWRM_RING_ALLOC 0x50UL +#define HWRM_RING_FREE 0x51UL +#define HWRM_RING_GRP_ALLOC 0x60UL +#define HWRM_RING_GRP_FREE 0x61UL +#define HWRM_CFA_L2_FILTER_ALLOC 0x90UL +#define HWRM_CFA_L2_FILTER_FREE 0x91UL +#define HWRM_CFA_L2_SET_RX_MASK 0x93UL +#define HWRM_STAT_CTX_ALLOC 0xb0UL +#define HWRM_STAT_CTX_FREE 0xb1UL +#define HWRM_FUNC_RESOURCE_QCAPS 0x190UL +#define HWRM_NVM_FLUSH 0xfff0UL +#define HWRM_NVM_GET_VARIABLE 0xfff1UL +#define HWRM_NVM_SET_VARIABLE 0xfff2UL + +#define HWRM_NA_SIGNATURE ((__le32)(-1)) +#define HWRM_MAX_REQ_LEN 128 +#define HWRM_VERSION_MAJOR 1 +#define HWRM_VERSION_MINOR 10 +#define HWRM_VERSION_UPDATE 0 + +/* hwrm_ver_get_input (size:192b/24B) */ +struct hwrm_ver_get_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + u8 hwrm_intf_maj; + u8 hwrm_intf_min; + u8 hwrm_intf_upd; + u8 unused_0[5]; +}; + +/* hwrm_ver_get_output (size:1408b/176B) */ +struct hwrm_ver_get_output { + __le16 error_code; + __le16 req_type; + __le16 seq_id; + __le16 resp_len; + u8 hwrm_intf_maj_8b; + u8 hwrm_intf_min_8b; + u8 hwrm_intf_upd_8b; + u8 hwrm_intf_rsvd_8b; + u8 hwrm_fw_maj_8b; + u8 hwrm_fw_min_8b; + u8 hwrm_fw_bld_8b; + u8 hwrm_fw_rsvd_8b; + u8 mgmt_fw_maj_8b; + u8 mgmt_fw_min_8b; + u8 mgmt_fw_bld_8b; + u8 mgmt_fw_rsvd_8b; + u8 netctrl_fw_maj_8b; + u8 netctrl_fw_min_8b; + u8 netctrl_fw_bld_8b; + u8 netctrl_fw_rsvd_8b; + __le32 dev_caps_cfg; +#define VER_GET_RESP_DEV_CAPS_CFG_SHORT_CMD_SUPPORTED 0x4UL +#define VER_GET_RESP_DEV_CAPS_CFG_SHORT_CMD_REQUIRED 0x8UL + u8 roce_fw_maj_8b; + u8 roce_fw_min_8b; + u8 roce_fw_bld_8b; + u8 roce_fw_rsvd_8b; + char hwrm_fw_name[16]; + char mgmt_fw_name[16]; + char netctrl_fw_name[16]; + u8 reserved2[16]; + char roce_fw_name[16]; + __le16 chip_num; + u8 chip_rev; + u8 chip_metal; + u8 chip_bond_id; + u8 chip_platform_type; + __le16 max_req_win_len; + __le16 max_resp_len; + __le16 def_req_timeout; + u8 flags; + u8 unused_0[2]; + u8 always_1; + __le16 hwrm_intf_major; + __le16 hwrm_intf_minor; + __le16 hwrm_intf_build; + __le16 hwrm_intf_patch; + __le16 hwrm_fw_major; + __le16 hwrm_fw_minor; + __le16 hwrm_fw_build; + __le16 hwrm_fw_patch; + __le16 mgmt_fw_major; + __le16 mgmt_fw_minor; + __le16 mgmt_fw_build; + __le16 mgmt_fw_patch; + __le16 netctrl_fw_major; + __le16 netctrl_fw_minor; + __le16 netctrl_fw_build; + __le16 netctrl_fw_patch; + __le16 roce_fw_major; + __le16 roce_fw_minor; + __le16 roce_fw_build; + __le16 roce_fw_patch; + __le16 max_ext_req_len; + u8 unused_1[5]; + u8 valid; +}; + +/* hwrm_async_event_cmpl (size:128b/16B) */ +struct hwrm_async_event_cmpl { + __le16 type; + __le16 event_id; +#define ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE 0x0UL + __le32 event_data2; + u8 opaque_v; + u8 timestamp_lo; + __le16 timestamp_hi; + __le32 event_data1; +}; + +/* hwrm_func_reset_input (size:192b/24B) */ +struct hwrm_func_reset_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + __le32 enables; + __le16 vf_id; + u8 func_reset_level; +#define FUNC_RESET_REQ_FUNC_RESET_LEVEL_RESETME 0x1UL + u8 unused_0; +}; + +/* hwrm_func_qcaps_input (size:192b/24B) */ +struct hwrm_func_qcaps_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + __le16 fid; + u8 unused_0[6]; +}; + +/* hwrm_func_qcaps_output (size:640b/80B) */ +struct hwrm_func_qcaps_output { + __le16 error_code; + __le16 req_type; + __le16 seq_id; + __le16 resp_len; + __le16 fid; + __le16 port_id; + __le32 flags; + u8 mac_address[6]; + __le16 max_rsscos_ctx; + __le16 max_cmpl_rings; + __le16 max_tx_rings; + __le16 max_rx_rings; + __le16 max_l2_ctxs; + __le16 max_vnics; + __le16 first_vf_id; + __le16 max_vfs; + __le16 max_stat_ctx; + __le32 max_encap_records; + __le32 max_decap_records; + __le32 max_tx_em_flows; + __le32 max_tx_wm_flows; + __le32 max_rx_em_flows; + __le32 max_rx_wm_flows; + __le32 max_mcast_filters; + __le32 max_flow_id; + __le32 max_hw_ring_grps; + __le16 max_sp_tx_rings; + u8 unused_0; + u8 valid; +}; + +/* hwrm_func_qcfg_input (size:192b/24B) */ +struct hwrm_func_qcfg_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + __le16 fid; + u8 unused_0[6]; +}; + +/* hwrm_func_qcfg_output (size:704b/88B) */ +struct hwrm_func_qcfg_output { + __le16 error_code; + __le16 req_type; + __le16 seq_id; + __le16 resp_len; + __le16 fid; + __le16 port_id; + __le16 vlan; + __le16 flags; +#define FUNC_QCFG_RESP_FLAGS_MULTI_HOST 0x20UL + u8 mac_address[6]; + __le16 pci_id; + __le16 alloc_rsscos_ctx; + __le16 alloc_cmpl_rings; + __le16 alloc_tx_rings; + __le16 alloc_rx_rings; + __le16 alloc_l2_ctx; + __le16 alloc_vnics; + __le16 mtu; + __le16 mru; + __le16 stat_ctx_id; + u8 port_partition_type; +#define FUNC_QCFG_RESP_PORT_PARTITION_TYPE_NPAR1_0 0x2UL + u8 port_pf_cnt; + __le16 dflt_vnic_id; + __le16 max_mtu_configured; + __le32 min_bw; + __le32 max_bw; + u8 evb_mode; + u8 options; + __le16 alloc_vfs; + __le32 alloc_mcast_filters; + __le32 alloc_hw_ring_grps; + __le16 alloc_sp_tx_rings; + __le16 alloc_stat_ctx; + __le16 alloc_msix; + __le16 registered_vfs; + u8 unused_1[3]; + u8 always_1; + __le32 reset_addr_poll; + u8 unused_2[3]; + u8 valid; +}; + +/* hwrm_func_cfg_input (size:704b/88B) */ +struct hwrm_func_cfg_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + __le16 fid; + __le16 num_msix; + __le32 flags; + __le32 enables; +#define FUNC_CFG_REQ_ENABLES_NUM_CMPL_RINGS 0x8UL +#define FUNC_CFG_REQ_ENABLES_NUM_TX_RINGS 0x10UL +#define FUNC_CFG_REQ_ENABLES_NUM_RX_RINGS 0x20UL +#define FUNC_CFG_REQ_ENABLES_NUM_STAT_CTXS 0x100UL +#define FUNC_CFG_REQ_ENABLES_ASYNC_EVENT_CR 0x4000UL +#define FUNC_CFG_REQ_ENABLES_NUM_HW_RING_GRPS 0x80000UL + __le16 mtu; + __le16 mru; + __le16 num_rsscos_ctxs; + __le16 num_cmpl_rings; + __le16 num_tx_rings; + __le16 num_rx_rings; + __le16 num_l2_ctxs; + __le16 num_vnics; + __le16 num_stat_ctxs; + __le16 num_hw_ring_grps; + u8 dflt_mac_addr[6]; + __le16 dflt_vlan; + __be32 dflt_ip_addr[4]; + __le32 min_bw; + __le32 max_bw; + __le16 async_event_cr; + u8 vlan_antispoof_mode; + u8 allowed_vlan_pris; + u8 evb_mode; + u8 options; + __le16 num_mcast_filters; +}; + +/* hwrm_func_drv_rgtr_input (size:896b/112B) */ +struct hwrm_func_drv_rgtr_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + __le32 flags; + __le32 enables; +#define FUNC_DRV_RGTR_REQ_ENABLES_OS_TYPE 0x1UL +#define FUNC_DRV_RGTR_REQ_ENABLES_VER 0x2UL +#define FUNC_DRV_RGTR_REQ_ENABLES_ASYNC_EVENT_FWD 0x10UL + __le16 os_type; +#define FUNC_DRV_RGTR_REQ_OS_TYPE_OTHER 0x1UL + u8 ver_maj_8b; + u8 ver_min_8b; + u8 ver_upd_8b; + u8 unused_0[3]; + __le32 timestamp; + u8 unused_1[4]; + __le32 vf_req_fwd[8]; + __le32 async_event_fwd[8]; + __le16 ver_maj; + __le16 ver_min; + __le16 ver_upd; + __le16 ver_patch; +}; + +/* hwrm_func_drv_unrgtr_input (size:192b/24B) */ +struct hwrm_func_drv_unrgtr_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + __le32 flags; +#define FUNC_DRV_UNRGTR_REQ_FLAGS_PREPARE_FOR_SHUTDOWN 0x1UL + u8 unused_0[4]; +}; + +/* hwrm_func_resource_qcaps_input (size:192b/24B) */ +struct hwrm_func_resource_qcaps_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + __le16 fid; + u8 unused_0[6]; +}; + +/* hwrm_func_resource_qcaps_output (size:448b/56B) */ +struct hwrm_func_resource_qcaps_output { + __le16 error_code; + __le16 req_type; + __le16 seq_id; + __le16 resp_len; + __le16 max_vfs; + __le16 max_msix; + __le16 vf_reservation_strategy; + __le16 min_rsscos_ctx; + __le16 max_rsscos_ctx; + __le16 min_cmpl_rings; + __le16 max_cmpl_rings; + __le16 min_tx_rings; + __le16 max_tx_rings; + __le16 min_rx_rings; + __le16 max_rx_rings; + __le16 min_l2_ctxs; + __le16 max_l2_ctxs; + __le16 min_vnics; + __le16 max_vnics; + __le16 min_stat_ctx; + __le16 max_stat_ctx; + __le16 min_hw_ring_grps; + __le16 max_hw_ring_grps; + __le16 max_tx_scheduler_inputs; + __le16 flags; + u8 unused_0[5]; + u8 valid; +}; + +/* hwrm_func_vlan_qcfg_input (size:192b/24B) */ +struct hwrm_func_vlan_qcfg_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + __le16 fid; + u8 unused_0[6]; +}; + +/* hwrm_port_phy_cfg_input (size:448b/56B) */ +struct hwrm_port_phy_cfg_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + __le32 flags; +#define PORT_PHY_CFG_REQ_FLAGS_RESET_PHY 0x1UL +#define PORT_PHY_CFG_REQ_FLAGS_FORCE 0x4UL + __le32 enables; +#define PORT_PHY_CFG_REQ_ENABLES_AUTO_MODE 0x1UL +#define PORT_PHY_CFG_REQ_ENABLES_AUTO_DUPLEX 0x2UL +#define PORT_PHY_CFG_REQ_ENABLES_AUTO_PAUSE 0x4UL +#define PORT_PHY_CFG_REQ_ENABLES_AUTO_LINK_SPEED_MASK 0x10UL + __le16 port_id; + __le16 force_link_speed; +#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB 0xaUL +#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB 0x64UL +#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB 0xfaUL +#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB 0x190UL +#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB 0x1f4UL +#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_100GB 0x3e8UL + u8 auto_mode; +#define PORT_PHY_CFG_REQ_AUTO_MODE_SPEED_MASK 0x4UL + u8 auto_duplex; +#define PORT_PHY_CFG_REQ_AUTO_DUPLEX_BOTH 0x2UL + u8 auto_pause; +#define PORT_PHY_CFG_REQ_AUTO_PAUSE_TX 0x1UL +#define PORT_PHY_CFG_REQ_AUTO_PAUSE_RX 0x2UL + u8 unused_0; + __le16 auto_link_speed; + __le16 auto_link_speed_mask; +#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_100MB 0x2UL +#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_1GB 0x8UL +#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_10GB 0x40UL +#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_25GB 0x100UL +#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_40GB 0x200UL +#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_50GB 0x400UL +#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_100GB 0x800UL + u8 wirespeed; + u8 lpbk; + u8 force_pause; + u8 unused_1; + __le32 preemphasis; + __le16 eee_link_speed_mask; + u8 unused_2[2]; + __le32 tx_lpi_timer; + __le32 unused_3; +}; + +/* hwrm_port_phy_qcfg_input (size:192b/24B) */ +struct hwrm_port_phy_qcfg_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + __le16 port_id; + u8 unused_0[6]; +}; + +/* hwrm_port_phy_qcfg_output (size:768b/96B) */ +struct hwrm_port_phy_qcfg_output { + __le16 error_code; + __le16 req_type; + __le16 seq_id; + __le16 resp_len; + u8 link; +#define PORT_PHY_QCFG_RESP_LINK_LINK 0x2UL + u8 unused_0; + __le16 link_speed; +#define PORT_PHY_QCFG_RESP_LINK_SPEED_100MB 0x1UL +#define PORT_PHY_QCFG_RESP_LINK_SPEED_1GB 0xaUL +#define PORT_PHY_QCFG_RESP_LINK_SPEED_2GB 0x14UL +#define PORT_PHY_QCFG_RESP_LINK_SPEED_2_5GB 0x19UL +#define PORT_PHY_QCFG_RESP_LINK_SPEED_10GB 0x64UL +#define PORT_PHY_QCFG_RESP_LINK_SPEED_20GB 0xc8UL +#define PORT_PHY_QCFG_RESP_LINK_SPEED_25GB 0xfaUL +#define PORT_PHY_QCFG_RESP_LINK_SPEED_40GB 0x190UL +#define PORT_PHY_QCFG_RESP_LINK_SPEED_50GB 0x1f4UL +#define PORT_PHY_QCFG_RESP_LINK_SPEED_100GB 0x3e8UL +#define PORT_PHY_QCFG_RESP_LINK_SPEED_10MB 0xffffUL + u8 duplex_cfg; + u8 pause; + __le16 support_speeds; +#define PORT_QCFG_SUPPORT_SPEEDS_100MBHD 0x1UL +#define PORT_QCFG_SUPPORT_SPEEDS_100MB 0x2UL +#define PORT_QCFG_SUPPORT_SPEEDS_1GBHD 0x4UL +#define PORT_QCFG_SUPPORT_SPEEDS_1GB 0x8UL +#define PORT_QCFG_SUPPORT_SPEEDS_2GB 0x10UL +#define PORT_QCFG_SUPPORT_SPEEDS_2_5GB 0x20UL +#define PORT_QCFG_SUPPORT_SPEEDS_10GB 0x40UL +#define PORT_QCFG_SUPPORT_SPEEDS_20GB 0x80UL +#define PORT_QCFG_SUPPORT_SPEEDS_25GB 0x100UL +#define PORT_QCFG_SUPPORT_SPEEDS_50GB 0x400UL +#define PORT_QCFG_SUPPORT_SPEEDS_100GB 0x800UL +#define PORT_QCFG_SUPPORT_SPEEDS_200GB 0x4000UL + __le16 force_link_speed; + u8 auto_mode; + u8 auto_pause; + __le16 auto_link_speed; + __le16 auto_link_speed_mask; + u8 wirespeed; + u8 lpbk; + u8 force_pause; + u8 module_status; + __le32 preemphasis; + u8 phy_maj; + u8 phy_min; + u8 phy_bld; + u8 phy_type; + u8 media_type; + u8 xcvr_pkg_type; + u8 eee_config_phy_addr; + u8 parallel_detect; + __le16 link_partner_adv_speeds; + u8 link_partner_adv_auto_mode; + u8 link_partner_adv_pause; + __le16 adv_eee_link_speed_mask; + __le16 link_partner_adv_eee_link_speed_mask; + __le32 xcvr_identifier_type_tx_lpi_timer; + __le16 fec_cfg; + u8 duplex_state; + u8 option_flags; + char phy_vendor_name[16]; + char phy_vendor_partnumber[16]; + u8 unused_2[7]; + u8 valid; +}; + +/* hwrm_port_mac_cfg_input (size:320b/40B) */ +struct hwrm_port_mac_cfg_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + __le32 flags; + __le32 enables; + __le16 port_id; + u8 ipg; + u8 lpbk; +#define PORT_MAC_CFG_REQ_LPBK_NONE 0x0UL + u8 vlan_pri2cos_map_pri; + u8 reserved1; + u8 tunnel_pri2cos_map_pri; + u8 dscp2pri_map_pri; + __le16 rx_ts_capture_ptp_msg_type; + __le16 tx_ts_capture_ptp_msg_type; + u8 cos_field_cfg; + u8 unused_0[3]; +}; + +/* hwrm_vnic_alloc_input (size:192b/24B) */ +struct hwrm_vnic_alloc_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + __le32 flags; +#define VNIC_ALLOC_REQ_FLAGS_DEFAULT 0x1UL + u8 unused_0[4]; +}; + +/* hwrm_vnic_alloc_output (size:128b/16B) */ +struct hwrm_vnic_alloc_output { + __le16 error_code; + __le16 req_type; + __le16 seq_id; + __le16 resp_len; + __le32 vnic_id; + u8 unused_0[3]; + u8 valid; +}; + +/* hwrm_vnic_free_input (size:192b/24B) */ +struct hwrm_vnic_free_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + __le32 vnic_id; + u8 unused_0[4]; +}; + +/* hwrm_vnic_cfg_input (size:320b/40B) */ +struct hwrm_vnic_cfg_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + __le32 flags; + __le32 enables; +#define VNIC_CFG_REQ_ENABLES_DFLT_RING_GRP 0x1UL +#define VNIC_CFG_REQ_ENABLES_MRU 0x10UL + __le16 vnic_id; + __le16 dflt_ring_grp; + __le16 rss_rule; + __le16 cos_rule; + __le16 lb_rule; + __le16 mru; + __le16 default_rx_ring_id; + __le16 default_cmpl_ring_id; +}; + +/* hwrm_ring_alloc_input (size:704b/88B) */ +struct hwrm_ring_alloc_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + __le32 enables; +#define RING_ALLOC_REQ_ENABLES_RX_BUF_SIZE_VALID 0x100UL + u8 ring_type; +#define RING_ALLOC_REQ_RING_TYPE_L2_CMPL 0x0UL +#define RING_ALLOC_REQ_RING_TYPE_TX 0x1UL +#define RING_ALLOC_REQ_RING_TYPE_RX 0x2UL + u8 unused_0; + __le16 flags; + __le64 page_tbl_addr; + __le32 fbo; + u8 page_size; + u8 page_tbl_depth; + u8 unused_1[2]; + __le32 length; + __le16 logical_id; + __le16 cmpl_ring_id; + __le16 queue_id; + __le16 rx_buf_size; + __le16 rx_ring_id; + __le16 nq_ring_id; + __le16 ring_arb_cfg; + __le16 unused_3; + __le32 reserved3; + __le32 stat_ctx_id; + __le32 reserved4; + __le32 max_bw; + u8 int_mode; +#define RING_ALLOC_REQ_INT_MODE_POLL 0x3UL + u8 unused_4[3]; + __le64 cq_handle; +}; + +/* hwrm_ring_alloc_output (size:128b/16B) */ +struct hwrm_ring_alloc_output { + __le16 error_code; + __le16 req_type; + __le16 seq_id; + __le16 resp_len; + __le16 ring_id; + __le16 logical_ring_id; + u8 unused_0[3]; + u8 valid; +}; + +/* hwrm_ring_free_input (size:192b/24B) */ +struct hwrm_ring_free_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + u8 ring_type; +#define RING_FREE_REQ_RING_TYPE_L2_CMPL 0x0UL +#define RING_FREE_REQ_RING_TYPE_TX 0x1UL +#define RING_FREE_REQ_RING_TYPE_RX 0x2UL + u8 unused_0; + __le16 ring_id; + u8 unused_1[4]; +}; + +/* hwrm_ring_grp_alloc_input (size:192b/24B) */ +struct hwrm_ring_grp_alloc_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + __le16 cr; + __le16 rr; + __le16 ar; + __le16 sc; +}; + +/* hwrm_ring_grp_alloc_output (size:128b/16B) */ +struct hwrm_ring_grp_alloc_output { + __le16 error_code; + __le16 req_type; + __le16 seq_id; + __le16 resp_len; + __le32 ring_group_id; + u8 unused_0[3]; + u8 valid; +}; + +/* hwrm_ring_grp_free_input (size:192b/24B) */ +struct hwrm_ring_grp_free_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + __le32 ring_group_id; + u8 unused_0[4]; +}; + +/* hwrm_cfa_l2_filter_alloc_input (size:768b/96B) */ +struct hwrm_cfa_l2_filter_alloc_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + __le32 flags; +#define CFA_L2_FILTER_ALLOC_REQ_FLAGS_PATH_RX 0x1UL + __le32 enables; +#define CFA_L2_FILTER_ALLOC_REQ_ENABLES_L2_ADDR 0x1UL +#define CFA_L2_FILTER_ALLOC_REQ_ENABLES_L2_ADDR_MASK 0x2UL +#define CFA_L2_FILTER_ALLOC_REQ_ENABLES_DST_ID 0x8000UL + u8 l2_addr[6]; + u8 unused_0[2]; + u8 l2_addr_mask[6]; + __le16 l2_ovlan; + __le16 l2_ovlan_mask; + __le16 l2_ivlan; + __le16 l2_ivlan_mask; + u8 unused_1[2]; + u8 t_l2_addr[6]; + u8 unused_2[2]; + u8 t_l2_addr_mask[6]; + __le16 t_l2_ovlan; + __le16 t_l2_ovlan_mask; + __le16 t_l2_ivlan; + __le16 t_l2_ivlan_mask; + u8 src_type; +#define CFA_L2_FILTER_ALLOC_REQ_SRC_TYPE_NPORT 0x0UL + u8 unused_3; + __le32 src_id; + u8 tunnel_type; + u8 unused_4; + __le16 dst_id; + __le16 mirror_vnic_id; + u8 pri_hint; + u8 unused_5; + __le32 unused_6; + __le64 l2_filter_id_hint; +}; + +/* hwrm_cfa_l2_filter_alloc_output (size:192b/24B) */ +struct hwrm_cfa_l2_filter_alloc_output { + __le16 error_code; + __le16 req_type; + __le16 seq_id; + __le16 resp_len; + __le64 l2_filter_id; + __le32 flow_id; + u8 unused_0[3]; + u8 valid; +}; + +/* hwrm_cfa_l2_filter_free_input (size:192b/24B) */ +struct hwrm_cfa_l2_filter_free_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + __le64 l2_filter_id; +}; + +/* hwrm_cfa_l2_set_rx_mask_input (size:448b/56B) */ +struct hwrm_cfa_l2_set_rx_mask_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + __le32 vnic_id; + __le32 mask; +#define CFA_L2_SET_RX_MASK_REQ_MASK_MCAST 0x2UL +#define CFA_L2_SET_RX_MASK_REQ_MASK_ALL_MCAST 0x4UL +#define CFA_L2_SET_RX_MASK_REQ_MASK_BCAST 0x8UL +#define CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS 0x10UL + __le64 mc_tbl_addr; + __le32 num_mc_entries; + u8 unused_0[4]; + __le64 vlan_tag_tbl_addr; + __le32 num_vlan_tags; + u8 unused_1[4]; +}; + +/* hwrm_stat_ctx_alloc_input (size:256b/32B) */ +struct hwrm_stat_ctx_alloc_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + __le64 stats_dma_addr; + __le32 update_period_ms; + u8 stat_ctx_flags; + u8 unused_0[3]; +}; + +/* hwrm_stat_ctx_alloc_output (size:128b/16B) */ +struct hwrm_stat_ctx_alloc_output { + __le16 error_code; + __le16 req_type; + __le16 seq_id; + __le16 resp_len; + __le32 stat_ctx_id; + u8 unused_0[3]; + u8 valid; +}; + +/* hwrm_stat_ctx_free_input (size:192b/24B) */ +struct hwrm_stat_ctx_free_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + __le32 stat_ctx_id; + u8 unused_0[4]; +}; + +/* hwrm_nvm_flush_input (size:128b/16B) */ +struct hwrm_nvm_flush_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; +}; + +/* hwrm_nvm_get_variable_input (size:320b/40B) */ +struct hwrm_nvm_get_variable_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + __le64 dest_data_addr; + __le16 data_len; + __le16 option_num; + __le16 dimensions; + __le16 index_0; + __le16 index_1; + __le16 index_2; + __le16 index_3; + u8 flags; + u8 unused_0; +}; + +/* hwrm_nvm_set_variable_input (size:320b/40B) */ +struct hwrm_nvm_set_variable_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + __le64 src_data_addr; + __le16 data_len; + __le16 option_num; + __le16 dimensions; + __le16 index_0; + __le16 index_1; + __le16 index_2; + __le16 index_3; + u8 flags; + u8 unused_0; +}; + +#endif /* _BNXT_HSI_H_ */ diff --git a/drivers/net/fec_mxc.h b/drivers/net/fec_mxc.h index 1c0d0e5b8f89be1587d27ca3c29d0c26c50fdb66..48faa33d66eca7fa3f671e5efaa3302666038060 100644 --- a/drivers/net/fec_mxc.h +++ b/drivers/net/fec_mxc.h @@ -272,7 +272,7 @@ struct fec_priv { struct clk clk_ref; struct clk clk_ptp; u32 clk_rate; - char promisc; + bool promisc; }; /** diff --git a/drivers/net/fm/fm.c b/drivers/net/fm/fm.c index 7d51be1f723e9a89494b0be30a8e85a5c5f145f8..f8256126405a56a7571a6bff00eaa85011b5b0f3 100644 --- a/drivers/net/fm/fm.c +++ b/drivers/net/fm/fm.c @@ -387,8 +387,8 @@ int fm_init_common(int index, struct ccsr_fman *reg) struct udevice *new; /* speed and mode will be read from DT */ - ret = spi_flash_probe_bus_cs(CONFIG_ENV_SPI_BUS, - CONFIG_ENV_SPI_CS, 0, 0, &new); + ret = spi_flash_probe_bus_cs(CONFIG_SF_DEFAULT_BUS, + CONFIG_SF_DEFAULT_CS, 0, 0, &new); ucode_flash = dev_get_uclass_priv(new); #else @@ -474,7 +474,7 @@ int fm_init_common(int index, struct ccsr_fman *reg) struct udevice *new; /* speed and mode will be read from DT */ - ret = spi_flash_probe_bus_cs(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS, + ret = spi_flash_probe_bus_cs(CONFIG_SF_DEFAULT_BUS, CONFIG_SF_DEFAULT_CS, 0, 0, &new); ucode_flash = dev_get_uclass_priv(new); diff --git a/drivers/net/mscc_eswitch/felix_switch.c b/drivers/net/mscc_eswitch/felix_switch.c index 551fc2c9f9692c8f4571bb61e33015340a62b46b..60b2e8f32d4bb79f40ed33343824ce723a1b28cf 100644 --- a/drivers/net/mscc_eswitch/felix_switch.c +++ b/drivers/net/mscc_eswitch/felix_switch.c @@ -16,6 +16,7 @@ */ #include +#include #include #include #include @@ -39,7 +40,9 @@ #define FELIX_IS2 0x060000 #define FELIX_GMII(port) (0x100000 + (port) * 0x10000) #define FELIX_QSYS 0x200000 - +#define FELIX_DEVCPU_GCB 0x070000 +#define FELIX_DEVCPU_GCB_SOFT_RST (FELIX_DEVCPU_GCB + 0x00000004) +#define SOFT_SWC_RST BIT(0) #define FELIX_SYS_SYSTEM (FELIX_SYS + 0x00000E00) #define FELIX_SYS_SYSTEM_EN BIT(0) #define FELIX_SYS_RAM_CTRL (FELIX_SYS + 0x00000F24) @@ -210,17 +213,14 @@ static int felix_init_sxgmii(struct mii_dev *imdio, int pidx) static void felix_start_pcs(struct udevice *dev, int port, struct phy_device *phy, struct mii_dev *imdio) { - bool autoneg = true; - - if (phy->phy_id == PHY_FIXED_ID || - phy->interface == PHY_INTERFACE_MODE_2500BASEX) - autoneg = false; + ofnode node = dsa_port_get_ofnode(dev, port); + bool inband_an = ofnode_eth_uses_inband_aneg(node); switch (phy->interface) { case PHY_INTERFACE_MODE_SGMII: case PHY_INTERFACE_MODE_2500BASEX: case PHY_INTERFACE_MODE_QSGMII: - felix_init_sgmii(imdio, port, autoneg); + felix_init_sgmii(imdio, port, inband_an); break; case PHY_INTERFACE_MODE_10GBASER: case PHY_INTERFACE_MODE_USXGMII: @@ -239,6 +239,15 @@ static void felix_init(struct udevice *dev) void *base = priv->regs_base; int timeout = 100; + /* Switch core reset */ + out_le32(base + FELIX_DEVCPU_GCB_SOFT_RST, SOFT_SWC_RST); + while (in_le32(base + FELIX_DEVCPU_GCB_SOFT_RST) & SOFT_SWC_RST && + --timeout) + udelay(10); + if (in_le32(base + FELIX_DEVCPU_GCB_SOFT_RST) & SOFT_SWC_RST) + dev_err(dev, "Timeout waiting for switch core reset\n"); + timeout = 100; + /* Init core memories */ out_le32(base + FELIX_SYS_RAM_CTRL, FELIX_SYS_RAM_CTRL_INIT); while (in_le32(base + FELIX_SYS_RAM_CTRL) & FELIX_SYS_RAM_CTRL_INIT && diff --git a/drivers/net/pfe_eth/Kconfig b/drivers/net/pfe_eth/Kconfig index a13b331a508c28012e2fafe6c2f664f21cd367d8..b2724ee3e84600bf693cb315231f5bd0c1409a42 100644 --- a/drivers/net/pfe_eth/Kconfig +++ b/drivers/net/pfe_eth/Kconfig @@ -9,4 +9,20 @@ config SYS_FSL_PFE_ADDR hex "PFE base address" default 0x04000000 +config SYS_FSL_PFE_SPI_BUS + int "Value of SPI flash bus for PFE firmware" + default SF_DEFAULT_BUS + +config SYS_FSL_PFE_SPI_CS + int "Value of SPI flash chip select for PFE firmware" + default SF_DEFAULT_CS + +config SYS_FSL_PFE_SPI_MAX_HZ + int "Value of SPI flash max frequency for PFE firmware" + default SF_DEFAULT_SPEED + +config SYS_FSL_PFE_SPI_MODE + hex "Value of SPI flash work mode for PFE firmware" + default SF_DEFAULT_MODE + endif diff --git a/drivers/net/pfe_eth/pfe_firmware.c b/drivers/net/pfe_eth/pfe_firmware.c index ad5bc3c8624e5f02ea613ae05e8463e000a08eea..93e5ea55c783825048607da3320e0a61938db8f2 100644 --- a/drivers/net/pfe_eth/pfe_firmware.c +++ b/drivers/net/pfe_eth/pfe_firmware.c @@ -179,10 +179,10 @@ int pfe_spi_flash_init(void) if (!addr) return -ENOMEM; - ret = spi_flash_probe_bus_cs(CONFIG_ENV_SPI_BUS, - CONFIG_ENV_SPI_CS, - CONFIG_ENV_SPI_MAX_HZ, - CONFIG_ENV_SPI_MODE, + ret = spi_flash_probe_bus_cs(CONFIG_SYS_FSL_PFE_SPI_BUS, + CONFIG_SYS_FSL_PFE_SPI_CS, + CONFIG_SYS_FSL_PFE_SPI_MAX_HZ, + CONFIG_SYS_FSL_PFE_SPI_MODE, &new); if (ret) { printf("SF: failed to probe spi\n"); diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig index 68ee7d7a2dd09ca23714f151302d81e0c7274f57..e69cd8a4b310ac7e5fec303edd3697ed4fb791e5 100644 --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig @@ -214,16 +214,6 @@ config PHY_NXP_C45_TJA11XX config PHY_REALTEK bool "Realtek Ethernet PHYs support" -config RTL8211E_PINE64_GIGABIT_FIX - bool "Fix gigabit throughput on some Pine64+ models" - depends on PHY_REALTEK - help - Configure the Realtek RTL8211E found on some Pine64+ models differently to - fix throughput on Gigabit links, turning off all internal delays in the - process. The settings that this touches are not documented in the CONFREG - section of the RTL8211E datasheet, but come from Realtek by way of the - Pine64 engineering team. - config RTL8211X_PHY_FORCE_MASTER bool "Ethernet PHY RTL8211x: force 1000BASE-T master mode" depends on PHY_REALTEK diff --git a/drivers/net/phy/cortina.c b/drivers/net/phy/cortina.c index 2ac02952450da5658653bbe0cc0059243322d514..778d93e609cd482ee63a536b765a48bae6ba10ca 100644 --- a/drivers/net/phy/cortina.c +++ b/drivers/net/phy/cortina.c @@ -159,8 +159,8 @@ void cs4340_upload_firmware(struct phy_device *phydev) struct spi_flash *ucode_flash; addr = malloc(CONFIG_CORTINA_FW_LENGTH); - ucode_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS, - CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE); + ucode_flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS, CONFIG_SF_DEFAULT_CS, + CONFIG_SF_DEFAULT_SPEED, CONFIG_SF_DEFAULT_MODE); if (!ucode_flash) { puts("SF: probe for Cortina ucode failed\n"); } else { @@ -212,8 +212,8 @@ void cs4340_upload_firmware(struct phy_device *phydev) struct spi_flash *ucode_flash; addr = malloc(CONFIG_CORTINA_FW_LENGTH); - ucode_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS, - CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE); + ucode_flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS, CONFIG_SF_DEFAULT_CS, + CONFIG_SF_DEFAULT_SPEED, CONFIG_SF_DEFAULT_MODE); if (!ucode_flash) { puts("SF: probe for Cortina ucode failed\n"); } else { diff --git a/drivers/net/phy/mscc.c b/drivers/net/phy/mscc.c index d1a643cf5a0ced833458b12f4be96e5bcf1e328b..f9482b21a010a06802373f21d26ffddee10742ef 100644 --- a/drivers/net/phy/mscc.c +++ b/drivers/net/phy/mscc.c @@ -19,6 +19,7 @@ /* Microsemi PHY ID's */ #define PHY_ID_VSC8530 0x00070560 #define PHY_ID_VSC8531 0x00070570 +#define PHY_ID_VSC8502 0x00070630 #define PHY_ID_VSC8540 0x00070760 #define PHY_ID_VSC8541 0x00070770 #define PHY_ID_VSC8574 0x000704a0 @@ -1513,6 +1514,50 @@ static int vsc8584_config(struct phy_device *phydev) return vsc8584_config_init(phydev); } +static int vsc8502_config(struct phy_device *phydev) +{ + bool rgmii_rx_delay = false, rgmii_tx_delay = false; + u16 reg = 0; + int ret; + + /* Assume nothing needs to be done for the default GMII/MII mode */ + if (!phy_interface_is_rgmii(phydev)) + return 0; + + /* Set Extended PHY Control 1 register to RGMII */ + phy_write(phydev, MDIO_DEVAD_NONE, MSCC_PHY_EXT_PHY_CNTL_1_REG, + BIT(13) | BIT(12)); + + /* Soft reset required after changing PHY mode from the default + * of GMII/MII + */ + ret = mscc_phy_soft_reset(phydev); + if (ret) + return ret; + + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID || + phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) + rgmii_rx_delay = true; + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID || + phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) + rgmii_tx_delay = true; + + phy_write(phydev, MDIO_DEVAD_NONE, MSCC_EXT_PAGE_ACCESS, + MSCC_PHY_PAGE_EXT2); + + if (rgmii_rx_delay) + reg |= VSC_PHY_RGMII_DELAY_2000_PS << RGMII_RX_CLK_DELAY_POS; + if (rgmii_tx_delay) + reg |= VSC_PHY_RGMII_DELAY_2000_PS << RGMII_TX_CLK_DELAY_POS; + + phy_write(phydev, MDIO_DEVAD_NONE, MSCC_PHY_RGMII_CNTL_REG, reg); + + phy_write(phydev, MDIO_DEVAD_NONE, MSCC_EXT_PAGE_ACCESS, + MSCC_PHY_PAGE_STD); + + return 0; +} + static struct phy_driver VSC8530_driver = { .name = "Microsemi VSC8530", .uid = PHY_ID_VSC8530, @@ -1533,6 +1578,16 @@ static struct phy_driver VSC8531_driver = { .shutdown = &genphy_shutdown, }; +static struct phy_driver VSC8502_driver = { + .name = "Microsemi VSC8502", + .uid = PHY_ID_VSC8502, + .mask = 0x000ffff0, + .features = PHY_GBIT_FEATURES, + .config = &vsc8502_config, + .startup = &mscc_startup, + .shutdown = &genphy_shutdown, +}; + static struct phy_driver VSC8540_driver = { .name = "Microsemi VSC8540", .uid = PHY_ID_VSC8540, @@ -1577,6 +1632,7 @@ int phy_mscc_init(void) { phy_register(&VSC8530_driver); phy_register(&VSC8531_driver); + phy_register(&VSC8502_driver); phy_register(&VSC8540_driver); phy_register(&VSC8541_driver); phy_register(&VSC8574_driver); diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index b1b1fa50809a186cda03b7f2f4a8286d26ecd1ec..24c3ea59bbb0ee9086e2401ac07dadfd1182fe53 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -12,7 +12,6 @@ #include #define PHY_RTL8211x_FORCE_MASTER BIT(1) -#define PHY_RTL8211E_PINE64_GIGABIT_FIX BIT(2) #define PHY_RTL8211F_FORCE_EEE_RXC_ON BIT(3) #define PHY_RTL8201F_S700_RMII_TIMINGS BIT(4) @@ -49,10 +48,10 @@ #define MIIM_RTL8211F_PHYSTAT_SPDDONE 0x0800 #define MIIM_RTL8211F_PHYSTAT_LINK 0x0004 -#define MIIM_RTL8211E_CONFREG 0x1c -#define MIIM_RTL8211E_CONFREG_TXD 0x0002 -#define MIIM_RTL8211E_CONFREG_RXD 0x0004 -#define MIIM_RTL8211E_CONFREG_MAGIC 0xb400 /* Undocumented */ +#define MIIM_RTL8211E_CONFREG 0x1c +#define MIIM_RTL8211E_CTRL_DELAY BIT(13) +#define MIIM_RTL8211E_TX_DELAY BIT(12) +#define MIIM_RTL8211E_RX_DELAY BIT(11) #define MIIM_RTL8211E_EXT_PAGE_SELECT 0x1e @@ -108,10 +107,6 @@ static int rtl8211b_probe(struct phy_device *phydev) static int rtl8211e_probe(struct phy_device *phydev) { -#ifdef CONFIG_RTL8211E_PINE64_GIGABIT_FIX - phydev->flags |= PHY_RTL8211E_PINE64_GIGABIT_FIX; -#endif - return 0; } @@ -154,22 +149,6 @@ static int rtl8211x_config(struct phy_device *phydev) reg |= MIIM_RTL8211x_CTRL1000T_MASTER; phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, reg); } - if (phydev->flags & PHY_RTL8211E_PINE64_GIGABIT_FIX) { - unsigned int reg; - - phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PAGE_SELECT, - 7); - phy_write(phydev, MDIO_DEVAD_NONE, - MIIM_RTL8211E_EXT_PAGE_SELECT, 0xa4); - reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211E_CONFREG); - /* Ensure both internal delays are turned off */ - reg &= ~(MIIM_RTL8211E_CONFREG_TXD | MIIM_RTL8211E_CONFREG_RXD); - /* Flip the magic undocumented bits */ - reg |= MIIM_RTL8211E_CONFREG_MAGIC; - phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211E_CONFREG, reg); - phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PAGE_SELECT, - 0); - } /* read interrupt status just to clear it */ phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211x_PHY_INER); @@ -201,6 +180,44 @@ static int rtl8201f_config(struct phy_device *phydev) return 0; } +static int rtl8211e_config(struct phy_device *phydev) +{ + int reg, val; + + /* enable TX/RX delay for rgmii-* modes, and disable them for rgmii. */ + switch (phydev->interface) { + case PHY_INTERFACE_MODE_RGMII: + val = MIIM_RTL8211E_CTRL_DELAY; + break; + case PHY_INTERFACE_MODE_RGMII_ID: + val = MIIM_RTL8211E_CTRL_DELAY | MIIM_RTL8211E_TX_DELAY | + MIIM_RTL8211E_RX_DELAY; + break; + case PHY_INTERFACE_MODE_RGMII_RXID: + val = MIIM_RTL8211E_CTRL_DELAY | MIIM_RTL8211E_RX_DELAY; + break; + case PHY_INTERFACE_MODE_RGMII_TXID: + val = MIIM_RTL8211E_CTRL_DELAY | MIIM_RTL8211E_TX_DELAY; + break; + default: /* the rest of the modes imply leaving delays as is. */ + goto default_delay; + } + + phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PAGE_SELECT, 7); + phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211E_EXT_PAGE_SELECT, 0xa4); + + reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211E_CONFREG); + reg &= ~(MIIM_RTL8211E_TX_DELAY | MIIM_RTL8211E_RX_DELAY); + phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211E_CONFREG, reg | val); + + phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PAGE_SELECT, 0); + +default_delay: + genphy_config_aneg(phydev); + + return 0; +} + static int rtl8211f_config(struct phy_device *phydev) { u16 reg; @@ -410,7 +427,7 @@ static struct phy_driver RTL8211E_driver = { .mask = 0xffffff, .features = PHY_GBIT_FEATURES, .probe = &rtl8211e_probe, - .config = &rtl8211x_config, + .config = &rtl8211e_config, .startup = &rtl8211e_startup, .shutdown = &genphy_shutdown, }; diff --git a/drivers/net/sja1105.c b/drivers/net/sja1105.c new file mode 100644 index 0000000000000000000000000000000000000000..17bab33eddb7b95d9c4c177b24c66e506b37cb17 --- /dev/null +++ b/drivers/net/sja1105.c @@ -0,0 +1,3376 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2016-2018 NXP + * Copyright 2018, Sensor-Technik Wiedemann GmbH + * Copyright 2018-2019, Vladimir Oltean + * Copyright 2020-2021 NXP + * + * Ported from Linux (drivers/net/dsa/sja1105/). + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +enum packing_op { + PACK, + UNPACK, +}; + +#define ETHER_CRC32_POLY 0x04C11DB7 +#define ETH_P_SJA1105 0xdadb +#define SJA1105_NUM_PORTS 5 +#define SJA1110_NUM_PORTS 11 +#define SJA1105_MAX_NUM_PORTS SJA1110_NUM_PORTS +#define SJA1105_NUM_TC 8 +#define SJA1105ET_FDB_BIN_SIZE 4 +#define SJA1105_SIZE_CGU_CMD 4 +#define SJA1105_SIZE_RESET_CMD 4 +#define SJA1105_SIZE_MDIO_CMD 4 +#define SJA1105_SIZE_SPI_MSG_HEADER 4 +#define SJA1105_SIZE_SPI_MSG_MAXLEN (64 * 4) +#define SJA1105_SIZE_DEVICE_ID 4 +#define SJA1105_SIZE_TABLE_HEADER 12 +#define SJA1105_SIZE_L2_POLICING_ENTRY 8 +#define SJA1105_SIZE_VLAN_LOOKUP_ENTRY 8 +#define SJA1110_SIZE_VLAN_LOOKUP_ENTRY 12 +#define SJA1105_SIZE_L2_FORWARDING_ENTRY 8 +#define SJA1105_SIZE_L2_FORWARDING_PARAMS_ENTRY 12 +#define SJA1105_SIZE_XMII_PARAMS_ENTRY 4 +#define SJA1110_SIZE_XMII_PARAMS_ENTRY 8 +#define SJA1105ET_SIZE_MAC_CONFIG_ENTRY 28 +#define SJA1105ET_SIZE_GENERAL_PARAMS_ENTRY 40 +#define SJA1105PQRS_SIZE_MAC_CONFIG_ENTRY 32 +#define SJA1105PQRS_SIZE_GENERAL_PARAMS_ENTRY 44 +#define SJA1110_SIZE_GENERAL_PARAMS_ENTRY 56 + +#define SJA1105_MAX_L2_LOOKUP_COUNT 1024 +#define SJA1105_MAX_L2_POLICING_COUNT 45 +#define SJA1110_MAX_L2_POLICING_COUNT 110 +#define SJA1105_MAX_VLAN_LOOKUP_COUNT 4096 +#define SJA1105_MAX_L2_FORWARDING_COUNT 13 +#define SJA1110_MAX_L2_FORWARDING_COUNT 19 +#define SJA1105_MAX_MAC_CONFIG_COUNT 5 +#define SJA1110_MAX_MAC_CONFIG_COUNT 11 +#define SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT 1 +#define SJA1105_MAX_GENERAL_PARAMS_COUNT 1 +#define SJA1105_MAX_XMII_PARAMS_COUNT 1 + +#define SJA1105_MAX_FRAME_MEMORY 929 + +#define SJA1105E_DEVICE_ID 0x9C00000Cull +#define SJA1105T_DEVICE_ID 0x9E00030Eull +#define SJA1105PR_DEVICE_ID 0xAF00030Eull +#define SJA1105QS_DEVICE_ID 0xAE00030Eull +#define SJA1110_DEVICE_ID 0xB700030Full + +#define SJA1105ET_PART_NO 0x9A83 +#define SJA1105P_PART_NO 0x9A84 +#define SJA1105Q_PART_NO 0x9A85 +#define SJA1105R_PART_NO 0x9A86 +#define SJA1105S_PART_NO 0x9A87 +#define SJA1110A_PART_NO 0x1110 +#define SJA1110B_PART_NO 0x1111 +#define SJA1110C_PART_NO 0x1112 +#define SJA1110D_PART_NO 0x1113 + +#define SJA1110_ACU 0x1c4400 +#define SJA1110_RGU 0x1c6000 +#define SJA1110_CGU 0x1c6400 + +#define SJA1110_SPI_ADDR(x) ((x) / 4) +#define SJA1110_ACU_ADDR(x) (SJA1110_ACU + SJA1110_SPI_ADDR(x)) +#define SJA1110_CGU_ADDR(x) (SJA1110_CGU + SJA1110_SPI_ADDR(x)) +#define SJA1110_RGU_ADDR(x) (SJA1110_RGU + SJA1110_SPI_ADDR(x)) + +#define SJA1105_RSV_ADDR 0xffffffffffffffffull + +#define SJA1110_PCS_BANK_REG SJA1110_SPI_ADDR(0x3fc) + +#define DSA_8021Q_DIR_TX BIT(11) +#define DSA_8021Q_PORT_SHIFT 0 +#define DSA_8021Q_PORT_MASK GENMASK(3, 0) +#define DSA_8021Q_PORT(x) (((x) << DSA_8021Q_PORT_SHIFT) & \ + DSA_8021Q_PORT_MASK) + +#define SJA1105_RATE_MBPS(speed) (((speed) * 64000) / 1000) + +/* XPCS registers */ + +/* VR MII MMD registers offsets */ +#define DW_VR_MII_DIG_CTRL1 0x8000 +#define DW_VR_MII_AN_CTRL 0x8001 +#define DW_VR_MII_DIG_CTRL2 0x80e1 + +/* VR_MII_DIG_CTRL1 */ +#define DW_VR_MII_DIG_CTRL1_MAC_AUTO_SW BIT(9) + +/* VR_MII_DIG_CTRL2 */ +#define DW_VR_MII_DIG_CTRL2_TX_POL_INV BIT(4) + +/* VR_MII_AN_CTRL */ +#define DW_VR_MII_AN_CTRL_TX_CONFIG_SHIFT 3 +#define DW_VR_MII_TX_CONFIG_MASK BIT(3) +#define DW_VR_MII_TX_CONFIG_MAC_SIDE_SGMII 0x0 +#define DW_VR_MII_AN_CTRL_PCS_MODE_SHIFT 1 +#define DW_VR_MII_PCS_MODE_MASK GENMASK(2, 1) +#define DW_VR_MII_PCS_MODE_C37_SGMII 0x2 + +/* PMA registers */ + +/* LANE_DRIVER1_0 register */ +#define SJA1110_LANE_DRIVER1_0 0x8038 +#define SJA1110_TXDRV(x) (((x) << 12) & GENMASK(14, 12)) + +/* LANE_DRIVER2_0 register */ +#define SJA1110_LANE_DRIVER2_0 0x803a +#define SJA1110_TXDRVTRIM_LSB(x) ((x) & GENMASK_ULL(15, 0)) + +/* LANE_DRIVER2_1 register */ +#define SJA1110_LANE_DRIVER2_1 0x803b +#define SJA1110_LANE_DRIVER2_1_RSV BIT(9) +#define SJA1110_TXDRVTRIM_MSB(x) (((x) & GENMASK_ULL(23, 16)) >> 16) + +/* LANE_TRIM register */ +#define SJA1110_LANE_TRIM 0x8040 +#define SJA1110_TXTEN BIT(11) +#define SJA1110_TXRTRIM(x) (((x) << 8) & GENMASK(10, 8)) +#define SJA1110_TXPLL_BWSEL BIT(7) +#define SJA1110_RXTEN BIT(6) +#define SJA1110_RXRTRIM(x) (((x) << 3) & GENMASK(5, 3)) +#define SJA1110_CDR_GAIN BIT(2) +#define SJA1110_ACCOUPLE_RXVCM_EN BIT(0) + +/* LANE_DATAPATH_1 register */ +#define SJA1110_LANE_DATAPATH_1 0x8037 + +/* POWERDOWN_ENABLE register */ +#define SJA1110_POWERDOWN_ENABLE 0x8041 +#define SJA1110_TXPLL_PD BIT(12) +#define SJA1110_TXPD BIT(11) +#define SJA1110_RXPKDETEN BIT(10) +#define SJA1110_RXCH_PD BIT(9) +#define SJA1110_RXBIAS_PD BIT(8) +#define SJA1110_RESET_SER_EN BIT(7) +#define SJA1110_RESET_SER BIT(6) +#define SJA1110_RESET_DES BIT(5) +#define SJA1110_RCVEN BIT(4) + +/* RXPLL_CTRL0 register */ +#define SJA1110_RXPLL_CTRL0 0x8065 +#define SJA1110_RXPLL_FBDIV(x) (((x) << 2) & GENMASK(9, 2)) + +/* RXPLL_CTRL1 register */ +#define SJA1110_RXPLL_CTRL1 0x8066 +#define SJA1110_RXPLL_REFDIV(x) ((x) & GENMASK(4, 0)) + +/* TXPLL_CTRL0 register */ +#define SJA1110_TXPLL_CTRL0 0x806d +#define SJA1110_TXPLL_FBDIV(x) ((x) & GENMASK(11, 0)) + +/* TXPLL_CTRL1 register */ +#define SJA1110_TXPLL_CTRL1 0x806e +#define SJA1110_TXPLL_REFDIV(x) ((x) & GENMASK(5, 0)) + +/* RX_DATA_DETECT register */ +#define SJA1110_RX_DATA_DETECT 0x8045 + +/* RX_CDR_CTLE register */ +#define SJA1110_RX_CDR_CTLE 0x8042 + +/* UM10944.pdf Page 11, Table 2. Configuration Blocks */ +enum { + BLKID_L2_POLICING = 0x06, + BLKID_VLAN_LOOKUP = 0x07, + BLKID_L2_FORWARDING = 0x08, + BLKID_MAC_CONFIG = 0x09, + BLKID_L2_FORWARDING_PARAMS = 0x0E, + BLKID_GENERAL_PARAMS = 0x11, + BLKID_XMII_PARAMS = 0x4E, +}; + +enum sja1105_blk_idx { + BLK_IDX_L2_POLICING = 0, + BLK_IDX_VLAN_LOOKUP, + BLK_IDX_L2_FORWARDING, + BLK_IDX_MAC_CONFIG, + BLK_IDX_L2_FORWARDING_PARAMS, + BLK_IDX_GENERAL_PARAMS, + BLK_IDX_XMII_PARAMS, + BLK_IDX_MAX, +}; + +struct sja1105_general_params_entry { + u64 mac_fltres1; + u64 mac_fltres0; + u64 mac_flt1; + u64 mac_flt0; + u64 casc_port; + u64 host_port; + u64 mirr_port; + u64 tpid; + u64 tpid2; +}; + +struct sja1105_vlan_lookup_entry { + u64 vmemb_port; + u64 vlan_bc; + u64 tag_port; + u64 vlanid; + u64 type_entry; /* SJA1110 only */ +}; + +struct sja1105_l2_forwarding_entry { + u64 bc_domain; + u64 reach_port; + u64 fl_domain; +}; + +struct sja1105_l2_forwarding_params_entry { + u64 part_spc[SJA1105_NUM_TC]; +}; + +struct sja1105_l2_policing_entry { + u64 sharindx; + u64 smax; + u64 rate; + u64 maxlen; + u64 partition; +}; + +struct sja1105_mac_config_entry { + u64 top[SJA1105_NUM_TC]; + u64 base[SJA1105_NUM_TC]; + u64 enabled[SJA1105_NUM_TC]; + u64 speed; + u64 vlanid; + u64 egress; + u64 ingress; +}; + +struct sja1105_xmii_params_entry { + u64 phy_mac[SJA1105_MAX_NUM_PORTS]; + u64 xmii_mode[SJA1105_MAX_NUM_PORTS]; + u64 special[SJA1105_MAX_NUM_PORTS]; +}; + +struct sja1105_table_header { + u64 block_id; + u64 len; + u64 crc; +}; + +struct sja1105_table_ops { + size_t (*packing)(void *buf, void *entry_ptr, enum packing_op op); + size_t unpacked_entry_size; + size_t packed_entry_size; + size_t max_entry_count; +}; + +struct sja1105_table { + const struct sja1105_table_ops *ops; + size_t entry_count; + void *entries; +}; + +struct sja1105_static_config { + u64 device_id; + struct sja1105_table tables[BLK_IDX_MAX]; +}; + +struct sja1105_xpcs_cfg { + bool inband_an; + int speed; +}; + +struct sja1105_private { + struct sja1105_static_config static_config; + bool rgmii_rx_delay[SJA1105_MAX_NUM_PORTS]; + bool rgmii_tx_delay[SJA1105_MAX_NUM_PORTS]; + u16 pvid[SJA1105_MAX_NUM_PORTS]; + struct sja1105_xpcs_cfg xpcs_cfg[SJA1105_MAX_NUM_PORTS]; + struct mii_dev *mdio_pcs; + const struct sja1105_info *info; + struct udevice *dev; +}; + +typedef enum { + SPI_READ = 0, + SPI_WRITE = 1, +} sja1105_spi_rw_mode_t; + +typedef enum { + XMII_MAC = 0, + XMII_PHY = 1, +} sja1105_mii_role_t; + +typedef enum { + XMII_MODE_MII = 0, + XMII_MODE_RMII = 1, + XMII_MODE_RGMII = 2, + XMII_MODE_SGMII = 3, +} sja1105_phy_interface_t; + +enum { + SJA1105_SPEED_AUTO, + SJA1105_SPEED_10MBPS, + SJA1105_SPEED_100MBPS, + SJA1105_SPEED_1000MBPS, + SJA1105_SPEED_MAX, +}; + +enum sja1110_vlan_type { + SJA1110_VLAN_INVALID = 0, + SJA1110_VLAN_C_TAG = 1, /* Single inner VLAN tag */ + SJA1110_VLAN_S_TAG = 2, /* Single outer VLAN tag */ + SJA1110_VLAN_D_TAG = 3, /* Double tagged, use outer tag for lookup */ +}; + +/* Keeps the different addresses between E/T and P/Q/R/S */ +struct sja1105_regs { + u64 device_id; + u64 prod_id; + u64 status; + u64 port_control; + u64 rgu; + u64 config; + u64 rmii_pll1; + u64 pad_mii_tx[SJA1105_MAX_NUM_PORTS]; + u64 pad_mii_rx[SJA1105_MAX_NUM_PORTS]; + u64 pad_mii_id[SJA1105_MAX_NUM_PORTS]; + u64 cgu_idiv[SJA1105_MAX_NUM_PORTS]; + u64 mii_tx_clk[SJA1105_MAX_NUM_PORTS]; + u64 mii_rx_clk[SJA1105_MAX_NUM_PORTS]; + u64 mii_ext_tx_clk[SJA1105_MAX_NUM_PORTS]; + u64 mii_ext_rx_clk[SJA1105_MAX_NUM_PORTS]; + u64 rgmii_tx_clk[SJA1105_MAX_NUM_PORTS]; + u64 rmii_ref_clk[SJA1105_MAX_NUM_PORTS]; + u64 rmii_ext_tx_clk[SJA1105_MAX_NUM_PORTS]; + u64 pcs_base[SJA1105_MAX_NUM_PORTS]; +}; + +struct sja1105_info { + u64 device_id; + u64 part_no; + const struct sja1105_table_ops *static_ops; + const struct sja1105_regs *regs; + int (*reset_cmd)(struct sja1105_private *priv); + int (*setup_rgmii_delay)(struct sja1105_private *priv, int port); + int (*pcs_mdio_read)(struct mii_dev *bus, int phy, int mmd, int reg); + int (*pcs_mdio_write)(struct mii_dev *bus, int phy, int mmd, int reg, + u16 val); + int (*pma_config)(struct sja1105_private *priv, int port); + const char *name; + bool supports_mii[SJA1105_MAX_NUM_PORTS]; + bool supports_rmii[SJA1105_MAX_NUM_PORTS]; + bool supports_rgmii[SJA1105_MAX_NUM_PORTS]; + bool supports_sgmii[SJA1105_MAX_NUM_PORTS]; + const u64 port_speed[SJA1105_SPEED_MAX]; +}; + +struct sja1105_chunk { + u8 *buf; + size_t len; + u64 reg_addr; +}; + +struct sja1105_spi_message { + u64 access; + u64 read_count; + u64 address; +}; + +/* Common structure for CFG_PAD_MIIx_RX and CFG_PAD_MIIx_TX */ +struct sja1105_cfg_pad_mii { + u64 d32_os; + u64 d32_ih; + u64 d32_ipud; + u64 d10_ih; + u64 d10_os; + u64 d10_ipud; + u64 ctrl_os; + u64 ctrl_ih; + u64 ctrl_ipud; + u64 clk_os; + u64 clk_ih; + u64 clk_ipud; +}; + +struct sja1105_cfg_pad_mii_id { + u64 rxc_stable_ovr; + u64 rxc_delay; + u64 rxc_bypass; + u64 rxc_pd; + u64 txc_stable_ovr; + u64 txc_delay; + u64 txc_bypass; + u64 txc_pd; +}; + +struct sja1105_cgu_idiv { + u64 clksrc; + u64 autoblock; + u64 idiv; + u64 pd; +}; + +struct sja1105_cgu_pll_ctrl { + u64 pllclksrc; + u64 msel; + u64 autoblock; + u64 psel; + u64 direct; + u64 fbsel; + u64 bypass; + u64 pd; +}; + +enum { + CLKSRC_MII0_TX_CLK = 0x00, + CLKSRC_MII0_RX_CLK = 0x01, + CLKSRC_MII1_TX_CLK = 0x02, + CLKSRC_MII1_RX_CLK = 0x03, + CLKSRC_MII2_TX_CLK = 0x04, + CLKSRC_MII2_RX_CLK = 0x05, + CLKSRC_MII3_TX_CLK = 0x06, + CLKSRC_MII3_RX_CLK = 0x07, + CLKSRC_MII4_TX_CLK = 0x08, + CLKSRC_MII4_RX_CLK = 0x09, + CLKSRC_PLL0 = 0x0B, + CLKSRC_PLL1 = 0x0E, + CLKSRC_IDIV0 = 0x11, + CLKSRC_IDIV1 = 0x12, + CLKSRC_IDIV2 = 0x13, + CLKSRC_IDIV3 = 0x14, + CLKSRC_IDIV4 = 0x15, +}; + +struct sja1105_cgu_mii_ctrl { + u64 clksrc; + u64 autoblock; + u64 pd; +}; + +static int get_reverse_lsw32_offset(int offset, size_t len) +{ + int closest_multiple_of_4; + int word_index; + + word_index = offset / 4; + closest_multiple_of_4 = word_index * 4; + offset -= closest_multiple_of_4; + word_index = (len / 4) - word_index - 1; + return word_index * 4 + offset; +} + +/* Simplified version of the "packing" function from Linux, adapted + * to support only sja1105's quirk: QUIRK_LSW32_IS_FIRST + */ +static void sja1105_packing(void *pbuf, u64 *uval, int startbit, int endbit, + size_t pbuflen, enum packing_op op) +{ + int plogical_first_u8, plogical_last_u8, box; + + if (op == UNPACK) + *uval = 0; + + plogical_first_u8 = startbit / 8; + plogical_last_u8 = endbit / 8; + + for (box = plogical_first_u8; box >= plogical_last_u8; box--) { + int box_start_bit, box_end_bit, box_addr; + int proj_start_bit, proj_end_bit; + u64 proj_mask; + u8 box_mask; + + if (box == plogical_first_u8) + box_start_bit = startbit % 8; + else + box_start_bit = 7; + if (box == plogical_last_u8) + box_end_bit = endbit % 8; + else + box_end_bit = 0; + + proj_start_bit = ((box * 8) + box_start_bit) - endbit; + proj_end_bit = ((box * 8) + box_end_bit) - endbit; + proj_mask = GENMASK_ULL(proj_start_bit, proj_end_bit); + box_mask = GENMASK_ULL(box_start_bit, box_end_bit); + + box_addr = pbuflen - box - 1; + box_addr = get_reverse_lsw32_offset(box_addr, pbuflen); + + if (op == UNPACK) { + u64 pval; + + /* Read from pbuf, write to uval */ + pval = ((u8 *)pbuf)[box_addr] & box_mask; + + pval >>= box_end_bit; + pval <<= proj_end_bit; + *uval &= ~proj_mask; + *uval |= pval; + } else { + u64 pval; + + /* Write to pbuf, read from uval */ + pval = (*uval) & proj_mask; + pval >>= proj_end_bit; + + pval <<= box_end_bit; + ((u8 *)pbuf)[box_addr] &= ~box_mask; + ((u8 *)pbuf)[box_addr] |= pval; + } + } +} + +static u32 crc32_add(u32 crc, u8 byte) +{ + u32 byte32 = bitrev32(byte); + int i; + + for (i = 0; i < 8; i++) { + if ((crc ^ byte32) & BIT(31)) { + crc <<= 1; + crc ^= ETHER_CRC32_POLY; + } else { + crc <<= 1; + } + byte32 <<= 1; + } + return crc; +} + +/* Little-endian Ethernet CRC32 of data packed as big-endian u32 words */ +static uint32_t sja1105_crc32(void *buf, size_t len) +{ + unsigned int i; + u64 chunk; + u32 crc; + + /* seed */ + crc = 0xFFFFFFFF; + for (i = 0; i < len; i += 4) { + sja1105_packing(buf + i, &chunk, 31, 0, 4, UNPACK); + crc = crc32_add(crc, chunk & 0xFF); + crc = crc32_add(crc, (chunk >> 8) & 0xFF); + crc = crc32_add(crc, (chunk >> 16) & 0xFF); + crc = crc32_add(crc, (chunk >> 24) & 0xFF); + } + return bitrev32(~crc); +} + +static void sja1105_spi_message_pack(void *buf, struct sja1105_spi_message *msg) +{ + const int size = SJA1105_SIZE_SPI_MSG_HEADER; + + memset(buf, 0, size); + + sja1105_packing(buf, &msg->access, 31, 31, size, PACK); + sja1105_packing(buf, &msg->read_count, 30, 25, size, PACK); + sja1105_packing(buf, &msg->address, 24, 4, size, PACK); +} + +static int sja1105_xfer_buf(const struct sja1105_private *priv, + sja1105_spi_rw_mode_t rw, u64 reg_addr, + u8 *buf, size_t len) +{ + struct udevice *dev = priv->dev; + struct sja1105_chunk chunk = { + .len = min_t(size_t, len, SJA1105_SIZE_SPI_MSG_MAXLEN), + .reg_addr = reg_addr, + .buf = buf, + }; + int num_chunks; + int rc, i; + + rc = dm_spi_claim_bus(dev); + if (rc) + return rc; + + num_chunks = DIV_ROUND_UP(len, SJA1105_SIZE_SPI_MSG_MAXLEN); + + for (i = 0; i < num_chunks; i++) { + u8 hdr_buf[SJA1105_SIZE_SPI_MSG_HEADER]; + struct sja1105_spi_message msg; + u8 *rx_buf = NULL; + u8 *tx_buf = NULL; + + /* Populate the transfer's header buffer */ + msg.address = chunk.reg_addr; + msg.access = rw; + if (rw == SPI_READ) + msg.read_count = chunk.len / 4; + else + /* Ignored */ + msg.read_count = 0; + sja1105_spi_message_pack(hdr_buf, &msg); + rc = dm_spi_xfer(dev, SJA1105_SIZE_SPI_MSG_HEADER * 8, hdr_buf, + NULL, SPI_XFER_BEGIN); + if (rc) + goto out; + + /* Populate the transfer's data buffer */ + if (rw == SPI_READ) + rx_buf = chunk.buf; + else + tx_buf = chunk.buf; + rc = dm_spi_xfer(dev, chunk.len * 8, tx_buf, rx_buf, + SPI_XFER_END); + if (rc) + goto out; + + /* Calculate next chunk */ + chunk.buf += chunk.len; + chunk.reg_addr += chunk.len / 4; + chunk.len = min_t(size_t, (ptrdiff_t)(buf + len - chunk.buf), + SJA1105_SIZE_SPI_MSG_MAXLEN); + } + +out: + dm_spi_release_bus(dev); + + return rc; +} + +static int sja1105et_reset_cmd(struct sja1105_private *priv) +{ + const struct sja1105_regs *regs = priv->info->regs; + u8 packed_buf[SJA1105_SIZE_RESET_CMD] = {0}; + const int size = SJA1105_SIZE_RESET_CMD; + u64 cold_rst = 1; + + sja1105_packing(packed_buf, &cold_rst, 3, 3, size, PACK); + + return sja1105_xfer_buf(priv, SPI_WRITE, regs->rgu, packed_buf, + SJA1105_SIZE_RESET_CMD); +} + +static int sja1105pqrs_reset_cmd(struct sja1105_private *priv) +{ + const struct sja1105_regs *regs = priv->info->regs; + u8 packed_buf[SJA1105_SIZE_RESET_CMD] = {0}; + const int size = SJA1105_SIZE_RESET_CMD; + u64 cold_rst = 1; + + sja1105_packing(packed_buf, &cold_rst, 2, 2, size, PACK); + + return sja1105_xfer_buf(priv, SPI_WRITE, regs->rgu, packed_buf, + SJA1105_SIZE_RESET_CMD); +} + +static int sja1110_reset_cmd(struct sja1105_private *priv) +{ + const struct sja1105_regs *regs = priv->info->regs; + u8 packed_buf[SJA1105_SIZE_RESET_CMD] = {0}; + const int size = SJA1105_SIZE_RESET_CMD; + u64 switch_rst = 1; + + /* Only reset the switch core. + * A full cold reset would re-enable the BASE_MCSS_CLOCK PLL which + * would turn on the microcontroller, potentially letting it execute + * code which could interfere with our configuration. + */ + sja1105_packing(packed_buf, &switch_rst, 20, 20, size, PACK); + + return sja1105_xfer_buf(priv, SPI_WRITE, regs->rgu, packed_buf, + SJA1105_SIZE_RESET_CMD); +} + +static size_t sja1105et_general_params_entry_packing(void *buf, void *entry_ptr, + enum packing_op op) +{ + const size_t size = SJA1105ET_SIZE_GENERAL_PARAMS_ENTRY; + struct sja1105_general_params_entry *entry = entry_ptr; + + sja1105_packing(buf, &entry->mac_fltres1, 311, 264, size, op); + sja1105_packing(buf, &entry->mac_fltres0, 263, 216, size, op); + sja1105_packing(buf, &entry->mac_flt1, 215, 168, size, op); + sja1105_packing(buf, &entry->mac_flt0, 167, 120, size, op); + sja1105_packing(buf, &entry->casc_port, 115, 113, size, op); + sja1105_packing(buf, &entry->host_port, 112, 110, size, op); + sja1105_packing(buf, &entry->mirr_port, 109, 107, size, op); + sja1105_packing(buf, &entry->tpid, 42, 27, size, op); + sja1105_packing(buf, &entry->tpid2, 25, 10, size, op); + return size; +} + +static size_t sja1110_general_params_entry_packing(void *buf, void *entry_ptr, + enum packing_op op) +{ + struct sja1105_general_params_entry *entry = entry_ptr; + const size_t size = SJA1110_SIZE_GENERAL_PARAMS_ENTRY; + + sja1105_packing(buf, &entry->mac_fltres1, 438, 391, size, op); + sja1105_packing(buf, &entry->mac_fltres0, 390, 343, size, op); + sja1105_packing(buf, &entry->mac_flt1, 342, 295, size, op); + sja1105_packing(buf, &entry->mac_flt0, 294, 247, size, op); + sja1105_packing(buf, &entry->casc_port, 242, 232, size, op); + sja1105_packing(buf, &entry->host_port, 231, 228, size, op); + sja1105_packing(buf, &entry->mirr_port, 227, 224, size, op); + sja1105_packing(buf, &entry->tpid2, 159, 144, size, op); + sja1105_packing(buf, &entry->tpid, 142, 127, size, op); + return size; +} + +static size_t +sja1105pqrs_general_params_entry_packing(void *buf, void *entry_ptr, + enum packing_op op) +{ + const size_t size = SJA1105PQRS_SIZE_GENERAL_PARAMS_ENTRY; + struct sja1105_general_params_entry *entry = entry_ptr; + + sja1105_packing(buf, &entry->mac_fltres1, 343, 296, size, op); + sja1105_packing(buf, &entry->mac_fltres0, 295, 248, size, op); + sja1105_packing(buf, &entry->mac_flt1, 247, 200, size, op); + sja1105_packing(buf, &entry->mac_flt0, 199, 152, size, op); + sja1105_packing(buf, &entry->casc_port, 147, 145, size, op); + sja1105_packing(buf, &entry->host_port, 144, 142, size, op); + sja1105_packing(buf, &entry->mirr_port, 141, 139, size, op); + sja1105_packing(buf, &entry->tpid, 74, 59, size, op); + sja1105_packing(buf, &entry->tpid2, 57, 42, size, op); + return size; +} + +static size_t +sja1105_l2_forwarding_params_entry_packing(void *buf, void *entry_ptr, + enum packing_op op) +{ + const size_t size = SJA1105_SIZE_L2_FORWARDING_PARAMS_ENTRY; + struct sja1105_l2_forwarding_params_entry *entry = entry_ptr; + int offset, i; + + for (i = 0, offset = 13; i < SJA1105_NUM_TC; i++, offset += 10) + sja1105_packing(buf, &entry->part_spc[i], + offset + 9, offset + 0, size, op); + return size; +} + +static size_t +sja1110_l2_forwarding_params_entry_packing(void *buf, void *entry_ptr, + enum packing_op op) +{ + struct sja1105_l2_forwarding_params_entry *entry = entry_ptr; + const size_t size = SJA1105_SIZE_L2_FORWARDING_PARAMS_ENTRY; + int offset, i; + + for (i = 0, offset = 5; i < 8; i++, offset += 11) + sja1105_packing(buf, &entry->part_spc[i], + offset + 10, offset + 0, size, op); + return size; +} + +static size_t sja1105_l2_forwarding_entry_packing(void *buf, void *entry_ptr, + enum packing_op op) +{ + const size_t size = SJA1105_SIZE_L2_FORWARDING_ENTRY; + struct sja1105_l2_forwarding_entry *entry = entry_ptr; + + sja1105_packing(buf, &entry->bc_domain, 63, 59, size, op); + sja1105_packing(buf, &entry->reach_port, 58, 54, size, op); + sja1105_packing(buf, &entry->fl_domain, 53, 49, size, op); + return size; +} + +static size_t sja1110_l2_forwarding_entry_packing(void *buf, void *entry_ptr, + enum packing_op op) +{ + struct sja1105_l2_forwarding_entry *entry = entry_ptr; + const size_t size = SJA1105_SIZE_L2_FORWARDING_ENTRY; + + sja1105_packing(buf, &entry->bc_domain, 63, 53, size, op); + sja1105_packing(buf, &entry->reach_port, 52, 42, size, op); + sja1105_packing(buf, &entry->fl_domain, 41, 31, size, op); + return size; +} + +static size_t sja1105_l2_policing_entry_packing(void *buf, void *entry_ptr, + enum packing_op op) +{ + struct sja1105_l2_policing_entry *entry = entry_ptr; + const size_t size = SJA1105_SIZE_L2_POLICING_ENTRY; + + sja1105_packing(buf, &entry->sharindx, 63, 58, size, op); + sja1105_packing(buf, &entry->smax, 57, 42, size, op); + sja1105_packing(buf, &entry->rate, 41, 26, size, op); + sja1105_packing(buf, &entry->maxlen, 25, 15, size, op); + sja1105_packing(buf, &entry->partition, 14, 12, size, op); + return size; +} + +static size_t sja1110_l2_policing_entry_packing(void *buf, void *entry_ptr, + enum packing_op op) +{ + struct sja1105_l2_policing_entry *entry = entry_ptr; + const size_t size = SJA1105_SIZE_L2_POLICING_ENTRY; + + sja1105_packing(buf, &entry->sharindx, 63, 57, size, op); + sja1105_packing(buf, &entry->smax, 56, 39, size, op); + sja1105_packing(buf, &entry->rate, 38, 21, size, op); + sja1105_packing(buf, &entry->maxlen, 20, 10, size, op); + sja1105_packing(buf, &entry->partition, 9, 7, size, op); + return size; +} + +static size_t sja1105et_mac_config_entry_packing(void *buf, void *entry_ptr, + enum packing_op op) +{ + const size_t size = SJA1105ET_SIZE_MAC_CONFIG_ENTRY; + struct sja1105_mac_config_entry *entry = entry_ptr; + int offset, i; + + for (i = 0, offset = 72; i < SJA1105_NUM_TC; i++, offset += 19) { + sja1105_packing(buf, &entry->enabled[i], + offset + 0, offset + 0, size, op); + sja1105_packing(buf, &entry->base[i], + offset + 9, offset + 1, size, op); + sja1105_packing(buf, &entry->top[i], + offset + 18, offset + 10, size, op); + } + sja1105_packing(buf, &entry->speed, 66, 65, size, op); + sja1105_packing(buf, &entry->vlanid, 21, 10, size, op); + sja1105_packing(buf, &entry->egress, 2, 2, size, op); + sja1105_packing(buf, &entry->ingress, 1, 1, size, op); + return size; +} + +static size_t sja1105pqrs_mac_config_entry_packing(void *buf, void *entry_ptr, + enum packing_op op) +{ + const size_t size = SJA1105PQRS_SIZE_MAC_CONFIG_ENTRY; + struct sja1105_mac_config_entry *entry = entry_ptr; + int offset, i; + + for (i = 0, offset = 104; i < SJA1105_NUM_TC; i++, offset += 19) { + sja1105_packing(buf, &entry->enabled[i], + offset + 0, offset + 0, size, op); + sja1105_packing(buf, &entry->base[i], + offset + 9, offset + 1, size, op); + sja1105_packing(buf, &entry->top[i], + offset + 18, offset + 10, size, op); + } + sja1105_packing(buf, &entry->speed, 98, 97, size, op); + sja1105_packing(buf, &entry->vlanid, 53, 42, size, op); + sja1105_packing(buf, &entry->egress, 32, 32, size, op); + sja1105_packing(buf, &entry->ingress, 31, 31, size, op); + return size; +} + +static size_t sja1110_mac_config_entry_packing(void *buf, void *entry_ptr, + enum packing_op op) +{ + const size_t size = SJA1105PQRS_SIZE_MAC_CONFIG_ENTRY; + struct sja1105_mac_config_entry *entry = entry_ptr; + int offset, i; + + for (i = 0, offset = 104; i < 8; i++, offset += 19) { + sja1105_packing(buf, &entry->enabled[i], + offset + 0, offset + 0, size, op); + sja1105_packing(buf, &entry->base[i], + offset + 9, offset + 1, size, op); + sja1105_packing(buf, &entry->top[i], + offset + 18, offset + 10, size, op); + } + sja1105_packing(buf, &entry->speed, 98, 96, size, op); + sja1105_packing(buf, &entry->vlanid, 52, 41, size, op); + sja1105_packing(buf, &entry->egress, 31, 31, size, op); + sja1105_packing(buf, &entry->ingress, 30, 30, size, op); + return size; +} + +static size_t sja1105_vlan_lookup_entry_packing(void *buf, void *entry_ptr, + enum packing_op op) +{ + const size_t size = SJA1105_SIZE_VLAN_LOOKUP_ENTRY; + struct sja1105_vlan_lookup_entry *entry = entry_ptr; + + sja1105_packing(buf, &entry->vmemb_port, 53, 49, size, op); + sja1105_packing(buf, &entry->vlan_bc, 48, 44, size, op); + sja1105_packing(buf, &entry->tag_port, 43, 39, size, op); + sja1105_packing(buf, &entry->vlanid, 38, 27, size, op); + return size; +} + +static size_t sja1110_vlan_lookup_entry_packing(void *buf, void *entry_ptr, + enum packing_op op) +{ + struct sja1105_vlan_lookup_entry *entry = entry_ptr; + const size_t size = SJA1110_SIZE_VLAN_LOOKUP_ENTRY; + + sja1105_packing(buf, &entry->vmemb_port, 73, 63, size, op); + sja1105_packing(buf, &entry->vlan_bc, 62, 52, size, op); + sja1105_packing(buf, &entry->tag_port, 51, 41, size, op); + sja1105_packing(buf, &entry->type_entry, 40, 39, size, op); + sja1105_packing(buf, &entry->vlanid, 38, 27, size, op); + return size; +} + +static size_t sja1105_xmii_params_entry_packing(void *buf, void *entry_ptr, + enum packing_op op) +{ + const size_t size = SJA1105_SIZE_XMII_PARAMS_ENTRY; + struct sja1105_xmii_params_entry *entry = entry_ptr; + int offset, i; + + for (i = 0, offset = 17; i < SJA1105_NUM_PORTS; i++, offset += 3) { + sja1105_packing(buf, &entry->xmii_mode[i], + offset + 1, offset + 0, size, op); + sja1105_packing(buf, &entry->phy_mac[i], + offset + 2, offset + 2, size, op); + } + return size; +} + +static size_t sja1110_xmii_params_entry_packing(void *buf, void *entry_ptr, + enum packing_op op) +{ + const size_t size = SJA1110_SIZE_XMII_PARAMS_ENTRY; + struct sja1105_xmii_params_entry *entry = entry_ptr; + int offset, i; + + for (i = 0, offset = 20; i < SJA1110_NUM_PORTS; i++, offset += 4) { + sja1105_packing(buf, &entry->xmii_mode[i], + offset + 1, offset + 0, size, op); + sja1105_packing(buf, &entry->phy_mac[i], + offset + 2, offset + 2, size, op); + sja1105_packing(buf, &entry->special[i], + offset + 3, offset + 3, size, op); + } + return size; +} + +static size_t sja1105_table_header_packing(void *buf, void *entry_ptr, + enum packing_op op) +{ + const size_t size = SJA1105_SIZE_TABLE_HEADER; + struct sja1105_table_header *entry = entry_ptr; + + sja1105_packing(buf, &entry->block_id, 31, 24, size, op); + sja1105_packing(buf, &entry->len, 55, 32, size, op); + sja1105_packing(buf, &entry->crc, 95, 64, size, op); + return size; +} + +static void +sja1105_table_header_pack_with_crc(void *buf, struct sja1105_table_header *hdr) +{ + /* First pack the table as-is, then calculate the CRC, and + * finally put the proper CRC into the packed buffer + */ + memset(buf, 0, SJA1105_SIZE_TABLE_HEADER); + sja1105_table_header_packing(buf, hdr, PACK); + hdr->crc = sja1105_crc32(buf, SJA1105_SIZE_TABLE_HEADER - 4); + sja1105_packing(buf + SJA1105_SIZE_TABLE_HEADER - 4, &hdr->crc, + 31, 0, 4, PACK); +} + +static void sja1105_table_write_crc(u8 *table_start, u8 *crc_ptr) +{ + u64 computed_crc; + int len_bytes; + + len_bytes = (uintptr_t)(crc_ptr - table_start); + computed_crc = sja1105_crc32(table_start, len_bytes); + sja1105_packing(crc_ptr, &computed_crc, 31, 0, 4, PACK); +} + +/* The block IDs that the switches support are unfortunately sparse, so keep a + * mapping table to "block indices" and translate back and forth. + */ +static const u64 blk_id_map[BLK_IDX_MAX] = { + [BLK_IDX_L2_POLICING] = BLKID_L2_POLICING, + [BLK_IDX_VLAN_LOOKUP] = BLKID_VLAN_LOOKUP, + [BLK_IDX_L2_FORWARDING] = BLKID_L2_FORWARDING, + [BLK_IDX_MAC_CONFIG] = BLKID_MAC_CONFIG, + [BLK_IDX_L2_FORWARDING_PARAMS] = BLKID_L2_FORWARDING_PARAMS, + [BLK_IDX_GENERAL_PARAMS] = BLKID_GENERAL_PARAMS, + [BLK_IDX_XMII_PARAMS] = BLKID_XMII_PARAMS, +}; + +static void +sja1105_static_config_pack(void *buf, struct sja1105_static_config *config) +{ + struct sja1105_table_header header = {0}; + enum sja1105_blk_idx i; + u8 *p = buf; + int j; + + sja1105_packing(p, &config->device_id, 31, 0, 4, PACK); + p += SJA1105_SIZE_DEVICE_ID; + + for (i = 0; i < BLK_IDX_MAX; i++) { + const struct sja1105_table *table; + u8 *table_start; + + table = &config->tables[i]; + if (!table->entry_count) + continue; + + header.block_id = blk_id_map[i]; + header.len = table->entry_count * + table->ops->packed_entry_size / 4; + sja1105_table_header_pack_with_crc(p, &header); + p += SJA1105_SIZE_TABLE_HEADER; + table_start = p; + for (j = 0; j < table->entry_count; j++) { + u8 *entry_ptr = table->entries; + + entry_ptr += j * table->ops->unpacked_entry_size; + memset(p, 0, table->ops->packed_entry_size); + table->ops->packing(p, entry_ptr, PACK); + p += table->ops->packed_entry_size; + } + sja1105_table_write_crc(table_start, p); + p += 4; + } + /* Final header: + * Block ID does not matter + * Length of 0 marks that header is final + * CRC will be replaced on-the-fly + */ + header.block_id = 0; + header.len = 0; + header.crc = 0xDEADBEEF; + memset(p, 0, SJA1105_SIZE_TABLE_HEADER); + sja1105_table_header_packing(p, &header, PACK); +} + +static size_t +sja1105_static_config_get_length(const struct sja1105_static_config *config) +{ + unsigned int header_count; + enum sja1105_blk_idx i; + unsigned int sum; + + /* Ending header */ + header_count = 1; + sum = SJA1105_SIZE_DEVICE_ID; + + /* Tables (headers and entries) */ + for (i = 0; i < BLK_IDX_MAX; i++) { + const struct sja1105_table *table; + + table = &config->tables[i]; + if (table->entry_count) + header_count++; + + sum += table->ops->packed_entry_size * table->entry_count; + } + /* Headers have an additional CRC at the end */ + sum += header_count * (SJA1105_SIZE_TABLE_HEADER + 4); + /* Last header does not have an extra CRC because there is no data */ + sum -= 4; + + return sum; +} + +/* Compatibility matrices */ +static const struct sja1105_table_ops sja1105et_table_ops[BLK_IDX_MAX] = { + [BLK_IDX_L2_POLICING] = { + .packing = sja1105_l2_policing_entry_packing, + .unpacked_entry_size = sizeof(struct sja1105_l2_policing_entry), + .packed_entry_size = SJA1105_SIZE_L2_POLICING_ENTRY, + .max_entry_count = SJA1105_MAX_L2_POLICING_COUNT, + }, + [BLK_IDX_VLAN_LOOKUP] = { + .packing = sja1105_vlan_lookup_entry_packing, + .unpacked_entry_size = sizeof(struct sja1105_vlan_lookup_entry), + .packed_entry_size = SJA1105_SIZE_VLAN_LOOKUP_ENTRY, + .max_entry_count = SJA1105_MAX_VLAN_LOOKUP_COUNT, + }, + [BLK_IDX_L2_FORWARDING] = { + .packing = sja1105_l2_forwarding_entry_packing, + .unpacked_entry_size = sizeof(struct sja1105_l2_forwarding_entry), + .packed_entry_size = SJA1105_SIZE_L2_FORWARDING_ENTRY, + .max_entry_count = SJA1105_MAX_L2_FORWARDING_COUNT, + }, + [BLK_IDX_MAC_CONFIG] = { + .packing = sja1105et_mac_config_entry_packing, + .unpacked_entry_size = sizeof(struct sja1105_mac_config_entry), + .packed_entry_size = SJA1105ET_SIZE_MAC_CONFIG_ENTRY, + .max_entry_count = SJA1105_MAX_MAC_CONFIG_COUNT, + }, + [BLK_IDX_L2_FORWARDING_PARAMS] = { + .packing = sja1105_l2_forwarding_params_entry_packing, + .unpacked_entry_size = sizeof(struct sja1105_l2_forwarding_params_entry), + .packed_entry_size = SJA1105_SIZE_L2_FORWARDING_PARAMS_ENTRY, + .max_entry_count = SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT, + }, + [BLK_IDX_GENERAL_PARAMS] = { + .packing = sja1105et_general_params_entry_packing, + .unpacked_entry_size = sizeof(struct sja1105_general_params_entry), + .packed_entry_size = SJA1105ET_SIZE_GENERAL_PARAMS_ENTRY, + .max_entry_count = SJA1105_MAX_GENERAL_PARAMS_COUNT, + }, + [BLK_IDX_XMII_PARAMS] = { + .packing = sja1105_xmii_params_entry_packing, + .unpacked_entry_size = sizeof(struct sja1105_xmii_params_entry), + .packed_entry_size = SJA1105_SIZE_XMII_PARAMS_ENTRY, + .max_entry_count = SJA1105_MAX_XMII_PARAMS_COUNT, + }, +}; + +static const struct sja1105_table_ops sja1105pqrs_table_ops[BLK_IDX_MAX] = { + [BLK_IDX_L2_POLICING] = { + .packing = sja1105_l2_policing_entry_packing, + .unpacked_entry_size = sizeof(struct sja1105_l2_policing_entry), + .packed_entry_size = SJA1105_SIZE_L2_POLICING_ENTRY, + .max_entry_count = SJA1105_MAX_L2_POLICING_COUNT, + }, + [BLK_IDX_VLAN_LOOKUP] = { + .packing = sja1105_vlan_lookup_entry_packing, + .unpacked_entry_size = sizeof(struct sja1105_vlan_lookup_entry), + .packed_entry_size = SJA1105_SIZE_VLAN_LOOKUP_ENTRY, + .max_entry_count = SJA1105_MAX_VLAN_LOOKUP_COUNT, + }, + [BLK_IDX_L2_FORWARDING] = { + .packing = sja1105_l2_forwarding_entry_packing, + .unpacked_entry_size = sizeof(struct sja1105_l2_forwarding_entry), + .packed_entry_size = SJA1105_SIZE_L2_FORWARDING_ENTRY, + .max_entry_count = SJA1105_MAX_L2_FORWARDING_COUNT, + }, + [BLK_IDX_MAC_CONFIG] = { + .packing = sja1105pqrs_mac_config_entry_packing, + .unpacked_entry_size = sizeof(struct sja1105_mac_config_entry), + .packed_entry_size = SJA1105PQRS_SIZE_MAC_CONFIG_ENTRY, + .max_entry_count = SJA1105_MAX_MAC_CONFIG_COUNT, + }, + [BLK_IDX_L2_FORWARDING_PARAMS] = { + .packing = sja1105_l2_forwarding_params_entry_packing, + .unpacked_entry_size = sizeof(struct sja1105_l2_forwarding_params_entry), + .packed_entry_size = SJA1105_SIZE_L2_FORWARDING_PARAMS_ENTRY, + .max_entry_count = SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT, + }, + [BLK_IDX_GENERAL_PARAMS] = { + .packing = sja1105pqrs_general_params_entry_packing, + .unpacked_entry_size = sizeof(struct sja1105_general_params_entry), + .packed_entry_size = SJA1105PQRS_SIZE_GENERAL_PARAMS_ENTRY, + .max_entry_count = SJA1105_MAX_GENERAL_PARAMS_COUNT, + }, + [BLK_IDX_XMII_PARAMS] = { + .packing = sja1105_xmii_params_entry_packing, + .unpacked_entry_size = sizeof(struct sja1105_xmii_params_entry), + .packed_entry_size = SJA1105_SIZE_XMII_PARAMS_ENTRY, + .max_entry_count = SJA1105_MAX_XMII_PARAMS_COUNT, + }, +}; + +static const struct sja1105_table_ops sja1110_table_ops[BLK_IDX_MAX] = { + [BLK_IDX_L2_POLICING] = { + .packing = sja1110_l2_policing_entry_packing, + .unpacked_entry_size = sizeof(struct sja1105_l2_policing_entry), + .packed_entry_size = SJA1105_SIZE_L2_POLICING_ENTRY, + .max_entry_count = SJA1110_MAX_L2_POLICING_COUNT, + }, + [BLK_IDX_VLAN_LOOKUP] = { + .packing = sja1110_vlan_lookup_entry_packing, + .unpacked_entry_size = sizeof(struct sja1105_vlan_lookup_entry), + .packed_entry_size = SJA1110_SIZE_VLAN_LOOKUP_ENTRY, + .max_entry_count = SJA1105_MAX_VLAN_LOOKUP_COUNT, + }, + [BLK_IDX_L2_FORWARDING] = { + .packing = sja1110_l2_forwarding_entry_packing, + .unpacked_entry_size = sizeof(struct sja1105_l2_forwarding_entry), + .packed_entry_size = SJA1105_SIZE_L2_FORWARDING_ENTRY, + .max_entry_count = SJA1110_MAX_L2_FORWARDING_COUNT, + }, + [BLK_IDX_MAC_CONFIG] = { + .packing = sja1110_mac_config_entry_packing, + .unpacked_entry_size = sizeof(struct sja1105_mac_config_entry), + .packed_entry_size = SJA1105PQRS_SIZE_MAC_CONFIG_ENTRY, + .max_entry_count = SJA1110_MAX_MAC_CONFIG_COUNT, + }, + [BLK_IDX_L2_FORWARDING_PARAMS] = { + .packing = sja1110_l2_forwarding_params_entry_packing, + .unpacked_entry_size = sizeof(struct sja1105_l2_forwarding_params_entry), + .packed_entry_size = SJA1105_SIZE_L2_FORWARDING_PARAMS_ENTRY, + .max_entry_count = SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT, + }, + [BLK_IDX_GENERAL_PARAMS] = { + .packing = sja1110_general_params_entry_packing, + .unpacked_entry_size = sizeof(struct sja1105_general_params_entry), + .packed_entry_size = SJA1110_SIZE_GENERAL_PARAMS_ENTRY, + .max_entry_count = SJA1105_MAX_GENERAL_PARAMS_COUNT, + }, + [BLK_IDX_XMII_PARAMS] = { + .packing = sja1110_xmii_params_entry_packing, + .unpacked_entry_size = sizeof(struct sja1105_xmii_params_entry), + .packed_entry_size = SJA1110_SIZE_XMII_PARAMS_ENTRY, + .max_entry_count = SJA1105_MAX_XMII_PARAMS_COUNT, + }, +}; + +static int sja1105_init_mii_settings(struct sja1105_private *priv) +{ + struct sja1105_table *table; + + table = &priv->static_config.tables[BLK_IDX_XMII_PARAMS]; + + table->entries = calloc(SJA1105_MAX_XMII_PARAMS_COUNT, + table->ops->unpacked_entry_size); + if (!table->entries) + return -ENOMEM; + + /* Table will be populated at runtime */ + table->entry_count = SJA1105_MAX_XMII_PARAMS_COUNT; + + return 0; +} + +static void sja1105_setup_tagging(struct sja1105_private *priv, int port) +{ + struct dsa_pdata *pdata = dev_get_uclass_plat(priv->dev); + struct sja1105_vlan_lookup_entry *vlan; + int cpu = pdata->cpu_port; + + /* The CPU port is implicitly configured by + * configuring the front-panel ports + */ + if (port == cpu) + return; + + vlan = priv->static_config.tables[BLK_IDX_VLAN_LOOKUP].entries; + + priv->pvid[port] = DSA_8021Q_DIR_TX | DSA_8021Q_PORT(port); + + vlan[port].vmemb_port = BIT(port) | BIT(cpu); + vlan[port].vlan_bc = BIT(port) | BIT(cpu); + vlan[port].tag_port = BIT(cpu); + vlan[port].vlanid = priv->pvid[port]; + vlan[port].type_entry = SJA1110_VLAN_D_TAG; +} + +static int sja1105_init_vlan(struct sja1105_private *priv) +{ + struct dsa_pdata *pdata = dev_get_uclass_plat(priv->dev); + struct sja1105_table *table; + int port; + + table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP]; + + table->entries = calloc(pdata->num_ports, + table->ops->unpacked_entry_size); + if (!table->entries) + return -ENOMEM; + + table->entry_count = pdata->num_ports; + + for (port = 0; port < pdata->num_ports; port++) + sja1105_setup_tagging(priv, port); + + return 0; +} + +static void +sja1105_port_allow_traffic(struct sja1105_l2_forwarding_entry *l2_fwd, + int from, int to) +{ + l2_fwd[from].bc_domain |= BIT(to); + l2_fwd[from].reach_port |= BIT(to); + l2_fwd[from].fl_domain |= BIT(to); +} + +static int sja1105_init_l2_forwarding(struct sja1105_private *priv) +{ + struct dsa_pdata *pdata = dev_get_uclass_plat(priv->dev); + struct sja1105_l2_forwarding_entry *l2fwd; + struct sja1105_table *table; + int cpu = pdata->cpu_port; + int i; + + table = &priv->static_config.tables[BLK_IDX_L2_FORWARDING]; + + table->entries = calloc(SJA1105_MAX_L2_FORWARDING_COUNT, + table->ops->unpacked_entry_size); + if (!table->entries) + return -ENOMEM; + + table->entry_count = SJA1105_MAX_L2_FORWARDING_COUNT; + + l2fwd = table->entries; + + /* First 5 entries define the forwarding rules */ + for (i = 0; i < pdata->num_ports; i++) { + if (i == cpu) + continue; + + sja1105_port_allow_traffic(l2fwd, i, cpu); + sja1105_port_allow_traffic(l2fwd, cpu, i); + } + /* Next 8 entries define VLAN PCP mapping from ingress to egress. + * Leave them unpopulated (implicitly 0) but present. + */ + return 0; +} + +static int sja1105_init_l2_forwarding_params(struct sja1105_private *priv) +{ + struct sja1105_l2_forwarding_params_entry default_l2fwd_params = { + /* Use a single memory partition for all ingress queues */ + .part_spc = { SJA1105_MAX_FRAME_MEMORY, 0, 0, 0, 0, 0, 0, 0 }, + }; + struct sja1105_table *table; + + table = &priv->static_config.tables[BLK_IDX_L2_FORWARDING_PARAMS]; + + table->entries = calloc(SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT, + table->ops->unpacked_entry_size); + if (!table->entries) + return -ENOMEM; + + table->entry_count = SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT; + + /* This table only has a single entry */ + ((struct sja1105_l2_forwarding_params_entry *)table->entries)[0] = + default_l2fwd_params; + + return 0; +} + +static int sja1105_init_general_params(struct sja1105_private *priv) +{ + struct dsa_pdata *pdata = dev_get_uclass_plat(priv->dev); + struct sja1105_general_params_entry default_general_params = { + /* No frame trapping */ + .mac_fltres1 = 0x0, + .mac_flt1 = 0xffffffffffff, + .mac_fltres0 = 0x0, + .mac_flt0 = 0xffffffffffff, + .host_port = pdata->num_ports, + /* No mirroring => specify an out-of-range port value */ + .mirr_port = pdata->num_ports, + /* No link-local trapping => specify an out-of-range port value + */ + .casc_port = pdata->num_ports, + /* Force the switch to see all traffic as untagged. */ + .tpid = ETH_P_SJA1105, + .tpid2 = ETH_P_SJA1105, + }; + struct sja1105_table *table; + + table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS]; + + table->entries = calloc(SJA1105_MAX_GENERAL_PARAMS_COUNT, + table->ops->unpacked_entry_size); + if (!table->entries) + return -ENOMEM; + + table->entry_count = SJA1105_MAX_GENERAL_PARAMS_COUNT; + + /* This table only has a single entry */ + ((struct sja1105_general_params_entry *)table->entries)[0] = + default_general_params; + + return 0; +} + +static void sja1105_setup_policer(struct sja1105_l2_policing_entry *policing, + int index, int mtu) +{ + policing[index].sharindx = index; + policing[index].smax = 65535; /* Burst size in bytes */ + policing[index].rate = SJA1105_RATE_MBPS(1000); + policing[index].maxlen = mtu; + policing[index].partition = 0; +} + +static int sja1105_init_l2_policing(struct sja1105_private *priv) +{ + struct dsa_pdata *pdata = dev_get_uclass_plat(priv->dev); + struct sja1105_l2_policing_entry *policing; + struct sja1105_table *table; + int cpu = pdata->cpu_port; + int i, j, k; + + table = &priv->static_config.tables[BLK_IDX_L2_POLICING]; + + table->entries = calloc(SJA1105_MAX_L2_POLICING_COUNT, + table->ops->unpacked_entry_size); + if (!table->entries) + return -ENOMEM; + + table->entry_count = SJA1105_MAX_L2_POLICING_COUNT; + + policing = table->entries; + + /* k sweeps through all unicast policers (0-39). + * bcast sweeps through policers 40-44. + */ + for (i = 0, k = 0; i < pdata->num_ports; i++) { + int bcast = (pdata->num_ports * SJA1105_NUM_TC) + i; + int mtu = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN; + + if (i == cpu) + mtu += VLAN_HLEN; + + for (j = 0; j < SJA1105_NUM_TC; j++, k++) + sja1105_setup_policer(policing, k, mtu); + + /* Set up this port's policer for broadcast traffic */ + sja1105_setup_policer(policing, bcast, mtu); + } + return 0; +} + +static int sja1105_init_mac_settings(struct sja1105_private *priv) +{ + struct sja1105_mac_config_entry default_mac = { + /* Enable 1 priority queue on egress. */ + .top = {0x1FF, 0, 0, 0, 0, 0, 0}, + .base = {0x0, 0, 0, 0, 0, 0, 0, 0}, + .enabled = {1, 0, 0, 0, 0, 0, 0, 0}, + /* Will be overridden in sja1105_port_enable. */ + .speed = priv->info->port_speed[SJA1105_SPEED_AUTO], + .egress = true, + .ingress = true, + }; + struct dsa_pdata *pdata = dev_get_uclass_plat(priv->dev); + struct sja1105_mac_config_entry *mac; + struct sja1105_table *table; + int port; + + table = &priv->static_config.tables[BLK_IDX_MAC_CONFIG]; + + table->entries = calloc(pdata->num_ports, + table->ops->unpacked_entry_size); + if (!table->entries) + return -ENOMEM; + + table->entry_count = pdata->num_ports; + + mac = table->entries; + + for (port = 0; port < pdata->num_ports; port++) { + mac[port] = default_mac; + /* Internal VLAN (pvid) to apply to untagged ingress */ + mac[port].vlanid = priv->pvid[port]; + } + + return 0; +} + +static int sja1105_static_config_init(struct sja1105_private *priv) +{ + struct sja1105_static_config *config = &priv->static_config; + const struct sja1105_table_ops *static_ops = priv->info->static_ops; + u64 device_id = priv->info->device_id; + enum sja1105_blk_idx i; + int rc; + + *config = (struct sja1105_static_config) {0}; + + /* Transfer static_ops array from priv into per-table ops + * for handier access + */ + for (i = 0; i < BLK_IDX_MAX; i++) + config->tables[i].ops = &static_ops[i]; + + config->device_id = device_id; + + /* Build initial static configuration, to be fixed up during runtime */ + rc = sja1105_init_vlan(priv); + if (rc < 0) + return rc; + rc = sja1105_init_mac_settings(priv); + if (rc < 0) + return rc; + rc = sja1105_init_mii_settings(priv); + if (rc < 0) + return rc; + rc = sja1105_init_l2_forwarding(priv); + if (rc < 0) + return rc; + rc = sja1105_init_l2_forwarding_params(priv); + if (rc < 0) + return rc; + rc = sja1105_init_l2_policing(priv); + if (rc < 0) + return rc; + rc = sja1105_init_general_params(priv); + if (rc < 0) + return rc; + + return 0; +} + +static void sja1105_static_config_free(struct sja1105_static_config *config) +{ + enum sja1105_blk_idx i; + + for (i = 0; i < BLK_IDX_MAX; i++) { + if (config->tables[i].entry_count) { + free(config->tables[i].entries); + config->tables[i].entry_count = 0; + } + } +} + +static void sja1105_cgu_idiv_packing(void *buf, struct sja1105_cgu_idiv *idiv, + enum packing_op op) +{ + const int size = 4; + + sja1105_packing(buf, &idiv->clksrc, 28, 24, size, op); + sja1105_packing(buf, &idiv->autoblock, 11, 11, size, op); + sja1105_packing(buf, &idiv->idiv, 5, 2, size, op); + sja1105_packing(buf, &idiv->pd, 0, 0, size, op); +} + +static int sja1105_cgu_idiv_config(struct sja1105_private *priv, int port, + bool enabled, int factor) +{ + const struct sja1105_regs *regs = priv->info->regs; + u8 packed_buf[SJA1105_SIZE_CGU_CMD] = {0}; + struct sja1105_cgu_idiv idiv; + + if (regs->cgu_idiv[port] == SJA1105_RSV_ADDR) + return 0; + + if (enabled && factor != 1 && factor != 10) + return -ERANGE; + + /* Payload for packed_buf */ + idiv.clksrc = 0x0A; /* 25MHz */ + idiv.autoblock = 1; /* Block clk automatically */ + idiv.idiv = factor - 1; /* Divide by 1 or 10 */ + idiv.pd = enabled ? 0 : 1; /* Power down? */ + sja1105_cgu_idiv_packing(packed_buf, &idiv, PACK); + + return sja1105_xfer_buf(priv, SPI_WRITE, regs->cgu_idiv[port], + packed_buf, SJA1105_SIZE_CGU_CMD); +} + +static void +sja1105_cgu_mii_control_packing(void *buf, struct sja1105_cgu_mii_ctrl *cmd, + enum packing_op op) +{ + const int size = 4; + + sja1105_packing(buf, &cmd->clksrc, 28, 24, size, op); + sja1105_packing(buf, &cmd->autoblock, 11, 11, size, op); + sja1105_packing(buf, &cmd->pd, 0, 0, size, op); +} + +static int sja1105_cgu_mii_tx_clk_config(struct sja1105_private *priv, + int port, sja1105_mii_role_t role) +{ + const struct sja1105_regs *regs = priv->info->regs; + struct sja1105_cgu_mii_ctrl mii_tx_clk; + const int mac_clk_sources[] = { + CLKSRC_MII0_TX_CLK, + CLKSRC_MII1_TX_CLK, + CLKSRC_MII2_TX_CLK, + CLKSRC_MII3_TX_CLK, + CLKSRC_MII4_TX_CLK, + }; + const int phy_clk_sources[] = { + CLKSRC_IDIV0, + CLKSRC_IDIV1, + CLKSRC_IDIV2, + CLKSRC_IDIV3, + CLKSRC_IDIV4, + }; + u8 packed_buf[SJA1105_SIZE_CGU_CMD] = {0}; + int clksrc; + + if (regs->mii_tx_clk[port] == SJA1105_RSV_ADDR) + return 0; + + if (role == XMII_MAC) + clksrc = mac_clk_sources[port]; + else + clksrc = phy_clk_sources[port]; + + /* Payload for packed_buf */ + mii_tx_clk.clksrc = clksrc; + mii_tx_clk.autoblock = 1; /* Autoblock clk while changing clksrc */ + mii_tx_clk.pd = 0; /* Power Down off => enabled */ + sja1105_cgu_mii_control_packing(packed_buf, &mii_tx_clk, PACK); + + return sja1105_xfer_buf(priv, SPI_WRITE, regs->mii_tx_clk[port], + packed_buf, SJA1105_SIZE_CGU_CMD); +} + +static int +sja1105_cgu_mii_rx_clk_config(struct sja1105_private *priv, int port) +{ + const struct sja1105_regs *regs = priv->info->regs; + u8 packed_buf[SJA1105_SIZE_CGU_CMD] = {0}; + struct sja1105_cgu_mii_ctrl mii_rx_clk; + const int clk_sources[] = { + CLKSRC_MII0_RX_CLK, + CLKSRC_MII1_RX_CLK, + CLKSRC_MII2_RX_CLK, + CLKSRC_MII3_RX_CLK, + CLKSRC_MII4_RX_CLK, + }; + + if (regs->mii_rx_clk[port] == SJA1105_RSV_ADDR) + return 0; + + /* Payload for packed_buf */ + mii_rx_clk.clksrc = clk_sources[port]; + mii_rx_clk.autoblock = 1; /* Autoblock clk while changing clksrc */ + mii_rx_clk.pd = 0; /* Power Down off => enabled */ + sja1105_cgu_mii_control_packing(packed_buf, &mii_rx_clk, PACK); + + return sja1105_xfer_buf(priv, SPI_WRITE, regs->mii_rx_clk[port], + packed_buf, SJA1105_SIZE_CGU_CMD); +} + +static int +sja1105_cgu_mii_ext_tx_clk_config(struct sja1105_private *priv, int port) +{ + const struct sja1105_regs *regs = priv->info->regs; + struct sja1105_cgu_mii_ctrl mii_ext_tx_clk; + u8 packed_buf[SJA1105_SIZE_CGU_CMD] = {0}; + const int clk_sources[] = { + CLKSRC_IDIV0, + CLKSRC_IDIV1, + CLKSRC_IDIV2, + CLKSRC_IDIV3, + CLKSRC_IDIV4, + }; + + if (regs->mii_ext_tx_clk[port] == SJA1105_RSV_ADDR) + return 0; + + /* Payload for packed_buf */ + mii_ext_tx_clk.clksrc = clk_sources[port]; + mii_ext_tx_clk.autoblock = 1; /* Autoblock clk while changing clksrc */ + mii_ext_tx_clk.pd = 0; /* Power Down off => enabled */ + sja1105_cgu_mii_control_packing(packed_buf, &mii_ext_tx_clk, PACK); + + return sja1105_xfer_buf(priv, SPI_WRITE, regs->mii_ext_tx_clk[port], + packed_buf, SJA1105_SIZE_CGU_CMD); +} + +static int +sja1105_cgu_mii_ext_rx_clk_config(struct sja1105_private *priv, int port) +{ + const struct sja1105_regs *regs = priv->info->regs; + struct sja1105_cgu_mii_ctrl mii_ext_rx_clk; + u8 packed_buf[SJA1105_SIZE_CGU_CMD] = {0}; + const int clk_sources[] = { + CLKSRC_IDIV0, + CLKSRC_IDIV1, + CLKSRC_IDIV2, + CLKSRC_IDIV3, + CLKSRC_IDIV4, + }; + + if (regs->mii_ext_rx_clk[port] == SJA1105_RSV_ADDR) + return 0; + + /* Payload for packed_buf */ + mii_ext_rx_clk.clksrc = clk_sources[port]; + mii_ext_rx_clk.autoblock = 1; /* Autoblock clk while changing clksrc */ + mii_ext_rx_clk.pd = 0; /* Power Down off => enabled */ + sja1105_cgu_mii_control_packing(packed_buf, &mii_ext_rx_clk, PACK); + + return sja1105_xfer_buf(priv, SPI_WRITE, regs->mii_ext_rx_clk[port], + packed_buf, SJA1105_SIZE_CGU_CMD); +} + +static int sja1105_mii_clocking_setup(struct sja1105_private *priv, int port, + sja1105_mii_role_t role) +{ + int rc; + + rc = sja1105_cgu_idiv_config(priv, port, (role == XMII_PHY), 1); + if (rc < 0) + return rc; + + rc = sja1105_cgu_mii_tx_clk_config(priv, port, role); + if (rc < 0) + return rc; + + rc = sja1105_cgu_mii_rx_clk_config(priv, port); + if (rc < 0) + return rc; + + if (role == XMII_PHY) { + rc = sja1105_cgu_mii_ext_tx_clk_config(priv, port); + if (rc < 0) + return rc; + + rc = sja1105_cgu_mii_ext_rx_clk_config(priv, port); + if (rc < 0) + return rc; + } + return 0; +} + +static void +sja1105_cgu_pll_control_packing(void *buf, struct sja1105_cgu_pll_ctrl *cmd, + enum packing_op op) +{ + const int size = 4; + + sja1105_packing(buf, &cmd->pllclksrc, 28, 24, size, op); + sja1105_packing(buf, &cmd->msel, 23, 16, size, op); + sja1105_packing(buf, &cmd->autoblock, 11, 11, size, op); + sja1105_packing(buf, &cmd->psel, 9, 8, size, op); + sja1105_packing(buf, &cmd->direct, 7, 7, size, op); + sja1105_packing(buf, &cmd->fbsel, 6, 6, size, op); + sja1105_packing(buf, &cmd->bypass, 1, 1, size, op); + sja1105_packing(buf, &cmd->pd, 0, 0, size, op); +} + +static int sja1105_cgu_rgmii_tx_clk_config(struct sja1105_private *priv, + int port, u64 speed) +{ + const struct sja1105_regs *regs = priv->info->regs; + struct sja1105_cgu_mii_ctrl txc; + u8 packed_buf[SJA1105_SIZE_CGU_CMD] = {0}; + int clksrc; + + if (regs->rgmii_tx_clk[port] == SJA1105_RSV_ADDR) + return 0; + + if (speed == priv->info->port_speed[SJA1105_SPEED_1000MBPS]) { + clksrc = CLKSRC_PLL0; + } else { + int clk_sources[] = {CLKSRC_IDIV0, CLKSRC_IDIV1, CLKSRC_IDIV2, + CLKSRC_IDIV3, CLKSRC_IDIV4}; + clksrc = clk_sources[port]; + } + + /* RGMII: 125MHz for 1000, 25MHz for 100, 2.5MHz for 10 */ + txc.clksrc = clksrc; + /* Autoblock clk while changing clksrc */ + txc.autoblock = 1; + /* Power Down off => enabled */ + txc.pd = 0; + sja1105_cgu_mii_control_packing(packed_buf, &txc, PACK); + + return sja1105_xfer_buf(priv, SPI_WRITE, regs->rgmii_tx_clk[port], + packed_buf, SJA1105_SIZE_CGU_CMD); +} + +/* AGU */ +static void +sja1105_cfg_pad_mii_packing(void *buf, struct sja1105_cfg_pad_mii *cmd, + enum packing_op op) +{ + const int size = 4; + + sja1105_packing(buf, &cmd->d32_os, 28, 27, size, op); + sja1105_packing(buf, &cmd->d32_ih, 26, 26, size, op); + sja1105_packing(buf, &cmd->d32_ipud, 25, 24, size, op); + sja1105_packing(buf, &cmd->d10_os, 20, 19, size, op); + sja1105_packing(buf, &cmd->d10_ih, 18, 18, size, op); + sja1105_packing(buf, &cmd->d10_ipud, 17, 16, size, op); + sja1105_packing(buf, &cmd->ctrl_os, 12, 11, size, op); + sja1105_packing(buf, &cmd->ctrl_ih, 10, 10, size, op); + sja1105_packing(buf, &cmd->ctrl_ipud, 9, 8, size, op); + sja1105_packing(buf, &cmd->clk_os, 4, 3, size, op); + sja1105_packing(buf, &cmd->clk_ih, 2, 2, size, op); + sja1105_packing(buf, &cmd->clk_ipud, 1, 0, size, op); +} + +static void +sja1110_cfg_pad_mii_id_packing(void *buf, struct sja1105_cfg_pad_mii_id *cmd, + enum packing_op op) +{ + const int size = SJA1105_SIZE_CGU_CMD; + u64 range = 4; + + /* Fields RXC_RANGE and TXC_RANGE select the input frequency range: + * 0 = 2.5MHz + * 1 = 25MHz + * 2 = 50MHz + * 3 = 125MHz + * 4 = Automatically determined by port speed. + * There's no point in defining a structure different than the one for + * SJA1105, so just hardcode the frequency range to automatic, just as + * before. + */ + sja1105_packing(buf, &cmd->rxc_stable_ovr, 26, 26, size, op); + sja1105_packing(buf, &cmd->rxc_delay, 25, 21, size, op); + sja1105_packing(buf, &range, 20, 18, size, op); + sja1105_packing(buf, &cmd->rxc_bypass, 17, 17, size, op); + sja1105_packing(buf, &cmd->rxc_pd, 16, 16, size, op); + sja1105_packing(buf, &cmd->txc_stable_ovr, 10, 10, size, op); + sja1105_packing(buf, &cmd->txc_delay, 9, 5, size, op); + sja1105_packing(buf, &range, 4, 2, size, op); + sja1105_packing(buf, &cmd->txc_bypass, 1, 1, size, op); + sja1105_packing(buf, &cmd->txc_pd, 0, 0, size, op); +} + +static int sja1105_rgmii_cfg_pad_tx_config(struct sja1105_private *priv, + int port) +{ + const struct sja1105_regs *regs = priv->info->regs; + struct sja1105_cfg_pad_mii pad_mii_tx = {0}; + u8 packed_buf[SJA1105_SIZE_CGU_CMD] = {0}; + + if (regs->pad_mii_tx[port] == SJA1105_RSV_ADDR) + return 0; + + /* Payload */ + pad_mii_tx.d32_os = 3; /* TXD[3:2] output stage: */ + /* high noise/high speed */ + pad_mii_tx.d10_os = 3; /* TXD[1:0] output stage: */ + /* high noise/high speed */ + pad_mii_tx.d32_ipud = 2; /* TXD[3:2] input stage: */ + /* plain input (default) */ + pad_mii_tx.d10_ipud = 2; /* TXD[1:0] input stage: */ + /* plain input (default) */ + pad_mii_tx.ctrl_os = 3; /* TX_CTL / TX_ER output stage */ + pad_mii_tx.ctrl_ipud = 2; /* TX_CTL / TX_ER input stage (default) */ + pad_mii_tx.clk_os = 3; /* TX_CLK output stage */ + pad_mii_tx.clk_ih = 0; /* TX_CLK input hysteresis (default) */ + pad_mii_tx.clk_ipud = 2; /* TX_CLK input stage (default) */ + sja1105_cfg_pad_mii_packing(packed_buf, &pad_mii_tx, PACK); + + return sja1105_xfer_buf(priv, SPI_WRITE, regs->pad_mii_tx[port], + packed_buf, SJA1105_SIZE_CGU_CMD); +} + +static int sja1105_cfg_pad_rx_config(struct sja1105_private *priv, int port) +{ + const struct sja1105_regs *regs = priv->info->regs; + struct sja1105_cfg_pad_mii pad_mii_rx = {0}; + u8 packed_buf[SJA1105_SIZE_CGU_CMD] = {0}; + + if (regs->pad_mii_rx[port] == SJA1105_RSV_ADDR) + return 0; + + /* Payload */ + pad_mii_rx.d32_ih = 0; /* RXD[3:2] input stage hysteresis: */ + /* non-Schmitt (default) */ + pad_mii_rx.d32_ipud = 2; /* RXD[3:2] input weak pull-up/down */ + /* plain input (default) */ + pad_mii_rx.d10_ih = 0; /* RXD[1:0] input stage hysteresis: */ + /* non-Schmitt (default) */ + pad_mii_rx.d10_ipud = 2; /* RXD[1:0] input weak pull-up/down */ + /* plain input (default) */ + pad_mii_rx.ctrl_ih = 0; /* RX_DV/CRS_DV/RX_CTL and RX_ER */ + /* input stage hysteresis: */ + /* non-Schmitt (default) */ + pad_mii_rx.ctrl_ipud = 3; /* RX_DV/CRS_DV/RX_CTL and RX_ER */ + /* input stage weak pull-up/down: */ + /* pull-down */ + pad_mii_rx.clk_os = 2; /* RX_CLK/RXC output stage: */ + /* medium noise/fast speed (default) */ + pad_mii_rx.clk_ih = 0; /* RX_CLK/RXC input hysteresis: */ + /* non-Schmitt (default) */ + pad_mii_rx.clk_ipud = 2; /* RX_CLK/RXC input pull-up/down: */ + /* plain input (default) */ + sja1105_cfg_pad_mii_packing(packed_buf, &pad_mii_rx, PACK); + + return sja1105_xfer_buf(priv, SPI_WRITE, regs->pad_mii_rx[port], + packed_buf, SJA1105_SIZE_CGU_CMD); +} + +static void +sja1105_cfg_pad_mii_id_packing(void *buf, struct sja1105_cfg_pad_mii_id *cmd, + enum packing_op op) +{ + const int size = SJA1105_SIZE_CGU_CMD; + + sja1105_packing(buf, &cmd->rxc_stable_ovr, 15, 15, size, op); + sja1105_packing(buf, &cmd->rxc_delay, 14, 10, size, op); + sja1105_packing(buf, &cmd->rxc_bypass, 9, 9, size, op); + sja1105_packing(buf, &cmd->rxc_pd, 8, 8, size, op); + sja1105_packing(buf, &cmd->txc_stable_ovr, 7, 7, size, op); + sja1105_packing(buf, &cmd->txc_delay, 6, 2, size, op); + sja1105_packing(buf, &cmd->txc_bypass, 1, 1, size, op); + sja1105_packing(buf, &cmd->txc_pd, 0, 0, size, op); +} + +/* Valid range in degrees is an integer between 73.8 and 101.7 */ +static u64 sja1105_rgmii_delay(u64 phase) +{ + /* UM11040.pdf: The delay in degree phase is 73.8 + delay_tune * 0.9. + * To avoid floating point operations we'll multiply by 10 + * and get 1 decimal point precision. + */ + phase *= 10; + return (phase - 738) / 9; +} + +static int sja1105pqrs_setup_rgmii_delay(struct sja1105_private *priv, int port) +{ + const struct sja1105_regs *regs = priv->info->regs; + struct sja1105_cfg_pad_mii_id pad_mii_id = {0}; + u8 packed_buf[SJA1105_SIZE_CGU_CMD] = {0}; + int rc; + + if (priv->rgmii_rx_delay[port]) + pad_mii_id.rxc_delay = sja1105_rgmii_delay(90); + if (priv->rgmii_tx_delay[port]) + pad_mii_id.txc_delay = sja1105_rgmii_delay(90); + + /* Stage 1: Turn the RGMII delay lines off. */ + pad_mii_id.rxc_bypass = 1; + pad_mii_id.rxc_pd = 1; + pad_mii_id.txc_bypass = 1; + pad_mii_id.txc_pd = 1; + sja1105_cfg_pad_mii_id_packing(packed_buf, &pad_mii_id, PACK); + + rc = sja1105_xfer_buf(priv, SPI_WRITE, regs->pad_mii_id[port], + packed_buf, SJA1105_SIZE_CGU_CMD); + if (rc < 0) + return rc; + + /* Stage 2: Turn the RGMII delay lines on. */ + if (priv->rgmii_rx_delay[port]) { + pad_mii_id.rxc_bypass = 0; + pad_mii_id.rxc_pd = 0; + } + if (priv->rgmii_tx_delay[port]) { + pad_mii_id.txc_bypass = 0; + pad_mii_id.txc_pd = 0; + } + sja1105_cfg_pad_mii_id_packing(packed_buf, &pad_mii_id, PACK); + + return sja1105_xfer_buf(priv, SPI_WRITE, regs->pad_mii_id[port], + packed_buf, SJA1105_SIZE_CGU_CMD); +} + +static int sja1110_setup_rgmii_delay(struct sja1105_private *priv, int port) +{ + const struct sja1105_regs *regs = priv->info->regs; + struct sja1105_cfg_pad_mii_id pad_mii_id = {0}; + u8 packed_buf[SJA1105_SIZE_CGU_CMD] = {0}; + + pad_mii_id.rxc_pd = 1; + pad_mii_id.txc_pd = 1; + + if (priv->rgmii_rx_delay[port]) { + pad_mii_id.rxc_delay = sja1105_rgmii_delay(90); + /* The "BYPASS" bit in SJA1110 is actually a "don't bypass" */ + pad_mii_id.rxc_bypass = 1; + pad_mii_id.rxc_pd = 0; + } + + if (priv->rgmii_tx_delay[port]) { + pad_mii_id.txc_delay = sja1105_rgmii_delay(90); + pad_mii_id.txc_bypass = 1; + pad_mii_id.txc_pd = 0; + } + + sja1110_cfg_pad_mii_id_packing(packed_buf, &pad_mii_id, PACK); + + return sja1105_xfer_buf(priv, SPI_WRITE, regs->pad_mii_id[port], + packed_buf, SJA1105_SIZE_CGU_CMD); +} + +static int sja1105_rgmii_clocking_setup(struct sja1105_private *priv, int port, + sja1105_mii_role_t role) +{ + struct sja1105_mac_config_entry *mac; + struct udevice *dev = priv->dev; + u64 speed; + int rc; + + mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries; + speed = mac[port].speed; + + if (speed == priv->info->port_speed[SJA1105_SPEED_1000MBPS]) { + /* 1000Mbps, IDIV disabled (125 MHz) */ + rc = sja1105_cgu_idiv_config(priv, port, false, 1); + } else if (speed == priv->info->port_speed[SJA1105_SPEED_100MBPS]) { + /* 100Mbps, IDIV enabled, divide by 1 (25 MHz) */ + rc = sja1105_cgu_idiv_config(priv, port, true, 1); + } else if (speed == priv->info->port_speed[SJA1105_SPEED_10MBPS]) { + /* 10Mbps, IDIV enabled, divide by 10 (2.5 MHz) */ + rc = sja1105_cgu_idiv_config(priv, port, true, 10); + } else if (speed == priv->info->port_speed[SJA1105_SPEED_AUTO]) { + /* Skip CGU configuration if there is no speed available + * (e.g. link is not established yet) + */ + dev_dbg(dev, "Speed not available, skipping CGU config\n"); + return 0; + } else { + rc = -EINVAL; + } + + if (rc < 0) { + dev_err(dev, "Failed to configure idiv\n"); + return rc; + } + rc = sja1105_cgu_rgmii_tx_clk_config(priv, port, speed); + if (rc < 0) { + dev_err(dev, "Failed to configure RGMII Tx clock\n"); + return rc; + } + rc = sja1105_rgmii_cfg_pad_tx_config(priv, port); + if (rc < 0) { + dev_err(dev, "Failed to configure Tx pad registers\n"); + return rc; + } + + if (!priv->info->setup_rgmii_delay) + return 0; + + return priv->info->setup_rgmii_delay(priv, port); +} + +static int sja1105_cgu_rmii_ref_clk_config(struct sja1105_private *priv, + int port) +{ + const struct sja1105_regs *regs = priv->info->regs; + u8 packed_buf[SJA1105_SIZE_CGU_CMD] = {0}; + struct sja1105_cgu_mii_ctrl ref_clk; + const int clk_sources[] = { + CLKSRC_MII0_TX_CLK, + CLKSRC_MII1_TX_CLK, + CLKSRC_MII2_TX_CLK, + CLKSRC_MII3_TX_CLK, + CLKSRC_MII4_TX_CLK, + }; + + if (regs->rmii_ref_clk[port] == SJA1105_RSV_ADDR) + return 0; + + /* Payload for packed_buf */ + ref_clk.clksrc = clk_sources[port]; + ref_clk.autoblock = 1; /* Autoblock clk while changing clksrc */ + ref_clk.pd = 0; /* Power Down off => enabled */ + sja1105_cgu_mii_control_packing(packed_buf, &ref_clk, PACK); + + return sja1105_xfer_buf(priv, SPI_WRITE, regs->rmii_ref_clk[port], + packed_buf, SJA1105_SIZE_CGU_CMD); +} + +static int +sja1105_cgu_rmii_ext_tx_clk_config(struct sja1105_private *priv, int port) +{ + const struct sja1105_regs *regs = priv->info->regs; + struct sja1105_cgu_mii_ctrl ext_tx_clk; + u8 packed_buf[SJA1105_SIZE_CGU_CMD] = {0}; + + if (regs->rmii_ext_tx_clk[port] == SJA1105_RSV_ADDR) + return 0; + + /* Payload for packed_buf */ + ext_tx_clk.clksrc = CLKSRC_PLL1; + ext_tx_clk.autoblock = 1; /* Autoblock clk while changing clksrc */ + ext_tx_clk.pd = 0; /* Power Down off => enabled */ + sja1105_cgu_mii_control_packing(packed_buf, &ext_tx_clk, PACK); + + return sja1105_xfer_buf(priv, SPI_WRITE, regs->rmii_ext_tx_clk[port], + packed_buf, SJA1105_SIZE_CGU_CMD); +} + +static int sja1105_cgu_rmii_pll_config(struct sja1105_private *priv) +{ + const struct sja1105_regs *regs = priv->info->regs; + u8 packed_buf[SJA1105_SIZE_CGU_CMD] = {0}; + struct sja1105_cgu_pll_ctrl pll = {0}; + int rc; + + if (regs->rmii_pll1 == SJA1105_RSV_ADDR) + return 0; + + /* Step 1: PLL1 setup for 50Mhz */ + pll.pllclksrc = 0xA; + pll.msel = 0x1; + pll.autoblock = 0x1; + pll.psel = 0x1; + pll.direct = 0x0; + pll.fbsel = 0x1; + pll.bypass = 0x0; + pll.pd = 0x1; + + sja1105_cgu_pll_control_packing(packed_buf, &pll, PACK); + rc = sja1105_xfer_buf(priv, SPI_WRITE, regs->rmii_pll1, packed_buf, + SJA1105_SIZE_CGU_CMD); + if (rc < 0) + return rc; + + /* Step 2: Enable PLL1 */ + pll.pd = 0x0; + + sja1105_cgu_pll_control_packing(packed_buf, &pll, PACK); + rc = sja1105_xfer_buf(priv, SPI_WRITE, regs->rmii_pll1, packed_buf, + SJA1105_SIZE_CGU_CMD); + return rc; +} + +static int sja1105_rmii_clocking_setup(struct sja1105_private *priv, int port, + sja1105_mii_role_t role) +{ + int rc; + + /* AH1601.pdf chapter 2.5.1. Sources */ + if (role == XMII_MAC) { + /* Configure and enable PLL1 for 50Mhz output */ + rc = sja1105_cgu_rmii_pll_config(priv); + if (rc < 0) + return rc; + } + /* Disable IDIV for this port */ + rc = sja1105_cgu_idiv_config(priv, port, false, 1); + if (rc < 0) + return rc; + /* Source to sink mappings */ + rc = sja1105_cgu_rmii_ref_clk_config(priv, port); + if (rc < 0) + return rc; + if (role == XMII_MAC) { + rc = sja1105_cgu_rmii_ext_tx_clk_config(priv, port); + if (rc < 0) + return rc; + } + return 0; +} + +static int sja1105_pcs_read(struct sja1105_private *priv, int addr, + int devad, int regnum) +{ + return priv->mdio_pcs->read(priv->mdio_pcs, addr, devad, regnum); +} + +static int sja1105_pcs_write(struct sja1105_private *priv, int addr, + int devad, int regnum, u16 val) +{ + return priv->mdio_pcs->write(priv->mdio_pcs, addr, devad, regnum, val); +} + +/* In NXP SJA1105, the PCS is integrated with a PMA that has the TX lane + * polarity inverted by default (PLUS is MINUS, MINUS is PLUS). To obtain + * normal non-inverted behavior, the TX lane polarity must be inverted in the + * PCS, via the DIGITAL_CONTROL_2 register. + */ +static int sja1105_pma_config(struct sja1105_private *priv, int port) +{ + return sja1105_pcs_write(priv, port, MDIO_MMD_VEND2, + DW_VR_MII_DIG_CTRL2, + DW_VR_MII_DIG_CTRL2_TX_POL_INV); +} + +static int sja1110_pma_config(struct sja1105_private *priv, int port) +{ + u16 txpll_fbdiv = 0x19, txpll_refdiv = 0x1; + u16 rxpll_fbdiv = 0x19, rxpll_refdiv = 0x1; + u16 rx_cdr_ctle = 0x212a; + u16 val; + int rc; + + /* Program TX PLL feedback divider and reference divider settings for + * correct oscillation frequency. + */ + rc = sja1105_pcs_write(priv, port, MDIO_MMD_VEND2, SJA1110_TXPLL_CTRL0, + SJA1110_TXPLL_FBDIV(txpll_fbdiv)); + if (rc < 0) + return rc; + + rc = sja1105_pcs_write(priv, port, MDIO_MMD_VEND2, SJA1110_TXPLL_CTRL1, + SJA1110_TXPLL_REFDIV(txpll_refdiv)); + if (rc < 0) + return rc; + + /* Program transmitter amplitude and disable amplitude trimming */ + rc = sja1105_pcs_write(priv, port, MDIO_MMD_VEND2, + SJA1110_LANE_DRIVER1_0, SJA1110_TXDRV(0x5)); + if (rc < 0) + return rc; + + val = SJA1110_TXDRVTRIM_LSB(0xffffffull); + + rc = sja1105_pcs_write(priv, port, MDIO_MMD_VEND2, + SJA1110_LANE_DRIVER2_0, val); + if (rc < 0) + return rc; + + val = SJA1110_TXDRVTRIM_MSB(0xffffffull) | SJA1110_LANE_DRIVER2_1_RSV; + + rc = sja1105_pcs_write(priv, port, MDIO_MMD_VEND2, + SJA1110_LANE_DRIVER2_1, val); + if (rc < 0) + return rc; + + /* Enable input and output resistor terminations for low BER. */ + val = SJA1110_ACCOUPLE_RXVCM_EN | SJA1110_CDR_GAIN | + SJA1110_RXRTRIM(4) | SJA1110_RXTEN | SJA1110_TXPLL_BWSEL | + SJA1110_TXRTRIM(3) | SJA1110_TXTEN; + + rc = sja1105_pcs_write(priv, port, MDIO_MMD_VEND2, SJA1110_LANE_TRIM, + val); + if (rc < 0) + return rc; + + /* Select PCS as transmitter data source. */ + rc = sja1105_pcs_write(priv, port, MDIO_MMD_VEND2, + SJA1110_LANE_DATAPATH_1, 0); + if (rc < 0) + return rc; + + /* Program RX PLL feedback divider and reference divider for correct + * oscillation frequency. + */ + rc = sja1105_pcs_write(priv, port, MDIO_MMD_VEND2, SJA1110_RXPLL_CTRL0, + SJA1110_RXPLL_FBDIV(rxpll_fbdiv)); + if (rc < 0) + return rc; + + rc = sja1105_pcs_write(priv, port, MDIO_MMD_VEND2, SJA1110_RXPLL_CTRL1, + SJA1110_RXPLL_REFDIV(rxpll_refdiv)); + if (rc < 0) + return rc; + + /* Program threshold for receiver signal detector. + * Enable control of RXPLL by receiver signal detector to disable RXPLL + * when an input signal is not present. + */ + rc = sja1105_pcs_write(priv, port, MDIO_MMD_VEND2, + SJA1110_RX_DATA_DETECT, 0x0005); + if (rc < 0) + return rc; + + /* Enable TX and RX PLLs and circuits. + * Release reset of PMA to enable data flow to/from PCS. + */ + rc = sja1105_pcs_read(priv, port, MDIO_MMD_VEND2, + SJA1110_POWERDOWN_ENABLE); + if (rc < 0) + return rc; + + val = rc & ~(SJA1110_TXPLL_PD | SJA1110_TXPD | SJA1110_RXCH_PD | + SJA1110_RXBIAS_PD | SJA1110_RESET_SER_EN | + SJA1110_RESET_SER | SJA1110_RESET_DES); + val |= SJA1110_RXPKDETEN | SJA1110_RCVEN; + + rc = sja1105_pcs_write(priv, port, MDIO_MMD_VEND2, + SJA1110_POWERDOWN_ENABLE, val); + if (rc < 0) + return rc; + + /* Program continuous-time linear equalizer (CTLE) settings. */ + rc = sja1105_pcs_write(priv, port, MDIO_MMD_VEND2, SJA1110_RX_CDR_CTLE, + rx_cdr_ctle); + if (rc < 0) + return rc; + + return 0; +} + +static int sja1105_xpcs_config_aneg_c37_sgmii(struct sja1105_private *priv, + int port) +{ + int rc; + + rc = sja1105_pcs_read(priv, port, MDIO_MMD_VEND2, MDIO_CTRL1); + if (rc < 0) + return rc; + rc &= ~MDIO_AN_CTRL1_ENABLE; + rc = sja1105_pcs_write(priv, port, MDIO_MMD_VEND2, MDIO_CTRL1, + rc); + if (rc < 0) + return rc; + + rc = sja1105_pcs_read(priv, port, MDIO_MMD_VEND2, DW_VR_MII_AN_CTRL); + if (rc < 0) + return rc; + + rc &= ~(DW_VR_MII_PCS_MODE_MASK | DW_VR_MII_TX_CONFIG_MASK); + rc |= (DW_VR_MII_PCS_MODE_C37_SGMII << + DW_VR_MII_AN_CTRL_PCS_MODE_SHIFT & + DW_VR_MII_PCS_MODE_MASK); + rc |= (DW_VR_MII_TX_CONFIG_MAC_SIDE_SGMII << + DW_VR_MII_AN_CTRL_TX_CONFIG_SHIFT & + DW_VR_MII_TX_CONFIG_MASK); + rc = sja1105_pcs_write(priv, port, MDIO_MMD_VEND2, DW_VR_MII_AN_CTRL, + rc); + if (rc < 0) + return rc; + + rc = sja1105_pcs_read(priv, port, MDIO_MMD_VEND2, DW_VR_MII_DIG_CTRL1); + if (rc < 0) + return rc; + + if (priv->xpcs_cfg[port].inband_an) + rc |= DW_VR_MII_DIG_CTRL1_MAC_AUTO_SW; + else + rc &= ~DW_VR_MII_DIG_CTRL1_MAC_AUTO_SW; + + rc = sja1105_pcs_write(priv, port, MDIO_MMD_VEND2, DW_VR_MII_DIG_CTRL1, + rc); + if (rc < 0) + return rc; + + rc = sja1105_pcs_read(priv, port, MDIO_MMD_VEND2, MDIO_CTRL1); + if (rc < 0) + return rc; + + if (priv->xpcs_cfg[port].inband_an) + rc |= MDIO_AN_CTRL1_ENABLE; + else + rc &= ~MDIO_AN_CTRL1_ENABLE; + + return sja1105_pcs_write(priv, port, MDIO_MMD_VEND2, MDIO_CTRL1, rc); +} + +static int sja1105_xpcs_link_up_sgmii(struct sja1105_private *priv, int port) +{ + int val = BMCR_FULLDPLX; + + if (priv->xpcs_cfg[port].inband_an) + return 0; + + switch (priv->xpcs_cfg[port].speed) { + case SPEED_1000: + val = BMCR_SPEED1000; + break; + case SPEED_100: + val = BMCR_SPEED100; + break; + case SPEED_10: + val = BMCR_SPEED10; + break; + default: + dev_err(priv->dev, "Invalid PCS speed %d\n", + priv->xpcs_cfg[port].speed); + return -EINVAL; + } + + return sja1105_pcs_write(priv, port, MDIO_MMD_VEND2, MDIO_CTRL1, val); +} + +static int sja1105_sgmii_setup(struct sja1105_private *priv, int port) +{ + int rc; + + rc = sja1105_xpcs_config_aneg_c37_sgmii(priv, port); + if (rc) + return rc; + + rc = sja1105_xpcs_link_up_sgmii(priv, port); + if (rc) + return rc; + + return priv->info->pma_config(priv, port); +} + +static int sja1105_clocking_setup_port(struct sja1105_private *priv, int port) +{ + struct sja1105_xmii_params_entry *mii; + sja1105_phy_interface_t phy_mode; + sja1105_mii_role_t role; + int rc; + + mii = priv->static_config.tables[BLK_IDX_XMII_PARAMS].entries; + + /* RGMII etc */ + phy_mode = mii->xmii_mode[port]; + /* MAC or PHY, for applicable types (not RGMII) */ + role = mii->phy_mac[port]; + + switch (phy_mode) { + case XMII_MODE_MII: + rc = sja1105_mii_clocking_setup(priv, port, role); + break; + case XMII_MODE_RMII: + rc = sja1105_rmii_clocking_setup(priv, port, role); + break; + case XMII_MODE_RGMII: + rc = sja1105_rgmii_clocking_setup(priv, port, role); + break; + case XMII_MODE_SGMII: + rc = sja1105_sgmii_setup(priv, port); + break; + default: + return -EINVAL; + } + if (rc) + return rc; + + /* Internally pull down the RX_DV/CRS_DV/RX_CTL and RX_ER inputs */ + return sja1105_cfg_pad_rx_config(priv, port); +} + +static int sja1105_clocking_setup(struct sja1105_private *priv) +{ + struct dsa_pdata *pdata = dev_get_uclass_plat(priv->dev); + int port, rc; + + for (port = 0; port < pdata->num_ports; port++) { + rc = sja1105_clocking_setup_port(priv, port); + if (rc < 0) + return rc; + } + return 0; +} + +static int sja1105_pcs_mdio_read(struct mii_dev *bus, int phy, int mmd, int reg) +{ + u8 packed_buf[SJA1105_SIZE_MDIO_CMD] = {0}; + struct sja1105_private *priv = bus->priv; + const int size = SJA1105_SIZE_MDIO_CMD; + u64 addr, tmp; + int rc; + + if (mmd == MDIO_DEVAD_NONE) + return -ENODEV; + + if (!priv->info->supports_sgmii[phy]) + return -ENODEV; + + addr = (mmd << 16) | (reg & GENMASK(15, 0)); + + if (mmd != MDIO_MMD_VEND1 && mmd != MDIO_MMD_VEND2) + return 0xffff; + + rc = sja1105_xfer_buf(priv, SPI_READ, addr, packed_buf, size); + if (rc < 0) + return rc; + + sja1105_packing(packed_buf, &tmp, 31, 0, size, UNPACK); + + return tmp & 0xffff; +} + +static int sja1105_pcs_mdio_write(struct mii_dev *bus, int phy, int mmd, + int reg, u16 val) +{ + u8 packed_buf[SJA1105_SIZE_MDIO_CMD] = {0}; + struct sja1105_private *priv = bus->priv; + const int size = SJA1105_SIZE_MDIO_CMD; + u64 addr, tmp; + + if (mmd == MDIO_DEVAD_NONE) + return -ENODEV; + + if (!priv->info->supports_sgmii[phy]) + return -ENODEV; + + addr = (mmd << 16) | (reg & GENMASK(15, 0)); + tmp = val; + + if (mmd != MDIO_MMD_VEND1 && mmd != MDIO_MMD_VEND2) + return -ENODEV; + + sja1105_packing(packed_buf, &tmp, 31, 0, size, PACK); + + return sja1105_xfer_buf(priv, SPI_WRITE, addr, packed_buf, size); +} + +static int sja1110_pcs_mdio_read(struct mii_dev *bus, int phy, int mmd, int reg) +{ + struct sja1105_private *priv = bus->priv; + const struct sja1105_regs *regs = priv->info->regs; + u8 packed_buf[SJA1105_SIZE_MDIO_CMD] = {0}; + const int size = SJA1105_SIZE_MDIO_CMD; + int offset, bank; + u64 addr, tmp; + int rc; + + if (mmd == MDIO_DEVAD_NONE) + return -ENODEV; + + if (regs->pcs_base[phy] == SJA1105_RSV_ADDR) + return -ENODEV; + + addr = (mmd << 16) | (reg & GENMASK(15, 0)); + + bank = addr >> 8; + offset = addr & GENMASK(7, 0); + + /* This addressing scheme reserves register 0xff for the bank address + * register, so that can never be addressed. + */ + if (offset == 0xff) + return -ENODEV; + + tmp = bank; + + sja1105_packing(packed_buf, &tmp, 31, 0, size, PACK); + + rc = sja1105_xfer_buf(priv, SPI_WRITE, + regs->pcs_base[phy] + SJA1110_PCS_BANK_REG, + packed_buf, size); + if (rc < 0) + return rc; + + rc = sja1105_xfer_buf(priv, SPI_READ, regs->pcs_base[phy] + offset, + packed_buf, size); + if (rc < 0) + return rc; + + sja1105_packing(packed_buf, &tmp, 31, 0, size, UNPACK); + + return tmp & 0xffff; +} + +static int sja1110_pcs_mdio_write(struct mii_dev *bus, int phy, int mmd, + int reg, u16 val) +{ + struct sja1105_private *priv = bus->priv; + const struct sja1105_regs *regs = priv->info->regs; + u8 packed_buf[SJA1105_SIZE_MDIO_CMD] = {0}; + const int size = SJA1105_SIZE_MDIO_CMD; + int offset, bank; + u64 addr, tmp; + int rc; + + if (mmd == MDIO_DEVAD_NONE) + return -ENODEV; + + if (regs->pcs_base[phy] == SJA1105_RSV_ADDR) + return -ENODEV; + + addr = (mmd << 16) | (reg & GENMASK(15, 0)); + + bank = addr >> 8; + offset = addr & GENMASK(7, 0); + + /* This addressing scheme reserves register 0xff for the bank address + * register, so that can never be addressed. + */ + if (offset == 0xff) + return -ENODEV; + + tmp = bank; + sja1105_packing(packed_buf, &tmp, 31, 0, size, PACK); + + rc = sja1105_xfer_buf(priv, SPI_WRITE, + regs->pcs_base[phy] + SJA1110_PCS_BANK_REG, + packed_buf, size); + if (rc < 0) + return rc; + + tmp = val; + sja1105_packing(packed_buf, &tmp, 31, 0, size, PACK); + + return sja1105_xfer_buf(priv, SPI_WRITE, regs->pcs_base[phy] + offset, + packed_buf, size); +} + +static int sja1105_mdiobus_register(struct sja1105_private *priv) +{ + struct udevice *dev = priv->dev; + struct mii_dev *bus; + int rc; + + if (!priv->info->pcs_mdio_read || !priv->info->pcs_mdio_write) + return 0; + + bus = mdio_alloc(); + if (!bus) + return -ENOMEM; + + snprintf(bus->name, MDIO_NAME_LEN, "%s-pcs", dev->name); + bus->read = priv->info->pcs_mdio_read; + bus->write = priv->info->pcs_mdio_write; + bus->priv = priv; + + rc = mdio_register(bus); + if (rc) { + mdio_free(bus); + return rc; + } + + priv->mdio_pcs = bus; + + return 0; +} + +static void sja1105_mdiobus_unregister(struct sja1105_private *priv) +{ + if (!priv->mdio_pcs) + return; + + mdio_unregister(priv->mdio_pcs); + mdio_free(priv->mdio_pcs); +} + +static const struct sja1105_regs sja1105et_regs = { + .device_id = 0x0, + .prod_id = 0x100BC3, + .status = 0x1, + .port_control = 0x11, + .config = 0x020000, + .rgu = 0x100440, + /* UM10944.pdf, Table 86, ACU Register overview */ + .pad_mii_tx = {0x100800, 0x100802, 0x100804, 0x100806, 0x100808}, + .pad_mii_rx = {0x100801, 0x100803, 0x100805, 0x100807, 0x100809}, + .rmii_pll1 = 0x10000A, + .cgu_idiv = {0x10000B, 0x10000C, 0x10000D, 0x10000E, 0x10000F}, + /* UM10944.pdf, Table 78, CGU Register overview */ + .mii_tx_clk = {0x100013, 0x10001A, 0x100021, 0x100028, 0x10002F}, + .mii_rx_clk = {0x100014, 0x10001B, 0x100022, 0x100029, 0x100030}, + .mii_ext_tx_clk = {0x100018, 0x10001F, 0x100026, 0x10002D, 0x100034}, + .mii_ext_rx_clk = {0x100019, 0x100020, 0x100027, 0x10002E, 0x100035}, + .rgmii_tx_clk = {0x100016, 0x10001D, 0x100024, 0x10002B, 0x100032}, + .rmii_ref_clk = {0x100015, 0x10001C, 0x100023, 0x10002A, 0x100031}, + .rmii_ext_tx_clk = {0x100018, 0x10001F, 0x100026, 0x10002D, 0x100034}, +}; + +static const struct sja1105_regs sja1105pqrs_regs = { + .device_id = 0x0, + .prod_id = 0x100BC3, + .status = 0x1, + .port_control = 0x12, + .config = 0x020000, + .rgu = 0x100440, + /* UM10944.pdf, Table 86, ACU Register overview */ + .pad_mii_tx = {0x100800, 0x100802, 0x100804, 0x100806, 0x100808}, + .pad_mii_rx = {0x100801, 0x100803, 0x100805, 0x100807, 0x100809}, + .pad_mii_id = {0x100810, 0x100811, 0x100812, 0x100813, 0x100814}, + .rmii_pll1 = 0x10000A, + .cgu_idiv = {0x10000B, 0x10000C, 0x10000D, 0x10000E, 0x10000F}, + /* UM11040.pdf, Table 114 */ + .mii_tx_clk = {0x100013, 0x100019, 0x10001F, 0x100025, 0x10002B}, + .mii_rx_clk = {0x100014, 0x10001A, 0x100020, 0x100026, 0x10002C}, + .mii_ext_tx_clk = {0x100017, 0x10001D, 0x100023, 0x100029, 0x10002F}, + .mii_ext_rx_clk = {0x100018, 0x10001E, 0x100024, 0x10002A, 0x100030}, + .rgmii_tx_clk = {0x100016, 0x10001C, 0x100022, 0x100028, 0x10002E}, + .rmii_ref_clk = {0x100015, 0x10001B, 0x100021, 0x100027, 0x10002D}, + .rmii_ext_tx_clk = {0x100017, 0x10001D, 0x100023, 0x100029, 0x10002F}, +}; + +static const struct sja1105_regs sja1110_regs = { + .device_id = SJA1110_SPI_ADDR(0x0), + .prod_id = SJA1110_ACU_ADDR(0xf00), + .status = SJA1110_SPI_ADDR(0x4), + .port_control = SJA1110_SPI_ADDR(0x50), /* actually INHIB_TX */ + .config = 0x020000, + .rgu = SJA1110_RGU_ADDR(0x100), /* Reset Control Register 0 */ + /* Ports 2 and 3 are capable of xMII, but there isn't anything to + * configure in the CGU/ACU for them. + */ + .pad_mii_tx = {SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR}, + .pad_mii_rx = {SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR}, + .pad_mii_id = {SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1110_ACU_ADDR(0x18), SJA1110_ACU_ADDR(0x28), + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR}, + .rmii_pll1 = SJA1105_RSV_ADDR, + .cgu_idiv = {SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR}, + .mii_tx_clk = {SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR}, + .mii_rx_clk = {SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR}, + .mii_ext_tx_clk = {SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR}, + .mii_ext_rx_clk = {SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR}, + .rgmii_tx_clk = {SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR}, + .rmii_ref_clk = {SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR}, + .rmii_ext_tx_clk = {SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR}, + .pcs_base = {SJA1105_RSV_ADDR, 0x1c1400, 0x1c1800, 0x1c1c00, 0x1c2000, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, + SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR}, +}; + +enum sja1105_switch_id { + SJA1105E = 0, + SJA1105T, + SJA1105P, + SJA1105Q, + SJA1105R, + SJA1105S, + SJA1110A, + SJA1110B, + SJA1110C, + SJA1110D, + SJA1105_MAX_SWITCH_ID, +}; + +static const struct sja1105_info sja1105_info[] = { + [SJA1105E] = { + .device_id = SJA1105E_DEVICE_ID, + .part_no = SJA1105ET_PART_NO, + .static_ops = sja1105et_table_ops, + .reset_cmd = sja1105et_reset_cmd, + .regs = &sja1105et_regs, + .port_speed = { + [SJA1105_SPEED_AUTO] = 0, + [SJA1105_SPEED_10MBPS] = 3, + [SJA1105_SPEED_100MBPS] = 2, + [SJA1105_SPEED_1000MBPS] = 1, + }, + .supports_mii = {true, true, true, true, true}, + .supports_rmii = {true, true, true, true, true}, + .supports_rgmii = {true, true, true, true, true}, + .name = "SJA1105E", + }, + [SJA1105T] = { + .device_id = SJA1105T_DEVICE_ID, + .part_no = SJA1105ET_PART_NO, + .static_ops = sja1105et_table_ops, + .reset_cmd = sja1105et_reset_cmd, + .regs = &sja1105et_regs, + .port_speed = { + [SJA1105_SPEED_AUTO] = 0, + [SJA1105_SPEED_10MBPS] = 3, + [SJA1105_SPEED_100MBPS] = 2, + [SJA1105_SPEED_1000MBPS] = 1, + }, + .supports_mii = {true, true, true, true, true}, + .supports_rmii = {true, true, true, true, true}, + .supports_rgmii = {true, true, true, true, true}, + .name = "SJA1105T", + }, + [SJA1105P] = { + .device_id = SJA1105PR_DEVICE_ID, + .part_no = SJA1105P_PART_NO, + .static_ops = sja1105pqrs_table_ops, + .setup_rgmii_delay = sja1105pqrs_setup_rgmii_delay, + .reset_cmd = sja1105pqrs_reset_cmd, + .regs = &sja1105pqrs_regs, + .port_speed = { + [SJA1105_SPEED_AUTO] = 0, + [SJA1105_SPEED_10MBPS] = 3, + [SJA1105_SPEED_100MBPS] = 2, + [SJA1105_SPEED_1000MBPS] = 1, + }, + .supports_mii = {true, true, true, true, true}, + .supports_rmii = {true, true, true, true, true}, + .supports_rgmii = {true, true, true, true, true}, + .name = "SJA1105P", + }, + [SJA1105Q] = { + .device_id = SJA1105QS_DEVICE_ID, + .part_no = SJA1105Q_PART_NO, + .static_ops = sja1105pqrs_table_ops, + .setup_rgmii_delay = sja1105pqrs_setup_rgmii_delay, + .reset_cmd = sja1105pqrs_reset_cmd, + .regs = &sja1105pqrs_regs, + .port_speed = { + [SJA1105_SPEED_AUTO] = 0, + [SJA1105_SPEED_10MBPS] = 3, + [SJA1105_SPEED_100MBPS] = 2, + [SJA1105_SPEED_1000MBPS] = 1, + }, + .supports_mii = {true, true, true, true, true}, + .supports_rmii = {true, true, true, true, true}, + .supports_rgmii = {true, true, true, true, true}, + .name = "SJA1105Q", + }, + [SJA1105R] = { + .device_id = SJA1105PR_DEVICE_ID, + .part_no = SJA1105R_PART_NO, + .static_ops = sja1105pqrs_table_ops, + .setup_rgmii_delay = sja1105pqrs_setup_rgmii_delay, + .reset_cmd = sja1105pqrs_reset_cmd, + .regs = &sja1105pqrs_regs, + .pcs_mdio_read = sja1105_pcs_mdio_read, + .pcs_mdio_write = sja1105_pcs_mdio_write, + .pma_config = sja1105_pma_config, + .port_speed = { + [SJA1105_SPEED_AUTO] = 0, + [SJA1105_SPEED_10MBPS] = 3, + [SJA1105_SPEED_100MBPS] = 2, + [SJA1105_SPEED_1000MBPS] = 1, + }, + .supports_mii = {true, true, true, true, true}, + .supports_rmii = {true, true, true, true, true}, + .supports_rgmii = {true, true, true, true, true}, + .supports_sgmii = {false, false, false, false, true}, + .name = "SJA1105R", + }, + [SJA1105S] = { + .device_id = SJA1105QS_DEVICE_ID, + .part_no = SJA1105S_PART_NO, + .static_ops = sja1105pqrs_table_ops, + .setup_rgmii_delay = sja1105pqrs_setup_rgmii_delay, + .reset_cmd = sja1105pqrs_reset_cmd, + .regs = &sja1105pqrs_regs, + .pcs_mdio_read = sja1105_pcs_mdio_read, + .pcs_mdio_write = sja1105_pcs_mdio_write, + .pma_config = sja1105_pma_config, + .port_speed = { + [SJA1105_SPEED_AUTO] = 0, + [SJA1105_SPEED_10MBPS] = 3, + [SJA1105_SPEED_100MBPS] = 2, + [SJA1105_SPEED_1000MBPS] = 1, + }, + .supports_mii = {true, true, true, true, true}, + .supports_rmii = {true, true, true, true, true}, + .supports_rgmii = {true, true, true, true, true}, + .supports_sgmii = {false, false, false, false, true}, + .name = "SJA1105S", + }, + [SJA1110A] = { + .device_id = SJA1110_DEVICE_ID, + .part_no = SJA1110A_PART_NO, + .static_ops = sja1110_table_ops, + .setup_rgmii_delay = sja1110_setup_rgmii_delay, + .reset_cmd = sja1110_reset_cmd, + .regs = &sja1110_regs, + .pcs_mdio_read = sja1110_pcs_mdio_read, + .pcs_mdio_write = sja1110_pcs_mdio_write, + .pma_config = sja1110_pma_config, + .port_speed = { + [SJA1105_SPEED_AUTO] = 0, + [SJA1105_SPEED_10MBPS] = 4, + [SJA1105_SPEED_100MBPS] = 3, + [SJA1105_SPEED_1000MBPS] = 2, + }, + .supports_mii = {true, true, true, true, false, + true, true, true, true, true, true}, + .supports_rmii = {false, false, true, true, false, + false, false, false, false, false, false}, + .supports_rgmii = {false, false, true, true, false, + false, false, false, false, false, false}, + .supports_sgmii = {false, true, true, true, true, + false, false, false, false, false, false}, + .name = "SJA1110A", + }, + [SJA1110B] = { + .device_id = SJA1110_DEVICE_ID, + .part_no = SJA1110B_PART_NO, + .static_ops = sja1110_table_ops, + .setup_rgmii_delay = sja1110_setup_rgmii_delay, + .reset_cmd = sja1110_reset_cmd, + .regs = &sja1110_regs, + .pcs_mdio_read = sja1110_pcs_mdio_read, + .pcs_mdio_write = sja1110_pcs_mdio_write, + .pma_config = sja1110_pma_config, + .port_speed = { + [SJA1105_SPEED_AUTO] = 0, + [SJA1105_SPEED_10MBPS] = 4, + [SJA1105_SPEED_100MBPS] = 3, + [SJA1105_SPEED_1000MBPS] = 2, + }, + .supports_mii = {true, true, true, true, false, + true, true, true, true, true, false}, + .supports_rmii = {false, false, true, true, false, + false, false, false, false, false, false}, + .supports_rgmii = {false, false, true, true, false, + false, false, false, false, false, false}, + .supports_sgmii = {false, false, false, true, true, + false, false, false, false, false, false}, + .name = "SJA1110B", + }, + [SJA1110C] = { + .device_id = SJA1110_DEVICE_ID, + .part_no = SJA1110C_PART_NO, + .static_ops = sja1110_table_ops, + .setup_rgmii_delay = sja1110_setup_rgmii_delay, + .reset_cmd = sja1110_reset_cmd, + .regs = &sja1110_regs, + .pcs_mdio_read = sja1110_pcs_mdio_read, + .pcs_mdio_write = sja1110_pcs_mdio_write, + .pma_config = sja1110_pma_config, + .port_speed = { + [SJA1105_SPEED_AUTO] = 0, + [SJA1105_SPEED_10MBPS] = 4, + [SJA1105_SPEED_100MBPS] = 3, + [SJA1105_SPEED_1000MBPS] = 2, + }, + .supports_mii = {true, true, true, true, false, + true, true, true, false, false, false}, + .supports_rmii = {false, false, true, true, false, + false, false, false, false, false, false}, + .supports_rgmii = {false, false, true, true, false, + false, false, false, false, false, false}, + .supports_sgmii = {false, false, false, false, true, + false, false, false, false, false, false}, + .name = "SJA1110C", + }, + [SJA1110D] = { + .device_id = SJA1110_DEVICE_ID, + .part_no = SJA1110D_PART_NO, + .static_ops = sja1110_table_ops, + .setup_rgmii_delay = sja1110_setup_rgmii_delay, + .reset_cmd = sja1110_reset_cmd, + .regs = &sja1110_regs, + .pcs_mdio_read = sja1110_pcs_mdio_read, + .pcs_mdio_write = sja1110_pcs_mdio_write, + .pma_config = sja1110_pma_config, + .port_speed = { + [SJA1105_SPEED_AUTO] = 0, + [SJA1105_SPEED_10MBPS] = 4, + [SJA1105_SPEED_100MBPS] = 3, + [SJA1105_SPEED_1000MBPS] = 2, + }, + .supports_mii = {true, false, true, false, false, + true, true, true, false, false, false}, + .supports_rmii = {false, false, true, false, false, + false, false, false, false, false, false}, + .supports_rgmii = {false, false, true, false, false, + false, false, false, false, false, false}, + .supports_sgmii = {false, true, true, true, true, + false, false, false, false, false, false}, + .name = "SJA1110D", + }, +}; + +struct sja1105_status { + u64 configs; + u64 crcchkl; + u64 ids; + u64 crcchkg; +}; + +static void sja1105_status_unpack(void *buf, struct sja1105_status *status) +{ + sja1105_packing(buf, &status->configs, 31, 31, 4, UNPACK); + sja1105_packing(buf, &status->crcchkl, 30, 30, 4, UNPACK); + sja1105_packing(buf, &status->ids, 29, 29, 4, UNPACK); + sja1105_packing(buf, &status->crcchkg, 28, 28, 4, UNPACK); +} + +static int sja1105_status_get(struct sja1105_private *priv, + struct sja1105_status *status) +{ + const struct sja1105_regs *regs = priv->info->regs; + u8 packed_buf[4]; + int rc; + + rc = sja1105_xfer_buf(priv, SPI_READ, regs->status, packed_buf, 4); + if (rc < 0) + return rc; + + sja1105_status_unpack(packed_buf, status); + + return 0; +} + +/* Not const because unpacking priv->static_config into buffers and preparing + * for upload requires the recalculation of table CRCs and updating the + * structures with these. + */ +static int +static_config_buf_prepare_for_upload(struct sja1105_private *priv, + void *config_buf, int buf_len) +{ + struct sja1105_static_config *config = &priv->static_config; + struct sja1105_table_header final_header; + char *final_header_ptr; + int crc_len; + + /* Write Device ID and config tables to config_buf */ + sja1105_static_config_pack(config_buf, config); + /* Recalculate CRC of the last header (right now 0xDEADBEEF). + * Don't include the CRC field itself. + */ + crc_len = buf_len - 4; + /* Read the whole table header */ + final_header_ptr = config_buf + buf_len - SJA1105_SIZE_TABLE_HEADER; + sja1105_table_header_packing(final_header_ptr, &final_header, UNPACK); + /* Modify */ + final_header.crc = sja1105_crc32(config_buf, crc_len); + /* Rewrite */ + sja1105_table_header_packing(final_header_ptr, &final_header, PACK); + + return 0; +} + +static int sja1105_static_config_upload(struct sja1105_private *priv) +{ + struct sja1105_static_config *config = &priv->static_config; + const struct sja1105_regs *regs = priv->info->regs; + struct sja1105_status status; + u8 *config_buf; + int buf_len; + int rc; + + buf_len = sja1105_static_config_get_length(config); + config_buf = calloc(buf_len, sizeof(char)); + if (!config_buf) + return -ENOMEM; + + rc = static_config_buf_prepare_for_upload(priv, config_buf, buf_len); + if (rc < 0) { + printf("Invalid config, cannot upload\n"); + rc = -EINVAL; + goto out; + } + /* Put the SJA1105 in programming mode */ + rc = priv->info->reset_cmd(priv); + if (rc < 0) { + printf("Failed to reset switch\n"); + goto out; + } + /* Wait for the switch to come out of reset */ + udelay(1000); + /* Upload the static config to the device */ + rc = sja1105_xfer_buf(priv, SPI_WRITE, regs->config, + config_buf, buf_len); + if (rc < 0) { + printf("Failed to upload config\n"); + goto out; + } + /* Check that SJA1105 responded well to the config upload */ + rc = sja1105_status_get(priv, &status); + if (rc < 0) + goto out; + + if (status.ids == 1) { + printf("Mismatch between hardware and static config device id. " + "Wrote 0x%llx, wants 0x%llx\n", + config->device_id, priv->info->device_id); + rc = -EIO; + goto out; + } + if (status.crcchkl == 1 || status.crcchkg == 1) { + printf("Switch reported invalid CRC on static config\n"); + rc = -EIO; + goto out; + } + if (status.configs == 0) { + printf("Switch reported that config is invalid\n"); + rc = -EIO; + goto out; + } + +out: + free(config_buf); + return rc; +} + +static int sja1105_static_config_reload(struct sja1105_private *priv) +{ + int rc; + + rc = sja1105_static_config_upload(priv); + if (rc < 0) { + printf("Failed to load static config: %d\n", rc); + return rc; + } + + /* Configure the CGU (PHY link modes and speeds) */ + rc = sja1105_clocking_setup(priv); + if (rc < 0) { + printf("Failed to configure MII clocking: %d\n", rc); + return rc; + } + + return 0; +} + +static int sja1105_port_probe(struct udevice *dev, int port, + struct phy_device *phy) +{ + struct sja1105_private *priv = dev_get_priv(dev); + ofnode node = dsa_port_get_ofnode(dev, port); + phy_interface_t phy_mode = phy->interface; + + priv->xpcs_cfg[port].inband_an = ofnode_eth_uses_inband_aneg(node); + + if (phy_mode == PHY_INTERFACE_MODE_MII || + phy_mode == PHY_INTERFACE_MODE_RMII) { + phy->supported &= PHY_BASIC_FEATURES; + phy->advertising &= PHY_BASIC_FEATURES; + } else { + phy->supported &= PHY_GBIT_FEATURES; + phy->advertising &= PHY_GBIT_FEATURES; + } + + return phy_config(phy); +} + +static int sja1105_port_enable(struct udevice *dev, int port, + struct phy_device *phy) +{ + struct sja1105_private *priv = dev_get_priv(dev); + phy_interface_t phy_mode = phy->interface; + struct sja1105_xmii_params_entry *mii; + struct sja1105_mac_config_entry *mac; + int rc; + + rc = phy_startup(phy); + if (rc) + return rc; + + mii = priv->static_config.tables[BLK_IDX_XMII_PARAMS].entries; + mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries; + + switch (phy_mode) { + case PHY_INTERFACE_MODE_MII: + if (!priv->info->supports_mii[port]) + goto unsupported; + + mii->xmii_mode[port] = XMII_MODE_MII; + break; + case PHY_INTERFACE_MODE_RMII: + if (!priv->info->supports_rmii[port]) + goto unsupported; + + mii->xmii_mode[port] = XMII_MODE_RMII; + break; + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_RXID: + case PHY_INTERFACE_MODE_RGMII_TXID: + if (!priv->info->supports_rgmii[port]) + goto unsupported; + + mii->xmii_mode[port] = XMII_MODE_RGMII; + break; + case PHY_INTERFACE_MODE_SGMII: + if (!priv->info->supports_sgmii[port]) + goto unsupported; + + mii->xmii_mode[port] = XMII_MODE_SGMII; + mii->special[port] = true; + break; +unsupported: + default: + dev_err(dev, "Unsupported PHY mode %d on port %d!\n", + phy_mode, port); + return -EINVAL; + } + + /* RevMII, RevRMII not supported */ + mii->phy_mac[port] = XMII_MAC; + + /* Let the PHY handle the RGMII delays, if present. */ + if (phy->phy_id == PHY_FIXED_ID) { + if (phy_mode == PHY_INTERFACE_MODE_RGMII_RXID || + phy_mode == PHY_INTERFACE_MODE_RGMII_ID) + priv->rgmii_rx_delay[port] = true; + + if (phy_mode == PHY_INTERFACE_MODE_RGMII_TXID || + phy_mode == PHY_INTERFACE_MODE_RGMII_ID) + priv->rgmii_tx_delay[port] = true; + + if ((priv->rgmii_rx_delay[port] || + priv->rgmii_tx_delay[port]) && + !priv->info->setup_rgmii_delay) { + printf("Chip does not support internal RGMII delays\n"); + return -EINVAL; + } + } + + if (mii->xmii_mode[port] == XMII_MODE_SGMII) { + mac[port].speed = priv->info->port_speed[SJA1105_SPEED_1000MBPS]; + priv->xpcs_cfg[port].speed = phy->speed; + } else if (phy->speed == SPEED_1000) { + mac[port].speed = priv->info->port_speed[SJA1105_SPEED_1000MBPS]; + } else if (phy->speed == SPEED_100) { + mac[port].speed = priv->info->port_speed[SJA1105_SPEED_100MBPS]; + } else if (phy->speed == SPEED_10) { + mac[port].speed = priv->info->port_speed[SJA1105_SPEED_10MBPS]; + } else { + printf("Invalid PHY speed %d on port %d\n", phy->speed, port); + return -EINVAL; + } + + return sja1105_static_config_reload(priv); +} + +static void sja1105_port_disable(struct udevice *dev, int port, + struct phy_device *phy) +{ + phy_shutdown(phy); +} + +static int sja1105_xmit(struct udevice *dev, int port, void *packet, int length) +{ + struct sja1105_private *priv = dev_get_priv(dev); + u8 *from = (u8 *)packet + VLAN_HLEN; + struct vlan_ethhdr *hdr = packet; + u8 *dest = (u8 *)packet; + + memmove(dest, from, 2 * ETH_ALEN); + hdr->h_vlan_proto = htons(ETH_P_SJA1105); + hdr->h_vlan_TCI = htons(priv->pvid[port]); + + return 0; +} + +static int sja1105_rcv(struct udevice *dev, int *port, void *packet, int length) +{ + struct vlan_ethhdr *hdr = packet; + u8 *dest = packet + VLAN_HLEN; + u8 *from = packet; + + if (ntohs(hdr->h_vlan_proto) != ETH_P_SJA1105) + return -EINVAL; + + *port = ntohs(hdr->h_vlan_TCI) & DSA_8021Q_PORT_MASK; + memmove(dest, from, 2 * ETH_ALEN); + + return 0; +} + +static const struct dsa_ops sja1105_dsa_ops = { + .port_probe = sja1105_port_probe, + .port_enable = sja1105_port_enable, + .port_disable = sja1105_port_disable, + .xmit = sja1105_xmit, + .rcv = sja1105_rcv, +}; + +static int sja1105_init(struct sja1105_private *priv) +{ + int rc; + + rc = sja1105_static_config_init(priv); + if (rc) { + printf("Failed to initialize static config: %d\n", rc); + return rc; + } + + rc = sja1105_mdiobus_register(priv); + if (rc) { + printf("Failed to register MDIO bus: %d\n", rc); + goto err_mdiobus_register; + } + + return 0; + +err_mdiobus_register: + sja1105_static_config_free(&priv->static_config); + + return rc; +} + +static int sja1105_check_device_id(struct sja1105_private *priv) +{ + const struct sja1105_regs *regs = priv->info->regs; + u8 packed_buf[SJA1105_SIZE_DEVICE_ID] = {0}; + enum sja1105_switch_id id; + u64 device_id; + u64 part_no; + int rc; + + rc = sja1105_xfer_buf(priv, SPI_READ, regs->device_id, packed_buf, + SJA1105_SIZE_DEVICE_ID); + if (rc < 0) + return rc; + + sja1105_packing(packed_buf, &device_id, 31, 0, SJA1105_SIZE_DEVICE_ID, + UNPACK); + + if (device_id != priv->info->device_id) { + printf("Expected device ID 0x%llx but read 0x%llx\n", + priv->info->device_id, device_id); + return -ENODEV; + } + + rc = sja1105_xfer_buf(priv, SPI_READ, regs->prod_id, packed_buf, + SJA1105_SIZE_DEVICE_ID); + if (rc < 0) + return rc; + + sja1105_packing(packed_buf, &part_no, 19, 4, SJA1105_SIZE_DEVICE_ID, + UNPACK); + + for (id = 0; id < SJA1105_MAX_SWITCH_ID; id++) { + const struct sja1105_info *info = &sja1105_info[id]; + + /* Is what's been probed in our match table at all? */ + if (info->device_id != device_id || info->part_no != part_no) + continue; + + /* But is it what's in the device tree? */ + if (priv->info->device_id != device_id || + priv->info->part_no != part_no) { + printf("Device tree specifies chip %s but found %s, please fix it!\n", + priv->info->name, info->name); + /* It isn't. No problem, pick that up. */ + priv->info = info; + } + + return 0; + } + + printf("Unexpected {device ID, part number}: 0x%llx 0x%llx\n", + device_id, part_no); + + return -ENODEV; +} + +static int sja1105_probe(struct udevice *dev) +{ + enum sja1105_switch_id id = dev_get_driver_data(dev); + struct sja1105_private *priv = dev_get_priv(dev); + int rc; + + if (ofnode_valid(dev_ofnode(dev)) && + !ofnode_is_available(dev_ofnode(dev))) { + dev_dbg(dev, "switch disabled\n"); + return -ENODEV; + } + + priv->info = &sja1105_info[id]; + priv->dev = dev; + + rc = sja1105_check_device_id(priv); + if (rc < 0) { + dev_err(dev, "Device ID check failed: %d\n", rc); + return rc; + } + + dsa_set_tagging(dev, VLAN_HLEN, 0); + + return sja1105_init(priv); +} + +static int sja1105_remove(struct udevice *dev) +{ + struct sja1105_private *priv = dev_get_priv(dev); + + sja1105_mdiobus_unregister(priv); + sja1105_static_config_free(&priv->static_config); + + return 0; +} + +static const struct udevice_id sja1105_ids[] = { + { .compatible = "nxp,sja1105e", .data = SJA1105E }, + { .compatible = "nxp,sja1105t", .data = SJA1105T }, + { .compatible = "nxp,sja1105p", .data = SJA1105P }, + { .compatible = "nxp,sja1105q", .data = SJA1105Q }, + { .compatible = "nxp,sja1105r", .data = SJA1105R }, + { .compatible = "nxp,sja1105s", .data = SJA1105S }, + { .compatible = "nxp,sja1110a", .data = SJA1110A }, + { .compatible = "nxp,sja1110b", .data = SJA1110B }, + { .compatible = "nxp,sja1110c", .data = SJA1110C }, + { .compatible = "nxp,sja1110d", .data = SJA1110D }, + { } +}; + +U_BOOT_DRIVER(sja1105) = { + .name = "sja1105", + .id = UCLASS_DSA, + .of_match = sja1105_ids, + .probe = sja1105_probe, + .remove = sja1105_remove, + .ops = &sja1105_dsa_ops, + .priv_auto = sizeof(struct sja1105_private), +}; diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index 0ce97656715f0e6a2dbdbf95542b436005556819..beca886b256cd1a8bf2c136a7396101859ccd7bc 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -156,6 +156,19 @@ static int tsec_mcast_addr(struct udevice *dev, const u8 *mcast_mac, int join) return 0; } +static int __maybe_unused tsec_set_promisc(struct udevice *dev, bool enable) +{ + struct tsec_private *priv = dev_get_priv(dev); + struct tsec __iomem *regs = priv->regs; + + if (enable) + setbits_be32(®s->rctrl, RCTRL_PROM); + else + clrbits_be32(®s->rctrl, RCTRL_PROM); + + return 0; +} + /* * Initialized required registers to appropriate values, zeroing * those we don't care about (unless zero is bad, in which case, @@ -186,8 +199,6 @@ static void init_registers(struct tsec __iomem *regs) out_be32(®s->hash.gaddr6, 0); out_be32(®s->hash.gaddr7, 0); - out_be32(®s->rctrl, 0x00000000); - /* Init RMON mib registers */ memset((void *)®s->rmon, 0, sizeof(regs->rmon)); @@ -432,7 +443,7 @@ static void tsec_halt(struct udevice *dev) * of the eTSEC port initialization sequence, * the eTSEC Rx logic may not be properly initialized. */ -void redundant_init(struct tsec_private *priv) +static void redundant_init(struct tsec_private *priv) { struct tsec __iomem *regs = priv->regs; uint t, count = 0; @@ -454,7 +465,7 @@ void redundant_init(struct tsec_private *priv) 0x71, 0x72}; /* Enable promiscuous mode */ - setbits_be32(®s->rctrl, 0x8); + setbits_be32(®s->rctrl, RCTRL_PROM); /* Enable loopback mode */ setbits_be32(®s->maccfg1, MACCFG1_LOOPBACK); /* Enable transmit and receive */ @@ -506,7 +517,7 @@ void redundant_init(struct tsec_private *priv) if (fail) panic("eTSEC init fail!\n"); /* Disable promiscuous mode */ - clrbits_be32(®s->rctrl, 0x8); + clrbits_be32(®s->rctrl, RCTRL_PROM); /* Disable loopback mode */ clrbits_be32(®s->maccfg1, MACCFG1_LOOPBACK); } @@ -932,6 +943,7 @@ static const struct eth_ops tsec_ops = { .free_pkt = tsec_free_pkt, .stop = tsec_halt, .mcast = tsec_mcast_addr, + .set_promisc = tsec_set_promisc, }; static struct tsec_data etsec2_data = { diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index cc139af6cb573f792687b82a2ca454a1146c1223..42f8cb6be0dcdd1a8f11f98c6e6d1f3bc1fa890c 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -19,6 +19,12 @@ config DM_PCI_COMPAT measure when porting a board to use driver model for PCI. Once the board is fully supported, this option should be disabled. +config SYS_PCI_64BIT + bool "Enable 64-bit PCI resources" + default y if PPC + help + Enable 64-bit PCI resource access. + config PCI_AARDVARK bool "Enable Aardvark PCIe driver" depends on DM_GPIO diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile index 4a131bf5ca451e1b4f0fc217b2372da51b7b564b..04f623652f09557e8c8f9d0d3bc1a1a39b511b25 100644 --- a/drivers/pci/Makefile +++ b/drivers/pci/Makefile @@ -13,7 +13,6 @@ obj-$(CONFIG_PCI) += pci_auto_common.o pci_common.o obj-$(CONFIG_PCIE_ECAM_GENERIC) += pcie_ecam_generic.o obj-$(CONFIG_PCIE_ECAM_SYNQUACER) += pcie_ecam_synquacer.o -obj-$(CONFIG_FSL_PCI_INIT) += fsl_pci_init.o obj-$(CONFIG_PCI_GT64120) += pci_gt64120.o obj-$(CONFIG_PCI_MPC85XX) += pci_mpc85xx.o obj-$(CONFIG_PCI_MSC01) += pci_msc01.o diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c deleted file mode 100644 index c544af2a0b7a29471872ae8c8d1ba9ccf636f086..0000000000000000000000000000000000000000 --- a/drivers/pci/fsl_pci_init.c +++ /dev/null @@ -1,936 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2007-2012 Freescale Semiconductor, Inc. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -/* - * PCI/PCIE Controller initialization for mpc85xx/mpc86xx soc's - * - * Initialize controller and call the common driver/pci pci_hose_scan to - * scan for bridges and devices. - * - * Hose fields which need to be pre-initialized by board specific code: - * regions[] - * first_busno - * - * Fields updated: - * last_busno - */ - -#include -#include -#include - -#define MAX_PCI_REGIONS 7 - -#ifndef CONFIG_SYS_PCI_MEMORY_BUS -#define CONFIG_SYS_PCI_MEMORY_BUS 0 -#endif - -#ifndef CONFIG_SYS_PCI_MEMORY_PHYS -#define CONFIG_SYS_PCI_MEMORY_PHYS 0 -#endif - -#if defined(CONFIG_SYS_PCI_64BIT) && !defined(CONFIG_SYS_PCI64_MEMORY_BUS) -#define CONFIG_SYS_PCI64_MEMORY_BUS (64ull*1024*1024*1024) -#endif - -/* Setup one inbound ATMU window. - * - * We let the caller decide what the window size should be - */ -static void set_inbound_window(volatile pit_t *pi, - struct pci_region *r, - u64 size) -{ - u32 sz = (__ilog2_u64(size) - 1); -#ifdef CONFIG_SYS_FSL_ERRATUM_A005434 - u32 flag = 0; -#else - u32 flag = PIWAR_LOCAL; -#endif - - flag |= PIWAR_EN | PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP; - - out_be32(&pi->pitar, r->phys_start >> 12); - out_be32(&pi->piwbar, r->bus_start >> 12); -#ifdef CONFIG_SYS_PCI_64BIT - out_be32(&pi->piwbear, r->bus_start >> 44); -#else - out_be32(&pi->piwbear, 0); -#endif - if (r->flags & PCI_REGION_PREFETCH) - flag |= PIWAR_PF; - out_be32(&pi->piwar, flag | sz); -} - -int fsl_setup_hose(struct pci_controller *hose, unsigned long addr) -{ - volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) addr; - - /* Reset hose to make sure its in a clean state */ - memset(hose, 0, sizeof(struct pci_controller)); - - hose->regions = (struct pci_region *) - calloc(1, MAX_PCI_REGIONS * sizeof(struct pci_region)); - - pci_setup_indirect(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data); - - return fsl_is_pci_agent(hose); -} - -static int fsl_pci_setup_inbound_windows(struct pci_controller *hose, - u64 out_lo, u8 pcie_cap, - volatile pit_t *pi) -{ - struct pci_region *r = hose->regions + hose->region_count; - u64 sz = min((u64)gd->ram_size, (1ull << 32)); - - phys_addr_t phys_start = CONFIG_SYS_PCI_MEMORY_PHYS; - pci_addr_t bus_start = CONFIG_SYS_PCI_MEMORY_BUS; - pci_size_t pci_sz; - - /* we have no space available for inbound memory mapping */ - if (bus_start > out_lo) { - printf ("no space for inbound mapping of memory\n"); - return 0; - } - - /* limit size */ - if ((bus_start + sz) > out_lo) { - sz = out_lo - bus_start; - debug ("limiting size to %llx\n", sz); - } - - pci_sz = 1ull << __ilog2_u64(sz); - /* - * we can overlap inbound/outbound windows on PCI-E since RX & TX - * links a separate - */ - if ((pcie_cap == PCI_CAP_ID_EXP) && (pci_sz < sz)) { - debug ("R0 bus_start: %llx phys_start: %llx size: %llx\n", - (u64)bus_start, (u64)phys_start, (u64)sz); - pci_set_region(r, bus_start, phys_start, sz, - PCI_REGION_MEM | PCI_REGION_SYS_MEMORY | - PCI_REGION_PREFETCH); - - /* if we aren't an exact power of two match, pci_sz is smaller - * round it up to the next power of two. We report the actual - * size to pci region tracking. - */ - if (pci_sz != sz) - sz = 2ull << __ilog2_u64(sz); - - set_inbound_window(pi--, r++, sz); - sz = 0; /* make sure we dont set the R2 window */ - } else { - debug ("R0 bus_start: %llx phys_start: %llx size: %llx\n", - (u64)bus_start, (u64)phys_start, (u64)pci_sz); - pci_set_region(r, bus_start, phys_start, pci_sz, - PCI_REGION_MEM | PCI_REGION_SYS_MEMORY | - PCI_REGION_PREFETCH); - set_inbound_window(pi--, r++, pci_sz); - - sz -= pci_sz; - bus_start += pci_sz; - phys_start += pci_sz; - - pci_sz = 1ull << __ilog2_u64(sz); - if (sz) { - debug ("R1 bus_start: %llx phys_start: %llx size: %llx\n", - (u64)bus_start, (u64)phys_start, (u64)pci_sz); - pci_set_region(r, bus_start, phys_start, pci_sz, - PCI_REGION_MEM | PCI_REGION_SYS_MEMORY | - PCI_REGION_PREFETCH); - set_inbound_window(pi--, r++, pci_sz); - sz -= pci_sz; - bus_start += pci_sz; - phys_start += pci_sz; - } - } - -#if defined(CONFIG_PHYS_64BIT) && defined(CONFIG_SYS_PCI_64BIT) - /* - * On 64-bit capable systems, set up a mapping for all of DRAM - * in high pci address space. - */ - pci_sz = 1ull << __ilog2_u64(gd->ram_size); - /* round up to the next largest power of two */ - if (gd->ram_size > pci_sz) - pci_sz = 1ull << (__ilog2_u64(gd->ram_size) + 1); - debug ("R64 bus_start: %llx phys_start: %llx size: %llx\n", - (u64)CONFIG_SYS_PCI64_MEMORY_BUS, - (u64)CONFIG_SYS_PCI_MEMORY_PHYS, - (u64)pci_sz); - pci_set_region(r, - CONFIG_SYS_PCI64_MEMORY_BUS, - CONFIG_SYS_PCI_MEMORY_PHYS, - pci_sz, - PCI_REGION_MEM | PCI_REGION_SYS_MEMORY | - PCI_REGION_PREFETCH); - set_inbound_window(pi--, r++, pci_sz); -#else - pci_sz = 1ull << __ilog2_u64(sz); - if (sz) { - debug ("R2 bus_start: %llx phys_start: %llx size: %llx\n", - (u64)bus_start, (u64)phys_start, (u64)pci_sz); - pci_set_region(r, bus_start, phys_start, pci_sz, - PCI_REGION_MEM | PCI_REGION_SYS_MEMORY | - PCI_REGION_PREFETCH); - sz -= pci_sz; - bus_start += pci_sz; - phys_start += pci_sz; - set_inbound_window(pi--, r++, pci_sz); - } -#endif - -#ifdef CONFIG_PHYS_64BIT - if (sz && (((u64)gd->ram_size) < (1ull << 32))) - printf("Was not able to map all of memory via " - "inbound windows -- %lld remaining\n", sz); -#endif - - hose->region_count = r - hose->regions; - - return 1; -} - -#ifdef CONFIG_SRIO_PCIE_BOOT_MASTER -static void fsl_pcie_boot_master(pit_t *pi) -{ - /* configure inbound window for slave's u-boot image */ - debug("PCIEBOOT - MASTER: Inbound window for slave's image; " - "Local = 0x%llx, Bus = 0x%llx, Size = 0x%x\n", - (u64)CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS, - (u64)CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1, - CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE); - struct pci_region r_inbound; - u32 sz_inbound = __ilog2_u64(CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE) - - 1; - pci_set_region(&r_inbound, - CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1, - CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS, - sz_inbound, - PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); - - set_inbound_window(pi--, &r_inbound, - CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE); - - /* configure inbound window for slave's u-boot image */ - debug("PCIEBOOT - MASTER: Inbound window for slave's image; " - "Local = 0x%llx, Bus = 0x%llx, Size = 0x%x\n", - (u64)CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS, - (u64)CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2, - CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE); - pci_set_region(&r_inbound, - CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2, - CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS, - sz_inbound, - PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); - - set_inbound_window(pi--, &r_inbound, - CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE); - - /* configure inbound window for slave's ucode and ENV */ - debug("PCIEBOOT - MASTER: Inbound window for slave's " - "ucode and ENV; " - "Local = 0x%llx, Bus = 0x%llx, Size = 0x%x\n", - (u64)CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS, - (u64)CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS, - CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE); - sz_inbound = __ilog2_u64(CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE) - - 1; - pci_set_region(&r_inbound, - CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS, - CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS, - sz_inbound, - PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); - - set_inbound_window(pi--, &r_inbound, - CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE); -} - -static void fsl_pcie_boot_master_release_slave(int port) -{ - unsigned long release_addr; - - /* now release slave's core 0 */ - switch (port) { - case 1: - release_addr = CONFIG_SYS_PCIE1_MEM_VIRT - + CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET; - break; -#ifdef CONFIG_SYS_PCIE2_MEM_VIRT - case 2: - release_addr = CONFIG_SYS_PCIE2_MEM_VIRT - + CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET; - break; -#endif -#ifdef CONFIG_SYS_PCIE3_MEM_VIRT - case 3: - release_addr = CONFIG_SYS_PCIE3_MEM_VIRT - + CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET; - break; -#endif - default: - release_addr = 0; - break; - } - if (release_addr != 0) { - out_be32((void *)release_addr, - CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK); - debug("PCIEBOOT - MASTER: " - "Release slave successfully! Now the slave should start up!\n"); - } else { - debug("PCIEBOOT - MASTER: " - "Release slave failed!\n"); - } -} -#endif - -void fsl_pci_init(struct pci_controller *hose, struct fsl_pci_info *pci_info) -{ - u32 cfg_addr = (u32)&((ccsr_fsl_pci_t *)pci_info->regs)->cfg_addr; - u32 cfg_data = (u32)&((ccsr_fsl_pci_t *)pci_info->regs)->cfg_data; - u16 temp16; - u32 temp32; - u32 block_rev; - int enabled, r, inbound = 0; - u16 ltssm; - u8 temp8, pcie_cap; - int pcie_cap_pos; - int pci_dcr; - int pci_dsr; - int pci_lsr; - -#if defined(CONFIG_FSL_PCIE_DISABLE_ASPM) - int pci_lcr; -#endif - - volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *)cfg_addr; - struct pci_region *reg = hose->regions + hose->region_count; - pci_dev_t dev = PCI_BDF(hose->first_busno, 0, 0); - - /* Initialize ATMU registers based on hose regions and flags */ - volatile pot_t *po = &pci->pot[1]; /* skip 0 */ - volatile pit_t *pi; - - u64 out_hi = 0, out_lo = -1ULL; - u32 pcicsrbar, pcicsrbar_sz; - - pci_setup_indirect(hose, cfg_addr, cfg_data); - -#ifdef PEX_CCB_DIV - /* Configure the PCIE controller core clock ratio */ - pci_hose_write_config_dword(hose, dev, 0x440, - ((gd->bus_clk / 1000000) * - (16 / PEX_CCB_DIV)) / 333); -#endif - block_rev = in_be32(&pci->block_rev1); - if (PEX_IP_BLK_REV_2_2 <= block_rev) { - pi = &pci->pit[2]; /* 0xDC0 */ - } else { - pi = &pci->pit[3]; /* 0xDE0 */ - } - - /* Handle setup of outbound windows first */ - for (r = 0; r < hose->region_count; r++) { - unsigned long flags = hose->regions[r].flags; - u32 sz = (__ilog2_u64((u64)hose->regions[r].size) - 1); - - flags &= PCI_REGION_SYS_MEMORY|PCI_REGION_TYPE; - if (flags != PCI_REGION_SYS_MEMORY) { - u64 start = hose->regions[r].bus_start; - u64 end = start + hose->regions[r].size; - - out_be32(&po->powbar, hose->regions[r].phys_start >> 12); - out_be32(&po->potar, start >> 12); -#ifdef CONFIG_SYS_PCI_64BIT - out_be32(&po->potear, start >> 44); -#else - out_be32(&po->potear, 0); -#endif - if (hose->regions[r].flags & PCI_REGION_IO) { - out_be32(&po->powar, POWAR_EN | sz | - POWAR_IO_READ | POWAR_IO_WRITE); - } else { - out_be32(&po->powar, POWAR_EN | sz | - POWAR_MEM_READ | POWAR_MEM_WRITE); - out_lo = min(start, out_lo); - out_hi = max(end, out_hi); - } - po++; - } - } - debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); - - /* setup PCSRBAR/PEXCSRBAR */ - pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_0, 0xffffffff); - pci_hose_read_config_dword (hose, dev, PCI_BASE_ADDRESS_0, &pcicsrbar_sz); - pcicsrbar_sz = ~pcicsrbar_sz + 1; - - if (out_hi < (0x100000000ull - pcicsrbar_sz) || - (out_lo > 0x100000000ull)) - pcicsrbar = 0x100000000ull - pcicsrbar_sz; - else - pcicsrbar = (out_lo - pcicsrbar_sz) & -pcicsrbar_sz; - pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_0, pcicsrbar); - - out_lo = min(out_lo, (u64)pcicsrbar); - - debug("PCICSRBAR @ 0x%x\n", pcicsrbar); - - pci_set_region(reg++, pcicsrbar, CONFIG_SYS_CCSRBAR_PHYS, - pcicsrbar_sz, PCI_REGION_SYS_MEMORY); - hose->region_count++; - - /* see if we are a PCIe or PCI controller */ - pcie_cap_pos = pci_hose_find_capability(hose, dev, PCI_CAP_ID_EXP); - pci_dcr = pcie_cap_pos + 0x08; - pci_dsr = pcie_cap_pos + 0x0a; - pci_lsr = pcie_cap_pos + 0x12; - - pci_hose_read_config_byte(hose, dev, pcie_cap_pos, &pcie_cap); - -#ifdef CONFIG_SRIO_PCIE_BOOT_MASTER - /* boot from PCIE --master */ - char *s = env_get("bootmaster"); - char pcie[6]; - sprintf(pcie, "PCIE%d", pci_info->pci_num); - - if (s && (strcmp(s, pcie) == 0)) { - debug("PCIEBOOT - MASTER: Master port [ %d ] for pcie boot.\n", - pci_info->pci_num); - fsl_pcie_boot_master((pit_t *)pi); - } else { - /* inbound */ - inbound = fsl_pci_setup_inbound_windows(hose, - out_lo, pcie_cap, pi); - } -#else - /* inbound */ - inbound = fsl_pci_setup_inbound_windows(hose, out_lo, pcie_cap, pi); -#endif - - for (r = 0; r < hose->region_count; r++) - debug("PCI reg:%d %016llx:%016llx %016llx %08lx\n", r, - (u64)hose->regions[r].phys_start, - (u64)hose->regions[r].bus_start, - (u64)hose->regions[r].size, - hose->regions[r].flags); - - pci_register_hose(hose); - pciauto_config_init(hose); /* grab pci_{mem,prefetch,io} */ - hose->current_busno = hose->first_busno; - - out_be32(&pci->pedr, 0xffffffff); /* Clear any errors */ - out_be32(&pci->peer, ~0x20140); /* Enable All Error Interrupts except - * - Master abort (pci) - * - Master PERR (pci) - * - ICCA (PCIe) - */ - pci_hose_read_config_dword(hose, dev, pci_dcr, &temp32); - temp32 |= 0xf000e; /* set URR, FER, NFER (but not CER) */ - pci_hose_write_config_dword(hose, dev, pci_dcr, temp32); - -#if defined(CONFIG_FSL_PCIE_DISABLE_ASPM) - pci_lcr = pcie_cap_pos + 0x10; - temp32 = 0; - pci_hose_read_config_dword(hose, dev, pci_lcr, &temp32); - temp32 &= ~0x03; /* Disable ASPM */ - pci_hose_write_config_dword(hose, dev, pci_lcr, temp32); - udelay(1); -#endif - if (pcie_cap == PCI_CAP_ID_EXP) { - if (block_rev >= PEX_IP_BLK_REV_3_0) { -#define PEX_CSR0_LTSSM_MASK 0xFC -#define PEX_CSR0_LTSSM_SHIFT 2 - ltssm = (in_be32(&pci->pex_csr0) - & PEX_CSR0_LTSSM_MASK) >> PEX_CSR0_LTSSM_SHIFT; - enabled = (ltssm == 0x11) ? 1 : 0; -#ifdef CONFIG_FSL_PCIE_RESET - int i; - /* assert PCIe reset */ - setbits_be32(&pci->pdb_stat, 0x08000000); - (void) in_be32(&pci->pdb_stat); - udelay(1000); - /* clear PCIe reset */ - clrbits_be32(&pci->pdb_stat, 0x08000000); - asm("sync;isync"); - for (i = 0; i < 100 && ltssm < PCI_LTSSM_L0; i++) { - pci_hose_read_config_word(hose, dev, PCI_LTSSM, - <ssm); - udelay(1000); - } -#endif - } else { - /* pci_hose_read_config_word(hose, dev, PCI_LTSSM, <ssm); */ - /* enabled = ltssm >= PCI_LTSSM_L0; */ - pci_hose_read_config_word(hose, dev, PCI_LTSSM, <ssm); - enabled = ltssm >= PCI_LTSSM_L0; - -#ifdef CONFIG_FSL_PCIE_RESET - if (ltssm == 1) { - int i; - debug("....PCIe link error. " "LTSSM=0x%02x.", ltssm); - /* assert PCIe reset */ - setbits_be32(&pci->pdb_stat, 0x08000000); - (void) in_be32(&pci->pdb_stat); - udelay(100); - debug(" Asserting PCIe reset @%p = %x\n", - &pci->pdb_stat, in_be32(&pci->pdb_stat)); - /* clear PCIe reset */ - clrbits_be32(&pci->pdb_stat, 0x08000000); - asm("sync;isync"); - for (i=0; i<100 && ltssm < PCI_LTSSM_L0; i++) { - pci_hose_read_config_word(hose, dev, PCI_LTSSM, - <ssm); - udelay(1000); - debug("....PCIe link error. " - "LTSSM=0x%02x.\n", ltssm); - } - enabled = ltssm >= PCI_LTSSM_L0; - - /* we need to re-write the bar0 since a reset will - * clear it - */ - pci_hose_write_config_dword(hose, dev, - PCI_BASE_ADDRESS_0, pcicsrbar); - } -#endif - } - -#ifdef CONFIG_SYS_P4080_ERRATUM_PCIE_A003 - if (enabled == 0) { - serdes_corenet_t *srds_regs = (void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR; - temp32 = in_be32(&srds_regs->srdspccr0); - - if ((temp32 >> 28) == 3) { - int i; - - out_be32(&srds_regs->srdspccr0, 2 << 28); - setbits_be32(&pci->pdb_stat, 0x08000000); - in_be32(&pci->pdb_stat); - udelay(100); - clrbits_be32(&pci->pdb_stat, 0x08000000); - asm("sync;isync"); - for (i=0; i < 100 && ltssm < PCI_LTSSM_L0; i++) { - pci_hose_read_config_word(hose, dev, PCI_LTSSM, <ssm); - udelay(1000); - } - enabled = ltssm >= PCI_LTSSM_L0; - } - } -#endif - if (!enabled) { - /* Let the user know there's no PCIe link for root - * complex. for endpoint, the link may not setup, so - * print undetermined. - */ - if (fsl_is_pci_agent(hose)) - printf("undetermined, regs @ 0x%lx\n", pci_info->regs); - else - printf("no link, regs @ 0x%lx\n", pci_info->regs); - hose->last_busno = hose->first_busno; - return; - } - - out_be32(&pci->pme_msg_det, 0xffffffff); - out_be32(&pci->pme_msg_int_en, 0xffffffff); - - /* Print the negotiated PCIe link width */ - pci_hose_read_config_word(hose, dev, pci_lsr, &temp16); - printf("x%d gen%d, regs @ 0x%lx\n", (temp16 & 0x3f0) >> 4, - (temp16 & 0xf), pci_info->regs); - - hose->current_busno++; /* Start scan with secondary */ - pciauto_prescan_setup_bridge(hose, dev, hose->current_busno); - } - -#ifdef CONFIG_SYS_FSL_ERRATUM_A007815 - /* The Read-Only Write Enable bit defaults to 1 instead of 0. - * Set to 0 to protect the read-only registers. - */ - clrbits_be32(&pci->dbi_ro_wr_en, 0x01); -#endif - - /* Use generic setup_device to initialize standard pci regs, - * but do not allocate any windows since any BAR found (such - * as PCSRBAR) is not in this cpu's memory space. - */ - pciauto_setup_device(hose, dev, 0, hose->pci_mem, - hose->pci_prefetch, hose->pci_io); - - if (inbound) { - pci_hose_read_config_word(hose, dev, PCI_COMMAND, &temp16); - pci_hose_write_config_word(hose, dev, PCI_COMMAND, - temp16 | PCI_COMMAND_MEMORY); - } - -#ifndef CONFIG_PCI_NOSCAN - if (!fsl_is_pci_agent(hose)) { - debug(" Scanning PCI bus %02x\n", - hose->current_busno); - hose->last_busno = pci_hose_scan_bus(hose, hose->current_busno); - } else { - debug(" Not scanning PCI bus %02x. PI=%x\n", - hose->current_busno, temp8); - hose->last_busno = hose->current_busno; - } - - /* if we are PCIe - update limit regs and subordinate busno - * for the virtual P2P bridge - */ - if (pcie_cap == PCI_CAP_ID_EXP) { - pciauto_postscan_setup_bridge(hose, dev, hose->last_busno); - } -#else - hose->last_busno = hose->current_busno; -#endif - - /* Clear all error indications */ - if (pcie_cap == PCI_CAP_ID_EXP) - out_be32(&pci->pme_msg_det, 0xffffffff); - out_be32(&pci->pedr, 0xffffffff); - - pci_hose_read_config_word(hose, dev, pci_dsr, &temp16); - if (temp16) { - pci_hose_write_config_word(hose, dev, pci_dsr, 0xffff); - } - - pci_hose_read_config_word (hose, dev, PCI_SEC_STATUS, &temp16); - if (temp16) { - pci_hose_write_config_word(hose, dev, PCI_SEC_STATUS, 0xffff); - } -} - -int fsl_is_pci_agent(struct pci_controller *hose) -{ - int pcie_cap_pos; - u8 pcie_cap; - pci_dev_t dev = PCI_BDF(hose->first_busno, 0, 0); - - pcie_cap_pos = pci_hose_find_capability(hose, dev, PCI_CAP_ID_EXP); - pci_hose_read_config_byte(hose, dev, pcie_cap_pos, &pcie_cap); - if (pcie_cap == PCI_CAP_ID_EXP) { - u8 header_type; - - pci_hose_read_config_byte(hose, dev, PCI_HEADER_TYPE, - &header_type); - return (header_type & 0x7f) == PCI_HEADER_TYPE_NORMAL; - } else { - u8 prog_if; - - pci_hose_read_config_byte(hose, dev, PCI_CLASS_PROG, &prog_if); - /* Programming Interface (PCI_CLASS_PROG) - * 0 == pci host or pcie root-complex, - * 1 == pci agent or pcie end-point - */ - return (prog_if == FSL_PROG_IF_AGENT); - } -} - -int fsl_pci_init_port(struct fsl_pci_info *pci_info, - struct pci_controller *hose, int busno) -{ - volatile ccsr_fsl_pci_t *pci; - struct pci_region *r; - pci_dev_t dev = PCI_BDF(busno,0,0); - int pcie_cap_pos; - u8 pcie_cap; - - pci = (ccsr_fsl_pci_t *) pci_info->regs; - - /* on non-PCIe controllers we don't have pme_msg_det so this code - * should do nothing since the read will return 0 - */ - if (in_be32(&pci->pme_msg_det)) { - out_be32(&pci->pme_msg_det, 0xffffffff); - debug (" with errors. Clearing. Now 0x%08x", - pci->pme_msg_det); - } - - r = hose->regions + hose->region_count; - - /* outbound memory */ - pci_set_region(r++, - pci_info->mem_bus, - pci_info->mem_phys, - pci_info->mem_size, - PCI_REGION_MEM); - - /* outbound io */ - pci_set_region(r++, - pci_info->io_bus, - pci_info->io_phys, - pci_info->io_size, - PCI_REGION_IO); - - hose->region_count = r - hose->regions; - hose->first_busno = busno; - - fsl_pci_init(hose, pci_info); - - if (fsl_is_pci_agent(hose)) { - fsl_pci_config_unlock(hose); - hose->last_busno = hose->first_busno; -#ifdef CONFIG_SRIO_PCIE_BOOT_MASTER - } else { - /* boot from PCIE --master releases slave's core 0 */ - char *s = env_get("bootmaster"); - char pcie[6]; - sprintf(pcie, "PCIE%d", pci_info->pci_num); - - if (s && (strcmp(s, pcie) == 0)) - fsl_pcie_boot_master_release_slave(pci_info->pci_num); -#endif - } - - pcie_cap_pos = pci_hose_find_capability(hose, dev, PCI_CAP_ID_EXP); - pci_hose_read_config_byte(hose, dev, pcie_cap_pos, &pcie_cap); - printf("PCI%s%x: Bus %02x - %02x\n", pcie_cap == PCI_CAP_ID_EXP ? - "e" : "", pci_info->pci_num, - hose->first_busno, hose->last_busno); - return(hose->last_busno + 1); -} - -/* Enable inbound PCI config cycles for agent/endpoint interface */ -void fsl_pci_config_unlock(struct pci_controller *hose) -{ - pci_dev_t dev = PCI_BDF(hose->first_busno,0,0); - int pcie_cap_pos; - u8 pcie_cap; - u16 pbfr; - - if (!fsl_is_pci_agent(hose)) - return; - - pcie_cap_pos = pci_hose_find_capability(hose, dev, PCI_CAP_ID_EXP); - pci_hose_read_config_byte(hose, dev, pcie_cap_pos, &pcie_cap); - if (pcie_cap != 0x0) { - ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *)hose->cfg_addr; - u32 block_rev = in_be32(&pci->block_rev1); - /* PCIe - set CFG_READY bit of Configuration Ready Register */ - if (block_rev >= PEX_IP_BLK_REV_3_0) - setbits_be32(&pci->config, FSL_PCIE_V3_CFG_RDY); - else - pci_hose_write_config_byte(hose, dev, - FSL_PCIE_CFG_RDY, 0x1); - } else { - /* PCI - clear ACL bit of PBFR */ - pci_hose_read_config_word(hose, dev, FSL_PCI_PBFR, &pbfr); - pbfr &= ~0x20; - pci_hose_write_config_word(hose, dev, FSL_PCI_PBFR, pbfr); - } -} - -#if defined(CONFIG_PCIE1) || defined(CONFIG_PCIE2) || \ - defined(CONFIG_PCIE3) || defined(CONFIG_PCIE4) -int fsl_configure_pcie(struct fsl_pci_info *info, - struct pci_controller *hose, - const char *connected, int busno) -{ - int is_endpoint; - - set_next_law(info->mem_phys, law_size_bits(info->mem_size), info->law); - set_next_law(info->io_phys, law_size_bits(info->io_size), info->law); - - is_endpoint = fsl_setup_hose(hose, info->regs); - printf("PCIe%u: %s", info->pci_num, - is_endpoint ? "Endpoint" : "Root Complex"); - if (connected) - printf(" of %s", connected); - puts(", "); - - return fsl_pci_init_port(info, hose, busno); -} - -#if defined(CONFIG_FSL_CORENET) -#ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2 - #define _DEVDISR_PCIE1 FSL_CORENET_DEVDISR3_PCIE1 - #define _DEVDISR_PCIE2 FSL_CORENET_DEVDISR3_PCIE2 - #define _DEVDISR_PCIE3 FSL_CORENET_DEVDISR3_PCIE3 - #define _DEVDISR_PCIE4 FSL_CORENET_DEVDISR3_PCIE4 -#else - #define _DEVDISR_PCIE1 FSL_CORENET_DEVDISR_PCIE1 - #define _DEVDISR_PCIE2 FSL_CORENET_DEVDISR_PCIE2 - #define _DEVDISR_PCIE3 FSL_CORENET_DEVDISR_PCIE3 - #define _DEVDISR_PCIE4 FSL_CORENET_DEVDISR_PCIE4 -#endif - #define CONFIG_SYS_MPC8xxx_GUTS_ADDR CONFIG_SYS_MPC85xx_GUTS_ADDR -#elif defined(CONFIG_MPC85xx) - #define _DEVDISR_PCIE1 MPC85xx_DEVDISR_PCIE - #define _DEVDISR_PCIE2 MPC85xx_DEVDISR_PCIE2 - #define _DEVDISR_PCIE3 MPC85xx_DEVDISR_PCIE3 - #define _DEVDISR_PCIE4 0 - #define CONFIG_SYS_MPC8xxx_GUTS_ADDR CONFIG_SYS_MPC85xx_GUTS_ADDR -#elif defined(CONFIG_MPC86xx) - #define _DEVDISR_PCIE1 MPC86xx_DEVDISR_PCIE1 - #define _DEVDISR_PCIE2 MPC86xx_DEVDISR_PCIE2 - #define _DEVDISR_PCIE3 0 - #define _DEVDISR_PCIE4 0 - #define CONFIG_SYS_MPC8xxx_GUTS_ADDR \ - (&((immap_t *)CONFIG_SYS_IMMR)->im_gur) -#else -#error "No defines for DEVDISR_PCIE" -#endif - -/* Implement a dummy function for those platforms w/o SERDES */ -static const char *__board_serdes_name(enum srds_prtcl device) -{ - switch (device) { -#ifdef CONFIG_SYS_PCIE1_NAME - case PCIE1: - return CONFIG_SYS_PCIE1_NAME; -#endif -#ifdef CONFIG_SYS_PCIE2_NAME - case PCIE2: - return CONFIG_SYS_PCIE2_NAME; -#endif -#ifdef CONFIG_SYS_PCIE3_NAME - case PCIE3: - return CONFIG_SYS_PCIE3_NAME; -#endif -#ifdef CONFIG_SYS_PCIE4_NAME - case PCIE4: - return CONFIG_SYS_PCIE4_NAME; -#endif - default: - return NULL; - } - - return NULL; -} - -__attribute__((weak, alias("__board_serdes_name"))) const char * -board_serdes_name(enum srds_prtcl device); - -static u32 devdisr_mask[] = { - _DEVDISR_PCIE1, - _DEVDISR_PCIE2, - _DEVDISR_PCIE3, - _DEVDISR_PCIE4, -}; - -int fsl_pcie_init_ctrl(int busno, u32 devdisr, enum srds_prtcl dev, - struct fsl_pci_info *pci_info) -{ - struct pci_controller *hose; - int num = dev - PCIE1; - - hose = calloc(1, sizeof(struct pci_controller)); - if (!hose) - return busno; - - if (is_serdes_configured(dev) && !(devdisr & devdisr_mask[num])) { - busno = fsl_configure_pcie(pci_info, hose, - board_serdes_name(dev), busno); - } else { - printf("PCIe%d: disabled\n", num + 1); - } - - return busno; -} - -int fsl_pcie_init_board(int busno) -{ - struct fsl_pci_info pci_info; - ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC8xxx_GUTS_ADDR; - u32 devdisr; - u32 *addr; - -#ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2 - addr = &gur->devdisr3; -#else - addr = &gur->devdisr; -#endif - devdisr = in_be32(addr); - -#ifdef CONFIG_PCIE1 - SET_STD_PCIE_INFO(pci_info, 1); - busno = fsl_pcie_init_ctrl(busno, devdisr, PCIE1, &pci_info); -#else - setbits_be32(addr, _DEVDISR_PCIE1); /* disable */ -#endif - -#ifdef CONFIG_PCIE2 - SET_STD_PCIE_INFO(pci_info, 2); - busno = fsl_pcie_init_ctrl(busno, devdisr, PCIE2, &pci_info); -#else - setbits_be32(addr, _DEVDISR_PCIE2); /* disable */ -#endif - -#ifdef CONFIG_PCIE3 - SET_STD_PCIE_INFO(pci_info, 3); - busno = fsl_pcie_init_ctrl(busno, devdisr, PCIE3, &pci_info); -#else - setbits_be32(addr, _DEVDISR_PCIE3); /* disable */ -#endif - -#ifdef CONFIG_PCIE4 - SET_STD_PCIE_INFO(pci_info, 4); - busno = fsl_pcie_init_ctrl(busno, devdisr, PCIE4, &pci_info); -#else - setbits_be32(addr, _DEVDISR_PCIE4); /* disable */ -#endif - - return busno; -} -#else -int fsl_pcie_init_ctrl(int busno, u32 devdisr, enum srds_prtcl dev, - struct fsl_pci_info *pci_info) -{ - return busno; -} - -int fsl_pcie_init_board(int busno) -{ - return busno; -} -#endif - -#ifdef CONFIG_OF_BOARD_SETUP -#include -#include - -void ft_fsl_pci_setup(void *blob, const char *pci_compat, - unsigned long ctrl_addr) -{ - int off; - u32 bus_range[2]; - phys_addr_t p_ctrl_addr = (phys_addr_t)ctrl_addr; - struct pci_controller *hose; - - hose = find_hose_by_cfg_addr((void *)(ctrl_addr)); - - /* convert ctrl_addr to true physical address */ - p_ctrl_addr = (phys_addr_t)ctrl_addr - CONFIG_SYS_CCSRBAR; - p_ctrl_addr += CONFIG_SYS_CCSRBAR_PHYS; - - off = fdt_node_offset_by_compat_reg(blob, pci_compat, p_ctrl_addr); - - if (off < 0) - return; - - /* We assume a cfg_addr not being set means we didn't setup the controller */ - if ((hose == NULL) || (hose->cfg_addr == NULL)) { - fdt_del_node(blob, off); - } else { - bus_range[0] = 0; - bus_range[1] = hose->last_busno - hose->first_busno; - fdt_setprop(blob, off, "bus-range", &bus_range[0], 2*4); - fdt_pci_dma_ranges(blob, off, hose); - } -} -#endif diff --git a/drivers/pci/pci-aardvark.c b/drivers/pci/pci-aardvark.c index a92f00d0af5aa067da18558234f12b8580b356b7..22b6d8b628653270992f5c0f752e2251e4bab06b 100644 --- a/drivers/pci/pci-aardvark.c +++ b/drivers/pci/pci-aardvark.c @@ -21,6 +21,7 @@ * * Author: Victor Gu * Hezi Shahmoon + * Pali Rohár * */ @@ -165,16 +166,6 @@ #define PCIE_CONFIG_WR_TYPE0 0xa #define PCIE_CONFIG_WR_TYPE1 0xb -/* PCI_BDF shifts 8bit, so we need extra 4bit shift */ -#define PCIE_BDF(b, d, f) (PCI_BDF(b, d, f) << 4) -#define PCIE_CONF_BUS(bus) (((bus) & 0xff) << 20) -#define PCIE_CONF_DEV(dev) (((dev) & 0x1f) << 15) -#define PCIE_CONF_FUNC(fun) (((fun) & 0x7) << 12) -#define PCIE_CONF_REG(reg) ((reg) & 0xffc) -#define PCIE_CONF_ADDR(bus, devfn, where) \ - (PCIE_CONF_BUS(bus) | PCIE_CONF_DEV(PCI_SLOT(devfn)) | \ - PCIE_CONF_FUNC(PCI_FUNC(devfn)) | PCIE_CONF_REG(where)) - /* PCIe Retries & Timeout definitions */ #define PIO_MAX_RETRIES 1500 #define PIO_WAIT_TIMEOUT 1000 @@ -467,7 +458,7 @@ static int pcie_advk_read_config(const struct udevice *bus, pci_dev_t bdf, advk_writel(pcie, reg, PIO_CTRL); /* Program the address registers */ - reg = PCIE_BDF(busno, PCI_DEV(bdf), PCI_FUNC(bdf)) | PCIE_CONF_REG(offset); + reg = PCIE_ECAM_OFFSET(busno, PCI_DEV(bdf), PCI_FUNC(bdf), (offset & ~0x3)); advk_writel(pcie, reg, PIO_ADDR_LS); advk_writel(pcie, 0, PIO_ADDR_MS); @@ -626,7 +617,7 @@ static int pcie_advk_write_config(struct udevice *bus, pci_dev_t bdf, advk_writel(pcie, reg, PIO_CTRL); /* Program the address registers */ - reg = PCIE_BDF(busno, PCI_DEV(bdf), PCI_FUNC(bdf)) | PCIE_CONF_REG(offset); + reg = PCIE_ECAM_OFFSET(busno, PCI_DEV(bdf), PCI_FUNC(bdf), (offset & ~0x3)); advk_writel(pcie, reg, PIO_ADDR_LS); advk_writel(pcie, 0, PIO_ADDR_MS); dev_dbg(pcie->dev, "\tPIO req. - addr = 0x%08x\n", reg); diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c index 62a4df37a02a84574999d06da274e7eaada05f46..9248cbc294ce1d434794ee983f294a142e06ef43 100644 --- a/drivers/pci/pci_mvebu.c +++ b/drivers/pci/pci_mvebu.c @@ -7,13 +7,13 @@ * Ported to U-Boot by: * Anton Schubert * Stefan Roese + * Pali Rohár */ #include #include #include #include -#include #include #include #include @@ -26,8 +26,6 @@ #include #include -DECLARE_GLOBAL_DATA_PTR; - /* PCIe unit register offsets */ #define SELECT(x, n) ((x >> n) & 1UL) @@ -313,7 +311,9 @@ static int mvebu_pcie_write_config(struct udevice *bus, pci_dev_t bdf, /* * Setup PCIE BARs and Address Decode Wins: - * BAR[0,2] -> disabled, BAR[1] -> covers all DRAM banks + * BAR[0] -> internal registers + * BAR[1] -> covers all DRAM banks + * BAR[2] -> disabled * WIN[0-3] -> DRAM bank[0-3] */ static void mvebu_pcie_setup_wins(struct mvebu_pcie *pcie) @@ -364,6 +364,10 @@ static void mvebu_pcie_setup_wins(struct mvebu_pcie *pcie) writel(0, pcie->base + PCIE_BAR_HI_OFF(1)); writel(((size - 1) & 0xffff0000) | 0x1, pcie->base + PCIE_BAR_CTRL_OFF(1)); + + /* Setup BAR[0] to internal registers. */ + writel(SOC_REGS_PHY_BASE, pcie->base + PCIE_BAR_LO_OFF(0)); + writel(0, pcie->base + PCIE_BAR_HI_OFF(0)); } static int mvebu_pcie_probe(struct udevice *dev) @@ -444,9 +448,9 @@ static int mvebu_pcie_probe(struct udevice *dev) if (mvebu_mbus_add_window_by_id(pcie->mem_target, pcie->mem_attr, (phys_addr_t)pcie->mem.start, - MBUS_PCI_MEM_SIZE)) { + resource_size(&pcie->mem))) { printf("PCIe unable to add mbus window for mem at %08x+%08x\n", - (u32)pcie->mem.start, MBUS_PCI_MEM_SIZE); + (u32)pcie->mem.start, (unsigned)resource_size(&pcie->mem)); } pcie->io.start = (u32)mvebu_pcie_iobase; @@ -455,9 +459,9 @@ static int mvebu_pcie_probe(struct udevice *dev) if (mvebu_mbus_add_window_by_id(pcie->io_target, pcie->io_attr, (phys_addr_t)pcie->io.start, - MBUS_PCI_IO_SIZE)) { + resource_size(&pcie->io))) { printf("PCIe unable to add mbus window for IO at %08x+%08x\n", - (u32)pcie->io.start, MBUS_PCI_IO_SIZE); + (u32)pcie->io.start, (unsigned)resource_size(&pcie->io)); } /* Setup windows and configure host bridge */ @@ -465,19 +469,15 @@ static int mvebu_pcie_probe(struct udevice *dev) /* PCI memory space */ pci_set_region(hose->regions + 0, pcie->mem.start, - pcie->mem.start, MBUS_PCI_MEM_SIZE, PCI_REGION_MEM); + pcie->mem.start, resource_size(&pcie->mem), PCI_REGION_MEM); pci_set_region(hose->regions + 1, 0, 0, gd->ram_size, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); pci_set_region(hose->regions + 2, pcie->io.start, - pcie->io.start, MBUS_PCI_IO_SIZE, PCI_REGION_IO); + pcie->io.start, resource_size(&pcie->io), PCI_REGION_IO); hose->region_count = 3; - /* Set BAR0 to internal registers */ - writel(SOC_REGS_PHY_BASE, pcie->base + PCIE_BAR_LO_OFF(0)); - writel(0, pcie->base + PCIE_BAR_HI_OFF(0)); - /* PCI Bridge support 32-bit I/O and 64-bit prefetch mem addressing */ pcie->cfgcache[(PCI_IO_BASE - 0x10) / 4] = PCI_IO_RANGE_TYPE_32 | (PCI_IO_RANGE_TYPE_32 << 8); diff --git a/drivers/pci/pcie_ecam_generic.c b/drivers/pci/pcie_ecam_generic.c index e83e5aff206b07d0f8a1d0011a43a187fd258c8f..1a9f9aec2ee1d4df5f63231832dc88aa7c59fb79 100644 --- a/drivers/pci/pcie_ecam_generic.c +++ b/drivers/pci/pcie_ecam_generic.c @@ -14,6 +14,8 @@ #include +#define TYPE_PCI 0x1 + /** * struct generic_ecam_pcie - generic_ecam PCIe controller state * @cfg_base: The base address of memory mapped configuration space @@ -46,10 +48,14 @@ static int pci_generic_ecam_conf_address(const struct udevice *bus, void *addr; addr = pcie->cfg_base; - addr += (PCI_BUS(bdf) - pcie->first_busno) << 20; - addr += PCI_DEV(bdf) << 15; - addr += PCI_FUNC(bdf) << 12; - addr += offset; + + if (dev_get_driver_data(bus) == TYPE_PCI) { + addr += ((PCI_BUS(bdf) - pcie->first_busno) << 16) | + (PCI_DEV(bdf) << 11) | (PCI_FUNC(bdf) << 8) | offset; + } else { + addr += PCIE_ECAM_OFFSET(PCI_BUS(bdf) - pcie->first_busno, + PCI_DEV(bdf), PCI_FUNC(bdf), offset); + } *paddress = addr; return 0; @@ -158,7 +164,8 @@ static const struct dm_pci_ops pci_generic_ecam_ops = { }; static const struct udevice_id pci_generic_ecam_ids[] = { - { .compatible = "pci-host-ecam-generic" }, + { .compatible = "pci-host-ecam-generic" /* PCI-E */ }, + { .compatible = "pci-host-cam-generic", .data = TYPE_PCI }, { } }; diff --git a/drivers/pci/pcie_ecam_synquacer.c b/drivers/pci/pcie_ecam_synquacer.c index c6e7c59f8a64ffbc456668ea51ec0926239f0ab1..e3e22891088e2bf87d710f0a7ee77b1538ba6819 100644 --- a/drivers/pci/pcie_ecam_synquacer.c +++ b/drivers/pci/pcie_ecam_synquacer.c @@ -235,10 +235,8 @@ static int pci_synquacer_ecam_conf_address(const struct udevice *bus, void *addr; addr = pcie->cfg_base; - addr += (PCI_BUS(bdf) - pcie->first_busno) << 20; - addr += PCI_DEV(bdf) << 15; - addr += PCI_FUNC(bdf) << 12; - addr += offset; + addr += PCIE_ECAM_OFFSET(PCI_BUS(bdf) - pcie->first_busno, + PCI_DEV(bdf), PCI_FUNC(bdf), offset); *paddress = addr; return 0; diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c index 8a2a0e1f4a906a957137fae0eca0742d460c3e24..a47c9ef7c2f7d8dd3e2d5d271fe054b846431cd0 100644 --- a/drivers/pci/pcie_layerscape_fixup.c +++ b/drivers/pci/pcie_layerscape_fixup.c @@ -584,9 +584,9 @@ static void ft_pcie_rc_fix(void *blob, struct ls_pcie_rc *pcie_rc) return; if (pcie_rc->enabled && pcie->mode == PCI_HEADER_TYPE_BRIDGE) - fdt_set_node_status(blob, off, FDT_STATUS_OKAY, 0); + fdt_set_node_status(blob, off, FDT_STATUS_OKAY); else - fdt_set_node_status(blob, off, FDT_STATUS_DISABLED, 0); + fdt_set_node_status(blob, off, FDT_STATUS_DISABLED); } static void ft_pcie_ep_fix(void *blob, struct ls_pcie_rc *pcie_rc) @@ -600,9 +600,9 @@ static void ft_pcie_ep_fix(void *blob, struct ls_pcie_rc *pcie_rc) return; if (pcie_rc->enabled && pcie->mode == PCI_HEADER_TYPE_NORMAL) - fdt_set_node_status(blob, off, FDT_STATUS_OKAY, 0); + fdt_set_node_status(blob, off, FDT_STATUS_OKAY); else - fdt_set_node_status(blob, off, FDT_STATUS_DISABLED, 0); + fdt_set_node_status(blob, off, FDT_STATUS_DISABLED); } static void ft_pcie_ls_setup(void *blob, struct ls_pcie_rc *pcie_rc) diff --git a/drivers/pci/pcie_layerscape_gen4_fixup.c b/drivers/pci/pcie_layerscape_gen4_fixup.c index 7d1123410616b703c99aa02739566beda29a0e3d..b2a45bf105c84c2e2fa801f3efdba6177a53302d 100644 --- a/drivers/pci/pcie_layerscape_gen4_fixup.c +++ b/drivers/pci/pcie_layerscape_gen4_fixup.c @@ -193,9 +193,9 @@ static void ft_pcie_ep_layerscape_gen4_fix(void *blob, struct ls_pcie_g4 *pcie) } if (pcie->enabled && pcie->mode == PCI_HEADER_TYPE_NORMAL) - fdt_set_node_status(blob, off, FDT_STATUS_OKAY, 0); + fdt_set_node_status(blob, off, FDT_STATUS_OKAY); else - fdt_set_node_status(blob, off, FDT_STATUS_DISABLED, 0); + fdt_set_node_status(blob, off, FDT_STATUS_DISABLED); } static void ft_pcie_rc_layerscape_gen4_fix(void *blob, struct ls_pcie_g4 *pcie) @@ -214,9 +214,9 @@ static void ft_pcie_rc_layerscape_gen4_fix(void *blob, struct ls_pcie_g4 *pcie) } if (pcie->enabled && pcie->mode == PCI_HEADER_TYPE_BRIDGE) - fdt_set_node_status(blob, off, FDT_STATUS_OKAY, 0); + fdt_set_node_status(blob, off, FDT_STATUS_OKAY); else - fdt_set_node_status(blob, off, FDT_STATUS_DISABLED, 0); + fdt_set_node_status(blob, off, FDT_STATUS_DISABLED); } static void ft_pcie_layerscape_gen4_setup(void *blob, struct ls_pcie_g4 *pcie) diff --git a/drivers/pci/pcie_phytium.c b/drivers/pci/pcie_phytium.c index 752e1703215ba548440e30603a363426c59340af..a80727625428c30445c7722c48781169607eab70 100644 --- a/drivers/pci/pcie_phytium.c +++ b/drivers/pci/pcie_phytium.c @@ -36,9 +36,7 @@ static int phytium_pci_skip_dev(pci_dev_t parent) unsigned short capreg; unsigned char port_type; - addr += PCI_BUS(parent) << 20; - addr += PCI_DEV(parent) << 15; - addr += PCI_FUNC(parent) << 12; + addr += PCIE_ECAM_OFFSET(PCI_BUS(parent), PCI_DEV(parent), PCI_FUNC(parent), 0); pos = 0x34; while (1) { @@ -89,9 +87,7 @@ static int pci_phytium_conf_address(const struct udevice *bus, pci_dev_t bdf, bdf_parent = PCI_BDF((bus_no - 1), 0, 0); addr = pcie->cfg_base; - addr += PCI_BUS(bdf) << 20; - addr += PCI_DEV(bdf) << 15; - addr += PCI_FUNC(bdf) << 12; + addr += PCIE_ECAM_OFFSET(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), 0); if (bus_no > 0 && dev_no > 0) { if ((readb(addr + PCI_HEADER_TYPE) & 0x7f) != diff --git a/drivers/pci/pcie_rockchip.c b/drivers/pci/pcie_rockchip.c index b0c91c0f430eba9b4b114e35385ac95be6b87669..67039d2a29f8197c460c5f002abbbe524185aa65 100644 --- a/drivers/pci/pcie_rockchip.c +++ b/drivers/pci/pcie_rockchip.c @@ -101,15 +101,6 @@ struct rockchip_pcie { struct phy pcie_phy; }; -static int rockchip_pcie_off_conf(pci_dev_t bdf, uint offset) -{ - unsigned int bus = PCI_BUS(bdf); - unsigned int dev = PCI_DEV(bdf); - unsigned int func = PCI_FUNC(bdf); - - return (bus << 20) | (dev << 15) | (func << 12) | (offset & ~0x3); -} - static int rockchip_pcie_rd_conf(const struct udevice *udev, pci_dev_t bdf, uint offset, ulong *valuep, enum pci_size_t size) @@ -117,7 +108,7 @@ static int rockchip_pcie_rd_conf(const struct udevice *udev, pci_dev_t bdf, struct rockchip_pcie *priv = dev_get_priv(udev); unsigned int bus = PCI_BUS(bdf); unsigned int dev = PCI_DEV(bdf); - int where = rockchip_pcie_off_conf(bdf, offset); + int where = PCIE_ECAM_OFFSET(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset & ~0x3); ulong value; if (bus == priv->first_busno && dev == 0) { @@ -144,7 +135,7 @@ static int rockchip_pcie_wr_conf(struct udevice *udev, pci_dev_t bdf, struct rockchip_pcie *priv = dev_get_priv(udev); unsigned int bus = PCI_BUS(bdf); unsigned int dev = PCI_DEV(bdf); - int where = rockchip_pcie_off_conf(bdf, offset); + int where = PCIE_ECAM_OFFSET(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset & ~0x3); ulong old; if (bus == priv->first_busno && dev == 0) { diff --git a/drivers/pci/pcie_xilinx.c b/drivers/pci/pcie_xilinx.c index ae9a65b0a9e10f34779c07e0e18e245841f5d925..eb9ec97b74f310f0c3ed11f038a5c6e5cf78625a 100644 --- a/drivers/pci/pcie_xilinx.c +++ b/drivers/pci/pcie_xilinx.c @@ -76,10 +76,7 @@ static int pcie_xilinx_config_address(const struct udevice *udev, pci_dev_t bdf, return -ENODEV; addr = pcie->cfg_base; - addr += bus << 20; - addr += dev << 15; - addr += func << 12; - addr += offset; + addr += PCIE_ECAM_OFFSET(bus, dev, func, offset); *paddress = addr; return 0; diff --git a/drivers/phy/cadence/phy-cadence-torrent.c b/drivers/phy/cadence/phy-cadence-torrent.c index 141ece479fe5cc904acace1a4b88ddf177a35b22..ef924e7af508b48b9a1e098b700008829c25eb52 100644 --- a/drivers/phy/cadence/phy-cadence-torrent.c +++ b/drivers/phy/cadence/phy-cadence-torrent.c @@ -616,8 +616,8 @@ static int cdns_torrent_phy_probe(struct udevice *dev) /* Going through all the available subnodes or children*/ ofnode_for_each_subnode(child, dev_ofnode(dev)) { - /* PHY subnode name must be a 'link' */ - if (!ofnode_name_eq(child, "link")) + /* PHY subnode name must be a 'phy' */ + if (!ofnode_name_eq(child, "phy")) continue; cdns_phy->phys[node].lnk_rst = devm_reset_bulk_get_by_node(dev, child); diff --git a/drivers/phy/marvell/comphy_a3700.c b/drivers/phy/marvell/comphy_a3700.c index 047c8bb04528b35a40e556ef3d106e82bcace74b..41043535554748d347f26ef9b765f1f319f5ca9c 100644 --- a/drivers/phy/marvell/comphy_a3700.c +++ b/drivers/phy/marvell/comphy_a3700.c @@ -11,6 +11,7 @@ #include #include #include +#include #include "comphy_a3700.h" @@ -982,6 +983,138 @@ void comphy_dedicated_phys_init(void) debug_exit(); } +static int find_available_node_by_compatible(int offset, const char *compatible) +{ + do { + offset = fdt_node_offset_by_compatible(gd->fdt_blob, offset, + compatible); + } while (offset > 0 && !fdtdec_get_is_enabled(gd->fdt_blob, offset)); + + return offset; +} + +static bool comphy_a3700_find_lane(const int nodes[3], int node, + int port, int *lane, int *invert) +{ + int res, i, j; + + for (i = 0; ; i++) { + struct fdtdec_phandle_args args; + + res = fdtdec_parse_phandle_with_args(gd->fdt_blob, node, "phys", + "#phy-cells", 0, i, &args); + if (res) + return false; + + for (j = 0; j < 3; j++) { + if (nodes[j] >= 0 && args.node == nodes[j] && + (args.args_count >= 1 ? args.args[0] : 0) == port) { + *lane = j; + *invert = args.args_count >= 2 ? args.args[1] + : 0; + return true; + } + } + } + + return false; +} + +static void comphy_a3700_fill_cfg(struct chip_serdes_phy_config *cfg, + const int nodes[3], const char *compatible, + int type) +{ + int node, lane, port, speed, invert; + + port = (type == COMPHY_TYPE_SGMII1) ? 1 : 0; + + node = -1; + while (1) { + node = find_available_node_by_compatible(node, compatible); + if (node < 0) + return; + + if (comphy_a3700_find_lane(nodes, node, port, &lane, &invert)) + break; + } + + if (cfg->comphy_map_data[lane].type != COMPHY_TYPE_UNCONNECTED) { + printf("Error: More PHYs defined for lane %d, skipping\n", + lane); + return; + } + + if (type == COMPHY_TYPE_SGMII0 || type == COMPHY_TYPE_SGMII1) { + const char *phy_mode; + + phy_mode = fdt_getprop(gd->fdt_blob, node, "phy-mode", NULL); + if (phy_mode && + !strcmp(phy_mode, + phy_string_for_interface(PHY_INTERFACE_MODE_2500BASEX))) + speed = COMPHY_SPEED_3_125G; + else + speed = COMPHY_SPEED_1_25G; + } else if (type == COMPHY_TYPE_SATA0) { + speed = COMPHY_SPEED_6G; + } else { + speed = COMPHY_SPEED_5G; + } + + cfg->comphy_map_data[lane].type = type; + cfg->comphy_map_data[lane].speed = speed; + cfg->comphy_map_data[lane].invert = invert; +} + +static const fdt32_t comphy_a3700_mux_lane_order[3] = { + __constant_cpu_to_be32(1), + __constant_cpu_to_be32(0), + __constant_cpu_to_be32(2), +}; + +int comphy_a3700_init_serdes_map(int node, struct chip_serdes_phy_config *cfg) +{ + int comphy_nodes[3]; + int child, i; + + for (i = 0; i < ARRAY_SIZE(comphy_nodes); i++) + comphy_nodes[i] = -FDT_ERR_NOTFOUND; + + fdt_for_each_subnode(child, gd->fdt_blob, node) { + if (!fdtdec_get_is_enabled(gd->fdt_blob, child)) + continue; + + i = fdtdec_get_int(gd->fdt_blob, child, "reg", -1); + if (i < 0 || i >= ARRAY_SIZE(comphy_nodes)) + continue; + + comphy_nodes[i] = child; + } + + for (i = 0; i < ARRAY_SIZE(comphy_nodes); i++) { + cfg->comphy_map_data[i].type = COMPHY_TYPE_UNCONNECTED; + cfg->comphy_map_data[i].speed = COMPHY_SPEED_INVALID; + } + + comphy_a3700_fill_cfg(cfg, comphy_nodes, "marvell,armada3700-u3d", + COMPHY_TYPE_USB3_DEVICE); + comphy_a3700_fill_cfg(cfg, comphy_nodes, "marvell,armada3700-xhci", + COMPHY_TYPE_USB3_HOST0); + comphy_a3700_fill_cfg(cfg, comphy_nodes, "marvell,armada-3700-pcie", + COMPHY_TYPE_PEX0); + comphy_a3700_fill_cfg(cfg, comphy_nodes, "marvell,armada-3700-ahci", + COMPHY_TYPE_SATA0); + comphy_a3700_fill_cfg(cfg, comphy_nodes, "marvell,armada-3700-neta", + COMPHY_TYPE_SGMII0); + comphy_a3700_fill_cfg(cfg, comphy_nodes, "marvell,armada-3700-neta", + COMPHY_TYPE_SGMII1); + + cfg->comphy_lanes_count = 3; + cfg->comphy_mux_bitcount = 4; + cfg->comphy_mux_lane_order = comphy_a3700_mux_lane_order; + + return 0; +} + int comphy_a3700_init(struct chip_serdes_phy_config *chip_cfg, struct comphy_map *serdes_map) { diff --git a/drivers/phy/marvell/comphy_core.c b/drivers/phy/marvell/comphy_core.c index 2c9d7b2288d7eb1c61987276524c4ec42da0b1bf..233a973035b325013c279b61df95008bb25ddb04 100644 --- a/drivers/phy/marvell/comphy_core.c +++ b/drivers/phy/marvell/comphy_core.c @@ -86,11 +86,8 @@ __weak int comphy_update_map(struct comphy_map *serdes_map, int count) static int comphy_probe(struct udevice *dev) { - const void *blob = gd->fdt_blob; int node = dev_of_offset(dev); struct chip_serdes_phy_config *chip_cfg = dev_get_priv(dev); - int subnode; - int lane; int last_idx = 0; static int current_idx; int res; @@ -104,30 +101,14 @@ static int comphy_probe(struct udevice *dev) if (IS_ERR(chip_cfg->hpipe3_base_addr)) return PTR_ERR(chip_cfg->hpipe3_base_addr); - chip_cfg->comphy_lanes_count = fdtdec_get_int(blob, node, - "max-lanes", 0); - if (chip_cfg->comphy_lanes_count <= 0) { - dev_err(dev, "comphy max lanes is wrong\n"); - return -EINVAL; - } - - chip_cfg->comphy_mux_bitcount = fdtdec_get_int(blob, node, - "mux-bitcount", 0); - if (chip_cfg->comphy_mux_bitcount <= 0) { - dev_err(dev, "comphy mux bit count is wrong\n"); - return -EINVAL; - } - - chip_cfg->comphy_mux_lane_order = - fdtdec_locate_array(blob, node, "mux-lane-order", - chip_cfg->comphy_lanes_count); - if (device_is_compatible(dev, "marvell,comphy-armada-3700")) { + chip_cfg->comphy_init_map = comphy_a3700_init_serdes_map; chip_cfg->ptr_comphy_chip_init = comphy_a3700_init; chip_cfg->rx_training = NULL; } if (device_is_compatible(dev, "marvell,comphy-cp110")) { + chip_cfg->comphy_init_map = comphy_cp110_init_serdes_map; chip_cfg->ptr_comphy_chip_init = comphy_cp110_init; chip_cfg->rx_training = comphy_cp110_sfi_rx_training; } @@ -141,39 +122,9 @@ static int comphy_probe(struct udevice *dev) return -ENODEV; } - lane = 0; - fdt_for_each_subnode(subnode, blob, node) { - /* Skip disabled ports */ - if (!fdtdec_get_is_enabled(blob, subnode)) - continue; - - chip_cfg->comphy_map_data[lane].type = - fdtdec_get_int(blob, subnode, "phy-type", - COMPHY_TYPE_INVALID); - - if (chip_cfg->comphy_map_data[lane].type == - COMPHY_TYPE_INVALID) { - printf("no phy type for lane %d, setting lane as unconnected\n", - lane + 1); - continue; - } - - chip_cfg->comphy_map_data[lane].speed = - fdtdec_get_int(blob, subnode, "phy-speed", - COMPHY_SPEED_INVALID); - - chip_cfg->comphy_map_data[lane].invert = - fdtdec_get_int(blob, subnode, "phy-invert", - COMPHY_POLARITY_NO_INVERT); - - chip_cfg->comphy_map_data[lane].clk_src = - fdtdec_get_bool(blob, subnode, "clk-src"); - - chip_cfg->comphy_map_data[lane].end_point = - fdtdec_get_bool(blob, subnode, "end_point"); - - lane++; - } + res = chip_cfg->comphy_init_map(node, chip_cfg); + if (res < 0) + return res; res = comphy_update_map(chip_cfg->comphy_map_data, chip_cfg->comphy_lanes_count); if (res < 0) diff --git a/drivers/phy/marvell/comphy_core.h b/drivers/phy/marvell/comphy_core.h index 9bbd7f8f35dcc98c108882f69ec1ae529ac486f4..d573776c05ae2a3cf0e0716dba42ddce5a495d07 100644 --- a/drivers/phy/marvell/comphy_core.h +++ b/drivers/phy/marvell/comphy_core.h @@ -32,6 +32,7 @@ struct comphy_mux_data { struct chip_serdes_phy_config { struct comphy_mux_data *mux_data; + int (*comphy_init_map)(int, struct chip_serdes_phy_config *); int (*ptr_comphy_chip_init)(struct chip_serdes_phy_config *, struct comphy_map *); int (*rx_training)(struct chip_serdes_phy_config *, u32); @@ -85,9 +86,20 @@ static inline void reg_set16(void __iomem *addr, u16 data, u16 mask) /* SoC specific init functions */ #ifdef CONFIG_ARMADA_3700 +int comphy_a3700_init_serdes_map(int node, struct chip_serdes_phy_config *cfg); int comphy_a3700_init(struct chip_serdes_phy_config *ptr_chip_cfg, struct comphy_map *serdes_map); #else +static inline int +comphy_a3700_init_serdes_map(int node, struct chip_serdes_phy_config *cfg) +{ + /* + * This function should never be called in this configuration, so + * lets return an error here. + */ + return -1; +} + static inline int comphy_a3700_init(struct chip_serdes_phy_config *ptr_chip_cfg, struct comphy_map *serdes_map) { @@ -100,11 +112,22 @@ static inline int comphy_a3700_init(struct chip_serdes_phy_config *ptr_chip_cfg, #endif #ifdef CONFIG_ARMADA_8K +int comphy_cp110_init_serdes_map(int node, struct chip_serdes_phy_config *cfg); int comphy_cp110_init(struct chip_serdes_phy_config *ptr_chip_cfg, struct comphy_map *serdes_map); int comphy_cp110_sfi_rx_training(struct chip_serdes_phy_config *ptr_chip_cfg, u32 lane); #else +static inline int +comphy_cp110_init_serdes_map(int node, struct chip_serdes_phy_config *cfg) +{ + /* + * This function should never be called in this configuration, so + * lets return an error here. + */ + return -1; +} + static inline int comphy_cp110_init(struct chip_serdes_phy_config *ptr_chip_cfg, struct comphy_map *serdes_map) { diff --git a/drivers/phy/marvell/comphy_cp110.c b/drivers/phy/marvell/comphy_cp110.c index 4fe2dfcdd171116153f09ed8fae025684482b29a..e063b51c6dd9c296cb8b0a40bdcb1a45fad652ed 100644 --- a/drivers/phy/marvell/comphy_cp110.c +++ b/drivers/phy/marvell/comphy_cp110.c @@ -554,6 +554,64 @@ void comphy_dedicated_phys_init(void) debug_exit(); } +int comphy_cp110_init_serdes_map(int node, struct chip_serdes_phy_config *cfg) +{ + int lane, subnode; + + cfg->comphy_lanes_count = fdtdec_get_int(gd->fdt_blob, node, + "max-lanes", 0); + if (cfg->comphy_lanes_count <= 0) { + printf("comphy max lanes is wrong\n"); + return -EINVAL; + } + + cfg->comphy_mux_bitcount = fdtdec_get_int(gd->fdt_blob, node, + "mux-bitcount", 0); + if (cfg->comphy_mux_bitcount <= 0) { + printf("comphy mux bit count is wrong\n"); + return -EINVAL; + } + + cfg->comphy_mux_lane_order = fdtdec_locate_array(gd->fdt_blob, node, + "mux-lane-order", + cfg->comphy_lanes_count); + + lane = 0; + fdt_for_each_subnode(subnode, gd->fdt_blob, node) { + /* Skip disabled ports */ + if (!fdtdec_get_is_enabled(gd->fdt_blob, subnode)) + continue; + + cfg->comphy_map_data[lane].type = + fdtdec_get_int(gd->fdt_blob, subnode, "phy-type", + COMPHY_TYPE_INVALID); + + if (cfg->comphy_map_data[lane].type == COMPHY_TYPE_INVALID) { + printf("no phy type for lane %d, setting lane as unconnected\n", + lane + 1); + continue; + } + + cfg->comphy_map_data[lane].speed = + fdtdec_get_int(gd->fdt_blob, subnode, "phy-speed", + COMPHY_SPEED_INVALID); + + cfg->comphy_map_data[lane].invert = + fdtdec_get_int(gd->fdt_blob, subnode, "phy-invert", + COMPHY_POLARITY_NO_INVERT); + + cfg->comphy_map_data[lane].clk_src = + fdtdec_get_bool(gd->fdt_blob, subnode, "clk-src"); + + cfg->comphy_map_data[lane].end_point = + fdtdec_get_bool(gd->fdt_blob, subnode, "end_point"); + + lane++; + } + + return 0; +} + int comphy_cp110_init(struct chip_serdes_phy_config *ptr_chip_cfg, struct comphy_map *serdes_map) { diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 30eaa376c8e5fefb9db76c1e4240fbb8ebca68c7..03946245c7d5d6566a3ed54783fd3ba26202beb1 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -145,6 +145,17 @@ config SPL_PINCONF_RECURSIVE if PINCTRL || SPL_PINCTRL +config PINCTRL_APPLE + bool "Apple pinctrl driver" + depends on DM && PINCTRL_GENERIC && ARCH_APPLE + default y + help + Support pin multiplexing on Apple SoCs. + + The driver is controlled by a device tree node which contains + both the GPIO definitions and pin control functions for each + available multiplex function. + config PINCTRL_AR933X bool "QCA/Athores ar933x pin control driver" depends on DM && SOC_AR933X @@ -291,6 +302,15 @@ config ASPEED_AST2500_PINCTRL uses Generic Pinctrl framework and is compatible with the Linux driver, i.e. it uses the same device tree configuration. +config ASPEED_AST2600_PINCTRL + bool "Aspeed AST2600 pin control driver" + depends on DM && PINCTRL_GENERIC && ASPEED_AST2600 + default y + help + Support pin multiplexing control on Aspeed ast2600 SoC. The driver + uses Generic Pinctrl framework and is compatible with the Linux + driver, i.e. it uses the same device tree configuration. + config PINCTRL_K210 bool "Kendryte K210 Fully-Programmable Input/Output Array driver" depends on DM && PINCTRL_GENERIC diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile index 05b71f2f134c1e9110db208b9e387d0281844404..fd736a7f640a95b1c47a27dded6c95b24b17702c 100644 --- a/drivers/pinctrl/Makefile +++ b/drivers/pinctrl/Makefile @@ -3,6 +3,7 @@ obj-y += pinctrl-uclass.o obj-$(CONFIG_$(SPL_)PINCTRL_GENERIC) += pinctrl-generic.o +obj-$(CONFIG_PINCTRL_APPLE) += pinctrl-apple.o obj-$(CONFIG_PINCTRL_AT91) += pinctrl-at91.o obj-$(CONFIG_PINCTRL_AT91PIO4) += pinctrl-at91-pio4.o obj-y += nxp/ diff --git a/drivers/pinctrl/aspeed/Makefile b/drivers/pinctrl/aspeed/Makefile index 2e6ed604c8f6323b8c6580af42403cbf00b6e0d4..a3e01ed1ca903914d7071113172bf3f00a4f4e98 100644 --- a/drivers/pinctrl/aspeed/Makefile +++ b/drivers/pinctrl/aspeed/Makefile @@ -1 +1,2 @@ obj-$(CONFIG_ASPEED_AST2500_PINCTRL) += pinctrl_ast2500.o +obj-$(CONFIG_ASPEED_AST2600_PINCTRL) += pinctrl_ast2600.o diff --git a/drivers/pinctrl/aspeed/pinctrl_ast2600.c b/drivers/pinctrl/aspeed/pinctrl_ast2600.c new file mode 100644 index 0000000000000000000000000000000000000000..12cba83f6c01b6176ba42d1221a3ae312141e4f0 --- /dev/null +++ b/drivers/pinctrl/aspeed/pinctrl_ast2600.c @@ -0,0 +1,459 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) ASPEED Technology Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * This driver works with very simple configuration that has the same name + * for group and function. This way it is compatible with the Linux Kernel + * driver. + */ +struct aspeed_sig_desc { + u32 offset; + u32 reg_set; + int clr; +}; + +struct aspeed_group_config { + char *group_name; + int ndescs; + struct aspeed_sig_desc *descs; +}; + +struct ast2600_pinctrl_priv { + struct ast2600_scu *scu; +}; + +static int ast2600_pinctrl_probe(struct udevice *dev) +{ + struct ast2600_pinctrl_priv *priv = dev_get_priv(dev); + struct udevice *clk_dev; + int ret = 0; + + /* find SCU base address from clock device */ + uclass_get_device_by_driver(UCLASS_CLK, DM_DRIVER_GET(aspeed_ast2600_scu), &clk_dev); + + if (ret) + return ret; + + priv->scu = dev_read_addr_ptr(clk_dev); + if (IS_ERR(priv->scu)) + return PTR_ERR(priv->scu); + + return 0; +} + +static struct aspeed_sig_desc i2c1_link[] = { + { 0x418, GENMASK(9, 8), 1 }, + { 0x4B8, GENMASK(9, 8), 0 }, +}; + +static struct aspeed_sig_desc i2c2_link[] = { + { 0x418, GENMASK(11, 10), 1 }, + { 0x4B8, GENMASK(11, 10), 0 }, +}; + +static struct aspeed_sig_desc i2c3_link[] = { + { 0x418, GENMASK(13, 12), 1 }, + { 0x4B8, GENMASK(13, 12), 0 }, +}; + +static struct aspeed_sig_desc i2c4_link[] = { + { 0x418, GENMASK(15, 14), 1 }, + { 0x4B8, GENMASK(15, 14), 0 }, +}; + +static struct aspeed_sig_desc i2c5_link[] = { + { 0x418, GENMASK(17, 16), 0 }, +}; + +static struct aspeed_sig_desc i2c6_link[] = { + { 0x418, GENMASK(19, 18), 0 }, +}; + +static struct aspeed_sig_desc i2c7_link[] = { + { 0x418, GENMASK(21, 20), 0 }, +}; + +static struct aspeed_sig_desc i2c8_link[] = { + { 0x418, GENMASK(23, 22), 0 }, +}; + +static struct aspeed_sig_desc i2c9_link[] = { + { 0x418, GENMASK(25, 24), 0 }, +}; + +static struct aspeed_sig_desc i2c10_link[] = { + { 0x418, GENMASK(27, 26), 0 }, +}; + +static struct aspeed_sig_desc i2c11_link[] = { + { 0x410, GENMASK(1, 0), 1 }, + { 0x4B0, GENMASK(1, 0), 0 }, +}; + +static struct aspeed_sig_desc i2c12_link[] = { + { 0x410, GENMASK(3, 2), 1 }, + { 0x4B0, GENMASK(3, 2), 0 }, +}; + +static struct aspeed_sig_desc i2c13_link[] = { + { 0x410, GENMASK(5, 4), 1 }, + { 0x4B0, GENMASK(5, 4), 0 }, +}; + +static struct aspeed_sig_desc i2c14_link[] = { + { 0x410, GENMASK(7, 6), 1 }, + { 0x4B0, GENMASK(7, 6), 0 }, +}; + +static struct aspeed_sig_desc i2c15_link[] = { + { 0x414, GENMASK(29, 28), 1 }, + { 0x4B4, GENMASK(29, 28), 0 }, +}; + +static struct aspeed_sig_desc i2c16_link[] = { + { 0x414, GENMASK(31, 30), 1 }, + { 0x4B4, GENMASK(31, 30), 0 }, +}; + +static struct aspeed_sig_desc mac1_link[] = { + { 0x410, BIT(4), 0 }, + { 0x470, BIT(4), 1 }, +}; + +static struct aspeed_sig_desc mac2_link[] = { + { 0x410, BIT(5), 0 }, + { 0x470, BIT(5), 1 }, +}; + +static struct aspeed_sig_desc mac3_link[] = { + { 0x410, BIT(6), 0 }, + { 0x470, BIT(6), 1 }, +}; + +static struct aspeed_sig_desc mac4_link[] = { + { 0x410, BIT(7), 0 }, + { 0x470, BIT(7), 1 }, +}; + +static struct aspeed_sig_desc rgmii1[] = { + { 0x500, BIT(6), 0 }, + { 0x400, GENMASK(11, 0), 0 }, +}; + +static struct aspeed_sig_desc rgmii2[] = { + { 0x500, BIT(7), 0 }, + { 0x400, GENMASK(23, 12), 0 }, +}; + +static struct aspeed_sig_desc rgmii3[] = { + { 0x510, BIT(0), 0 }, + { 0x410, GENMASK(27, 16), 0 }, +}; + +static struct aspeed_sig_desc rgmii4[] = { + { 0x510, BIT(1), 0 }, + { 0x410, GENMASK(31, 28), 1 }, + { 0x4b0, GENMASK(31, 28), 0 }, + { 0x474, GENMASK(7, 0), 1 }, + { 0x414, GENMASK(7, 0), 1 }, + { 0x4b4, GENMASK(7, 0), 0 }, +}; + +static struct aspeed_sig_desc rmii1[] = { + { 0x504, BIT(6), 0 }, + { 0x400, GENMASK(3, 0), 0 }, + { 0x400, GENMASK(11, 6), 0 }, +}; + +static struct aspeed_sig_desc rmii2[] = { + { 0x504, BIT(7), 0 }, + { 0x400, GENMASK(15, 12), 0 }, + { 0x400, GENMASK(23, 18), 0 }, +}; + +static struct aspeed_sig_desc rmii3[] = { + { 0x514, BIT(0), 0 }, + { 0x410, GENMASK(27, 22), 0 }, + { 0x410, GENMASK(19, 16), 0 }, +}; + +static struct aspeed_sig_desc rmii4[] = { + { 0x514, BIT(1), 0 }, + { 0x410, GENMASK(7, 2), 1 }, + { 0x410, GENMASK(31, 28), 1 }, + { 0x414, GENMASK(7, 2), 1 }, + { 0x4B0, GENMASK(31, 28), 0 }, + { 0x4B4, GENMASK(7, 2), 0 }, +}; + +static struct aspeed_sig_desc rmii1_rclk_oe[] = { + { 0x340, BIT(29), 0 }, +}; + +static struct aspeed_sig_desc rmii2_rclk_oe[] = { + { 0x340, BIT(30), 0 }, +}; + +static struct aspeed_sig_desc rmii3_rclk_oe[] = { + { 0x350, BIT(29), 0 }, +}; + +static struct aspeed_sig_desc rmii4_rclk_oe[] = { + { 0x350, BIT(30), 0 }, +}; + +static struct aspeed_sig_desc mdio1_link[] = { + { 0x430, BIT(17) | BIT(16), 0 }, +}; + +static struct aspeed_sig_desc mdio2_link[] = { + { 0x470, BIT(13) | BIT(12), 1 }, + { 0x410, BIT(13) | BIT(12), 0 }, +}; + +static struct aspeed_sig_desc mdio3_link[] = { + { 0x470, BIT(1) | BIT(0), 1 }, + { 0x410, BIT(1) | BIT(0), 0 }, +}; + +static struct aspeed_sig_desc mdio4_link[] = { + { 0x470, BIT(3) | BIT(2), 1 }, + { 0x410, BIT(3) | BIT(2), 0 }, +}; + +static struct aspeed_sig_desc sdio2_link[] = { + { 0x414, GENMASK(23, 16), 1 }, + { 0x4B4, GENMASK(23, 16), 0 }, + { 0x450, BIT(1), 0 }, +}; + +static struct aspeed_sig_desc sdio1_link[] = { + { 0x414, GENMASK(15, 8), 0 }, +}; + +/* when sdio1 8bits, sdio2 can't use */ +static struct aspeed_sig_desc sdio1_8bit_link[] = { + { 0x414, GENMASK(15, 8), 0 }, + { 0x4b4, GENMASK(21, 18), 0 }, + { 0x450, BIT(3), 0 }, + { 0x450, BIT(1), 1 }, +}; + +static struct aspeed_sig_desc emmc_link[] = { + { 0x400, GENMASK(31, 24), 0 }, +}; + +static struct aspeed_sig_desc emmcg8_link[] = { + { 0x400, GENMASK(31, 24), 0 }, + { 0x404, GENMASK(3, 0), 0 }, +/* set SCU504 to clear the strap bits in SCU500 */ + { 0x504, BIT(3), 0 }, + { 0x504, BIT(5), 0 }, +}; + +static struct aspeed_sig_desc fmcquad_link[] = { + { 0x438, GENMASK(5, 4), 0 }, +}; + +static struct aspeed_sig_desc spi1_link[] = { + { 0x438, GENMASK(13, 11), 0 }, +}; + +static struct aspeed_sig_desc spi1abr_link[] = { + { 0x438, BIT(9), 0 }, +}; + +static struct aspeed_sig_desc spi1cs1_link[] = { + { 0x438, BIT(8), 0 }, +}; + +static struct aspeed_sig_desc spi1wp_link[] = { + { 0x438, BIT(10), 0 }, +}; + +static struct aspeed_sig_desc spi1quad_link[] = { + { 0x438, GENMASK(15, 14), 0 }, +}; + +static struct aspeed_sig_desc spi2_link[] = { + { 0x434, GENMASK(29, 27) | BIT(24), 0 }, +}; + +static struct aspeed_sig_desc spi2cs1_link[] = { + { 0x434, BIT(25), 0 }, +}; + +static struct aspeed_sig_desc spi2cs2_link[] = { + { 0x434, BIT(26), 0 }, +}; + +static struct aspeed_sig_desc spi2quad_link[] = { + { 0x434, GENMASK(31, 30), 0 }, +}; + +static struct aspeed_sig_desc fsi1[] = { + { 0xd48, GENMASK(21, 20), 0 }, +}; + +static struct aspeed_sig_desc fsi2[] = { + { 0xd48, GENMASK(23, 22), 0 }, +}; + +static struct aspeed_sig_desc usb2ad_link[] = { + { 0x440, BIT(24), 0 }, + { 0x440, BIT(25), 1 }, +}; + +static struct aspeed_sig_desc usb2ah_link[] = { + { 0x440, BIT(24), 1 }, + { 0x440, BIT(25), 0 }, +}; + +static struct aspeed_sig_desc usb2bh_link[] = { + { 0x440, BIT(28), 1 }, + { 0x440, BIT(29), 0 }, +}; + +static struct aspeed_sig_desc pcie0rc_link[] = { + { 0x40, BIT(21), 0 }, +}; + +static struct aspeed_sig_desc pcie1rc_link[] = { + { 0x40, BIT(19), 0 }, /* SSPRST# output enable */ + { 0x500, BIT(24), 0 }, /* dedicate rc reset */ +}; + +static const struct aspeed_group_config ast2600_groups[] = { + { "MAC1LINK", ARRAY_SIZE(mac1_link), mac1_link }, + { "MAC2LINK", ARRAY_SIZE(mac2_link), mac2_link }, + { "MAC3LINK", ARRAY_SIZE(mac3_link), mac3_link }, + { "MAC4LINK", ARRAY_SIZE(mac4_link), mac4_link }, + { "RGMII1", ARRAY_SIZE(rgmii1), rgmii1 }, + { "RGMII2", ARRAY_SIZE(rgmii2), rgmii2 }, + { "RGMII3", ARRAY_SIZE(rgmii3), rgmii3 }, + { "RGMII4", ARRAY_SIZE(rgmii4), rgmii4 }, + { "RMII1", ARRAY_SIZE(rmii1), rmii1 }, + { "RMII2", ARRAY_SIZE(rmii2), rmii2 }, + { "RMII3", ARRAY_SIZE(rmii3), rmii3 }, + { "RMII4", ARRAY_SIZE(rmii4), rmii4 }, + { "RMII1RCLK", ARRAY_SIZE(rmii1_rclk_oe), rmii1_rclk_oe }, + { "RMII2RCLK", ARRAY_SIZE(rmii2_rclk_oe), rmii2_rclk_oe }, + { "RMII3RCLK", ARRAY_SIZE(rmii3_rclk_oe), rmii3_rclk_oe }, + { "RMII4RCLK", ARRAY_SIZE(rmii4_rclk_oe), rmii4_rclk_oe }, + { "MDIO1", ARRAY_SIZE(mdio1_link), mdio1_link }, + { "MDIO2", ARRAY_SIZE(mdio2_link), mdio2_link }, + { "MDIO3", ARRAY_SIZE(mdio3_link), mdio3_link }, + { "MDIO4", ARRAY_SIZE(mdio4_link), mdio4_link }, + { "SD1", ARRAY_SIZE(sdio1_link), sdio1_link }, + { "SD1_8bits", ARRAY_SIZE(sdio1_8bit_link), sdio1_8bit_link }, + { "SD2", ARRAY_SIZE(sdio2_link), sdio2_link }, + { "EMMC", ARRAY_SIZE(emmc_link), emmc_link }, + { "EMMCG8", ARRAY_SIZE(emmcg8_link), emmcg8_link }, + { "FMCQUAD", ARRAY_SIZE(fmcquad_link), fmcquad_link }, + { "SPI1", ARRAY_SIZE(spi1_link), spi1_link }, + { "SPI1ABR", ARRAY_SIZE(spi1abr_link), spi1abr_link }, + { "SPI1CS1", ARRAY_SIZE(spi1cs1_link), spi1cs1_link }, + { "SPI1WP", ARRAY_SIZE(spi1wp_link), spi1wp_link }, + { "SPI1QUAD", ARRAY_SIZE(spi1quad_link), spi1quad_link }, + { "SPI2", ARRAY_SIZE(spi2_link), spi2_link }, + { "SPI2CS1", ARRAY_SIZE(spi2cs1_link), spi2cs1_link }, + { "SPI2CS2", ARRAY_SIZE(spi2cs2_link), spi2cs2_link }, + { "SPI2QUAD", ARRAY_SIZE(spi2quad_link), spi2quad_link }, + { "I2C1", ARRAY_SIZE(i2c1_link), i2c1_link }, + { "I2C2", ARRAY_SIZE(i2c2_link), i2c2_link }, + { "I2C3", ARRAY_SIZE(i2c3_link), i2c3_link }, + { "I2C4", ARRAY_SIZE(i2c4_link), i2c4_link }, + { "I2C5", ARRAY_SIZE(i2c5_link), i2c5_link }, + { "I2C6", ARRAY_SIZE(i2c6_link), i2c6_link }, + { "I2C7", ARRAY_SIZE(i2c7_link), i2c7_link }, + { "I2C8", ARRAY_SIZE(i2c8_link), i2c8_link }, + { "I2C9", ARRAY_SIZE(i2c9_link), i2c9_link }, + { "I2C10", ARRAY_SIZE(i2c10_link), i2c10_link }, + { "I2C11", ARRAY_SIZE(i2c11_link), i2c11_link }, + { "I2C12", ARRAY_SIZE(i2c12_link), i2c12_link }, + { "I2C13", ARRAY_SIZE(i2c13_link), i2c13_link }, + { "I2C14", ARRAY_SIZE(i2c14_link), i2c14_link }, + { "I2C15", ARRAY_SIZE(i2c15_link), i2c15_link }, + { "I2C16", ARRAY_SIZE(i2c16_link), i2c16_link }, + { "FSI1", ARRAY_SIZE(fsi1), fsi1 }, + { "FSI2", ARRAY_SIZE(fsi2), fsi2 }, + { "USB2AD", ARRAY_SIZE(usb2ad_link), usb2ad_link }, + { "USB2AH", ARRAY_SIZE(usb2ah_link), usb2ah_link }, + { "USB2BH", ARRAY_SIZE(usb2bh_link), usb2bh_link }, + { "PCIE0RC", ARRAY_SIZE(pcie0rc_link), pcie0rc_link }, + { "PCIE1RC", ARRAY_SIZE(pcie1rc_link), pcie1rc_link }, +}; + +static int ast2600_pinctrl_get_groups_count(struct udevice *dev) +{ + debug("PINCTRL: get_(functions/groups)_count\n"); + + return ARRAY_SIZE(ast2600_groups); +} + +static const char *ast2600_pinctrl_get_group_name(struct udevice *dev, + unsigned selector) +{ + debug("PINCTRL: get_(function/group)_name %u\n", selector); + + return ast2600_groups[selector].group_name; +} + +static int ast2600_pinctrl_group_set(struct udevice *dev, unsigned selector, unsigned func_selector) +{ + struct ast2600_pinctrl_priv *priv = dev_get_priv(dev); + const struct aspeed_group_config *config; + const struct aspeed_sig_desc *descs; + u32 ctrl_reg = (u32)priv->scu; + u32 i; + + debug("PINCTRL: group_set <%u, %u>\n", selector, func_selector); + if (selector >= ARRAY_SIZE(ast2600_groups)) + return -EINVAL; + + config = &ast2600_groups[selector]; + for (i = 0; i < config->ndescs; i++) { + descs = &config->descs[i]; + if (descs->clr) + clrbits_le32((u32)ctrl_reg + descs->offset, descs->reg_set); + else + setbits_le32((u32)ctrl_reg + descs->offset, descs->reg_set); + } + + return 0; +} + +static struct pinctrl_ops ast2600_pinctrl_ops = { + .set_state = pinctrl_generic_set_state, + .get_groups_count = ast2600_pinctrl_get_groups_count, + .get_group_name = ast2600_pinctrl_get_group_name, + .get_functions_count = ast2600_pinctrl_get_groups_count, + .get_function_name = ast2600_pinctrl_get_group_name, + .pinmux_group_set = ast2600_pinctrl_group_set, +}; + +static const struct udevice_id ast2600_pinctrl_ids[] = { + { .compatible = "aspeed,g6-pinctrl" }, + { } +}; + +U_BOOT_DRIVER(pinctrl_aspeed) = { + .name = "aspeed_ast2600_pinctrl", + .id = UCLASS_PINCTRL, + .of_match = ast2600_pinctrl_ids, + .priv_auto = sizeof(struct ast2600_pinctrl_priv), + .ops = &ast2600_pinctrl_ops, + .probe = ast2600_pinctrl_probe, +}; diff --git a/drivers/pinctrl/pinctrl-apple.c b/drivers/pinctrl/pinctrl-apple.c new file mode 100644 index 0000000000000000000000000000000000000000..62476358c349d5ce894f4ce240b9a4852bc19d41 --- /dev/null +++ b/drivers/pinctrl/pinctrl-apple.c @@ -0,0 +1,207 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2021 Mark Kettenis + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +struct apple_pinctrl_priv { + void *base; + int pin_count; +}; + +#define REG_GPIO(x) (4 * (x)) +#define REG_GPIO_DATA BIT(0) +#define REG_GPIO_MODE GENMASK(3, 1) +#define REG_GPIO_OUT 1 +#define REG_GPIO_PERIPH GENMASK(6, 5) +#define REG_GPIO_INPUT_ENABLE BIT(9) + +static void apple_pinctrl_config_pin(struct apple_pinctrl_priv *priv, + unsigned pin, u32 clr, u32 set) +{ + unsigned reg = REG_GPIO(pin); + u32 old, new; + + old = readl(priv->base + REG_GPIO(pin)); + new = (old & ~clr) | set; + writel(new, priv->base + reg); +} + +static int apple_gpio_get_value(struct udevice *dev, unsigned offset) +{ + struct apple_pinctrl_priv *priv = dev_get_priv(dev->parent); + + return !!(readl(priv->base + REG_GPIO(offset)) & REG_GPIO_DATA); +} + +static int apple_gpio_set_value(struct udevice *dev, unsigned offset, + int value) +{ + struct apple_pinctrl_priv *priv = dev_get_priv(dev->parent); + + apple_pinctrl_config_pin(priv, offset, REG_GPIO_DATA, + value ? REG_GPIO_DATA : 0); + return 0; +} + +static int apple_gpio_get_direction(struct udevice *dev, unsigned offset) +{ + struct apple_pinctrl_priv *priv = dev_get_priv(dev->parent); + u32 reg = readl(priv->base + REG_GPIO(offset)); + + if (FIELD_GET(REG_GPIO_MODE, reg) == REG_GPIO_OUT) + return GPIOF_OUTPUT; + else + return GPIOF_INPUT; +} + +static int apple_gpio_direction_input(struct udevice *dev, unsigned offset) +{ + struct apple_pinctrl_priv *priv = dev_get_priv(dev->parent); + + apple_pinctrl_config_pin(priv, offset, + REG_GPIO_PERIPH | REG_GPIO_MODE, + REG_GPIO_INPUT_ENABLE); + return 0; +} + +static int apple_gpio_direction_output(struct udevice *dev, unsigned offset, + int value) +{ + struct apple_pinctrl_priv *priv = dev_get_priv(dev->parent); + u32 set = (value ? REG_GPIO_DATA : 0); + + apple_pinctrl_config_pin(priv, offset, REG_GPIO_DATA | + REG_GPIO_PERIPH | REG_GPIO_MODE, + set | FIELD_PREP(REG_GPIO_MODE, REG_GPIO_OUT)); + return 0; +} + +static int apple_gpio_probe(struct udevice *dev) +{ + struct apple_pinctrl_priv *priv = dev_get_priv(dev->parent); + struct gpio_dev_priv *uc_priv; + + uc_priv = dev_get_uclass_priv(dev); + uc_priv->bank_name = "gpio"; + uc_priv->gpio_count = priv->pin_count; + + return 0; +} + +static struct dm_gpio_ops apple_gpio_ops = { + .get_value = apple_gpio_get_value, + .set_value = apple_gpio_set_value, + .get_function = apple_gpio_get_direction, + .direction_input = apple_gpio_direction_input, + .direction_output = apple_gpio_direction_output, +}; + +static struct driver apple_gpio_driver = { + .name = "apple_gpio", + .id = UCLASS_GPIO, + .probe = apple_gpio_probe, + .ops = &apple_gpio_ops, +}; + +static int apple_pinctrl_get_pins_count(struct udevice *dev) +{ + struct apple_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->pin_count; +} + +static const char *apple_pinctrl_get_pin_name(struct udevice *dev, + unsigned selector) +{ + static char pin_name[PINNAME_SIZE]; + + snprintf(pin_name, PINNAME_SIZE, "pin%d", selector); + return pin_name; +} + +static int apple_pinctrl_get_pin_muxing(struct udevice *dev, unsigned selector, + char *buf, int size) +{ + struct apple_pinctrl_priv *priv = dev_get_priv(dev); + + if (readl(priv->base + REG_GPIO(selector)) & REG_GPIO_PERIPH) + strncpy(buf, "periph", size); + else + strncpy(buf, "gpio", size); + return 0; +} + +static int apple_pinctrl_pinmux_set(struct udevice *dev, unsigned pin_selector, + unsigned func_selector) +{ + struct apple_pinctrl_priv *priv = dev_get_priv(dev); + + apple_pinctrl_config_pin(priv, pin_selector, + REG_GPIO_DATA | REG_GPIO_MODE, + FIELD_PREP(REG_GPIO_PERIPH, func_selector) | + REG_GPIO_INPUT_ENABLE); + return 0; +} + +static int apple_pinctrl_pinmux_property_set(struct udevice *dev, + u32 pinmux_group) +{ + unsigned pin_selector = APPLE_PIN(pinmux_group); + unsigned func_selector = APPLE_FUNC(pinmux_group); + int ret; + + ret = apple_pinctrl_pinmux_set(dev, pin_selector, func_selector); + return ret ? ret : pin_selector; +} + +static int apple_pinctrl_probe(struct udevice *dev) +{ + struct apple_pinctrl_priv *priv = dev_get_priv(dev); + struct ofnode_phandle_args args; + struct udevice *child; + + priv->base = dev_read_addr_ptr(dev); + if (!priv->base) + return -EINVAL; + + if (!dev_read_phandle_with_args(dev, "gpio-ranges", + NULL, 3, 0, &args)) + priv->pin_count = args.args[2]; + + device_bind(dev, &apple_gpio_driver, "apple_gpio", NULL, + dev_ofnode(dev), &child); + + return 0; +} + +static struct pinctrl_ops apple_pinctrl_ops = { + .set_state = pinctrl_generic_set_state, + .get_pins_count = apple_pinctrl_get_pins_count, + .get_pin_name = apple_pinctrl_get_pin_name, + .pinmux_set = apple_pinctrl_pinmux_set, + .pinmux_property_set = apple_pinctrl_pinmux_property_set, + .get_pin_muxing = apple_pinctrl_get_pin_muxing, +}; + +static const struct udevice_id apple_pinctrl_ids[] = { + { .compatible = "apple,pinctrl" }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(pinctrl_apple) = { + .name = "apple_pinctrl", + .id = UCLASS_PINCTRL, + .of_match = apple_pinctrl_ids, + .priv_auto = sizeof(struct apple_pinctrl_priv), + .ops = &apple_pinctrl_ops, + .probe = apple_pinctrl_probe, +}; diff --git a/drivers/pinctrl/pinctrl-stmfx.c b/drivers/pinctrl/pinctrl-stmfx.c index fe7a59d43137709cc8c7b3832bb53fed70cb3969..509e2a80e9a590c64ae807beb1c1b15d1860b63c 100644 --- a/drivers/pinctrl/pinctrl-stmfx.c +++ b/drivers/pinctrl/pinctrl-stmfx.c @@ -5,8 +5,12 @@ * Driver for STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander * based on Linux driver : pinctrl/pinctrl-stmfx.c */ + +#define LOG_CATEGORY UCLASS_PINCTRL + #include #include +#include #include #include #include diff --git a/drivers/power/regulator/scmi_regulator.c b/drivers/power/regulator/scmi_regulator.c index b3142bf4e1fd7c1822e35e026e14d6f573f2fadb..3ddeaf4adcb1a65c8a4c62aa86b0b902a9389201 100644 --- a/drivers/power/regulator/scmi_regulator.c +++ b/drivers/power/regulator/scmi_regulator.c @@ -2,6 +2,9 @@ /* * Copyright (C) 2020-2021 Linaro Limited */ + +#define LOG_CATEGORY UCLASS_REGULATOR + #include #include #include diff --git a/drivers/ram/stm32mp1/Makefile b/drivers/ram/stm32mp1/Makefile index e1e9135603a06495601b296ab5c1368954627bc6..71ded6bed40f51ef1aa43adcde7ce2aa67e48175 100644 --- a/drivers/ram/stm32mp1/Makefile +++ b/drivers/ram/stm32mp1/Makefile @@ -8,7 +8,6 @@ obj-y += stm32mp1_ddr.o obj-$(CONFIG_STM32MP1_DDR_INTERACTIVE) += stm32mp1_interactive.o obj-$(CONFIG_STM32MP1_DDR_TESTS) += stm32mp1_tests.o -obj-$(CONFIG_STM32MP1_DDR_TUNING) += stm32mp1_tuning.o ifneq ($(DDR_INTERACTIVE),) CFLAGS_stm32mp1_interactive.o += -DCONFIG_STM32MP1_DDR_INTERACTIVE_FORCE=y diff --git a/drivers/ram/stm32mp1/stm32mp1_ddr.c b/drivers/ram/stm32mp1/stm32mp1_ddr.c index 0457166b12714f4a378b1a9b56720d46244ef136..4d78aa5cb138df0a6ba504ca1496b50924a4c10e 100644 --- a/drivers/ram/stm32mp1/stm32mp1_ddr.c +++ b/drivers/ram/stm32mp1/stm32mp1_ddr.c @@ -68,7 +68,6 @@ struct reg_desc { #define DDRPHY_REG_REG_SIZE 11 /* st,phy-reg */ #define DDRPHY_REG_TIMING_SIZE 10 /* st,phy-timing */ -#define DDRPHY_REG_CAL_SIZE 12 /* st,phy-cal */ #define DDRCTL_REG_REG(x) DDRCTL_REG(x, stm32mp1_ddrctrl_reg) static const struct reg_desc ddr_reg[DDRCTL_REG_REG_SIZE] = { @@ -178,22 +177,6 @@ static const struct reg_desc ddrphy_timing[DDRPHY_REG_TIMING_SIZE] = { DDRPHY_REG_TIMING(mr3), }; -#define DDRPHY_REG_CAL(x) DDRPHY_REG(x, stm32mp1_ddrphy_cal) -static const struct reg_desc ddrphy_cal[DDRPHY_REG_CAL_SIZE] = { - DDRPHY_REG_CAL(dx0dllcr), - DDRPHY_REG_CAL(dx0dqtr), - DDRPHY_REG_CAL(dx0dqstr), - DDRPHY_REG_CAL(dx1dllcr), - DDRPHY_REG_CAL(dx1dqtr), - DDRPHY_REG_CAL(dx1dqstr), - DDRPHY_REG_CAL(dx2dllcr), - DDRPHY_REG_CAL(dx2dqtr), - DDRPHY_REG_CAL(dx2dqstr), - DDRPHY_REG_CAL(dx3dllcr), - DDRPHY_REG_CAL(dx3dqtr), - DDRPHY_REG_CAL(dx3dqstr), -}; - /************************************************************** * DYNAMIC REGISTERS: only used for debug purpose (read/modify) **************************************************************/ @@ -218,12 +201,24 @@ static const struct reg_desc ddrphy_dyn[] = { DDRPHY_REG_DYN(zq0sr1), DDRPHY_REG_DYN(dx0gsr0), DDRPHY_REG_DYN(dx0gsr1), + DDRPHY_REG_DYN(dx0dllcr), + DDRPHY_REG_DYN(dx0dqtr), + DDRPHY_REG_DYN(dx0dqstr), DDRPHY_REG_DYN(dx1gsr0), DDRPHY_REG_DYN(dx1gsr1), + DDRPHY_REG_DYN(dx1dllcr), + DDRPHY_REG_DYN(dx1dqtr), + DDRPHY_REG_DYN(dx1dqstr), DDRPHY_REG_DYN(dx2gsr0), DDRPHY_REG_DYN(dx2gsr1), + DDRPHY_REG_DYN(dx2dllcr), + DDRPHY_REG_DYN(dx2dqtr), + DDRPHY_REG_DYN(dx2dqstr), DDRPHY_REG_DYN(dx3gsr0), DDRPHY_REG_DYN(dx3gsr1), + DDRPHY_REG_DYN(dx3dllcr), + DDRPHY_REG_DYN(dx3dqtr), + DDRPHY_REG_DYN(dx3dqstr), }; #define DDRPHY_REG_DYN_SIZE ARRAY_SIZE(ddrphy_dyn) @@ -240,7 +235,6 @@ enum reg_type { REG_MAP, REGPHY_REG, REGPHY_TIMING, - REGPHY_CAL, #ifdef CONFIG_STM32MP1_DDR_INTERACTIVE /* dynamic registers => managed in driver or not changed, * can be dumped in interactive mode @@ -264,8 +258,6 @@ struct ddr_reg_info { enum base_type base; }; -#define DDRPHY_REG_CAL(x) DDRPHY_REG(x, stm32mp1_ddrphy_cal) - const struct ddr_reg_info ddr_registers[REG_TYPE_NB] = { [REG_REG] = { "static", ddr_reg, DDRCTL_REG_REG_SIZE, DDR_BASE}, @@ -279,8 +271,6 @@ const struct ddr_reg_info ddr_registers[REG_TYPE_NB] = { "static", ddrphy_reg, DDRPHY_REG_REG_SIZE, DDRPHY_BASE}, [REGPHY_TIMING] = { "timing", ddrphy_timing, DDRPHY_REG_TIMING_SIZE, DDRPHY_BASE}, -[REGPHY_CAL] = { - "cal", ddrphy_cal, DDRPHY_REG_CAL_SIZE, DDRPHY_BASE}, #ifdef CONFIG_STM32MP1_DDR_INTERACTIVE [REG_DYN] = { "dyn", ddr_dyn, DDR_REG_DYN_SIZE, DDR_BASE}, @@ -456,9 +446,6 @@ static u32 get_par_addr(const struct stm32mp1_ddr_config *config, case REGPHY_TIMING: par_addr = (u32)&config->p_timing; break; - case REGPHY_CAL: - par_addr = (u32)&config->p_cal; - break; case REG_DYN: case REGPHY_DYN: case REG_TYPE_NB: @@ -570,7 +557,7 @@ static void ddrphy_idone_wait(struct stm32mp1_ddrphy *phy) (u32)&phy->pgsr, pgsr, ret); } -void stm32mp1_ddrphy_init(struct stm32mp1_ddrphy *phy, u32 pir) +static void stm32mp1_ddrphy_init(struct stm32mp1_ddrphy *phy, u32 pir) { pir |= DDRPHYC_PIR_INIT; writel(pir, &phy->pir); @@ -639,7 +626,7 @@ static void wait_operating_mode(struct ddr_info *priv, int mode) log_debug("[0x%08x] stat = 0x%08x\n", (u32)&priv->ctl->stat, stat); } -void stm32mp1_refresh_disable(struct stm32mp1_ddrctl *ctl) +static void stm32mp1_refresh_disable(struct stm32mp1_ddrctl *ctl) { start_sw_done(ctl); /* quasi-dynamic register update*/ @@ -650,8 +637,8 @@ void stm32mp1_refresh_disable(struct stm32mp1_ddrctl *ctl) wait_sw_done_ack(ctl); } -void stm32mp1_refresh_restore(struct stm32mp1_ddrctl *ctl, - u32 rfshctl3, u32 pwrctl) +static void stm32mp1_refresh_restore(struct stm32mp1_ddrctl *ctl, + u32 rfshctl3, u32 pwrctl) { start_sw_done(ctl); if (!(rfshctl3 & DDRCTRL_RFSHCTL3_DIS_AUTO_REFRESH)) @@ -774,8 +761,6 @@ start: */ set_reg(priv, REGPHY_REG, &config->p_reg); set_reg(priv, REGPHY_TIMING, &config->p_timing); - if (config->p_cal_present) - set_reg(priv, REGPHY_CAL, &config->p_cal); if (INTERACTIVE(STEP_PHY_INIT)) goto start; @@ -810,32 +795,32 @@ start: wait_operating_mode(priv, DDRCTRL_STAT_OPERATING_MODE_NORMAL); - if (config->p_cal_present) { - log_debug("DDR DQS training skipped.\n"); - } else { - log_debug("DDR DQS training : "); + log_debug("DDR DQS training : "); /* 8. Disable Auto refresh and power down by setting * - RFSHCTL3.dis_au_refresh = 1 * - PWRCTL.powerdown_en = 0 * - DFIMISC.dfiinit_complete_en = 0 */ - stm32mp1_refresh_disable(priv->ctl); + stm32mp1_refresh_disable(priv->ctl); /* 9. Program PUBL PGCR to enable refresh during training and rank to train * not done => keep the programed value in PGCR */ /* 10. configure PUBL PIR register to specify which training step to run */ - /* warning : RVTRN is not supported by this PUBL */ - stm32mp1_ddrphy_init(priv->phy, DDRPHYC_PIR_QSTRN); + /* RVTRN is excuted only on LPDDR2/LPDDR3 */ + if (config->c_reg.mstr & DDRCTRL_MSTR_DDR3) + pir = DDRPHYC_PIR_QSTRN; + else + pir = DDRPHYC_PIR_QSTRN | DDRPHYC_PIR_RVTRN; + stm32mp1_ddrphy_init(priv->phy, pir); /* 11. monitor PUB PGSR.IDONE to poll cpmpletion of training sequence */ - ddrphy_idone_wait(priv->phy); + ddrphy_idone_wait(priv->phy); /* 12. set back registers in step 8 to the orginal values if desidered */ - stm32mp1_refresh_restore(priv->ctl, config->c_reg.rfshctl3, - config->c_reg.pwrctl); - } /* if (config->p_cal_present) */ + stm32mp1_refresh_restore(priv->ctl, config->c_reg.rfshctl3, + config->c_reg.pwrctl); /* enable uMCTL2 AXI port 0 and 1 */ setbits_le32(&priv->ctl->pctrl_0, DDRCTRL_PCTRL_N_PORT_EN); diff --git a/drivers/ram/stm32mp1/stm32mp1_ddr.h b/drivers/ram/stm32mp1/stm32mp1_ddr.h index 4998f0443944e2270323d64796732ece1b74ced3..861efff92bed373e5d761ed1b2afd908abd716ac 100644 --- a/drivers/ram/stm32mp1/stm32mp1_ddr.h +++ b/drivers/ram/stm32mp1/stm32mp1_ddr.h @@ -140,21 +140,6 @@ struct stm32mp1_ddrphy_timing { u32 mr3; }; -struct stm32mp1_ddrphy_cal { - u32 dx0dllcr; - u32 dx0dqtr; - u32 dx0dqstr; - u32 dx1dllcr; - u32 dx1dqtr; - u32 dx1dqstr; - u32 dx2dllcr; - u32 dx2dqtr; - u32 dx2dqstr; - u32 dx3dllcr; - u32 dx3dqtr; - u32 dx3dqstr; -}; - struct stm32mp1_ddr_info { const char *name; u32 speed; /* in kHZ */ @@ -169,16 +154,9 @@ struct stm32mp1_ddr_config { struct stm32mp1_ddrctrl_perf c_perf; struct stm32mp1_ddrphy_reg p_reg; struct stm32mp1_ddrphy_timing p_timing; - struct stm32mp1_ddrphy_cal p_cal; - bool p_cal_present; }; int stm32mp1_ddr_clk_enable(struct ddr_info *priv, u32 mem_speed); -void stm32mp1_ddrphy_init(struct stm32mp1_ddrphy *phy, u32 pir); -void stm32mp1_refresh_disable(struct stm32mp1_ddrctl *ctl); -void stm32mp1_refresh_restore(struct stm32mp1_ddrctl *ctl, - u32 rfshctl3, - u32 pwrctl); void stm32mp1_ddr_init( struct ddr_info *priv, diff --git a/drivers/ram/stm32mp1/stm32mp1_ddr_regs.h b/drivers/ram/stm32mp1/stm32mp1_ddr_regs.h index 3c8885a965770864ebea9b9bfe2b28f72fcde993..f1a26e31f6c19d58c567b8fd5383380b44a412ec 100644 --- a/drivers/ram/stm32mp1/stm32mp1_ddr_regs.h +++ b/drivers/ram/stm32mp1/stm32mp1_ddr_regs.h @@ -6,8 +6,9 @@ #ifndef _RAM_STM32MP1_DDR_REGS_H #define _RAM_STM32MP1_DDR_REGS_H -/* DDR3/LPDDR2/LPDDR3 Controller (DDRCTRL) registers */ #include + +/* DDR3/LPDDR2/LPDDR3 Controller (DDRCTRL) registers */ struct stm32mp1_ddrctl { u32 mstr ; /* 0x0 Master*/ u32 stat; /* 0x4 Operating Mode Status*/ @@ -238,6 +239,7 @@ struct stm32mp1_ddrphy { #define DDRCTRL_MSTR_LPDDR2 BIT(2) #define DDRCTRL_MSTR_LPDDR3 BIT(3) #define DDRCTRL_MSTR_DATA_BUS_WIDTH_MASK GENMASK(13, 12) +#define DDRCTRL_MSTR_DATA_BUS_WIDTH_SHIFT 12 #define DDRCTRL_MSTR_DATA_BUS_WIDTH_FULL (0 << 12) #define DDRCTRL_MSTR_DATA_BUS_WIDTH_HALF (1 << 12) #define DDRCTRL_MSTR_DATA_BUS_WIDTH_QUARTER (2 << 12) @@ -275,25 +277,6 @@ struct stm32mp1_ddrphy { #define DDRCTRL_DFIMISC_DFI_INIT_COMPLETE_EN BIT(0) -#define DDRCTRL_DBG1_DIS_HIF BIT(1) - -#define DDRCTRL_DBGCAM_WR_DATA_PIPELINE_EMPTY BIT(29) -#define DDRCTRL_DBGCAM_RD_DATA_PIPELINE_EMPTY BIT(28) -#define DDRCTRL_DBGCAM_DBG_WR_Q_EMPTY BIT(26) -#define DDRCTRL_DBGCAM_DBG_LPR_Q_DEPTH GENMASK(12, 8) -#define DDRCTRL_DBGCAM_DBG_HPR_Q_DEPTH GENMASK(4, 0) -#define DDRCTRL_DBGCAM_DATA_PIPELINE_EMPTY \ - (DDRCTRL_DBGCAM_WR_DATA_PIPELINE_EMPTY | \ - DDRCTRL_DBGCAM_RD_DATA_PIPELINE_EMPTY) -#define DDRCTRL_DBGCAM_DBG_Q_DEPTH \ - (DDRCTRL_DBGCAM_DBG_WR_Q_EMPTY | \ - DDRCTRL_DBGCAM_DBG_LPR_Q_DEPTH | \ - DDRCTRL_DBGCAM_DBG_HPR_Q_DEPTH) - -#define DDRCTRL_DBGCMD_RANK0_REFRESH BIT(0) - -#define DDRCTRL_DBGSTAT_RANK0_REFRESH_BUSY BIT(0) - #define DDRCTRL_SWCTL_SW_DONE BIT(0) #define DDRCTRL_SWSTAT_SW_DONE_ACK BIT(0) @@ -309,13 +292,9 @@ struct stm32mp1_ddrphy { #define DDRPHYC_PIR_DRAMRST BIT(5) #define DDRPHYC_PIR_DRAMINIT BIT(6) #define DDRPHYC_PIR_QSTRN BIT(7) +#define DDRPHYC_PIR_RVTRN BIT(8) #define DDRPHYC_PIR_ICPC BIT(16) #define DDRPHYC_PIR_ZCALBYP BIT(30) -#define DDRPHYC_PIR_INITSTEPS_MASK GENMASK(31, 7) - -#define DDRPHYC_PGCR_DFTCMP BIT(2) -#define DDRPHYC_PGCR_PDDISDX BIT(24) -#define DDRPHYC_PGCR_RFSHDT_MASK GENMASK(28, 25) #define DDRPHYC_PGSR_IDONE BIT(0) #define DDRPHYC_PGSR_DTERR BIT(5) @@ -324,43 +303,6 @@ struct stm32mp1_ddrphy { #define DDRPHYC_PGSR_RVERR BIT(8) #define DDRPHYC_PGSR_RVEIRR BIT(9) -#define DDRPHYC_DLLGCR_BPS200 BIT(23) - -#define DDRPHYC_ACDLLCR_DLLDIS BIT(31) - -#define DDRPHYC_ZQ0CRN_ZDATA_MASK GENMASK(27, 0) -#define DDRPHYC_ZQ0CRN_ZDATA_SHIFT 0 -#define DDRPHYC_ZQ0CRN_ZDEN BIT(28) - -#define DDRPHYC_DXNGCR_DXEN BIT(0) - -#define DDRPHYC_DXNDLLCR_DLLSRST BIT(30) -#define DDRPHYC_DXNDLLCR_DLLDIS BIT(31) -#define DDRPHYC_DXNDLLCR_SDPHASE_MASK GENMASK(17, 14) -#define DDRPHYC_DXNDLLCR_SDPHASE_SHIFT 14 - -#define DDRPHYC_DXNDQTR_DQDLY_SHIFT(bit) (4 * (bit)) -#define DDRPHYC_DXNDQTR_DQDLY_MASK GENMASK(3, 0) -#define DDRPHYC_DXNDQTR_DQDLY_LOW_MASK GENMASK(1, 0) -#define DDRPHYC_DXNDQTR_DQDLY_HIGH_MASK GENMASK(3, 2) - -#define DDRPHYC_DXNDQSTR_DQSDLY_MASK GENMASK(22, 20) -#define DDRPHYC_DXNDQSTR_DQSDLY_SHIFT 20 -#define DDRPHYC_DXNDQSTR_DQSNDLY_MASK GENMASK(25, 23) -#define DDRPHYC_DXNDQSTR_DQSNDLY_SHIFT 23 -#define DDRPHYC_DXNDQSTR_R0DGSL_MASK GENMASK(2, 0) -#define DDRPHYC_DXNDQSTR_R0DGSL_SHIFT 0 -#define DDRPHYC_DXNDQSTR_R0DGPS_MASK GENMASK(13, 12) -#define DDRPHYC_DXNDQSTR_R0DGPS_SHIFT 12 - -#define DDRPHYC_BISTRR_BDXSEL_MASK GENMASK(22, 19) -#define DDRPHYC_BISTRR_BDXSEL_SHIFT 19 - -#define DDRPHYC_BISTGSR_BDDONE BIT(0) -#define DDRPHYC_BISTGSR_BDXERR BIT(2) - -#define DDRPHYC_BISTWCSR_DXWCNT_SHIFT 16 - /* PWR registers */ #define PWR_CR3 0x00C #define PWR_CR3_DDRSRDIS BIT(11) diff --git a/drivers/ram/stm32mp1/stm32mp1_interactive.c b/drivers/ram/stm32mp1/stm32mp1_interactive.c index 8c2310ac906488c14ca5047e03b49c324b0e20a2..f0fe7e61e3383f8f4a3da3b2ed2aa07ad8c5059e 100644 --- a/drivers/ram/stm32mp1/stm32mp1_interactive.c +++ b/drivers/ram/stm32mp1/stm32mp1_interactive.c @@ -32,7 +32,6 @@ enum ddr_command { DDR_CMD_NEXT, DDR_CMD_GO, DDR_CMD_TEST, - DDR_CMD_TUNING, DDR_CMD_UNKNOWN, }; @@ -59,9 +58,6 @@ enum ddr_command stm32mp1_get_command(char *cmd, int argc) [DDR_CMD_GO] = "go", #ifdef CONFIG_STM32MP1_DDR_TESTS [DDR_CMD_TEST] = "test", -#endif -#ifdef CONFIG_STM32MP1_DDR_TUNING - [DDR_CMD_TUNING] = "tuning", #endif }; /* min and max number of argument */ @@ -78,9 +74,6 @@ enum ddr_command stm32mp1_get_command(char *cmd, int argc) [DDR_CMD_GO] = { 0, 0 }, #ifdef CONFIG_STM32MP1_DDR_TESTS [DDR_CMD_TEST] = { 0, 255 }, -#endif -#ifdef CONFIG_STM32MP1_DDR_TUNING - [DDR_CMD_TUNING] = { 0, 255 }, #endif }; int i; @@ -111,7 +104,7 @@ static void stm32mp1_do_usage(void) "help displays help\n" "info displays DDR information\n" "info changes DDR information\n" - " with = step, name, size, speed or cal\n" + " with = step, name, size or speed\n" "freq displays the DDR PHY frequency in kHz\n" "freq changes the DDR PHY frequency\n" "param [type|reg] prints input parameters\n" @@ -125,14 +118,11 @@ static void stm32mp1_do_usage(void) "reset reboots machine\n" #ifdef CONFIG_STM32MP1_DDR_TESTS "test [help] | [...] lists (with help) or executes test \n" -#endif -#ifdef CONFIG_STM32MP1_DDR_TUNING - "tuning [help] | [...] lists (with help) or execute tuning \n" #endif "\nwith for [type|reg]:\n" " all registers if absent\n" " = ctl, phy\n" - " or one category (static, timing, map, perf, cal, dyn)\n" + " or one category (static, timing, map, perf, dyn)\n" " = name of the register\n" }; @@ -165,7 +155,6 @@ static void stm32mp1_do_info(struct ddr_info *priv, printf("name = %s\n", config->info.name); printf("size = 0x%x\n", config->info.size); printf("speed = %d kHz\n", config->info.speed); - printf("cal = %d\n", config->p_cal_present); return; } @@ -214,16 +203,6 @@ static void stm32mp1_do_info(struct ddr_info *priv, } return; } - if (!strcmp(argv[1], "cal")) { - if (strict_strtoul(argv[2], 10, &value) < 0 || - (value != 0 && value != 1)) { - printf("invalid value %s\n", argv[2]); - } else { - config->p_cal_present = value; - printf("cal = %d\n", config->p_cal_present); - } - return; - } printf("argument %s invalid\n", argv[1]); } @@ -322,7 +301,7 @@ end: return step; } -#if defined(CONFIG_STM32MP1_DDR_TESTS) || defined(CONFIG_STM32MP1_DDR_TUNING) +#if defined(CONFIG_STM32MP1_DDR_TESTS) static const char * const s_result[] = { [TEST_PASSED] = "Pass", [TEST_FAILED] = "Failed", @@ -479,16 +458,6 @@ bool stm32mp1_ddr_interactive(void *priv, stm32mp1_ddr_subcmd(priv, argc, argv, test, test_nb); break; #endif - -#ifdef CONFIG_STM32MP1_DDR_TUNING - case DDR_CMD_TUNING: - if (!stm32mp1_check_step(step, STEP_DDR_READY)) - continue; - stm32mp1_ddr_subcmd(priv, argc, argv, - tuning, tuning_nb); - break; -#endif - default: break; } diff --git a/drivers/ram/stm32mp1/stm32mp1_ram.c b/drivers/ram/stm32mp1/stm32mp1_ram.c index 98fa1f4f118e068504f707fb682f86c671984fc8..49b1262461be323d6f40fa61e4f27f321cb3de0c 100644 --- a/drivers/ram/stm32mp1/stm32mp1_ram.c +++ b/drivers/ram/stm32mp1/stm32mp1_ram.c @@ -16,6 +16,12 @@ #include #include #include "stm32mp1_ddr.h" +#include "stm32mp1_ddr_regs.h" + +/* DDR subsystem configuration */ +struct stm32mp1_ddr_cfg { + u8 nb_bytes; /* MEMC_DRAM_DATA_WIDTH */ +}; static const char *const clkname[] = { "ddrc1", @@ -82,7 +88,7 @@ static ofnode stm32mp1_ddr_get_ofnode(struct udevice *dev) return dev_ofnode(dev); } -static __maybe_unused int stm32mp1_ddr_setup(struct udevice *dev) +static int stm32mp1_ddr_setup(struct udevice *dev) { struct ddr_info *priv = dev_get_priv(dev); int ret; @@ -95,26 +101,22 @@ static __maybe_unused int stm32mp1_ddr_setup(struct udevice *dev) { .name = x, \ .offset = offsetof(struct stm32mp1_ddr_config, y), \ .size = sizeof(config.y) / sizeof(u32), \ - .present = z, \ } #define CTL_PARAM(x) PARAM("st,ctl-"#x, c_##x, NULL) #define PHY_PARAM(x) PARAM("st,phy-"#x, p_##x, NULL) -#define PHY_PARAM_OPT(x) PARAM("st,phy-"#x, p_##x, &config.p_##x##_present) const struct { const char *name; /* name in DT */ const u32 offset; /* offset in config struct */ const u32 size; /* size of parameters */ - bool * const present; /* presence indication for opt */ } param[] = { CTL_PARAM(reg), CTL_PARAM(timing), CTL_PARAM(map), CTL_PARAM(perf), PHY_PARAM(reg), - PHY_PARAM(timing), - PHY_PARAM_OPT(cal) + PHY_PARAM(timing) }; config.info.speed = ofnode_read_u32_default(node, "st,mem-speed", 0); @@ -133,25 +135,11 @@ static __maybe_unused int stm32mp1_ddr_setup(struct udevice *dev) param[idx].size); dev_dbg(dev, "%s: %s[0x%x] = %d\n", __func__, param[idx].name, param[idx].size, ret); - if (ret && - (ret != -FDT_ERR_NOTFOUND || !param[idx].present)) { + if (ret) { dev_err(dev, "Cannot read %s, error=%d\n", param[idx].name, ret); return -EINVAL; } - if (param[idx].present) { - /* save presence of optional parameters */ - *param[idx].present = true; - if (ret == -FDT_ERR_NOTFOUND) { - *param[idx].present = false; -#ifdef CONFIG_STM32MP1_DDR_INTERACTIVE - /* reset values if used later */ - memset((void *)((u32)&config + - param[idx].offset), - 0, param[idx].size * sizeof(u32)); -#endif - } - } } ret = clk_get_by_name(dev, "axidcg", &axidcg); @@ -183,6 +171,183 @@ static __maybe_unused int stm32mp1_ddr_setup(struct udevice *dev) return 0; } +static u8 get_data_bus_width(struct stm32mp1_ddrctl *ctl) +{ + u32 reg = readl(&ctl->mstr) & DDRCTRL_MSTR_DATA_BUS_WIDTH_MASK; + u8 data_bus_width = reg >> DDRCTRL_MSTR_DATA_BUS_WIDTH_SHIFT; + + return data_bus_width; +} + +static u8 get_nb_bank(struct stm32mp1_ddrctl *ctl) +{ + /* Count bank address bits */ + u8 bits = 0; + u32 reg, val; + + reg = readl(&ctl->addrmap1); + /* addrmap1.addrmap_bank_b1 */ + val = (reg & GENMASK(5, 0)) >> 0; + if (val <= 31) + bits++; + /* addrmap1.addrmap_bank_b2 */ + val = (reg & GENMASK(13, 8)) >> 8; + if (val <= 31) + bits++; + /* addrmap1.addrmap_bank_b3 */ + val = (reg & GENMASK(21, 16)) >> 16; + if (val <= 31) + bits++; + + return bits; +} + +static u8 get_nb_col(struct stm32mp1_ddrctl *ctl, u8 data_bus_width) +{ + u8 bits; + u32 reg, val; + + /* Count column address bits, start at 2 for b0 and b1 (fixed) */ + bits = 2; + + reg = readl(&ctl->addrmap2); + /* addrmap2.addrmap_col_b2 */ + val = (reg & GENMASK(3, 0)) >> 0; + if (val <= 7) + bits++; + /* addrmap2.addrmap_col_b3 */ + val = (reg & GENMASK(11, 8)) >> 8; + if (val <= 7) + bits++; + /* addrmap2.addrmap_col_b4 */ + val = (reg & GENMASK(19, 16)) >> 16; + if (val <= 7) + bits++; + /* addrmap2.addrmap_col_b5 */ + val = (reg & GENMASK(27, 24)) >> 24; + if (val <= 7) + bits++; + + reg = readl(&ctl->addrmap3); + /* addrmap3.addrmap_col_b6 */ + val = (reg & GENMASK(3, 0)) >> 0; + if (val <= 7) + bits++; + /* addrmap3.addrmap_col_b7 */ + val = (reg & GENMASK(11, 8)) >> 8; + if (val <= 7) + bits++; + /* addrmap3.addrmap_col_b8 */ + val = (reg & GENMASK(19, 16)) >> 16; + if (val <= 7) + bits++; + /* addrmap3.addrmap_col_b9 */ + val = (reg & GENMASK(27, 24)) >> 24; + if (val <= 7) + bits++; + + reg = readl(&ctl->addrmap4); + /* addrmap4.addrmap_col_b10 */ + val = (reg & GENMASK(3, 0)) >> 0; + if (val <= 7) + bits++; + /* addrmap4.addrmap_col_b11 */ + val = (reg & GENMASK(11, 8)) >> 8; + if (val <= 7) + bits++; + + /* + * column bits shift up: + * 1 when half the data bus is used (data_bus_width = 1) + * 2 when a quarter the data bus is used (data_bus_width = 2) + * nothing to do for full data bus (data_bus_width = 0) + */ + bits += data_bus_width; + + return bits; +} + +static u8 get_nb_row(struct stm32mp1_ddrctl *ctl) +{ + /* Count row address bits */ + u8 bits = 0; + u32 reg, val; + + reg = readl(&ctl->addrmap5); + /* addrmap5.addrmap_row_b0 */ + val = (reg & GENMASK(3, 0)) >> 0; + if (val <= 11) + bits++; + /* addrmap5.addrmap_row_b1 */ + val = (reg & GENMASK(11, 8)) >> 8; + if (val <= 11) + bits++; + /* addrmap5.addrmap_row_b2_10 */ + val = (reg & GENMASK(19, 16)) >> 16; + if (val <= 11) + bits += 9; + else + printf("warning: addrmap5.addrmap_row_b2_10 not supported\n"); + /* addrmap5.addrmap_row_b11 */ + val = (reg & GENMASK(27, 24)) >> 24; + if (val <= 11) + bits++; + + reg = readl(&ctl->addrmap6); + /* addrmap6.addrmap_row_b12 */ + val = (reg & GENMASK(3, 0)) >> 0; + if (val <= 7) + bits++; + /* addrmap6.addrmap_row_b13 */ + val = (reg & GENMASK(11, 8)) >> 8; + if (val <= 7) + bits++; + /* addrmap6.addrmap_row_b14 */ + val = (reg & GENMASK(19, 16)) >> 16; + if (val <= 7) + bits++; + /* addrmap6.addrmap_row_b15 */ + val = (reg & GENMASK(27, 24)) >> 24; + if (val <= 7) + bits++; + + return bits; +} + +/* + * stm32mp1_ddr_size + * + * Get the current DRAM size from the DDR CTL registers + * + * @return: DRAM size + */ +u32 stm32mp1_ddr_size(struct udevice *dev) +{ + u8 nb_bit; + u32 ddr_size; + u8 data_bus_width; + struct ddr_info *priv = dev_get_priv(dev); + struct stm32mp1_ddrctl *ctl = priv->ctl; + struct stm32mp1_ddr_cfg *cfg = (struct stm32mp1_ddr_cfg *)dev_get_driver_data(dev); + const u8 nb_bytes = cfg->nb_bytes; + + data_bus_width = get_data_bus_width(ctl); + nb_bit = get_nb_bank(ctl) + get_nb_col(ctl, data_bus_width) + + get_nb_row(ctl); + if (nb_bit > 32) { + nb_bit = 32; + debug("invalid DDR configuration: %d bits\n", nb_bit); + } + + ddr_size = (nb_bytes >> data_bus_width) << nb_bit; + if (ddr_size > STM32_DDR_SIZE) { + ddr_size = STM32_DDR_SIZE; + debug("invalid DDR configuration: size = %x\n", ddr_size); + } + + return ddr_size; +} + static int stm32mp1_ddr_probe(struct udevice *dev) { struct ddr_info *priv = dev_get_priv(dev); @@ -209,8 +374,8 @@ static int stm32mp1_ddr_probe(struct udevice *dev) return log_ret(ret); } - ofnode node = stm32mp1_ddr_get_ofnode(dev); - priv->info.size = ofnode_read_u32_default(node, "st,mem-size", 0); + priv->info.size = stm32mp1_ddr_size(dev); + return 0; } @@ -227,8 +392,12 @@ static struct ram_ops stm32mp1_ddr_ops = { .get_info = stm32mp1_ddr_get_info, }; +static const struct stm32mp1_ddr_cfg stm32mp15x_ddr_cfg = { + .nb_bytes = 4, +}; + static const struct udevice_id stm32mp1_ddr_ids[] = { - { .compatible = "st,stm32mp1-ddr" }, + { .compatible = "st,stm32mp1-ddr", .data = (ulong)&stm32mp15x_ddr_cfg}, { } }; diff --git a/drivers/ram/stm32mp1/stm32mp1_tests.h b/drivers/ram/stm32mp1/stm32mp1_tests.h index 55f5d6d93bc863e160f986578459b7a46d941730..8436780790fee0b898671c11b1809f9ee3d34ba7 100644 --- a/drivers/ram/stm32mp1/stm32mp1_tests.h +++ b/drivers/ram/stm32mp1/stm32mp1_tests.h @@ -28,7 +28,4 @@ struct test_desc { extern const struct test_desc test[]; extern const int test_nb; -extern const struct test_desc tuning[]; -extern const int tuning_nb; - #endif diff --git a/drivers/ram/stm32mp1/stm32mp1_tuning.c b/drivers/ram/stm32mp1/stm32mp1_tuning.c deleted file mode 100644 index c8cd7c3ceaf74a75b2944c76c24c311435086c9f..0000000000000000000000000000000000000000 --- a/drivers/ram/stm32mp1/stm32mp1_tuning.c +++ /dev/null @@ -1,1540 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause -/* - * Copyright (C) 2019, STMicroelectronics - All Rights Reserved - */ - -#define LOG_CATEGORY UCLASS_RAM - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "stm32mp1_ddr_regs.h" -#include "stm32mp1_ddr.h" -#include "stm32mp1_tests.h" - -#define MAX_DQS_PHASE_IDX _144deg -#define MAX_DQS_UNIT_IDX 7 -#define MAX_GSL_IDX 5 -#define MAX_GPS_IDX 3 - -/* Number of bytes used in this SW. ( min 1--> max 4). */ -#define NUM_BYTES 4 - -enum dqs_phase_enum { - _36deg = 0, - _54deg = 1, - _72deg = 2, - _90deg = 3, - _108deg = 4, - _126deg = 5, - _144deg = 6 -}; - -/* BIST Result struct */ -struct BIST_result { - /* Overall test result: - * 0 Fail (any bit failed) , - * 1 Success (All bits success) - */ - bool test_result; - /* 1: true, all fail / 0: False, not all bits fail */ - bool all_bits_fail; - bool bit_i_test_result[8]; /* 0 fail / 1 success */ -}; - -/* a struct that defines tuning parameters of a byte. */ -struct tuning_position { - u8 phase; /* DQS phase */ - u8 unit; /* DQS unit delay */ - u32 bits_delay; /* Bits deskew in this byte */ -}; - -/* 36deg, 54deg, 72deg, 90deg, 108deg, 126deg, 144deg */ -const u8 dx_dll_phase[7] = {3, 2, 1, 0, 14, 13, 12}; - -static u8 BIST_error_max = 1; -static u32 BIST_seed = 0x1234ABCD; - -static u8 get_nb_bytes(struct stm32mp1_ddrctl *ctl) -{ - u32 data_bus = readl(&ctl->mstr) & DDRCTRL_MSTR_DATA_BUS_WIDTH_MASK; - u8 nb_bytes = NUM_BYTES; - - switch (data_bus) { - case DDRCTRL_MSTR_DATA_BUS_WIDTH_HALF: - nb_bytes /= 2; - break; - case DDRCTRL_MSTR_DATA_BUS_WIDTH_QUARTER: - nb_bytes /= 4; - break; - default: - break; - } - - return nb_bytes; -} - -static u8 get_nb_bank(struct stm32mp1_ddrctl *ctl) -{ - /* Count bank address bits */ - u8 bits = 0; - u32 reg, val; - - reg = readl(&ctl->addrmap1); - /* addrmap1.addrmap_bank_b1 */ - val = (reg & GENMASK(5, 0)) >> 0; - if (val <= 31) - bits++; - /* addrmap1.addrmap_bank_b2 */ - val = (reg & GENMASK(13, 8)) >> 8; - if (val <= 31) - bits++; - /* addrmap1.addrmap_bank_b3 */ - val = (reg & GENMASK(21, 16)) >> 16; - if (val <= 31) - bits++; - - return bits; -} - -static u8 get_nb_col(struct stm32mp1_ddrctl *ctl) -{ - u8 bits; - u32 reg, val; - - /* Count column address bits, start at 2 for b0 and b1 (fixed) */ - bits = 2; - - reg = readl(&ctl->addrmap2); - /* addrmap2.addrmap_col_b2 */ - val = (reg & GENMASK(3, 0)) >> 0; - if (val <= 7) - bits++; - /* addrmap2.addrmap_col_b3 */ - val = (reg & GENMASK(11, 8)) >> 8; - if (val <= 7) - bits++; - /* addrmap2.addrmap_col_b4 */ - val = (reg & GENMASK(19, 16)) >> 16; - if (val <= 7) - bits++; - /* addrmap2.addrmap_col_b5 */ - val = (reg & GENMASK(27, 24)) >> 24; - if (val <= 7) - bits++; - - reg = readl(&ctl->addrmap3); - /* addrmap3.addrmap_col_b6 */ - val = (reg & GENMASK(3, 0)) >> 0; - if (val <= 7) - bits++; - /* addrmap3.addrmap_col_b7 */ - val = (reg & GENMASK(11, 8)) >> 8; - if (val <= 7) - bits++; - /* addrmap3.addrmap_col_b8 */ - val = (reg & GENMASK(19, 16)) >> 16; - if (val <= 7) - bits++; - /* addrmap3.addrmap_col_b9 */ - val = (reg & GENMASK(27, 24)) >> 24; - if (val <= 7) - bits++; - - reg = readl(&ctl->addrmap4); - /* addrmap4.addrmap_col_b10 */ - val = (reg & GENMASK(3, 0)) >> 0; - if (val <= 7) - bits++; - /* addrmap4.addrmap_col_b11 */ - val = (reg & GENMASK(11, 8)) >> 8; - if (val <= 7) - bits++; - - return bits; -} - -static u8 get_nb_row(struct stm32mp1_ddrctl *ctl) -{ - /* Count row address bits */ - u8 bits = 0; - u32 reg, val; - - reg = readl(&ctl->addrmap5); - /* addrmap5.addrmap_row_b0 */ - val = (reg & GENMASK(3, 0)) >> 0; - if (val <= 11) - bits++; - /* addrmap5.addrmap_row_b1 */ - val = (reg & GENMASK(11, 8)) >> 8; - if (val <= 11) - bits++; - /* addrmap5.addrmap_row_b2_10 */ - val = (reg & GENMASK(19, 16)) >> 16; - if (val <= 11) - bits += 9; - else - printf("warning: addrmap5.addrmap_row_b2_10 not supported\n"); - /* addrmap5.addrmap_row_b11 */ - val = (reg & GENMASK(27, 24)) >> 24; - if (val <= 11) - bits++; - - reg = readl(&ctl->addrmap6); - /* addrmap6.addrmap_row_b12 */ - val = (reg & GENMASK(3, 0)) >> 0; - if (val <= 7) - bits++; - /* addrmap6.addrmap_row_b13 */ - val = (reg & GENMASK(11, 8)) >> 8; - if (val <= 7) - bits++; - /* addrmap6.addrmap_row_b14 */ - val = (reg & GENMASK(19, 16)) >> 16; - if (val <= 7) - bits++; - /* addrmap6.addrmap_row_b15 */ - val = (reg & GENMASK(27, 24)) >> 24; - if (val <= 7) - bits++; - - return bits; -} - -static void itm_soft_reset(struct stm32mp1_ddrphy *phy) -{ - stm32mp1_ddrphy_init(phy, DDRPHYC_PIR_ITMSRST); -} - -/* Read DQ unit delay register and provides the retrieved value for DQS - * We are assuming that we have the same delay when clocking - * by DQS and when clocking by DQSN - */ -static u8 DQ_unit_index(struct stm32mp1_ddrphy *phy, u8 byte, u8 bit) -{ - u32 index; - u32 addr = DXNDQTR(phy, byte); - - /* We are assuming that we have the same delay when clocking by DQS - * and when clocking by DQSN : use only the low bits - */ - index = (readl(addr) >> DDRPHYC_DXNDQTR_DQDLY_SHIFT(bit)) - & DDRPHYC_DXNDQTR_DQDLY_LOW_MASK; - - log_debug("[%x]: %x => DQ unit index = %x\n", addr, readl(addr), index); - - return index; -} - -/* Sets the DQS phase delay for a byte lane. - *phase delay is specified by giving the index of the desired delay - * in the dx_dll_phase array. - */ -static void DQS_phase_delay(struct stm32mp1_ddrphy *phy, u8 byte, u8 phase_idx) -{ - u8 sdphase_val = 0; - - /* Write DXNDLLCR.SDPHASE = dx_dll_phase(phase_index); */ - sdphase_val = dx_dll_phase[phase_idx]; - clrsetbits_le32(DXNDLLCR(phy, byte), - DDRPHYC_DXNDLLCR_SDPHASE_MASK, - sdphase_val << DDRPHYC_DXNDLLCR_SDPHASE_SHIFT); -} - -/* Sets the DQS unit delay for a byte lane. - * unit delay is specified by giving the index of the desired delay - * for dgsdly and dqsndly (same value). - */ -static void DQS_unit_delay(struct stm32mp1_ddrphy *phy, - u8 byte, u8 unit_dly_idx) -{ - /* Write the same value in DXNDQSTR.DQSDLY and DXNDQSTR.DQSNDLY */ - clrsetbits_le32(DXNDQSTR(phy, byte), - DDRPHYC_DXNDQSTR_DQSDLY_MASK | - DDRPHYC_DXNDQSTR_DQSNDLY_MASK, - (unit_dly_idx << DDRPHYC_DXNDQSTR_DQSDLY_SHIFT) | - (unit_dly_idx << DDRPHYC_DXNDQSTR_DQSNDLY_SHIFT)); - - /* After changing this value, an ITM soft reset (PIR.ITMSRST=1, - * plus PIR.INIT=1) must be issued. - */ - stm32mp1_ddrphy_init(phy, DDRPHYC_PIR_ITMSRST); -} - -/* Sets the DQ unit delay for a bit line in particular byte lane. - * unit delay is specified by giving the desired delay - */ -static void set_DQ_unit_delay(struct stm32mp1_ddrphy *phy, - u8 byte, u8 bit, - u8 dq_delay_index) -{ - u8 dq_bit_delay_val = dq_delay_index | (dq_delay_index << 2); - - /* same value on delay for clock DQ an DQS_b */ - clrsetbits_le32(DXNDQTR(phy, byte), - DDRPHYC_DXNDQTR_DQDLY_MASK - << DDRPHYC_DXNDQTR_DQDLY_SHIFT(bit), - dq_bit_delay_val << DDRPHYC_DXNDQTR_DQDLY_SHIFT(bit)); -} - -static void set_r0dgsl_delay(struct stm32mp1_ddrphy *phy, - u8 byte, u8 r0dgsl_idx) -{ - clrsetbits_le32(DXNDQSTR(phy, byte), - DDRPHYC_DXNDQSTR_R0DGSL_MASK, - r0dgsl_idx << DDRPHYC_DXNDQSTR_R0DGSL_SHIFT); -} - -static void set_r0dgps_delay(struct stm32mp1_ddrphy *phy, - u8 byte, u8 r0dgps_idx) -{ - clrsetbits_le32(DXNDQSTR(phy, byte), - DDRPHYC_DXNDQSTR_R0DGPS_MASK, - r0dgps_idx << DDRPHYC_DXNDQSTR_R0DGPS_SHIFT); -} - -/* Basic BIST configuration for data lane tests. */ -static void config_BIST(struct stm32mp1_ddrctl *ctl, - struct stm32mp1_ddrphy *phy) -{ - u8 nb_bank = get_nb_bank(ctl); - u8 nb_row = get_nb_row(ctl); - u8 nb_col = get_nb_col(ctl); - - /* Selects the SDRAM bank address to be used during BIST. */ - u32 bbank = 0; - /* Selects the SDRAM row address to be used during BIST. */ - u32 brow = 0; - /* Selects the SDRAM column address to be used during BIST. */ - u32 bcol = 0; - /* Selects the value by which the SDRAM address is incremented - * for each write/read access. - */ - u32 bainc = 0x00000008; - /* Specifies the maximum SDRAM rank to be used during BIST. - * The default value is set to maximum ranks minus 1. - * must be 0 with single rank - */ - u32 bmrank = 0; - /* Selects the SDRAM rank to be used during BIST. - * must be 0 with single rank - */ - u32 brank = 0; - - /* Specifies the maximum SDRAM bank address to be used during - * BIST before the address & increments to the next rank. - */ - u32 bmbank = (1 << nb_bank) - 1; - /* Specifies the maximum SDRAM row address to be used during - * BIST before the address & increments to the next bank. - */ - u32 bmrow = (1 << nb_row) - 1; - /* Specifies the maximum SDRAM column address to be used during - * BIST before the address & increments to the next row. - */ - u32 bmcol = (1 << nb_col) - 1; - - u32 bmode_conf = 0x00000001; /* DRam mode */ - u32 bdxen_conf = 0x00000001; /* BIST on Data byte */ - u32 bdpat_conf = 0x00000002; /* Select LFSR pattern */ - - /*Setup BIST for DRAM mode, and LFSR-random data pattern.*/ - /*Write BISTRR.BMODE = 1?b1;*/ - /*Write BISTRR.BDXEN = 1?b1;*/ - /*Write BISTRR.BDPAT = 2?b10;*/ - - /* reset BIST */ - writel(0x3, &phy->bistrr); - - writel((bmode_conf << 3) | (bdxen_conf << 14) | (bdpat_conf << 17), - &phy->bistrr); - - /*Setup BIST Word Count*/ - /*Write BISTWCR.BWCNT = 16?b0008;*/ - writel(0x00000200, &phy->bistwcr); /* A multiple of BL/2 */ - - writel(bcol | (brow << 12) | (bbank << 28), &phy->bistar0); - writel(brank | (bmrank << 2) | (bainc << 4), &phy->bistar1); - writel(bmcol | (bmrow << 12) | (bmbank << 28), &phy->bistar2); -} - -/* Select the Byte lane to be tested by BIST. */ -static void BIST_datx8_sel(struct stm32mp1_ddrphy *phy, u8 datx8) -{ - clrsetbits_le32(&phy->bistrr, - DDRPHYC_BISTRR_BDXSEL_MASK, - datx8 << DDRPHYC_BISTRR_BDXSEL_SHIFT); - - /*(For example, selecting Byte Lane 3, BISTRR.BDXSEL = 4?b0011)*/ - /* Write BISTRR.BDXSEL = datx8; */ -} - -/* Perform BIST Write_Read test on a byte lane and return test result. */ -static void BIST_test(struct stm32mp1_ddrphy *phy, u8 byte, - struct BIST_result *bist) -{ - bool result = true; /* BIST_SUCCESS */ - u32 cnt = 0; - u32 error = 0; - u32 val; - int ret; - - bist->test_result = true; - -run: - itm_soft_reset(phy); - - /*Perform BIST Reset*/ - /* Write BISTRR.BINST = 3?b011; */ - clrsetbits_le32(&phy->bistrr, - 0x00000007, - 0x00000003); - - /*Re-seed LFSR*/ - /* Write BISTLSR.SEED = 32'h1234ABCD; */ - if (BIST_seed) - writel(BIST_seed, &phy->bistlsr); - else - writel(rand(), &phy->bistlsr); - - /* some delay to reset BIST */ - udelay(10); - - /*Perform BIST Run*/ - clrsetbits_le32(&phy->bistrr, - 0x00000007, - 0x00000001); - /* Write BISTRR.BINST = 3?b001; */ - - /* poll on BISTGSR.BDONE and wait max 1000 us */ - ret = readl_poll_timeout(&phy->bistgsr, val, - val & DDRPHYC_BISTGSR_BDDONE, 1000); - - if (ret < 0) { - printf("warning: BIST timeout\n"); - result = false; /* BIST_FAIL; */ - /*Perform BIST Stop */ - clrsetbits_le32(&phy->bistrr, 0x00000007, 0x00000002); - } else { - /*Check if received correct number of words*/ - /* if (Read BISTWCSR.DXWCNT = Read BISTWCR.BWCNT) */ - if (((readl(&phy->bistwcsr)) >> DDRPHYC_BISTWCSR_DXWCNT_SHIFT) - == readl(&phy->bistwcr)) { - /*Determine if there is a data comparison error*/ - /* if (Read BISTGSR.BDXERR = 1?b0) */ - if (readl(&phy->bistgsr) & DDRPHYC_BISTGSR_BDXERR) - result = false; /* BIST_FAIL; */ - else - result = true; /* BIST_SUCCESS; */ - } else { - result = false; /* BIST_FAIL; */ - } - } - - /* loop while success */ - cnt++; - if (result && cnt != 1000) - goto run; - - if (!result) - error++; - - if (error < BIST_error_max) { - if (cnt != 1000) - goto run; - bist->test_result = true; - } else { - bist->test_result = false; - } -} - -/* After running the deskew algo, this function applies the new DQ delays - * by reading them from the array "deskew_delay"and writing in PHY registers. - * The bits that are not deskewed parfectly (too much skew on them, - * or data eye very wide) are marked in the array deskew_non_converge. - */ -static void apply_deskew_results(struct stm32mp1_ddrphy *phy, u8 byte, - u8 deskew_delay[NUM_BYTES][8], - u8 deskew_non_converge[NUM_BYTES][8]) -{ - u8 bit_i; - u8 index; - - for (bit_i = 0; bit_i < 8; bit_i++) { - set_DQ_unit_delay(phy, byte, bit_i, deskew_delay[byte][bit_i]); - index = DQ_unit_index(phy, byte, bit_i); - log_debug("Byte %d ; bit %d : The new DQ delay (%d) index=%d [delta=%d, 3 is the default]", - byte, bit_i, deskew_delay[byte][bit_i], - index, index - 3); - printf("Byte %d, bit %d, DQ delay = %d", - byte, bit_i, deskew_delay[byte][bit_i]); - if (deskew_non_converge[byte][bit_i] == 1) - log_debug(" - not converged : still more skew"); - printf("\n"); - } -} - -/* DQ Bit de-skew algorithm. - * Deskews data lines as much as possible. - * 1. Add delay to DQS line until finding the failure - * (normally a hold time violation) - * 2. Reduce DQS line by small steps until finding the very first time - * we go back to "Pass" condition. - * 3. For each DQ line, Reduce DQ delay until finding the very first failure - * (normally a hold time fail) - * 4. When all bits are at their first failure delay, we can consider them - * aligned. - * Handle conrer situation (Can't find Pass-fail, or fail-pass transitions - * at any step) - * TODO Provide a return Status. Improve doc - */ -static enum test_result bit_deskew(struct stm32mp1_ddrctl *ctl, - struct stm32mp1_ddrphy *phy, char *string) -{ - /* New DQ delay value (index), set during Deskew algo */ - u8 deskew_delay[NUM_BYTES][8]; - /*If there is still skew on a bit, mark this bit. */ - u8 deskew_non_converge[NUM_BYTES][8]; - struct BIST_result result; - s8 dqs_unit_delay_index = 0; - u8 datx8 = 0; - u8 bit_i = 0; - s8 phase_idx = 0; - s8 bit_i_delay_index = 0; - u8 success = 0; - struct tuning_position last_right_ok; - u8 force_stop = 0; - u8 fail_found; - u8 error = 0; - u8 nb_bytes = get_nb_bytes(ctl); - /* u8 last_pass_dqs_unit = 0; */ - - memset(deskew_delay, 0, sizeof(deskew_delay)); - memset(deskew_non_converge, 0, sizeof(deskew_non_converge)); - - /*Disable DQS Drift Compensation*/ - clrbits_le32(&phy->pgcr, DDRPHYC_PGCR_DFTCMP); - /*Disable all bytes*/ - /* Disable automatic power down of DLL and IOs when disabling - * a byte (To avoid having to add programming and delay - * for a DLL re-lock when later re-enabling a disabled Byte Lane) - */ - clrbits_le32(&phy->pgcr, DDRPHYC_PGCR_PDDISDX); - - /* Disable all data bytes */ - clrbits_le32(&phy->dx0gcr, DDRPHYC_DXNGCR_DXEN); - clrbits_le32(&phy->dx1gcr, DDRPHYC_DXNGCR_DXEN); - clrbits_le32(&phy->dx2gcr, DDRPHYC_DXNGCR_DXEN); - clrbits_le32(&phy->dx3gcr, DDRPHYC_DXNGCR_DXEN); - - /* Config the BIST block */ - config_BIST(ctl, phy); - log_debug("BIST Config done.\n"); - - /* Train each byte */ - for (datx8 = 0; datx8 < nb_bytes; datx8++) { - if (ctrlc()) { - sprintf(string, "interrupted at byte %d/%d, error=%d", - datx8 + 1, nb_bytes, error); - return TEST_FAILED; - } - log_debug("\n======================\n"); - log_debug("Start deskew byte %d .\n", datx8); - log_debug("======================\n"); - /* Enable Byte (DXNGCR, bit DXEN) */ - setbits_le32(DXNGCR(phy, datx8), DDRPHYC_DXNGCR_DXEN); - - /* Select the byte lane for comparison of read data */ - BIST_datx8_sel(phy, datx8); - - /* Set all DQDLYn to maximum value. All bits within the byte - * will be delayed with DQSTR = 2 instead of max = 3 - * to avoid inter bits fail influence - */ - writel(0xAAAAAAAA, DXNDQTR(phy, datx8)); - - /* Set the DQS phase delay to 90 DEG (default). - * What is defined here is the index of the desired config - * in the PHASE array. - */ - phase_idx = _90deg; - - /* Set DQS unit delay to the max value. */ - dqs_unit_delay_index = MAX_DQS_UNIT_IDX; - DQS_unit_delay(phy, datx8, dqs_unit_delay_index); - DQS_phase_delay(phy, datx8, phase_idx); - - /* Issue a DLL soft reset */ - clrbits_le32(DXNDLLCR(phy, datx8), DDRPHYC_DXNDLLCR_DLLSRST); - setbits_le32(DXNDLLCR(phy, datx8), DDRPHYC_DXNDLLCR_DLLSRST); - - /* Test this typical init condition */ - BIST_test(phy, datx8, &result); - success = result.test_result; - - /* If the test pass in this typical condition, - * start the algo with it. - * Else, look for Pass init condition - */ - if (!success) { - log_debug("Fail at init condtion. Let's look for a good init condition.\n"); - success = 0; /* init */ - /* Make sure we start with a PASS condition before - * looking for a fail condition. - * Find the first PASS PHASE condition - */ - - /* escape if we find a PASS */ - log_debug("increase Phase idx\n"); - while (!success && (phase_idx <= MAX_DQS_PHASE_IDX)) { - DQS_phase_delay(phy, datx8, phase_idx); - BIST_test(phy, datx8, &result); - success = result.test_result; - phase_idx++; - } - /* if ended with success - * ==>> Restore the fist success condition - */ - if (success) - phase_idx--; /* because it ended with ++ */ - } - if (ctrlc()) { - sprintf(string, "interrupted at byte %d/%d, error=%d", - datx8 + 1, nb_bytes, error); - return TEST_FAILED; - } - /* We couldn't find a successful condition, its seems - * we have hold violation, lets try reduce DQS_unit Delay - */ - if (!success) { - /* We couldn't find a successful condition, its seems - * we have hold violation, lets try reduce DQS_unit - * Delay - */ - log_debug("Still fail. Try decrease DQS Unit delay\n"); - - phase_idx = 0; - dqs_unit_delay_index = 0; - DQS_phase_delay(phy, datx8, phase_idx); - - /* escape if we find a PASS */ - while (!success && - (dqs_unit_delay_index <= - MAX_DQS_UNIT_IDX)) { - DQS_unit_delay(phy, datx8, - dqs_unit_delay_index); - BIST_test(phy, datx8, &result); - success = result.test_result; - dqs_unit_delay_index++; - } - if (success) { - /* Restore the first success condition*/ - dqs_unit_delay_index--; - /* last_pass_dqs_unit = dqs_unit_delay_index;*/ - DQS_unit_delay(phy, datx8, - dqs_unit_delay_index); - } else { - /* No need to continue, - * there is no pass region. - */ - force_stop = 1; - } - } - - /* There is an initial PASS condition - * Look for the first failing condition by PHASE stepping. - * This part of the algo can finish without converging. - */ - if (force_stop) { - printf("Result: Failed "); - printf("[Cannot Deskew lines, "); - printf("there is no PASS region]\n"); - error++; - continue; - } - if (ctrlc()) { - sprintf(string, "interrupted at byte %d/%d, error=%d", - datx8 + 1, nb_bytes, error); - return TEST_FAILED; - } - - log_debug("there is a pass region for phase idx %d\n", - phase_idx); - log_debug("Step1: Find the first failing condition\n"); - /* Look for the first failing condition by PHASE stepping. - * This part of the algo can finish without converging. - */ - - /* escape if we find a fail (hold time violation) - * condition at any bit or if out of delay range. - */ - while (success && (phase_idx <= MAX_DQS_PHASE_IDX)) { - DQS_phase_delay(phy, datx8, phase_idx); - BIST_test(phy, datx8, &result); - success = result.test_result; - phase_idx++; - } - if (ctrlc()) { - sprintf(string, "interrupted at byte %d/%d, error=%d", - datx8 + 1, nb_bytes, error); - return TEST_FAILED; - } - - /* if the loop ended with a failing condition at any bit, - * lets look for the first previous success condition by unit - * stepping (minimal delay) - */ - if (!success) { - log_debug("Fail region (PHASE) found phase idx %d\n", - phase_idx); - log_debug("Let's look for first success by DQS Unit steps\n"); - /* This part, the algo always converge */ - phase_idx--; - - /* escape if we find a success condition - * or if out of delay range. - */ - while (!success && dqs_unit_delay_index >= 0) { - DQS_unit_delay(phy, datx8, - dqs_unit_delay_index); - BIST_test(phy, datx8, &result); - success = result.test_result; - dqs_unit_delay_index--; - } - /* if the loop ended with a success condition, - * the last delay Right OK (before hold violation) - * condition is then defined as following: - */ - if (success) { - /* Hold the dely parameters of the the last - * delay Right OK condition. - * -1 to get back to current condition - */ - last_right_ok.phase = phase_idx; - /*+1 to get back to current condition */ - last_right_ok.unit = dqs_unit_delay_index + 1; - last_right_ok.bits_delay = 0xFFFFFFFF; - log_debug("Found %d\n", dqs_unit_delay_index); - } else { - /* the last OK condition is then with the - * previous phase_idx. - * -2 instead of -1 because at the last - * iteration of the while(), - * we incremented phase_idx - */ - last_right_ok.phase = phase_idx - 1; - /* Nominal+1. Because we want the previous - * delay after reducing the phase delay. - */ - last_right_ok.unit = 1; - last_right_ok.bits_delay = 0xFFFFFFFF; - log_debug("Not Found : try previous phase %d\n", - phase_idx - 1); - - DQS_phase_delay(phy, datx8, phase_idx - 1); - dqs_unit_delay_index = 0; - success = true; - while (success && - (dqs_unit_delay_index < - MAX_DQS_UNIT_IDX)) { - DQS_unit_delay(phy, datx8, - dqs_unit_delay_index); - BIST_test(phy, datx8, &result); - success = result.test_result; - dqs_unit_delay_index++; - log_debug("dqs_unit_delay_index = %d, result = %d\n", - dqs_unit_delay_index, success); - } - - if (!success) { - last_right_ok.unit = - dqs_unit_delay_index - 1; - } else { - last_right_ok.unit = 0; - log_debug("ERROR: failed region not FOUND"); - } - } - } else { - /* we can't find a failing condition at all bits - * ==> Just hold the last test condition - * (the max DQS delay) - * which is the most likely, - * the closest to a hold violation - * If we can't find a Fail condition after - * the Pass region, stick at this position - * In order to have max chances to find a fail - * when reducing DQ delays. - */ - last_right_ok.phase = MAX_DQS_PHASE_IDX; - last_right_ok.unit = MAX_DQS_UNIT_IDX; - last_right_ok.bits_delay = 0xFFFFFFFF; - log_debug("Can't find the a fail condition\n"); - } - - /* step 2: - * if we arrive at this stage, it means that we found the last - * Right OK condition (by tweeking the DQS delay). Or we simply - * pushed DQS delay to the max - * This means that by reducing the delay on some DQ bits, - * we should find a failing condition. - */ - printf("Byte %d, DQS unit = %d, phase = %d\n", - datx8, last_right_ok.unit, last_right_ok.phase); - log_debug("Step2, unit = %d, phase = %d, bits delay=%x\n", - last_right_ok.unit, last_right_ok.phase, - last_right_ok.bits_delay); - - /* Restore the last_right_ok condtion. */ - DQS_unit_delay(phy, datx8, last_right_ok.unit); - DQS_phase_delay(phy, datx8, last_right_ok.phase); - writel(last_right_ok.bits_delay, DXNDQTR(phy, datx8)); - - /* train each bit - * reduce delay on each bit, and perform a write/read test - * and stop at the very first time it fails. - * the goal is the find the first failing condition - * for each bit. - * When we achieve this condition< for all the bits, - * we are sure they are aligned (+/- step resolution) - */ - fail_found = 0; - for (bit_i = 0; bit_i < 8; bit_i++) { - if (ctrlc()) { - sprintf(string, - "interrupted at byte %d/%d, error=%d", - datx8 + 1, nb_bytes, error); - return error; - } - log_debug("deskewing bit %d:\n", bit_i); - success = 1; /* init */ - /* Set all DQDLYn to maximum value. - * Only bit_i will be down-delayed - * ==> if we have a fail, it will be definitely - * from bit_i - */ - writel(0xFFFFFFFF, DXNDQTR(phy, datx8)); - /* Arriving at this stage, - * we have a success condition with delay = 3; - */ - bit_i_delay_index = 3; - - /* escape if bit delay is out of range or - * if a fatil occurs - */ - while ((bit_i_delay_index >= 0) && success) { - set_DQ_unit_delay(phy, datx8, - bit_i, - bit_i_delay_index); - BIST_test(phy, datx8, &result); - success = result.test_result; - bit_i_delay_index--; - } - - /* if escape with a fail condition - * ==> save this position for bit_i - */ - if (!success) { - /* save the delay position. - * Add 1 because the while loop ended with a --, - * and that we need to hold the last success - * delay - */ - deskew_delay[datx8][bit_i] = - bit_i_delay_index + 2; - if (deskew_delay[datx8][bit_i] > 3) - deskew_delay[datx8][bit_i] = 3; - - /* A flag that states we found at least a fail - * at one bit. - */ - fail_found = 1; - log_debug("Fail found on bit %d, for delay = %d => deskew[%d][%d] = %d\n", - bit_i, bit_i_delay_index + 1, - datx8, bit_i, - deskew_delay[datx8][bit_i]); - } else { - /* if we can find a success condition by - * back-delaying this bit, just set the delay - * to 0 (the best deskew - * possible) and mark the bit. - */ - deskew_delay[datx8][bit_i] = 0; - /* set a flag that will be used later - * in the report. - */ - deskew_non_converge[datx8][bit_i] = 1; - log_debug("Fail not found on bit %d => deskew[%d][%d] = %d\n", - bit_i, datx8, bit_i, - deskew_delay[datx8][bit_i]); - } - } - log_debug("**********byte %d tuning complete************\n", - datx8); - /* If we can't find any failure by back delaying DQ lines, - * hold the default values - */ - if (!fail_found) { - for (bit_i = 0; bit_i < 8; bit_i++) - deskew_delay[datx8][bit_i] = 0; - log_debug("The Deskew algorithm can't converge, there is too much margin in your design. Good job!\n"); - } - - apply_deskew_results(phy, datx8, deskew_delay, - deskew_non_converge); - /* Restore nominal value for DQS delay */ - DQS_phase_delay(phy, datx8, 3); - DQS_unit_delay(phy, datx8, 3); - /* disable byte after byte bits deskew */ - clrbits_le32(DXNGCR(phy, datx8), DDRPHYC_DXNGCR_DXEN); - } /* end of byte deskew */ - - /* re-enable all data bytes */ - setbits_le32(&phy->dx0gcr, DDRPHYC_DXNGCR_DXEN); - setbits_le32(&phy->dx1gcr, DDRPHYC_DXNGCR_DXEN); - setbits_le32(&phy->dx2gcr, DDRPHYC_DXNGCR_DXEN); - setbits_le32(&phy->dx3gcr, DDRPHYC_DXNGCR_DXEN); - - if (error) { - sprintf(string, "error = %d", error); - return TEST_FAILED; - } - - return TEST_PASSED; -} /* end function */ - -/* Trim DQS timings and set it in the centre of data eye. - * Look for a PPPPF region, then look for a FPPP region and finally select - * the mid of the FPPPPPF region - */ -static enum test_result eye_training(struct stm32mp1_ddrctl *ctl, - struct stm32mp1_ddrphy *phy, char *string) -{ - /*Stores the DQS trim values (PHASE index, unit index) */ - u8 eye_training_val[NUM_BYTES][2]; - u8 byte = 0; - struct BIST_result result; - s8 dqs_unit_delay_index = 0; - s8 phase_idx = 0; - s8 dqs_unit_delay_index_pass = 0; - s8 phase_idx_pass = 0; - u8 success = 0; - u8 left_phase_bound_found, right_phase_bound_found; - u8 left_unit_bound_found, right_unit_bound_found; - u8 left_bound_found, right_bound_found; - struct tuning_position left_bound, right_bound; - u8 error = 0; - u8 nb_bytes = get_nb_bytes(ctl); - - /*Disable DQS Drift Compensation*/ - clrbits_le32(&phy->pgcr, DDRPHYC_PGCR_DFTCMP); - /*Disable all bytes*/ - /* Disable automatic power down of DLL and IOs when disabling a byte - * (To avoid having to add programming and delay - * for a DLL re-lock when later re-enabling a disabled Byte Lane) - */ - clrbits_le32(&phy->pgcr, DDRPHYC_PGCR_PDDISDX); - - /*Disable all data bytes */ - clrbits_le32(&phy->dx0gcr, DDRPHYC_DXNGCR_DXEN); - clrbits_le32(&phy->dx1gcr, DDRPHYC_DXNGCR_DXEN); - clrbits_le32(&phy->dx2gcr, DDRPHYC_DXNGCR_DXEN); - clrbits_le32(&phy->dx3gcr, DDRPHYC_DXNGCR_DXEN); - - /* Config the BIST block */ - config_BIST(ctl, phy); - - for (byte = 0; byte < nb_bytes; byte++) { - if (ctrlc()) { - sprintf(string, "interrupted at byte %d/%d, error=%d", - byte + 1, nb_bytes, error); - return TEST_FAILED; - } - right_bound.phase = 0; - right_bound.unit = 0; - - left_bound.phase = 0; - left_bound.unit = 0; - - left_phase_bound_found = 0; - right_phase_bound_found = 0; - - left_unit_bound_found = 0; - right_unit_bound_found = 0; - - left_bound_found = 0; - right_bound_found = 0; - - /* Enable Byte (DXNGCR, bit DXEN) */ - setbits_le32(DXNGCR(phy, byte), DDRPHYC_DXNGCR_DXEN); - - /* Select the byte lane for comparison of read data */ - BIST_datx8_sel(phy, byte); - - /* Set DQS phase delay to the nominal value. */ - phase_idx = _90deg; - phase_idx_pass = phase_idx; - - /* Set DQS unit delay to the nominal value. */ - dqs_unit_delay_index = 3; - dqs_unit_delay_index_pass = dqs_unit_delay_index; - success = 0; - - log_debug("STEP0: Find Init delay\n"); - /* STEP0: Find Init delay: a delay that put the system - * in a "Pass" condition then (TODO) update - * dqs_unit_delay_index_pass & phase_idx_pass - */ - DQS_unit_delay(phy, byte, dqs_unit_delay_index); - DQS_phase_delay(phy, byte, phase_idx); - BIST_test(phy, byte, &result); - success = result.test_result; - /* If we have a fail in the nominal condition */ - if (!success) { - /* Look at the left */ - while (phase_idx >= 0 && !success) { - phase_idx--; - DQS_phase_delay(phy, byte, phase_idx); - BIST_test(phy, byte, &result); - success = result.test_result; - } - } - if (!success) { - /* if we can't find pass condition, - * then look at the right - */ - phase_idx = _90deg; - while (phase_idx <= MAX_DQS_PHASE_IDX && - !success) { - phase_idx++; - DQS_phase_delay(phy, byte, - phase_idx); - BIST_test(phy, byte, &result); - success = result.test_result; - } - } - /* save the pass condition */ - if (success) { - phase_idx_pass = phase_idx; - } else { - printf("Result: Failed "); - printf("[Cannot DQS timings, "); - printf("there is no PASS region]\n"); - error++; - continue; - } - - if (ctrlc()) { - sprintf(string, "interrupted at byte %d/%d, error=%d", - byte + 1, nb_bytes, error); - return TEST_FAILED; - } - log_debug("STEP1: Find LEFT PHASE DQS Bound\n"); - /* STEP1: Find LEFT PHASE DQS Bound */ - while ((phase_idx >= 0) && - (phase_idx <= MAX_DQS_PHASE_IDX) && - !left_phase_bound_found) { - DQS_unit_delay(phy, byte, - dqs_unit_delay_index); - DQS_phase_delay(phy, byte, - phase_idx); - BIST_test(phy, byte, &result); - success = result.test_result; - - /*TODO: Manage the case were at the beginning - * there is already a fail - */ - if (!success) { - /* the last pass condition */ - left_bound.phase = ++phase_idx; - left_phase_bound_found = 1; - } else if (success) { - phase_idx--; - } - } - if (!left_phase_bound_found) { - left_bound.phase = 0; - phase_idx = 0; - } - /* If not found, lets take 0 */ - - if (ctrlc()) { - sprintf(string, "interrupted at byte %d/%d, error=%d", - byte + 1, nb_bytes, error); - return TEST_FAILED; - } - log_debug("STEP2: Find UNIT left bound\n"); - /* STEP2: Find UNIT left bound */ - while ((dqs_unit_delay_index >= 0) && - !left_unit_bound_found) { - DQS_unit_delay(phy, byte, - dqs_unit_delay_index); - DQS_phase_delay(phy, byte, phase_idx); - BIST_test(phy, byte, &result); - success = result.test_result; - if (!success) { - left_bound.unit = - ++dqs_unit_delay_index; - left_unit_bound_found = 1; - left_bound_found = 1; - } else if (success) { - dqs_unit_delay_index--; - } - } - - /* If not found, lets take 0 */ - if (!left_unit_bound_found) - left_bound.unit = 0; - - if (ctrlc()) { - sprintf(string, "interrupted at byte %d/%d, error=%d", - byte + 1, nb_bytes, error); - return TEST_FAILED; - } - log_debug("STEP3: Find PHase right bound\n"); - /* STEP3: Find PHase right bound, start with "pass" - * condition - */ - - /* Set DQS phase delay to the pass value. */ - phase_idx = phase_idx_pass; - - /* Set DQS unit delay to the pass value. */ - dqs_unit_delay_index = dqs_unit_delay_index_pass; - - while ((phase_idx <= MAX_DQS_PHASE_IDX) && - !right_phase_bound_found) { - DQS_unit_delay(phy, byte, - dqs_unit_delay_index); - DQS_phase_delay(phy, byte, phase_idx); - BIST_test(phy, byte, &result); - success = result.test_result; - if (!success) { - /* the last pass condition */ - right_bound.phase = --phase_idx; - right_phase_bound_found = 1; - } else if (success) { - phase_idx++; - } - } - - /* If not found, lets take the max value */ - if (!right_phase_bound_found) { - right_bound.phase = MAX_DQS_PHASE_IDX; - phase_idx = MAX_DQS_PHASE_IDX; - } - - if (ctrlc()) { - sprintf(string, "interrupted at byte %d/%d, error=%d", - byte + 1, nb_bytes, error); - return TEST_FAILED; - } - log_debug("STEP4: Find UNIT right bound\n"); - /* STEP4: Find UNIT right bound */ - while ((dqs_unit_delay_index <= MAX_DQS_UNIT_IDX) && - !right_unit_bound_found) { - DQS_unit_delay(phy, byte, - dqs_unit_delay_index); - DQS_phase_delay(phy, byte, phase_idx); - BIST_test(phy, byte, &result); - success = result.test_result; - if (!success) { - right_bound.unit = - --dqs_unit_delay_index; - right_unit_bound_found = 1; - right_bound_found = 1; - } else if (success) { - dqs_unit_delay_index++; - } - } - /* If not found, lets take the max value */ - if (!right_unit_bound_found) - right_bound.unit = MAX_DQS_UNIT_IDX; - - /* If we found a regular FAil Pass FAil pattern - * FFPPPPPPFF - * OR PPPPPFF Or FFPPPPP - */ - - if (left_bound_found || right_bound_found) { - eye_training_val[byte][0] = (right_bound.phase + - left_bound.phase) / 2; - eye_training_val[byte][1] = (right_bound.unit + - left_bound.unit) / 2; - - /* If we already lost 1/2PHASE Tuning, - * let's try to recover by ++ on unit - */ - if (((right_bound.phase + left_bound.phase) % 2 == 1) && - eye_training_val[byte][1] != MAX_DQS_UNIT_IDX) - eye_training_val[byte][1]++; - log_debug("** found phase : %d - %d & unit %d - %d\n", - right_bound.phase, left_bound.phase, - right_bound.unit, left_bound.unit); - log_debug("** calculating mid region: phase: %d unit: %d (nominal is 3)\n", - eye_training_val[byte][0], - eye_training_val[byte][1]); - } else { - /* PPPPPPPPPP, we're already good. - * Set nominal values. - */ - eye_training_val[byte][0] = 3; - eye_training_val[byte][1] = 3; - } - DQS_phase_delay(phy, byte, eye_training_val[byte][0]); - DQS_unit_delay(phy, byte, eye_training_val[byte][1]); - - printf("Byte %d, DQS unit = %d, phase = %d\n", - byte, - eye_training_val[byte][1], - eye_training_val[byte][0]); - } - - if (error) { - sprintf(string, "error = %d", error); - return TEST_FAILED; - } - - return TEST_PASSED; -} - -static void display_reg_results(struct stm32mp1_ddrphy *phy, u8 byte) -{ - u8 i = 0; - - printf("Byte %d Dekew result, bit0 delay, bit1 delay...bit8 delay\n ", - byte); - - for (i = 0; i < 8; i++) - printf("%d ", DQ_unit_index(phy, byte, i)); - printf("\n"); - - printf("dxndllcr: [%08x] val:%08x\n", - DXNDLLCR(phy, byte), - readl(DXNDLLCR(phy, byte))); - printf("dxnqdstr: [%08x] val:%08x\n", - DXNDQSTR(phy, byte), - readl(DXNDQSTR(phy, byte))); - printf("dxndqtr: [%08x] val:%08x\n", - DXNDQTR(phy, byte), - readl(DXNDQTR(phy, byte))); -} - -/* analyse the dgs gating log table, and determine the midpoint.*/ -static u8 set_midpoint_read_dqs_gating(struct stm32mp1_ddrphy *phy, u8 byte, - u8 dqs_gating[NUM_BYTES] - [MAX_GSL_IDX + 1] - [MAX_GPS_IDX + 1]) -{ - /* stores the dqs gate values (gsl index, gps index) */ - u8 dqs_gate_values[NUM_BYTES][2]; - u8 gsl_idx, gps_idx = 0; - u8 left_bound_idx[2] = {0, 0}; - u8 right_bound_idx[2] = {0, 0}; - u8 left_bound_found = 0; - u8 right_bound_found = 0; - u8 intermittent = 0; - u8 value; - - for (gsl_idx = 0; gsl_idx <= MAX_GSL_IDX; gsl_idx++) { - for (gps_idx = 0; gps_idx <= MAX_GPS_IDX; gps_idx++) { - value = dqs_gating[byte][gsl_idx][gps_idx]; - if (value == 1 && left_bound_found == 0) { - left_bound_idx[0] = gsl_idx; - left_bound_idx[1] = gps_idx; - left_bound_found = 1; - } else if (value == 0 && - left_bound_found == 1 && - !right_bound_found) { - if (gps_idx == 0) { - right_bound_idx[0] = gsl_idx - 1; - right_bound_idx[1] = MAX_GPS_IDX; - } else { - right_bound_idx[0] = gsl_idx; - right_bound_idx[1] = gps_idx - 1; - } - right_bound_found = 1; - } else if (value == 1 && - right_bound_found == 1) { - intermittent = 1; - } - } - } - - /* if only ppppppp is found, there is no mid region. */ - if (left_bound_idx[0] == 0 && left_bound_idx[1] == 0 && - right_bound_idx[0] == 0 && right_bound_idx[1] == 0) - intermittent = 1; - - /*if we found a regular fail pass fail pattern ffppppppff - * or pppppff or ffppppp - */ - if (!intermittent) { - /*if we found a regular fail pass fail pattern ffppppppff - * or pppppff or ffppppp - */ - if (left_bound_found || right_bound_found) { - log_debug("idx0(%d): %d %d idx1(%d) : %d %d\n", - left_bound_found, - right_bound_idx[0], left_bound_idx[0], - right_bound_found, - right_bound_idx[1], left_bound_idx[1]); - dqs_gate_values[byte][0] = - (right_bound_idx[0] + left_bound_idx[0]) / 2; - dqs_gate_values[byte][1] = - (right_bound_idx[1] + left_bound_idx[1]) / 2; - /* if we already lost 1/2gsl tuning, - * let's try to recover by ++ on gps - */ - if (((right_bound_idx[0] + - left_bound_idx[0]) % 2 == 1) && - dqs_gate_values[byte][1] != MAX_GPS_IDX) - dqs_gate_values[byte][1]++; - /* if we already lost 1/2gsl tuning and gps is on max*/ - else if (((right_bound_idx[0] + - left_bound_idx[0]) % 2 == 1) && - dqs_gate_values[byte][1] == MAX_GPS_IDX) { - dqs_gate_values[byte][1] = 0; - dqs_gate_values[byte][0]++; - } - /* if we have gsl left and write limit too close - * (difference=1) - */ - if (((right_bound_idx[0] - left_bound_idx[0]) == 1)) { - dqs_gate_values[byte][1] = (left_bound_idx[1] + - right_bound_idx[1] + - 4) / 2; - if (dqs_gate_values[byte][1] >= 4) { - dqs_gate_values[byte][0] = - right_bound_idx[0]; - dqs_gate_values[byte][1] -= 4; - } else { - dqs_gate_values[byte][0] = - left_bound_idx[0]; - } - } - log_debug("*******calculating mid region: system latency: %d phase: %d********\n", - dqs_gate_values[byte][0], - dqs_gate_values[byte][1]); - log_debug("*******the nominal values were system latency: 0 phase: 2*******\n"); - } - } else { - /* if intermitant, restore defaut values */ - log_debug("dqs gating:no regular fail/pass/fail found. defaults values restored.\n"); - dqs_gate_values[byte][0] = 0; - dqs_gate_values[byte][1] = 2; - } - set_r0dgsl_delay(phy, byte, dqs_gate_values[byte][0]); - set_r0dgps_delay(phy, byte, dqs_gate_values[byte][1]); - printf("Byte %d, R0DGSL = %d, R0DGPS = %d\n", - byte, dqs_gate_values[byte][0], dqs_gate_values[byte][1]); - - /* return 0 if intermittent or if both left_bound - * and right_bound are not found - */ - return !(intermittent || (left_bound_found && right_bound_found)); -} - -static enum test_result read_dqs_gating(struct stm32mp1_ddrctl *ctl, - struct stm32mp1_ddrphy *phy, - char *string) -{ - /* stores the log of pass/fail */ - u8 dqs_gating[NUM_BYTES][MAX_GSL_IDX + 1][MAX_GPS_IDX + 1]; - u8 byte, gsl_idx, gps_idx = 0; - struct BIST_result result; - u8 success = 0; - u8 nb_bytes = get_nb_bytes(ctl); - - memset(dqs_gating, 0x0, sizeof(dqs_gating)); - - /*disable dqs drift compensation*/ - clrbits_le32(&phy->pgcr, DDRPHYC_PGCR_DFTCMP); - /*disable all bytes*/ - /* disable automatic power down of dll and ios when disabling a byte - * (to avoid having to add programming and delay - * for a dll re-lock when later re-enabling a disabled byte lane) - */ - clrbits_le32(&phy->pgcr, DDRPHYC_PGCR_PDDISDX); - - /* disable all data bytes */ - clrbits_le32(&phy->dx0gcr, DDRPHYC_DXNGCR_DXEN); - clrbits_le32(&phy->dx1gcr, DDRPHYC_DXNGCR_DXEN); - clrbits_le32(&phy->dx2gcr, DDRPHYC_DXNGCR_DXEN); - clrbits_le32(&phy->dx3gcr, DDRPHYC_DXNGCR_DXEN); - - /* config the bist block */ - config_BIST(ctl, phy); - - for (byte = 0; byte < nb_bytes; byte++) { - if (ctrlc()) { - sprintf(string, "interrupted at byte %d/%d", - byte + 1, nb_bytes); - return TEST_FAILED; - } - /* enable byte x (dxngcr, bit dxen) */ - setbits_le32(DXNGCR(phy, byte), DDRPHYC_DXNGCR_DXEN); - - /* select the byte lane for comparison of read data */ - BIST_datx8_sel(phy, byte); - for (gsl_idx = 0; gsl_idx <= MAX_GSL_IDX; gsl_idx++) { - for (gps_idx = 0; gps_idx <= MAX_GPS_IDX; gps_idx++) { - if (ctrlc()) { - sprintf(string, - "interrupted at byte %d/%d", - byte + 1, nb_bytes); - return TEST_FAILED; - } - /* write cfg to dxndqstr */ - set_r0dgsl_delay(phy, byte, gsl_idx); - set_r0dgps_delay(phy, byte, gps_idx); - - BIST_test(phy, byte, &result); - success = result.test_result; - if (success) - dqs_gating[byte][gsl_idx][gps_idx] = 1; - itm_soft_reset(phy); - } - } - set_midpoint_read_dqs_gating(phy, byte, dqs_gating); - /* dummy reads */ - readl(0xc0000000); - readl(0xc0000000); - } - - /* re-enable drift compensation */ - /* setbits_le32(&phy->pgcr, DDRPHYC_PGCR_DFTCMP); */ - return TEST_PASSED; -} - -/**************************************************************** - * TEST - **************************************************************** - */ -static enum test_result do_read_dqs_gating(struct stm32mp1_ddrctl *ctl, - struct stm32mp1_ddrphy *phy, - char *string, int argc, - char *argv[]) -{ - u32 rfshctl3 = readl(&ctl->rfshctl3); - u32 pwrctl = readl(&ctl->pwrctl); - u32 derateen = readl(&ctl->derateen); - enum test_result res; - - writel(0x0, &ctl->derateen); - stm32mp1_refresh_disable(ctl); - - res = read_dqs_gating(ctl, phy, string); - - stm32mp1_refresh_restore(ctl, rfshctl3, pwrctl); - writel(derateen, &ctl->derateen); - - return res; -} - -static enum test_result do_bit_deskew(struct stm32mp1_ddrctl *ctl, - struct stm32mp1_ddrphy *phy, - char *string, int argc, char *argv[]) -{ - u32 rfshctl3 = readl(&ctl->rfshctl3); - u32 pwrctl = readl(&ctl->pwrctl); - u32 derateen = readl(&ctl->derateen); - enum test_result res; - - writel(0x0, &ctl->derateen); - stm32mp1_refresh_disable(ctl); - - res = bit_deskew(ctl, phy, string); - - stm32mp1_refresh_restore(ctl, rfshctl3, pwrctl); - writel(derateen, &ctl->derateen); - - return res; -} - -static enum test_result do_eye_training(struct stm32mp1_ddrctl *ctl, - struct stm32mp1_ddrphy *phy, - char *string, int argc, char *argv[]) -{ - u32 rfshctl3 = readl(&ctl->rfshctl3); - u32 pwrctl = readl(&ctl->pwrctl); - u32 derateen = readl(&ctl->derateen); - enum test_result res; - - writel(0x0, &ctl->derateen); - stm32mp1_refresh_disable(ctl); - - res = eye_training(ctl, phy, string); - - stm32mp1_refresh_restore(ctl, rfshctl3, pwrctl); - writel(derateen, &ctl->derateen); - - return res; -} - -static enum test_result do_display(struct stm32mp1_ddrctl *ctl, - struct stm32mp1_ddrphy *phy, - char *string, int argc, char *argv[]) -{ - int byte; - u8 nb_bytes = get_nb_bytes(ctl); - - for (byte = 0; byte < nb_bytes; byte++) - display_reg_results(phy, byte); - - return TEST_PASSED; -} - -static enum test_result do_bist_config(struct stm32mp1_ddrctl *ctl, - struct stm32mp1_ddrphy *phy, - char *string, int argc, char *argv[]) -{ - unsigned long value; - - if (argc > 0) { - if (strict_strtoul(argv[0], 0, &value) < 0) { - sprintf(string, "invalid nbErr %s", argv[0]); - return TEST_FAILED; - } - BIST_error_max = value; - } - if (argc > 1) { - if (strict_strtoul(argv[1], 0, &value) < 0) { - sprintf(string, "invalid Seed %s", argv[1]); - return TEST_FAILED; - } - BIST_seed = value; - } - printf("Bist.nbErr = %d\n", BIST_error_max); - if (BIST_seed) - printf("Bist.Seed = 0x%x\n", BIST_seed); - else - printf("Bist.Seed = random\n"); - - return TEST_PASSED; -} - -/**************************************************************** - * TEST Description - **************************************************************** - */ - -const struct test_desc tuning[] = { - {do_read_dqs_gating, "Read DQS gating", - "software read DQS Gating", "", 0 }, - {do_bit_deskew, "Bit de-skew", "", "", 0 }, - {do_eye_training, "Eye Training", "or DQS training", "", 0 }, - {do_display, "Display registers", "", "", 0 }, - {do_bist_config, "Bist config", "[nbErr] [seed]", - "configure Bist test", 2}, -}; - -const int tuning_nb = ARRAY_SIZE(tuning); diff --git a/drivers/reset/reset-scmi.c b/drivers/reset/reset-scmi.c index 1bff8075ee365aa0b050a6ffe464c7249618ffce..ca0135a4203d65a503dc5af561d0cf65c851fbfe 100644 --- a/drivers/reset/reset-scmi.c +++ b/drivers/reset/reset-scmi.c @@ -2,6 +2,9 @@ /* * Copyright (C) 2019-2020 Linaro Limited */ + +#define LOG_CATEGORY UCLASS_RESET + #include #include #include diff --git a/drivers/serial/arm_dcc.c b/drivers/serial/arm_dcc.c index dfcb6fd698122d4f38174f4d75dff465c57043f5..a402a123b6d66c81d2689e960b54fb5e8b9f4265 100644 --- a/drivers/serial/arm_dcc.c +++ b/drivers/serial/arm_dcc.c @@ -51,7 +51,7 @@ #define status_dcc(x) \ __asm__ volatile ("mrc p14, 0, %0, c14, c0, 0\n" : "=r" (x)) -#elif defined(CONFIG_CPU_ARMV8) +#elif defined(CONFIG_ARM64) /* * ARMV8 */ diff --git a/drivers/serial/serial_efi.c b/drivers/serial/serial_efi.c index 33ddbd6080cf325ad70ccc3dcb4a12d199f07ca0..0067576389d16900af83cdbe6328bfb35fafdf09 100644 --- a/drivers/serial/serial_efi.c +++ b/drivers/serial/serial_efi.c @@ -24,6 +24,9 @@ struct serial_efi_priv { bool have_key; }; +/* Convert a lower-case character to its ctrl-char equivalent */ +#define CTL_CH(c) ((c) - 'a' + 1) + int serial_efi_setbrg(struct udevice *dev, int baudrate) { return 0; @@ -49,6 +52,7 @@ static int serial_efi_get_key(struct serial_efi_priv *priv) static int serial_efi_getc(struct udevice *dev) { struct serial_efi_priv *priv = dev_get_priv(dev); + char conv_scan[10] = {0, 'p', 'n', 'f', 'b', 'a', 'e', 0, 8}; int ret, ch; ret = serial_efi_get_key(priv); @@ -63,8 +67,11 @@ static int serial_efi_getc(struct udevice *dev) * key scan code of 8. Handle this so that backspace works correctly * in the U-Boot command line. */ - if (!ch && priv->key.scan_code == 8) - ch = 8; + if (!ch && priv->key.scan_code < sizeof(conv_scan)) { + ch = conv_scan[priv->key.scan_code]; + if (ch >= 'a') + ch -= 'a' - 1; + } debug(" [%x %x %x] ", ch, priv->key.unicode_char, priv->key.scan_code); return ch; diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c index 3c9a69598ad7ef88bf044ab926b468661a55608d..ca49ef73723b80f6142d59eb7a3204668f0f142a 100644 --- a/drivers/serial/serial_lpuart.c +++ b/drivers/serial/serial_lpuart.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include @@ -102,13 +103,9 @@ static void lpuart_write32(u32 flags, u32 *addr, u32 val) } -#ifndef CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_CLK_FREQ 0 -#endif - u32 __weak get_lpuart_clk(void) { - return CONFIG_SYS_CLK_FREQ; + return get_board_sys_clk(); } #if CONFIG_IS_ENABLED(CLK) diff --git a/drivers/serial/serial_mvebu_a3700.c b/drivers/serial/serial_mvebu_a3700.c index 93e4d38d34c7e3b35ffac5e5394db6766fb889ec..3e673bde57b824d1af4e5f5bedb3617c3c43c110 100644 --- a/drivers/serial/serial_mvebu_a3700.c +++ b/drivers/serial/serial_mvebu_a3700.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright (C) 2016 Stefan Roese + * Copyright (C) 2021 Pali Rohár */ #include diff --git a/drivers/spi/atmel-quadspi.c b/drivers/spi/atmel-quadspi.c index b1a3aa9a297397fc519834281e472af41ad44073..098298336da31dd50a8b580a97e42d37dc577d19 100644 --- a/drivers/spi/atmel-quadspi.c +++ b/drivers/spi/atmel-quadspi.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -32,6 +33,7 @@ #define QSPI_RD 0x0008 /* Receive Data Register */ #define QSPI_TD 0x000c /* Transmit Data Register */ #define QSPI_SR 0x0010 /* Status Register */ +#define QSPI_SR2 0x0024 /* SAMA7G5 Status Register */ #define QSPI_IER 0x0014 /* Interrupt Enable Register */ #define QSPI_IDR 0x0018 /* Interrupt Disable Register */ #define QSPI_IMR 0x001c /* Interrupt Mask Register */ @@ -46,6 +48,13 @@ #define QSPI_SMR 0x0040 /* Scrambling Mode Register */ #define QSPI_SKR 0x0044 /* Scrambling Key Register */ +#define QSPI_REFRESH 0x0050 /* Refresh Register */ +#define QSPI_WRACNT 0x0054 /* Write Access Counter Register */ +#define QSPI_DLLCFG 0x0058 /* DLL Configuration Register */ +#define QSPI_PCALCFG 0x005C /* Pad Calibration Configuration Register */ +#define QSPI_PCALBP 0x0060 /* Pad Calibration Bypass Register */ +#define QSPI_TOUT 0x0064 /* Timeout Register */ + #define QSPI_WPMR 0x00E4 /* Write Protection Mode Register */ #define QSPI_WPSR 0x00E8 /* Write Protection Status Register */ @@ -54,7 +63,14 @@ /* Bitfields in QSPI_CR (Control Register) */ #define QSPI_CR_QSPIEN BIT(0) #define QSPI_CR_QSPIDIS BIT(1) +#define QSPI_CR_DLLON BIT(2) +#define QSPI_CR_DLLOFF BIT(3) +#define QSPI_CR_STPCAL BIT(4) +#define QSPI_CR_SRFRSH BIT(5) #define QSPI_CR_SWRST BIT(7) +#define QSPI_CR_UPDCFG BIT(8) +#define QSPI_CR_STTFR BIT(9) +#define QSPI_CR_RTOUT BIT(10) #define QSPI_CR_LASTXFER BIT(24) /* Bitfields in QSPI_MR (Mode Register) */ @@ -62,12 +78,15 @@ #define QSPI_MR_LLB BIT(1) #define QSPI_MR_WDRBT BIT(2) #define QSPI_MR_SMRM BIT(3) +#define QSPI_MR_DQSDLYEN BIT(3) + #define QSPI_MR_CSMODE_MASK GENMASK(5, 4) #define QSPI_MR_CSMODE_NOT_RELOADED (0 << 4) #define QSPI_MR_CSMODE_LASTXFER (1 << 4) #define QSPI_MR_CSMODE_SYSTEMATICALLY (2 << 4) #define QSPI_MR_NBBITS_MASK GENMASK(11, 8) #define QSPI_MR_NBBITS(n) ((((n) - 8) << 8) & QSPI_MR_NBBITS_MASK) +#define QSPI_MR_OENSD BIT(15) #define QSPI_MR_DLYBCT_MASK GENMASK(23, 16) #define QSPI_MR_DLYBCT(n) (((n) << 16) & QSPI_MR_DLYBCT_MASK) #define QSPI_MR_DLYCS_MASK GENMASK(31, 24) @@ -81,6 +100,13 @@ #define QSPI_SR_CSR BIT(8) #define QSPI_SR_CSS BIT(9) #define QSPI_SR_INSTRE BIT(10) +#define QSPI_SR_LWRA BIT(11) +#define QSPI_SR_QITF BIT(12) +#define QSPI_SR_QITR BIT(13) +#define QSPI_SR_CSFA BIT(14) +#define QSPI_SR_CSRA BIT(15) +#define QSPI_SR_RFRSHD BIT(16) +#define QSPI_SR_TOUT BIT(17) #define QSPI_SR_QSPIENS BIT(24) #define QSPI_SR_CMD_COMPLETED (QSPI_SR_INSTRE | QSPI_SR_CSR) @@ -93,9 +119,22 @@ #define QSPI_SCR_DLYBS_MASK GENMASK(23, 16) #define QSPI_SCR_DLYBS(n) (((n) << 16) & QSPI_SCR_DLYBS_MASK) +/* Bitfields in QSPI_SR2 (SAMA7G5 Status Register) */ +#define QSPI_SR2_SYNCBSY BIT(0) +#define QSPI_SR2_QSPIENS BIT(1) +#define QSPI_SR2_CSS BIT(2) +#define QSPI_SR2_RBUSY BIT(3) +#define QSPI_SR2_HIDLE BIT(4) +#define QSPI_SR2_DLOCK BIT(5) +#define QSPI_SR2_CALBSY BIT(6) + +/* Bitfields in QSPI_IAR (Instruction Address Register) */ +#define QSPI_IAR_ADDR GENMASK(31, 0) + /* Bitfields in QSPI_ICR (Read/Write Instruction Code Register) */ #define QSPI_ICR_INST_MASK GENMASK(7, 0) #define QSPI_ICR_INST(inst) (((inst) << 0) & QSPI_ICR_INST_MASK) +#define QSPI_ICR_INST_MASK_SAMA7G5 GENMASK(15, 0) #define QSPI_ICR_OPT_MASK GENMASK(23, 16) #define QSPI_ICR_OPT(opt) (((opt) << 16) & QSPI_ICR_OPT_MASK) @@ -108,6 +147,9 @@ #define QSPI_IFR_WIDTH_QUAD_IO (4 << 0) #define QSPI_IFR_WIDTH_DUAL_CMD (5 << 0) #define QSPI_IFR_WIDTH_QUAD_CMD (6 << 0) +#define QSPI_IFR_WIDTH_OCT_OUTPUT (7 << 0) +#define QSPI_IFR_WIDTH_OCT_IO (8 << 0) +#define QSPI_IFR_WIDTH_OCT_CMD (9 << 0) #define QSPI_IFR_INSTEN BIT(4) #define QSPI_IFR_ADDREN BIT(5) #define QSPI_IFR_OPTEN BIT(6) @@ -118,19 +160,60 @@ #define QSPI_IFR_OPTL_4BIT (2 << 8) #define QSPI_IFR_OPTL_8BIT (3 << 8) #define QSPI_IFR_ADDRL BIT(10) +#define QSPI_IFR_ADDRL_SAMA7G5 GENMASK(11, 10) #define QSPI_IFR_TFRTYP_MEM BIT(12) #define QSPI_IFR_SAMA5D2_WRITE_TRSFR BIT(13) #define QSPI_IFR_CRM BIT(14) +#define QSPI_IFR_DDREN BIT(15) #define QSPI_IFR_NBDUM_MASK GENMASK(20, 16) #define QSPI_IFR_NBDUM(n) (((n) << 16) & QSPI_IFR_NBDUM_MASK) +#define QSPI_IFR_END BIT(22) +#define QSPI_IFR_SMRM BIT(23) #define QSPI_IFR_APBTFRTYP_READ BIT(24) /* Defined in SAM9X60 */ +#define QSPI_IFR_DQSEN BIT(25) +#define QSPI_IFR_DDRCMDEN BIT(26) +#define QSPI_IFR_HFWBEN BIT(27) +#define QSPI_IFR_PROTTYP GENMASK(29, 28) +#define QSPI_IFR_PROTTYP_STD_SPI 0 +#define QSPI_IFR_PROTTYP_TWIN_QUAD 1 +#define QSPI_IFR_PROTTYP_OCTAFLASH 2 +#define QSPI_IFR_PROTTYP_HYPERFLASH 3 /* Bitfields in QSPI_SMR (Scrambling Mode Register) */ #define QSPI_SMR_SCREN BIT(0) #define QSPI_SMR_RVDIS BIT(1) +#define QSPI_SMR_SCRKL BIT(2) + +/* Bitfields in QSPI_REFRESH (Refresh Register) */ +#define QSPI_REFRESH_DELAY_COUNTER GENMASK(31, 0) + +/* Bitfields in QSPI_WRACNT (Write Access Counter Register) */ +#define QSPI_WRACNT_NBWRA GENMASK(31, 0) + +/* Bitfields in QSPI_DLLCFG (DLL Configuration Register) */ +#define QSPI_DLLCFG_RANGE BIT(0) + +/* Bitfields in QSPI_PCALCFG (DLL Pad Calibration Configuration Register) */ +#define QSPI_PCALCFG_AAON BIT(0) +#define QSPI_PCALCFG_DAPCAL BIT(1) +#define QSPI_PCALCFG_DIFFPM BIT(2) +#define QSPI_PCALCFG_CLKDIV GENMASK(6, 4) +#define QSPI_PCALCFG_CALCNT GENMASK(16, 8) +#define QSPI_PCALCFG_CALP GENMASK(27, 24) +#define QSPI_PCALCFG_CALN GENMASK(31, 28) + +/* Bitfields in QSPI_PCALBP (DLL Pad Calibration Bypass Register) */ +#define QSPI_PCALBP_BPEN BIT(0) +#define QSPI_PCALBP_CALPBP GENMASK(11, 8) +#define QSPI_PCALBP_CALNBP GENMASK(19, 16) + +/* Bitfields in QSPI_TOUT (Timeout Register) */ +#define QSPI_TOUT_TCNTM GENMASK(15, 0) /* Bitfields in QSPI_WPMR (Write Protection Mode Register) */ #define QSPI_WPMR_WPEN BIT(0) +#define QSPI_WPMR_WPITEN BIT(1) +#define QSPI_WPMR_WPCREN BIT(2) #define QSPI_WPMR_WPKEY_MASK GENMASK(31, 8) #define QSPI_WPMR_WPKEY(wpkey) (((wpkey) << 8) & QSPI_WPMR_WPKEY_MASK) @@ -139,21 +222,61 @@ #define QSPI_WPSR_WPVSRC_MASK GENMASK(15, 8) #define QSPI_WPSR_WPVSRC(src) (((src) << 8) & QSPI_WPSR_WPVSRC) +#define ATMEL_QSPI_TIMEOUT 1000000 /* us */ +#define ATMEL_QSPI_SYNC_TIMEOUT 300000 /* us */ +#define QSPI_DLLCFG_THRESHOLD_FREQ 90000000U +#define QSPI_TOUT_MAX 0xffff + +/** + * struct atmel_qspi_pcal - Pad Calibration Clock Division + * @pclk_rate: peripheral clock rate. + * @pclkdiv: calibration clock division. The clock applied to the calibration + * cell is divided by pclkdiv + 1. + */ +struct atmel_qspi_pcal { + u32 pclk_rate; + u8 pclk_div; +}; + +#define ATMEL_QSPI_PCAL_ARRAY_SIZE 8 +static const struct atmel_qspi_pcal pcal[ATMEL_QSPI_PCAL_ARRAY_SIZE] = { + {25000000, 0}, + {50000000, 1}, + {75000000, 2}, + {100000000, 3}, + {125000000, 4}, + {150000000, 5}, + {175000000, 6}, + {200000000, 7}, +}; + struct atmel_qspi_caps { bool has_qspick; + bool has_gclk; bool has_ricr; + bool octal; }; +struct atmel_qspi_priv_ops; + struct atmel_qspi { void __iomem *regs; void __iomem *mem; resource_size_t mmap_size; const struct atmel_qspi_caps *caps; + const struct atmel_qspi_priv_ops *ops; struct udevice *dev; ulong bus_clk_rate; u32 mr; }; +struct atmel_qspi_priv_ops { + int (*set_cfg)(struct atmel_qspi *aq, const struct spi_mem_op *op, + u32 *offset); + int (*transfer)(struct atmel_qspi *aq, const struct spi_mem_op *op, + u32 offset); +}; + struct atmel_qspi_mode { u8 cmd_buswidth; u8 addr_buswidth; @@ -171,6 +294,19 @@ static const struct atmel_qspi_mode atmel_qspi_modes[] = { { 4, 4, 4, QSPI_IFR_WIDTH_QUAD_CMD }, }; +static const struct atmel_qspi_mode atmel_qspi_sama7g5_modes[] = { + { 1, 1, 1, QSPI_IFR_WIDTH_SINGLE_BIT_SPI }, + { 1, 1, 2, QSPI_IFR_WIDTH_DUAL_OUTPUT }, + { 1, 1, 4, QSPI_IFR_WIDTH_QUAD_OUTPUT }, + { 1, 2, 2, QSPI_IFR_WIDTH_DUAL_IO }, + { 1, 4, 4, QSPI_IFR_WIDTH_QUAD_IO }, + { 2, 2, 2, QSPI_IFR_WIDTH_DUAL_CMD }, + { 4, 4, 4, QSPI_IFR_WIDTH_QUAD_CMD }, + { 1, 1, 8, QSPI_IFR_WIDTH_OCT_OUTPUT }, + { 1, 8, 8, QSPI_IFR_WIDTH_OCT_IO }, + { 8, 8, 8, QSPI_IFR_WIDTH_OCT_CMD }, +}; + #ifdef VERBOSE_DEBUG static const char *atmel_qspi_reg_name(u32 offset, char *tmp, size_t sz) { @@ -180,7 +316,7 @@ static const char *atmel_qspi_reg_name(u32 offset, char *tmp, size_t sz) case QSPI_MR: return "MR"; case QSPI_RD: - return "MR"; + return "RD"; case QSPI_TD: return "TD"; case QSPI_SR: @@ -193,6 +329,8 @@ static const char *atmel_qspi_reg_name(u32 offset, char *tmp, size_t sz) return "IMR"; case QSPI_SCR: return "SCR"; + case QSPI_SR2: + return "SR2"; case QSPI_IAR: return "IAR"; case QSPI_ICR: @@ -205,6 +343,18 @@ static const char *atmel_qspi_reg_name(u32 offset, char *tmp, size_t sz) return "SMR"; case QSPI_SKR: return "SKR"; + case QSPI_REFRESH: + return "REFRESH"; + case QSPI_WRACNT: + return "WRACNT"; + case QSPI_DLLCFG: + return "DLLCFG"; + case QSPI_PCALCFG: + return "PCALCFG"; + case QSPI_PCALBP: + return "PCALBP"; + case QSPI_TOUT: + return "TOUT"; case QSPI_WPMR: return "WPMR"; case QSPI_WPSR: @@ -272,9 +422,29 @@ static int atmel_qspi_find_mode(const struct spi_mem_op *op) return -ENOTSUPP; } +static int atmel_qspi_sama7g5_find_mode(const struct spi_mem_op *op) +{ + u32 i; + + for (i = 0; i < ARRAY_SIZE(atmel_qspi_sama7g5_modes); i++) + if (atmel_qspi_is_compatible(op, &atmel_qspi_sama7g5_modes[i])) + return i; + + return -EOPNOTSUPP; +} + static bool atmel_qspi_supports_op(struct spi_slave *slave, const struct spi_mem_op *op) { + struct atmel_qspi *aq = dev_get_priv(slave->dev->parent); + + if (aq->caps->octal) { + if (atmel_qspi_sama7g5_find_mode(op) < 0) + return false; + else + return true; + } + if (atmel_qspi_find_mode(op) < 0) return false; @@ -397,24 +567,10 @@ static int atmel_qspi_set_cfg(struct atmel_qspi *aq, return 0; } -static int atmel_qspi_exec_op(struct spi_slave *slave, - const struct spi_mem_op *op) +static int atmel_qspi_transfer(struct atmel_qspi *aq, + const struct spi_mem_op *op, u32 offset) { - struct atmel_qspi *aq = dev_get_priv(slave->dev->parent); - u32 sr, imr, offset; - int err; - - /* - * Check if the address exceeds the MMIO window size. An improvement - * would be to add support for regular SPI mode and fall back to it - * when the flash memories overrun the controller's memory space. - */ - if (op->addr.val + op->data.nbytes > aq->mmap_size) - return -ENOTSUPP; - - err = atmel_qspi_set_cfg(aq, op, &offset); - if (err) - return err; + u32 sr, imr; /* Skip to the final steps if there is no data */ if (op->data.nbytes) { @@ -436,7 +592,341 @@ static int atmel_qspi_exec_op(struct spi_slave *slave, /* Poll INSTruction End and Chip Select Rise flags. */ imr = QSPI_SR_INSTRE | QSPI_SR_CSR; return readl_poll_timeout(aq->regs + QSPI_SR, sr, (sr & imr) == imr, - 1000000); + ATMEL_QSPI_TIMEOUT); +} + +static int atmel_qspi_reg_sync(struct atmel_qspi *aq) +{ + u32 val; + + return readl_poll_timeout(aq->regs + QSPI_SR2, val, + !(val & QSPI_SR2_SYNCBSY), + ATMEL_QSPI_SYNC_TIMEOUT); +} + +static int atmel_qspi_update_config(struct atmel_qspi *aq) +{ + int ret; + + ret = atmel_qspi_reg_sync(aq); + if (ret) + return ret; + atmel_qspi_write(QSPI_CR_UPDCFG, aq, QSPI_CR); + return atmel_qspi_reg_sync(aq); +} + +static int atmel_qspi_sama7g5_set_cfg(struct atmel_qspi *aq, + const struct spi_mem_op *op, u32 *offset) +{ + u32 iar, icr, ifr; + int mode, ret; + + iar = 0; + icr = FIELD_PREP(QSPI_ICR_INST_MASK_SAMA7G5, op->cmd.opcode); + ifr = QSPI_IFR_INSTEN; + + mode = atmel_qspi_sama7g5_find_mode(op); + if (mode < 0) + return mode; + ifr |= atmel_qspi_sama7g5_modes[mode].config; + + if (op->dummy.buswidth && op->dummy.nbytes) { + if (op->addr.dtr && op->dummy.dtr && op->data.dtr) + ifr |= QSPI_IFR_NBDUM(op->dummy.nbytes * 8 / + (2 * op->dummy.buswidth)); + else + ifr |= QSPI_IFR_NBDUM(op->dummy.nbytes * 8 / + op->dummy.buswidth); + } + + if (op->addr.buswidth && op->addr.nbytes) { + ifr |= FIELD_PREP(QSPI_IFR_ADDRL_SAMA7G5, op->addr.nbytes - 1) | + QSPI_IFR_ADDREN; + iar = FIELD_PREP(QSPI_IAR_ADDR, op->addr.val); + } + + if (op->addr.dtr && op->dummy.dtr && op->data.dtr) { + ifr |= QSPI_IFR_DDREN; + if (op->cmd.dtr) + ifr |= QSPI_IFR_DDRCMDEN; + ifr |= QSPI_IFR_DQSEN; + } + + if (op->cmd.buswidth == 8 || op->addr.buswidth == 8 || + op->data.buswidth == 8) + ifr |= FIELD_PREP(QSPI_IFR_PROTTYP, QSPI_IFR_PROTTYP_OCTAFLASH); + + /* offset of the data access in the QSPI memory space */ + *offset = iar; + + /* Set data enable */ + if (op->data.nbytes) { + ifr |= QSPI_IFR_DATAEN; + if (op->addr.nbytes) + ifr |= QSPI_IFR_TFRTYP_MEM; + } + + /* + * If the QSPI controller is set in regular SPI mode, set it in + * Serial Memory Mode (SMM). + */ + if (aq->mr != QSPI_MR_SMM) { + atmel_qspi_write(QSPI_MR_SMM | QSPI_MR_DQSDLYEN, aq, QSPI_MR); + ret = atmel_qspi_update_config(aq); + if (ret) + return ret; + aq->mr = QSPI_MR_SMM; + } + + /* Clear pending interrupts */ + (void)atmel_qspi_read(aq, QSPI_SR); + + /* Set QSPI Instruction Frame registers */ + if (op->addr.nbytes && !op->data.nbytes) + atmel_qspi_write(iar, aq, QSPI_IAR); + + if (op->data.dir == SPI_MEM_DATA_IN) { + atmel_qspi_write(icr, aq, QSPI_RICR); + } else { + atmel_qspi_write(icr, aq, QSPI_WICR); + if (op->data.nbytes) + atmel_qspi_write(FIELD_PREP(QSPI_WRACNT_NBWRA, + op->data.nbytes), + aq, QSPI_WRACNT); + } + + atmel_qspi_write(ifr, aq, QSPI_IFR); + + return atmel_qspi_update_config(aq); +} + +static int atmel_qspi_sama7g5_transfer(struct atmel_qspi *aq, + const struct spi_mem_op *op, u32 offset) +{ + int err; + u32 val; + + if (!op->data.nbytes) { + /* Start the transfer. */ + err = atmel_qspi_reg_sync(aq); + if (err) + return err; + atmel_qspi_write(QSPI_CR_STTFR, aq, QSPI_CR); + + return readl_poll_timeout(aq->regs + QSPI_SR, val, + val & QSPI_SR_CSRA, + ATMEL_QSPI_TIMEOUT); + } + + /* Send/Receive data. */ + if (op->data.dir == SPI_MEM_DATA_IN) { + memcpy_fromio(op->data.buf.in, aq->mem + offset, + op->data.nbytes); + + if (op->addr.nbytes) { + err = readl_poll_timeout(aq->regs + QSPI_SR2, val, + !(val & QSPI_SR2_RBUSY), + ATMEL_QSPI_SYNC_TIMEOUT); + if (err) + return err; + } + } else { + memcpy_toio(aq->mem + offset, op->data.buf.out, + op->data.nbytes); + + err = readl_poll_timeout(aq->regs + QSPI_SR, val, + val & QSPI_SR_LWRA, + ATMEL_QSPI_TIMEOUT); + if (err) + return err; + } + + /* Release the chip-select. */ + err = atmel_qspi_reg_sync(aq); + if (err) + return err; + atmel_qspi_write(QSPI_CR_LASTXFER, aq, QSPI_CR); + + return readl_poll_timeout(aq->regs + QSPI_SR, val, val & QSPI_SR_CSRA, + ATMEL_QSPI_TIMEOUT); +} + +static int atmel_qspi_exec_op(struct spi_slave *slave, + const struct spi_mem_op *op) +{ + struct atmel_qspi *aq = dev_get_priv(slave->dev->parent); + u32 offset; + int err; + + /* + * Check if the address exceeds the MMIO window size. An improvement + * would be to add support for regular SPI mode and fall back to it + * when the flash memories overrun the controller's memory space. + */ + if (op->addr.val + op->data.nbytes > aq->mmap_size) + return -ENOTSUPP; + + if (op->addr.nbytes > 4) + return -EOPNOTSUPP; + + err = aq->ops->set_cfg(aq, op, &offset); + if (err) + return err; + + return aq->ops->transfer(aq, op, offset); +} + +static int atmel_qspi_set_pad_calibration(struct udevice *bus, uint hz) +{ + struct atmel_qspi *aq = dev_get_priv(bus); + u32 status, val; + int i, ret; + u8 pclk_div = 0; + + for (i = 0; i < ATMEL_QSPI_PCAL_ARRAY_SIZE; i++) { + if (aq->bus_clk_rate <= pcal[i].pclk_rate) { + pclk_div = pcal[i].pclk_div; + break; + } + } + + /* + * Use the biggest divider in case the peripheral clock exceeds + * 200MHZ. + */ + if (aq->bus_clk_rate > pcal[ATMEL_QSPI_PCAL_ARRAY_SIZE - 1].pclk_rate) + pclk_div = pcal[ATMEL_QSPI_PCAL_ARRAY_SIZE - 1].pclk_div; + + /* Disable QSPI while configuring the pad calibration. */ + status = atmel_qspi_read(aq, QSPI_SR2); + if (status & QSPI_SR2_QSPIENS) { + ret = atmel_qspi_reg_sync(aq); + if (ret) + return ret; + atmel_qspi_write(QSPI_CR_QSPIDIS, aq, QSPI_CR); + } + + /* + * The analog circuitry is not shut down at the end of the calibration + * and the start-up time is only required for the first calibration + * sequence, thus increasing performance. Set the delay between the Pad + * calibration analog circuitry and the calibration request to 2us. + */ + atmel_qspi_write(QSPI_PCALCFG_AAON | + FIELD_PREP(QSPI_PCALCFG_CLKDIV, pclk_div) | + FIELD_PREP(QSPI_PCALCFG_CALCNT, + 2 * (aq->bus_clk_rate / 1000000)), + aq, QSPI_PCALCFG); + + /* DLL On + start calibration. */ + atmel_qspi_write(QSPI_CR_DLLON | QSPI_CR_STPCAL, aq, QSPI_CR); + ret = readl_poll_timeout(aq->regs + QSPI_SR2, val, + (val & QSPI_SR2_DLOCK) && + !(val & QSPI_SR2_CALBSY), + ATMEL_QSPI_TIMEOUT); + + /* Refresh analogic blocks every 1 ms.*/ + atmel_qspi_write(FIELD_PREP(QSPI_REFRESH_DELAY_COUNTER, hz / 1000), + aq, QSPI_REFRESH); + + return ret; +} + +static int atmel_qspi_set_gclk(struct udevice *bus, uint hz) +{ + struct atmel_qspi *aq = dev_get_priv(bus); + struct clk gclk; + u32 status, val; + int ret; + + /* Disable DLL before setting GCLK */ + status = atmel_qspi_read(aq, QSPI_SR2); + if (status & QSPI_SR2_DLOCK) { + atmel_qspi_write(QSPI_CR_DLLOFF, aq, QSPI_CR); + ret = readl_poll_timeout(aq->regs + QSPI_SR2, val, + !(val & QSPI_SR2_DLOCK), + ATMEL_QSPI_TIMEOUT); + if (ret) + return ret; + } + + if (hz > QSPI_DLLCFG_THRESHOLD_FREQ) + atmel_qspi_write(QSPI_DLLCFG_RANGE, aq, QSPI_DLLCFG); + else + atmel_qspi_write(0, aq, QSPI_DLLCFG); + + ret = clk_get_by_name(bus, "gclk", &gclk); + if (ret) { + dev_err(bus, "Missing QSPI generic clock\n"); + return ret; + } + + ret = clk_disable(&gclk); + if (ret) + dev_err(bus, "Failed to disable QSPI generic clock\n"); + + ret = clk_set_rate(&gclk, hz); + if (ret < 0) { + dev_err(bus, "Failed to set generic clock rate.\n"); + return ret; + } + + ret = clk_enable(&gclk); + if (ret) + dev_err(bus, "Failed to enable QSPI generic clock\n"); + clk_free(&gclk); + + return ret; +} + +static int atmel_qspi_sama7g5_set_speed(struct udevice *bus, uint hz) +{ + struct atmel_qspi *aq = dev_get_priv(bus); + u32 val; + int ret; + + ret = atmel_qspi_set_gclk(bus, hz); + if (ret) + return ret; + + if (aq->caps->octal) { + ret = atmel_qspi_set_pad_calibration(bus, hz); + if (ret) + return ret; + } else { + atmel_qspi_write(QSPI_CR_DLLON, aq, QSPI_CR); + ret = readl_poll_timeout(aq->regs + QSPI_SR2, val, + val & QSPI_SR2_DLOCK, + ATMEL_QSPI_TIMEOUT); + } + + /* Set the QSPI controller by default in Serial Memory Mode */ + atmel_qspi_write(QSPI_MR_SMM | QSPI_MR_DQSDLYEN, aq, QSPI_MR); + ret = atmel_qspi_update_config(aq); + if (ret) + return ret; + aq->mr = QSPI_MR_SMM; + + /* Enable the QSPI controller. */ + ret = atmel_qspi_reg_sync(aq); + if (ret) + return ret; + atmel_qspi_write(QSPI_CR_QSPIEN, aq, QSPI_CR); + ret = readl_poll_timeout(aq->regs + QSPI_SR2, val, + val & QSPI_SR2_QSPIENS, + ATMEL_QSPI_SYNC_TIMEOUT); + if (ret) + return ret; + + if (aq->caps->octal) + ret = readl_poll_timeout(aq->regs + QSPI_SR, val, + val & QSPI_SR_RFRSHD, + ATMEL_QSPI_TIMEOUT); + + atmel_qspi_write(FIELD_PREP(QSPI_TOUT_TCNTM, QSPI_TOUT_MAX), + aq, QSPI_TOUT); + + return ret; } static int atmel_qspi_set_speed(struct udevice *bus, uint hz) @@ -444,6 +934,9 @@ static int atmel_qspi_set_speed(struct udevice *bus, uint hz) struct atmel_qspi *aq = dev_get_priv(bus); u32 scr, scbr, mask, new_value; + if (aq->caps->has_gclk) + return atmel_qspi_sama7g5_set_speed(bus, hz); + /* Compute the QSPI baudrate */ scbr = DIV_ROUND_UP(aq->bus_clk_rate, hz); if (scbr > 0) @@ -480,6 +973,8 @@ static int atmel_qspi_set_mode(struct udevice *bus, uint mode) scr = (scr & ~mask) | new_value; atmel_qspi_write(scr, aq, QSPI_SCR); + if (aq->caps->has_gclk) + return atmel_qspi_update_config(aq); return 0; } @@ -487,7 +982,7 @@ static int atmel_qspi_set_mode(struct udevice *bus, uint mode) static int atmel_qspi_enable_clk(struct udevice *dev) { struct atmel_qspi *aq = dev_get_priv(dev); - struct clk pclk, qspick; + struct clk pclk, qspick, gclk; int ret; ret = clk_get_by_name(dev, "pclk", &pclk); @@ -517,6 +1012,17 @@ static int atmel_qspi_enable_clk(struct udevice *dev) if (ret) dev_err(dev, "Failed to enable QSPI system clock\n"); clk_free(&qspick); + } else if (aq->caps->has_gclk) { + ret = clk_get_by_name(dev, "gclk", &gclk); + if (ret) { + dev_err(dev, "Missing QSPI generic clock\n"); + goto free_pclk; + } + + ret = clk_enable(&gclk); + if (ret) + dev_err(dev, "Failed to enable QSPI system clock\n"); + clk_free(&gclk); } aq->bus_clk_rate = clk_get_rate(&pclk); @@ -529,8 +1035,18 @@ free_pclk: return ret; } -static void atmel_qspi_init(struct atmel_qspi *aq) +static int atmel_qspi_init(struct atmel_qspi *aq) { + int ret; + + if (aq->caps->has_gclk) { + ret = atmel_qspi_reg_sync(aq); + if (ret) + return ret; + atmel_qspi_write(QSPI_CR_SWRST, aq, QSPI_CR); + return 0; + } + /* Reset the QSPI controller */ atmel_qspi_write(QSPI_CR_SWRST, aq, QSPI_CR); @@ -540,8 +1056,20 @@ static void atmel_qspi_init(struct atmel_qspi *aq) /* Enable the QSPI controller */ atmel_qspi_write(QSPI_CR_QSPIEN, aq, QSPI_CR); + + return 0; } +static const struct atmel_qspi_priv_ops atmel_qspi_priv_ops = { + .set_cfg = atmel_qspi_set_cfg, + .transfer = atmel_qspi_transfer, +}; + +static const struct atmel_qspi_priv_ops atmel_qspi_sama7g5_priv_ops = { + .set_cfg = atmel_qspi_sama7g5_set_cfg, + .transfer = atmel_qspi_sama7g5_transfer, +}; + static int atmel_qspi_probe(struct udevice *dev) { struct atmel_qspi *aq = dev_get_priv(dev); @@ -554,6 +1082,11 @@ static int atmel_qspi_probe(struct udevice *dev) return -EINVAL; }; + if (aq->caps->has_gclk) + aq->ops = &atmel_qspi_sama7g5_priv_ops; + else + aq->ops = &atmel_qspi_priv_ops; + /* Map the registers */ ret = dev_read_resource_byname(dev, "qspi_base", &res); if (ret) { @@ -583,10 +1116,7 @@ static int atmel_qspi_probe(struct udevice *dev) return ret; aq->dev = dev; - - atmel_qspi_init(aq); - - return 0; + return atmel_qspi_init(aq); } static const struct spi_controller_mem_ops atmel_qspi_mem_ops = { @@ -607,6 +1137,15 @@ static const struct atmel_qspi_caps atmel_sam9x60_qspi_caps = { .has_ricr = true, }; +static const struct atmel_qspi_caps atmel_sama7g5_ospi_caps = { + .has_gclk = true, + .octal = true, +}; + +static const struct atmel_qspi_caps atmel_sama7g5_qspi_caps = { + .has_gclk = true, +}; + static const struct udevice_id atmel_qspi_ids[] = { { .compatible = "atmel,sama5d2-qspi", @@ -616,6 +1155,14 @@ static const struct udevice_id atmel_qspi_ids[] = { .compatible = "microchip,sam9x60-qspi", .data = (ulong)&atmel_sam9x60_qspi_caps, }, + { + .compatible = "microchip,sama7g5-ospi", + .data = (ulong)&atmel_sama7g5_ospi_caps, + }, + { + .compatible = "microchip,sama7g5-qspi", + .data = (ulong)&atmel_sama7g5_qspi_caps, + }, { /* sentinel */ } }; diff --git a/drivers/tee/optee/optee_msg.h b/drivers/tee/optee/optee_msg.h index 8d40ce60c2b884075e82aad419294d35bd60c717..a8ef926a480a6bf287550db10707947cd5037239 100644 --- a/drivers/tee/optee/optee_msg.h +++ b/drivers/tee/optee/optee_msg.h @@ -86,16 +86,6 @@ #define OPTEE_MSG_ATTR_CACHE_MASK GENMASK(2, 0) #define OPTEE_MSG_ATTR_CACHE_PREDEFINED 0 -/* - * Same values as TEE_LOGIN_* from TEE Internal API - */ -#define OPTEE_MSG_LOGIN_PUBLIC 0x00000000 -#define OPTEE_MSG_LOGIN_USER 0x00000001 -#define OPTEE_MSG_LOGIN_GROUP 0x00000002 -#define OPTEE_MSG_LOGIN_APPLICATION 0x00000004 -#define OPTEE_MSG_LOGIN_APPLICATION_USER 0x00000005 -#define OPTEE_MSG_LOGIN_APPLICATION_GROUP 0x00000006 - /* * Page size used in non-contiguous buffer entries */ @@ -279,7 +269,7 @@ struct optee_msg_arg { * parameters to pass the following information: * param[0].u.value.a-b uuid of Trusted Application * param[1].u.value.a-b uuid of Client - * param[1].u.value.c Login class of client OPTEE_MSG_LOGIN_* + * param[1].u.value.c Login class of client TEE_LOGIN_* * * OPTEE_MSG_CMD_INVOKE_COMMAND invokes a command a previously opened * session to a Trusted Application. struct optee_msg_arg::func is Trusted diff --git a/drivers/timer/ostm_timer.c b/drivers/timer/ostm_timer.c index 24813de265301b8efdb2fc04c05937160737ae63..3ec729d2c43a1eaee0a4ecb827646ed5b4fa5154 100644 --- a/drivers/timer/ostm_timer.c +++ b/drivers/timer/ostm_timer.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include @@ -51,7 +52,7 @@ static int ostm_probe(struct udevice *dev) clk_free(&clk); #else - uc_priv->clock_rate = CONFIG_SYS_CLK_FREQ / 2; + uc_priv->clock_rate = get_board_sys_clk() / 2; #endif readb(priv->regs + OSTM_CTL); diff --git a/drivers/usb/cdns3/cdns3-ti.c b/drivers/usb/cdns3/cdns3-ti.c index 43171678ee1772ef35990f0968884b184afec6e1..8958f0166bd5a5ee945d387017188761c5eb22b7 100644 --- a/drivers/usb/cdns3/cdns3-ti.c +++ b/drivers/usb/cdns3/cdns3-ti.c @@ -180,6 +180,7 @@ static int cdns_ti_remove(struct udevice *dev) static const struct udevice_id cdns_ti_of_match[] = { { .compatible = "ti,j721e-usb", }, + { .compatible = "ti,am64-usb", }, {}, }; diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index a58f87f479bcf6afad8cef245caa143abbda044c..cfa08b501bad6f67c8f1365fff893f0c037b01d7 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -14,6 +14,17 @@ config DM_VIDEO option compiles in the video uclass and routes all LCD/video access through this. +config VIDEO_LOGO + bool "Show the U-Boot logo on the display" + depends on DM_VIDEO + default y if !SPLASH_SCREEN + select VIDEO_BMP_RLE8 + help + This enables showing the U-Boot logo on the display when a video + device is probed. It appears at the top right. The logo itself is at + tools/logos/u-boot_logo.bmp and looks best when the display has a + black background. + config BACKLIGHT bool "Enable panel backlight uclass support" depends on DM_VIDEO diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 8956b5f9b00200cf4fc09b40cff478aba4834b09..4038395b12897ecd9b19b90765690447df91f008 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -17,6 +17,9 @@ obj-$(CONFIG_DM_VIDEO) += video_bmp.o obj-$(CONFIG_PANEL) += panel-uclass.o obj-$(CONFIG_DM_PANEL_HX8238D) += hx8238d.o obj-$(CONFIG_SIMPLE_PANEL) += simple_panel.o + +obj-$(CONFIG_VIDEO_LOGO) += u_boot_logo.o + endif obj-${CONFIG_EXYNOS_FB} += exynos/ diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c index 7df7d57e6ecccfae0e178626cc336348b3400605..52b109f1551062b22d0523919b35a2f0cf7afd41 100644 --- a/drivers/video/cfb_console.c +++ b/drivers/video/cfb_console.c @@ -42,11 +42,6 @@ * VIDEO_TSTC_FCT - keyboard_tstc function * VIDEO_GETC_FCT - keyboard_getc function * - * CONFIG_VIDEO_LOGO - display Linux Logo in upper left corner. - * Use CONFIG_SPLASH_SCREEN_ALIGN with - * environment variable "splashpos" to place - * the logo on other position. In this case - * no CONSOLE_EXTRA_INFO is possible. * CONFIG_VIDEO_BMP_LOGO - use bmp_logo instead of linux_logo * CONFIG_CONSOLE_EXTRA_INFO - display additional board information * strings that normaly goes to serial @@ -127,34 +122,6 @@ void console_cursor(int state); #define CURSOR_SET video_set_cursor() #endif /* CONFIG_VIDEO_SW_CURSOR */ -#ifdef CONFIG_VIDEO_LOGO -#ifdef CONFIG_VIDEO_BMP_LOGO -#include -#include -#define VIDEO_LOGO_WIDTH BMP_LOGO_WIDTH -#define VIDEO_LOGO_HEIGHT BMP_LOGO_HEIGHT -#define VIDEO_LOGO_LUT_OFFSET BMP_LOGO_OFFSET -#define VIDEO_LOGO_COLORS BMP_LOGO_COLORS - -#else /* CONFIG_VIDEO_BMP_LOGO */ -#define LINUX_LOGO_WIDTH 80 -#define LINUX_LOGO_HEIGHT 80 -#define LINUX_LOGO_COLORS 214 -#define LINUX_LOGO_LUT_OFFSET 0x20 -#define __initdata -#include -#define VIDEO_LOGO_WIDTH LINUX_LOGO_WIDTH -#define VIDEO_LOGO_HEIGHT LINUX_LOGO_HEIGHT -#define VIDEO_LOGO_LUT_OFFSET LINUX_LOGO_LUT_OFFSET -#define VIDEO_LOGO_COLORS LINUX_LOGO_COLORS -#endif /* CONFIG_VIDEO_BMP_LOGO */ -#define VIDEO_INFO_X (VIDEO_LOGO_WIDTH) -#define VIDEO_INFO_Y (VIDEO_FONT_HEIGHT/2) -#else /* CONFIG_VIDEO_LOGO */ -#define VIDEO_LOGO_WIDTH 0 -#define VIDEO_LOGO_HEIGHT 0 -#endif /* CONFIG_VIDEO_LOGO */ - #define VIDEO_COLS VIDEO_VISIBLE_COLS #define VIDEO_ROWS VIDEO_VISIBLE_ROWS #ifndef VIDEO_LINE_LEN @@ -163,11 +130,7 @@ void console_cursor(int state); #define VIDEO_SIZE (VIDEO_ROWS * VIDEO_LINE_LEN) #define VIDEO_BURST_LEN (VIDEO_COLS/8) -#ifdef CONFIG_VIDEO_LOGO -#define CONSOLE_ROWS ((VIDEO_ROWS - video_logo_height) / VIDEO_FONT_HEIGHT) -#else #define CONSOLE_ROWS (VIDEO_ROWS / VIDEO_FONT_HEIGHT) -#endif #define CONSOLE_COLS (VIDEO_COLS / VIDEO_FONT_WIDTH) #define CONSOLE_ROW_SIZE (VIDEO_FONT_HEIGHT * VIDEO_LINE_LEN) @@ -214,7 +177,7 @@ static GraphicDevice *pGD; /* Pointer to Graphic array */ static void *video_fb_address; /* frame buffer address */ static void *video_console_address; /* console buffer start address */ -static int video_logo_height = VIDEO_LOGO_HEIGHT; +static int video_logo_height; /* not supported anymore */ static int __maybe_unused cursor_state; static int __maybe_unused old_col; @@ -1670,292 +1633,6 @@ int video_display_bitmap(ulong bmp_image, int x, int y) } #endif - -#ifdef CONFIG_VIDEO_LOGO -static int video_logo_xpos; -static int video_logo_ypos; - -static void plot_logo_or_black(void *screen, int x, int y, int black); - -static void logo_plot(void *screen, int x, int y) -{ - plot_logo_or_black(screen, x, y, 0); -} - -static void logo_black(void) -{ - plot_logo_or_black(video_fb_address, video_logo_xpos, video_logo_ypos, - 1); -} - -static int do_clrlogo(struct cmd_tbl *cmdtp, int flag, int argc, - char *const argv[]) -{ - if (argc != 1) - return cmd_usage(cmdtp); - - logo_black(); - return 0; -} - -U_BOOT_CMD( - clrlogo, 1, 0, do_clrlogo, - "fill the boot logo area with black", - " " - ); - -static void plot_logo_or_black(void *screen, int x, int y, int black) -{ - - int xcount, i; - int skip = VIDEO_LINE_LEN - VIDEO_LOGO_WIDTH * VIDEO_PIXEL_SIZE; - int ycount = video_logo_height; - unsigned char r, g, b, *logo_red, *logo_blue, *logo_green; - unsigned char *source; - unsigned char *dest; - -#ifdef CONFIG_SPLASH_SCREEN_ALIGN - if (x == BMP_ALIGN_CENTER) - x = max(0, (int)(VIDEO_VISIBLE_COLS - VIDEO_LOGO_WIDTH) / 2); - else if (x < 0) - x = max(0, (int)(VIDEO_VISIBLE_COLS - VIDEO_LOGO_WIDTH + x + 1)); - - if (y == BMP_ALIGN_CENTER) - y = max(0, (int)(VIDEO_VISIBLE_ROWS - VIDEO_LOGO_HEIGHT) / 2); - else if (y < 0) - y = max(0, (int)(VIDEO_VISIBLE_ROWS - VIDEO_LOGO_HEIGHT + y + 1)); -#endif /* CONFIG_SPLASH_SCREEN_ALIGN */ - - dest = (unsigned char *)screen + y * VIDEO_LINE_LEN + x * VIDEO_PIXEL_SIZE; - -#ifdef CONFIG_VIDEO_BMP_LOGO - source = bmp_logo_bitmap; - - /* Allocate temporary space for computing colormap */ - logo_red = malloc(BMP_LOGO_COLORS); - logo_green = malloc(BMP_LOGO_COLORS); - logo_blue = malloc(BMP_LOGO_COLORS); - /* Compute color map */ - for (i = 0; i < VIDEO_LOGO_COLORS; i++) { - logo_red[i] = (bmp_logo_palette[i] & 0x0f00) >> 4; - logo_green[i] = (bmp_logo_palette[i] & 0x00f0); - logo_blue[i] = (bmp_logo_palette[i] & 0x000f) << 4; - } -#else - source = linux_logo; - logo_red = linux_logo_red; - logo_green = linux_logo_green; - logo_blue = linux_logo_blue; -#endif - - if (VIDEO_DATA_FORMAT == GDF__8BIT_INDEX) { - for (i = 0; i < VIDEO_LOGO_COLORS; i++) { - video_set_lut(i + VIDEO_LOGO_LUT_OFFSET, - logo_red[i], logo_green[i], - logo_blue[i]); - } - } - - while (ycount--) { -#if defined(VIDEO_FB_16BPP_PIXEL_SWAP) - int xpos = x; -#endif - xcount = VIDEO_LOGO_WIDTH; - while (xcount--) { - if (black) { - r = 0x00; - g = 0x00; - b = 0x00; - } else { - r = logo_red[*source - VIDEO_LOGO_LUT_OFFSET]; - g = logo_green[*source - VIDEO_LOGO_LUT_OFFSET]; - b = logo_blue[*source - VIDEO_LOGO_LUT_OFFSET]; - } - - switch (VIDEO_DATA_FORMAT) { - case GDF__8BIT_INDEX: - *dest = *source; - break; - case GDF__8BIT_332RGB: - *dest = ((r >> 5) << 5) | - ((g >> 5) << 2) | - (b >> 6); - break; - case GDF_15BIT_555RGB: -#if defined(VIDEO_FB_16BPP_PIXEL_SWAP) - fill_555rgb_pswap(dest, xpos++, r, g, b); -#else - *(unsigned short *) dest = - SWAP16((unsigned short) ( - ((r >> 3) << 10) | - ((g >> 3) << 5) | - (b >> 3))); -#endif - break; - case GDF_16BIT_565RGB: - *(unsigned short *) dest = - SWAP16((unsigned short) ( - ((r >> 3) << 11) | - ((g >> 2) << 5) | - (b >> 3))); - break; - case GDF_32BIT_X888RGB: - *(u32 *) dest = - SWAP32((u32) ( - (r << 16) | - (g << 8) | - b)); - break; - case GDF_24BIT_888RGB: -#ifdef VIDEO_FB_LITTLE_ENDIAN - dest[0] = b; - dest[1] = g; - dest[2] = r; -#else - dest[0] = r; - dest[1] = g; - dest[2] = b; -#endif - break; - } - source++; - dest += VIDEO_PIXEL_SIZE; - } - dest += skip; - } -#ifdef CONFIG_VIDEO_BMP_LOGO - free(logo_red); - free(logo_green); - free(logo_blue); -#endif -} - -static void *video_logo(void) -{ - char info[128]; - __maybe_unused int y_off = 0; - __maybe_unused ulong addr; - __maybe_unused char *s; - __maybe_unused int len, ret, space; - - splash_get_pos(&video_logo_xpos, &video_logo_ypos); - -#ifdef CONFIG_SPLASH_SCREEN - s = env_get("splashimage"); - if (s != NULL) { - ret = splash_screen_prepare(); - if (ret < 0) - return video_fb_address; - addr = hextoul(s, NULL); - - if (video_display_bitmap(addr, - video_logo_xpos, - video_logo_ypos) == 0) { - video_logo_height = 0; - return ((void *) (video_fb_address)); - } - } -#endif /* CONFIG_SPLASH_SCREEN */ - - logo_plot(video_fb_address, video_logo_xpos, video_logo_ypos); - -#ifdef CONFIG_SPLASH_SCREEN_ALIGN - /* - * when using splashpos for video_logo, skip any info - * output on video console if the logo is not at 0,0 - */ - if (video_logo_xpos || video_logo_ypos) { - /* - * video_logo_height is used in text and cursor offset - * calculations. Since the console is below the logo, - * we need to adjust the logo height - */ - if (video_logo_ypos == BMP_ALIGN_CENTER) - video_logo_height += max(0, (int)(VIDEO_VISIBLE_ROWS - - VIDEO_LOGO_HEIGHT) / 2); - else if (video_logo_ypos > 0) - video_logo_height += video_logo_ypos; - - return video_fb_address + video_logo_height * VIDEO_LINE_LEN; - } -#endif - if (board_cfb_skip()) - return 0; - - sprintf(info, " %s", version_string); - -#ifndef CONFIG_HIDE_LOGO_VERSION - space = (VIDEO_COLS - VIDEO_INFO_X) / VIDEO_FONT_WIDTH; - len = strlen(info); - - if (len > space) { - int xx = VIDEO_INFO_X, yy = VIDEO_INFO_Y; - uchar *p = (uchar *) info; - - while (len) { - if (len > space) { - video_drawchars(xx, yy, p, space); - len -= space; - - p = (uchar *)p + space; - - if (!y_off) { - xx += VIDEO_FONT_WIDTH; - space--; - } - yy += VIDEO_FONT_HEIGHT; - - y_off++; - } else { - video_drawchars(xx, yy, p, len); - len = 0; - } - } - } else - video_drawstring(VIDEO_INFO_X, VIDEO_INFO_Y, (uchar *) info); - -#ifdef CONFIG_CONSOLE_EXTRA_INFO - { - int i, n = - ((video_logo_height - - VIDEO_FONT_HEIGHT) / VIDEO_FONT_HEIGHT); - - for (i = 1; i < n; i++) { - video_get_info_str(i, info); - if (!*info) - continue; - - len = strlen(info); - if (len > space) { - video_drawchars(VIDEO_INFO_X, - VIDEO_INFO_Y + - (i + y_off) * - VIDEO_FONT_HEIGHT, - (uchar *) info, space); - y_off++; - video_drawchars(VIDEO_INFO_X + - VIDEO_FONT_WIDTH, - VIDEO_INFO_Y + - (i + y_off) * - VIDEO_FONT_HEIGHT, - (uchar *) info + space, - len - space); - } else { - video_drawstring(VIDEO_INFO_X, - VIDEO_INFO_Y + - (i + y_off) * - VIDEO_FONT_HEIGHT, - (uchar *) info); - } - } - } -#endif -#endif - - return (video_fb_address + video_logo_height * VIDEO_LINE_LEN); -} -#endif - static int cfb_fb_is_in_dram(void) { struct bd_info *bd = gd->bd; diff --git a/drivers/video/console_truetype.c b/drivers/video/console_truetype.c index 98427f4c618ccabf02115cfd393d79c9d604f61f..de8b86bbacc79b9e64ae1a659ab1496248caeb77 100644 --- a/drivers/video/console_truetype.c +++ b/drivers/video/console_truetype.c @@ -274,6 +274,27 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y, */ for (row = 0; row < height; row++) { switch (vid_priv->bpix) { + case VIDEO_BPP8: + if (IS_ENABLED(CONFIG_VIDEO_BPP8)) { + u8 *dst = line + xoff; + int i; + + for (i = 0; i < width; i++) { + int val = *bits; + int out; + + if (vid_priv->colour_bg) + val = 255 - val; + out = val; + if (vid_priv->colour_fg) + *dst++ |= out; + else + *dst++ &= out; + bits++; + } + end = dst; + } + break; #ifdef CONFIG_VIDEO_BPP16 case VIDEO_BPP16: { uint16_t *dst = (uint16_t *)line + xoff; diff --git a/drivers/video/sandbox_sdl.c b/drivers/video/sandbox_sdl.c index 5956b59ce49dff33ce5b1dec8f0cb22fde12d22e..9081c7da62e4b52f1e8009b9c54d338176192618 100644 --- a/drivers/video/sandbox_sdl.c +++ b/drivers/video/sandbox_sdl.c @@ -12,6 +12,7 @@ #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; @@ -43,27 +44,86 @@ static int sandbox_sdl_probe(struct udevice *dev) uc_priv->vidconsole_drv_name = plat->vidconsole_drv_name; uc_priv->font_size = plat->font_size; if (IS_ENABLED(CONFIG_VIDEO_COPY)) - uc_plat->copy_base = uc_plat->base - uc_plat->size / 2; + uc_plat->copy_base = uc_plat->base + uc_plat->size / 2; return 0; } -static int sandbox_sdl_bind(struct udevice *dev) +static void set_bpp(struct udevice *dev, enum video_log2_bpp l2bpp) { struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev); struct sandbox_sdl_plat *plat = dev_get_plat(dev); - int ret = 0; - plat->xres = dev_read_u32_default(dev, "xres", LCD_MAX_WIDTH); - plat->yres = dev_read_u32_default(dev, "yres", LCD_MAX_HEIGHT); - plat->bpix = dev_read_u32_default(dev, "log2-depth", VIDEO_BPP16); - plat->rot = dev_read_u32_default(dev, "rotate", 0); - uc_plat->size = plat->xres * plat->yres * (1 << plat->bpix) / 8; + plat->bpix = l2bpp; + + uc_plat->size = plat->xres * plat->yres * VNBYTES(plat->bpix); + + /* + * Set up to the maximum size we'll ever need. This is a strange case. + * The video memory is allocated by video_post_bind() called from + * board_init_r(). If a test changes the reoslution so it needs more + * memory later (with sandbox_sdl_set_bpp()), it is too late to make + * the frame buffer larger. + * + * So use a maximum size here. + */ + uc_plat->size = max(uc_plat->size, 1920U * 1080 * VNBYTES(VIDEO_BPP32)); /* Allow space for two buffers, the lower one being the copy buffer */ log_debug("Frame buffer size %x\n", uc_plat->size); + + /* + * If a copy framebuffer is used, double the size and use the last half + * as the copy, with the first half as the normal frame buffer. + */ if (IS_ENABLED(CONFIG_VIDEO_COPY)) uc_plat->size *= 2; +} + +int sandbox_sdl_set_bpp(struct udevice *dev, enum video_log2_bpp l2bpp) +{ + struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev); + int ret; + + if (device_active(dev)) + return -EINVAL; + sandbox_sdl_remove_display(); + + uc_plat->hide_logo = true; + set_bpp(dev, l2bpp); + + ret = device_probe(dev); + if (ret) + return ret; + + return 0; +} + +static int sandbox_sdl_remove(struct udevice *dev) +{ + /* + * Removing the display it a bit annoying when running unit tests, since + * they remove all devices. It is nice to be able to see what the test + * wrote onto the display. So this comment is just here to show how to + * do it, if we want to make it optional one day. + * + * sandbox_sdl_remove_display(); + */ + return 0; +} + +static int sandbox_sdl_bind(struct udevice *dev) +{ + struct sandbox_sdl_plat *plat = dev_get_plat(dev); + enum video_log2_bpp l2bpp; + int ret = 0; + + plat->xres = dev_read_u32_default(dev, "xres", LCD_MAX_WIDTH); + plat->yres = dev_read_u32_default(dev, "yres", LCD_MAX_HEIGHT); + l2bpp = dev_read_u32_default(dev, "log2-depth", VIDEO_BPP16); + plat->rot = dev_read_u32_default(dev, "rotate", 0); + + set_bpp(dev, l2bpp); return ret; } @@ -79,5 +139,6 @@ U_BOOT_DRIVER(sandbox_lcd_sdl) = { .of_match = sandbox_sdl_ids, .bind = sandbox_sdl_bind, .probe = sandbox_sdl_probe, + .remove = sandbox_sdl_remove, .plat_auto = sizeof(struct sandbox_sdl_plat), }; diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c index 65c882d9f125d0f62000cb84ae7c00db73973fbf..87e5fd54d9a801c55bdd5a4edf177589544c589e 100644 --- a/drivers/video/stm32/stm32_ltdc.c +++ b/drivers/video/stm32/stm32_ltdc.c @@ -459,7 +459,10 @@ static int stm32_ltdc_bind(struct udevice *dev) uc_plat->size = CONFIG_VIDEO_STM32_MAX_XRES * CONFIG_VIDEO_STM32_MAX_YRES * (CONFIG_VIDEO_STM32_MAX_BPP >> 3); - dev_dbg(dev, "frame buffer max size %d bytes\n", uc_plat->size); + /* align framebuffer on kernel MMU_SECTION_SIZE = max 2MB for LPAE */ + uc_plat->align = SZ_2M; + dev_dbg(dev, "frame buffer max size %d bytes align %x\n", + uc_plat->size, uc_plat->align); return 0; } diff --git a/drivers/video/u_boot_logo.bmp b/drivers/video/u_boot_logo.bmp new file mode 100644 index 0000000000000000000000000000000000000000..47f1e9b99789584d2f6dd71e954b51927b35d783 Binary files /dev/null and b/drivers/video/u_boot_logo.bmp differ diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c index 9f8cf6ef2a9f324705a869c6da831b25e389418e..7d499bcec51d222bbc75668278da2b21756f636e 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c @@ -228,6 +228,20 @@ void video_sync_all(void) } } +bool video_is_active(void) +{ + struct udevice *dev; + + for (uclass_find_first_device(UCLASS_VIDEO, &dev); + dev; + uclass_find_next_device(&dev)) { + if (device_active(dev)) + return true; + } + + return false; +} + int video_get_xsize(struct udevice *dev) { struct video_priv *priv = dev_get_uclass_priv(dev); @@ -265,10 +279,10 @@ int video_sync_copy(struct udevice *dev, void *from, void *to) */ if (offset < -priv->fb_size || offset > 2 * priv->fb_size) { #ifdef DEBUG - char str[80]; + char str[120]; snprintf(str, sizeof(str), - "[sync_copy fb=%p, from=%p, to=%p, offset=%lx]", + "[** FAULT sync_copy fb=%p, from=%p, to=%p, offset=%lx]", priv->fb, from, to, offset); console_puts_select_stderr(true, str); #endif @@ -305,23 +319,20 @@ int video_sync_copy_all(struct udevice *dev) #endif -/* Set up the colour map */ -static int video_pre_probe(struct udevice *dev) -{ - struct video_priv *priv = dev_get_uclass_priv(dev); +#define SPLASH_DECL(_name) \ + extern u8 __splash_ ## _name ## _begin[]; \ + extern u8 __splash_ ## _name ## _end[] - priv->cmap = calloc(256, sizeof(ushort)); - if (!priv->cmap) - return -ENOMEM; +#define SPLASH_START(_name) __splash_ ## _name ## _begin - return 0; -} +SPLASH_DECL(u_boot_logo); -static int video_pre_remove(struct udevice *dev) +static int show_splash(struct udevice *dev) { - struct video_priv *priv = dev_get_uclass_priv(dev); + u8 *data = SPLASH_START(u_boot_logo); + int ret; - free(priv->cmap); + ret = video_bmp_display(dev, map_to_sysmem(data), -4, 4, true); return 0; } @@ -391,6 +402,14 @@ static int video_post_probe(struct udevice *dev) return ret; } + if (IS_ENABLED(CONFIG_VIDEO_LOGO) && !plat->hide_logo) { + ret = show_splash(dev); + if (ret) { + log_debug("Cannot show splash screen\n"); + return ret; + } + } + return 0; }; @@ -433,9 +452,7 @@ UCLASS_DRIVER(video) = { .name = "video", .flags = DM_UC_FLAG_SEQ_ALIAS, .post_bind = video_post_bind, - .pre_probe = video_pre_probe, .post_probe = video_post_probe, - .pre_remove = video_pre_remove, .priv_auto = sizeof(struct video_uc_priv), .per_device_auto = sizeof(struct video_priv), .per_device_plat_auto = sizeof(struct video_uc_plat), diff --git a/drivers/video/video_bmp.c b/drivers/video/video_bmp.c index 1e6f07ff4b054b448c83600f8eeaabab2189ef2b..e8600b2def3c79684c10dbe3baa01bbe19ae9572 100644 --- a/drivers/video/video_bmp.c +++ b/drivers/video/video_bmp.c @@ -13,34 +13,90 @@ #include #include -#ifdef CONFIG_VIDEO_BMP_RLE8 #define BMP_RLE8_ESCAPE 0 #define BMP_RLE8_EOL 0 #define BMP_RLE8_EOBMP 1 #define BMP_RLE8_DELTA 2 -static void draw_unencoded_bitmap(ushort **fbp, uchar *bmap, ushort *cmap, +/** + * get_bmp_col_16bpp() - Convert a colour-table entry into a 16bpp pixel value + * + * @return value to write to the 16bpp frame buffer for this palette entry + */ +static uint get_bmp_col_16bpp(struct bmp_color_table_entry cte) +{ + return ((cte.red << 8) & 0xf800) | + ((cte.green << 3) & 0x07e0) | + ((cte.blue >> 3) & 0x001f); +} + +/** + * write_pix8() - Write a pixel from a BMP image into the framebuffer + * + * This handles frame buffers with 8, 16, 24 or 32 bits per pixel + * + * @fb: Place in frame buffer to update + * @bpix: Frame buffer bits-per-pixel, which controls how many bytes are written + * @palette: BMP palette table + * @bmap: Pointer to BMP bitmap position to write. This contains a single byte + * which is either written directly (bpix == 8) or used to look up the + * palette to get a colour to write + */ +static void write_pix8(u8 *fb, uint bpix, struct bmp_color_table_entry *palette, + u8 *bmap) +{ + if (bpix == 8) { + *fb++ = *bmap; + } else if (bpix == 16) { + *(u16 *)fb = get_bmp_col_16bpp(palette[*bmap]); + } else { + /* Only support big endian */ + struct bmp_color_table_entry *cte = &palette[*bmap]; + + if (bpix == 24) { + *fb++ = cte->red; + *fb++ = cte->green; + *fb++ = cte->blue; + } else { + *fb++ = cte->blue; + *fb++ = cte->green; + *fb++ = cte->red; + *fb++ = 0; + } + } +} + +static void draw_unencoded_bitmap(u8 **fbp, uint bpix, uchar *bmap, + struct bmp_color_table_entry *palette, int cnt) { + u8 *fb = *fbp; + while (cnt > 0) { - *(*fbp)++ = cmap[*bmap++]; + write_pix8(fb, bpix, palette, bmap++); + fb += bpix / 8; cnt--; } + *fbp = fb; } -static void draw_encoded_bitmap(ushort **fbp, ushort col, int cnt) +static void draw_encoded_bitmap(u8 **fbp, uint bpix, + struct bmp_color_table_entry *palette, u8 *bmap, + int cnt) { - ushort *fb = *fbp; + u8 *fb = *fbp; while (cnt > 0) { - *fb++ = col; + write_pix8(fb, bpix, palette, bmap); + fb += bpix / 8; cnt--; } *fbp = fb; } static void video_display_rle8_bitmap(struct udevice *dev, - struct bmp_image *bmp, ushort *cmap, + struct bmp_image *bmp, uint bpix, + struct bmp_color_table_entry *palette, uchar *fb, int x_off, int y_off, ulong width, ulong height) { @@ -49,6 +105,7 @@ static void video_display_rle8_bitmap(struct udevice *dev, ulong cnt, runlen; int x, y; int decode = 1; + uint bytes_per_pixel = bpix / 8; debug("%s\n", __func__); bmap = (uchar *)bmp + get_unaligned_le32(&bmp->header.data_offset); @@ -64,8 +121,8 @@ static void video_display_rle8_bitmap(struct udevice *dev, bmap += 2; x = 0; y--; - /* 16bpix, 2-byte per pixel, width should *2 */ - fb -= (width * 2 + priv->line_length); + fb -= width * bytes_per_pixel + + priv->line_length; break; case BMP_RLE8_EOBMP: /* end of bitmap */ @@ -75,9 +132,9 @@ static void video_display_rle8_bitmap(struct udevice *dev, /* delta run */ x += bmap[2]; y -= bmap[3]; - /* 16bpix, 2-byte per pixel, x should *2 */ - fb = (uchar *)(priv->fb + (y + y_off - 1) - * priv->line_length + (x + x_off) * 2); + fb = (uchar *)(priv->fb + + (y + y_off - 1) * priv->line_length + + (x + x_off) * bytes_per_pixel); bmap += 4; break; default: @@ -91,8 +148,8 @@ static void video_display_rle8_bitmap(struct udevice *dev, else cnt = runlen; draw_unencoded_bitmap( - (ushort **)&fb, - bmap, cmap, cnt); + &fb, bpix, + bmap, palette, cnt); } x += runlen; } @@ -116,8 +173,8 @@ static void video_display_rle8_bitmap(struct udevice *dev, cnt = width - x; else cnt = runlen; - draw_encoded_bitmap((ushort **)&fb, - cmap[bmap[1]], cnt); + draw_encoded_bitmap(&fb, bpix, palette, + &bmap[1], cnt); } x += runlen; } @@ -125,20 +182,6 @@ static void video_display_rle8_bitmap(struct udevice *dev, } } } -#endif - -__weak void fb_put_byte(uchar **fb, uchar **from) -{ - *(*fb)++ = *(*from)++; -} - -#if defined(CONFIG_BMP_16BPP) -__weak void fb_put_word(uchar **fb, uchar **from) -{ - *(*fb)++ = *(*from)++; - *(*fb)++ = *(*from)++; -} -#endif /* CONFIG_BMP_16BPP */ /** * video_splash_align_axis() - Align a single coordinate @@ -169,28 +212,10 @@ static void video_splash_align_axis(int *axis, unsigned long panel_size, *axis = max(0, (int)axis_alignment); } -static void video_set_cmap(struct udevice *dev, - struct bmp_color_table_entry *cte, unsigned colours) -{ - struct video_priv *priv = dev_get_uclass_priv(dev); - int i; - ushort *cmap = priv->cmap; - - debug("%s: colours=%d\n", __func__, colours); - for (i = 0; i < colours; ++i) { - *cmap = ((cte->red << 8) & 0xf800) | - ((cte->green << 3) & 0x07e0) | - ((cte->blue >> 3) & 0x001f); - cmap++; - cte++; - } -} - int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, bool align) { struct video_priv *priv = dev_get_uclass_priv(dev); - ushort *cmap_base = NULL; int i, j; uchar *start, *fb; struct bmp_image *bmp = map_sysmem(bmp_image, 0); @@ -246,9 +271,6 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, debug("Display-bmp: %d x %d with %d colours, display %d\n", (int)width, (int)height, (int)colours, 1 << bpix); - if (bmp_bpix == 8) - video_set_cmap(dev, palette, colours); - padded_width = (width & 0x3 ? (width & ~0x3) + 4 : width); if (align) { @@ -270,23 +292,19 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, switch (bmp_bpix) { case 1: - case 8: { - struct bmp_color_table_entry *cte; - cmap_base = priv->cmap; -#ifdef CONFIG_VIDEO_BMP_RLE8 - u32 compression = get_unaligned_le32(&bmp->header.compression); - debug("compressed %d %d\n", compression, BMP_BI_RLE8); - if (compression == BMP_BI_RLE8) { - if (bpix != 16) { - /* TODO implement render code for bpix != 16 */ - printf("Error: only support 16 bpix"); - return -EPROTONOSUPPORT; + case 8: + if (IS_ENABLED(CONFIG_VIDEO_BMP_RLE8)) { + u32 compression = get_unaligned_le32( + &bmp->header.compression); + debug("compressed %d %d\n", compression, BMP_BI_RLE8); + if (compression == BMP_BI_RLE8) { + video_display_rle8_bitmap(dev, bmp, bpix, palette, fb, + x, y, width, height); + break; } - video_display_rle8_bitmap(dev, bmp, cmap_base, fb, x, - y, width, height); - break; } -#endif + + /* Not compressed */ byte_width = width * (bpix / 8); if (!byte_width) byte_width = width; @@ -294,81 +312,64 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, for (i = 0; i < height; ++i) { WATCHDOG_RESET(); for (j = 0; j < width; j++) { - if (bpix == 8) { - fb_put_byte(&fb, &bmap); - } else if (bpix == 16) { - *(uint16_t *)fb = cmap_base[*bmap]; - bmap++; - fb += sizeof(uint16_t) / sizeof(*fb); - } else { - /* Only support big endian */ - cte = &palette[*bmap]; - bmap++; - if (bpix == 24) { - *(fb++) = cte->red; - *(fb++) = cte->green; - *(fb++) = cte->blue; - } else { - *(fb++) = cte->blue; - *(fb++) = cte->green; - *(fb++) = cte->red; - *(fb++) = 0; - } - } + write_pix8(fb, bpix, palette, bmap); + bmap++; + fb += bpix / 8; } bmap += (padded_width - width); fb -= byte_width + priv->line_length; } break; - } -#if defined(CONFIG_BMP_16BPP) case 16: - for (i = 0; i < height; ++i) { - WATCHDOG_RESET(); - for (j = 0; j < width; j++) - fb_put_word(&fb, &bmap); - - bmap += (padded_width - width); - fb -= width * 2 + priv->line_length; + if (IS_ENABLED(CONFIG_BMP_16BPP)) { + for (i = 0; i < height; ++i) { + WATCHDOG_RESET(); + for (j = 0; j < width; j++) { + *fb++ = *bmap++; + *fb++ = *bmap++; + } + bmap += (padded_width - width); + fb -= width * 2 + priv->line_length; + } } break; -#endif /* CONFIG_BMP_16BPP */ -#if defined(CONFIG_BMP_24BPP) case 24: - for (i = 0; i < height; ++i) { - for (j = 0; j < width; j++) { - if (bpix == 16) { - /* 16bit 555RGB format */ - *(u16 *)fb = ((bmap[2] >> 3) << 10) | - ((bmap[1] >> 3) << 5) | - (bmap[0] >> 3); - bmap += 3; - fb += 2; - } else { - *(fb++) = *(bmap++); - *(fb++) = *(bmap++); - *(fb++) = *(bmap++); - *(fb++) = 0; + if (IS_ENABLED(CONFIG_BMP_24BPP)) { + for (i = 0; i < height; ++i) { + for (j = 0; j < width; j++) { + if (bpix == 16) { + /* 16bit 565RGB format */ + *(u16 *)fb = ((bmap[2] >> 3) + << 11) | + ((bmap[1] >> 2) << 5) | + (bmap[0] >> 3); + bmap += 3; + fb += 2; + } else { + *fb++ = *bmap++; + *fb++ = *bmap++; + *fb++ = *bmap++; + *fb++ = 0; + } } + fb -= priv->line_length + width * (bpix / 8); + bmap += (padded_width - width); } - fb -= priv->line_length + width * (bpix / 8); - bmap += (padded_width - width); } break; -#endif /* CONFIG_BMP_24BPP */ -#if defined(CONFIG_BMP_32BPP) case 32: - for (i = 0; i < height; ++i) { - for (j = 0; j < width; j++) { - *(fb++) = *(bmap++); - *(fb++) = *(bmap++); - *(fb++) = *(bmap++); - *(fb++) = *(bmap++); + if (IS_ENABLED(CONFIG_BMP_32BPP)) { + for (i = 0; i < height; ++i) { + for (j = 0; j < width; j++) { + *fb++ = *bmap++; + *fb++ = *bmap++; + *fb++ = *bmap++; + *fb++ = *bmap++; + } + fb -= priv->line_length + width * (bpix / 8); } - fb -= priv->line_length + width * (bpix / 8); } break; -#endif /* CONFIG_BMP_32BPP */ default: break; }; diff --git a/dts/Kconfig b/dts/Kconfig index b7c4a2fec0316ea3d5a8e0a53a0bb557e22db8fd..fb7df533f9238680d1e12884998d5e1a78e83946 100644 --- a/dts/Kconfig +++ b/dts/Kconfig @@ -16,24 +16,6 @@ config BINMAN bool select DTOC -config BINMAN_STANDALONE_FDT - bool - depends on BINMAN - default y if OF_BOARD - help - This option tells U-Boot build system that a standalone device tree - source is explicitly required when using binman to package U-Boot. - - This is not necessary in a common scenario where a device tree source - that contains the binman node is provided in the arch//dts - directory for a specific board. Such device tree sources are built for - OF_SEPARATE or OF_EMBED. However for a scenario like the board device - tree blob is not provided in the U-Boot build tree, but fed to U-Boot - in the runtime, e.g.: in the OF_BOARD case that it is passed by - a prior stage bootloader. For such scenario, a standalone device tree - blob containing binman node to describe how to package U-Boot should - be provided explicitly. - menu "Device Tree Control" depends on SUPPORT_OF_CONTROL @@ -97,11 +79,9 @@ config OF_LIVE choice prompt "Provider of DTB for DT control" depends on OF_CONTROL - default OF_BOARD if SANDBOX config OF_SEPARATE bool "Separate DTB for DT control" - depends on !SANDBOX help If this option is enabled, the device tree will be built and placed as a separate u-boot.dtb file alongside the U-Boot image. @@ -114,14 +94,50 @@ config OF_EMBED and development only and is not recommended for production devices. Boards in the mainline U-Boot tree should not use it. +endchoice + config OF_BOARD bool "Provided by the board (e.g a previous loader) at runtime" + default y if SANDBOX || OF_HAS_PRIOR_STAGE help - If this option is enabled, the device tree will be provided by - the board at runtime if the board supports it, instead of being - bundled with the image. + If this option is enabled, the device tree is provided at runtime by + a custom function called board_fdt_blob_setup(). The board must + implement this function if it wishes to provide special behaviour. -endchoice + With this option, the device tree build by U-Boot may be overridden or + ignored. See OF_HAS_PRIOR_STAGE. + + Note: Boards which use this to handle a device tree passed from an + earlier stage should enable OF_HAS_PRIOR_STAGE. + +config OF_HAS_PRIOR_STAGE + bool + help + Indicates that a prior stage of the firmware (before U-Boot proper) + makes use of device tree and this board normally boots with that prior + stage, that provides a devicetree to U-Boot. + + This means that the device tree built in U-Boot should not be packaged + in the firmware image. Instead, the prior stage's device tree should + be so packaged. At runtime, the prior stage reads this, does any + necessary fix-ups, then passes it to U-Boot. See OF_BOARD. + + This option does not preclude using the U-Boot device tree, e.g. for + development purposes, but it is not recommended, and likely will not + even work, for production systems. + + Note: This option must be set in Kconfig and cannot be enabled or + disabled in the board's defconfig file. + +config OF_OMIT_DTB + bool "Omit the device tree output when building" + default y if OF_HAS_PRIOR_STAGE && !BINMAN + help + As a special case, avoid writing a device tree file u-boot.dtb when + building. Also don't include that file in u-boot.bin + + This is used for boards which normally provide a devicetree via a + runtime mechanism (such as OF_BOARD), to avoid confusion. config DEFAULT_DEVICE_TREE string "Default Device Tree for DT control" @@ -194,7 +210,6 @@ endchoice config MULTI_DTB_FIT_UNCOMPRESS_SZ hex "Size of memory reserved to uncompress the DTBs" - depends on (MULTI_DTB_FIT_GZIP || MULTI_DTB_FIT_LZO) default 0x8000 help This is the size of this area where the DTBs are uncompressed. diff --git a/env/Kconfig b/env/Kconfig index 06d72bad1dcb73a4d46ae02f9424de93e86c676e..6dc8d8d860ebe8d6d597240ab7b7055db1857221 100644 --- a/env/Kconfig +++ b/env/Kconfig @@ -3,6 +3,24 @@ menu "Environment" config ENV_SUPPORT def_bool y +config ENV_SOURCE_FILE + string "Environment file to use" + default "" + help + This sets the basename to use to generate the default environment. + This a text file as described in doc/usage/environment.rst + + The file must be in the board directory and have a .env extension, so + the resulting filename is typically + board///.env + + If the file is not present, an error is produced. + + If this CONFIG is empty, U-Boot uses CONFIG SYS_BOARD as a default, if + the file board///.env exists. Otherwise the + environment is assumed to come from the ad-hoc + CONFIG_EXTRA_ENV_SETTINGS #define + config SAVEENV def_bool y if CMD_SAVEENV @@ -339,54 +357,31 @@ config ENV_SECT_SIZE_AUTO different sector sizes, and CONFIG_ENV_SECT_SIZE should be set to that value. -config USE_ENV_SPI_BUS - bool "SPI flash bus for environment" - depends on ENV_IS_IN_SPI_FLASH - help - Force the SPI bus for environment. - If not defined, use CONFIG_SF_DEFAULT_BUS. - config ENV_SPI_BUS int "Value of SPI flash bus for environment" - depends on USE_ENV_SPI_BUS - help - Value the SPI bus and chip select for environment. - -config USE_ENV_SPI_CS - bool "SPI flash chip select for environment" depends on ENV_IS_IN_SPI_FLASH + default SF_DEFAULT_BUS help - Force the SPI chip select for environment. - If not defined, use CONFIG_SF_DEFAULT_CS. + Value the SPI bus and chip select for environment. config ENV_SPI_CS int "Value of SPI flash chip select for environment" - depends on USE_ENV_SPI_CS - help - Value of the SPI chip select for environment. - -config USE_ENV_SPI_MAX_HZ - bool "SPI flash max frequency for environment" depends on ENV_IS_IN_SPI_FLASH + default SF_DEFAULT_CS help - Force the SPI max work clock for environment. - If not defined, use CONFIG_SF_DEFAULT_SPEED. + Value of the SPI chip select for environment. config ENV_SPI_MAX_HZ int "Value of SPI flash max frequency for environment" - depends on USE_ENV_SPI_MAX_HZ - help - Value of the SPI max work clock for environment. - -config USE_ENV_SPI_MODE - bool "SPI flash mode for environment" depends on ENV_IS_IN_SPI_FLASH + default SF_DEFAULT_SPEED help - Force the SPI work mode for environment. + Value of the SPI max work clock for environment. config ENV_SPI_MODE hex "Value of SPI flash work mode for environment" - depends on USE_ENV_SPI_MODE + depends on ENV_IS_IN_SPI_FLASH + default SF_DEFAULT_MODE help Value of the SPI work mode for environment. See include/spi.h for value. diff --git a/env/common.c b/env/common.c index 208e2adaa012f8cf7db9ac57d587055974f6b6c3..ee957c0a8c00c0681623e7ac7ab9c9211a94bbc7 100644 --- a/env/common.c +++ b/env/common.c @@ -235,6 +235,11 @@ int env_get_yesno(const char *var) 1 : 0; } +bool env_get_autostart(void) +{ + return env_get_yesno("autostart") == 1; +} + /* * Look up the variable from the default environment */ diff --git a/env/embedded.c b/env/embedded.c index 208553e6af172489d4da74774eb1e68f9dab3322..9f26e6cad9c48c063898a3ecb752bf39e041c600 100644 --- a/env/embedded.c +++ b/env/embedded.c @@ -66,6 +66,7 @@ #endif #define DEFAULT_ENV_INSTANCE_EMBEDDED +#include #include #ifdef CONFIG_ENV_ADDR_REDUND diff --git a/fs/jffs2/Kconfig b/fs/jffs2/Kconfig index 1b9ecdd8cca3491891d21ff5311b2d777547c8c8..0e79c340906258d6ceb042c19f08b98c278e1b77 100644 --- a/fs/jffs2/Kconfig +++ b/fs/jffs2/Kconfig @@ -5,3 +5,15 @@ config FS_JFFS2 Flash File System version 2). JFFS2 is a log-structured file system for use with flash memory devices. It supports raw NAND devices, hard links and compression. + +config JFFS2_LZO + bool "Enable LZO compression in JFFS2" + depends on FS_JFFS2 + help + Enable LZO compression in the JFFS2 filesystem + +config JFFS2_NAND + bool "Enable JFFS2 support for NAND flash" + depends on FS_JFFS2 + help + Enable support for NAND flash as the backing store for JFFS2. diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h index 16fd305a65c1cd760202cd81b23563445469034c..104282bd4791fdf9e7c2b5f3835868efd5aa9759 100644 --- a/include/asm-generic/global_data.h +++ b/include/asm-generic/global_data.h @@ -244,6 +244,10 @@ struct global_data { * @fdt_size: space reserved for relocated device space */ unsigned long fdt_size; + /** + * @fdt_src: Source of FDT + */ + enum fdt_source_t fdt_src; #if CONFIG_IS_ENABLED(OF_LIVE) /** * @of_root: root node of the live tree @@ -512,6 +516,14 @@ static_assert(sizeof(struct global_data) == GD_SIZE); #define gd_acpi_ctx() NULL #endif +#if CONFIG_IS_ENABLED(MULTI_DTB_FIT) +#define gd_multi_dtb_fit() gd->multi_dtb_fit +#define gd_set_multi_dtb_fit(_dtb) gd->multi_dtb_fit = _dtb +#else +#define gd_multi_dtb_fit() NULL +#define gd_set_multi_dtb_fit(_dtb) +#endif + /** * enum gd_flags - global data flags * diff --git a/include/clock_legacy.h b/include/clock_legacy.h index 29261b680d0025aad79dcb9f7b99ba68596bb1fb..efa483117dac9e6b232c4e5b077a6834b6270b35 100644 --- a/include/clock_legacy.h +++ b/include/clock_legacy.h @@ -22,4 +22,15 @@ unsigned long get_board_ddr_clk(void); #define get_board_ddr_clk() CONFIG_DDR_CLK_FREQ #endif +/* + * If we have CONFIG_DYNAMIC_SYS_CLK_FREQ then there will be an + * implentation of get_board_sys_clk() somewhere. Otherwise we have + * a static value to use now. + */ +#ifdef CONFIG_DYNAMIC_SYS_CLK_FREQ +unsigned long get_board_sys_clk(void); +#else +#define get_board_sys_clk() CONFIG_SYS_CLK_FREQ +#endif + #endif diff --git a/include/command.h b/include/command.h index 137cfbc3231f1a0eee0ddabcb4269499d9c9af17..f8e07a591c658b48bbe57843005c0f60bf5c51d6 100644 --- a/include/command.h +++ b/include/command.h @@ -45,7 +45,7 @@ struct cmd_tbl { char *const argv[]); char *usage; /* Usage message (short) */ #ifdef CONFIG_SYS_LONGHELP - char *help; /* Help message (long) */ + const char *help; /* Help message (long) */ #endif #ifdef CONFIG_AUTO_COMPLETE /* do auto completion on the arguments */ diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h index 3f724aa10f47822ee3cd98cf5133d75a82277fe9..2f90929178ed4bc8b79def51036cc335441da7db 100644 --- a/include/config_distro_bootcmd.h +++ b/include/config_distro_bootcmd.h @@ -498,8 +498,4 @@ "run bootcmd_${target}; " \ "done\0" -#ifndef CONFIG_BOOTCOMMAND -#define CONFIG_BOOTCOMMAND "run distro_bootcmd" -#endif - #endif /* _CONFIG_CMD_DISTRO_BOOTCMD_H */ diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index 6a69ac45aee4dbe0741ed5bcb45366c66e7cdf2c..5ed624c7b761a4ba4b40d7954615eb259e99c3d1 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -15,7 +15,6 @@ */ #define CONFIG_SYS_UART_PORT (0) -#undef CONFIG_WATCHDOG #define CONFIG_WATCHDOG_TIMEOUT 5000 #ifdef CONFIG_MCFFEC @@ -39,7 +38,6 @@ #define CONFIG_MCFTMR /* I2C */ -#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR #define CONFIG_UDP_CHECKSUM diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 7421f3b7605db1a86ba852ddf13746f5bf63379e..90f1664a5ae191d534e88725d95575abbff680bb 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -20,7 +20,6 @@ #define CONFIG_SYS_UART_PORT (0) -#undef CONFIG_WATCHDOG #define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */ /* @@ -48,7 +47,6 @@ #define CONFIG_MCFTMR /* I2C */ -#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR #define CONFIG_SYS_I2C_PINMUX_REG (gpio->par_qspi) #define CONFIG_SYS_I2C_PINMUX_CLR ~(GPIO_PAR_FECI2C_SCL_MASK | GPIO_PAR_FECI2C_SDA_MASK) #define CONFIG_SYS_I2C_PINMUX_SET (GPIO_PAR_FECI2C_SCL_I2CSCL | GPIO_PAR_FECI2C_SDA_I2CSDA) diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index 7ee0ec6a4a89b49bfea7c03d2510b48f5fa1e86a..00892ec44dcde931100a9b27078623bc0dc715cc 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -21,8 +21,6 @@ #define CONFIG_SYS_UART_PORT (0) -#undef CONFIG_WATCHDOG - #undef CONFIG_MONITOR_IS_IN_RAM /* no pre-loader required!!! ;-) */ /* diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index e9a7922921933926879b124e14110db798049c9d..c5d8aa3edab29ac2a9e1d6aaacbe5c1e90389182 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -12,8 +12,6 @@ #define CONFIG_SYS_UART_PORT (0) -#undef CONFIG_WATCHDOG /* disable watchdog */ - /* Configuration for environment * Environment is embedded in u-boot in the second sector of the flash @@ -69,7 +67,6 @@ #define CONFIG_HOSTNAME "M5253DEMO" /* I2C */ -#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR #define CONFIG_SYS_I2C_PINMUX_REG (*(u32 *) (CONFIG_SYS_MBAR+0x19C)) #define CONFIG_SYS_I2C_PINMUX_CLR (0xFFFFE7FF) #define CONFIG_SYS_I2C_PINMUX_SET (0) diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index 1204aa07a9c48632bf071944697787ab948b2f8f..e814a2924c634d8256254d251e8e71f788bbf221 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -20,7 +20,6 @@ #define CONFIG_SYS_UART_PORT (0) -#undef CONFIG_WATCHDOG #define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */ #undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */ @@ -145,26 +144,6 @@ CF_CACR_CEIB | CF_CACR_DCM | \ CF_CACR_EUSP) -/*----------------------------------------------------------------------- - * Memory bank definitions - */ -#define CONFIG_SYS_BR0_PRELIM 0xFFE00201 -#define CONFIG_SYS_OR0_PRELIM 0xFFE00014 -#define CONFIG_SYS_BR1_PRELIM 0 -#define CONFIG_SYS_OR1_PRELIM 0 -#define CONFIG_SYS_BR2_PRELIM 0x30000001 -#define CONFIG_SYS_OR2_PRELIM 0xFFF80000 -#define CONFIG_SYS_BR3_PRELIM 0 -#define CONFIG_SYS_OR3_PRELIM 0 -#define CONFIG_SYS_BR4_PRELIM 0 -#define CONFIG_SYS_OR4_PRELIM 0 -#define CONFIG_SYS_BR5_PRELIM 0 -#define CONFIG_SYS_OR5_PRELIM 0 -#define CONFIG_SYS_BR6_PRELIM 0 -#define CONFIG_SYS_OR6_PRELIM 0 -#define CONFIG_SYS_BR7_PRELIM 0x00000701 -#define CONFIG_SYS_OR7_PRELIM 0xFFC0007C - /*----------------------------------------------------------------------- * Port configuration */ diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 8e03fc995f832a5a355b6a75ea0a06b70060287c..b18f0319b0973382de1c34a653d003ff4711f4eb 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -58,13 +58,10 @@ #endif /* I2C */ -#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR #define CONFIG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c) #define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0) #define CONFIG_SYS_I2C_PINMUX_SET (0x000F) -#define CONFIG_BOOTCOMMAND "bootm ffe40000" - #ifdef CONFIG_MCFFEC # define CONFIG_NET_RETRY_COUNT 5 # define CONFIG_OVERWRITE_ETHADDR_ONCE diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index 7b33677c551d0894656755f2cdf672518cea0e67..5db189ae2db47af811a30aa3b7c3957d06f6d8df 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -20,7 +20,6 @@ #define CONFIG_SYS_UART_PORT (0) -#undef CONFIG_WATCHDOG #define CONFIG_WATCHDOG_TIMEOUT 5000 #define CONFIG_SYS_UNIFY_CACHE @@ -54,7 +53,6 @@ #define CONFIG_MCFTMR /* I2C */ -#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR #define CONFIG_UDP_CHECKSUM diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index 19d8cfe32173bb4db89cbc9aa7e76a301c80bead..f96f54ef65bcc9c9592416386be3887f1d472ce7 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -20,7 +20,6 @@ #define CONFIG_SYS_UART_PORT (0) -#undef CONFIG_WATCHDOG #define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */ #define CONFIG_SYS_UNIFY_CACHE @@ -48,7 +47,6 @@ #define CONFIG_MCFTMR /* I2C */ -#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR #define CONFIG_UDP_CHECKSUM @@ -137,10 +135,6 @@ # define CONFIG_SYS_NAND_SIZE 1 # define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } # define NAND_ALLOW_ERASE_ALL 1 -# define CONFIG_JFFS2_NAND 1 -# define CONFIG_JFFS2_DEV "nand0" -# define CONFIG_JFFS2_PART_SIZE (CONFIG_SYS_CS2_MASK & ~1) -# define CONFIG_JFFS2_PART_OFFSET 0x00000000 #endif #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index e2ddc4893e770b253a81ab3f298c4c2a7de57877..b7906013e09eee36878e8717ee57f1f08ee65b8b 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -22,7 +22,6 @@ #define CONFIG_SYS_UART_PORT (0) -#undef CONFIG_WATCHDOG #define CONFIG_WATCHDOG_TIMEOUT 3360 /* timeout in ms, max is 3.36 sec */ #define CONFIG_SYS_UNIFY_CACHE @@ -50,7 +49,6 @@ #define CONFIG_MCFTMR /* I2C */ -#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR #define CONFIG_UDP_CHECKSUM @@ -139,10 +137,6 @@ # define CONFIG_SYS_NAND_SIZE 1 # define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } # define NAND_ALLOW_ERASE_ALL 1 -# define CONFIG_JFFS2_NAND 1 -# define CONFIG_JFFS2_DEV "nand0" -# define CONFIG_JFFS2_PART_SIZE (CONFIG_SYS_CS2_MASK & ~1) -# define CONFIG_JFFS2_PART_OFFSET 0x00000000 #endif #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 72119a1cf04b711cfa4e0193a340ca0084ea94f2..9a34e5444b1c00c586cc5d074715017d0dcdbb73 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -302,8 +302,6 @@ */ #define CONFIG_BOOTP_BOOTFILESIZE -#undef CONFIG_WATCHDOG /* watchdog disabled */ - #ifdef CONFIG_MMC #define CONFIG_FSL_ESDHC_PIN_MUX #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR @@ -326,7 +324,6 @@ */ #define CONFIG_HAS_FSL_DR_USB -#define CONFIG_USB_EHCI_FSL #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_NETDEV "eth1" @@ -365,20 +362,4 @@ "$netdev:off " \ "root=$rootdev rw console=$console,$baudrate $othbootargs\0" -#define NFSBOOTCOMMAND \ - "setenv rootdev /dev/nfs;" \ - "run setbootargs;" \ - "run setipargs;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr - $fdtaddr" - -#define RAMBOOTCOMMAND \ - "setenv rootdev /dev/ram;" \ - "run setbootargs;" \ - "tftp $ramdiskaddr $ramdiskfile;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr $ramdiskaddr $fdtaddr" - #endif /* __CONFIG_H */ diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index fe156e7815788e1fd661deff6bd764059b89fe3a..84e05eafa619eb7a68bb4c31d4a03973e3cad7ec 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -26,8 +26,6 @@ #define CONFIG_HAS_FEC 1 /* 8540 has FEC */ #endif -#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ - /* * sysclk for MPC85xx * @@ -46,10 +44,6 @@ * Note that PCI-X won't work at 33MHz. */ -#ifndef CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_CLK_FREQ 33000000 -#endif - /* * These can be toggled for performance analysis, otherwise use default. */ @@ -90,9 +84,7 @@ #define CONFIG_SYS_LBC_SDRAM_SIZE 64 /* LBC SDRAM is 64MB */ #define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH 16M */ -#define CONFIG_SYS_BR0_PRELIM 0xff001801 /* port size 32bit */ -#define CONFIG_SYS_OR0_PRELIM 0xff006ff7 /* 16MB Flash */ #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ #define CONFIG_SYS_MAX_FLASH_SECT 64 /* sectors per device */ #undef CONFIG_SYS_FLASH_CHECKSUM @@ -131,8 +123,6 @@ * FIXME: the top 17 bits of BR2. */ -#define CONFIG_SYS_BR2_PRELIM 0xf0001861 - /* * The SDRAM size in MB, CONFIG_SYS_LBC_SDRAM_SIZE, is 64. * @@ -147,8 +137,6 @@ * 1111 1100 0000 0000 0110 1001 0000 0001 = fc006901 */ -#define CONFIG_SYS_OR2_PRELIM 0xfc006901 - #define CONFIG_SYS_LBC_LCRR 0x00030004 /* LB clock ratio reg */ #define CONFIG_SYS_LBC_LBCR 0x00000000 /* LB config reg */ #define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */ @@ -176,8 +164,6 @@ /* * 32KB, 8-bit wide for ADS config reg */ -#define CONFIG_SYS_BR4_PRELIM 0xf8000801 -#define CONFIG_SYS_OR4_PRELIM 0xffffe1f1 #define CONFIG_SYS_BCSR (CONFIG_SYS_BR4_PRELIM & 0xffff8000) #define CONFIG_SYS_INIT_RAM_LOCK 1 @@ -274,8 +260,6 @@ */ #define CONFIG_BOOTP_BOOTFILESIZE -#undef CONFIG_WATCHDOG /* watchdog disabled */ - /* * Miscellaneous configurable options */ @@ -317,23 +301,4 @@ "fdtaddr=400000\0" \ "fdtfile=your.fdt.dtb\0" -#define NFSBOOTCOMMAND \ - "setenv bootargs root=/dev/nfs rw " \ - "nfsroot=$serverip:$rootpath " \ - "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr - $fdtaddr" - -#define RAMBOOTCOMMAND \ - "setenv bootargs root=/dev/ram rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $ramdiskaddr $ramdiskfile;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr $ramdiskaddr $fdtaddr" - -#define CONFIG_BOOTCOMMAND NFSBOOTCOMMAND - #endif /* __CONFIG_H */ diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 5c54bad4964f86d3c0bc1a899b27ba572e933c78..f583aa8b36d538a3f0af5a0fec6b7a4beca3694f 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -19,15 +19,12 @@ #define CONFIG_PCI1 /* PCI controller 1 */ #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #undef CONFIG_PCI2 -#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */ #ifndef __ASSEMBLY__ #include -extern unsigned long get_clock_freq(void); #endif -#define CONFIG_SYS_CLK_FREQ get_clock_freq() /* sysclk for MPC85xx */ /* * These can be toggled for performance analysis, otherwise use default. @@ -134,14 +131,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE #endif -#define CONFIG_SYS_BR0_PRELIM \ - (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS + 0x800000) | BR_PS_16 | BR_V) -#define CONFIG_SYS_BR1_PRELIM \ - (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V) - -#define CONFIG_SYS_OR0_PRELIM 0xff806e65 -#define CONFIG_SYS_OR1_PRELIM 0xff806e65 - #define CONFIG_SYS_FLASH_BANKS_LIST \ {CONFIG_SYS_FLASH_BASE_PHYS + 0x800000, CONFIG_SYS_FLASH_BASE_PHYS} #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */ @@ -185,10 +174,6 @@ extern unsigned long get_clock_freq(void); * FIXME: the top 17 bits of BR2. */ -#define CONFIG_SYS_BR2_PRELIM \ - (BR_PHYS_ADDR(CONFIG_SYS_LBC_SDRAM_BASE_PHYS) \ - | BR_PS_32 | (3< #endif /* __CONFIG_H */ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index bf8a92c69b27bfaad0684af9550ed1628a90d7e8..8ada25dcc7a762dcf24b2ba925a24232bf9fcf63 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -36,7 +36,6 @@ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ -#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ #define CONFIG_SYS_SRIO #define CONFIG_SRIO1 /* SRIO port 1 */ @@ -50,10 +49,8 @@ #endif #ifndef __ASSEMBLY__ -unsigned long get_board_sys_clk(unsigned long dummy); #include #endif -#define CONFIG_SYS_CLK_FREQ get_board_sys_clk(0) /* * These can be toggled for performance analysis, otherwise use default. @@ -137,9 +134,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CPLD_BASE_PHYS CPLD_BASE #endif -#define CONFIG_SYS_BR3_PRELIM (BR_PHYS_ADDR(CPLD_BASE_PHYS) | BR_PS_8 | BR_V) -#define CONFIG_SYS_OR3_PRELIM 0xffffeff7 /* 32KB but only 4k mapped */ - #define PIXIS_LBMAP_SWITCH 7 #define PIXIS_LBMAP_MASK 0xf0 #define PIXIS_LBMAP_SHIFT 4 @@ -185,21 +179,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); | OR_FCM_SCY_1 \ | OR_FCM_TRLX \ | OR_FCM_EHTR) - -#ifdef CONFIG_MTD_RAW_NAND -#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ -#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ -#define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ -#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_FLASH_OR_PRELIM /* NOR Options */ -#else -#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ -#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_FLASH_OR_PRELIM /* NOR Options */ -#define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ -#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ -#endif -#else -#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ -#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_FLASH_OR_PRELIM /* NOR Options */ #endif /* CONFIG_NAND_FSL_ELBC */ #define CONFIG_SYS_FLASH_EMPTY_INFO @@ -413,7 +392,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_HAS_FSL_MPH_USB #if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB) -#define CONFIG_USB_EHCI_FSL #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #endif @@ -464,32 +442,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); "fdtfile=p2041rdb/p2041rdb.dtb\0" \ "bdev=sda3\0" -#define HDBOOT \ - "setenv bootargs root=/dev/$bdev rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr - $fdtaddr" - -#define NFSBOOTCOMMAND \ - "setenv bootargs root=/dev/nfs rw " \ - "nfsroot=$serverip:$rootpath " \ - "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr - $fdtaddr" - -#define RAMBOOTCOMMAND \ - "setenv bootargs root=/dev/ram rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $ramdiskaddr $ramdiskfile;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr $ramdiskaddr $fdtaddr" - -#define CONFIG_BOOTCOMMAND HDBOOT - #include #endif /* __CONFIG_H */ diff --git a/include/configs/SBx81LIFKW.h b/include/configs/SBx81LIFKW.h index bf9f26ea9996aa3d2e622fac47e56705adf7b124..dbaffc635d24212d0a3a6ef2325b1aaaa3152d53 100644 --- a/include/configs/SBx81LIFKW.h +++ b/include/configs/SBx81LIFKW.h @@ -6,25 +6,16 @@ #ifndef _CONFIG_SBX81LIFKW_H #define _CONFIG_SBX81LIFKW_H -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ -#define CONFIG_KW88F6281 1 /* SOC Name */ -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg - /* additions for new ARM relocation support */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ #define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 */ #define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ -#define CONFIG_KIRKWOOD_GPIO 1 /* * NS16550 Configuration */ -#define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE (-4) #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK @@ -61,7 +52,6 @@ * Ethernet Driver configuration */ #ifdef CONFIG_CMD_NET -#define CONFIG_MVGBE /* Enable kirkwood Gbe Controller Driver */ #define CONFIG_MVGBE_PORTS {1, 0} /* enable a single port */ #define CONFIG_PHY_BASE_ADR 0x01 #endif /* CONFIG_CMD_NET */ diff --git a/include/configs/SBx81LIFXCAT.h b/include/configs/SBx81LIFXCAT.h index 71394aea22c6597e72ccbfe4e98b294e6741c70d..bbd3ccc6d9d2098e4548949e2ffcc3f0e90fc1e1 100644 --- a/include/configs/SBx81LIFXCAT.h +++ b/include/configs/SBx81LIFXCAT.h @@ -6,25 +6,16 @@ #ifndef _CONFIG_SBX81LIFXCAT_H #define _CONFIG_SBX81LIFXCAT_H -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ -#define CONFIG_KW88F6281 1 /* SOC Name */ -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg - /* additions for new ARM relocation support */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ #define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 */ #define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ -#define CONFIG_KIRKWOOD_GPIO 1 /* * NS16550 Configuration */ -#define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE (-4) #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK @@ -66,7 +57,6 @@ * Ethernet Driver configuration */ #ifdef CONFIG_CMD_NET -#define CONFIG_MVGBE /* Enable kirkwood Gbe Controller Driver */ #define CONFIG_MVGBE_PORTS {1, 0} /* enable a single port */ #define CONFIG_PHY_BASE_ADR 0x01 #endif /* CONFIG_CMD_NET */ diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 89bbeb7784464f2d7bc59b05958418f60816c558..bf266623c9087eacc0a0a33a2de1ccb417c71ca6 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -41,7 +41,6 @@ #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0x30000000 #define CONFIG_SYS_NAND_U_BOOT_START 0x30000000 -#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10) #endif #ifdef CONFIG_SPIFLASH @@ -116,12 +115,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #endif -#ifndef __ASSEMBLY__ -unsigned long get_board_sys_clk(void); -#endif - -#define CONFIG_SYS_CLK_FREQ 100000000 - /* * These can be toggled for performance analysis, otherwise use default. */ @@ -380,7 +373,6 @@ unsigned long get_board_sys_clk(void); #undef CONFIG_FSL_DIU_FB /* RDB doesn't support DIU */ #ifdef CONFIG_FSL_DIU_FB #define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x180000) -#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS /* @@ -416,7 +408,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ -#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ #ifdef CONFIG_PCI /* controller 1, direct to uli, tgtid 3, Base address 20000 */ @@ -452,7 +443,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_HAS_FSL_DR_USB #ifdef CONFIG_HAS_FSL_DR_USB -#define CONFIG_USB_EHCI_FSL #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #endif @@ -580,25 +570,6 @@ unsigned long get_board_sys_clk(void); "fdtaddr=1e00000\0" \ "bdev=sda3\0" -#define LINUXBOOTCOMMAND \ - "setenv bootargs root=/dev/ram rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "setenv ramdiskaddr 0x02000000;" \ - "setenv fdtaddr 0x00c00000;" \ - "setenv loadaddr 0x1000000;" \ - "bootm $loadaddr $ramdiskaddr $fdtaddr" - -#define NFSBOOTCOMMAND \ - "setenv bootargs root=/dev/nfs rw " \ - "nfsroot=$serverip:$rootpath " \ - "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr - $fdtaddr" - -#define CONFIG_BOOTCOMMAND LINUXBOOTCOMMAND - #include #endif /* __T1024RDB_H */ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 48fc8a271c2f4ddf7dff564f61874f4b17e41b66..a1650f543069486d1370b855115372231d80143f 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -40,7 +40,6 @@ #endif #define CONFIG_SYS_NAND_U_BOOT_DST 0x30000000 #define CONFIG_SYS_NAND_U_BOOT_START 0x30000000 -#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10) #endif #ifdef CONFIG_SPIFLASH @@ -85,8 +84,6 @@ #define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_PCIE4 /* PCIE controller 4 */ -#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ - #if defined(CONFIG_SPIFLASH) #elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_NXP_ESBC @@ -95,8 +92,6 @@ #endif #endif -#define CONFIG_SYS_CLK_FREQ 100000000 - /* * These can be toggled for performance analysis, otherwise use default. */ @@ -367,7 +362,6 @@ #ifdef CONFIG_FSL_DIU_FB #define CONFIG_FSL_DIU_CH7301 #define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x180000) -#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #endif #endif @@ -460,7 +454,6 @@ #ifdef CONFIG_HAS_FSL_DR_USB #ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_USB_EHCI_FSL #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #endif #endif @@ -499,8 +492,6 @@ #define CONFIG_SYS_DPAA_FMAN #define CONFIG_SYS_DPAA_PME -#define CONFIG_U_QE - #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) #endif /* CONFIG_NOBQFMAN */ @@ -609,40 +600,6 @@ "fdtfile=" __stringify(FDTFILE) "\0" \ "bdev=sda3\0" -#define LINUXBOOTCOMMAND \ - "setenv bootargs root=/dev/ram rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "setenv ramdiskaddr 0x02000000;" \ - "setenv fdtaddr 0x00c00000;" \ - "setenv loadaddr 0x1000000;" \ - "bootm $loadaddr $ramdiskaddr $fdtaddr" - -#define HDBOOT \ - "setenv bootargs root=/dev/$bdev rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr - $fdtaddr" - -#define NFSBOOTCOMMAND \ - "setenv bootargs root=/dev/nfs rw " \ - "nfsroot=$serverip:$rootpath " \ - "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr - $fdtaddr" - -#define RAMBOOTCOMMAND \ - "setenv bootargs root=/dev/ram rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $ramdiskaddr $ramdiskfile;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr $ramdiskaddr $fdtaddr" - -#define CONFIG_BOOTCOMMAND LINUXBOOTCOMMAND - #include #endif /* __CONFIG_H */ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 78562bc08fbb366b36c8e3b6ab3fbf16644eed8b..aaea314e4587a523e2c9a3d91e1fba3e88bd635f 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -44,7 +44,6 @@ #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000 #define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 -#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10) #endif #ifdef CONFIG_SPIFLASH @@ -94,12 +93,6 @@ #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif -#ifndef __ASSEMBLY__ -unsigned long get_board_sys_clk(void); -#endif - -#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() - /* * Config the L3 Cache as L3 SRAM */ @@ -360,12 +353,6 @@ unsigned long get_board_sys_clk(void); #define I2C_VOL_MONITOR_BUS_V_OVF 0x1 #define I2C_VOL_MONITOR_BUS_V_SHIFT 3 -#define CONFIG_VID_FLS_ENV "t208xqds_vdd_mv" -#ifndef CONFIG_SPL_BUILD -#define CONFIG_VID -#endif -#define CONFIG_VOL_MONITOR_IR36021_SET -#define CONFIG_VOL_MONITOR_IR36021_READ /* The lowest and highest voltage allowed for T208xQDS */ #define VDD_MV_MIN 819 #define VDD_MV_MAX 1212 @@ -420,7 +407,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_PCIE4 /* PCIE controller 4 */ -#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ /* controller 1, direct to uli, tgtid 3, Base address 20000 */ #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull @@ -517,7 +503,6 @@ unsigned long get_board_sys_clk(void); * USB */ #ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_USB_EHCI_FSL #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_HAS_FSL_DR_USB #endif @@ -614,40 +599,6 @@ unsigned long get_board_sys_clk(void); "cpu 7 release 0x01000000 - - -;" \ "go 0x01000000" -#define LINUXBOOTCOMMAND \ - "setenv bootargs root=/dev/ram rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "setenv ramdiskaddr 0x02000000;" \ - "setenv fdtaddr 0x00c00000;" \ - "setenv loadaddr 0x1000000;" \ - "bootm $loadaddr $ramdiskaddr $fdtaddr" - -#define HDBOOT \ - "setenv bootargs root=/dev/$bdev rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr - $fdtaddr" - -#define NFSBOOTCOMMAND \ - "setenv bootargs root=/dev/nfs rw " \ - "nfsroot=$serverip:$rootpath " \ - "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr - $fdtaddr" - -#define RAMBOOTCOMMAND \ - "setenv bootargs root=/dev/ram rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $ramdiskaddr $ramdiskfile;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr $ramdiskaddr $fdtaddr" - -#define CONFIG_BOOTCOMMAND LINUXBOOTCOMMAND - #include #endif /* __T208xQDS_H */ diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 471ed94b80492fe05d9bb70aab3a5e209f08d99d..467f6344faf5f52585f9a6794cb671ca3170ac28 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -39,7 +39,6 @@ #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000 #define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 -#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10) #endif #ifdef CONFIG_SPIFLASH @@ -89,12 +88,6 @@ #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif -#ifndef __ASSEMBLY__ -unsigned long get_board_sys_clk(void); -#endif - -#define CONFIG_SYS_CLK_FREQ 66660000 - /* * Config the L3 Cache as L3 SRAM */ @@ -312,12 +305,6 @@ unsigned long get_board_sys_clk(void); #define I2C_MUX_CH_VOL_MONITOR 0xa -#define CONFIG_VID_FLS_ENV "t208xrdb_vdd_mv" -#ifndef CONFIG_SPL_BUILD -#define CONFIG_VID -#endif -#define CONFIG_VOL_MONITOR_IR36021_SET -#define CONFIG_VOL_MONITOR_IR36021_READ /* The lowest and highest voltage allowed for T208xRDB */ #define VDD_MV_MIN 819 #define VDD_MV_MAX 1212 @@ -372,7 +359,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_PCIE4 /* PCIE controller 4 */ -#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ /* controller 1, direct to uli, tgtid 3, Base address 20000 */ #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull @@ -472,7 +458,6 @@ unsigned long get_board_sys_clk(void); * USB */ #ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_USB_EHCI_FSL #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_HAS_FSL_DR_USB #endif @@ -567,40 +552,6 @@ unsigned long get_board_sys_clk(void); "cpu 7 release 0x01000000 - - -;" \ "go 0x01000000" -#define LINUXBOOTCOMMAND \ - "setenv bootargs root=/dev/ram rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "setenv ramdiskaddr 0x02000000;" \ - "setenv fdtaddr 0x00c00000;" \ - "setenv loadaddr 0x1000000;" \ - "bootm $loadaddr $ramdiskaddr $fdtaddr" - -#define HDBOOT \ - "setenv bootargs root=/dev/$bdev rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr - $fdtaddr" - -#define NFSBOOTCOMMAND \ - "setenv bootargs root=/dev/nfs rw " \ - "nfsroot=$serverip:$rootpath " \ - "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr - $fdtaddr" - -#define RAMBOOTCOMMAND \ - "setenv bootargs root=/dev/ram rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $ramdiskaddr $ramdiskfile;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr $ramdiskaddr $fdtaddr" - -#define CONFIG_BOOTCOMMAND LINUXBOOTCOMMAND - #include #endif /* __T2080RDB_H */ diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index f6ccaf49521f59e08897cfd2c953cef8081bce8b..2d632493c1947fdaf2b388b2dc9d1261ba47896e 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -60,7 +60,6 @@ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ -#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ /* * These can be toggled for performance analysis, otherwise use default. @@ -225,12 +224,6 @@ "setenv bootargs config-addr=0x60000000; " \ "bootm 0x01000000 - 0x00f00000" -#define CONFIG_SYS_CLK_FREQ 66666666 - -#ifndef __ASSEMBLY__ -unsigned long get_board_sys_clk(void); -#endif - /* * DDR Setup */ @@ -408,12 +401,6 @@ unsigned long get_board_sys_clk(void); #define I2C_VOL_MONITOR_BUS_V_OVF 0x1 #define I2C_VOL_MONITOR_BUS_V_SHIFT 3 -#define CONFIG_VID_FLS_ENV "t4240rdb_vdd_mv" -#ifndef CONFIG_SPL_BUILD -#define CONFIG_VID -#endif -#define CONFIG_VOL_MONITOR_IR36021_SET -#define CONFIG_VOL_MONITOR_IR36021_READ /* The lowest and highest voltage allowed for T4240RDB */ #define VDD_MV_MIN 819 #define VDD_MV_MAX 1212 @@ -498,7 +485,6 @@ unsigned long get_board_sys_clk(void); /* * USB */ -#define CONFIG_USB_EHCI_FSL #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_HAS_FSL_DR_USB @@ -547,40 +533,6 @@ unsigned long get_board_sys_clk(void); "setenv bootargs config-addr=0x60000000; " \ "bootm 0x01000000 - 0x00f00000" -#define LINUXBOOTCOMMAND \ - "setenv bootargs root=/dev/ram rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "setenv ramdiskaddr 0x02000000;" \ - "setenv fdtaddr 0x00c00000;" \ - "setenv loadaddr 0x1000000;" \ - "bootm $loadaddr $ramdiskaddr $fdtaddr" - -#define HDBOOT \ - "setenv bootargs root=/dev/$bdev rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr - $fdtaddr" - -#define NFSBOOTCOMMAND \ - "setenv bootargs root=/dev/nfs rw " \ - "nfsroot=$serverip:$rootpath " \ - "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr - $fdtaddr" - -#define RAMBOOTCOMMAND \ - "setenv bootargs root=/dev/ram rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $ramdiskaddr $ramdiskfile;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr $ramdiskaddr $fdtaddr" - -#define CONFIG_BOOTCOMMAND LINUXBOOTCOMMAND - #include #endif /* __CONFIG_H */ diff --git a/include/configs/adp-ae3xx.h b/include/configs/adp-ae3xx.h index 973033d6b4d5d8cd1a9fcf0a82afb612dd234a2c..58e8526048987b7bd89cb58506d869a89649a0db 100644 --- a/include/configs/adp-ae3xx.h +++ b/include/configs/adp-ae3xx.h @@ -17,8 +17,6 @@ #define CONFIG_SKIP_TRUNOFF_WATCHDOG -#define CONFIG_ARCH_MAP_SYSMEM - #define CONFIG_BOOTP_SERVERIP #ifdef CONFIG_SKIP_LOWLEVEL_INIT @@ -30,8 +28,7 @@ /* * Timer */ -#define CONFIG_SYS_CLK_FREQ 39062500 -#define VERSION_CLOCK CONFIG_SYS_CLK_FREQ +#define VERSION_CLOCK get_board_sys_clk() /* * Use Externel CLOCK or PCLK diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h index f533ada73f472d45726330c3c187ce4a213274f3..1022764985a2ebfc1242b29fd68477513ec641a5 100644 --- a/include/configs/adp-ag101p.h +++ b/include/configs/adp-ag101p.h @@ -15,8 +15,6 @@ */ #define CONFIG_USE_INTERRUPT -#define CONFIG_ARCH_MAP_SYSMEM - #define CONFIG_BOOTP_SERVERIP #ifndef CONFIG_SKIP_LOWLEVEL_INIT @@ -32,8 +30,7 @@ /* * Timer */ -#define CONFIG_SYS_CLK_FREQ 39062500 -#define VERSION_CLOCK CONFIG_SYS_CLK_FREQ +#define VERSION_CLOCK get_board_sys_clk() /* * Use Externel CLOCK or PCLK diff --git a/include/configs/alt.h b/include/configs/alt.h index 8456a6b2c331cb9e1d10ff29d24ae3ac3548def6..37b5800d6ef5c9f16bc936cafc6e70913320a058 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -34,8 +34,6 @@ #define CONFIG_BITBANGMII_MULTI /* Board Clock */ -#define RMOBILE_XTAL_CLK 20000000u -#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" \ diff --git a/include/configs/am335x_igep003x.h b/include/configs/am335x_igep003x.h index 339a975c74cc007a888aca9f34385252e864ae47..2cf77a67c0c2fced2c560e7ca7d1e240c9235cf0 100644 --- a/include/configs/am335x_igep003x.h +++ b/include/configs/am335x_igep003x.h @@ -91,12 +91,6 @@ "echo WARNING: Could not determine device tree to use; fi; \0" #endif -#define CONFIG_BOOTCOMMAND \ - "run findfdt;" \ - "run mmcboot;" \ - "run nandboot;" \ - "run netboot;" - /* NS16550 Configuration */ #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ diff --git a/include/configs/am335x_shc.h b/include/configs/am335x_shc.h index 584b0250c4cca0c1f133f5b6017b6bdddfc01422..c7a7a18dc854d29524fa8beb7d44448e974b36a8 100644 --- a/include/configs/am335x_shc.h +++ b/include/configs/am335x_shc.h @@ -139,64 +139,15 @@ #if defined CONFIG_SHC_NETBOOT /* Network Boot */ -# define CONFIG_BOOTCOMMAND \ - "run fusecmd; " \ - "if run netboot; then " \ - "echo Booting from network; " \ - "else " \ - "echo ERROR: Cannot boot from network!; " \ - "panic; " \ - "fi; " #elif defined CONFIG_SHC_SDBOOT /* !defined CONFIG_SHC_NETBOOT */ /* SD-Card Boot */ -# define CONFIG_BOOTCOMMAND \ - "if mmc dev 0; mmc rescan; then " \ - "run sd_setup; " \ - "else " \ - "echo ERROR: SD/MMC-Card not detected!; " \ - "panic; " \ - "fi; " \ - "if run loaduimage; then " \ - "echo Bootable SD/MMC-Card inserted, booting from it!; " \ - "run mmcboot; " \ - "else " \ - "echo ERROR: Unable to load uImage from SD/MMC-Card!; " \ - "panic; " \ - "fi; " #elif defined CONFIG_SHC_ICT /* ICT adapter boots only u-boot and does HW partitioning */ -# define CONFIG_BOOTCOMMAND \ - "if mmc dev 0; mmc rescan; then " \ - "run sd_setup; " \ - "else " \ - "echo ERROR: SD/MMC-Card not detected!; " \ - "panic; " \ - "fi; " \ - "run fusecmd; " #else /* !defined CONFIG_SHC_NETBOOT, !defined CONFIG_SHC_SDBOOT */ /* Regular Boot from internal eMMC */ -# define CONFIG_BOOTCOMMAND \ - "if mmc dev 1; mmc rescan; then " \ - "run emmc_setup; " \ - "else " \ - "echo ERROR: eMMC device not detected!; " \ - "panic; " \ - "fi; " \ - "if run loaduimage; then " \ - "run mmcboot; " \ - "else " \ - "echo ERROR Unable to load uImage from eMMC!; " \ - "echo Performing Rollback!; " \ - "setenv _active_ ${active_root}; " \ - "setenv _inactive_ ${inactive_root}; " \ - "setenv active_root ${_inactive_}; " \ - "setenv inactive_root ${_active_}; " \ - "saveenv; " \ - "reset; " \ - "fi; " #endif /* Regular Boot */ diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index bf01a777cce003d28bd7179ecdf1df0af92a283e..f5f2b63b74ec281d584753f86bd5cb8b39ec66f4 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -90,25 +90,6 @@ "nand read ${fdtaddr} aa0000 80000; " \ "bootm ${loadaddr} - ${fdtaddr}\0" \ -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "echo SD/MMC found on device $mmcdev; " \ - "if run loadbootenv; then " \ - "run importbootenv; " \ - "fi; " \ - "echo Checking if uenvcmd is set ...; " \ - "if test -n $uenvcmd; then " \ - "echo Running uenvcmd ...; " \ - "run uenvcmd; " \ - "fi; " \ - "echo Running default loadimage ...; " \ - "setenv bootfile zImage; " \ - "if run loadimage; then " \ - "run loadfdt; " \ - "run mmcboot; " \ - "fi; " \ - "else run nandboot; fi" - /* Miscellaneous configurable options */ /* We set the max number of command args high to avoid HUSH bugs. */ diff --git a/include/configs/amcore.h b/include/configs/amcore.h index fd05ea69e3bbc8a3307d8d0028249094a0be873a..d813af17f74e996737180a41aa581c861e30a89b 100644 --- a/include/configs/amcore.h +++ b/include/configs/amcore.h @@ -13,7 +13,6 @@ #define CONFIG_MCFTMR #define CONFIG_SYS_UART_PORT 0 -#define CONFIG_BOOTCOMMAND "bootm ffc20000" #define CONFIG_EXTRA_ENV_SETTINGS \ "upgrade_uboot=loady; " \ "protect off 0xffc00000 0xffc1ffff; " \ diff --git a/include/configs/ap121.h b/include/configs/ap121.h index e23a7dc4956574e924fe6c886dc06d12f042fd22..70cd2eeaf97dc9795af942b70737b275f8593807 100644 --- a/include/configs/ap121.h +++ b/include/configs/ap121.h @@ -20,10 +20,6 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE - 1) -#define CONFIG_BOOTCOMMAND "sf probe;" \ - "mtdparts default;" \ - "bootm 0x9f650000" - /* Miscellaneous configurable options */ /* diff --git a/include/configs/ap143.h b/include/configs/ap143.h index 80b64da93ff509f5cc9f8b1b0344c6bdb0e947ee..167cc47142c318079171ffa6e7a6a89126e3304f 100644 --- a/include/configs/ap143.h +++ b/include/configs/ap143.h @@ -25,10 +25,6 @@ */ #define CONFIG_SYS_NS16550_CLK 25000000 -#define CONFIG_BOOTCOMMAND "sf probe;" \ - "mtdparts default;" \ - "bootm 0x9f680000" - /* Miscellaneous configurable options */ /* diff --git a/include/configs/ap152.h b/include/configs/ap152.h index 762cc67aa6c7931b65381cf34802358d30cefda4..5bfca42156b69b38eb5f3a5937d70fe91f55cb7c 100644 --- a/include/configs/ap152.h +++ b/include/configs/ap152.h @@ -25,12 +25,6 @@ */ #define CONFIG_SYS_NS16550_CLK 25000000 -#define CONFIG_BOOTCOMMAND "sf probe;" \ - "mtdparts default;" \ - "bootm 0x9f060000" - -#define CONFIG_ENV_SPI_MAX_HZ 25000000 - /* Miscellaneous configurable options */ /* diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index 27007c57b3cd70b5ed913596be40a28b451684a4..c2b0d6ff3e6612c079e13a5ae804dde189585727 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -50,7 +50,7 @@ "mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=PARTUUID=${uuid} rootwait " \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "netargs=setenv bootargs console=${console},${baudrate} " \ "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp" \ "\0" \ @@ -68,8 +68,6 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x80200000 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - /* On Apalis iMX8 USDHC1 is eMMC, USDHC2 is 8-bit and USDHC3 is 4-bit MMC/SD */ #define CONFIG_SYS_FSL_USDHC_NUM 3 diff --git a/include/configs/apalis-imx8x.h b/include/configs/apalis-imx8x.h index 50dae2d8e05ae85ceffac96e19b30dc9ce7d4fd7..402fed1bba347a26eb7643a9e4f713df2e2c8bd9 100644 --- a/include/configs/apalis-imx8x.h +++ b/include/configs/apalis-imx8x.h @@ -77,7 +77,7 @@ "mmcargs=setenv bootargs ${consoleargs} " \ "root=PARTUUID=${uuid} rootwait " \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "netargs=setenv bootargs ${consoleargs} " \ "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp " \ "${vidargs}\0" \ @@ -99,8 +99,6 @@ /* Environment in eMMC, before config block at the end of 1st "boot sector" */ -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - /* On Apalis iMX8X USDHC1 is eMMC, USDHC2 is 4-bit SD */ #define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index dfed1615b9be88f2adb852f94abba3b7bd3a126f..c165f618be921868a4b496604dbd9295ed11dd29 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -45,8 +45,6 @@ #define CONFIG_USBD_HS /* Framebuffer and LCD */ -#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE -#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP diff --git a/include/configs/apple.h b/include/configs/apple.h index b1f6043174630c10d4dc187c6ccc6e618a274d40..3e5fb495f1abbe12b482a17720ad8afc67a5551b 100644 --- a/include/configs/apple.h +++ b/include/configs/apple.h @@ -3,10 +3,6 @@ #include -#define CONFIG_SYS_SDRAM_BASE 0x880000000 - -#define CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE CONFIG_SYS_TEXT_BASE - /* Environment */ #define ENV_DEVICE_SETTINGS \ "stdin=serial,usbkbd\0" \ diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index b73b0d5b92b3ea5130ae64a7f6cf3b1945b11c4e..e6397378e4518eaad3a189dc99351e0972e6b907 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -443,7 +443,6 @@ /* Framebuffer */ /* check this console not needed, after test remove it */ #define CONFIG_IMX_VIDEO_SKIP -#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #define CONFIG_IMX6_PWM_PER_CLK 66000000 diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h index 73f63c5a9f005f4d3573e765a1fba7cf73471fd3..7714da40dc73e321928fc1417f77188257ddb383 100644 --- a/include/configs/armadillo-800eva.h +++ b/include/configs/armadillo-800eva.h @@ -17,7 +17,7 @@ #define CONFIG_TMU_TIMER #define CONFIG_SYS_TIMER_COUNTS_DOWN #define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */ -#define CONFIG_SYS_TIMER_RATE (CONFIG_SYS_CLK_FREQ / 4) +#define CONFIG_SYS_TIMER_RATE (get_board_sys_clk() / 4) /* STACK */ #define CONFIG_SYS_INIT_SP_ADDR 0xE8083000 @@ -72,7 +72,6 @@ #define CONFIG_BITBANGMII_MULTI /* Board Clock */ -#define CONFIG_SYS_CLK_FREQ 50000000 -#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ +#define CONFIG_SH_SCIF_CLK_FREQ get_board_sys_clk() #endif /* __ARMADILLO_800EVA_H */ diff --git a/include/configs/aspeed-common.h b/include/configs/aspeed-common.h index 5177bf20fad4ccddf7387462a721a98d78131c81..96526e1a75ca2f7dd012b156cca26864c32bc9ec 100644 --- a/include/configs/aspeed-common.h +++ b/include/configs/aspeed-common.h @@ -38,13 +38,4 @@ */ #define CONFIG_BOOTP_BOOTFILESIZE -/* - * Miscellaneous configurable options - */ - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "verify=yes\0" \ - "spi_dma=yes\0" \ - "" - #endif /* __AST_COMMON_CONFIG_H */ diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index 36e351f3583357f47469c7264da969ad94e698aa..d87ca304e26db87a3c1b1ae316b3f54828801876 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -58,7 +58,6 @@ #define CONFIG_MCFTMR /* I2C */ -#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR /* * Defines processor clock - important for correct timings concerning serial @@ -91,7 +90,6 @@ */ #ifndef CONFIG_MONITOR_IS_IN_RAM -#define CONFIG_WATCHDOG #define CONFIG_WATCHDOG_TIMEOUT 3355 /* timeout in milliseconds */ #endif @@ -140,18 +138,6 @@ * by external update.c; This is not included in mainline because * it needs non-blocking CFI routines. */ -#ifdef CONFIG_MONITOR_IS_IN_RAM -#define CONFIG_BOOTCOMMAND "" /* no autoboot in this case */ -#else -#if ASTRO_V532 -#define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\ - "run xilinxload&&run alteraload&&bootm 0x80000;"\ - "update;reset" -#else -#define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\ - "run xilinxload&&bootm 0x80000;update;reset" -#endif -#endif #define CONFIG_FPGA_COUNT 1 #define CONFIG_SYS_FPGA_PROG_FEEDBACK diff --git a/include/configs/at91-sama5_common.h b/include/configs/at91-sama5_common.h index 9a73e3afca50a1b6adb6c1892681e3eb526fde8f..b93c67be52a2d0398bddfe5bf05f6c3d3af04baf 100644 --- a/include/configs/at91-sama5_common.h +++ b/include/configs/at91-sama5_common.h @@ -21,31 +21,12 @@ #define CONFIG_BOOTP_BOOTFILESIZE #ifdef CONFIG_SD_BOOT -#define CONFIG_BOOTCOMMAND "if test ! -n ${dtb_name}; then " \ - "setenv dtb_name at91-${board_name}.dtb; " \ - "fi; " \ - "fatload mmc 0:1 0x21000000 ${dtb_name}; " \ - "fatload mmc 0:1 0x22000000 zImage; " \ - "bootz 0x22000000 - 0x21000000" - #else #ifdef CONFIG_NAND_BOOT /* u-boot env in nand flash */ -#define CONFIG_BOOTCOMMAND "nand read 0x21000000 0x180000 0x80000;" \ - "nand read 0x22000000 0x200000 0x600000;" \ - "bootz 0x22000000 - 0x21000000" #elif CONFIG_SPI_BOOT /* u-boot env in serial flash, by default is bus 0 and cs 0 */ -#define CONFIG_BOOTCOMMAND "sf probe 0; " \ - "sf read 0x21000000 0x60000 0xc000; " \ - "sf read 0x22000000 0x6c000 0x394000; " \ - "bootz 0x22000000 - 0x21000000" -#elif CONFIG_QSPI_BOOT -#define CONFIG_BOOTCOMMAND "sf probe 0; " \ - "sf read 0x21000000 0x180000 0x80000; " \ - "sf read 0x22000000 0x200000 0x600000; " \ - "bootz 0x22000000 - 0x21000000" #endif #endif diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index d09a5dbf10f0cb7c3c3ed59bb86340de9085c209..c9344e862ae926a9911edaa0109456d49988789f 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -87,27 +87,13 @@ #ifdef CONFIG_SYS_USE_DATAFLASH_CS0 /* bootstrap + u-boot + env + linux in dataflash on CS0 */ -#define CONFIG_BOOTCOMMAND "sf probe 0:0; " \ - "sf read 0x22000000 0x84000 0x294000; " \ - "bootm 0x22000000" - -#elif CONFIG_SYS_USE_DATAFLASH_CS1 - -#define CONFIG_BOOTCOMMAND "sf probe 0:1; " \ - "sf read 0x22000000 0x84000 0x294000; " \ - "bootm 0x22000000" - #elif defined(CONFIG_SYS_USE_NANDFLASH) /* bootstrap + u-boot + env + linux in nandflash */ -#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" #else /* CONFIG_SYS_USE_MMC */ /* bootstrap + u-boot + env + linux in mmc */ /* For FAT system, most cases it should be in the reserved sector */ - -#define CONFIG_BOOTCOMMAND \ - "fatload mmc 0:1 0x22000000 uImage; bootm" #endif #endif diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index fb4695c1abf504853268eaa5e46969bf39a7450e..7fce98f0038f5a4caecd9a7ce06a285ddad14280 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -90,21 +90,14 @@ #ifdef CONFIG_SYS_USE_DATAFLASH_CS0 /* bootstrap + u-boot + env + linux in dataflash on CS0 */ -#define CONFIG_BOOTCOMMAND "sf probe 0; " \ - "sf read 0x22000000 0x84000 0x294000; " \ - "bootm 0x22000000" #elif CONFIG_SYS_USE_DATAFLASH_CS3 /* bootstrap + u-boot + env + linux in dataflash on CS3 */ -#define CONFIG_BOOTCOMMAND "sf probe 0:3; " \ - "sf read 0x22000000 0x84000 0x294000; " \ - "bootm 0x22000000" #else /* CONFIG_SYS_USE_NANDFLASH */ /* bootstrap + u-boot + env + linux in nandflash */ -#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" #endif #endif diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index e7fca468aa562ca3e527ba094369eadd7cd6e9a7..5aa9fee2e12e9e4625d011ceb7cf3d57e073bde2 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -207,14 +207,10 @@ #ifdef CONFIG_SYS_USE_DATAFLASH /* bootstrap + u-boot + env + linux in dataflash on CS0 */ -#define CONFIG_BOOTCOMMAND "sf probe 0; " \ - "sf read 0x22000000 0x84000 0x294000; " \ - "bootm 0x22000000" #elif CONFIG_SYS_USE_NANDFLASH /* bootstrap + u-boot + env + linux in nandflash */ -#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" #endif #endif diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 500c9ae3951e5bc8631dda90268736becfd3c248..973e8894d67af033bc648d434e4acf44378b6bb0 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -64,16 +64,8 @@ #ifdef CONFIG_NAND_BOOT /* bootstrap + u-boot + env in nandflash */ - -#define CONFIG_BOOTCOMMAND \ - "nand read 0x70000000 0x200000 0x300000;" \ - "bootm 0x70000000" #elif CONFIG_SD_BOOT /* bootstrap + u-boot + env + linux in mmc */ - -#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x71000000 dtb; " \ - "fatload mmc 0:1 0x72000000 zImage; " \ - "bootz 0x72000000 - 0x71000000" #endif /* Defines for SPL */ diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index 43f985207226778a09cba2a9560c5fc63a3b96bc..f102dbe5c933c4ea383fad3d08bfcf249015032c 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -71,28 +71,10 @@ #ifdef CONFIG_SPI_BOOT /* bootstrap + u-boot + env + linux in dataflash on CS0 */ -#define CONFIG_BOOTCOMMAND \ - "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \ - "sf probe 0; sf read 0x22000000 0x100000 0x300000; " \ - "bootm 0x22000000" #elif defined(CONFIG_NAND_BOOT) /* bootstrap + u-boot + env + linux in nandflash */ -#define CONFIG_BOOTCOMMAND \ - "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \ - "nand read 0x21000000 0x180000 0x080000;" \ - "nand read 0x22000000 0x200000 0x400000;" \ - "bootm 0x22000000 - 0x21000000" - -#else /* CONFIG_SD_BOOT */ - -#define CONFIG_BOOTCOMMAND \ - "setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \ - "fatload mmc 0:1 0x21000000 dtb;" \ - "fatload mmc 0:1 0x22000000 uImage;" \ - "bootm 0x22000000 - 0x21000000" - #endif /* SPL */ diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index c703276bcbc09da4451ff63097f4d7f5fa623e09..5bc47d6442f9e6f4d1fdd7cbc7c63b3cc29ba82c 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -59,22 +59,13 @@ #ifdef CONFIG_SYS_USE_DATAFLASH /* bootstrap + u-boot + env + linux in dataflash on CS0 */ -#define CONFIG_BOOTCOMMAND "sf probe 0; " \ - "sf read 0x22000000 0x84000 0x294000; " \ - "bootm 0x22000000" #elif CONFIG_SYS_USE_NANDFLASH /* bootstrap + u-boot + env + linux in nandflash */ -#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x600000; " \ - "nand read 0x21000000 0x180000 0x80000; " \ - "bootz 0x22000000 - 0x21000000" #else /* CONFIG_SYS_USE_MMC */ /* bootstrap + u-boot + env + linux in mmc */ -#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 at91sam9rlek.dtb; " \ - "fatload mmc 0:1 0x22000000 zImage; " \ - "bootz 0x22000000 - 0x21000000" #endif #endif diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index f15711ba2b1b3f352b361e90abb27c0e6ab664b0..e6d5b9925d3922fc9c32eeef018a46ad1a0cdee5 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -62,20 +62,10 @@ #ifdef CONFIG_NAND_BOOT /* bootstrap + u-boot + env + linux in nandflash */ -#define CONFIG_BOOTCOMMAND "nand read " \ - "0x22000000 0x200000 0x600000; " \ - "nand read 0x21000000 0x180000 0x20000; " \ - "bootz 0x22000000 - 0x21000000" #elif defined(CONFIG_SPI_BOOT) /* bootstrap + u-boot + env + linux in spi flash */ -#define CONFIG_BOOTCOMMAND "sf probe 0; " \ - "sf read 0x22000000 0x100000 0x300000; " \ - "bootm 0x22000000" #elif defined(CONFIG_SYS_USE_DATAFLASH) /* bootstrap + u-boot + env + linux in data flash */ -#define CONFIG_BOOTCOMMAND "sf probe 0; " \ - "sf read 0x22000000 0x84000 0x294000; " \ - "bootm 0x22000000" #endif /* SPL */ diff --git a/include/configs/baltos.h b/include/configs/baltos.h index 32f2174641a87ffe68c679b295088c809ab47e11..f4ab6640cdc8521ae34ec6620b4bee051a679ef7 100644 --- a/include/configs/baltos.h +++ b/include/configs/baltos.h @@ -185,15 +185,6 @@ /*DFUARGS*/ #endif -#define CONFIG_BOOTCOMMAND \ - "run findfdt; " \ - "run usbboot;" \ - "run mmcboot;" \ - "setenv mmcdev 1; " \ - "setenv bootpart 1:2; " \ - "run mmcboot;" \ - "run nandboot;" - /* NS16550 Configuration */ #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ #define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h index a57edf5238d3277750f361e603ddc50d0ef57b07..81b4218c88822cade30c7d80862717cd3e5ec34d 100644 --- a/include/configs/bcm_ns3.h +++ b/include/configs/bcm_ns3.h @@ -44,7 +44,6 @@ /* Access eMMC Boot_1 and Boot_2 partitions */ /* enable 64-bit PCI resources */ -#define CONFIG_SYS_PCI_64BIT 1 #define CONSOLE_ARGS "console_args=console=ttyS0,115200n8\0" #define MAX_CPUS "max_cpus=maxcpus=8\0" @@ -277,12 +276,6 @@ "setenv bl_flash_pending_rfs_imgs;" \ "fi; \0" -#define CONFIG_BOOTCOMMAND "run flash_pending_rfs_imgs;" \ - "run fastboot_nitro && "\ - "run bootcmd_mmc_fits || "\ - "run bootcmd_usb || "\ - "run bootcmd_pxe" - /* Flashing commands */ #define TFTP_QSPI_PARAM \ "fip_qspi_addr=0x0\0"\ diff --git a/include/configs/bcmstb.h b/include/configs/bcmstb.h index e7f380b5155aa0a8d005e8269bf9257530d95464..98c815961c04e321df7cbf0b3870810140a108c5 100644 --- a/include/configs/bcmstb.h +++ b/include/configs/bcmstb.h @@ -90,7 +90,6 @@ extern phys_addr_t prior_stage_fdt_address; /* * CONFIG_SYS_LOAD_ADDR - 1 MiB. */ -#define CONFIG_SYS_FDT_SAVE_ADDRESS 0x1f00000 #define CONFIG_SYS_CBSIZE 512 #define CONFIG_SYS_MAXARGS 32 @@ -104,7 +103,6 @@ extern phys_addr_t prior_stage_fdt_address; */ #define V_NS16550_CLK 81000000 -#define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE (-4) #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK @@ -126,8 +124,6 @@ extern phys_addr_t prior_stage_fdt_address; /* * Flash configuration. */ -#define CONFIG_SPI_FLASH_STMICRO -#define CONFIG_SPI_FLASH_MACRONIX /* * Filesystem configuration. diff --git a/include/configs/beacon-rzg2m.h b/include/configs/beacon-rzg2m.h index 14d6df328a74d249ca6ee8e0d1f3c6fa6661146a..7eaafb0d451a6b68ef85dc32b2cff24dc9b6407a 100644 --- a/include/configs/beacon-rzg2m.h +++ b/include/configs/beacon-rzg2m.h @@ -67,18 +67,4 @@ "booti; " \ "fi;\0" -#undef CONFIG_BOOTCOMMAND - -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else booti ${loadaddr} - ${fdt_addr}; fi" - #endif /* __BEACON_RZG2M_H */ diff --git a/include/configs/bk4r1.h b/include/configs/bk4r1.h index c377094f11c1a7be7dd79eeffdd851d33d8944cb..e0508b015e867e9f42cc7cc66fa52f1f0c210ce3 100644 --- a/include/configs/bk4r1.h +++ b/include/configs/bk4r1.h @@ -32,10 +32,6 @@ "preboot=" BK4_NET_INIT \ "if ${ncenable}; then run if_netconsole start_netconsole; fi\0" -/* BK4r1 boot command sets GPIO103/PTC30 to force USB hub out of reset*/ -#define BK4_BOOTCOMMAND "run set_gpio122; run set_gpio96; sf probe; " \ - "run manage_userdata; " - /* Enable PREBOOT variable */ /* Set ARP_TIMEOUT to 500ms */ @@ -76,7 +72,6 @@ #define CONFIG_BOARD_SIZE_LIMIT 520192 /* boot command, including the target-defined one if any */ -#define CONFIG_BOOTCOMMAND BK4_BOOTCOMMAND "run bootcmd_nand" /* Extra env settings (including the target-defined ones if any) */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/blanche.h b/include/configs/blanche.h index f048f158ed2ac70ef9300d11f0ab96d7c77ca91a..882b94f55a773f8028667d935882098d901c3e5c 100644 --- a/include/configs/blanche.h +++ b/include/configs/blanche.h @@ -45,8 +45,6 @@ #endif /* Board Clock */ -#define RMOBILE_XTAL_CLK 20000000u -#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK /* ENV setting */ diff --git a/include/configs/broadcom_bcm963158.h b/include/configs/broadcom_bcm963158.h index de45f74923a2b297fbe7e7d6bdef4f956b6af9f6..5aa784d88cac3ab44cec17f4dd94f038099ecbde 100644 --- a/include/configs/broadcom_bcm963158.h +++ b/include/configs/broadcom_bcm963158.h @@ -28,7 +28,6 @@ #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_SELF_INIT #endif /* CONFIG_MTD_RAW_NAND */ /* diff --git a/include/configs/broadcom_bcm968360bg.h b/include/configs/broadcom_bcm968360bg.h index 0391f06218192ff824ef0f6169e952915fc4fd43..01bab046ddb0963814f999181c3e09efe06ef155 100644 --- a/include/configs/broadcom_bcm968360bg.h +++ b/include/configs/broadcom_bcm968360bg.h @@ -27,7 +27,6 @@ #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_SELF_INIT #endif /* CONFIG_MTD_RAW_NAND */ /* diff --git a/include/configs/broadcom_bcm968380gerg.h b/include/configs/broadcom_bcm968380gerg.h index 866de2527d0bf7528e0e6c01611ad266d8d871c4..c1c1b37fabd97d45ac7e8da1acfbc65059c458bc 100644 --- a/include/configs/broadcom_bcm968380gerg.h +++ b/include/configs/broadcom_bcm968380gerg.h @@ -8,5 +8,4 @@ #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_SELF_INIT #endif /* CONFIG_MTD_RAW_NAND */ diff --git a/include/configs/broadcom_bcm968580xref.h b/include/configs/broadcom_bcm968580xref.h index 179aa9d608c8f74042529cbaca077ce173933d8b..ebfc2ecc0be14226cfe37b7185cca20d6cd9e001 100644 --- a/include/configs/broadcom_bcm968580xref.h +++ b/include/configs/broadcom_bcm968580xref.h @@ -27,7 +27,6 @@ #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_SELF_INIT #endif /* CONFIG_MTD_RAW_NAND */ /* diff --git a/include/configs/brxre1.h b/include/configs/brxre1.h index d9179760b926567979b3d2ead1ff64d73a084124..d34d69778f1ba5399fa73d53d69823747cfa5dfb 100644 --- a/include/configs/brxre1.h +++ b/include/configs/brxre1.h @@ -53,8 +53,6 @@ BUR_COMMON_ENV \ " do run b_${target}; if test ${b_break} = 1; then; exit; fi; done\0" #endif /* !CONFIG_SPL_BUILD*/ -#define CONFIG_BOOTCOMMAND "mmc dev 1; run b_default" - /* Environment */ #endif /* __CONFIG_BRXRE1_H__ */ diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index 58ab1b7deed43b02f4919f7366fe504c5d7a1c75..1cde5f77f221484bcf1bca85ada139fe87a11213 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -11,15 +11,12 @@ #include #include "siemens-env-common.h" -#include "siemens-ccp-common.h" /* SPL config */ #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800 #define CONFIG_SPL_STACK 0x013E000 #define CONFIG_SPL_BSS_START_ADDR 0x00128000 @@ -35,9 +32,6 @@ #define CONFIG_FACTORYSET -#undef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING GENERATE_CCP_VERSION("01", "07") - #define CONFIG_REMAKE_ELF /* ENET Config */ @@ -117,20 +111,11 @@ ENV_EMMC \ ENV_NET -#define CONFIG_BOOTCOMMAND \ - "if usrbutton; then " \ - "run flash_self_test; " \ - "reset; " \ - "fi;" \ - "run flash_self;" \ - "reset;" - /* Default location for tftp and bootm */ #define CONFIG_SYS_INIT_SP_ADDR 0x80200000 /* On CCP board, USDHC1 is for eMMC */ #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* eMMC */ -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h index 45235957b4d71ac62d0a1a2d35a3ae9625d4637a..d5549f62cee3eaac6bf9700c5b52e7a8d2ca99a1 100644 --- a/include/configs/cgtqmx8.h +++ b/include/configs/cgtqmx8.h @@ -14,8 +14,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800 #define CONFIG_SPL_STACK 0x013E000 #define CONFIG_SPL_BSS_START_ADDR 0x00128000 @@ -33,7 +31,6 @@ #define CONFIG_REMAKE_ELF /* Flat Device Tree Definitions */ -#define CONFIG_OF_BOARD_SETUP #define CONFIG_SYS_BOOTMAPSZ (256 << 20) #define CONFIG_SYS_FSL_ESDHC_ADDR 0 @@ -82,7 +79,7 @@ "boot_fdt=try\0" \ "fdt_file=imx8qm-cgt-qmx8.dtb\0" \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \ @@ -123,24 +120,10 @@ "booti; " \ "fi;\0" -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else booti ${loadaddr} - ${fdt_addr}; fi" - /* Link Definitions */ #define CONFIG_SYS_INIT_SP_ADDR 0x80200000 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ #define CONFIG_SYS_FSL_USDHC_NUM 3 diff --git a/include/configs/chiliboard.h b/include/configs/chiliboard.h index 49a8d71031809dbdc89a1d00fa5909b82e38eba8..afddedd2eb7a8db4f12e0bf0b4193cacff63729c 100644 --- a/include/configs/chiliboard.h +++ b/include/configs/chiliboard.h @@ -31,11 +31,6 @@ "nand read ${loadaddr} NAND.kernel; " \ "bootz ${loadaddr} - ${fdt_addr}\0" -#define CONFIG_BOOTCOMMAND \ - "run mmcboot; " \ - "run nandboot; " \ - "run netboot" - #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x82000000\0" \ "fdt_addr=0x87800000\0" \ diff --git a/include/configs/chromebook_coral.h b/include/configs/chromebook_coral.h index 4d44b3b80137447e73ac628f39093282f831f01f..0eeea80b32f498b6eaf91990ea186f61bd52ce85 100644 --- a/include/configs/chromebook_coral.h +++ b/include/configs/chromebook_coral.h @@ -10,19 +10,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_BOOTCOMMAND \ - "tpm init; tpm startup TPM2_SU_CLEAR; " \ - "read mmc 0:2 100000 0 80; setexpr loader *001004f0; " \ - "setexpr size *00100518; setexpr blocks $size / 200; " \ - "read mmc 0:2 100000 80 $blocks; setexpr setup $loader - 1000; " \ - "setexpr cmdline_ptr $loader - 2000; " \ - "setexpr.s cmdline *$cmdline_ptr; " \ - "setexpr cmdline gsub %U \\\\${uuid}; " \ - "if part uuid mmc 0:2 uuid; then " \ - "zboot start 100000 0 0 0 $setup cmdline; " \ - "zboot load; zboot setup; zboot dump; zboot go;" \ - "fi" - #include #include @@ -31,8 +18,6 @@ "stdout=vidconsole,serial\0" \ "stderr=vidconsole,serial\0" -#define CONFIG_TPL_TEXT_BASE 0xffff8000 - #define CONFIG_SYS_NS16550_MEM32 #undef CONFIG_SYS_NS16550_PORT_MAPPED diff --git a/include/configs/chromebook_samus.h b/include/configs/chromebook_samus.h index 2fe3e721993201d36953e9040b2196c575285e5b..9d5a63cabaab9780eaa3aeac36fe5f9cdffb6839 100644 --- a/include/configs/chromebook_samus.h +++ b/include/configs/chromebook_samus.h @@ -23,6 +23,4 @@ "stdout=vidconsole,serial\0" \ "stderr=vidconsole,serial\0" -#define CONFIG_TPL_TEXT_BASE 0xfffd8000 - #endif /* __CONFIG_H */ diff --git a/include/configs/ci20.h b/include/configs/ci20.h index 0a7043a80c5b78a20ead1c163e8c07f02a91268c..17954fe3aab39d4b130e0c33b18e872215c0c927 100644 --- a/include/configs/ci20.h +++ b/include/configs/ci20.h @@ -35,7 +35,6 @@ #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot argument buffer size */ -#define CONFIG_VERSION_VARIABLE /* U-BOOT version */ /* Miscellaneous configuration options */ #define CONFIG_SYS_BOOTM_LEN (64 << 20) @@ -50,6 +49,4 @@ #define CONFIG_SPL_START_S_PATH "arch/mips/mach-jz47xx" -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x1c /* 14 KiB offset */ - #endif /* __CONFIG_CI20_H__ */ diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index fdc84297c6232231fa47db72953ffbb6fd7a609e..a5bf6ccbf4005db5b9de7d6c4b7206a14043e095 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -30,7 +30,6 @@ #undef CONFIG_SYS_AUTOLOAD #undef CONFIG_EXTRA_ENV_SETTINGS -#undef CONFIG_BOOTCOMMAND #define CONFIG_SYS_AUTOLOAD "no" @@ -50,7 +49,7 @@ "fdtaddr=0x83000000\0" \ "mmcdev_def="__stringify(CONFIG_SYS_MMC_DEV)"\0" \ "usbdev_def="__stringify(CONFIG_SYS_USB_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "usbpart=" __stringify(CONFIG_SYS_USB_IMG_LOAD_PART) "\0" \ "doboot=bootz ${loadaddr} - ${fdtaddr}\0" \ "mmc_config=mmc dev ${mmcdev}; mmc rescan\0" \ @@ -86,11 +85,6 @@ "emmcbootscript=setenv mmcdev 1; setenv mmcblk 2; run mmcbootscript\0" \ "emmcboot=setenv mmcdev 1; setenv mmcblk 2; run mmcboot\0" \ -#define CONFIG_BOOTCOMMAND \ - "echo SD boot attempt ...; run sdbootscript; run sdboot; " \ - "echo eMMC boot attempt ...; run emmcbootscript; run emmcboot; " \ - "echo USB boot attempt ...; run usbbootscript; " - /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index d61d759092c6e39e20e97be8145e60ac783d343d..40bc82154802b8ae897dfc8d3f4a3284e3f30da7 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -13,7 +13,6 @@ #include "mx6_common.h" /* Machine config */ -#define CONFIG_SYS_LITTLE_ENDIAN /* MMC */ #define CONFIG_SYS_FSL_USDHC_NUM 3 @@ -177,7 +176,6 @@ /* Display */ #define CONFIG_IMX_HDMI -#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO /* EEPROM */ diff --git a/include/configs/cm_t335.h b/include/configs/cm_t335.h index 4b6e391d576f43b2e0a5520c7940c17a40770268..7e187a4e869745ca84170a90de7b25cb42682aa5 100644 --- a/include/configs/cm_t335.h +++ b/include/configs/cm_t335.h @@ -55,18 +55,6 @@ "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ MMCARGS \ NANDARGS - -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loaduimage; then " \ - "run mmcboot; " \ - "else run nandboot; " \ - "fi; " \ - "fi; " \ - "else run nandboot; fi" #endif /* CONFIG_SPL_BUILD */ #define CONFIG_TIMESTAMP diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index e250dc92dda875c91285c0517b39138974b13330..2d09a6f4c7591439bade4eb07419f0cb8ca36a69 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -78,18 +78,6 @@ "load mmc 1 ${fdtaddr} ${fdtfile} && " \ "bootz ${loadaddr} - ${fdtaddr}\0" -#define CONFIG_BOOTCOMMAND \ - "mmc dev 0; " \ - "if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "fi; " \ - "fi; " \ - "mmc dev 1; " \ - "if mmc rescan; then " \ - "run emmcboot; " \ - "fi;" - /* SPL defines. */ #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + (128 << 20)) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index dbb47ccb2a73369e49a38a7b4e8e82572644c7f5..3e19e99c248330115ad447ccf913ca17f6295b94 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -54,7 +54,6 @@ */ #if 0 -#define CONFIG_WATCHDOG #define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */ #endif @@ -124,7 +123,6 @@ u-boot: 'set' command */ #if 0 -#define CONFIG_BOOTCOMMAND "bootm 0xffe80000" /*Autoboto command, please enter a valid image address in flash */ /* User network settings */ @@ -246,36 +244,6 @@ enter a valid image address in flash */ CF_CACR_CEIB | CF_CACR_DCM | \ CF_CACR_EUSP) -/*----------------------------------------------------------------------- - * Memory bank definitions - * - * Please refer also to Motorola Coldfire user manual - Chapter XXX - * - */ -#define CONFIG_SYS_BR0_PRELIM 0xFFE00201 -#define CONFIG_SYS_OR0_PRELIM 0xFFE00014 - -#define CONFIG_SYS_BR1_PRELIM 0 -#define CONFIG_SYS_OR1_PRELIM 0 - -#define CONFIG_SYS_BR2_PRELIM 0 -#define CONFIG_SYS_OR2_PRELIM 0 - -#define CONFIG_SYS_BR3_PRELIM 0 -#define CONFIG_SYS_OR3_PRELIM 0 - -#define CONFIG_SYS_BR4_PRELIM 0 -#define CONFIG_SYS_OR4_PRELIM 0 - -#define CONFIG_SYS_BR5_PRELIM 0 -#define CONFIG_SYS_OR5_PRELIM 0 - -#define CONFIG_SYS_BR6_PRELIM 0 -#define CONFIG_SYS_OR6_PRELIM 0 - -#define CONFIG_SYS_BR7_PRELIM 0x00000701 -#define CONFIG_SYS_OR7_PRELIM 0xFF00007C - /*----------------------------------------------------------------------- * LED config */ diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index 6b3e1c665a0d360b30b5900fbc6305d7800af295..787fe33941b6c3580ac7ade60d9bde010fa3ef1f 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -72,7 +72,6 @@ #if defined(CONFIG_TARGET_COLIBRI_IMX6ULL_NAND) /* Run Distro Boot script if ubiboot fails */ -#define CONFIG_BOOTCOMMAND "run ubiboot || run distro_bootcmd;" #define DFU_ALT_NAND_INFO "imx6ull-bcb part 0,1;u-boot1 part 0,2;u-boot2 part 0,3;u-boot-env part 0,4;ubi partubi 0,5" #define MODULE_EXTRA_ENV_SETTINGS \ "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \ @@ -165,7 +164,6 @@ #if defined(CONFIG_DM_VIDEO) #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR -#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #endif diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h index 82926afbdf60192cabc6540f7430bbdfa923c466..01182505cc8bab05c76ddaeae6f44cbd1698c8c1 100644 --- a/include/configs/colibri-imx8x.h +++ b/include/configs/colibri-imx8x.h @@ -80,7 +80,7 @@ "mmcargs=setenv bootargs ${consoleargs} " \ "root=PARTUUID=${uuid} rootwait " \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "netargs=setenv bootargs ${consoleargs} " \ "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp " \ "${vidargs}\0" \ @@ -102,8 +102,6 @@ /* Environment in eMMC, before config block at the end of 1st "boot sector" */ -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - /* On Colibri iMX8X USDHC1 is eMMC, USDHC2 is 4-bit SD */ #define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index b103186bf46328acf6b093615af105df21e035eb..c8e733bc3663a9e059c8472bd3ff82e5251e30c7 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -35,8 +35,6 @@ #define CONFIG_USBD_HS /* Framebuffer and LCD */ -#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE -#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index ac188ee3ac650307a8c6fac1ffbef93b69543957..faf27ba4fa3777bca859f7e9dfa999dad0395e0c 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -110,8 +110,6 @@ "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ #if defined(CONFIG_TARGET_COLIBRI_IMX7_NAND) -#define CONFIG_BOOTCOMMAND "run ubiboot ; echo ; echo ubiboot failed ; " \ - "run distro_bootcmd;" #define MODULE_EXTRA_ENV_SETTINGS \ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ UBI_BOOTCMD @@ -199,7 +197,6 @@ #define CONFIG_USBD_HS #if defined(CONFIG_DM_VIDEO) -#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #endif diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h index 08786765d5af4bb3805314a6deb5f2084dc012b7..0be7f5a416d0e86f111f44879752d41860e29702 100644 --- a/include/configs/colibri_pxa270.h +++ b/include/configs/colibri_pxa270.h @@ -12,21 +12,12 @@ /* * High Level Board Configuration Options */ -#define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */ /* Avoid overwriting factory configuration block */ #define CONFIG_BOARD_SIZE_LIMIT 0x40000 /* * Environment settings */ -#define CONFIG_BOOTCOMMAND \ - "if fatload mmc 0 0xa0000000 uImage; then " \ - "bootm 0xa0000000; " \ - "fi; " \ - "if usb reset && fatload usb 0 0xa0000000 uImage; then " \ - "bootm 0xa0000000; " \ - "fi; " \ - "bootm 0xc0000;" #define CONFIG_TIMESTAMP /* diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index e947b58d96cea51ab758d05c47843ff5562a899b..c377187b803c452c21a1577cc3cf909fb36d9309 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -19,7 +19,6 @@ #define CONFIG_LCD_LOGO /* NAND support */ -#define CONFIG_TEGRA_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define UBOOT_UPDATE \ diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 71fe768d67929f089dec1af21e8d367d725c8471..62f85185b761fe3f79495155918b33bea02ae925 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -14,10 +14,7 @@ #include #include -#define CONFIG_SYS_FSL_CLK - #ifdef CONFIG_VIDEO_FSL_DCU_FB -#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #define CONFIG_SYS_FSL_DCU_LE @@ -69,8 +66,6 @@ "ubi read ${fdt_addr_r} dtb && " \ "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ -#define CONFIG_BOOTCOMMAND "run ubiboot || run distro_bootcmd;" - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(USB, usb, 0) \ diff --git a/include/configs/comtrend_vr3032u.h b/include/configs/comtrend_vr3032u.h index fc890af915a75604624b3e2bcd3e84a4e4321539..ee29f702f8f31e00413d5d5188101421c45528de 100644 --- a/include/configs/comtrend_vr3032u.h +++ b/include/configs/comtrend_vr3032u.h @@ -10,5 +10,4 @@ #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_SELF_INIT #endif /* CONFIG_MTD_RAW_NAND */ diff --git a/include/configs/condor.h b/include/configs/condor.h index 36466f0f500d8d03a3ec961bce3585715bc9a987..822ef7118e1712caf762e9f3845d2099b3496679 100644 --- a/include/configs/condor.h +++ b/include/configs/condor.h @@ -27,7 +27,6 @@ /* Board Clock */ /* XTAL_CLK : 33.33MHz */ -#define CONFIG_SYS_CLK_FREQ 33333333u /* Generic Timer Definitions (use in assembler source) */ #define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ diff --git a/include/configs/conga-qeval20-qa3-e3845.h b/include/configs/conga-qeval20-qa3-e3845.h index 01b67f7e2d8bd781b69f534e941d6738a080c66c..6e819ad25538018f3aa6e4a1c7c47f3a385a6e0b 100644 --- a/include/configs/conga-qeval20-qa3-e3845.h +++ b/include/configs/conga-qeval20-qa3-e3845.h @@ -21,12 +21,6 @@ #define VIDEO_IO_OFFSET 0 #define CONFIG_X86EMU_RAW_IO -#undef CONFIG_BOOTCOMMAND -#define CONFIG_BOOTCOMMAND \ - "load scsi 0:2 03000000 /boot/vmlinuz-${kernel-ver}-generic;" \ - "load scsi 0:2 04000000 /boot/initrd.img-${kernel-ver}-generic;" \ - "run boot" - #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ "kernel-ver=4.4.0-22\0" \ diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h index 5120c7b3777008897d980598db8b53aec5555f30..ff385d9c6bef54b897eba244801b7e42de99ffb1 100644 --- a/include/configs/controlcenterdc.h +++ b/include/configs/controlcenterdc.h @@ -122,26 +122,6 @@ " gpio clear ${gpio1}; gpio set ${gpio2};" \ " fi; sleep 0.12; done\0" -#define NFSBOOTCOMMAND \ - "setenv bootargs root=/dev/nfs rw " \ - "nfsroot=${serverip}:${rootpath} " \ - "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off " \ - "console=${consoledev},${baudrate} ${othbootargs}; " \ - "tftpboot ${bootfile_addr} ${bootfile}; " \ - "bootm ${bootfile_addr}" - -#define MMCBOOTCOMMAND \ - "setenv bootargs root=/dev/mmcblk0p3 rw rootwait " \ - "console=${consoledev},${baudrate} ${othbootargs}; " \ - "ext2load mmc 0:2 ${bootfile_addr} ${bootfile}; " \ - "bootm ${bootfile_addr}" - -#define CONFIG_BOOTCOMMAND \ - "if env exists keyprogram; then;" \ - " setenv keyprogram; run nfsboot;" \ - " fi;" \ - " run dobootfail" - /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 1cf5c037e850c4803ca14520b5066a998f57fdd3..d6d679fd7dd9371ed1b140298294f85e1da5df4a 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -10,6 +10,9 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define SPLASH_SETTINGS "splashsource=virtio_fs\0" \ + "splashimage=0x1000000\0" + #include #define CONFIG_SYS_MONITOR_LEN (1 << 20) diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 1e55d5259d2c5dc5680652e1272a1c2e5e038e19..f6e0b2a7ea85d54f6ce9283cf0fc49fb2f1e92b4 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -47,15 +47,12 @@ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ -#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ #if defined(CONFIG_SPIFLASH) #elif defined(CONFIG_SDCARD) #define CONFIG_FSL_FIXED_MMC_LOCATION #endif -#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() /* sysclk for MPC85xx */ - /* * These can be toggled for performance analysis, otherwise use default. */ @@ -128,10 +125,6 @@ #define CONFIG_SYS_FLASH_OR_PRELIM ((0xf8000ff7 & ~OR_GPCM_SCY & ~OR_GPCM_EHTR) \ | OR_GPCM_SCY_8 | OR_GPCM_EHTR_CLEAR) -#define CONFIG_SYS_BR1_PRELIM \ - (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V) -#define CONFIG_SYS_OR1_PRELIM 0xf8000ff7 - #define PIXIS_BASE 0xffdf0000 /* PIXIS registers */ #ifdef CONFIG_PHYS_64BIT #define PIXIS_BASE_PHYS 0xfffdf0000ull @@ -139,9 +132,6 @@ #define PIXIS_BASE_PHYS PIXIS_BASE #endif -#define CONFIG_SYS_BR3_PRELIM (BR_PHYS_ADDR(PIXIS_BASE_PHYS) | BR_PS_8 | BR_V) -#define CONFIG_SYS_OR3_PRELIM 0xffffeff7 /* 32KB but only 4k mapped */ - #define PIXIS_LBMAP_SWITCH 7 #define PIXIS_LBMAP_MASK 0xf0 #define PIXIS_LBMAP_SHIFT 4 @@ -187,21 +177,6 @@ | OR_FCM_SCY_1 \ | OR_FCM_TRLX \ | OR_FCM_EHTR) - -#ifdef CONFIG_MTD_RAW_NAND -#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ -#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ -#define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ -#define CONFIG_SYS_OR2_PRELIM CONFIG_SYS_FLASH_OR_PRELIM /* NOR Options */ -#else -#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ -#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_FLASH_OR_PRELIM /* NOR Options */ -#define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ -#define CONFIG_SYS_OR2_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ -#endif -#else -#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ -#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_FLASH_OR_PRELIM /* NOR Options */ #endif /* CONFIG_NAND_FSL_ELBC */ #define CONFIG_SYS_FLASH_EMPTY_INFO @@ -414,7 +389,6 @@ #define CONFIG_HAS_FSL_MPH_USB #if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB) -#define CONFIG_USB_EHCI_FSL #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #endif @@ -469,32 +443,6 @@ "fdtfile=p4080ds/p4080ds.dtb\0" \ "bdev=sda3\0" -#define HDBOOT \ - "setenv bootargs root=/dev/$bdev rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr - $fdtaddr" - -#define NFSBOOTCOMMAND \ - "setenv bootargs root=/dev/nfs rw " \ - "nfsroot=$serverip:$rootpath " \ - "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr - $fdtaddr" - -#define RAMBOOTCOMMAND \ - "setenv bootargs root=/dev/ram rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $ramdiskaddr $ramdiskfile;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr $ramdiskaddr $fdtaddr" - -#define CONFIG_BOOTCOMMAND HDBOOT - #include #endif /* __CONFIG_H */ diff --git a/include/configs/corvus.h b/include/configs/corvus.h index 882cb48ecaab4fdb09787dba4fa9535e54173948..27284f791381971c7e8a2b80780ceddfa1741e6f 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -66,7 +66,6 @@ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8 -#define CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT #endif /* Ethernet */ @@ -79,10 +78,6 @@ /* bootstrap + u-boot + env in nandflash */ -#define CONFIG_BOOTCOMMAND \ - "nand read 0x70000000 0x200000 0x300000;" \ - "bootm 0x70000000" - /* Defines for SPL */ #define CONFIG_SPL_MAX_SIZE (12 * SZ_1K) #define CONFIG_SPL_STACK (SZ_16K) diff --git a/include/configs/crs3xx-98dx3236.h b/include/configs/crs3xx-98dx3236.h index 27b45a7605d21256bf443c1261d35e2bf16533cf..4dbc75826699e3d94f47ebab27b07af94e800299 100644 --- a/include/configs/crs3xx-98dx3236.h +++ b/include/configs/crs3xx-98dx3236.h @@ -11,7 +11,6 @@ */ #define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) /* 64 MB */ -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg /* Environment in SPI NOR flash */ diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index f7c5d400cf923b4ac7eb3e59a47e6b65f9d35288..97c9276e0e22357872af2ec4f1da747cafae32d1 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -18,7 +18,6 @@ * SoC Configuration */ #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH -#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) #define CONFIG_SYS_OSCIN_FREQ 24000000 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) @@ -136,10 +135,6 @@ 59, 60, 61, 62, 63 } #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 10 - -#ifndef CONFIG_SPL_BUILD -#define CONFIG_SYS_NAND_SELF_INIT -#endif #endif /* @@ -171,10 +166,6 @@ #define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) #define CONFIG_HWCONFIG /* enable hwconfig */ -#define CONFIG_BOOTCOMMAND \ - "run envboot; " \ - "run mmcboot; " - #define DEFAULT_LINUX_BOOT_ENV \ "loadaddr=0xc0700000\0" \ "fdtaddr=0xc0600000\0" \ diff --git a/include/configs/dart_6ul.h b/include/configs/dart_6ul.h index dd1ba49788a1b82ba292283e278f3535f2811826..fcdf7e9251db24cffa27a0b45bc0cc7407564ed7 100644 --- a/include/configs/dart_6ul.h +++ b/include/configs/dart_6ul.h @@ -90,8 +90,6 @@ "fit_addr=0x82000000\0" \ ENV_MMC -#define CONFIG_BOOTCOMMAND "run mmc_mmc_fit" - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(MMC, mmc, 1) \ diff --git a/include/configs/db-xc3-24g4xg.h b/include/configs/db-xc3-24g4xg.h index 6a4c5a7ab554ed2ff8c5dbe4f70b23e10be2b084..1d242bf4e6503a8626ae540dfe0ede38cfbe3605 100644 --- a/include/configs/db-xc3-24g4xg.h +++ b/include/configs/db-xc3-24g4xg.h @@ -6,12 +6,6 @@ #ifndef _CONFIG_DB_XC3_24G4G_H #define _CONFIG_DB_XC3_24G4G_H -/* - * High Level Configuration Options (easy to change) - */ - -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg - /* Environment in SPI NOR flash */ /* NAND */ diff --git a/include/configs/deneb.h b/include/configs/deneb.h index a33165c1caaa2c486368801e7949993d35b527a8..f155bb8bf507265f5762a64e72e52a4fc8736c22 100644 --- a/include/configs/deneb.h +++ b/include/configs/deneb.h @@ -9,9 +9,6 @@ #include "capricorn-common.h" -#undef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING GENERATE_CCP_VERSION("01", "06") - /* DDR3 board total DDR is 2 GB */ #undef PHYS_SDRAM_1_SIZE #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */ diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 8e8ea56f3cfa5089b083d74c7f13cedb4ec13a52..1e24d05bfb873237cd16dd0a86ba6941837abed9 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -28,7 +28,6 @@ /* * GPIO */ -#define CONFIG_LPC32XX_GPIO /* * Ethernet @@ -84,14 +83,6 @@ * Environment */ -#define CONFIG_BOOTCOMMAND \ - "dhcp; " \ - "tftp ${loadaddr} ${serverip}:${tftpdir}/${bootfile}; " \ - "tftp ${dtbaddr} ${serverip}:${tftpdir}/devkit3250.dtb; " \ - "setenv nfsargs ip=dhcp root=/dev/nfs nfsroot=${serverip}:${nfsroot},tcp; " \ - "setenv bootargs ${bootargs} ${nfsargs} ${userargs}; " \ - "bootm ${loadaddr} - ${dtbaddr}" - #define CONFIG_EXTRA_ENV_SETTINGS \ "autoload=no\0" \ "ethaddr=00:01:90:00:C0:81\0" \ diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index 591a33fca68fc0c458646f7d0d548d529009be80..9282f83728509bbdb56114c82afbf7499ad4c7d6 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -46,15 +46,6 @@ /* TWL4030 */ -/* Board NAND Info */ -#define CONFIG_JFFS2_NAND -/* nand device jffs2 lives on */ -#define CONFIG_JFFS2_DEV "nand0" -/* start of jffs2 partition */ -#define CONFIG_JFFS2_PART_OFFSET 0x680000 -#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */ - /* partition */ - /* BOOTP/DHCP options */ #define CONFIG_BOOTP_NISDOMAIN #define CONFIG_BOOTP_BOOTFILESIZE @@ -126,8 +117,6 @@ "fi; " \ "else run nandboot; fi\0" -#define CONFIG_BOOTCOMMAND "run autoboot" - /* Boot Argument Buffer Size */ /* Defines for SPL */ diff --git a/include/configs/dfi-bt700.h b/include/configs/dfi-bt700.h index 6d0e68e5df1f4d745d7a32b1b284627ca76771b1..53ed7de07201425ca1a55b4748fdf48fae14ec6e 100644 --- a/include/configs/dfi-bt700.h +++ b/include/configs/dfi-bt700.h @@ -26,12 +26,6 @@ #define VIDEO_IO_OFFSET 0 #define CONFIG_X86EMU_RAW_IO -#undef CONFIG_BOOTCOMMAND -#define CONFIG_BOOTCOMMAND \ - "load scsi 0:1 03000000 /boot/vmlinuz-${kernel-ver}-generic;" \ - "load scsi 0:1 04000000 /boot/initrd.img-${kernel-ver}-generic;" \ - "run boot" - #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ "kernel-ver=4.4.0-24\0" \ diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index ee56eb691ad60198c6bfc92d453ad47573609a1c..8b8cd4c31b4018dc5bb19777eb934ca0c2452d6f 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -64,13 +64,6 @@ #endif #endif -/* Watchdog */ -#if defined(CONFIG_SPL_BUILD) -#undef CONFIG_WDT -#undef CONFIG_WATCHDOG -#define CONFIG_HW_WATCHDOG -#endif - #ifndef CONFIG_SPL_BUILD #define CONFIG_EXTRA_ENV_SETTINGS \ "console=ttymxc0,115200\0" \ @@ -84,8 +77,6 @@ "fdtfile=imx6q-dhcom-pdk2.dtb\0"\ BOOTENV -#define CONFIG_BOOTCOMMAND "run distro_bootcmd" - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(MMC, mmc, 2) \ diff --git a/include/configs/display5.h b/include/configs/display5.h index 329a60f1d2062b0636d9b2bdc66b688a9d3f6d24..38ac86928929d2809e44f371917b0d10dc73c055 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -56,16 +56,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_USDHC_NUM 2 -#ifndef CONFIG_BOOTCOMMAND -#define CONFIG_BOOTCOMMAND "if run check_em_pad; then " \ - "run recovery;" \ - "else if test ${BOOT_FROM} = FACTORY; then " \ - "run factory_nfs;" \ - "else " \ - "run boot_mmc;" \ - "fi;fi" -#endif - #define PARTS_DEFAULT \ /* Linux partitions */ \ "partitions=" \ @@ -200,7 +190,6 @@ "altbootcmd=run recovery\0" \ "bootdelay=1\0" \ "baudrate=115200\0" \ - "bootcmd=" CONFIG_BOOTCOMMAND "\0" \ "ethact=FEC\0" \ "netdev=eth0\0" \ "boot_os=y\0" \ @@ -325,13 +314,6 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) -/* Watchdog */ -#if defined(CONFIG_SPL_BUILD) -#undef CONFIG_WDT -#undef CONFIG_WATCHDOG -#define CONFIG_HW_WATCHDOG -#endif - /* ENV config */ #ifdef CONFIG_ENV_IS_IN_SPI_FLASH /* The 0x120000 value corresponds to above SPI-NOR memory MAP */ diff --git a/include/configs/dns325.h b/include/configs/dns325.h index 18ff1bb9e58aca67f28d352b6846ee78ed1dba06..0590704000ec7b50c5d5a5950ce8b49a8522a3d4 100644 --- a/include/configs/dns325.h +++ b/include/configs/dns325.h @@ -12,12 +12,6 @@ #ifndef _CONFIG_DNS325_H #define _CONFIG_DNS325_H -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ -#define CONFIG_KW88F6281 /* SOC Name */ - #include "mv-common.h" /* Remove or override few declarations from mv-common.h */ @@ -32,7 +26,6 @@ /* * Enable GPI0 support */ -#define CONFIG_KIRKWOOD_GPIO /* * Environment variables configurations @@ -72,17 +65,4 @@ "setenv bootenvrootfstype ${nandrootfstype}; " \ "setenv bootenvloadimage ${nandloadimage}\0" -#define CONFIG_BOOTCOMMAND \ - "if test -n ${bootenv} && usb start; then " \ - "if run loadbootenv; then " \ - "echo Loaded environment ${bootenv} from usb;" \ - "run importbootenv;" \ - "fi;" \ - "if test -n ${bootenvcmd}; then " \ - "echo Running bootenvcmd ...;" \ - "run bootenvcmd;" \ - "fi;" \ - "fi;" \ - "run setnandbootenv subbootcmd;" - #endif /* _CONFIG_DNS325_H */ diff --git a/include/configs/dockstar.h b/include/configs/dockstar.h index 75a2476f5ef9a3de2366e794a82b62a5c817411e..0ad04eee1b74fe26ba92b89ab46027c3a2f4c23c 100644 --- a/include/configs/dockstar.h +++ b/include/configs/dockstar.h @@ -11,12 +11,6 @@ #ifndef _CONFIG_DOCKSTAR_H #define _CONFIG_DOCKSTAR_H -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ -#define CONFIG_KW88F6281 1 /* SOC Name */ - /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros @@ -34,13 +28,6 @@ /* * Default environment variables */ -#define CONFIG_BOOTCOMMAND \ - "setenv bootargs ${console} ${mtdparts} ${bootargs_root}; " \ - "ubi part root; " \ - "ubifsmount ubi:root; " \ - "ubifsload 0x800000 ${kernel}; " \ - "ubifsload 0x1100000 ${initrd}; " \ - "bootm 0x800000 0x1100000" #define CONFIG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ diff --git a/include/configs/draco.h b/include/configs/draco.h index 29ce3a594045b385a65e8ad8deb542bf6fe503fb..d305608101331937bcf514bcf031db0cc4d514e4 100644 --- a/include/configs/draco.h +++ b/include/configs/draco.h @@ -47,24 +47,6 @@ #ifndef CONFIG_RESTORE_FLASH /* set to negative value for no autoboot */ - -#define CONFIG_BOOTCOMMAND \ -"if dfubutton; then " \ - "run dfu_start; " \ - "reset; " \ -"fi;" \ -"run nand_boot;" \ -"run nand_boot_backup;" \ -"reset;" - -#else - -#define CONFIG_BOOTCOMMAND \ - "setenv autoload no; " \ - "dhcp; " \ - "if tftp 80000000 debrick.scr; then " \ - "source 80000000; " \ - "fi" #endif #endif /* CONFIG_SPL_BUILD */ #endif /* ! __CONFIG_DRACO_H */ diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h index 5b71f70c94bfe1d5e8d09becdba283f47f8ac2bb..beea234d8dc80375cc559cc21c560d14d1c90763 100644 --- a/include/configs/dreamplug.h +++ b/include/configs/dreamplug.h @@ -11,12 +11,7 @@ #ifndef _CONFIG_DREAMPLUG_H #define _CONFIG_DREAMPLUG_H -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */ - -#include "mv-plug-common.h" +#include "mv-common.h" /* * Environment variables configurations @@ -30,11 +25,6 @@ /* * Default environment variables */ -#define CONFIG_BOOTCOMMAND "setenv ethact ethernet-controller@72000; " \ - "${x_bootcmd_ethernet}; setenv ethact ethernet-controller@76000; " \ - "${x_bootcmd_ethernet}; ${x_bootcmd_usb}; ${x_bootcmd_kernel}; "\ - "setenv bootargs ${x_bootargs} ${x_bootargs_root}; " \ - "bootm 0x6400000;" #define CONFIG_EXTRA_ENV_SETTINGS \ "x_bootcmd_ethernet=ping 192.168.2.1\0" \ diff --git a/include/configs/ds109.h b/include/configs/ds109.h index 62fe1441210100f046143ce226453a1de2a2be13..8553ea0b95f24da609eb6b194f1fc8a5c296cc3c 100644 --- a/include/configs/ds109.h +++ b/include/configs/ds109.h @@ -11,12 +11,7 @@ #ifndef _CONFIG_DS109_H #define _CONFIG_DS109_H -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */ - -#include "mv-plug-common.h" +#include "mv-common.h" /* * Environment variables configurations @@ -30,10 +25,6 @@ /* * Default environment variables */ -#define CONFIG_BOOTCOMMAND "setenv ethact egiga0; " \ - "${x_bootcmd_ethernet}; ${x_bootcmd_usb}; ${x_bootcmd_kernel}; "\ - "setenv bootargs ${x_bootargs} ${x_bootargs_root}; " \ - "bootm 0x6400000;" #define CONFIG_EXTRA_ENV_SETTINGS \ "x_bootcmd_ethernet=ping 192.168.1.2\0" \ diff --git a/include/configs/ds414.h b/include/configs/ds414.h index 1f2d2c5e44686ae608c39046f1bf37daabdf3b29..7fba2b4cc427bae1080c98a577d8d62134ad5dad 100644 --- a/include/configs/ds414.h +++ b/include/configs/ds414.h @@ -58,11 +58,6 @@ #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) /* Default Environment */ -#define CONFIG_BOOTCOMMAND \ - "sf probe; " \ - "sf read ${loadaddr} 0xd0000 0x2d0000; " \ - "sf read ${ramdisk_addr_r} 0x3a0000 0x430000; " \ - "bootm ${loadaddr} ${ramdisk_addr_r}" #define CONFIG_EXTRA_ENV_SETTINGS \ "initrd_high=0xffffffff\0" \ diff --git a/include/configs/durian.h b/include/configs/durian.h index 1dec09b4cea88c987c089a5c1f096b88d401d6db..c0ea42e180a3fa38bf0d0211be891906d7136021 100644 --- a/include/configs/durian.h +++ b/include/configs/durian.h @@ -16,7 +16,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (0x88000000 - 0x100000) /* PCI CONFIG */ -#define CONFIG_SYS_PCI_64BIT 1 #define CONFIG_PCI_SCAN_SHOW /* SCSI */ diff --git a/include/configs/eagle.h b/include/configs/eagle.h index ee5350425096cf9e2b781335f32f55863549d08e..b8a7b5a9169318d16b9de192727eae746348c784 100644 --- a/include/configs/eagle.h +++ b/include/configs/eagle.h @@ -18,7 +18,6 @@ /* Board Clock */ /* XTAL_CLK : 33.33MHz */ -#define CONFIG_SYS_CLK_FREQ 33333333u /* Generic Timer Definitions (use in assembler source) */ #define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 1949c3f558f3715a38bfdadcf81b95d5650ae150..62b62e07c567dc59974a7a5811bbce76eb8ab957 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -18,8 +18,6 @@ #undef CONFIG_MONITOR_IS_IN_RAM /* starts uboot direct */ -#define CONFIG_BOOTCOMMAND "printenv" - /*----------------------------------------------------------------------* * Options * *----------------------------------------------------------------------*/ @@ -27,8 +25,6 @@ #define CONFIG_BOOT_RETRY_TIME -1 #define CONFIG_RESET_TO_RETRY -#define CONFIG_HW_WATCHDOG - #define STATUS_LED_ACTIVE 0 /*----------------------------------------------------------------------* @@ -189,8 +185,6 @@ * I2C */ -#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR - #ifdef CONFIG_CMD_DATE #define CONFIG_RTC_DS1338 #define CONFIG_I2C_RTC_ADDR 0x68 diff --git a/include/configs/ebisu.h b/include/configs/ebisu.h index 48d4c8a9480e6a3267f83b005a2066d921e9e830..081d5e9aaa6ae003fbe049251e0c3cbd220a317e 100644 --- a/include/configs/ebisu.h +++ b/include/configs/ebisu.h @@ -25,7 +25,6 @@ #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 #define CONFIG_SYS_MAX_FLASH_SECT 256 diff --git a/include/configs/edison.h b/include/configs/edison.h index 3ec35db4bcf1eda79264b08d17d6678acbb2e3bd..02f33f3c29fb6c6b076358a75ca50270c23851d0 100644 --- a/include/configs/edison.h +++ b/include/configs/edison.h @@ -14,9 +14,6 @@ #define CONFIG_SYS_MAXARGS 128 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -/* Memory */ -#define CONFIG_PHYSMEM - #define CONFIG_SYS_STACK_SIZE (32 * 1024) #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index 664d6d1f340fb62ba67a70daa1d3860675a0c597..e20e058e0a32b41b646cc1f24a7efb39abf44acc 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -28,9 +28,6 @@ * High Level Configuration Options (easy to change) */ -#define CONFIG_FEROCEON 1 /* CPU Core subversion */ -#define CONFIG_88F5182 1 /* SOC Name */ - #include /* * CLKs configurations @@ -113,8 +110,6 @@ */ #ifdef CONFIG_IDE #define __io -/* Needs byte-swapping for ATA data register */ -#define CONFIG_IDE_SWAP_IO /* Data, registers and alternate blocks are at the same offset */ #define CONFIG_SYS_ATA_DATA_OFFSET (0x0100) #define CONFIG_SYS_ATA_REG_OFFSET (0x0100) diff --git a/include/configs/efi-x86_app.h b/include/configs/efi-x86_app.h index 6061a6db0a40f2307996cac294f0edcd7d1e43b6..33afb7ca0f9b31750c545a3cea567d6591763704 100644 --- a/include/configs/efi-x86_app.h +++ b/include/configs/efi-x86_app.h @@ -10,8 +10,33 @@ #undef CONFIG_TPM_TIS_BASE_ADDRESS +/* + * Select the output device: Put an 'x' prefix before one of these to disable it + */ + +/* + * Video output - can normally continue after exit_boot_services has been + * called, since output to the display does not require EFI services at that + * point. U-Boot sets up the console memory and does its own drawing. + */ #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ "stdout=vidconsole\0" \ "stderr=vidconsole\0" +/* + * Serial output with no console. Run qemu with: + * + * -display none -serial mon:stdio + * + * This will hang or fail to output on the console after exit_boot_services is + * called. + */ +#define xCONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ + "stdout=serial\0" \ + "stderr=serial\0" + +#undef CONFIG_BOOTCOMMAND + +#define CONFIG_BOOTCOMMAND "part list efi 0; fatls efi 0:1" + #endif diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index 9769155bca7be55b933a560cd5e8c13049b50104..d001580d7dd7eb98d2c0b3b7e771b5f393f1e097 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -52,7 +52,6 @@ #endif /* Framebuffer */ -#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP diff --git a/include/configs/etamin.h b/include/configs/etamin.h index 3ff86eed835ec182dd7057f9ea599fcda4c93bb6..dc83ab71908b4fee5d7ba9015a122c58128a1ff4 100644 --- a/include/configs/etamin.h +++ b/include/configs/etamin.h @@ -84,9 +84,6 @@ */ /* nedded by compliance test in read mode */ -#if defined(CONFIG_SPL_CMT) -#define CONFIG_SYS_DCACHE_OFF -#endif /* Define own nand partitions */ #define CONFIG_ENV_RANGE (4 * CONFIG_SYS_ENV_SECT_SIZE) @@ -166,26 +163,5 @@ CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS \ CONFIG_ENV_SETTINGS_V2 \ CONFIG_ENV_SETTINGS_NAND_V2 - -#ifndef CONFIG_RESTORE_FLASH - -#define CONFIG_BOOTCOMMAND \ -"if dfubutton; then " \ - "run dfu_start; " \ - "reset; " \ -"fi;" \ -"run nand_boot;" \ -"run nand_boot_backup;" \ -"reset;" - - -#else -#define CONFIG_BOOTCOMMAND \ - "setenv autoload no; " \ - "dhcp; " \ - "if tftp 80000000 debrick.scr; then " \ - "source 80000000; " \ - "fi" -#endif #endif /* CONFIG_SPL_BUILD */ #endif /* ! __CONFIG_ETAMIN_H */ diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index c0bdfd3f8f1438bbb01e342b052d1eff07b80d3c..ccf615efa3df423c6a3d7631da15fae4aac98166 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -54,9 +54,6 @@ #endif /* JFFS2 */ -#ifdef CONFIG_CMD_JFFS2 -#define CONFIG_JFFS2_NAND -#endif /* Ethernet */ #define CONFIG_NET_RETRY_COUNT 20 @@ -66,7 +63,6 @@ /* MMC */ #ifdef CONFIG_CMD_MMC -#define CONFIG_GENERIC_ATMEL_MCI #define CONFIG_SYS_MMC_CD_PIN AT91_PIO_PORTC, 8 #endif @@ -118,9 +114,6 @@ /* File systems */ /* Boot command */ -#define CONFIG_BOOTCOMMAND "sf probe 0:0; " \ - "sf read 0x22000000 0xc6000 0x294000; " \ - "bootm 0x22000000" /* Misc. u-boot settings */ diff --git a/include/configs/evb_ast2500.h b/include/configs/evb_ast2500.h index dc032c1a419bb6be094953fbd16c2550a2931792..b109a151838730b32029e7985e3b24661aec2029 100644 --- a/include/configs/evb_ast2500.h +++ b/include/configs/evb_ast2500.h @@ -13,4 +13,8 @@ #define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE +/* Misc */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "" + #endif /* __CONFIG_H */ diff --git a/include/configs/evb_ast2600.h b/include/configs/evb_ast2600.h index 177a52eb916b49d68f8a8c1f97da0657a0831705..3c2155da46dfe9e0603739f32a8376f2bfc8efa6 100644 --- a/include/configs/evb_ast2600.h +++ b/include/configs/evb_ast2600.h @@ -10,4 +10,15 @@ #define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE +/* Misc */ +#define STR_HELPER(s) #s +#define STR(s) STR_HELPER(s) + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "loadaddr=" STR(CONFIG_SYS_LOAD_ADDR) "\0" \ + "bootspi=fdt addr 20100000 && fdt header get fitsize totalsize && " \ + "cp.b 20100000 ${loadaddr} ${fitsize} && bootm; " \ + "echo Error loading kernel FIT image\0" \ + "" + #endif /* __CONFIG_H */ diff --git a/include/configs/evb_px30.h b/include/configs/evb_px30.h index 27201fcfd7cb1cf8e4d5fb6c9fb9a9980fe67229..53781ba7ae8a98f6c52042b02426c63216807fc9 100644 --- a/include/configs/evb_px30.h +++ b/include/configs/evb_px30.h @@ -12,6 +12,4 @@ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" -#define CONFIG_SUPPORT_EMMC_RPMB - #endif diff --git a/include/configs/evb_rk3308.h b/include/configs/evb_rk3308.h index e8893eb7de85c6ee0171d57a8eef91922243fc5e..0273e751ce67847ce4b4b29b895de3b84ebccaf1 100644 --- a/include/configs/evb_rk3308.h +++ b/include/configs/evb_rk3308.h @@ -8,8 +8,6 @@ #include -#define CONFIG_SUPPORT_EMMC_RPMB - #define ROCKCHIP_DEVICE_SETTINGS \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/evb_rk3568.h b/include/configs/evb_rk3568.h index 2b255a11da2e1ba036c0968d8146b6d2928846e6..a0f2383bf2f282e3e49b5413a30c3f97462c20bd 100644 --- a/include/configs/evb_rk3568.h +++ b/include/configs/evb_rk3568.h @@ -8,8 +8,6 @@ #include -#define CONFIG_SUPPORT_EMMC_RPMB - #define ROCKCHIP_DEVICE_SETTINGS \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/evb_rv1108.h b/include/configs/evb_rv1108.h index b742d98706b6d1dbeb7f756ef16b117832f41621..13e3cb2ffeb1c37415a55be58bbb382f85847c63 100644 --- a/include/configs/evb_rv1108.h +++ b/include/configs/evb_rv1108.h @@ -18,11 +18,4 @@ "serverip=172.16.12.69\0" \ "" -#undef CONFIG_BOOTCOMMAND -#define CONFIG_BOOTCOMMAND \ - "sf probe;" \ - "sf read 0x62000000 0x140800 0x500000;" \ - "dcache off;" \ - "go 0x62000000" - #endif diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h index 95aaa747e4bea01cb2a82386f6e8497b7edf9642..eb2606905f8a8be9e6f0c51bf4ab52dcda7c73e7 100644 --- a/include/configs/exynos-common.h +++ b/include/configs/exynos-common.h @@ -19,8 +19,7 @@ /* Keep L2 Cache Disabled */ /* input clock of PLL: 24MHz input clock */ -#define CONFIG_SYS_CLK_FREQ 24000000 -#define COUNTER_FREQUENCY CONFIG_SYS_CLK_FREQ +#define COUNTER_FREQUENCY 24000000 /* select serial console configuration */ diff --git a/include/configs/exynos5-dt-common.h b/include/configs/exynos5-dt-common.h index cc9ffda669ee42095bbe5ec8571b17d2141b1036..00b67787d9e6e7f9f46a3077656cf76dd3deb27a 100644 --- a/include/configs/exynos5-dt-common.h +++ b/include/configs/exynos5-dt-common.h @@ -30,7 +30,4 @@ #define LCD_BPP LCD_COLOR16 #endif -/* Enable keyboard */ -#define CONFIG_KEYBOARD - #endif diff --git a/include/configs/exynos78x0-common.h b/include/configs/exynos78x0-common.h index 478a0c42b1d0570a82453ec6de713eefe82370e7..8d3449f028c31dffa48cf9c90d5337b20d01787e 100644 --- a/include/configs/exynos78x0-common.h +++ b/include/configs/exynos78x0-common.h @@ -67,23 +67,6 @@ #define PHYS_SDRAM_12 (CONFIG_SYS_SDRAM_BASE + (11 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_12_SIZE SDRAM_BANK_SIZE -#define CONFIG_DEBUG_UART_CLOCK 132710400 - -#define CONFIG_PREBOOT \ -"echo Read pressed buttons status;" \ -"KEY_VOLUMEUP=gpa20;" \ -"KEY_HOME=gpa17;" \ -"KEY_VOLUMEDOWN=gpa21;" \ -"KEY_POWER=gpa00;" \ -"PRESSED=0;" \ -"RELEASED=1;" \ -"if gpio input $KEY_VOLUMEUP; then setenv VOLUME_UP $PRESSED; " \ -"else setenv VOLUME_UP $RELEASED; fi;" \ -"if gpio input $KEY_VOLUMEDOWN; then setenv VOLUME_DOWN $PRESSED; " \ -"else setenv VOLUME_DOWN $RELEASED; fi;" \ -"if gpio input $KEY_HOME; then setenv HOME $PRESSED; else setenv HOME $RELEASED; fi;" \ -"if gpio input $KEY_POWER; then setenv POWER $PRESSED; else setenv POWER $RELEASED; fi;" - #ifndef MEM_LAYOUT_ENV_SETTINGS #define MEM_LAYOUT_ENV_SETTINGS \ "bootm_size=0x10000000\0" \ diff --git a/include/configs/falcon.h b/include/configs/falcon.h index d783faf180e5ceb23e9e64a3572cc4059654e5ae..1d6a9b9b73448b449808ee8f09f64c72c3b44af2 100644 --- a/include/configs/falcon.h +++ b/include/configs/falcon.h @@ -26,7 +26,6 @@ /* Board Clock */ /* XTAL_CLK : 16.66MHz */ -#define CONFIG_SYS_CLK_FREQ 16666666u /* Generic Timer Definitions (use in assembler source) */ #define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ diff --git a/include/configs/firefly_rk3308.h b/include/configs/firefly_rk3308.h index 3af24930431e82277af2e3dc4de1d6cd45a43927..28e3a547e337dff9598193b9928f0d016103ff05 100644 --- a/include/configs/firefly_rk3308.h +++ b/include/configs/firefly_rk3308.h @@ -8,8 +8,6 @@ #include -#define CONFIG_SUPPORT_EMMC_RPMB - #define ROCKCHIP_DEVICE_SETTINGS \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/gazerbeam.h b/include/configs/gazerbeam.h index ec5fc156965290b50df4df016bb23429eab25b58..c7fdf7c6bb889eeeda1913695321cbe9f368551a 100644 --- a/include/configs/gazerbeam.h +++ b/include/configs/gazerbeam.h @@ -100,22 +100,4 @@ __stringify(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \ "upd=run load update\0" \ -#define NFSBOOTCOMMAND \ - "setenv bootargs root=/dev/nfs rw " \ - "nfsroot=$serverip:$rootpath " \ - "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp ${kernel_addr} $bootfile;" \ - "tftp ${fdt_addr} $fdtfile;" \ - "bootm ${kernel_addr} - ${fdt_addr}" - -#define MMCBOOTCOMMAND \ - "setenv bootargs root=/dev/mmcblk0p3 rw rootwait " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "ext2load mmc 0:2 ${kernel_addr} $bootfile;" \ - "ext2load mmc 0:2 ${fdt_addr} $fdtfile;" \ - "bootm ${kernel_addr} - ${fdt_addr}" - -#define CONFIG_BOOTCOMMAND MMCBOOTCOMMAND - #endif /* __CONFIG_H */ diff --git a/include/configs/ge_b1x5v2.h b/include/configs/ge_b1x5v2.h index 1a5db24800262711c28ee978d7d0e051c68836db..b4f94992e64621a62b64a71709fc5772ecd2c1a1 100644 --- a/include/configs/ge_b1x5v2.h +++ b/include/configs/ge_b1x5v2.h @@ -119,6 +119,4 @@ "run showsplashscreen; sleep 1; " \ "run doboot; run failbootcmd;\0" \ -#define CONFIG_BOOTCOMMAND "run tryboot;" - #endif /* __GE_B1X5V2_CONFIG_H */ diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index 0eeffd46377bfa8548a3b4da326ebe04dba9a28c..bde14a7b3da71771f37ade6bcbca31ac0abbb9b6 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -98,15 +98,6 @@ "run doboot; " \ "run failbootcmd\0" \ -#define MMCBOOTCOMMAND \ - "run doquiet; " \ - "run tryboot; " \ - -#ifdef CONFIG_CMD_NFS -#define CONFIG_BOOTCOMMAND NETWORKBOOTCOMMAND -#else -#define CONFIG_BOOTCOMMAND MMCBOOTCOMMAND -#endif /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/giedi.h b/include/configs/giedi.h index dabb1fb1713abdfe2499ec34626ade30a97bf56b..19a795bcf8651910d394daf47e2c5abfccbaf696 100644 --- a/include/configs/giedi.h +++ b/include/configs/giedi.h @@ -9,9 +9,6 @@ #include "capricorn-common.h" -#undef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING GENERATE_CCP_VERSION("01", "07") - /* DDR3 board total DDR is 1 GB */ #undef PHYS_SDRAM_1_SIZE #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1 GB */ diff --git a/include/configs/goflexhome.h b/include/configs/goflexhome.h index 43027a506a5fab9f039f8217b3b86a1d4cd9c8a3..90e37d9853545f0220759127e588190f95ee3c27 100644 --- a/include/configs/goflexhome.h +++ b/include/configs/goflexhome.h @@ -14,12 +14,6 @@ #ifndef _CONFIG_GOFLEXHOME_H #define _CONFIG_GOFLEXHOME_H -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ -#define CONFIG_KW88F6281 1 /* SOC Name */ - /* * Default GPIO configuration and LED status */ @@ -49,12 +43,6 @@ /* * Default environment variables */ -#define CONFIG_BOOTCOMMAND \ - "setenv bootargs ${console} ${mtdparts} ${bootargs_root}; " \ - "ubi part root; " \ - "ubifsmount ubi:root; " \ - "ubifsload 0x800000 ${kernel}; " \ - "bootm 0x800000" #define CONFIG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ diff --git a/include/configs/gose.h b/include/configs/gose.h index 60a89e00236123c4015a500ee55aefd1df94e5eb..01657d7a669e2386e2f4ad900e2923014e31f2bb 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -30,8 +30,6 @@ #define CONFIG_BITBANGMII_MULTI /* Board Clock */ -#define RMOBILE_XTAL_CLK 20000000u -#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index 29a446c2f5d44837ccb3e27d4c75196c3994a4f1..fb01c5614b6cb29d6120bf448abeaebb25ae1298 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -9,7 +9,6 @@ #define __GRPEACH_H /* Board Clock , P1 clock frequency (XTAL=13.33MHz) */ -#define CONFIG_SYS_CLK_FREQ 66666666 /* Miscellaneous */ #define CONFIG_SYS_PBSIZE 256 diff --git a/include/configs/guruplug.h b/include/configs/guruplug.h index 8de888fe7e06b3f0c7e93b6e44116df76cf50845..25c5a97c69d77b8b89287036fa7c8973d025a9e2 100644 --- a/include/configs/guruplug.h +++ b/include/configs/guruplug.h @@ -9,20 +9,7 @@ #ifndef _CONFIG_GURUPLUG_H #define _CONFIG_GURUPLUG_H -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */ - -/* - * Standard filesystems - */ - -/* - * mv-plug-common.h should be defined after CMD configs since it used them - * to enable certain macros - */ -#include "mv-plug-common.h" +#include "mv-common.h" /* * Environment variables configurations @@ -40,15 +27,6 @@ /* * Default environment variables */ -#define CONFIG_BOOTCOMMAND \ - "setenv bootargs ${console} ${mtdparts} ${bootargs_root}; " \ - "ubi part root; " \ - "ubifsmount ubi:rootfs; " \ - "ubifsload 0x800000 ${kernel}; " \ - "ubifsload 0x700000 ${fdt}; " \ - "ubifsumount; " \ - "fdt addr 0x700000; fdt resize; fdt chosen; " \ - "bootz 0x800000 - 0x700000" #define CONFIG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index abceffb422042dc93e963a378ec84aa6272f0e6d..513b2d4679839a81889003bec3de79c37e663e62 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -72,7 +72,6 @@ #define CONFIG_USBD_HS /* Framebuffer and LCD */ -#define CONFIG_VIDEO_LOGO #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP #define CONFIG_VIDEO_BMP_LOGO @@ -254,10 +253,4 @@ "fi\0" #endif -#define CONFIG_BOOTCOMMAND \ - "for btype in ${bootdevs}; do " \ - "echo; echo Attempting ${btype} boot...; " \ - "if run ${btype}_boot; then; fi; " \ - "done" - #endif /* __CONFIG_H */ diff --git a/include/configs/harmony.h b/include/configs/harmony.h index 5a1e72c5373f50796f40a58486b68fc60bb301d8..879bd5c9539ae25cf0abdac9234f75ef98c561ca 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -24,7 +24,6 @@ #endif /* NAND support */ -#define CONFIG_TEGRA_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Environment in NAND (which is 512M), aligned to start of last sector */ diff --git a/include/configs/ib62x0.h b/include/configs/ib62x0.h index 4bd3494f1084cf583a23345adb286e5baafeb27b..9783fd89ec02ac8f228d2523b8ebf4604134cb75 100644 --- a/include/configs/ib62x0.h +++ b/include/configs/ib62x0.h @@ -8,12 +8,6 @@ #ifndef _CONFIG_IB62x0_H #define _CONFIG_IB62x0_H -/* - * High level configuration options - */ -#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ -#define CONFIG_KW88F6281 /* SOC Name */ - #include "mv-common.h" /* @@ -23,15 +17,6 @@ /* * Default environment variables */ -#define CONFIG_BOOTCOMMAND \ - "setenv bootargs ${console} ${mtdparts} ${bootargs_root}; " \ - "ubi part root; " \ - "ubifsmount ubi:rootfs; " \ - "ubifsload 0x800000 ${kernel}; " \ - "ubifsload 0x700000 ${fdt}; " \ - "ubifsumount; " \ - "fdt addr 0x700000; fdt resize; fdt chosen; " \ - "bootz 0x800000 - 0x700000" #define CONFIG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ @@ -59,11 +44,4 @@ #define CONFIG_SYS_ATA_IDE1_OFFSET MV_SATA_PORT1_OFFSET #endif /* CONFIG_IDE */ -/* - * RTC driver configuration - */ -#ifdef CONFIG_CMD_DATE -#define CONFIG_RTC_MV -#endif /* CONFIG_CMD_DATE */ - #endif /* _CONFIG_IB62x0_H */ diff --git a/include/configs/iconnect.h b/include/configs/iconnect.h index 1a716dfbe91d2676c6f3d8d18f8f9af984883b3f..f1aad1efde64f4a86cb65661a7681c594376190c 100644 --- a/include/configs/iconnect.h +++ b/include/configs/iconnect.h @@ -8,12 +8,6 @@ #ifndef _CONFIG_ICONNECT_H #define _CONFIG_ICONNECT_H -/* - * High level configuration options - */ -#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ -#define CONFIG_KW88F6281 /* SOC Name */ - #include "mv-common.h" /* @@ -23,12 +17,6 @@ /* * Default environment variables */ -#define CONFIG_BOOTCOMMAND \ - "setenv bootargs ${console} ${mtdparts} ${bootargs_root}; " \ - "ubi part rootfs; " \ - "ubifsmount ubi:rootfs; " \ - "ubifsload 0x800000 ${kernel}; " \ - "bootm 0x800000" #define CONFIG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h index 370f7ed2bcb60235dd5560b7404cc80efa579595..206a57a653254d9201c8be259eedb95058ff9d94 100644 --- a/include/configs/ids8313.h +++ b/include/configs/ids8313.h @@ -153,7 +153,6 @@ /* * HW-Watchdog */ -#define CONFIG_WATCHDOG 1 #define CONFIG_SYS_WATCHDOG_VALUE 0xFFFF /* @@ -232,12 +231,8 @@ #define CONFIG_LOADS_ECHO #define CONFIG_TIMESTAMP -#define CONFIG_BOOTCOMMAND "run boot_cramfs" #undef CONFIG_SYS_LOADS_BAUD_CHANGE -#define CONFIG_JFFS2_NAND -#define CONFIG_JFFS2_DEV "0" - /* mtdparts command line support */ #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -272,14 +267,6 @@ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "\0" -#define NFSBOOTCOMMAND \ - "setenv rootdev /dev/nfs;" \ - "run setipargs;run addmtd;" \ - "tftp ${loadaddr} ${bootfile};" \ - "tftp ${fdtaddr} ${fdtfile};" \ - "fdt addr ${fdtaddr};" \ - "bootm ${loadaddr} - ${fdtaddr}" - /* UBI Support */ #endif /* __CONFIG_H */ diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h index c289d694e9b33f3a1549aeed762b7a877f6d1484..dffe175f50af5ead0b19901a54ba3b936fdfb247 100644 --- a/include/configs/imx27lite-common.h +++ b/include/configs/imx27lite-common.h @@ -103,7 +103,6 @@ #define CONFIG_MXC_NAND_REGS_BASE 0xd8000000 #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0xd8000000 -#define CONFIG_JFFS2_NAND #define CONFIG_MXC_NAND_HWECC /* diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h index fed6545fdf9f5e2a977969ceb227f2004f441500..b22b2fd4a3b069962f54e241b703a823cd323165 100644 --- a/include/configs/imx6-engicam.h +++ b/include/configs/imx6-engicam.h @@ -96,8 +96,6 @@ "run nandboot; " \ "fi\0" -#define CONFIG_BOOTCOMMAND "run $modeboot" - /* Miscellaneous configurable options */ #ifdef CONFIG_MX6UL @@ -156,7 +154,6 @@ #ifdef CONFIG_VIDEO_IPUV3 # define CONFIG_IMX_VIDEO_SKIP -# define CONFIG_VIDEO_LOGO # define CONFIG_VIDEO_BMP_LOGO #endif diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h index 766562676ccb993744e8dc948871d2c2f482b683..7e56c8ee215f70087f5145f5e3b50f3d1e48d1ac 100644 --- a/include/configs/imx6_logic.h +++ b/include/configs/imx6_logic.h @@ -108,8 +108,6 @@ "fi; " \ "fi; " \ "else run netboot; fi" -#define CONFIG_BOOTCOMMAND \ - "run autoboot" #define CONFIG_ARP_TIMEOUT 200UL diff --git a/include/configs/imx7-cm.h b/include/configs/imx7-cm.h index 01f8732929225502ef14393cac21cf331222ef6f..261ed900fee9ba3992a456abd064a2a739d5ba0b 100644 --- a/include/configs/imx7-cm.h +++ b/include/configs/imx7-cm.h @@ -16,7 +16,6 @@ #undef CONFIG_SYS_AUTOLOAD #undef CONFIG_EXTRA_ENV_SETTINGS -#undef CONFIG_BOOTCOMMAND /* * Use: @@ -33,7 +32,7 @@ "fdt_file=imx7-cm.dtb\0" \ "fdt_addr=0x83000000\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=${mmcroot}\0" \ @@ -70,8 +69,6 @@ "bootz ${loadaddr} - ${fdt_addr}; " \ "\0" -#define CONFIG_BOOTCOMMAND "run boot${boot-mode}" - /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR @@ -88,7 +85,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR #define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ /* USB Configs */ diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index 6868b80484992a1a49094a6493b6c0885220e099..991839c0bcd4672d1ff7d85c34b447b01ccc6073 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -14,8 +14,6 @@ #define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) #define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) @@ -81,7 +79,7 @@ "initrd_addr=0x43800000\0" \ "bootm_size=0x10000000\0" \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \ @@ -125,20 +123,6 @@ "fi; " \ "fi;\0" -#ifndef CONFIG_BOOTCOMMAND -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "fi;" -#endif - /* Link Definitions */ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 @@ -168,8 +152,6 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_XCV_TYPE RGMII diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h index 2bdcc0ab725bba84b3945228a2c4785ff8b95023..77f062474dd60db4fdf65bd1e7c8582d70f3f454 100644 --- a/include/configs/imx8mm_beacon.h +++ b/include/configs/imx8mm_beacon.h @@ -11,8 +11,6 @@ #define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) @@ -40,7 +38,7 @@ "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ "initrd_addr=0x43800000\0" \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console},${baudrate}" \ @@ -80,18 +78,6 @@ "fi; " \ "fi;\0" -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "fi;" - /* Link Definitions */ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 @@ -105,9 +91,6 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1)) - #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR /* Monitor Command Prompt */ @@ -120,7 +103,6 @@ /* USDHC */ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 /* FEC*/ #define CONFIG_ETHPRIME "FEC" diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index 167ca19f2108c0228ce9ef7eface8ba2719ac624..c7022ef0f7fb1a1876c6493da4844cadd9692871 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -13,8 +13,6 @@ #define CONFIG_SYS_BOOTM_LEN (64 * SZ_1M) #define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) @@ -53,7 +51,7 @@ "fdtfile=imx8mm-evk.dtb\0" \ "initrd_addr=0x43800000\0" \ "bootm_size=0x10000000\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ /* Link Definitions */ @@ -85,8 +83,6 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_XCV_TYPE RGMII diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index 4b22ba10a02c0c46b1a18094a72a354cf43870cc..d75fcf747e41c6cbb36809e6b563b9a7d175d6dc 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -12,8 +12,6 @@ #define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) @@ -30,9 +28,6 @@ # define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif /* CONFIG_SPL_BUILD */ -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1)) - #ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 2) \ @@ -71,10 +66,6 @@ #define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */ #define CONFIG_SYS_BOOTM_LEN SZ_256M -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END \ - (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1)) - /* UART */ #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR @@ -88,6 +79,5 @@ /* USDHC */ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #endif /* __IMX8MM_ICORE_MX8MM_H */ diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index f8d41425c6fa5a4b9006ddb75495454ad418fcd6..7ab11cc8fb19e44b85e0a828de873e85f41247c1 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -11,8 +11,6 @@ #define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) @@ -105,7 +103,6 @@ /* USDHC */ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 /* FEC */ #define CONFIG_ETHPRIME "eth0" diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h index f89836cd2a8baf563d0aafdd70678b5ffbe696e6..2843535973986a5ba5b9b2d4b5af81753b202282 100644 --- a/include/configs/imx8mn_beacon.h +++ b/include/configs/imx8mn_beacon.h @@ -11,9 +11,6 @@ #define CONFIG_SPL_MAX_SIZE (148 * SZ_1K) #define CONFIG_SYS_MONITOR_LEN SZ_512K -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 -#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) @@ -46,7 +43,7 @@ "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ "initrd_addr=0x43800000\0" \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console} " \ @@ -95,18 +92,6 @@ "run loadramdisk; run ramargs; " \ "booti ${loadaddr} ${ramdisk_addr} ${fdt_addr} ${optargs}\0" -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else booti ${loadaddr} - ${fdt_addr}; fi" - /* Link Definitions */ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 @@ -136,7 +121,6 @@ /* USDHC */ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 /* ENET Config */ #if defined(CONFIG_FEC_MXC) diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index ab8932149213b53462eacbd556f2ca37f24bf69c..142fc3e4fff93eb83b9daae1f2c40860603bd27a 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -14,8 +14,6 @@ #define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) @@ -52,7 +50,7 @@ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "initrd_addr=0x43800000\0" \ "bootm_size=0x10000000\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ /* Link Definitions */ @@ -84,6 +82,4 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - #endif diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index 30cce1a49e2faa359eba8433f2cc0bca4ec888ae..b810a558adf182d4cd98b740bf29c9570a2c8817 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -14,8 +14,6 @@ #define CONFIG_SPL_MAX_SIZE (152 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD @@ -67,7 +65,7 @@ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "initrd_addr=0x43800000\0" \ "bootm_size=0x10000000\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ /* Link Definitions */ @@ -100,6 +98,4 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - #endif diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index 7206c08a8c9b5da1092e3a34a8a7f09af552f38d..b099004937df792cba60bd1f65fbf426338bd30d 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -14,8 +14,6 @@ #define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_STACK 0x187FF0 @@ -61,7 +59,7 @@ "fdt_file=imx8mq-cm.dtb\0" \ "initrd_addr=0x43800000\0" \ "bootm_size=0x10000000\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ /* Link Definitions */ @@ -91,6 +89,4 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - #endif diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 49a9526d96eec0308389496c045f6bacdc332c0e..6e1d387e2b1e7df364358b1548e8342683aa77cd 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -14,8 +14,6 @@ #define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ @@ -72,7 +70,7 @@ "fdt_file=imx8mq-evk.dtb\0" \ "initrd_addr=0x43800000\0" \ "bootm_size=0x10000000\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ /* Link Definitions */ @@ -102,10 +100,4 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - -#define CONFIG_MXC_GPIO - -#define CONFIG_OF_SYSTEM_SETUP - #endif diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index 0366c113e3d3f9d6c7304961967f8a8686c23fd9..1668ca8acf3eeb11d49553b6d82dfe7a3431d45f 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -11,8 +11,6 @@ #define CONFIG_SPL_MAX_SIZE (172 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ @@ -62,7 +60,7 @@ "initrd_addr=0x43800000\0" \ "initrd_high=0xffffffffffffffff\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \ @@ -103,18 +101,6 @@ "booti; " \ "fi;\0" -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else booti ${loadaddr} - ${fdt_addr}; fi" - /* Link Definitions */ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 @@ -130,10 +116,6 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */ -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ - (PHYS_SDRAM_SIZE >> 1)) - #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR /* Monitor Command Prompt */ @@ -146,10 +128,4 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - -#define CONFIG_MXC_GPIO - -#define CONFIG_OF_SYSTEM_SETUP - #endif diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index 11b5c16e37ef81202289a4703bf850acdde46adb..884d741789f309b8924290c3bab8c72bc09d3eae 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -15,8 +15,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800 #define CONFIG_SPL_STACK 0x013E000 #define CONFIG_SPL_BSS_START_ADDR 0x00128000 @@ -33,9 +31,6 @@ #define CONFIG_REMAKE_ELF -/* Flat Device Tree Definitions */ -#define CONFIG_OF_BOARD_SETUP - #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5B010000 #define USDHC2_BASE_ADDR 0x5B020000 @@ -60,7 +55,7 @@ "initrd_addr=0x83800000\0" \ "initrd_high=0xffffffffffffffff\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \ @@ -121,33 +116,12 @@ "fi;" \ "fi;\0" -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if test ${sec_boot} = yes; then " \ - "if run loadcntr; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "fi; " \ - "else booti ${loadaddr} - ${fdt_addr}; fi" - /* Link Definitions */ #define CONFIG_SYS_INIT_SP_ADDR 0x80200000 /* Default environment is in SD */ -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */ #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ #define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h index 2c80f268a41ea94fcbe5fb447449cc8170756be6..1a553510f6df1ad1fa396d7d2f744bd108f48707 100644 --- a/include/configs/imx8qm_rom7720.h +++ b/include/configs/imx8qm_rom7720.h @@ -64,7 +64,7 @@ "fdt_file=imx8qm-rom7720-a1.dtb\0" \ "initrd_addr=0x83800000\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \ @@ -105,33 +105,10 @@ "booti; " \ "fi;\0" -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else booti ${loadaddr} - ${fdt_addr}; fi" - /* Link Definitions */ #define CONFIG_SYS_INIT_SP_ADDR 0x80200000 -/* Default environment is in SD */ - -#ifdef CONFIG_QSPI_BOOT -#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS -#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS -#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE -#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED -#endif - -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board, * USDHC3 is for SD on base board On DDR4 board, USDHC1 is mux for NAND, * USDHC2 is for SD, USDHC3 is for SD on base board diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index f59a9ef5e2c21429267e07fdcf80c6dd52b91bfa..3900ef1b500e4b7da039c6dda6c1427644f98173 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -13,8 +13,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800 #define CONFIG_SPL_STACK 0x013E000 #define CONFIG_SPL_BSS_START_ADDR 0x00128000 @@ -31,9 +29,6 @@ #define CONFIG_REMAKE_ELF -/* Flat Device Tree Definitions */ -#define CONFIG_OF_BOARD_SETUP - #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5B010000 #define USDHC2_BASE_ADDR 0x5B020000 @@ -58,7 +53,7 @@ "initrd_addr=0x83800000\0" \ "initrd_high=0xffffffffffffffff\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot}\0 " \ @@ -119,33 +114,12 @@ "fi;" \ "fi;\0" -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if test ${sec_boot} = yes; then " \ - "if run loadcntr; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "fi; " \ - "else booti ${loadaddr} - ${fdt_addr}; fi" - /* Link Definitions */ #define CONFIG_SYS_INIT_SP_ADDR 0x80200000 /* Default environment is in SD */ -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */ #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ #define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index 501f465b9e75a851900d44a083919603b981f00e..6b25b485dec72a030bb62d1db87c8523715ea61c 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -12,9 +12,6 @@ #define CONFIG_SYS_BOOTM_LEN (SZ_64M) #define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 -#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD @@ -64,7 +61,7 @@ "fdtfile=imx8ulp-evk.dtb\0" \ "initrd_addr=0x83800000\0" \ "bootm_size=0x10000000\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ /* Link Definitions */ diff --git a/include/configs/imxrt1020-evk.h b/include/configs/imxrt1020-evk.h index 64c0f5eaf0bc26a81853ec2bec2335feb6432f0f..79feab389e322fa739cde0a39adfa8bec5db992b 100644 --- a/include/configs/imxrt1020-evk.h +++ b/include/configs/imxrt1020-evk.h @@ -11,7 +11,6 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x20240000 -#define CONFIG_SYS_FSL_ERRATUM_ESDHC135 1 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE 1 #define PHYS_SDRAM 0x80000000 diff --git a/include/configs/imxrt1050-evk.h b/include/configs/imxrt1050-evk.h index 99d25c1e6ef022377c42694a053ddc15fdb4c79a..b507895a0d8bafbf6c03563f20b8904600735d9e 100644 --- a/include/configs/imxrt1050-evk.h +++ b/include/configs/imxrt1050-evk.h @@ -11,7 +11,6 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x20280000 -#define CONFIG_SYS_FSL_ERRATUM_ESDHC135 1 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE 1 #define PHYS_SDRAM 0x80000000 @@ -22,7 +21,6 @@ DMAMEM_SZ_ALL) #ifdef CONFIG_DM_VIDEO -#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h index 2f8ac20a76ea1c2cd5dc4fd2410da4286382ded1..6d7d798fd6c2e3b56ad0f79a0df18cb86d011a72 100644 --- a/include/configs/integratorap.h +++ b/include/configs/integratorap.h @@ -24,8 +24,6 @@ */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTCOMMAND "" - /* Flash settings */ #define CONFIG_SYS_FLASH_SIZE 0x02000000 /* 32 MiB */ #define CONFIG_SYS_MAX_FLASH_SECT 128 diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h index c4203ce57e116945be8be190bacbc6edae68e7e3..3ff7bb933c4b0b587959258385a75d9d0b27f6d5 100644 --- a/include/configs/integratorcp.h +++ b/include/configs/integratorcp.h @@ -27,7 +27,6 @@ #define CONFIG_SMC91111_BASE 0xC8000000 #undef CONFIG_SMC91111_EXT_PHY -#define CONFIG_BOOTCOMMAND "tftpboot ; bootm" #define CONFIG_SERVERIP 192.168.1.100 #define CONFIG_IPADDR 192.168.1.104 #define CONFIG_BOOTFILE "uImage" diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h index 56dd9c72d9491e2cf88eb2ac86866b40caefef19..294ce4662e2f0e0f01a6ebd3becbe9e59a012163 100644 --- a/include/configs/k2g_evm.h +++ b/include/configs/k2g_evm.h @@ -50,27 +50,6 @@ "get_mon_mmc=load mmc ${bootpart} ${addr_mon} ${bootdir}/${name_mon}\0"\ "name_fs=arago-base-tisdk-image-k2g-evm.cpio\0" -#ifndef CONFIG_TI_SECURE_DEVICE -#define CONFIG_BOOTCOMMAND \ - "run findfdt; " \ - "run envboot; " \ - "run init_${boot}; " \ - "run get_mon_${boot} run_mon; " \ - "run set_name_pmmc get_pmmc_${boot} run_pmmc; " \ - "run get_kern_${boot}; " \ - "run init_fw_rd_${boot}; " \ - "run get_fdt_${boot}; " \ - "run run_kern" -#else -#define CONFIG_BOOTCOMMAND \ - "run findfdt; " \ - "run envboot; " \ - "run run_mon_hs; " \ - "run init_${boot}; " \ - "run get_fit_${boot}; " \ - "bootm ${addr_fit}#${name_fdt}" -#endif - /* NAND Configuration */ #define CONFIG_SYS_NAND_PAGE_2K diff --git a/include/configs/khadas-vim3_android.h b/include/configs/khadas-vim3_android.h new file mode 100644 index 0000000000000000000000000000000000000000..da6adf6c413add03413f40987959a24ad0d41e62 --- /dev/null +++ b/include/configs/khadas-vim3_android.h @@ -0,0 +1,50 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration for the khadas VIM3 Android + * + * Copyright (C) 2021 Baylibre, SAS + * Author: Guillaume LA ROQUE + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define LOGO_UUID "43a3305d-150f-4cc9-bd3b-38fca8693846;" +#define ROOT_UUID "ddb8c3f6-d94d-4394-b633-3134139cc2e0;" + +#if defined(CONFIG_CMD_AB_SELECT) +#define PARTS_DEFAULT \ + "uuid_disk=${uuid_gpt_disk};" \ + "name=logo,start=512K,size=2M,uuid=" LOGO_UUID \ + "name=misc,size=512K,uuid=${uuid_gpt_misc};" \ + "name=dtbo_a,size=8M,uuid=${uuid_gpt_dtbo_a};" \ + "name=dtbo_b,size=8M,uuid=${uuid_gpt_dtbo_b};" \ + "name=vbmeta_a,size=512K,uuid=${uuid_gpt_vbmeta_a};" \ + "name=vbmeta_b,size=512K,uuid=${uuid_gpt_vbmeta_b};" \ + "name=boot_a,size=32M,bootable,uuid=${uuid_gpt_boot_a};" \ + "name=boot_b,size=32M,bootable,uuid=${uuid_gpt_boot_b};" \ + "name=super,size=3072M,uuid=${uuid_gpt_super};" \ + "name=userdata,size=11282M,uuid=${uuid_gpt_userdata};" \ + "name=rootfs,size=-,uuid=" ROOT_UUID +#else +#define PARTS_DEFAULT \ + "uuid_disk=${uuid_gpt_disk};" \ + "name=logo,start=512K,size=2M,uuid=" LOGO_UUID \ + "name=misc,size=512K,uuid=${uuid_gpt_misc};" \ + "name=dtbo,size=8M,uuid=${uuid_gpt_dtbo};" \ + "name=vbmeta,size=512K,uuid=${uuid_gpt_vbmeta};" \ + "name=boot,size=32M,bootable,uuid=${uuid_gpt_boot};" \ + "name=recovery,size=32M,uuid=${uuid_gpt_recovery};" \ + "name=cache,size=256M,uuid=${uuid_gpt_cache};" \ + "name=super,size=1792M,uuid=${uuid_gpt_super};" \ + "name=userdata,size=12786M,uuid=${uuid_gpt_userdata};" \ + "name=rootfs,size=-,uuid=" ROOT_UUID +#endif + +#define EXTRA_ANDROID_ENV_SETTINGS \ + "board=vim3\0" \ + "board_name=vim3\0" \ + +#include + +#endif /* __CONFIG_H */ diff --git a/include/configs/khadas-vim3l_android.h b/include/configs/khadas-vim3l_android.h new file mode 100644 index 0000000000000000000000000000000000000000..b1768e2d821176452254fb07f2e3747402b9b4fd --- /dev/null +++ b/include/configs/khadas-vim3l_android.h @@ -0,0 +1,50 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration for the khadas VIM3L Android + * + * Copyright (C) 2021 Baylibre, SAS + * Author: Guillaume LA ROQUE + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define LOGO_UUID "43a3305d-150f-4cc9-bd3b-38fca8693846;" +#define ROOT_UUID "ddb8c3f6-d94d-4394-b633-3134139cc2e0;" + +#if defined(CONFIG_CMD_AB_SELECT) +#define PARTS_DEFAULT \ + "uuid_disk=${uuid_gpt_disk};" \ + "name=logo,start=512K,size=2M,uuid=" LOGO_UUID \ + "name=misc,size=512K,uuid=${uuid_gpt_misc};" \ + "name=dtbo_a,size=8M,uuid=${uuid_gpt_dtbo_a};" \ + "name=dtbo_b,size=8M,uuid=${uuid_gpt_dtbo_b};" \ + "name=vbmeta_a,size=512K,uuid=${uuid_gpt_vbmeta_a};" \ + "name=vbmeta_b,size=512K,uuid=${uuid_gpt_vbmeta_b};" \ + "name=boot_a,size=32M,bootable,uuid=${uuid_gpt_boot_a};" \ + "name=boot_b,size=32M,bootable,uuid=${uuid_gpt_boot_b};" \ + "name=super,size=3072M,uuid=${uuid_gpt_super};" \ + "name=userdata,size=11282M,uuid=${uuid_gpt_userdata};" \ + "name=rootfs,size=-,uuid=" ROOT_UUID +#else +#define PARTS_DEFAULT \ + "uuid_disk=${uuid_gpt_disk};" \ + "name=logo,start=512K,size=2M,uuid=" LOGO_UUID \ + "name=misc,size=512K,uuid=${uuid_gpt_misc};" \ + "name=dtbo,size=8M,uuid=${uuid_gpt_dtbo};" \ + "name=vbmeta,size=512K,uuid=${uuid_gpt_vbmeta};" \ + "name=boot,size=32M,bootable,uuid=${uuid_gpt_boot};" \ + "name=recovery,size=32M,uuid=${uuid_gpt_recovery};" \ + "name=cache,size=256M,uuid=${uuid_gpt_cache};" \ + "name=super,size=1792M,uuid=${uuid_gpt_super};" \ + "name=userdata,size=12786M,uuid=${uuid_gpt_userdata};" \ + "name=rootfs,size=-,uuid=" ROOT_UUID +#endif + +#define EXTRA_ANDROID_ENV_SETTINGS \ + "board=vim3l\0" \ + "board_name=vim3l\0" \ + +#include + +#endif /* __CONFIG_H */ diff --git a/include/configs/km/km-mpc8309.h b/include/configs/km/km-mpc8309.h index 869bd9b30a9d70018da2106a67b86babd00181f8..98204bd3c692e5d67d5c4d9d8bc26cea37021f99 100644 --- a/include/configs/km/km-mpc8309.h +++ b/include/configs/km/km-mpc8309.h @@ -5,12 +5,6 @@ #define CONFIG_KM_DEF_ARCH "arch=ppc_82xx\0" -/* - * System Clock Setup - */ -#define CONFIG_SYS_CLK_FREQ 66000000 -#define CONFIG_83XX_PCICLK 66000000 - /* QE microcode/firmware address */ /* between the u-boot partition and env */ diff --git a/include/configs/km/km-mpc832x.h b/include/configs/km/km-mpc832x.h index de6e7daf066dbf0fc6f20a38bdbbdc0bcf4a98a9..888bb2981f7bc501f6ded23553dfaded271107b2 100644 --- a/include/configs/km/km-mpc832x.h +++ b/include/configs/km/km-mpc832x.h @@ -1,14 +1,3 @@ -/* - * High Level Configuration Options - */ -#define CONFIG_KM8321 /* Keymile PBEC8321 board specific */ - -/* - * System Clock Setup - */ -#define CONFIG_SYS_CLK_FREQ 66000000 -#define CONFIG_83XX_PCICLK 66000000 - /* * System IO Config */ @@ -69,6 +58,3 @@ #define CONFIG_SYS_KMBEC_FPGA_BASE 0xE8000000 #define CONFIG_SYS_KMBEC_FPGA_SIZE 128 - -/* EEprom support */ -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h index cca624ea3e116b2ba404f7a4563534c9513809a0..a485c3ac6d1d3f00ebf684e86531768a3a389d76 100644 --- a/include/configs/km/km_arm.h +++ b/include/configs/km/km_arm.h @@ -19,12 +19,6 @@ #ifndef _CONFIG_KM_ARM_H #define _CONFIG_KM_ARM_H -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ -#define CONFIG_KW88F6281 /* SOC Name */ - #define CONFIG_NAND_ECC_BCH /* include common defines/options for all Keymile boards */ @@ -74,7 +68,6 @@ #undef CONFIG_I2C_MVTWSI #define CONFIG_SYS_I2C_INIT_BOARD -#define CONFIG_KIRKWOOD_GPIO /* Enable GPIO Support */ #define CONFIG_SYS_NUM_I2C_BUSES 6 #define CONFIG_SYS_I2C_MAX_HOPS 1 #define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \ diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 743d09e9c4d9fe609a2cba192c95f93f43c39bac..ba0e4dd5c6ad3cbc0999482ffdd44b688db442a6 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -6,8 +6,6 @@ #ifndef __CONFIG_PG_WCOM_LS102XA_H #define __CONFIG_PG_WCOM_LS102XA_H -#define CONFIG_SYS_FSL_CLK - /* include common defines/options for all Keymile boards */ #include "keymile-common.h" @@ -18,8 +16,6 @@ CONFIG_KM_PHRAM + \ CONFIG_KM_RESERVED_PRAM) >> 10) -#define CONFIG_SYS_CLK_FREQ 66666666 - #define PHYS_SDRAM 0x80000000 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) @@ -40,7 +36,6 @@ * IFC Definitions */ /* NOR Flash Definitions */ -#define CONFIG_FSL_IFC #define CONFIG_SYS_FLASH_BASE 0x60000000 #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h index 82c2a129223e6fd071e84c086dd42e9d390cb2cd..e58a69501b3327673648840b43c6d56207ba021b 100644 --- a/include/configs/km_kirkwood.h +++ b/include/configs/km_kirkwood.h @@ -34,8 +34,6 @@ /* KM_KIRKWOOD_128M16 */ #elif defined(CONFIG_KM_KIRKWOOD_128M16) #define CONFIG_HOSTNAME "km_kirkwood_128m16" -#undef CONFIG_SYS_KWD_CONFIG -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg #define CONFIG_KM_DISABLE_PCIE /* KM_NUSA */ @@ -43,21 +41,14 @@ #define CONFIG_HOSTNAME "kmnusa" -#undef CONFIG_SYS_KWD_CONFIG -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg - /* KMCOGE5UN */ #elif defined(CONFIG_KM_COGE5UN) -#undef CONFIG_SYS_KWD_CONFIG -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_256M8_1.cfg #define CONFIG_HOSTNAME "kmcoge5un" #define CONFIG_KM_DISABLE_PCIE /* KM_SUSE2 */ #elif defined(CONFIG_KM_SUSE2) #define CONFIG_HOSTNAME "kmsuse2" -#undef CONFIG_SYS_KWD_CONFIG -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg #define CONFIG_KM_UBI_PART_BOOT_OPTS ",2048" #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE #else diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 4dbd53c38774130ec16aaf9a88176af4cc3e507d..98e572397b5ed73d3326e026e2bb5686c92be16c 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -141,14 +141,11 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_PCIE1 /* PCIE controller 1 */ -#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ /* Environment in parallel NOR-Flash */ #define CONFIG_ENV_TOTAL_SIZE 0x040000 #define ENV_DEL_ADDR 0xebf00000 /*direct for newenv*/ -#define CONFIG_SYS_CLK_FREQ 66666666 - /* * These can be toggled for performance analysis, otherwise use default. */ @@ -362,7 +359,6 @@ * Retain non-DM serial port for debug purposes. */ #if !defined(CONFIG_DM_SERIAL) -#define CONFIG_CONS_INDEX 1 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2) diff --git a/include/configs/kmcoge5ne.h b/include/configs/kmcoge5ne.h index 60fe4ae3839e970673694e3231bef78ddb9a4bd3..8f4685c271c61ef5f8fab63a43ca60d143a9a299 100644 --- a/include/configs/kmcoge5ne.h +++ b/include/configs/kmcoge5ne.h @@ -24,12 +24,6 @@ #include "km/km-mpc83xx.h" #include "km/km-mpc8360.h" -/* - * System Clock Setup - */ -#define CONFIG_SYS_CLK_FREQ 66000000 -#define CONFIG_83XX_PCICLK 66000000 - /** * KMCOGE5NE has 512 MB RAM */ diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index 65a38c5757b46e94fa9d06ddd3f00c8e9ec90f6f..eca8998a515bc604f4bdb50530f87d1c43c1ef37 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -30,8 +30,6 @@ #define CONFIG_BITBANGMII_MULTI /* Board Clock */ -#define RMOBILE_XTAL_CLK 20000000u -#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" diff --git a/include/configs/kontron-sl-mx6ul.h b/include/configs/kontron-sl-mx6ul.h index 34304f9102851dd085ecb142da35863e7e9a25ad..2bac0008e25253d729cd4f6b4c68e3954d548934 100644 --- a/include/configs/kontron-sl-mx6ul.h +++ b/include/configs/kontron-sl-mx6ul.h @@ -59,7 +59,6 @@ #ifdef CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR #define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #endif #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index 4152851ba414d96631c583eddb6e10bfb12bc3ea..448749a7f81d93d353c662ad555d6c50c5d5ac59 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -30,10 +30,6 @@ /* early stack pointer */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xeff0) -/* memtest command */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END 0x9fffffff - /* SMP */ #define CPU_RELEASE_ADDR secondary_boot_addr @@ -46,8 +42,7 @@ /* serial port */ #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2) -#define CONFIG_SYS_CLK_FREQ 100000000 -#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ / 4) +#define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4) /* ethernet */ #define CONFIG_SYS_RX_ETH_BUFFER 8 diff --git a/include/configs/kp_imx53.h b/include/configs/kp_imx53.h index c1db6eace1aa583c800b04822b9be5f2f82fc81a..0983d40ec411fb375468cba48cf0fbd856e4262e 100644 --- a/include/configs/kp_imx53.h +++ b/include/configs/kp_imx53.h @@ -10,8 +10,6 @@ #include #include -#define CONFIG_SYS_FSL_CLK - /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 @@ -56,8 +54,6 @@ "bootm ${loadaddr}#${fit_config}\0" \ BOOTENV -#define CONFIG_BOOTCOMMAND "run usbupd; run distro_bootcmd" - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(DHCP, dhcp, na) diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h index 3061c96e76b5fed39f52cbfc88c19f78a52d0b1b..c53808558f9b18173d6a06a56dfc2c51f0b5a49c 100644 --- a/include/configs/kp_imx6q_tpc.h +++ b/include/configs/kp_imx6q_tpc.h @@ -82,8 +82,6 @@ "bootm ${loadaddr}#${fit_config}\0" \ BOOTENV -#define CONFIG_BOOTCOMMAND "run usbupd; run distro_bootcmd" - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(MMC, mmc, 1) \ diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h index c3f690c7d70ee92a524fb8563c2a73b44b77e3e4..1eb6dafe203a78e5823947b0366b56d0da365621 100644 --- a/include/configs/kzm9g.h +++ b/include/configs/kzm9g.h @@ -68,9 +68,8 @@ /* Clock */ #define CONFIG_GLOBAL_TIMER -#define CONFIG_SYS_CLK_FREQ (48000000) #define CONFIG_SYS_CPU_CLK (1196000000) -#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ +#define CONFIG_SH_SCIF_CLK_FREQ get_board_sys_clk() #define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */ #define CONFIG_NFS_TIMEOUT 10000UL diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h index 146d8ad63721cb67357a2e5478aa235689c2ec2b..046f1888cb186134f749eadc956c70bbc7dd91a3 100644 --- a/include/configs/lacie_kw.h +++ b/include/configs/lacie_kw.h @@ -6,35 +6,6 @@ #ifndef _CONFIG_LACIE_KW_H #define _CONFIG_LACIE_KW_H -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ -/* SoC name */ -#if defined(CONFIG_NETSPACE_LITE_V2) || defined(CONFIG_NETSPACE_MINI_V2) -#define CONFIG_KW88F6192 -#else -#define CONFIG_KW88F6281 -#endif - -/* - * SDRAM configuration - */ - -/* - * Different SDRAM configuration and size for some of the boards derived - * from the Network Space v2 - */ -#if defined(CONFIG_INETSPACE_V2) -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-is2.cfg -#elif defined(CONFIG_NETSPACE_LITE_V2) || defined(CONFIG_NETSPACE_MINI_V2) -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-ns2l.cfg -#endif - -/* - * mv-common.h should be defined after CMD configs since it used them - * to enable certain macros - */ #include "mv-common.h" /* Remove or override few declarations from mv-common.h */ @@ -70,7 +41,6 @@ /* * Enable GPI0 support */ -#define CONFIG_KIRKWOOD_GPIO /* * Enable I2C support @@ -97,9 +67,6 @@ /* * Default environment variables */ -#define CONFIG_BOOTCOMMAND \ - "dhcp && run netconsole; " \ - "if run usbload || run diskload; then bootm; fi" #define CONFIG_EXTRA_ENV_SETTINGS \ "stdin=serial\0" \ diff --git a/include/configs/lager.h b/include/configs/lager.h index c5001e3ec7516af0928f09788339fc7b3f121078..4c291aa89beffe7339fc0cce6581690cc1187017 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -31,8 +31,6 @@ #define CONFIG_BITBANGMII_MULTI /* Board Clock */ -#define RMOBILE_XTAL_CLK 20000000u -#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index 6928179201989f81af16cf5bdaacd755f64c8eb1..b912db11d00ee53ba4be78724cf702692d8c51a7 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -18,7 +18,6 @@ * SoC Configuration */ #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH -#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) #define CONFIG_SYS_OSCIN_FREQ 24000000 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) @@ -61,32 +60,6 @@ #define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) #define CONFIG_HWCONFIG /* enable hwconfig */ #define CONFIG_SETUP_INITRD_TAG -#define CONFIG_BOOTCOMMAND \ - "if mmc rescan; then " \ - "if run loadbootscr; then " \ - "run bootscript; " \ - "else " \ - "if run loadbootenv; then " \ - "echo Loaded env from ${bootenvfile};" \ - "run importbootenv;" \ - "fi;" \ - "if test -n $uenvcmd; then " \ - "echo Running uenvcmd...;" \ - "run uenvcmd;" \ - "fi;" \ - "if run loadimage; then " \ - "run mmcargs; " \ - "if run loadfdt; then " \ - "echo Using ${fdtfile}...;" \ - "run fdtfixup; " \ - "run fdtboot; "\ - "fi; " \ - "run mmcboot; " \ - "fi; " \ - "fi; " \ - "fi; "\ - "run flashargs; " \ - "run flashboot" #define CONFIG_EXTRA_ENV_SETTINGS \ "bootenvfile=uEnv.txt\0" \ "fdtfile=da850-lego-ev3.dtb\0" \ diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h index d74b2bb9606453edfd0d14ea8cfb5545f2e85fda..3a8dd475b26bb4b07be384dcdb17d4a10b785bff 100644 --- a/include/configs/liteboard.h +++ b/include/configs/liteboard.h @@ -23,8 +23,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR #endif -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ @@ -36,7 +34,7 @@ "boot_fdt=try\0" \ "ip_dyn=yes\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ @@ -87,19 +85,6 @@ "bootz; " \ "fi;\0" -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev};" \ - "if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else run netboot; fi" - /* Miscellaneous configurable options */ /* Physical Memory Map */ diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h index 44f9da73063f10b085c22ca9a83a06b9ee105683..bda4283ef5a7da87b28e0c46f8434234e17d3ea2 100644 --- a/include/configs/ls1012a2g5rdb.h +++ b/include/configs/ls1012a2g5rdb.h @@ -14,8 +14,6 @@ #define CONFIG_SYS_SDRAM_SIZE 0x40000000 /* SATA */ -#define CONFIG_LIBATA -#define CONFIG_SCSI_AHCI #define CONFIG_SCSI_AHCI_PLAT #define CONFIG_SYS_SATA AHCI_BASE_ADDR @@ -74,16 +72,10 @@ "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ "bootm $load_addr#$board\0" -#undef CONFIG_BOOTCOMMAND #ifdef CONFIG_TFABOOT #undef QSPI_NOR_BOOTCOMMAND #define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \ "env exists secureboot && esbc_halt;" -#else -#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \ - "env exists secureboot && esbc_halt;" -#endif #endif #define DEFAULT_PFE_MDIO_NAME "PFE_MDIO" diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 4e654ca14ea6cdb41e06f31e21235e5c3c5f8021..5d561009c563abfdfe5b16f8015a58555f813ad6 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -10,8 +10,6 @@ #include #include -#define CONFIG_SYS_CLK_FREQ 125000000 - #ifdef CONFIG_TFABOOT #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE #else @@ -45,11 +43,6 @@ /* I2C */ /* GPIO */ -#ifdef CONFIG_DM_GPIO -#ifndef CONFIG_MPC8XXX_GPIO -#define CONFIG_MPC8XXX_GPIO -#endif -#endif #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 @@ -78,15 +71,10 @@ "kernel_size=0x2800000\0" \ "bootm_size=0x10000000\0" \ -#undef CONFIG_BOOTCOMMAND #ifdef CONFIG_TFABOOT #define QSPI_NOR_BOOTCOMMAND "sf probe 0:0; sf read $kernel_load "\ "$kernel_start $kernel_size && "\ "bootm $kernel_load" -#else -#define CONFIG_BOOTCOMMAND "sf probe 0:0; sf read $kernel_load "\ - "$kernel_start $kernel_size && "\ - "bootm $kernel_load" #endif /* Monitor Command Prompt */ diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h index 2711f651d7190be9ebda04758903741f5cd7a2fc..ef57cf6aaa31671c25f048fe5277db71719a4c51 100644 --- a/include/configs/ls1012afrdm.h +++ b/include/configs/ls1012afrdm.h @@ -54,12 +54,9 @@ "sf probe && sf read $load_addr " \ "$kernel_addr $kernel_size && bootm $load_addr#$board\0" -#undef CONFIG_BOOTCOMMAND #ifdef CONFIG_TFABOOT #undef QSPI_NOR_BOOTCOMMAND #define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd;run qspi_bootcmd" -#else -#define CONFIG_BOOTCOMMAND "run distro_bootcmd;run qspi_bootcmd" #endif #endif /* __LS1012ARDB_H__ */ diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index f8b386125cce00690ec100c79526631d9dc115c9..c61865ccd4e71e898447ac85a0e7a0418dcdeb41 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -8,9 +8,6 @@ #include "ls1012a_common.h" -#undef CONFIG_SYS_BOARD -#define CONFIG_SYS_BOARD "ls1012afrwy" - /* Board Rev*/ #define BOARD_REV_A_B 0x0 #define BOARD_REV_C 0x00080000 @@ -92,14 +89,10 @@ " && esbc_validate ${kernelheader_addr_r};" \ "bootm $load_addr#$BOARD\0" -#undef CONFIG_BOOTCOMMAND #ifdef CONFIG_TFABOOT #undef QSPI_NOR_BOOTCOMMAND #define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; "\ "env exists secureboot && esbc_halt;" -#else -#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; "\ - "env exists secureboot && esbc_halt;" #endif #include diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index a5900f226c9e8a30e39a111e1f72e0a0b891c34b..cbcb3f72a5622caca40661a827dc9c7162f4df17 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -75,19 +75,16 @@ DSPI_CTAR_PASC(0) | DSPI_CTAR_PDT(0) | \ DSPI_CTAR_CSSCK(2) | DSPI_CTAR_ASC(0) | \ DSPI_CTAR_DT(0)) -#define CONFIG_SPI_FLASH_SST /* cs1 */ #define CONFIG_SYS_DSPI_CTAR2 (DSPI_CTAR_TRSZ(7) | DSPI_CTAR_PCSSCK_1CLK |\ DSPI_CTAR_PASC(0) | DSPI_CTAR_PDT(0) | \ DSPI_CTAR_CSSCK(0) | DSPI_CTAR_ASC(0) | \ DSPI_CTAR_DT(0)) -#define CONFIG_SPI_FLASH_STMICRO /* cs2 */ #define CONFIG_SYS_DSPI_CTAR3 (DSPI_CTAR_TRSZ(7) | DSPI_CTAR_PCSSCK_1CLK |\ DSPI_CTAR_PASC(0) | DSPI_CTAR_PDT(0) | \ DSPI_CTAR_CSSCK(2) | DSPI_CTAR_ASC(0) | \ DSPI_CTAR_DT(0)) -#define CONFIG_SPI_FLASH_EON /* cs3 */ #define CONFIG_PCIE1 /* PCIE controller 1 */ @@ -138,14 +135,10 @@ "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ "bootm $load_addr#$board\0" -#undef CONFIG_BOOTCOMMAND #ifdef CONFIG_TFABOOT #undef QSPI_NOR_BOOTCOMMAND #define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "\ "env exists secureboot && esbc_halt;" -#else -#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "\ - "env exists secureboot && esbc_halt;" #endif #include diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h index c8a2f120dca1332baaea5803bf3e86ee72217853..c9a152e08a27c700bd767ec8328ff37858ce4507 100644 --- a/include/configs/ls1012ardb.h +++ b/include/configs/ls1012ardb.h @@ -92,14 +92,10 @@ "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ "bootm $load_addr#$board\0" -#undef CONFIG_BOOTCOMMAND #ifdef CONFIG_TFABOOT #undef QSPI_NOR_BOOTCOMMAND #define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "\ "env exists secureboot && esbc_halt;" -#else -#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "\ - "env exists secureboot && esbc_halt;" #endif #include diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 222caa161d0bae78932bc544ed52bee88911de3c..7b4044fba724ceea7e33c1b567643dd30d778383 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -9,13 +9,9 @@ #define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR -#define CONFIG_SYS_FSL_CLK - #define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE -#define CONFIG_SYS_CLK_FREQ 100000000 - /* * DDR: 800 MHz ( 1600 MT/s data rate ) */ @@ -48,8 +44,6 @@ #define SDRAM_CFG_BI 0x00000001 #ifdef CONFIG_SD_BOOT -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xe8 - #define CONFIG_SPL_MAX_SIZE 0x1a000 #define CONFIG_SPL_STACK 0x1001d000 #define CONFIG_SPL_PAD_TO 0x1c000 @@ -100,9 +94,6 @@ CONFIG_SYS_SCSI_MAX_LUN) /* SPI */ -#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_SPI_FLASH_SPANSION -#endif /* * eTSEC @@ -174,9 +165,6 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #endif -#define CONFIG_OF_BOARD_SETUP -#define CONFIG_OF_STDOUT_VIA_ALIAS - #include #endif diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 27b97ffd2fb0fc7972eb9995367ba0f121f345c5..7edb5c618089b7fa2a16b15de5a25f797d8b4d0b 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -9,22 +9,13 @@ #define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR -#define CONFIG_SYS_FSL_CLK - #define CONFIG_DEEP_SLEEP #define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE -#ifndef __ASSEMBLY__ -unsigned long get_board_sys_clk(void); -#endif - #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_SYS_CLK_FREQ 100000000 #define CONFIG_QIXIS_I2C_ACCESS -#else -#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() #endif #ifdef CONFIG_SD_BOOT @@ -76,7 +67,6 @@ unsigned long get_board_sys_clk(void); * IFC Definitions */ #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_FSL_IFC #define CONFIG_SYS_FLASH_BASE 0x60000000 #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE @@ -298,11 +288,6 @@ unsigned long get_board_sys_clk(void); */ /* GPIO */ -#ifdef CONFIG_DM_GPIO -#ifndef CONFIG_MPC8XXX_GPIO -#define CONFIG_MPC8XXX_GPIO -#endif -#endif /* EEPROM */ #define CONFIG_SYS_I2C_EEPROM_NXID @@ -323,7 +308,6 @@ unsigned long get_board_sys_clk(void); * Video */ #ifdef CONFIG_VIDEO_FSL_DCU_FB -#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #define CONFIG_FSL_DIU_CH7301 diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index f70b6e94c079808cf03f34151fa9ff4b13730e0f..5f6c2a0037072e6b093b90795843882d2b6a3212 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -8,8 +8,6 @@ #define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR -#define CONFIG_SYS_FSL_CLK - #define CONFIG_DEEP_SLEEP #define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR @@ -18,8 +16,6 @@ /* XHCI Support - enabled by default */ #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -#define CONFIG_SYS_CLK_FREQ 100000000 - #define DDR_SDRAM_CFG 0x470c0008 #define DDR_CS0_BNDS 0x008000bf #define DDR_CS0_CONFIG 0x80014302 @@ -75,7 +71,6 @@ #endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */ #endif -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM 0x80000000 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index c099629607f9b407fb51ffaf1ad995871f923301..d4c6f4fcf85d4f8abcd71d04831123b43561a18d 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -9,15 +9,11 @@ #define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR -#define CONFIG_SYS_FSL_CLK - #define CONFIG_DEEP_SLEEP #define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE -#define CONFIG_SYS_CLK_FREQ 100000000 - #define DDR_SDRAM_CFG 0x470c0008 #define DDR_CS0_BNDS 0x008000bf #define DDR_CS0_CONFIG 0x80014302 @@ -89,7 +85,6 @@ * IFC Definitions */ #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_FSL_IFC #define CONFIG_SYS_FLASH_BASE 0x60000000 #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE @@ -191,11 +186,6 @@ */ /* GPIO */ -#ifdef CONFIG_DM_GPIO -#ifndef CONFIG_MPC8XXX_GPIO -#define CONFIG_MPC8XXX_GPIO -#endif -#endif /* EEPROM */ #define CONFIG_SYS_I2C_EEPROM_NXID @@ -209,7 +199,6 @@ * Video */ #ifdef CONFIG_VIDEO_FSL_DCU_FB -#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #define CONFIG_FSL_DCU_SII9022A @@ -378,18 +367,6 @@ "bootm $load_addr#$board\0" #endif -#undef CONFIG_BOOTCOMMAND -#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \ - "env exists secureboot && esbc_halt" -#elif defined(CONFIG_SD_BOOT) -#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; " \ - "env exists secureboot && esbc_halt;" -#else -#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd;" \ - "env exists secureboot && esbc_halt;" -#endif - /* * Miscellaneous configurable options */ diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index 1401264f93164e8d94438175ec33275df2a4f540..f47bc739843293b0250bb862ce76da03326e86a4 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -7,7 +7,6 @@ #define __L1028A_COMMON_H #define CONFIG_REMAKE_ELF -#define CONFIG_MP #include #include @@ -32,11 +31,6 @@ #define COUNTER_FREQUENCY 25000000 /* 25MHz */ /* GPIO */ -#ifdef CONFIG_DM_GPIO -#ifndef CONFIG_MPC8XXX_GPIO -#define CONFIG_MPC8XXX_GPIO -#endif -#endif /* I2C */ @@ -60,8 +54,6 @@ func(DHCP, dhcp, na) #include -#undef CONFIG_BOOTCOMMAND - #define XSPI_NOR_BOOTCOMMAND \ "run xspi_hdploadcmd; run distro_bootcmd; run xspi_bootcmd; " \ "env exists secureboot && esbc_halt;;" diff --git a/include/configs/ls1028aqds.h b/include/configs/ls1028aqds.h index fe20363e690f7e32de12ebbb6d6f93d112f10e47..8e3bd7790fe1ccbdd653c74bee96efafb34ac678 100644 --- a/include/configs/ls1028aqds.h +++ b/include/configs/ls1028aqds.h @@ -8,8 +8,7 @@ #include "ls1028a_common.h" -#define CONFIG_SYS_CLK_FREQ 100000000 -#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ / 4) +#define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4) /* DDR */ #define CONFIG_DIMM_SLOTS_PER_CTLR 2 diff --git a/include/configs/ls1028ardb.h b/include/configs/ls1028ardb.h index 348db1e2f8c160cffc350fdcf3c600e22f4cbd09..5ce9ebbae93f1ada6e11d1830b4e661c98c5f280 100644 --- a/include/configs/ls1028ardb.h +++ b/include/configs/ls1028ardb.h @@ -8,8 +8,7 @@ #include "ls1028a_common.h" -#define CONFIG_SYS_CLK_FREQ 100000000 -#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ / 4) +#define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4) #define CONFIG_SYS_RTC_BUS_NUM 0 diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index bdf1b434aca44e20eb3bdddfdd2f49f3f144921c..3b4f822ecffc4b9a4eb9edc3baf51e09b9c4244d 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -112,17 +112,11 @@ #endif /* GPIO */ -#ifdef CONFIG_DM_GPIO -#ifndef CONFIG_MPC8XXX_GPIO -#define CONFIG_MPC8XXX_GPIO -#endif -#endif /* IFC */ #ifndef SPL_NO_IFC #if defined(CONFIG_TFABOOT) || \ (!defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)) -#define CONFIG_FSL_IFC /* * CONFIG_SYS_FLASH_BASE has the final address (core view) * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view) @@ -154,13 +148,6 @@ #endif /* DSPI */ -#ifndef SPL_NO_DSPI -#ifdef CONFIG_FSL_DSPI -#define CONFIG_SPI_FLASH_STMICRO /* cs0 */ -#define CONFIG_SPI_FLASH_SST /* cs1 */ -#define CONFIG_SPI_FLASH_EON /* cs2 */ -#endif -#endif /* FMan ucode */ #ifndef SPL_NO_FMAN @@ -261,7 +248,6 @@ "bootm $load_addr#$board\0" -#undef CONFIG_BOOTCOMMAND #ifdef CONFIG_TFABOOT #define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \ "env exists secureboot && esbc_halt;" @@ -271,17 +257,6 @@ "env exists secureboot && esbc_halt;" #define IFC_NAND_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; " \ "env exists secureboot && esbc_halt;" -#else -#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \ - "env exists secureboot && esbc_halt;" -#elif defined(CONFIG_SD_BOOT) -#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; " \ - "env exists secureboot && esbc_halt;" -#else -#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; " \ - "env exists secureboot && esbc_halt;" -#endif #endif #endif diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index ee5660571e54dda5bde86defa93183392801cc1a..80eff7b1a902a6702a7fd45cb8a0cb0d6b2cf8aa 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -8,12 +8,6 @@ #include "ls1043a_common.h" -#ifndef __ASSEMBLY__ -unsigned long get_board_sys_clk(void); -#endif - -#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() - #define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_DIMM_SLOTS_PER_CTLR 1 @@ -330,12 +324,6 @@ unsigned long get_board_sys_clk(void); #define I2C_VOL_MONITOR_BUS_V_OVF 0x1 #define I2C_VOL_MONITOR_BUS_V_SHIFT 3 -#define CONFIG_VID_FLS_ENV "ls1043aqds_vdd_mv" -#ifndef CONFIG_SPL_BUILD -#define CONFIG_VID -#endif -#define CONFIG_VOL_MONITOR_IR36021_SET -#define CONFIG_VOL_MONITOR_INA220 /* The lowest and highest voltage allowed for LS1043AQDS */ #define VDD_MV_MIN 819 #define VDD_MV_MAX 1212 diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 0d071c4ab748535605a40e99822048fb8fdbdd6a..7b6d19374e76168a9de28e415421872c57e72a85 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -8,8 +8,6 @@ #include "ls1043a_common.h" -#define CONFIG_SYS_CLK_FREQ 100000000 - #define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_DIMM_SLOTS_PER_CTLR 1 diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 515f4209bb92382a57049ef3f48c0b5c51410e52..d07d27d1f5c1587ff8f39a09f58f3f9c0c064df2 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -110,11 +110,6 @@ #endif /* GPIO */ -#ifdef CONFIG_DM_GPIO -#ifndef CONFIG_MPC8XXX_GPIO -#define CONFIG_MPC8XXX_GPIO -#endif -#endif /* I2C */ diff --git a/include/configs/ls1046afrwy.h b/include/configs/ls1046afrwy.h index 5b78c5f7ab6a0e72f8eca240999484e2700b34da..14ad84a1ef462b92e46f23c1f7badeaac9b9b7a2 100644 --- a/include/configs/ls1046afrwy.h +++ b/include/configs/ls1046afrwy.h @@ -8,8 +8,6 @@ #include "ls1046a_common.h" -#define CONFIG_SYS_CLK_FREQ 100000000 - #define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_DIMM_SLOTS_PER_CTLR 1 @@ -17,8 +15,6 @@ #define CONFIG_SYS_UBOOT_BASE 0x40100000 -/* IFC */ -#define CONFIG_FSL_IFC /* * NAND Flash Definitions */ @@ -109,7 +105,6 @@ #endif -#undef CONFIG_BOOTCOMMAND #define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \ "env exists secureboot && esbc_halt;;" #define SD_BOOTCOMMAND "run distro_bootcmd;run sd_bootcmd; " \ diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 8bc09d0066838b7d9f273d0ad2eed39891b0e4df..97bf4182be167b99afb244cf800f92c6b25e6762 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -8,12 +8,6 @@ #include "ls1046a_common.h" -#ifndef __ASSEMBLY__ -unsigned long get_board_sys_clk(void); -#endif - -#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() - #define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_DIMM_SLOTS_PER_CTLR 1 @@ -43,7 +37,6 @@ unsigned long get_board_sys_clk(void); /* IFC */ #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_FSL_IFC /* * CONFIG_SYS_FLASH_BASE has the final address (core view) * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view) @@ -339,12 +332,6 @@ unsigned long get_board_sys_clk(void); #define I2C_VOL_MONITOR_BUS_V_OVF 0x1 #define I2C_VOL_MONITOR_BUS_V_SHIFT 3 -#define CONFIG_VID_FLS_ENV "ls1046aqds_vdd_mv" -#ifndef CONFIG_SPL_BUILD -#define CONFIG_VID -#endif -#define CONFIG_VOL_MONITOR_IR36021_SET -#define CONFIG_VOL_MONITOR_INA220 /* The lowest and highest voltage allowed for LS1046AQDS */ #define VDD_MV_MIN 819 #define VDD_MV_MAX 1212 @@ -362,7 +349,6 @@ unsigned long get_board_sys_clk(void); * Environment */ -#undef CONFIG_BOOTCOMMAND #ifdef CONFIG_TFABOOT #define IFC_NAND_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; " \ "env exists secureboot && esbc_halt;;" @@ -372,20 +358,6 @@ unsigned long get_board_sys_clk(void); "env exists secureboot && esbc_halt;;" #define SD_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; " \ "env exists secureboot && esbc_halt;;" -#else -#if defined(CONFIG_QSPI_BOOT) -#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; " \ - "env exists secureboot && esbc_halt;;" -#elif defined(CONFIG_NAND_BOOT) -#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; " \ - "env exists secureboot && esbc_halt;;" -#elif defined(CONFIG_SD_BOOT) -#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; " \ - "env exists secureboot && esbc_halt;;" -#else -#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; " \ - "env exists secureboot && esbc_halt;;" -#endif #endif #include diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index d06f3380a7833071c7bdc780b106c1e454714b7b..8ed1dceb234371e658ded68998c42a465cb97ce0 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -9,8 +9,6 @@ #include "ls1046a_common.h" -#define CONFIG_SYS_CLK_FREQ 100000000 - #define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_DIMM_SLOTS_PER_CTLR 1 @@ -27,14 +25,6 @@ #define CONFIG_SYS_SPL_ARGS_ADDR 0x90000000 #endif -#ifndef SPL_NO_IFC -/* IFC */ -#define CONFIG_FSL_IFC -/* - * NAND Flash Definitions - */ -#endif - #define CONFIG_SYS_NAND_BASE 0x7e800000 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE @@ -145,20 +135,11 @@ #endif #ifndef SPL_NO_MISC -#undef CONFIG_BOOTCOMMAND #ifdef CONFIG_TFABOOT #define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \ "env exists secureboot && esbc_halt;;" #define SD_BOOTCOMMAND "run distro_bootcmd;run sd_bootcmd; " \ "env exists secureboot && esbc_halt;" -#else -#if defined(CONFIG_QSPI_BOOT) -#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \ - "env exists secureboot && esbc_halt;;" -#elif defined(CONFIG_SD_BOOT) -#define CONFIG_BOOTCOMMAND "run distro_bootcmd;run sd_bootcmd; " \ - "env exists secureboot && esbc_halt;" -#endif #endif #endif diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index c816ee16f2ad92c69db7ce1bed3ec76d62d1e436..2e52108c23e304002b54c3ebbc8991edf2186502 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -49,11 +49,6 @@ #define CPU_RELEASE_ADDR secondary_boot_addr /* GPIO */ -#ifdef CONFIG_DM_GPIO -#ifndef CONFIG_MPC8XXX_GPIO -#define CONFIG_MPC8XXX_GPIO -#endif -#endif /* I2C */ @@ -63,11 +58,6 @@ #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2) -#if !defined(SPL_NO_IFC) || defined(CONFIG_TARGET_LS1088AQDS) -/* IFC */ -#define CONFIG_FSL_IFC -#endif - /* * During booting, IFC is mapped at the region of 0x30000000. * But this region is limited to 256MB. To accommodate NOR, promjet @@ -173,25 +163,6 @@ unsigned long long get_qixis_addr(void); "console=ttyAMA0,38400n8\0" \ "mcinitcmd=fsl_mc start mc 0x580a00000" \ " 0x580e00000 \0" - -#ifndef CONFIG_TFABOOT -#if defined(CONFIG_QSPI_BOOT) -#define CONFIG_BOOTCOMMAND "sf probe 0:0;" \ - "sf read 0x80001000 0xd00000 0x100000;"\ - " fsl_mc lazyapply dpl 0x80001000 &&" \ - " sf read $kernel_load $kernel_start" \ - " $kernel_size && bootm $kernel_load" -#elif defined(CONFIG_SD_BOOT) -#define CONFIG_BOOTCOMMAND "mmcinfo;mmc read 0x80001000 0x6800 0x800;"\ - " fsl_mc lazyapply dpl 0x80001000 &&" \ - " mmc read $kernel_load $kernel_start" \ - " $kernel_size && bootm $kernel_load" -#else /* NOR BOOT*/ -#define CONFIG_BOOTCOMMAND "fsl_mc lazyapply dpl 0x580d00000 &&" \ - " cp.b $kernel_start $kernel_load" \ - " $kernel_size && bootm $kernel_load" -#endif -#endif /* CONFIG_TFABOOT */ #endif /* Monitor Command Prompt */ diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index d001acfd68a5730827893ebd89973e0869b8f5fc..5912fe95ccfbc9c632bd3900046b950aa8d4e327 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -8,22 +8,14 @@ #include "ls1088a_common.h" - -#ifndef __ASSEMBLY__ -unsigned long get_board_sys_clk(void); -#endif - #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_QIXIS_I2C_ACCESS #define SYS_NO_FLASH - -#define CONFIG_SYS_CLK_FREQ 100000000 #else #define CONFIG_QIXIS_I2C_ACCESS -#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() #endif -#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ/4) +#define COUNTER_FREQUENCY_REAL (get_board_sys_clk()/4) #define COUNTER_FREQUENCY 25000000 /* 25MHz */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 @@ -298,16 +290,10 @@ unsigned long get_board_sys_clk(void); #define I2C_VOL_MONITOR_BUS_V_SHIFT 3 #define I2C_SVDD_MONITOR_ADDR 0x4F -#define CONFIG_VID_FLS_ENV "ls1088aqds_vdd_mv" -#define CONFIG_VID - /* The lowest and highest voltage allowed for LS1088AQDS */ #define VDD_MV_MIN 819 #define VDD_MV_MAX 1212 -#define CONFIG_VOL_MONITOR_LTC3882_SET -#define CONFIG_VOL_MONITOR_LTC3882_READ - #define PWM_CHANNEL0 0x0 /* @@ -321,9 +307,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_EEPROM_BUS_NUM 0 #ifdef CONFIG_FSL_DSPI -#define CONFIG_SPI_FLASH_STMICRO -#define CONFIG_SPI_FLASH_SST -#define CONFIG_SPI_FLASH_EON #if !defined(CONFIG_TFABOOT) && \ !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) #endif diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index 6ad1fea3c832ccfb4334e85302a6e3b1b7df4824..400b8adb24c47861cab143ddfbaddae370ac366c 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -16,7 +16,6 @@ #define SYS_NO_FLASH #endif -#define CONFIG_SYS_CLK_FREQ 100000000 #define COUNTER_FREQUENCY_REAL 25000000 /* 25MHz */ #define COUNTER_FREQUENCY 25000000 /* 25MHz */ @@ -197,16 +196,10 @@ #define I2C_VOL_MONITOR_BUS_V_SHIFT 3 #define I2C_SVDD_MONITOR_ADDR 0x4F -#define CONFIG_VID_FLS_ENV "ls1088ardb_vdd_mv" -#define CONFIG_VID - /* The lowest and highest voltage allowed for LS1088ARDB */ #define VDD_MV_MIN 819 #define VDD_MV_MAX 1212 -#define CONFIG_VOL_MONITOR_LTC3882_SET -#define CONFIG_VOL_MONITOR_LTC3882_READ - #define PWM_CHANNEL0 0x0 /* @@ -424,7 +417,6 @@ "bootm $load_addr#$BOARD\0" #endif /* CONFIG_TFABOOT */ -#undef CONFIG_BOOTCOMMAND #ifdef CONFIG_TFABOOT #define QSPI_NOR_BOOTCOMMAND \ "sf read 0x80001000 0xd00000 0x100000;" \ @@ -446,26 +438,8 @@ #else #if defined(CONFIG_QSPI_BOOT) /* Try to boot an on-QSPI kernel first, then do normal distro boot */ -#define CONFIG_BOOTCOMMAND \ - "sf read 0x80001000 0xd00000 0x100000;" \ - "env exists mcinitcmd && env exists secureboot " \ - " && sf read 0x806C0000 0x6C0000 0x100000 " \ - "&& esbc_validate 0x806C0000;env exists mcinitcmd " \ - "&& fsl_mc lazyapply dpl 0x80001000;" \ - "run distro_bootcmd;run qspi_bootcmd;" \ - "env exists secureboot && esbc_halt;" /* Try to boot an on-SD kernel first, then do normal distro boot */ -#elif defined(CONFIG_SD_BOOT) -#define CONFIG_BOOTCOMMAND \ - "env exists mcinitcmd && mmcinfo; " \ - "mmc read 0x80001000 0x6800 0x800; " \ - "env exists mcinitcmd && env exists secureboot " \ - " && mmc read 0x806C0000 0x3600 0x20 " \ - "&& esbc_validate 0x806C0000;env exists mcinitcmd " \ - "&& fsl_mc lazyapply dpl 0x80001000;" \ - "run distro_bootcmd;run sd_bootcmd;" \ - "env exists secureboot && esbc_halt;" #endif #endif /* CONFIG_TFABOOT */ diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 6d9ae9d987ea6cbdcbf2403641e60344d8c8f16b..eea6ce53db59afc46bbd64ec9424248ca8e8f11c 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -61,11 +61,6 @@ #define COUNTER_FREQUENCY 25000000 /* 25MHz */ /* GPIO */ -#ifdef CONFIG_DM_GPIO -#ifndef CONFIG_MPC8XXX_GPIO -#define CONFIG_MPC8XXX_GPIO -#endif -#endif /* I2C */ @@ -74,9 +69,6 @@ #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK (get_serial_clock()) -/* IFC */ -#define CONFIG_FSL_IFC - /* * During booting, IFC is mapped at the region of 0x30000000. * But this region is limited to 256MB. To accommodate NOR, promjet @@ -170,19 +162,6 @@ unsigned long long get_qixis_addr(void); "mcinitcmd=fsl_mc start mc 0x580a00000" \ " 0x580e00000 \0" -#ifndef CONFIG_TFABOOT -#ifdef CONFIG_SD_BOOT -#define CONFIG_BOOTCOMMAND "mmc read 0x80200000 0x6800 0x800;"\ - " fsl_mc apply dpl 0x80200000 &&" \ - " mmc read $kernel_load $kernel_start" \ - " $kernel_size && bootm $kernel_load" -#else -#define CONFIG_BOOTCOMMAND "fsl_mc apply dpl 0x580d00000 &&" \ - " cp.b $kernel_start $kernel_load" \ - " $kernel_size && bootm $kernel_load" -#endif -#endif - /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ #define CONFIG_SYS_MAXARGS 64 /* max command args */ diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index e67dee0f00b9c6be5570d9b3df6262810b3050db..b0a05dd8071c75321b7477f7340234e0afe566c1 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -9,18 +9,13 @@ #include "ls2080a_common.h" -#ifndef __ASSEMBLY__ -unsigned long get_board_sys_clk(void); -#endif - #ifdef CONFIG_FSL_QSPI #define CONFIG_QIXIS_I2C_ACCESS #define CONFIG_SYS_I2C_IFDR_DIV 0x7e #endif #define CONFIG_SYS_I2C_FPGA_ADDR 0x66 -#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() -#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ/4) +#define COUNTER_FREQUENCY_REAL (get_board_sys_clk()/4) #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS1 0x51 @@ -256,15 +251,7 @@ unsigned long get_board_sys_clk(void); #define I2C_MUX_CH_DEFAULT 0x8 /* SPI */ -#ifdef CONFIG_FSL_DSPI -#define CONFIG_SPI_FLASH_STMICRO -#define CONFIG_SPI_FLASH_SST -#define CONFIG_SPI_FLASH_EON -#endif -#ifdef CONFIG_FSL_QSPI -#define CONFIG_SPI_FLASH_SPANSION -#endif /* * Verify QSPI when boot from NAND, QIXIS brdcfg9 need configure. * If boot from on-board NAND, ISO1 = 1, ISO2 = 0, IBOOT = 0 @@ -285,9 +272,7 @@ unsigned long get_board_sys_clk(void); */ #define RTC #define CONFIG_RTC_DS3231 1 -#define CONFIG_RTC_ENABLE_32KHZ_OUTPUT #define CONFIG_SYS_I2C_RTC_ADDR 0x68 -#define CONFIG_RTC_ENABLE_32KHZ_OUTPUT /* EEPROM */ #define CONFIG_SYS_I2C_EEPROM_NXID diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 54fab54609ea99554df1e9c9836116cf9b1b6078..a54387e16ca729a18aa03371a3d0251569eaa031 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -17,13 +17,7 @@ #define I2C_MUX_CH_VOL_MONITOR 0xa #define I2C_VOL_MONITOR_ADDR 0x38 -#define CONFIG_VOL_MONITOR_IR36021_READ -#define CONFIG_VOL_MONITOR_IR36021_SET -#define CONFIG_VID_FLS_ENV "ls2080ardb_vdd_mv" -#ifndef CONFIG_SPL_BUILD -#define CONFIG_VID -#endif /* step the IR regulator in 5mV increments */ #define IR_VDD_STEP_DOWN 5 #define IR_VDD_STEP_UP 5 @@ -31,12 +25,7 @@ #define VDD_MV_MIN 819 #define VDD_MV_MAX 1212 -#ifndef __ASSEMBLY__ -unsigned long get_board_sys_clk(void); -#endif - -#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() -#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ/4) +#define COUNTER_FREQUENCY_REAL (get_board_sys_clk()/4) #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS1 0x51 @@ -258,9 +247,6 @@ unsigned long get_board_sys_clk(void); #define I2C_MUX_CH_DEFAULT 0x8 /* SPI */ -#if defined(CONFIG_FSL_DSPI) -#define CONFIG_SPI_FLASH_STMICRO -#endif /* * RTC configuration @@ -507,38 +493,12 @@ unsigned long get_board_sys_clk(void); "run distro_bootcmd;run nor_bootcmd; " \ "env exists secureboot && esbc_halt;" #else -#undef CONFIG_BOOTCOMMAND #ifdef CONFIG_QSPI_BOOT /* Try to boot an on-QSPI kernel first, then do normal distro boot */ -#define CONFIG_BOOTCOMMAND \ - "sf probe 0:0; " \ - "sf read 0x806c0000 0x6c0000 0x40000; " \ - "env exists mcinitcmd && env exists secureboot "\ - "&& esbc_validate 0x806C0000; " \ - "sf read 0x80d00000 0xd00000 0x100000; " \ - "env exists mcinitcmd && " \ - "fsl_mc lazyapply dpl 0x80d00000; " \ - "run distro_bootcmd;run qspi_bootcmd; " \ - "env exists secureboot && esbc_halt;" #elif defined(CONFIG_SD_BOOT) /* Try to boot an on-SD kernel first, then do normal distro boot */ -#define CONFIG_BOOTCOMMAND \ - "env exists mcinitcmd && env exists secureboot "\ - "&& mmcinfo && mmc read $load_addr 0x3600 0x800 " \ - "&& esbc_validate $load_addr; " \ - "env exists mcinitcmd && run mcinitcmd " \ - "&& mmc read 0x88000000 0x6800 0x800 " \ - "&& fsl_mc lazyapply dpl 0x88000000; " \ - "run distro_bootcmd;run sd_bootcmd; " \ - "env exists secureboot && esbc_halt;" #else /* Try to boot an on-NOR kernel first, then do normal distro boot */ -#define CONFIG_BOOTCOMMAND \ - "env exists mcinitcmd && env exists secureboot "\ - "&& esbc_validate 0x5806C0000; env exists mcinitcmd "\ - "&& fsl_mc lazyapply dpl 0x580d00000;" \ - "run distro_bootcmd;run nor_bootcmd; " \ - "env exists secureboot && esbc_halt;" #endif #endif diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h index 7294a3c20a5a4d4453d6ebc6a57a07327c8daf43..afa0206fb93a5d58f0e5fb683d3910f158f69df0 100644 --- a/include/configs/lsxl.h +++ b/include/configs/lsxl.h @@ -7,24 +7,9 @@ #ifndef _CONFIG_LSXL_H #define _CONFIG_LSXL_H -/* - * Version number information - */ -#if defined(CONFIG_LSCHLV2) -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lschl.cfg -#elif defined(CONFIG_LSXHL) -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lsxhl.cfg -#else -#error "unknown board" -#endif - /* * General configuration options */ -#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ -#define CONFIG_KW88F6281 /* SOC Name */ - -#define CONFIG_KIRKWOOD_GPIO #include "mv-common.h" diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 7173fe6ba656a5a1a5a7ec53ca09ee6994c8968a..e285109cbba26c13aebf0e038fbafa76c96ac298 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -11,14 +11,12 @@ #include #define CONFIG_REMAKE_ELF -#define CONFIG_FSL_TZPC_BP147 #define CONFIG_FSL_MEMAC #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_FLASH_BASE 0x20000000 /* DDR */ -#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ #define CONFIG_SYS_FSL_DDR_INTLV_256B /* force 256 byte interleaving */ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL @@ -38,7 +36,6 @@ #define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ #define CONFIG_DIMM_SLOTS_PER_CTLR 2 #define CONFIG_CHIP_SELECTS_PER_CTRL 4 -#define CONFIG_FSL_DDR_BIST /* enable built-in memory test */ #define CONFIG_SYS_MONITOR_LEN (936 * 1024) /* Miscellaneous configurable options */ @@ -107,7 +104,6 @@ /* PCI */ #ifdef CONFIG_PCI -#define CONFIG_SYS_PCI_64BIT #define CONFIG_PCI_SCAN_SHOW #endif @@ -130,19 +126,7 @@ #endif #endif -/* GPIO */ -#ifdef CONFIG_DM_GPIO -#ifndef CONFIG_MPC8XXX_GPIO -#define CONFIG_MPC8XXX_GPIO -#endif -#endif - -#ifndef __ASSEMBLY__ -unsigned long get_board_sys_clk(void); -#endif - -#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() -#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ / 4) +#define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4) #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 diff --git a/include/configs/lx2160aqds.h b/include/configs/lx2160aqds.h index a04bbb6e6eb05b2cbdcb61dead29a7c62c72c65c..a07ebeb7233cc3283264b235491d976f2f332e28 100644 --- a/include/configs/lx2160aqds.h +++ b/include/configs/lx2160aqds.h @@ -8,12 +8,6 @@ #include "lx2160a_common.h" -/* VID */ -#define CONFIG_VID_FLS_ENV "lx2160aqds_vdd_mv" -#define CONFIG_VID -#define CONFIG_VOL_MONITOR_LTC3882_SET -#define CONFIG_VOL_MONITOR_LTC3882_READ - /* RTC */ #define CONFIG_SYS_RTC_BUS_NUM 0 diff --git a/include/configs/lx2160ardb.h b/include/configs/lx2160ardb.h index 4fd3e54830930b15eb4840582c0890829836f494..a8a9f8259ebe3e5fb61c5df1463e91ab495dd0b2 100644 --- a/include/configs/lx2160ardb.h +++ b/include/configs/lx2160ardb.h @@ -8,12 +8,6 @@ #include "lx2160a_common.h" -/* VID */ -#define CONFIG_VID_FLS_ENV "lx2160ardb_vdd_mv" -#define CONFIG_VID -#define CONFIG_VOL_MONITOR_LTC3882_SET -#define CONFIG_VOL_MONITOR_LTC3882_READ - /* RTC */ #define CONFIG_SYS_RTC_BUS_NUM 4 diff --git a/include/configs/lx2162aqds.h b/include/configs/lx2162aqds.h index 67c469c0090d46cdfcfc952dc4360f32e22009a8..c2fa5794c8a158ce7b8a470eec92a163b2da8e77 100644 --- a/include/configs/lx2162aqds.h +++ b/include/configs/lx2162aqds.h @@ -12,12 +12,6 @@ #undef CONFIG_USB_MAX_CONTROLLER_COUNT #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -/* Voltage monitor on channel 2*/ -#define CONFIG_VID_FLS_ENV "lx2162aqds_vdd_mv" -#define CONFIG_VID -#define CONFIG_VOL_MONITOR_LTC3882_SET -#define CONFIG_VOL_MONITOR_LTC3882_READ - /* RTC */ #define CONFIG_SYS_RTC_BUS_NUM 0 diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index f94cf28b1353b63b497ee9fe8bb446751e49b43b..6eb5ec955b3bb6c3a00c473595601e342b06a0bd 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -11,8 +11,6 @@ #include -#define CONFIG_SYS_FSL_CLK - #define CONFIG_TIMESTAMP /* Print image info with timestamp */ /* @@ -112,7 +110,6 @@ /* * LCD */ -#define CONFIG_VIDEO_LOGO #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20) /* LVDS display */ @@ -128,7 +125,6 @@ * Boot Linux */ #define CONFIG_BOOTFILE "boot/fitImage" -#define CONFIG_BOOTCOMMAND "run mmc_mmc" /* * NAND SPL @@ -205,9 +201,4 @@ "fi ; " \ "fi\0" -#if defined(CONFIG_SPL_BUILD) -#undef CONFIG_WATCHDOG -#define CONFIG_HW_WATCHDOG -#endif - #endif /* __M53MENLO_CONFIG_H__ */ diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h index 84b998e23af804f7c97110b6a217c604d69e9749..b35ba59aba9973b6d99f61aff7340d68802e1d8f 100644 --- a/include/configs/medcom-wide.h +++ b/include/configs/medcom-wide.h @@ -19,7 +19,6 @@ #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* NAND support */ -#define CONFIG_TEGRA_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Environment in NAND, aligned to start of last sector */ diff --git a/include/configs/meson64.h b/include/configs/meson64.h index cb202d5555616849db543c7c782eeaa06e9da01f..44f2967fc6b3261596f0cb932ad11b31ba705964 100644 --- a/include/configs/meson64.h +++ b/include/configs/meson64.h @@ -29,7 +29,6 @@ #define STDIN_CFG "serial" #endif -#define CONFIG_CPU_ARMV8 #define CONFIG_REMAKE_ELF #define CONFIG_SYS_MAXARGS 32 #define CONFIG_SYS_CBSIZE 1024 diff --git a/include/configs/meson64_android.h b/include/configs/meson64_android.h index 7cd1ab034118ce9f8017cbf96fdcc2d8beb62362..0303d187dec2dc94ef5b107917888762660ed45f 100644 --- a/include/configs/meson64_android.h +++ b/include/configs/meson64_android.h @@ -23,6 +23,10 @@ #define CONTROL_PARTITION "misc" #endif +#ifndef EXTRA_ANDROID_ENV_SETTINGS +#define EXTRA_ANDROID_ENV_SETTINGS "" +#endif + #if defined(CONFIG_CMD_AVB) #define AVB_VERIFY_CHECK \ "if test \"${force_avb}\" -eq 1; then " \ @@ -100,6 +104,12 @@ "elif test $board_name = sei610; then " \ "echo \" Reading DTB for sei610...\"; " \ "setenv dtb_index 1;" \ + "elif test $board_name = vim3l; then " \ + "echo \" Reading DTB for vim3l...\"; " \ + "setenv dtb_index 2;" \ + "elif test $board_name = vim3; then " \ + "echo \" Reading DTB for vim3...\"; " \ + "setenv dtb_index 3;" \ "else " \ "echo Error: Android boot is not supported for $board_name; " \ "exit; " \ @@ -113,6 +123,12 @@ "elif test $board_name = sei610; then " \ "echo \" Reading DTBO for sei610...\"; " \ "setenv dtbo_index 1;" \ + "elif test $board_name = vim3l; then " \ + "echo \" Reading DTBO for vim3l...\"; " \ + "setenv dtbo_index 2;" \ + "elif test $board_name = vim3; then " \ + "echo \" Reading DTBO for vim3...\"; " \ + "setenv dtbo_index 3;" \ "else " \ "echo Error: Android boot is not supported for $board_name; " \ "exit; " \ @@ -264,6 +280,7 @@ "fi;" #define CONFIG_EXTRA_ENV_SETTINGS \ + EXTRA_ANDROID_ENV_SETTINGS \ "partitions=" PARTS_DEFAULT "\0" \ "mmcdev=2\0" \ ANDROIDBOOT_GET_CURRENT_SLOT_CMD \ diff --git a/include/configs/mt8183.h b/include/configs/mt8183.h index ebd2b326ade0ef87264cdd9801ae4647c178a6ad..2b4e976aa1fefe547b88a20ba7707451b00eb232 100644 --- a/include/configs/mt8183.h +++ b/include/configs/mt8183.h @@ -11,7 +11,6 @@ #include -#define CONFIG_CPU_ARMV8 #define COUNTER_FREQUENCY 13000000 #define CONFIG_SYS_NS16550_SERIAL diff --git a/include/configs/mt8512.h b/include/configs/mt8512.h index 8882a5a409703458f6dec262700770aa5cb97782..9c443db9f52d0f005d6a20fc48c3fa10501daaed 100644 --- a/include/configs/mt8512.h +++ b/include/configs/mt8512.h @@ -13,8 +13,6 @@ #define CONFIG_SYS_NONCACHED_MEMORY SZ_1M -#define CONFIG_CPU_ARMV8 - #define COUNTER_FREQUENCY 13000000 #define CONFIG_SYS_BOOTM_LEN SZ_64M diff --git a/include/configs/mt8516.h b/include/configs/mt8516.h index 12840b883decf091aae89126633dbc343bfdb698..47132c1db1d25b7c1ca7f965d594435b5844286e 100644 --- a/include/configs/mt8516.h +++ b/include/configs/mt8516.h @@ -11,7 +11,6 @@ #include -#define CONFIG_CPU_ARMV8 #define COUNTER_FREQUENCY 13000000 #define CONFIG_SYS_NS16550_SERIAL diff --git a/include/configs/mt8518.h b/include/configs/mt8518.h index 593c6a11d7420662d75a80162f08d316546ca2d9..49ee926b0c945c318b4975c041e443e93c982585 100644 --- a/include/configs/mt8518.h +++ b/include/configs/mt8518.h @@ -13,8 +13,6 @@ #define CONFIG_SYS_NONCACHED_MEMORY SZ_1M -#define CONFIG_CPU_ARMV8 - #define COUNTER_FREQUENCY 13000000 /* DRAM definition */ diff --git a/include/configs/mv-plug-common.h b/include/configs/mv-plug-common.h deleted file mode 100644 index d38d9872c006cd3911def960c2b459b3da28c484..0000000000000000000000000000000000000000 --- a/include/configs/mv-plug-common.h +++ /dev/null @@ -1,21 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2009-2015 - * Marvell Semiconductor - */ - -#ifndef _CONFIG_MARVELL_PLUG_H -#define _CONFIG_MARVELL_PLUG_H - -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_KW88F6281 1 /* SOC Name */ - -/* - * mv-common.h should be defined after CMD configs since it used them - * to enable certain macros - */ -#include "mv-common.h" - -#endif /* _CONFIG_MARVELL_PLUG_H */ diff --git a/include/configs/mx23_olinuxino.h b/include/configs/mx23_olinuxino.h index b0c78d3561cb9ffdd7a36683bb836408feb02248..370f0002120cd0e9f4fc97f3d00ef174400b204f 100644 --- a/include/configs/mx23_olinuxino.h +++ b/include/configs/mx23_olinuxino.h @@ -95,18 +95,6 @@ "bootm; " \ "fi;\0" -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loaduimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else run netboot; fi" - /* The rest of the configuration is shared */ #include diff --git a/include/configs/mx23evk.h b/include/configs/mx23evk.h index bccba5cbb174aba93e7bb65cd54afd353b4f5ba4..552bf5ac63052bd7257e9cfa5e51fed096f4757b 100644 --- a/include/configs/mx23evk.h +++ b/include/configs/mx23evk.h @@ -27,7 +27,6 @@ /* Framebuffer support */ #ifdef CONFIG_DM_VIDEO -#define CONFIG_VIDEO_LOGO #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (512 << 10) #endif @@ -78,19 +77,6 @@ "bootz; " \ "fi;\0" -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else " \ - "echo ERR: Fail to boot from MMC; " \ - "fi; " \ - "fi; " \ - "else exit; fi" - /* The rest of the configuration is shared */ #include diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index fe4ea8997d46cc344b8e92db4281968be07cc9e1..caad95b72717c9b931a2dcac3cb9d8e866d05e09 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -41,7 +41,6 @@ /* Framebuffer support */ #ifdef CONFIG_DM_VIDEO -#define CONFIG_VIDEO_LOGO #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (512 << 10) #endif @@ -196,18 +195,6 @@ "bootz; " \ "fi;\0" -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else run netboot; fi" - /* The rest of the configuration is shared */ #include diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 9cc297da30ed3649daf57a57f27a2a9ccbe4e83e..dc5891e74e9aff4717b811a5d17e2860a6d7e04a 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -12,8 +12,6 @@ /* High Level Configuration Options */ -#define CONFIG_SYS_FSL_CLK - #include /* @@ -45,7 +43,6 @@ #define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED /* Framebuffer and LCD */ -#define CONFIG_VIDEO_LOGO #define CONFIG_ETHPRIME "FEC0" @@ -108,18 +105,6 @@ "bootz; " \ "fi;\0" -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else run netboot; fi" - #define CONFIG_ARP_TIMEOUT 200UL /* diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h index f03e42529761cb288c16caa2a4aac3a84789828a..16c2241fd57e4ff3cfc1c3f88b768c8a634e0633 100644 --- a/include/configs/mx53cx9020.h +++ b/include/configs/mx53cx9020.h @@ -14,8 +14,6 @@ #include -#define CONFIG_SYS_FSL_CLK - #define CONFIG_MXC_UART_BASE UART2_BASE #define CONFIG_FPGA_COUNT 1 diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index b026c6ff89f2d5b903ef627af888c2b4bd3a2da5..92140df4be12c87f77c9fe2c8bb004403a5a7604 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -11,8 +11,6 @@ #include -#define CONFIG_SYS_FSL_CLK - #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configs */ @@ -93,18 +91,6 @@ "bootz; " \ "fi;\0" -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else run netboot; fi" - #define CONFIG_ARP_TIMEOUT 200UL /* Miscellaneous configurable options */ @@ -146,6 +132,5 @@ #endif /* Framebuffer and LCD */ -#define CONFIG_VIDEO_LOGO #endif /* __CONFIG_H */ diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index f8118818b016d344980a42ce83db9257ced79783..8f8dfe94ca9cded8dce6fafcf9e9857a909db2d1 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -11,8 +11,6 @@ #include -#define CONFIG_SYS_FSL_CLK - /* USB Configs */ #define CONFIG_MXC_USB_PORT 1 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) @@ -87,12 +85,6 @@ "video-mode=" \ "lcd:800x480-24@60,monitor=lcd\0" \ -#define MMCBOOTCOMMAND \ - "run doquiet; " \ - "run tryboot; " \ - -#define CONFIG_BOOTCOMMAND MMCBOOTCOMMAND - #define CONFIG_ARP_TIMEOUT 200UL /* Miscellaneous configurable options */ diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 0ae8305c592e5d86a8f573aa4622627883335943..5ff931ee3bc997a3678b0c9bed741488df017521 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -27,8 +27,6 @@ #include #include -#define CONFIG_SYS_FSL_CLK - /* Miscellaneous configurable options */ #define CONFIG_SYS_CBSIZE 512 #define CONFIG_SYS_MAXARGS 32 diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h index da2533637b03b250cb49a2fa2b07d21e8a1a0041..7d3e651f44dc1875d1ff6f43c17d73e97f92e63b 100644 --- a/include/configs/mx6cuboxi.h +++ b/include/configs/mx6cuboxi.h @@ -25,7 +25,6 @@ #endif /* Framebuffer */ -#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index 51f6b3ac462c4a31715ba13233664ca216ca1306..c1c012bbb535586b9c75cc2b6dcc5f112d3f5091 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -136,20 +136,6 @@ "echo WARNING: Could not determine dtb to use; fi; " \ "fi;\0" \ -#define CONFIG_BOOTCOMMAND \ - "run findfdt;" \ - "mmc dev ${mmcdev};" \ - "if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else run netboot; fi" - #define CONFIG_ARP_TIMEOUT 200UL /* Physical Memory Map */ @@ -167,7 +153,6 @@ /* Environment organization */ /* Framebuffer */ -#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index e8fd2126f7b4b3e28a9b081f16de6fd0a21b3dee..3da796d03a083b9a4b8f3a9678b894e32ab6a39b 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -81,19 +81,6 @@ "bootz; " \ "fi;\0" -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev};" \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else run netboot; fi" - /* Miscellaneous configurable options */ /* Physical Memory Map */ diff --git a/include/configs/mx6sllevk.h b/include/configs/mx6sllevk.h index f2bddd13bd039df816856d4848a0975d188561d5..0793028ba1fc233dfe154fae8f0e10c5cf8e2373 100644 --- a/include/configs/mx6sllevk.h +++ b/include/configs/mx6sllevk.h @@ -76,19 +76,6 @@ "bootz; " \ "fi;\0" -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev};" \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else run netboot; fi" - /* Miscellaneous configurable options */ /* Physical Memory Map */ diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h index 12b17839189625137f9e4231e057a550a63eedd1..953f0710b114f78cf115368f26d0645580c47298 100644 --- a/include/configs/mx6sxsabreauto.h +++ b/include/configs/mx6sxsabreauto.h @@ -73,19 +73,6 @@ "bootz; " \ "fi;\0" -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev};" \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else run netboot; fi" - /* Miscellaneous configurable options */ /* Physical Memory Map */ diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index a554011d75dcec4b5ed52e203d411d7f7362fd7b..8bc86749aac48c99c1095e74447be7e7d173aac2 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -107,19 +107,6 @@ "if test test $board_rev = REVA ; then " \ "setenv fdt_file imx6sx-sdb-reva.dtb; fi; " \ -#define CONFIG_BOOTCOMMAND \ - "run findfdt; " \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else run netboot; fi" - /* Miscellaneous configurable options */ /* Physical Memory Map */ @@ -161,7 +148,6 @@ #ifndef CONFIG_SPL_BUILD #ifdef CONFIG_DM_VIDEO -#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #define MXS_LCDIF_BASE MX6SX_LCDIF1_BASE_ADDR #endif diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index 0b777fbbdc09b2d6035fd00045bfea87fec7709f..c24578aff1c58be09a8e83c050e1921d5fb95842 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -33,8 +33,6 @@ #endif -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ @@ -48,7 +46,7 @@ "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ @@ -108,20 +106,6 @@ "echo WARNING: Could not determine dtb to use; fi; " \ "fi;\0" \ -#define CONFIG_BOOTCOMMAND \ - "run findfdt;" \ - "mmc dev ${mmcdev};" \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else run netboot; fi" - /* Miscellaneous configurable options */ /* Physical Memory Map */ @@ -165,7 +149,6 @@ #ifndef CONFIG_SPL_BUILD #if defined(CONFIG_DM_VIDEO) -#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR #endif diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h index e384d2a26962dbea5ec7a86695a64a8aa92e27a5..6bcca11c4c2f91e7eed78cd7477911fcca25adcf 100644 --- a/include/configs/mx6ullevk.h +++ b/include/configs/mx6ullevk.h @@ -30,8 +30,6 @@ #endif #endif -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ @@ -44,7 +42,7 @@ "ip_dyn=yes\0" \ "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ @@ -105,20 +103,6 @@ "bootz; " \ "fi;\0" \ -#define CONFIG_BOOTCOMMAND \ - "run findfdt;" \ - "mmc dev ${mmcdev};" \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else run netboot; fi" - /* Miscellaneous configurable options */ /* Physical Memory Map */ @@ -138,8 +122,6 @@ #define CONFIG_IOMUX_LPSR -#define CONFIG_SOFT_SPI - #ifdef CONFIG_CMD_NET #define CONFIG_FEC_ENET_DEV 1 #if (CONFIG_FEC_ENET_DEV == 0) diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index ffe8c758dd2609a5cfcdb7d2c1d1e11705d60a83..2e976df6985f233e03b927b0f5b45cf40eb54ac5 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -17,7 +17,6 @@ #define CONFIG_MXC_GPT_HCLK #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */ #define COUNTER_FREQUENCY CONFIG_SC_TIMER_CLK -#define CONFIG_SYS_FSL_CLK #define CONFIG_SYS_BOOTM_LEN 0x1000000 diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index f11e2e3f807f16537611e8f307fa70894cdb6a35..d5b38fd91dd90f01e57cb6e1624d15b197477223 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -17,8 +17,6 @@ /* MMC Config*/ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - #ifdef CONFIG_IMX_BOOTAUX /* Set to QSPI1 A flash at default */ #define CONFIG_SYS_AUXCORE_BOOTDATA 0x60000000 @@ -125,7 +123,6 @@ #define CONFIG_USBD_HS #ifdef CONFIG_DM_VIDEO -#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #endif diff --git a/include/configs/mx7ulp_com.h b/include/configs/mx7ulp_com.h index 58d48edac4326acb1ea9b589f719d9754e45a066..8c4d94215b905130b2e1a33589844fc6cc026e39 100644 --- a/include/configs/mx7ulp_com.h +++ b/include/configs/mx7ulp_com.h @@ -25,7 +25,6 @@ */ #define CONFIG_BOARD_SIZE_LIMIT 785408 #define CONFIG_MMCROOT "/dev/mmcblk0p2" -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 /* Using ULP WDOG for reset */ #define WDOG_BASE_ADDR WDG1_RBASE @@ -48,7 +47,7 @@ "fdt_file=imx7ulp-com.dtb\0" \ "fdt_addr=0x63000000\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=${mmcroot}\0" \ diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h index 4046c3fbf7326cb0d0df14770f09c31ea5834a5d..8f2cbc643eeca5dfe1f1ce448cd21abcdda052db 100644 --- a/include/configs/mx7ulp_evk.h +++ b/include/configs/mx7ulp_evk.h @@ -15,7 +15,6 @@ #define CONFIG_SYS_BOOTM_LEN 0x1000000 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 /* Using ULP WDOG for reset */ #define WDOG_BASE_ADDR WDG1_RBASE @@ -48,7 +47,7 @@ "earlycon=lpuart32,0x402D0010\0" \ "ip_dyn=yes\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ @@ -100,17 +99,6 @@ "bootz; " \ "fi;\0" \ -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "fi; " \ - "fi; " \ - "fi" - #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE SZ_256K diff --git a/include/configs/nas220.h b/include/configs/nas220.h index 99b14ba6218910d92e075fd35749bb7336a5de97..815f81f6493d9a4cc38f918cec5b86de46cfcde1 100644 --- a/include/configs/nas220.h +++ b/include/configs/nas220.h @@ -11,12 +11,6 @@ #ifndef _CONFIG_NAS220_H #define _CONFIG_NAS220_H -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_FEROCEON_88FR131 /* #define CPU Core subversion */ -#define CONFIG_KW88F6192 /* SOC Name */ - /* power-on led, regulator, sata0, sata1 */ #define NAS220_GE_OE_VAL_LOW ((1 << 12)|(1 << 14)|(1 << 24)|(1 << 28)) #define NAS220_GE_OE_VAL_HIGH (0) @@ -40,7 +34,6 @@ /* * Default environment variables */ -#define CONFIG_BOOTCOMMAND "" #define CONFIG_EXTRA_ENV_SETTINGS \ "bootargs=console=ttyS0,115200\0" \ @@ -60,16 +53,8 @@ #define CONFIG_PHY_BASE_ADR 8 #endif /* CONFIG_CMD_NET */ -/* - * File system - */ -#define CONFIG_JFFS2_NAND -#define CONFIG_JFFS2_LZO - /* * EFI partition */ -#define CONFIG_KIRKWOOD_GPIO - #endif /* _CONFIG_NAS220_H */ diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index b37e05406e92a4b5eb8c24fe72baabd9ca8a2ab9..adfc055a2c9e0c09e8742e26387f61d93f64e25f 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -21,7 +21,6 @@ /* * High Level Configuration Options */ -#define CONFIG_SYS_L2CACHE_OFF /* pretend there is no L2 CACHE */ #include /* get chip and board defs */ #include @@ -75,7 +74,6 @@ * Framebuffer */ /* Video console */ -#define CONFIG_VIDEO_LOGO #define VIDEO_FB_16BPP_PIXEL_SWAP #define VIDEO_FB_16BPP_WORD_SWAP @@ -168,12 +166,6 @@ int rx51_kp_getc(struct stdio_dev *sdev); "echo run attachboot - Boot attached kernel image.;" \ "echo" -#define CONFIG_BOOTCOMMAND \ - "run sdboot;" \ - "run emmcboot;" \ - "run attachboot;" \ - "echo" - /* * OMAP3 has 12 GP timers, they can be driven by the system clock * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). diff --git a/include/configs/novena.h b/include/configs/novena.h index 28fb1b8d7531c6499ce1e057686be24a7d04600d..1ce2f4e56223d7248c3446ae512ff2c59fd4a53c 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -9,7 +9,6 @@ #define __CONFIG_H /* System configurations */ -#define CONFIG_KEYBOARD #include "mx6_common.h" @@ -87,7 +86,6 @@ #endif /* Video output */ -#define CONFIG_VIDEO_LOGO #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP diff --git a/include/configs/nsa310s.h b/include/configs/nsa310s.h index 950549c31ca455df93554390513299e71079a3d7..8cc9ca6a49d10aea95adda560ef3469579a105cb 100644 --- a/include/configs/nsa310s.h +++ b/include/configs/nsa310s.h @@ -9,25 +9,11 @@ #ifndef _CONFIG_NSA310S_H #define _CONFIG_NSA310S_H -/* high level configuration options */ -#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ -#define CONFIG_KW88F6192 1 /* SOC Name */ -#define CONFIG_KW88F6702 1 /* SOC Name */ - #include "mv-common.h" /* environment variables configuration */ /* default environment variables */ -#define CONFIG_BOOTCOMMAND \ - "setenv bootargs ${console} ${mtdparts} ${bootargs_root}; " \ - "ubi part root; " \ - "ubifsmount ubi:rootfs; " \ - "ubifsload 0x800000 ${kernel}; " \ - "ubifsload 0x700000 ${fdt}; " \ - "ubifsumount; " \ - "fdt addr 0x700000; fdt resize; fdt chosen; " \ - "bootz 0x800000 - 0x700000" #define CONFIG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ @@ -50,9 +36,4 @@ #define CONFIG_LBA48 #endif /* CONFIG_SATA */ -/* RTC driver configuration */ -#ifdef CONFIG_CMD_DATE -#define CONFIG_RTC_MV -#endif /* CONFIG_CMD_DATE */ - #endif /* _CONFIG_NSA310S_H */ diff --git a/include/configs/octeontx2_common.h b/include/configs/octeontx2_common.h index bc21b795cf6bc99e5a12bf072995b6045404b277..536dff2bdfd0e8f6aef4f47d8a50981a08823ef5 100644 --- a/include/configs/octeontx2_common.h +++ b/include/configs/octeontx2_common.h @@ -7,8 +7,6 @@ #ifndef __OCTEONTX2_COMMON_H__ #define __OCTEONTX2_COMMON_H__ -#define CONFIG_SUPPORT_RAW_INITRD - /** Maximum size of image supported for bootm (and bootable FIT images) */ #define CONFIG_SYS_BOOTM_LEN (256 << 20) @@ -43,7 +41,6 @@ #if defined(CONFIG_MMC_OCTEONTX) #define MMC_SUPPORTS_TUNING /** EMMC specific defines */ -#define CONFIG_SUPPORT_EMMC_RPMB #endif #endif /* __OCTEONTX2_COMMON_H__ */ diff --git a/include/configs/octeontx_common.h b/include/configs/octeontx_common.h index 46908be32a393664ef9acf7577a4e795cf03c0d5..8185f4b6250f71b69976eb3b6346cc0974cc4b6f 100644 --- a/include/configs/octeontx_common.h +++ b/include/configs/octeontx_common.h @@ -61,12 +61,6 @@ # define CONFIG_SYS_64BIT_LBA #endif -/***** SPI Defines *********/ -#ifdef CONFIG_DM_SPI_FLASH -# define CONFIG_SF_DEFAULT_BUS 0 -# define CONFIG_SF_DEFAULT_CS 0 -#endif - /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 /** Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE @@ -76,9 +70,6 @@ #define CONFIG_SYS_MMC_MAX_BLK_COUNT 8192 /** EMMC specific defines */ -#if defined(CONFIG_MMC_OCTEONTX) -#define CONFIG_SUPPORT_EMMC_RPMB -#endif #if defined(CONFIG_NAND_OCTEONTX) /*#define CONFIG_MTD_CONCAT */ diff --git a/include/configs/odroid.h b/include/configs/odroid.h index 281922af4a8de35a579690a72553c93e2c2405d7..ed9b41d179d022050ca11d821e3c4575291eade0 100644 --- a/include/configs/odroid.h +++ b/include/configs/odroid.h @@ -13,7 +13,6 @@ #include -#define CONFIG_SYS_L2CACHE_OFF #ifndef CONFIG_SYS_L2CACHE_OFF #define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE 0x10502000 @@ -28,8 +27,6 @@ #include -#define CONFIG_BOOTCOMMAND "run distro_bootcmd ; run autoboot" - #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ - GENERATED_GBL_DATA_SIZE) diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index 70481b5d0c8c2485720f973035daa25749bb4cb3..a4825982a898c0c8d1de6b9ae4f191a2be5a0c44 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -80,8 +80,6 @@ * Need to override existing one (smdk5420) with odroid so set_board_info will * use proper prefix when creating full board_name (SYS_BOARD + type) */ -#undef CONFIG_SYS_BOARD -#define CONFIG_SYS_BOARD "odroid" /* Define new extra env settings, including DFU settings */ #undef CONFIG_EXTRA_ENV_SETTINGS diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index e71f7371d8c00f973e809f5f42aaf91d56bcd605..211f39a0facd98e8b45a217d63aa77ba01c82773 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -142,9 +142,6 @@ "nandboot=run nandbootcommon; "\ "bootm ${loadaddr} - ${fdtaddr}\0"\ -#define CONFIG_BOOTCOMMAND \ - "run autoboot" - /* Miscellaneous configurable options */ /* memtest works on */ diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index f2352d8216167460b64be541fa4998b44880fccd..45297b9a612aff2a32c9bf2ef257eeb58c2bcf1d 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -17,7 +17,6 @@ /* * SoC Configuration */ -#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) #define CONFIG_SYS_OSCIN_FREQ 24000000 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) @@ -161,9 +160,6 @@ * Linux Information */ #define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) -#define CONFIG_BOOTCOMMAND \ - "run envboot; " \ - "run mmcboot; " #define DEFAULT_LINUX_BOOT_ENV \ "loadaddr=0xc0700000\0" \ diff --git a/include/configs/openpiton-riscv64.h b/include/configs/openpiton-riscv64.h index c9d966fff6761458897ebad73e367c0e6897a2bf..75b48f880affe8edd87e5e7440184f57694fab44 100644 --- a/include/configs/openpiton-riscv64.h +++ b/include/configs/openpiton-riscv64.h @@ -43,11 +43,4 @@ "mmcdev=0\0" \ "mmcpart=1\0" -#define CONFIG_USE_BOOTCOMMAND -#define CONFIG_BOOTCOMMAND \ - "fdt addr ${fdtcontroladdr}; " \ - "fdt move ${fdtcontroladdr} ${fdt_addr_r}; " \ - "load mmc ${mmcdev}:${mmcpart} ${kernel_addr_r} ${image}; " \ - "booti ${kernel_addr_r} - ${fdt_addr_r}; " - #endif/* __CONFIG_H */ diff --git a/include/configs/openrd.h b/include/configs/openrd.h index 56bfe8747ef8e6df45da3e3a526db722fbc2f556..43d089657b11fbe1e3163922fe8a5389a5240524 100644 --- a/include/configs/openrd.h +++ b/include/configs/openrd.h @@ -13,12 +13,6 @@ #ifndef _CONFIG_OPENRD_H #define _CONFIG_OPENRD_H -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */ -#define CONFIG_KW88F6281 1 /* SOC Name */ - #include "mv-common.h" /* @@ -37,9 +31,6 @@ /* * Default environment variables */ -#define CONFIG_BOOTCOMMAND "${x_bootcmd_kernel}; " \ - "setenv bootargs ${x_bootargs} ${x_bootargs_root}; " \ - "${x_bootcmd_usb}; bootm 0x6400000;" #define CONFIG_EXTRA_ENV_SETTINGS "x_bootargs=console=ttyS0,115200 " \ CONFIG_MTDPARTS_DEFAULT " rw ubi.mtd=2,2048\0" \ diff --git a/include/configs/opos6uldev.h b/include/configs/opos6uldev.h index d9311a493508a3c1e372c7e1426cbf12e7b5610e..ac8eb0527569d1f2007a2f9c8a792f37a81f9204 100644 --- a/include/configs/opos6uldev.h +++ b/include/configs/opos6uldev.h @@ -41,7 +41,6 @@ /* LCD */ #ifndef CONFIG_SPL_BUILD #ifdef CONFIG_DM_VIDEO -#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR #endif @@ -54,7 +53,6 @@ #define ACFG_CONSOLE_DEV ttymxc0 #define CONFIG_SYS_AUTOLOAD "no" #define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root" -#define CONFIG_BOOTCOMMAND "run emmcboot" #define CONFIG_EXTRA_ENV_SETTINGS \ "env_version=" __stringify(CONFIG_ENV_VERSION) "\0" \ diff --git a/include/configs/origen.h b/include/configs/origen.h index 881df2d3b0b7227feb5ae4f2759509e646715c19..1caeed6ba5cd862a4d3b1ea58a1ee9d116329eb7 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -45,22 +45,6 @@ "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \ "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ "source ${loadaddr}\0" -#define CONFIG_BOOTCOMMAND \ - "if mmc rescan; then " \ - "echo SD/MMC found on device ${mmcdev};" \ - "if run loadbootenv; then " \ - "echo Loaded environment from ${bootenv};" \ - "run importbootenv;" \ - "fi;" \ - "if test -n $uenvcmd; then " \ - "echo Running uenvcmd ...;" \ - "run uenvcmd;" \ - "fi;" \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "fi; " \ - "fi;" \ - "load mmc ${mmcdev} ${loadaddr} uImage; bootm ${loadaddr} " #define CONFIG_CLK_1000_400_200 diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 6b4fc398a816a18453edfb1865de079c181e6301..2e1331b9b075b33cfb9af994bf9e0c04d2cdf479 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -102,12 +102,10 @@ #define CONFIG_SPL_NAND_INIT #define CONFIG_SPL_COMMON_INIT_DDR #define CONFIG_SPL_MAX_SIZE (128 << 10) -#define CONFIG_TPL_TEXT_BASE 0xf8f81000 #define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_NAND_U_BOOT_SIZE (832 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000) #define CONFIG_SYS_NAND_U_BOOT_START (0x11000000) -#define CONFIG_SYS_NAND_U_BOOT_OFFS ((128 + 128) << 10) #elif defined(CONFIG_SPL_BUILD) #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE @@ -116,7 +114,6 @@ #define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0xf8f80000 #define CONFIG_SYS_NAND_U_BOOT_START 0xf8f80000 -#define CONFIG_SYS_NAND_U_BOOT_OFFS (128 << 10) #endif /* not CONFIG_TPL_BUILD */ #define CONFIG_SPL_PAD_TO 0x20000 @@ -130,7 +127,7 @@ #ifndef CONFIG_SYS_MONITOR_BASE #ifdef CONFIG_TPL_BUILD -#define CONFIG_SYS_MONITOR_BASE CONFIG_TPL_TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE 0xf8f81000 #elif defined(CONFIG_SPL_BUILD) #define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE #else @@ -140,17 +137,10 @@ #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ -#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ #define CONFIG_SYS_SATA_MAX_DEVICE 2 #define CONFIG_LBA48 -#if defined(CONFIG_TARGET_P2020RDB) -#define CONFIG_SYS_CLK_FREQ 100000000 -#else -#define CONFIG_SYS_CLK_FREQ 66666666 -#endif - #define CONFIG_HWCONFIG /* * These can be toggled for performance analysis, otherwise use default. @@ -352,22 +342,6 @@ OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \ OR_GPCM_EAD) -#ifdef CONFIG_MTD_RAW_NAND -#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */ -#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ -#define CONFIG_SYS_BR1_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ -#define CONFIG_SYS_OR1_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */ -#else -#define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ -#define CONFIG_SYS_OR0_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */ -#ifdef CONFIG_NAND_FSL_ELBC -#define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */ -#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ -#endif -#endif -#define CONFIG_SYS_BR3_PRELIM CONFIG_CPLD_BR_PRELIM /* CPLD Base Address */ -#define CONFIG_SYS_OR3_PRELIM CONFIG_CPLD_OR_PRELIM /* CPLD Options */ - /* Vsc7385 switch */ #ifdef CONFIG_VSC7385_ENET #define __VSCFW_ADDR "vscfw_addr=ef000000" @@ -385,9 +359,6 @@ OR_GPCM_XACS | OR_GPCM_SCY_15 | OR_GPCM_SETA | \ OR_GPCM_TRLX | OR_GPCM_EHTR | OR_GPCM_EAD) -#define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_VSC7385_BR_PRELIM -#define CONFIG_SYS_OR2_PRELIM CONFIG_SYS_VSC7385_OR_PRELIM - /* The size of the VSC7385 firmware image */ #define CONFIG_VSC7385_IMAGE_SIZE 8192 #endif @@ -553,7 +524,6 @@ #if defined(CONFIG_HAS_FSL_DR_USB) #ifdef CONFIG_USB_EHCI_HCD #define CONFIG_EHCI_HCD_INIT_AFTER_RESET -#define CONFIG_USB_EHCI_FSL #endif #endif @@ -565,8 +535,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #endif -#undef CONFIG_WATCHDOG /* watchdog disabled */ - /* * Miscellaneous configurable options */ @@ -646,23 +614,6 @@ __stringify(__SD_RST_CMD)"\0" \ __stringify(__NAND_RST_CMD)"\0" \ __stringify(__PCIE_RST_CMD)"\0" -#define NFSBOOTCOMMAND \ -"setenv bootargs root=/dev/nfs rw " \ -"nfsroot=$serverip:$rootpath " \ -"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ -"console=$consoledev,$baudrate $othbootargs;" \ -"tftp $loadaddr $bootfile;" \ -"tftp $fdtaddr $fdtfile;" \ -"bootm $loadaddr - $fdtaddr" - -#define HDBOOT \ -"setenv bootargs root=/dev/$bdev rw rootdelay=30 " \ -"console=$consoledev,$baudrate $othbootargs;" \ -"usb start;" \ -"ext2load usb 0:1 $loadaddr /boot/$bootfile;" \ -"ext2load usb 0:1 $fdtaddr /boot/$fdtfile;" \ -"bootm $loadaddr - $fdtaddr" - #define CONFIG_USB_FAT_BOOT \ "setenv bootargs root=/dev/ram rw " \ "console=$consoledev,$baudrate $othbootargs " \ @@ -688,15 +639,4 @@ __stringify(__PCIE_RST_CMD)"\0" "console=$consoledev,$baudrate rootfstype=jffs2 $othbootargs;" \ "bootm $norbootaddr - $norfdtaddr" -#define RAMBOOTCOMMAND \ -"setenv bootargs root=/dev/ram rw " \ -"console=$consoledev,$baudrate $othbootargs " \ -"ramdisk_size=$ramdisk_size;" \ -"tftp $ramdiskaddr $ramdiskfile;" \ -"tftp $loadaddr $bootfile;" \ -"tftp $fdtaddr $fdtfile;" \ -"bootm $loadaddr $ramdiskaddr $fdtaddr" - -#define CONFIG_BOOTCOMMAND HDBOOT - #endif /* __CONFIG_H */ diff --git a/include/configs/p3450-0000.h b/include/configs/p3450-0000.h index 7f05bebbcd7acf91860ab8ca61a3a78b8a322c23..b03d3a433b7edf1eefd7ff170af25ecebe7fb212 100644 --- a/include/configs/p3450-0000.h +++ b/include/configs/p3450-0000.h @@ -24,12 +24,8 @@ func(DHCP, dhcp, na) /* Environment at end of QSPI, in the VER partition */ -#define CONFIG_ENV_SPI_MAX_HZ 48000000 -#define CONFIG_ENV_SPI_MODE SPI_MODE_0 #define CONFIG_SPI_FLASH_SIZE (4 << 20) -#define CONFIG_PREBOOT - #define BOARD_EXTRA_ENV_SETTINGS \ "preboot=if test -e mmc 1:1 /u-boot-preboot.scr; then " \ "load mmc 1:1 ${scriptaddr} /u-boot-preboot.scr; " \ diff --git a/include/configs/pcl063_ull.h b/include/configs/pcl063_ull.h index 0e047dfa43a879027ce27a87c177a6ca0da3438c..068fc7db347fc01f2e8cc11ca3a065f41eaacff7 100644 --- a/include/configs/pcl063_ull.h +++ b/include/configs/pcl063_ull.h @@ -83,8 +83,6 @@ "fit_addr=0x82000000\0" \ ENV_MMC -#define CONFIG_BOOTCOMMAND "run mmc_mmc_fit" - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(MMC, mmc, 1) \ diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h index 244d373843c1afc3873f8247afe55daca8f40edc..fd4a0b1aa863bd829ae4d73ed2abb6c301d2e158 100644 --- a/include/configs/pcm052.h +++ b/include/configs/pcm052.h @@ -25,12 +25,6 @@ #define PCM052_EXTRA_ENV_SETTINGS #endif -/* if no target-specific boot command was defined by the target, - define an empty one */ -#ifndef PCM052_BOOTCOMMAND -#define PCM052_BOOTCOMMAND -#endif - /* if no target-specific extra environment settings were defined by the target, define an empty one */ #ifndef PCM052_NET_INIT @@ -38,7 +32,6 @@ #endif /* boot command, including the target-defined one if any */ -#define CONFIG_BOOTCOMMAND PCM052_BOOTCOMMAND "run bootcmd_nand" /* Extra env settings (including the target-defined ones if any) */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/pcm058.h b/include/configs/pcm058.h index a0bb2b505056f9a35cff9b100925125ef32aeced..4d4185b466872f91663dbbac29d5a0e1d0400d86 100644 --- a/include/configs/pcm058.h +++ b/include/configs/pcm058.h @@ -56,6 +56,4 @@ "optargs=rw rootwait\0" \ ENV_MMC \ ENV_NAND - -#define CONFIG_BOOTCOMMAND "run mmcboot;run nandboot" #endif diff --git a/include/configs/pdu001.h b/include/configs/pdu001.h index 3d18747f9b65c2d05b9900f4b64e51079aea99cf..7ab6a896040f708f7a42c29855fdb73ed7c28dd2 100644 --- a/include/configs/pdu001.h +++ b/include/configs/pdu001.h @@ -32,19 +32,6 @@ #define CONSOLE_DEV "ttyO5" #endif -#define CONFIG_BOOTCOMMAND \ - "run eval_boot_device;" \ - "part uuid mmc ${mmc_boot}:${root_fs_partition} root_fs_partuuid;" \ - "setenv bootargs console=${console} " \ - "vt.global_cursor_default=0 " \ - "root=PARTUUID=${root_fs_partuuid} " \ - "rootfstype=ext4 " \ - "rootwait " \ - "rootdelay=1;" \ - "fatload mmc ${mmc_boot} ${fdtaddr} ${fdtfile};" \ - "fatload mmc ${mmc_boot} ${loadaddr} ${bootfile};" \ - "bootz ${loadaddr} - ${fdtaddr}" - #ifndef CONFIG_SPL_BUILD #define CONFIG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h index 38c8a836170fc7e1c1a9100014a3e3e3b0fcaf3c..7438d0a4647d94755804322e332312044ef31cab 100644 --- a/include/configs/phycore_imx8mm.h +++ b/include/configs/phycore_imx8mm.h @@ -14,8 +14,6 @@ #define CONFIG_SYS_BOOTM_LEN SZ_64M #define CONFIG_SPL_MAX_SIZE (148 * SZ_1K) #define CONFIG_SYS_MONITOR_LEN SZ_512K -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) @@ -39,7 +37,7 @@ "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ "ip_dyn=yes\0" \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=2\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console} " \ @@ -70,14 +68,6 @@ "echo WARN: Cannot load the DT; " \ "fi;\0" \ -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi;" - /* Link Definitions */ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 @@ -105,6 +95,5 @@ /* USDHC */ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #endif /* __PHYCORE_IMX8MM_H */ diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h index fcd5896a97bdabe7343be91583e31a17547c28cf..8c5ffeef544eca662db8681bbc098251e6a11627 100644 --- a/include/configs/phycore_imx8mp.h +++ b/include/configs/phycore_imx8mp.h @@ -14,8 +14,6 @@ #define CONFIG_SPL_MAX_SIZE (152 * SZ_1K) #define CONFIG_SYS_MONITOR_LEN SZ_512K -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) @@ -39,7 +37,7 @@ "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ "ip_dyn=yes\0" \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=2\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console} " \ @@ -70,14 +68,6 @@ "echo WARN: Cannot load the DT; " \ "fi;\0" \ -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi;" - /* Link Definitions */ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 @@ -105,6 +95,5 @@ /* USDHC */ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #endif /* __PHYCORE_IMX8MP_H */ diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h index a83e49ff3ba91f4b226d2ea2ef3e992f63798f23..3624c122fcdb0f2ab5d1e91ba72b613eeed18ea6 100644 --- a/include/configs/pic32mzdask.h +++ b/include/configs/pic32mzdask.h @@ -33,9 +33,6 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) -#define CONFIG_SYS_ENV_ADDR 0x88300000 -#define CONFIG_SYS_FDT_ADDR 0x89d00000 - /* Memory Test */ /*---------------------------------------------------------------------- @@ -74,8 +71,8 @@ #define MEM_LAYOUT_ENV_SETTINGS \ "kernel_addr_r="__stringify(CONFIG_SYS_LOAD_ADDR)"\0" \ - "fdt_addr_r="__stringify(CONFIG_SYS_FDT_ADDR)"\0" \ - "scriptaddr="__stringify(CONFIG_SYS_ENV_ADDR)"\0" + "fdt_addr_r=0x89d00000\0" \ + "scriptaddr=0x88300000\0" \ #define CONFIG_LEGACY_BOOTCMD_ENV \ "legacy_bootcmd= " \ @@ -99,7 +96,4 @@ CONFIG_LEGACY_BOOTCMD_ENV \ BOOTENV -#undef CONFIG_BOOTCOMMAND -#define CONFIG_BOOTCOMMAND "run distro_bootcmd || run legacy_bootcmd" - #endif /* __PIC32MZDASK_CONFIG_H */ diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h index 2528d319d1f5f9c52a4b2b496ba5b567efb65479..19955623b7ffa57b15e1e12bdc51620850d89b65 100644 --- a/include/configs/pico-imx6.h +++ b/include/configs/pico-imx6.h @@ -136,7 +136,6 @@ #define CONFIG_FEC_MXC_PHYADDR 1 /* Framebuffer */ -#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index 3fe178316f7bec45a357d71fb55ff55d49cc486f..03e48011dc2be8f2a33bed03594829545545516e 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -64,8 +64,6 @@ "bootmenu_2=Boot using PICO-Pi baseboard=" \ "setenv fdtfile imx6ul-pico-pi.dtb\0" \ -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ @@ -133,7 +131,6 @@ #define CONFIG_BOARD_SIZE_LIMIT 715776 #ifdef CONFIG_DM_VIDEO -#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR #endif diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index cbac950549231fce6717d0e82525e98e23e41a98..8c0b8c07a8e3c22899766413c2706ae815c5316b 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -65,9 +65,6 @@ BOOTENV #endif - -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - #define CONFIG_EXTRA_ENV_SETTINGS \ "image=zImage\0" \ "splashpos=m,m\0" \ @@ -124,7 +121,6 @@ #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 #ifdef CONFIG_DM_VIDEO -#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #endif diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index 5c1b65207e095fb8596a7bb6adc57fc70cf6bd8c..2293a2919e28a89c6c13c70cb2f57a13668e8edd 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -11,8 +11,6 @@ #define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ @@ -56,7 +54,7 @@ "initrd_addr=0x43800000\0" \ "initrd_high=0xffffffffffffffff\0" \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \ @@ -82,18 +80,6 @@ "${get_cmd} ${loadaddr} ${image}; " \ "booti; " -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else booti ${loadaddr} - ${fdt_addr}; fi" - /* Link Definitions */ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 @@ -109,10 +95,6 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2 GiB DDR */ -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ - (PHYS_SDRAM_SIZE >> 1)) - #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR /* Monitor Command Prompt */ @@ -125,12 +107,6 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - -#define CONFIG_MXC_GPIO - -#define CONFIG_OF_SYSTEM_SETUP - #define CONFIG_SYS_BOOTM_LEN SZ_128M #endif diff --git a/include/configs/plutux.h b/include/configs/plutux.h index 7fc06e8326bbb5e9e900e4ac91a2bfd6fb7f2d1f..9a4a632a521d315728739c411c599768ecaf74ce 100644 --- a/include/configs/plutux.h +++ b/include/configs/plutux.h @@ -19,7 +19,6 @@ #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* NAND support */ -#define CONFIG_TEGRA_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Environment in NAND, aligned to start of last sector */ diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index d5301071166627a05099e35c05dae3bbdff4405b..be24d82538968f46692b5533d7102f5c6ce14ca6 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -179,14 +179,10 @@ #ifdef CONFIG_SYS_USE_DATAFLASH_CS0 /* bootstrap + u-boot + env + linux in dataflash on CS0 */ -#define CONFIG_BOOTCOMMAND "sf probe 0; " \ - "sf read 0x22000000 0x84000 0x210000; " \ - "bootm 0x22000000" #elif defined(CONFIG_SYS_USE_NANDFLASH) /* CONFIG_SYS_USE_NANDFLASH */ /* bootstrap + u-boot + env + linux in nandflash */ -#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" #elif defined (CONFIG_SYS_USE_FLASH) /* JFFS Partition offset set */ @@ -196,8 +192,6 @@ /* 512k reserved for u-boot */ #define CONFIG_SYS_JFFS2_FIRST_SECTOR 11 -#define CONFIG_BOOTCOMMAND "run flashboot" - #define CONFIG_CON_ROT "fbcon=rotate:3 " #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index 80899930b29c8b040659821b98cc633e38ae73f0..e9eb736ecb1a055edefb390a9f7758254bef5dd2 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -179,11 +179,6 @@ #endif -#define CONFIG_JFFS2_NAND 1 -#define CONFIG_JFFS2_DEV "nand0" /* NAND device jffs2 lives on */ -#define CONFIG_JFFS2_PART_OFFSET 0 /* start of jffs2 partition */ -#define CONFIG_JFFS2_PART_SIZE (256 * 1024 * 1024) /* partition size*/ - /* PSRAM */ #define PHYS_PSRAM 0x70000000 #define PHYS_PSRAM_SIZE 0x00400000 /* 4MB */ @@ -209,14 +204,10 @@ #ifdef CONFIG_SYS_USE_DATAFLASH /* bootstrap + u-boot + env + linux in dataflash on CS0 */ -#define CONFIG_BOOTCOMMAND "sf probe 0; " \ - "sf read 0x22000000 0x84000 0x294000; " \ - "bootm 0x22000000" #elif defined(CONFIG_SYS_USE_NANDFLASH) /* CFG_USE_NANDFLASH */ /* bootstrap + u-boot + env + linux in nandflash */ -#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" #elif defined(CONFIG_SYS_USE_FLASH) /* CFG_USE_FLASH */ /* JFFS Partition offset set */ @@ -226,7 +217,6 @@ /* 512k reserved for u-boot */ #define CONFIG_SYS_JFFS2_FIRST_SECTOR 11 -#define CONFIG_BOOTCOMMAND "run flashboot" #define CONFIG_ROOTPATH "/ronetix/rootfs" #define CONFIG_CON_ROT "fbcon=rotate:3 " diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index 3d039b60a869ddca2bc80d2b88bc71d446e04d8a..b20539164211338b09b9dd5aaccd8a74ebc473f9 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -45,7 +45,6 @@ #define CONFIG_SYS_NAND_MASK_CLE BIT(22) #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD3 -#define CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT #endif /* Ethernet */ @@ -54,16 +53,8 @@ #ifdef CONFIG_NAND_BOOT /* bootstrap + u-boot + env in nandflash */ - -#define CONFIG_BOOTCOMMAND \ - "nand read 0x70000000 0x200000 0x300000;" \ - "bootm 0x70000000" #elif CONFIG_SD_BOOT /* bootstrap + u-boot + env + linux in mmc */ - -#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x71000000 dtb; " \ - "fatload mmc 0:1 0x72000000 zImage; " \ - "bootz 0x72000000 - 0x71000000" #endif /* Defines for SPL */ diff --git a/include/configs/pogo_e02.h b/include/configs/pogo_e02.h index f49bcfb6a2188285c2b6b0276a66e301cd7dd9f6..3e94125cb35f1d47960a2b0f25078c7f2d9611be 100644 --- a/include/configs/pogo_e02.h +++ b/include/configs/pogo_e02.h @@ -12,12 +12,6 @@ #ifndef _CONFIG_POGO_E02_H #define _CONFIG_POGO_E02_H -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ -#define CONFIG_KW88F6281 /* SOC Name */ - #include "mv-common.h" /* @@ -27,10 +21,6 @@ /* * Default environment variables */ -#define CONFIG_BOOTCOMMAND \ - "setenv bootargs $(bootargs_console); " \ - "run bootcmd_usb; " \ - "bootm 0x00800000 0x01100000" #define CONFIG_EXTRA_ENV_SETTINGS \ "mtdparts=mtdparts=orion_nand:1M(u-boot),4M(uImage)," \ diff --git a/include/configs/porter.h b/include/configs/porter.h index 7ffcf5fc38aec477098184210322cef30d5355f2..867dadaedd031a93838f91f759b01fb93814eb0b 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -35,8 +35,6 @@ #define CONFIG_BITBANGMII_MULTI /* Board Clock */ -#define RMOBILE_XTAL_CLK 20000000u -#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h index 3df51437ca24f0985809980862399baf7ca79410..928ccb1e18a04016585ef7523478b526bad7627f 100644 --- a/include/configs/presidio_asic.h +++ b/include/configs/presidio_asic.h @@ -10,8 +10,6 @@ #define CONFIG_REMAKE_ELF -#define CONFIG_SUPPORT_RAW_INITRD - #define CONFIG_SYS_INIT_SP_ADDR 0x00100000 #define CONFIG_SYS_BOOTM_LEN 0x00c00000 diff --git a/include/configs/pxm2.h b/include/configs/pxm2.h index a333326dff6c96993ccda8525fbfbc26aaecdd9c..753fc14ce0ed5622237b560226b7ab012e81d066 100644 --- a/include/configs/pxm2.h +++ b/include/configs/pxm2.h @@ -71,44 +71,11 @@ #ifndef CONFIG_RESTORE_FLASH /* set to negative value for no autoboot */ - -#define CONFIG_BOOTCOMMAND \ - "if dfubutton; then " \ - "run dfu_start; " \ - "reset; " \ - "fi; " \ - "if mmc rescan; then " \ - "echo SD/MMC found on device ${mmc_dev};" \ - "if run loadbootenv; then " \ - "echo Loaded environment from ${bootenv};" \ - "run importbootenv;" \ - "fi;" \ - "if test -n $uenvcmd; then " \ - "echo Running uenvcmd ...;" \ - "run uenvcmd;" \ - "fi;" \ - "if run mmc_load_uimage; then " \ - "run mmc_args;" \ - "bootm ${kloadaddr};" \ - "fi;" \ - "fi;" \ - "run nand_boot;" \ - "reset;" - -#else - -#define CONFIG_BOOTCOMMAND \ - "setenv autoload no; " \ - "dhcp; " \ - "if tftp 80000000 debrick.scr; then " \ - "source 80000000; " \ - "fi" #endif #endif /* CONFIG_SPL_BUILD */ #if defined(CONFIG_VIDEO) #define CONFIG_VIDEO_DA8XX -#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #define DA8XX_LCD_CNTL_BASE LCD_CNTL_BASE #define PWM_TICKS 0x1388 diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index f79e0fea4d5561feb1526cb0e84eaaaa3e9298a8..e257c0ec1f4da3407d88bae99110adfe5416b049 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -13,8 +13,6 @@ #define CONFIG_SYS_RAMBOOT -#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ - #define CONFIG_ENABLE_36BIT_PHYS /* Needed to fill the ccsrbar pointer */ @@ -47,8 +45,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); #define CONFIG_CHIP_SELECTS_PER_CTRL 0 -#define CONFIG_SYS_CLK_FREQ 33000000 - #define CONFIG_SYS_BOOT_BLOCK 0x00000000 /* boot TLB */ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE @@ -100,7 +96,4 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); #define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/ -#define CONFIG_BOOTCOMMAND \ - "test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $fdtcontroladdr\0" - #endif /* __QEMU_PPCE500_H */ diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index 58ca6c28b53f58953a95ed9e9160fa263dd42f52..8e86830e61be0a7a4211ae21fb35e63429809e7b 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -1,7 +1,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_CPU_SH7751 1 #define __LITTLE_ENDIAN__ 1 /* SCIF */ @@ -29,7 +28,6 @@ /* * SuperH Clock setting */ -#define CONFIG_SYS_CLK_FREQ 60000000 #define CONFIG_SYS_PLL_SETTLING_TIME 100/* in us */ /* @@ -44,7 +42,6 @@ #define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */ #define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */ #define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */ -#define CONFIG_IDE_SWAP_IO /* * SuperH PCI Bridge Configration diff --git a/include/configs/rastaban.h b/include/configs/rastaban.h index de8ea8b850a097ede453bae089d1623e3c25072f..8e20a448d2a79ea3800023955ce0b0d73ae197aa 100644 --- a/include/configs/rastaban.h +++ b/include/configs/rastaban.h @@ -57,24 +57,6 @@ #ifndef CONFIG_RESTORE_FLASH /* set to negative value for no autoboot */ - -#define CONFIG_BOOTCOMMAND \ -"if dfubutton; then " \ - "run dfu_start; " \ - "reset; " \ -"fi;" \ -"run nand_boot;" \ -"run nand_boot_backup;" \ -"reset;" - -#else - -#define CONFIG_BOOTCOMMAND \ - "setenv autoload no; " \ - "dhcp; " \ - "if tftp 80000000 debrick.scr; then " \ - "source 80000000; " \ - "fi" #endif #endif /* CONFIG_SPL_BUILD */ #endif /* ! __CONFIG_RASTABAN_H */ diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h index 595482c22e90e9eccc2f09fe0ada55108d754c9a..f1f5d07bf81a63b8c45fd606eeda1664d54dbf79 100644 --- a/include/configs/rcar-gen2-common.h +++ b/include/configs/rcar-gen2-common.h @@ -42,6 +42,6 @@ #define CONFIG_TMU_TIMER #define CONFIG_SYS_TIMER_COUNTS_DOWN #define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */ -#define CONFIG_SYS_TIMER_RATE (CONFIG_SYS_CLK_FREQ / 8) +#define CONFIG_SYS_TIMER_RATE (get_board_sys_clk() / 8) #endif /* __RCAR_GEN2_COMMON_H */ diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index 2b3e1bb0d1c401e0a6f345e553e2175a6567f78d..eed21255eb292b4cc64a9f72e146dcc48b1da029 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -55,11 +55,6 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" -#define CONFIG_BOOTCOMMAND \ - "tftp 0x48080000 Image; " \ - "tftp 0x48000000 Image-"CONFIG_DEFAULT_FDT_FILE"; " \ - "booti 0x48080000 - 0x48000000" - /* SPL support */ #if defined(CONFIG_R8A7795) || defined(CONFIG_R8A7796) || defined(CONFIG_R8A77965) #define CONFIG_SPL_BSS_START_ADDR 0xe633f000 diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index b133d8ec48b9ece48d435e25f3bd97420539f9aa..00c453d739d301c1635ef2447d711f9db024cfaf 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -12,7 +12,6 @@ #define CONFIG_ROCKCHIP_STIMER_BASE 0x200440a0 #define COUNTER_FREQUENCY 24000000 -#define CONFIG_SYS_ARCH_TIMER #define CONFIG_SYS_HZ_CLOCK 24000000 #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h index 8b7a0bbbca12953bd3cf118ec67e1ff51d4cd353..97caceacfe66c48bc660f42ed571b08900032e21 100644 --- a/include/configs/rk3128_common.h +++ b/include/configs/rk3128_common.h @@ -13,7 +13,6 @@ #define CONFIG_ROCKCHIP_STIMER_BASE 0x200440a0 #define COUNTER_FREQUENCY 24000000 -#define CONFIG_SYS_ARCH_TIMER #define CONFIG_SYS_HZ_CLOCK 24000000 #define CONFIG_IRAM_BASE 0x10080000 diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h index e7c09645ec6b83f4df67d5d4e9ae5c19de2d07ed..7449e816b7da147ccf5d52aabfd2b6da8adb602c 100644 --- a/include/configs/rk3188_common.h +++ b/include/configs/rk3188_common.h @@ -22,7 +22,6 @@ /* spl size 32kb sram - 2kb bootrom */ #define CONFIG_SPL_MAX_SIZE (0x8000 - 0x800) -#define CONFIG_ROCKCHIP_SERIAL 1 #define CONFIG_SPL_STACK 0x10087fff diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index a46b1ffe865c51b5166d1f6a30b706af8f4f2a0d..ef55ef0a83bb8c11cd641c5430bf396e906d8f6c 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -13,7 +13,6 @@ #define CONFIG_ROCKCHIP_STIMER_BASE 0x110d0020 #define COUNTER_FREQUENCY 24000000 -#define CONFIG_SYS_ARCH_TIMER #define CONFIG_SYS_HZ_CLOCK 24000000 #define CONFIG_SYS_INIT_SP_ADDR 0x61100000 diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index abbb27395e68185ae31741a97c4e20635438bf5b..490da7cb23b22450d4beff8ba18b183b6627807c 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -15,7 +15,6 @@ #define CONFIG_ROCKCHIP_STIMER_BASE 0xff810020 #define COUNTER_FREQUENCY 24000000 -#define CONFIG_SYS_ARCH_TIMER #define CONFIG_SYS_HZ_CLOCK 24000000 #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h index 496f4628d34ff01827291078d25533eb57b13521..1664707ca6589031ac37265c76fa0f05c7849702 100644 --- a/include/configs/rk3308_common.h +++ b/include/configs/rk3308_common.h @@ -12,7 +12,6 @@ #define CONFIG_SPL_MAX_SIZE 0x20000 #define CONFIG_SPL_BSS_START_ADDR 0x00400000 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 -#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 #define CONFIG_SYS_NS16550_MEM32 diff --git a/include/configs/rpi.h b/include/configs/rpi.h index 4c5c1ac31f92f82f839461b94d941f0362a4bf62..d5e064fb37962b708e3454101aec3a5f22ae542b 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -44,7 +44,6 @@ /* GPIO */ #define CONFIG_BCM2835_GPIO /* LCD */ -#define CONFIG_LCD_DT_SIMPLEFB #define CONFIG_VIDEO_BCM2835 /* DFU over USB/UDC */ diff --git a/include/configs/rut.h b/include/configs/rut.h index 68d68d084d2ea90ea579ec46fe83e845c013504d..02d330e4f0f4315935f6dda287523047c6bb2cb3 100644 --- a/include/configs/rut.h +++ b/include/configs/rut.h @@ -63,41 +63,12 @@ #ifndef CONFIG_RESTORE_FLASH /* set to negative value for no autoboot */ - -#define CONFIG_BOOTCOMMAND \ - "if mmc rescan; then " \ - "echo SD/MMC found on device ${mmc_dev};" \ - "if run loadbootenv; then " \ - "echo Loaded environment from ${bootenv};" \ - "run importbootenv;" \ - "fi;" \ - "if test -n $uenvcmd; then " \ - "echo Running uenvcmd ...;" \ - "run uenvcmd;" \ - "fi;" \ - "if run mmc_load_uimage; then " \ - "run mmc_args;" \ - "bootm ${kloadaddr};" \ - "fi;" \ - "fi;" \ - "run nand_boot;" \ - "reset;" - -#else - -#define CONFIG_BOOTCOMMAND \ - "setenv autoload no; " \ - "dhcp; " \ - "if tftp 80000000 debrick.scr; then " \ - "source 80000000; " \ - "fi" #endif #endif /* CONFIG_SPL_BUILD */ #if defined(CONFIG_VIDEO) #define CONFIG_VIDEO_DA8XX -#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #define DA8XX_LCD_CNTL_BASE LCD_CNTL_BASE diff --git a/include/configs/s5p4418_nanopi2.h b/include/configs/s5p4418_nanopi2.h index 2e94613c37a4b0cdb54d735d0521a32194f19890..632fc0cc9eef020c06ee06f41d2eca56398ffbdb 100644 --- a/include/configs/s5p4418_nanopi2.h +++ b/include/configs/s5p4418_nanopi2.h @@ -103,16 +103,6 @@ (void *)PHY_BASEADDR_UART2, \ (void *)PHY_BASEADDR_UART3} -/*----------------------------------------------------------------------- - * PLL - */ -#define CONFIG_SYS_PLLFIN 24000000UL - -/*----------------------------------------------------------------------- - * Timer - */ -#define CONFIG_TIMER_SYS_TICK_CH 0 - /*----------------------------------------------------------------------- * BACKLIGHT */ @@ -131,8 +121,6 @@ * VIDEO */ -#define CONFIG_VIDEO_LOGO - #ifdef CONFIG_VIDEO_LOGO #ifdef CONFIG_SPLASH_SCREEN #define SPLASH_FILE logo.bmp diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index b4a3cc0445c3cfa57e10bd5d937e4083c5f2e30e..e3b091a93709dd60b754abd198b49bcb68d6aa60 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -18,9 +18,6 @@ #include #include /* get chip and board defs */ -/* input clock of PLL: has 24MHz input clock at S5PC110 */ -#define CONFIG_SYS_CLK_FREQ_C110 24000000 - /* DRAM Base */ #define CONFIG_SYS_SDRAM_BASE 0x30000000 @@ -70,8 +67,6 @@ "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \ "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \ -#define CONFIG_BOOTCOMMAND "run mmcboot" - #define CONFIG_RAMDISK_BOOT "root=/dev/ram0 rw rootfstype=ext4" \ " ${console} ${meminfo}" diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index ff29de0d060d119338e31e2225fff8a2f675d66c..29adab339240b765f2f0340c6e7b3922f605c30d 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -14,7 +14,6 @@ #define CONFIG_TIZEN /* TIZEN lib */ /* Keep L2 Cache Disabled */ -#define CONFIG_SYS_L2CACHE_OFF 1 /* Universal has 2 banks of DRAM */ #define CONFIG_SYS_SDRAM_BASE 0x40000000 @@ -22,8 +21,6 @@ #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ -#define CONFIG_BOOTCOMMAND "run mmcboot" - #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ - GENERATED_GBL_DATA_SIZE) @@ -106,11 +103,6 @@ #define CONFIG_USB_GADGET_DWC2_OTG_PHY -/* - * SPI Settings - */ -#define CONFIG_SOFT_SPI - #ifndef __ASSEMBLY__ void universal_spi_scl(int bit); void universal_spi_sda(int bit); diff --git a/include/configs/salvator-x.h b/include/configs/salvator-x.h index 1eafff10ff32557b723e07a3c3b61caf271da397..c29b34e231a4fde5c014dc17aad0f6c1549bb1e0 100644 --- a/include/configs/salvator-x.h +++ b/include/configs/salvator-x.h @@ -23,7 +23,6 @@ #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 #define CONFIG_SYS_MAX_FLASH_SECT 256 diff --git a/include/configs/sam9x60ek.h b/include/configs/sam9x60ek.h index df30d4868bd274277dbbae005b9c1018aa4097b5..eb96e501fb48ed0917370957f9d8efea9dae99f4 100644 --- a/include/configs/sam9x60ek.h +++ b/include/configs/sam9x60ek.h @@ -50,24 +50,12 @@ #ifdef CONFIG_SD_BOOT /* bootstrap + u-boot + env + linux in sd card */ -#define CONFIG_BOOTCOMMAND \ - "fatload mmc 0:1 0x21000000 at91-sam9x60ek.dtb;" \ - "fatload mmc 0:1 0x22000000 zImage;" \ - "bootz 0x22000000 - 0x21000000" #elif defined(CONFIG_NAND_BOOT) /* bootstrap + u-boot + env + linux in nandflash */ -#define CONFIG_BOOTCOMMAND "nand read " \ - "0x22000000 0x200000 0x600000; " \ - "nand read 0x21000000 0x180000 0x20000; " \ - "bootz 0x22000000 - 0x21000000" #elif defined(CONFIG_QSPI_BOOT) /* bootstrap + u-boot + env + linux in SPI NOR flash */ -#define CONFIG_BOOTCOMMAND "sf probe 0; " \ - "sf read 0x21000000 0x180000 0x80000; " \ - "sf read 0x22000000 0x200000 0x600000; " \ - "bootz 0x22000000 - 0x21000000" #endif #endif diff --git a/include/configs/sama5d27_som1_ek.h b/include/configs/sama5d27_som1_ek.h index 1c30e443923738a1d08a29592eb72c3c5dbba776..f7d8fb63527d4a273024ca7acecc50652d1340f8 100644 --- a/include/configs/sama5d27_som1_ek.h +++ b/include/configs/sama5d27_som1_ek.h @@ -21,13 +21,8 @@ (0x22000000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE) #endif -#undef CONFIG_BOOTCOMMAND #ifdef CONFIG_SD_BOOT /* bootstrap + u-boot + env in sd card */ -#define CONFIG_BOOTCOMMAND "fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x22000000 " \ - CONFIG_DEFAULT_DEVICE_TREE ".dtb; " \ - "fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x23000000 zImage; " \ - "bootz 0x23000000 - 0x22000000" #endif /* SPL */ diff --git a/include/configs/sama5d2_icp.h b/include/configs/sama5d2_icp.h index 53113f037993904d552614b564ee319fee054a67..c3a5c2ae323b7452738049ca51e8d35634c3e921 100644 --- a/include/configs/sama5d2_icp.h +++ b/include/configs/sama5d2_icp.h @@ -25,21 +25,12 @@ (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) #endif -/* NAND flash */ - -/* SPI flash */ -#define CONFIG_SF_DEFAULT_SPEED 66000000 - -#undef CONFIG_BOOTCOMMAND #ifdef CONFIG_SD_BOOT /* u-boot env in sd/mmc card */ #define FAT_ENV_INTERFACE "mmc" #define FAT_ENV_DEVICE_AND_PART "0" #define FAT_ENV_FILE "uboot.env" /* bootstrap + u-boot + env in sd card */ -#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 at91-sama5d2_icp.dtb; " \ - "fatload mmc 0:1 0x22000000 zImage; " \ - "bootz 0x22000000 - 0x21000000" #endif /* SPL */ diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h index da573bc96a811ca6b5a0faf23b4d670e34942097..11c13c65d8debb03b9295c987c9177da0e897039 100644 --- a/include/configs/sama5d2_xplained.h +++ b/include/configs/sama5d2_xplained.h @@ -23,31 +23,10 @@ #ifdef CONFIG_SD_BOOT /* bootstrap + u-boot + env in sd card */ -#undef CONFIG_BOOTCOMMAND - -#define CONFIG_BOOTCOMMAND "fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x22000000 at91-sama5d2_xplained.dtb; " \ - "fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x23000000 zImage; " \ - "bootz 0x23000000 - 0x22000000" #elif CONFIG_SPI_BOOT /* bootstrap + u-boot + env in sd card, but kernel + dtb in eMMC */ -#undef CONFIG_BOOTCOMMAND - -#define CONFIG_BOOTCOMMAND "ext4load mmc 0:1 0x22000000 /boot/at91-sama5d2_xplained.dtb; " \ - "ext4load mmc 0:1 0x23000000 /boot/zImage; " \ - "bootz 0x23000000 - 0x22000000" - -#endif - -#ifdef CONFIG_QSPI_BOOT -#undef CONFIG_ENV_SPI_BUS -#undef CONFIG_BOOTCOMMAND -#define CONFIG_ENV_SPI_BUS 1 -#define CONFIG_BOOTCOMMAND "sf probe 1:0; " \ - "sf read 0x22000000 0x180000 0x80000; " \ - "sf read 0x23000000 0x200000 0x600000; "\ - "bootz 0x23000000 - 0x22000000" #endif diff --git a/include/configs/sama7g5ek.h b/include/configs/sama7g5ek.h index 9b7cc2ce4d0c9b387f1a103b6196c89f7fb81bc4..2aec9ffdc69488001523e379fb7aa80e14b11f7e 100644 --- a/include/configs/sama7g5ek.h +++ b/include/configs/sama7g5ek.h @@ -24,20 +24,6 @@ GENERATED_GBL_DATA_SIZE) #endif -#ifndef CONFIG_BOOTCOMMAND -#ifdef CONFIG_SD_BOOT -/* u-boot env in sd/mmc card */ - -/* bootstrap + u-boot + env in sd card */ -#define CONFIG_BOOTCOMMAND "fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x61000000 at91-sama7g5ek.dtb; " \ - "fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x62000000 zImage; " \ - "bootz 0x62000000 - 0x61000000" -#else -#define CONFIG_BOOTCOMMAND "Place your bootcommand here" -#endif - -#endif - #define CONFIG_ARP_TIMEOUT 200 #define CONFIG_NET_RETRY_COUNT 50 diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index d614b704715f53aebc274e28c309e71417289078..cd7d99ec69c0e8a62ac876c64e99053f109e3172 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -10,24 +10,10 @@ #define CONFIG_IO_TRACE #endif -#ifndef CONFIG_TIMER -#define CONFIG_SYS_TIMER_RATE 1000000 -#endif - -#define CONFIG_HOST_MAX_DEVICES 4 - #define CONFIG_MALLOC_F_ADDR 0x0010000 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -/* turn on command-line edit/c/auto */ - -/* SPI - enable all SPI flash types for testing purposes */ - -#define CONFIG_SYS_FDT_LOAD_ADDR 0x100 - -#define CONFIG_PHYSMEM - /* Size of our emulated memory */ #define SB_CONCAT(x, y) x ## y #define SB_TO_UL(s) SB_CONCAT(s, UL) @@ -39,16 +25,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 115200} -#define BOOT_TARGET_DEVICES(func) \ - func(HOST, host, 1) \ - func(HOST, host, 0) - -#ifdef __ASSEMBLY__ -#define BOOTENV -#else -#include -#endif - #define CONFIG_KEEP_SERVERADDR #define CONFIG_UDP_CHECKSUM #define CONFIG_TIMESTAMP @@ -58,44 +34,6 @@ #define CONFIG_SANDBOX_SDL #endif -/* LCD and keyboard require SDL support */ -#ifdef CONFIG_SANDBOX_SDL -#define LCD_BPP LCD_COLOR16 -#define CONFIG_LCD_BMP_RLE8 - -#define CONFIG_KEYBOARD - -#define SANDBOX_SERIAL_SETTINGS "stdin=serial,cros-ec-keyb,usbkbd\0" \ - "stdout=serial,vidconsole\0" \ - "stderr=serial,vidconsole\0" -#else -#define SANDBOX_SERIAL_SETTINGS "stdin=serial\0" \ - "stdout=serial,vidconsole\0" \ - "stderr=serial,vidconsole\0" -#endif - -#define SANDBOX_ETH_SETTINGS "ethaddr=00:00:11:22:33:44\0" \ - "eth2addr=00:00:11:22:33:48\0" \ - "eth3addr=00:00:11:22:33:45\0" \ - "eth4addr=00:00:11:22:33:48\0" \ - "eth5addr=00:00:11:22:33:46\0" \ - "eth6addr=00:00:11:22:33:47\0" \ - "ipaddr=1.2.3.4\0" - -#define MEM_LAYOUT_ENV_SETTINGS \ - "bootm_size=0x10000000\0" \ - "kernel_addr_r=0x1000000\0" \ - "fdt_addr_r=0xc00000\0" \ - "ramdisk_addr_r=0x2000000\0" \ - "scriptaddr=0x1000\0" \ - "pxefile_addr_r=0x2000\0" - -#define CONFIG_EXTRA_ENV_SETTINGS \ - SANDBOX_SERIAL_SETTINGS \ - SANDBOX_ETH_SETTINGS \ - BOOTENV \ - MEM_LAYOUT_ENV_SETTINGS - #ifndef CONFIG_SPL_BUILD #define CONFIG_SYS_IDE_MAXBUS 1 #define CONFIG_SYS_ATA_IDE0_OFFSET 0 diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index c51517a76bfc2496f28af5bed39f83747faad7da..e6c200f7612295e2f57cb941b80301f2c95fc6aa 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -27,7 +27,6 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ /* NAND support */ -#define CONFIG_TEGRA_NAND /* Max number of NAND devices */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h index e28f98458e6b4b38b5638d8a8dc65837074d8dfd..8dba4fcb4f8447c1ab512f33993af87288a6afb1 100644 --- a/include/configs/sheevaplug.h +++ b/include/configs/sheevaplug.h @@ -9,12 +9,7 @@ #ifndef _CONFIG_SHEEVAPLUG_H #define _CONFIG_SHEEVAPLUG_H -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ - -#include "mv-plug-common.h" +#include "mv-common.h" /* * Environment variables configurations @@ -32,9 +27,6 @@ /* * Default environment variables */ -#define CONFIG_BOOTCOMMAND "${x_bootcmd_kernel}; " \ - "setenv bootargs ${x_bootargs} ${x_bootargs_root}; " \ - "bootm 0x6400000;" #define CONFIG_EXTRA_ENV_SETTINGS "x_bootargs=console" \ "=ttyS0,115200 mtdparts="CONFIG_MTDPARTS_DEFAULT \ diff --git a/include/configs/siemens-ccp-common.h b/include/configs/siemens-ccp-common.h deleted file mode 100644 index 01051c8ad7dc43e9775ae95aae8b7ac363dc2876..0000000000000000000000000000000000000000 --- a/include/configs/siemens-ccp-common.h +++ /dev/null @@ -1,19 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* Be very careful updating CONFIG_IDENT_STRING - * This string will control the update flow whether an U-Boot should be - * updated or not. If the version of installed U-Boot (in flash) is smaller - * than the version to be installed (from update file), an update will - * be performed. - * - * General rules: - * 1. First 4 characters ' ##v' or IDENT_MAGIC represent kind of a magic number - * to identify the following strings after easily. Don't change them! - * - * 2. First 2 digits after 'v' or CCP_MAJOR are updated with U-Boot version - * change, e.g. from 2015.04 to 2018.03 - * - * 3. Second 2 digits after '.' or CCP_MINOR are updated if we want to upgrade - * U-Boot within an U-Boot version. - */ -#define CCP_IDENT_MAGIC " ##v" -#define GENERATE_CCP_VERSION(MAJOR, MINOR) CCP_IDENT_MAGIC MAJOR "." MINOR diff --git a/include/configs/sifive-unleashed.h b/include/configs/sifive-unleashed.h index 85356789eff2869da7d1a65dd68d530136fd835d..920f3140f64fdeb337bbe7ecb8b32e7d1e5ad4fb 100644 --- a/include/configs/sifive-unleashed.h +++ b/include/configs/sifive-unleashed.h @@ -74,10 +74,6 @@ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ BOOTENV \ BOOTENV_SF - -#define CONFIG_PREBOOT \ - "setenv fdt_addr ${fdtcontroladdr};" \ - "fdt addr ${fdtcontroladdr};" #endif #endif /* __CONFIG_H */ diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h index f68d7d7676f2ea6f39c5c7ffbba50899757a7e42..30adfe948f14b2a01484d5562d42cf20d53e628a 100644 --- a/include/configs/sifive-unmatched.h +++ b/include/configs/sifive-unmatched.h @@ -32,8 +32,6 @@ #define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 -#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit resources */ - #define CONFIG_SYS_SCSI_MAX_SCSI_ID 4 /* Environment options */ @@ -72,10 +70,6 @@ "partitions=" PARTS_DEFAULT "\0" \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ BOOTENV - -#define CONFIG_PREBOOT \ - "setenv fdt_addr ${fdtcontroladdr};" \ - "fdt addr ${fdtcontroladdr};" #endif /* CONFIG_SPL_BUILD */ #define CONFIG_SYS_EEPROM_BUS_NUM 0 diff --git a/include/configs/silk.h b/include/configs/silk.h index eee60fdfabd2ffe04e8a5bd905e129ab4882a7f5..29350a635b2799603bfc6e9c3f0394088def9548 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -35,8 +35,6 @@ #define CONFIG_BITBANGMII_MULTI /* Board Clock */ -#define RMOBILE_XTAL_CLK 20000000u -#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" diff --git a/include/configs/slimbootloader.h b/include/configs/slimbootloader.h index b8169072cc86a2c10b978ab3d41a092047ef8038..ff0ed180e92ecd6484cc3c62f14dd57d7f15e8b1 100644 --- a/include/configs/slimbootloader.h +++ b/include/configs/slimbootloader.h @@ -35,15 +35,5 @@ /* * Override CONFIG_BOOTCOMMAND in x86-common.h */ -#undef CONFIG_BOOTCOMMAND -#define CONFIG_BOOTCOMMAND \ - "if test ${bootdev} = \"usb\"; then ${bootdev} start; fi; " \ - "if test ${bootdev} = \"scsi\"; then ${bootdev} scan; fi; " \ - "${bootdev} info; " \ - "${bootfsload} ${bootdev} ${bootdevnum}:${bootdevpart} " \ - "${loadaddr} ${bootfile}; " \ - "${bootfsload} ${bootdev} ${bootdevnum}:${bootdevpart} " \ - "${ramdiskaddr} ${ramdiskfile}; " \ - "zboot ${loadaddr} 0 ${ramdiskaddr} ${filesize}" #endif /* __SLIMBOOTLOADER_CONFIG_H__ */ diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 7ce3aeafe3c176cebe6d0f3de40a5d23bb902d33..8bfd1fcd25a8eb5f206c5990abfa5eb990f8a095 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -91,11 +91,6 @@ /* BOOTP and DHCP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define NFSBOOTCOMMAND \ - "setenv autoload yes; setenv autoboot yes; " \ - "setenv bootargs ${basicargs} ${mtdparts} " \ - "root=/dev/nfs ip=dhcp nfsroot=${serverip}:/srv/nfs/rootfs; " \ - "dhcp" #if !defined(CONFIG_SPL_BUILD) /* USB configuration */ @@ -116,7 +111,6 @@ #endif /* General Boot Parameter */ -#define CONFIG_BOOTCOMMAND "run flashboot" #define CONFIG_SYS_CBSIZE 512 /* diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h index 3af13673f2a01d39fa0aaebebbfaae8ad4b31247..d7e86f2f7644cd330bfbd837b2a1d1aa9daa0358 100644 --- a/include/configs/smdk5250.h +++ b/include/configs/smdk5250.h @@ -14,7 +14,6 @@ #undef CONFIG_EXYNOS_FB #undef CONFIG_EXYNOS_DP -#undef CONFIG_KEYBOARD #define CONFIG_BOARD_COMMON diff --git a/include/configs/smdk5420.h b/include/configs/smdk5420.h index d06dfe43a2396cac84f9b214bee43e792c7601ad..38691b63dafec7e2f44357dcd44a29a1250c0bf3 100644 --- a/include/configs/smdk5420.h +++ b/include/configs/smdk5420.h @@ -15,8 +15,6 @@ #undef CONFIG_EXYNOS_FB #undef CONFIG_EXYNOS_DP -#undef CONFIG_KEYBOARD - #define CONFIG_BOARD_COMMON #define CONFIG_SMDK5420 /* which is in a SMDK5420 */ diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index a5edf04a432efcec732f5d6f3c390abc2ebf8329..28ff48bf3d774d2f1b99dfe639334a7c8524367c 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -22,7 +22,6 @@ #include /* get chip and board defs */ /* input clock of PLL: SMDKC100 has 12MHz input clock */ -#define CONFIG_SYS_CLK_FREQ 12000000 /* DRAM Base */ #define CONFIG_SYS_SDRAM_BASE 0x30000000 @@ -36,8 +35,6 @@ /* PWM */ #define CONFIG_PWM 1 -#define CONFIG_BOOTCOMMAND "run ubifsboot" - #define CONFIG_RAMDISK_BOOT "root=/dev/ram0 rw rootfstype=ext2" \ " console=ttySAC0,115200n8" \ " mem=128M" diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index 4a6b6258ab7a8ec762530808630847ec7b4b31cc..f113fa44045e94ccc3204369b278c56a6de2ff77 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -26,8 +26,6 @@ /* MMC SPL */ #define COPY_BL2_FNPTR_ADDR 0x00002488 -#define CONFIG_BOOTCOMMAND "fatload mmc 0 40007000 uImage; bootm 40007000" - /* SMDKV310 has 4 bank of DRAM */ #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h index bbdd42b1afb8c426c125a099ec1f709a3d3e272b..a7f775660421ae8bf096b9db35ee7f538d80e418 100644 --- a/include/configs/smegw01.h +++ b/include/configs/smegw01.h @@ -16,7 +16,6 @@ /* MMC Config*/ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #define CONFIG_EXTRA_ENV_SETTINGS \ "image=zImage\0" \ @@ -36,11 +35,6 @@ "bootz ${loadaddr} - ${fdt_addr}; " \ "fi;\0" \ -#define CONFIG_BOOTCOMMAND \ - "if run loadimage; then " \ - "run mmcboot; " \ - "fi; " \ - /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h index de918e768033b92d627f53148826151930f3fab2..3889a88ae98cc88ee83a9256fb9ea507c3b28fec 100644 --- a/include/configs/snapper9g45.h +++ b/include/configs/snapper9g45.h @@ -45,9 +45,6 @@ #define CONFIG_AT91_WANTS_COMMON_PHY #define CONFIG_TFTP_PORT -/* MMC */ -#define CONFIG_GENERIC_ATMEL_MCI - /* LCD */ #define CONFIG_ATMEL_LCD #define CONFIG_GURNARD_SPLASH diff --git a/include/configs/sniper.h b/include/configs/sniper.h index 7c563b7b045c646c29cf284257c6c86e1f4926e7..ca3da9547cb41932c35d2d719a912e07e5176434 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -102,16 +102,4 @@ * Boot */ -#define CONFIG_BOOTCOMMAND \ - "setenv boot_mmc_part ${kernel_mmc_part}; " \ - "if test reboot-${reboot-mode} = reboot-r; then " \ - "echo recovery; setenv boot_mmc_part ${recovery_mmc_part}; fi; " \ - "if test reboot-${reboot-mode} = reboot-b; then " \ - "echo fastboot; fastboot 0; fi; " \ - "part start mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_start; " \ - "part size mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_size; " \ - "mmc dev ${boot_mmc_dev}; " \ - "mmc read ${kernel_addr_r} ${boot_mmc_start} ${boot_mmc_size} && " \ - "bootm ${kernel_addr_r};" - #endif diff --git a/include/configs/socfpga_arria5_secu1.h b/include/configs/socfpga_arria5_secu1.h index 21e70c282a7ed9b1efe3e3cca0d5065a0381c700..0935eaedacb6d19788fc7df2229584d457c66b14 100644 --- a/include/configs/socfpga_arria5_secu1.h +++ b/include/configs/socfpga_arria5_secu1.h @@ -27,19 +27,6 @@ /* Booting Linux */ #define CONFIG_BOOTFILE "zImage" -#define CONFIG_BOOTCOMMAND \ - "setenv bootcmd '" \ - "bridge enable; " \ - "if test ${bootnum} = \"b\"; " \ - "then run _fpga_loadsafe; " \ - "else if test ${bootcount} -eq 4; then echo \"Switching copy...\"; setexpr x $bootnum % 2 && setexpr bootnum $x + 1; saveenv; fi; " \ - "run _fpga_loaduser; " \ - "fi;" \ - "echo \"Booting bank $bootnum\" && run userload && run userboot;" \ - "' && " \ - "setenv altbootcmd 'setenv bootnum b && saveenv && boot;' && " \ - "saveenv && saveenv && boot;" - #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Environment settings */ @@ -108,7 +95,4 @@ /* The rest of the configuration is shared */ #include -#undef CONFIG_WATCHDOG_TIMEOUT_MSECS -#define CONFIG_WATCHDOG_TIMEOUT_MSECS 60000 - #endif /* __CONFIG_SOCFPGA_SECU1_H__ */ diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 31f95f52f8c6d49766877ca1fb7c09150000358b..155aece4c314dc05cc15c01a185b2c288e594794 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -187,10 +187,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4) #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" #endif -#else -#ifndef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1 -#endif #endif /* SPL QSPI boot support */ diff --git a/include/configs/socfpga_dbm_soc1.h b/include/configs/socfpga_dbm_soc1.h index 137da2f1fcf4800e37fbfc595644f05a3755a114..8acddbe8bb9f49ca668165a76d685e2a18b0ec8e 100644 --- a/include/configs/socfpga_dbm_soc1.h +++ b/include/configs/socfpga_dbm_soc1.h @@ -12,7 +12,6 @@ /* Booting Linux */ #define CONFIG_BOOTFILE "fitImage" -#define CONFIG_BOOTCOMMAND "run mmc_mmc" /* Environment is in MMC */ diff --git a/include/configs/socfpga_mcvevk.h b/include/configs/socfpga_mcvevk.h index 14562143255e152cb1a5e893162a3b9202ad2e49..3aa231c1521664fb44c7150d65fdf4822ce54c3f 100644 --- a/include/configs/socfpga_mcvevk.h +++ b/include/configs/socfpga_mcvevk.h @@ -12,7 +12,6 @@ /* Booting Linux */ #define CONFIG_BOOTFILE "fitImage" -#define CONFIG_BOOTCOMMAND "run mmc_mmc" /* Environment is in MMC */ diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 4d7072c4dbf811c8edb7c113975de447333805f0..928582ab8cfce3e8bf76fde2e7ff8df2ae1ab5f3 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -60,7 +60,6 @@ /* Flash device info */ #ifndef CONFIG_SPL_BUILD -#define CONFIG_MTD_PARTITIONS #define MTDIDS_DEFAULT "nor0=ff705000.spi.0" #endif /* CONFIG_SPL_BUILD */ @@ -148,7 +147,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); * L4 Watchdog */ #ifndef CONFIG_SPL_BUILD -#undef CONFIG_HW_WATCHDOG #undef CONFIG_DESIGNWARE_WATCHDOG #endif #define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS diff --git a/include/configs/socfpga_vining_fpga.h b/include/configs/socfpga_vining_fpga.h index d9d0a4af5ac009b07b928bf813d8992e13dd0921..d76749281500a02dea22277fc6b86534f8fa0e0c 100644 --- a/include/configs/socfpga_vining_fpga.h +++ b/include/configs/socfpga_vining_fpga.h @@ -12,7 +12,6 @@ /* Booting Linux */ #define CONFIG_BOOTFILE "fitImage" -#define CONFIG_BOOTCOMMAND "run selboot" #define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MiB */ /* Extra Environment */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 454dbd30b612c40f41290962946d2f0c0c549e5f..15e93d044ef1b1e4ef1ac81b63d278926242cfd7 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -38,10 +38,6 @@ * in the README.mpc85xxads. */ -#ifndef CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_CLK_FREQ 66666666 -#endif - /* * These can be toggled for performance analysis, otherwise use default. */ @@ -97,11 +93,6 @@ #define CONFIG_SYS_LBC_FLASH_BASE CONFIG_SYS_FLASH1 /* Localbus flash start */ #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_LBC_FLASH_BASE /* start of FLASH */ -#define CONFIG_SYS_BR0_PRELIM 0xfe001001 /* port size 16bit */ -#define CONFIG_SYS_OR0_PRELIM 0xfe000030 /* 32MB Flash */ -#define CONFIG_SYS_BR1_PRELIM 0xfc001001 /* port size 16bit */ -#define CONFIG_SYS_OR1_PRELIM 0xfe000030 /* 32MB Flash */ - #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */ #define CONFIG_SYS_MAX_FLASH_SECT 256 /* sectors per device */ #undef CONFIG_SYS_FLASH_CHECKSUM @@ -128,8 +119,6 @@ #define CONFIG_SYS_FPGA_BASE 0xc0000000 #define CONFIG_SYS_FPGA_SIZE 0x00100000 /* 1 MB */ #define CONFIG_SYS_HMI_BASE 0xc0010000 -#define CONFIG_SYS_BR3_PRELIM 0xc0001881 /* UPMA, 32-bit */ -#define CONFIG_SYS_OR3_PRELIM 0xfff00000 /* 1 MB */ #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_FPGA_BASE + 0x70) #define CONFIG_SYS_MAX_NAND_DEVICE 1 @@ -137,8 +126,6 @@ /* LIME GDC */ #define CONFIG_SYS_LIME_BASE 0xc8000000 #define CONFIG_SYS_LIME_SIZE 0x04000000 /* 64 MB */ -#define CONFIG_SYS_BR2_PRELIM 0xc80018a1 /* UPMB, 32-bit */ -#define CONFIG_SYS_OR2_PRELIM 0xfc000000 /* 64 MB */ #define CONFIG_SYS_SPD_BUS_NUM 0 @@ -190,8 +177,6 @@ */ #define CONFIG_BOOTP_BOOTFILESIZE -#undef CONFIG_WATCHDOG /* watchdog disabled */ - /* * Miscellaneous configurable options */ @@ -258,7 +243,6 @@ "bootm ${kernel_addr_r} - ${fdt_addr};" \ "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ "" -#define CONFIG_BOOTCOMMAND "run boot_nor" /* pass open firmware flat tree */ diff --git a/include/configs/somlabs_visionsom_6ull.h b/include/configs/somlabs_visionsom_6ull.h index a2fe54709daf40bd329d8b1e81844edc13b1fc57..768e33dd89e60361e64bc5732e870adbc713b306 100644 --- a/include/configs/somlabs_visionsom_6ull.h +++ b/include/configs/somlabs_visionsom_6ull.h @@ -53,19 +53,6 @@ "run setrootmmc; " \ "run setloadmmc; " \ -#define CONFIG_BOOTCOMMAND \ - "run setfdtfile; " \ - "run checkbootdev; " \ - "run loadfdt;" \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run setbootargs; " \ - "bootz ${loadaddr} - ${fdt_addr}; " \ - "fi; " \ - "fi" - /* Miscellaneous configurable options */ /* Physical Memory Map */ diff --git a/include/configs/stemmy.h b/include/configs/stemmy.h index e5571b240dc15d91e18f63f4d54364b70c02d315..96e759d99cabcd7e1a4f751d36053200aa1f364d 100644 --- a/include/configs/stemmy.h +++ b/include/configs/stemmy.h @@ -14,6 +14,7 @@ * bootloader. New images are loaded at the same address for compatibility. */ #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_BOOTM_LEN SZ_64M /* FIXME: This should be loaded from device tree... */ #define CONFIG_SYS_L2_PL310 diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index 0a4cd84c15d991ec983d64239c6034b7e01fc949..18a57f2231b68470709033f88236ac3832622441 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -17,11 +17,6 @@ #define CONFIG_TIMESTAMP -#define CONFIG_BOOTCOMMAND \ - "sf probe 0:1 50000000; " \ - "sf read ${loadaddr} 0x100000 ${kern_size}; " \ - "bootm ${loadaddr}" - #define CONFIG_EXTRA_ENV_SETTINGS \ "kern_size=0x700000\0" \ "loadaddr=0x40001000\0" \ @@ -46,9 +41,6 @@ #define CONFIG_RTC_MCFRRTC #define CONFIG_SYS_MCFRRTC_BASE 0xFC0A8000 -/* spi not partitions */ -#define CONFIG_JFFS2_DEV "nor0" - /* Timer */ #define CONFIG_MCFTMR diff --git a/include/configs/stout.h b/include/configs/stout.h index a1e7e86f39ab16b8aa3c786ccb4c86dce42e7070..df2d9676b5e993ed79d3a974664e67dd88e36f7a 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -39,8 +39,6 @@ #define CONFIG_BITBANGMII_MULTI /* Board Clock */ -#define RMOBILE_XTAL_CLK 20000000u -#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h index d3808842bd5933cf0e539ce1919ae9cac6a3c25c..dd9421687638725cec4738a0cb94ad6abcc78740 100644 --- a/include/configs/stv0991.h +++ b/include/configs/stv0991.h @@ -34,8 +34,6 @@ /* Misc configuration */ -#define CONFIG_BOOTCOMMAND "go 0x40040000" - /* + * QSPI support + */ diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h index 3d099b4f11f7bafcbdb5651f463660e036ec0bdc..04095891525fd15f884023ffe18b989fb0db7aff 100644 --- a/include/configs/synquacer.h +++ b/include/configs/synquacer.h @@ -41,15 +41,11 @@ #define CONFIG_SYS_FLASH_BASE (0x08000000) #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE} -#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + (512 * 1024)) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + PHYS_SDRAM_SIZE) - #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_MAXARGS 128 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* Since U-Boot 64bit PCIe support is limited, disable 64bit MMIO support */ -/* #define CONFIG_SYS_PCI_64BIT 1 */ #define DEFAULT_DFU_ALT_INFO "dfu_alt_info=" \ "mtd nor1=u-boot.bin raw 200000 100000;" \ diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h deleted file mode 100644 index a47e2c5b2859b226ea9c51a216adc9ef113ad434..0000000000000000000000000000000000000000 --- a/include/configs/tam3517-common.h +++ /dev/null @@ -1,281 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2011 - * Stefano Babic, DENX Software Engineering, sbabic@denx.de. - * - * Copyright (C) 2009 TechNexion Ltd. - */ - -#ifndef __TAM3517_H -#define __TAM3517_H - -/* - * High Level Configuration Options - */ - -#include /* get chip and board defs */ -#include - -/* Clock Defines */ -#define V_OSCK 26000000 /* Clock output from T2 */ -#define V_SCLK (V_OSCK >> 1) - -/* - * DDR related - */ -#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) - -/* - * Hardware drivers - */ - -/* - * NS16550 Configuration - */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ - -/* - * select serial console configuration - */ -#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 - -#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ - 115200} - -#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07 - -/* - * Board NAND Info. - */ -#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ - /* to access */ - /* nand at CS0 */ - -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ - /* NAND devices */ - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ - -#define CONFIG_SYS_MAXARGS 32 /* max number of command */ - /* args */ - -/* - * AM3517 has 12 GP timers, they can be driven by the system clock - * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). - * This rate is divided by a local divisor. - */ -#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 -#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ - -/* - * Physical Memory Map - */ -#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 -#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 - -/* - * FLASH and environment organization - */ - -/* **** PISMO SUPPORT *** */ - -/* Redundant Environment */ -#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ - -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 -#define CONFIG_SYS_INIT_RAM_SIZE 0x800 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) - -/* - * ethernet support, EMAC - * - */ -#define CONFIG_NET_RETRY_COUNT 10 - -/* Defines for SPL */ -#define CONFIG_SPL_CONSOLE -#define CONFIG_SPL_NAND_SOFTECC -#define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */ - -#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ - CONFIG_SPL_TEXT_BASE) -#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK - -#define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 -#define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */ -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 - -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" - -/* FAT */ -#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" -#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" - -/* RAW SD card / eMMC */ -#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */ - -/* NAND boot config */ -#define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\ - 48, 49, 50, 51, 52, 53, 54, 55,\ - 56, 57, 58, 59, 60, 61, 62, 63} -#define CONFIG_SYS_NAND_ECCSIZE 256 -#define CONFIG_SYS_NAND_ECCBYTES 3 - -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE - -#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 - -/* Setup MTD for NAND on the SOM */ - -#define CONFIG_TAM3517_SETTINGS \ - "netdev=eth0\0" \ - "nandargs=setenv bootargs root=${nandroot} " \ - "rootfstype=${nandrootfstype}\0" \ - "nfsargs=setenv bootargs root=/dev/nfs rw " \ - "nfsroot=${serverip}:${rootpath}\0" \ - "ramargs=setenv bootargs root=/dev/ram rw\0" \ - "addip_sta=setenv bootargs ${bootargs} " \ - "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ - ":${hostname}:${netdev}:off panic=1\0" \ - "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ - "addip=if test -n ${ipdyn};then run addip_dyn;" \ - "else run addip_sta;fi\0" \ - "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ - "addtty=setenv bootargs ${bootargs}" \ - " console=ttyO0,${baudrate}\0" \ - "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ - "loadaddr=82000000\0" \ - "kernel_addr_r=82000000\0" \ - "hostname=" CONFIG_HOSTNAME "\0" \ - "bootfile=" CONFIG_HOSTNAME "/uImage\0" \ - "flash_self=run ramargs addip addtty addmtd addmisc;" \ - "bootm ${kernel_addr} ${ramdisk_addr}\0" \ - "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ - "bootm ${kernel_addr}\0" \ - "nandboot=run nandargs addip addtty addmtd addmisc;" \ - "nand read ${kernel_addr_r} kernel\0" \ - "bootm ${kernel_addr_r}\0" \ - "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ - "run nfsargs addip addtty addmtd addmisc;" \ - "bootm ${kernel_addr_r}\0" \ - "net_self=if run net_self_load;then " \ - "run ramargs addip addtty addmtd addmisc;" \ - "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \ - "else echo Images not loades;fi\0" \ - "u-boot=" CONFIG_HOSTNAME "/u-boot.img\0" \ - "load=tftp ${loadaddr} ${u-boot}\0" \ - "loadmlo=tftp ${loadaddr} ${mlo}\0" \ - "mlo=" CONFIG_HOSTNAME "/MLO\0" \ - "uboot_addr=0x80000\0" \ - "update=nandecc sw;nand erase ${uboot_addr} 100000;" \ - "nand write ${loadaddr} ${uboot_addr} 80000\0" \ - "updatemlo=nandecc hw;nand erase 0 20000;" \ - "nand write ${loadaddr} 0 20000\0" \ - "upd=if run load;then echo Updating u-boot;if run update;" \ - "then echo U-Boot updated;" \ - "else echo Error updating u-boot !;" \ - "echo Board without bootloader !!;" \ - "fi;" \ - "else echo U-Boot not downloaded..exiting;fi\0" \ - -/* - * this is common code for all TAM3517 boards. - * MAC address is stored from manufacturer in - * I2C EEPROM - */ -#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) -/* - * The I2C EEPROM on the TAM3517 contains - * mac address and production data - */ -struct tam3517_module_info { - char customer[48]; - char product[48]; - - /* - * bit 0~47 : sequence number - * bit 48~55 : week of year, from 0. - * bit 56~63 : year - */ - unsigned long long sequence_number; - - /* - * bit 0~7 : revision fixed - * bit 8~15 : revision major - * bit 16~31 : TNxxx - */ - unsigned int revision; - unsigned char eth_addr[4][8]; - unsigned char _rev[100]; -}; - -#define TAM3517_READ_EEPROM(info, ret) \ -do { \ - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); \ - if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \ - (void *)info, sizeof(*info))) \ - ret = 1; \ - else \ - ret = 0; \ -} while (0) - -#define TAM3517_READ_MAC_FROM_EEPROM(info) \ -do { \ - char buf[80], ethname[20]; \ - int i; \ - memset(buf, 0, sizeof(buf)); \ - for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) { \ - sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X", \ - (info)->eth_addr[i][5], \ - (info)->eth_addr[i][4], \ - (info)->eth_addr[i][3], \ - (info)->eth_addr[i][2], \ - (info)->eth_addr[i][1], \ - (info)->eth_addr[i][0]); \ - \ - if (i) \ - sprintf(ethname, "eth%daddr", i); \ - else \ - strcpy(ethname, "ethaddr"); \ - printf("Setting %s from EEPROM with %s\n", ethname, buf);\ - env_set(ethname, buf); \ - } \ -} while (0) - -/* The following macros are taken from Technexion's documentation */ -#define TAM3517_sequence_number(info) \ - ((info)->sequence_number % 0x1000000000000LL) -#define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100) -#define TAM3517_year(info) ((info)->sequence_number >> 56) -#define TAM3517_revision_fixed(info) ((info)->revision % 0x100) -#define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100) -#define TAM3517_revision_tn(info) ((info)->revision >> 16) - -#define TAM3517_PRINT_SOM_INFO(info) \ -do { \ - printf("Vendor:%s\n", (info)->customer); \ - printf("SOM: %s\n", (info)->product); \ - printf("SeqNr: %02llu%02llu%012llu\n", \ - TAM3517_year(info), \ - TAM3517_week_of_year(info), \ - TAM3517_sequence_number(info)); \ - printf("Rev: TN%u %u.%u\n", \ - TAM3517_revision_tn(info), \ - TAM3517_revision_major(info), \ - TAM3517_revision_fixed(info)); \ -} while (0) - -#endif - -#endif /* __TAM3517_H */ diff --git a/include/configs/tec.h b/include/configs/tec.h index aa9665eab59a39935beafafad1f94e78548d4154..432ccbdc32b9a997806d8131a3870054029a4c61 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -19,7 +19,6 @@ #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* NAND support */ -#define CONFIG_TEGRA_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Environment in NAND, aligned to start of last sector */ diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 673056ce517d45ed828da9f87dbdba27f3a1f387..99b7bd07aa0f54aaac715921e3a2976698024084 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -12,7 +12,6 @@ /* * High Level Configuration Options */ -#define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */ #include /* get chip and board defs */ diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 063213cbfeb7e9ee33707cba849e7837b9b4c6e4..fac8692728576da5f632c350a5fc4721992a9861 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -79,6 +79,4 @@ */ #define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 -#define CONFIG_SYS_NAND_SELF_INIT - #endif /* _TEGRA20_COMMON_H_ */ diff --git a/include/configs/theadorable-x86-common.h b/include/configs/theadorable-x86-common.h index 193c6c3bb5cc5213d2c232cd03d993c335232375..eaa19ee9b2db62ad3c2eacd0513e8770780b90e1 100644 --- a/include/configs/theadorable-x86-common.h +++ b/include/configs/theadorable-x86-common.h @@ -22,7 +22,6 @@ /* Environment settings */ -#undef CONFIG_BOOTCOMMAND #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/thuban.h b/include/configs/thuban.h index d45ff7d84da72b0de8edc9bce9c4049e0a442ccc..3b120073fef0d7b5c5058212c38f48d405202e1c 100644 --- a/include/configs/thuban.h +++ b/include/configs/thuban.h @@ -50,24 +50,6 @@ #ifndef CONFIG_RESTORE_FLASH /* set to negative value for no autoboot */ - -#define CONFIG_BOOTCOMMAND \ -"if dfubutton; then " \ - "run dfu_start; " \ - "reset; " \ -"fi;" \ -"run nand_boot;" \ -"run nand_boot_backup;" \ -"reset;" - -#else - -#define CONFIG_BOOTCOMMAND \ - "setenv autoload no; " \ - "dhcp; " \ - "if tftp 80000000 debrick.scr; then " \ - "source 80000000; " \ - "fi" #endif #endif /* CONFIG_SPL_BUILD */ #endif /* ! __CONFIG_THUBAN_H */ diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index ee63ce37cd99c54b040f74dc5cac7d0ae3e2d6cf..0f786abeb84037dad2e0398bfc024954d64ff6ec 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -56,22 +56,6 @@ "bootm ${loadaddr}\0" \ "fdtfile=ti814x-evm.dtb\0" \ -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "echo SD/MMC found on device ${mmcdev};" \ - "if run loadbootenv; then " \ - "echo Loaded environment from ${bootenv};" \ - "run importbootenv;" \ - "fi;" \ - "if test -n $uenvcmd; then " \ - "echo Running uenvcmd ...;" \ - "run uenvcmd;" \ - "fi;" \ - "if run loaduimage; then " \ - "run mmcboot;" \ - "fi;" \ - "fi;" \ - /* Clock Defines */ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index fa99152d6f6d1038d52c2a08aaa681c7c2226a1f..533673ba5d37a7ff072c38a04920eca86ad3c289 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -17,11 +17,6 @@ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ -#define CONFIG_BOOTCOMMAND \ - "mmc rescan;" \ - "fatload mmc 0 ${loadaddr} uImage;" \ - "bootm ${loadaddr}" \ - /* Clock Defines */ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) @@ -32,7 +27,6 @@ /** * Platform/Board specific defs */ -#define CONFIG_SYS_CLK_FREQ 27000000 #define CONFIG_SYS_TIMERBASE 0x4802E000 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 8b0dd49e027a36c5e34bdc99b18688522f370cb8..4a329bf6ecafe4c30a9d77d8f706d61761b232d8 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -205,24 +205,6 @@ "mtdparts=mtdparts=davinci_nand.0:" \ "1024k(bootloader)ro,512k(params)ro,-(ubifs)\0" -#ifndef CONFIG_BOOTCOMMAND -#ifndef CONFIG_TI_SECURE_DEVICE -#define CONFIG_BOOTCOMMAND \ - "run init_${boot}; " \ - "run get_mon_${boot} run_mon; " \ - "run get_kern_${boot}; " \ - "run init_fw_rd_${boot}; " \ - "run get_fdt_${boot}; " \ - "run run_kern" -#else -#define CONFIG_BOOTCOMMAND \ - "run run_mon_hs; " \ - "run init_${boot}; " \ - "run get_fit_${boot}; " \ - "bootm ${addr_fit}#${name_fdt}" -#endif -#endif - /* Now for the remaining common defines */ #include diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index 055d108ddefe0bd790f837cff47efd3f2c59b8f0..270ef9598d2df2d0009359560e03f97e7650b6aa 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -170,10 +170,6 @@ "exit; " \ "fi; " \ -#define FASTBOOT_CMD \ - "echo Booting into fastboot ...; " \ - "fastboot " __stringify(CONFIG_FASTBOOT_USB_DEV) "; " - #define DEFAULT_COMMON_BOOT_TI_ARGS \ "console=" CONSOLEDEV ",115200n8\0" \ "fdtfile=undefined\0" \ @@ -195,7 +191,7 @@ "if bcb test command = bootonce-bootloader; then " \ "echo Android: Bootloader boot...; " \ "bcb clear command; bcb store; " \ - FASTBOOT_CMD \ + "fastboot 1; " \ "exit; " \ "elif bcb test command = boot-recovery; then " \ "echo Android: Recovery boot...; " \ @@ -260,21 +256,6 @@ "if test $fdtfile = undefined; then " \ "echo WARNING: Could not determine device tree to use; fi; \0" -#define CONFIG_BOOTCOMMAND \ - "if test ${dofastboot} -eq 1; then " \ - "echo Boot fastboot requested, resetting dofastboot ...;" \ - "setenv dofastboot 0; saveenv;" \ - FASTBOOT_CMD \ - "fi;" \ - "if test ${boot_fit} -eq 1; then " \ - "run update_to_fit;" \ - "fi;" \ - "run findfdt; " \ - "run finduuid; " \ - "run distro_bootcmd;" \ - "run emmc_android_boot; " \ - "" - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(MMC, mmc, 1) \ diff --git a/include/configs/topic_miami.h b/include/configs/topic_miami.h index 88bb4a8fd5ed7a86fd49fd43ae0bfe0ca33ad58c..ba6c3f0cec3424868a6b3ef4cf8d20f2450c170d 100644 --- a/include/configs/topic_miami.h +++ b/include/configs/topic_miami.h @@ -94,9 +94,4 @@ EXTRA_ENV_USB \ DFU_ALT_INFO -#undef CONFIG_BOOTCOMMAND -#define CONFIG_BOOTCOMMAND "if mmcinfo; then " \ - "if fatload mmc 0 0x1900000 ${bootscript}; then source 0x1900000; " \ - "fi; fi; run $modeboot" - #endif /* __CONFIG_TOPIC_MIAMI_H */ diff --git a/include/configs/total_compute.h b/include/configs/total_compute.h index 933a145f9939cef0dd99128e95dcb228ba75514d..c752da374b5ddcbd6f40afcdc66f001414c8ae2d 100644 --- a/include/configs/total_compute.h +++ b/include/configs/total_compute.h @@ -47,27 +47,6 @@ * without verification (for development purposes). * Else boot FIT image. */ -#define CONFIG_BOOTCOMMAND \ - "if part number mmc 0 vbmeta is_avb; then" \ - " echo MMC with vbmeta partition detected.;" \ - " echo starting Android Verified boot.;" \ - " avb init 0; " \ - " if avb verify; then " \ - " set bootargs $bootargs $avb_bootargs; " \ - " part start mmc 0 boot boot_start; " \ - " part size mmc 0 boot boot_size; " \ - " mmc read ${load_addr} ${boot_start} ${boot_size}; " \ - " bootm ${load_addr} ${load_addr} ${fdt_addr_r}; " \ - " else; " \ - " echo AVB verification failed.; " \ - " exit; " \ - " fi; " \ - "elif part number mmc 0 system is_non_avb_android; then " \ - " booti ${kernel_addr_r} ${initrd_addr_r} ${fdt_addr_r};" \ - "else;" \ - " echo Booting FIT image.;" \ - " bootm ${load_addr} ${load_addr} ${fdt_addr_r}; " \ - "fi;" /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h index e6dc9f17fed6c7d61623852d091962d1dbce61ed..4d5b470685ab39f9da7e75b776d49243df9726e5 100644 --- a/include/configs/tplink_wdr4300.h +++ b/include/configs/tplink_wdr4300.h @@ -25,9 +25,6 @@ */ #define CONFIG_SYS_NS16550_CLK 40000000 -#define CONFIG_BOOTCOMMAND \ - "dhcp 192.168.1.1:wdr4300.fit && bootm $loadaddr" - /* * Command */ diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index 233031bc38ae0251bcb3c38961822d66d0d1025c..633b100002f8e6dba5e411339be2df7de46fd56d 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -119,9 +119,6 @@ "fi; fi; " \ "setenv filesize; setenv blkc \0" \ -#define CONFIG_BOOTCOMMAND \ - "run mmcboot; run netboot; run panicboot" - #elif defined(CONFIG_TQMA6X_SPI_BOOT) #define TQMA6_UBOOT_OFFSET 0x400 @@ -205,11 +202,7 @@ "setexpr offset ${fdt_start} * " \ __stringify(TQMA6_SPI_FLASH_SECTOR_SIZE)"; " \ "sf read ${fdt_addr} ${offset} ${size}; " \ - "setenv size ; setenv offset\0" \ - -#define CONFIG_BOOTCOMMAND \ - "sf probe; run mmcboot; run netboot; run panicboot" \ - + "setenv size ; setenv offset\0" #else #error "need to define boot source" diff --git a/include/configs/trats.h b/include/configs/trats.h index 396e9f28100ed6d205d3ddd863bd65ad831731d1..5217400b6bd25240946f312bb6756c96621209a1 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -15,7 +15,6 @@ #define CONFIG_TIZEN /* TIZEN lib */ -#define CONFIG_SYS_L2CACHE_OFF #ifndef CONFIG_SYS_L2CACHE_OFF #define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE 0x10502000 @@ -26,8 +25,6 @@ #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ -#define CONFIG_BOOTCOMMAND "run autoboot" - #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ - GENERATED_GBL_DATA_SIZE) diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 114dd8e56fae58c3432dbf23de48c16c5016c766..8d4b782372c528b6b7b5719b4d5c676c6e8cedd0 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -14,7 +14,6 @@ #define CONFIG_TIZEN /* TIZEN lib */ -#define CONFIG_SYS_L2CACHE_OFF #ifndef CONFIG_SYS_L2CACHE_OFF #define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE 0x10502000 @@ -25,8 +24,6 @@ #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ -#define CONFIG_BOOTCOMMAND "run autoboot" - #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ - GENERATED_GBL_DATA_SIZE) diff --git a/include/configs/ulcb.h b/include/configs/ulcb.h index 1ce844f4920bf8e0c3e52e90e3556df1b8c154b3..bdd6b4b0d935fc421d9b3b9a76f9b940aabb079c 100644 --- a/include/configs/ulcb.h +++ b/include/configs/ulcb.h @@ -23,7 +23,6 @@ #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 #define CONFIG_SYS_MAX_FLASH_SECT 256 diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index dbd4a0089ec894012f1da413880142c50cde126a..fb7b83d285d3336b3bee1e9f2de46104dd7b757a 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -79,11 +79,6 @@ #endif #define CONFIG_ROOTPATH "/nfs/root/path" -#define NFSBOOTCOMMAND \ - "setenv bootargs $bootargs root=/dev/nfs rw " \ - "nfsroot=$serverip:$rootpath " \ - "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \ - "run __nfsboot" #ifdef CONFIG_FIT #define CONFIG_BOOTFILE "fitImage" @@ -203,6 +198,4 @@ #define CONFIG_SPL_PAD_TO 0x20000 -#define CONFIG_SYS_PCI_64BIT - #endif /* __CONFIG_UNIPHIER_H__ */ diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h index 49895e7ab30e8cf5fa5fc0057b36e3956bb1ee8e..ffa69009a128ebf1140a2586d823083e43ccbe0e 100644 --- a/include/configs/usb_a9263.h +++ b/include/configs/usb_a9263.h @@ -63,7 +63,6 @@ #endif /* bootstrap + u-boot + env + linux in dataflash on CS0 */ -#define CONFIG_BOOTCOMMAND "nboot 21000000 0" #define CONFIG_EXTRA_ENV_SETTINGS \ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h index 6f5a1c89e82b6d388e019098407919c3b8e4d780..0faa656bc63afb2b927f5d6577f265ff587bbf08 100644 --- a/include/configs/usbarmory.h +++ b/include/configs/usbarmory.h @@ -10,8 +10,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_FSL_CLK - #include /* U-Boot environment */ @@ -36,12 +34,6 @@ /* Linux boot */ #define CONFIG_HOSTNAME "usbarmory" -#define CONFIG_BOOTCOMMAND \ - "run distro_bootcmd; " \ - "setenv bootargs console=${console} ${bootargs_default}; " \ - "ext2load mmc 0:1 ${kernel_addr_r} /boot/zImage; " \ - "ext2load mmc 0:1 ${fdt_addr_r} /boot/${fdtfile}; " \ - "bootz ${kernel_addr_r} - ${fdt_addr_r}" #define BOOT_TARGET_DEVICES(func) func(MMC, mmc, 0) diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 7fbec270bff5c0df93b0c66b478dc7f0b195ffcd..17583c0a6af623f3335bfc05d41591e5f8690616 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -11,8 +11,6 @@ #define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) @@ -103,7 +101,6 @@ /* USDHC */ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 /* ENET */ #define CONFIG_ETHPRIME "FEC" diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8.h similarity index 76% rename from include/configs/vexpress_aemv8a.h rename to include/configs/vexpress_aemv8.h index df22584d9abdb7dfb2ae9acfce5f7acb51d7c3d4..54e8caeb7bc5f5e0f9b55dfb3f525a7475590a64 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8.h @@ -4,36 +4,39 @@ * configurations. */ -#ifndef __VEXPRESS_AEMV8A_H -#define __VEXPRESS_AEMV8A_H +#ifndef __VEXPRESS_AEMV8_H +#define __VEXPRESS_AEMV8_H + +#include #define CONFIG_REMAKE_ELF /* Link Definitions */ -#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP +#ifdef CONFIG_TARGET_VEXPRESS64_JUNO +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) +#else /* ATF loads u-boot here for BASE_FVP model */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000) -#elif CONFIG_TARGET_VEXPRESS64_JUNO -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) #endif #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ /* CS register bases for the original memory map. */ -#define V2M_PA_CS0 0x00000000 -#define V2M_PA_CS1 0x14000000 -#define V2M_PA_CS2 0x18000000 -#define V2M_PA_CS3 0x1c000000 -#define V2M_PA_CS4 0x0c000000 -#define V2M_PA_CS5 0x10000000 +#define V2M_BASE 0x80000000 +#define V2M_PA_BASE 0x00000000 + +#define V2M_PA_CS0 (V2M_PA_BASE + 0x00000000) +#define V2M_PA_CS1 (V2M_PA_BASE + 0x14000000) +#define V2M_PA_CS2 (V2M_PA_BASE + 0x18000000) +#define V2M_PA_CS3 (V2M_PA_BASE + 0x1c000000) +#define V2M_PA_CS4 (V2M_PA_BASE + 0x0c000000) +#define V2M_PA_CS5 (V2M_PA_BASE + 0x10000000) #define V2M_PERIPH_OFFSET(x) (x << 16) #define V2M_SYSREGS (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1)) #define V2M_SYSCTL (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2)) #define V2M_SERIAL_BUS_PCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3)) -#define V2M_BASE 0x80000000 - /* Common peripherals relative to CS7. */ #define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4)) #define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5)) @@ -72,23 +75,23 @@ /* Generic Interrupt Controller Definitions */ #ifdef CONFIG_GICV3 -#define GICD_BASE (0x2f000000) -#define GICR_BASE (0x2f100000) +#define GICD_BASE (V2M_PA_BASE + 0x2f000000) +#define GICR_BASE (V2M_PA_BASE + 0x2f100000) #else -#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP -#define GICD_BASE (0x2f000000) -#define GICC_BASE (0x2c000000) -#elif CONFIG_TARGET_VEXPRESS64_JUNO +#ifdef CONFIG_TARGET_VEXPRESS64_JUNO #define GICD_BASE (0x2C010000) #define GICC_BASE (0x2C02f000) +#else +#define GICD_BASE (V2M_PA_BASE + 0x2f000000) +#define GICC_BASE (V2M_PA_BASE + 0x2c000000) #endif #endif /* !CONFIG_GICV3 */ -#ifndef CONFIG_TARGET_VEXPRESS64_JUNO -/* The Vexpress64 simulators use SMSC91C111 */ +#if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) && !defined(CONFIG_DM_ETH) +/* The Vexpress64 BASE_FVP simulator uses SMSC91C111 */ #define CONFIG_SMC91111 1 -#define CONFIG_SMC91111_BASE (0x01A000000) +#define CONFIG_SMC91111_BASE (V2M_PA_BASE + 0x01A000000) #endif /* PL011 Serial Configuration */ @@ -113,7 +116,7 @@ #ifdef CONFIG_TARGET_VEXPRESS64_JUNO #define PHYS_SDRAM_2 (0x880000000) #define PHYS_SDRAM_2_SIZE 0x180000000 -#elif CONFIG_TARGET_VEXPRESS64_BASE_FVP && CONFIG_NR_DRAM_BANKS == 2 +#elif CONFIG_NR_DRAM_BANKS == 2 #define PHYS_SDRAM_2 (0x880000000) #define PHYS_SDRAM_2_SIZE 0x80000000 #endif @@ -171,35 +174,22 @@ BOOTENV #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP + +#define VEXPRESS_KERNEL_ADDR 0x80080000 +#define VEXPRESS_FDT_ADDR 0x8fc00000 +#define VEXPRESS_BOOT_ADDR 0x8fd00000 +#define VEXPRESS_RAMDISK_ADDR 0x8fe00000 + #define CONFIG_EXTRA_ENV_SETTINGS \ "kernel_name=Image\0" \ - "kernel_addr=0x80080000\0" \ - "initrd_name=ramdisk.img\0" \ - "initrd_addr=0x88000000\0" \ - "fdtfile=devtree.dtb\0" \ - "fdt_addr=0x83000000\0" \ - "boot_name=boot.img\0" \ - "boot_addr=0x8007f800\0" - -#ifndef CONFIG_BOOTCOMMAND -#define CONFIG_BOOTCOMMAND "if smhload ${boot_name} ${boot_addr}; then " \ - " set bootargs; " \ - " abootimg addr ${boot_addr}; " \ - " abootimg get dtb --index=0 fdt_addr; " \ - " bootm ${boot_addr} ${boot_addr} " \ - " ${fdt_addr}; " \ - "else; " \ - " set fdt_high 0xffffffffffffffff; " \ - " set initrd_high 0xffffffffffffffff; " \ - " smhload ${kernel_name} ${kernel_addr}; " \ - " smhload ${fdtfile} ${fdt_addr}; " \ - " smhload ${initrd_name} ${initrd_addr} "\ - " initrd_end; " \ - " fdt addr ${fdt_addr}; fdt resize; " \ - " fdt chosen ${initrd_addr} ${initrd_end}; " \ - " booti $kernel_addr - $fdt_addr; " \ - "fi" -#endif + "kernel_addr_r=" __stringify(VEXPRESS_KERNEL_ADDR) "\0" \ + "ramdisk_name=ramdisk.img\0" \ + "ramdisk_addr_r=" __stringify(VEXPRESS_RAMDISK_ADDR) "\0" \ + "fdtfile=devtree.dtb\0" \ + "fdt_addr_r=" __stringify(VEXPRESS_FDT_ADDR) "\0" \ + "boot_name=boot.img\0" \ + "boot_addr_r=" __stringify(VEXPRESS_BOOT_ADDR) "\0" + #endif /* Monitor Command Prompt */ @@ -213,7 +203,7 @@ /* Store environment at top of flash in the same location as blank.img */ /* in the Juno firmware. */ #else -#define CONFIG_SYS_FLASH_BASE 0x0C000000 +#define CONFIG_SYS_FLASH_BASE (V2M_PA_BASE + 0x0C000000) /* 256 x 256KiB sectors */ #define CONFIG_SYS_MAX_FLASH_SECT 256 /* Store environment at top of flash */ @@ -230,4 +220,4 @@ #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ #define FLASH_MAX_SECTOR_SIZE 0x00040000 -#endif /* __VEXPRESS_AEMV8A_H */ +#endif /* __VEXPRESS_AEMV8_H */ diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index 990f5ed5470dd5ecd8b7de6f3218054d8373ac53..91d50bc4a0027560daf60f332f816c15dc9e7abf 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -109,8 +109,6 @@ /* Board info register */ #define SYS_ID V2M_SYSREGS -#define CONFIG_SYS_L2CACHE_OFF 1 - #define SCTL_BASE V2M_SYSCTL #define VEXPRESS_FLASHPROG_FLVPPEN (1 << 0) diff --git a/include/configs/veyron.h b/include/configs/veyron.h index 2ab6d6c6aac20592c0cc2de4a243ec74e24b976d..ce9441d71f090ab197d562fcf95aa510847af568 100644 --- a/include/configs/veyron.h +++ b/include/configs/veyron.h @@ -13,6 +13,4 @@ #include -#define CONFIG_KEYBOARD - #endif diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index 6ec39a063d76a07034da76159db95265909b7527..d90c2fa053453a0253c4d6482327bfdf08320884 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -11,8 +11,6 @@ #include #include -#define CONFIG_SYS_FSL_CLK - /* NAND support */ #ifdef CONFIG_CMD_NAND @@ -127,18 +125,6 @@ "bootz; " \ "fi;\0" -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else run netboot; fi" - /* Miscellaneous configurable options */ /* Physical memory map */ diff --git a/include/configs/vinco.h b/include/configs/vinco.h index b353c372efe99bd55b2ec2357425040ee8f26f55..7bd48820ed336adbf47069ed516720e20e0fd6e7 100644 --- a/include/configs/vinco.h +++ b/include/configs/vinco.h @@ -34,13 +34,11 @@ #ifdef CONFIG_CMD_SF #define CONFIG_ATMEL_SPI0 -#define CONFIG_SPI_FLASH_STMICRO #endif /* MMC */ #ifdef CONFIG_CMD_MMC -#define CONFIG_GENERIC_ATMEL_MCI #define ATMEL_BASE_MMCI 0xfc000000 #define CONFIG_SYS_MMC_CLK_OD 500000 @@ -60,11 +58,6 @@ /* Use our own mapping for the VInCo platform */ /* Update the bootcommand according to our mapping for the VInCo platform */ -#undef CONFIG_BOOTCOMMAND -#define CONFIG_BOOTCOMMAND "mmc dev 0 0;" \ - "mmc read ${loadaddr} ${k_offset} ${k_blksize};" \ - "mmc read ${oftaddr} ${dtb_offset} ${dtb_blksize};" \ - "bootz ${loadaddr} - ${oftaddr}" #define CONFIG_EXTRA_ENV_SETTINGS \ "kernel_start=0x20000\0" \ diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h index 58888d4caf00722e3e1d5b1f8005f253152e400e..c60da8ac12380ae06dc65a5749badec1c5c862c9 100644 --- a/include/configs/vocore2.h +++ b/include/configs/vocore2.h @@ -30,7 +30,6 @@ #define CONFIG_SYS_NS16550_CLK 40000000 #define CONFIG_SYS_NS16550_REG_SIZE -4 #define CONFIG_SYS_NS16550_COM3 0xb0000e00 -#define CONFIG_CONS_INDEX 3 /* RAM */ diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index ece762e512dff57761111136a10b73306447b076..051c18ca2326c9f8545949c007080818b8c32b1f 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -32,7 +32,6 @@ #define CONFIG_MXC_USB_FLAGS 0 /* Framebuffer */ -#define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP diff --git a/include/configs/warp.h b/include/configs/warp.h index 11a9b31671bca26aa985f08eebaa466c5ed67a52..8bdda377088fdcc633a06bc7f9d5c4dac6fc0c28 100644 --- a/include/configs/warp.h +++ b/include/configs/warp.h @@ -117,17 +117,4 @@ "bootz; " \ "fi;\0" -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev};" \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else run netboot; fi" - #endif /* __CONFIG_H */ diff --git a/include/configs/warp7.h b/include/configs/warp7.h index 00031d87c1200835b4e6b28735e4e5ef57fd3b51..83ee1784ce91c627a9ed334b2f6d91886fb1bd40 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -16,7 +16,6 @@ /* MMC Config*/ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #define CONFIG_DFU_ENV_SETTINGS \ "dfu_alt_info=boot raw 0x2 0x1000 mmcpart 1\0" \ @@ -40,12 +39,12 @@ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ "fdt_file=imx7s-warp.dtb\0" \ - "fdt_addr=" __stringify(CONFIG_SYS_FDT_ADDR)"\0" \ + "fdt_addr=0x83000000\0" \ "fdtovaddr=0x83100000\0" \ "boot_fdt=try\0" \ "ip_dyn=yes\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "rootpart=" __stringify(CONFIG_WARP7_ROOT_PART) "\0" \ "finduuid=part uuid mmc 0:${rootpart} uuid\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ @@ -83,19 +82,6 @@ "bootz; " \ "fi;\0" \ -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev};" \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "run do_bootscript_hab;" \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "fi; " \ - "fi; " \ - "fi" - /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index a45d3b4547b48bd1957ce67a77f72570e1ec8632..a43fd81e45db2ef31c2a301125fbed6cce676376 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -55,7 +55,6 @@ */ /* driver configuration */ -#define CONFIG_SYS_NAND_SELF_INIT #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_MAX_NAND_CHIPS 1 #define CONFIG_SYS_NAND_BASE MLC_NAND_BASE @@ -64,8 +63,6 @@ * GPIO */ -#define CONFIG_LPC32XX_GPIO - /* * Environment */ diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 486b5ca77658b6159bb324a76c7bbefd34ed504f..394978b9d905d78658ec3816e5a9f1b9b35e072c 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -14,8 +14,6 @@ * High Level Configuration Options * (easy to change) */ -#define CONFIG_PHYSMEM - #define CONFIG_SYS_BOOTM_LEN (16 << 20) /* SATA AHCI storage */ @@ -39,11 +37,6 @@ */ #define CONFIG_SYS_NS16550_PORT_MAPPED -#ifndef CONFIG_BOOTCOMMAND -#define CONFIG_BOOTCOMMAND \ - "ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000" -#endif - /* * Miscellaneous configurable options */ @@ -88,9 +81,14 @@ #define DISTRO_BOOTENV #endif +#ifndef SPLASH_SETTINGS +#define SPLASH_SETTINGS +#endif + #define CONFIG_EXTRA_ENV_SETTINGS \ DISTRO_BOOTENV \ CONFIG_STD_DEVICES_SETTINGS \ + SPLASH_SETTINGS \ "pciconfighost=1\0" \ "netdev=eth0\0" \ "consoledev=ttyS0\0" \ @@ -101,21 +99,4 @@ "ramdiskfile=initramfs.gz\0" -#define RAMBOOTCOMMAND \ - "setenv bootargs root=/dev/ram rw " \ - "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftpboot $kernel_addr_r $bootfile;" \ - "tftpboot $ramdisk_addr_r $ramdiskfile;" \ - "zboot $kernel_addr_r 0 $ramdisk_addr_r $filesize" - -#define NFSBOOTCOMMAND \ - "setenv bootargs root=/dev/nfs rw " \ - "nfsroot=$serverip:$rootpath " \ - "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftpboot $kernel_addr_r $bootfile;" \ - "zboot $kernel_addr_r" - - #endif /* __CONFIG_H */ diff --git a/include/configs/xea.h b/include/configs/xea.h index 5081cc8691298389e7bbb4bb2a24edda6c8e6c03..aa48bb9263192299556d85933c0d05614df0baa3 100644 --- a/include/configs/xea.h +++ b/include/configs/xea.h @@ -29,10 +29,6 @@ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (SZ_32K / 0x200) #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR (SZ_1M / 0x200) -#ifndef CONFIG_SPL_BUILD -#define CONFIG_SPI_FLASH_MTD -#endif - /* Memory configuration */ #define PHYS_SDRAM_1 0x40000000 /* Base address */ #define PHYS_SDRAM_1_SIZE 0x10000000 /* Max 256 MB RAM */ @@ -42,7 +38,6 @@ /* Booting Linux */ #define CONFIG_BOOTFILE "uImage" -#define CONFIG_BOOTCOMMAND "run ${bootpri} ; run ${bootsec}" /* Extra Environment */ #define CONFIG_HOSTNAME "xea" diff --git a/include/configs/xenguest_arm64.h b/include/configs/xenguest_arm64.h index c5e3d1678d08bcec3750e878ca8301edff675ad9..408c7b5dd695ef25ee36a65fd174a6f63e5d9779 100644 --- a/include/configs/xenguest_arm64.h +++ b/include/configs/xenguest_arm64.h @@ -11,17 +11,8 @@ #define CONFIG_EXTRA_ENV_SETTINGS -#undef CONFIG_NR_DRAM_BANKS #undef CONFIG_SYS_SDRAM_BASE -#define CONFIG_NR_DRAM_BANKS 1 - -/* - * This can be any arbitrary address as we are using PIE, but - * please note, that CONFIG_SYS_TEXT_BASE must match the below. - */ -#define CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE CONFIG_SYS_LOAD_ADDR - /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_MAXARGS 64 @@ -29,8 +20,6 @@ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_OF_SYSTEM_SETUP - #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ "loadimage=ext4load pvblock 0 0x90000000 /boot/Image;\0" \ diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h index 43486457a45d52b0e017149461f302389c62e024..03539a41b49f36f53543f203c562f85a71346008 100644 --- a/include/configs/xilinx_versal.h +++ b/include/configs/xilinx_versal.h @@ -26,8 +26,6 @@ #endif /* Serial setup */ -#define CONFIG_CPU_ARMV8 - #define CONFIG_SYS_BAUDRATE_TABLE \ { 4800, 9600, 19200, 38400, 57600, 115200 } diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index e214805787506b497adb76f02deace98d888c11c..f4b7f305bf7544b0883675367f5d4c85c2eecdd1 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -26,8 +26,6 @@ #endif /* Serial setup */ -#define CONFIG_CPU_ARMV8 - #define CONFIG_SYS_BAUDRATE_TABLE \ { 4800, 9600, 19200, 38400, 57600, 115200 } @@ -39,10 +37,6 @@ # define CONFIG_SYS_MAX_NAND_DEVICE 1 #endif -#if defined(CONFIG_SPL_BUILD) -#define CONFIG_ZYNQMP_PSU_INIT_ENABLED -#endif - /* Miscellaneous configurable options */ #if defined(CONFIG_ZYNQMP_USB) diff --git a/include/configs/xilinx_zynqmp_mini.h b/include/configs/xilinx_zynqmp_mini.h index c1064431d244709b7a1bcff37e6e0bcf5c2329d4..c3c8b4cbf90fdbdcdcd80848b6942f7b3d94401f 100644 --- a/include/configs/xilinx_zynqmp_mini.h +++ b/include/configs/xilinx_zynqmp_mini.h @@ -15,7 +15,6 @@ #include /* Undef unneeded configs */ -#undef CONFIG_BOOTCOMMAND #undef CONFIG_EXTRA_ENV_SETTINGS #undef CONFIG_SYS_INIT_SP_ADDR diff --git a/include/configs/xilinx_zynqmp_r5.h b/include/configs/xilinx_zynqmp_r5.h index 6d5b81e05e161abb4fb7523cae9be187de33f229..3ec99e062df5f8ca319e285dc783e65798d8522e 100644 --- a/include/configs/xilinx_zynqmp_r5.h +++ b/include/configs/xilinx_zynqmp_r5.h @@ -8,9 +8,6 @@ #define CONFIG_EXTRA_ENV_SETTINGS -/* CPU clock */ -#define CONFIG_CPU_FREQ_HZ 500000000 - /* Serial drivers */ /* The following table includes the supported baudrates */ #define CONFIG_SYS_BAUDRATE_TABLE \ diff --git a/include/configs/xpress.h b/include/configs/xpress.h index f6645a72940bb1041e27b21dd2e3f6ff3a88331c..6d621f24bdd6dd6bc9fbb2997943102314fdea15 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -48,8 +48,6 @@ #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_ETHPRIME "FEC" -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - #define CONFIG_UBOOT_SECTOR_START 0x2 #define CONFIG_UBOOT_SECTOR_COUNT 0x3fe @@ -64,7 +62,7 @@ "boot_fdt=try\0" \ "ip_dyn=yes\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h index ccc90a66f7d1b7e47b19de6bbb62b32809470883..c8a6e9a61af4cc8d49b26574ced75e76996b7e2b 100644 --- a/include/configs/xtfpga.h +++ b/include/configs/xtfpga.h @@ -22,9 +22,6 @@ #define CONFIG_XTFPGA -/* FPGA CPU freq after init */ -#define CONFIG_SYS_CLK_FREQ (gd->cpu_clk) - /*===================*/ /* RAM Layout */ /*===================*/ @@ -169,7 +166,7 @@ #define CONFIG_SYS_NS16550_COM1 IOADDR(0x0D050020) /* Base address */ /* Input clk to NS16550 (in Hz; the SYS_CLK_FREQ is in kHz) */ -#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_CLK_FREQ +#define CONFIG_SYS_NS16550_CLK get_board_sys_clk() /*======================*/ /* Ethernet Driver Info */ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 4de2f94b040aee4b54be6def6be8c518d8b03b66..88c6490d81cda8546cde4270873f71e405b9131e 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -9,15 +9,9 @@ #ifndef __CONFIG_ZYNQ_COMMON_H #define __CONFIG_ZYNQ_COMMON_H -/* CPU clock */ -#ifndef CONFIG_CPU_FREQ_HZ -# define CONFIG_CPU_FREQ_HZ 800000000 -#endif - #define CONFIG_REMAKE_ELF /* Cache options */ -#define CONFIG_SYS_L2CACHE_OFF #ifndef CONFIG_SYS_L2CACHE_OFF # define CONFIG_SYS_L2_PL310 # define CONFIG_SYS_PL310_BASE 0xf8f02000 diff --git a/include/dm/device.h b/include/dm/device.h index f7900417066de7c049bddd73d18049e915dae24f..cf785f7ae211c21bfa51f838b714120e75004b97 100644 --- a/include/dm/device.h +++ b/include/dm/device.h @@ -593,7 +593,7 @@ int device_get_child(const struct udevice *parent, int index, struct udevice **devp); /** - * device_get_child_count() - Get the available child count of a device + * device_get_child_count() - Get the child count of a device * * Returns the number of children to a device. * @@ -601,6 +601,15 @@ int device_get_child(const struct udevice *parent, int index, */ int device_get_child_count(const struct udevice *parent); +/** + * device_get_decendent_count() - Get the total number of decendents of a device + * + * Returns the total number of decendents, including all children + * + * @parent: Parent device to check + */ +int device_get_decendent_count(const struct udevice *parent); + /** * device_find_child_by_seq() - Find a child device based on a sequence * @@ -758,6 +767,18 @@ int device_find_first_child_by_uclass(const struct udevice *parent, enum uclass_id uclass_id, struct udevice **devp); +/** + * device_find_child_by_name() - Find a child by device name + * + * @parent: Parent device to search + * @name: Name to look for + * @len: Length of the name + * @devp: Returns device found, if any + * @return 0 if found, else -ENODEV + */ +int device_find_child_by_namelen(const struct udevice *parent, const char *name, + int len, struct udevice **devp); + /** * device_find_child_by_name() - Find a child by device name * diff --git a/include/dm/of_extra.h b/include/dm/of_extra.h index f0d205491c16f7e76f6cbd01fb5c0bd165ac5fcb..c2498aa5859c3b4859db90398841d6d5a50714fb 100644 --- a/include/dm/of_extra.h +++ b/include/dm/of_extra.h @@ -114,4 +114,18 @@ int ofnode_decode_memory_region(ofnode config_node, const char *mem_type, */ bool ofnode_phy_is_fixed_link(ofnode eth_node, ofnode *phy_node); +/** + * ofnode_eth_uses_inband_aneg() - Detect whether MAC should use in-band autoneg + * + * This function detects whether the Ethernet controller should use IEEE 802.3 + * clause 37 in-band autonegotiation for serial protocols such as 1000base-x, + * SGMII, USXGMII, etc. The property is relevant when the Ethernet controller + * is connected to an on-board PHY or an SFP cage, and is not relevant when it + * has a fixed link (in that case, in-band autoneg should not be used). + * + * @param eth_node ofnode belonging to the Ethernet controller + * @return true if in-band autoneg should be used, false otherwise + */ +bool ofnode_eth_uses_inband_aneg(ofnode eth_node); + #endif diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h index 0f680e5aa628442a05a152adf5afcc4d1ce044cc..6601bd831892312b09f4a3bcdd6e8ede5e757cc8 100644 --- a/include/dm/ofnode.h +++ b/include/dm/ofnode.h @@ -590,11 +590,11 @@ int ofnode_stringlist_search(ofnode node, const char *propname, * * @node: node to check * @propname: name of the property containing the string list - * @index: index of the string to return + * @index: index of the string to return (cannot be negative) * @lenp: return location for the string length or an error code on failure * * @return: - * length of string, if found or -ve error value if not found + * 0 if found or -ve error value if not found */ int ofnode_read_string_index(ofnode node, const char *propname, int index, const char **outp); @@ -609,6 +609,26 @@ int ofnode_read_string_index(ofnode node, const char *propname, int index, */ int ofnode_read_string_count(ofnode node, const char *property); +/** + * ofnode_read_string_list() - read a list of strings + * + * This produces a list of string pointers with each one pointing to a string + * in the string list. If the property does not exist, it returns {NULL}. + * + * The data is allocated and the caller is reponsible for freeing the return + * value (the list of string pointers). The strings themselves may not be + * changed as they point directly into the devicetree property. + * + * @node: node to check + * @listp: returns an allocated, NULL-terminated list of strings if the return + * value is > 0, else is set to NULL + * @return number of strings in list, 0 if none, -ENOMEM if out of memory, + * -EINVAL if no such property, -EENODATA if property is empty + * @return: NULL-terminated list of strings (NULL if no property or empty) + */ +int ofnode_read_string_list(ofnode node, const char *property, + const char ***listp); + /** * ofnode_parse_phandle_with_args() - Find a node pointed by phandle in a list * diff --git a/include/dm/pinctrl.h b/include/dm/pinctrl.h index 695e78ad0de6e70952fbdd4c263c8d0442374670..8b869c4fbfb7d87a307eb10ce5e8cd9b733ac2c0 100644 --- a/include/dm/pinctrl.h +++ b/include/dm/pinctrl.h @@ -495,7 +495,7 @@ int pinctrl_generic_set_state(struct udevice *pctldev, struct udevice *config); static inline int pinctrl_generic_set_state(struct udevice *pctldev, struct udevice *config) { - return -EINVAL; + return -ENOSYS; } #endif @@ -512,7 +512,7 @@ int pinctrl_select_state(struct udevice *dev, const char *statename); static inline int pinctrl_select_state(struct udevice *dev, const char *statename) { - return -EINVAL; + return -ENOSYS; } #endif diff --git a/include/dm/read.h b/include/dm/read.h index 890bf3d8472b40853d38cb158050367d51245ba7..75c6ad6ee49e452f0eed11f40be0ad79cedc70c6 100644 --- a/include/dm/read.h +++ b/include/dm/read.h @@ -371,6 +371,27 @@ int dev_read_string_index(const struct udevice *dev, const char *propname, * number of strings in the list, or -ve error value if not found */ int dev_read_string_count(const struct udevice *dev, const char *propname); + +/** + * dev_read_string_list() - read a list of strings + * + * This produces a list of string pointers with each one pointing to a string + * in the string list. If the property does not exist, it returns {NULL}. + * + * The data is allocated and the caller is reponsible for freeing the return + * value (the list of string pointers). The strings themselves may not be + * changed as they point directly into the devicetree property. + * + * @dev: device to examine + * @propname: name of the property containing the string list + * @listp: returns an allocated, NULL-terminated list of strings if the return + * value is > 0, else is set to NULL + * @return number of strings in list, 0 if none, -ENOMEM if out of memory, + * -ENOENT if no such property + */ +int dev_read_string_list(const struct udevice *dev, const char *propname, + const char ***listp); + /** * dev_read_phandle_with_args() - Find a node pointed by phandle in a list * @@ -906,6 +927,13 @@ static inline int dev_read_string_count(const struct udevice *dev, return ofnode_read_string_count(dev_ofnode(dev), propname); } +static inline int dev_read_string_list(const struct udevice *dev, + const char *propname, + const char ***listp) +{ + return ofnode_read_string_list(dev_ofnode(dev), propname, listp); +} + static inline int dev_read_phandle_with_args(const struct udevice *dev, const char *list_name, const char *cells_name, int cell_count, int index, struct ofnode_phandle_args *out_args) diff --git a/include/dm/root.h b/include/dm/root.h index 42510b106abec51192ac70508bcf1ad03b05acaa..780f269db658852a8bcedd01b1bee00f5f854856 100644 --- a/include/dm/root.h +++ b/include/dm/root.h @@ -131,4 +131,12 @@ int dm_remove_devices_flags(uint flags); static inline int dm_remove_devices_flags(uint flags) { return 0; } #endif +/** + * dm_get_stats() - Get some stats for driver mode + * + * @device_countp: Returns total number of devices that are bound + * @uclass_countp: Returns total number of uclasses in use + */ +void dm_get_stats(int *device_countp, int *uclass_countp); + #endif diff --git a/include/dm/uclass-internal.h b/include/dm/uclass-internal.h index 57c664c6daac88a94f0c26db444abecae7417212..fb0edcc296990e32f5972e94c2f1d982eb7ed508 100644 --- a/include/dm/uclass-internal.h +++ b/include/dm/uclass-internal.h @@ -243,6 +243,17 @@ int uclass_find_device_by_phandle(enum uclass_id id, struct udevice *parent, */ int uclass_bind_device(struct udevice *dev); +#if CONFIG_IS_ENABLED(DM_DEVICE_REMOVE) +/** + * uclass_pre_unbind_device() - Prepare to deassociate device with a uclass + * + * Call any handled needed before uclass_unbind_device() is called + * + * @dev: Pointer to the device + * #return 0 on success, -ve on error + */ +int uclass_pre_unbind_device(struct udevice *dev); + /** * uclass_unbind_device() - Deassociate device with a uclass * @@ -251,9 +262,10 @@ int uclass_bind_device(struct udevice *dev); * @dev: Pointer to the device * #return 0 on success, -ve on error */ -#if CONFIG_IS_ENABLED(DM_DEVICE_REMOVE) int uclass_unbind_device(struct udevice *dev); + #else +static inline int uclass_pre_unbind_device(struct udevice *dev) { return 0; } static inline int uclass_unbind_device(struct udevice *dev) { return 0; } #endif @@ -294,6 +306,13 @@ int uclass_pre_remove_device(struct udevice *dev); static inline int uclass_pre_remove_device(struct udevice *dev) { return 0; } #endif +/** + * uclass_get_count() - Get the number of uclasses + * + * Returns the number of uclasses instantiated in driver model + */ +int uclass_get_count(void); + /** * uclass_find() - Find uclass by its id * diff --git a/include/dm/uclass.h b/include/dm/uclass.h index 15e5f9ef5bcd9a60a9f1e62d848d68bad599f78a..f1fd2ba246315b35dedebe4c919d0d4abd8f4228 100644 --- a/include/dm/uclass.h +++ b/include/dm/uclass.h @@ -172,6 +172,15 @@ int uclass_get(enum uclass_id key, struct uclass **ucp); */ const char *uclass_get_name(enum uclass_id id); +/** + * uclass_get_by_name() - Look up a uclass by its driver name + * + * @name: Name to look up + * @len: Length of name + * @returns the associated uclass ID, or UCLASS_INVALID if not found + */ +enum uclass_id uclass_get_by_name_len(const char *name, int len); + /** * uclass_get_by_name() - Look up a uclass by its driver name * @@ -416,6 +425,14 @@ int uclass_first_device_drvdata(enum uclass_id id, ulong driver_data, */ int uclass_probe_all(enum uclass_id id); +/** + * uclass_id_count() - Count the number of devices in a uclass + * + * @id: uclass ID to look up + * @return number of devices in that uclass (0 if none) + */ +int uclass_id_count(enum uclass_id id); + /** * uclass_id_foreach_dev() - Helper function to iteration through devices * diff --git a/include/dt-bindings/clock/bcm2835.h b/include/dt-bindings/clock/bcm2835.h index 2cec01f968979bf99c9e23be69b1085202e73d0a..b60c03430cf1573d208801974de22f198765ed21 100644 --- a/include/dt-bindings/clock/bcm2835.h +++ b/include/dt-bindings/clock/bcm2835.h @@ -58,3 +58,5 @@ #define BCM2835_CLOCK_DSI1E 48 #define BCM2835_CLOCK_DSI0P 49 #define BCM2835_CLOCK_DSI1P 50 + +#define BCM2711_CLOCK_EMMC2 51 diff --git a/include/efi.h b/include/efi.h index 1432038838a6281d6518a321d4a95fad78a95083..877a2e5a8d319268a4ef9e9ceeeeb519156a62ee 100644 --- a/include/efi.h +++ b/include/efi.h @@ -400,15 +400,37 @@ static inline struct efi_mem_desc *efi_get_next_mem_desc( return (struct efi_mem_desc *)((ulong)desc + map->desc_size); } +/** + * struct efi_priv - Information about the environment provided by EFI + * + * @parent_image: image passed into the EFI app or stub + * @sys_table: Pointer to system table + * @boot: Pointer to boot-services table + * @run: Pointer to runtime-services table + * + * @use_pool_for_malloc: true if all allocation should go through the EFI 'pool' + * methods allocate_pool() and free_pool(); false to use 'pages' methods + * allocate_pages() and free_pages() + * @ram_base: Base address of RAM (size CONFIG_EFI_RAM_SIZE) + * @image_data_type: Type of the loaded image (e.g. EFI_LOADER_CODE) + * + * @info: Header of the info list, holding info collected by the stub and passed + * to U-Boot + * @info_size: Size of the info list @info in bytes + * @next_hdr: Pointer to where to put the next header when adding to the list + */ struct efi_priv { efi_handle_t parent_image; - struct efi_device_path *device_path; struct efi_system_table *sys_table; struct efi_boot_services *boot; struct efi_runtime_services *run; + + /* app: */ bool use_pool_for_malloc; unsigned long ram_base; unsigned int image_data_type; + + /* stub: */ struct efi_info_hdr *info; unsigned int info_size; void *next_hdr; @@ -419,10 +441,12 @@ struct efi_priv { * * @handle: handle of the controller on which this driver is installed * @blkio: block io protocol proxied by this driver + * @device_path: EFI path to the device */ struct efi_media_plat { - efi_handle_t handle; - struct efi_block_io *blkio; + efi_handle_t handle; + struct efi_block_io *blkio; + struct efi_device_path *device_path; }; /* Base address of the EFI image */ @@ -450,6 +474,27 @@ extern char _binary_u_boot_bin_start[], _binary_u_boot_bin_end[]; EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS | \ EFI_VARIABLE_APPEND_WRITE) +/** + * efi_get_priv() - Get access to the EFI-private information + * + * This struct it used by both the stub and the app to record things about the + * EFI environment. It is not available in U-Boot proper after the stub has + * jumped there. Use efi_info_get() to obtain info in that case. + * + * Return: pointer to private info + */ +struct efi_priv *efi_get_priv(void); + +/** + * efi_set_priv() - Set up a pointer to the EFI-private information + * + * This is called in the stub and app to record the location of this + * information. + * + * @priv: New location of private data + */ +void efi_set_priv(struct efi_priv *priv); + /** * efi_get_sys_table() - Get access to the main EFI system table * @@ -521,6 +566,10 @@ void efi_putc(struct efi_priv *priv, const char ch); /** * efi_info_get() - get an entry from an EFI table * + * This function is called from U-Boot proper to read information set up by the + * EFI stub. It can only be used when running from the EFI stub, not when U-Boot + * is running as an app. + * * @type: Entry type to search for * @datap: Returns pointer to entry data * @sizep: Returns pointer to entry size diff --git a/include/efi_api.h b/include/efi_api.h index 80109f012bc7c3527ca47aaae3b781053b9060f3..ec9fa89a935ff855eacc03264c19752d8beac617 100644 --- a/include/efi_api.h +++ b/include/efi_api.h @@ -2035,4 +2035,19 @@ struct efi_firmware_management_protocol { const u16 *package_version_name); }; +#define EFI_DISK_IO_PROTOCOL_GUID \ + EFI_GUID(0xce345171, 0xba0b, 0x11d2, 0x8e, 0x4f, \ + 0x00, 0xa0, 0xc9, 0x69, 0x72, 0x3b) + +struct efi_disk { + u64 revision; + efi_status_t (EFIAPI *read_disk)(struct efi_disk *this, u32 media_id, + u64 offset, efi_uintn_t buffer_size, + void *buffer); + + efi_status_t (EFIAPI *write_disk)(struct efi_disk *this, u32 media_id, + u64 offset, efi_uintn_t buffer_size, + void *buffer); +}; + #endif diff --git a/include/env.h b/include/env.h index ee5e30d036d401ce81a1fc157cf1c702cb8c29c9..ff8943ed96c62284afd724d5a7f0513573b91eab 100644 --- a/include/env.h +++ b/include/env.h @@ -133,6 +133,13 @@ int env_get_f(const char *name, char *buf, unsigned int len); */ int env_get_yesno(const char *var); +/** + * env_get_autostart() - Check if autostart is enabled + * + * @return true if the "autostart" env var exists and is set to "yes" + */ +bool env_get_autostart(void); + /** * env_set() - set an environment variable * diff --git a/include/env_default.h b/include/env_default.h index 23430dc70d7fd12074f7c1b1280dc8036e5798e4..21afd7f7dcff90ce02f9bbbf26fc559090177a06 100644 --- a/include/env_default.h +++ b/include/env_default.h @@ -10,6 +10,10 @@ #include #include +#ifndef USE_HOSTCC +#include +#endif + #ifdef DEFAULT_ENV_INSTANCE_EMBEDDED env_t embedded_environment __UBOOT_ENV_SECTION__(environment) = { ENV_CRC, /* CRC Sum */ @@ -37,12 +41,6 @@ const char default_environment[] = { #ifdef CONFIG_BOOTCOMMAND "bootcmd=" CONFIG_BOOTCOMMAND "\0" #endif -#ifdef CONFIG_RAMBOOTCOMMAND - "ramboot=" CONFIG_RAMBOOTCOMMAND "\0" -#endif -#ifdef CONFIG_NFSBOOTCOMMAND - "nfsboot=" CONFIG_NFSBOOTCOMMAND "\0" -#endif #if defined(CONFIG_BOOTDELAY) "bootdelay=" __stringify(CONFIG_BOOTDELAY) "\0" #endif @@ -110,6 +108,13 @@ const char default_environment[] = { #if defined(CONFIG_BOOTCOUNT_BOOTLIMIT) && (CONFIG_BOOTCOUNT_BOOTLIMIT > 0) "bootlimit=" __stringify(CONFIG_BOOTCOUNT_BOOTLIMIT)"\0" #endif +#ifdef CONFIG_EXTRA_ENV_TEXT +# ifdef CONFIG_EXTRA_ENV_SETTINGS +# error "Your board uses a text-file environment, so must not define CONFIG_EXTRA_ENV_SETTINGS" +# endif + /* This is created in the Makefile */ + CONFIG_EXTRA_ENV_TEXT +#endif #ifdef CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_SETTINGS #endif diff --git a/include/faraday/ftwdt010_wdt.h b/include/faraday/ftwdt010_wdt.h index 20bf6d3125250d91dee3bce90c7c406bef9036a6..804907d64558df3f5cc2dddf7e56d23251eded75 100644 --- a/include/faraday/ftwdt010_wdt.h +++ b/include/faraday/ftwdt010_wdt.h @@ -16,6 +16,8 @@ #ifndef __FTWDT010_H #define __FTWDT010_H +#include + struct ftwdt010_wdt { unsigned int wdcounter; /* Counter Reg - 0x00 */ unsigned int wdload; /* Counter Auto Reload Reg - 0x04 */ @@ -82,10 +84,10 @@ struct ftwdt010_wdt { /* * Variable timeout should be set in ms. - * (CONFIG_SYS_CLK_FREQ/1000) equals 1 ms. + * (get_board_sys_clk()/1000) equals 1 ms. * WDLOAD = timeout * TIMEOUT_FACTOR. */ -#define FTWDT010_TIMEOUT_FACTOR (CONFIG_SYS_CLK_FREQ / 1000) /* 1 ms */ +#define FTWDT010_TIMEOUT_FACTOR (get_board_sys_clk() / 1000) /* 1 ms */ void ftwdt010_wdt_reset(void); void ftwdt010_wdt_disable(void); diff --git a/include/fdt_region.h b/include/fdt_region.h index ff7a1ccb9afab9be8a429485908b44355e53f65e..d0c68760f7870b75e06575ed212af0d1dbf8cd5d 100644 --- a/include/fdt_region.h +++ b/include/fdt_region.h @@ -77,6 +77,7 @@ struct fdt_region_state { int max_regions; /* Maximum regions to find */ int can_merge; /* 1 if we can merge with previous region */ int start; /* Start position of current region */ + bool have_node; /* True if any node is included */ struct fdt_region_ptrs ptrs; /* Pointers for what we are up to */ }; diff --git a/include/fdt_simplefb.h b/include/fdt_simplefb.h index 7cc305e1fd5efb8afc1dbb9ffa4641f5e1ac0e2f..41cd740ac05731bea67185dbb1f0f2fc4860170b 100644 --- a/include/fdt_simplefb.h +++ b/include/fdt_simplefb.h @@ -8,6 +8,7 @@ #ifndef _FDT_SIMPLEFB_H_ #define _FDT_SIMPLEFB_H_ -int lcd_dt_simplefb_add_node(void *blob); -int lcd_dt_simplefb_enable_existing_node(void *blob); +int fdt_simplefb_add_node(void *blob); +int fdt_simplefb_enable_existing_node(void *blob); +int fdt_simplefb_enable_and_mem_rsv(void *blob); #endif diff --git a/include/fdt_support.h b/include/fdt_support.h index 88d129c8038781c85852f38668a0fca12125e6ef..8ec461af6c3d74387806c7007703cc1ddf539c0b 100644 --- a/include/fdt_support.h +++ b/include/fdt_support.h @@ -228,6 +228,8 @@ void set_working_fdt_addr(ulong addr); int fdt_shrink_to_minimum(void *blob, uint extrasize); int fdt_increase_size(void *fdt, int add_len); +int fdt_delete_disabled_nodes(void *blob); + int fdt_fixup_nor_flash_size(void *blob); struct node_info; @@ -285,9 +287,13 @@ int fdt_get_dma_range(const void *blob, int node_offset, phys_addr_t *cpu, int fdt_node_offset_by_compat_reg(void *blob, const char *compat, phys_addr_t compat_off); -int fdt_alloc_phandle(void *blob); +int fdt_node_offset_by_pathf(void *blob, const char *fmt, ...) + __attribute__ ((format (printf, 2, 3))); int fdt_set_phandle(void *fdt, int nodeoffset, uint32_t phandle); unsigned int fdt_create_phandle(void *fdt, int nodeoffset); +unsigned int fdt_create_phandle_by_compatible(void *fdt, const char *compat); +unsigned int fdt_create_phandle_by_pathf(void *fdt, const char *fmt, ...) + __attribute__ ((format (printf, 2, 3))); int fdt_add_edid(void *blob, const char *compat, unsigned char *buf); int fdt_verify_alias_address(void *fdt, int anode, const char *alias, @@ -300,38 +306,61 @@ enum fdt_status { FDT_STATUS_OKAY, FDT_STATUS_DISABLED, FDT_STATUS_FAIL, - FDT_STATUS_FAIL_ERROR_CODE, }; -int fdt_set_node_status(void *fdt, int nodeoffset, - enum fdt_status status, unsigned int error_code); +int fdt_set_node_status(void *fdt, int nodeoffset, enum fdt_status status); static inline int fdt_status_okay(void *fdt, int nodeoffset) { - return fdt_set_node_status(fdt, nodeoffset, FDT_STATUS_OKAY, 0); + return fdt_set_node_status(fdt, nodeoffset, FDT_STATUS_OKAY); } static inline int fdt_status_disabled(void *fdt, int nodeoffset) { - return fdt_set_node_status(fdt, nodeoffset, FDT_STATUS_DISABLED, 0); + return fdt_set_node_status(fdt, nodeoffset, FDT_STATUS_DISABLED); } static inline int fdt_status_fail(void *fdt, int nodeoffset) { - return fdt_set_node_status(fdt, nodeoffset, FDT_STATUS_FAIL, 0); + return fdt_set_node_status(fdt, nodeoffset, FDT_STATUS_FAIL); } int fdt_set_status_by_alias(void *fdt, const char *alias, - enum fdt_status status, unsigned int error_code); + enum fdt_status status); static inline int fdt_status_okay_by_alias(void *fdt, const char *alias) { - return fdt_set_status_by_alias(fdt, alias, FDT_STATUS_OKAY, 0); + return fdt_set_status_by_alias(fdt, alias, FDT_STATUS_OKAY); } static inline int fdt_status_disabled_by_alias(void *fdt, const char *alias) { - return fdt_set_status_by_alias(fdt, alias, FDT_STATUS_DISABLED, 0); + return fdt_set_status_by_alias(fdt, alias, FDT_STATUS_DISABLED); } static inline int fdt_status_fail_by_alias(void *fdt, const char *alias) { - return fdt_set_status_by_alias(fdt, alias, FDT_STATUS_FAIL, 0); + return fdt_set_status_by_alias(fdt, alias, FDT_STATUS_FAIL); } +int fdt_set_status_by_compatible(void *fdt, const char *compat, + enum fdt_status status); +static inline int fdt_status_okay_by_compatible(void *fdt, const char *compat) +{ + return fdt_set_status_by_compatible(fdt, compat, FDT_STATUS_OKAY); +} +static inline int fdt_status_disabled_by_compatible(void *fdt, + const char *compat) +{ + return fdt_set_status_by_compatible(fdt, compat, FDT_STATUS_DISABLED); +} +static inline int fdt_status_fail_by_compatible(void *fdt, const char *compat) +{ + return fdt_set_status_by_compatible(fdt, compat, FDT_STATUS_FAIL); +} + +int fdt_set_status_by_pathf(void *fdt, enum fdt_status status, const char *fmt, + ...) __attribute__ ((format (printf, 3, 4))); +#define fdt_status_okay_by_pathf(fdt, fmt, ...) \ + fdt_set_status_by_pathf((fdt), FDT_STATUS_OKAY, (fmt), ##__VA_ARGS__) +#define fdt_status_disabled_by_pathf(fdt, fmt, ...) \ + fdt_set_status_by_pathf((fdt), FDT_STATUS_DISABLED, (fmt), ##__VA_ARGS__) +#define fdt_status_fail_by_pathf(fdt, fmt, ...) \ + fdt_set_status_by_pathf((fdt), FDT_STATUS_FAIL, (fmt), ##__VA_ARGS__) + /* Helper to read a big number; size is in cells (not bytes) */ static inline u64 fdt_read_number(const fdt32_t *cell, int size) { diff --git a/include/fdtdec.h b/include/fdtdec.h index 6c7ab887b207b84925f6052f16798d1429eda87e..09525ce510aa698641dc5fc0723be81e7412509c 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -55,6 +55,31 @@ struct bd_info; #define SPL_BUILD 0 #endif +/** + * enum fdt_source_t - indicates where the devicetree came from + * + * These are listed in approximate order of desirability after FDTSRC_NONE + * + * @FDTSRC_SEPARATE: Appended to U-Boot. This is the normal approach if U-Boot + * is the only firmware being booted + * @FDTSRC_FIT: Found in a multi-dtb FIT. This should be used when U-Boot must + * select a devicetree from many options + * @FDTSRC_BOARD: Located by custom board code. This should only be used when + * the prior stage does not support FDTSRC_PASSAGE + * @FDTSRC_EMBED: Embedded into U-Boot executable. This should onyl be used when + * U-Boot is packaged as an ELF file, e.g. for debugging purposes + * @FDTSRC_ENV: Provided by the fdtcontroladdr environment variable. This should + * be used for debugging/development only + * @FDTSRC_NONE: No devicetree at all + */ +enum fdt_source_t { + FDTSRC_SEPARATE, + FDTSRC_FIT, + FDTSRC_BOARD, + FDTSRC_EMBED, + FDTSRC_ENV, +}; + /* * Information about a resource. start is the first address of the resource * and end is the last address (inclusive). The length of the resource will @@ -111,6 +136,20 @@ struct fdt_pci_addr { extern u8 __dtb_dt_begin[]; /* embedded device tree blob */ extern u8 __dtb_dt_spl_begin[]; /* embedded device tree blob for SPL/TPL */ +/* Get a pointer to the embedded devicetree, if there is one, else NULL */ +static inline u8 *dtb_dt_embedded(void) +{ +#ifdef CONFIG_OF_EMBED +# ifdef CONFIG_SPL_BUILD + return __dtb_dt_spl_begin; +# else + return __dtb_dt_begin; +# endif +#else + return NULL; +#endif +} + /** * Compute the size of a resource. * @@ -1156,10 +1195,13 @@ int fdtdec_resetup(int *rescan); /** * Board-specific FDT initialization. Returns the address to a device tree blob. - * Called when CONFIG_OF_BOARD is defined, or if CONFIG_OF_SEPARATE is defined - * and the board implements it. + * + * Called when CONFIG_OF_BOARD is defined. + * + * The existing devicetree is available at gd->fdt_blob * * @err internal error code if we fail to setup a DTB + * @returns new devicetree blob pointer */ void *board_fdt_blob_setup(int *err); @@ -1198,4 +1240,11 @@ int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id, phys_addr_t *basep, phys_size_t *sizep, struct bd_info *bd); +/** + * fdtdec_get_srcname() - Get the name of where the devicetree comes from + * + * @return source name + */ +const char *fdtdec_get_srcname(void); + #endif diff --git a/include/init.h b/include/init.h index f2cd46dead0433cc0bd4aa89e1ff3535df0274e2..dcd682c1bf6756fbee4901c8946117b04f94fd69 100644 --- a/include/init.h +++ b/include/init.h @@ -14,8 +14,11 @@ #include -/* Avoid using CONFIG_EFI_STUB directly as we may boot from other loaders */ -#ifdef CONFIG_EFI_STUB +/* + * In case of the EFI app the UEFI firmware provides the low-level + * initialisation. + */ +#ifdef CONFIG_EFI #define ll_boot_init() false #else #include diff --git a/include/linux/byteorder/swab.h b/include/linux/byteorder/swab.h index 4334fa77e3f6469f7f4d555e0407a4de98c30670..5efc252acfc4e5ea8793acc936537db30c39810f 100644 --- a/include/linux/byteorder/swab.h +++ b/include/linux/byteorder/swab.h @@ -39,6 +39,10 @@ (__u64)(((__u64)(x) & (__u64)0x00ff000000000000ULL) >> 40) | \ (__u64)(((__u64)(x) & (__u64)0xff00000000000000ULL) >> 56) )) +#define ___constant_swab16(x) ___swab16(x) +#define ___constant_swab32(x) ___swab32(x) +#define ___constant_swab64(x) ___swab64(x) + /* * provide defaults when no architecture-specific optimization is detected */ diff --git a/include/linux/if_vlan.h b/include/linux/if_vlan.h new file mode 100644 index 0000000000000000000000000000000000000000..cbc82f4cc217bd9cf86f23d3b9775db23b80c31e --- /dev/null +++ b/include/linux/if_vlan.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * VLAN An implementation of 802.1Q VLAN tagging. + * + * Authors: Ben Greear + */ +#ifndef _LINUX_IF_VLAN_H_ +#define _LINUX_IF_VLAN_H_ + +/** + * struct vlan_ethhdr - vlan ethernet header (ethhdr + vlan_hdr) + * @h_dest: destination ethernet address + * @h_source: source ethernet address + * @h_vlan_proto: ethernet protocol + * @h_vlan_TCI: priority and VLAN ID + * @h_vlan_encapsulated_proto: packet type ID or len + */ +struct vlan_ethhdr { + unsigned char h_dest[ETH_ALEN]; + unsigned char h_source[ETH_ALEN]; + __be16 h_vlan_proto; + __be16 h_vlan_TCI; + __be16 h_vlan_encapsulated_proto; +}; + +#endif /* !(_LINUX_IF_VLAN_H_) */ diff --git a/include/mpc85xx.h b/include/mpc85xx.h index ce6d083effa051b2730de9c711d55a4f6cceaa20..2c69a60de63ff060c75895d288d878b3a1b3d8e8 100644 --- a/include/mpc85xx.h +++ b/include/mpc85xx.h @@ -60,8 +60,4 @@ CONFIG_SYS_CCSRBAR_PHYS_LOW and/or CONFIG_SYS_CCSRBAR_PHYS_HIGH instead." #define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH * 1ull) << 32 | \ CONFIG_SYS_CCSRBAR_PHYS_LOW) -#ifndef CONFIG_SYS_IMMR -#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR -#endif - #endif /* __MPC85xx_H__ */ diff --git a/include/nand.h b/include/nand.h index 09dbda4e81b22cf7071dc003cdf3e2e805329443..70c1286ccb406e3a801f882ef43b5ffe2afd956f 100644 --- a/include/nand.h +++ b/include/nand.h @@ -10,22 +10,6 @@ #include -/* - * All boards using a given driver must convert to self-init - * at the same time, so do it here. When all drivers are - * converted, this will go away. - */ -#ifdef CONFIG_SPL_BUILD -#if defined(CONFIG_NAND_FSL_ELBC) || defined(CONFIG_NAND_FSL_IFC) -#define CONFIG_SYS_NAND_SELF_INIT -#endif -#else -#if defined(CONFIG_NAND_FSL_ELBC) || defined(CONFIG_NAND_ATMEL)\ - || defined(CONFIG_NAND_FSL_IFC) -#define CONFIG_SYS_NAND_SELF_INIT -#endif -#endif - extern void nand_init(void); unsigned long nand_size(void); @@ -34,7 +18,7 @@ unsigned long nand_size(void); int nand_mtd_to_devnum(struct mtd_info *mtd); -#ifdef CONFIG_SYS_NAND_SELF_INIT +#if CONFIG_IS_ENABLED(SYS_NAND_SELF_INIT) void board_nand_init(void); int nand_register(int devnum, struct mtd_info *mtd); #else diff --git a/include/net/dsa.h b/include/net/dsa.h index a339a49730335623a4ecd0c3b0d049702c06b9f7..1b1068cd88ce3728d022de96d3e519798486e47b 100644 --- a/include/net/dsa.h +++ b/include/net/dsa.h @@ -6,6 +6,7 @@ #ifndef __DSA_H__ #define __DSA_H__ +#include #include #include @@ -145,6 +146,17 @@ int dsa_set_tagging(struct udevice *dev, ushort headroom, ushort tailroom); */ struct udevice *dsa_get_master(struct udevice *dev); +/** + * dsa_port_get_ofnode() - Return a reference to the given port's OF node + * + * Can be called at driver probe time or later. + * + * @dev: DSA switch udevice pointer + * @port: Port index + * @return OF node reference if OK, NULL on error + */ +ofnode dsa_port_get_ofnode(struct udevice *dev, int port); + /** * dsa_port_get_pdata() - Helper that returns the platdata of an active * (non-CPU) DSA port device. diff --git a/include/os.h b/include/os.h index 770d76e02f7e1aa02219ec61aa71cce0ce0fc5a4..4cbcbd93a71ad0e1d2b4ec2264fd0366906a6c0b 100644 --- a/include/os.h +++ b/include/os.h @@ -419,6 +419,15 @@ int os_read_file(const char *name, void **bufp, int *sizep); */ int os_map_file(const char *pathname, int os_flags, void **bufp, int *sizep); +/** + * os_unmap() - Unmap a file previously mapped + * + * @buf: Mapped address + * @size: Size in bytes + * Return: 0 if OK, -ve on error + */ +int os_unmap(void *buf, int size); + /* * os_find_text_base() - Find the text section in this running process * diff --git a/include/pci.h b/include/pci.h index 797f224e2fc4d3851622bec9ac23d0b4585ff4a8..6c1094d729982630d7f934160a2bb1af8955bd3d 100644 --- a/include/pci.h +++ b/include/pci.h @@ -522,6 +522,32 @@ #include +/* + * Enhanced Configuration Access Mechanism (ECAM) + * + * See PCI Express Base Specification, Revision 5.0, Version 1.0, + * Section 7.2.2, Table 7-1, p. 677. + */ +#define PCIE_ECAM_BUS_SHIFT 20 /* Bus number */ +#define PCIE_ECAM_DEV_SHIFT 15 /* Device number */ +#define PCIE_ECAM_FUNC_SHIFT 12 /* Function number */ + +#define PCIE_ECAM_BUS_MASK 0xff +#define PCIE_ECAM_DEV_MASK 0x1f +#define PCIE_ECAM_FUNC_MASK 0x7 +#define PCIE_ECAM_REG_MASK 0xfff /* Limit offset to a maximum of 4K */ + +#define PCIE_ECAM_BUS(x) (((x) & PCIE_ECAM_BUS_MASK) << PCIE_ECAM_BUS_SHIFT) +#define PCIE_ECAM_DEV(x) (((x) & PCIE_ECAM_DEV_MASK) << PCIE_ECAM_DEV_SHIFT) +#define PCIE_ECAM_FUNC(x) (((x) & PCIE_ECAM_FUNC_MASK) << PCIE_ECAM_FUNC_SHIFT) +#define PCIE_ECAM_REG(x) ((x) & PCIE_ECAM_REG_MASK) + +#define PCIE_ECAM_OFFSET(bus, dev, func, where) \ + (PCIE_ECAM_BUS(bus) | \ + PCIE_ECAM_DEV(dev) | \ + PCIE_ECAM_FUNC(func) | \ + PCIE_ECAM_REG(where)) + #ifndef __ASSEMBLY__ #include diff --git a/include/pci_ids.h b/include/pci_ids.h index 7ecedc7f04cff62ea61228790d56111b164b5175..3c5434c0eda89590906cba1306d774ef63394d66 100644 --- a/include/pci_ids.h +++ b/include/pci_ids.h @@ -151,6 +151,9 @@ #define PCI_DEVICE_ID_BERKOM_A4T 0xffa4 #define PCI_DEVICE_ID_BERKOM_SCITEL_QUADRO 0xffa8 +#define PCI_VENDOR_ID_BROADCOM 0x14e4 +#define PCI_DEVICE_ID_NXT_57320 0x16F0 + #define PCI_VENDOR_ID_COMPAQ 0x0e11 #define PCI_DEVICE_ID_COMPAQ_TOKENRING 0x0508 #define PCI_DEVICE_ID_COMPAQ_TACHYON 0xa0fc diff --git a/include/sandboxblockdev.h b/include/sandboxblockdev.h index 4006e942a028c2d15022ad8bb05c22886c75e28d..4ca9554e38a0354ac17d3b8d57c35dd20ace6595 100644 --- a/include/sandboxblockdev.h +++ b/include/sandboxblockdev.h @@ -6,6 +6,9 @@ #ifndef __SANDBOX_BLOCK_DEV__ #define __SANDBOX_BLOCK_DEV__ +/* Maximum number of host devices - see drivers/block/sandbox.c */ +#define SANDBOX_HOST_MAX_DEVICES 4 + struct host_block_dev { #ifndef CONFIG_BLK struct blk_desc blk_dev; diff --git a/include/scmi_agent.h b/include/scmi_agent.h index f1be9ff2091207c4e13dcb280486f99b7fee5af5..ed40c7360a933619d67e3f71332d0778044c7a47 100644 --- a/include/scmi_agent.h +++ b/include/scmi_agent.h @@ -45,9 +45,9 @@ struct scmi_msg { } /** - * scmi_send_and_process_msg() - send and process a SCMI message + * devm_scmi_process_msg() - Send and process an SCMI message * - * Send a message to a SCMI server through a target SCMI agent device. + * Send a message to an SCMI server through a target SCMI agent device. * Caller sets scmi_msg::out_msg_sz to the output message buffer size. * On return, scmi_msg::out_msg_sz stores the response payload size. * diff --git a/include/spi_flash.h b/include/spi_flash.h index 4d4ae89c192111914045444990ae9e81f2f8a509..4566feab6313be80204a183fbf1a702479c4b976 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -14,20 +14,6 @@ struct udevice; -/* by default ENV use the same parameters than SF command */ -#ifndef CONFIG_ENV_SPI_BUS -# define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS -#endif -#ifndef CONFIG_ENV_SPI_CS -# define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS -#endif -#ifndef CONFIG_ENV_SPI_MAX_HZ -# define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED -#endif -#ifndef CONFIG_ENV_SPI_MODE -# define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE -#endif - struct spi_slave; struct dm_spi_flash_ops { diff --git a/include/splash.h b/include/splash.h index 7fd2de8fea1dd582f5b6f9e936d86b764bde6ec4..33e45e6941632dcbc93c663d53de6d18426b41b7 100644 --- a/include/splash.h +++ b/include/splash.h @@ -30,6 +30,7 @@ enum splash_storage { SPLASH_STORAGE_MMC, SPLASH_STORAGE_USB, SPLASH_STORAGE_SATA, + SPLASH_STORAGE_VIRTIO, }; enum splash_flags { diff --git a/include/tee.h b/include/tee.h index 087810bd12e4215b56085be30f5e6d55ef120591..13f6096b9a638663b4b296f44b416a208f056d6b 100644 --- a/include/tee.h +++ b/include/tee.h @@ -31,6 +31,25 @@ #define TEE_PARAM_ATTR_MASK (TEE_PARAM_ATTR_TYPE_MASK | \ TEE_PARAM_ATTR_META) +/* + * Global Platform login identifiers for tee_open_session_arg::clnt_login + */ +#define TEE_LOGIN_PUBLIC 0x00000000 +#define TEE_LOGIN_USER 0x00000001 +#define TEE_LOGIN_GROUP 0x00000002 +#define TEE_LOGIN_APPLICATION 0x00000004 +#define TEE_LOGIN_APPLICATION_USER 0x00000005 +#define TEE_LOGIN_APPLICATION_GROUP 0x00000006 +/* + * Reserve use of GP implementation specific login method range + * (0x80000000 - 0xBFFFFFFF). This range is rather being used + * for REE kernel clients or TEE implementation. + */ +#define TEE_LOGIN_REE_KERNEL_MIN 0x80000000 +#define TEE_LOGIN_REE_KERNEL_MAX 0xBFFFFFFF +/* Private login method for REE kernel/privileged clients */ +#define TEE_LOGIN_REE_KERNEL 0x80000000 + /* * Some Global Platform error codes which has a meaning if the * TEE_GEN_CAP_GP bit is returned by the driver in @@ -46,6 +65,7 @@ #define TEE_ERROR_NOT_SUPPORTED 0xffff000a #define TEE_ERROR_COMMUNICATION 0xffff000e #define TEE_ERROR_SECURITY 0xffff000f +#define TEE_ERROR_SHORT_BUFFER 0xffff0010 #define TEE_ERROR_OUT_OF_MEMORY 0xffff000c #define TEE_ERROR_OVERFLOW 0xffff300f #define TEE_ERROR_TARGET_DEAD 0xffff3024 @@ -136,8 +156,8 @@ struct tee_param { /** * struct tee_open_session_arg - extra arguments for tee_open_session() * @uuid: [in] UUID of the Trusted Application - * @clnt_uuid: [in] Normally zeroes - * @clnt_login: [in] Normally 0 + * @clnt_uuid: [in] UUID of client, zeroes for PUBLIC/REE_KERNEL + * @clnt_login: [in] Class of client TEE_LOGIN_* * @session: [out] Session id * @ret: [out] return value * @ret_origin: [out] origin of the return value diff --git a/include/tsec.h b/include/tsec.h index c301c28d3d51f92f94f1331505e9e2e057a1583e..72f34851ad19e4fda2eb76e11d9f3792a05dd947 100644 --- a/include/tsec.h +++ b/include/tsec.h @@ -122,6 +122,8 @@ #define ECNTRL_REDUCED_MII_MODE 0x00000004 #define ECNTRL_SGMII_MODE 0x00000002 +#define RCTRL_PROM 0x00000008 + #ifndef CONFIG_SYS_TBIPA_VALUE # define CONFIG_SYS_TBIPA_VALUE 0x1f #endif diff --git a/include/video.h b/include/video.h index f14fb15f84f6a5b263cc37493d7796204458aa57..1d75a90510c66aae6f742321d6850bd258edf303 100644 --- a/include/video.h +++ b/include/video.h @@ -30,12 +30,14 @@ struct udevice; * @base: Base address of frame buffer, 0 if not yet known * @copy_base: Base address of a hardware copy of the frame buffer. See * CONFIG_VIDEO_COPY. + * @hide_logo: Hide the logo (used for testing) */ struct video_uc_plat { uint align; uint size; ulong base; ulong copy_base; + bool hide_logo; }; enum video_polarity { @@ -93,7 +95,6 @@ enum video_format { * @colour_bg: Background colour (pixel value) * @flush_dcache: true to enable flushing of the data cache after * the LCD is updated - * @cmap: Colour map for 8-bit-per-pixel displays * @fg_col_idx: Foreground color code (bit 3 = bold, bit 0-2 = color) * @bg_col_idx: Background color code (bit 3 = bold, bit 0-2 = color) */ @@ -118,7 +119,6 @@ struct video_priv { u32 colour_fg; u32 colour_bg; bool flush_dcache; - ushort *cmap; u8 fg_col_idx; u8 bg_col_idx; }; @@ -276,6 +276,13 @@ static inline int video_sync_copy_all(struct udevice *dev) #endif +/** + * video_is_active() - Test if one video device it active + * + * @return true if at least one video device is active, else false. + */ +bool video_is_active(void); + #ifndef CONFIG_DM_VIDEO /* Video functions */ diff --git a/include/virtio.h b/include/virtio.h index a42bdad6b871799fe1aa8b03668ad3c88221d36c..34e2bfdcdd38083053121639e3e2ac443c526fe7 100644 --- a/include/virtio.h +++ b/include/virtio.h @@ -20,6 +20,7 @@ #ifndef __VIRTIO_H__ #define __VIRTIO_H__ +#include #include #include #define VIRTIO_ID_NET 1 /* virtio net */ diff --git a/lib/Kconfig b/lib/Kconfig index 807a4c6ade06fec22308ef9783c4bc8d301c8a9a..1883ac734d62e192f35dabc0b2a93f0169b01c01 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -15,6 +15,16 @@ config SYS_NUM_ADDR_MAP help Sets the number of entries in the virtual-physical mapping table. +config PHYSMEM + bool "Access to physical memory region (> 4G)" + help + Some basic support is provided for operations on memory not + normally accessible to 32-bit U-Boot - e.g. some architectures + support access to more than 4G of memory on 32-bit + machines using physical address extension or similar. + Enable this to access this basic support, which only supports clearing + the memory. + config BCH bool "Enable Software based BCH ECC" help @@ -42,7 +52,7 @@ config CC_OPTIMIZE_LIBS_FOR_SPEED config CHARSET bool - default y if UT_UNICODE || EFI_LOADER || UFS + default y if UT_UNICODE || EFI_LOADER || UFS || EFI_APP help Enables support for various conversions between different character sets, such as between unicode representations and diff --git a/lib/efi/efi.c b/lib/efi/efi.c index 69e52e457486af29ce04387c36fefe7c1d341aff..cd6bf47b18032a2a5cc65314bf15ad817222ae5f 100644 --- a/lib/efi/efi.c +++ b/lib/efi/efi.c @@ -1,5 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* + * Functions shared by the app and stub + * * Copyright (c) 2015 Google, Inc * * EFI information obtained here: @@ -17,6 +19,33 @@ #include #include +static struct efi_priv *global_priv; + +struct efi_priv *efi_get_priv(void) +{ + return global_priv; +} + +void efi_set_priv(struct efi_priv *priv) +{ + global_priv = priv; +} + +struct efi_system_table *efi_get_sys_table(void) +{ + return global_priv->sys_table; +} + +struct efi_boot_services *efi_get_boot(void) +{ + return global_priv->boot; +} + +unsigned long efi_get_ram_base(void) +{ + return global_priv->ram_base; +} + /* * Global declaration of gd. * diff --git a/lib/efi/efi_app.c b/lib/efi/efi_app.c index f61665686c5e7f574a5ef22769af4887af1353aa..d60f2f6c28f80e10d068cc25eef1ebac50fa4a45 100644 --- a/lib/efi/efi_app.c +++ b/lib/efi/efi_app.c @@ -21,29 +21,58 @@ #include #include #include +#include +#include +#include DECLARE_GLOBAL_DATA_PTR; -static struct efi_priv *global_priv; - -struct efi_system_table *efi_get_sys_table(void) +int efi_info_get(enum efi_entry_t type, void **datap, int *sizep) { - return global_priv->sys_table; + return -ENOSYS; } -struct efi_boot_services *efi_get_boot(void) +/** + * efi_bind_block() - bind a new block device to an EFI device + * + * Binds a new top-level EFI_MEDIA device as well as a child block device so + * that the block device can be accessed in U-Boot. + * + * The device can then be accessed using 'part list efi 0', 'fat ls efi 0:1', + * for example, just like any other interface type. + * + * @handle: handle of the controller on which this driver is installed + * @blkio: block io protocol proxied by this driver + * @device_path: EFI device path structure for this + * @len: Length of @device_path in bytes + * @devp: Returns the bound device + * @return 0 if OK, -ve on error + */ +int efi_bind_block(efi_handle_t handle, struct efi_block_io *blkio, + struct efi_device_path *device_path, int len, + struct udevice **devp) { - return global_priv->boot; -} + struct efi_media_plat plat; + struct udevice *dev; + char name[18]; + int ret; -unsigned long efi_get_ram_base(void) -{ - return global_priv->ram_base; -} + plat.handle = handle; + plat.blkio = blkio; + plat.device_path = malloc(device_path->length); + if (!plat.device_path) + return log_msg_ret("path", -ENOMEM); + memcpy(plat.device_path, device_path, device_path->length); + ret = device_bind(dm_root(), DM_DRIVER_GET(efi_media), "efi_media", + &plat, ofnode_null(), &dev); + if (ret) + return log_msg_ret("bind", ret); -int efi_info_get(enum efi_entry_t type, void **datap, int *sizep) -{ - return -ENOSYS; + snprintf(name, sizeof(name), "efi_media_%x", dev_seq(dev)); + device_set_name(dev, name); + *devp = dev; + + return 0; } static efi_status_t setup_memory(struct efi_priv *priv) @@ -77,13 +106,14 @@ static efi_status_t setup_memory(struct efi_priv *priv) ret = boot->allocate_pages(EFI_ALLOCATE_MAX_ADDRESS, priv->image_data_type, pages, &addr); if (ret) { - printf("(using pool %lx) ", ret); + log_info("(using pool %lx) ", ret); priv->ram_base = (ulong)efi_malloc(priv, CONFIG_EFI_RAM_SIZE, &ret); if (!priv->ram_base) return ret; priv->use_pool_for_malloc = true; } else { + log_info("(using allocated RAM address %lx) ", (ulong)addr); priv->ram_base = addr; } gd->ram_size = pages << 12; @@ -91,6 +121,14 @@ static efi_status_t setup_memory(struct efi_priv *priv) return 0; } +/** + * free_memory() - Free memory used by the U-Boot app + * + * This frees memory allocated in setup_memory(), in preparation for returning + * to UEFI. It also zeroes the global_data pointer. + * + * @priv: Private EFI data + */ static void free_memory(struct efi_priv *priv) { struct efi_boot_services *boot = priv->boot; @@ -105,6 +143,150 @@ static void free_memory(struct efi_priv *priv) global_data_ptr = NULL; } +/** + * devpath_is_partition() - Figure out if a device path is a partition + * + * Checks if a device path refers to a partition on some media device. This + * works by checking for a valid partition number in a hard-driver media device + * as the final component of the device path. + * + * @path: device path + * Return: true if a partition, false if not + * (e.g. it might be media which contains partitions) + */ +static bool devpath_is_partition(const struct efi_device_path *path) +{ + const struct efi_device_path *p; + bool was_part; + + for (p = path; p->type != DEVICE_PATH_TYPE_END; + p = (void *)p + p->length) { + was_part = false; + if (p->type == DEVICE_PATH_TYPE_MEDIA_DEVICE && + p->sub_type == DEVICE_PATH_SUB_TYPE_HARD_DRIVE_PATH) { + struct efi_device_path_hard_drive_path *hd = + (void *)path; + + if (hd->partition_number) + was_part = true; + } + } + + return was_part; +} + +/** + * setup_block() - Find all block devices and setup EFI devices for them + * + * Partitions are ignored, since U-Boot has partition handling. Errors with + * particular devices produce a warning but execution continues to try to + * find others. + * + * Return: 0 if found, -ENOSYS if there is no boot-services table, -ENOTSUPP + * if a required protocol is not supported + */ +static int setup_block(void) +{ + efi_guid_t efi_blkio_guid = EFI_BLOCK_IO_PROTOCOL_GUID; + efi_guid_t efi_devpath_guid = EFI_DEVICE_PATH_PROTOCOL_GUID; + efi_guid_t efi_pathutil_guid = EFI_DEVICE_PATH_UTILITIES_PROTOCOL_GUID; + efi_guid_t efi_pathtext_guid = EFI_DEVICE_PATH_TO_TEXT_PROTOCOL_GUID; + struct efi_boot_services *boot = efi_get_boot(); + struct efi_device_path_utilities_protocol *util; + struct efi_device_path_to_text_protocol *text; + struct efi_device_path *path; + struct efi_block_io *blkio; + efi_uintn_t num_handles; + efi_handle_t *handle; + int ret, i; + + if (!boot) + return log_msg_ret("sys", -ENOSYS); + + /* Find all devices which support the block I/O protocol */ + ret = boot->locate_handle_buffer(BY_PROTOCOL, &efi_blkio_guid, NULL, + &num_handles, &handle); + if (ret) + return log_msg_ret("loc", -ENOTSUPP); + log_debug("Found %d handles:\n", (int)num_handles); + + /* We need to look up the path size and convert it to text */ + ret = boot->locate_protocol(&efi_pathutil_guid, NULL, (void **)&util); + if (ret) + return log_msg_ret("util", -ENOTSUPP); + ret = boot->locate_protocol(&efi_pathtext_guid, NULL, (void **)&text); + if (ret) + return log_msg_ret("text", -ENOTSUPP); + + for (i = 0; i < num_handles; i++) { + struct udevice *dev; + const u16 *name; + bool is_part; + int len; + + ret = boot->handle_protocol(handle[i], &efi_devpath_guid, + (void **)&path); + if (ret) { + log_warning("- devpath %d failed (ret=%d)\n", i, ret); + continue; + } + + ret = boot->handle_protocol(handle[i], &efi_blkio_guid, + (void **)&blkio); + if (ret) { + log_warning("- blkio %d failed (ret=%d)\n", i, ret); + continue; + } + + name = text->convert_device_path_to_text(path, true, false); + is_part = devpath_is_partition(path); + + if (!is_part) { + len = util->get_device_path_size(path); + ret = efi_bind_block(handle[i], blkio, path, len, &dev); + if (ret) { + log_warning("- blkio bind %d failed (ret=%d)\n", + i, ret); + continue; + } + } else { + dev = NULL; + } + + /* + * Show the device name if we created one. Otherwise indicate + * that it is a partition. + */ + printf("%2d: %-12s %ls\n", i, dev ? dev->name : "", + name); + } + boot->free_pool(handle); + + return 0; +} + +/** + * dm_scan_other() - Scan for UEFI devices that should be available to U-Boot + * + * This sets up block devices within U-Boot for those found in UEFI. With this, + * U-Boot can access those devices + * + * @pre_reloc_only: true to only bind pre-relocation devices (ignored) + * Returns: 0 on success, -ve on error + */ +int dm_scan_other(bool pre_reloc_only) +{ + if (gd->flags & GD_FLG_RELOC) { + int ret; + + ret = setup_block(); + if (ret) + return ret; + } + + return 0; +} + /** * efi_main() - Start an EFI image * @@ -119,9 +301,12 @@ efi_status_t EFIAPI efi_main(efi_handle_t image, efi_status_t ret; /* Set up access to EFI data structures */ - efi_init(priv, "App", image, sys_table); - - global_priv = priv; + ret = efi_init(priv, "App", image, sys_table); + if (ret) { + printf("Failed to set up U-Boot: err=%lx\n", ret); + return ret; + } + efi_set_priv(priv); /* * Set up the EFI debug UART so that printf() works. This is @@ -147,7 +332,7 @@ efi_status_t EFIAPI efi_main(efi_handle_t image, static void efi_exit(void) { - struct efi_priv *priv = global_priv; + struct efi_priv *priv = efi_get_priv(); free_memory(priv); printf("U-Boot EFI exiting\n"); diff --git a/lib/efi/efi_stub.c b/lib/efi/efi_stub.c index b3393e47fae0daf286e645b73b85506d5f474b8a..c89ae7c907211c5fd1101d3de4e7efe225845bef 100644 --- a/lib/efi/efi_stub.c +++ b/lib/efi/efi_stub.c @@ -31,7 +31,6 @@ #error "This file needs to be ported for use on architectures" #endif -static struct efi_priv *global_priv; static bool use_uart; struct __packed desctab_info { @@ -63,6 +62,8 @@ void _debug_uart_init(void) void putc(const char ch) { + struct efi_priv *priv = efi_get_priv(); + if (ch == '\n') putc('\r'); @@ -73,7 +74,7 @@ void putc(const char ch) ; outb(ch, (ulong)&com_port->thr); } else { - efi_putc(global_priv, ch); + efi_putc(priv, ch); } } @@ -225,6 +226,22 @@ static int get_codeseg32(void) return cs32; } +/** + * setup_info_table() - sets up a table containing information from EFI + * + * We must call exit_boot_services() before jumping out of the stub into U-Boot + * proper, so that U-Boot has full control of peripherals, memory, etc. + * + * Once we do this, we cannot call any boot-services functions so we must find + * out everything we need to before doing that. + * + * Set up a struct efi_info_hdr table which can hold various records (e.g. + * struct efi_entry_memmap) with information obtained from EFI. + * + * @priv: Pointer to our private information which contains the list + * @size: Size of the table to allocate + * Return: 0 if OK, non-zero on error + */ static int setup_info_table(struct efi_priv *priv, int size) { struct efi_info_hdr *info; @@ -248,6 +265,19 @@ static int setup_info_table(struct efi_priv *priv, int size) return 0; } +/** + * add_entry_addr() - Add a new entry to the efi_info list + * + * This adds an entry, consisting of a tag and two lots of data. This avoids the + * caller having to coalesce the data first + * + * @priv: Pointer to our private information which contains the list + * @type: Type of the entry to add + * @ptr1: Pointer to first data block to add + * @size1: Size of first data block in bytes (can be 0) + * @ptr2: Pointer to second data block to add + * @size2: Size of second data block in bytes (can be 0) + */ static void add_entry_addr(struct efi_priv *priv, enum efi_entry_t type, void *ptr1, int size1, void *ptr2, int size2) { @@ -291,7 +321,7 @@ efi_status_t EFIAPI efi_main(efi_handle_t image, puts(" efi_init() failed\n"); return ret; } - global_priv = priv; + efi_set_priv(priv); cs32 = get_codeseg32(); if (cs32 < 0) diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 7681f272d2795b9a5aeed730170a71115f08427c..280cda61a72f016f77af5515ed1318970ceeceb9 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -76,6 +76,19 @@ static const char * const compat_names[COMPAT_COUNT] = { COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init") }; +static const char *const fdt_src_name[] = { + [FDTSRC_SEPARATE] = "separate", + [FDTSRC_FIT] = "fit", + [FDTSRC_BOARD] = "board", + [FDTSRC_EMBED] = "embed", + [FDTSRC_ENV] = "env", +}; + +const char *fdtdec_get_srcname(void) +{ + return fdt_src_name[gd->fdt_src]; +} + const char *fdtdec_get_compatible(enum fdt_compat_id id) { /* We allow reading of the 'unknown' ID for testing purposes */ @@ -1146,11 +1159,10 @@ int fdtdec_setup_mem_size_base_lowest(void) return 0; } -#if CONFIG_IS_ENABLED(MULTI_DTB_FIT) -# if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\ - CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO) static int uncompress_blob(const void *src, ulong sz_src, void **dstp) { +#if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\ + CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO) size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ); bool gzip = 0, lzo = 0; ulong sz_in = sz_src; @@ -1175,11 +1187,11 @@ static int uncompress_blob(const void *src, ulong sz_src, void **dstp) return -ENOMEM; } } else { -# if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA) +# if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA) dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR); -# else +# else return -ENOTSUPP; -# endif +# endif } if (CONFIG_IS_ENABLED(GZIP) && gzip) @@ -1197,27 +1209,22 @@ static int uncompress_blob(const void *src, ulong sz_src, void **dstp) return -EBADMSG; } *dstp = dst; - return 0; -} -# else -static int uncompress_blob(const void *src, ulong sz_src, void **dstp) -{ +#else + *dstp = (void *)src; *dstp = (void *)src; +#endif return 0; } -# endif -#endif -#if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE) -/* - * For CONFIG_OF_SEPARATE, the board may optionally implement this to - * provide and/or fixup the fdt. +/** + * fdt_find_separate() - Find a devicetree at the end of the image + * + * @return pointer to FDT blob */ -__weak void *board_fdt_blob_setup(int *err) +static void *fdt_find_separate(void) { void *fdt_blob = NULL; - *err = 0; #ifdef CONFIG_SPL_BUILD /* FDT is at end of BSS unless it is in a different memory region */ if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS)) @@ -1231,7 +1238,6 @@ __weak void *board_fdt_blob_setup(int *err) return fdt_blob; } -#endif int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size) { @@ -1589,60 +1595,81 @@ int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name, return 0; } +/* TODO(sjg@chromium.org): This function should not be weak */ __weak int fdtdec_board_setup(const void *fdt_blob) { return 0; } -int fdtdec_setup(void) +/** + * setup_multi_dtb_fit() - locate the correct dtb from a FIT + * + * This supports the CONFIG_MULTI_DTB_FIT feature, looking for the dtb in a + * supplied FIT + * + * It accepts the current value of gd->fdt_blob, which points to the FIT, then + * updates that gd->fdt_blob, to point to the chosen dtb so that U-Boot uses the + * correct one + */ +static void setup_multi_dtb_fit(void) { - int ret; -#if CONFIG_IS_ENABLED(OF_CONTROL) -# if CONFIG_IS_ENABLED(MULTI_DTB_FIT) - void *fdt_blob; -# endif -# ifdef CONFIG_OF_EMBED - /* Get a pointer to the FDT */ -# ifdef CONFIG_SPL_BUILD - gd->fdt_blob = __dtb_dt_spl_begin; -# else - gd->fdt_blob = __dtb_dt_begin; -# endif -# elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE) - /* Allow the board to override the fdt address. */ - gd->fdt_blob = board_fdt_blob_setup(&ret); - if (ret) - return ret; -# endif -# ifndef CONFIG_SPL_BUILD - /* Allow the early environment to override the fdt address */ - gd->fdt_blob = map_sysmem - (env_get_ulong("fdtcontroladdr", 16, - (unsigned long)map_to_sysmem(gd->fdt_blob)), 0); -# endif + void *blob; -# if CONFIG_IS_ENABLED(MULTI_DTB_FIT) /* * Try and uncompress the blob. * Unfortunately there is no way to know how big the input blob really * is. So let us set the maximum input size arbitrarily high. 16MB * ought to be more than enough for packed DTBs. */ - if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0) - gd->fdt_blob = fdt_blob; + if (uncompress_blob(gd->fdt_blob, 0x1000000, &blob) == 0) + gd->fdt_blob = blob; /* * Check if blob is a FIT images containings DTBs. * If so, pick the most relevant */ - fdt_blob = locate_dtb_in_fit(gd->fdt_blob); - if (fdt_blob) { - gd->multi_dtb_fit = gd->fdt_blob; - gd->fdt_blob = fdt_blob; + blob = locate_dtb_in_fit(gd->fdt_blob); + if (blob) { + gd_set_multi_dtb_fit(gd->fdt_blob); + gd->fdt_blob = blob; + gd->fdt_src = FDTSRC_FIT; } +} -# endif -#endif +int fdtdec_setup(void) +{ + int ret; + + /* The devicetree is typically appended to U-Boot */ + if (IS_ENABLED(CONFIG_OF_SEPARATE)) { + gd->fdt_blob = fdt_find_separate(); + gd->fdt_src = FDTSRC_SEPARATE; + } else { /* embed dtb in ELF file for testing / development */ + gd->fdt_blob = dtb_dt_embedded(); + gd->fdt_src = FDTSRC_EMBED; + } + + /* Allow the board to override the fdt address. */ + if (IS_ENABLED(CONFIG_OF_BOARD)) { + gd->fdt_blob = board_fdt_blob_setup(&ret); + if (ret) + return ret; + gd->fdt_src = FDTSRC_BOARD; + } + + /* Allow the early environment to override the fdt address */ + if (!IS_ENABLED(CONFIG_SPL_BUILD)) { + ulong addr; + + addr = env_get_hex("fdtcontroladdr", 0); + if (addr) { + gd->fdt_blob = map_sysmem(addr, 0); + gd->fdt_src = FDTSRC_ENV; + } + } + + if (CONFIG_IS_ENABLED(MULTI_DTB_FIT)) + setup_multi_dtb_fit(); ret = fdtdec_prepare_fdt(); if (!ret) @@ -1650,7 +1677,6 @@ int fdtdec_setup(void) return ret; } -#if CONFIG_IS_ENABLED(MULTI_DTB_FIT) int fdtdec_resetup(int *rescan) { void *fdt_blob; @@ -1661,8 +1687,8 @@ int fdtdec_resetup(int *rescan) * FIT image stillpresent there. Save the time and space * required to uncompress it again. */ - if (gd->multi_dtb_fit) { - fdt_blob = locate_dtb_in_fit(gd->multi_dtb_fit); + if (gd_multi_dtb_fit()) { + fdt_blob = locate_dtb_in_fit(gd_multi_dtb_fit()); if (fdt_blob == gd->fdt_blob) { /* @@ -1686,7 +1712,6 @@ int fdtdec_resetup(int *rescan) *rescan = 0; return 0; } -#endif int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id, phys_addr_t *basep, phys_size_t *sizep, diff --git a/lib/rsa/Kconfig b/lib/rsa/Kconfig index 469596abe7aec1fb0c45176a4e332375bdb12cbf..be9775bccebd005acc25cc13b4b05f42d35a066c 100644 --- a/lib/rsa/Kconfig +++ b/lib/rsa/Kconfig @@ -1,7 +1,8 @@ config RSA bool "Use RSA Library" select RSA_FREESCALE_EXP if FSL_CAAM && !ARCH_MX7 && !ARCH_MX7ULP && !ARCH_MX6 && !ARCH_MX5 - select RSA_SOFTWARE_EXP if !RSA_FREESCALE_EXP + select RSA_ASPEED_EXP if ASPEED_ACRY + select RSA_SOFTWARE_EXP if !RSA_FREESCALE_EXP && !RSA_ASPEED_EXP help RSA support. This enables the RSA algorithm used for FIT image verification in U-Boot. @@ -62,4 +63,11 @@ config RSA_FREESCALE_EXP Enables driver for RSA modular exponentiation using Freescale cryptographic accelerator - CAAM. +config RSA_ASPEED_EXP + bool "Enable RSA Modular Exponentiation with ASPEED crypto accelerator" + depends on DM && ASPEED_ACRY + help + Enables driver for RSA modular exponentiation using ASPEED cryptographic + accelerator - ACRY + endif diff --git a/lib/time.c b/lib/time.c index 38a9758292a5ef4182466d62df22de7e2606f61e..96074b84af69342f1e58b10a5c9fe4ab9299d264 100644 --- a/lib/time.c +++ b/lib/time.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include diff --git a/lib/vsprintf.c b/lib/vsprintf.c index e634bd70b667999a57660b3801c269688cd5067e..de9f236b908c82e82b4c283ac1085d46a4b0429f 100644 --- a/lib/vsprintf.c +++ b/lib/vsprintf.c @@ -276,9 +276,8 @@ static char *string(char *buf, char *end, char *s, int field_width, } /* U-Boot uses UTF-16 strings in the EFI context only. */ -#if CONFIG_IS_ENABLED(EFI_LOADER) && !defined(API_BUILD) -static char *string16(char *buf, char *end, u16 *s, int field_width, - int precision, int flags) +static __maybe_unused char *string16(char *buf, char *end, u16 *s, + int field_width, int precision, int flags) { const u16 *str = s ? s : L""; ssize_t i, len = utf16_strnlen(str, precision); @@ -317,7 +316,6 @@ static char *device_path_string(char *buf, char *end, void *dp, int field_width, return buf; } #endif -#endif static char *mac_address_string(char *buf, char *end, u8 *addr, int field_width, int precision, int flags) @@ -616,7 +614,8 @@ repeat: case 's': /* U-Boot uses UTF-16 strings in the EFI context only. */ -#if CONFIG_IS_ENABLED(EFI_LOADER) && !defined(API_BUILD) +#if (CONFIG_IS_ENABLED(EFI_LOADER) || CONFIG_IS_ENABLED(EFI_APP)) && \ + !defined(API_BUILD) if (qualifier == 'l') { str = string16(str, end, va_arg(args, u16 *), field_width, precision, flags); diff --git a/net/bootp.c b/net/bootp.c index 655b9cceb669aca2bf206bb1c460b788e88c056c..58e30cd6b0c52459ce5ead0e29574ba5bbdaf5e2 100644 --- a/net/bootp.c +++ b/net/bootp.c @@ -647,7 +647,7 @@ static int bootp_extended(u8 *e) *e++ = (576 - 312 + OPT_FIELD_SIZE) & 0xff; #endif - add_vci(e); + e = add_vci(e); #if defined(CONFIG_BOOTP_SUBNETMASK) *e++ = 1; /* Subnet mask request */ diff --git a/net/dsa-uclass.c b/net/dsa-uclass.c index bf762cd2a8c40d84e5319a4eeec0819cdd21f2ea..606b1539a776979c6c90fd118ad534fdf29ffeef 100644 --- a/net/dsa-uclass.c +++ b/net/dsa-uclass.c @@ -44,6 +44,26 @@ int dsa_set_tagging(struct udevice *dev, ushort headroom, ushort tailroom) return 0; } +ofnode dsa_port_get_ofnode(struct udevice *dev, int port) +{ + struct dsa_pdata *pdata = dev_get_uclass_plat(dev); + struct dsa_port_pdata *port_pdata; + struct udevice *pdev; + + if (port == pdata->cpu_port) + return pdata->cpu_port_node; + + for (device_find_first_child(dev, &pdev); + pdev; + device_find_next_child(&pdev)) { + port_pdata = dev_get_parent_plat(pdev); + if (port_pdata->index == port) + return dev_ofnode(pdev); + } + + return ofnode_null(); +} + /* returns the DSA master Ethernet device */ struct udevice *dsa_get_master(struct udevice *dev) { @@ -250,7 +270,7 @@ static void dsa_port_set_hwaddr(struct udevice *pdev, struct udevice *master) struct eth_ops *eth_ops = eth_get_ops(master); if (eth_ops->set_promisc) - eth_ops->set_promisc(master, 1); + eth_ops->set_promisc(master, true); return; } diff --git a/scripts/Makefile.autoconf b/scripts/Makefile.autoconf index 8a3efdb2db0f834d2a6d1f4ecf5b5712d9579a71..5ed9abc8e14233b1640162686705f9f873e63dca 100644 --- a/scripts/Makefile.autoconf +++ b/scripts/Makefile.autoconf @@ -67,7 +67,8 @@ quiet_cmd_autoconf = GEN $@ quiet_cmd_u_boot_cfg = CFG $@ cmd_u_boot_cfg = \ $(CPP) $(c_flags) $2 -DDO_DEPS_ONLY -dM $(srctree)/include/common.h > $@.tmp && { \ - grep 'define CONFIG_' $@.tmp > $@; \ + grep 'define CONFIG_' $@.tmp | \ + sed '/define CONFIG_IS_ENABLED(/d;/define CONFIG_VAL(/d;' > $@; \ rm $@.tmp; \ } || { \ rm $@.tmp; false; \ diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index 39f03398ed8e7db1927d69e41c5845506ee673e2..77ad282bbeca468676fc1fbe4be9a81cb81d000b 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -175,7 +175,9 @@ u_boot_dtsi_options_raw = $(warning Automatic .dtsi inclusion: options: \ # Uncomment for debugging # This shows all the files that were considered and the one that we chose. -# u_boot_dtsi_options_debug = $(u_boot_dtsi_options_raw) +ifdef DEVICE_TREE_DEBUG +u_boot_dtsi_options_debug = $(warning $(u_boot_dtsi_options_raw)) +endif # We use the first match u_boot_dtsi = $(strip $(u_boot_dtsi_options_debug) \ @@ -372,6 +374,27 @@ cmd_S_ttf= \ $(obj)/%.S: $(src)/%.ttf $(call cmd,S_ttf) +# Splash logos +# --------------------------------------------------------------------------- + +# Generate an assembly file to wrap the splash data +quiet_cmd_S_splash= TTF $@ +# Modified for U-Boot +cmd_S_splash= \ +( \ + echo '.section .rodata.splash.init,"a"'; \ + echo '.balign 16'; \ + echo '.global __splash_$(*F)_begin'; \ + echo '__splash_$(*F)_begin:'; \ + echo '.incbin "$<" '; \ + echo '__splash_$(*F)_end:'; \ + echo '.global __splash_$(*F)_end'; \ + echo '.balign 16'; \ +) > $@ + +$(obj)/%.S: $(src)/%.bmp + $(call cmd,S_splash) + # EFI applications # A Makefile target *.efi is built as EFI application. # A Makefile target *_efi.S wraps *.efi as built-in EFI application. diff --git a/scripts/build-cb.sh b/scripts/build-cb.sh new file mode 100755 index 0000000000000000000000000000000000000000..1da708fb6e15a2368a2810c8994cd8f3872b8f8e --- /dev/null +++ b/scripts/build-cb.sh @@ -0,0 +1,19 @@ +#!/bin/sh +# SPDX-License-Identifier: GPL-2.0+ +# +# Sample script to build a disk image suitable for use with coreboot. The image +# includes a kernel and initrd. +# +# YOU WILL NEED to modify this for your needs, e.g. select a kernel. +# +# Run this with: +# qemu-system-i386 -bios coreboot.rom -drive file=disk.img,if=virtio + +qemu-img create -f raw disk.img 120M +mkfs.ext2 -F disk.img +sudo mkdir -p /mnt/rootfs +sudo mount -o loop disk.img /mnt/rootfs +sudo mkdir -p /mnt/rootfs/boot +sudo cp /boot/vmlinuz /mnt/rootfs/boot/. +sudo cp /boot/initrd.img /mnt/rootfs/boot/. +sudo umount /mnt/rootfs diff --git a/scripts/check-of.sh b/scripts/check-of.sh new file mode 100755 index 0000000000000000000000000000000000000000..0f0bf516647724107f156240706b5075cf73a1d0 --- /dev/null +++ b/scripts/check-of.sh @@ -0,0 +1,42 @@ +#!/bin/sh +# Copyright 2021 Google LLC +# Written by Simon Glass +# +# Check that the .config file provided does not try to disable OF_BOARD for +# boards that use CONFIG_OF_HAS_PRIOR_STAGE +# +# Usage +# check-of.sh +# +# For example: +# scripts/check-of.sh b/chromebook_link/u-boot.cfg kconfig_allowlist.txt +# +# Exit code is 0 if OK, 3 if the .config is wrong, as above + +set -e +set -u + +PROG_NAME="${0##*/}" + +usage() { + echo "$PROG_NAME " + exit 1 +} + +[ $# -ge 2 ] || usage + +path="$1" +allowlist="$2" + +sys_config="$(sed -n 's/CONFIG_SYS_CONFIG_NAME="\(.*\)"$/\1/p' "${path}")" + +if grep -q OF_HAS_PRIOR_STAGE=y "${path}"; then + if ! grep -lq CONFIG_OF_BOARD=y "${path}"; then + echo >&2 "This board uses a prior stage to provide the device tree." + echo >&2 "Please enable CONFIG_OF_BOARD to ensure that it works correctly." + if grep -q "${sys_config}" "${allowlist}"; then + exit 0 + fi + exit 3 + fi +fi diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index b9c1c61e13dc91fb35fc51a17f36d4208dd5c25a..79f03d16362b97fc83056d7e5d0b6a4b855b997c 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1,42 +1,23 @@ -CONFIG_64BIT_PHYS_ADDR -CONFIG_83XX -CONFIG_83XX_PCICLK -CONFIG_88F5182 CONFIG_A003399_NOR_WORKAROUND CONFIG_A008044_WORKAROUND -CONFIG_AEABI CONFIG_AM335X_USB0 CONFIG_AM335X_USB0_MODE CONFIG_AM335X_USB1 CONFIG_AM335X_USB1_MODE -CONFIG_ANDES_PCU -CONFIG_ANDES_PCU_BASE -CONFIG_ARCH_ADPAG101P -CONFIG_ARCH_HAS_ILOG2_U32 -CONFIG_ARCH_HAS_ILOG2_U64 -CONFIG_ARCH_OMAP4 -CONFIG_ARCH_RMOBILE_EXTRAM_BOOT -CONFIG_ARCH_USE_BUILTIN_BSWAP -CONFIG_ARC_MMU_VER CONFIG_ARMV7_SECURE_BASE CONFIG_ARMV7_SECURE_MAX_SIZE CONFIG_ARMV7_SECURE_RESERVE_SIZE CONFIG_ARMV8_SWITCH_TO_EL1 CONFIG_ARM_GIC_BASE_ADDRESS CONFIG_ARP_TIMEOUT -CONFIG_AT91C_PQFP_UHPBUG -CONFIG_AT91RESET_EXTRST -CONFIG_AT91RM9200 CONFIG_AT91SAM9260EK CONFIG_AT91SAM9261EK CONFIG_AT91SAM9G10 CONFIG_AT91SAM9G10EK CONFIG_AT91SAM9G20EK CONFIG_AT91SAM9G20EK_2MMC -CONFIG_AT91SAM9G45EKES CONFIG_AT91SAM9G45_LCD_BASE CONFIG_AT91SAM9M10G45EK -CONFIG_AT91_CAN CONFIG_AT91_EFLASH CONFIG_AT91_GPIO_PULLUP CONFIG_AT91_LED @@ -46,13 +27,9 @@ CONFIG_ATMEL_LCD CONFIG_ATMEL_LCD_BGR555 CONFIG_ATMEL_LCD_RGB565 CONFIG_ATMEL_LEGACY -CONFIG_ATMEL_MCI_8BIT CONFIG_ATMEL_SPI0 CONFIG_AUTO_ZRELADDR CONFIG_BACKSIDE_L2_CACHE -CONFIG_BCH_CONST_M -CONFIG_BCH_CONST_PARAMS -CONFIG_BCH_CONST_T CONFIG_BCM2835_GPIO CONFIG_BIOSEMU CONFIG_BITBANGMII_MULTI @@ -64,20 +41,14 @@ CONFIG_BOARDDIR CONFIG_BOARDNAME CONFIG_BOARD_COMMON CONFIG_BOARD_ECC_SUPPORT -CONFIG_BOARD_IS_OPENRD_BASE -CONFIG_BOARD_IS_OPENRD_CLIENT -CONFIG_BOARD_IS_OPENRD_ULTIMATE CONFIG_BOARD_NAME CONFIG_BOARD_POSTCLK_INIT CONFIG_BOARD_SIZE_LIMIT CONFIG_BOOTFILE CONFIG_BOOTMODE CONFIG_BOOTP_BOOTFILESIZE -CONFIG_BOOTP_DHCP_REQUEST_DELAY -CONFIG_BOOTP_ID_CACHE_SIZE CONFIG_BOOTP_MAY_FAIL CONFIG_BOOTP_NISDOMAIN -CONFIG_BOOTP_RANDOM_DELAY CONFIG_BOOTP_SERVERIP CONFIG_BOOTP_TIMEOFFSET CONFIG_BOOTP_VENDOREX @@ -85,7 +56,6 @@ CONFIG_BOOTROM_ERR_REG CONFIG_BOOTSCRIPT_ADDR CONFIG_BOOTSCRIPT_COPY_RAM CONFIG_BOOTSCRIPT_HDR_ADDR -CONFIG_BOOTSCRIPT_KEY_HASH CONFIG_BOOT_RETRY_MIN CONFIG_BOOT_RETRY_TIME CONFIG_BPTR_VIRT_ADDR @@ -98,35 +68,14 @@ CONFIG_BS_HDR_ADDR_RAM CONFIG_BS_HDR_SIZE CONFIG_BS_SIZE CONFIG_BTB -CONFIG_BUILD_ENVCRC -CONFIG_BUS_WIDTH -CONFIG_CDP_APPLIANCE_VLAN_TYPE -CONFIG_CDP_CAPABILITIES -CONFIG_CDP_DEVICE_ID -CONFIG_CDP_DEVICE_ID_PREFIX -CONFIG_CDP_PLATFORM -CONFIG_CDP_PORT_ID -CONFIG_CDP_POWER_CONSUMPTION -CONFIG_CDP_TRIGGER -CONFIG_CDP_VERSION -CONFIG_CFG_DATA_SECTOR CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS CONFIG_CF_DSPI CONFIG_CF_SBF -CONFIG_CF_V2 -CONFIG_CF_V3 -CONFIG_CF_V4 -CONFIG_CF_V4E CONFIG_CHAIN_BOOT_CMD CONFIG_CHIP_SELECTS_PER_CTRL -CONFIG_CHIP_SELECT_QUAD_CAPABLE CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS CONFIG_CI_UDC_HAS_HOSTPC -CONFIG_CLK_1000_200_200 -CONFIG_CLK_1000_330_165 CONFIG_CLK_1000_400_200 -CONFIG_CLK_800_330_165 -CONFIG_CLK_DEBUG CONFIG_CLOCKS CONFIG_CLOCK_SYNTHESIZER CONFIG_CM922T_XA10 @@ -136,11 +85,7 @@ CONFIG_CM_MULTIPLE_SSRAM CONFIG_CM_REMAP CONFIG_CM_SPD_DETECT CONFIG_CM_TCRAM -CONFIG_COLDFIRE CONFIG_COMMON_BOOT -CONFIG_COMPAT -CONFIG_CONS_EXTC_PINSEL -CONFIG_CONS_EXTC_RATE CONFIG_CONS_ON_SCC CONFIG_CONS_SCIF0 CONFIG_CONS_SCIF1 @@ -150,43 +95,12 @@ CONFIG_CON_ROT CONFIG_CPLD_BR_PRELIM CONFIG_CPLD_OR_PRELIM CONFIG_CPM2 -CONFIG_CPU_ARMV8 -CONFIG_CPU_FREQ_HZ -CONFIG_CPU_HAS_LLSC -CONFIG_CPU_HAS_PREFETCH -CONFIG_CPU_HAS_SMARTMIPS -CONFIG_CPU_HAS_SR_RB -CONFIG_CPU_HAS_WB -CONFIG_CPU_LITTLE_ENDIAN -CONFIG_CPU_MICROMIPS -CONFIG_CPU_MIPSR2 -CONFIG_CPU_MONAHANS -CONFIG_CPU_PXA25X -CONFIG_CPU_PXA26X -CONFIG_CPU_PXA27X -CONFIG_CPU_PXA300 -CONFIG_CPU_SH7751 -CONFIG_CPU_TYPE_R -CONFIG_CPU_VR41XX CONFIG_CQSPI_REF_CLK -CONFIG_CS8900_BUS16 -CONFIG_CS8900_BUS32 -CONFIG_CTL_JTAG -CONFIG_CTL_TBE CONFIG_CUSTOMER_BOARD_SUPPORT -CONFIG_D2NET_V2 -CONFIG_DA850_EVM_MAX_CPU_CLK CONFIG_DB_784MP_GP CONFIG_DCACHE -CONFIG_DCACHE_OFF -CONFIG_DCFG_ADDR CONFIG_DEBUG -CONFIG_DEBUG_FS CONFIG_DEBUG_LED -CONFIG_DEBUG_LOCK_ALLOC -CONFIG_DEBUG_SEMIHOSTING -CONFIG_DEBUG_UART_LINFLEXUART -CONFIG_DEBUG_WRITECOUNT CONFIG_DEEP_SLEEP CONFIG_DEFAULT CONFIG_DEFAULT_IMMR @@ -197,12 +111,9 @@ CONFIG_DFU_ALT_BOOT_EMMC CONFIG_DFU_ALT_BOOT_SD CONFIG_DFU_ALT_SYSTEM CONFIG_DFU_ENV_SETTINGS -CONFIG_DHCP_MIN_EXT_LEN CONFIG_DIALOG_POWER CONFIG_DIMM_SLOTS_PER_CTLR -CONFIG_DISCONTIGMEM CONFIG_DISCOVER_PHY -CONFIG_DISPLAY_AER_xxxx CONFIG_DM9000_BASE CONFIG_DM9000_BYTE_SWAPPED CONFIG_DM9000_DEBUG @@ -210,33 +121,20 @@ CONFIG_DM9000_NO_SROM CONFIG_DM9000_USE_16BIT CONFIG_DMA_COHERENT CONFIG_DMA_COHERENT_SIZE -CONFIG_DMA_NONCOHERENT -CONFIG_DNET_AUTONEG_TIMEOUT CONFIG_DP_DDR_CTRL CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR CONFIG_DP_DDR_NUM_CTRLS CONFIG_DRIVER_DM9000 CONFIG_DSP_CLUSTER_START -CONFIG_DWCDDR21MCTL -CONFIG_DWCDDR21MCTL_BASE CONFIG_DWC_AHSATA_BASE_ADDR CONFIG_DWC_AHSATA_PORT_ID CONFIG_DW_ALTDESCRIPTOR -CONFIG_DW_AXI_BURST_LEN CONFIG_DW_GMAC_DEFAULT_DMA_PBL -CONFIG_DW_MAC_FORCE_THRESHOLD_MODE CONFIG_DW_WDT_BASE CONFIG_DW_WDT_CLOCK_KHZ CONFIG_E1000_NO_NVM CONFIG_E300 CONFIG_E5500 -CONFIG_ECC -CONFIG_EDB9301 -CONFIG_EDB93XX_INDUSTRIAL -CONFIG_EDB93XX_SDCS0 -CONFIG_EDB93XX_SDCS1 -CONFIG_EDB93XX_SDCS2 -CONFIG_EDB93XX_SDCS3 CONFIG_EFLASH_PROTSECTORS CONFIG_EHCI_DESC_BIG_ENDIAN CONFIG_EHCI_HCD_INIT_AFTER_RESET @@ -246,16 +144,10 @@ CONFIG_EHCI_MXS_PORT1 CONFIG_EMU CONFIG_ENABLE_36BIT_PHYS CONFIG_ENABLE_MMU -CONFIG_ENABLE_MUST_CHECK -CONFIG_ENV_ADDR_FLEX -CONFIG_ENV_CALLBACK_LIST_DEFAULT -CONFIG_ENV_CALLBACK_LIST_STATIC -CONFIG_ENV_FLAGS_LIST_DEFAULT CONFIG_ENV_FLAGS_LIST_STATIC CONFIG_ENV_IS_EMBEDDED CONFIG_ENV_MAX_ENTRIES CONFIG_ENV_MIN_ENTRIES -CONFIG_ENV_OFFSET_OOB CONFIG_ENV_RANGE CONFIG_ENV_REFLASH CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS @@ -263,34 +155,25 @@ CONFIG_ENV_SETTINGS_NAND_V1 CONFIG_ENV_SETTINGS_NAND_V2 CONFIG_ENV_SETTINGS_V1 CONFIG_ENV_SETTINGS_V2 -CONFIG_ENV_SIZE_FLEX CONFIG_ENV_SROM_BANK CONFIG_ENV_TOTAL_SIZE CONFIG_ENV_VERSION -CONFIG_EPH_POWER_EN -CONFIG_EPOLL CONFIG_ESBC_ADDR_64BIT CONFIG_ESBC_HDR_LS -CONFIG_ESDHC_DETECT_8_BIT_QUIRK CONFIG_ESDHC_DETECT_QUIRK CONFIG_ESDHC_HC_BLK_ADDR CONFIG_ESPRESSO7420 CONFIG_ET1100_BASE -CONFIG_ETHADDR CONFIG_ETHBASE CONFIG_ETHPRIME -CONFIG_ETH_BUFSIZE -CONFIG_ETH_RXSIZE CONFIG_EXTRA_CLOCK CONFIG_EXTRA_ENV CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_SETTINGS_COMMON -CONFIG_EXT_AHB2AHB_BASE CONFIG_EXT_AHBAPBBRG_BASE CONFIG_EXT_AHBPCIBRG_BASE CONFIG_EXT_AHBSLAVE01_BASE CONFIG_EXT_AHBSLAVE02_BASE -CONFIG_EXT_PHY CONFIG_EXT_USB_HOST_BASE CONFIG_EXYNOS4 CONFIG_EXYNOS4210 @@ -307,27 +190,12 @@ CONFIG_EXYNOS_SPL CONFIG_EXYNOS_TMU CONFIG_FACTORYSET CONFIG_FB_ADDR -CONFIG_FB_BACKLIGHT -CONFIG_FB_DEFERRED_IO CONFIG_FDTADDR CONFIG_FDTFILE -CONFIG_FEATURE_CLEAN_UP -CONFIG_FEATURE_COMMAND_EDITING -CONFIG_FEATURE_SH_APPLETS_ALWAYS_WIN -CONFIG_FEATURE_SH_EXTRA_QUIET -CONFIG_FEATURE_SH_FANCY_PROMPT -CONFIG_FEATURE_SH_STANDALONE_SHELL CONFIG_FEC_ENET_DEV CONFIG_FEC_FIXED_SPEED -CONFIG_FEC_MXC_25M_REF_CLK CONFIG_FEC_MXC_PHYADDR -CONFIG_FEC_MXC_SWAP_PACKET CONFIG_FEC_XCV_TYPE -CONFIG_FEROCEON -CONFIG_FEROCEON_88FR131 -CONFIG_FILE -CONFIG_FIXED_PHY -CONFIG_FIXED_PHY_ADDR CONFIG_FIXED_SDHCI_ALIGNED_BUFFER CONFIG_FLASH_BR_PRELIM CONFIG_FLASH_CFI_LEGACY @@ -337,16 +205,13 @@ CONFIG_FLASH_SHOW_PROGRESS CONFIG_FLASH_SPANSION_S29WS_N CONFIG_FLASH_VERIFY CONFIG_FM_PLAT_CLK_DIV -CONFIG_FORCE_DDR_DATA_BUS_WIDTH_32 CONFIG_FORMIKE CONFIG_FPGA_COUNT -CONFIG_FPGA_DELAY CONFIG_FPGA_STRATIX_V CONFIG_FSL_CADMUS CONFIG_FSL_CORENET CONFIG_FSL_CPLD CONFIG_FSL_DCU_SII9022A -CONFIG_FSL_DEEP_SLEEP CONFIG_FSL_DEVICE_DISABLE CONFIG_FSL_DIU_CH7301 CONFIG_FSL_DIU_FB @@ -354,8 +219,6 @@ CONFIG_FSL_DSPI1 CONFIG_FSL_ESDHC_PIN_MUX CONFIG_FSL_FIXED_MMC_LOCATION CONFIG_FSL_FM_10GEC_REGULAR_NOTATION -CONFIG_FSL_I2C_CUSTOM_DFSR -CONFIG_FSL_I2C_CUSTOM_FDR CONFIG_FSL_IIM CONFIG_FSL_ISBC_KEY_EXT CONFIG_FSL_LBC @@ -367,35 +230,25 @@ CONFIG_FSL_PMIC_CLK CONFIG_FSL_PMIC_CS CONFIG_FSL_PMIC_MODE CONFIG_FSL_QIXIS -CONFIG_FSL_QIXIS_CLOCK_MEASUREMENT CONFIG_FSL_SATA_V2 CONFIG_FSL_SDHC_V2_3 -CONFIG_FSL_SDRAM_TYPE CONFIG_FSL_SERDES CONFIG_FSL_SERDES1 CONFIG_FSL_SERDES2 CONFIG_FSL_SGMII_RISER -CONFIG_FSL_TBCLK_EXTRA_DIV -CONFIG_FSL_TRUST_ARCH_v1 -CONFIG_FSNOTIFY -CONFIG_FS_POSIX_ACL CONFIG_FTAHBC020S CONFIG_FTAHBC020S_BASE CONFIG_FTAPBBRG020S_01_BASE CONFIG_FTCFC010_BASE CONFIG_FTDMAC020_BASE -CONFIG_FTGMAC100_BASE CONFIG_FTGPIO010_BASE -CONFIG_FTIDE020S_BASE CONFIG_FTIIC010_BASE CONFIG_FTINTC010_BASE CONFIG_FTLCDC100_BASE CONFIG_FTMAC100_BASE -CONFIG_FTMAC110_BASE CONFIG_FTPMU010 CONFIG_FTPMU010_BASE CONFIG_FTPMU010_POWER -CONFIG_FTPWM010_BASE CONFIG_FTRTC010_BASE CONFIG_FTRTC010_EXTCLK CONFIG_FTRTC010_PCLK @@ -406,22 +259,15 @@ CONFIG_FTSMC020_BASE CONFIG_FTSSP010_01_BASE CONFIG_FTSSP010_02_BASE CONFIG_FTTMR010_BASE -CONFIG_FTTMR010_EXT_CLK CONFIG_FTUART010_01_BASE CONFIG_FTUART010_02_BASE CONFIG_FTUART010_03_BASE CONFIG_FTWDT010_BASE CONFIG_FTWDT010_WATCHDOG -CONFIG_FZOTG266HD0A_BASE CONFIG_GATEWAYIP -CONFIG_GLOBAL_DATA_NOT_REG10 CONFIG_GLOBAL_TIMER CONFIG_GMII -CONFIG_GPCNTRL -CONFIG_GPIO_LED_INVERTED_TABLE -CONFIG_GPIO_LED_STUBS CONFIG_GREEN_LED -CONFIG_GURNARD_FPGA CONFIG_GURNARD_SPLASH CONFIG_G_DNL_THOR_PRODUCT_NUM CONFIG_G_DNL_THOR_VENDOR_NUM @@ -438,9 +284,7 @@ CONFIG_HDMI_ENCODER_I2C_ADDR CONFIG_HETROGENOUS_CLUSTERS CONFIG_HIDE_LOGO_VERSION CONFIG_HIKEY_GPIO -CONFIG_HITACHI_SX14 CONFIG_HOSTNAME -CONFIG_HOST_MAX_DEVICES CONFIG_HPS_ALTERAGRP_DBGATCLK CONFIG_HPS_ALTERAGRP_MAINCLK CONFIG_HPS_ALTERAGRP_MPUCLK @@ -589,67 +433,38 @@ CONFIG_HWCONFIG CONFIG_HW_ENV_SETTINGS CONFIG_I2C_ENV_EEPROM_BUS CONFIG_I2C_GSC -CONFIG_I2C_MBB_TIMEOUT CONFIG_I2C_MULTI_BUS CONFIG_I2C_MVTWSI CONFIG_I2C_MVTWSI_BASE CONFIG_I2C_MVTWSI_BASE0 CONFIG_I2C_MVTWSI_BASE1 -CONFIG_I2C_MVTWSI_BASE2 -CONFIG_I2C_MVTWSI_BASE3 -CONFIG_I2C_MVTWSI_BASE4 -CONFIG_I2C_MVTWSI_BASE5 -CONFIG_I2C_REPEATED_START CONFIG_I2C_RTC_ADDR -CONFIG_I2C_TIMEOUT CONFIG_ICACHE CONFIG_ICS307_REFCLK_HZ CONFIG_IDE_PREINIT CONFIG_IDE_RESET -CONFIG_IDE_SWAP_IO -CONFIG_IMA CONFIG_IMX CONFIG_IMX6_PWM_PER_CLK CONFIG_IMX_HDMI CONFIG_IMX_VIDEO_SKIP -CONFIG_INETSPACE_V2 -CONFIG_INI_ALLOW_MULTILINE -CONFIG_INI_CASE_INSENSITIVE -CONFIG_INI_MAX_LINE -CONFIG_INI_MAX_NAME -CONFIG_INI_MAX_SECTION -CONFIG_INTEGRITY CONFIG_INTERRUPTS CONFIG_IODELAY_RECALIBRATION CONFIG_IOMUX_LPSR CONFIG_IOMUX_SHARE_CONF_REG -CONFIG_IOS CONFIG_IO_TRACE CONFIG_IPADDR -CONFIG_IPROC CONFIG_IRAM_BASE CONFIG_IRAM_END CONFIG_IRAM_SIZE CONFIG_IRAM_STACK CONFIG_IRAM_TOP CONFIG_IRDA_BASE -CONFIG_IS_ENABLED -CONFIG_JFFS2_DEV -CONFIG_JFFS2_LZO -CONFIG_JFFS2_NAND -CONFIG_JFFS2_PART_OFFSET -CONFIG_JFFS2_PART_SIZE -CONFIG_JFFS2_SUMMARY CONFIG_JRSTARTR_JR0 -CONFIG_JTAG_CONSOLE CONFIG_KEEP_SERVERADDR -CONFIG_KEYBOARD CONFIG_KEY_REVOCATION CONFIG_KIRKWOOD_EGIGA_INIT -CONFIG_KIRKWOOD_GPIO CONFIG_KIRKWOOD_PCIE_INIT CONFIG_KIRKWOOD_RGMII_PAD_1V8 -CONFIG_KM8321 CONFIG_KMTEGR1 CONFIG_KM_BOARD_EXTRA_ENV CONFIG_KM_COGE5UN @@ -687,19 +502,11 @@ CONFIG_KSNET_NETCP_V1_5 CONFIG_KSNET_SERDES_LANES_PER_SGMII CONFIG_KSNET_SERDES_SGMII2_BASE CONFIG_KSNET_SERDES_SGMII_BASE -CONFIG_KVM_GUEST -CONFIG_KW88F6192 -CONFIG_KW88F6281 -CONFIG_KW88F6702 CONFIG_L1_INIT_RAM CONFIG_L2_CACHE -CONFIG_LAN91C96_USE_32_BIT CONFIG_LAYERSCAPE_NS_ACCESS CONFIG_LBA48 -CONFIG_LBDAF CONFIG_LCD_ALIGNMENT -CONFIG_LCD_BMP_RLE8 -CONFIG_LCD_DT_SIMPLEFB CONFIG_LCD_INFO CONFIG_LCD_INFO_BELOW_LOGO CONFIG_LCD_IN_PSRAM @@ -708,14 +515,10 @@ CONFIG_LCD_MENU CONFIG_LD9040 CONFIG_LEGACY CONFIG_LEGACY_BOOTCMD_ENV -CONFIG_LITTLETON_LCD -CONFIG_LMS283GF05 CONFIG_LOADS_ECHO CONFIG_LOWPOWER_ADDR CONFIG_LOWPOWER_FLAG -CONFIG_LOW_MCFCLK CONFIG_LPC32XX_ETH -CONFIG_LPC32XX_ETH_BUFS_BASE CONFIG_LPC32XX_HSUART CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY CONFIG_LPC32XX_NAND_MLC_NAND_TA @@ -732,90 +535,41 @@ CONFIG_LPC32XX_NAND_SLC_WDR_CLKS CONFIG_LPC32XX_NAND_SLC_WHOLD CONFIG_LPC32XX_NAND_SLC_WSETUP CONFIG_LPC32XX_NAND_SLC_WWIDTH -CONFIG_LPC_BASE -CONFIG_LPC_IO_BASE CONFIG_LPUART CONFIG_LPUART_32B_REG -CONFIG_LQ038J7DH53 CONFIG_LS102XA_STREAM_ID CONFIG_LSCHLV2 CONFIG_LSXHL -CONFIG_M41T94_SPI_CS -CONFIG_M520x -CONFIG_M5301x CONFIG_MACB_SEARCH_PHY -CONFIG_MACRESET_TIMEOUT CONFIG_MALLOC_F_ADDR CONFIG_MALTA -CONFIG_MARCO_MEMSET -CONFIG_MASK_AER_AO CONFIG_MAX_DSP_CPUS -CONFIG_MAX_FPGA_DEVICES CONFIG_MAX_MEM_MAPPED -CONFIG_MAX_PKT CONFIG_MAX_RAM_BANK_SIZE -CONFIG_MCF5249 -CONFIG_MCF5253 CONFIG_MCFRTC CONFIG_MCFTMR -CONFIG_MDIO_TIMEOUT CONFIG_MEMSIZE_IN_BYTES -CONFIG_MEM_HOLE_16M CONFIG_MEM_INIT_VALUE CONFIG_MEM_REMAP CONFIG_MFG_ENV_SETTINGS CONFIG_MII_DEFAULT_TSEC CONFIG_MII_INIT -CONFIG_MIPS_HUGE_TLB_SUPPORT -CONFIG_MIPS_MT_FPAFF CONFIG_MISC_COMMON -CONFIG_MIU_1BIT_INTERLEAVED CONFIG_MIU_2BIT_21_7_INTERLEAVED CONFIG_MIU_2BIT_INTERLEAVED -CONFIG_MIU_LINEAR CONFIG_MMCROOT CONFIG_MMC_DEFAULT_DEV -CONFIG_MMC_RPMB_TRACE CONFIG_MMC_SUNXI_SLOT -CONFIG_MMU CONFIG_MONITOR_IS_IN_RAM -CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION -CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN -CONFIG_MPC83XX_GPIO_0_INIT_VALUE -CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION -CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN -CONFIG_MPC83XX_GPIO_1_INIT_VALUE CONFIG_MPC85XX_FEC CONFIG_MPC85XX_FEC_NAME -CONFIG_MPC8xxx_DISABLE_BPTR CONFIG_MTD_CONCAT -CONFIG_MTD_NAND_MUSEUM_IDS CONFIG_MTD_NAND_VERIFY_WRITE -CONFIG_MTD_ONENAND_VERIFY_WRITE CONFIG_MTD_PARTITION -CONFIG_MTD_UBI_BEB_RESERVE -CONFIG_MTD_UBI_BLOCK -CONFIG_MTD_UBI_DEBUG -CONFIG_MTD_UBI_DEBUG_MSG -CONFIG_MTD_UBI_DEBUG_MSG_BLD -CONFIG_MTD_UBI_DEBUG_MSG_EBA -CONFIG_MTD_UBI_DEBUG_MSG_IO -CONFIG_MTD_UBI_DEBUG_MSG_WL -CONFIG_MTD_UBI_DEBUG_PARANOID -CONFIG_MTD_UBI_GLUEBI -CONFIG_MTD_UBI_MODULE -CONFIG_MULTI_CS CONFIG_MVGBE_PORTS -CONFIG_MVMFP_V2 CONFIG_MVS -CONFIG_MV_ETH_RXQ -CONFIG_MV_I2C_NUM -CONFIG_MV_I2C_REG CONFIG_MX27 CONFIG_MX27_CLK32 -CONFIG_MX27_TIMER_HIGH_PRECISION -CONFIG_MX28_FEC_MAC_IN_OCOTP -CONFIG_MXC_EPDC CONFIG_MXC_GPT_HCLK CONFIG_MXC_NAND_HWECC CONFIG_MXC_NAND_IP_REGS_BASE @@ -828,61 +582,31 @@ CONFIG_MXS CONFIG_MXS_AUART CONFIG_MXS_AUART_BASE CONFIG_MXS_OCOTP -CONFIG_MY_OPTION CONFIG_NANDFLASH_SIZE CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC CONFIG_NAND_CS_INIT -CONFIG_NAND_DATA_REG CONFIG_NAND_ECC_BCH -CONFIG_NAND_ENV_DST CONFIG_NAND_KIRKWOOD CONFIG_NAND_KMETER1 -CONFIG_NAND_MODE_REG CONFIG_NAND_OMAP_GPMC_WSCFG CONFIG_NAND_SECBOOT CONFIG_NAND_SPL -CONFIG_NAND_U_BOOT -CONFIG_NATSEMI -CONFIG_NCEL2C100_BASE -CONFIG_NCEMIC100_BASE -CONFIG_NDS_DLM1_BASE -CONFIG_NDS_DLM2_BASE -CONFIG_NEO -CONFIG_NET2BIG_V2 -CONFIG_NETCONSOLE_BUFFER_SIZE CONFIG_NETDEV CONFIG_NETMASK -CONFIG_NETSPACE_LITE_V2 -CONFIG_NETSPACE_MAX_V2 -CONFIG_NETSPACE_MINI_V2 -CONFIG_NETSPACE_V2 -CONFIG_NET_MULTI CONFIG_NET_RETRY_COUNT CONFIG_NEVER_ASSERT_ODT_TO_CPU -CONFIG_NFSBOOTCOMMAND CONFIG_NFS_TIMEOUT CONFIG_NOBQFMAN -CONFIG_NON_SECURE CONFIG_NORBOOT CONFIG_NORFLASH_PS32BIT -CONFIG_NO_ETH -CONFIG_NO_WAIT CONFIG_NS16550_MIN_FUNCTIONS -CONFIG_NS8382X CONFIG_NUM_DSP_CPUS -CONFIG_NUM_PAMU CONFIG_ODROID_REV_AIN -CONFIG_OFF_PADCONF CONFIG_ORIGEN CONFIG_OTHBOOTARGS CONFIG_OVERWRITE_ETHADDR_ONCE -CONFIG_PALMAS_AUDPWR CONFIG_PALMAS_POWER -CONFIG_PALMAS_SMPS7_FPWM -CONFIG_PALMAS_USB_SS_PWR -CONFIG_PARAVIRT CONFIG_PCA953X -CONFIG_PCA9698 CONFIG_PCI1 CONFIG_PCI2 CONFIG_PCIE @@ -893,11 +617,8 @@ CONFIG_PCIE4 CONFIG_PCIE_IMX CONFIG_PCIE_IMX_PERST_GPIO CONFIG_PCIE_IMX_POWER_GPIO -CONFIG_PCI_BOOTDELAY CONFIG_PCI_CLK_FREQ CONFIG_PCI_CONFIG_HOST_BRIDGE -CONFIG_PCI_EHCI_DEVICE -CONFIG_PCI_EHCI_DEVNO CONFIG_PCI_GT64120 CONFIG_PCI_IO_BUS CONFIG_PCI_IO_PHYS @@ -906,28 +627,19 @@ CONFIG_PCI_MEM_BUS CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_SIZE CONFIG_PCI_MSC01 -CONFIG_PCI_NOSCAN CONFIG_PCI_OHCI -CONFIG_PCI_OHCI_DEVNO CONFIG_PCI_PREF_BUS CONFIG_PCI_PREF_PHYS CONFIG_PCI_PREF_SIZE CONFIG_PCI_SCAN_SHOW -CONFIG_PCI_SYS_BUS -CONFIG_PCI_SYS_PHYS -CONFIG_PCI_SYS_SIZE CONFIG_PEN_ADDR_BIG_ENDIAN -CONFIG_PHYSMEM CONFIG_PHY_BASE_ADR CONFIG_PHY_ET1011C_TX_CLK_FIX CONFIG_PHY_ID CONFIG_PHY_INTERFACE_MODE CONFIG_PHY_IRAM_BASE -CONFIG_PHY_MODE_NEED_CHANGE CONFIG_PHY_RESET_DELAY -CONFIG_PIXIS_SGMII_CMD CONFIG_PL011_CLOCK -CONFIG_PL011_SERIAL_RLCR CONFIG_PL01x_PORTS CONFIG_PM CONFIG_PMC_BR_PRELIM @@ -935,24 +647,15 @@ CONFIG_PMC_OR_PRELIM CONFIG_PME_PLAT_CLK_DIV CONFIG_PMU CONFIG_PMW_BASE -CONFIG_PM_SLEEP CONFIG_POST CONFIG_POSTBOOTMENU -CONFIG_POST_BSPEC1 -CONFIG_POST_BSPEC2 -CONFIG_POST_BSPEC3 -CONFIG_POST_BSPEC4 -CONFIG_POST_BSPEC5 CONFIG_POST_EXTERNAL_WORD_FUNCS CONFIG_POST_SKIP_ENV_FLAGS -CONFIG_POST_UART -CONFIG_POST_WATCHDOG CONFIG_POWER_FSL CONFIG_POWER_FSL_MC13892 CONFIG_POWER_HI6553 CONFIG_POWER_LTC3676 CONFIG_POWER_LTC3676_I2C_ADDR -CONFIG_POWER_MAX77696_I2C_ADDR CONFIG_POWER_PFUZE100 CONFIG_POWER_PFUZE100_I2C_ADDR CONFIG_POWER_PFUZE3000 @@ -963,26 +666,18 @@ CONFIG_POWER_TPS65090_EC CONFIG_POWER_TPS65217 CONFIG_POWER_TPS65218 CONFIG_POWER_TPS65910 -CONFIG_PPC64BRIDGE CONFIG_PPC_CLUSTER_START CONFIG_PPC_SPINTABLE_COMPATIBLE CONFIG_PRAM -CONFIG_PRINTK -CONFIG_PROC_FS -CONFIG_PROFILE_ALL_BRANCHES -CONFIG_PROFILING CONFIG_PSRAM_SCFG CONFIG_PWM CONFIG_PXA_LCD CONFIG_PXA_PWR_I2C CONFIG_PXA_STD_I2C CONFIG_PXA_VGA -CONFIG_PXA_VIDEO CONFIG_QBMAN_CLK_DIV CONFIG_QIXIS_I2C_ACCESS CONFIG_QSPI -CONFIG_QUOTA -CONFIG_RAMBOOTCOMMAND CONFIG_RAMBOOT_NAND CONFIG_RAMBOOT_SPIFLASH CONFIG_RAMBOOT_TEXT_BASE @@ -990,11 +685,8 @@ CONFIG_RAMDISKFILE CONFIG_RAMDISK_ADDR CONFIG_RAMDISK_BOOT CONFIG_RD_LVL -CONFIG_REALMODE_DEBUG CONFIG_RED_LED -CONFIG_REG CONFIG_REMAKE_ELF -CONFIG_REQ CONFIG_RESERVED_01_BASE CONFIG_RESERVED_02_BASE CONFIG_RESERVED_03_BASE @@ -1005,50 +697,29 @@ CONFIG_RESET_VECTOR_ADDRESS CONFIG_RESTORE_FLASH CONFIG_RES_BLOCK_SIZE CONFIG_RMII -CONFIG_RMSTP0_ENA -CONFIG_RMSTP10_ENA -CONFIG_RMSTP11_ENA -CONFIG_RMSTP1_ENA -CONFIG_RMSTP2_ENA -CONFIG_RMSTP3_ENA -CONFIG_RMSTP4_ENA -CONFIG_RMSTP5_ENA -CONFIG_RMSTP6_ENA -CONFIG_RMSTP7_ENA -CONFIG_RMSTP8_ENA -CONFIG_RMSTP9_ENA CONFIG_ROCKCHIP_CHIP_TAG CONFIG_ROCKCHIP_MAX_INIT_SIZE CONFIG_ROCKCHIP_SDHCI_MAX_FREQ CONFIG_ROCKCHIP_STIMER_BASE -CONFIG_ROM_STUBS CONFIG_ROOTPATH CONFIG_RTC_DS1337 CONFIG_RTC_DS1337_NOOSC CONFIG_RTC_DS1338 -CONFIG_RTC_DS1339_TCR_VAL CONFIG_RTC_DS1374 -CONFIG_RTC_DS1388 -CONFIG_RTC_DS1388_TCR_VAL CONFIG_RTC_DS3231 CONFIG_RTC_FTRTC010 -CONFIG_RTC_M41T11 CONFIG_RTC_MC13XXX CONFIG_RTC_MCFRRTC -CONFIG_RTC_MCP79411 CONFIG_RTC_MXS CONFIG_RTC_PT7C4338 -CONFIG_RX_DESCR_NUM CONFIG_S5P CONFIG_S5PC100 CONFIG_S5PC110 CONFIG_S5P_PA_SYSRAM -CONFIG_S6E8AX0 CONFIG_SAMA5D3_LCD_BASE CONFIG_SAMSUNG CONFIG_SAMSUNG_ONENAND CONFIG_SANDBOX_ARCH -CONFIG_SANDBOX_BIG_ENDIAN CONFIG_SANDBOX_SDL CONFIG_SANDBOX_SPI_MAX_BUS CONFIG_SANDBOX_SPI_MAX_CS @@ -1056,37 +727,24 @@ CONFIG_SAR2_REG CONFIG_SAR_REG CONFIG_SATA1 CONFIG_SATA2 -CONFIG_SATA_ULI5288 -CONFIG_SCF0403_LCD CONFIG_SCIF_A -CONFIG_SCIF_USE_EXT_CLK CONFIG_SCSI_AHCI_PLAT CONFIG_SCSI_DEV_LIST CONFIG_SC_TIMER_CLK CONFIG_SDCARD CONFIG_SDRAM_OFFSET_FOR_RT -CONFIG_SD_BOOT_QSPI CONFIG_SECBOOT CONFIG_SECURE_BL1_ONLY -CONFIG_SECURE_RUNTIME_RESV_SRAM_SZ -CONFIG_SECURITY CONFIG_SEC_FW_SIZE CONFIG_SERIAL_BOOT CONFIG_SERIAL_FLASH -CONFIG_SERIAL_HW_FLOW_CONTROL CONFIG_SERIAL_SOFTWARE_FIFO -CONFIG_SERIRQ_CONTINUOUS_MODE CONFIG_SERVERIP CONFIG_SETUP_INITRD_TAG CONFIG_SET_BOOTARGS CONFIG_SET_DFU_ALT_BUF_LEN -CONFIG_SGI_IP28 CONFIG_SH73A0 CONFIG_SH7751_PCI -CONFIG_SHARP_LM8V31 -CONFIG_SHEEVA_88SV131 -CONFIG_SH_CMT_CLK_FREQ -CONFIG_SH_DSP CONFIG_SH_ETHER_ALIGNE_SIZE CONFIG_SH_ETHER_BASE_ADDR CONFIG_SH_ETHER_CACHE_INVALIDATE @@ -1096,49 +754,28 @@ CONFIG_SH_ETHER_PHY_MODE CONFIG_SH_ETHER_SH7734_MII CONFIG_SH_ETHER_USE_PORT CONFIG_SH_GPIO_PFC -CONFIG_SH_MMCIF_CLK CONFIG_SH_QSPI_BASE CONFIG_SH_SCIF_CLK_FREQ -CONFIG_SH_SDHI_FREQ -CONFIG_SH_SDRAM_OFFSET CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION CONFIG_SKIP_TRUNOFF_WATCHDOG CONFIG_SLIC -CONFIG_SLTTMR CONFIG_SMC91111 CONFIG_SMC91111_BASE CONFIG_SMC91111_EXT_PHY -CONFIG_SMC_AUTONEG_TIMEOUT CONFIG_SMC_USE_32_BIT -CONFIG_SMC_USE_IOFUNCS CONFIG_SMDK5420 CONFIG_SMP_PEN_ADDR CONFIG_SMSC_LPC47M CONFIG_SMSC_SIO1007 -CONFIG_SMSTP0_ENA -CONFIG_SMSTP10_ENA -CONFIG_SMSTP11_ENA -CONFIG_SMSTP1_ENA -CONFIG_SMSTP2_ENA -CONFIG_SMSTP3_ENA -CONFIG_SMSTP4_ENA -CONFIG_SMSTP5_ENA -CONFIG_SMSTP6_ENA -CONFIG_SMSTP7_ENA -CONFIG_SMSTP8_ENA -CONFIG_SMSTP9_ENA CONFIG_SOCRATES -CONFIG_SOC_OMAP3430 CONFIG_SOFT_I2C_READ_REPEATED_START CONFIG_SPD_EEPROM CONFIG_SPIFLASH CONFIG_SPI_ADDR CONFIG_SPI_BOOTING -CONFIG_SPI_DATAFLASH_WRITE_VERIFY CONFIG_SPI_FLASH_QUAD CONFIG_SPI_FLASH_SIZE CONFIG_SPI_HALF_DUPLEX -CONFIG_SPI_IDLE_VAL CONFIG_SPI_N25Q256A_RESET CONFIG_SPL_ATMEL_SIZE CONFIG_SPL_BOARD_LOAD_IMAGE @@ -1149,29 +786,20 @@ CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_CMT CONFIG_SPL_CMT_DEBUG CONFIG_SPL_COMMON_INIT_DDR -CONFIG_SPL_CONSOLE -CONFIG_SPL_ETH_DEVICE CONFIG_SPL_FLUSH_IMAGE CONFIG_SPL_FS_LOAD_ARGS_NAME CONFIG_SPL_FS_LOAD_KERNEL_NAME CONFIG_SPL_FS_LOAD_PAYLOAD_NAME CONFIG_SPL_GD_ADDR CONFIG_SPL_INIT_MINIMAL -CONFIG_SPL_JR0_LIODN_NS -CONFIG_SPL_JR0_LIODN_S CONFIG_SPL_MAX_FOOTPRINT -CONFIG_SPL_MAX_PEB_SIZE CONFIG_SPL_MAX_SIZE -CONFIG_SPL_MXS_PSWITCH_WAIT CONFIG_SPL_NAND_INIT CONFIG_SPL_NAND_MINIMAL CONFIG_SPL_NAND_RAW_ONLY CONFIG_SPL_NAND_SOFTECC -CONFIG_SPL_NAND_WORKSPACE CONFIG_SPL_PAD_TO -CONFIG_SPL_PANIC_ON_RAW_IMAGE CONFIG_SPL_PBL_PAD -CONFIG_SPL_PPAACT_ADDR CONFIG_SPL_RELOC_MALLOC_ADDR CONFIG_SPL_RELOC_MALLOC_SIZE CONFIG_SPL_RELOC_STACK @@ -1179,14 +807,12 @@ CONFIG_SPL_RELOC_TEXT_BASE CONFIG_SPL_SATA_BOOT_DEVICE CONFIG_SPL_SIZE CONFIG_SPL_SKIP_RELOCATE -CONFIG_SPL_SPAACT_ADDR CONFIG_SPL_SPI_FLASH_MINIMAL CONFIG_SPL_STACK CONFIG_SPL_STACK_ADDR CONFIG_SPL_STACK_SIZE CONFIG_SPL_START_S_PATH CONFIG_SPL_TARGET -CONFIG_SPL_UBOOT_KEY_HASH CONFIG_SRAM_BASE CONFIG_SRAM_SIZE CONFIG_SRIO1 @@ -1202,28 +828,19 @@ CONFIG_SRIO_PCIE_BOOT_SLAVE CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE -CONFIG_SSE2 CONFIG_STACKBASE CONFIG_STANDALONE_LOAD_ADDR -CONFIG_STATIC_BOARD_REV CONFIG_STD_DEVICES_SETTINGS -CONFIG_SXNI855T -CONFIG_SYSFS -CONFIG_SYSMGR_ISWGRP_HANDOFF CONFIG_SYS_64BIT CONFIG_SYS_64BIT_LBA CONFIG_SYS_83XX_DDR_USES_CS0 -CONFIG_SYS_ADDRESS_MAP_A CONFIG_SYS_AMASK0 -CONFIG_SYS_AMASK0_FINAL CONFIG_SYS_AMASK1 CONFIG_SYS_AMASK1_FINAL CONFIG_SYS_AMASK2 CONFIG_SYS_AMASK2_FINAL CONFIG_SYS_AMASK3 -CONFIG_SYS_AMASK3_FINAL CONFIG_SYS_AMASK4 -CONFIG_SYS_AMASK5 CONFIG_SYS_AMASK6 CONFIG_SYS_AMASK7 CONFIG_SYS_AT91_MAIN_CLOCK @@ -1235,10 +852,8 @@ CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ATA_DATA_OFFSET CONFIG_SYS_ATA_IDE0_OFFSET CONFIG_SYS_ATA_IDE1_OFFSET -CONFIG_SYS_ATA_PORT_ADDR CONFIG_SYS_ATA_REG_OFFSET CONFIG_SYS_ATA_STRIDE -CONFIG_SYS_ATMEL_CPU_NAME CONFIG_SYS_AUTOLOAD CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION CONFIG_SYS_AUXCORE_BOOTDATA @@ -1247,8 +862,6 @@ CONFIG_SYS_BAUDRATE_TABLE CONFIG_SYS_BCSR CONFIG_SYS_BFTIC3_BASE CONFIG_SYS_BFTIC3_SIZE -CONFIG_SYS_BITBANG_PHY_PORT -CONFIG_SYS_BITBANG_PHY_PORTS CONFIG_SYS_BMAN_CENA_BASE CONFIG_SYS_BMAN_CENA_SIZE CONFIG_SYS_BMAN_CINH_BASE @@ -1260,11 +873,9 @@ CONFIG_SYS_BMAN_NUM_PORTALS CONFIG_SYS_BMAN_SP_CENA_SIZE CONFIG_SYS_BMAN_SP_CINH_SIZE CONFIG_SYS_BMAN_SWP_ISDR_REG -CONFIG_SYS_BOARD_NAME CONFIG_SYS_BOOK3E_HV CONFIG_SYS_BOOTCOUNT_BE CONFIG_SYS_BOOTCOUNT_LE -CONFIG_SYS_BOOTFILE_PREFIX CONFIG_SYS_BOOTMAPSZ CONFIG_SYS_BOOTM_LEN CONFIG_SYS_BOOTPARAMS_LEN @@ -1273,15 +884,9 @@ CONFIG_SYS_BOOT_RAMDISK_HIGH CONFIG_SYS_CACHE_ACR0 CONFIG_SYS_CACHE_ACR1 CONFIG_SYS_CACHE_ACR2 -CONFIG_SYS_CACHE_ACR3 -CONFIG_SYS_CACHE_ACR4 -CONFIG_SYS_CACHE_ACR5 -CONFIG_SYS_CACHE_ACR6 -CONFIG_SYS_CACHE_ACR7 CONFIG_SYS_CACHE_DCACR CONFIG_SYS_CACHE_ICACR CONFIG_SYS_CACHE_STASHING -CONFIG_SYS_CADMUS_BASE_REG CONFIG_SYS_CBSIZE CONFIG_SYS_CCCR CONFIG_SYS_CCSRBAR @@ -1289,20 +894,10 @@ CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR_PHYS_HIGH CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSR_DO_NOT_RELOCATE -CONFIG_SYS_CFI_FLASH_CONFIG_REGS CONFIG_SYS_CFI_FLASH_STATUS_POLL -CONFIG_SYS_CF_INTC_REG1 -CONFIG_SYS_CH7301_I2C CONFIG_SYS_CKEN CONFIG_SYS_CLK CONFIG_SYS_CLKTL_CBCDR -CONFIG_SYS_CLK_FREQ_C100 -CONFIG_SYS_CLK_FREQ_C110 -CONFIG_SYS_CMD_CONFIGURE -CONFIG_SYS_CMD_EL -CONFIG_SYS_CMD_IAS -CONFIG_SYS_CMD_INT -CONFIG_SYS_CMD_SUSPEND CONFIG_SYS_CORE_SRAM CONFIG_SYS_CORE_SRAM_SIZE CONFIG_SYS_CPC_REINIT_F @@ -1317,7 +912,6 @@ CONFIG_SYS_CPLD_FTIM1 CONFIG_SYS_CPLD_FTIM2 CONFIG_SYS_CPLD_FTIM3 CONFIG_SYS_CPLD_SIZE -CONFIG_SYS_CPM_INTERRUPT CONFIG_SYS_CPRI CONFIG_SYS_CPRI_CLK CONFIG_SYS_CPUSPEED @@ -1351,50 +945,25 @@ CONFIG_SYS_CS3_FTIM1 CONFIG_SYS_CS3_FTIM2 CONFIG_SYS_CS3_FTIM3 CONFIG_SYS_CS3_MASK -CONFIG_SYS_CS4_BASE -CONFIG_SYS_CS4_CTRL CONFIG_SYS_CS4_FTIM0 CONFIG_SYS_CS4_FTIM1 CONFIG_SYS_CS4_FTIM2 CONFIG_SYS_CS4_FTIM3 -CONFIG_SYS_CS4_MASK -CONFIG_SYS_CS5_BASE -CONFIG_SYS_CS5_CTRL -CONFIG_SYS_CS5_FTIM0 -CONFIG_SYS_CS5_FTIM1 -CONFIG_SYS_CS5_FTIM2 -CONFIG_SYS_CS5_FTIM3 -CONFIG_SYS_CS5_MASK -CONFIG_SYS_CS6_BASE -CONFIG_SYS_CS6_CTRL CONFIG_SYS_CS6_FTIM0 CONFIG_SYS_CS6_FTIM1 CONFIG_SYS_CS6_FTIM2 CONFIG_SYS_CS6_FTIM3 -CONFIG_SYS_CS6_MASK -CONFIG_SYS_CS7_BASE -CONFIG_SYS_CS7_CTRL CONFIG_SYS_CS7_FTIM0 CONFIG_SYS_CS7_FTIM1 CONFIG_SYS_CS7_FTIM2 CONFIG_SYS_CS7_FTIM3 -CONFIG_SYS_CS7_MASK CONFIG_SYS_CSOR0 -CONFIG_SYS_CSOR0_EXT CONFIG_SYS_CSOR1 -CONFIG_SYS_CSOR1_EXT CONFIG_SYS_CSOR2 -CONFIG_SYS_CSOR2_EXT CONFIG_SYS_CSOR3 -CONFIG_SYS_CSOR3_EXT CONFIG_SYS_CSOR4 -CONFIG_SYS_CSOR4_EXT -CONFIG_SYS_CSOR5 -CONFIG_SYS_CSOR5_EXT CONFIG_SYS_CSOR6 -CONFIG_SYS_CSOR6_EXT CONFIG_SYS_CSOR7 -CONFIG_SYS_CSOR7_EXT CONFIG_SYS_CSPR0 CONFIG_SYS_CSPR0_EXT CONFIG_SYS_CSPR0_FINAL @@ -1409,8 +978,6 @@ CONFIG_SYS_CSPR3_EXT CONFIG_SYS_CSPR3_FINAL CONFIG_SYS_CSPR4 CONFIG_SYS_CSPR4_EXT -CONFIG_SYS_CSPR5 -CONFIG_SYS_CSPR5_EXT CONFIG_SYS_CSPR6 CONFIG_SYS_CSPR6_EXT CONFIG_SYS_CSPR7 @@ -1423,32 +990,14 @@ CONFIG_SYS_DA850_DDR2_SDRCR CONFIG_SYS_DA850_DDR2_SDTIMR CONFIG_SYS_DA850_DDR2_SDTIMR2 CONFIG_SYS_DA850_PLL0_PLLM -CONFIG_SYS_DA850_PLL0_PREDIV CONFIG_SYS_DA850_PLL1_PLLM CONFIG_SYS_DA850_SYSCFG_SUSPSRC -CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT CONFIG_SYS_DAVINCI_I2C_SLAVE CONFIG_SYS_DAVINCI_I2C_SLAVE1 CONFIG_SYS_DAVINCI_I2C_SLAVE2 CONFIG_SYS_DAVINCI_I2C_SPEED CONFIG_SYS_DAVINCI_I2C_SPEED1 CONFIG_SYS_DAVINCI_I2C_SPEED2 -CONFIG_SYS_DBAT0L -CONFIG_SYS_DBAT0U -CONFIG_SYS_DBAT1L -CONFIG_SYS_DBAT1U -CONFIG_SYS_DBAT2L -CONFIG_SYS_DBAT2U -CONFIG_SYS_DBAT3L -CONFIG_SYS_DBAT3U -CONFIG_SYS_DBAT4L -CONFIG_SYS_DBAT4U -CONFIG_SYS_DBAT5L -CONFIG_SYS_DBAT5U -CONFIG_SYS_DBAT6L -CONFIG_SYS_DBAT6U -CONFIG_SYS_DBAT7L -CONFIG_SYS_DBAT7U CONFIG_SYS_DCACHE_INV CONFIG_SYS_DCSRBAR CONFIG_SYS_DCSRBAR_PHYS @@ -1456,18 +1005,8 @@ CONFIG_SYS_DCSR_COP_CCP_ADDR CONFIG_SYS_DCSR_DCFG_ADDR CONFIG_SYS_DCSR_DCFG_OFFSET CONFIG_SYS_DCU_ADDR -CONFIG_SYS_DDR2_CS0_BNDS -CONFIG_SYS_DDR2_CS0_CONFIG -CONFIG_SYS_DDR2_CS1_BNDS -CONFIG_SYS_DDR2_CS1_CONFIG -CONFIG_SYS_DDR2_CS2_BNDS -CONFIG_SYS_DDR2_CS2_CONFIG -CONFIG_SYS_DDR2_CS3_BNDS -CONFIG_SYS_DDR2_CS3_CONFIG CONFIG_SYS_DDRCDR CONFIG_SYS_DDRCDR_VALUE -CONFIG_SYS_DDRD -CONFIG_SYS_DDRTC CONFIG_SYS_DDRUA CONFIG_SYS_DDR_BLOCK1_SIZE CONFIG_SYS_DDR_BLOCK2_BASE @@ -1475,52 +1014,34 @@ CONFIG_SYS_DDR_CLKSEL CONFIG_SYS_DDR_CLK_CNTL CONFIG_SYS_DDR_CLK_CONTROL CONFIG_SYS_DDR_CLK_CTRL -CONFIG_SYS_DDR_CLK_CTRL_1000 -CONFIG_SYS_DDR_CLK_CTRL_1200 CONFIG_SYS_DDR_CLK_CTRL_667 CONFIG_SYS_DDR_CLK_CTRL_800 -CONFIG_SYS_DDR_CLK_CTRL_900 CONFIG_SYS_DDR_CONFIG CONFIG_SYS_DDR_CONFIG_2 CONFIG_SYS_DDR_CONFIG_256 CONFIG_SYS_DDR_CONTROL CONFIG_SYS_DDR_CONTROL_2 -CONFIG_SYS_DDR_CPO CONFIG_SYS_DDR_CS0_BNDS CONFIG_SYS_DDR_CS0_CONFIG CONFIG_SYS_DDR_CS0_CONFIG_2 CONFIG_SYS_DDR_CS1_BNDS CONFIG_SYS_DDR_CS1_CONFIG CONFIG_SYS_DDR_CS1_CONFIG_2 -CONFIG_SYS_DDR_CS2_BNDS -CONFIG_SYS_DDR_CS2_CONFIG -CONFIG_SYS_DDR_CS3_BNDS -CONFIG_SYS_DDR_CS3_CONFIG CONFIG_SYS_DDR_DATA_INIT CONFIG_SYS_DDR_INIT_ADDR CONFIG_SYS_DDR_INIT_EXT_ADDR CONFIG_SYS_DDR_INTERVAL -CONFIG_SYS_DDR_INTERVAL_1000 -CONFIG_SYS_DDR_INTERVAL_1200 CONFIG_SYS_DDR_INTERVAL_667 CONFIG_SYS_DDR_INTERVAL_800 -CONFIG_SYS_DDR_INTERVAL_900 CONFIG_SYS_DDR_MODE CONFIG_SYS_DDR_MODE2 CONFIG_SYS_DDR_MODE_1 -CONFIG_SYS_DDR_MODE_1_1000 -CONFIG_SYS_DDR_MODE_1_1200 CONFIG_SYS_DDR_MODE_1_667 CONFIG_SYS_DDR_MODE_1_800 -CONFIG_SYS_DDR_MODE_1_900 CONFIG_SYS_DDR_MODE_2 -CONFIG_SYS_DDR_MODE_2_1000 -CONFIG_SYS_DDR_MODE_2_1200 CONFIG_SYS_DDR_MODE_2_667 CONFIG_SYS_DDR_MODE_2_800 -CONFIG_SYS_DDR_MODE_2_900 CONFIG_SYS_DDR_MODE_CONTROL -CONFIG_SYS_DDR_MODE_WEAK CONFIG_SYS_DDR_RAW_TIMING CONFIG_SYS_DDR_RCW_1 CONFIG_SYS_DDR_RCW_2 @@ -1531,53 +1052,31 @@ CONFIG_SYS_DDR_SDRAM_CLK_CNTL CONFIG_SYS_DDR_SIZE CONFIG_SYS_DDR_SR_CNTR CONFIG_SYS_DDR_TIMING_0 -CONFIG_SYS_DDR_TIMING_0_1000 -CONFIG_SYS_DDR_TIMING_0_1200 CONFIG_SYS_DDR_TIMING_0_667 CONFIG_SYS_DDR_TIMING_0_800 -CONFIG_SYS_DDR_TIMING_0_900 CONFIG_SYS_DDR_TIMING_1 -CONFIG_SYS_DDR_TIMING_1_1000 -CONFIG_SYS_DDR_TIMING_1_1200 CONFIG_SYS_DDR_TIMING_1_667 CONFIG_SYS_DDR_TIMING_1_800 -CONFIG_SYS_DDR_TIMING_1_900 CONFIG_SYS_DDR_TIMING_2 -CONFIG_SYS_DDR_TIMING_2_1000 -CONFIG_SYS_DDR_TIMING_2_1200 CONFIG_SYS_DDR_TIMING_2_667 CONFIG_SYS_DDR_TIMING_2_800 -CONFIG_SYS_DDR_TIMING_2_900 CONFIG_SYS_DDR_TIMING_3 -CONFIG_SYS_DDR_TIMING_3_1000 -CONFIG_SYS_DDR_TIMING_3_1200 CONFIG_SYS_DDR_TIMING_3_667 CONFIG_SYS_DDR_TIMING_3_800 -CONFIG_SYS_DDR_TIMING_3_900 CONFIG_SYS_DDR_TIMING_4 CONFIG_SYS_DDR_TIMING_5 -CONFIG_SYS_DDR_WRITE_DATA_DELAY -CONFIG_SYS_DDR_WRLVL_CNTL CONFIG_SYS_DDR_WRLVL_CONTROL CONFIG_SYS_DDR_WRLVL_CONTROL_667 CONFIG_SYS_DDR_WRLVL_CONTROL_800 -CONFIG_SYS_DDR_ZQ_CNTL CONFIG_SYS_DDR_ZQ_CONTROL CONFIG_SYS_DEBUG CONFIG_SYS_DEBUG_SERVER_FW_ADDR CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS -CONFIG_SYS_DEFAULT_VIDEO_MODE CONFIG_SYS_DIALOG_PMIC_I2C_ADDR -CONFIG_SYS_DIMM_SLOTS_PER_CTLR -CONFIG_SYS_DIRECT_FLASH_NFS CONFIG_SYS_DIRECT_FLASH_TFTP CONFIG_SYS_DISCOVER_PHY CONFIG_SYS_DIU_ADDR -CONFIG_SYS_DP501_BASE -CONFIG_SYS_DP501_DIFFERENTIAL -CONFIG_SYS_DP501_I2C -CONFIG_SYS_DP501_VCAPCTRL0 CONFIG_SYS_DPAA_DCE CONFIG_SYS_DPAA_FMAN CONFIG_SYS_DPAA_PME @@ -1587,24 +1086,17 @@ CONFIG_SYS_DP_DDR_BASE_PHY CONFIG_SYS_DRAM_BASE CONFIG_SYS_DRAM_SIZE CONFIG_SYS_DRAM_TEST -CONFIG_SYS_DSPI_CS0 -CONFIG_SYS_DSPI_CS2 CONFIG_SYS_DSPI_CTAR0 CONFIG_SYS_DSPI_CTAR1 CONFIG_SYS_DSPI_CTAR2 CONFIG_SYS_DSPI_CTAR3 CONFIG_SYS_DV_NOR_BOOT_CFG -CONFIG_SYS_EBI_CFGR_VAL -CONFIG_SYS_EBI_CSA_VAL CONFIG_SYS_EEPROM_BUS_NUM CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE CONFIG_SYS_EEPROM_WREN CONFIG_SYS_EHCI_USB1_ADDR -CONFIG_SYS_ELO3_DMA3 -CONFIG_SYS_EMAC_TI_CLKDIV CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS CONFIG_SYS_ENET_BD_BASE -CONFIG_SYS_ENV_ADDR CONFIG_SYS_ENV_SECT_SIZE CONFIG_SYS_ETHOC_BASE CONFIG_SYS_ETHOC_BUFFER_ADDR @@ -1612,23 +1104,14 @@ CONFIG_SYS_ETVPE_CLK CONFIG_SYS_EXCEPTION_VECTORS_HIGH CONFIG_SYS_FAST_CLK CONFIG_SYS_FAULT_ECHO_LINK_DOWN -CONFIG_SYS_FAULT_MII_ADDR CONFIG_SYS_FDT_BASE -CONFIG_SYS_FDT_LOAD_ADDR CONFIG_SYS_FDT_PAD -CONFIG_SYS_FEC0_IOBASE -CONFIG_SYS_FEC1_IOBASE CONFIG_SYS_FECI2C CONFIG_SYS_FEC_BUF_USE_SRAM -CONFIG_SYS_FIXED_PHY_ADDR -CONFIG_SYS_FIXED_PHY_PORT -CONFIG_SYS_FIXED_PHY_PORTS CONFIG_SYS_FLASH0 CONFIG_SYS_FLASH1 CONFIG_SYS_FLASH1_BASE_PHYS CONFIG_SYS_FLASH1_BASE_PHYS_EARLY -CONFIG_SYS_FLASHBOOT -CONFIG_SYS_FLASH_AUTOPROTECT_LIST CONFIG_SYS_FLASH_BANKS_LIST CONFIG_SYS_FLASH_BANKS_SIZES CONFIG_SYS_FLASH_BASE @@ -1637,16 +1120,11 @@ CONFIG_SYS_FLASH_BASE1 CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE_PHYS_EARLY CONFIG_SYS_FLASH_BR_PRELIM -CONFIG_SYS_FLASH_CFI_AMD_RESET CONFIG_SYS_FLASH_CFI_NONBLOCK CONFIG_SYS_FLASH_CFI_WIDTH CONFIG_SYS_FLASH_CHECKSUM -CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE CONFIG_SYS_FLASH_EMPTY_INFO CONFIG_SYS_FLASH_ERASE_TOUT -CONFIG_SYS_FLASH_LEGACY_256Kx8 -CONFIG_SYS_FLASH_LEGACY_512Kx16 -CONFIG_SYS_FLASH_LEGACY_512Kx8 CONFIG_SYS_FLASH_LOCK_TOUT CONFIG_SYS_FLASH_OR_PRELIM CONFIG_SYS_FLASH_PARMSECT_SZ @@ -1655,12 +1133,10 @@ CONFIG_SYS_FLASH_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ CONFIG_SYS_FLASH_SIZE CONFIG_SYS_FLASH_UNLOCK_TOUT -CONFIG_SYS_FLASH_VERIFY_AFTER_WRITE CONFIG_SYS_FLASH_WRITE_TOUT CONFIG_SYS_FLYCNFG_VAL CONFIG_SYS_FM1_10GEC1_PHY_ADDR CONFIG_SYS_FM1_CLK -CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR CONFIG_SYS_FM1_DTSEC1_PHY_ADDR CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR CONFIG_SYS_FM1_DTSEC2_PHY_ADDR @@ -1670,34 +1146,16 @@ CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR CONFIG_SYS_FM1_DTSEC4_PHY_ADDR CONFIG_SYS_FM1_DTSEC4_RISER_PHY_ADDR CONFIG_SYS_FM1_DTSEC5_PHY_ADDR -CONFIG_SYS_FM1_DTSEC_MDIO_ADDR CONFIG_SYS_FM1_QSGMII11_PHY_ADDR CONFIG_SYS_FM1_QSGMII21_PHY_ADDR -CONFIG_SYS_FM1_TGEC_MDIO_ADDR CONFIG_SYS_FM2_10GEC1_PHY_ADDR CONFIG_SYS_FM2_CLK CONFIG_SYS_FM2_DTSEC1_PHY_ADDR CONFIG_SYS_FM2_DTSEC2_PHY_ADDR CONFIG_SYS_FM2_DTSEC3_PHY_ADDR CONFIG_SYS_FM2_DTSEC4_PHY_ADDR -CONFIG_SYS_FM2_DTSEC_MDIO_ADDR -CONFIG_SYS_FM2_TGEC_MDIO_ADDR CONFIG_SYS_FMAN_V3 CONFIG_SYS_FM_MURAM_SIZE -CONFIG_SYS_FORM_3U_CPCI -CONFIG_SYS_FORM_3U_VPX -CONFIG_SYS_FORM_6U_CPCI -CONFIG_SYS_FORM_6U_VPX -CONFIG_SYS_FORM_AMC -CONFIG_SYS_FORM_ATCA_AMC -CONFIG_SYS_FORM_ATCA_PMC -CONFIG_SYS_FORM_CUSTOM -CONFIG_SYS_FORM_PCI -CONFIG_SYS_FORM_PCI_EXPRESS -CONFIG_SYS_FORM_PMC -CONFIG_SYS_FORM_PMC_XMC -CONFIG_SYS_FORM_VME -CONFIG_SYS_FORM_XMC CONFIG_SYS_FPGAREG_DATE CONFIG_SYS_FPGAREG_DIPSW CONFIG_SYS_FPGAREG_FREQ @@ -1705,10 +1163,6 @@ CONFIG_SYS_FPGAREG_RESET CONFIG_SYS_FPGAREG_RESET_CODE CONFIG_SYS_FPGA_AMASK CONFIG_SYS_FPGA_BASE -CONFIG_SYS_FPGA_CHECK_BUSY -CONFIG_SYS_FPGA_CHECK_CTRLC -CONFIG_SYS_FPGA_CHECK_ERROR -CONFIG_SYS_FPGA_COUNT CONFIG_SYS_FPGA_CSOR CONFIG_SYS_FPGA_CSPR CONFIG_SYS_FPGA_CSPR_EXT @@ -1716,25 +1170,15 @@ CONFIG_SYS_FPGA_FTIM0 CONFIG_SYS_FPGA_FTIM1 CONFIG_SYS_FPGA_FTIM2 CONFIG_SYS_FPGA_FTIM3 -CONFIG_SYS_FPGA_NO_RFL_HI CONFIG_SYS_FPGA_PROG_FEEDBACK -CONFIG_SYS_FPGA_PROG_TIME CONFIG_SYS_FPGA_SIZE CONFIG_SYS_FPGA_WAIT -CONFIG_SYS_FPGA_WAIT_BUSY -CONFIG_SYS_FPGA_WAIT_CONFIG -CONFIG_SYS_FPGA_WAIT_INIT -CONFIG_SYS_FSL_AIOP1_BASE -CONFIG_SYS_FSL_AIOP1_SIZE -CONFIG_SYS_FSL_B4860QDS_XFI_ERR CONFIG_SYS_FSL_BMAN_ADDR CONFIG_SYS_FSL_BMAN_OFFSET -CONFIG_SYS_FSL_CCSR_BASE CONFIG_SYS_FSL_CCSR_GUR_BE CONFIG_SYS_FSL_CCSR_GUR_LE CONFIG_SYS_FSL_CCSR_SCFG_BE CONFIG_SYS_FSL_CCSR_SCFG_LE -CONFIG_SYS_FSL_CCSR_SIZE CONFIG_SYS_FSL_CH3_CLK_CTRL_ADDR CONFIG_SYS_FSL_CH3_CLK_GRPA_ADDR CONFIG_SYS_FSL_CH3_CLK_GRPB_ADDR @@ -1771,28 +1215,19 @@ CONFIG_SYS_FSL_CPC_ADDR CONFIG_SYS_FSL_CPC_OFFSET CONFIG_SYS_FSL_CSU_ADDR CONFIG_SYS_FSL_DCFG_ADDR -CONFIG_SYS_FSL_DCSR_BASE CONFIG_SYS_FSL_DCSR_DDR2_ADDR CONFIG_SYS_FSL_DCSR_DDR3_ADDR CONFIG_SYS_FSL_DCSR_DDR4_ADDR CONFIG_SYS_FSL_DCSR_DDR_ADDR -CONFIG_SYS_FSL_DCSR_SIZE CONFIG_SYS_FSL_DCU_BE CONFIG_SYS_FSL_DCU_LE CONFIG_SYS_FSL_DDR2_ADDR -CONFIG_SYS_FSL_DDR3L CONFIG_SYS_FSL_DDR3_ADDR CONFIG_SYS_FSL_DDR_ADDR CONFIG_SYS_FSL_DDR_EMU CONFIG_SYS_FSL_DDR_INTLV_256B CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY -CONFIG_SYS_FSL_DRAM_BASE1 -CONFIG_SYS_FSL_DRAM_BASE2 -CONFIG_SYS_FSL_DRAM_BASE3 -CONFIG_SYS_FSL_DRAM_SIZE1 -CONFIG_SYS_FSL_DRAM_SIZE2 -CONFIG_SYS_FSL_DRAM_SIZE3 CONFIG_SYS_FSL_DSPI_BE CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT CONFIG_SYS_FSL_DSP_CCSR_DDR_ADDR @@ -1801,7 +1236,6 @@ CONFIG_SYS_FSL_DSP_DDR_ADDR CONFIG_SYS_FSL_DSP_M2_RAM_ADDR CONFIG_SYS_FSL_DSP_M3_RAM_ADDR CONFIG_SYS_FSL_ERRATUM_A008751 -CONFIG_SYS_FSL_ERRATUM_A_004934 CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_FSL_ESDHC_BE CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT @@ -1809,7 +1243,6 @@ CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE CONFIG_SYS_FSL_ESDHC_LE CONFIG_SYS_FSL_ESDHC_NUM CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK -CONFIG_SYS_FSL_ESDHC_USE_PIO CONFIG_SYS_FSL_FM CONFIG_SYS_FSL_FM1_ADDR CONFIG_SYS_FSL_FM1_DTSEC1_ADDR @@ -1835,28 +1268,14 @@ CONFIG_SYS_FSL_FM2_RX4_1G_OFFSET CONFIG_SYS_FSL_FM2_RX5_1G_OFFSET CONFIG_SYS_FSL_FMAN_ADDR CONFIG_SYS_FSL_GUTS_ADDR -CONFIG_SYS_FSL_I2C -CONFIG_SYS_FSL_IFC_BASE -CONFIG_SYS_FSL_IFC_BASE1 -CONFIG_SYS_FSL_IFC_BASE2 CONFIG_SYS_FSL_IFC_BE CONFIG_SYS_FSL_IFC_LE -CONFIG_SYS_FSL_IFC_SIZE -CONFIG_SYS_FSL_IFC_SIZE1 -CONFIG_SYS_FSL_IFC_SIZE1_1 -CONFIG_SYS_FSL_IFC_SIZE2 CONFIG_SYS_FSL_ISBC_VER CONFIG_SYS_FSL_JR0_ADDR CONFIG_SYS_FSL_JR0_OFFSET CONFIG_SYS_FSL_LS1_CLK_ADDR CONFIG_SYS_FSL_LSCH3_SERDES_ADDR CONFIG_SYS_FSL_MAX_NUM_OF_SEC -CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR -CONFIG_SYS_FSL_MC_BASE -CONFIG_SYS_FSL_MC_SIZE -CONFIG_SYS_FSL_NI_BASE -CONFIG_SYS_FSL_NI_SIZE -CONFIG_SYS_FSL_NO_SERDES CONFIG_SYS_FSL_NUM_CC_PLL CONFIG_SYS_FSL_NUM_CC_PLLS CONFIG_SYS_FSL_OCRAM_BASE @@ -1865,26 +1284,16 @@ CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS CONFIG_SYS_FSL_PAMU_OFFSET CONFIG_SYS_FSL_PCIE_COMPAT CONFIG_SYS_FSL_PCI_VER_3_X -CONFIG_SYS_FSL_PEBUF_BASE -CONFIG_SYS_FSL_PEBUF_SIZE CONFIG_SYS_FSL_PEX_LUT_BE CONFIG_SYS_FSL_PEX_LUT_LE CONFIG_SYS_FSL_PMIC_I2C_ADDR CONFIG_SYS_FSL_PMU_ADDR CONFIG_SYS_FSL_PMU_CLTBENR -CONFIG_SYS_FSL_QBMAN_BASE -CONFIG_SYS_FSL_QBMAN_SIZE -CONFIG_SYS_FSL_QBMAN_SIZE_1 CONFIG_SYS_FSL_QMAN_ADDR CONFIG_SYS_FSL_QMAN_OFFSET CONFIG_SYS_FSL_QMAN_V3 CONFIG_SYS_FSL_QSPI_BASE -CONFIG_SYS_FSL_QSPI_BASE1 -CONFIG_SYS_FSL_QSPI_BASE2 CONFIG_SYS_FSL_QSPI_LE -CONFIG_SYS_FSL_QSPI_SIZE -CONFIG_SYS_FSL_QSPI_SIZE1 -CONFIG_SYS_FSL_QSPI_SIZE2 CONFIG_SYS_FSL_RAID_ENGINE CONFIG_SYS_FSL_RAID_ENGINE_ADDR CONFIG_SYS_FSL_RAID_ENGINE_OFFSET @@ -1923,49 +1332,15 @@ CONFIG_SYS_FSL_SRIO_OFFSET CONFIG_SYS_FSL_SRK_LE CONFIG_SYS_FSL_TBCLK_DIV CONFIG_SYS_FSL_TIMER_ADDR -CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_FSL_USB1_PHY_ENABLE -CONFIG_SYS_FSL_USB2_ADDR CONFIG_SYS_FSL_USB2_PHY_ENABLE -CONFIG_SYS_FSL_USB_CTRL_PHY_EN -CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE -CONFIG_SYS_FSL_USB_ENABLE_OVERRIDE -CONFIG_SYS_FSL_USB_HS_DISCNCT_INC -CONFIG_SYS_FSL_USB_INTERNAL_SOC_CLK_EN CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY -CONFIG_SYS_FSL_USB_PLLPRG1_PHY_DIV -CONFIG_SYS_FSL_USB_PLLPRG2_FRAC_LPF_EN -CONFIG_SYS_FSL_USB_PLLPRG2_MFI -CONFIG_SYS_FSL_USB_PLLPRG2_MFI_INTERNAL_CLK -CONFIG_SYS_FSL_USB_PLLPRG2_PHY1_CLK_EN -CONFIG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN -CONFIG_SYS_FSL_USB_PLLPRG2_PLL_EN -CONFIG_SYS_FSL_USB_PLLPRG2_REF_DIV -CONFIG_SYS_FSL_USB_PLLPRG2_REF_DIV_INTERNAL_CLK -CONFIG_SYS_FSL_USB_PWRFLT_CR_EN -CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL -CONFIG_SYS_FSL_USB_SQUELCH_PROG_MASK -CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_0 -CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_3 -CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0 -CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3 -CONFIG_SYS_FSL_USB_SYS_CLK_VALID -CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_EN -CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_MASK CONFIG_SYS_FSL_USDHC_NUM CONFIG_SYS_FSL_WDOG_BE CONFIG_SYS_FSL_WRIOP1_ADDR -CONFIG_SYS_FSL_WRIOP1_BASE CONFIG_SYS_FSL_WRIOP1_MDIO1 CONFIG_SYS_FSL_WRIOP1_MDIO2 -CONFIG_SYS_FSL_WRIOP1_SIZE -CONFIG_SYS_FSL_XHCI_USB1_ADDR -CONFIG_SYS_FSL_XHCI_USB2_ADDR -CONFIG_SYS_FSL_XHCI_USB3_ADDR -CONFIG_SYS_FSMC_BASE -CONFIG_SYS_FSMC_NAND_16BIT -CONFIG_SYS_FSMC_NAND_8BIT CONFIG_SYS_FTAHBC020S_SLAVE_BSR_6 CONFIG_SYS_FTAHBC020S_SLAVE_BSR_BASE CONFIG_SYS_FTPMU010_PDLLCR0_HCLKOUTDIS @@ -2002,16 +1377,10 @@ CONFIG_SYS_GPDR0_VAL CONFIG_SYS_GPDR1_VAL CONFIG_SYS_GPDR2_VAL CONFIG_SYS_GPDR3_VAL -CONFIG_SYS_GPIO1_DAT -CONFIG_SYS_GPIO1_DIR CONFIG_SYS_GPIO1_EN CONFIG_SYS_GPIO1_FUNC CONFIG_SYS_GPIO1_LED CONFIG_SYS_GPIO1_OUT -CONFIG_SYS_GPIO1_PRELIM -CONFIG_SYS_GPIO2_DAT -CONFIG_SYS_GPIO2_DIR -CONFIG_SYS_GPIO2_PRELIM CONFIG_SYS_GPIO_EN CONFIG_SYS_GPIO_FUNC CONFIG_SYS_GPIO_OUT @@ -2021,29 +1390,9 @@ CONFIG_SYS_GPSR1_VAL CONFIG_SYS_GPSR2_VAL CONFIG_SYS_GPSR3_VAL CONFIG_SYS_HALT_BEFOR_RAM_JUMP -CONFIG_SYS_HELP_CMD_WIDTH -CONFIG_SYS_HIGH CONFIG_SYS_HMI_BASE -CONFIG_SYS_HRCW_HIGH -CONFIG_SYS_HRCW_LOW CONFIG_SYS_HZ_CLOCK -CONFIG_SYS_I2C2_FSL_OFFSET -CONFIG_SYS_I2C2_OFFSET -CONFIG_SYS_I2C2_PINMUX_CLR -CONFIG_SYS_I2C2_PINMUX_REG -CONFIG_SYS_I2C2_PINMUX_SET -CONFIG_SYS_I2C_0 -CONFIG_SYS_I2C_2 -CONFIG_SYS_I2C_5 -CONFIG_SYS_I2C_BASE0 -CONFIG_SYS_I2C_BASE1 -CONFIG_SYS_I2C_BASE2 -CONFIG_SYS_I2C_BASE3 -CONFIG_SYS_I2C_BASE4 -CONFIG_SYS_I2C_BASE5 CONFIG_SYS_I2C_BUSES -CONFIG_SYS_I2C_CLK_OFFSET -CONFIG_SYS_I2C_DIRECT_BUS CONFIG_SYS_I2C_DVI_ADDR CONFIG_SYS_I2C_DVI_BUS_NUM CONFIG_SYS_I2C_EEPROM_CCID @@ -2052,13 +1401,10 @@ CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_BITS CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_DELAY_MS CONFIG_SYS_I2C_EXPANDER_ADDR CONFIG_SYS_I2C_FPGA_ADDR -CONFIG_SYS_I2C_FRAM CONFIG_SYS_I2C_G762_ADDR CONFIG_SYS_I2C_IFDR_DIV CONFIG_SYS_I2C_INIT_BOARD CONFIG_SYS_I2C_LDI_ADDR -CONFIG_SYS_I2C_LPC32XX_SLAVE -CONFIG_SYS_I2C_LPC32XX_SPEED CONFIG_SYS_I2C_MAX_HOPS CONFIG_SYS_I2C_NOPROBES CONFIG_SYS_I2C_PCA953X_ADDR @@ -2072,24 +1418,7 @@ CONFIG_SYS_I2C_QIXIS_ADDR CONFIG_SYS_I2C_RTC_ADDR CONFIG_SYS_I2C_TCA642X_ADDR CONFIG_SYS_I2C_TCA642X_BUS_NUM -CONFIG_SYS_IBAT0L -CONFIG_SYS_IBAT0U -CONFIG_SYS_IBAT1L -CONFIG_SYS_IBAT1U -CONFIG_SYS_IBAT2L -CONFIG_SYS_IBAT2U -CONFIG_SYS_IBAT3L -CONFIG_SYS_IBAT3U -CONFIG_SYS_IBAT4L -CONFIG_SYS_IBAT4U -CONFIG_SYS_IBAT5L -CONFIG_SYS_IBAT5U -CONFIG_SYS_IBAT6L -CONFIG_SYS_IBAT6U -CONFIG_SYS_IBAT7L -CONFIG_SYS_IBAT7U CONFIG_SYS_ICACHE_INV -CONFIG_SYS_ICS8N3QV01_I2C CONFIG_SYS_IDE_MAXBUS CONFIG_SYS_IDE_MAXDEVICE CONFIG_SYS_IFC_ADDR @@ -2114,21 +1443,16 @@ CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_INPUT_CLKSRC CONFIG_SYS_INTERLAKEN -CONFIG_SYS_INTR_BASE CONFIG_SYS_INT_FLASH_BASE CONFIG_SYS_INT_FLASH_ENABLE CONFIG_SYS_IO_BASE -CONFIG_SYS_ISA_BASE CONFIG_SYS_ISA_IO CONFIG_SYS_ISA_IO_BASE_ADDRESS -CONFIG_SYS_ISA_MEM CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_JFFS2_FIRST_SECTOR CONFIG_SYS_JFFS2_NUM_BANKS -CONFIG_SYS_JFFS2_SORT_FRAGMENTS CONFIG_SYS_KMBEC_FPGA_BASE CONFIG_SYS_KMBEC_FPGA_SIZE -CONFIG_SYS_KWD_CONFIG CONFIG_SYS_L2_PL310 CONFIG_SYS_L2_SIZE CONFIG_SYS_L3_SIZE @@ -2152,27 +1476,20 @@ CONFIG_SYS_LBC_SDRAM_SIZE CONFIG_SYS_LDB_CLOCK CONFIG_SYS_LIME_BASE CONFIG_SYS_LIME_SIZE -CONFIG_SYS_LINUX_LOWMEM_MAX_SIZE CONFIG_SYS_LOADS_BAUD_CHANGE CONFIG_SYS_LOW CONFIG_SYS_LOWMEM_BASE -CONFIG_SYS_LOW_RES_TIMER CONFIG_SYS_LPAE_SDRAM_BASE CONFIG_SYS_LS1_DDR_BLOCK1_SIZE CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS -CONFIG_SYS_LS_MC_DPC_IN_DDR CONFIG_SYS_LS_MC_DPC_MAX_LENGTH -CONFIG_SYS_LS_MC_DPL_IN_DDR CONFIG_SYS_LS_MC_DPL_MAX_LENGTH CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET -CONFIG_SYS_LS_MC_FW_IN_DDR -CONFIG_SYS_LS_PPA_FW_IN_xxx CONFIG_SYS_M41T11_BASE_YEAR -CONFIG_SYS_M41T11_EXT_CENTURY_DATA CONFIG_SYS_MAIN_PWR_ON CONFIG_SYS_MALLOC_SIMPLE CONFIG_SYS_MAMR @@ -2181,7 +1498,6 @@ CONFIG_SYS_MAPPED_RAM_BASE CONFIG_SYS_MASTER_CLOCK CONFIG_SYS_MATRIX_EBI0CSA_VAL CONFIG_SYS_MATRIX_EBICSA_VAL -CONFIG_SYS_MATRIX_MCFG_REMAP CONFIG_SYS_MAXARGS CONFIG_SYS_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT @@ -2189,39 +1505,32 @@ CONFIG_SYS_MAX_FLASH_SECT CONFIG_SYS_MAX_I2C_BUS CONFIG_SYS_MAX_NAND_CHIPS CONFIG_SYS_MAX_NAND_DEVICE -CONFIG_SYS_MAX_PCI_EPS CONFIG_SYS_MBAR CONFIG_SYS_MBAR2 CONFIG_SYS_MCATT0_VAL CONFIG_SYS_MCATT1_VAL CONFIG_SYS_MCFRRTC_BASE -CONFIG_SYS_MCFRTC_BASE -CONFIG_SYS_MCF_SYNCR CONFIG_SYS_MCIO0_VAL CONFIG_SYS_MCIO1_VAL CONFIG_SYS_MCKR CONFIG_SYS_MCKR1_VAL CONFIG_SYS_MCKR2_VAL CONFIG_SYS_MCKR_CSS -CONFIG_SYS_MCKR_VAL CONFIG_SYS_MCMEM0_VAL CONFIG_SYS_MCMEM1_VAL CONFIG_SYS_MDCNFG_VAL CONFIG_SYS_MDIO1_OFFSET -CONFIG_SYS_MDIO_BASE_ADDR CONFIG_SYS_MDMRS_VAL CONFIG_SYS_MDREFR_VAL CONFIG_SYS_MECR_VAL CONFIG_SYS_MEMAC_LITTLE_ENDIAN CONFIG_SYS_MEMORY_BASE CONFIG_SYS_MEMORY_SIZE -CONFIG_SYS_MEM_MAP CONFIG_SYS_MEM_RESERVE_SECURE CONFIG_SYS_MEM_SIZE CONFIG_SYS_MEM_TOP_HIDE CONFIG_SYS_MFD CONFIG_SYS_MHZ -CONFIG_SYS_MII_MODE CONFIG_SYS_MIPS_TIMER_FREQ CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS @@ -2244,8 +1553,6 @@ CONFIG_SYS_MPC83xx_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_OFFSET CONFIG_SYS_MPC83xx_USB1_ADDR CONFIG_SYS_MPC83xx_USB1_OFFSET -CONFIG_SYS_MPC83xx_USB2_ADDR -CONFIG_SYS_MPC83xx_USB2_OFFSET CONFIG_SYS_MPC85XX_NO_RESETVEC CONFIG_SYS_MPC85xx_CPM_ADDR CONFIG_SYS_MPC85xx_CPM_OFFSET @@ -2306,42 +1613,24 @@ CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET CONFIG_SYS_MPC8xxx_DDR2_OFFSET CONFIG_SYS_MPC8xxx_DDR3_OFFSET CONFIG_SYS_MPC8xxx_DDR_OFFSET -CONFIG_SYS_MPC8xxx_GUTS_ADDR CONFIG_SYS_MPC8xxx_PIC_ADDR -CONFIG_SYS_MPC92469AC CONFIG_SYS_MRAM_BASE CONFIG_SYS_MRAM_SIZE CONFIG_SYS_MSC0_VAL CONFIG_SYS_MSC1_VAL CONFIG_SYS_MSC2_VAL -CONFIG_SYS_MX5_CLK32 -CONFIG_SYS_MX5_HCLK -CONFIG_SYS_MX6_CLK32 -CONFIG_SYS_MX6_HCLK -CONFIG_SYS_MX7_CLK32 -CONFIG_SYS_MX7_HCLK -CONFIG_SYS_MXS_VDD5V_ONLY CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST -CONFIG_SYS_NAND_ACTL_ALE -CONFIG_SYS_NAND_ACTL_CLE -CONFIG_SYS_NAND_ACTL_DELAY -CONFIG_SYS_NAND_ACTL_NCE -CONFIG_SYS_NAND_ALE CONFIG_SYS_NAND_AMASK CONFIG_SYS_NAND_BASE CONFIG_SYS_NAND_BASE2 CONFIG_SYS_NAND_BASE_LIST CONFIG_SYS_NAND_BASE_PHYS -CONFIG_SYS_NAND_BOOT CONFIG_SYS_NAND_BR_PRELIM -CONFIG_SYS_NAND_BUSWIDTH_16 -CONFIG_SYS_NAND_CLE CONFIG_SYS_NAND_CS CONFIG_SYS_NAND_CSOR CONFIG_SYS_NAND_CSPR CONFIG_SYS_NAND_CSPR_EXT CONFIG_SYS_NAND_DATA_BASE -CONFIG_SYS_NAND_DBW_16 CONFIG_SYS_NAND_DBW_8 CONFIG_SYS_NAND_DDR_LAW CONFIG_SYS_NAND_ECCBYTES @@ -2359,8 +1648,6 @@ CONFIG_SYS_NAND_FTIM3 CONFIG_SYS_NAND_HW_ECC CONFIG_SYS_NAND_HW_ECC_OOBFIRST CONFIG_SYS_NAND_LARGEPAGE -CONFIG_SYS_NAND_LBLAWAR_PRELIM -CONFIG_SYS_NAND_LBLAWBAR_PRELIM CONFIG_SYS_NAND_MASK_ALE CONFIG_SYS_NAND_MASK_CLE CONFIG_SYS_NAND_MAX_ECCPOS @@ -2370,10 +1657,8 @@ CONFIG_SYS_NAND_NO_SUBPAGE_WRITE CONFIG_SYS_NAND_OR_PRELIM CONFIG_SYS_NAND_PAGE_2K CONFIG_SYS_NAND_PAGE_4K -CONFIG_SYS_NAND_QUIET CONFIG_SYS_NAND_READY_PIN CONFIG_SYS_NAND_REGS_BASE -CONFIG_SYS_NAND_SELECT_DEVICE CONFIG_SYS_NAND_SIZE CONFIG_SYS_NAND_SPL_KERNEL_OFFS CONFIG_SYS_NAND_U_BOOT_DST @@ -2397,14 +1682,12 @@ CONFIG_SYS_NOR_FTIM1 CONFIG_SYS_NOR_FTIM2 CONFIG_SYS_NOR_FTIM3 CONFIG_SYS_NS16550_CLK -CONFIG_SYS_NS16550_CLK_DIV CONFIG_SYS_NS16550_COM1 CONFIG_SYS_NS16550_COM2 CONFIG_SYS_NS16550_COM3 CONFIG_SYS_NS16550_COM4 CONFIG_SYS_NS16550_COM5 CONFIG_SYS_NS16550_COM6 -CONFIG_SYS_NS16550_IER CONFIG_SYS_NS16550_MEM32 CONFIG_SYS_NS16550_PORT_MAPPED CONFIG_SYS_NS16550_REG_SIZE @@ -2416,22 +1699,15 @@ CONFIG_SYS_NUM_FM2_10GEC CONFIG_SYS_NUM_FM2_DTSEC CONFIG_SYS_NUM_FMAN CONFIG_SYS_NUM_I2C_BUSES -CONFIG_SYS_NUM_IRQS -CONFIG_SYS_NVRAM_ACCESS_ROUTINE CONFIG_SYS_NVRAM_BASE_ADDR CONFIG_SYS_NVRAM_SIZE CONFIG_SYS_OBIR -CONFIG_SYS_OHCI_BE_CONTROLLER CONFIG_SYS_OHCI_SWAP_REG_ACCESS CONFIG_SYS_OMAP_ABE_SYSCK CONFIG_SYS_ONENAND_BASE CONFIG_SYS_ONENAND_BLOCK_SIZE -CONFIG_SYS_ONENAND_PAGE_SIZE -CONFIG_SYS_OR0_REMAP -CONFIG_SYS_OR1_REMAP CONFIG_SYS_OR_TIMING_MRAM CONFIG_SYS_OSCIN_FREQ -CONFIG_SYS_OSD_DH CONFIG_SYS_OSPR_OFFSET CONFIG_SYS_PACNT CONFIG_SYS_PADAT @@ -2447,7 +1723,6 @@ CONFIG_SYS_PBDDR CONFIG_SYS_PBI_FLASH_BASE CONFIG_SYS_PBI_FLASH_WINDOW CONFIG_SYS_PBSIZE -CONFIG_SYS_PCA953X_NVM_WP CONFIG_SYS_PCCNT CONFIG_SYS_PCDAT CONFIG_SYS_PCDDR @@ -2464,7 +1739,6 @@ CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_SIZE CONFIG_SYS_PCI1_MEM_VIRT CONFIG_SYS_PCI2_ADDR -CONFIG_SYS_PCI64_MEMORY_BUS CONFIG_SYS_PCIE CONFIG_SYS_PCIE1_ADDR CONFIG_SYS_PCIE1_BASE @@ -2478,10 +1752,8 @@ CONFIG_SYS_PCIE1_MEM_BASE CONFIG_SYS_PCIE1_MEM_PHYS CONFIG_SYS_PCIE1_MEM_SIZE CONFIG_SYS_PCIE1_MEM_VIRT -CONFIG_SYS_PCIE1_NAME CONFIG_SYS_PCIE1_PHYS_ADDR CONFIG_SYS_PCIE1_PHYS_BASE -CONFIG_SYS_PCIE1_PHYS_SIZE CONFIG_SYS_PCIE1_VIRT_ADDR CONFIG_SYS_PCIE2_ADDR CONFIG_SYS_PCIE2_BASE @@ -2495,17 +1767,14 @@ CONFIG_SYS_PCIE2_MEM_BASE CONFIG_SYS_PCIE2_MEM_PHYS CONFIG_SYS_PCIE2_MEM_SIZE CONFIG_SYS_PCIE2_MEM_VIRT -CONFIG_SYS_PCIE2_NAME CONFIG_SYS_PCIE2_PHYS_ADDR CONFIG_SYS_PCIE2_PHYS_BASE -CONFIG_SYS_PCIE2_PHYS_SIZE CONFIG_SYS_PCIE2_VIRT_ADDR CONFIG_SYS_PCIE3_ADDR CONFIG_SYS_PCIE3_IO_PHYS CONFIG_SYS_PCIE3_IO_VIRT CONFIG_SYS_PCIE3_MEM_PHYS CONFIG_SYS_PCIE3_MEM_VIRT -CONFIG_SYS_PCIE3_NAME CONFIG_SYS_PCIE3_PHYS_ADDR CONFIG_SYS_PCIE3_PHYS_SIZE CONFIG_SYS_PCIE4_ADDR @@ -2514,68 +1783,33 @@ CONFIG_SYS_PCIE4_IO_VIRT CONFIG_SYS_PCIE4_MEM_BUS CONFIG_SYS_PCIE4_MEM_PHYS CONFIG_SYS_PCIE4_MEM_VIRT -CONFIG_SYS_PCIE4_NAME CONFIG_SYS_PCIE4_PHYS_ADDR -CONFIG_SYS_PCIE4_PHYS_SIZE CONFIG_SYS_PCIE_MMAP_SIZE -CONFIG_SYS_PCI_BAR0 -CONFIG_SYS_PCI_BAR1 -CONFIG_SYS_PCI_BAR2 -CONFIG_SYS_PCI_BAR3 -CONFIG_SYS_PCI_BAR4 -CONFIG_SYS_PCI_BAR5 -CONFIG_SYS_PCI_CACHE_LINE_SIZE -CONFIG_SYS_PCI_CFG_PHYS -CONFIG_SYS_PCI_EP_MEMORY_BASE CONFIG_SYS_PCI_IO_BASE -CONFIG_SYS_PCI_IO_BUS CONFIG_SYS_PCI_IO_PHYS CONFIG_SYS_PCI_IO_SIZE CONFIG_SYS_PCI_MAP_END CONFIG_SYS_PCI_MAP_START -CONFIG_SYS_PCI_MEMORY_BUS -CONFIG_SYS_PCI_MEMORY_PHYS -CONFIG_SYS_PCI_MEMORY_SIZE CONFIG_SYS_PCI_MEM_BASE -CONFIG_SYS_PCI_MEM_BUS CONFIG_SYS_PCI_MEM_PHYS CONFIG_SYS_PCI_MEM_SIZE CONFIG_SYS_PCI_MMIO_BASE CONFIG_SYS_PCI_MMIO_PHYS CONFIG_SYS_PCI_MMIO_SIZE -CONFIG_SYS_PCI_NR_INBOUND_WIN CONFIG_SYS_PCI_SLV_MEM_BUS CONFIG_SYS_PCI_SLV_MEM_LOCAL CONFIG_SYS_PCI_SLV_MEM_SIZE -CONFIG_SYS_PCI_SYS_MEM_BUS -CONFIG_SYS_PCI_SYS_MEM_PHYS -CONFIG_SYS_PCI_SYS_MEM_SIZE -CONFIG_SYS_PCI_TBATR0 -CONFIG_SYS_PCI_TBATR1 -CONFIG_SYS_PCI_TBATR2 -CONFIG_SYS_PCI_TBATR3 -CONFIG_SYS_PCI_TBATR4 -CONFIG_SYS_PCI_TBATR5 CONFIG_SYS_PDCNT CONFIG_SYS_PEHLPAR -CONFIG_SYS_PEPAR -CONFIG_SYS_PFPAR -CONFIG_SYS_PHY_UBOOT_BASE -CONFIG_SYS_PIOC_ASR_VAL -CONFIG_SYS_PIOC_BSR_VAL CONFIG_SYS_PIOC_PDR_VAL CONFIG_SYS_PIOC_PDR_VAL1 CONFIG_SYS_PIOC_PPUDR_VAL CONFIG_SYS_PIOD_PDR_VAL1 CONFIG_SYS_PIOD_PPUDR_VAL CONFIG_SYS_PIO_MODE -CONFIG_SYS_PIXIS_VBOOT_ENABLE -CONFIG_SYS_PIXIS_VBOOT_MASK -CONFIG_SYS_PIXIS_VCFGEN0_ENABLE CONFIG_SYS_PJPAR CONFIG_SYS_PL310_BASE CONFIG_SYS_PLLAR_VAL -CONFIG_SYS_PLLBR_VAL CONFIG_SYS_PLLCR CONFIG_SYS_PLL_BYPASS CONFIG_SYS_PLL_FDR @@ -2585,44 +1819,9 @@ CONFIG_SYS_PMAN CONFIG_SYS_PMC_BASE CONFIG_SYS_PMC_BASE_PHYS CONFIG_SYS_PME_CLK -CONFIG_SYS_PORTTC -CONFIG_SYS_POST_BSPEC1 -CONFIG_SYS_POST_BSPEC2 -CONFIG_SYS_POST_BSPEC3 -CONFIG_SYS_POST_BSPEC4 -CONFIG_SYS_POST_BSPEC5 -CONFIG_SYS_POST_CACHE -CONFIG_SYS_POST_CODEC -CONFIG_SYS_POST_COPROC -CONFIG_SYS_POST_CPU -CONFIG_SYS_POST_DSP -CONFIG_SYS_POST_ECC -CONFIG_SYS_POST_ETHER -CONFIG_SYS_POST_FLASH -CONFIG_SYS_POST_FLASH_END -CONFIG_SYS_POST_FLASH_NUM -CONFIG_SYS_POST_FLASH_START -CONFIG_SYS_POST_FPU -CONFIG_SYS_POST_HOTKEYS_GPIO -CONFIG_SYS_POST_I2C -CONFIG_SYS_POST_I2C_ADDRS -CONFIG_SYS_POST_I2C_IGNORES CONFIG_SYS_POST_MEMORY CONFIG_SYS_POST_MEM_REGIONS -CONFIG_SYS_POST_OCM -CONFIG_SYS_POST_RTC -CONFIG_SYS_POST_SPR -CONFIG_SYS_POST_SYSMON -CONFIG_SYS_POST_UART -CONFIG_SYS_POST_USB -CONFIG_SYS_POST_WATCHDOG -CONFIG_SYS_POST_WORD_ADDR -CONFIG_SYS_PPC_DDR_WIMGE -CONFIG_SYS_PQSPAR -CONFIG_SYS_PSDPAR CONFIG_SYS_PSSR_VAL -CONFIG_SYS_PTCPAR -CONFIG_SYS_PTDPAR CONFIG_SYS_PTV CONFIG_SYS_PUAPAR CONFIG_SYS_QMAN_CENA_BASE @@ -2643,10 +1842,8 @@ CONFIG_SYS_RCAR_I2C0_BASE CONFIG_SYS_RCAR_I2C1_BASE CONFIG_SYS_RCAR_I2C2_BASE CONFIG_SYS_RCAR_I2C3_BASE -CONFIG_SYS_READ_SPD CONFIG_SYS_RESET_ADDR CONFIG_SYS_RESET_ADDRESS -CONFIG_SYS_RESET_SCTRL CONFIG_SYS_RFD CONFIG_SYS_RGMII1_PHY_ADDR CONFIG_SYS_RGMII2_PHY_ADDR @@ -2658,8 +1855,6 @@ CONFIG_SYS_ROM_BASE CONFIG_SYS_RSTC_RMR_VAL CONFIG_SYS_RTC_BUS_NUM CONFIG_SYS_RTC_CNT -CONFIG_SYS_RTC_OSCILLATOR -CONFIG_SYS_RTC_REG_BASE_ADDR CONFIG_SYS_RTC_SETUP CONFIG_SYS_RX_ETH_BUFFER CONFIG_SYS_SATA @@ -2669,45 +1864,22 @@ CONFIG_SYS_SATA1_OFFSET CONFIG_SYS_SATA2 CONFIG_SYS_SATA2_FLAGS CONFIG_SYS_SATA2_OFFSET -CONFIG_SYS_SATA_ENV_DEV CONFIG_SYS_SATA_FAT_BOOT_PARTITION CONFIG_SYS_SATA_MAX_DEVICE CONFIG_SYS_SBFHDR_DATA_OFFSET CONFIG_SYS_SBFHDR_SIZE -CONFIG_SYS_SCCR_ENCCM -CONFIG_SYS_SCCR_PCICM -CONFIG_SYS_SCCR_PCIEXP1CM -CONFIG_SYS_SCCR_PCIEXP2CM CONFIG_SYS_SCCR_SATACM CONFIG_SYS_SCCR_TSEC1CM -CONFIG_SYS_SCCR_TSEC1ON CONFIG_SYS_SCCR_TSEC2CM -CONFIG_SYS_SCCR_TSEC2ON -CONFIG_SYS_SCCR_TSECCM CONFIG_SYS_SCCR_USBDRCM -CONFIG_SYS_SCCR_USBMPHCM CONFIG_SYS_SCR CONFIG_SYS_SCSI_MAX_DEVICE CONFIG_SYS_SCSI_MAX_LUN CONFIG_SYS_SCSI_MAX_SCSI_ID -CONFIG_SYS_SDIO0 -CONFIG_SYS_SDIO0_MAX_CLK -CONFIG_SYS_SDIO1 -CONFIG_SYS_SDIO1_MAX_CLK -CONFIG_SYS_SDIO2 -CONFIG_SYS_SDIO2_MAX_CLK -CONFIG_SYS_SDIO3 -CONFIG_SYS_SDIO3_MAX_CLK -CONFIG_SYS_SDIO_BASE0 -CONFIG_SYS_SDIO_BASE1 -CONFIG_SYS_SDIO_BASE2 -CONFIG_SYS_SDIO_BASE3 CONFIG_SYS_SDRAM -CONFIG_SYS_SDRAM1 CONFIG_SYS_SDRAM_BASE CONFIG_SYS_SDRAM_BASE0 CONFIG_SYS_SDRAM_BASE1 -CONFIG_SYS_SDRAM_BASE1xx CONFIG_SYS_SDRAM_BASE2 CONFIG_SYS_SDRAM_CFG CONFIG_SYS_SDRAM_CFG1 @@ -2717,7 +1889,6 @@ CONFIG_SYS_SDRAM_EMOD CONFIG_SYS_SDRAM_MODE CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_SDRAM_SIZE0 -CONFIG_SYS_SDRAM_SIZE1 CONFIG_SYS_SDRAM_SIZE_LAW CONFIG_SYS_SDRAM_VAL CONFIG_SYS_SDRAM_VAL1 @@ -2766,13 +1937,10 @@ CONFIG_SYS_SH_SDHI3_BASE CONFIG_SYS_SH_SDHI_NR_CHANNEL CONFIG_SYS_SICRH CONFIG_SYS_SICRL -CONFIG_SYS_SIL1178_I2C CONFIG_SYS_SMC0_CYCLE0_VAL CONFIG_SYS_SMC0_MODE0_VAL CONFIG_SYS_SMC0_PULSE0_VAL CONFIG_SYS_SMC0_SETUP0_VAL -CONFIG_SYS_SMC_CSR0_VAL -CONFIG_SYS_SPCR_OPT CONFIG_SYS_SPD_BUS_NUM CONFIG_SYS_SPI_ARGS_OFFS CONFIG_SYS_SPI_ARGS_SIZE @@ -2783,8 +1951,6 @@ CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE CONFIG_SYS_SPI_FLASH_U_BOOT_START CONFIG_SYS_SPI_KERNEL_OFFS -CONFIG_SYS_SPI_MXC_WAIT -CONFIG_SYS_SPI_RTC_DEVID CONFIG_SYS_SPI_ST_ENABLE_WP_PIN CONFIG_SYS_SPI_U_BOOT_SIZE CONFIG_SYS_SPL_ARGS_ADDR @@ -2806,8 +1972,6 @@ CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS CONFIG_SYS_SST_SECT CONFIG_SYS_SST_SECTSZ CONFIG_SYS_STACK_SIZE -CONFIG_SYS_STATUS_C -CONFIG_SYS_STATUS_OK CONFIG_SYS_SXCNFG_VAL CONFIG_SYS_TBIPA_VALUE CONFIG_SYS_TCLK @@ -2815,30 +1979,17 @@ CONFIG_SYS_TIMERBASE CONFIG_SYS_TIMER_BASE CONFIG_SYS_TIMER_COUNTER CONFIG_SYS_TIMER_COUNTS_DOWN -CONFIG_SYS_TIMER_PRESCALER CONFIG_SYS_TIMER_RATE CONFIG_SYS_TMPVIRT -CONFIG_SYS_TMRINTR_MASK -CONFIG_SYS_TMRINTR_NO -CONFIG_SYS_TMRINTR_PEND -CONFIG_SYS_TMRINTR_PRI -CONFIG_SYS_TMRPND_REG -CONFIG_SYS_TMR_BASE CONFIG_SYS_TSEC1_OFFSET CONFIG_SYS_TSEC2_OFFSET CONFIG_SYS_TSEC3_OFFSET CONFIG_SYS_TX_ETH_BUFFER -CONFIG_SYS_UART1_ALT1_GPIO -CONFIG_SYS_UART2_ALT1_GPIO CONFIG_SYS_UART2_ALT3_GPIO -CONFIG_SYS_UART2_PRI_GPIO -CONFIG_SYS_UART_BASE CONFIG_SYS_UART_PORT CONFIG_SYS_UBOOT_BASE CONFIG_SYS_UBOOT_START -CONFIG_SYS_UDELAY_BASE CONFIG_SYS_UEC -CONFIG_SYS_UEC1_PHY_ADDR CONFIG_SYS_UEC2_ETH_TYPE CONFIG_SYS_UEC2_INTERFACE_SPEED CONFIG_SYS_UEC2_INTERFACE_TYPE @@ -2846,13 +1997,8 @@ CONFIG_SYS_UEC2_PHY_ADDR CONFIG_SYS_UEC2_RX_CLK CONFIG_SYS_UEC2_TX_CLK CONFIG_SYS_UEC2_UCC_NUM -CONFIG_SYS_UEC3_PHY_ADDR -CONFIG_SYS_UEC4_PHY_ADDR -CONFIG_SYS_UECx_PHY_ADDR CONFIG_SYS_ULB_CLK CONFIG_SYS_UNIFY_CACHE -CONFIG_SYS_UNSPEC_PHYID -CONFIG_SYS_UNSPEC_STRID CONFIG_SYS_USB_FAT_BOOT_PARTITION CONFIG_SYS_USB_OHCI_BOARD_INIT CONFIG_SYS_USB_OHCI_CPU_INIT @@ -2865,7 +2011,6 @@ CONFIG_SYS_USE_DATAFLASH_CS0 CONFIG_SYS_USE_DATAFLASH_CS1 CONFIG_SYS_USE_DATAFLASH_CS3 CONFIG_SYS_USE_FLASH -CONFIG_SYS_USE_MAIN_OSCILLATOR CONFIG_SYS_USE_MMC CONFIG_SYS_USE_NAND CONFIG_SYS_USE_NANDFLASH @@ -2874,7 +2019,6 @@ CONFIG_SYS_USR_EXCEP CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT -CONFIG_SYS_VCXK_AUTODETECT CONFIG_SYS_VCXK_BASE CONFIG_SYS_VCXK_DEFAULT_LINEALIGN CONFIG_SYS_VCXK_DOUBLEBUFFERED @@ -2887,34 +2031,24 @@ CONFIG_SYS_VCXK_INVERT_PORT CONFIG_SYS_VCXK_REQUEST_DDR CONFIG_SYS_VCXK_REQUEST_PIN CONFIG_SYS_VCXK_REQUEST_PORT -CONFIG_SYS_VCXK_RESET_DDR -CONFIG_SYS_VCXK_RESET_PIN -CONFIG_SYS_VCXK_RESET_PORT CONFIG_SYS_VIDEO_LOGO_MAX_SIZE CONFIG_SYS_VSC7385_BASE CONFIG_SYS_VSC7385_BASE_PHYS CONFIG_SYS_VSC7385_BR_PRELIM CONFIG_SYS_VSC7385_OR_PRELIM -CONFIG_SYS_WATCHDOG_FREQ CONFIG_SYS_WATCHDOG_VALUE CONFIG_SYS_WDTC_WDMR_VAL CONFIG_SYS_WRITE_SWAPPED_DATA CONFIG_SYS_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB3_ADDR -CONFIG_SYS_XIMG_LEN -CONFIG_TAM3517_SETTINGS CONFIG_TCA642X CONFIG_TEGRA_BOARD_STRING CONFIG_TEGRA_CLOCK_SCALING CONFIG_TEGRA_ENABLE_UARTA -CONFIG_TEGRA_ENABLE_UARTB -CONFIG_TEGRA_ENABLE_UARTC CONFIG_TEGRA_ENABLE_UARTD -CONFIG_TEGRA_ENABLE_UARTE CONFIG_TEGRA_GPU CONFIG_TEGRA_LP0 -CONFIG_TEGRA_NAND CONFIG_TEGRA_PMU CONFIG_TEGRA_SLINK_CTRLS CONFIG_TEGRA_SPI @@ -2924,8 +2058,6 @@ CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3 CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1 CONFIG_TESTPIN_MASK CONFIG_TESTPIN_REG -CONFIG_TEST_LIST_SORT -CONFIG_TFTP_FILE_NAME_MAX_LEN CONFIG_TFTP_PORT CONFIG_THOR_RESET_OFF CONFIG_THUNDERX @@ -2949,7 +2081,6 @@ CONFIG_TSECV2 CONFIG_TSECV2_1 CONFIG_TSEC_TBICR_SETTINGS CONFIG_TWL6030_POWER -CONFIG_TX_DESCR_NUM CONFIG_TZSW_RESERVED_DRAM_SIZE CONFIG_UBIFS_VOLUME CONFIG_UBI_PART @@ -2959,131 +2090,52 @@ CONFIG_UBOOT_SECTOR_COUNT CONFIG_UBOOT_SECTOR_START CONFIG_UDP_CHECKSUM CONFIG_UEC_ETH -CONFIG_UEC_ETH1 CONFIG_UEC_ETH2 -CONFIG_UEC_ETH3 -CONFIG_UEC_ETH4 -CONFIG_UEC_ETH5 -CONFIG_UEC_ETH6 -CONFIG_UEC_ETH7 -CONFIG_UEC_ETH8 -CONFIG_UID16 -CONFIG_ULPI_REF_CLK CONFIG_UPDATEB -CONFIG_UPDATE_LOAD_ADDR CONFIG_USART_BASE CONFIG_USART_ID -CONFIG_USBD_CONFIGURATION_STR -CONFIG_USBD_CTRL_INTERFACE_STR -CONFIG_USBD_DATA_INTERFACE_STR CONFIG_USBD_HS CONFIG_USBD_MANUFACTURER CONFIG_USBD_PRODUCTID_CDCACM CONFIG_USBD_PRODUCTID_GSERIAL CONFIG_USBD_PRODUCT_NAME -CONFIG_USBD_SERIAL_BULK_HS_PKTSIZE -CONFIG_USBD_SERIAL_BULK_PKTSIZE -CONFIG_USBD_SERIAL_INT_ENDPOINT -CONFIG_USBD_SERIAL_INT_PKTSIZE -CONFIG_USBD_SERIAL_IN_ENDPOINT -CONFIG_USBD_SERIAL_IN_PKTSIZE -CONFIG_USBD_SERIAL_OUT_ENDPOINT -CONFIG_USBD_SERIAL_OUT_PKTSIZE CONFIG_USBD_VENDORID CONFIG_USBNET_DEV_ADDR CONFIG_USB_ATMEL CONFIG_USB_ATMEL_CLK_SEL_PLLB CONFIG_USB_ATMEL_CLK_SEL_UPLL -CONFIG_USB_BIN_FIXUP CONFIG_USB_BOOTING CONFIG_USB_DEVICE CONFIG_USB_DEV_BASE -CONFIG_USB_DEV_PULLUP_GPIO -CONFIG_USB_EHCI_BASE -CONFIG_USB_EHCI_BASE_LIST CONFIG_USB_EHCI_EXYNOS -CONFIG_USB_EHCI_FARADAY CONFIG_USB_EHCI_TXFIFO_THRESH -CONFIG_USB_ETH_QMULT -CONFIG_USB_ETH_SUBSET CONFIG_USB_EXT2_BOOT CONFIG_USB_FAT_BOOT -CONFIG_USB_GADGET_AMD5536UDC CONFIG_USB_GADGET_AT91 -CONFIG_USB_GADGET_DUMMY_HCD CONFIG_USB_GADGET_DWC2_OTG_PHY -CONFIG_USB_GADGET_FOTG210 -CONFIG_USB_GADGET_FSL_USB2 -CONFIG_USB_GADGET_GOKU -CONFIG_USB_GADGET_IMX -CONFIG_USB_GADGET_M66592 -CONFIG_USB_GADGET_MQ11XX -CONFIG_USB_GADGET_MUSBHSFC -CONFIG_USB_GADGET_N9604 -CONFIG_USB_GADGET_NET2280 -CONFIG_USB_GADGET_OMAP -CONFIG_USB_GADGET_PXA27X -CONFIG_USB_GADGET_PXA2XX -CONFIG_USB_GADGET_SA1100 -CONFIG_USB_INVENTRA_DMA CONFIG_USB_ISP1301_I2C_ADDR CONFIG_USB_MAX_CONTROLLER_COUNT -CONFIG_USB_MUSB_TIMEOUT -CONFIG_USB_MUSB_TUSB6010 CONFIG_USB_OHCI_LPC32XX CONFIG_USB_OHCI_NEW -CONFIG_USB_OTG -CONFIG_USB_OTG_BLACKLIST_HUB -CONFIG_USB_PXA25X_SMALL -CONFIG_USB_TI_CPPI_DMA CONFIG_USB_TTY -CONFIG_USB_TUSB_OMAP_DMA -CONFIG_USB_ULPI_TIMEOUT CONFIG_USB_XHCI_EXYNOS CONFIG_USE_INTERRUPT CONFIG_USE_ONENAND_BOARD_INIT -CONFIG_UTBIPAR_INIT_TBIPA -CONFIG_U_BOOT_HDR_ADDR CONFIG_U_BOOT_HDR_SIZE -CONFIG_VAL CONFIG_VAR_SIZE_SPL CONFIG_VERY_BIG_RAM CONFIG_VIDEO_BCM2835 CONFIG_VIDEO_BMP_LOGO CONFIG_VIDEO_DA8XX -CONFIG_VIDEO_FONT_4X6 -CONFIG_VIDEO_LOGO -CONFIG_VIDEO_MXS_MODE_SYSTEM -CONFIG_VIDEO_STD_TIMINGS -CONFIG_VID_FLS_ENV -CONFIG_VM86 -CONFIG_VOIPAC_LCD -CONFIG_VOL_MONITOR_INA220 -CONFIG_VOL_MONITOR_IR36021_READ -CONFIG_VOL_MONITOR_IR36021_SET CONFIG_VSC7385_ENET CONFIG_VSC7385_IMAGE CONFIG_VSC7385_IMAGE_SIZE CONFIG_VSC9953 -CONFIG_WATCHDOG_NOWAYOUT CONFIG_WATCHDOG_PRESC CONFIG_WATCHDOG_RC CONFIG_WATCHDOG_TIMEOUT -CONFIG_WD_PERIOD -CONFIG_X86EMU_DEBUG CONFIG_X86EMU_RAW_IO CONFIG_X86_MRC_ADDR CONFIG_X86_REFCODE_ADDR CONFIG_X86_REFCODE_RUN_ADDR -CONFIG_XGI_XG22_BASE -CONFIG_XSENGINE CONFIG_XTFPGA -CONFIG_YAFFS_AUTO_UNICODE -CONFIG_YAFFS_CASE_INSENSITIVE -CONFIG_YAFFS_DEFINES_TYPES -CONFIG_YAFFS_UNICODE -CONFIG_YAFFS_UTIL -CONFIG_YAFFS_WINCE -CONFIG_YELLOW_LED -CONFIG_ZLT -CONFIG_eTSEC_MDIO_BUS diff --git a/scripts/env2string.awk b/scripts/env2string.awk new file mode 100644 index 0000000000000000000000000000000000000000..1bfe9ed07a4d3d7f59beca9ff3800007becde29f --- /dev/null +++ b/scripts/env2string.awk @@ -0,0 +1,91 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright 2021 Google, Inc +# +# SPDX-License-Identifier: GPL-2.0+ +# +# Awk script to parse a text file containing an environment and convert it +# to a C string which can be compiled into U-Boot. + +# The resulting output is: +# +# #define CONFIG_EXTRA_ENV_TEXT "" +# +# If the input is empty, this script outputs a comment instead. + +BEGIN { + # env holds the env variable we are currently processing + env = ""; + ORS = "" +} + +# Skip empty lines, as these are generated by the clang preprocessor +NF { + do_output = 0 + + # Quote quotes + gsub("\"", "\\\"") + + # Avoid using the non-POSIX third parameter to match(), by splitting + # the work into several steps. + has_var = match($0, "^([^ \t=][^ =]*)=(.*)$") + + # Is this the start of a new environment variable? + if (has_var) { + if (length(env) != 0) { + # Record the value of the variable now completed + vars[var] = env + do_output = 1 + } + + # Collect the variable name. The value follows the '=' + match($0, "^([^ \t=][^ =]*)=") + var = substr($0, 1, RLENGTH - 1) + env = substr($0, RLENGTH + 1) + + # Deal with += which concatenates the new string to the existing + # variable. Again we are careful to use POSIX match() + if (length(env) != 0 && match(var, "^(.*)[+]$")) { + plusname = substr(var, RSTART, RLENGTH - 1) + # Allow var\+=val to indicate that the variable name is + # var+ and this is not actually a concatenation + if (substr(plusname, length(plusname)) == "\\") { + # Drop the backslash + sub(/\\[+]$/, "+", var) + } else { + var = plusname + env = vars[var] env + } + } + } else { + # Change newline to space + gsub(/^[ \t]+/, "") + + # Don't keep leading spaces generated by the previous blank line + if (length(env) == 0) { + env = $0 + } else { + env = env " " $0 + } + } +} + +END { + # Record the value of the variable now completed. If the variable is + # empty it is not set. + if (length(env) != 0) { + vars[var] = env + do_output = 1 + } + + if (do_output) { + printf("%s", "#define CONFIG_EXTRA_ENV_TEXT \"") + + # Print out all the variables + for (var in vars) { + env = vars[var] + print var "=" vars[var] "\\0" + } + print "\"\n" + } +} diff --git a/scripts/of_allowlist.txt b/scripts/of_allowlist.txt new file mode 100644 index 0000000000000000000000000000000000000000..e82cf557bb2b0b2a34b528ee39b918030fd8bde7 --- /dev/null +++ b/scripts/of_allowlist.txt @@ -0,0 +1 @@ +# List of boards which are permitted to use OF_HAS_PRIOR_STAGE without OF_BOARD diff --git a/test/dm/core.c b/test/dm/core.c index c9a7606666c0769eb4c90b5b140b0ceb1561e4fa..c76dfdb1651fb7b0e770ba5dd20cb92629dab512 100644 --- a/test/dm/core.c +++ b/test/dm/core.c @@ -307,11 +307,15 @@ static int dm_test_lifecycle(struct unit_test_state *uts) { int op_count[DM_TEST_OP_COUNT]; struct udevice *dev, *test_dev; + int start_dev_count, start_uc_count; + int dev_count, uc_count; int pingret; int ret; memcpy(op_count, dm_testdrv_op_count, sizeof(op_count)); + dm_get_stats(&start_dev_count, &start_uc_count); + ut_assertok(device_bind_by_name(uts->root, false, &driver_info_manual, &dev)); ut_assert(dev); @@ -319,6 +323,11 @@ static int dm_test_lifecycle(struct unit_test_state *uts) == op_count[DM_TEST_OP_BIND] + 1); ut_assert(!dev_get_priv(dev)); + /* We should have one more device */ + dm_get_stats(&dev_count, &uc_count); + ut_asserteq(start_dev_count + 1, dev_count); + ut_asserteq(start_uc_count, uc_count); + /* Probe the device - it should fail allocating private data */ uts->force_fail_alloc = 1; ret = device_probe(dev); @@ -353,6 +362,11 @@ static int dm_test_lifecycle(struct unit_test_state *uts) ut_asserteq(1, dm_testdrv_op_count[DM_TEST_OP_UNBIND]); ut_asserteq(1, dm_testdrv_op_count[DM_TEST_OP_PRE_UNBIND]); + /* We should have one less device */ + dm_get_stats(&dev_count, &uc_count); + ut_asserteq(start_dev_count, dev_count); + ut_asserteq(start_uc_count, uc_count); + return 0; } DM_TEST(dm_test_lifecycle, UT_TESTF_SCAN_PDATA | UT_TESTF_PROBE_TEST); @@ -526,17 +540,31 @@ DM_TEST(dm_test_leak, 0); /* Test uclass init/destroy methods */ static int dm_test_uclass(struct unit_test_state *uts) { + int dev_count, uc_count; struct uclass *uc; + /* We should have just the root device and uclass */ + dm_get_stats(&dev_count, &uc_count); + ut_asserteq(1, dev_count); + ut_asserteq(1, uc_count); + ut_assertok(uclass_get(UCLASS_TEST, &uc)); ut_asserteq(1, dm_testdrv_op_count[DM_TEST_OP_INIT]); ut_asserteq(0, dm_testdrv_op_count[DM_TEST_OP_DESTROY]); ut_assert(uclass_get_priv(uc)); + dm_get_stats(&dev_count, &uc_count); + ut_asserteq(1, dev_count); + ut_asserteq(2, uc_count); + ut_assertok(uclass_destroy(uc)); ut_asserteq(1, dm_testdrv_op_count[DM_TEST_OP_INIT]); ut_asserteq(1, dm_testdrv_op_count[DM_TEST_OP_DESTROY]); + dm_get_stats(&dev_count, &uc_count); + ut_asserteq(1, dev_count); + ut_asserteq(1, uc_count); + return 0; } DM_TEST(dm_test_uclass, 0); @@ -1217,3 +1245,16 @@ static int dm_test_dma_offset(struct unit_test_state *uts) } DM_TEST(dm_test_dma_offset, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); #endif + +/* Test dm_get_stats() */ +static int dm_test_get_stats(struct unit_test_state *uts) +{ + int dev_count, uc_count; + + dm_get_stats(&dev_count, &uc_count); + ut_assert(dev_count > 50); + ut_assert(uc_count > 30); + + return 0; +} +DM_TEST(dm_test_get_stats, UT_TESTF_SCAN_FDT); diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c index cea0746bb3b152ae0e842b7eb629cc5bffd94666..5e7c9681c793acd58632ca7b128f3d21e7985c7a 100644 --- a/test/dm/ofnode.c +++ b/test/dm/ofnode.c @@ -351,3 +351,99 @@ static int dm_test_ofnode_for_each_compatible_node(struct unit_test_state *uts) return 0; } DM_TEST(dm_test_ofnode_for_each_compatible_node, UT_TESTF_SCAN_FDT); + +static int dm_test_ofnode_string(struct unit_test_state *uts) +{ + const char **val; + const char *out; + ofnode node; + + node = ofnode_path("/a-test"); + ut_assert(ofnode_valid(node)); + + /* single string */ + ut_asserteq(1, ofnode_read_string_count(node, "str-value")); + ut_assertok(ofnode_read_string_index(node, "str-value", 0, &out)); + ut_asserteq_str("test string", out); + ut_asserteq(0, ofnode_stringlist_search(node, "str-value", + "test string")); + ut_asserteq(1, ofnode_read_string_list(node, "str-value", &val)); + ut_asserteq_str("test string", val[0]); + ut_assertnull(val[1]); + free(val); + + /* list of strings */ + ut_asserteq(5, ofnode_read_string_count(node, "mux-control-names")); + ut_assertok(ofnode_read_string_index(node, "mux-control-names", 0, + &out)); + ut_asserteq_str("mux0", out); + ut_asserteq(0, ofnode_stringlist_search(node, "mux-control-names", + "mux0")); + ut_asserteq(5, ofnode_read_string_list(node, "mux-control-names", + &val)); + ut_asserteq_str("mux0", val[0]); + ut_asserteq_str("mux1", val[1]); + ut_asserteq_str("mux2", val[2]); + ut_asserteq_str("mux3", val[3]); + ut_asserteq_str("mux4", val[4]); + ut_assertnull(val[5]); + free(val); + + ut_assertok(ofnode_read_string_index(node, "mux-control-names", 4, + &out)); + ut_asserteq_str("mux4", out); + ut_asserteq(4, ofnode_stringlist_search(node, "mux-control-names", + "mux4")); + + return 0; +} +DM_TEST(dm_test_ofnode_string, 0); + +static int dm_test_ofnode_string_err(struct unit_test_state *uts) +{ + const char **val; + const char *out; + ofnode node; + + /* + * Test error codes only on livetree, as they are different with + * flattree + */ + node = ofnode_path("/a-test"); + ut_assert(ofnode_valid(node)); + + /* non-existent property */ + ut_asserteq(-EINVAL, ofnode_read_string_count(node, "missing")); + ut_asserteq(-EINVAL, ofnode_read_string_index(node, "missing", 0, + &out)); + ut_asserteq(-EINVAL, ofnode_read_string_list(node, "missing", &val)); + + /* empty property */ + ut_asserteq(-ENODATA, ofnode_read_string_count(node, "bool-value")); + ut_asserteq(-ENODATA, ofnode_read_string_index(node, "bool-value", 0, + &out)); + ut_asserteq(-ENODATA, ofnode_read_string_list(node, "bool-value", + &val)); + + /* badly formatted string list */ + ut_asserteq(-EILSEQ, ofnode_read_string_count(node, "int64-value")); + ut_asserteq(-EILSEQ, ofnode_read_string_index(node, "int64-value", 0, + &out)); + ut_asserteq(-EILSEQ, ofnode_read_string_list(node, "int64-value", + &val)); + + /* out of range / not found */ + ut_asserteq(-ENODATA, ofnode_read_string_index(node, "str-value", 1, + &out)); + ut_asserteq(-ENODATA, ofnode_stringlist_search(node, "str-value", + "other")); + + /* negative value for index is not allowed, so don't test for that */ + + ut_asserteq(-ENODATA, ofnode_read_string_index(node, + "mux-control-names", 5, + &out)); + + return 0; +} +DM_TEST(dm_test_ofnode_string_err, UT_TESTF_LIVE_TREE); diff --git a/test/dm/video.c b/test/dm/video.c index da0ae3622f77b2fcde722d2663d1bcec7645ac70..d4a3c9c6c17c7c5c519e8068c02ceef5bd05b8a5 100644 --- a/test/dm/video.c +++ b/test/dm/video.c @@ -7,12 +7,14 @@ #include #include #include +#include #include #include #include #include #include #include +#include #include #include #include @@ -113,6 +115,31 @@ static int select_vidconsole(struct unit_test_state *uts, const char *drv_name) return 0; } +/** + * video_get_nologo() - Disable the logo on the video device and return it + * + * @uts: Test state + * @devp: Returns video device + * @return 0 if OK, -ve on error + */ +static int video_get_nologo(struct unit_test_state *uts, struct udevice **devp) +{ + struct video_uc_plat *uc_plat; + struct udevice *dev; + + ut_assertok(uclass_find_first_device(UCLASS_VIDEO, &dev)); + ut_assertnonnull(dev); + uc_plat = dev_get_uclass_plat(dev); + uc_plat->hide_logo = true; + + /* now probe it */ + ut_assertok(uclass_first_device_err(UCLASS_VIDEO, &dev)); + ut_assertnonnull(dev); + *devp = dev; + + return 0; +} + /* Test text output works on the video console */ static int dm_test_video_text(struct unit_test_state *uts) { @@ -123,7 +150,7 @@ static int dm_test_video_text(struct unit_test_state *uts) #define SCROLL_LINES 100 ut_assertok(select_vidconsole(uts, "vidconsole0")); - ut_assertok(uclass_get_device(UCLASS_VIDEO, 0, &dev)); + ut_assertok(video_get_nologo(uts, &dev)); ut_asserteq(46, compress_frame_buffer(uts, dev)); ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); @@ -155,7 +182,7 @@ static int dm_test_video_chars(struct unit_test_state *uts) const char *test_string = "Well\b\b\b\bxhe is\r \n\ta very \amodest \bman\n\t\tand Has much to\b\bto be modest about."; ut_assertok(select_vidconsole(uts, "vidconsole0")); - ut_assertok(uclass_get_device(UCLASS_VIDEO, 0, &dev)); + ut_assertok(video_get_nologo(uts, &dev)); ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); vidconsole_put_string(con, test_string); ut_asserteq(466, compress_frame_buffer(uts, dev)); @@ -172,7 +199,7 @@ static int dm_test_video_ansi(struct unit_test_state *uts) struct udevice *dev, *con; ut_assertok(select_vidconsole(uts, "vidconsole0")); - ut_assertok(uclass_get_device(UCLASS_VIDEO, 0, &dev)); + ut_assertok(video_get_nologo(uts, &dev)); ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); /* reference clear: */ @@ -220,7 +247,7 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot, plat = dev_get_plat(dev); plat->rot = rot; - ut_assertok(uclass_get_device(UCLASS_VIDEO, 0, &dev)); + ut_assertok(video_get_nologo(uts, &dev)); ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); ut_asserteq(46, compress_frame_buffer(uts, dev)); @@ -309,7 +336,7 @@ static int dm_test_video_bmp(struct unit_test_state *uts) struct udevice *dev; ulong addr; - ut_assertok(uclass_get_device(UCLASS_VIDEO, 0, &dev)); + ut_assertok(video_get_nologo(uts, &dev)); ut_assertok(read_file(uts, "tools/logos/denx.bmp", &addr)); ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); @@ -319,13 +346,119 @@ static int dm_test_video_bmp(struct unit_test_state *uts) } DM_TEST(dm_test_video_bmp, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); +/* Test drawing a bitmap file on a 8bpp display */ +static int dm_test_video_bmp8(struct unit_test_state *uts) +{ + struct udevice *dev; + ulong addr; + + ut_assertok(uclass_find_first_device(UCLASS_VIDEO, &dev)); + ut_assertnonnull(dev); + ut_assertok(sandbox_sdl_set_bpp(dev, VIDEO_BPP8)); + + ut_assertok(read_file(uts, "tools/logos/denx.bmp", &addr)); + + ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); + ut_asserteq(1247, compress_frame_buffer(uts, dev)); + + return 0; +} +DM_TEST(dm_test_video_bmp8, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); + +/* Test drawing a bitmap file on a 16bpp display */ +static int dm_test_video_bmp16(struct unit_test_state *uts) +{ + ulong src, src_len = ~0UL; + uint dst_len = ~0U; + struct udevice *dev; + ulong dst = 0x10000; + + ut_assertok(uclass_find_first_device(UCLASS_VIDEO, &dev)); + ut_assertnonnull(dev); + ut_assertok(sandbox_sdl_set_bpp(dev, VIDEO_BPP16)); + + ut_assertok(read_file(uts, "tools/logos/denx-16bpp.bmp.gz", &src)); + ut_assertok(gunzip(map_sysmem(dst, 0), dst_len, map_sysmem(src, 0), + &src_len)); + + ut_assertok(video_bmp_display(dev, dst, 0, 0, false)); + ut_asserteq(3700, compress_frame_buffer(uts, dev)); + + return 0; +} +DM_TEST(dm_test_video_bmp16, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); + +/* Test drawing a 24bpp bitmap file on a 16bpp display */ +static int dm_test_video_bmp24(struct unit_test_state *uts) +{ + ulong src, src_len = ~0UL; + uint dst_len = ~0U; + struct udevice *dev; + ulong dst = 0x10000; + + ut_assertok(uclass_find_first_device(UCLASS_VIDEO, &dev)); + ut_assertnonnull(dev); + ut_assertok(sandbox_sdl_set_bpp(dev, VIDEO_BPP16)); + + ut_assertok(read_file(uts, "tools/logos/denx-24bpp.bmp.gz", &src)); + ut_assertok(gunzip(map_sysmem(dst, 0), dst_len, map_sysmem(src, 0), + &src_len)); + + ut_assertok(video_bmp_display(dev, dst, 0, 0, false)); + ut_asserteq(3656, compress_frame_buffer(uts, dev)); + + return 0; +} +DM_TEST(dm_test_video_bmp24, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); + +/* Test drawing a 24bpp bitmap file on a 32bpp display */ +static int dm_test_video_bmp24_32(struct unit_test_state *uts) +{ + ulong src, src_len = ~0UL; + uint dst_len = ~0U; + struct udevice *dev; + ulong dst = 0x10000; + + ut_assertok(uclass_find_first_device(UCLASS_VIDEO, &dev)); + ut_assertnonnull(dev); + ut_assertok(sandbox_sdl_set_bpp(dev, VIDEO_BPP32)); + + ut_assertok(read_file(uts, "tools/logos/denx-24bpp.bmp.gz", &src)); + ut_assertok(gunzip(map_sysmem(dst, 0), dst_len, map_sysmem(src, 0), + &src_len)); + + ut_assertok(video_bmp_display(dev, dst, 0, 0, false)); + ut_asserteq(6827, compress_frame_buffer(uts, dev)); + + return 0; +} +DM_TEST(dm_test_video_bmp24_32, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); + +/* Test drawing a bitmap file on a 32bpp display */ +static int dm_test_video_bmp32(struct unit_test_state *uts) +{ + struct udevice *dev; + ulong addr; + + ut_assertok(uclass_find_first_device(UCLASS_VIDEO, &dev)); + ut_assertnonnull(dev); + ut_assertok(sandbox_sdl_set_bpp(dev, VIDEO_BPP32)); + ut_assertok(read_file(uts, "tools/logos/denx.bmp", &addr)); + + ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); + ut_asserteq(2024, compress_frame_buffer(uts, dev)); + + return 0; +} +DM_TEST(dm_test_video_bmp32, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); + /* Test drawing a compressed bitmap file */ static int dm_test_video_bmp_comp(struct unit_test_state *uts) { struct udevice *dev; ulong addr; - ut_assertok(uclass_get_device(UCLASS_VIDEO, 0, &dev)); + ut_assertok(video_get_nologo(uts, &dev)); ut_assertok(read_file(uts, "tools/logos/denx-comp.bmp", &addr)); ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); @@ -335,13 +468,51 @@ static int dm_test_video_bmp_comp(struct unit_test_state *uts) } DM_TEST(dm_test_video_bmp_comp, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); +/* Test drawing a bitmap file on a 32bpp display */ +static int dm_test_video_comp_bmp32(struct unit_test_state *uts) +{ + struct udevice *dev; + ulong addr; + + ut_assertok(uclass_find_first_device(UCLASS_VIDEO, &dev)); + ut_assertnonnull(dev); + ut_assertok(sandbox_sdl_set_bpp(dev, VIDEO_BPP32)); + + ut_assertok(read_file(uts, "tools/logos/denx.bmp", &addr)); + + ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); + ut_asserteq(2024, compress_frame_buffer(uts, dev)); + + return 0; +} +DM_TEST(dm_test_video_comp_bmp32, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); + +/* Test drawing a bitmap file on a 8bpp display */ +static int dm_test_video_comp_bmp8(struct unit_test_state *uts) +{ + struct udevice *dev; + ulong addr; + + ut_assertok(uclass_find_first_device(UCLASS_VIDEO, &dev)); + ut_assertnonnull(dev); + ut_assertok(sandbox_sdl_set_bpp(dev, VIDEO_BPP8)); + + ut_assertok(read_file(uts, "tools/logos/denx.bmp", &addr)); + + ut_assertok(video_bmp_display(dev, addr, 0, 0, false)); + ut_asserteq(1247, compress_frame_buffer(uts, dev)); + + return 0; +} +DM_TEST(dm_test_video_comp_bmp8, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); + /* Test TrueType console */ static int dm_test_video_truetype(struct unit_test_state *uts) { struct udevice *dev, *con; const char *test_string = "Criticism may not be agreeable, but it is necessary. It fulfils the same function as pain in the human body. It calls attention to an unhealthy state of things. Some see private enterprise as a predatory target to be shot, others as a cow to be milked, but few are those who see it as a sturdy horse pulling the wagon. The \aprice OF\b\bof greatness\n\tis responsibility.\n\nBye"; - ut_assertok(uclass_get_device(UCLASS_VIDEO, 0, &dev)); + ut_assertok(video_get_nologo(uts, &dev)); ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); vidconsole_put_string(con, test_string); ut_asserteq(12237, compress_frame_buffer(uts, dev)); @@ -362,7 +533,7 @@ static int dm_test_video_truetype_scroll(struct unit_test_state *uts) plat = dev_get_plat(dev); plat->font_size = 100; - ut_assertok(uclass_get_device(UCLASS_VIDEO, 0, &dev)); + ut_assertok(video_get_nologo(uts, &dev)); ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); vidconsole_put_string(con, test_string); ut_asserteq(35030, compress_frame_buffer(uts, dev)); @@ -383,7 +554,7 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts) plat = dev_get_plat(dev); plat->font_size = 100; - ut_assertok(uclass_get_device(UCLASS_VIDEO, 0, &dev)); + ut_assertok(video_get_nologo(uts, &dev)); ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); vidconsole_put_string(con, test_string); ut_asserteq(29018, compress_frame_buffer(uts, dev)); diff --git a/test/py/conftest.py b/test/py/conftest.py index 11a3f307ea8f105a200816b1a9b4533d2b1c19e5..16e445cd8eeae62a82397d0a5f13700db3034248 100644 --- a/test/py/conftest.py +++ b/test/py/conftest.py @@ -226,7 +226,7 @@ def pytest_configure(config): import u_boot_console_exec_attach console = u_boot_console_exec_attach.ConsoleExecAttach(log, ubconfig) -re_ut_test_list = re.compile(r'[^a-zA-Z0-9_]_u_boot_list_2_ut_(.*)_test_2_\1_test_(.*)\s*$') +re_ut_test_list = re.compile(r'[^a-zA-Z0-9_]_u_boot_list_2_ut_(.*)_test_2_(.*)\s*$') def generate_ut_subtest(metafunc, fixture_name, sym_path): """Provide parametrization for a ut_subtest fixture. diff --git a/test/py/multiplexed_log.py b/test/py/multiplexed_log.py index 442edada1257acbb810f8023a539abd1f324f960..5e79075f2e64a682d2a59c630ca1ae4b23a6bdc8 100644 --- a/test/py/multiplexed_log.py +++ b/test/py/multiplexed_log.py @@ -111,7 +111,7 @@ class RunAndLog(object): """Clean up any resources managed by this object.""" pass - def run(self, cmd, cwd=None, ignore_errors=False): + def run(self, cmd, cwd=None, ignore_errors=False, stdin=None): """Run a command as a sub-process, and log the results. The output is available at self.output which can be useful if there is @@ -125,6 +125,7 @@ class RunAndLog(object): function will simply return if the command cannot be executed or exits with an error code, otherwise an exception will be raised if such problems occur. + stdin: Input string to pass to the command as stdin (or None) Returns: The output as a string. @@ -137,8 +138,9 @@ class RunAndLog(object): try: p = subprocess.Popen(cmd, cwd=cwd, - stdin=None, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) - (stdout, stderr) = p.communicate() + stdin=subprocess.PIPE if stdin else None, + stdout=subprocess.PIPE, stderr=subprocess.STDOUT) + (stdout, stderr) = p.communicate(input=stdin) if stdout is not None: stdout = stdout.decode('utf-8') if stderr is not None: @@ -165,7 +167,7 @@ class RunAndLog(object): if output and not output.endswith('\n'): output += '\n' if exit_status and not exception and not ignore_errors: - exception = Exception('Exit code: ' + str(exit_status)) + exception = ValueError('Exit code: ' + str(exit_status)) if exception: output += str(exception) + '\n' self.logfile.write(self, output) diff --git a/test/py/tests/test_env.py b/test/py/tests/test_env.py index 9bed2f48d77e674a2b4b062bdb15cbb18e7e966a..f85cb031382e9881e36a87c0ae66b1cccb2922c4 100644 --- a/test/py/tests/test_env.py +++ b/test/py/tests/test_env.py @@ -7,6 +7,7 @@ import os import os.path from subprocess import call, check_call, CalledProcessError +import tempfile import pytest import u_boot_utils @@ -515,3 +516,109 @@ def test_env_ext4(state_test_env): finally: if fs_img: call('rm -f %s' % fs_img, shell=True) + +def test_env_text(u_boot_console): + """Test the script that converts the environment to a text file""" + + def check_script(intext, expect_val): + """Check a test case + + Args: + intext: Text to pass to the script + expect_val: Expected value of the CONFIG_EXTRA_ENV_TEXT string, or + None if we expect it not to be defined + """ + with tempfile.TemporaryDirectory() as path: + fname = os.path.join(path, 'infile') + with open(fname, 'w') as inf: + print(intext, file=inf) + result = u_boot_utils.run_and_log(cons, ['awk', '-f', script, fname]) + if expect_val is not None: + expect = '#define CONFIG_EXTRA_ENV_TEXT "%s"\n' % expect_val + assert result == expect + else: + assert result == '' + + cons = u_boot_console + script = os.path.join(cons.config.source_dir, 'scripts', 'env2string.awk') + + # simple script with a single var + check_script('fred=123', 'fred=123\\0') + + # no vars + check_script('', None) + + # two vars + check_script('''fred=123 +ernie=456''', 'fred=123\\0ernie=456\\0') + + # blank lines + check_script('''fred=123 + + +ernie=456 + +''', 'fred=123\\0ernie=456\\0') + + # append + check_script('''fred=123 +ernie=456 +fred+= 456''', 'fred=123 456\\0ernie=456\\0') + + # append from empty + check_script('''fred= +ernie=456 +fred+= 456''', 'fred= 456\\0ernie=456\\0') + + # variable with + in it + check_script('fred+ernie=123', 'fred+ernie=123\\0') + + # ignores variables that are empty + check_script('''fred= +fred+= +ernie=456''', 'ernie=456\\0') + + # single-character env name + check_script('''f=123 +e=456 +f+= 456''', 'e=456\\0f=123 456\\0') + + # contains quotes + check_script('''fred="my var" +ernie=another"''', 'fred=\\"my var\\"\\0ernie=another\\"\\0') + + # variable name ending in + + check_script('''fred\\+=my var +fred++= again''', 'fred+=my var again\\0') + + # variable name containing + + check_script('''fred+jane=both +fred+jane+=again +ernie=456''', 'fred+jane=bothagain\\0ernie=456\\0') + + # multi-line vars - new vars always start at column 1 + check_script('''fred=first + second +\tthird with tab + + after blank + confusing=oops +ernie=another"''', 'fred=first second third with tab after blank confusing=oops\\0ernie=another\\"\\0') + + # real-world example + check_script('''ubifs_boot= + env exists bootubipart || + env set bootubipart UBI; + env exists bootubivol || + env set bootubivol boot; + if ubi part ${bootubipart} && + ubifsmount ubi${devnum}:${bootubivol}; + then + devtype=ubi; + run scan_dev_for_boot; + fi +''', + 'ubifs_boot=env exists bootubipart || env set bootubipart UBI; ' + 'env exists bootubivol || env set bootubivol boot; ' + 'if ubi part ${bootubipart} && ubifsmount ubi${devnum}:${bootubivol}; ' + 'then devtype=ubi; run scan_dev_for_boot; fi\\0') diff --git a/test/py/u_boot_utils.py b/test/py/u_boot_utils.py index 089eda5434cfd7fb200fa771ea20fb9ab38bb704..c4fc23aeda325a1c74401a7e15a7a1b4180a79b5 100644 --- a/test/py/u_boot_utils.py +++ b/test/py/u_boot_utils.py @@ -157,7 +157,7 @@ def wait_until_file_open_fails(fn, ignore_errors): return raise Exception('File can still be opened') -def run_and_log(u_boot_console, cmd, ignore_errors=False): +def run_and_log(u_boot_console, cmd, ignore_errors=False, stdin=None): """Run a command and log its output. Args: @@ -169,6 +169,7 @@ def run_and_log(u_boot_console, cmd, ignore_errors=False): will simply return if the command cannot be executed or exits with an error code, otherwise an exception will be raised if such problems occur. + stdin: Input string to pass to the command as stdin (or None) Returns: The output as a string. @@ -176,7 +177,7 @@ def run_and_log(u_boot_console, cmd, ignore_errors=False): if isinstance(cmd, str): cmd = cmd.split() runner = u_boot_console.log.get_runner(cmd[0], sys.stdout) - output = runner.run(cmd, ignore_errors=ignore_errors) + output = runner.run(cmd, ignore_errors=ignore_errors, stdin=stdin) runner.close() return output diff --git a/tools/binman/binman.rst b/tools/binman/binman.rst index 35de93bd898a5291448e3555423d2db8c386936a..3e063d1f86c4e432bf843201aeb5be3b7f6c7641 100644 --- a/tools/binman/binman.rst +++ b/tools/binman/binman.rst @@ -232,26 +232,6 @@ You can use other, more specific CONFIG options - see 'Automatic .dtsi inclusion' below. -Using binman with OF_BOARD --------------------------------------------- - -Normally binman is used with a board configured with OF_SEPARATE or OF_EMBED. -This is a typical scenario where a device tree source that contains the binman -node is provided in the arch//dts directory for a specific board. - -However for a board configured with OF_BOARD, no device tree blob is provided -in the U-Boot build phase hence the binman node information is not available. -In order to support such use case, a new Kconfig option BINMAN_STANDALONE_FDT -is introduced, to tell the build system that a standalone device tree blob -containing binman node is explicitly required. - -Note there is a Kconfig option BINMAN_FDT which enables U-Boot run time to -access information about binman entries, stored in the device tree in a binman -node. Generally speaking, this option makes sense for OF_SEPARATE or OF_EMBED. -For the other OF_CONTROL methods, it's quite possible binman node is not -available as binman is invoked during the build phase, thus this option is not -turned on by default for these OF_CONTROL methods. - Access to binman entry offsets at run time (symbols) ---------------------------------------------------- @@ -810,12 +790,14 @@ Binman will search for the following files in arch//dts:: U-Boot will only use the first one that it finds. If you need to include a more general file you can do that from the more specific file using #include. -If you are having trouble figuring out what is going on, you can uncomment -the 'warning' line in scripts/Makefile.lib to see what it has found:: +If you are having trouble figuring out what is going on, you can use +`DEVICE_TREE_DEBUG=1` with your build:: - # Uncomment for debugging - # This shows all the files that were considered and the one that we chose. - # u_boot_dtsi_options_debug = $(u_boot_dtsi_options_raw) + make DEVICE_TREE_DEBUG=1 + scripts/Makefile.lib:334: Automatic .dtsi inclusion: options: + arch/arm/dts/juno-r2-u-boot.dtsi arch/arm/dts/-u-boot.dtsi + arch/arm/dts/armv8-u-boot.dtsi arch/arm/dts/armltd-u-boot.dtsi + arch/arm/dts/u-boot.dtsi ... found: "arch/arm/dts/juno-r2-u-boot.dtsi" Updating an ELF file @@ -913,6 +895,11 @@ or with wildcards:: u-boot-dtb 180 108 u-boot-dtb 80 3b5 image-header bf8 8 image-header bf8 +If an older version of binman is used to list images created by a newer one, it +is possible that it will contain entry types that are not supported. These still +show with the correct type, but binman just sees them as blobs (plain binary +data). Any special features of that etype are not supported by the old binman. + Extracting files from images ---------------------------- @@ -937,12 +924,41 @@ or just a selection:: $ binman extract -i image.bin "*u-boot*" -O outdir +Some entry types have alternative formats, for example fdtmap which allows +extracted just the devicetree binary without the fdtmap header:: + + $ binman extract -i /tmp/b/odroid-c4/image.bin -f out.dtb -F fdt fdtmap + $ fdtdump out.dtb + /dts-v1/; + // magic: 0xd00dfeed + // totalsize: 0x8ab (2219) + // off_dt_struct: 0x38 + // off_dt_strings: 0x82c + // off_mem_rsvmap: 0x28 + // version: 17 + // last_comp_version: 2 + // boot_cpuid_phys: 0x0 + // size_dt_strings: 0x7f + // size_dt_struct: 0x7f4 + + / { + image-node = "binman"; + image-pos = <0x00000000>; + size = <0x0011162b>; + ... + +Use `-F list` to see what alternative formats are available:: + + $ binman extract -i /tmp/b/odroid-c4/image.bin -F list + Flag (-F) Entry type Description + fdt fdtmap Extract the devicetree blob from the fdtmap + Replacing files in an image --------------------------- You can replace files in an existing firmware image created by binman, provided -that there is an 'fdtmap' entry in the image. For example: +that there is an 'fdtmap' entry in the image. For example:: $ binman replace -i image.bin section/cbfs/u-boot @@ -1081,6 +1097,35 @@ the tool's output will be used for the target or for the host machine. If those aren't given, it will also try to derive target-specific versions from the CROSS_COMPILE environment variable during a cross-compilation. +If the tool is not available in the path you can use BINMAN_TOOLPATHS to specify +a space-separated list of paths to search, e.g.:: + + BINMAN_TOOLPATHS="/tools/g12a /tools/tegra" binman ... + + +External blobs +-------------- + +Binary blobs, even if the source code is available, complicate building +firmware. The instructions can involve multiple steps and the binaries may be +hard to build or obtain. Binman at least provides a unified description of how +to build the final image, no matter what steps are needed to get there. + +Binman also provides a `blob-ext` entry type that pulls in a binary blob from an +external file. If the file is missing, binman can optionally complete the build +and just report a warning. Use the `-M/--allow-missing` option to enble this. +This is useful in CI systems which want to check that everything is correct but +don't have access to the blobs. + +If the blobs are in a different directory, you can specify this with the `-I` +option. + +For U-Boot, you can use set the BINMAN_INDIRS environment variable to provide a +space-separated list of directories to search for binary blobs:: + + BINMAN_INDIRS="odroid-c4/fip/g12a \ + odroid-c4/build/board/hardkernel/odroidc4/firmware \ + odroid-c4/build/scp_task" binman ... Code coverage ------------- diff --git a/tools/binman/cmdline.py b/tools/binman/cmdline.py index 700e5a29a530a58af4c7403672766bdb166d3fa7..6c685954619db79943e8c21350454f8052435c22 100644 --- a/tools/binman/cmdline.py +++ b/tools/binman/cmdline.py @@ -2,18 +2,68 @@ # Copyright (c) 2016 Google, Inc # Written by Simon Glass # -# Command-line parser for binman -# +"""Command-line parser for binman""" + +import argparse from argparse import ArgumentParser +import state + +def make_extract_parser(subparsers): + """make_extract_parser: Make a subparser for the 'extract' command + + Args: + subparsers (ArgumentParser): parser to add this one to + """ + extract_parser = subparsers.add_parser('extract', + help='Extract files from an image') + extract_parser.add_argument('-F', '--format', type=str, + help='Select an alternative format for extracted data') + extract_parser.add_argument('-i', '--image', type=str, required=True, + help='Image filename to extract') + extract_parser.add_argument('-f', '--filename', type=str, + help='Output filename to write to') + extract_parser.add_argument('-O', '--outdir', type=str, default='', + help='Path to directory to use for output files') + extract_parser.add_argument('paths', type=str, nargs='*', + help='Paths within file to extract (wildcard)') + extract_parser.add_argument('-U', '--uncompressed', action='store_true', + help='Output raw uncompressed data for compressed entries') + + +#pylint: disable=R0903 +class BinmanVersion(argparse.Action): + """Handles the -V option to binman + + This reads the version information from a file called 'version' in the same + directory as this file. + + If not present it assumes this is running from the U-Boot tree and collects + the version from the Makefile. + + The format of the version information is three VAR = VALUE lines, for + example: + + VERSION = 2022 + PATCHLEVEL = 01 + EXTRAVERSION = -rc2 + """ + def __init__(self, nargs=0, **kwargs): + super().__init__(nargs=nargs, **kwargs) + + def __call__(self, parser, namespace, values, option_string=None): + parser._print_message(f'Binman {state.GetVersion()}\n') + parser.exit() + def ParseArgs(argv): """Parse the binman command-line arguments Args: - argv: List of string arguments + argv (list of str): List of string arguments + Returns: - Tuple (options, args) with the command-line options and arugments. + tuple: (options, args) with the command-line options and arugments. options provides access to the options (e.g. option.debug) args is a list of string arguments """ @@ -39,6 +89,7 @@ controlled by a description in the board device tree.''' parser.add_argument('-v', '--verbosity', default=1, type=int, help='Control verbosity: 0=silent, 1=warnings, 2=notices, ' '3=info, 4=detail, 5=debug') + parser.add_argument('-V', '--version', nargs=0, action=BinmanVersion) subparsers = parser.add_subparsers(dest='cmd') subparsers.required = True @@ -76,8 +127,8 @@ controlled by a description in the board device tree.''' build_parser.add_argument('--update-fdt-in-elf', type=str, help='Update an ELF file with the output dtb: infile,outfile,begin_sym,end_sym') - entry_parser = subparsers.add_parser('entry-docs', - help='Write out entry documentation (see entries.rst)') + subparsers.add_parser( + 'entry-docs', help='Write out entry documentation (see entries.rst)') list_parser = subparsers.add_parser('ls', help='List files in an image') list_parser.add_argument('-i', '--image', type=str, required=True, @@ -85,18 +136,7 @@ controlled by a description in the board device tree.''' list_parser.add_argument('paths', type=str, nargs='*', help='Paths within file to list (wildcard)') - extract_parser = subparsers.add_parser('extract', - help='Extract files from an image') - extract_parser.add_argument('-i', '--image', type=str, required=True, - help='Image filename to extract') - extract_parser.add_argument('-f', '--filename', type=str, - help='Output filename to write to') - extract_parser.add_argument('-O', '--outdir', type=str, default='', - help='Path to directory to use for output files') - extract_parser.add_argument('paths', type=str, nargs='*', - help='Paths within file to extract (wildcard)') - extract_parser.add_argument('-U', '--uncompressed', action='store_true', - help='Output raw uncompressed data for compressed entries') + make_extract_parser(subparsers) replace_parser = subparsers.add_parser('replace', help='Replace entries in an image') diff --git a/tools/binman/control.py b/tools/binman/control.py index 47aac207b4662f1ec4436d3b10eb06d8611c8c2f..4b3ce23fb4c4e6726bc0a948e9bc339d268767bf 100644 --- a/tools/binman/control.py +++ b/tools/binman/control.py @@ -200,8 +200,24 @@ def ReadEntry(image_fname, entry_path, decomp=True): return entry.ReadData(decomp) +def ShowAltFormats(image): + """Show alternative formats available for entries in the image + + This shows a list of formats available. + + Args: + image (Image): Image to check + """ + alt_formats = {} + image.CheckAltFormats(alt_formats) + print('%-10s %-20s %s' % ('Flag (-F)', 'Entry type', 'Description')) + for name, val in alt_formats.items(): + entry, helptext = val + print('%-10s %-20s %s' % (name, entry.etype, helptext)) + + def ExtractEntries(image_fname, output_fname, outdir, entry_paths, - decomp=True): + decomp=True, alt_format=None): """Extract the data from one or more entries and write it to files Args: @@ -217,6 +233,10 @@ def ExtractEntries(image_fname, output_fname, outdir, entry_paths, """ image = Image.FromFile(image_fname) + if alt_format == 'list': + ShowAltFormats(image) + return + # Output an entry to a single file, as a special case if output_fname: if not entry_paths: @@ -224,7 +244,7 @@ def ExtractEntries(image_fname, output_fname, outdir, entry_paths, if len(entry_paths) != 1: raise ValueError('Must specify exactly one entry path to write with -f') entry = image.FindEntryPath(entry_paths[0]) - data = entry.ReadData(decomp) + data = entry.ReadData(decomp, alt_format) tools.WriteFile(output_fname, data) tout.Notice("Wrote %#x bytes to file '%s'" % (len(data), output_fname)) return @@ -236,7 +256,7 @@ def ExtractEntries(image_fname, output_fname, outdir, entry_paths, tout.Notice('%d entries match and will be written' % len(einfos)) for einfo in einfos: entry = einfo.entry - data = entry.ReadData(decomp) + data = entry.ReadData(decomp, alt_format) path = entry.GetPath()[1:] fname = os.path.join(outdir, path) @@ -355,6 +375,7 @@ def ReplaceEntries(image_fname, input_fname, indir, entry_paths, Returns: List of EntryInfo records that were written """ + image_fname = os.path.abspath(image_fname) image = Image.FromFile(image_fname) # Replace an entry from a single file, as a special case @@ -593,7 +614,7 @@ def Binman(args): if args.cmd == 'extract': ExtractEntries(args.image, args.filename, args.outdir, args.paths, - not args.uncompressed) + not args.uncompressed, args.format) if args.cmd == 'replace': ReplaceEntries(args.image, args.filename, args.indir, args.paths, diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst index dcac700c4615cc59219426f5a2112c00536ad8bd..c47f7df0980a32c0dd5dad18d9ace4ac292aa0de 100644 --- a/tools/binman/entries.rst +++ b/tools/binman/entries.rst @@ -25,6 +25,160 @@ about ATF. +Entry: atf-fip: ARM Trusted Firmware's Firmware Image Package (FIP) +------------------------------------------------------------------- + +A FIP_ provides a way to group binaries in a firmware image, used by ARM's +Trusted Firmware A (TF-A) code. It is a simple format consisting of a +table of contents with information about the type, offset and size of the +binaries in the FIP. It is quite similar to FMAP, with the major difference +that it uses UUIDs to indicate the type of each entry. + +Note: It is recommended to always add an fdtmap to every image, as well as +any FIPs so that binman and other tools can access the entire image +correctly. + +The UUIDs correspond to useful names in `fiptool`, provided by ATF to +operate on FIPs. Binman uses these names to make it easier to understand +what is going on, although it is possible to provide a UUID if needed. + +The contents of the FIP are defined by subnodes of the atf-fip entry, e.g.:: + + atf-fip { + soc-fw { + filename = "bl31.bin"; + }; + + scp-fwu-cfg { + filename = "bl2u.bin"; + }; + + u-boot { + fip-type = "nt-fw"; + }; + }; + +This describes a FIP with three entries: soc-fw, scp-fwu-cfg and nt-fw. +You can use normal (non-external) binaries like U-Boot simply by adding a +FIP type, with the `fip-type` property, as above. + +Since FIP exists to bring blobs together, Binman assumes that all FIP +entries are external binaries. If a binary may not exist, you can use the +`--allow-missing` flag to Binman, in which case the image is still created, +even though it will not actually work. + +The size of the FIP depends on the size of the binaries. There is currently +no way to specify a fixed size. If the `atf-fip` node has a `size` entry, +this affects the space taken up by the `atf-fip` entry, but the FIP itself +does not expand to use that space. + +Some other FIP features are available with Binman. The header and the +entries have 64-bit flag works. The flag flags do not seem to be defined +anywhere, but you can use `fip-hdr-flags` and fip-flags` to set the values +of the header and entries respectively. + +FIP entries can be aligned to a particular power-of-two boundary. Use +fip-align for this. + +Binman only understands the entry types that are included in its +implementation. It is possible to specify a 16-byte UUID instead, using the +fip-uuid property. In this case Binman doesn't know what its type is, so +just uses the UUID. See the `u-boot` node in this example:: + + binman { + atf-fip { + fip-hdr-flags = /bits/ 64 <0x123>; + fip-align = <16>; + soc-fw { + fip-flags = /bits/ 64 <0x456>; + filename = "bl31.bin"; + }; + + scp-fwu-cfg { + filename = "bl2u.bin"; + }; + + u-boot { + fip-uuid = [fc 65 13 92 4a 5b 11 ec + 94 35 ff 2d 1c fc 79 9c]; + }; + }; + fdtmap { + }; + }; + +Binman allows reading and updating FIP entries after the image is created, +provided that an FDPMAP is present too. Updates which change the size of a +FIP entry will cause it to be expanded or contracted as needed. + +Properties for top-level atf-fip node +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +fip-hdr-flags (64 bits) + Sets the flags for the FIP header. + +Properties for subnodes +~~~~~~~~~~~~~~~~~~~~~~~ + +fip-type (str) + FIP type to use for this entry. This is needed if the entry + name is not a valid type. Value types are defined in `fip_util.py`. + The FIP type defines the UUID that is used (they map 1:1). + +fip-uuid (16 bytes) + If there is no FIP-type name defined, or it is not supported by Binman, + this property sets the UUID. It should be a 16-byte value, following the + hex digits of the UUID. + +fip-flags (64 bits) + Set the flags for a FIP entry. Use in one of the subnodes of the + 7atf-fip entry. + +fip-align + Set the alignment for a FIP entry, FIP entries can be aligned to a + particular power-of-two boundary. The default is 1. + +Adding new FIP-entry types +~~~~~~~~~~~~~~~~~~~~~~~~~~ + +When new FIP entries are defined by TF-A they appear in the +`TF-A source tree`_. You can use `fip_util.py` to update Binman to support +new types, then `send a patch`_ to the U-Boot mailing list. There are two +source files that the tool examples: + +- `include/tools_share/firmware_image_package.h` has the UUIDs +- `tools/fiptool/tbbr_config.c` has the name and descripion for each UUID + +To run the tool:: + + $ tools/binman/fip_util.py -s /path/to/arm-trusted-firmware + Warning: UUID 'UUID_NON_TRUSTED_WORLD_KEY_CERT' is not mentioned in tbbr_config.c file + Existing code in 'tools/binman/fip_util.py' is up-to-date + +If it shows there is an update, it writes a new version of `fip_util.py` +to `fip_util.py.out`. You can change the output file using the `-i` flag. +If you have a problem, use `-D` to enable traceback debugging. + +FIP commentary +~~~~~~~~~~~~~~ + +As a side effect of use of UUIDs, FIP does not support multiple +entries of the same type, such as might be used to store fonts or graphics +icons, for example. For verified boot it could be used for each part of the +image (e.g. separate FIPs for A and B) but cannot describe the whole +firmware image. As with FMAP there is no hierarchy defined, although FMAP +works around this by having 'section' areas which encompass others. A +similar workaround would be possible with FIP but is not currently defined. + +It is recommended to always add an fdtmap to every image, as well as any +FIPs so that binman and other tools can access the entire image correctly. + +.. _FIP: https://trustedfirmware-a.readthedocs.io/en/latest/design/firmware-design.html#firmware-image-package-fip +.. _`TF-A source tree`: https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git +.. _`send a patch`: https://www.denx.de/wiki/U-Boot/Patches + + + Entry: blob: Arbitrary binary blob ---------------------------------- @@ -69,6 +223,20 @@ See 'blob' for Properties / Entry arguments. +Entry: blob-ext-list: List of externally built binary blobs +----------------------------------------------------------- + +This is like blob-ext except that a number of blobs can be provided, +typically with some sort of relationship, e.g. all are DDC parameters. + +If any of the external files needed by this llist is missing, binman can +optionally ignore it and produce a broken image with a warning. + +Args: + filenames: List of filenames to read and include + + + Entry: blob-named-by-arg: A blob entry which gets its filename property from its subclass ----------------------------------------------------------------------------------------- @@ -314,6 +482,10 @@ Example output for a simple image with U-Boot and an FDT map:: If allow-repack is used then 'orig-offset' and 'orig-size' properties are added as necessary. See the binman README. +When extracting files, an alternative 'fdt' format is available for fdtmaps. +Use `binman extract -F fdt ...` to use this. It will export a devicetree, +without the fdtmap header, so it can be viewed with `fdtdump`. + Entry: files: A set of files arranged in a section @@ -799,39 +971,135 @@ This entry holds firmware for an external platform-specific coprocessor. Entry: section: Entry that contains other entries ------------------------------------------------- -Properties / Entry arguments: (see binman README for more information): - pad-byte: Pad byte to use when padding - sort-by-offset: True if entries should be sorted by offset, False if - they must be in-order in the device tree description - - end-at-4gb: Used to build an x86 ROM which ends at 4GB (2^32) - - skip-at-start: Number of bytes before the first entry starts. These - effectively adjust the starting offset of entries. For example, - if this is 16, then the first entry would start at 16. An entry - with offset = 20 would in fact be written at offset 4 in the image - file, since the first 16 bytes are skipped when writing. - name-prefix: Adds a prefix to the name of every entry in the section - when writing out the map - align_default: Default alignment for this section, if no alignment is - given in the entry - -Properties: - allow_missing: True if this section permits external blobs to be - missing their contents. The second will produce an image but of - course it will not work. - -Properties: - _allow_missing: True if this section permits external blobs to be - missing their contents. The second will produce an image but of - course it will not work. +A section is an entry which can contain other entries, thus allowing +hierarchical images to be created. See 'Sections and hierarchical images' +in the binman README for more information. + +The base implementation simply joins the various entries together, using +various rules about alignment, etc. + +Subclassing +~~~~~~~~~~~ + +This class can be subclassed to support other file formats which hold +multiple entries, such as CBFS. To do this, override the following +functions. The documentation here describes what your function should do. +For example code, see etypes which subclass `Entry_section`, or `cbfs.py` +for a more involved example:: + + $ grep -l \(Entry_section tools/binman/etype/*.py + +ReadNode() + Call `super().ReadNode()`, then read any special properties for the + section. Then call `self.ReadEntries()` to read the entries. + + Binman calls this at the start when reading the image description. + +ReadEntries() + Read in the subnodes of the section. This may involve creating entries + of a particular etype automatically, as well as reading any special + properties in the entries. For each entry, entry.ReadNode() should be + called, to read the basic entry properties. The properties should be + added to `self._entries[]`, in the correct order, with a suitable name. + + Binman calls this at the start when reading the image description. + +BuildSectionData(required) + Create the custom file format that you want and return it as bytes. + This likely sets up a file header, then loops through the entries, + adding them to the file. For each entry, call `entry.GetData()` to + obtain the data. If that returns None, and `required` is False, then + this method must give up and return None. But if `required` is True then + it should assume that all data is valid. + + Binman calls this when packing the image, to find out the size of + everything. It is called again at the end when building the final image. + +SetImagePos(image_pos): + Call `super().SetImagePos(image_pos)`, then set the `image_pos` values + for each of the entries. This should use the custom file format to find + the `start offset` (and `image_pos`) of each entry. If the file format + uses compression in such a way that there is no offset available (other + than reading the whole file and decompressing it), then the offsets for + affected entries can remain unset (`None`). The size should also be set + if possible. + + Binman calls this after the image has been packed, to update the + location that all the entries ended up at. + +ReadChildData(child, decomp, alt_format): + The default version of this may be good enough, if you are able to + implement SetImagePos() correctly. But that is a bit of a bypass, so + you can override this method to read from your custom file format. It + should read the entire entry containing the custom file using + `super().ReadData(True)`, then parse the file to get the data for the + given child, then return that data. + + If your file format supports compression, the `decomp` argument tells + you whether to return the compressed data (`decomp` is False) or to + uncompress it first, then return the uncompressed data (`decomp` is + True). This is used by the `binman extract -U` option. + + If your entry supports alternative formats, the alt_format provides the + alternative format that the user has selected. Your function should + return data in that format. This is used by the 'binman extract -l' + option. + + Binman calls this when reading in an image, in order to populate all the + entries with the data from that image (`binman ls`). + +WriteChildData(child): + Binman calls this after `child.data` is updated, to inform the custom + file format about this, in case it needs to do updates. + + The default version of this does nothing and probably needs to be + overridden for the 'binman replace' command to work. Your version should + use `child.data` to update the data for that child in the custom file + format. + + Binman calls this when updating an image that has been read in and in + particular to update the data for a particular entry (`binman replace`) + +Properties / Entry arguments +~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +See :ref:`develop/package/binman:Image description format` for more +information. + +align-default + Default alignment for this section, if no alignment is given in the + entry + +pad-byte + Pad byte to use when padding + +sort-by-offset + True if entries should be sorted by offset, False if they must be + in-order in the device tree description + +end-at-4gb + Used to build an x86 ROM which ends at 4GB (2^32) + +name-prefix + Adds a prefix to the name of every entry in the section when writing out + the map + +skip-at-start + Number of bytes before the first entry starts. These effectively adjust + the starting offset of entries. For example, if this is 16, then the + first entry would start at 16. An entry with offset = 20 would in fact + be written at offset 4 in the image file, since the first 16 bytes are + skipped when writing. Since a section is also an entry, it inherits all the properies of entries too. -A section is an entry which can contain other entries, thus allowing -hierarchical images to be created. See 'Sections and hierarchical images' -in the binman README for more information. +Note that the `allow_missing` member controls whether this section permits +external blobs to be missing their contents. The option will produce an +image but of course it will not work. It is useful to make sure that +Continuous Integration systems can build without the binaries being +available. This is set by the `SetAllowMissing()` method, if +`--allow-missing` is passed to binman. diff --git a/tools/binman/entry.py b/tools/binman/entry.py index 401476fe760387f79c5eac83cfa5b80626d61a9f..54cc3726b9d9e19004fc9570250f4ba06440e52a 100644 --- a/tools/binman/entry.py +++ b/tools/binman/entry.py @@ -97,7 +97,7 @@ class Entry(object): self.pad_after = 0 self.offset_unset = False self.image_pos = None - self._expand_size = False + self.expand_size = False self.compress = 'none' self.missing = False self.faked = False @@ -106,7 +106,7 @@ class Entry(object): self.allow_fake = False @staticmethod - def Lookup(node_path, etype, expanded): + def FindEntryClass(etype, expanded): """Look up the entry class for a node. Args: @@ -117,10 +117,9 @@ class Entry(object): Returns: The entry class object if found, else None if not found and expanded - is True - - Raise: - ValueError if expanded is False and the class is not found + is True, else a tuple: + module name that could not be found + exception received """ # Convert something like 'u-boot@0' to 'u_boot' since we are only # interested in the type. @@ -141,30 +140,66 @@ class Entry(object): except ImportError as e: if expanded: return None - raise ValueError("Unknown entry type '%s' in node '%s' (expected etype/%s.py, error '%s'" % - (etype, node_path, module_name, e)) + return module_name, e modules[module_name] = module # Look up the expected class name return getattr(module, 'Entry_%s' % module_name) @staticmethod - def Create(section, node, etype=None, expanded=False): + def Lookup(node_path, etype, expanded, missing_etype=False): + """Look up the entry class for a node. + + Args: + node_node (str): Path name of Node object containing information + about the entry to create (used for errors) + etype (str): Entry type to use + expanded (bool): Use the expanded version of etype + missing_etype (bool): True to default to a blob etype if the + requested etype is not found + + Returns: + The entry class object if found, else None if not found and expanded + is True + + Raise: + ValueError if expanded is False and the class is not found + """ + # Convert something like 'u-boot@0' to 'u_boot' since we are only + # interested in the type. + cls = Entry.FindEntryClass(etype, expanded) + if cls is None: + return None + elif isinstance(cls, tuple): + if missing_etype: + cls = Entry.FindEntryClass('blob', False) + if isinstance(cls, tuple): # This should not fail + module_name, e = cls + raise ValueError( + "Unknown entry type '%s' in node '%s' (expected etype/%s.py, error '%s'" % + (etype, node_path, module_name, e)) + return cls + + @staticmethod + def Create(section, node, etype=None, expanded=False, missing_etype=False): """Create a new entry for a node. Args: - section: Section object containing this node - node: Node object containing information about the entry to - create - etype: Entry type to use, or None to work it out (used for tests) - expanded: True to use expanded versions of entries, where available + section (entry_Section): Section object containing this node + node (Node): Node object containing information about the entry to + create + etype (str): Entry type to use, or None to work it out (used for + tests) + expanded (bool): Use the expanded version of etype + missing_etype (bool): True to default to a blob etype if the + requested etype is not found Returns: A new Entry object of the correct type (a subclass of Entry) """ if not etype: etype = fdt_util.GetString(node, 'type', node.name) - obj = Entry.Lookup(node.path, etype, expanded) + obj = Entry.Lookup(node.path, etype, expanded, missing_etype) if obj and expanded: # Check whether to use the expanded entry new_etype = etype + '-expanded' @@ -174,7 +209,7 @@ class Entry(object): else: obj = None if not obj: - obj = Entry.Lookup(node.path, etype, False) + obj = Entry.Lookup(node.path, etype, False, missing_etype) # Call its constructor to get the object we want. return obj(section, etype, node) @@ -784,7 +819,7 @@ features to produce new behaviours. self.AddEntryInfo(entries, indent, self.name, self.etype, self.size, self.image_pos, self.uncomp_size, self.offset, self) - def ReadData(self, decomp=True): + def ReadData(self, decomp=True, alt_format=None): """Read the data for an entry from the image This is used when the image has been read in and we want to extract the @@ -801,19 +836,20 @@ features to produce new behaviours. # although compressed sections are currently not supported tout.Debug("ReadChildData section '%s', entry '%s'" % (self.section.GetPath(), self.GetPath())) - data = self.section.ReadChildData(self, decomp) + data = self.section.ReadChildData(self, decomp, alt_format) return data - def ReadChildData(self, child, decomp=True): + def ReadChildData(self, child, decomp=True, alt_format=None): """Read the data for a particular child entry This reads data from the parent and extracts the piece that relates to the given child. Args: - child: Child entry to read data for (must be valid) - decomp: True to decompress any compressed data before returning it; - False to return the raw, uncompressed data + child (Entry): Child entry to read data for (must be valid) + decomp (bool): True to decompress any compressed data before + returning it; False to return the raw, uncompressed data + alt_format (str): Alternative format to read in, or None Returns: Data for the child (bytes) @@ -826,6 +862,20 @@ features to produce new behaviours. self.ProcessContentsUpdate(data) self.Detail('Loaded data size %x' % len(data)) + def GetAltFormat(self, data, alt_format): + """Read the data for an extry in an alternative format + + Supported formats are list in the documentation for each entry. An + example is fdtmap which provides . + + Args: + data (bytes): Data to convert (this should have been produced by the + entry) + alt_format (str): Format to use + + """ + pass + def GetImage(self): """Get the image containing this entry @@ -864,7 +914,8 @@ features to produce new behaviours. """Handle writing the data in a child entry This should be called on the child's parent section after the child's - data has been updated. It + data has been updated. It should update any data structures needed to + validate that the update is successful. This base-class implementation does nothing, since the base Entry object does not have any children. @@ -874,7 +925,7 @@ features to produce new behaviours. Returns: True if the section could be updated successfully, False if the - data is such that the section could not updat + data is such that the section could not update """ return True @@ -984,3 +1035,13 @@ features to produce new behaviours. tout.Info("Node '%s': etype '%s': %s selected" % (node.path, etype, new_etype)) return True + + def CheckAltFormats(self, alt_formats): + """Add any alternative formats supported by this entry type + + Args: + alt_formats (dict): Dict to add alt_formats to: + key: Name of alt format + value: Help text + """ + pass diff --git a/tools/binman/entry_test.py b/tools/binman/entry_test.py index c3d5f3eef485b2685c9dbe43b89c14b9eedad41a..1b59c9056ec8757e7388238279617991ed95b132 100644 --- a/tools/binman/entry_test.py +++ b/tools/binman/entry_test.py @@ -10,6 +10,7 @@ import sys import unittest from binman import entry +from binman.etype.blob import Entry_blob from dtoc import fdt from dtoc import fdt_util from patman import tools @@ -100,5 +101,13 @@ class TestEntry(unittest.TestCase): self.assertIn("Unknown entry type 'missing' in node '/binman/u-boot'", str(e.exception)) + def testMissingEtype(self): + """Test use of a blob etype when the requested one is not available""" + ent = entry.Entry.Create(None, self.GetNode(), 'missing', + missing_etype=True) + self.assertTrue(isinstance(ent, Entry_blob)) + self.assertEquals('missing', ent.etype) + + if __name__ == "__main__": unittest.main() diff --git a/tools/binman/etype/atf_fip.py b/tools/binman/etype/atf_fip.py new file mode 100644 index 0000000000000000000000000000000000000000..07e6c645b0623590fbf3df6eb44e6ada7c4bd8c8 --- /dev/null +++ b/tools/binman/etype/atf_fip.py @@ -0,0 +1,273 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright 2019 Google LLC +# Written by Simon Glass +# +# Entry-type module for the ARM Trusted Firmware's Firmware Image Package (FIP) +# format + +from collections import OrderedDict + +from binman.entry import Entry +from binman.etype.section import Entry_section +from binman.fip_util import FIP_TYPES, FipReader, FipWriter, UUID_LEN +from dtoc import fdt_util +from patman import tools + +class Entry_atf_fip(Entry_section): + """ARM Trusted Firmware's Firmware Image Package (FIP) + + A FIP_ provides a way to group binaries in a firmware image, used by ARM's + Trusted Firmware A (TF-A) code. It is a simple format consisting of a + table of contents with information about the type, offset and size of the + binaries in the FIP. It is quite similar to FMAP, with the major difference + that it uses UUIDs to indicate the type of each entry. + + Note: It is recommended to always add an fdtmap to every image, as well as + any FIPs so that binman and other tools can access the entire image + correctly. + + The UUIDs correspond to useful names in `fiptool`, provided by ATF to + operate on FIPs. Binman uses these names to make it easier to understand + what is going on, although it is possible to provide a UUID if needed. + + The contents of the FIP are defined by subnodes of the atf-fip entry, e.g.:: + + atf-fip { + soc-fw { + filename = "bl31.bin"; + }; + + scp-fwu-cfg { + filename = "bl2u.bin"; + }; + + u-boot { + fip-type = "nt-fw"; + }; + }; + + This describes a FIP with three entries: soc-fw, scp-fwu-cfg and nt-fw. + You can use normal (non-external) binaries like U-Boot simply by adding a + FIP type, with the `fip-type` property, as above. + + Since FIP exists to bring blobs together, Binman assumes that all FIP + entries are external binaries. If a binary may not exist, you can use the + `--allow-missing` flag to Binman, in which case the image is still created, + even though it will not actually work. + + The size of the FIP depends on the size of the binaries. There is currently + no way to specify a fixed size. If the `atf-fip` node has a `size` entry, + this affects the space taken up by the `atf-fip` entry, but the FIP itself + does not expand to use that space. + + Some other FIP features are available with Binman. The header and the + entries have 64-bit flag works. The flag flags do not seem to be defined + anywhere, but you can use `fip-hdr-flags` and fip-flags` to set the values + of the header and entries respectively. + + FIP entries can be aligned to a particular power-of-two boundary. Use + fip-align for this. + + Binman only understands the entry types that are included in its + implementation. It is possible to specify a 16-byte UUID instead, using the + fip-uuid property. In this case Binman doesn't know what its type is, so + just uses the UUID. See the `u-boot` node in this example:: + + binman { + atf-fip { + fip-hdr-flags = /bits/ 64 <0x123>; + fip-align = <16>; + soc-fw { + fip-flags = /bits/ 64 <0x456>; + filename = "bl31.bin"; + }; + + scp-fwu-cfg { + filename = "bl2u.bin"; + }; + + u-boot { + fip-uuid = [fc 65 13 92 4a 5b 11 ec + 94 35 ff 2d 1c fc 79 9c]; + }; + }; + fdtmap { + }; + }; + + Binman allows reading and updating FIP entries after the image is created, + provided that an FDPMAP is present too. Updates which change the size of a + FIP entry will cause it to be expanded or contracted as needed. + + Properties for top-level atf-fip node + ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + fip-hdr-flags (64 bits) + Sets the flags for the FIP header. + + Properties for subnodes + ~~~~~~~~~~~~~~~~~~~~~~~ + + fip-type (str) + FIP type to use for this entry. This is needed if the entry + name is not a valid type. Value types are defined in `fip_util.py`. + The FIP type defines the UUID that is used (they map 1:1). + + fip-uuid (16 bytes) + If there is no FIP-type name defined, or it is not supported by Binman, + this property sets the UUID. It should be a 16-byte value, following the + hex digits of the UUID. + + fip-flags (64 bits) + Set the flags for a FIP entry. Use in one of the subnodes of the + 7atf-fip entry. + + fip-align + Set the alignment for a FIP entry, FIP entries can be aligned to a + particular power-of-two boundary. The default is 1. + + Adding new FIP-entry types + ~~~~~~~~~~~~~~~~~~~~~~~~~~ + + When new FIP entries are defined by TF-A they appear in the + `TF-A source tree`_. You can use `fip_util.py` to update Binman to support + new types, then `send a patch`_ to the U-Boot mailing list. There are two + source files that the tool examples: + + - `include/tools_share/firmware_image_package.h` has the UUIDs + - `tools/fiptool/tbbr_config.c` has the name and descripion for each UUID + + To run the tool:: + + $ tools/binman/fip_util.py -s /path/to/arm-trusted-firmware + Warning: UUID 'UUID_NON_TRUSTED_WORLD_KEY_CERT' is not mentioned in tbbr_config.c file + Existing code in 'tools/binman/fip_util.py' is up-to-date + + If it shows there is an update, it writes a new version of `fip_util.py` + to `fip_util.py.out`. You can change the output file using the `-i` flag. + If you have a problem, use `-D` to enable traceback debugging. + + FIP commentary + ~~~~~~~~~~~~~~ + + As a side effect of use of UUIDs, FIP does not support multiple + entries of the same type, such as might be used to store fonts or graphics + icons, for example. For verified boot it could be used for each part of the + image (e.g. separate FIPs for A and B) but cannot describe the whole + firmware image. As with FMAP there is no hierarchy defined, although FMAP + works around this by having 'section' areas which encompass others. A + similar workaround would be possible with FIP but is not currently defined. + + It is recommended to always add an fdtmap to every image, as well as any + FIPs so that binman and other tools can access the entire image correctly. + + .. _FIP: https://trustedfirmware-a.readthedocs.io/en/latest/design/firmware-design.html#firmware-image-package-fip + .. _`TF-A source tree`: https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git + .. _`send a patch`: https://www.denx.de/wiki/U-Boot/Patches + """ + def __init__(self, section, etype, node): + # Put this here to allow entry-docs and help to work without libfdt + global state + from binman import state + + super().__init__(section, etype, node) + self.align_default = None + self._entries = OrderedDict() + self.reader = None + + def ReadNode(self): + """Read properties from the atf-fip node""" + super().ReadNode() + self._pad_byte = fdt_util.GetInt(self._node, 'pad-byte', 0) + self._fip_flags = fdt_util.GetInt64(self._node, 'fip-hdr-flags', 0) + self._fip_align = fdt_util.GetInt(self._node, 'fip-align', 1) + if tools.NotPowerOfTwo(self._fip_align): + raise ValueError("Node '%s': FIP alignment %s must be a power of two" % + (self._node.path, self._fip_align)) + self.ReadEntries() + + def ReadEntries(self): + """Read the subnodes to find out what should go in this FIP""" + for node in self._node.subnodes: + fip_type = None + etype = None + if node.name in FIP_TYPES: + fip_type = node.name + etype = 'blob-ext' + + entry = Entry.Create(self, node, etype) + entry._fip_uuid = fdt_util.GetBytes(node, 'fip-uuid', UUID_LEN) + if not fip_type and not entry._fip_uuid: + fip_type = fdt_util.GetString(node, 'fip-type') + if not fip_type: + self.Raise("Must provide a fip-type (node name '%s' is not a known FIP type)" % + node.name) + + entry._fip_type = fip_type + entry._fip_flags = fdt_util.GetInt64(node, 'fip-flags', 0) + entry.ReadNode() + entry._fip_name = node.name + self._entries[entry._fip_name] = entry + + def BuildSectionData(self, required): + """Override this function to create a custom format for the entries + + Arguments: + required (bool): True if the data must be valid, False if it may + be missing (entry.GetData() returns None + + Returns: + bytes: Data obtained, or None if None + """ + fip = FipWriter(self._fip_flags, self._fip_align) + for entry in self._entries.values(): + # First get the input data and put it in an entry. If not available, + # try later. + entry_data = entry.GetData(required) + if not required and entry_data is None: + return None + fent = fip.add_entry(entry._fip_type or entry._fip_uuid, entry_data, + entry._fip_flags) + if fent: + entry._fip_entry = fent + data = fip.get_data() + return data + + def SetImagePos(self, image_pos): + """Override this function to set all the entry properties from FIP + + We can only do this once image_pos is known + + Args: + image_pos: Position of this entry in the image + """ + super().SetImagePos(image_pos) + + # Now update the entries with info from the FIP entries + for entry in self._entries.values(): + fent = entry._fip_entry + entry.size = fent.size + entry.offset = fent.offset + entry.image_pos = self.image_pos + entry.offset + + def ReadChildData(self, child, decomp=True, alt_format=None): + if not self.reader: + self.fip_data = super().ReadData(True) + self.reader = FipReader(self.fip_data) + reader = self.reader + + # It is tricky to obtain the data from a FIP entry since it is indexed + # by its UUID. + fent = reader.get_entry(child._fip_type or child._fip_uuid) + return fent.data + + # Note: + # It is also possible to extract it using the offsets directly, but this + # seems less FIP_friendly: + # return self.fip_data[child.offset:child.offset + child.size] + + def WriteChildData(self, child): + # Recreate the data structure, leaving the data for this child alone, + # so that child.data is used to pack into the FIP. + self.ObtainContents(skip_entry=child) + return True diff --git a/tools/binman/etype/blob.py b/tools/binman/etype/blob.py index 6e63d777eb08247d31767f5af9745a3ca5012796..65ebb2ecf4d83490691ca1e431d13f993732c5b2 100644 --- a/tools/binman/etype/blob.py +++ b/tools/binman/etype/blob.py @@ -55,10 +55,10 @@ class Entry_blob(Entry): self.ReadBlobContents() return True - def ReadBlobContents(self): + def ReadFileContents(self, pathname): """Read blob contents into memory - This function compresses the data before storing if needed. + This function compresses the data before returning if needed. We assume the data is small enough to fit into memory. If this is used for large filesystem image that might not be true. @@ -66,13 +66,23 @@ class Entry_blob(Entry): new Entry method which can read in chunks. Then we could copy the data in chunks and avoid reading it all at once. For now this seems like an unnecessary complication. + + Args: + pathname (str): Pathname to read from + + Returns: + bytes: Data read """ state.TimingStart('read') - indata = tools.ReadFile(self._pathname) + indata = tools.ReadFile(pathname) state.TimingAccum('read') state.TimingStart('compress') data = self.CompressData(indata) state.TimingAccum('compress') + return data + + def ReadBlobContents(self): + data = self.ReadFileContents(self._pathname) self.SetContents(data) return True diff --git a/tools/binman/etype/blob_ext_list.py b/tools/binman/etype/blob_ext_list.py new file mode 100644 index 0000000000000000000000000000000000000000..136ae819946fa5ae4748b1a0f6af3720b685b953 --- /dev/null +++ b/tools/binman/etype/blob_ext_list.py @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (c) 2016 Google, Inc +# Written by Simon Glass +# +# Entry-type module for a list of external blobs, not built by U-Boot +# + +import os + +from binman.etype.blob import Entry_blob +from dtoc import fdt_util +from patman import tools +from patman import tout + +class Entry_blob_ext_list(Entry_blob): + """List of externally built binary blobs + + This is like blob-ext except that a number of blobs can be provided, + typically with some sort of relationship, e.g. all are DDC parameters. + + If any of the external files needed by this llist is missing, binman can + optionally ignore it and produce a broken image with a warning. + + Args: + filenames: List of filenames to read and include + """ + def __init__(self, section, etype, node): + Entry_blob.__init__(self, section, etype, node) + self.external = True + + def ReadNode(self): + super().ReadNode() + self._filenames = fdt_util.GetStringList(self._node, 'filenames') + self._pathnames = [] + + def ObtainContents(self): + missing = False + pathnames = [] + for fname in self._filenames: + pathname = tools.GetInputFilename( + fname, self.external and self.section.GetAllowMissing()) + # Allow the file to be missing + if not pathname: + missing = True + pathnames.append(pathname) + self._pathnames = pathnames + + if missing: + self.SetContents(b'') + self.missing = True + return True + + data = bytearray() + for pathname in pathnames: + data += self.ReadFileContents(pathname) + + self.SetContents(data) + return True diff --git a/tools/binman/etype/blob_phase.py b/tools/binman/etype/blob_phase.py index 54ca54c50c192aec331037002e4000d169dd00ed..ed25e467a13495db3907d3f5f11c061db09771fe 100644 --- a/tools/binman/etype/blob_phase.py +++ b/tools/binman/etype/blob_phase.py @@ -48,4 +48,4 @@ class Entry_blob_phase(Entry_section): subnode = state.AddSubnode(self._node, name) # Read entries again, now that we have some - self._ReadEntries() + self.ReadEntries() diff --git a/tools/binman/etype/cbfs.py b/tools/binman/etype/cbfs.py index 44db7b9bb20358859394dcffc8714ab9de4c3eda..cc1fbdf4b57ecd3755cf4326e4b87511ee114809 100644 --- a/tools/binman/etype/cbfs.py +++ b/tools/binman/etype/cbfs.py @@ -168,43 +168,17 @@ class Entry_cbfs(Entry): from binman import state super().__init__(section, etype, node) - self._cbfs_arg = fdt_util.GetString(node, 'cbfs-arch', 'x86') self.align_default = None - self._cbfs_entries = OrderedDict() - self._ReadSubnodes() + self._entries = OrderedDict() self.reader = None - def ObtainContents(self, skip=None): - arch = cbfs_util.find_arch(self._cbfs_arg) - if arch is None: - self.Raise("Invalid architecture '%s'" % self._cbfs_arg) - if self.size is None: - self.Raise("'cbfs' entry must have a size property") - cbfs = CbfsWriter(self.size, arch) - for entry in self._cbfs_entries.values(): - # First get the input data and put it in a file. If not available, - # try later. - if entry != skip and not entry.ObtainContents(): - return False - data = entry.GetData() - cfile = None - if entry._type == 'raw': - cfile = cbfs.add_file_raw(entry._cbfs_name, data, - entry._cbfs_offset, - entry._cbfs_compress) - elif entry._type == 'stage': - cfile = cbfs.add_file_stage(entry._cbfs_name, data, - entry._cbfs_offset) - else: - entry.Raise("Unknown cbfs-type '%s' (use 'raw', 'stage')" % - entry._type) - if cfile: - entry._cbfs_file = cfile - data = cbfs.get_data() - self.SetContents(data) - return True + def ReadNode(self): + """Read properties from the atf-fip node""" + super().ReadNode() + self._cbfs_arg = fdt_util.GetString(self._node, 'cbfs-arch', 'x86') + self.ReadEntries() - def _ReadSubnodes(self): + def ReadEntries(self): """Read the subnodes to find out what should go in this CBFS""" for node in self._node.subnodes: entry = Entry.Create(self, node) @@ -217,7 +191,41 @@ class Entry_cbfs(Entry): if entry._cbfs_compress is None: self.Raise("Invalid compression in '%s': '%s'" % (node.name, compress)) - self._cbfs_entries[entry._cbfs_name] = entry + self._entries[entry._cbfs_name] = entry + + def ObtainCfile(self, cbfs, entry): + # First get the input data and put it in a file. If not available, + # try later. + data = entry.GetData() + cfile = None + if entry._type == 'raw': + cfile = cbfs.add_file_raw(entry._cbfs_name, data, + entry._cbfs_offset, + entry._cbfs_compress) + elif entry._type == 'stage': + cfile = cbfs.add_file_stage(entry._cbfs_name, data, + entry._cbfs_offset) + else: + entry.Raise("Unknown cbfs-type '%s' (use 'raw', 'stage')" % + entry._type) + return cfile + + def ObtainContents(self, skip_entry=None): + arch = cbfs_util.find_arch(self._cbfs_arg) + if arch is None: + self.Raise("Invalid architecture '%s'" % self._cbfs_arg) + if self.size is None: + self.Raise("'cbfs' entry must have a size property") + cbfs = CbfsWriter(self.size, arch) + for entry in self._entries.values(): + if entry != skip_entry and not entry.ObtainContents(): + return False + cfile = self.ObtainCfile(cbfs, entry) + if cfile: + entry._cbfs_file = cfile + data = cbfs.get_data() + self.SetContents(data) + return True def SetImagePos(self, image_pos): """Override this function to set all the entry properties from CBFS @@ -230,7 +238,7 @@ class Entry_cbfs(Entry): super().SetImagePos(image_pos) # Now update the entries with info from the CBFS entries - for entry in self._cbfs_entries.values(): + for entry in self._entries.values(): cfile = entry._cbfs_file entry.size = cfile.data_len entry.offset = cfile.calced_cbfs_offset @@ -240,7 +248,7 @@ class Entry_cbfs(Entry): def AddMissingProperties(self, have_image_pos): super().AddMissingProperties(have_image_pos) - for entry in self._cbfs_entries.values(): + for entry in self._entries.values(): entry.AddMissingProperties(have_image_pos) if entry._cbfs_compress: state.AddZeroProp(entry._node, 'uncomp-size') @@ -252,7 +260,7 @@ class Entry_cbfs(Entry): def SetCalculatedProperties(self): """Set the value of device-tree properties calculated by binman""" super().SetCalculatedProperties() - for entry in self._cbfs_entries.values(): + for entry in self._entries.values(): state.SetInt(entry._node, 'offset', entry.offset) state.SetInt(entry._node, 'size', entry.size) state.SetInt(entry._node, 'image-pos', entry.image_pos) @@ -262,24 +270,26 @@ class Entry_cbfs(Entry): def ListEntries(self, entries, indent): """Override this method to list all files in the section""" super().ListEntries(entries, indent) - for entry in self._cbfs_entries.values(): + for entry in self._entries.values(): entry.ListEntries(entries, indent + 1) def GetEntries(self): - return self._cbfs_entries + return self._entries - def ReadData(self, decomp=True): - data = super().ReadData(True) + def ReadData(self, decomp=True, alt_format=None): + data = super().ReadData(True, alt_format) return data - def ReadChildData(self, child, decomp=True): + def ReadChildData(self, child, decomp=True, alt_format=None): if not self.reader: - data = super().ReadData(True) + data = super().ReadData(True, alt_format) self.reader = cbfs_util.CbfsReader(data) reader = self.reader cfile = reader.files.get(child.name) return cfile.data if decomp else cfile.orig_data def WriteChildData(self, child): - self.ObtainContents(skip=child) + # Recreate the data structure, leaving the data for this child alone, + # so that child.data is used to pack into the FIP. + self.ObtainContents(skip_entry=child) return True diff --git a/tools/binman/etype/fdtmap.py b/tools/binman/etype/fdtmap.py index 2339feeba8d63c9172497b49a1b1294578ee097d..aaaf2de4383bdbb5983be5774ea7d7a95cb72857 100644 --- a/tools/binman/etype/fdtmap.py +++ b/tools/binman/etype/fdtmap.py @@ -74,6 +74,10 @@ class Entry_fdtmap(Entry): If allow-repack is used then 'orig-offset' and 'orig-size' properties are added as necessary. See the binman README. + + When extracting files, an alternative 'fdt' format is available for fdtmaps. + Use `binman extract -F fdt ...` to use this. It will export a devicetree, + without the fdtmap header, so it can be viewed with `fdtdump`. """ def __init__(self, section, etype, node): # Put these here to allow entry-docs and help to work without libfdt @@ -86,6 +90,10 @@ class Entry_fdtmap(Entry): from dtoc.fdt import Fdt super().__init__(section, etype, node) + self.alt_formats = ['fdt'] + + def CheckAltFormats(self, alt_formats): + alt_formats['fdt'] = self, 'Extract the devicetree blob from the fdtmap' def _GetFdtmap(self): """Build an FDT map from the entries in the current image @@ -147,3 +155,7 @@ class Entry_fdtmap(Entry): processing, e.g. the image-pos properties. """ return self.ProcessContentsUpdate(self._GetFdtmap()) + + def GetAltFormat(self, data, alt_format): + if alt_format == 'fdt': + return data[FDTMAP_HDR_LEN:] diff --git a/tools/binman/etype/files.py b/tools/binman/etype/files.py index 9b04a496a85189fa99df3b29b315568e46a76b2e..927d0f071df8b2c024c649b822c01eba045b765c 100644 --- a/tools/binman/etype/files.py +++ b/tools/binman/etype/files.py @@ -64,4 +64,4 @@ class Entry_files(Entry_section): state.AddInt(subnode, 'align', self._files_align) # Read entries again, now that we have some - self._ReadEntries() + self.ReadEntries() diff --git a/tools/binman/etype/fit.py b/tools/binman/etype/fit.py index 6936f5736a62bb4e39a2ff2f1bed9645d80cc656..b41187df80ab9532dcd8a12ac9766e0c75b8fc38 100644 --- a/tools/binman/etype/fit.py +++ b/tools/binman/etype/fit.py @@ -136,10 +136,10 @@ class Entry_fit(Entry): str)])[0] def ReadNode(self): - self._ReadSubnodes() + self.ReadEntries() super().ReadNode() - def _ReadSubnodes(self): + def ReadEntries(self): def _AddNode(base_node, depth, node): """Add a node to the FIT diff --git a/tools/binman/etype/intel_ifwi.py b/tools/binman/etype/intel_ifwi.py index 903d39bdbebe21a63421f30413b866f4a309ea20..ecbd78df5e585d2eb645d6389c59756db75b9a14 100644 --- a/tools/binman/etype/intel_ifwi.py +++ b/tools/binman/etype/intel_ifwi.py @@ -50,7 +50,7 @@ class Entry_intel_ifwi(Entry_blob_ext): self._ifwi_entries = OrderedDict() def ReadNode(self): - self._ReadSubnodes() + self.ReadEntries() super().ReadNode() def _BuildIfwi(self): @@ -117,7 +117,7 @@ class Entry_intel_ifwi(Entry_blob_ext): same = orig_data == self.data return same - def _ReadSubnodes(self): + def ReadEntries(self): """Read the subnodes to find out what should go in this IFWI""" for node in self._node.subnodes: entry = Entry.Create(self.section, node) diff --git a/tools/binman/etype/mkimage.py b/tools/binman/etype/mkimage.py index 80fdce0b1446aa948646b54d24648d60b6d37fcf..190398728eca862d007a415226ad00efe18cfff2 100644 --- a/tools/binman/etype/mkimage.py +++ b/tools/binman/etype/mkimage.py @@ -37,7 +37,7 @@ class Entry_mkimage(Entry): self._args = fdt_util.GetString(self._node, 'args').split(' ') self._mkimage_entries = OrderedDict() self.align_default = None - self._ReadSubnodes() + self.ReadEntries() def ObtainContents(self): data = b'' @@ -55,7 +55,7 @@ class Entry_mkimage(Entry): self.SetContents(tools.ReadFile(output_fname)) return True - def _ReadSubnodes(self): + def ReadEntries(self): """Read the subnodes to find out what should go in this image""" for node in self._node.subnodes: entry = Entry.Create(self, node) diff --git a/tools/binman/etype/section.py b/tools/binman/etype/section.py index 4e423855d919be4d3c14ab9af0b36e68e57b9b20..7a55d0323188828fcba434bb3ab43bdc3a1dba29 100644 --- a/tools/binman/etype/section.py +++ b/tools/binman/etype/section.py @@ -24,34 +24,135 @@ from patman.tools import ToHexSize class Entry_section(Entry): """Entry that contains other entries - Properties / Entry arguments: (see binman README for more information): - pad-byte: Pad byte to use when padding - sort-by-offset: True if entries should be sorted by offset, False if - they must be in-order in the device tree description - - end-at-4gb: Used to build an x86 ROM which ends at 4GB (2^32) - - skip-at-start: Number of bytes before the first entry starts. These - effectively adjust the starting offset of entries. For example, - if this is 16, then the first entry would start at 16. An entry - with offset = 20 would in fact be written at offset 4 in the image - file, since the first 16 bytes are skipped when writing. - name-prefix: Adds a prefix to the name of every entry in the section - when writing out the map - align_default: Default alignment for this section, if no alignment is - given in the entry - - Properties: - allow_missing: True if this section permits external blobs to be - missing their contents. The second will produce an image but of - course it will not work. + A section is an entry which can contain other entries, thus allowing + hierarchical images to be created. See 'Sections and hierarchical images' + in the binman README for more information. + + The base implementation simply joins the various entries together, using + various rules about alignment, etc. + + Subclassing + ~~~~~~~~~~~ + + This class can be subclassed to support other file formats which hold + multiple entries, such as CBFS. To do this, override the following + functions. The documentation here describes what your function should do. + For example code, see etypes which subclass `Entry_section`, or `cbfs.py` + for a more involved example:: + + $ grep -l \(Entry_section tools/binman/etype/*.py + + ReadNode() + Call `super().ReadNode()`, then read any special properties for the + section. Then call `self.ReadEntries()` to read the entries. + + Binman calls this at the start when reading the image description. + + ReadEntries() + Read in the subnodes of the section. This may involve creating entries + of a particular etype automatically, as well as reading any special + properties in the entries. For each entry, entry.ReadNode() should be + called, to read the basic entry properties. The properties should be + added to `self._entries[]`, in the correct order, with a suitable name. + + Binman calls this at the start when reading the image description. + + BuildSectionData(required) + Create the custom file format that you want and return it as bytes. + This likely sets up a file header, then loops through the entries, + adding them to the file. For each entry, call `entry.GetData()` to + obtain the data. If that returns None, and `required` is False, then + this method must give up and return None. But if `required` is True then + it should assume that all data is valid. + + Binman calls this when packing the image, to find out the size of + everything. It is called again at the end when building the final image. + + SetImagePos(image_pos): + Call `super().SetImagePos(image_pos)`, then set the `image_pos` values + for each of the entries. This should use the custom file format to find + the `start offset` (and `image_pos`) of each entry. If the file format + uses compression in such a way that there is no offset available (other + than reading the whole file and decompressing it), then the offsets for + affected entries can remain unset (`None`). The size should also be set + if possible. + + Binman calls this after the image has been packed, to update the + location that all the entries ended up at. + + ReadChildData(child, decomp, alt_format): + The default version of this may be good enough, if you are able to + implement SetImagePos() correctly. But that is a bit of a bypass, so + you can override this method to read from your custom file format. It + should read the entire entry containing the custom file using + `super().ReadData(True)`, then parse the file to get the data for the + given child, then return that data. + + If your file format supports compression, the `decomp` argument tells + you whether to return the compressed data (`decomp` is False) or to + uncompress it first, then return the uncompressed data (`decomp` is + True). This is used by the `binman extract -U` option. + + If your entry supports alternative formats, the alt_format provides the + alternative format that the user has selected. Your function should + return data in that format. This is used by the 'binman extract -l' + option. + + Binman calls this when reading in an image, in order to populate all the + entries with the data from that image (`binman ls`). + + WriteChildData(child): + Binman calls this after `child.data` is updated, to inform the custom + file format about this, in case it needs to do updates. + + The default version of this does nothing and probably needs to be + overridden for the 'binman replace' command to work. Your version should + use `child.data` to update the data for that child in the custom file + format. + + Binman calls this when updating an image that has been read in and in + particular to update the data for a particular entry (`binman replace`) + + Properties / Entry arguments + ~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + See :ref:`develop/package/binman:Image description format` for more + information. + + align-default + Default alignment for this section, if no alignment is given in the + entry + + pad-byte + Pad byte to use when padding + + sort-by-offset + True if entries should be sorted by offset, False if they must be + in-order in the device tree description + + end-at-4gb + Used to build an x86 ROM which ends at 4GB (2^32) + + name-prefix + Adds a prefix to the name of every entry in the section when writing out + the map + + skip-at-start + Number of bytes before the first entry starts. These effectively adjust + the starting offset of entries. For example, if this is 16, then the + first entry would start at 16. An entry with offset = 20 would in fact + be written at offset 4 in the image file, since the first 16 bytes are + skipped when writing. Since a section is also an entry, it inherits all the properies of entries too. - A section is an entry which can contain other entries, thus allowing - hierarchical images to be created. See 'Sections and hierarchical images' - in the binman README for more information. + Note that the `allow_missing` member controls whether this section permits + external blobs to be missing their contents. The option will produce an + image but of course it will not work. It is useful to make sure that + Continuous Integration systems can build without the binaries being + available. This is set by the `SetAllowMissing()` method, if + `--allow-missing` is passed to binman. """ def __init__(self, section, etype, node, test=False): if not test: @@ -81,18 +182,16 @@ class Entry_section(Entry): self._skip_at_start = 0 self._name_prefix = fdt_util.GetString(self._node, 'name-prefix') self.align_default = fdt_util.GetInt(self._node, 'align-default', 0) - filename = fdt_util.GetString(self._node, 'filename') - if filename: - self._filename = filename - self._ReadEntries() + self.ReadEntries() - def _ReadEntries(self): + def ReadEntries(self): for node in self._node.subnodes: if node.name.startswith('hash') or node.name.startswith('signature'): continue entry = Entry.Create(self, node, - expanded=self.GetImage().use_expanded) + expanded=self.GetImage().use_expanded, + missing_etype=self.GetImage().missing_etype) entry.ReadNode() entry.SetPrefix(self._name_prefix) self._entries[node.name] = entry @@ -101,9 +200,9 @@ class Entry_section(Entry): """Raises an error for this section Args: - msg: Error message to use in the raise string + msg (str): Error message to use in the raise string Raises: - ValueError() + ValueError: always """ raise ValueError("Section '%s': %s" % (self._node.path, msg)) @@ -146,8 +245,8 @@ class Entry_section(Entry): for entry in self._entries.values(): entry.AddMissingProperties(have_image_pos) - def ObtainContents(self): - return self.GetEntryContents() + def ObtainContents(self, skip_entry=None): + return self.GetEntryContents(skip_entry=skip_entry) def GetPaddedDataForEntry(self, entry, entry_data): """Get the data for an entry including any padding @@ -185,7 +284,7 @@ class Entry_section(Entry): return data - def _BuildSectionData(self, required): + def BuildSectionData(self, required): """Build the contents of a section This places all entries at the right place, dealing with padding before @@ -193,6 +292,9 @@ class Entry_section(Entry): pad-before and pad-after properties in the section items) since that is handled by the parent section. + This should be overridden by subclasses which want to build their own + data structure for the section. + Args: required: True if the data must be present, False if it is OK to return None @@ -204,6 +306,9 @@ class Entry_section(Entry): for entry in self._entries.values(): entry_data = entry.GetData(required) + + # This can happen when this section is referenced from a collection + # earlier in the image description. See testCollectionSection(). if not required and entry_data is None: return None data = self.GetPaddedDataForEntry(entry, entry_data) @@ -253,7 +358,7 @@ class Entry_section(Entry): This excludes any padding. If the section is compressed, the compressed data is returned """ - data = self._BuildSectionData(required) + data = self.BuildSectionData(required) if data is None: return None self.SetContents(data) @@ -281,7 +386,7 @@ class Entry_section(Entry): self._SortEntries() self._ExpandEntries() - data = self._BuildSectionData(True) + data = self.BuildSectionData(True) self.SetContents(data) self.CheckSize() @@ -524,12 +629,13 @@ class Entry_section(Entry): return entry return None - def GetEntryContents(self): + def GetEntryContents(self, skip_entry=None): """Call ObtainContents() for each entry in the section """ def _CheckDone(entry): - if not entry.ObtainContents(): - next_todo.append(entry) + if entry != skip_entry: + if not entry.ObtainContents(): + next_todo.append(entry) return entry todo = self._entries.values() @@ -617,7 +723,7 @@ class Entry_section(Entry): def ListEntries(self, entries, indent): """List the files in the section""" - Entry.AddEntryInfo(entries, indent, self.name, 'section', self.size, + Entry.AddEntryInfo(entries, indent, self.name, self.etype, self.size, self.image_pos, None, self.offset, self) for entry in self._entries.values(): entry.ListEntries(entries, indent + 1) @@ -649,9 +755,9 @@ class Entry_section(Entry): """ return self._sort - def ReadData(self, decomp=True): + def ReadData(self, decomp=True, alt_format=None): tout.Info("ReadData path='%s'" % self.GetPath()) - parent_data = self.section.ReadData(True) + parent_data = self.section.ReadData(True, alt_format) offset = self.offset - self.section._skip_at_start data = parent_data[offset:offset + self.size] tout.Info( @@ -660,9 +766,9 @@ class Entry_section(Entry): self.size, len(data))) return data - def ReadChildData(self, child, decomp=True): - tout.Debug("ReadChildData for child '%s'" % child.GetPath()) - parent_data = self.ReadData(True) + def ReadChildData(self, child, decomp=True, alt_format=None): + tout.Debug(f"ReadChildData for child '{child.GetPath()}'") + parent_data = self.ReadData(True, alt_format) offset = child.offset - self._skip_at_start tout.Debug("Extract for child '%s': offset %#x, skip_at_start %#x, result %#x" % (child.GetPath(), child.offset, self._skip_at_start, offset)) @@ -674,6 +780,10 @@ class Entry_section(Entry): tout.Info("%s: Decompressing data size %#x with algo '%s' to data size %#x" % (child.GetPath(), len(indata), child.compress, len(data))) + if alt_format: + new_data = child.GetAltFormat(data, alt_format) + if new_data is not None: + data = new_data return data def WriteChildData(self, child): @@ -758,8 +868,14 @@ class Entry_section(Entry): nothing. Args: - missing: List of missing properties / entry args, each a string + entry (Entry): Entry to raise the error on + missing (list of str): List of missing properties / entry args, each + a string """ if not self._ignore_missing: - entry.Raise('Missing required properties/entry args: %s' % - (', '.join(missing))) + missing = ', '.join(missing) + entry.Raise(f'Missing required properties/entry args: {missing}') + + def CheckAltFormats(self, alt_formats): + for entry in self._entries.values(): + entry.CheckAltFormats(alt_formats) diff --git a/tools/binman/fip_util.py b/tools/binman/fip_util.py new file mode 100755 index 0000000000000000000000000000000000000000..5f7dbc04d56e4cc788e33d7273b3e58b8bcf013e --- /dev/null +++ b/tools/binman/fip_util.py @@ -0,0 +1,653 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: GPL-2.0+ +# Copyright 2021 Google LLC +# Written by Simon Glass + +"""Support for ARM's Firmware Image Package (FIP) format + +FIP is a format similar to FMAP[1] but with fewer features and an obscure UUID +instead of the region name. + +It consists of a header and a table of entries, each pointing to a place in the +firmware image where something can be found. + +[1] https://chromium.googlesource.com/chromiumos/third_party/flashmap/+/refs/heads/master/lib/fmap.h + +If ATF updates, run this program to update the FIT_TYPE_LIST. + +ARM Trusted Firmware is available at: + +https://github.com/ARM-software/arm-trusted-firmware.git +""" + +from argparse import ArgumentParser +import collections +import io +import os +import re +import struct +import sys +from uuid import UUID + +OUR_FILE = os.path.realpath(__file__) +OUR_PATH = os.path.dirname(OUR_FILE) + +# Bring in the patman and dtoc libraries (but don't override the first path +# in PYTHONPATH) +sys.path.insert(2, os.path.join(OUR_PATH, '..')) + +# pylint: disable=C0413 +from patman import command +from patman import tools + +# The TOC header, at the start of the FIP +HEADER_FORMAT = ' + +"""Tests for fip_util + +This tests a few features of fip_util which are not covered by binman's ftest.py +""" + +import os +import shutil +import sys +import tempfile +import unittest + +# Bring in the patman and dtoc libraries (but don't override the first path +# in PYTHONPATH) +OUR_PATH = os.path.dirname(os.path.realpath(__file__)) +sys.path.insert(2, os.path.join(OUR_PATH, '..')) + +# pylint: disable=C0413 +from patman import test_util +from patman import tools +import fip_util + +HAVE_FIPTOOL = True +try: + tools.Run('which', 'fiptool') +except ValueError: + HAVE_FIPTOOL = False + +# pylint: disable=R0902,R0904 +class TestFip(unittest.TestCase): + """Test of fip_util classes""" + #pylint: disable=W0212 + def setUp(self): + # Create a temporary directory for test files + self._indir = tempfile.mkdtemp(prefix='fip_util.') + tools.SetInputDirs([self._indir]) + + # Set up a temporary output directory, used by the tools library when + # compressing files + tools.PrepareOutputDir(None) + + self.src_file = os.path.join(self._indir, 'orig.py') + self.outname = tools.GetOutputFilename('out.py') + self.args = ['-D', '-s', self._indir, '-o', self.outname] + self.readme = os.path.join(self._indir, 'readme.rst') + self.macro_dir = os.path.join(self._indir, 'include/tools_share') + self.macro_fname = os.path.join(self.macro_dir, + 'firmware_image_package.h') + self.name_dir = os.path.join(self._indir, 'tools/fiptool') + self.name_fname = os.path.join(self.name_dir, 'tbbr_config.c') + + macro_contents = ''' + +/* ToC Entry UUIDs */ +#define UUID_TRUSTED_UPDATE_FIRMWARE_SCP_BL2U \\ + {{0x65, 0x92, 0x27, 0x03}, {0x2f, 0x74}, {0xe6, 0x44}, 0x8d, 0xff, {0x57, 0x9a, 0xc1, 0xff, 0x06, 0x10} } +#define UUID_TRUSTED_UPDATE_FIRMWARE_BL2U \\ + {{0x60, 0xb3, 0xeb, 0x37}, {0xc1, 0xe5}, {0xea, 0x41}, 0x9d, 0xf3, {0x19, 0xed, 0xa1, 0x1f, 0x68, 0x01} } + +''' + + name_contents = ''' + +toc_entry_t toc_entries[] = { + { + .name = "SCP Firmware Updater Configuration FWU SCP_BL2U", + .uuid = UUID_TRUSTED_UPDATE_FIRMWARE_SCP_BL2U, + .cmdline_name = "scp-fwu-cfg" + }, + { + .name = "AP Firmware Updater Configuration BL2U", + .uuid = UUID_TRUSTED_UPDATE_FIRMWARE_BL2U, + .cmdline_name = "ap-fwu-cfg" + }, +''' + + def setup_readme(self): + """Set up the readme.txt file""" + tools.WriteFile(self.readme, 'Trusted Firmware-A\n==================', + binary=False) + + def setup_macro(self, data=macro_contents): + """Set up the tbbr_config.c file""" + os.makedirs(self.macro_dir) + tools.WriteFile(self.macro_fname, data, binary=False) + + def setup_name(self, data=name_contents): + """Set up the firmware_image_package.h file""" + os.makedirs(self.name_dir) + tools.WriteFile(self.name_fname, data, binary=False) + + def tearDown(self): + """Remove the temporary input directory and its contents""" + if self._indir: + shutil.rmtree(self._indir) + self._indir = None + tools.FinaliseOutputDir() + + def test_no_readme(self): + """Test handling of a missing readme.rst""" + with self.assertRaises(Exception) as err: + fip_util.main(self.args, self.src_file) + self.assertIn('Expected file', str(err.exception)) + + def test_invalid_readme(self): + """Test that an invalid readme.rst is detected""" + tools.WriteFile(self.readme, 'blah', binary=False) + with self.assertRaises(Exception) as err: + fip_util.main(self.args, self.src_file) + self.assertIn('does not start with', str(err.exception)) + + def test_no_fip_h(self): + """Check handling of missing firmware_image_package.h""" + self.setup_readme() + with self.assertRaises(Exception) as err: + fip_util.main(self.args, self.src_file) + self.assertIn('No such file or directory', str(err.exception)) + + def test_invalid_fip_h(self): + """Check failure to parse firmware_image_package.h""" + self.setup_readme() + self.setup_macro('blah') + with self.assertRaises(Exception) as err: + fip_util.main(self.args, self.src_file) + self.assertIn('Cannot parse file', str(err.exception)) + + def test_parse_fip_h(self): + """Check parsing of firmware_image_package.h""" + self.setup_readme() + # Check parsing the header file + self.setup_macro() + macros = fip_util.parse_macros(self._indir) + expected_macros = { + 'UUID_TRUSTED_UPDATE_FIRMWARE_SCP_BL2U': + ('ToC Entry UUIDs', 'UUID_TRUSTED_UPDATE_FIRMWARE_SCP_BL2U', + bytes([0x65, 0x92, 0x27, 0x03, 0x2f, 0x74, 0xe6, 0x44, + 0x8d, 0xff, 0x57, 0x9a, 0xc1, 0xff, 0x06, 0x10])), + 'UUID_TRUSTED_UPDATE_FIRMWARE_BL2U': + ('ToC Entry UUIDs', 'UUID_TRUSTED_UPDATE_FIRMWARE_BL2U', + bytes([0x60, 0xb3, 0xeb, 0x37, 0xc1, 0xe5, 0xea, 0x41, + 0x9d, 0xf3, 0x19, 0xed, 0xa1, 0x1f, 0x68, 0x01])), + } + self.assertEqual(expected_macros, macros) + + def test_missing_tbbr_c(self): + """Check handlinh of missing tbbr_config.c""" + self.setup_readme() + self.setup_macro() + + # Still need the .c file + with self.assertRaises(Exception) as err: + fip_util.main(self.args, self.src_file) + self.assertIn('tbbr_config.c', str(err.exception)) + + def test_invalid_tbbr_c(self): + """Check failure to parse tbbr_config.c""" + self.setup_readme() + self.setup_macro() + # Check invalid format for C file + self.setup_name('blah') + with self.assertRaises(Exception) as err: + fip_util.main(self.args, self.src_file) + self.assertIn('Cannot parse file', str(err.exception)) + + def test_inconsistent_tbbr_c(self): + """Check tbbr_config.c in a format we don't expect""" + self.setup_readme() + # This is missing a hex value + self.setup_macro(''' + +/* ToC Entry UUIDs */ +#define UUID_TRUSTED_UPDATE_FIRMWARE_SCP_BL2U \\ + {{0x65, 0x92, 0x27,}, {0x2f, 0x74}, {0xe6, 0x44}, 0x8d, 0xff, {0x57, 0x9a, 0xc1, 0xff, 0x06, 0x10} } +#define UUID_TRUSTED_UPDATE_FIRMWARE_BL2U \\ + {{0x60, 0xb3, 0xeb, 0x37}, {0xc1, 0xe5}, {0xea, 0x41}, 0x9d, 0xf3, {0x19, 0xed, 0xa1, 0x1f, 0x68, 0x01} } + +''') + # Check invalid format for C file + self.setup_name('blah') + with self.assertRaises(Exception) as err: + fip_util.main(self.args, self.src_file) + self.assertIn('Cannot parse UUID line 5', str(err.exception)) + + def test_parse_tbbr_c(self): + """Check parsing tbbr_config.c""" + self.setup_readme() + self.setup_macro() + self.setup_name() + + names = fip_util.parse_names(self._indir) + + expected_names = { + 'UUID_TRUSTED_UPDATE_FIRMWARE_SCP_BL2U': ( + 'SCP Firmware Updater Configuration FWU SCP_BL2U', + 'UUID_TRUSTED_UPDATE_FIRMWARE_SCP_BL2U', + 'scp-fwu-cfg'), + 'UUID_TRUSTED_UPDATE_FIRMWARE_BL2U': ( + 'AP Firmware Updater Configuration BL2U', + 'UUID_TRUSTED_UPDATE_FIRMWARE_BL2U', + 'ap-fwu-cfg'), + } + self.assertEqual(expected_names, names) + + def test_uuid_not_in_tbbr_config_c(self): + """Check handling a UUID in the header file that's not in the .c file""" + self.setup_readme() + self.setup_macro(self.macro_contents + ''' +#define UUID_TRUSTED_OS_FW_KEY_CERT \\ + {{0x94, 0x77, 0xd6, 0x03}, {0xfb, 0x60}, {0xe4, 0x11}, 0x85, 0xdd, {0xb7, 0x10, 0x5b, 0x8c, 0xee, 0x04} } + +''') + self.setup_name() + + macros = fip_util.parse_macros(self._indir) + names = fip_util.parse_names(self._indir) + with test_util.capture_sys_output() as (stdout, _): + fip_util.create_code_output(macros, names) + self.assertIn( + "UUID 'UUID_TRUSTED_OS_FW_KEY_CERT' is not mentioned in tbbr_config.c file", + stdout.getvalue()) + + def test_changes(self): + """Check handling of a source file that does/doesn't need changes""" + self.setup_readme() + self.setup_macro() + self.setup_name() + + # Check generating the file when changes are needed + tools.WriteFile(self.src_file, ''' + +# This is taken from tbbr_config.c in ARM Trusted Firmware +FIP_TYPE_LIST = [ + # ToC Entry UUIDs + FipType('scp-fwu-cfg', 'SCP Firmware Updater Configuration FWU SCP_BL2U', + [0x65, 0x92, 0x27, 0x03, 0x2f, 0x74, 0xe6, 0x44, + 0x8d, 0xff, 0x57, 0x9a, 0xc1, 0xff, 0x06, 0x10]), + ] # end +blah de blah + ''', binary=False) + with test_util.capture_sys_output() as (stdout, _): + fip_util.main(self.args, self.src_file) + self.assertIn('Needs update', stdout.getvalue()) + + # Check generating the file when no changes are needed + tools.WriteFile(self.src_file, ''' +# This is taken from tbbr_config.c in ARM Trusted Firmware +FIP_TYPE_LIST = [ + # ToC Entry UUIDs + FipType('scp-fwu-cfg', 'SCP Firmware Updater Configuration FWU SCP_BL2U', + [0x65, 0x92, 0x27, 0x03, 0x2f, 0x74, 0xe6, 0x44, + 0x8d, 0xff, 0x57, 0x9a, 0xc1, 0xff, 0x06, 0x10]), + FipType('ap-fwu-cfg', 'AP Firmware Updater Configuration BL2U', + [0x60, 0xb3, 0xeb, 0x37, 0xc1, 0xe5, 0xea, 0x41, + 0x9d, 0xf3, 0x19, 0xed, 0xa1, 0x1f, 0x68, 0x01]), + ] # end +blah blah''', binary=False) + with test_util.capture_sys_output() as (stdout, _): + fip_util.main(self.args, self.src_file) + self.assertIn('is up-to-date', stdout.getvalue()) + + def test_no_debug(self): + """Test running without the -D flag""" + self.setup_readme() + self.setup_macro() + self.setup_name() + + args = self.args.copy() + args.remove('-D') + tools.WriteFile(self.src_file, '', binary=False) + with test_util.capture_sys_output(): + fip_util.main(args, self.src_file) + + @unittest.skipIf(not HAVE_FIPTOOL, 'No fiptool available') + def test_fiptool_list(self): + """Create a FIP and check that fiptool can read it""" + fwu = b'my data' + tb_fw = b'some more data' + fip = fip_util.FipWriter(0x123, 0x10) + fip.add_entry('fwu', fwu, 0x456) + fip.add_entry('tb-fw', tb_fw, 0) + fip.add_entry(bytes(range(16)), tb_fw, 0) + data = fip.get_data() + fname = tools.GetOutputFilename('data.fip') + tools.WriteFile(fname, data) + result = fip_util.fiptool('info', fname) + self.assertEqual( + '''Firmware Updater NS_BL2U: offset=0xB0, size=0x7, cmdline="--fwu" +Trusted Boot Firmware BL2: offset=0xC0, size=0xE, cmdline="--tb-fw" +00010203-0405-0607-0809-0A0B0C0D0E0F: offset=0xD0, size=0xE, cmdline="--blob" +''', + result.stdout) + + fwu_data = b'my data' + tb_fw_data = b'some more data' + other_fw_data = b'even more' + + def create_fiptool_image(self): + """Create an image with fiptool which we can use for testing + + Returns: + FipReader: reader for the image + """ + fwu = os.path.join(self._indir, 'fwu') + tools.WriteFile(fwu, self.fwu_data) + + tb_fw = os.path.join(self._indir, 'tb_fw') + tools.WriteFile(tb_fw, self.tb_fw_data) + + other_fw = os.path.join(self._indir, 'other_fw') + tools.WriteFile(other_fw, self.other_fw_data) + + fname = tools.GetOutputFilename('data.fip') + uuid = 'e3b78d9e-4a64-11ec-b45c-fba2b9b49788' + fip_util.fiptool('create', '--align', '8', '--plat-toc-flags', '0x123', + '--fwu', fwu, + '--tb-fw', tb_fw, + '--blob', f'uuid={uuid},file={other_fw}', + fname) + + return fip_util.FipReader(tools.ReadFile(fname)) + + @unittest.skipIf(not HAVE_FIPTOOL, 'No fiptool available') + def test_fiptool_create(self): + """Create a FIP with fiptool and check that fip_util can read it""" + reader = self.create_fiptool_image() + + header = reader.header + fents = reader.fents + + self.assertEqual(0x123 << 32, header.flags) + self.assertEqual(fip_util.HEADER_MAGIC, header.name) + self.assertEqual(fip_util.HEADER_SERIAL, header.serial) + + self.assertEqual(3, len(fents)) + fent = fents[0] + self.assertEqual( + bytes([0x4f, 0x51, 0x1d, 0x11, 0x2b, 0xe5, 0x4e, 0x49, + 0xb4, 0xc5, 0x83, 0xc2, 0xf7, 0x15, 0x84, 0x0a]), fent.uuid) + self.assertEqual(0xb0, fent.offset) + self.assertEqual(len(self.fwu_data), fent.size) + self.assertEqual(0, fent.flags) + self.assertEqual(self.fwu_data, fent.data) + + fent = fents[1] + self.assertEqual( + bytes([0x5f, 0xf9, 0xec, 0x0b, 0x4d, 0x22, 0x3e, 0x4d, + 0xa5, 0x44, 0xc3, 0x9d, 0x81, 0xc7, 0x3f, 0x0a]), fent.uuid) + self.assertEqual(0xb8, fent.offset) + self.assertEqual(len(self.tb_fw_data), fent.size) + self.assertEqual(0, fent.flags) + self.assertEqual(self.tb_fw_data, fent.data) + + fent = fents[2] + self.assertEqual( + bytes([0xe3, 0xb7, 0x8d, 0x9e, 0x4a, 0x64, 0x11, 0xec, + 0xb4, 0x5c, 0xfb, 0xa2, 0xb9, 0xb4, 0x97, 0x88]), fent.uuid) + self.assertEqual(0xc8, fent.offset) + self.assertEqual(len(self.other_fw_data), fent.size) + self.assertEqual(0, fent.flags) + self.assertEqual(self.other_fw_data, fent.data) + + @unittest.skipIf(not HAVE_FIPTOOL, 'No fiptool available') + def test_reader_get_entry(self): + """Test get_entry() by name and UUID""" + reader = self.create_fiptool_image() + fents = reader.fents + fent = reader.get_entry('fwu') + self.assertEqual(fent, fents[0]) + + fent = reader.get_entry( + bytes([0x5f, 0xf9, 0xec, 0x0b, 0x4d, 0x22, 0x3e, 0x4d, + 0xa5, 0x44, 0xc3, 0x9d, 0x81, 0xc7, 0x3f, 0x0a])) + self.assertEqual(fent, fents[1]) + + # Try finding entries that don't exist + with self.assertRaises(Exception) as err: + fent = reader.get_entry('scp-fwu-cfg') + self.assertIn("Cannot find FIP entry 'scp-fwu-cfg'", str(err.exception)) + + with self.assertRaises(Exception) as err: + fent = reader.get_entry(bytes(list(range(16)))) + self.assertIn( + "Cannot find FIP entry '00010203-0405-0607-0809-0a0b0c0d0e0f'", + str(err.exception)) + + with self.assertRaises(Exception) as err: + fent = reader.get_entry('blah') + self.assertIn("Unknown FIP entry type 'blah'", str(err.exception)) + + @unittest.skipIf(not HAVE_FIPTOOL, 'No fiptool available') + def test_fiptool_errors(self): + """Check some error reporting from fiptool""" + with self.assertRaises(Exception) as err: + with test_util.capture_sys_output(): + fip_util.fiptool('create', '--fred') + self.assertIn("Failed to run (error 1): 'fiptool create --fred'", + str(err.exception)) + + +if __name__ == '__main__': + unittest.main() diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py index 2a98d810288451699f88e9f50df585e746474c80..a9b7880f362f5702fa86d8d3e79b982be70bfe54 100644 --- a/tools/binman/ftest.py +++ b/tools/binman/ftest.py @@ -23,6 +23,7 @@ from binman import cmdline from binman import control from binman import elf from binman import elf_test +from binman import fip_util from binman import fmap_util from binman import state from dtoc import fdt @@ -76,6 +77,7 @@ FSP_M_DATA = b'fsp_m' FSP_S_DATA = b'fsp_s' FSP_T_DATA = b'fsp_t' ATF_BL31_DATA = b'bl31' +ATF_BL2U_DATA = b'bl2u' OPENSBI_DATA = b'opensbi' SCP_DATA = b'scp' TEST_FDT1_DATA = b'fdt1' @@ -179,6 +181,7 @@ class TestFunctional(unittest.TestCase): TestFunctional._MakeInputFile('compress', COMPRESS_DATA) TestFunctional._MakeInputFile('compress_big', COMPRESS_DATA_BIG) TestFunctional._MakeInputFile('bl31.bin', ATF_BL31_DATA) + TestFunctional._MakeInputFile('bl2u.bin', ATF_BL2U_DATA) TestFunctional._MakeInputFile('fw_dynamic.bin', OPENSBI_DATA) TestFunctional._MakeInputFile('scp.bin', SCP_DATA) @@ -2254,7 +2257,7 @@ class TestFunctional(unittest.TestCase): self._DoReadFile('107_cbfs_no_size.dts') self.assertIn('entry must have a size property', str(e.exception)) - def testCbfsNoCOntents(self): + def testCbfsNoContents(self): """Test handling of a CBFS entry which does not provide contentsy""" with self.assertRaises(ValueError) as e: self._DoReadFile('108_cbfs_no_contents.dts') @@ -4536,7 +4539,7 @@ class TestFunctional(unittest.TestCase): def testCollectionSection(self): """Test a collection where a section must be built first""" # Sections never have their contents when GetData() is called, but when - # _BuildSectionData() is called with required=True, a section will force + # BuildSectionData() is called with required=True, a section will force # building the contents, producing an error is anything is still # missing. data = self._DoReadFile('199_collection_section.dts') @@ -4674,6 +4677,293 @@ class TestFunctional(unittest.TestCase): "Image '.*' has faked external blobs and is non-functional: .*") os.remove('binman_faking_test_blob') + def testVersion(self): + """Test we can get the binman version""" + version = '(unreleased)' + self.assertEqual(version, state.GetVersion(self._indir)) + + with self.assertRaises(SystemExit): + with test_util.capture_sys_output() as (_, stderr): + self._DoBinman('-V') + self.assertEqual('Binman %s\n' % version, stderr.getvalue()) + + # Try running the tool too, just to be safe + result = self._RunBinman('-V') + self.assertEqual('Binman %s\n' % version, result.stderr) + + # Set up a version file to make sure that works + version = 'v2025.01-rc2' + tools.WriteFile(os.path.join(self._indir, 'version'), version, + binary=False) + self.assertEqual(version, state.GetVersion(self._indir)) + + def testAltFormat(self): + """Test that alternative formats can be used to extract""" + self._DoReadFileRealDtb('213_fdtmap_alt_format.dts') + + try: + tmpdir, updated_fname = self._SetupImageInTmpdir() + with test_util.capture_sys_output() as (stdout, _): + self._DoBinman('extract', '-i', updated_fname, '-F', 'list') + self.assertEqual( + '''Flag (-F) Entry type Description +fdt fdtmap Extract the devicetree blob from the fdtmap +''', + stdout.getvalue()) + + dtb = os.path.join(tmpdir, 'fdt.dtb') + self._DoBinman('extract', '-i', updated_fname, '-F', 'fdt', '-f', + dtb, 'fdtmap') + + # Check that we can read it and it can be scanning, meaning it does + # not have a 16-byte fdtmap header + data = tools.ReadFile(dtb) + dtb = fdt.Fdt.FromData(data) + dtb.Scan() + + # Now check u-boot which has no alt_format + fname = os.path.join(tmpdir, 'fdt.dtb') + self._DoBinman('extract', '-i', updated_fname, '-F', 'dummy', + '-f', fname, 'u-boot') + data = tools.ReadFile(fname) + self.assertEqual(U_BOOT_DATA, data) + + finally: + shutil.rmtree(tmpdir) + + def testExtblobList(self): + """Test an image with an external blob list""" + data = self._DoReadFile('215_blob_ext_list.dts') + self.assertEqual(REFCODE_DATA + FSP_M_DATA, data) + + def testExtblobListMissing(self): + """Test an image with a missing external blob""" + with self.assertRaises(ValueError) as e: + self._DoReadFile('216_blob_ext_list_missing.dts') + self.assertIn("Filename 'missing-file' not found in input path", + str(e.exception)) + + def testExtblobListMissingOk(self): + """Test an image with an missing external blob that is allowed""" + with test_util.capture_sys_output() as (stdout, stderr): + self._DoTestFile('216_blob_ext_list_missing.dts', + allow_missing=True) + err = stderr.getvalue() + self.assertRegex(err, "Image 'main-section'.*missing.*: blob-ext") + + def testFip(self): + """Basic test of generation of an ARM Firmware Image Package (FIP)""" + data = self._DoReadFile('203_fip.dts') + hdr, fents = fip_util.decode_fip(data) + self.assertEqual(fip_util.HEADER_MAGIC, hdr.name) + self.assertEqual(fip_util.HEADER_SERIAL, hdr.serial) + self.assertEqual(0x123, hdr.flags) + + self.assertEqual(2, len(fents)) + + fent = fents[0] + self.assertEqual( + bytes([0x47, 0xd4, 0x08, 0x6d, 0x4c, 0xfe, 0x98, 0x46, + 0x9b, 0x95, 0x29, 0x50, 0xcb, 0xbd, 0x5a, 0x0]), fent.uuid) + self.assertEqual('soc-fw', fent.fip_type) + self.assertEqual(0x88, fent.offset) + self.assertEqual(len(ATF_BL31_DATA), fent.size) + self.assertEqual(0x123456789abcdef, fent.flags) + self.assertEqual(ATF_BL31_DATA, fent.data) + self.assertEqual(True, fent.valid) + + fent = fents[1] + self.assertEqual( + bytes([0x65, 0x92, 0x27, 0x03, 0x2f, 0x74, 0xe6, 0x44, + 0x8d, 0xff, 0x57, 0x9a, 0xc1, 0xff, 0x06, 0x10]), fent.uuid) + self.assertEqual('scp-fwu-cfg', fent.fip_type) + self.assertEqual(0x8c, fent.offset) + self.assertEqual(len(ATF_BL31_DATA), fent.size) + self.assertEqual(0, fent.flags) + self.assertEqual(ATF_BL2U_DATA, fent.data) + self.assertEqual(True, fent.valid) + + def testFipOther(self): + """Basic FIP with something that isn't a external blob""" + data = self._DoReadFile('204_fip_other.dts') + hdr, fents = fip_util.decode_fip(data) + + self.assertEqual(2, len(fents)) + fent = fents[1] + self.assertEqual('rot-cert', fent.fip_type) + self.assertEqual(b'aa', fent.data) + + def testFipOther(self): + """Basic FIP with something that isn't a external blob""" + data = self._DoReadFile('204_fip_other.dts') + hdr, fents = fip_util.decode_fip(data) + + self.assertEqual(2, len(fents)) + fent = fents[1] + self.assertEqual('rot-cert', fent.fip_type) + self.assertEqual(b'aa', fent.data) + + def testFipNoType(self): + """FIP with an entry of an unknown type""" + with self.assertRaises(ValueError) as e: + self._DoReadFile('205_fip_no_type.dts') + self.assertIn("Must provide a fip-type (node name 'u-boot' is not a known FIP type)", + str(e.exception)) + + def testFipUuid(self): + """Basic FIP with a manual uuid""" + data = self._DoReadFile('206_fip_uuid.dts') + hdr, fents = fip_util.decode_fip(data) + + self.assertEqual(2, len(fents)) + fent = fents[1] + self.assertEqual(None, fent.fip_type) + self.assertEqual( + bytes([0xfc, 0x65, 0x13, 0x92, 0x4a, 0x5b, 0x11, 0xec, + 0x94, 0x35, 0xff, 0x2d, 0x1c, 0xfc, 0x79, 0x9c]), + fent.uuid) + self.assertEqual(U_BOOT_DATA, fent.data) + + def testFipLs(self): + """Test listing a FIP""" + data = self._DoReadFileRealDtb('207_fip_ls.dts') + hdr, fents = fip_util.decode_fip(data) + + try: + tmpdir, updated_fname = self._SetupImageInTmpdir() + with test_util.capture_sys_output() as (stdout, stderr): + self._DoBinman('ls', '-i', updated_fname) + finally: + shutil.rmtree(tmpdir) + lines = stdout.getvalue().splitlines() + expected = [ +'Name Image-pos Size Entry-type Offset Uncomp-size', +'----------------------------------------------------------------', +'main-section 0 2d3 section 0', +' atf-fip 0 90 atf-fip 0', +' soc-fw 88 4 blob-ext 88', +' u-boot 8c 4 u-boot 8c', +' fdtmap 90 243 fdtmap 90', +] + self.assertEqual(expected, lines) + + image = control.images['image'] + entries = image.GetEntries() + fdtmap = entries['fdtmap'] + + fdtmap_data = data[fdtmap.image_pos:fdtmap.image_pos + fdtmap.size] + magic = fdtmap_data[:8] + self.assertEqual(b'_FDTMAP_', magic) + self.assertEqual(tools.GetBytes(0, 8), fdtmap_data[8:16]) + + fdt_data = fdtmap_data[16:] + dtb = fdt.Fdt.FromData(fdt_data) + dtb.Scan() + props = self._GetPropTree(dtb, BASE_DTB_PROPS, prefix='/') + self.assertEqual({ + 'atf-fip/soc-fw:image-pos': 136, + 'atf-fip/soc-fw:offset': 136, + 'atf-fip/soc-fw:size': 4, + 'atf-fip/u-boot:image-pos': 140, + 'atf-fip/u-boot:offset': 140, + 'atf-fip/u-boot:size': 4, + 'atf-fip:image-pos': 0, + 'atf-fip:offset': 0, + 'atf-fip:size': 144, + 'image-pos': 0, + 'offset': 0, + 'fdtmap:image-pos': fdtmap.image_pos, + 'fdtmap:offset': fdtmap.offset, + 'fdtmap:size': len(fdtmap_data), + 'size': len(data), + }, props) + + def testFipExtractOneEntry(self): + """Test extracting a single entry fron an FIP""" + self._DoReadFileRealDtb('207_fip_ls.dts') + image_fname = tools.GetOutputFilename('image.bin') + fname = os.path.join(self._indir, 'output.extact') + control.ExtractEntries(image_fname, fname, None, ['atf-fip/u-boot']) + data = tools.ReadFile(fname) + self.assertEqual(U_BOOT_DATA, data) + + def testFipReplace(self): + """Test replacing a single file in a FIP""" + expected = U_BOOT_DATA + tools.GetBytes(0x78, 50) + data = self._DoReadFileRealDtb('208_fip_replace.dts') + updated_fname = tools.GetOutputFilename('image-updated.bin') + tools.WriteFile(updated_fname, data) + entry_name = 'atf-fip/u-boot' + control.WriteEntry(updated_fname, entry_name, expected, + allow_resize=True) + actual = control.ReadEntry(updated_fname, entry_name) + self.assertEqual(expected, actual) + + new_data = tools.ReadFile(updated_fname) + hdr, fents = fip_util.decode_fip(new_data) + + self.assertEqual(2, len(fents)) + + # Check that the FIP entry is updated + fent = fents[1] + self.assertEqual(0x8c, fent.offset) + self.assertEqual(len(expected), fent.size) + self.assertEqual(0, fent.flags) + self.assertEqual(expected, fent.data) + self.assertEqual(True, fent.valid) + + def testFipMissing(self): + with test_util.capture_sys_output() as (stdout, stderr): + self._DoTestFile('209_fip_missing.dts', allow_missing=True) + err = stderr.getvalue() + self.assertRegex(err, "Image 'main-section'.*missing.*: rmm-fw") + + def testFipSize(self): + """Test a FIP with a size property""" + data = self._DoReadFile('210_fip_size.dts') + self.assertEqual(0x100 + len(U_BOOT_DATA), len(data)) + hdr, fents = fip_util.decode_fip(data) + self.assertEqual(fip_util.HEADER_MAGIC, hdr.name) + self.assertEqual(fip_util.HEADER_SERIAL, hdr.serial) + + self.assertEqual(1, len(fents)) + + fent = fents[0] + self.assertEqual('soc-fw', fent.fip_type) + self.assertEqual(0x60, fent.offset) + self.assertEqual(len(ATF_BL31_DATA), fent.size) + self.assertEqual(ATF_BL31_DATA, fent.data) + self.assertEqual(True, fent.valid) + + rest = data[0x60 + len(ATF_BL31_DATA):0x100] + self.assertEqual(tools.GetBytes(0xff, len(rest)), rest) + + def testFipBadAlign(self): + """Test that an invalid alignment value in a FIP is detected""" + with self.assertRaises(ValueError) as e: + self._DoTestFile('211_fip_bad_align.dts') + self.assertIn( + "Node \'/binman/atf-fip\': FIP alignment 31 must be a power of two", + str(e.exception)) + + def testFipCollection(self): + """Test using a FIP in a collection""" + data = self._DoReadFile('212_fip_collection.dts') + entry1 = control.images['image'].GetEntries()['collection'] + data1 = data[:entry1.size] + hdr1, fents2 = fip_util.decode_fip(data1) + + entry2 = control.images['image'].GetEntries()['atf-fip'] + data2 = data[entry2.offset:entry2.offset + entry2.size] + hdr1, fents2 = fip_util.decode_fip(data2) + + # The 'collection' entry should have U-Boot included at the end + self.assertEqual(entry1.size - len(U_BOOT_DATA), entry2.size) + self.assertEqual(data1, data2 + U_BOOT_DATA) + self.assertEqual(U_BOOT_DATA, data1[-4:]) + + # There should be a U-Boot after the final FIP + self.assertEqual(U_BOOT_DATA, data[-4:]) if __name__ == "__main__": unittest.main() diff --git a/tools/binman/image.py b/tools/binman/image.py index cdc58b39a402f4d7cb5f130c432bed08570b1731..f0a7d65299e897b578d69ede6124734724ded326 100644 --- a/tools/binman/image.py +++ b/tools/binman/image.py @@ -63,9 +63,13 @@ class Image(section.Entry_section): to ignore 'u-boot-bin' in this case, and build it ourselves in binman with 'u-boot-dtb.bin' and 'u-boot.dtb'. See Entry_u_boot_expanded and Entry_blob_phase for details. + missing_etype: Use a default entry type ('blob') if the requested one + does not exist in binman. This is useful if an image was created by + binman a newer version of binman but we want to list it in an older + version which does not support all the entry types. """ def __init__(self, name, node, copy_to_orig=True, test=False, - ignore_missing=False, use_expanded=False): + ignore_missing=False, use_expanded=False, missing_etype=False): super().__init__(None, 'section', node, test=test) self.copy_to_orig = copy_to_orig self.name = 'main-section' @@ -75,6 +79,7 @@ class Image(section.Entry_section): self.fdtmap_data = None self.allow_repack = False self._ignore_missing = ignore_missing + self.missing_etype = missing_etype self.use_expanded = use_expanded self.test_section_timeout = False if not test: @@ -124,7 +129,8 @@ class Image(section.Entry_section): # Return an Image with the associated nodes root = dtb.GetRoot() - image = Image('image', root, copy_to_orig=False, ignore_missing=True) + image = Image('image', root, copy_to_orig=False, ignore_missing=True, + missing_etype=True) image.image_node = fdt_util.GetString(root, 'image-node', 'image') image.fdtmap_dtb = dtb @@ -217,7 +223,7 @@ class Image(section.Entry_section): entries = entry.GetEntries() return entry - def ReadData(self, decomp=True): + def ReadData(self, decomp=True, alt_format=None): tout.Debug("Image '%s' ReadData(), size=%#x" % (self.GetPath(), len(self._data))) return self._data diff --git a/tools/binman/main.py b/tools/binman/main.py index 8c1e478d54cea8342a829808c14d70f393c50dba..35944f314a21ef67c4615e027dc9233464799928 100755 --- a/tools/binman/main.py +++ b/tools/binman/main.py @@ -16,18 +16,31 @@ import sys import traceback import unittest +# Get the absolute path to this file at run-time +our_path = os.path.dirname(os.path.realpath(__file__)) +our1_path = os.path.dirname(our_path) +our2_path = os.path.dirname(our1_path) + +# Extract $(srctree) from Kbuild environment, or use relative paths below +srctree = os.environ.get('srctree', our2_path) + +# +# Do not pollute source tree with cache files: +# https://stackoverflow.com/a/60024195/2511795 +# https://bugs.python.org/issue33499 +# +sys.pycache_prefix = os.path.relpath(our_path, srctree) + # Bring in the patman and dtoc libraries (but don't override the first path # in PYTHONPATH) -our_path = os.path.dirname(os.path.realpath(__file__)) -sys.path.insert(2, os.path.join(our_path, '..')) +sys.path.insert(2, our1_path) from patman import test_util # Bring in the libfdt module sys.path.insert(2, 'scripts/dtc/pylibfdt') -sys.path.insert(2, os.path.join(our_path, '../../scripts/dtc/pylibfdt')) -sys.path.insert(2, os.path.join(our_path, - '../../build-sandbox_spl/scripts/dtc/pylibfdt')) +sys.path.insert(2, os.path.join(srctree, 'scripts/dtc/pylibfdt')) +sys.path.insert(2, os.path.join(srctree, 'build-sandbox_spl/scripts/dtc/pylibfdt')) # When running under python-coverage on Ubuntu 16.04, the dist-packages # directories are dropped from the python path. Add them in so that we can find @@ -59,6 +72,7 @@ def RunTests(debug, verbosity, processes, test_preserve_dirs, args, toolpath): from binman import elf_test from binman import entry_test from binman import fdt_test + from binman import fip_util_test from binman import ftest from binman import image_test import doctest @@ -72,7 +86,8 @@ def RunTests(debug, verbosity, processes, test_preserve_dirs, args, toolpath): result, debug, verbosity, test_preserve_dirs, processes, test_name, toolpath, [entry_test.TestEntry, ftest.TestFunctional, fdt_test.TestFdt, - elf_test.TestElf, image_test.TestImage, cbfs_util_test.TestCbfs]) + elf_test.TestElf, image_test.TestImage, cbfs_util_test.TestCbfs, + fip_util_test.TestFip]) return test_util.ReportResult('binman', test_name, result) diff --git a/tools/binman/missing-blob-help b/tools/binman/missing-blob-help index dc2d9c98111a972af0235e434217dd99ee128391..551ca87f6cb3f87fa3f18bc3160d6b8195c366e6 100644 --- a/tools/binman/missing-blob-help +++ b/tools/binman/missing-blob-help @@ -18,6 +18,17 @@ scp-sunxi: SCP firmware is required for system suspend, but is otherwise optional. Please read the section on SCP firmware in board/sunxi/README.sunxi64 +iot2050-seboot: +See the documentation for IOT2050 board. Your image is missing SEBoot +which is mandatory for board startup. Prebuilt SEBoot located at +meta-iot2050/tree/master/recipes-bsp/u-boot/files/prebuild/tiboot3.bin. + +iot2050-sysfw: +See the documentation for IOT2050 board. Your image is missing system +firmware which is mandatory for board startup. Prebuilt system firmware +located at meta-iot2050/tree/master/recipes-bsp/u-boot/files/prebuild/ +with sysfw prefix. + k3-rti-wdt-firmware: If CONFIG_WDT_K3_RTI_LOAD_FW is enabled, a firmware image is needed for the R5F core(s) to trigger the system reset. One possible source is diff --git a/tools/binman/state.py b/tools/binman/state.py index 9e5b8a393103b4a667e2c73ee294602846d89d98..af0a65e84189af872891d0b4acb935a65def04c7 100644 --- a/tools/binman/state.py +++ b/tools/binman/state.py @@ -16,6 +16,8 @@ import os from patman import tools from patman import tout +OUR_PATH = os.path.dirname(os.path.realpath(__file__)) + # Map an dtb etype to its expected filename DTB_TYPE_FNAME = { 'u-boot-spl-dtb': 'spl/u-boot-spl.dtb', @@ -515,3 +517,19 @@ def TimingShow(): for name, seconds in duration.items(): print('%10s: %10.1fms' % (name, seconds * 1000)) + +def GetVersion(path=OUR_PATH): + """Get the version string for binman + + Args: + path: Path to 'version' file + + Returns: + str: String version, e.g. 'v2021.10' + """ + version_fname = os.path.join(path, 'version') + if os.path.exists(version_fname): + version = tools.ReadFile(version_fname, binary=False) + else: + version = '(unreleased)' + return version diff --git a/tools/binman/test/203_fip.dts b/tools/binman/test/203_fip.dts new file mode 100644 index 0000000000000000000000000000000000000000..08973373240153756c881a1de3aadf940a0e0ce6 --- /dev/null +++ b/tools/binman/test/203_fip.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0+ +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + atf-fip { + fip-hdr-flags = /bits/ 64 <0x123>; + soc-fw { + fip-flags = /bits/ 64 <0x123456789abcdef>; + filename = "bl31.bin"; + }; + + scp-fwu-cfg { + filename = "bl2u.bin"; + }; + }; + }; +}; diff --git a/tools/binman/test/204_fip_other.dts b/tools/binman/test/204_fip_other.dts new file mode 100644 index 0000000000000000000000000000000000000000..650394109868097e81aee82c27b72c07b656cee8 --- /dev/null +++ b/tools/binman/test/204_fip_other.dts @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0+ +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + atf-fip { + fip-hdr-flags = /bits/ 64 <0x123>; + soc-fw { + fip-flags = /bits/ 64 <0x123456789abcdef>; + filename = "bl31.bin"; + }; + + _testing { + fip-type = "rot-cert"; + return-contents-later; + }; + }; + }; +}; diff --git a/tools/binman/test/205_fip_no_type.dts b/tools/binman/test/205_fip_no_type.dts new file mode 100644 index 0000000000000000000000000000000000000000..23c8c3bc37e05b68e63868f6415008154cd20d1a --- /dev/null +++ b/tools/binman/test/205_fip_no_type.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + atf-fip { + fip-hdr-flags = /bits/ 64 <0x123>; + u-boot { + }; + }; + }; +}; diff --git a/tools/binman/test/206_fip_uuid.dts b/tools/binman/test/206_fip_uuid.dts new file mode 100644 index 0000000000000000000000000000000000000000..c9bd44f9c31294ea75e9b7d5bc0c867f700aa658 --- /dev/null +++ b/tools/binman/test/206_fip_uuid.dts @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0+ +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + atf-fip { + fip-hdr-flags = /bits/ 64 <0x123>; + soc-fw { + fip-flags = /bits/ 64 <0x123456789abcdef>; + filename = "bl31.bin"; + }; + + u-boot { + fip-uuid = [fc 65 13 92 4a 5b 11 ec + 94 35 ff 2d 1c fc 79 9c]; + }; + }; + }; +}; diff --git a/tools/binman/test/207_fip_ls.dts b/tools/binman/test/207_fip_ls.dts new file mode 100644 index 0000000000000000000000000000000000000000..630fca15024d816d0836ae56bf1af5cad9219442 --- /dev/null +++ b/tools/binman/test/207_fip_ls.dts @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0+ +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + atf-fip { + fip-hdr-flags = /bits/ 64 <0x123>; + soc-fw { + fip-flags = /bits/ 64 <0x123456789abcdef>; + filename = "bl31.bin"; + }; + + u-boot { + fip-uuid = [fc 65 13 92 4a 5b 11 ec + 94 35 ff 2d 1c fc 79 9c]; + }; + }; + + fdtmap { + }; + }; +}; diff --git a/tools/binman/test/208_fip_replace.dts b/tools/binman/test/208_fip_replace.dts new file mode 100644 index 0000000000000000000000000000000000000000..432c12474df8dda73cb8079709c8559c2c946646 --- /dev/null +++ b/tools/binman/test/208_fip_replace.dts @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: GPL-2.0+ +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + allow-repack; + atf-fip { + fip-hdr-flags = /bits/ 64 <0x123>; + soc-fw { + fip-flags = /bits/ 64 <0x123456789abcdef>; + filename = "bl31.bin"; + }; + + u-boot { + fip-uuid = [fc 65 13 92 4a 5b 11 ec + 94 35 ff 2d 1c fc 79 9c]; + }; + + }; + + u-boot { + }; + + u-boot-dtb { + }; + + fdtmap { + }; + }; +}; diff --git a/tools/binman/test/209_fip_missing.dts b/tools/binman/test/209_fip_missing.dts new file mode 100644 index 0000000000000000000000000000000000000000..43bb600d047fc2509b4254bb88e7e3c334887c90 --- /dev/null +++ b/tools/binman/test/209_fip_missing.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0+ +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + atf-fip { + soc-fw { + filename = "bl31.bin"; + }; + + rmm-fw { + filename = "rmm.bin"; + }; + }; + }; +}; diff --git a/tools/binman/test/210_fip_size.dts b/tools/binman/test/210_fip_size.dts new file mode 100644 index 0000000000000000000000000000000000000000..9dfee7964598748b40ff520afbb8bf4960c76fbf --- /dev/null +++ b/tools/binman/test/210_fip_size.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0+ +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + atf-fip { + size = <0x100>; + pad-byte = <0xff>; + soc-fw { + filename = "bl31.bin"; + }; + }; + u-boot { + }; + }; +}; diff --git a/tools/binman/test/211_fip_bad_align.dts b/tools/binman/test/211_fip_bad_align.dts new file mode 100644 index 0000000000000000000000000000000000000000..a0901496d80f0e3e8560b2aa8e864304af2cf8cb --- /dev/null +++ b/tools/binman/test/211_fip_bad_align.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0+ +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + atf-fip { + fip-align = <31>; + size = <0x100>; + pad-byte = <0xff>; + soc-fw { + filename = "bl31.bin"; + }; + }; + }; +}; diff --git a/tools/binman/test/212_fip_collection.dts b/tools/binman/test/212_fip_collection.dts new file mode 100644 index 0000000000000000000000000000000000000000..332c023af87de2f3eaeced7661c170df7ae52dc5 --- /dev/null +++ b/tools/binman/test/212_fip_collection.dts @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0+ +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + collection { + content = <&fip &u_boot>; + }; + fip: atf-fip { + soc-fw { + filename = "bl31.bin"; + }; + + scp-fwu-cfg { + filename = "bl2u.bin"; + }; + }; + u_boot: u-boot { + }; + }; +}; diff --git a/tools/binman/test/213_fdtmap_alt_format.dts b/tools/binman/test/213_fdtmap_alt_format.dts new file mode 100644 index 0000000000000000000000000000000000000000..d9aef04bcf62c3d38651733ea6e7ceb4be33c0eb --- /dev/null +++ b/tools/binman/test/213_fdtmap_alt_format.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + u-boot { + }; + fdtmap { + }; + }; +}; diff --git a/tools/binman/test/214_no_alt_format.dts b/tools/binman/test/214_no_alt_format.dts new file mode 100644 index 0000000000000000000000000000000000000000..f00bcdd57645090f8a93f04a1341c03e896223ad --- /dev/null +++ b/tools/binman/test/214_no_alt_format.dts @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + u-boot { + }; + }; +}; diff --git a/tools/binman/test/215_blob_ext_list.dts b/tools/binman/test/215_blob_ext_list.dts new file mode 100644 index 0000000000000000000000000000000000000000..aad2f0300d3d6802dd69ba4a10594104c9f6faef --- /dev/null +++ b/tools/binman/test/215_blob_ext_list.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + blob-ext-list { + filenames = "refcode.bin", "fsp_m.bin"; + }; + }; +}; diff --git a/tools/binman/test/216_blob_ext_list_missing.dts b/tools/binman/test/216_blob_ext_list_missing.dts new file mode 100644 index 0000000000000000000000000000000000000000..c02c335c76067e51deb2e74198fe7b918e99382e --- /dev/null +++ b/tools/binman/test/216_blob_ext_list_missing.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + blob-ext-list { + filenames = "refcode.bin", "missing-file"; + }; + }; +}; diff --git a/tools/dtoc/fdt_util.py b/tools/dtoc/fdt_util.py index 37e96b98642d6900f5de75724031533d7dfa1d19..19eb13aef335bd03864e0d71d0e9205135a09eae 100644 --- a/tools/dtoc/fdt_util.py +++ b/tools/dtoc/fdt_util.py @@ -27,6 +27,18 @@ def fdt32_to_cpu(val): """ return struct.unpack('>I', val)[0] +def fdt64_to_cpu(val): + """Convert a device tree cell to an integer + + Args: + val (list): Value to convert (list of 2 4-character strings representing + the cell value) + + Return: + int: A native-endian integer value + """ + return fdt32_to_cpu(val[0]) << 32 | fdt32_to_cpu(val[1]) + def fdt_cells_to_cpu(val, cells): """Convert one or two cells to a long integer @@ -108,6 +120,29 @@ def GetInt(node, propname, default=None): value = fdt32_to_cpu(prop.value) return value +def GetInt64(node, propname, default=None): + """Get a 64-bit integer from a property + + Args: + node (Node): Node object to read from + propname (str): property name to read + default (int): Default value to use if the node/property do not exist + + Returns: + int: value read, or default if none + + Raises: + ValueError: Property is not of the correct size + """ + prop = node.props.get(propname) + if not prop: + return default + if not isinstance(prop.value, list) or len(prop.value) != 2: + raise ValueError("Node '%s' property '%s' should be a list with 2 items for 64-bit values" % + (node.name, propname)) + value = fdt64_to_cpu(prop.value) + return value + def GetString(node, propname, default=None): """Get a string from a property @@ -128,6 +163,27 @@ def GetString(node, propname, default=None): "a single string" % (node.name, propname)) return value +def GetStringList(node, propname, default=None): + """Get a string list from a property + + Args: + node (Node): Node object to read from + propname (str): property name to read + default (list of str): Default value to use if the node/property do not + exist, or None + + Returns: + String value read, or default if none + """ + prop = node.props.get(propname) + if not prop: + return default + value = prop.value + if not isinstance(value, list): + strval = GetString(node, propname) + return [strval] + return value + def GetBool(node, propname, default=False): """Get an boolean from a property @@ -167,6 +223,26 @@ def GetByte(node, propname, default=None): (node.name, propname, len(value), 1)) return ord(value[0]) +def GetBytes(node, propname, size, default=None): + """Get a set of bytes from a property + + Args: + node (Node): Node object to read from + propname (str): property name to read + size (int): Number of bytes to expect + default (bytes): Default value or None + + Returns: + bytes: Bytes value read, or default if none + """ + prop = node.props.get(propname) + if not prop: + return default + if len(prop.bytes) != size: + raise ValueError("Node '%s' property '%s' has length %d, expecting %d" % + (node.name, propname, len(prop.bytes), size)) + return prop.bytes + def GetPhandleList(node, propname): """Get a list of phandles from a property diff --git a/tools/dtoc/test/dtoc_test_simple.dts b/tools/dtoc/test/dtoc_test_simple.dts index 5a6fa88d5cc3e24ea3d6cf4e8b4595afda5d5948..4c2c70af222cb08f3a207f2d8534ba4f90440da9 100644 --- a/tools/dtoc/test/dtoc_test_simple.dts +++ b/tools/dtoc/test/dtoc_test_simple.dts @@ -16,6 +16,7 @@ boolval; maybe-empty-int = <>; intval = <1>; + int64val = /bits/ 64 <0x123456789abcdef0>; intarray = <2 3 4>; byteval = [05]; bytearray = [06]; diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py index 752061f27a4c0396d5316bb4883126b7c010998d..ee17b8daf9a1db4aff1ab9c2900965ced73a2338 100755 --- a/tools/dtoc/test_dtoc.py +++ b/tools/dtoc/test_dtoc.py @@ -296,6 +296,7 @@ struct dtd_sandbox_spl_test { \tbool\t\tboolval; \tunsigned char\tbytearray[3]; \tunsigned char\tbyteval; +\tfdt32_t\t\tint64val[2]; \tfdt32_t\t\tintarray[3]; \tfdt32_t\t\tintval; \tunsigned char\tlongbytearray[9]; @@ -355,6 +356,7 @@ static struct dtd_sandbox_spl_test dtv_spl_test = { \t.boolval\t\t= true, \t.bytearray\t\t= {0x6, 0x0, 0x0}, \t.byteval\t\t= 0x5, +\t.int64val\t\t= {0x12345678, 0x9abcdef0}, \t.intarray\t\t= {0x2, 0x3, 0x4}, \t.intval\t\t\t= 0x1, \t.longbytearray\t\t= {0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf, 0x10, diff --git a/tools/dtoc/test_fdt.py b/tools/dtoc/test_fdt.py index d104f3c77450154442dee201784e93242f0632c2..55b70e9876409117d9569abcb2151459d4b1b6d8 100755 --- a/tools/dtoc/test_fdt.py +++ b/tools/dtoc/test_fdt.py @@ -16,9 +16,15 @@ import unittest our_path = os.path.dirname(os.path.realpath(__file__)) sys.path.insert(1, os.path.join(our_path, '..')) +# Bring in the libfdt module +sys.path.insert(2, 'scripts/dtc/pylibfdt') +sys.path.insert(2, os.path.join(our_path, '../../scripts/dtc/pylibfdt')) +sys.path.insert(2, os.path.join(our_path, + '../../build-sandbox_spl/scripts/dtc/pylibfdt')) + from dtoc import fdt from dtoc import fdt_util -from dtoc.fdt_util import fdt32_to_cpu +from dtoc.fdt_util import fdt32_to_cpu, fdt64_to_cpu from fdt import Type, BytesToValue import libfdt from patman import command @@ -122,7 +128,7 @@ class TestFdt(unittest.TestCase): node = self.dtb.GetNode('/spl-test') props = self.dtb.GetProps(node) self.assertEqual(['boolval', 'bytearray', 'byteval', 'compatible', - 'intarray', 'intval', 'longbytearray', + 'int64val', 'intarray', 'intval', 'longbytearray', 'maybe-empty-int', 'notstring', 'stringarray', 'stringval', 'u-boot,dm-pre-reloc'], sorted(props.keys())) @@ -329,6 +335,10 @@ class TestProp(unittest.TestCase): self.assertEqual(Type.INT, prop.type) self.assertEqual(1, fdt32_to_cpu(prop.value)) + prop = self._ConvertProp('int64val') + self.assertEqual(Type.INT, prop.type) + self.assertEqual(0x123456789abcdef0, fdt64_to_cpu(prop.value)) + prop = self._ConvertProp('intarray') self.assertEqual(Type.INT, prop.type) val = [fdt32_to_cpu(val) for val in prop.value] @@ -580,10 +590,21 @@ class TestFdtUtil(unittest.TestCase): self.assertEqual(3, fdt_util.GetInt(self.node, 'missing', 3)) with self.assertRaises(ValueError) as e: - self.assertEqual(3, fdt_util.GetInt(self.node, 'intarray')) + fdt_util.GetInt(self.node, 'intarray') self.assertIn("property 'intarray' has list value: expecting a single " 'integer', str(e.exception)) + def testGetInt64(self): + self.assertEqual(0x123456789abcdef0, + fdt_util.GetInt64(self.node, 'int64val')) + self.assertEqual(3, fdt_util.GetInt64(self.node, 'missing', 3)) + + with self.assertRaises(ValueError) as e: + fdt_util.GetInt64(self.node, 'intarray') + self.assertIn( + "property 'intarray' should be a list with 2 items for 64-bit values", + str(e.exception)) + def testGetString(self): self.assertEqual('message', fdt_util.GetString(self.node, 'stringval')) self.assertEqual('test', fdt_util.GetString(self.node, 'missing', @@ -594,6 +615,15 @@ class TestFdtUtil(unittest.TestCase): self.assertIn("property 'stringarray' has list value: expecting a " 'single string', str(e.exception)) + def testGetStringList(self): + self.assertEqual(['message'], + fdt_util.GetStringList(self.node, 'stringval')) + self.assertEqual( + ['multi-word', 'message'], + fdt_util.GetStringList(self.node, 'stringarray')) + self.assertEqual(['test'], + fdt_util.GetStringList(self.node, 'missing', ['test'])) + def testGetBool(self): self.assertEqual(True, fdt_util.GetBool(self.node, 'boolval')) self.assertEqual(False, fdt_util.GetBool(self.node, 'missing')) @@ -614,6 +644,23 @@ class TestFdtUtil(unittest.TestCase): self.assertIn("property 'intval' has length 4, expecting 1", str(e.exception)) + def testGetBytes(self): + self.assertEqual(bytes([5]), fdt_util.GetBytes(self.node, 'byteval', 1)) + self.assertEqual(None, fdt_util.GetBytes(self.node, 'missing', 3)) + self.assertEqual( + bytes([3]), fdt_util.GetBytes(self.node, 'missing', 3, bytes([3]))) + + with self.assertRaises(ValueError) as e: + fdt_util.GetBytes(self.node, 'longbytearray', 7) + self.assertIn( + "Node 'spl-test' property 'longbytearray' has length 9, expecting 7", + str(e.exception)) + + self.assertEqual( + bytes([0, 0, 0, 1]), fdt_util.GetBytes(self.node, 'intval', 4)) + self.assertEqual( + bytes([3]), fdt_util.GetBytes(self.node, 'missing', 3, bytes([3]))) + def testGetPhandleList(self): dtb = fdt.FdtScan(find_dtb_file('dtoc_test_phandle.dts')) node = dtb.GetNode('/phandle-source2') diff --git a/tools/fdtgrep.c b/tools/fdtgrep.c index db512465db1c255bb2dd60b9b23e0a596f53f378..641d6a2e3e026b13f85c38a0237025874aa22299 100644 --- a/tools/fdtgrep.c +++ b/tools/fdtgrep.c @@ -438,8 +438,7 @@ static int dump_fdt_regions(struct display_info *disp, const void *blob, fdt = (struct fdt_header *)out; memset(fdt, '\0', sizeof(*fdt)); fdt_set_magic(fdt, FDT_MAGIC); - struct_start = FDT_ALIGN(sizeof(struct fdt_header), - sizeof(struct fdt_reserve_entry)); + struct_start = sizeof(struct fdt_header); fdt_set_off_mem_rsvmap(fdt, struct_start); fdt_set_version(fdt, FDT_LAST_SUPPORTED_VERSION); fdt_set_last_comp_version(fdt, FDT_FIRST_SUPPORTED_VERSION); diff --git a/tools/logos/denx-16bpp.bmp.gz b/tools/logos/denx-16bpp.bmp.gz new file mode 100644 index 0000000000000000000000000000000000000000..ed99c58192e9e1ecbd3b118823f197a484cdad34 Binary files /dev/null and b/tools/logos/denx-16bpp.bmp.gz differ diff --git a/tools/logos/denx-24bpp.bmp.gz b/tools/logos/denx-24bpp.bmp.gz new file mode 100644 index 0000000000000000000000000000000000000000..95b44d31950994a4dc6a5148a4a754d9979e2dc6 Binary files /dev/null and b/tools/logos/denx-24bpp.bmp.gz differ diff --git a/tools/netconsole b/tools/netconsole index 1a0ef22244e3d5dbe0cfd4983ca1666198cd8a81..155453320f73c4b5ef741d524e98106f13e36417 100755 --- a/tools/netconsole +++ b/tools/netconsole @@ -34,7 +34,7 @@ if [ -z "${ip}" ] || [ -n "$4" ] ; then usage "Invalid number of arguments" fi -for nc in netcat nc ; do +for nc in socat netcat nc ; do type ${nc} >/dev/null 2>&1 && break done @@ -47,6 +47,10 @@ if type ncb 2>/dev/null ; then # see if ncb is in $PATH exec ncb ${board_out_port} +elif [ "${nc}" = "socat" ] ; then + # socat does support broadcast + while ${nc} STDIO "UDP4-LISTEN:${board_out_port}"; do :; done + elif [ -x ${0%/*}/ncb ] ; then # maybe it's in the same dir as the netconsole script exec ${0%/*}/ncb ${board_out_port} @@ -59,5 +63,9 @@ else fi ) & pid=$! -${nc} -u ${ip} ${board_in_port} +if [ "${nc}" = "socat" ] ; then + ${nc} - "UDP4:${ip}:${board_in_port}" +else + ${nc} -u ${ip} ${board_in_port} +fi kill ${pid} 2>/dev/null