ram: stm32mp1_ddr: fix self refresh disable during DQS training

DDRCTRL_PWRCTL.SELFREF_EN needs to be reset before DQS training step, not
to enter in self refresh mode during the execution of this phase.
Depending on settings, it can be set after the DQS training.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>