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Commit defd1e71 authored by Eugeniy Paltsev's avatar Eugeniy Paltsev Committed by Alexey Brodkin
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CLK: HSDK: fix HDMI clock calculation 



HDMI PLL has its own xtal with 27 MHz output but we treat it the same
way as other PLLs with 33.33 MHz input.
Fix that.

Signed-off-by: default avatarEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
parent b8f3ce01
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