From cf493582f83cd4d2808a0ff2c2d463c39a6155ff Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 11 May 2022 16:21:06 -0400 Subject: [PATCH 001/581] Convert CONFIG_SYS_MAXARGS to Kconfig This converts the following to Kconfig: CONFIG_SYS_MAXARGS Signed-off-by: Tom Rini --- README | 2 -- cmd/Kconfig | 4 ++++ configs/am335x_baltos_defconfig | 1 + configs/am335x_boneblack_vboot_defconfig | 1 + configs/am335x_evm_defconfig | 1 + configs/am335x_evm_spiboot_defconfig | 1 + configs/am335x_guardian_defconfig | 1 + configs/am335x_hs_evm_defconfig | 1 + configs/am335x_hs_evm_uart_defconfig | 1 + configs/am335x_igep003x_defconfig | 1 + configs/am335x_pdu001_defconfig | 1 + configs/am335x_shc_defconfig | 1 + configs/am335x_shc_ict_defconfig | 1 + configs/am335x_shc_netboot_defconfig | 1 + configs/am335x_shc_sdboot_defconfig | 1 + configs/am335x_sl50_defconfig | 1 + configs/am3517_evm_defconfig | 1 + configs/am43xx_evm_defconfig | 1 + configs/am43xx_evm_qspiboot_defconfig | 1 + configs/am43xx_evm_rtconly_defconfig | 1 + configs/am43xx_evm_usbhost_boot_defconfig | 1 + configs/am43xx_hs_evm_defconfig | 1 + configs/am57xx_evm_defconfig | 1 + configs/am57xx_hs_evm_defconfig | 1 + configs/am57xx_hs_evm_usb_defconfig | 1 + configs/am64x_evm_a53_defconfig | 1 + configs/am64x_evm_r5_defconfig | 1 + configs/am65x_evm_a53_defconfig | 1 + configs/am65x_evm_r5_defconfig | 1 + configs/am65x_evm_r5_usbdfu_defconfig | 1 + configs/am65x_evm_r5_usbmsc_defconfig | 1 + configs/am65x_hs_evm_a53_defconfig | 1 + configs/am65x_hs_evm_r5_defconfig | 1 + configs/apalis-imx8_defconfig | 1 + configs/apalis-tk1_defconfig | 1 + configs/apalis_imx6_defconfig | 1 + configs/apalis_t30_defconfig | 1 + configs/aristainetos2c_defconfig | 1 + configs/aristainetos2ccslb_defconfig | 1 + .../avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig | 1 + configs/bananapi-m5_defconfig | 1 + configs/bcm7260_defconfig | 1 + configs/bcm7445_defconfig | 1 + configs/bcm963158_ram_defconfig | 1 + configs/bcm96753ref_ram_defconfig | 1 + configs/bcm968360bg_ram_defconfig | 1 + configs/bcm968380gerg_ram_defconfig | 1 + configs/bcm968580xref_ram_defconfig | 1 + configs/bcm_ns3_defconfig | 1 + configs/beaver_defconfig | 1 + configs/beelink-gsking-x_defconfig | 1 + configs/beelink-gtking_defconfig | 1 + configs/beelink-gtkingpro_defconfig | 1 + configs/bitmain_antminer_s9_defconfig | 1 + configs/brppt1_mmc_defconfig | 1 + configs/brppt1_nand_defconfig | 1 + configs/brppt1_spi_defconfig | 1 + configs/brppt2_defconfig | 1 + configs/brsmarc1_defconfig | 1 + configs/brxre1_defconfig | 1 + configs/bubblegum_96_defconfig | 1 + configs/cardhu_defconfig | 1 + configs/cei-tk1-som_defconfig | 1 + configs/chiliboard_defconfig | 1 + configs/ci20_mmc_defconfig | 1 + configs/cl-som-imx7_defconfig | 1 + configs/clearfog_defconfig | 1 + configs/clearfog_gt_8k_defconfig | 1 + configs/cm_fx6_defconfig | 1 + configs/cm_t335_defconfig | 1 + configs/cm_t43_defconfig | 1 + configs/colibri-imx6ull-emmc_defconfig | 1 + configs/colibri-imx6ull_defconfig | 1 + configs/colibri-imx8x_defconfig | 1 + configs/colibri_imx6_defconfig | 1 + configs/colibri_imx7_defconfig | 1 + configs/colibri_imx7_emmc_defconfig | 1 + configs/colibri_t20_defconfig | 1 + configs/colibri_t30_defconfig | 1 + configs/comtrend_ar5315u_ram_defconfig | 1 + configs/comtrend_ar5387un_ram_defconfig | 1 + configs/comtrend_ct5361_ram_defconfig | 1 + configs/comtrend_vr3032u_ram_defconfig | 1 + configs/comtrend_wap5813n_ram_defconfig | 1 + configs/controlcenterdc_defconfig | 1 + configs/cortina_presidio-asic-base_defconfig | 1 + configs/cortina_presidio-asic-emmc_defconfig | 1 + configs/cortina_presidio-asic-pnand_defconfig | 1 + configs/crs305-1g-4s-bit_defconfig | 1 + configs/crs305-1g-4s_defconfig | 1 + configs/crs326-24g-2s-bit_defconfig | 1 + configs/crs326-24g-2s_defconfig | 1 + configs/crs328-4c-20s-4s-bit_defconfig | 1 + configs/crs328-4c-20s-4s_defconfig | 1 + configs/cubieboard7_defconfig | 1 + configs/d2net_v2_defconfig | 1 + configs/dalmore_defconfig | 1 + configs/db-88f6720_defconfig | 1 + configs/db-88f6820-amc_defconfig | 1 + configs/db-88f6820-gp_defconfig | 1 + configs/db-mv784mp-gp_defconfig | 1 + configs/db-xc3-24g4xg_defconfig | 1 + configs/deneb_defconfig | 1 + configs/devkit8000_defconfig | 1 + configs/dh_imx6_defconfig | 1 + configs/display5_defconfig | 1 + configs/display5_factory_defconfig | 1 + configs/dns325_defconfig | 1 + configs/dockstar_defconfig | 1 + configs/dra7xx_evm_defconfig | 1 + configs/dra7xx_hs_evm_defconfig | 1 + configs/dra7xx_hs_evm_usb_defconfig | 1 + configs/draco_defconfig | 1 + configs/dragonboard410c_defconfig | 1 + configs/dragonboard820c_defconfig | 1 + configs/dreamplug_defconfig | 1 + configs/ds109_defconfig | 1 + configs/ds414_defconfig | 1 + configs/edison_defconfig | 1 + configs/etamin_defconfig | 1 + configs/ev-imx280-nano-x-mb_defconfig | 1 + configs/gardena-smart-gateway-mt7688_defconfig | 1 + configs/ge_b1x5v2_defconfig | 1 + configs/ge_bx50v3_defconfig | 1 + configs/giedi_defconfig | 1 + configs/goflexhome_defconfig | 1 + configs/guruplug_defconfig | 1 + configs/gwventana_emmc_defconfig | 1 + configs/gwventana_gw5904_defconfig | 1 + configs/gwventana_nand_defconfig | 1 + configs/harmony_defconfig | 1 + configs/helios4_defconfig | 1 + configs/hihope_rzg2_defconfig | 1 + configs/hikey_defconfig | 1 + configs/huawei_hg556a_ram_defconfig | 1 + configs/ib62x0_defconfig | 1 + configs/iconnect_defconfig | 1 + configs/igep00x0_defconfig | 1 + configs/imx28_xea_defconfig | 1 + configs/imx28_xea_sb_defconfig | 1 + configs/imx6dl_icore_nand_defconfig | 1 + configs/imx6dl_mamoj_defconfig | 1 + configs/imx6q_icore_nand_defconfig | 1 + configs/imx6q_logic_defconfig | 1 + configs/imx6qdl_icore_mipi_defconfig | 1 + configs/imx6qdl_icore_mmc_defconfig | 1 + configs/imx6qdl_icore_nand_defconfig | 1 + configs/imx6qdl_icore_rqs_defconfig | 1 + configs/imx6ul_geam_mmc_defconfig | 1 + configs/imx6ul_geam_nand_defconfig | 1 + configs/imx6ul_isiot_emmc_defconfig | 1 + configs/imx6ul_isiot_nand_defconfig | 1 + configs/imx7_cm_defconfig | 1 + configs/imx8mm-cl-iot-gate-optee_defconfig | 1 + configs/imx8mm-cl-iot-gate_defconfig | 1 + configs/imx8mm-icore-mx8mm-ctouch2_defconfig | 1 + configs/imx8mm-icore-mx8mm-edimm2.2_defconfig | 1 + configs/imx8mm-mx8menlo_defconfig | 1 + configs/imx8mm_beacon_defconfig | 1 + configs/imx8mm_data_modul_edm_sbc_defconfig | 1 + configs/imx8mm_evk_defconfig | 1 + configs/imx8mm_venice_defconfig | 1 + configs/imx8mn_beacon_2g_defconfig | 1 + configs/imx8mn_beacon_defconfig | 1 + configs/imx8mn_bsh_smm_s2_defconfig | 1 + configs/imx8mn_bsh_smm_s2pro_defconfig | 1 + configs/imx8mn_ddr4_evk_defconfig | 1 + configs/imx8mn_evk_defconfig | 1 + configs/imx8mn_var_som_defconfig | 1 + configs/imx8mn_venice_defconfig | 1 + configs/imx8mp_dhcom_pdk2_defconfig | 1 + configs/imx8mp_evk_defconfig | 1 + configs/imx8mp_rsb3720a1_4G_defconfig | 1 + configs/imx8mp_rsb3720a1_6G_defconfig | 1 + configs/imx8mp_venice_defconfig | 1 + configs/imx8mq_cm_defconfig | 1 + configs/imx8mq_evk_defconfig | 1 + configs/imx8mq_phanbell_defconfig | 1 + configs/imx8qxp_mek_defconfig | 1 + configs/imx8ulp_evk_defconfig | 1 + configs/inetspace_v2_defconfig | 1 + configs/iot2050_defconfig | 1 + configs/j7200_evm_a72_defconfig | 1 + configs/j7200_evm_r5_defconfig | 1 + configs/j721e_evm_a72_defconfig | 1 + configs/j721e_evm_r5_defconfig | 1 + configs/j721e_hs_evm_a72_defconfig | 1 + configs/j721e_hs_evm_r5_defconfig | 1 + configs/j721s2_evm_a72_defconfig | 1 + configs/j721s2_evm_r5_defconfig | 1 + configs/jethub_j100_defconfig | 1 + configs/jethub_j80_defconfig | 1 + configs/jetson-tk1_defconfig | 1 + configs/k2e_evm_defconfig | 1 + configs/k2e_hs_evm_defconfig | 1 + configs/k2g_evm_defconfig | 1 + configs/k2g_hs_evm_defconfig | 1 + configs/k2hk_evm_defconfig | 1 + configs/k2hk_hs_evm_defconfig | 1 + configs/k2l_evm_defconfig | 1 + configs/k2l_hs_evm_defconfig | 1 + configs/khadas-vim2_defconfig | 1 + configs/khadas-vim3_android_ab_defconfig | 1 + configs/khadas-vim3_android_defconfig | 1 + configs/khadas-vim3_defconfig | 1 + configs/khadas-vim3l_android_ab_defconfig | 1 + configs/khadas-vim3l_android_defconfig | 1 + configs/khadas-vim3l_defconfig | 1 + configs/khadas-vim_defconfig | 1 + configs/km_kirkwood_128m16_defconfig | 1 + configs/km_kirkwood_defconfig | 1 + configs/km_kirkwood_pci_defconfig | 1 + configs/kmcent2_defconfig | 1 + configs/kmcoge5ne_defconfig | 1 + configs/kmcoge5un_defconfig | 1 + configs/kmeter1_defconfig | 1 + configs/kmnusa_defconfig | 1 + configs/kmopti2_defconfig | 1 + configs/kmsupx5_defconfig | 1 + configs/kmsuse2_defconfig | 1 + configs/kmtegr1_defconfig | 1 + configs/kmtepr2_defconfig | 1 + configs/kontron-sl-mx6ul_defconfig | 1 + configs/kp_imx6q_tpc_defconfig | 1 + configs/libretech-ac_defconfig | 1 + configs/libretech-cc_defconfig | 1 + configs/libretech-cc_v2_defconfig | 1 + configs/libretech-s905d-pc_defconfig | 1 + configs/libretech-s912-pc_defconfig | 1 + configs/linkit-smart-7688_defconfig | 1 + configs/liteboard_defconfig | 1 + configs/ls1012a2g5rdb_qspi_defconfig | 1 + configs/ls1012a2g5rdb_tfa_defconfig | 1 + configs/ls1012afrdm_qspi_defconfig | 1 + configs/ls1012afrdm_tfa_defconfig | 1 + configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_qspi_defconfig | 1 + configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_tfa_defconfig | 1 + configs/ls1012aqds_qspi_defconfig | 1 + configs/ls1012aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012aqds_tfa_defconfig | 1 + configs/ls1012ardb_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1012ardb_qspi_defconfig | 1 + configs/ls1012ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012ardb_tfa_defconfig | 1 + configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1028aqds_tfa_defconfig | 1 + configs/ls1028aqds_tfa_lpuart_defconfig | 1 + configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1028ardb_tfa_defconfig | 1 + configs/ls1043aqds_defconfig | 1 + configs/ls1043aqds_lpuart_defconfig | 1 + configs/ls1043aqds_nand_defconfig | 1 + configs/ls1043aqds_nor_ddr3_defconfig | 1 + configs/ls1043aqds_qspi_defconfig | 1 + configs/ls1043aqds_sdcard_ifc_defconfig | 1 + configs/ls1043aqds_sdcard_qspi_defconfig | 1 + configs/ls1043aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1043aqds_tfa_defconfig | 1 + configs/ls1043ardb_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_defconfig | 1 + configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_nand_defconfig | 1 + configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_sdcard_defconfig | 1 + configs/ls1043ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_tfa_defconfig | 1 + configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1046afrwy_tfa_defconfig | 1 + configs/ls1046aqds_SECURE_BOOT_defconfig | 1 + configs/ls1046aqds_defconfig | 1 + configs/ls1046aqds_lpuart_defconfig | 1 + configs/ls1046aqds_nand_defconfig | 1 + configs/ls1046aqds_qspi_defconfig | 1 + configs/ls1046aqds_sdcard_ifc_defconfig | 1 + configs/ls1046aqds_sdcard_qspi_defconfig | 1 + configs/ls1046aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1046aqds_tfa_defconfig | 1 + configs/ls1046ardb_emmc_defconfig | 1 + configs/ls1046ardb_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1046ardb_qspi_defconfig | 1 + configs/ls1046ardb_qspi_spl_defconfig | 1 + configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig | 1 + configs/ls1046ardb_sdcard_defconfig | 1 + configs/ls1046ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1046ardb_tfa_defconfig | 1 + configs/ls1088aqds_defconfig | 1 + configs/ls1088aqds_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1088aqds_qspi_defconfig | 1 + configs/ls1088aqds_sdcard_ifc_defconfig | 1 + configs/ls1088aqds_sdcard_qspi_defconfig | 1 + configs/ls1088aqds_tfa_defconfig | 1 + configs/ls1088ardb_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1088ardb_qspi_defconfig | 1 + configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1088ardb_sdcard_qspi_defconfig | 1 + configs/ls1088ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1088ardb_tfa_defconfig | 1 + configs/ls2080aqds_SECURE_BOOT_defconfig | 1 + configs/ls2080aqds_defconfig | 1 + configs/ls2080aqds_nand_defconfig | 1 + configs/ls2080aqds_qspi_defconfig | 1 + configs/ls2080aqds_sdcard_defconfig | 1 + configs/ls2080ardb_SECURE_BOOT_defconfig | 1 + configs/ls2080ardb_defconfig | 1 + configs/ls2080ardb_nand_defconfig | 1 + configs/ls2081ardb_defconfig | 1 + configs/ls2088aqds_tfa_defconfig | 1 + configs/ls2088ardb_qspi_SECURE_BOOT_defconfig | 1 + configs/ls2088ardb_qspi_defconfig | 1 + configs/ls2088ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls2088ardb_tfa_defconfig | 1 + configs/lschlv2_defconfig | 1 + configs/lsxhl_defconfig | 1 + configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160aqds_tfa_defconfig | 1 + configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160ardb_tfa_defconfig | 1 + configs/lx2160ardb_tfa_stmm_defconfig | 1 + configs/lx2162aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2162aqds_tfa_defconfig | 1 + configs/lx2162aqds_tfa_verified_boot_defconfig | 1 + configs/m53menlo_defconfig | 1 + configs/marsboard_defconfig | 1 + configs/maxbcm_defconfig | 1 + configs/mccmon6_nor_defconfig | 1 + configs/mccmon6_sd_defconfig | 1 + configs/medcom-wide_defconfig | 1 + configs/meerkat96_defconfig | 1 + configs/microblaze-generic_defconfig | 1 + configs/mt7622_rfb_defconfig | 1 + configs/mt7623a_unielec_u7623_02_defconfig | 1 + configs/mt7623n_bpir2_defconfig | 1 + configs/mt7629_rfb_defconfig | 1 + configs/mvebu_crb_cn9130_defconfig | 1 + configs/mvebu_db-88f3720_defconfig | 1 + configs/mvebu_db_armada8k_defconfig | 1 + configs/mvebu_db_cn9130_defconfig | 1 + configs/mvebu_espressobin-88f3720_defconfig | 1 + configs/mvebu_mcbin-88f8040_defconfig | 1 + configs/mvebu_puzzle-m801-88f8040_defconfig | 1 + configs/mx23_olinuxino_defconfig | 1 + configs/mx23evk_defconfig | 1 + configs/mx28evk_auart_console_defconfig | 1 + configs/mx28evk_defconfig | 1 + configs/mx28evk_nand_defconfig | 1 + configs/mx28evk_spi_defconfig | 1 + configs/mx53ppd_defconfig | 1 + configs/mx6cuboxi_defconfig | 1 + configs/mx6memcal_defconfig | 1 + configs/mx6qsabrelite_defconfig | 1 + configs/mx6sabreauto_defconfig | 1 + configs/mx6sabresd_defconfig | 1 + configs/mx6slevk_defconfig | 1 + configs/mx6slevk_spinor_defconfig | 1 + configs/mx6slevk_spl_defconfig | 1 + configs/mx6sllevk_defconfig | 1 + configs/mx6sllevk_plugin_defconfig | 1 + configs/mx6sxsabreauto_defconfig | 1 + configs/mx6sxsabresd_defconfig | 1 + configs/mx6ul_14x14_evk_defconfig | 1 + configs/mx6ul_9x9_evk_defconfig | 1 + configs/mx6ull_14x14_evk_defconfig | 1 + configs/mx6ull_14x14_evk_plugin_defconfig | 1 + configs/mx6ulz_14x14_evk_defconfig | 1 + configs/mx7dsabresd_defconfig | 1 + configs/mx7dsabresd_qspi_defconfig | 1 + configs/mx7ulp_evk_defconfig | 1 + configs/mx7ulp_evk_plugin_defconfig | 1 + configs/myir_mys_6ulx_defconfig | 1 + configs/nanopi-k2_defconfig | 1 + configs/nas220_defconfig | 1 + configs/net2big_v2_defconfig | 1 + configs/netgear_cg3100d_ram_defconfig | 1 + configs/netgear_dgnd3700v2_ram_defconfig | 1 + configs/netspace_lite_v2_defconfig | 1 + configs/netspace_max_v2_defconfig | 1 + configs/netspace_mini_v2_defconfig | 1 + configs/netspace_v2_defconfig | 1 + configs/nitrogen6dl2g_defconfig | 1 + configs/nitrogen6dl_defconfig | 1 + configs/nitrogen6q2g_defconfig | 1 + configs/nitrogen6q_defconfig | 1 + configs/nitrogen6s1g_defconfig | 1 + configs/nitrogen6s_defconfig | 1 + configs/novena_defconfig | 1 + configs/nsa310s_defconfig | 1 + configs/nyan-big_defconfig | 1 + configs/o4-imx6ull-nano_defconfig | 1 + configs/octeontx2_95xx_defconfig | 1 + configs/octeontx2_96xx_defconfig | 1 + configs/octeontx_81xx_defconfig | 1 + configs/octeontx_83xx_defconfig | 1 + configs/odroid-c2_defconfig | 1 + configs/odroid-c4_defconfig | 1 + configs/odroid-hc4_defconfig | 1 + configs/odroid-n2_defconfig | 1 + configs/omap35_logic_defconfig | 1 + configs/omap35_logic_somlv_defconfig | 1 + configs/omap3_beagle_defconfig | 1 + configs/omap3_evm_defconfig | 1 + configs/omap3_logic_defconfig | 1 + configs/omap3_logic_somlv_defconfig | 1 + configs/omap4_panda_defconfig | 1 + configs/omap4_sdp4430_defconfig | 1 + configs/omap5_uevm_defconfig | 1 + configs/openrd_base_defconfig | 1 + configs/openrd_client_defconfig | 1 + configs/openrd_ultimate_defconfig | 1 + configs/opos6uldev_defconfig | 1 + configs/p200_defconfig | 1 + configs/p201_defconfig | 1 + configs/p212_defconfig | 1 + configs/p2371-0000_defconfig | 1 + configs/p2371-2180_defconfig | 1 + configs/p2571_defconfig | 1 + configs/p2771-0000-000_defconfig | 1 + configs/p2771-0000-500_defconfig | 1 + configs/p3450-0000_defconfig | 1 + configs/paz00_defconfig | 1 + configs/pcm058_defconfig | 1 + configs/pg_wcom_expu1_defconfig | 1 + configs/pg_wcom_expu1_update_defconfig | 1 + configs/pg_wcom_seli8_defconfig | 1 + configs/pg_wcom_seli8_update_defconfig | 1 + configs/phycore-am335x-r2-regor_defconfig | 1 + configs/phycore-am335x-r2-wega_defconfig | 1 + configs/phycore-imx8mm_defconfig | 1 + configs/phycore-imx8mp_defconfig | 1 + configs/phycore_pcl063_defconfig | 1 + configs/phycore_pcl063_ull_defconfig | 1 + configs/pico-dwarf-imx6ul_defconfig | 1 + configs/pico-dwarf-imx7d_defconfig | 1 + configs/pico-hobbit-imx6ul_defconfig | 1 + configs/pico-hobbit-imx7d_defconfig | 1 + configs/pico-imx6_defconfig | 1 + configs/pico-imx6ul_defconfig | 1 + configs/pico-imx7d_bl33_defconfig | 1 + configs/pico-imx7d_defconfig | 1 + configs/pico-imx8mq_defconfig | 1 + configs/pico-nymph-imx7d_defconfig | 1 + configs/pico-pi-imx6ul_defconfig | 1 + configs/pico-pi-imx7d_defconfig | 1 + configs/plutux_defconfig | 1 + configs/pogo_e02_defconfig | 1 + configs/pogo_v4_defconfig | 1 + configs/poleg_evb_defconfig | 1 + configs/poplar_defconfig | 1 + configs/pxm2_defconfig | 1 + configs/r8a77970_eagle_defconfig | 1 + configs/r8a77980_condor_defconfig | 1 + configs/r8a77990_ebisu_defconfig | 1 + configs/r8a77995_draak_defconfig | 1 + configs/r8a779a0_falcon_defconfig | 1 + configs/radxa-zero_defconfig | 1 + configs/rastaban_defconfig | 1 + configs/rcar3_salvator-x_defconfig | 1 + configs/rcar3_ulcb_defconfig | 1 + configs/riotboard_defconfig | 1 + configs/rut_defconfig | 1 + configs/rzg2_beacon_defconfig | 1 + configs/s400_defconfig | 1 + configs/sagem_f@st1704_ram_defconfig | 1 + configs/seaboard_defconfig | 1 + configs/seeed_npi_imx6ull_defconfig | 1 + configs/sei510_defconfig | 1 + configs/sei610_defconfig | 1 + configs/sfr_nb4-ser_ram_defconfig | 1 + configs/sheevaplug_defconfig | 1 + configs/silinux_ek874_defconfig | 1 + configs/smartweb_defconfig | 1 + configs/smegw01_defconfig | 1 + configs/socfpga_agilex_atf_defconfig | 1 + configs/socfpga_agilex_defconfig | 1 + configs/socfpga_agilex_vab_defconfig | 1 + configs/socfpga_arria10_defconfig | 1 + configs/socfpga_arria5_defconfig | 1 + configs/socfpga_cyclone5_defconfig | 1 + configs/socfpga_dbm_soc1_defconfig | 1 + configs/socfpga_de0_nano_soc_defconfig | 1 + configs/socfpga_de10_nano_defconfig | 1 + configs/socfpga_de10_standard_defconfig | 1 + configs/socfpga_de1_soc_defconfig | 1 + configs/socfpga_is1_defconfig | 1 + configs/socfpga_mcvevk_defconfig | 1 + configs/socfpga_n5x_atf_defconfig | 1 + configs/socfpga_n5x_defconfig | 1 + configs/socfpga_n5x_vab_defconfig | 1 + configs/socfpga_secu1_defconfig | 1 + configs/socfpga_sockit_defconfig | 1 + configs/socfpga_socrates_defconfig | 1 + configs/socfpga_sr1500_defconfig | 1 + configs/socfpga_stratix10_atf_defconfig | 1 + configs/socfpga_stratix10_defconfig | 1 + configs/socfpga_vining_fpga_defconfig | 1 + configs/somlabs_visionsom_6ull_defconfig | 1 + configs/starqltechn_defconfig | 1 + configs/synquacer_developerbox_defconfig | 1 + configs/syzygy_hub_defconfig | 1 + configs/tbs2910_defconfig | 1 + configs/tec-ng_defconfig | 1 + configs/tec_defconfig | 1 + configs/ten64_tfa_defconfig | 1 + configs/theadorable_debug_defconfig | 1 + configs/thuban_defconfig | 1 + configs/thunderx_88xx_defconfig | 1 + configs/ti816x_evm_defconfig | 1 + configs/topic_miami_defconfig | 1 + configs/topic_miamilite_defconfig | 1 + configs/topic_miamiplus_defconfig | 1 + configs/total_compute_defconfig | 1 + configs/tplink_wdr4300_defconfig | 1 + configs/tqma6dl_mba6_mmc_defconfig | 1 + configs/tqma6dl_mba6_spi_defconfig | 1 + configs/tqma6q_mba6_mmc_defconfig | 1 + configs/tqma6q_mba6_spi_defconfig | 1 + configs/tqma6s_mba6_mmc_defconfig | 1 + configs/tqma6s_mba6_spi_defconfig | 1 + configs/trimslice_defconfig | 1 + configs/tuge1_defconfig | 1 + configs/turris_mox_defconfig | 1 + configs/turris_omnia_defconfig | 1 + configs/tuxx1_defconfig | 1 + configs/u200_defconfig | 1 + configs/uDPU_defconfig | 1 + configs/udoo_defconfig | 1 + configs/udoo_neo_defconfig | 1 + configs/variscite_dart6ul_defconfig | 1 + configs/venice2_defconfig | 1 + configs/ventana_defconfig | 1 + configs/verdin-imx8mm_defconfig | 1 + configs/verdin-imx8mp_defconfig | 1 + configs/vexpress_aemv8a_juno_defconfig | 1 + configs/vexpress_aemv8a_semi_defconfig | 1 + configs/vexpress_aemv8r_defconfig | 1 + configs/vining_2000_defconfig | 1 + configs/vocore2_defconfig | 1 + configs/wandboard_defconfig | 1 + configs/warp7_bl33_defconfig | 1 + configs/warp7_defconfig | 1 + configs/warp_defconfig | 1 + configs/wetek-core2_defconfig | 1 + configs/xenguest_arm64_defconfig | 1 + configs/xilinx_versal_mini_defconfig | 1 + configs/xilinx_versal_mini_emmc0_defconfig | 1 + configs/xilinx_versal_mini_emmc1_defconfig | 1 + configs/xilinx_versal_virt_defconfig | 1 + configs/xilinx_zynq_virt_defconfig | 1 + configs/xilinx_zynqmp_mini_defconfig | 1 + configs/xilinx_zynqmp_mini_emmc0_defconfig | 1 + configs/xilinx_zynqmp_mini_emmc1_defconfig | 1 + configs/xilinx_zynqmp_mini_nand_defconfig | 1 + configs/xilinx_zynqmp_mini_nand_single_defconfig | 1 + configs/xilinx_zynqmp_mini_qspi_defconfig | 1 + configs/xilinx_zynqmp_r5_defconfig | 1 + configs/xilinx_zynqmp_virt_defconfig | 1 + configs/zynq_cse_nand_defconfig | 1 + configs/zynq_cse_nor_defconfig | 1 + configs/zynq_cse_qspi_defconfig | 1 + include/config_fallbacks.h | 4 ---- include/configs/am3517_evm.h | 3 --- include/configs/apalis-imx8.h | 1 - include/configs/apalis-tk1.h | 4 ---- include/configs/apalis_imx6.h | 2 -- include/configs/apalis_t30.h | 4 ---- include/configs/ax25-ae350.h | 5 ----- include/configs/bcm_ns3.h | 1 - include/configs/bcmstb.h | 1 - include/configs/bmips_common.h | 1 - include/configs/broadcom_bcm963158.h | 1 - include/configs/broadcom_bcm96753ref.h | 1 - include/configs/broadcom_bcm968360bg.h | 1 - include/configs/broadcom_bcm968580xref.h | 1 - include/configs/bur_cfg_common.h | 3 --- include/configs/capricorn-common.h | 1 - include/configs/ci20.h | 1 - include/configs/colibri-imx8x.h | 1 - include/configs/colibri_imx6.h | 2 -- include/configs/colibri_t20.h | 4 ---- include/configs/colibri_t30.h | 4 ---- include/configs/crs3xx-98dx3236.h | 2 -- include/configs/db-88f6820-amc.h | 2 -- include/configs/db-xc3-24g4xg.h | 2 -- include/configs/display5.h | 1 - include/configs/dragonboard410c.h | 1 - include/configs/dragonboard820c.h | 1 - include/configs/edison.h | 1 - include/configs/gardena-smart-gateway-mt7688.h | 1 - include/configs/gazerbeam.h | 1 - include/configs/hikey.h | 1 - include/configs/imx8mm-cl-iot-gate.h | 1 - include/configs/imx8mm_beacon.h | 1 - include/configs/imx8mm_data_modul_edm_sbc.h | 1 - include/configs/imx8mm_evk.h | 1 - include/configs/imx8mm_icore_mx8mm.h | 1 - include/configs/imx8mm_venice.h | 1 - include/configs/imx8mn_beacon.h | 1 - include/configs/imx8mn_bsh_smm_s2_common.h | 1 - include/configs/imx8mn_evk.h | 1 - include/configs/imx8mn_var_som.h | 1 - include/configs/imx8mn_venice.h | 1 - include/configs/imx8mp_dhcom_pdk2.h | 1 - include/configs/imx8mp_evk.h | 1 - include/configs/imx8mp_rsb3720.h | 1 - include/configs/imx8mp_venice.h | 1 - include/configs/imx8mq_cm.h | 1 - include/configs/imx8mq_evk.h | 1 - include/configs/imx8mq_phanbell.h | 1 - include/configs/imx8qxp_mek.h | 1 - include/configs/imx8ulp_evk.h | 1 - include/configs/km/keymile-common.h | 1 - include/configs/linkit-smart-7688.h | 1 - include/configs/ls1012a_common.h | 1 - include/configs/ls1021atsn.h | 1 - include/configs/ls1028a_common.h | 2 -- include/configs/ls1043a_common.h | 2 -- include/configs/ls1046a_common.h | 2 -- include/configs/ls1088a_common.h | 1 - include/configs/ls2080a_common.h | 1 - include/configs/lx2160a_common.h | 1 - include/configs/m53menlo.h | 1 - include/configs/meson64.h | 1 - include/configs/microblaze-generic.h | 2 -- include/configs/mt7620.h | 1 - include/configs/mt7622.h | 1 - include/configs/mt7623.h | 1 - include/configs/mt7628.h | 1 - include/configs/mt7629.h | 1 - include/configs/mv-common.h | 1 - include/configs/mvebu_armada-37xx.h | 1 - include/configs/mvebu_armada-8k.h | 1 - include/configs/mx53ppd.h | 1 - include/configs/mx6_common.h | 1 - include/configs/mx7_common.h | 1 - include/configs/mx7ulp_evk.h | 2 -- include/configs/mxs.h | 1 - include/configs/octeontx2_common.h | 2 -- include/configs/octeontx_common.h | 2 -- include/configs/owl-common.h | 1 - include/configs/phycore_imx8mm.h | 1 - include/configs/phycore_imx8mp.h | 1 - include/configs/pico-imx8mq.h | 1 - include/configs/poleg.h | 1 - include/configs/poplar.h | 1 - include/configs/presidio_asic.h | 1 - include/configs/rcar-gen3-common.h | 1 - include/configs/rk3128_common.h | 1 - include/configs/s5p4418_nanopi2.h | 2 -- include/configs/sdm845.h | 1 - include/configs/siemens-am33x-common.h | 3 --- include/configs/smartweb.h | 3 --- include/configs/socfpga_common.h | 1 - include/configs/socfpga_soc64_common.h | 1 - include/configs/stm32h743-disco.h | 2 -- include/configs/stm32h743-eval.h | 2 -- include/configs/stm32h750-art-pi.h | 2 -- include/configs/stmark2.h | 1 - include/configs/synquacer.h | 1 - include/configs/tegra-common.h | 1 - include/configs/thunderx_88xx.h | 1 - include/configs/ti_armv7_common.h | 3 --- include/configs/total_compute.h | 1 - include/configs/tplink_wdr4300.h | 1 - include/configs/turris_mox.h | 1 - include/configs/verdin-imx8mm.h | 1 - include/configs/verdin-imx8mp.h | 1 - include/configs/vexpress_aemv8.h | 1 - include/configs/vocore2.h | 1 - include/configs/xenguest_arm64.h | 1 - include/configs/xilinx_versal.h | 1 - include/configs/xilinx_zynqmp.h | 1 - include/configs/xilinx_zynqmp_r5.h | 2 -- include/configs/zynq-common.h | 1 - 674 files changed, 562 insertions(+), 162 deletions(-) diff --git a/README b/README index b7ab6e50708..8812700f24d 100644 --- a/README +++ b/README @@ -1857,8 +1857,6 @@ Configuration Settings: - CONFIG_SYS_PBSIZE: Buffer size for Console output -- CONFIG_SYS_MAXARGS: max. Number of arguments accepted for monitor commands - - CONFIG_SYS_BARGSIZE: Buffer size for Boot Arguments which are passed to the application (usually a Linux kernel) when it is booted diff --git a/cmd/Kconfig b/cmd/Kconfig index 09193b61b95..dd43358c271 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -71,6 +71,10 @@ config SYS_PROMPT_HUSH_PS2 printed when the command interpreter needs more input to complete a command. Usually "> ". +config SYS_MAXARGS + int "Maximum number arguments accepted by commands" + default 16 + config SYS_XTRACE bool "Command execution tracer" depends on CMDLINE diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig index 5ad078ffaa9..653761b6d94 100644 --- a/configs/am335x_baltos_defconfig +++ b/configs/am335x_baltos_defconfig @@ -26,6 +26,7 @@ CONFIG_SPL_NAND_BASE=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig index dc4693d40bf..53ebc6d62a9 100644 --- a/configs/am335x_boneblack_vboot_defconfig +++ b/configs/am335x_boneblack_vboot_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_ETHER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_SPL=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 # CONFIG_CMD_FLASH is not set diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig index 30577a6fce4..17c67108b69 100644 --- a/configs/am335x_evm_defconfig +++ b/configs/am335x_evm_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_ETHER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x00080000 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig index f1b9d6c3ad8..3f3a81a1d98 100644 --- a/configs/am335x_evm_spiboot_defconfig +++ b/configs/am335x_evm_spiboot_defconfig @@ -26,6 +26,7 @@ CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_SPL=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 # CONFIG_CMD_FLASH is not set diff --git a/configs/am335x_guardian_defconfig b/configs/am335x_guardian_defconfig index 7925e100bc2..738d4bbc69d 100644 --- a/configs/am335x_guardian_defconfig +++ b/configs/am335x_guardian_defconfig @@ -43,6 +43,7 @@ CONFIG_SPL_NET_VCI_STRING="Guardian U-Boot SPL" CONFIG_SPL_POWER=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_ETHER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_ASKENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig index c1ad2a59ec9..074a654b55a 100644 --- a/configs/am335x_hs_evm_defconfig +++ b/configs/am335x_hs_evm_defconfig @@ -26,6 +26,7 @@ CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_BASE=y # CONFIG_SPL_YMODEM_SUPPORT is not set +CONFIG_SYS_MAXARGS=64 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig index 48e72f82276..120f3ad9c4d 100644 --- a/configs/am335x_hs_evm_uart_defconfig +++ b/configs/am335x_hs_evm_uart_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_BASE=y +CONFIG_SYS_MAXARGS=64 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y diff --git a/configs/am335x_igep003x_defconfig b/configs/am335x_igep003x_defconfig index 04566142ef5..85b444a535f 100644 --- a/configs/am335x_igep003x_defconfig +++ b/configs/am335x_igep003x_defconfig @@ -41,6 +41,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set diff --git a/configs/am335x_pdu001_defconfig b/configs/am335x_pdu001_defconfig index f6aa825ee43..5e9231b5231 100644 --- a/configs/am335x_pdu001_defconfig +++ b/configs/am335x_pdu001_defconfig @@ -27,6 +27,7 @@ CONFIG_SPL_I2C=y # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_POWER=y CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_MEMINFO=y diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig index 65cdc2acf56..2fc93ea20e5 100644 --- a/configs/am335x_shc_defconfig +++ b/configs/am335x_shc_defconfig @@ -41,6 +41,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set CONFIG_SYS_PROMPT="U-Boot# " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig index a59ebf4a4ed..a8111e94be8 100644 --- a/configs/am335x_shc_ict_defconfig +++ b/configs/am335x_shc_ict_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set CONFIG_SYS_PROMPT="U-Boot# " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig index 3c291cfe6d6..901688c7da8 100644 --- a/configs/am335x_shc_netboot_defconfig +++ b/configs/am335x_shc_netboot_defconfig @@ -43,6 +43,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set CONFIG_SYS_PROMPT="U-Boot# " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig index 8c4f14d764e..e17d85f8bfc 100644 --- a/configs/am335x_shc_sdboot_defconfig +++ b/configs/am335x_shc_sdboot_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set CONFIG_SYS_PROMPT="U-Boot# " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig index 41017de2f9c..d468c14f092 100644 --- a/configs/am335x_sl50_defconfig +++ b/configs/am335x_sl50_defconfig @@ -37,6 +37,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig index 904fc5302be..184e8868a41 100644 --- a/configs/am3517_evm_defconfig +++ b/configs/am3517_evm_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 # CONFIG_SPL_POWER is not set CONFIG_SYS_PROMPT="AM3517_EVM # " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0xaa0000 diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig index 7a736b6fe1a..6e37c2ca2d7 100644 --- a/configs/am43xx_evm_defconfig +++ b/configs/am43xx_evm_defconfig @@ -28,6 +28,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_ETHER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x00100000 CONFIG_CMD_SPL_WRITE_SIZE=0x40000 diff --git a/configs/am43xx_evm_qspiboot_defconfig b/configs/am43xx_evm_qspiboot_defconfig index 2a36dc580e9..b541aa796b9 100644 --- a/configs/am43xx_evm_qspiboot_defconfig +++ b/configs/am43xx_evm_qspiboot_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_MISC_INIT_R is not set +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/am43xx_evm_rtconly_defconfig b/configs/am43xx_evm_rtconly_defconfig index 30e44cb65e3..6b24aac067a 100644 --- a/configs/am43xx_evm_rtconly_defconfig +++ b/configs/am43xx_evm_rtconly_defconfig @@ -22,6 +22,7 @@ CONFIG_SPL_NAND_BASE=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x00100000 CONFIG_CMD_SPL_WRITE_SIZE=0x40000 diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig index e844106243d..a3de93d9bf9 100644 --- a/configs/am43xx_evm_usbhost_boot_defconfig +++ b/configs/am43xx_evm_usbhost_boot_defconfig @@ -24,6 +24,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_STORAGE=y CONFIG_SPL_USB_GADGET=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x00100000 CONFIG_CMD_SPL_WRITE_SIZE=0x40000 diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig index 1517b707048..cc75fe9eb3d 100644 --- a/configs/am43xx_hs_evm_defconfig +++ b/configs/am43xx_hs_evm_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_STORAGE=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_ETHER=y +CONFIG_SYS_MAXARGS=64 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index 4223f00156c..c19ec97a832 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -36,6 +36,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ABOOTIMG=y CONFIG_CMD_SPL=y diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index 529636d3354..ca78622eb2b 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_DMA=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ABOOTIMG=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index 3149bd1719f..40c628a4988 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -42,6 +42,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ABOOTIMG=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig index be702285d5d..489a750230b 100644 --- a/configs/am64x_evm_a53_defconfig +++ b/configs/am64x_evm_a53_defconfig @@ -53,6 +53,7 @@ CONFIG_SPL_USB_STORAGE=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y CONFIG_CMD_DM=y diff --git a/configs/am64x_evm_r5_defconfig b/configs/am64x_evm_r5_defconfig index 158c43e2bce..0f76a0a8824 100644 --- a/configs/am64x_evm_r5_defconfig +++ b/configs/am64x_evm_r5_defconfig @@ -60,6 +60,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y CONFIG_CMD_GPT=y diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig index 9f41b397c34..3c654391b13 100644 --- a/configs/am65x_evm_a53_defconfig +++ b/configs/am65x_evm_a53_defconfig @@ -55,6 +55,7 @@ CONFIG_SPL_USB_STORAGE=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y CONFIG_CMD_GPT=y diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index a8f9a85deae..f5d4e32ddf6 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -52,6 +52,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GPT=y diff --git a/configs/am65x_evm_r5_usbdfu_defconfig b/configs/am65x_evm_r5_usbdfu_defconfig index 57cd0f35a56..d6b3bb5521c 100644 --- a/configs/am65x_evm_r5_usbdfu_defconfig +++ b/configs/am65x_evm_r5_usbdfu_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y diff --git a/configs/am65x_evm_r5_usbmsc_defconfig b/configs/am65x_evm_r5_usbmsc_defconfig index e6147d1be36..3d8b6deb221 100644 --- a/configs/am65x_evm_r5_usbmsc_defconfig +++ b/configs/am65x_evm_r5_usbmsc_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_USB_STORAGE=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GPT=y diff --git a/configs/am65x_hs_evm_a53_defconfig b/configs/am65x_hs_evm_a53_defconfig index 05063d30c84..ccfd0dbe5f7 100644 --- a/configs/am65x_hs_evm_a53_defconfig +++ b/configs/am65x_hs_evm_a53_defconfig @@ -49,6 +49,7 @@ CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y CONFIG_CMD_GPT=y diff --git a/configs/am65x_hs_evm_r5_defconfig b/configs/am65x_hs_evm_r5_defconfig index e52941e3966..8826be3fc87 100644 --- a/configs/am65x_hs_evm_r5_defconfig +++ b/configs/am65x_hs_evm_r5_defconfig @@ -48,6 +48,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GPT=y diff --git a/configs/apalis-imx8_defconfig b/configs/apalis-imx8_defconfig index beb20f6e1c0..e32e2dd03c5 100644 --- a/configs/apalis-imx8_defconfig +++ b/configs/apalis-imx8_defconfig @@ -21,6 +21,7 @@ CONFIG_LOG=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set CONFIG_CMD_ASKENV=y diff --git a/configs/apalis-tk1_defconfig b/configs/apalis-tk1_defconfig index e098b1171ee..e017b7e0378 100644 --- a/configs/apalis-tk1_defconfig +++ b/configs/apalis-tk1_defconfig @@ -22,6 +22,7 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SYS_PROMPT="Apalis TK1 # " +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index ea4ad276e7f..718623df79b 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SYS_PROMPT="Apalis iMX6 # " +CONFIG_SYS_MAXARGS=48 # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/apalis_t30_defconfig b/configs/apalis_t30_defconfig index 86d48eb6d92..5f9d670211e 100644 --- a/configs/apalis_t30_defconfig +++ b/configs/apalis_t30_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SYS_PROMPT="Apalis T30 # " +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/aristainetos2c_defconfig b/configs/aristainetos2c_defconfig index b3bc406aa6c..bd1eb732bac 100644 --- a/configs/aristainetos2c_defconfig +++ b/configs/aristainetos2c_defconfig @@ -23,6 +23,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_TYPES=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/aristainetos2ccslb_defconfig b/configs/aristainetos2ccslb_defconfig index 30177fa46b1..4745f03c50e 100644 --- a/configs/aristainetos2ccslb_defconfig +++ b/configs/aristainetos2ccslb_defconfig @@ -23,6 +23,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_TYPES=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig index f27d92ab785..373926859c0 100644 --- a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig +++ b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTDELAY=0 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_CLOCKS=y CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_MEMTEST=y CONFIG_CMD_FPGA_LOADBP=y CONFIG_CMD_FPGA_LOADP=y diff --git a/configs/bananapi-m5_defconfig b/configs/bananapi-m5_defconfig index 798564e1730..204595eac8e 100644 --- a/configs/bananapi-m5_defconfig +++ b/configs/bananapi-m5_defconfig @@ -15,6 +15,7 @@ CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y diff --git a/configs/bcm7260_defconfig b/configs/bcm7260_defconfig index 401a2d7414c..b8b744e4bfb 100644 --- a/configs/bcm7260_defconfig +++ b/configs/bcm7260_defconfig @@ -19,6 +19,7 @@ CONFIG_PREBOOT="fdt addr ${fdtcontroladdr};fdt move ${fdtcontroladdr} ${fdtsavea CONFIG_BOARD_LATE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot>" +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_ASKENV=y CONFIG_CMD_GPT=y # CONFIG_RANDOM_UUID is not set diff --git a/configs/bcm7445_defconfig b/configs/bcm7445_defconfig index b30d4bba024..eecee5a5cc6 100644 --- a/configs/bcm7445_defconfig +++ b/configs/bcm7445_defconfig @@ -20,6 +20,7 @@ CONFIG_PREBOOT="fdt addr ${fdtcontroladdr};fdt move ${fdtcontroladdr} ${fdtsavea CONFIG_BOARD_LATE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot>" +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_ASKENV=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/bcm963158_ram_defconfig b/configs/bcm963158_ram_defconfig index 642faf511f5..cd622d6425f 100644 --- a/configs/bcm963158_ram_defconfig +++ b/configs/bcm963158_ram_defconfig @@ -20,6 +20,7 @@ CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=24 # CONFIG_CMD_LZMADEC is not set # CONFIG_CMD_UNZIP is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/bcm96753ref_ram_defconfig b/configs/bcm96753ref_ram_defconfig index 9a72c75000b..ca3ac5b235b 100644 --- a/configs/bcm96753ref_ram_defconfig +++ b/configs/bcm96753ref_ram_defconfig @@ -23,6 +23,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y # CONFIG_AUTOBOOT is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=24 # CONFIG_CMD_BOOTD is not set # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/bcm968360bg_ram_defconfig b/configs/bcm968360bg_ram_defconfig index cde18125633..466d1bd9744 100644 --- a/configs/bcm968360bg_ram_defconfig +++ b/configs/bcm968360bg_ram_defconfig @@ -18,6 +18,7 @@ CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=24 CONFIG_CMD_GPIO=y CONFIG_CMD_MTD=y CONFIG_CMD_NAND=y diff --git a/configs/bcm968380gerg_ram_defconfig b/configs/bcm968380gerg_ram_defconfig index b6181a2e10e..4dd7739889b 100644 --- a/configs/bcm968380gerg_ram_defconfig +++ b/configs/bcm968380gerg_ram_defconfig @@ -18,6 +18,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="bcm968380gerg # " +CONFIG_SYS_MAXARGS=24 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/bcm968580xref_ram_defconfig b/configs/bcm968580xref_ram_defconfig index d1a17c758fc..feda8f43fed 100644 --- a/configs/bcm968580xref_ram_defconfig +++ b/configs/bcm968580xref_ram_defconfig @@ -18,6 +18,7 @@ CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=24 CONFIG_CMD_GPIO=y CONFIG_CMD_MTD=y CONFIG_CMD_NAND=y diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig index 9267bf36189..a3ada3c36cf 100644 --- a/configs/bcm_ns3_defconfig +++ b/configs/bcm_ns3_defconfig @@ -24,6 +24,7 @@ CONFIG_SILENT_U_BOOT_ONLY=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot> " +CONFIG_SYS_MAXARGS=64 # CONFIG_SYS_XTRACE is not set CONFIG_CMD_GPT=y CONFIG_CMD_GPT_RENAME=y diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig index 8aa8438467b..fc4ab4dd890 100644 --- a/configs/beaver_defconfig +++ b/configs/beaver_defconfig @@ -15,6 +15,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra30 (Beaver) # " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/beelink-gsking-x_defconfig b/configs/beelink-gsking-x_defconfig index 841a482602f..32deaf2d634 100644 --- a/configs/beelink-gsking-x_defconfig +++ b/configs/beelink-gsking-x_defconfig @@ -16,6 +16,7 @@ CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y diff --git a/configs/beelink-gtking_defconfig b/configs/beelink-gtking_defconfig index f0500411c70..867d3b27087 100644 --- a/configs/beelink-gtking_defconfig +++ b/configs/beelink-gtking_defconfig @@ -16,6 +16,7 @@ CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y diff --git a/configs/beelink-gtkingpro_defconfig b/configs/beelink-gtkingpro_defconfig index 86c1d3f6734..88fb05702c4 100644 --- a/configs/beelink-gtkingpro_defconfig +++ b/configs/beelink-gtkingpro_defconfig @@ -16,6 +16,7 @@ CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig index 721deb37ea2..0d4007dbd1f 100644 --- a/configs/bitmain_antminer_s9_defconfig +++ b/configs/bitmain_antminer_s9_defconfig @@ -30,6 +30,7 @@ CONFIG_CLOCKS=y CONFIG_SPL_STACK_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="antminer> " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_DM is not set diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig index f1e7f81c401..2a7ddb4b350 100644 --- a/configs/brppt1_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/brppt1_nand_defconfig b/configs/brppt1_nand_defconfig index d75090a245c..eb6b83cc552 100644 --- a/configs/brppt1_nand_defconfig +++ b/configs/brppt1_nand_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig index 33780488e62..ec2de59c20f 100644 --- a/configs/brppt1_spi_defconfig +++ b/configs/brppt1_spi_defconfig @@ -46,6 +46,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/brppt2_defconfig b/configs/brppt2_defconfig index ab767ab737e..bcaab38b7ac 100644 --- a/configs/brppt2_defconfig +++ b/configs/brppt2_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set diff --git a/configs/brsmarc1_defconfig b/configs/brsmarc1_defconfig index 1eef3bde060..29c54fc856e 100644 --- a/configs/brsmarc1_defconfig +++ b/configs/brsmarc1_defconfig @@ -44,6 +44,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_NETBSD is not set diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig index c1acbe0259e..a8a0815e266 100644 --- a/configs/brxre1_defconfig +++ b/configs/brxre1_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_NETBSD is not set diff --git a/configs/bubblegum_96_defconfig b/configs/bubblegum_96_defconfig index a21b245c845..33402f297c7 100644 --- a/configs/bubblegum_96_defconfig +++ b/configs/bubblegum_96_defconfig @@ -14,6 +14,7 @@ CONFIG_BOOTARGS="console=ttyOWL5,115200n8" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot => " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_MD5SUM=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_CACHE=y diff --git a/configs/cardhu_defconfig b/configs/cardhu_defconfig index a2126eeadff..d683c1799f0 100644 --- a/configs/cardhu_defconfig +++ b/configs/cardhu_defconfig @@ -14,6 +14,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra30 (Cardhu) # " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/cei-tk1-som_defconfig b/configs/cei-tk1-som_defconfig index 197d462ce06..695d19e2162 100644 --- a/configs/cei-tk1-som_defconfig +++ b/configs/cei-tk1-som_defconfig @@ -16,6 +16,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra124 (TK1-SOM) # " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig index 1b03d836944..ad7e9602ce0 100644 --- a/configs/chiliboard_defconfig +++ b/configs/chiliboard_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_BASE=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/ci20_mmc_defconfig b/configs/ci20_mmc_defconfig index 867b9bba7e0..a533706fac1 100644 --- a/configs/ci20_mmc_defconfig +++ b/configs/ci20_mmc_defconfig @@ -27,6 +27,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1c CONFIG_SPL_MMC_TINY=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_DM=y CONFIG_CMD_MMC=y CONFIG_CMD_DHCP=y diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig index 7c708257b48..8c98762a54d 100644 --- a/configs/cl-som-imx7_defconfig +++ b/configs/cl-som-imx7_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_SPI_LOAD=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="CL-SOM-iMX7 # " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig index 9f744d0caf9..b4ec8e76354 100644 --- a/configs/clearfog_defconfig +++ b/configs/clearfog_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_I2C=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_TLV_EEPROM=y CONFIG_SPL_CMD_TLV_EEPROM=y # CONFIG_CMD_FLASH is not set diff --git a/configs/clearfog_gt_8k_defconfig b/configs/clearfog_gt_8k_defconfig index a82cbafb798..1b2ccc3a672 100644 --- a/configs/clearfog_gt_8k_defconfig +++ b/configs/clearfog_gt_8k_defconfig @@ -23,6 +23,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index cfa32815748..d7ea95bbff7 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="CM-FX6 # " +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_XIMG is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/cm_t335_defconfig b/configs/cm_t335_defconfig index 0b4912bba3d..556035f4f2b 100644 --- a/configs/cm_t335_defconfig +++ b/configs/cm_t335_defconfig @@ -27,6 +27,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set CONFIG_SYS_PROMPT="CM-T335 # " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y CONFIG_CMD_EEPROM_LAYOUT=y diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig index 7a0cd52d737..0a64d1dc830 100644 --- a/configs/cm_t43_defconfig +++ b/configs/cm_t43_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_PROMPT="CM-T43 # " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y CONFIG_CMD_EEPROM_LAYOUT=y diff --git a/configs/colibri-imx6ull-emmc_defconfig b/configs/colibri-imx6ull-emmc_defconfig index eb4b6a79eaa..fb33c5718a6 100644 --- a/configs/colibri-imx6ull-emmc_defconfig +++ b/configs/colibri-imx6ull-emmc_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_PROMPT="Colibri iMX6ULL # " +CONFIG_SYS_MAXARGS=32 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_CMD_ELF is not set diff --git a/configs/colibri-imx6ull_defconfig b/configs/colibri-imx6ull_defconfig index d0825472b2f..30445e8c754 100644 --- a/configs/colibri-imx6ull_defconfig +++ b/configs/colibri-imx6ull_defconfig @@ -23,6 +23,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_PROMPT="Colibri iMX6ULL # " +CONFIG_SYS_MAXARGS=32 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_CMD_ELF is not set diff --git a/configs/colibri-imx8x_defconfig b/configs/colibri-imx8x_defconfig index 0c9d6b64c1b..29016ad8bd3 100644 --- a/configs/colibri-imx8x_defconfig +++ b/configs/colibri-imx8x_defconfig @@ -20,6 +20,7 @@ CONFIG_LOG=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set CONFIG_CMD_ASKENV=y diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 4f38d5cb483..55338122d88 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -41,6 +41,7 @@ CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SYS_PROMPT="Colibri iMX6 # " +CONFIG_SYS_MAXARGS=48 # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig index 973afc1a2b4..1fd64ec4278 100644 --- a/configs/colibri_imx7_defconfig +++ b/configs/colibri_imx7_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_LATE_INIT=y CONFIG_SYS_PROMPT="Colibri iMX7 # " +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BOOTD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set diff --git a/configs/colibri_imx7_emmc_defconfig b/configs/colibri_imx7_emmc_defconfig index 01b1cb8b552..cef48b9fca6 100644 --- a/configs/colibri_imx7_emmc_defconfig +++ b/configs/colibri_imx7_emmc_defconfig @@ -24,6 +24,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_LATE_INIT=y CONFIG_SYS_PROMPT="Colibri iMX7 # " +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BOOTD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig index 00f45dc115f..456d43afa22 100644 --- a/configs/colibri_t20_defconfig +++ b/configs/colibri_t20_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SYS_PROMPT="Colibri T20 # " +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/colibri_t30_defconfig b/configs/colibri_t30_defconfig index abbc0662bae..1e1f1bfa088 100644 --- a/configs/colibri_t30_defconfig +++ b/configs/colibri_t30_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SYS_PROMPT="Colibri T30 # " +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/comtrend_ar5315u_ram_defconfig b/configs/comtrend_ar5315u_ram_defconfig index b2eb24d2e80..ab49a6c1a58 100644 --- a/configs/comtrend_ar5315u_ram_defconfig +++ b/configs/comtrend_ar5315u_ram_defconfig @@ -19,6 +19,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="AR-5315un # " +CONFIG_SYS_MAXARGS=24 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/comtrend_ar5387un_ram_defconfig b/configs/comtrend_ar5387un_ram_defconfig index bebb4b29981..4e5c704751d 100644 --- a/configs/comtrend_ar5387un_ram_defconfig +++ b/configs/comtrend_ar5387un_ram_defconfig @@ -19,6 +19,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="AR-5387un # " +CONFIG_SYS_MAXARGS=24 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/comtrend_ct5361_ram_defconfig b/configs/comtrend_ct5361_ram_defconfig index a2011b9663e..0c3fb8e94b5 100644 --- a/configs/comtrend_ct5361_ram_defconfig +++ b/configs/comtrend_ct5361_ram_defconfig @@ -19,6 +19,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="CT-5361 # " +CONFIG_SYS_MAXARGS=24 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/comtrend_vr3032u_ram_defconfig b/configs/comtrend_vr3032u_ram_defconfig index 8d5646167f7..77e67ca4446 100644 --- a/configs/comtrend_vr3032u_ram_defconfig +++ b/configs/comtrend_vr3032u_ram_defconfig @@ -19,6 +19,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="VR-3032u # " +CONFIG_SYS_MAXARGS=24 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/comtrend_wap5813n_ram_defconfig b/configs/comtrend_wap5813n_ram_defconfig index a8004d8af8e..881c30a60e7 100644 --- a/configs/comtrend_wap5813n_ram_defconfig +++ b/configs/comtrend_wap5813n_ram_defconfig @@ -19,6 +19,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="WAP-5813n # " +CONFIG_SYS_MAXARGS=24 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig index c366db40e6f..18b854e7058 100644 --- a/configs/controlcenterdc_defconfig +++ b/configs/controlcenterdc_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_I2C=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_ELF is not set # CONFIG_CMD_GO is not set CONFIG_CMD_GPIO=y diff --git a/configs/cortina_presidio-asic-base_defconfig b/configs/cortina_presidio-asic-base_defconfig index 6514f0753e4..3c5290e1e7b 100644 --- a/configs/cortina_presidio-asic-base_defconfig +++ b/configs/cortina_presidio-asic-base_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTARGS="earlycon=serial,0xf4329148 console=ttyS0,115200 root=/dev/ram0" CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_SYS_PROMPT="G3#" +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_WDT=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIMER=y diff --git a/configs/cortina_presidio-asic-emmc_defconfig b/configs/cortina_presidio-asic-emmc_defconfig index b8a1c96c834..01b07df1118 100644 --- a/configs/cortina_presidio-asic-emmc_defconfig +++ b/configs/cortina_presidio-asic-emmc_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_SYS_PROMPT="G3#" +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_WDT=y diff --git a/configs/cortina_presidio-asic-pnand_defconfig b/configs/cortina_presidio-asic-pnand_defconfig index 944fed6ca03..996041a04ab 100644 --- a/configs/cortina_presidio-asic-pnand_defconfig +++ b/configs/cortina_presidio-asic-pnand_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTARGS="earlycon=serial,0xf4329148 console=ttyS0,115200 root=/dev/ram0" CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_SYS_PROMPT="G3#" +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_MTD=y CONFIG_CMD_WDT=y CONFIG_CMD_CACHE=y diff --git a/configs/crs305-1g-4s-bit_defconfig b/configs/crs305-1g-4s-bit_defconfig index 2ebba329475..095f702b9c3 100644 --- a/configs/crs305-1g-4s-bit_defconfig +++ b/configs/crs305-1g-4s-bit_defconfig @@ -21,6 +21,7 @@ CONFIG_AUTOBOOT_KEYED_CTRLC=y CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=96 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTD=y diff --git a/configs/crs305-1g-4s_defconfig b/configs/crs305-1g-4s_defconfig index 54f5268beaf..d2769974db5 100644 --- a/configs/crs305-1g-4s_defconfig +++ b/configs/crs305-1g-4s_defconfig @@ -21,6 +21,7 @@ CONFIG_AUTOBOOT_KEYED_CTRLC=y CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=96 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTD=y diff --git a/configs/crs326-24g-2s-bit_defconfig b/configs/crs326-24g-2s-bit_defconfig index fd31efdd223..8f92707367a 100644 --- a/configs/crs326-24g-2s-bit_defconfig +++ b/configs/crs326-24g-2s-bit_defconfig @@ -21,6 +21,7 @@ CONFIG_AUTOBOOT_KEYED_CTRLC=y CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=96 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTD=y diff --git a/configs/crs326-24g-2s_defconfig b/configs/crs326-24g-2s_defconfig index 8c12c595775..8e0843ec14e 100644 --- a/configs/crs326-24g-2s_defconfig +++ b/configs/crs326-24g-2s_defconfig @@ -21,6 +21,7 @@ CONFIG_AUTOBOOT_KEYED_CTRLC=y CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=96 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTD=y diff --git a/configs/crs328-4c-20s-4s-bit_defconfig b/configs/crs328-4c-20s-4s-bit_defconfig index 2334d1e88ca..ca37a51a37f 100644 --- a/configs/crs328-4c-20s-4s-bit_defconfig +++ b/configs/crs328-4c-20s-4s-bit_defconfig @@ -21,6 +21,7 @@ CONFIG_AUTOBOOT_KEYED_CTRLC=y CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=96 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTD=y diff --git a/configs/crs328-4c-20s-4s_defconfig b/configs/crs328-4c-20s-4s_defconfig index 09c3b7c2934..4bbde0fec07 100644 --- a/configs/crs328-4c-20s-4s_defconfig +++ b/configs/crs328-4c-20s-4s_defconfig @@ -21,6 +21,7 @@ CONFIG_AUTOBOOT_KEYED_CTRLC=y CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=96 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTD=y diff --git a/configs/cubieboard7_defconfig b/configs/cubieboard7_defconfig index 677bff64b90..35fd580c2ce 100644 --- a/configs/cubieboard7_defconfig +++ b/configs/cubieboard7_defconfig @@ -13,6 +13,7 @@ CONFIG_BOOTARGS="console=ttyOWL3,115200n8" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot => " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_MMC=y CONFIG_MMC_OWL=y CONFIG_PHY_REALTEK=y diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig index 897c00e523c..090cbcec694 100644 --- a/configs/d2net_v2_defconfig +++ b/configs/d2net_v2_defconfig @@ -27,6 +27,7 @@ CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="d2v2> " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4 CONFIG_CMD_I2C=y diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig index 03f938455ed..4eec628d8ae 100644 --- a/configs/dalmore_defconfig +++ b/configs/dalmore_defconfig @@ -15,6 +15,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra114 (Dalmore) # " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig index 8ebc7811143..f92f2c49c92 100644 --- a/configs/db-88f6720_defconfig +++ b/configs/db-88f6720_defconfig @@ -24,6 +24,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_I2C=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_I2C=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig index be4ee791351..24b9f53fb6b 100644 --- a/configs/db-88f6820-amc_defconfig +++ b/configs/db-88f6820-amc_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_I2C=y +CONFIG_SYS_MAXARGS=96 # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig index 55ebb57c692..c25e795cbde 100644 --- a/configs/db-88f6820-gp_defconfig +++ b/configs/db-88f6820-gp_defconfig @@ -24,6 +24,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_I2C=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig index 2c1d3b464d8..145b7d97dd4 100644 --- a/configs/db-mv784mp-gp_defconfig +++ b/configs/db-mv784mp-gp_defconfig @@ -24,6 +24,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_I2C=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y diff --git a/configs/db-xc3-24g4xg_defconfig b/configs/db-xc3-24g4xg_defconfig index 58fcf96c760..49c9111e3f9 100644 --- a/configs/db-xc3-24g4xg_defconfig +++ b/configs/db-xc3-24g4xg_defconfig @@ -17,6 +17,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SYS_MAXARGS=96 CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y # CONFIG_CMD_FLASH is not set diff --git a/configs/deneb_defconfig b/configs/deneb_defconfig index 425fff6c70a..aa8bc6f39a4 100644 --- a/configs/deneb_defconfig +++ b/configs/deneb_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_CMD_EXPORTENV is not set diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index be780949ec3..0db8b83f3eb 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_NAND_BASE=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x500 +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x680000 diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index 558619fc310..b5b5db60e56 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -37,6 +37,7 @@ CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x11400 +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_MEMTEST=y CONFIG_CMD_UNZIP=y CONFIG_CMD_DFU=y diff --git a/configs/display5_defconfig b/configs/display5_defconfig index fa271b24028..e4b672122f0 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -49,6 +49,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="display5 > " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_ELF is not set CONFIG_CMD_SPL=y diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig index 45b6b964491..0aa7e7111a6 100644 --- a/configs/display5_factory_defconfig +++ b/configs/display5_factory_defconfig @@ -47,6 +47,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="display5 factory > " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_ELF is not set CONFIG_CMD_SPL=y diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig index 96088a177a8..ad5b6ff4e21 100644 --- a/configs/dns325_defconfig +++ b/configs/dns325_defconfig @@ -21,6 +21,7 @@ CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_NAND=y diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig index a740da9fc0d..d591c4a689c 100644 --- a/configs/dockstar_defconfig +++ b/configs/dockstar_defconfig @@ -21,6 +21,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="DockStar> " +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y CONFIG_CMD_USB=y diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index e972d3b1170..dcb7b3f78f7 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_SPL=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 # CONFIG_CMD_FLASH is not set diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index 3c9293d8b08..340d4f99f87 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -41,6 +41,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y +CONFIG_SYS_MAXARGS=64 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig index 5560a1ba184..12b92f3bc4a 100644 --- a/configs/dra7xx_hs_evm_usb_defconfig +++ b/configs/dra7xx_hs_evm_usb_defconfig @@ -41,6 +41,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SYS_MAXARGS=64 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set diff --git a/configs/draco_defconfig b/configs/draco_defconfig index 264a51b0739..531b2ef76a6 100644 --- a/configs/draco_defconfig +++ b/configs/draco_defconfig @@ -46,6 +46,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig index dc136f98612..2ea25d95a2a 100644 --- a/configs/dragonboard410c_defconfig +++ b/configs/dragonboard410c_defconfig @@ -19,6 +19,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="dragonboard410c => " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set CONFIG_CMD_MD5SUM=y CONFIG_CMD_MEMINFO=y diff --git a/configs/dragonboard820c_defconfig b/configs/dragonboard820c_defconfig index 3bd22aa34f0..58e3f039f82 100644 --- a/configs/dragonboard820c_defconfig +++ b/configs/dragonboard820c_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTARGS="console=ttyMSM0,115200n8" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="dragonboard820c => " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_MD5SUM=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_GPIO=y diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig index 5f9073d2e62..28ea27bf55e 100644 --- a/configs/dreamplug_defconfig +++ b/configs/dreamplug_defconfig @@ -21,6 +21,7 @@ CONFIG_BOOTCOMMAND="setenv ethact ethernet-controller@72000; ${x_bootcmd_etherne CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_SATA=y diff --git a/configs/ds109_defconfig b/configs/ds109_defconfig index 07d5dce51be..8c6a9740ad0 100644 --- a/configs/ds109_defconfig +++ b/configs/ds109_defconfig @@ -24,6 +24,7 @@ CONFIG_BOOTCOMMAND="setenv ethact egiga0; ${x_bootcmd_ethernet}; ${x_bootcmd_usb CONFIG_USE_PREBOOT=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig index 81a767cc0ea..e10b9d2de66 100644 --- a/configs/ds414_defconfig +++ b/configs/ds414_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTCOMMAND="sf probe; sf read ${loadaddr} 0xd0000 0x2d0000; sf read ${ra CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_I2C=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y diff --git a/configs/edison_defconfig b/configs/edison_defconfig index a9479e54a96..3f27a2f43df 100644 --- a/configs/edison_defconfig +++ b/configs/edison_defconfig @@ -14,6 +14,7 @@ CONFIG_SYS_MONITOR_BASE=0x01101000 CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=128 CONFIG_CMD_CPU=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig index 34b9fff5ded..2337b0f4535 100644 --- a/configs/etamin_defconfig +++ b/configs/etamin_defconfig @@ -47,6 +47,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set diff --git a/configs/ev-imx280-nano-x-mb_defconfig b/configs/ev-imx280-nano-x-mb_defconfig index 770f05f966d..864933842a6 100644 --- a/configs/ev-imx280-nano-x-mb_defconfig +++ b/configs/ev-imx280-nano-x-mb_defconfig @@ -8,6 +8,7 @@ CONFIG_DM_GPIO=y CONFIG_EV_IMX280_NANO_X_MB=y CONFIG_IMX_MODULE_FUSE=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/gardena-smart-gateway-mt7688_defconfig b/configs/gardena-smart-gateway-mt7688_defconfig index 314ab9fddfd..2e8a0425b96 100644 --- a/configs/gardena-smart-gateway-mt7688_defconfig +++ b/configs/gardena-smart-gateway-mt7688_defconfig @@ -39,6 +39,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_LICENSE=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/ge_b1x5v2_defconfig b/configs/ge_b1x5v2_defconfig index a1cf676f3f5..0096acae5ce 100644 --- a/configs/ge_b1x5v2_defconfig +++ b/configs/ge_b1x5v2_defconfig @@ -43,6 +43,7 @@ CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index 8cfe772f4ed..6d5496cde78 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -23,6 +23,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set diff --git a/configs/giedi_defconfig b/configs/giedi_defconfig index 4fbf7ebdcd9..0017a3505f2 100644 --- a/configs/giedi_defconfig +++ b/configs/giedi_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_CMD_EXPORTENV is not set diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig index 3d5fd830ebe..27b73740b25 100644 --- a/configs/goflexhome_defconfig +++ b/configs/goflexhome_defconfig @@ -21,6 +21,7 @@ CONFIG_USE_PREBOOT=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="GoFlexHome> " +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y CONFIG_CMD_SATA=y diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig index 89d78cfc175..57d66c65132 100644 --- a/configs/guruplug_defconfig +++ b/configs/guruplug_defconfig @@ -22,6 +22,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index 28a73fb304b..0bb8997001d 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -50,6 +50,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 CONFIG_SPL_POWER=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Ventana > " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_SPL_WRITE_SIZE=0x20000 CONFIG_CMD_UNZIP=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index 9deb080ca23..4a0c0620bcd 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -50,6 +50,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 CONFIG_SPL_POWER=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Ventana > " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_SPL_WRITE_SIZE=0x20000 CONFIG_CMD_UNZIP=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index 8ef794c21e4..16e94bc28ad 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -51,6 +51,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 CONFIG_SPL_POWER=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Ventana > " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_SPL_NAND_OFS=0x1100000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 diff --git a/configs/harmony_defconfig b/configs/harmony_defconfig index 9763b21a34b..245d9ded90d 100644 --- a/configs/harmony_defconfig +++ b/configs/harmony_defconfig @@ -13,6 +13,7 @@ CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra20 (Harmony) # " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig index 4dc9e3bc58d..3f648fb678e 100644 --- a/configs/helios4_defconfig +++ b/configs/helios4_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_I2C=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_TLV_EEPROM=y CONFIG_SPL_CMD_TLV_EEPROM=y # CONFIG_CMD_FLASH is not set diff --git a/configs/hihope_rzg2_defconfig b/configs/hihope_rzg2_defconfig index 3e1077389c2..48869f18f24 100644 --- a/configs/hihope_rzg2_defconfig +++ b/configs/hihope_rzg2_defconfig @@ -21,6 +21,7 @@ CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a774a1-hihope CONFIG_DEFAULT_FDT_FILE="r8a774a1-hihope-rzg2m.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/hikey_defconfig b/configs/hikey_defconfig index 6f33bba1eb6..379dd841818 100644 --- a/configs/hikey_defconfig +++ b/configs/hikey_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/mmcblk0p9 rw" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/huawei_hg556a_ram_defconfig b/configs/huawei_hg556a_ram_defconfig index fcded41eac5..32e6abc2d21 100644 --- a/configs/huawei_hg556a_ram_defconfig +++ b/configs/huawei_hg556a_ram_defconfig @@ -19,6 +19,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="HG556a # " +CONFIG_SYS_MAXARGS=24 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig index 61c5649f096..a2994b3510c 100644 --- a/configs/ib62x0_defconfig +++ b/configs/ib62x0_defconfig @@ -20,6 +20,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ib62x0 => " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig index 193160f8087..57d647f5d3e 100644 --- a/configs/iconnect_defconfig +++ b/configs/iconnect_defconfig @@ -22,6 +22,7 @@ CONFIG_USE_PREBOOT=y CONFIG_BOARD_LATE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="iConnect> " +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y CONFIG_CMD_PCI=y diff --git a/configs/igep00x0_defconfig b/configs/igep00x0_defconfig index f0d6ac56b6a..24d6502c066 100644 --- a/configs/igep00x0_defconfig +++ b/configs/igep00x0_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_ONENAND_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_SPL=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y diff --git a/configs/imx28_xea_defconfig b/configs/imx28_xea_defconfig index 63d6101bb89..4837209be10 100644 --- a/configs/imx28_xea_defconfig +++ b/configs/imx28_xea_defconfig @@ -48,6 +48,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/imx28_xea_sb_defconfig b/configs/imx28_xea_sb_defconfig index 97c7db04e12..91f046e2882 100644 --- a/configs/imx28_xea_sb_defconfig +++ b/configs/imx28_xea_sb_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_DMA=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/imx6dl_icore_nand_defconfig b/configs/imx6dl_icore_nand_defconfig index 0d7f8930144..577041794ac 100644 --- a/configs/imx6dl_icore_nand_defconfig +++ b/configs/imx6dl_icore_nand_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl> " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index f869539c0ce..23b6bf85b5e 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTDELAY=3 CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_SPL=y CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y diff --git a/configs/imx6q_icore_nand_defconfig b/configs/imx6q_icore_nand_defconfig index 67c5640cc1e..a14ecf629ba 100644 --- a/configs/imx6q_icore_nand_defconfig +++ b/configs/imx6q_icore_nand_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl> " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index 560733e6b21..ae454af7996 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="i.MX6 Logic # " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x1500000 CONFIG_CMD_SPL_WRITE_SIZE=0x00100000 diff --git a/configs/imx6qdl_icore_mipi_defconfig b/configs/imx6qdl_icore_mipi_defconfig index 4f7cc6c6aad..6a4bed2fd26 100644 --- a/configs/imx6qdl_icore_mipi_defconfig +++ b/configs/imx6qdl_icore_mipi_defconfig @@ -39,6 +39,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl-mipi> " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_SPL=y CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index 96f4603a260..e1815562483 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -42,6 +42,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl> " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_SPL=y CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index 67c5640cc1e..a14ecf629ba 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl> " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig index 7a0f932936d..ed7f3f3bdc5 100644 --- a/configs/imx6qdl_icore_rqs_defconfig +++ b/configs/imx6qdl_icore_rqs_defconfig @@ -36,6 +36,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl-rqs> " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_SPL=y CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig index 4b606f69867..a113ddaa595 100644 --- a/configs/imx6ul_geam_mmc_defconfig +++ b/configs/imx6ul_geam_mmc_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_RAW_IMAGE_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="geam6ul> " +CONFIG_SYS_MAXARGS=32 CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig index b3b13db5c4a..e6dd918c052 100644 --- a/configs/imx6ul_geam_nand_defconfig +++ b/configs/imx6ul_geam_nand_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="geam6ul> " +CONFIG_SYS_MAXARGS=32 CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig index 4fff94b957e..b7647aa721d 100644 --- a/configs/imx6ul_isiot_emmc_defconfig +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_RAW_IMAGE_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="isiotmx6ul> " +CONFIG_SYS_MAXARGS=32 CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig index 726a387acde..22387f3820d 100644 --- a/configs/imx6ul_isiot_nand_defconfig +++ b/configs/imx6ul_isiot_nand_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="isiotmx6ul> " +CONFIG_SYS_MAXARGS=32 CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/imx7_cm_defconfig b/configs/imx7_cm_defconfig index c22c4d570d4..80fe0e7178e 100644 --- a/configs/imx7_cm_defconfig +++ b/configs/imx7_cm_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_IMI is not set diff --git a/configs/imx8mm-cl-iot-gate-optee_defconfig b/configs/imx8mm-cl-iot-gate-optee_defconfig index 8b3d1b3ef1a..519d94de85f 100644 --- a/configs/imx8mm-cl-iot-gate-optee_defconfig +++ b/configs/imx8mm-cl-iot-gate-optee_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_EEPROM=y diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig index b418e86248f..adc653d4aaf 100644 --- a/configs/imx8mm-cl-iot-gate_defconfig +++ b/configs/imx8mm-cl-iot-gate_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_EEPROM=y diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig index 535ff6dcba5..9d4deccfc78 100644 --- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig +++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig @@ -28,6 +28,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_POWER=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig index 101d5a00bc7..e9c611cf121 100644 --- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig +++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig @@ -28,6 +28,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_POWER=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/imx8mm-mx8menlo_defconfig b/configs/imx8mm-mx8menlo_defconfig index a4164951de0..60b473e2706 100644 --- a/configs/imx8mm-mx8menlo_defconfig +++ b/configs/imx8mm-mx8menlo_defconfig @@ -41,6 +41,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="Verdin iMX8MM # " +CONFIG_SYS_MAXARGS=64 # CONFIG_BOOTM_NETBSD is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_EXPORTENV is not set diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig index 9cd8ac97285..7e3b95ead99 100644 --- a/configs/imx8mm_beacon_defconfig +++ b/configs/imx8mm_beacon_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/imx8mm_data_modul_edm_sbc_defconfig b/configs/imx8mm_data_modul_edm_sbc_defconfig index d55efa6d00e..6484ce15ec7 100644 --- a/configs/imx8mm_data_modul_edm_sbc_defconfig +++ b/configs/imx8mm_data_modul_edm_sbc_defconfig @@ -54,6 +54,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_SYS_MAXARGS=64 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index ec3206bd640..08f62b99189 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig index 0165a4e5df0..cdb6ef37bef 100644 --- a/configs/imx8mm_venice_defconfig +++ b/configs/imx8mm_venice_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CRC32_VERIFY=y diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig index 145f96d491d..593b8035013 100644 --- a/configs/imx8mn_beacon_2g_defconfig +++ b/configs/imx8mn_beacon_2g_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_SYS_MAXARGS=64 # CONFIG_BOOTM_NETBSD is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig index 9052e68e967..9b7da660d4c 100644 --- a/configs/imx8mn_beacon_defconfig +++ b/configs/imx8mn_beacon_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_SYS_MAXARGS=64 # CONFIG_BOOTM_NETBSD is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/imx8mn_bsh_smm_s2_defconfig b/configs/imx8mn_bsh_smm_s2_defconfig index 49f42530015..a1f461618f3 100644 --- a/configs/imx8mn_bsh_smm_s2_defconfig +++ b/configs/imx8mn_bsh_smm_s2_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="> " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_FUSE=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y diff --git a/configs/imx8mn_bsh_smm_s2pro_defconfig b/configs/imx8mn_bsh_smm_s2pro_defconfig index 52661ec1689..a3652eb7416 100644 --- a/configs/imx8mn_bsh_smm_s2pro_defconfig +++ b/configs/imx8mn_bsh_smm_s2pro_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="> " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_FUSE=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig index bc1cfa4bbd5..9aa2757ba28 100644 --- a/configs/imx8mn_ddr4_evk_defconfig +++ b/configs/imx8mn_ddr4_evk_defconfig @@ -32,6 +32,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CMD_ERASEENV=y diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig index c18c19fa140..d9b43f1798f 100644 --- a/configs/imx8mn_evk_defconfig +++ b/configs/imx8mn_evk_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CMD_ERASEENV=y diff --git a/configs/imx8mn_var_som_defconfig b/configs/imx8mn_var_som_defconfig index 5ec82f2a926..d4930b10707 100644 --- a/configs/imx8mn_var_som_defconfig +++ b/configs/imx8mn_var_som_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="> " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_FUSE=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig index 63a65497371..35549aaaf8a 100644 --- a/configs/imx8mn_venice_defconfig +++ b/configs/imx8mn_venice_defconfig @@ -38,6 +38,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CRC32_VERIFY=y diff --git a/configs/imx8mp_dhcom_pdk2_defconfig b/configs/imx8mp_dhcom_pdk2_defconfig index 2764152a919..51181470a4b 100644 --- a/configs/imx8mp_dhcom_pdk2_defconfig +++ b/configs/imx8mp_dhcom_pdk2_defconfig @@ -54,6 +54,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_SYS_MAXARGS=64 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index c3ffed85998..90a6f39e8b5 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/imx8mp_rsb3720a1_4G_defconfig b/configs/imx8mp_rsb3720a1_4G_defconfig index 323a7eacdca..5a47b9239d8 100644 --- a/configs/imx8mp_rsb3720a1_4G_defconfig +++ b/configs/imx8mp_rsb3720a1_4G_defconfig @@ -43,6 +43,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/imx8mp_rsb3720a1_6G_defconfig b/configs/imx8mp_rsb3720a1_6G_defconfig index 3feb6396d5f..934e14cf30f 100644 --- a/configs/imx8mp_rsb3720a1_6G_defconfig +++ b/configs/imx8mp_rsb3720a1_6G_defconfig @@ -43,6 +43,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/imx8mp_venice_defconfig b/configs/imx8mp_venice_defconfig index 6758cd251e6..6d1f48d098e 100644 --- a/configs/imx8mp_venice_defconfig +++ b/configs/imx8mp_venice_defconfig @@ -38,6 +38,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CRC32_VERIFY=y diff --git a/configs/imx8mq_cm_defconfig b/configs/imx8mq_cm_defconfig index 8e024604378..4155a471b5a 100644 --- a/configs/imx8mq_cm_defconfig +++ b/configs/imx8mq_cm_defconfig @@ -32,6 +32,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index 9f54a280d9b..05d81f958e5 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_SYS_MAXARGS=64 # CONFIG_BOOTM_NETBSD is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/imx8mq_phanbell_defconfig b/configs/imx8mq_phanbell_defconfig index 095e42e6ba1..81ea5108805 100644 --- a/configs/imx8mq_phanbell_defconfig +++ b/configs/imx8mq_phanbell_defconfig @@ -37,6 +37,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 # CONFIG_BOOTM_NETBSD is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index 43f42f7a58a..23f9e3a35a1 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -34,6 +34,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 CONFIG_SPL_POWER_DOMAIN=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_CMD_EXPORTENV is not set diff --git a/configs/imx8ulp_evk_defconfig b/configs/imx8ulp_evk_defconfig index f47c8016611..094622a8b24 100644 --- a/configs/imx8ulp_evk_defconfig +++ b/configs/imx8ulp_evk_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_MEMTEST=y CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig index 2b41fc1ba19..bef1912d5bb 100644 --- a/configs/inetspace_v2_defconfig +++ b/configs/inetspace_v2_defconfig @@ -27,6 +27,7 @@ CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4 CONFIG_CMD_I2C=y diff --git a/configs/iot2050_defconfig b/configs/iot2050_defconfig index 175ec70915d..089b98c7046 100644 --- a/configs/iot2050_defconfig +++ b/configs/iot2050_defconfig @@ -45,6 +45,7 @@ CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_SYS_PROMPT="IOT2050> " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y CONFIG_CMD_GPT=y diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig index 3eba6984476..f90a184c63f 100644 --- a/configs/j7200_evm_a72_defconfig +++ b/configs/j7200_evm_a72_defconfig @@ -55,6 +55,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig index 0f4b006b80b..4883e8a1899 100644 --- a/configs/j7200_evm_r5_defconfig +++ b/configs/j7200_evm_r5_defconfig @@ -55,6 +55,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPT=y diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index 931abf5e597..90805e43a91 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -50,6 +50,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index 6553212de85..c7899fcddd1 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -53,6 +53,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPT=y diff --git a/configs/j721e_hs_evm_a72_defconfig b/configs/j721e_hs_evm_a72_defconfig index 7c826e8d31f..ae2865b3033 100644 --- a/configs/j721e_hs_evm_a72_defconfig +++ b/configs/j721e_hs_evm_a72_defconfig @@ -44,6 +44,7 @@ CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set diff --git a/configs/j721e_hs_evm_r5_defconfig b/configs/j721e_hs_evm_r5_defconfig index 11b6e1e5606..7a5867bb7d2 100644 --- a/configs/j721e_hs_evm_r5_defconfig +++ b/configs/j721e_hs_evm_r5_defconfig @@ -48,6 +48,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig index 0023f73d9e8..6bb2e6a3187 100644 --- a/configs/j721s2_evm_a72_defconfig +++ b/configs/j721s2_evm_a72_defconfig @@ -56,6 +56,7 @@ CONFIG_SPL_THERMAL=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig index 4147b4e26c7..57f6c7bdfea 100644 --- a/configs/j721s2_evm_r5_defconfig +++ b/configs/j721s2_evm_r5_defconfig @@ -62,6 +62,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPT=y diff --git a/configs/jethub_j100_defconfig b/configs/jethub_j100_defconfig index 63c5329398f..d0070bbb225 100644 --- a/configs/jethub_j100_defconfig +++ b/configs/jethub_j100_defconfig @@ -17,6 +17,7 @@ CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_EEPROM=y diff --git a/configs/jethub_j80_defconfig b/configs/jethub_j80_defconfig index 8746ed9c80f..d750b8a07cd 100644 --- a/configs/jethub_j80_defconfig +++ b/configs/jethub_j80_defconfig @@ -18,6 +18,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_EEPROM=y diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig index 425b123ba1d..b06b48b2c70 100644 --- a/configs/jetson-tk1_defconfig +++ b/configs/jetson-tk1_defconfig @@ -15,6 +15,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra124 (Jetson TK1) # " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index 17b83d3b343..5de27f06bad 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_POWER=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 +CONFIG_SYS_MAXARGS=64 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=20 diff --git a/configs/k2e_hs_evm_defconfig b/configs/k2e_hs_evm_defconfig index a4efc4f85cc..25f22937157 100644 --- a/configs/k2e_hs_evm_defconfig +++ b/configs/k2e_hs_evm_defconfig @@ -20,6 +20,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run run_mon_hs; run init_${boot}; run get_fit_${boot}; bootm ${addr_fit}#${name_fdt}" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_MAXARGS=64 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=20 diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index db21695da52..fc33225bac7 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_NAND_BASE=y CONFIG_SPL_POWER=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 +CONFIG_SYS_MAXARGS=64 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=20 diff --git a/configs/k2g_hs_evm_defconfig b/configs/k2g_hs_evm_defconfig index f74af6de3ff..2767cd82db0 100644 --- a/configs/k2g_hs_evm_defconfig +++ b/configs/k2g_hs_evm_defconfig @@ -19,6 +19,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run envboot; run run_mon_hs; run init_${boot}; run get_fit_${boot}; bootm ${addr_fit}#${name_fdt}" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_MAXARGS=64 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=20 diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index 754fed7c3cc..206bccdbbd6 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_POWER=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 +CONFIG_SYS_MAXARGS=64 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=20 diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig index 8f659cdfc82..af56223f662 100644 --- a/configs/k2hk_hs_evm_defconfig +++ b/configs/k2hk_hs_evm_defconfig @@ -20,6 +20,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run run_mon_hs; run init_${boot}; run get_fit_${boot}; bootm ${addr_fit}#${name_fdt}" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_MAXARGS=64 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=20 diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index 4f13da8da4e..3fcca0100d1 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_POWER=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 +CONFIG_SYS_MAXARGS=64 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=20 diff --git a/configs/k2l_hs_evm_defconfig b/configs/k2l_hs_evm_defconfig index d863e40fd1a..2e46eac3d77 100644 --- a/configs/k2l_hs_evm_defconfig +++ b/configs/k2l_hs_evm_defconfig @@ -21,6 +21,7 @@ CONFIG_BOOTCOMMAND="run run_mon_hs; run init_${boot}; run get_fit_${boot}; bootm CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=20 diff --git a/configs/khadas-vim2_defconfig b/configs/khadas-vim2_defconfig index 8345e47bddb..5e3822cf493 100644 --- a/configs/khadas-vim2_defconfig +++ b/configs/khadas-vim2_defconfig @@ -16,6 +16,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_ADC=y diff --git a/configs/khadas-vim3_android_ab_defconfig b/configs/khadas-vim3_android_ab_defconfig index df97c519fec..08f41f3689d 100644 --- a/configs/khadas-vim3_android_ab_defconfig +++ b/configs/khadas-vim3_android_ab_defconfig @@ -19,6 +19,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_MISC_INIT_R=y CONFIG_AVB_VERIFY=y CONFIG_ANDROID_AB=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set CONFIG_CMD_ADTIMG=y CONFIG_CMD_ABOOTIMG=y diff --git a/configs/khadas-vim3_android_defconfig b/configs/khadas-vim3_android_defconfig index 299150cf207..355f95bb05a 100644 --- a/configs/khadas-vim3_android_defconfig +++ b/configs/khadas-vim3_android_defconfig @@ -18,6 +18,7 @@ CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y CONFIG_AVB_VERIFY=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set CONFIG_CMD_ADTIMG=y CONFIG_CMD_ABOOTIMG=y diff --git a/configs/khadas-vim3_defconfig b/configs/khadas-vim3_defconfig index 75ccfba2aea..0af85e2bfbf 100644 --- a/configs/khadas-vim3_defconfig +++ b/configs/khadas-vim3_defconfig @@ -16,6 +16,7 @@ CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y diff --git a/configs/khadas-vim3l_android_ab_defconfig b/configs/khadas-vim3l_android_ab_defconfig index 615f2d9b6c0..2afd1afa9b3 100644 --- a/configs/khadas-vim3l_android_ab_defconfig +++ b/configs/khadas-vim3l_android_ab_defconfig @@ -19,6 +19,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_MISC_INIT_R=y CONFIG_AVB_VERIFY=y CONFIG_ANDROID_AB=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set CONFIG_CMD_ADTIMG=y CONFIG_CMD_ABOOTIMG=y diff --git a/configs/khadas-vim3l_android_defconfig b/configs/khadas-vim3l_android_defconfig index ad4eb281f15..ef30a628d00 100644 --- a/configs/khadas-vim3l_android_defconfig +++ b/configs/khadas-vim3l_android_defconfig @@ -18,6 +18,7 @@ CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y CONFIG_AVB_VERIFY=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set CONFIG_CMD_ADTIMG=y CONFIG_CMD_ABOOTIMG=y diff --git a/configs/khadas-vim3l_defconfig b/configs/khadas-vim3l_defconfig index 2e1eabca652..506df51c9d8 100644 --- a/configs/khadas-vim3l_defconfig +++ b/configs/khadas-vim3l_defconfig @@ -16,6 +16,7 @@ CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y diff --git a/configs/khadas-vim_defconfig b/configs/khadas-vim_defconfig index e450d27244a..6b4a40334ed 100644 --- a/configs/khadas-vim_defconfig +++ b/configs/khadas-vim_defconfig @@ -16,6 +16,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_ADC=y diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig index ce872c14908..ddfa8ba99bd 100644 --- a/configs/km_kirkwood_128m16_defconfig +++ b/configs/km_kirkwood_128m16_defconfig @@ -22,6 +22,7 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig index 26be327e226..434d1b26018 100644 --- a/configs/km_kirkwood_defconfig +++ b/configs/km_kirkwood_defconfig @@ -22,6 +22,7 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig index 493b16d4cda..a886dfe6a80 100644 --- a/configs/km_kirkwood_pci_defconfig +++ b/configs/km_kirkwood_pci_defconfig @@ -23,6 +23,7 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig index e90c2387901..06392326942 100644 --- a/configs/kmcent2_defconfig +++ b/configs/kmcent2_defconfig @@ -23,6 +23,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_DM=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig index 00c98483b30..c1920d96f3d 100644 --- a/configs/kmcoge5ne_defconfig +++ b/configs/kmcoge5ne_defconfig @@ -168,6 +168,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig index 1cb21c243b5..80e829ca3c6 100644 --- a/configs/kmcoge5un_defconfig +++ b/configs/kmcoge5un_defconfig @@ -25,6 +25,7 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig index ae29991c492..9fc8f0ae999 100644 --- a/configs/kmeter1_defconfig +++ b/configs/kmeter1_defconfig @@ -138,6 +138,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig index b3855915b86..ede5f9bfa45 100644 --- a/configs/kmnusa_defconfig +++ b/configs/kmnusa_defconfig @@ -26,6 +26,7 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig index 45bc3eb3b4d..24f2435806e 100644 --- a/configs/kmopti2_defconfig +++ b/configs/kmopti2_defconfig @@ -151,6 +151,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig index 08d217986d7..a76291d1094 100644 --- a/configs/kmsupx5_defconfig +++ b/configs/kmsupx5_defconfig @@ -131,6 +131,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kmsuse2_defconfig b/configs/kmsuse2_defconfig index 25ae6a4b2ca..fac49711ac9 100644 --- a/configs/kmsuse2_defconfig +++ b/configs/kmsuse2_defconfig @@ -27,6 +27,7 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set diff --git a/configs/kmtegr1_defconfig b/configs/kmtegr1_defconfig index a752672ead1..5a7f0a9ebf2 100644 --- a/configs/kmtegr1_defconfig +++ b/configs/kmtegr1_defconfig @@ -130,6 +130,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig index a0cca5b9f28..639adf95de1 100644 --- a/configs/kmtepr2_defconfig +++ b/configs/kmtepr2_defconfig @@ -151,6 +151,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kontron-sl-mx6ul_defconfig b/configs/kontron-sl-mx6ul_defconfig index 11e4e956c8e..2712d4b177e 100644 --- a/configs/kontron-sl-mx6ul_defconfig +++ b/configs/kontron-sl-mx6ul_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig index 9c9aac369d6..bdc39542f2e 100644 --- a/configs/kp_imx6q_tpc_defconfig +++ b/configs/kp_imx6q_tpc_defconfig @@ -29,6 +29,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SPL_RAW_IMAGE_SUPPORT=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_ELF is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/libretech-ac_defconfig b/configs/libretech-ac_defconfig index 1e51b7a6537..a12e4ade37f 100644 --- a/configs/libretech-ac_defconfig +++ b/configs/libretech-ac_defconfig @@ -20,6 +20,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_ADC=y diff --git a/configs/libretech-cc_defconfig b/configs/libretech-cc_defconfig index 5506f386f2e..15f18c50972 100644 --- a/configs/libretech-cc_defconfig +++ b/configs/libretech-cc_defconfig @@ -15,6 +15,7 @@ CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_ADC=y diff --git a/configs/libretech-cc_v2_defconfig b/configs/libretech-cc_v2_defconfig index a3fb6bbbda2..26a9df2447c 100644 --- a/configs/libretech-cc_v2_defconfig +++ b/configs/libretech-cc_v2_defconfig @@ -19,6 +19,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y diff --git a/configs/libretech-s905d-pc_defconfig b/configs/libretech-s905d-pc_defconfig index 8ee69ca5ec8..a9c0a5ffe59 100644 --- a/configs/libretech-s905d-pc_defconfig +++ b/configs/libretech-s905d-pc_defconfig @@ -19,6 +19,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_ADC=y diff --git a/configs/libretech-s912-pc_defconfig b/configs/libretech-s912-pc_defconfig index 224a3fb02fc..5c9f5218a87 100644 --- a/configs/libretech-s912-pc_defconfig +++ b/configs/libretech-s912-pc_defconfig @@ -18,6 +18,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_ADC=y diff --git a/configs/linkit-smart-7688_defconfig b/configs/linkit-smart-7688_defconfig index 52e5524726f..6746c6cda31 100644 --- a/configs/linkit-smart-7688_defconfig +++ b/configs/linkit-smart-7688_defconfig @@ -31,6 +31,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_LICENSE=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/liteboard_defconfig b/configs/liteboard_defconfig index bf700dffb7f..c78ffab48df 100644 --- a/configs/liteboard_defconfig +++ b/configs/liteboard_defconfig @@ -26,6 +26,7 @@ CONFIG_DEFAULT_FDT_FILE="imx6ul-liteboard.dtb" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/ls1012a2g5rdb_qspi_defconfig b/configs/ls1012a2g5rdb_qspi_defconfig index cb9ad24b122..f39d860a0cb 100644 --- a/configs/ls1012a2g5rdb_qspi_defconfig +++ b/configs/ls1012a2g5rdb_qspi_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="run distro_bootcmd; run qspi_bootcmd; env exists secureboot && esbc_halt;" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1012a2g5rdb_tfa_defconfig b/configs/ls1012a2g5rdb_tfa_defconfig index 8763e0d7b04..b54a3888d07 100644 --- a/configs/ls1012a2g5rdb_tfa_defconfig +++ b/configs/ls1012a2g5rdb_tfa_defconfig @@ -26,6 +26,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1012afrdm_qspi_defconfig b/configs/ls1012afrdm_qspi_defconfig index fa3486cfbb7..7e623b3d11f 100644 --- a/configs/ls1012afrdm_qspi_defconfig +++ b/configs/ls1012afrdm_qspi_defconfig @@ -25,6 +25,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="run distro_bootcmd;run qspi_bootcmd" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1012afrdm_tfa_defconfig b/configs/ls1012afrdm_tfa_defconfig index a56a27bfc29..adc0bf95033 100644 --- a/configs/ls1012afrdm_tfa_defconfig +++ b/configs/ls1012afrdm_tfa_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig index e25d964124c..1e9f044f9a2 100644 --- a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig @@ -24,6 +24,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="run distro_bootcmd; run sd_bootcmd; env exists secureboot && esbc_halt;" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1012afrwy_qspi_defconfig b/configs/ls1012afrwy_qspi_defconfig index e0ae291872c..db2feb4d0a2 100644 --- a/configs/ls1012afrwy_qspi_defconfig +++ b/configs/ls1012afrwy_qspi_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="run distro_bootcmd; run sd_bootcmd; env exists secureboot && esbc_halt;" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig index 56ddeaaf4d6..c7aea79ef57 100644 --- a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig @@ -24,6 +24,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1012afrwy_tfa_defconfig b/configs/ls1012afrwy_tfa_defconfig index 4d718cd44ea..7d892a33f3c 100644 --- a/configs/ls1012afrwy_tfa_defconfig +++ b/configs/ls1012afrwy_tfa_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig index eedb895c6b3..c31576256aa 100644 --- a/configs/ls1012aqds_qspi_defconfig +++ b/configs/ls1012aqds_qspi_defconfig @@ -29,6 +29,7 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd; run qspi_bootcmd; env exists secureboot CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 diff --git a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig index fa847f3844f..9261a6dd90e 100644 --- a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig @@ -28,6 +28,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 diff --git a/configs/ls1012aqds_tfa_defconfig b/configs/ls1012aqds_tfa_defconfig index 295d27173ea..bc7b349cc5b 100644 --- a/configs/ls1012aqds_tfa_defconfig +++ b/configs/ls1012aqds_tfa_defconfig @@ -30,6 +30,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig index eccaf131604..2113c1312a5 100644 --- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig @@ -25,6 +25,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="run distro_bootcmd; run qspi_bootcmd; env exists secureboot && esbc_halt;" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1012ardb_qspi_defconfig b/configs/ls1012ardb_qspi_defconfig index d9293d3e243..963d23534ab 100644 --- a/configs/ls1012ardb_qspi_defconfig +++ b/configs/ls1012ardb_qspi_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="run distro_bootcmd; run qspi_bootcmd; env exists secureboot && esbc_halt;" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig index 8397c499896..6b092efdc5e 100644 --- a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_USE_BOOTCOMMAND is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1012ardb_tfa_defconfig b/configs/ls1012ardb_tfa_defconfig index 82ccb856c3a..9b974818d6f 100644 --- a/configs/ls1012ardb_tfa_defconfig +++ b/configs/ls1012ardb_tfa_defconfig @@ -26,6 +26,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig index 2e4db036a44..7004285f354 100644 --- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig @@ -29,6 +29,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M" CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig index 556f77e2225..2f383beacea 100644 --- a/configs/ls1028aqds_tfa_defconfig +++ b/configs/ls1028aqds_tfa_defconfig @@ -31,6 +31,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M" CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1028aqds_tfa_lpuart_defconfig b/configs/ls1028aqds_tfa_lpuart_defconfig index 2adb28c89d1..e884a677eec 100644 --- a/configs/ls1028aqds_tfa_lpuart_defconfig +++ b/configs/ls1028aqds_tfa_lpuart_defconfig @@ -30,6 +30,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M" CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig index 20cb844b01f..72625e1acf5 100644 --- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig @@ -28,6 +28,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M" CONFIG_ID_EEPROM=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig index fdfdf39c619..080f53a8ffd 100644 --- a/configs/ls1028ardb_tfa_defconfig +++ b/configs/ls1028ardb_tfa_defconfig @@ -30,6 +30,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M" CONFIG_ID_EEPROM=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index 49ed96365e9..f931a9c4cb3 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -36,6 +36,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig index bd5c5f7fea6..2d44d1e834e 100644 --- a/configs/ls1043aqds_lpuart_defconfig +++ b/configs/ls1043aqds_lpuart_defconfig @@ -36,6 +36,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index aba4a1e98a0..b42b161613b 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -53,6 +53,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig index 9c1886b6ffb..ab987667074 100644 --- a/configs/ls1043aqds_nor_ddr3_defconfig +++ b/configs/ls1043aqds_nor_ddr3_defconfig @@ -36,6 +36,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig index 1c7b27e3d7e..d0adc19cc3b 100644 --- a/configs/ls1043aqds_qspi_defconfig +++ b/configs/ls1043aqds_qspi_defconfig @@ -37,6 +37,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index 699ac5b1050..4a6d32d55b2 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -53,6 +53,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index 78ff90d19e0..391a0c62493 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -53,6 +53,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig index 6f920ef8a88..40fbddd8719 100644 --- a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig @@ -35,6 +35,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1043aqds_tfa_defconfig b/configs/ls1043aqds_tfa_defconfig index 031b5d8e753..37cdeeb7612 100644 --- a/configs/ls1043aqds_tfa_defconfig +++ b/configs/ls1043aqds_tfa_defconfig @@ -38,6 +38,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index 65c336984e7..4b680d0bca0 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -23,6 +23,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig index c617716c53c..c06889232ce 100644 --- a/configs/ls1043ardb_defconfig +++ b/configs/ls1043ardb_defconfig @@ -25,6 +25,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd; env exists secureboot && esbc_halt;" CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index 750cc548998..41c53d935ff 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index 78195de5ff1..ff699158447 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -43,6 +43,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index 69d8d43c93d..20671c303a8 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -36,6 +36,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_IMLS=y CONFIG_CMD_SPL=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index b05731df925..0e48737e0c8 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -42,6 +42,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_IMLS=y CONFIG_CMD_SPL=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig index b08ba4f5c63..aeff6575008 100644 --- a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig @@ -24,6 +24,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y diff --git a/configs/ls1043ardb_tfa_defconfig b/configs/ls1043ardb_tfa_defconfig index 90623a7df99..b5a3e55c16f 100644 --- a/configs/ls1043ardb_tfa_defconfig +++ b/configs/ls1043ardb_tfa_defconfig @@ -27,6 +27,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y diff --git a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig index fddb02e556a..3b303aafc00 100644 --- a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig @@ -22,6 +22,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/ls1046afrwy_tfa_defconfig b/configs/ls1046afrwy_tfa_defconfig index 23ceb185f49..9ca48af1f05 100644 --- a/configs/ls1046afrwy_tfa_defconfig +++ b/configs/ls1046afrwy_tfa_defconfig @@ -26,6 +26,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig index 902c14c7354..3e61619c25f 100644 --- a/configs/ls1046aqds_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_SECURE_BOOT_defconfig @@ -34,6 +34,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd; env exists secureboot && esbc_halt;;" CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig index f9616ef82dd..b9bcfe47a2d 100644 --- a/configs/ls1046aqds_defconfig +++ b/configs/ls1046aqds_defconfig @@ -36,6 +36,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd; env exists secureboot && esbc_halt;;" CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig index d1538829d1d..60685c57948 100644 --- a/configs/ls1046aqds_lpuart_defconfig +++ b/configs/ls1046aqds_lpuart_defconfig @@ -36,6 +36,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd; env exists secureboot && esbc_halt;;" CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig index b804ac41092..8fdcc67f32c 100644 --- a/configs/ls1046aqds_nand_defconfig +++ b/configs/ls1046aqds_nand_defconfig @@ -54,6 +54,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig index cb8a7a219ba..778f82049b5 100644 --- a/configs/ls1046aqds_qspi_defconfig +++ b/configs/ls1046aqds_qspi_defconfig @@ -37,6 +37,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd; env exists secureboot && esbc_halt;;" CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index 48e58f6c103..f2bbed2a2eb 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -54,6 +54,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index bc548848245..c6f83f885a4 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -54,6 +54,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig index e96cda3cef6..4b04b2a4def 100644 --- a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig @@ -35,6 +35,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1046aqds_tfa_defconfig b/configs/ls1046aqds_tfa_defconfig index 633399afc7b..6006d5a83f5 100644 --- a/configs/ls1046aqds_tfa_defconfig +++ b/configs/ls1046aqds_tfa_defconfig @@ -38,6 +38,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig index 2c6772d28f6..678c703c789 100644 --- a/configs/ls1046ardb_emmc_defconfig +++ b/configs/ls1046ardb_emmc_defconfig @@ -44,6 +44,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=64 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig index b7ace80367b..a5e2ced67d7 100644 --- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig @@ -29,6 +29,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_BOOTCOMMAND="run distro_bootcmd; run qspi_bootcmd; env exists secureboot && esbc_halt;;" CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig index 78acce163bf..a7297441954 100644 --- a/configs/ls1046ardb_qspi_defconfig +++ b/configs/ls1046ardb_qspi_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="run distro_bootcmd; run qspi_bootcmd; env exists secureboot && esbc_halt;;" CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig index 9d43c35439b..b32319d9626 100644 --- a/configs/ls1046ardb_qspi_spl_defconfig +++ b/configs/ls1046ardb_qspi_spl_defconfig @@ -48,6 +48,7 @@ CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_SYS_OS_BASE=0x40980000 CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_SPL=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig index af30b022c80..a3825646bb9 100644 --- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -41,6 +41,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=64 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig index 40e343c2997..44b2ebf3e4f 100644 --- a/configs/ls1046ardb_sdcard_defconfig +++ b/configs/ls1046ardb_sdcard_defconfig @@ -44,6 +44,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=64 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y diff --git a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig index 369b80a18df..7351c5c844c 100644 --- a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y diff --git a/configs/ls1046ardb_tfa_defconfig b/configs/ls1046ardb_tfa_defconfig index f126cb7036e..0cdbc90d0e7 100644 --- a/configs/ls1046ardb_tfa_defconfig +++ b/configs/ls1046ardb_tfa_defconfig @@ -29,6 +29,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y diff --git a/configs/ls1088aqds_defconfig b/configs/ls1088aqds_defconfig index d1a6dc5ac45..c3990d68d9b 100644 --- a/configs/ls1088aqds_defconfig +++ b/configs/ls1088aqds_defconfig @@ -35,6 +35,7 @@ CONFIG_BOOTCOMMAND="fsl_mc lazyapply dpl 0x580d00000 && cp.b $kernel_start $kern CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig index 130af4a7fbf..2f29658840d 100644 --- a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig @@ -34,6 +34,7 @@ CONFIG_BOOTCOMMAND="sf probe 0:0;sf read 0x80001000 0xd00000 0x100000; fsl_mc la # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1088aqds_qspi_defconfig b/configs/ls1088aqds_qspi_defconfig index eb3e51343e8..e721208662b 100644 --- a/configs/ls1088aqds_qspi_defconfig +++ b/configs/ls1088aqds_qspi_defconfig @@ -36,6 +36,7 @@ CONFIG_BOOTCOMMAND="sf probe 0:0;sf read 0x80001000 0xd00000 0x100000; fsl_mc la # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig index 9725bbe3014..28bd446ccdf 100644 --- a/configs/ls1088aqds_sdcard_ifc_defconfig +++ b/configs/ls1088aqds_sdcard_ifc_defconfig @@ -45,6 +45,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig index 0c7a465f3bf..07ded3fe5e8 100644 --- a/configs/ls1088aqds_sdcard_qspi_defconfig +++ b/configs/ls1088aqds_sdcard_qspi_defconfig @@ -45,6 +45,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1088aqds_tfa_defconfig b/configs/ls1088aqds_tfa_defconfig index fcd4757ab2e..b3ac59d5155 100644 --- a/configs/ls1088aqds_tfa_defconfig +++ b/configs/ls1088aqds_tfa_defconfig @@ -38,6 +38,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig index 4373a7bb84f..f2eb917fc6e 100644 --- a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig @@ -35,6 +35,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1088ardb_qspi_defconfig b/configs/ls1088ardb_qspi_defconfig index 7d6340997f5..45c8717aaf7 100644 --- a/configs/ls1088ardb_qspi_defconfig +++ b/configs/ls1088ardb_qspi_defconfig @@ -37,6 +37,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig index 279e756f0f2..4b95e40d567 100644 --- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig @@ -45,6 +45,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig index cb390573a25..44ac8193e57 100644 --- a/configs/ls1088ardb_sdcard_qspi_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_defconfig @@ -46,6 +46,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig index 42094a6b140..5331cbc6e5b 100644 --- a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig @@ -36,6 +36,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1088ardb_tfa_defconfig b/configs/ls1088ardb_tfa_defconfig index 364fe1882ee..944d90279bb 100644 --- a/configs/ls1088ardb_tfa_defconfig +++ b/configs/ls1088ardb_tfa_defconfig @@ -38,6 +38,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig index ff0550db53f..59a6d4d1dc0 100644 --- a/configs/ls2080aqds_SECURE_BOOT_defconfig +++ b/configs/ls2080aqds_SECURE_BOOT_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load" CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig index 97eebb72748..bdea6bb204a 100644 --- a/configs/ls2080aqds_defconfig +++ b/configs/ls2080aqds_defconfig @@ -26,6 +26,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load" CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index e7b2cc4c802..df5b1d6ffd0 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig index faa8f713b31..daff6f788a3 100644 --- a/configs/ls2080aqds_qspi_defconfig +++ b/configs/ls2080aqds_qspi_defconfig @@ -26,6 +26,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load" CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig index 843c1e72ac7..084b2b9e362 100644 --- a/configs/ls2080aqds_sdcard_defconfig +++ b/configs/ls2080aqds_sdcard_defconfig @@ -37,6 +37,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_I2C=y diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig index 0a36c795c81..429dfd722c1 100644 --- a/configs/ls2080ardb_SECURE_BOOT_defconfig +++ b/configs/ls2080ardb_SECURE_BOOT_defconfig @@ -30,6 +30,7 @@ CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="env exists mcinitcmd && env exists secureboot && esbc_validate 0x5806C0000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x580d00000;run distro_bootcmd;run nor_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig index 1001618f635..72a2b3ba9b2 100644 --- a/configs/ls2080ardb_defconfig +++ b/configs/ls2080ardb_defconfig @@ -31,6 +31,7 @@ CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="env exists mcinitcmd && env exists secureboot && esbc_validate 0x5806C0000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x580d00000;run distro_bootcmd;run nor_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index 505cdc19a3a..52f495fdb48 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -41,6 +41,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig index dee04065025..ca69a46043b 100644 --- a/configs/ls2081ardb_defconfig +++ b/configs/ls2081ardb_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x806c0000 0x6c0000 0x40000; env exists mcinitcmd && env exists secureboot && esbc_validate 0x806C0000; sf read 0x80d00000 0xd00000 0x100000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x80d00000; run distro_bootcmd;run qspi_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_GPT=y diff --git a/configs/ls2088aqds_tfa_defconfig b/configs/ls2088aqds_tfa_defconfig index cd535babb54..11d7a5177bc 100644 --- a/configs/ls2088aqds_tfa_defconfig +++ b/configs/ls2088aqds_tfa_defconfig @@ -29,6 +29,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig index 540d8e0f041..35d769a3812 100644 --- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig @@ -29,6 +29,7 @@ CONFIG_BOOTDELAY=10 CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x806c0000 0x6c0000 0x40000; env exists mcinitcmd && env exists secureboot && esbc_validate 0x806C0000; sf read 0x80d00000 0xd00000 0x100000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x80d00000; run distro_bootcmd;run qspi_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig index df0244a8e5c..cc4a11baaa6 100644 --- a/configs/ls2088ardb_qspi_defconfig +++ b/configs/ls2088ardb_qspi_defconfig @@ -33,6 +33,7 @@ CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x806c0000 0x6c0000 0x40000; env exists mcinitcmd && env exists secureboot && esbc_validate 0x806C0000; sf read 0x80d00000 0xd00000 0x100000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x80d00000; run distro_bootcmd;run qspi_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y diff --git a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig index 2740f0c698e..3a533689f4b 100644 --- a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig @@ -33,6 +33,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/ls2088ardb_tfa_defconfig b/configs/ls2088ardb_tfa_defconfig index 004c557923a..5808f3df1e0 100644 --- a/configs/ls2088ardb_tfa_defconfig +++ b/configs/ls2088ardb_tfa_defconfig @@ -35,6 +35,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig index 181fb3e3458..2ac5266b00c 100644 --- a/configs/lschlv2_defconfig +++ b/configs/lschlv2_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set CONFIG_CMD_SATA=y CONFIG_CMD_SPI=y diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig index 8c92ba2d2d2..fa4aeccedec 100644 --- a/configs/lsxhl_defconfig +++ b/configs/lsxhl_defconfig @@ -27,6 +27,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set CONFIG_CMD_SATA=y CONFIG_CMD_SPI=y diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig index f00d21fcc1e..03a3c84ddaa 100644 --- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig @@ -34,6 +34,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x2 CONFIG_BOARD_EARLY_INIT_R=y CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig index 32ea3cb387d..3b8dde93624 100644 --- a/configs/lx2160aqds_tfa_defconfig +++ b/configs/lx2160aqds_tfa_defconfig @@ -37,6 +37,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x2 CONFIG_BOARD_EARLY_INIT_R=y CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig index cd19663829c..a10ac5eb2c1 100644 --- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig @@ -34,6 +34,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig index ee63ccdf460..cb743649491 100644 --- a/configs/lx2160ardb_tfa_defconfig +++ b/configs/lx2160ardb_tfa_defconfig @@ -37,6 +37,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 diff --git a/configs/lx2160ardb_tfa_stmm_defconfig b/configs/lx2160ardb_tfa_stmm_defconfig index ce106fb018f..b1d843805ee 100644 --- a/configs/lx2160ardb_tfa_stmm_defconfig +++ b/configs/lx2160ardb_tfa_stmm_defconfig @@ -37,6 +37,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_EEPROM=y diff --git a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig index 0d8ac1c9b47..597f1f4d6c0 100644 --- a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig @@ -35,6 +35,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 diff --git a/configs/lx2162aqds_tfa_defconfig b/configs/lx2162aqds_tfa_defconfig index a13abd29a76..a507586100c 100644 --- a/configs/lx2162aqds_tfa_defconfig +++ b/configs/lx2162aqds_tfa_defconfig @@ -38,6 +38,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 diff --git a/configs/lx2162aqds_tfa_verified_boot_defconfig b/configs/lx2162aqds_tfa_verified_boot_defconfig index 114bc6ee728..e66f9bd2917 100644 --- a/configs/lx2162aqds_tfa_verified_boot_defconfig +++ b/configs/lx2162aqds_tfa_verified_boot_defconfig @@ -39,6 +39,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index 90d3e59e57d..cfaa0e13698 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -34,6 +34,7 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DM=y diff --git a/configs/marsboard_defconfig b/configs/marsboard_defconfig index f3e83668465..47a32e96067 100644 --- a/configs/marsboard_defconfig +++ b/configs/marsboard_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig index c325dd7cb27..4e9ec52809a 100644 --- a/configs/maxbcm_defconfig +++ b/configs/maxbcm_defconfig @@ -23,6 +23,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_I2C=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_I2C=y CONFIG_CMD_SPI=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig index 44c97c15a3f..ded7245644c 100644 --- a/configs/mccmon6_nor_defconfig +++ b/configs/mccmon6_nor_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_SYS_OS_BASE=0x8180000 +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NOR_OFS=0x09600000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig index 4c719337eea..5020b87ec81 100644 --- a/configs/mccmon6_sd_defconfig +++ b/configs/mccmon6_sd_defconfig @@ -27,6 +27,7 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NOR_OFS=0x09600000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 diff --git a/configs/medcom-wide_defconfig b/configs/medcom-wide_defconfig index d1eedc6aa88..cd039d2c651 100644 --- a/configs/medcom-wide_defconfig +++ b/configs/medcom-wide_defconfig @@ -14,6 +14,7 @@ CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra20 (Medcom-Wide) # " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/meerkat96_defconfig b/configs/meerkat96_defconfig index 930c998b7e7..31e436d1f05 100644 --- a/configs/meerkat96_defconfig +++ b/configs/meerkat96_defconfig @@ -15,6 +15,7 @@ CONFIG_IMX_BOOTAUX=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index 3142b469c26..6823d41e966 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_SYS_OS_BASE=0x2c060000 CONFIG_SYS_PROMPT="U-Boot-mONStR> " +CONFIG_SYS_MAXARGS=15 CONFIG_CMD_IMLS=y CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y diff --git a/configs/mt7622_rfb_defconfig b/configs/mt7622_rfb_defconfig index 90e8d774ce6..1f12cfd4316 100644 --- a/configs/mt7622_rfb_defconfig +++ b/configs/mt7622_rfb_defconfig @@ -14,6 +14,7 @@ CONFIG_DEFAULT_FDT_FILE="mt7622-rfb" CONFIG_LOGLEVEL=7 CONFIG_LOG=y CONFIG_SYS_PROMPT="MT7622> " +CONFIG_SYS_MAXARGS=8 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/mt7623a_unielec_u7623_02_defconfig b/configs/mt7623a_unielec_u7623_02_defconfig index 8b21afb06d8..f50307462c4 100644 --- a/configs/mt7623a_unielec_u7623_02_defconfig +++ b/configs/mt7623a_unielec_u7623_02_defconfig @@ -17,6 +17,7 @@ CONFIG_DEFAULT_FDT_FILE="mt7623a-unielec-u7623-02-emmc.dtb" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_MAXARGS=8 CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/mt7623n_bpir2_defconfig b/configs/mt7623n_bpir2_defconfig index 677e192bcb4..e2d68b9c9d1 100644 --- a/configs/mt7623n_bpir2_defconfig +++ b/configs/mt7623n_bpir2_defconfig @@ -17,6 +17,7 @@ CONFIG_DEFAULT_FDT_FILE="mt7623n-bananapi-bpi-r2.dtb" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_MAXARGS=8 CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/mt7629_rfb_defconfig b/configs/mt7629_rfb_defconfig index 4d47b47be49..87e57379d22 100644 --- a/configs/mt7629_rfb_defconfig +++ b/configs/mt7629_rfb_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_MAXARGS=8 CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/mvebu_crb_cn9130_defconfig b/configs/mvebu_crb_cn9130_defconfig index e4a786c011c..fd0a5d93681 100644 --- a/configs/mvebu_crb_cn9130_defconfig +++ b/configs/mvebu_crb_cn9130_defconfig @@ -22,6 +22,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="Marvell>> " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_MTD=y diff --git a/configs/mvebu_db-88f3720_defconfig b/configs/mvebu_db-88f3720_defconfig index ff891150d24..ccf0dba28e5 100644 --- a/configs/mvebu_db-88f3720_defconfig +++ b/configs/mvebu_db-88f3720_defconfig @@ -23,6 +23,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y diff --git a/configs/mvebu_db_armada8k_defconfig b/configs/mvebu_db_armada8k_defconfig index ddbce1b52c4..023bc21ad4f 100644 --- a/configs/mvebu_db_armada8k_defconfig +++ b/configs/mvebu_db_armada8k_defconfig @@ -22,6 +22,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/mvebu_db_cn9130_defconfig b/configs/mvebu_db_cn9130_defconfig index 64f3f2f3432..f86110838dc 100644 --- a/configs/mvebu_db_cn9130_defconfig +++ b/configs/mvebu_db_cn9130_defconfig @@ -24,6 +24,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="Marvell>> " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_MTD=y diff --git a/configs/mvebu_espressobin-88f3720_defconfig b/configs/mvebu_espressobin-88f3720_defconfig index 8d7d57ff1bc..aa01da6a09c 100644 --- a/configs/mvebu_espressobin-88f3720_defconfig +++ b/configs/mvebu_espressobin-88f3720_defconfig @@ -26,6 +26,7 @@ CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_LAST_STAGE_INIT=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y diff --git a/configs/mvebu_mcbin-88f8040_defconfig b/configs/mvebu_mcbin-88f8040_defconfig index e8095d4cedf..60d3940d9fd 100644 --- a/configs/mvebu_mcbin-88f8040_defconfig +++ b/configs/mvebu_mcbin-88f8040_defconfig @@ -23,6 +23,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/mvebu_puzzle-m801-88f8040_defconfig b/configs/mvebu_puzzle-m801-88f8040_defconfig index 1c773458dce..289df896883 100644 --- a/configs/mvebu_puzzle-m801-88f8040_defconfig +++ b/configs/mvebu_puzzle-m801-88f8040_defconfig @@ -27,6 +27,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/mx23_olinuxino_defconfig b/configs/mx23_olinuxino_defconfig index ff656c5efd1..465259a1035 100644 --- a/configs/mx23_olinuxino_defconfig +++ b/configs/mx23_olinuxino_defconfig @@ -23,6 +23,7 @@ CONFIG_ARCH_MISC_INIT=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NO_CPU_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/mx23evk_defconfig b/configs/mx23evk_defconfig index 41c5b37d0af..a9d7b1402bd 100644 --- a/configs/mx23evk_defconfig +++ b/configs/mx23evk_defconfig @@ -24,6 +24,7 @@ CONFIG_ARCH_MISC_INIT=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NO_CPU_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y diff --git a/configs/mx28evk_auart_console_defconfig b/configs/mx28evk_auart_console_defconfig index af9ff194187..aa0ac1cfd0f 100644 --- a/configs/mx28evk_auart_console_defconfig +++ b/configs/mx28evk_auart_console_defconfig @@ -21,6 +21,7 @@ CONFIG_ARCH_MISC_INIT=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NO_CPU_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig index 3a9c7ff5417..446f206928e 100644 --- a/configs/mx28evk_defconfig +++ b/configs/mx28evk_defconfig @@ -25,6 +25,7 @@ CONFIG_ARCH_MISC_INIT=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NO_CPU_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set diff --git a/configs/mx28evk_nand_defconfig b/configs/mx28evk_nand_defconfig index 7ffdb817e19..4a13b2a6769 100644 --- a/configs/mx28evk_nand_defconfig +++ b/configs/mx28evk_nand_defconfig @@ -22,6 +22,7 @@ CONFIG_ARCH_MISC_INIT=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NO_CPU_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/mx28evk_spi_defconfig b/configs/mx28evk_spi_defconfig index 1bac5851435..91fb6dbe46d 100644 --- a/configs/mx28evk_spi_defconfig +++ b/configs/mx28evk_spi_defconfig @@ -20,6 +20,7 @@ CONFIG_ARCH_MISC_INIT=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NO_CPU_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig index e4eddef15ab..77551cd0489 100644 --- a/configs/mx53ppd_defconfig +++ b/configs/mx53ppd_defconfig @@ -22,6 +22,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_LATE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=48 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y CONFIG_CMD_FUSE=y diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index 1e2e332af9e..5f5b17e3351 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -29,6 +29,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y # CONFIG_CMD_PINMUX is not set diff --git a/configs/mx6memcal_defconfig b/configs/mx6memcal_defconfig index b2185172bb6..fb1a4878a40 100644 --- a/configs/mx6memcal_defconfig +++ b/configs/mx6memcal_defconfig @@ -18,6 +18,7 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_BOOTM is not set # CONFIG_CMD_ELF is not set diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig index 472758ac889..31e8d3264a1 100644 --- a/configs/mx6qsabrelite_defconfig +++ b/configs/mx6qsabrelite_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y # CONFIG_CMD_FLASH is not set diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig index 053026daa31..f5097c94e82 100644 --- a/configs/mx6sabreauto_defconfig +++ b/configs/mx6sabreauto_defconfig @@ -41,6 +41,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index 674384c8785..9b3d5944c29 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_SPL=y CONFIG_CMD_SPL_WRITE_SIZE=0x20000 diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig index 79057f7f4c1..a2fb782e2be 100644 --- a/configs/mx6slevk_defconfig +++ b/configs/mx6slevk_defconfig @@ -15,6 +15,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig index 2f9026287fc..15f563f9195 100644 --- a/configs/mx6slevk_spinor_defconfig +++ b/configs/mx6slevk_spinor_defconfig @@ -17,6 +17,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig index 5a43a5501ce..03f0bb42095 100644 --- a/configs/mx6slevk_spl_defconfig +++ b/configs/mx6slevk_spl_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/mx6sllevk_defconfig b/configs/mx6sllevk_defconfig index b949b5e30c0..7571f8c0840 100644 --- a/configs/mx6sllevk_defconfig +++ b/configs/mx6sllevk_defconfig @@ -17,6 +17,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/mx6sllevk_plugin_defconfig b/configs/mx6sllevk_plugin_defconfig index 3fea1b17faa..975e2ed053e 100644 --- a/configs/mx6sllevk_plugin_defconfig +++ b/configs/mx6sllevk_plugin_defconfig @@ -18,6 +18,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig index 30194a8cde4..c0ff4acf674 100644 --- a/configs/mx6sxsabreauto_defconfig +++ b/configs/mx6sxsabreauto_defconfig @@ -14,6 +14,7 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig index b5b0b374f2e..911839d6e0a 100644 --- a/configs/mx6sxsabresd_defconfig +++ b/configs/mx6sxsabresd_defconfig @@ -16,6 +16,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run findfdt; mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig index 1e1e799eb38..b12a8b0e46c 100644 --- a/configs/mx6ul_14x14_evk_defconfig +++ b/configs/mx6ul_14x14_evk_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig index 4b90fcad261..b97e34f3a94 100644 --- a/configs/mx6ul_9x9_evk_defconfig +++ b/configs/mx6ul_9x9_evk_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/mx6ull_14x14_evk_defconfig b/configs/mx6ull_14x14_evk_defconfig index ec526b6e4f8..da912a71cda 100644 --- a/configs/mx6ull_14x14_evk_defconfig +++ b/configs/mx6ull_14x14_evk_defconfig @@ -16,6 +16,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/mx6ull_14x14_evk_plugin_defconfig b/configs/mx6ull_14x14_evk_plugin_defconfig index ec2a537581d..087aa8e5ae6 100644 --- a/configs/mx6ull_14x14_evk_plugin_defconfig +++ b/configs/mx6ull_14x14_evk_plugin_defconfig @@ -17,6 +17,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/mx6ulz_14x14_evk_defconfig b/configs/mx6ulz_14x14_evk_defconfig index 0a7002d936e..2a13767da87 100644 --- a/configs/mx6ulz_14x14_evk_defconfig +++ b/configs/mx6ulz_14x14_evk_defconfig @@ -16,6 +16,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig index d8c5dbcc93a..da55c2ad176 100644 --- a/configs/mx7dsabresd_defconfig +++ b/configs/mx7dsabresd_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BOOTD is not set # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/mx7dsabresd_qspi_defconfig b/configs/mx7dsabresd_qspi_defconfig index 7aa35791089..4c4d8a105a4 100644 --- a/configs/mx7dsabresd_qspi_defconfig +++ b/configs/mx7dsabresd_qspi_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BOOTD is not set # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/mx7ulp_evk_defconfig b/configs/mx7ulp_evk_defconfig index 12c89b5be96..b5760392e81 100644 --- a/configs/mx7ulp_evk_defconfig +++ b/configs/mx7ulp_evk_defconfig @@ -17,6 +17,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; fi; fi; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=256 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_FUSE=y diff --git a/configs/mx7ulp_evk_plugin_defconfig b/configs/mx7ulp_evk_plugin_defconfig index cec1a878714..b622fb349c4 100644 --- a/configs/mx7ulp_evk_plugin_defconfig +++ b/configs/mx7ulp_evk_plugin_defconfig @@ -16,6 +16,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; fi; fi; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=256 CONFIG_CMD_MEMTEST=y CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y diff --git a/configs/myir_mys_6ulx_defconfig b/configs/myir_mys_6ulx_defconfig index 4f99042b51a..d647f1c2ab5 100644 --- a/configs/myir_mys_6ulx_defconfig +++ b/configs/myir_mys_6ulx_defconfig @@ -24,6 +24,7 @@ CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_MEMTEST=y CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y diff --git a/configs/nanopi-k2_defconfig b/configs/nanopi-k2_defconfig index f7d8f788c69..bd715b3c6a4 100644 --- a/configs/nanopi-k2_defconfig +++ b/configs/nanopi-k2_defconfig @@ -14,6 +14,7 @@ CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig index 924061da99f..a3129fb410d 100644 --- a/configs/nas220_defconfig +++ b/configs/nas220_defconfig @@ -20,6 +20,7 @@ CONFIG_USE_PREBOOT=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="nas220> " +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_NAND=y diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig index 522d8adfa7b..1081ae8e4ee 100644 --- a/configs/net2big_v2_defconfig +++ b/configs/net2big_v2_defconfig @@ -28,6 +28,7 @@ CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="2big2> " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4 CONFIG_CMD_I2C=y diff --git a/configs/netgear_cg3100d_ram_defconfig b/configs/netgear_cg3100d_ram_defconfig index b126bd382ed..c4bbc9f3d04 100644 --- a/configs/netgear_cg3100d_ram_defconfig +++ b/configs/netgear_cg3100d_ram_defconfig @@ -17,6 +17,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="CG3100D # " +CONFIG_SYS_MAXARGS=24 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/netgear_dgnd3700v2_ram_defconfig b/configs/netgear_dgnd3700v2_ram_defconfig index d04e73f847c..84d954d57a0 100644 --- a/configs/netgear_dgnd3700v2_ram_defconfig +++ b/configs/netgear_dgnd3700v2_ram_defconfig @@ -20,6 +20,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="DGND3700v2 # " +CONFIG_SYS_MAXARGS=24 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig index 153ae76a10b..1d6304cd28c 100644 --- a/configs/netspace_lite_v2_defconfig +++ b/configs/netspace_lite_v2_defconfig @@ -28,6 +28,7 @@ CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4 CONFIG_CMD_I2C=y diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig index b5d77fa5918..4f85aa77be9 100644 --- a/configs/netspace_max_v2_defconfig +++ b/configs/netspace_max_v2_defconfig @@ -28,6 +28,7 @@ CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4 CONFIG_CMD_I2C=y diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig index ac92f42911d..7325f215361 100644 --- a/configs/netspace_mini_v2_defconfig +++ b/configs/netspace_mini_v2_defconfig @@ -28,6 +28,7 @@ CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4 CONFIG_CMD_I2C=y diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig index 00c19f55c95..48c0e4f9662 100644 --- a/configs/netspace_v2_defconfig +++ b/configs/netspace_v2_defconfig @@ -28,6 +28,7 @@ CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4 CONFIG_CMD_I2C=y diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig index 3a0d95c3731..c8d2cff57a2 100644 --- a/configs/nitrogen6dl2g_defconfig +++ b/configs/nitrogen6dl2g_defconfig @@ -29,6 +29,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig index f8c1cb11de9..50a2701ec71 100644 --- a/configs/nitrogen6dl_defconfig +++ b/configs/nitrogen6dl_defconfig @@ -29,6 +29,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig index 02b168c2d45..3e6f358f47e 100644 --- a/configs/nitrogen6q2g_defconfig +++ b/configs/nitrogen6q2g_defconfig @@ -29,6 +29,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig index 1286ce5d8c5..0483417d2ac 100644 --- a/configs/nitrogen6q_defconfig +++ b/configs/nitrogen6q_defconfig @@ -29,6 +29,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig index cec00603cad..059a958ec80 100644 --- a/configs/nitrogen6s1g_defconfig +++ b/configs/nitrogen6s1g_defconfig @@ -29,6 +29,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig index d6d7bac5782..e22f6897265 100644 --- a/configs/nitrogen6s_defconfig +++ b/configs/nitrogen6s_defconfig @@ -29,6 +29,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y diff --git a/configs/novena_defconfig b/configs/novena_defconfig index db33d1153bc..0a34e99f094 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -34,6 +34,7 @@ CONFIG_MISC_INIT_R=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_BUS=2 diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig index ff015e36a5a..aad5d1f857a 100644 --- a/configs/nsa310s_defconfig +++ b/configs/nsa310s_defconfig @@ -21,6 +21,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="NSA310s> " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig index f82bace9e75..0c906fcde4c 100644 --- a/configs/nyan-big_defconfig +++ b/configs/nyan-big_defconfig @@ -24,6 +24,7 @@ CONFIG_BOOTSTAGE_STASH=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_PROMPT="Tegra124 (Nyan-big) # " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/o4-imx6ull-nano_defconfig b/configs/o4-imx6ull-nano_defconfig index 27a82b11630..158caf13e00 100644 --- a/configs/o4-imx6ull-nano_defconfig +++ b/configs/o4-imx6ull-nano_defconfig @@ -8,6 +8,7 @@ CONFIG_DM_GPIO=y CONFIG_MT41K256M16HA_125E=y CONFIG_IMX_MODULE_FUSE=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/octeontx2_95xx_defconfig b/configs/octeontx2_95xx_defconfig index 46a28e1b206..0c6c538a587 100644 --- a/configs/octeontx2_95xx_defconfig +++ b/configs/octeontx2_95xx_defconfig @@ -33,6 +33,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Marvell> " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set CONFIG_CMD_MD5SUM=y CONFIG_MD5SUM_VERIFY=y diff --git a/configs/octeontx2_96xx_defconfig b/configs/octeontx2_96xx_defconfig index 9d8cc4b7be4..92d6ce531ce 100644 --- a/configs/octeontx2_96xx_defconfig +++ b/configs/octeontx2_96xx_defconfig @@ -33,6 +33,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Marvell> " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set CONFIG_CMD_MD5SUM=y CONFIG_MD5SUM_VERIFY=y diff --git a/configs/octeontx_81xx_defconfig b/configs/octeontx_81xx_defconfig index d14e121b6ed..539ebf16f3c 100644 --- a/configs/octeontx_81xx_defconfig +++ b/configs/octeontx_81xx_defconfig @@ -33,6 +33,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 maxcpus= CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Marvell> " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set CONFIG_CMD_MD5SUM=y CONFIG_MD5SUM_VERIFY=y diff --git a/configs/octeontx_83xx_defconfig b/configs/octeontx_83xx_defconfig index f1d482afb62..dad06f6df5c 100644 --- a/configs/octeontx_83xx_defconfig +++ b/configs/octeontx_83xx_defconfig @@ -31,6 +31,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 maxcpus= CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Marvell> " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set CONFIG_CMD_MD5SUM=y CONFIG_MD5SUM_VERIFY=y diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig index f9b0c79eff7..4c82fd097a3 100644 --- a/configs/odroid-c2_defconfig +++ b/configs/odroid-c2_defconfig @@ -14,6 +14,7 @@ CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_ADC=y diff --git a/configs/odroid-c4_defconfig b/configs/odroid-c4_defconfig index f3ea892b5eb..c1544cba717 100644 --- a/configs/odroid-c4_defconfig +++ b/configs/odroid-c4_defconfig @@ -16,6 +16,7 @@ CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y diff --git a/configs/odroid-hc4_defconfig b/configs/odroid-hc4_defconfig index 4be838314a8..8d546c35175 100644 --- a/configs/odroid-hc4_defconfig +++ b/configs/odroid-hc4_defconfig @@ -17,6 +17,7 @@ CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y diff --git a/configs/odroid-n2_defconfig b/configs/odroid-n2_defconfig index b19f98585cf..105dca6e103 100644 --- a/configs/odroid-n2_defconfig +++ b/configs/odroid-n2_defconfig @@ -16,6 +16,7 @@ CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y diff --git a/configs/omap35_logic_defconfig b/configs/omap35_logic_defconfig index d6ca3c2bda0..9d69cc5b31b 100644 --- a/configs/omap35_logic_defconfig +++ b/configs/omap35_logic_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 CONFIG_SYS_PROMPT="OMAP Logic # " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x240000 diff --git a/configs/omap35_logic_somlv_defconfig b/configs/omap35_logic_somlv_defconfig index 34b3af8ba68..8b7af0b0139 100644 --- a/configs/omap35_logic_somlv_defconfig +++ b/configs/omap35_logic_somlv_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 # CONFIG_SPL_POWER is not set CONFIG_SYS_PROMPT="OMAP Logic # " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x240000 diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig index 4767c0bdc67..5c3c846d98f 100644 --- a/configs/omap3_beagle_defconfig +++ b/configs/omap3_beagle_defconfig @@ -22,6 +22,7 @@ CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_SIMPLE=y CONFIG_SPL_NAND_BASE=y CONFIG_SYS_PROMPT="BeagleBoard # " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x280000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig index d451e201c72..b7fd976e8b6 100644 --- a/configs/omap3_evm_defconfig +++ b/configs/omap3_evm_defconfig @@ -22,6 +22,7 @@ CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_SIMPLE=y CONFIG_SPL_NAND_BASE=y CONFIG_SYS_PROMPT="OMAP3_EVM # " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x280000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index 2397ba53419..ce93059c197 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 CONFIG_SYS_PROMPT="OMAP Logic # " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x240000 diff --git a/configs/omap3_logic_somlv_defconfig b/configs/omap3_logic_somlv_defconfig index 721516d9e53..0b5ffc07941 100644 --- a/configs/omap3_logic_somlv_defconfig +++ b/configs/omap3_logic_somlv_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 # CONFIG_SPL_POWER is not set CONFIG_SYS_PROMPT="OMAP Logic # " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x240000 diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig index 03e1a6b70dd..6b8ce982aaa 100644 --- a/configs/omap4_panda_defconfig +++ b/configs/omap4_panda_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GPIO=y diff --git a/configs/omap4_sdp4430_defconfig b/configs/omap4_sdp4430_defconfig index 9dae340f643..6185421708e 100644 --- a/configs/omap4_sdp4430_defconfig +++ b/configs/omap4_sdp4430_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_SPL_I2C is not set # CONFIG_SPL_NAND_SUPPORT is not set +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_ASKENV=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig index 4c66a4cb397..748b0125276 100644 --- a/configs/omap5_uevm_defconfig +++ b/configs/omap5_uevm_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig index 4ae5d1fa5dd..5cb166ecb9f 100644 --- a/configs/openrd_base_defconfig +++ b/configs/openrd_base_defconfig @@ -23,6 +23,7 @@ CONFIG_USE_PREBOOT=y CONFIG_LOGLEVEL=2 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_MMC=y diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig index 3e6eb170ff8..db1df949b6e 100644 --- a/configs/openrd_client_defconfig +++ b/configs/openrd_client_defconfig @@ -24,6 +24,7 @@ CONFIG_USE_PREBOOT=y CONFIG_LOGLEVEL=2 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_MMC=y diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig index d7a02dd2d8a..95890ec30f3 100644 --- a/configs/openrd_ultimate_defconfig +++ b/configs/openrd_ultimate_defconfig @@ -24,6 +24,7 @@ CONFIG_USE_PREBOOT=y CONFIG_LOGLEVEL=2 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_MMC=y diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig index 5f5caceb8d4..b56da14c678 100644 --- a/configs/opos6uldev_defconfig +++ b/configs/opos6uldev_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="BIOS> " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_CONFIG=y CONFIG_CMD_LICENSE=y CONFIG_CMD_BOOTZ=y diff --git a/configs/p200_defconfig b/configs/p200_defconfig index 4ba0028f73a..7d8daa73c72 100644 --- a/configs/p200_defconfig +++ b/configs/p200_defconfig @@ -14,6 +14,7 @@ CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y diff --git a/configs/p201_defconfig b/configs/p201_defconfig index 6de83263bdf..77cf2ad1a44 100644 --- a/configs/p201_defconfig +++ b/configs/p201_defconfig @@ -15,6 +15,7 @@ CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y diff --git a/configs/p212_defconfig b/configs/p212_defconfig index 8506601a47b..633dd45628a 100644 --- a/configs/p212_defconfig +++ b/configs/p212_defconfig @@ -16,6 +16,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig index b335d851bfc..61e90d661ca 100644 --- a/configs/p2371-0000_defconfig +++ b/configs/p2371-0000_defconfig @@ -13,6 +13,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P2371-0000) # " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig index 5977325973e..5fbcb7dec3f 100644 --- a/configs/p2371-2180_defconfig +++ b/configs/p2371-2180_defconfig @@ -16,6 +16,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P2371-2180) # " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig index d3f169ae241..2df2979b007 100644 --- a/configs/p2571_defconfig +++ b/configs/p2571_defconfig @@ -14,6 +14,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P2571) # " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig index 47be8a1c286..bf7d094ae63 100644 --- a/configs/p2771-0000-000_defconfig +++ b/configs/p2771-0000-000_defconfig @@ -14,6 +14,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-000) # " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig index 94866cd7693..9aee01e99dd 100644 --- a/configs/p2771-0000-500_defconfig +++ b/configs/p2771-0000-500_defconfig @@ -14,6 +14,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-500) # " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig index ec813dd7a5b..d72f02ddab6 100644 --- a/configs/p3450-0000_defconfig +++ b/configs/p3450-0000_defconfig @@ -17,6 +17,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P3450-0000) # " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/paz00_defconfig b/configs/paz00_defconfig index f11b57dde75..b0e650ee8c8 100644 --- a/configs/paz00_defconfig +++ b/configs/paz00_defconfig @@ -13,6 +13,7 @@ CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra20 (Paz00) MOD # " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig index 8b6a8b35700..35c2befef8c 100644 --- a/configs/pcm058_defconfig +++ b/configs/pcm058_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x31400 CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig index 844a39fd388..018e84218e8 100644 --- a/configs/pg_wcom_expu1_defconfig +++ b/configs/pg_wcom_expu1_defconfig @@ -41,6 +41,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_EVENT=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/pg_wcom_expu1_update_defconfig b/configs/pg_wcom_expu1_update_defconfig index bea61f70f61..e237a64d275 100644 --- a/configs/pg_wcom_expu1_update_defconfig +++ b/configs/pg_wcom_expu1_update_defconfig @@ -39,6 +39,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_EVENT=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig index 81610881782..919dba52147 100644 --- a/configs/pg_wcom_seli8_defconfig +++ b/configs/pg_wcom_seli8_defconfig @@ -41,6 +41,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_EVENT=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/pg_wcom_seli8_update_defconfig b/configs/pg_wcom_seli8_update_defconfig index 0a36ab9839b..8e3e30feff1 100644 --- a/configs/pg_wcom_seli8_update_defconfig +++ b/configs/pg_wcom_seli8_update_defconfig @@ -39,6 +39,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_EVENT=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/phycore-am335x-r2-regor_defconfig b/configs/phycore-am335x-r2-regor_defconfig index 1344a2350a2..51b0c6fb55e 100644 --- a/configs/phycore-am335x-r2-regor_defconfig +++ b/configs/phycore-am335x-r2-regor_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_BASE=y CONFIG_SPL_POWER=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_SPL=y # CONFIG_CMD_FLASH is not set diff --git a/configs/phycore-am335x-r2-wega_defconfig b/configs/phycore-am335x-r2-wega_defconfig index 45ded518a93..59a4ef1f89d 100644 --- a/configs/phycore-am335x-r2-wega_defconfig +++ b/configs/phycore-am335x-r2-wega_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_BASE=y CONFIG_SPL_POWER=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_SPL=y # CONFIG_CMD_FLASH is not set diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig index ba5833f7060..a52cc356286 100644 --- a/configs/phycore-imx8mm_defconfig +++ b/configs/phycore-imx8mm_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_SPI_FLASH_MTD=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig index 86d0f4df7f6..78a85e1dab0 100644 --- a/configs/phycore-imx8mp_defconfig +++ b/configs/phycore-imx8mp_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/phycore_pcl063_defconfig b/configs/phycore_pcl063_defconfig index 0a05c4b22f2..dbd4a06800a 100644 --- a/configs/phycore_pcl063_defconfig +++ b/configs/phycore_pcl063_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_MEMTEST=y CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y diff --git a/configs/phycore_pcl063_ull_defconfig b/configs/phycore_pcl063_ull_defconfig index a672b16f237..6698045e7f5 100644 --- a/configs/phycore_pcl063_ull_defconfig +++ b/configs/phycore_pcl063_ull_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTCOMMAND="run mmc_mmc_fit" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y diff --git a/configs/pico-dwarf-imx6ul_defconfig b/configs/pico-dwarf-imx6ul_defconfig index 8e1c25def99..430372cec64 100644 --- a/configs/pico-dwarf-imx6ul_defconfig +++ b/configs/pico-dwarf-imx6ul_defconfig @@ -28,6 +28,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y diff --git a/configs/pico-dwarf-imx7d_defconfig b/configs/pico-dwarf-imx7d_defconfig index 90b607b90df..92c85ca46c5 100644 --- a/configs/pico-dwarf-imx7d_defconfig +++ b/configs/pico-dwarf-imx7d_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_IMI is not set diff --git a/configs/pico-hobbit-imx6ul_defconfig b/configs/pico-hobbit-imx6ul_defconfig index 28414666851..776cf500fb6 100644 --- a/configs/pico-hobbit-imx6ul_defconfig +++ b/configs/pico-hobbit-imx6ul_defconfig @@ -29,6 +29,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig index 1342d850117..6f1675d4ffe 100644 --- a/configs/pico-hobbit-imx7d_defconfig +++ b/configs/pico-hobbit-imx7d_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_IMI is not set diff --git a/configs/pico-imx6_defconfig b/configs/pico-imx6_defconfig index 5330556734d..816f9041dd2 100644 --- a/configs/pico-imx6_defconfig +++ b/configs/pico-imx6_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_SPL=y CONFIG_CMD_SPL_WRITE_SIZE=0x20000 diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig index c198a660ea3..3ec16b6d1b9 100644 --- a/configs/pico-imx6ul_defconfig +++ b/configs/pico-imx6ul_defconfig @@ -29,6 +29,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_SPL=y CONFIG_CMD_SPL_WRITE_SIZE=0x20000 diff --git a/configs/pico-imx7d_bl33_defconfig b/configs/pico-imx7d_bl33_defconfig index 09117e9a4ea..90355db2046 100644 --- a/configs/pico-imx7d_bl33_defconfig +++ b/configs/pico-imx7d_bl33_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y CONFIG_CMD_SPL=y diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig index 6473aaaede4..c89736b3ed5 100644 --- a/configs/pico-imx7d_defconfig +++ b/configs/pico-imx7d_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_IMI is not set diff --git a/configs/pico-imx8mq_defconfig b/configs/pico-imx8mq_defconfig index 91aca29e830..44027ce171d 100644 --- a/configs/pico-imx8mq_defconfig +++ b/configs/pico-imx8mq_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 # CONFIG_BOOTM_NETBSD is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/pico-nymph-imx7d_defconfig b/configs/pico-nymph-imx7d_defconfig index 90b607b90df..92c85ca46c5 100644 --- a/configs/pico-nymph-imx7d_defconfig +++ b/configs/pico-nymph-imx7d_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_IMI is not set diff --git a/configs/pico-pi-imx6ul_defconfig b/configs/pico-pi-imx6ul_defconfig index 31f37dab26f..6bc8d5d8cd5 100644 --- a/configs/pico-pi-imx6ul_defconfig +++ b/configs/pico-pi-imx6ul_defconfig @@ -29,6 +29,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig index 812aa24b091..c94cfe385bd 100644 --- a/configs/pico-pi-imx7d_defconfig +++ b/configs/pico-pi-imx7d_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_IMI is not set diff --git a/configs/plutux_defconfig b/configs/plutux_defconfig index 3a179fa5ae5..8d719a330fb 100644 --- a/configs/plutux_defconfig +++ b/configs/plutux_defconfig @@ -15,6 +15,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra20 (Plutux) # " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig index 2d807f1a9c1..d512fd4b996 100644 --- a/configs/pogo_e02_defconfig +++ b/configs/pogo_e02_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTCOMMAND="setenv bootargs $(bootargs_console); run bootcmd_usb; bootm CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="PogoE02> " +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y CONFIG_CMD_USB=y diff --git a/configs/pogo_v4_defconfig b/configs/pogo_v4_defconfig index ca27bbba67a..fb564b54671 100644 --- a/configs/pogo_v4_defconfig +++ b/configs/pogo_v4_defconfig @@ -22,6 +22,7 @@ CONFIG_USE_PREBOOT=y CONFIG_BOARD_LATE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Pogo_V4> " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set diff --git a/configs/poleg_evb_defconfig b/configs/poleg_evb_defconfig index 94bb34a3a75..6d1b2bde250 100644 --- a/configs/poleg_evb_defconfig +++ b/configs/poleg_evb_defconfig @@ -16,6 +16,7 @@ CONFIG_ENV_ADDR=0x80100000 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run common_bootargs; run romboot" CONFIG_SYS_PROMPT="U-Boot>" +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_GPIO=y CONFIG_CMD_SPI=y CONFIG_CMD_CACHE=y diff --git a/configs/poplar_defconfig b/configs/poplar_defconfig index 5d2639f71bd..8479b62f306 100644 --- a/configs/poplar_defconfig +++ b/configs/poplar_defconfig @@ -12,6 +12,7 @@ CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DISTRO_DEFAULTS=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="poplar# " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_ISO_PARTITION is not set diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig index c2051615cbb..23bb593e6d2 100644 --- a/configs/pxm2_defconfig +++ b/configs/pxm2_defconfig @@ -45,6 +45,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig index 7b050d82457..b6a113ab5d8 100644 --- a/configs/r8a77970_eagle_defconfig +++ b/configs/r8a77970_eagle_defconfig @@ -22,6 +22,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77970-eagle.dtb; booti 0x48080000 - 0x48000000" CONFIG_DEFAULT_FDT_FILE="r8a77970-eagle.dtb" CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/r8a77980_condor_defconfig b/configs/r8a77980_condor_defconfig index c3b6e99ae77..a3716dcdd40 100644 --- a/configs/r8a77980_condor_defconfig +++ b/configs/r8a77980_condor_defconfig @@ -23,6 +23,7 @@ CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77980-condor CONFIG_DEFAULT_FDT_FILE="r8a77980-condor.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig index fba03a760fc..33995af431a 100644 --- a/configs/r8a77990_ebisu_defconfig +++ b/configs/r8a77990_ebisu_defconfig @@ -24,6 +24,7 @@ CONFIG_DEFAULT_FDT_FILE="r8a77990-ebisu.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_UPDATE_TFTP=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_DFU=y diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig index 008254715e2..1c5536a540d 100644 --- a/configs/r8a77995_draak_defconfig +++ b/configs/r8a77995_draak_defconfig @@ -23,6 +23,7 @@ CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77995-draak. CONFIG_DEFAULT_FDT_FILE="r8a77995-draak.dtb" CONFIG_UPDATE_TFTP=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/r8a779a0_falcon_defconfig b/configs/r8a779a0_falcon_defconfig index f76b1132a8e..2921bcf66bb 100644 --- a/configs/r8a779a0_falcon_defconfig +++ b/configs/r8a779a0_falcon_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a779a0-falcon.dtb; booti 0x48080000 - 0x48000000" CONFIG_DEFAULT_FDT_FILE="r8a779a0-falcon.dtb" CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/radxa-zero_defconfig b/configs/radxa-zero_defconfig index 5e845600b46..84c065cce6a 100644 --- a/configs/radxa-zero_defconfig +++ b/configs/radxa-zero_defconfig @@ -15,6 +15,7 @@ CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig index 4bdaae0bc63..2f10ad0e144 100644 --- a/configs/rastaban_defconfig +++ b/configs/rastaban_defconfig @@ -46,6 +46,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set diff --git a/configs/rcar3_salvator-x_defconfig b/configs/rcar3_salvator-x_defconfig index 6ef62ab4cbb..97b3f853016 100644 --- a/configs/rcar3_salvator-x_defconfig +++ b/configs/rcar3_salvator-x_defconfig @@ -23,6 +23,7 @@ CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77950-salvat CONFIG_DEFAULT_FDT_FILE="r8a77950-salvator-x.dtb" CONFIG_UPDATE_TFTP=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_DFU=y diff --git a/configs/rcar3_ulcb_defconfig b/configs/rcar3_ulcb_defconfig index a7ef4f1c0ee..11f55bc6f19 100644 --- a/configs/rcar3_ulcb_defconfig +++ b/configs/rcar3_ulcb_defconfig @@ -23,6 +23,7 @@ CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77950-ulcb.d CONFIG_DEFAULT_FDT_FILE="r8a77950-ulcb.dtb" CONFIG_UPDATE_TFTP=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_DFU=y diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig index bdfe51cef81..dbe4b50a4dd 100644 --- a/configs/riotboard_defconfig +++ b/configs/riotboard_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_FS_EXT4=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x0 +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/rut_defconfig b/configs/rut_defconfig index b1fde88303f..8e126e0aec9 100644 --- a/configs/rut_defconfig +++ b/configs/rut_defconfig @@ -45,6 +45,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_ASKENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_DFU=y diff --git a/configs/rzg2_beacon_defconfig b/configs/rzg2_beacon_defconfig index 6c8a94a06bc..608be08b278 100644 --- a/configs/rzg2_beacon_defconfig +++ b/configs/rzg2_beacon_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_DEFAULT_FDT_FILE="r8a774a1-beacon-rzg2m-kit.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/s400_defconfig b/configs/s400_defconfig index 1cebca67793..b0e301097ea 100644 --- a/configs/s400_defconfig +++ b/configs/s400_defconfig @@ -15,6 +15,7 @@ CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y diff --git a/configs/sagem_f@st1704_ram_defconfig b/configs/sagem_f@st1704_ram_defconfig index c06ff632b40..fd246b15c4d 100644 --- a/configs/sagem_f@st1704_ram_defconfig +++ b/configs/sagem_f@st1704_ram_defconfig @@ -18,6 +18,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="F@ST1704 # " +CONFIG_SYS_MAXARGS=24 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig index f3d3b0a4980..d9aecfa7bc8 100644 --- a/configs/seaboard_defconfig +++ b/configs/seaboard_defconfig @@ -13,6 +13,7 @@ CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_PREBOOT=y CONFIG_SYS_PROMPT="Tegra20 (SeaBoard) # " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/seeed_npi_imx6ull_defconfig b/configs/seeed_npi_imx6ull_defconfig index 4cf79c5b7ee..95cb376e113 100644 --- a/configs/seeed_npi_imx6ull_defconfig +++ b/configs/seeed_npi_imx6ull_defconfig @@ -25,6 +25,7 @@ CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_MEMTEST=y CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y diff --git a/configs/sei510_defconfig b/configs/sei510_defconfig index e9f5781248f..c3572f90b69 100644 --- a/configs/sei510_defconfig +++ b/configs/sei510_defconfig @@ -24,6 +24,7 @@ CONFIG_PREBOOT="run load_logo" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y CONFIG_AVB_VERIFY=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set CONFIG_CMD_ADTIMG=y CONFIG_CMD_ABOOTIMG=y diff --git a/configs/sei610_defconfig b/configs/sei610_defconfig index 93b9008383d..24e2a8fd577 100644 --- a/configs/sei610_defconfig +++ b/configs/sei610_defconfig @@ -24,6 +24,7 @@ CONFIG_PREBOOT="run load_logo" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y CONFIG_AVB_VERIFY=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set CONFIG_CMD_ADTIMG=y CONFIG_CMD_ABOOTIMG=y diff --git a/configs/sfr_nb4-ser_ram_defconfig b/configs/sfr_nb4-ser_ram_defconfig index 8ff982bd78a..890e637d1ef 100644 --- a/configs/sfr_nb4-ser_ram_defconfig +++ b/configs/sfr_nb4-ser_ram_defconfig @@ -20,6 +20,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="NB4-SER # " +CONFIG_SYS_MAXARGS=24 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig index 0477cd79e3e..7165c97607a 100644 --- a/configs/sheevaplug_defconfig +++ b/configs/sheevaplug_defconfig @@ -22,6 +22,7 @@ CONFIG_BOOTCOMMAND="${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_boota CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y diff --git a/configs/silinux_ek874_defconfig b/configs/silinux_ek874_defconfig index 099a200539f..3cd72a77439 100644 --- a/configs/silinux_ek874_defconfig +++ b/configs/silinux_ek874_defconfig @@ -24,6 +24,7 @@ CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a774c0-ek874. CONFIG_DEFAULT_FDT_FILE="r8a774c0-ek874.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig index 3cf30ddd766..af848d13c73 100644 --- a/configs/smartweb_defconfig +++ b/configs/smartweb_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_BASE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y # CONFIG_CMD_LOADS is not set diff --git a/configs/smegw01_defconfig b/configs/smegw01_defconfig index d5d1791d48f..7231642c9e3 100644 --- a/configs/smegw01_defconfig +++ b/configs/smegw01_defconfig @@ -20,6 +20,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="if run loadimage; then run mmcboot; fi; " CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/socfpga_agilex_atf_defconfig b/configs/socfpga_agilex_atf_defconfig index f1ae3c3349d..76b08606764 100644 --- a/configs/socfpga_agilex_atf_defconfig +++ b/configs/socfpga_agilex_atf_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig index bfbbd9bfdde..c8ccb05d4ad 100644 --- a/configs/socfpga_agilex_defconfig +++ b/configs/socfpga_agilex_defconfig @@ -27,6 +27,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_agilex_vab_defconfig b/configs/socfpga_agilex_vab_defconfig index d29b51729dd..d32e9af033e 100644 --- a/configs/socfpga_agilex_vab_defconfig +++ b/configs/socfpga_agilex_vab_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig index 1be9a2df083..903d885334d 100644 --- a/configs/socfpga_arria10_defconfig +++ b/configs/socfpga_arria10_defconfig @@ -26,6 +26,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_FPGA=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y # CONFIG_CMD_FLASH is not set diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index dafeafff3e7..37a401eafc6 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -20,6 +20,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DFU=y diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index b09672d8a2f..a9dfeef7413 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -20,6 +20,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DFU=y diff --git a/configs/socfpga_dbm_soc1_defconfig b/configs/socfpga_dbm_soc1_defconfig index a8ef2e934ad..bb06c408c8e 100644 --- a/configs/socfpga_dbm_soc1_defconfig +++ b/configs/socfpga_dbm_soc1_defconfig @@ -24,6 +24,7 @@ CONFIG_CLOCKS=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig index 2e5bd80d2ef..e45e3dbaa70 100644 --- a/configs/socfpga_de0_nano_soc_defconfig +++ b/configs/socfpga_de0_nano_soc_defconfig @@ -21,6 +21,7 @@ CONFIG_CLOCKS=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DFU=y diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig index 95b4ef638ec..7a022992cbb 100644 --- a/configs/socfpga_de10_nano_defconfig +++ b/configs/socfpga_de10_nano_defconfig @@ -20,6 +20,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DFU=y diff --git a/configs/socfpga_de10_standard_defconfig b/configs/socfpga_de10_standard_defconfig index 91bd49840d8..0a2a190340e 100644 --- a/configs/socfpga_de10_standard_defconfig +++ b/configs/socfpga_de10_standard_defconfig @@ -20,6 +20,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DFU=y diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig index 75e16be42a9..c2fac57d55c 100644 --- a/configs/socfpga_de1_soc_defconfig +++ b/configs/socfpga_de1_soc_defconfig @@ -20,6 +20,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y # CONFIG_CMD_FLASH is not set diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig index 53e9a7296cf..770347c0407 100644 --- a/configs/socfpga_is1_defconfig +++ b/configs/socfpga_is1_defconfig @@ -23,6 +23,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y # CONFIG_CMD_FLASH is not set diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig index 07ca4bf954b..936402ba819 100644 --- a/configs/socfpga_mcvevk_defconfig +++ b/configs/socfpga_mcvevk_defconfig @@ -21,6 +21,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DFU=y diff --git a/configs/socfpga_n5x_atf_defconfig b/configs/socfpga_n5x_atf_defconfig index 50b3319561e..5fa30b9f2d2 100644 --- a/configs/socfpga_n5x_atf_defconfig +++ b/configs/socfpga_n5x_atf_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_N5X # " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_n5x_defconfig b/configs/socfpga_n5x_defconfig index 8cdf65dbee1..7368f6cd6c1 100644 --- a/configs/socfpga_n5x_defconfig +++ b/configs/socfpga_n5x_defconfig @@ -24,6 +24,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_N5X # " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_n5x_vab_defconfig b/configs/socfpga_n5x_vab_defconfig index 04942e4fd9d..300eb558f56 100644 --- a/configs/socfpga_n5x_vab_defconfig +++ b/configs/socfpga_n5x_vab_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_N5X # " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig index 641d205093a..2fea52b6eff 100644 --- a/configs/socfpga_secu1_defconfig +++ b/configs/socfpga_secu1_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE is not set CONFIG_SPL_MTD_SUPPORT=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig index e245288b92a..fba917ac3e3 100644 --- a/configs/socfpga_sockit_defconfig +++ b/configs/socfpga_sockit_defconfig @@ -20,6 +20,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DFU=y diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index 70441864691..99f82e7f1c2 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -19,6 +19,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DFU=y diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index b0be0339538..cdc48b1455d 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -27,6 +27,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_CLOCKS=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/socfpga_stratix10_atf_defconfig b/configs/socfpga_stratix10_atf_defconfig index 6d2f4736c60..50bab708ea0 100644 --- a/configs/socfpga_stratix10_atf_defconfig +++ b/configs/socfpga_stratix10_atf_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index 8e16c2bfbb3..fe571113c30 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x3C00000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index 331975ad309..202121511c1 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -28,6 +28,7 @@ CONFIG_MISC_INIT_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_CMDLINE_PS_SUPPORT=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/somlabs_visionsom_6ull_defconfig b/configs/somlabs_visionsom_6ull_defconfig index 33b17912135..772d549cd57 100644 --- a/configs/somlabs_visionsom_6ull_defconfig +++ b/configs/somlabs_visionsom_6ull_defconfig @@ -16,6 +16,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run setfdtfile; run checkbootdev; run loadfdt;if run loadbootscript; then run bootscript; else if run loadimage; then run setbootargs; bootz ${loadaddr} - ${fdt_addr}; fi; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/starqltechn_defconfig b/configs/starqltechn_defconfig index 608d001b6df..9687afd9caf 100644 --- a/configs/starqltechn_defconfig +++ b/configs/starqltechn_defconfig @@ -14,6 +14,7 @@ CONFIG_SAVE_PREV_BL_FDT_ADDR=y CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_GPIO=y CONFIG_CMD_BMP=y # CONFIG_NET is not set diff --git a/configs/synquacer_developerbox_defconfig b/configs/synquacer_developerbox_defconfig index add6041e270..d897eaf9e7c 100644 --- a/configs/synquacer_developerbox_defconfig +++ b/configs/synquacer_developerbox_defconfig @@ -14,6 +14,7 @@ CONFIG_AHCI=y CONFIG_FIT=y CONFIG_BOOTSTAGE_STASH_SIZE=4096 CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=128 CONFIG_CMD_IMLS=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig index 9d2edd2eceb..3cc5c2dc63f 100644 --- a/configs/syzygy_hub_defconfig +++ b/configs/syzygy_hub_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x0 +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_FPGA_LOADBP=y CONFIG_CMD_FPGA_LOADFS=y CONFIG_CMD_FPGA_LOADMK=y diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 9f7642f25ca..2d9fbd3cc20 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -28,6 +28,7 @@ CONFIG_DEFAULT_FDT_FILE="imx6q-tbs2910.dtb" CONFIG_PRE_CONSOLE_BUFFER=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Matrix U-Boot> " +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/tec-ng_defconfig b/configs/tec-ng_defconfig index ea568d4bf70..29dda19280f 100644 --- a/configs/tec-ng_defconfig +++ b/configs/tec-ng_defconfig @@ -15,6 +15,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra30 (TEC-NG) # " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/tec_defconfig b/configs/tec_defconfig index ec6ecbce6fb..47cba3c9bfd 100644 --- a/configs/tec_defconfig +++ b/configs/tec_defconfig @@ -14,6 +14,7 @@ CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra20 (TEC) # " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/ten64_tfa_defconfig b/configs/ten64_tfa_defconfig index 96bca8344df..77c869406ea 100644 --- a/configs/ten64_tfa_defconfig +++ b/configs/ten64_tfa_defconfig @@ -27,6 +27,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_ID_EEPROM is not set CONFIG_PCI_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_BOOTMENU=y CONFIG_CMD_GREPENV=y diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index 9e8523d9414..43b7a70bcda 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -29,6 +29,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_I2C=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig index 8cf0100aef7..f21ed54646b 100644 --- a/configs/thuban_defconfig +++ b/configs/thuban_defconfig @@ -46,6 +46,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set diff --git a/configs/thunderx_88xx_defconfig b/configs/thunderx_88xx_defconfig index 5e818864d2c..a74e0856b2f 100644 --- a/configs/thunderx_88xx_defconfig +++ b/configs/thunderx_88xx_defconfig @@ -21,6 +21,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e024000000 debug ma CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="ThunderX_88XX> " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_EDITENV is not set diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig index d328ea12226..85d7d2677a9 100644 --- a/configs/ti816x_evm_defconfig +++ b/configs/ti816x_evm_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_BASE=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig index eecc3dcb935..1cc3248c9d3 100644 --- a/configs/topic_miami_defconfig +++ b/configs/topic_miami_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SYS_PROMPT="zynq-uboot> " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig index 7188a03edcb..fb862b0d460 100644 --- a/configs/topic_miamilite_defconfig +++ b/configs/topic_miamilite_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SYS_PROMPT="zynq-uboot> " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig index 83f38effd5f..28bf9ecad72 100644 --- a/configs/topic_miamiplus_defconfig +++ b/configs/topic_miamiplus_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SYS_PROMPT="zynq-uboot> " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y diff --git a/configs/total_compute_defconfig b/configs/total_compute_defconfig index 826afaa66cb..f380a82a205 100644 --- a/configs/total_compute_defconfig +++ b/configs/total_compute_defconfig @@ -22,6 +22,7 @@ CONFIG_AVB_VERIFY=y CONFIG_AVB_BUF_ADDR=0x90000000 CONFIG_AVB_BUF_SIZE=0x10000000 CONFIG_SYS_PROMPT="TOTAL_COMPUTE# " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set diff --git a/configs/tplink_wdr4300_defconfig b/configs/tplink_wdr4300_defconfig index c8f97be7eba..62d9ec297bb 100644 --- a/configs/tplink_wdr4300_defconfig +++ b/configs/tplink_wdr4300_defconfig @@ -16,6 +16,7 @@ CONFIG_BOOTCOMMAND="dhcp 192.168.1.1:wdr4300.fit && bootm $loadaddr" CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_MEMTEST=y diff --git a/configs/tqma6dl_mba6_mmc_defconfig b/configs/tqma6dl_mba6_mmc_defconfig index 81c30c6fc67..ce7111414c0 100644 --- a/configs/tqma6dl_mba6_mmc_defconfig +++ b/configs/tqma6dl_mba6_mmc_defconfig @@ -16,6 +16,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run mmcboot; run netboot; run panicboot" CONFIG_DEFAULT_FDT_FILE="imx6dl-mba6x.dtb" CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/tqma6dl_mba6_spi_defconfig b/configs/tqma6dl_mba6_spi_defconfig index 25f231cc1de..4183ffb24aa 100644 --- a/configs/tqma6dl_mba6_spi_defconfig +++ b/configs/tqma6dl_mba6_spi_defconfig @@ -19,6 +19,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe; run mmcboot; run netboot; run panicboot" CONFIG_DEFAULT_FDT_FILE="imx6dl-mba6x.dtb" CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/tqma6q_mba6_mmc_defconfig b/configs/tqma6q_mba6_mmc_defconfig index b838858c415..031cef82fb3 100644 --- a/configs/tqma6q_mba6_mmc_defconfig +++ b/configs/tqma6q_mba6_mmc_defconfig @@ -16,6 +16,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run mmcboot; run netboot; run panicboot" CONFIG_DEFAULT_FDT_FILE="imx6q-mba6x.dtb" CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/tqma6q_mba6_spi_defconfig b/configs/tqma6q_mba6_spi_defconfig index a3bca139412..19f0ec06f75 100644 --- a/configs/tqma6q_mba6_spi_defconfig +++ b/configs/tqma6q_mba6_spi_defconfig @@ -19,6 +19,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe; run mmcboot; run netboot; run panicboot" CONFIG_DEFAULT_FDT_FILE="imx6q-mba6x.dtb" CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/tqma6s_mba6_mmc_defconfig b/configs/tqma6s_mba6_mmc_defconfig index b41ace3d41d..96e4d29b648 100644 --- a/configs/tqma6s_mba6_mmc_defconfig +++ b/configs/tqma6s_mba6_mmc_defconfig @@ -16,6 +16,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run mmcboot; run netboot; run panicboot" CONFIG_DEFAULT_FDT_FILE="imx6dl-mba6x.dtb" CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/tqma6s_mba6_spi_defconfig b/configs/tqma6s_mba6_spi_defconfig index b9a3facdb1b..1b83dc25221 100644 --- a/configs/tqma6s_mba6_spi_defconfig +++ b/configs/tqma6s_mba6_spi_defconfig @@ -19,6 +19,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe; run mmcboot; run netboot; run panicboot" CONFIG_DEFAULT_FDT_FILE="imx6dl-mba6x.dtb" CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/trimslice_defconfig b/configs/trimslice_defconfig index b28349dc1c8..a435fe1926b 100644 --- a/configs/trimslice_defconfig +++ b/configs/trimslice_defconfig @@ -15,6 +15,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra20 (TrimSlice) # " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig index 11f8b5b1051..ae55980f2c9 100644 --- a/configs/tuge1_defconfig +++ b/configs/tuge1_defconfig @@ -131,6 +131,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/turris_mox_defconfig b/configs/turris_mox_defconfig index c1bd1de4a91..018ec508e80 100644 --- a/configs/turris_mox_defconfig +++ b/configs/turris_mox_defconfig @@ -28,6 +28,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_SHA1SUM=y CONFIG_CMD_CLK=y # CONFIG_CMD_FLASH is not set diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index da94ca74ac9..b8b01e2b33f 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -39,6 +39,7 @@ CONFIG_MISC_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y CONFIG_CMD_SHA1SUM=y diff --git a/configs/tuxx1_defconfig b/configs/tuxx1_defconfig index c2536640621..9c865c143a5 100644 --- a/configs/tuxx1_defconfig +++ b/configs/tuxx1_defconfig @@ -153,6 +153,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/u200_defconfig b/configs/u200_defconfig index 609f282c65a..a0bcf5d5bbc 100644 --- a/configs/u200_defconfig +++ b/configs/u200_defconfig @@ -15,6 +15,7 @@ CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y diff --git a/configs/uDPU_defconfig b/configs/uDPU_defconfig index f7cd1a0589b..ed13a2b43a4 100644 --- a/configs/uDPU_defconfig +++ b/configs/uDPU_defconfig @@ -24,6 +24,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="uDPU>> " +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig index ab2b2ee6755..9980a6e955e 100644 --- a/configs/udoo_defconfig +++ b/configs/udoo_defconfig @@ -25,6 +25,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y # CONFIG_CMD_PINMUX is not set diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig index 2daf5f81bbf..5885cfe9689 100644 --- a/configs/udoo_neo_defconfig +++ b/configs/udoo_neo_defconfig @@ -25,6 +25,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y # CONFIG_CMD_PINMUX is not set diff --git a/configs/variscite_dart6ul_defconfig b/configs/variscite_dart6ul_defconfig index 187402a61bd..cf17f7e4330 100644 --- a/configs/variscite_dart6ul_defconfig +++ b/configs/variscite_dart6ul_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run mmc_mmc_fit" CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig index aa47fbca5ba..79e30788388 100644 --- a/configs/venice2_defconfig +++ b/configs/venice2_defconfig @@ -15,6 +15,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra124 (Venice2) # " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/ventana_defconfig b/configs/ventana_defconfig index 1c8857e44cb..4d9fe46b2fa 100644 --- a/configs/ventana_defconfig +++ b/configs/ventana_defconfig @@ -13,6 +13,7 @@ CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_PREBOOT=y CONFIG_SYS_PROMPT="Tegra20 (Ventana) # " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig index 46d4dd72106..1f77b3000c5 100644 --- a/configs/verdin-imx8mm_defconfig +++ b/configs/verdin-imx8mm_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="Verdin iMX8MM # " +CONFIG_SYS_MAXARGS=64 # CONFIG_BOOTM_NETBSD is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_EXPORTENV is not set diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig index 4b7cf74f6cd..c09d56119c4 100644 --- a/configs/verdin-imx8mp_defconfig +++ b/configs/verdin-imx8mp_defconfig @@ -49,6 +49,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="Verdin iMX8MP # " +CONFIG_SYS_MAXARGS=64 # CONFIG_BOOTM_NETBSD is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_EXPORTENV is not set diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig index 967bc560936..794ce7394cc 100644 --- a/configs/vexpress_aemv8a_juno_defconfig +++ b/configs/vexpress_aemv8a_juno_defconfig @@ -14,6 +14,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/sda2 rw rootwait earlycon=pl # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="VExpress64# " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_MEMTEST=y CONFIG_CMD_ARMFLASH=y CONFIG_CMD_PCI=y diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig index 1a4cbc1cdd0..7e4a5cc9bcc 100644 --- a/configs/vexpress_aemv8a_semi_defconfig +++ b/configs/vexpress_aemv8a_semi_defconfig @@ -14,6 +14,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1c090000 debug user_debug=31 loglevel=9" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="VExpress64# " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_ABOOTIMG=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_ARMFLASH=y diff --git a/configs/vexpress_aemv8r_defconfig b/configs/vexpress_aemv8r_defconfig index a1c5d887170..6b470f59a3e 100644 --- a/configs/vexpress_aemv8r_defconfig +++ b/configs/vexpress_aemv8r_defconfig @@ -11,5 +11,6 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x9c090000 rootfstype=ext4 root=/dev/vda2 rw rootwait" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="VExpress64# " +CONFIG_SYS_MAXARGS=64 # CONFIG_MMC is not set CONFIG_VIRTIO_MMIO=y diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig index 57fd3376bbc..cf14a0e6c4c 100644 --- a/configs/vining_2000_defconfig +++ b/configs/vining_2000_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/vocore2_defconfig b/configs/vocore2_defconfig index 86765545744..6240e47b3f2 100644 --- a/configs/vocore2_defconfig +++ b/configs/vocore2_defconfig @@ -33,6 +33,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_LICENSE=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index 569b5873ffc..f605ce1cd72 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/warp7_bl33_defconfig b/configs/warp7_bl33_defconfig index 100f1c93627..70f12dc81c2 100644 --- a/configs/warp7_bl33_defconfig +++ b/configs/warp7_bl33_defconfig @@ -19,6 +19,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then run do_bootscript_hab;if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; fi; fi; fi" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig index b72332c778a..50c4ba0f305 100644 --- a/configs/warp7_defconfig +++ b/configs/warp7_defconfig @@ -23,6 +23,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then run do_bootscript_hab;if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; fi; fi; fi" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/warp_defconfig b/configs/warp_defconfig index a3bc5b68528..a77148f8c0c 100644 --- a/configs/warp_defconfig +++ b/configs/warp_defconfig @@ -16,6 +16,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/wetek-core2_defconfig b/configs/wetek-core2_defconfig index 07268c14a04..60dad176ba7 100644 --- a/configs/wetek-core2_defconfig +++ b/configs/wetek-core2_defconfig @@ -15,6 +15,7 @@ CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_ADC=y diff --git a/configs/xenguest_arm64_defconfig b/configs/xenguest_arm64_defconfig index 11fca0907de..93e0b7f59b6 100644 --- a/configs/xenguest_arm64_defconfig +++ b/configs/xenguest_arm64_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_LOAD_ADDR=0x40000000 CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTDELAY=10 CONFIG_SYS_PROMPT="xenguest# " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_BDI is not set # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set diff --git a/configs/xilinx_versal_mini_defconfig b/configs/xilinx_versal_mini_defconfig index 00d08f49f61..153f8e796e9 100644 --- a/configs/xilinx_versal_mini_defconfig +++ b/configs/xilinx_versal_mini_defconfig @@ -29,6 +29,7 @@ CONFIG_CLOCKS=y # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_PROMPT="Versal> " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_BOOTM is not set diff --git a/configs/xilinx_versal_mini_emmc0_defconfig b/configs/xilinx_versal_mini_emmc0_defconfig index 9d2f97576bb..af7727c2e1c 100644 --- a/configs/xilinx_versal_mini_emmc0_defconfig +++ b/configs/xilinx_versal_mini_emmc0_defconfig @@ -25,6 +25,7 @@ CONFIG_CLOCKS=y # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_PROMPT="Versal> " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/xilinx_versal_mini_emmc1_defconfig b/configs/xilinx_versal_mini_emmc1_defconfig index 7efb9287561..073467212b3 100644 --- a/configs/xilinx_versal_mini_emmc1_defconfig +++ b/configs/xilinx_versal_mini_emmc1_defconfig @@ -25,6 +25,7 @@ CONFIG_CLOCKS=y # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_PROMPT="Versal> " +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index 38747ffd02c..d7dda69496b 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -22,6 +22,7 @@ CONFIG_USE_PREBOOT=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_CLOCKS=y CONFIG_SYS_PROMPT="Versal> " +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_MEMTEST=y diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index 1f3e6a42a14..75afd1c6024 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_FPGA=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 +CONFIG_SYS_MAXARGS=32 # CONFIG_BOOTM_NETBSD is not set CONFIG_CMD_IMLS=y CONFIG_CMD_THOR_DOWNLOAD=y diff --git a/configs/xilinx_zynqmp_mini_defconfig b/configs/xilinx_zynqmp_mini_defconfig index f2eaec2f91b..ff1c60762bf 100644 --- a/configs/xilinx_zynqmp_mini_defconfig +++ b/configs/xilinx_zynqmp_mini_defconfig @@ -21,6 +21,7 @@ CONFIG_CLOCKS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index b4052771566..d220e58f63a 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -24,6 +24,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_CLOCKS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index 5fa1337d761..a66e1427194 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -24,6 +24,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_CLOCKS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig index 90e28203b3f..e5c4599ce56 100644 --- a/configs/xilinx_zynqmp_mini_nand_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_defconfig @@ -22,6 +22,7 @@ CONFIG_CLOCKS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/xilinx_zynqmp_mini_nand_single_defconfig b/configs/xilinx_zynqmp_mini_nand_single_defconfig index 1a63ec9195f..6a596292115 100644 --- a/configs/xilinx_zynqmp_mini_nand_single_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_single_defconfig @@ -22,6 +22,7 @@ CONFIG_CLOCKS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index bdda942db6d..00ba942a0fe 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -24,6 +24,7 @@ CONFIG_CLOCKS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set +CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/xilinx_zynqmp_r5_defconfig b/configs/xilinx_zynqmp_r5_defconfig index 3dcfa43af59..c383f4c0762 100644 --- a/configs/xilinx_zynqmp_r5_defconfig +++ b/configs/xilinx_zynqmp_r5_defconfig @@ -15,6 +15,7 @@ CONFIG_DEBUG_UART=y CONFIG_BOOTSTAGE=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="ZynqMP r5> " +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_BOOTSTAGE=y CONFIG_OF_EMBED=y diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 35894076c52..8b1529d8907 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig index b2c5924c256..8136e3540af 100644 --- a/configs/zynq_cse_nand_defconfig +++ b/configs/zynq_cse_nand_defconfig @@ -25,6 +25,7 @@ CONFIG_SPL_STACK_R=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig index 280627e4ca4..2920d87ab42 100644 --- a/configs/zynq_cse_nor_defconfig +++ b/configs/zynq_cse_nor_defconfig @@ -25,6 +25,7 @@ CONFIG_SPL_STACK_R=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 9d4e49e8f3c..0d1b214ce18 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -34,6 +34,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set +CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h index 167d44e400f..0d235f867f6 100644 --- a/include/config_fallbacks.h +++ b/include/config_fallbacks.h @@ -42,8 +42,4 @@ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) #endif -#ifndef CONFIG_SYS_MAXARGS -#define CONFIG_SYS_MAXARGS 16 -#endif - #endif /* __CONFIG_FALLBACKS_H */ diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index b872ade1443..2ddd110e443 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -86,9 +86,6 @@ /* Miscellaneous configurable options */ -/* We set the max number of command args high to avoid HUSH bugs. */ -#define CONFIG_SYS_MAXARGS 64 - /* Print Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ + sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index c8422264b75..1d90505ee25 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -75,7 +75,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/apalis-tk1.h b/include/configs/apalis-tk1.h index face78e1dd4..fc802d1f7ff 100644 --- a/include/configs/apalis-tk1.h +++ b/include/configs/apalis-tk1.h @@ -97,10 +97,6 @@ #undef CONFIG_SYS_BARGSIZE #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -/* Increase maximum number of arguments */ -#undef CONFIG_SYS_MAXARGS -#define CONFIG_SYS_MAXARGS 32 - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index aa93d10f852..c825940cf10 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -121,8 +121,6 @@ /* Miscellaneous configurable options */ #undef CONFIG_SYS_CBSIZE #define CONFIG_SYS_CBSIZE 1024 -#undef CONFIG_SYS_MAXARGS -#define CONFIG_SYS_MAXARGS 48 /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h index d1d518a5340..6b169a091ed 100644 --- a/include/configs/apalis_t30.h +++ b/include/configs/apalis_t30.h @@ -34,10 +34,6 @@ #undef CONFIG_SYS_BARGSIZE #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -/* Increase maximum number of arguments */ -#undef CONFIG_SYS_MAXARGS -#define CONFIG_SYS_MAXARGS 32 - #define UBOOT_UPDATE \ "uboot_hwpart=1\0" \ "uboot_blk=0\0" \ diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index ba314026ce9..2d30b976985 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -37,11 +37,6 @@ #define CONFIG_SYS_PBSIZE \ (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -/* - * max number of command args - */ -#define CONFIG_SYS_MAXARGS 16 - /* * Boot Argument Buffer Size */ diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h index 81b4218c888..0cdb35b56a9 100644 --- a/include/configs/bcm_ns3.h +++ b/include/configs/bcm_ns3.h @@ -32,7 +32,6 @@ #define CONFIG_SYS_CBSIZE SZ_1K #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* diff --git a/include/configs/bcmstb.h b/include/configs/bcmstb.h index 98c815961c0..6cf2886b5d2 100644 --- a/include/configs/bcmstb.h +++ b/include/configs/bcmstb.h @@ -91,7 +91,6 @@ extern phys_addr_t prior_stage_fdt_address; * CONFIG_SYS_LOAD_ADDR - 1 MiB. */ #define CONFIG_SYS_CBSIZE 512 -#define CONFIG_SYS_MAXARGS 32 /* * Large kernel image bootm configuration. diff --git a/include/configs/bmips_common.h b/include/configs/bmips_common.h index 899a538082e..64c9ea1e143 100644 --- a/include/configs/bmips_common.h +++ b/include/configs/bmips_common.h @@ -13,7 +13,6 @@ 230400, 500000, 1500000 } /* Memory usage */ -#define CONFIG_SYS_MAXARGS 24 #define CONFIG_SYS_BOOTPARAMS_LEN SZ_128K #define CONFIG_SYS_CBSIZE SZ_512 diff --git a/include/configs/broadcom_bcm963158.h b/include/configs/broadcom_bcm963158.h index 5aa784d88ca..4e79ae5e7e2 100644 --- a/include/configs/broadcom_bcm963158.h +++ b/include/configs/broadcom_bcm963158.h @@ -13,7 +13,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ 230400, 500000, 1500000 } /* Memory usage */ -#define CONFIG_SYS_MAXARGS 24 #define CONFIG_SYS_BOOTM_LEN (16 * 1024 * 1024) /* diff --git a/include/configs/broadcom_bcm96753ref.h b/include/configs/broadcom_bcm96753ref.h index c002985cf45..0b9e3745565 100644 --- a/include/configs/broadcom_bcm96753ref.h +++ b/include/configs/broadcom_bcm96753ref.h @@ -13,7 +13,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ 230400, 500000, 1500000 } /* Memory usage */ -#define CONFIG_SYS_MAXARGS 24 /* * 6853 diff --git a/include/configs/broadcom_bcm968360bg.h b/include/configs/broadcom_bcm968360bg.h index 01bab046ddb..bc96751090a 100644 --- a/include/configs/broadcom_bcm968360bg.h +++ b/include/configs/broadcom_bcm968360bg.h @@ -13,7 +13,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ 230400, 500000, 1500000 } /* Memory usage */ -#define CONFIG_SYS_MAXARGS 24 /* * 6858 diff --git a/include/configs/broadcom_bcm968580xref.h b/include/configs/broadcom_bcm968580xref.h index ebfc2ecc0be..7388a2550a1 100644 --- a/include/configs/broadcom_bcm968580xref.h +++ b/include/configs/broadcom_bcm968580xref.h @@ -13,7 +13,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ 230400, 500000, 1500000 } /* Memory usage */ -#define CONFIG_SYS_MAXARGS 24 /* * 6858 diff --git a/include/configs/bur_cfg_common.h b/include/configs/bur_cfg_common.h index 69850117637..39fc05b0be1 100644 --- a/include/configs/bur_cfg_common.h +++ b/include/configs/bur_cfg_common.h @@ -27,9 +27,6 @@ /* As stated above, the following choices are optional. */ -/* We set the max number of command args high to avoid HUSH bugs. */ -#define CONFIG_SYS_MAXARGS 64 - /* Console I/O Buffer Size */ #define CONFIG_SYS_CBSIZE 512 diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index 364bd50b591..ccc712786f4 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -119,7 +119,6 @@ /* Console buffer and boot args */ #define CONFIG_SYS_CBSIZE 2048 -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define BOOTAUX_RESERVED_MEM_BASE 0x88000000 diff --git a/include/configs/ci20.h b/include/configs/ci20.h index cc70a59e728..2d72d9939ce 100644 --- a/include/configs/ci20.h +++ b/include/configs/ci20.h @@ -29,7 +29,6 @@ #define DM9000_DATA (CONFIG_DM9000_BASE + 2) #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ -#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot argument buffer size */ diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h index 3ed89c2776c..9feb9e5ae05 100644 --- a/include/configs/colibri-imx8x.h +++ b/include/configs/colibri-imx8x.h @@ -108,7 +108,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 9ca6bef192f..22a4d7f948e 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -108,8 +108,6 @@ /* Miscellaneous configurable options */ #undef CONFIG_SYS_CBSIZE #define CONFIG_SYS_CBSIZE 1024 -#undef CONFIG_SYS_MAXARGS -#define CONFIG_SYS_MAXARGS 48 /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index f6b3ab1b041..a67fbeca7f9 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -36,10 +36,6 @@ #undef CONFIG_SYS_BARGSIZE #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -/* Increase maximum number of arguments */ -#undef CONFIG_SYS_MAXARGS -#define CONFIG_SYS_MAXARGS 32 - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/colibri_t30.h b/include/configs/colibri_t30.h index 1ce0def4ddf..bf8da9fcf98 100644 --- a/include/configs/colibri_t30.h +++ b/include/configs/colibri_t30.h @@ -32,10 +32,6 @@ #undef CONFIG_SYS_BARGSIZE #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -/* Increase maximum number of arguments */ -#undef CONFIG_SYS_MAXARGS -#define CONFIG_SYS_MAXARGS 32 - #define UBOOT_UPDATE \ "uboot_hwpart=1\0" \ "uboot_blk=0\0" \ diff --git a/include/configs/crs3xx-98dx3236.h b/include/configs/crs3xx-98dx3236.h index 4dbc7582669..07769c9e0e4 100644 --- a/include/configs/crs3xx-98dx3236.h +++ b/include/configs/crs3xx-98dx3236.h @@ -24,7 +24,5 @@ * to enable certain macros */ #include "mv-common.h" -#undef CONFIG_SYS_MAXARGS -#define CONFIG_SYS_MAXARGS 96 #endif /* _CONFIG_CRS3XX_98DX3236_H */ diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h index 6538e66052a..9ad9173f7d4 100644 --- a/include/configs/db-88f6820-amc.h +++ b/include/configs/db-88f6820-amc.h @@ -58,7 +58,5 @@ * to enable certain macros */ #include "mv-common.h" -#undef CONFIG_SYS_MAXARGS -#define CONFIG_SYS_MAXARGS 96 #endif /* _CONFIG_DB_88F6820_AMC_H */ diff --git a/include/configs/db-xc3-24g4xg.h b/include/configs/db-xc3-24g4xg.h index 1d242bf4e65..84ea1baa997 100644 --- a/include/configs/db-xc3-24g4xg.h +++ b/include/configs/db-xc3-24g4xg.h @@ -20,7 +20,5 @@ * to enable certain macros */ #include "mv-common.h" -#undef CONFIG_SYS_MAXARGS -#define CONFIG_SYS_MAXARGS 96 #endif /* _CONFIG_DB_XC3_24G4G_H */ diff --git a/include/configs/display5.h b/include/configs/display5.h index 7bd653364d3..9ebfd4bd2a0 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -290,7 +290,6 @@ /* Print Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 32 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_STANDALONE_LOAD_ADDR 0x10001000 diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h index 14ba52a2eb3..f8186a1f0a8 100644 --- a/include/configs/dragonboard410c.h +++ b/include/configs/dragonboard410c.h @@ -76,6 +76,5 @@ REFLASH(dragonboard/u-boot.img, 8)\ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#define CONFIG_SYS_MAXARGS 64 /* max command args */ #endif diff --git a/include/configs/dragonboard820c.h b/include/configs/dragonboard820c.h index 1e2b15b33f9..11dee56090e 100644 --- a/include/configs/dragonboard820c.h +++ b/include/configs/dragonboard820c.h @@ -45,6 +45,5 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 -#define CONFIG_SYS_MAXARGS 64 #endif diff --git a/include/configs/edison.h b/include/configs/edison.h index 70cccc6fe6b..3161776c949 100644 --- a/include/configs/edison.h +++ b/include/configs/edison.h @@ -11,7 +11,6 @@ /* Miscellaneous configurable options */ #define CONFIG_SYS_CBSIZE 2048 -#define CONFIG_SYS_MAXARGS 128 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_STACK_SIZE (32 * 1024) diff --git a/include/configs/gardena-smart-gateway-mt7688.h b/include/configs/gardena-smart-gateway-mt7688.h index 269bb93272c..9b78e1f16d0 100644 --- a/include/configs/gardena-smart-gateway-mt7688.h +++ b/include/configs/gardena-smart-gateway-mt7688.h @@ -40,7 +40,6 @@ /* RAM */ /* Memory usage */ -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) #define CONFIG_SYS_CBSIZE 512 diff --git a/include/configs/gazerbeam.h b/include/configs/gazerbeam.h index 6b910d55193..60347335e8a 100644 --- a/include/configs/gazerbeam.h +++ b/include/configs/gazerbeam.h @@ -62,7 +62,6 @@ /* Print Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 19d5b6261f1..92e401eb99d 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -63,6 +63,5 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#define CONFIG_SYS_MAXARGS 64 /* max command args */ #endif /* __HIKEY_H */ diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index 8d9212ec64c..d3adee64cd5 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -149,7 +149,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h index 573ddaf2952..d2c8e641475 100644 --- a/include/configs/imx8mm_beacon.h +++ b/include/configs/imx8mm_beacon.h @@ -95,7 +95,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h index 67667dd523d..9b03a576aa1 100644 --- a/include/configs/imx8mm_data_modul_edm_sbc.h +++ b/include/configs/imx8mm_data_modul_edm_sbc.h @@ -43,7 +43,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE \ (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index 5e8f19c43fb..c4a433b93ad 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -72,7 +72,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index b9b24a8c51d..13df41aa9bb 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -70,7 +70,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index 9836d5b73ca..41ffe309017 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -106,7 +106,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h index 79c6b1076ff..f23581b8337 100644 --- a/include/configs/imx8mn_beacon.h +++ b/include/configs/imx8mn_beacon.h @@ -111,7 +111,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/imx8mn_bsh_smm_s2_common.h b/include/configs/imx8mn_bsh_smm_s2_common.h index 6387576c2da..9373fab7fcc 100644 --- a/include/configs/imx8mn_bsh_smm_s2_common.h +++ b/include/configs/imx8mn_bsh_smm_s2_common.h @@ -49,7 +49,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index 805ae2a7518..b5918d48afa 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -79,7 +79,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/imx8mn_var_som.h b/include/configs/imx8mn_var_som.h index 00358892b28..0d3729e32ab 100644 --- a/include/configs/imx8mn_var_som.h +++ b/include/configs/imx8mn_var_som.h @@ -68,7 +68,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index 3cbe11a9035..c00aec9fa1e 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -102,7 +102,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/imx8mp_dhcom_pdk2.h b/include/configs/imx8mp_dhcom_pdk2.h index 7d5403fa9f4..c4ea430dff4 100644 --- a/include/configs/imx8mp_dhcom_pdk2.h +++ b/include/configs/imx8mp_dhcom_pdk2.h @@ -43,7 +43,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE \ (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index 1e7c44c42a4..ef8ec35847e 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -83,7 +83,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index 52e8ea8f86a..29229be32a1 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -170,7 +170,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h index 4120e4cc6ba..d68c2cfae18 100644 --- a/include/configs/imx8mp_venice.h +++ b/include/configs/imx8mp_venice.h @@ -102,7 +102,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index 6eecfc813a4..fd3f3b0435c 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -75,7 +75,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index e31f4135ae5..768a62920b8 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -81,7 +81,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index 57e45b0447c..09b25b31c04 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -109,7 +109,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index 26dc4ded030..57a3277ddb2 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -129,7 +129,6 @@ /* Misc configuration */ #define CONFIG_SYS_CBSIZE 2048 -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #endif /* __IMX8QXP_MEK_H */ diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index 05df43b39b4..a560b5bd36b 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -72,7 +72,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h index 85cf516e162..2c000189811 100644 --- a/include/configs/km/keymile-common.h +++ b/include/configs/km/keymile-common.h @@ -17,7 +17,6 @@ #else #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ #endif -#define CONFIG_SYS_MAXARGS 32 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_HUSH_INIT_VAR diff --git a/include/configs/linkit-smart-7688.h b/include/configs/linkit-smart-7688.h index 86bad6fa036..667b2c6b231 100644 --- a/include/configs/linkit-smart-7688.h +++ b/include/configs/linkit-smart-7688.h @@ -41,7 +41,6 @@ /* RAM */ /* Memory usage */ -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) #define CONFIG_SYS_CBSIZE 512 diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 67da01f5e3a..98cb0015598 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -70,7 +70,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#define CONFIG_SYS_MAXARGS 64 /* max command args */ #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index 09168a28e7d..272d7e1496a 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -179,7 +179,6 @@ #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ #define CONFIG_SYS_PBSIZE \ (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_LS102XA_STREAM_ID diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index a98d8dd7200..5c2ed14bfd5 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -64,8 +64,6 @@ sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */ -#define CONFIG_SYS_MAXARGS 64 /* max command args */ - #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ #define OCRAM_NONSECURE_SIZE 0x00010000 diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 26db8ffe7e2..bedd444ae49 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -257,8 +257,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#define CONFIG_SYS_MAXARGS 64 /* max command args */ - #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ #include diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index fb2011aa559..5e2b8a64dd8 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -237,8 +237,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#define CONFIG_SYS_MAXARGS 64 /* max command args */ - #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ #include diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 0c73a9e0dce..41b72c9508c 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -153,7 +153,6 @@ unsigned long long get_qixis_addr(void); #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */ -#define CONFIG_SYS_MAXARGS 64 /* max command args */ #ifdef CONFIG_SPL #define CONFIG_SPL_BSS_START_ADDR 0x80100000 diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index e77e9b7f376..21235ff0f54 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -144,7 +144,6 @@ unsigned long long get_qixis_addr(void); /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#define CONFIG_SYS_MAXARGS 64 /* max command args */ #define CONFIG_SPL_BSS_START_ADDR 0x80100000 #define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index aaba8fc26d9..ed65f6c364e 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -120,7 +120,6 @@ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */ -#define CONFIG_SYS_MAXARGS 64 /* max command args */ #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 90877f548d6..ea582e5d075 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -33,7 +33,6 @@ * U-Boot general configurations */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ -#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot argument buffer size */ diff --git a/include/configs/meson64.h b/include/configs/meson64.h index 196e58ed9a3..3824d24ce1f 100644 --- a/include/configs/meson64.h +++ b/include/configs/meson64.h @@ -29,7 +29,6 @@ #define STDIN_CFG "serial" #endif -#define CONFIG_SYS_MAXARGS 32 #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_SDRAM_BASE 0 diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 663837f33dc..ac7a623bdb2 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -36,8 +36,6 @@ /* size of console buffer */ #define CONFIG_SYS_CBSIZE 512 -/* max number of command args */ -#define CONFIG_SYS_MAXARGS 15 #define CONFIG_HOSTNAME "microblaze-generic" diff --git a/include/configs/mt7620.h b/include/configs/mt7620.h index 703efcd8f34..af8d6afbf0b 100644 --- a/include/configs/mt7620.h +++ b/include/configs/mt7620.h @@ -18,7 +18,6 @@ #define CONFIG_SYS_BOOTM_LEN 0x1000000 -#define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_CBSIZE 1024 /* SPL */ diff --git a/include/configs/mt7622.h b/include/configs/mt7622.h index 97fcf2f87bd..146bca748da 100644 --- a/include/configs/mt7622.h +++ b/include/configs/mt7622.h @@ -11,7 +11,6 @@ #include -#define CONFIG_SYS_MAXARGS 8 #define CONFIG_SYS_BOOTM_LEN SZ_64M #define CONFIG_SYS_CBSIZE SZ_1K #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ diff --git a/include/configs/mt7623.h b/include/configs/mt7623.h index 6023f8128ef..be39c69f605 100644 --- a/include/configs/mt7623.h +++ b/include/configs/mt7623.h @@ -13,7 +13,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_SYS_MAXARGS 8 #define CONFIG_SYS_BOOTM_LEN SZ_64M #define CONFIG_SYS_CBSIZE SZ_1K #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ diff --git a/include/configs/mt7628.h b/include/configs/mt7628.h index 1008aaab1d2..21381217fc8 100644 --- a/include/configs/mt7628.h +++ b/include/configs/mt7628.h @@ -18,7 +18,6 @@ #define CONFIG_SYS_BOOTM_LEN 0x1000000 -#define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_CBSIZE 1024 /* Serial SPL */ diff --git a/include/configs/mt7629.h b/include/configs/mt7629.h index c58545be04b..f5b3cf86c71 100644 --- a/include/configs/mt7629.h +++ b/include/configs/mt7629.h @@ -13,7 +13,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_SYS_MAXARGS 8 #define CONFIG_SYS_BOOTM_LEN SZ_64M #define CONFIG_SYS_CBSIZE SZ_1K #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index cc3b597f286..34af2041a8e 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -55,7 +55,6 @@ /* * Other required minimal configurations */ -#define CONFIG_SYS_MAXARGS 32 /* max number of command args */ /* ====> Include platform Common Definitions */ #include diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h index 06882fb51e8..276b55570da 100644 --- a/include/configs/mvebu_armada-37xx.h +++ b/include/configs/mvebu_armada-37xx.h @@ -30,7 +30,6 @@ /* * Other required minimal configurations */ -#define CONFIG_SYS_MAXARGS 32 /* max number of command args */ /* End of 16M scrubbed by training in bootrom */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000) diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h index 8e325e8f4a0..a37586a9947 100644 --- a/include/configs/mvebu_armada-8k.h +++ b/include/configs/mvebu_armada-8k.h @@ -24,7 +24,6 @@ /* * Other required minimal configurations */ -#define CONFIG_SYS_MAXARGS 32 /* max number of command args */ /* End of 16M scrubbed by training in bootrom */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000) diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index 572261b0426..fba57ac533e 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -88,7 +88,6 @@ /* Miscellaneous configurable options */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#define CONFIG_SYS_MAXARGS 48 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 10e46c628d5..e34a6985ef9 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -27,7 +27,6 @@ /* Miscellaneous configurable options */ #define CONFIG_SYS_CBSIZE 512 -#define CONFIG_SYS_MAXARGS 32 /* MMC */ diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index 9f7d60f8fbd..0ef216e1a46 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -24,7 +24,6 @@ /* Miscellaneous configurable options */ #define CONFIG_SYS_CBSIZE 512 -#define CONFIG_SYS_MAXARGS 32 /* UART */ diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h index 7644274d84b..a6e533cabc0 100644 --- a/include/configs/mx7ulp_evk.h +++ b/include/configs/mx7ulp_evk.h @@ -25,8 +25,6 @@ /* Miscellaneous configurable options */ #define CONFIG_SYS_CBSIZE 512 -#define CONFIG_SYS_MAXARGS 256 - /* Physical Memory Map */ #define PHYS_SDRAM 0x60000000 diff --git a/include/configs/mxs.h b/include/configs/mxs.h index 8dcc45c9e5d..d25b621350b 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -79,7 +79,6 @@ /* U-Boot general configuration */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ -#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot argument buffer size */ diff --git a/include/configs/octeontx2_common.h b/include/configs/octeontx2_common.h index 6ec2d3e2688..3b34b56c7a8 100644 --- a/include/configs/octeontx2_common.h +++ b/include/configs/octeontx2_common.h @@ -26,8 +26,6 @@ #define CONFIG_SYS_CBSIZE 1024 /** Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_MAXARGS 64 /** max command args */ - #define CONFIG_SYS_MMC_MAX_BLK_COUNT 8192 #if defined(CONFIG_MMC_OCTEONTX) diff --git a/include/configs/octeontx_common.h b/include/configs/octeontx_common.h index 81dbff2d672..ddc70d4b942 100644 --- a/include/configs/octeontx_common.h +++ b/include/configs/octeontx_common.h @@ -57,8 +57,6 @@ #define CONFIG_SYS_CBSIZE 1024 /** Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_MAXARGS 64 /** max command args */ - #define CONFIG_SYS_MMC_MAX_BLK_COUNT 8192 /** EMMC specific defines */ diff --git a/include/configs/owl-common.h b/include/configs/owl-common.h index fabbb01e0c8..8de23e9c76a 100644 --- a/include/configs/owl-common.h +++ b/include/configs/owl-common.h @@ -24,7 +24,6 @@ /* Console configuration */ #define CONFIG_SYS_CBSIZE 1024 /* Console buffer size */ -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #endif diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h index 46fadd56106..028bf69a9c5 100644 --- a/include/configs/phycore_imx8mm.h +++ b/include/configs/phycore_imx8mm.h @@ -88,7 +88,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #endif /* __PHYCORE_IMX8MM_H */ diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h index eb92c423392..734699cdfdb 100644 --- a/include/configs/phycore_imx8mp.h +++ b/include/configs/phycore_imx8mp.h @@ -88,7 +88,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #endif /* __PHYCORE_IMX8MP_H */ diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index 1dc7d352590..abba909790f 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -88,7 +88,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/poleg.h b/include/configs/poleg.h index c21b063c059..f1b54248b62 100644 --- a/include/configs/poleg.h +++ b/include/configs/poleg.h @@ -11,7 +11,6 @@ #define CONFIG_SYS_PL310_BASE 0xF03FC000 /* L2 - Cache Regs Base (4k Space)*/ #endif -#define CONFIG_SYS_MAXARGS 32 #define CONFIG_SYS_CBSIZE 256 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_BOOTMAPSZ (0x30 << 20) diff --git a/include/configs/poplar.h b/include/configs/poplar.h index 222a14bc8f8..52285db27eb 100644 --- a/include/configs/poplar.h +++ b/include/configs/poplar.h @@ -51,6 +51,5 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 -#define CONFIG_SYS_MAXARGS 64 #endif /* _POPLAR_H_ */ diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h index 1d526a73802..efb3075acfb 100644 --- a/include/configs/presidio_asic.h +++ b/include/configs/presidio_asic.h @@ -61,7 +61,6 @@ #define GLOBAL_IO_DRIVE_CONTROL_OFFSET 0x4c /* max command args */ -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_EXTRA_ENV_SETTINGS "silent=y\0" /* nand driver parameters */ diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index 64743382eda..2c8000f03b1 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -26,7 +26,6 @@ /* console */ #define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400 } /* PHY needs a longer autoneg timeout */ diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h index 8f04e9de5a3..8c2e9dc4116 100644 --- a/include/configs/rk3128_common.h +++ b/include/configs/rk3128_common.h @@ -8,7 +8,6 @@ #include "rockchip-common.h" -#define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_HZ_CLOCK 24000000 diff --git a/include/configs/s5p4418_nanopi2.h b/include/configs/s5p4418_nanopi2.h index 882d19afbf6..0e64a15bc86 100644 --- a/include/configs/s5p4418_nanopi2.h +++ b/include/configs/s5p4418_nanopi2.h @@ -82,8 +82,6 @@ /* Print Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) -/* max number of command args */ -#define CONFIG_SYS_MAXARGS 16 /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE diff --git a/include/configs/sdm845.h b/include/configs/sdm845.h index 835f05d63e2..a69a70364fa 100644 --- a/include/configs/sdm845.h +++ b/include/configs/sdm845.h @@ -26,6 +26,5 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 -#define CONFIG_SYS_MAXARGS 64 #endif diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 08c4d52d658..37e65990acf 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -27,9 +27,6 @@ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) -/* We set the max number of command args high to avoid HUSH bugs. */ -#define CONFIG_SYS_MAXARGS 32 - /* Console I/O Buffer Size */ #define CONFIG_SYS_CBSIZE 1024 diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index e4e15f92d1b..599a5134b08 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -41,9 +41,6 @@ /* misc settings */ -/* We set the max number of command args high to avoid HUSH bugs. */ -#define CONFIG_SYS_MAXARGS 32 - /* setting board specific options */ #define CONFIG_SYS_AUTOLOAD "yes" diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 5ecd1e6399b..0cdb5473b18 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -61,7 +61,6 @@ */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ /* Print buffer size */ -#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot argument buffer size */ diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 3447b8f17c2..5459f892ee6 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -20,7 +20,6 @@ /* * U-Boot console configurations */ -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/stm32h743-disco.h b/include/configs/stm32h743-disco.h index c43b0d82853..1a4334c0787 100644 --- a/include/configs/stm32h743-disco.h +++ b/include/configs/stm32h743-disco.h @@ -18,8 +18,6 @@ #define CONFIG_SYS_HZ_CLOCK 1000000 -#define CONFIG_SYS_MAXARGS 16 - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) diff --git a/include/configs/stm32h743-eval.h b/include/configs/stm32h743-eval.h index d838449452a..4337a555158 100644 --- a/include/configs/stm32h743-eval.h +++ b/include/configs/stm32h743-eval.h @@ -18,8 +18,6 @@ #define CONFIG_SYS_HZ_CLOCK 1000000 -#define CONFIG_SYS_MAXARGS 16 - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) diff --git a/include/configs/stm32h750-art-pi.h b/include/configs/stm32h750-art-pi.h index db17939a8c8..e082791d619 100644 --- a/include/configs/stm32h750-art-pi.h +++ b/include/configs/stm32h750-art-pi.h @@ -18,8 +18,6 @@ #define CONFIG_SYS_HZ_CLOCK 1000000 -#define CONFIG_SYS_MAXARGS 16 - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index 72f07e1c1c2..ee2c58aeb9c 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -49,7 +49,6 @@ /* Print Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h index 5686a5b9104..19fa02ce5cc 100644 --- a/include/configs/synquacer.h +++ b/include/configs/synquacer.h @@ -41,7 +41,6 @@ #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE} #define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_SYS_MAXARGS 128 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* Since U-Boot 64bit PCIe support is limited, disable 64bit MMIO support */ diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 99b7bd07aa0..8bad995b080 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -41,7 +41,6 @@ */ #define CONFIG_SYS_CBSIZE (1024 * 2) /* Console I/O Buffer Size */ /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 64 /* max number of command args */ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h index 3537ba30e1f..0282b36c68c 100644 --- a/include/configs/thunderx_88xx.h +++ b/include/configs/thunderx_88xx.h @@ -49,7 +49,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#define CONFIG_SYS_MAXARGS 64 /* max command args */ #define PLL_REF_CLK 50000000 /* 50 MHz */ #define NS_PER_REF_CLK_TICK (1000000000/PLL_REF_CLK) diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index 7483bc821d3..e28d91a37a3 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -88,9 +88,6 @@ /* As stated above, the following choices are optional. */ -/* We set the max number of command args high to avoid HUSH bugs. */ -#define CONFIG_SYS_MAXARGS 64 - /* Console I/O Buffer Size */ #define CONFIG_SYS_CBSIZE 1024 /* Boot Argument Buffer Size */ diff --git a/include/configs/total_compute.h b/include/configs/total_compute.h index 0324b1e1b21..a4ab6196840 100644 --- a/include/configs/total_compute.h +++ b/include/configs/total_compute.h @@ -48,7 +48,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#define CONFIG_SYS_MAXARGS 64 /* max command args */ #define CONFIG_SYS_FLASH_BASE 0x0C000000 /* 256 x 256KiB sectors */ diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h index 21c351a816e..1e2c552bf50 100644 --- a/include/configs/tplink_wdr4300.h +++ b/include/configs/tplink_wdr4300.h @@ -28,7 +28,6 @@ */ /* Miscellaneous configurable options */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ -#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot argument buffer size */ diff --git a/include/configs/turris_mox.h b/include/configs/turris_mox.h index 6640ee495d2..7f1363f3cf7 100644 --- a/include/configs/turris_mox.h +++ b/include/configs/turris_mox.h @@ -12,7 +12,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000) #define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_SYS_MAXARGS 32 #define CONFIG_SYS_BAUDRATE_TABLE { 300, 600, 1200, 1800, 2400, 4800, \ 9600, 19200, 38400, 57600, 115200, \ 230400, 460800, 500000, 576000, \ diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index cd950ad055e..5c33baaa5e7 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -88,7 +88,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index 470f64d5a74..68a93c639c9 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -104,7 +104,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index 0632b367cad..b672ac54919 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -265,7 +265,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#define CONFIG_SYS_MAXARGS 64 /* max command args */ #ifdef CONFIG_TARGET_VEXPRESS64_JUNO #define CONFIG_SYS_FLASH_BASE 0x08000000 diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h index 7e3d589e3fd..2f3e32cf2b4 100644 --- a/include/configs/vocore2.h +++ b/include/configs/vocore2.h @@ -34,7 +34,6 @@ /* RAM */ /* Memory usage */ -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) #define CONFIG_SYS_CBSIZE 512 diff --git a/include/configs/xenguest_arm64.h b/include/configs/xenguest_arm64.h index 408c7b5dd69..d42adcefd7f 100644 --- a/include/configs/xenguest_arm64.h +++ b/include/configs/xenguest_arm64.h @@ -15,7 +15,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h index b78c2429489..060e964caf0 100644 --- a/include/configs/xilinx_versal.h +++ b/include/configs/xilinx_versal.h @@ -31,7 +31,6 @@ /* Console I/O Buffer Size */ #define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_MAXARGS 64 #if defined(CONFIG_CMD_DFU) #define DFU_DEFAULT_POLL_TIMEOUT 300 diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index f25d796a1e7..5bfb736133d 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -55,7 +55,6 @@ /* Console I/O Buffer Size */ #define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_MAXARGS 64 /* Ethernet driver */ #if defined(CONFIG_ZYNQ_GEM) diff --git a/include/configs/xilinx_zynqmp_r5.h b/include/configs/xilinx_zynqmp_r5.h index 3ec99e062df..50ea1b39078 100644 --- a/include/configs/xilinx_zynqmp_r5.h +++ b/include/configs/xilinx_zynqmp_r5.h @@ -15,8 +15,6 @@ /* Boot configuration */ -#define CONFIG_SYS_MAXARGS 32 /* max number of command args */ - #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index bd88b59f242..f8c0800e5fc 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -199,7 +199,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_SYS_MAXARGS 32 /* max number of command args */ #define CONFIG_SYS_CBSIZE 2048 /* Console I/O Buffer Size */ #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000 -- GitLab From d0ee7f295d742a80000cf6703a3fb9a7cb32ad68 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 11 May 2022 17:38:09 -0400 Subject: [PATCH 002/581] Convert CONFIG_SYS_PBSIZE to Kconfig This converts the following to Kconfig: CONFIG_SYS_PBSIZE Signed-off-by: Tom Rini --- README | 2 -- cmd/Kconfig | 4 ++++ configs/10m50_defconfig | 1 + configs/3c120_defconfig | 1 + configs/A10-OLinuXino-Lime_defconfig | 1 + configs/A10s-OLinuXino-M_defconfig | 1 + configs/A13-OLinuXinoM_defconfig | 1 + configs/A13-OLinuXino_defconfig | 1 + configs/A20-OLinuXino-Lime2-eMMC_defconfig | 1 + configs/A20-OLinuXino-Lime2_defconfig | 1 + configs/A20-OLinuXino-Lime_defconfig | 1 + configs/A20-OLinuXino_MICRO-eMMC_defconfig | 1 + configs/A20-OLinuXino_MICRO_defconfig | 1 + configs/A20-Olimex-SOM-EVB_defconfig | 1 + configs/A20-Olimex-SOM204-EVB-eMMC_defconfig | 1 + configs/A20-Olimex-SOM204-EVB_defconfig | 1 + configs/A33-OLinuXino_defconfig | 1 + configs/Ainol_AW1_defconfig | 1 + configs/Ampe_A76_defconfig | 1 + configs/Auxtek-T003_defconfig | 1 + configs/Auxtek-T004_defconfig | 1 + configs/Bananapi_M2_Ultra_defconfig | 1 + configs/Bananapi_defconfig | 1 + configs/Bananapi_m2m_defconfig | 1 + configs/Bananapro_defconfig | 1 + configs/CHIP_defconfig | 1 + configs/CHIP_pro_defconfig | 1 + configs/CSQ_CS908_defconfig | 1 + configs/Chuwi_V7_CW0825_defconfig | 1 + configs/Colombus_defconfig | 1 + configs/Cubieboard2_defconfig | 1 + configs/Cubieboard4_defconfig | 1 + configs/Cubieboard_defconfig | 1 + configs/Cubietruck_defconfig | 1 + configs/Cubietruck_plus_defconfig | 1 + configs/Empire_electronix_d709_defconfig | 1 + configs/Empire_electronix_m712_defconfig | 1 + configs/Hummingbird_A31_defconfig | 1 + configs/Hyundai_A7HD_defconfig | 1 + configs/Itead_Ibox_A20_defconfig | 1 + configs/Lamobo_R1_defconfig | 1 + configs/LicheePi_Zero_defconfig | 1 + configs/Linksprite_pcDuino3_Nano_defconfig | 1 + configs/Linksprite_pcDuino3_defconfig | 1 + configs/Linksprite_pcDuino_defconfig | 1 + configs/M5208EVBE_defconfig | 1 + configs/M5235EVB_Flash32_defconfig | 1 + configs/M5235EVB_defconfig | 1 + configs/M5249EVB_defconfig | 1 + configs/M5253DEMO_defconfig | 1 + configs/M5272C3_defconfig | 1 + configs/M5275EVB_defconfig | 1 + configs/M5282EVB_defconfig | 1 + configs/M53017EVB_defconfig | 1 + configs/M5329AFEE_defconfig | 1 + configs/M5329BFEE_defconfig | 1 + configs/M5373EVB_defconfig | 1 + configs/MCR3000_defconfig | 1 + configs/MK808C_defconfig | 1 + configs/MPC837XERDB_defconfig | 1 + configs/MPC8548CDS_36BIT_defconfig | 1 + configs/MPC8548CDS_defconfig | 1 + configs/MPC8548CDS_legacy_defconfig | 1 + configs/MSI_Primo73_defconfig | 1 + configs/MSI_Primo81_defconfig | 1 + configs/Marsboard_A10_defconfig | 1 + configs/Mele_A1000G_quad_defconfig | 1 + configs/Mele_A1000_defconfig | 1 + configs/Mele_I7_defconfig | 1 + configs/Mele_M3_defconfig | 1 + configs/Mele_M5_defconfig | 1 + configs/Mele_M9_defconfig | 1 + configs/Merrii_A80_Optimus_defconfig | 1 + configs/Mini-X_defconfig | 1 + configs/Nintendo_NES_Classic_Edition_defconfig | 1 + configs/Orangepi_defconfig | 1 + configs/Orangepi_mini_defconfig | 1 + configs/P1010RDB-PA_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PA_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PA_NAND_defconfig | 1 + configs/P1010RDB-PA_NOR_defconfig | 1 + configs/P1010RDB-PA_SDCARD_defconfig | 1 + configs/P1010RDB-PA_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PB_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_NAND_defconfig | 1 + configs/P1010RDB-PB_NOR_defconfig | 1 + configs/P1010RDB-PB_SDCARD_defconfig | 1 + configs/P1010RDB-PB_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_defconfig | 1 + configs/P1020RDB-PC_NAND_defconfig | 1 + configs/P1020RDB-PC_SDCARD_defconfig | 1 + configs/P1020RDB-PC_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_defconfig | 1 + configs/P1020RDB-PD_NAND_defconfig | 1 + configs/P1020RDB-PD_SDCARD_defconfig | 1 + configs/P1020RDB-PD_SPIFLASH_defconfig | 1 + configs/P1020RDB-PD_defconfig | 1 + configs/P2020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_36BIT_defconfig | 1 + configs/P2020RDB-PC_NAND_defconfig | 1 + configs/P2020RDB-PC_SDCARD_defconfig | 1 + configs/P2020RDB-PC_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_defconfig | 1 + configs/P2041RDB_NAND_defconfig | 1 + configs/P2041RDB_SDCARD_defconfig | 1 + configs/P2041RDB_SPIFLASH_defconfig | 1 + configs/P2041RDB_defconfig | 1 + configs/P3041DS_NAND_defconfig | 1 + configs/P3041DS_SDCARD_defconfig | 1 + configs/P3041DS_SPIFLASH_defconfig | 1 + configs/P3041DS_defconfig | 1 + configs/P4080DS_SDCARD_defconfig | 1 + configs/P4080DS_SPIFLASH_defconfig | 1 + configs/P4080DS_defconfig | 1 + configs/P5040DS_NAND_defconfig | 1 + configs/P5040DS_SDCARD_defconfig | 1 + configs/P5040DS_SPIFLASH_defconfig | 1 + configs/P5040DS_defconfig | 1 + configs/SBx81LIFKW_defconfig | 1 + configs/SBx81LIFXCAT_defconfig | 1 + configs/Sinlinx_SinA31s_defconfig | 1 + configs/Sinlinx_SinA33_defconfig | 1 + configs/Sinovoip_BPI_M2_defconfig | 1 + configs/Sinovoip_BPI_M3_defconfig | 1 + configs/Sunchip_CX-A99_defconfig | 1 + configs/T1024RDB_NAND_defconfig | 1 + configs/T1024RDB_SDCARD_defconfig | 1 + configs/T1024RDB_SPIFLASH_defconfig | 1 + configs/T1024RDB_defconfig | 1 + configs/T1042D4RDB_NAND_defconfig | 1 + configs/T1042D4RDB_SDCARD_defconfig | 1 + configs/T1042D4RDB_SPIFLASH_defconfig | 1 + configs/T1042D4RDB_defconfig | 1 + configs/T2080QDS_NAND_defconfig | 1 + configs/T2080QDS_SDCARD_defconfig | 1 + configs/T2080QDS_SECURE_BOOT_defconfig | 1 + configs/T2080QDS_SPIFLASH_defconfig | 1 + configs/T2080QDS_SRIO_PCIE_BOOT_defconfig | 1 + configs/T2080QDS_defconfig | 1 + configs/T2080RDB_NAND_defconfig | 1 + configs/T2080RDB_SDCARD_defconfig | 1 + configs/T2080RDB_SPIFLASH_defconfig | 1 + configs/T2080RDB_defconfig | 1 + configs/T2080RDB_revD_NAND_defconfig | 1 + configs/T2080RDB_revD_SDCARD_defconfig | 1 + configs/T2080RDB_revD_SPIFLASH_defconfig | 1 + configs/T2080RDB_revD_defconfig | 1 + configs/T4240RDB_SDCARD_defconfig | 1 + configs/T4240RDB_defconfig | 1 + configs/UTOO_P66_defconfig | 1 + configs/Wexler_TAB7200_defconfig | 1 + configs/Wits_Pro_A20_DKT_defconfig | 1 + configs/Wobo_i5_defconfig | 1 + configs/Yones_Toptech_BD1078_defconfig | 1 + configs/Yones_Toptech_BS1078_V2_defconfig | 1 + configs/a3y17lte_defconfig | 1 + configs/a5y17lte_defconfig | 1 + configs/a64-olinuxino-emmc_defconfig | 1 + configs/a64-olinuxino_defconfig | 1 + configs/a7y17lte_defconfig | 1 + configs/ae350_rv32_defconfig | 1 + configs/ae350_rv32_spl_defconfig | 1 + configs/ae350_rv32_spl_xip_defconfig | 1 + configs/ae350_rv32_xip_defconfig | 1 + configs/ae350_rv64_defconfig | 1 + configs/ae350_rv64_spl_defconfig | 1 + configs/ae350_rv64_spl_xip_defconfig | 1 + configs/ae350_rv64_xip_defconfig | 1 + configs/alt_defconfig | 1 + configs/am335x_shc_defconfig | 1 + configs/am335x_shc_ict_defconfig | 1 + configs/am335x_shc_netboot_defconfig | 1 + configs/am335x_shc_sdboot_defconfig | 1 + configs/am3517_evm_defconfig | 1 + configs/amarula_a64_relic_defconfig | 1 + configs/amcore_defconfig | 1 + configs/ap121_defconfig | 1 + configs/ap143_defconfig | 1 + configs/ap152_defconfig | 1 + configs/apalis-imx8_defconfig | 1 + configs/apalis-tk1_defconfig | 1 + configs/apalis_imx6_defconfig | 1 + configs/apalis_t30_defconfig | 1 + configs/apple_m1_defconfig | 1 + configs/aristainetos2c_defconfig | 1 + configs/aristainetos2ccslb_defconfig | 1 + configs/armadillo-800eva_defconfig | 1 + configs/arndale_defconfig | 1 + configs/astro_mcf5373l_defconfig | 1 + configs/at91sam9260ek_dataflash_cs0_defconfig | 1 + configs/at91sam9260ek_dataflash_cs1_defconfig | 1 + configs/at91sam9260ek_nandflash_defconfig | 1 + configs/at91sam9261ek_dataflash_cs0_defconfig | 1 + configs/at91sam9261ek_dataflash_cs3_defconfig | 1 + configs/at91sam9261ek_nandflash_defconfig | 1 + configs/at91sam9263ek_dataflash_cs0_defconfig | 1 + configs/at91sam9263ek_dataflash_defconfig | 1 + configs/at91sam9263ek_nandflash_defconfig | 1 + configs/at91sam9263ek_norflash_boot_defconfig | 1 + configs/at91sam9263ek_norflash_defconfig | 1 + configs/at91sam9g10ek_dataflash_cs0_defconfig | 1 + configs/at91sam9g10ek_dataflash_cs3_defconfig | 1 + configs/at91sam9g10ek_nandflash_defconfig | 1 + configs/at91sam9g20ek_2mmc_defconfig | 1 + configs/at91sam9g20ek_2mmc_nandflash_defconfig | 1 + configs/at91sam9g20ek_dataflash_cs0_defconfig | 1 + configs/at91sam9g20ek_dataflash_cs1_defconfig | 1 + configs/at91sam9g20ek_nandflash_defconfig | 1 + configs/at91sam9m10g45ek_mmc_defconfig | 1 + configs/at91sam9m10g45ek_nandflash_defconfig | 1 + configs/at91sam9n12ek_mmc_defconfig | 1 + configs/at91sam9n12ek_nandflash_defconfig | 1 + configs/at91sam9n12ek_spiflash_defconfig | 1 + configs/at91sam9rlek_dataflash_defconfig | 1 + configs/at91sam9rlek_mmc_defconfig | 1 + configs/at91sam9rlek_nandflash_defconfig | 1 + configs/at91sam9x5ek_dataflash_defconfig | 1 + configs/at91sam9x5ek_mmc_defconfig | 1 + configs/at91sam9x5ek_nandflash_defconfig | 1 + configs/at91sam9x5ek_spiflash_defconfig | 1 + configs/at91sam9xeek_dataflash_cs0_defconfig | 1 + configs/at91sam9xeek_dataflash_cs1_defconfig | 1 + configs/at91sam9xeek_nandflash_defconfig | 1 + .../avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig | 1 + configs/axm_defconfig | 1 + configs/axs101_defconfig | 1 + configs/axs103_defconfig | 1 + configs/ba10_tv_box_defconfig | 1 + configs/bananapi_m1_plus_defconfig | 1 + configs/bananapi_m2_berry_defconfig | 1 + configs/bananapi_m2_plus_h3_defconfig | 1 + configs/bananapi_m2_plus_h5_defconfig | 1 + configs/bananapi_m2_zero_defconfig | 1 + configs/bananapi_m64_defconfig | 1 + configs/bayleybay_defconfig | 1 + configs/bcm7260_defconfig | 1 + configs/bcm7445_defconfig | 1 + configs/bcm963158_ram_defconfig | 1 + configs/bcm96753ref_ram_defconfig | 1 + configs/bcm968360bg_ram_defconfig | 1 + configs/bcm968380gerg_ram_defconfig | 1 + configs/bcm968580xref_ram_defconfig | 1 + configs/bcm_ns3_defconfig | 1 + configs/beaver_defconfig | 1 + configs/beelink_gs1_defconfig | 1 + configs/beelink_x2_defconfig | 1 + configs/bitmain_antminer_s9_defconfig | 1 + configs/bk4r1_defconfig | 1 + configs/blanche_defconfig | 1 + configs/boston32r2_defconfig | 1 + configs/boston32r2el_defconfig | 1 + configs/boston32r6_defconfig | 1 + configs/boston32r6el_defconfig | 1 + configs/boston64r2_defconfig | 1 + configs/boston64r2el_defconfig | 1 + configs/boston64r6_defconfig | 1 + configs/boston64r6el_defconfig | 1 + configs/brppt1_mmc_defconfig | 1 + configs/brppt1_nand_defconfig | 1 + configs/brppt1_spi_defconfig | 1 + configs/brppt2_defconfig | 1 + configs/brsmarc1_defconfig | 1 + configs/brxre1_defconfig | 1 + configs/bubblegum_96_defconfig | 1 + configs/cardhu_defconfig | 1 + configs/cei-tk1-som_defconfig | 1 + configs/cgtqmx8_defconfig | 1 + configs/cherryhill_defconfig | 1 + configs/chromebook_coral_defconfig | 1 + configs/chromebook_link64_defconfig | 1 + configs/chromebook_link_defconfig | 1 + configs/chromebook_samus_defconfig | 1 + configs/chromebook_samus_tpl_defconfig | 1 + configs/chromebox_panther_defconfig | 1 + configs/cl-som-imx7_defconfig | 1 + configs/cm_fx6_defconfig | 1 + configs/cm_t335_defconfig | 1 + configs/cm_t43_defconfig | 1 + configs/cobra5272_defconfig | 1 + configs/colibri-imx6ull-emmc_defconfig | 1 + configs/colibri-imx6ull_defconfig | 1 + configs/colibri-imx8x_defconfig | 1 + configs/colibri_imx6_defconfig | 1 + configs/colibri_imx7_defconfig | 1 + configs/colibri_imx7_emmc_defconfig | 1 + configs/colibri_t20_defconfig | 1 + configs/colibri_t30_defconfig | 1 + configs/colibri_vf_defconfig | 1 + configs/colorfly_e708_q1_defconfig | 1 + configs/comtrend_ar5315u_ram_defconfig | 1 + configs/comtrend_ar5387un_ram_defconfig | 1 + configs/comtrend_ct5361_ram_defconfig | 1 + configs/comtrend_vr3032u_ram_defconfig | 1 + configs/comtrend_wap5813n_ram_defconfig | 1 + configs/conga-qeval20-qa3-e3845-internal-uart_defconfig | 1 + configs/conga-qeval20-qa3-e3845_defconfig | 1 + configs/coreboot64_defconfig | 1 + configs/coreboot_defconfig | 1 + configs/cortina_presidio-asic-base_defconfig | 1 + configs/cortina_presidio-asic-emmc_defconfig | 1 + configs/cortina_presidio-asic-pnand_defconfig | 1 + configs/corvus_defconfig | 1 + configs/cougarcanyon2_defconfig | 1 + configs/crownbay_defconfig | 1 + configs/cubieboard7_defconfig | 1 + configs/d2net_v2_defconfig | 1 + configs/da850evm_defconfig | 1 + configs/da850evm_direct_nor_defconfig | 1 + configs/da850evm_nand_defconfig | 1 + configs/dalmore_defconfig | 1 + configs/deneb_defconfig | 1 + configs/dfi-bt700-q7x-151_defconfig | 1 + configs/dh_imx6_defconfig | 1 + configs/difrnce_dit4350_defconfig | 1 + configs/display5_defconfig | 1 + configs/display5_factory_defconfig | 1 + configs/dockstar_defconfig | 1 + configs/draco_defconfig | 1 + configs/dragonboard410c_defconfig | 1 + configs/dragonboard820c_defconfig | 1 + configs/dserve_dsrv9703c_defconfig | 1 + configs/durian_defconfig | 1 + configs/ea-lpc3250devkitv2_defconfig | 1 + configs/eb_cpu5282_defconfig | 1 + configs/edison_defconfig | 1 + configs/edminiv2_defconfig | 1 + configs/efi-x86_app32_defconfig | 1 + configs/efi-x86_app64_defconfig | 1 + configs/efi-x86_payload32_defconfig | 1 + configs/efi-x86_payload64_defconfig | 1 + configs/emlid_neutis_n5_devboard_defconfig | 1 + configs/emsdp_defconfig | 1 + configs/espresso7420_defconfig | 1 + configs/etamin_defconfig | 1 + configs/ethernut5_defconfig | 1 + configs/ev-imx280-nano-x-mb_defconfig | 1 + configs/evb-ast2500_defconfig | 1 + configs/evb-ast2600_defconfig | 1 + configs/ga10h_v1_1_defconfig | 1 + configs/galileo_defconfig | 1 + configs/gardena-smart-gateway-at91sam_defconfig | 1 + configs/gardena-smart-gateway-mt7688_defconfig | 1 + configs/ge_b1x5v2_defconfig | 1 + configs/ge_bx50v3_defconfig | 1 + configs/giedi_defconfig | 1 + configs/goflexhome_defconfig | 1 + configs/gose_defconfig | 1 + configs/grpeach_defconfig | 1 + configs/gt90h_v4_defconfig | 1 + configs/gurnard_defconfig | 1 + configs/gwventana_emmc_defconfig | 1 + configs/gwventana_gw5904_defconfig | 1 + configs/gwventana_nand_defconfig | 1 + configs/h8_homlet_v2_defconfig | 1 + configs/harmony_defconfig | 1 + configs/hihope_rzg2_defconfig | 1 + configs/hikey960_defconfig | 1 + configs/hikey_defconfig | 1 + configs/hsdk_4xd_defconfig | 1 + configs/hsdk_defconfig | 1 + configs/huawei_hg556a_ram_defconfig | 1 + configs/i12-tvbox_defconfig | 1 + configs/iNet_3F_defconfig | 1 + configs/iNet_3W_defconfig | 1 + configs/iNet_86VS_defconfig | 1 + configs/iNet_D978_rev2_defconfig | 1 + configs/ib62x0_defconfig | 1 + configs/icnova-a20-swac_defconfig | 1 + configs/iconnect_defconfig | 1 + configs/imgtec_xilfpga_defconfig | 1 + configs/imx6dl_icore_nand_defconfig | 1 + configs/imx6dl_mamoj_defconfig | 1 + configs/imx6q_icore_nand_defconfig | 1 + configs/imx6q_logic_defconfig | 1 + configs/imx6qdl_icore_mipi_defconfig | 1 + configs/imx6qdl_icore_mmc_defconfig | 1 + configs/imx6qdl_icore_nand_defconfig | 1 + configs/imx6qdl_icore_rqs_defconfig | 1 + configs/imx6ul_geam_mmc_defconfig | 1 + configs/imx6ul_geam_nand_defconfig | 1 + configs/imx6ul_isiot_emmc_defconfig | 1 + configs/imx6ul_isiot_nand_defconfig | 1 + configs/imx7_cm_defconfig | 1 + configs/imx8mm-cl-iot-gate-optee_defconfig | 1 + configs/imx8mm-cl-iot-gate_defconfig | 1 + configs/imx8mm-icore-mx8mm-ctouch2_defconfig | 1 + configs/imx8mm-icore-mx8mm-edimm2.2_defconfig | 1 + configs/imx8mm-mx8menlo_defconfig | 1 + configs/imx8mm_beacon_defconfig | 1 + configs/imx8mm_data_modul_edm_sbc_defconfig | 1 + configs/imx8mm_evk_defconfig | 1 + configs/imx8mm_venice_defconfig | 1 + configs/imx8mn_beacon_2g_defconfig | 1 + configs/imx8mn_beacon_defconfig | 1 + configs/imx8mn_bsh_smm_s2_defconfig | 1 + configs/imx8mn_bsh_smm_s2pro_defconfig | 1 + configs/imx8mn_ddr4_evk_defconfig | 1 + configs/imx8mn_evk_defconfig | 1 + configs/imx8mn_var_som_defconfig | 1 + configs/imx8mn_venice_defconfig | 1 + configs/imx8mp_dhcom_pdk2_defconfig | 1 + configs/imx8mp_evk_defconfig | 1 + configs/imx8mp_rsb3720a1_4G_defconfig | 1 + configs/imx8mp_rsb3720a1_6G_defconfig | 1 + configs/imx8mp_venice_defconfig | 1 + configs/imx8mq_cm_defconfig | 1 + configs/imx8mq_evk_defconfig | 1 + configs/imx8qm_mek_defconfig | 1 + configs/imx8qm_rom7720_a1_4G_defconfig | 1 + configs/imx8qxp_mek_defconfig | 1 + configs/imx8ulp_evk_defconfig | 1 + configs/imxrt1020-evk_defconfig | 1 + configs/imxrt1050-evk_defconfig | 1 + configs/inet1_defconfig | 1 + configs/inet86dz_defconfig | 1 + configs/inet97fv2_defconfig | 1 + configs/inet98v_rev2_defconfig | 1 + configs/inet9f_rev03_defconfig | 1 + configs/inet_q972_defconfig | 1 + configs/inetspace_v2_defconfig | 1 + configs/integratorap_cm720t_defconfig | 1 + configs/integratorap_cm920t_defconfig | 1 + configs/integratorap_cm926ejs_defconfig | 1 + configs/integratorap_cm946es_defconfig | 1 + configs/integratorcp_cm1136_defconfig | 1 + configs/integratorcp_cm920t_defconfig | 1 + configs/integratorcp_cm926ejs_defconfig | 1 + configs/integratorcp_cm946es_defconfig | 1 + configs/iot2050_defconfig | 1 + configs/iot_devkit_defconfig | 1 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configs/libretech_all_h3_cc_h2_plus_defconfig | 1 + configs/libretech_all_h3_cc_h3_defconfig | 1 + configs/libretech_all_h3_cc_h5_defconfig | 1 + configs/libretech_all_h3_it_h5_defconfig | 1 + configs/libretech_all_h5_cc_h5_defconfig | 1 + configs/licheepi_nano_defconfig | 2 ++ configs/linkit-smart-7688_defconfig | 1 + configs/liteboard_defconfig | 1 + configs/ls1012a2g5rdb_qspi_defconfig | 1 + configs/ls1012a2g5rdb_tfa_defconfig | 1 + configs/ls1012afrdm_qspi_defconfig | 1 + configs/ls1012afrdm_tfa_defconfig | 1 + configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_qspi_defconfig | 1 + configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_tfa_defconfig | 1 + configs/ls1012aqds_qspi_defconfig | 1 + configs/ls1012aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012aqds_tfa_defconfig | 1 + configs/ls1012ardb_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1012ardb_qspi_defconfig | 1 + configs/ls1012ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012ardb_tfa_defconfig | 1 + configs/ls1021aiot_qspi_defconfig | 1 + configs/ls1021aiot_sdcard_defconfig | 1 + configs/ls1021aqds_ddr4_nor_defconfig | 1 + configs/ls1021aqds_ddr4_nor_lpuart_defconfig | 1 + configs/ls1021aqds_nand_defconfig | 1 + configs/ls1021aqds_nor_SECURE_BOOT_defconfig | 1 + configs/ls1021aqds_nor_defconfig | 1 + configs/ls1021aqds_nor_lpuart_defconfig | 1 + configs/ls1021aqds_qspi_defconfig | 1 + configs/ls1021aqds_sdcard_ifc_defconfig | 1 + configs/ls1021aqds_sdcard_qspi_defconfig | 1 + configs/ls1021atsn_qspi_defconfig | 1 + configs/ls1021atsn_sdcard_defconfig | 1 + configs/ls1021atwr_nor_SECURE_BOOT_defconfig | 1 + configs/ls1021atwr_nor_defconfig | 1 + configs/ls1021atwr_nor_lpuart_defconfig | 1 + configs/ls1021atwr_qspi_defconfig | 1 + configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig | 1 + configs/ls1021atwr_sdcard_ifc_defconfig | 1 + configs/ls1021atwr_sdcard_qspi_defconfig | 1 + configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1028aqds_tfa_defconfig | 1 + configs/ls1028aqds_tfa_lpuart_defconfig | 1 + configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1028ardb_tfa_defconfig | 1 + configs/ls1043aqds_defconfig | 1 + configs/ls1043aqds_lpuart_defconfig | 1 + configs/ls1043aqds_nand_defconfig | 1 + configs/ls1043aqds_nor_ddr3_defconfig | 1 + configs/ls1043aqds_qspi_defconfig | 1 + configs/ls1043aqds_sdcard_ifc_defconfig | 1 + configs/ls1043aqds_sdcard_qspi_defconfig | 1 + configs/ls1043aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1043aqds_tfa_defconfig | 1 + configs/ls1043ardb_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_defconfig | 1 + configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_nand_defconfig | 1 + configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_sdcard_defconfig | 1 + configs/ls1043ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_tfa_defconfig | 1 + configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1046afrwy_tfa_defconfig | 1 + configs/ls1046aqds_SECURE_BOOT_defconfig | 1 + configs/ls1046aqds_defconfig | 1 + configs/ls1046aqds_lpuart_defconfig | 1 + configs/ls1046aqds_nand_defconfig | 1 + configs/ls1046aqds_qspi_defconfig | 1 + configs/ls1046aqds_sdcard_ifc_defconfig | 1 + configs/ls1046aqds_sdcard_qspi_defconfig | 1 + configs/ls1046aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1046aqds_tfa_defconfig | 1 + configs/ls1046ardb_emmc_defconfig | 1 + configs/ls1046ardb_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1046ardb_qspi_defconfig | 1 + configs/ls1046ardb_qspi_spl_defconfig | 1 + configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig | 1 + configs/ls1046ardb_sdcard_defconfig | 1 + configs/ls1046ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1046ardb_tfa_defconfig | 1 + configs/ls1088aqds_defconfig | 1 + configs/ls1088aqds_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1088aqds_qspi_defconfig | 1 + configs/ls1088aqds_sdcard_ifc_defconfig | 1 + configs/ls1088aqds_sdcard_qspi_defconfig | 1 + configs/ls1088aqds_tfa_defconfig | 1 + configs/ls1088ardb_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1088ardb_qspi_defconfig | 1 + configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1088ardb_sdcard_qspi_defconfig | 1 + configs/ls1088ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1088ardb_tfa_defconfig | 1 + configs/ls2080aqds_SECURE_BOOT_defconfig | 1 + configs/ls2080aqds_defconfig | 1 + configs/ls2080aqds_nand_defconfig | 1 + configs/ls2080aqds_qspi_defconfig | 1 + configs/ls2080aqds_sdcard_defconfig | 1 + configs/ls2080ardb_SECURE_BOOT_defconfig | 1 + configs/ls2080ardb_defconfig | 1 + configs/ls2080ardb_nand_defconfig | 1 + configs/ls2081ardb_defconfig | 1 + configs/ls2088aqds_tfa_defconfig | 1 + configs/ls2088ardb_qspi_SECURE_BOOT_defconfig | 1 + configs/ls2088ardb_qspi_defconfig | 1 + configs/ls2088ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls2088ardb_tfa_defconfig | 1 + configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160aqds_tfa_defconfig | 1 + configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160ardb_tfa_defconfig | 1 + configs/lx2160ardb_tfa_stmm_defconfig | 1 + configs/lx2162aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2162aqds_tfa_defconfig | 1 + configs/lx2162aqds_tfa_verified_boot_defconfig | 1 + configs/malta64_defconfig | 1 + configs/malta64el_defconfig | 1 + configs/malta_defconfig | 1 + configs/maltael_defconfig | 1 + configs/marsboard_defconfig | 1 + configs/mccmon6_nor_defconfig | 1 + configs/mccmon6_sd_defconfig | 1 + configs/medcom-wide_defconfig | 1 + configs/meerkat96_defconfig | 1 + configs/meesc_dataflash_defconfig | 1 + configs/meesc_defconfig | 1 + configs/microblaze-generic_defconfig | 1 + configs/microchip_mpfs_icicle_defconfig | 1 + configs/minnowmax_defconfig | 1 + configs/mixtile_loftq_defconfig | 1 + configs/mk802_a10s_defconfig | 1 + configs/mk802_defconfig | 1 + configs/mk802ii_defconfig | 1 + configs/mk808_defconfig | 1 + configs/mscc_jr2_defconfig | 1 + configs/mscc_luton_defconfig | 1 + configs/mscc_ocelot_defconfig | 1 + configs/mscc_serval_defconfig | 1 + configs/mscc_servalt_defconfig | 1 + configs/mt7622_rfb_defconfig | 1 + configs/mt7623a_unielec_u7623_02_defconfig | 1 + configs/mt7623n_bpir2_defconfig | 1 + configs/mt7629_rfb_defconfig | 1 + configs/mt8183_pumpkin_defconfig | 1 + configs/mt8512_bm1_emmc_defconfig | 1 + configs/mt8516_pumpkin_defconfig | 1 + configs/mt8518_ap1_emmc_defconfig | 1 + configs/mvebu_crb_cn9130_defconfig | 1 + configs/mvebu_db_cn9130_defconfig | 1 + configs/mx51evk_defconfig | 1 + configs/mx53cx9020_defconfig | 1 + configs/mx53loco_defconfig | 1 + configs/mx6cuboxi_defconfig | 1 + configs/mx6memcal_defconfig | 1 + configs/mx6qsabrelite_defconfig | 1 + configs/mx6sabreauto_defconfig | 1 + configs/mx6sabresd_defconfig | 1 + configs/mx6slevk_defconfig | 1 + configs/mx6slevk_spinor_defconfig | 1 + configs/mx6slevk_spl_defconfig | 1 + configs/mx6sllevk_defconfig | 1 + configs/mx6sllevk_plugin_defconfig | 1 + configs/mx6sxsabreauto_defconfig | 1 + configs/mx6sxsabresd_defconfig | 1 + configs/mx6ul_14x14_evk_defconfig | 1 + configs/mx6ul_9x9_evk_defconfig | 1 + configs/mx6ull_14x14_evk_defconfig | 1 + configs/mx6ull_14x14_evk_plugin_defconfig | 1 + configs/mx6ulz_14x14_evk_defconfig | 1 + configs/mx7dsabresd_defconfig | 1 + configs/mx7dsabresd_qspi_defconfig | 1 + configs/mx7ulp_com_defconfig | 1 + configs/mx7ulp_evk_defconfig | 1 + configs/mx7ulp_evk_plugin_defconfig | 1 + configs/myir_mys_6ulx_defconfig | 1 + configs/nanopi_a64_defconfig | 1 + configs/nanopi_m1_defconfig | 1 + configs/nanopi_m1_plus_defconfig | 1 + configs/nanopi_neo2_defconfig | 1 + configs/nanopi_neo_air_defconfig | 1 + configs/nanopi_neo_defconfig | 1 + configs/nanopi_neo_plus2_defconfig | 1 + configs/nanopi_r1s_h5_defconfig | 1 + configs/nas220_defconfig | 1 + configs/net2big_v2_defconfig | 1 + configs/netgear_cg3100d_ram_defconfig | 1 + configs/netgear_dgnd3700v2_ram_defconfig | 1 + configs/netspace_lite_v2_defconfig | 1 + configs/netspace_max_v2_defconfig | 1 + configs/netspace_mini_v2_defconfig | 1 + configs/netspace_v2_defconfig | 1 + configs/nitrogen6dl2g_defconfig | 1 + configs/nitrogen6dl_defconfig | 1 + configs/nitrogen6q2g_defconfig | 1 + configs/nitrogen6q_defconfig | 1 + configs/nitrogen6s1g_defconfig | 1 + configs/nitrogen6s_defconfig | 1 + configs/nokia_rx51_defconfig | 1 + configs/novena_defconfig | 1 + configs/nsa310s_defconfig | 1 + configs/nsim_700_defconfig | 1 + configs/nsim_700be_defconfig | 1 + configs/nsim_hs38_defconfig | 1 + configs/nsim_hs38be_defconfig | 1 + configs/nyan-big_defconfig | 1 + configs/o4-imx6ull-nano_defconfig | 1 + configs/oceanic_5205_5inmfd_defconfig | 1 + configs/octeon_ebb7304_defconfig | 1 + configs/octeon_nic23_defconfig | 1 + configs/octeontx2_95xx_defconfig | 1 + configs/octeontx2_96xx_defconfig | 1 + configs/octeontx_81xx_defconfig | 1 + configs/octeontx_83xx_defconfig | 1 + configs/odroid-xu3_defconfig | 1 + configs/odroid_defconfig | 1 + configs/omap35_logic_defconfig | 1 + configs/omap35_logic_somlv_defconfig | 1 + configs/omap3_beagle_defconfig | 1 + configs/omap3_evm_defconfig | 1 + configs/omap3_logic_defconfig | 1 + configs/omap3_logic_somlv_defconfig | 1 + configs/openpiton_riscv64_defconfig | 1 + configs/openpiton_riscv64_spl_defconfig | 1 + configs/opos6uldev_defconfig | 1 + configs/orangepi_2_defconfig | 1 + configs/orangepi_3_defconfig | 1 + configs/orangepi_lite2_defconfig | 1 + configs/orangepi_lite_defconfig | 1 + configs/orangepi_one_defconfig | 1 + configs/orangepi_one_plus_defconfig | 1 + configs/orangepi_pc2_defconfig | 1 + configs/orangepi_pc_defconfig | 1 + configs/orangepi_pc_plus_defconfig | 1 + configs/orangepi_plus2e_defconfig | 1 + configs/orangepi_plus_defconfig | 1 + configs/orangepi_prime_defconfig | 1 + configs/orangepi_r1_defconfig | 1 + configs/orangepi_win_defconfig | 1 + configs/orangepi_zero2_defconfig | 1 + configs/orangepi_zero_defconfig | 1 + configs/orangepi_zero_plus2_defconfig | 1 + configs/orangepi_zero_plus2_h3_defconfig | 1 + configs/orangepi_zero_plus_defconfig | 1 + configs/origen_defconfig | 1 + configs/p2371-0000_defconfig | 1 + configs/p2371-2180_defconfig | 1 + configs/p2571_defconfig | 1 + configs/p2771-0000-000_defconfig | 1 + configs/p2771-0000-500_defconfig | 1 + configs/p3450-0000_defconfig | 1 + configs/parrot_r16_defconfig | 1 + configs/paz00_defconfig | 1 + configs/pcm052_defconfig | 1 + configs/pcm058_defconfig | 1 + configs/peach-pi_defconfig | 1 + configs/peach-pit_defconfig | 1 + configs/pg_wcom_expu1_defconfig | 1 + configs/pg_wcom_expu1_update_defconfig | 1 + configs/pg_wcom_seli8_defconfig | 1 + configs/pg_wcom_seli8_update_defconfig | 1 + configs/phycore-imx8mm_defconfig | 1 + configs/phycore-imx8mp_defconfig | 1 + configs/phycore_pcl063_defconfig | 1 + configs/phycore_pcl063_ull_defconfig | 1 + configs/pic32mzdask_defconfig | 1 + configs/pico-dwarf-imx6ul_defconfig | 1 + configs/pico-dwarf-imx7d_defconfig | 1 + configs/pico-hobbit-imx6ul_defconfig | 1 + configs/pico-hobbit-imx7d_defconfig | 1 + configs/pico-imx6_defconfig | 1 + configs/pico-imx6ul_defconfig | 1 + configs/pico-imx7d_bl33_defconfig | 1 + configs/pico-imx7d_defconfig | 1 + configs/pico-nymph-imx7d_defconfig | 1 + configs/pico-pi-imx6ul_defconfig | 1 + configs/pico-pi-imx7d_defconfig | 1 + configs/pine64-lts_defconfig | 1 + configs/pine64_plus_defconfig | 1 + configs/pine_h64_defconfig | 1 + configs/pinebook_defconfig | 1 + configs/pinecube_defconfig | 1 + configs/pinephone_defconfig | 1 + configs/pinetab_defconfig | 1 + configs/plutux_defconfig | 1 + configs/pm9261_defconfig | 1 + configs/pm9263_defconfig | 1 + configs/pm9g45_defconfig | 1 + configs/pogo_e02_defconfig | 1 + configs/pogo_v4_defconfig | 1 + configs/polaroid_mid2407pxe03_defconfig | 1 + configs/polaroid_mid2809pxe04_defconfig | 1 + configs/poleg_evb_defconfig | 1 + configs/pomelo_defconfig | 1 + configs/poplar_defconfig | 1 + configs/porter_defconfig | 1 + configs/pov_protab2_ips9_defconfig | 1 + configs/pxm2_defconfig | 1 + configs/q8_a13_tablet_defconfig | 1 + configs/q8_a23_tablet_800x480_defconfig | 1 + configs/q8_a33_tablet_1024x600_defconfig | 1 + configs/q8_a33_tablet_800x480_defconfig | 1 + configs/qemu-ppce500_defconfig | 1 + configs/qemu-riscv32_defconfig | 1 + configs/qemu-riscv32_smode_defconfig | 1 + configs/qemu-riscv32_spl_defconfig | 1 + configs/qemu-riscv64_defconfig | 1 + configs/qemu-riscv64_smode_defconfig | 1 + configs/qemu-riscv64_spl_defconfig | 1 + configs/qemu-x86_64_defconfig | 1 + configs/qemu-x86_defconfig | 1 + configs/qemu_arm64_defconfig | 1 + configs/qemu_arm_defconfig | 1 + configs/r2dplus_defconfig | 1 + configs/r7-tv-dongle_defconfig | 1 + configs/r8a77970_eagle_defconfig | 1 + configs/r8a77980_condor_defconfig | 1 + configs/r8a77990_ebisu_defconfig | 1 + configs/r8a77995_draak_defconfig | 1 + configs/r8a779a0_falcon_defconfig | 1 + configs/rastaban_defconfig | 1 + configs/rcar3_salvator-x_defconfig | 1 + configs/rcar3_ulcb_defconfig | 1 + configs/riotboard_defconfig | 1 + configs/rock960-rk3399_defconfig | 1 + configs/rpi_0_w_defconfig | 1 + configs/rpi_2_defconfig | 1 + configs/rpi_3_32b_defconfig | 1 + configs/rpi_3_b_plus_defconfig | 1 + configs/rpi_3_defconfig | 1 + configs/rpi_4_32b_defconfig | 1 + configs/rpi_4_defconfig | 1 + configs/rpi_arm64_defconfig | 1 + configs/rpi_defconfig | 1 + configs/rut_defconfig | 1 + configs/rzg2_beacon_defconfig | 1 + configs/s5p4418_nanopi2_defconfig | 1 + configs/s5p_goni_defconfig | 1 + configs/s5pc210_universal_defconfig | 1 + configs/sagem_f@st1704_ram_defconfig | 1 + configs/sam9x60_curiosity_mmc_defconfig | 1 + configs/sam9x60ek_mmc_defconfig | 1 + configs/sam9x60ek_nandflash_defconfig | 1 + configs/sam9x60ek_qspiflash_defconfig | 1 + configs/sama5d27_giantboard_defconfig | 1 + configs/sama5d27_som1_ek_mmc1_defconfig | 1 + configs/sama5d27_som1_ek_mmc_defconfig | 1 + configs/sama5d27_som1_ek_qspiflash_defconfig | 1 + configs/sama5d27_wlsom1_ek_mmc_defconfig | 1 + configs/sama5d27_wlsom1_ek_qspiflash_defconfig | 1 + configs/sama5d2_icp_mmc_defconfig | 1 + configs/sama5d2_icp_qspiflash_defconfig | 1 + configs/sama5d2_ptc_ek_mmc_defconfig | 1 + configs/sama5d2_ptc_ek_nandflash_defconfig | 1 + configs/sama5d2_xplained_emmc_defconfig | 1 + configs/sama5d2_xplained_mmc_defconfig | 1 + configs/sama5d2_xplained_qspiflash_defconfig | 1 + configs/sama5d2_xplained_spiflash_defconfig | 1 + configs/sama5d36ek_cmp_mmc_defconfig | 1 + configs/sama5d36ek_cmp_nandflash_defconfig | 1 + configs/sama5d36ek_cmp_spiflash_defconfig | 1 + configs/sama5d3_xplained_mmc_defconfig | 1 + configs/sama5d3_xplained_nandflash_defconfig | 1 + configs/sama5d3xek_mmc_defconfig | 1 + configs/sama5d3xek_nandflash_defconfig | 1 + configs/sama5d3xek_spiflash_defconfig | 1 + configs/sama5d4_xplained_mmc_defconfig | 1 + configs/sama5d4_xplained_nandflash_defconfig | 1 + configs/sama5d4_xplained_spiflash_defconfig | 1 + configs/sama5d4ek_mmc_defconfig | 1 + configs/sama5d4ek_nandflash_defconfig | 1 + configs/sama5d4ek_spiflash_defconfig | 1 + configs/sama7g5ek_mmc1_defconfig | 1 + configs/sama7g5ek_mmc_defconfig | 1 + configs/seaboard_defconfig | 1 + configs/seeed_npi_imx6ull_defconfig | 1 + configs/sfr_nb4-ser_ram_defconfig | 1 + configs/sifive_unleashed_defconfig | 1 + configs/sifive_unmatched_defconfig | 1 + configs/silinux_ek874_defconfig | 1 + configs/silk_defconfig | 1 + configs/sipeed_maix_bitm_defconfig | 1 + configs/sipeed_maix_smode_defconfig | 1 + configs/slimbootloader_defconfig | 1 + configs/smartweb_defconfig | 1 + configs/smdk5250_defconfig | 1 + configs/smdk5420_defconfig | 1 + configs/smdkc100_defconfig | 1 + configs/smdkv310_defconfig | 1 + configs/smegw01_defconfig | 1 + configs/snapper9260_defconfig | 1 + configs/snapper9g20_defconfig | 1 + configs/sniper_defconfig | 1 + configs/snow_defconfig | 1 + configs/socfpga_agilex_atf_defconfig | 1 + configs/socfpga_agilex_defconfig | 1 + configs/socfpga_agilex_vab_defconfig | 1 + configs/socfpga_n5x_atf_defconfig | 1 + configs/socfpga_n5x_defconfig | 1 + configs/socfpga_n5x_vab_defconfig | 1 + configs/socfpga_stratix10_atf_defconfig | 1 + configs/socfpga_stratix10_defconfig | 1 + configs/socrates_defconfig | 1 + configs/som-db5800-som-6867_defconfig | 1 + configs/somlabs_visionsom_6ull_defconfig | 1 + configs/sopine_baseboard_defconfig | 1 + configs/spring_defconfig | 1 + configs/starqltechn_defconfig | 1 + configs/stemmy_defconfig | 1 + configs/stih410-b2260_defconfig | 1 + configs/stm32746g-eval_defconfig | 1 + configs/stm32746g-eval_spl_defconfig | 1 + configs/stm32f429-discovery_defconfig | 1 + configs/stm32f429-evaluation_defconfig | 1 + configs/stm32f469-discovery_defconfig | 1 + configs/stm32f746-disco_defconfig | 1 + configs/stm32f746-disco_spl_defconfig | 1 + configs/stm32f769-disco_defconfig | 1 + configs/stm32f769-disco_spl_defconfig | 1 + configs/stm32h743-disco_defconfig | 1 + configs/stm32h743-eval_defconfig | 1 + configs/stm32h750-art-pi_defconfig | 1 + configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig | 1 + configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig | 1 + configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig | 1 + configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig | 1 + configs/stm32mp15_basic_defconfig | 1 + configs/stm32mp15_defconfig | 1 + configs/stm32mp15_dhcom_basic_defconfig | 1 + configs/stm32mp15_dhcor_basic_defconfig | 1 + configs/stm32mp15_trusted_defconfig | 1 + configs/stmark2_defconfig | 1 + configs/stout_defconfig | 1 + configs/stv0991_defconfig | 1 + configs/sun8i_a23_evb_defconfig | 1 + configs/sunxi_Gemei_G9_defconfig | 1 + configs/syzygy_hub_defconfig | 1 + configs/tanix_tx6_defconfig | 1 + configs/taurus_defconfig | 1 + configs/tb100_defconfig | 1 + configs/tbs2910_defconfig | 1 + configs/tbs_a711_defconfig | 1 + configs/tec-ng_defconfig | 1 + configs/tec_defconfig | 1 + configs/ten64_tfa_defconfig | 1 + configs/teres_i_defconfig | 1 + configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig | 1 + configs/theadorable-x86-conga-qa3-e3845_defconfig | 1 + configs/theadorable-x86-dfi-bt700_defconfig | 1 + configs/thuban_defconfig | 1 + configs/thunderx_88xx_defconfig | 1 + configs/topic_miami_defconfig | 1 + configs/topic_miamilite_defconfig | 1 + configs/topic_miamiplus_defconfig | 1 + configs/total_compute_defconfig | 1 + configs/tqma6dl_mba6_mmc_defconfig | 1 + configs/tqma6dl_mba6_spi_defconfig | 1 + configs/tqma6q_mba6_mmc_defconfig | 1 + configs/tqma6q_mba6_spi_defconfig | 1 + configs/tqma6s_mba6_mmc_defconfig | 1 + configs/tqma6s_mba6_spi_defconfig | 1 + configs/trats2_defconfig | 1 + configs/trats_defconfig | 1 + configs/trimslice_defconfig | 1 + configs/tuge1_defconfig | 1 + configs/tuxx1_defconfig | 1 + configs/uDPU_defconfig | 1 + configs/udoo_defconfig | 1 + configs/udoo_neo_defconfig | 1 + configs/usb_a9263_dataflash_defconfig | 1 + configs/usbarmory_defconfig | 1 + configs/variscite_dart6ul_defconfig | 1 + configs/venice2_defconfig | 1 + configs/ventana_defconfig | 1 + configs/verdin-imx8mm_defconfig | 1 + configs/verdin-imx8mp_defconfig | 1 + configs/vexpress_aemv8a_juno_defconfig | 1 + configs/vexpress_aemv8a_semi_defconfig | 1 + configs/vexpress_aemv8r_defconfig | 1 + configs/vexpress_ca9x4_defconfig | 1 + configs/vf610twr_defconfig | 1 + configs/vf610twr_nand_defconfig | 1 + configs/vinco_defconfig | 1 + configs/vining_2000_defconfig | 1 + configs/vocore2_defconfig | 1 + configs/wandboard_defconfig | 1 + configs/warp7_bl33_defconfig | 1 + configs/warp7_defconfig | 1 + configs/warp_defconfig | 1 + configs/x530_defconfig | 1 + configs/xenguest_arm64_defconfig | 1 + configs/xilinx_versal_mini_defconfig | 1 + configs/xilinx_versal_mini_emmc0_defconfig | 1 + configs/xilinx_versal_mini_emmc1_defconfig | 1 + configs/xilinx_versal_virt_defconfig | 1 + configs/xilinx_zynq_virt_defconfig | 1 + configs/xilinx_zynqmp_mini_defconfig | 1 + configs/xilinx_zynqmp_mini_emmc0_defconfig | 1 + configs/xilinx_zynqmp_mini_emmc1_defconfig | 1 + configs/xilinx_zynqmp_mini_nand_defconfig | 1 + configs/xilinx_zynqmp_mini_nand_single_defconfig | 1 + configs/xilinx_zynqmp_mini_qspi_defconfig | 1 + configs/xilinx_zynqmp_r5_defconfig | 1 + configs/xilinx_zynqmp_virt_defconfig | 1 + configs/xtfpga_defconfig | 1 + configs/zeropi_defconfig | 1 + configs/zynq_cse_nand_defconfig | 1 + configs/zynq_cse_nor_defconfig | 1 + configs/zynq_cse_qspi_defconfig | 1 + include/config_fallbacks.h | 4 ---- include/configs/am3517_evm.h | 3 --- include/configs/apalis-imx8.h | 2 -- include/configs/armadillo-800eva.h | 1 - include/configs/ax25-ae350.h | 6 ------ include/configs/bcm_ns3.h | 2 -- include/configs/colibri-imx8x.h | 2 -- include/configs/display5.h | 3 --- include/configs/exynos-common.h | 1 - include/configs/exynos7420-common.h | 1 - include/configs/exynos78x0-common.h | 1 - include/configs/gazerbeam.h | 2 -- include/configs/grpeach.h | 1 - include/configs/imx8mm-cl-iot-gate.h | 2 -- include/configs/imx8mm_beacon.h | 2 -- include/configs/imx8mm_data_modul_edm_sbc.h | 2 -- include/configs/imx8mm_evk.h | 2 -- include/configs/imx8mm_icore_mx8mm.h | 2 -- include/configs/imx8mm_venice.h | 2 -- include/configs/imx8mn_beacon.h | 2 -- include/configs/imx8mn_bsh_smm_s2_common.h | 2 -- include/configs/imx8mn_evk.h | 2 -- include/configs/imx8mn_var_som.h | 2 -- include/configs/imx8mn_venice.h | 2 -- include/configs/imx8mp_dhcom_pdk2.h | 2 -- include/configs/imx8mp_evk.h | 2 -- include/configs/imx8mp_rsb3720.h | 2 -- include/configs/imx8mp_venice.h | 2 -- include/configs/imx8mq_cm.h | 2 -- include/configs/imx8mq_evk.h | 2 -- include/configs/imx8mq_phanbell.h | 2 -- include/configs/imx8ulp_evk.h | 1 - include/configs/kzm9g.h | 1 - include/configs/ls1021atsn.h | 2 -- include/configs/ls1028a_common.h | 2 -- include/configs/ls1088a_common.h | 2 -- include/configs/lx2160a_common.h | 2 -- include/configs/mt7622.h | 2 -- include/configs/mt7623.h | 2 -- include/configs/mt7629.h | 2 -- include/configs/mx6memcal.h | 2 -- include/configs/pico-imx8mq.h | 2 -- include/configs/poleg.h | 1 - include/configs/presidio_asic.h | 2 -- include/configs/r2dplus.h | 2 -- include/configs/rcar-gen2-common.h | 1 - include/configs/s5p4418_nanopi2.h | 3 --- include/configs/s5p_goni.h | 2 -- include/configs/smdkc100.h | 1 - include/configs/socfpga_soc64_common.h | 2 -- include/configs/stmark2.h | 3 --- include/configs/sunxi-common.h | 1 - include/configs/synquacer.h | 1 - include/configs/tegra-common.h | 1 - include/configs/verdin-imx8mm.h | 2 -- include/configs/verdin-imx8mp.h | 2 -- include/configs/xenguest_arm64.h | 2 -- 1035 files changed, 981 insertions(+), 113 deletions(-) diff --git a/README b/README index 8812700f24d..d4d88d98c94 100644 --- a/README +++ b/README @@ -1855,8 +1855,6 @@ Configuration Settings: - CONFIG_SYS_CBSIZE: Buffer size for input from the Console -- CONFIG_SYS_PBSIZE: Buffer size for Console output - - CONFIG_SYS_BARGSIZE: Buffer size for Boot Arguments which are passed to the application (usually a Linux kernel) when it is booted diff --git a/cmd/Kconfig b/cmd/Kconfig index dd43358c271..b50e53e1480 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -75,6 +75,10 @@ config SYS_MAXARGS int "Maximum number arguments accepted by commands" default 16 +config SYS_PBSIZE + int "Buffer size for console output" + default 1044 + config SYS_XTRACE bool "Command execution tracer" depends on CMDLINE diff --git a/configs/10m50_defconfig b/configs/10m50_defconfig index 72f8ce91019..b5b3f0033b5 100644 --- a/configs/10m50_defconfig +++ b/configs/10m50_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_MONITOR_BASE=0xCFF80000 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_CPU=y # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/3c120_defconfig b/configs/3c120_defconfig index 0a69871ec56..114823da758 100644 --- a/configs/3c120_defconfig +++ b/configs/3c120_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_MONITOR_BASE=0xD7F80000 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_CPU=y # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/A10-OLinuXino-Lime_defconfig b/configs/A10-OLinuXino-Lime_defconfig index 90f12308bab..07e6e3f0099 100644 --- a/configs/A10-OLinuXino-Lime_defconfig +++ b/configs/A10-OLinuXino-Lime_defconfig @@ -12,6 +12,7 @@ CONFIG_SATAPWR="PC3" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/A10s-OLinuXino-M_defconfig b/configs/A10s-OLinuXino-M_defconfig index 99f57857517..2aeaffacd0c 100644 --- a/configs/A10s-OLinuXino-M_defconfig +++ b/configs/A10s-OLinuXino-M_defconfig @@ -10,6 +10,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=1 CONFIG_USB1_VBUS_PIN="PB10" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/A13-OLinuXinoM_defconfig b/configs/A13-OLinuXinoM_defconfig index f9d17b19500..4f39d70f815 100644 --- a/configs/A13-OLinuXinoM_defconfig +++ b/configs/A13-OLinuXinoM_defconfig @@ -13,6 +13,7 @@ CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH=y CONFIG_VIDEO_LCD_POWER="PB10" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig index 8c9043559bd..0746061317b 100644 --- a/configs/A13-OLinuXino_defconfig +++ b/configs/A13-OLinuXino_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_DFU=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_DFU_RAM=y diff --git a/configs/A20-OLinuXino-Lime2-eMMC_defconfig b/configs/A20-OLinuXino-Lime2-eMMC_defconfig index 918fc64e0e0..45f9e9e07d0 100644 --- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig +++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_SPI_SUNXI=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_DFU=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_SCSI_AHCI=y diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig index 903e3fdbcc8..187d8a5e6b6 100644 --- a/configs/A20-OLinuXino-Lime2_defconfig +++ b/configs/A20-OLinuXino-Lime2_defconfig @@ -12,6 +12,7 @@ CONFIG_SATAPWR="PC3" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_DFU=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_SCSI_AHCI=y diff --git a/configs/A20-OLinuXino-Lime_defconfig b/configs/A20-OLinuXino-Lime_defconfig index c06050610de..1964fb6aa3d 100644 --- a/configs/A20-OLinuXino-Lime_defconfig +++ b/configs/A20-OLinuXino-Lime_defconfig @@ -10,6 +10,7 @@ CONFIG_SATAPWR="PC3" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/A20-OLinuXino_MICRO-eMMC_defconfig b/configs/A20-OLinuXino_MICRO-eMMC_defconfig index cf3fc682e44..e4892cc5176 100644 --- a/configs/A20-OLinuXino_MICRO-eMMC_defconfig +++ b/configs/A20-OLinuXino_MICRO-eMMC_defconfig @@ -12,6 +12,7 @@ CONFIG_SATAPWR="PB8" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/A20-OLinuXino_MICRO_defconfig b/configs/A20-OLinuXino_MICRO_defconfig index 81c27432cdc..e491e73ccba 100644 --- a/configs/A20-OLinuXino_MICRO_defconfig +++ b/configs/A20-OLinuXino_MICRO_defconfig @@ -13,6 +13,7 @@ CONFIG_SATAPWR="PB8" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/A20-Olimex-SOM-EVB_defconfig b/configs/A20-Olimex-SOM-EVB_defconfig index 075d999e1c9..3685a93ca50 100644 --- a/configs/A20-Olimex-SOM-EVB_defconfig +++ b/configs/A20-Olimex-SOM-EVB_defconfig @@ -13,6 +13,7 @@ CONFIG_SATAPWR="PC3" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig index 829e7bbcd33..24294daaaf8 100644 --- a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig +++ b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig @@ -14,6 +14,7 @@ CONFIG_GMAC_TX_DELAY=4 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/A20-Olimex-SOM204-EVB_defconfig b/configs/A20-Olimex-SOM204-EVB_defconfig index 5b96ddc68ba..5dd6f77b7b6 100644 --- a/configs/A20-Olimex-SOM204-EVB_defconfig +++ b/configs/A20-Olimex-SOM204-EVB_defconfig @@ -13,6 +13,7 @@ CONFIG_GMAC_TX_DELAY=4 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/A33-OLinuXino_defconfig b/configs/A33-OLinuXino_defconfig index 351a454339b..786fc6cf376 100644 --- a/configs/A33-OLinuXino_defconfig +++ b/configs/A33-OLinuXino_defconfig @@ -16,5 +16,6 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_BL_EN="PB2" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DCDC1_VOLT=3300 CONFIG_USB_MUSB_HOST=y diff --git a/configs/Ainol_AW1_defconfig b/configs/Ainol_AW1_defconfig index 9a18af8c6e1..89cad5d6c78 100644 --- a/configs/Ainol_AW1_defconfig +++ b/configs/Ainol_AW1_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Ampe_A76_defconfig b/configs/Ampe_A76_defconfig index 7bf3dfcd8a5..b0039243709 100644 --- a/configs/Ampe_A76_defconfig +++ b/configs/Ampe_A76_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Auxtek-T003_defconfig b/configs/Auxtek-T003_defconfig index 7d81f12f766..0f38a85f9f8 100644 --- a/configs/Auxtek-T003_defconfig +++ b/configs/Auxtek-T003_defconfig @@ -9,6 +9,7 @@ CONFIG_USB1_VBUS_PIN="PB10" CONFIG_VIDEO_COMPOSITE=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Auxtek-T004_defconfig b/configs/Auxtek-T004_defconfig index 4c7154b04c4..f201bd10819 100644 --- a/configs/Auxtek-T004_defconfig +++ b/configs/Auxtek-T004_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=432 CONFIG_USB1_VBUS_PIN="PG13" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Bananapi_M2_Ultra_defconfig b/configs/Bananapi_M2_Ultra_defconfig index a66aef0755a..79eb3ede772 100644 --- a/configs/Bananapi_M2_Ultra_defconfig +++ b/configs/Bananapi_M2_Ultra_defconfig @@ -13,6 +13,7 @@ CONFIG_USB2_VBUS_PIN="PH23" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig index 7f59fc9b3d3..f1b0b6da8f2 100644 --- a/configs/Bananapi_defconfig +++ b/configs/Bananapi_defconfig @@ -10,6 +10,7 @@ CONFIG_GMAC_TX_DELAY=3 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_NETCONSOLE=y CONFIG_SCSI_AHCI=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Bananapi_m2m_defconfig b/configs/Bananapi_m2m_defconfig index bad38a66568..ba26aa1861a 100644 --- a/configs/Bananapi_m2m_defconfig +++ b/configs/Bananapi_m2m_defconfig @@ -10,6 +10,7 @@ CONFIG_MMC0_CD_PIN="PB4" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB0_ID_DET="PH8" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/Bananapro_defconfig b/configs/Bananapro_defconfig index e075635aadd..9214a9b6960 100644 --- a/configs/Bananapro_defconfig +++ b/configs/Bananapro_defconfig @@ -12,6 +12,7 @@ CONFIG_GMAC_TX_DELAY=3 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_NETCONSOLE=y CONFIG_SCSI_AHCI=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/CHIP_defconfig b/configs/CHIP_defconfig index cd9bdbfd36f..be092cd0949 100644 --- a/configs/CHIP_defconfig +++ b/configs/CHIP_defconfig @@ -8,6 +8,7 @@ CONFIG_USB0_VBUS_PIN="PB10" CONFIG_VIDEO_COMPOSITE=y CONFIG_CHIP_DIP_SCAN=y CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_DFU=y CONFIG_DFU_RAM=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/CHIP_pro_defconfig b/configs/CHIP_pro_defconfig index 29179601907..16456c1dea5 100644 --- a/configs/CHIP_pro_defconfig +++ b/configs/CHIP_pro_defconfig @@ -6,6 +6,7 @@ CONFIG_MACH_SUN5I=y CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y CONFIG_USB0_VBUS_PIN="PB10" CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=sunxi-nand.0" diff --git a/configs/CSQ_CS908_defconfig b/configs/CSQ_CS908_defconfig index 1cd39d498f2..f79bc78f24d 100644 --- a/configs/CSQ_CS908_defconfig +++ b/configs/CSQ_CS908_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=432 CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y diff --git a/configs/Chuwi_V7_CW0825_defconfig b/configs/Chuwi_V7_CW0825_defconfig index 02b3e69584f..d517ab9a7ca 100644 --- a/configs/Chuwi_V7_CW0825_defconfig +++ b/configs/Chuwi_V7_CW0825_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_HITACHI_TX18D42VM=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Colombus_defconfig b/configs/Colombus_defconfig index 270bd7d351a..5f194606121 100644 --- a/configs/Colombus_defconfig +++ b/configs/Colombus_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_BL_EN="PM1" CONFIG_VIDEO_LCD_BL_PWM="PH13" CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/Cubieboard2_defconfig b/configs/Cubieboard2_defconfig index b06a3ae4238..0be8a07aa62 100644 --- a/configs/Cubieboard2_defconfig +++ b/configs/Cubieboard2_defconfig @@ -9,6 +9,7 @@ CONFIG_SATAPWR="PB8" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/Cubieboard4_defconfig b/configs/Cubieboard4_defconfig index 04ed79afb6d..82b3ac10f96 100644 --- a/configs/Cubieboard4_defconfig +++ b/configs/Cubieboard4_defconfig @@ -12,5 +12,6 @@ CONFIG_USB0_ID_DET="PH16" CONFIG_USB1_VBUS_PIN="PH14" CONFIG_USB3_VBUS_PIN="PH15" CONFIG_AXP_GPIO=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_SUN8I_RSB=y CONFIG_AXP809_POWER=y diff --git a/configs/Cubieboard_defconfig b/configs/Cubieboard_defconfig index 93a7932b76a..31d4fb4709f 100644 --- a/configs/Cubieboard_defconfig +++ b/configs/Cubieboard_defconfig @@ -9,6 +9,7 @@ CONFIG_SATAPWR="PB8" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig index a4f7b872ff0..fc692ff761a 100644 --- a/configs/Cubietruck_defconfig +++ b/configs/Cubietruck_defconfig @@ -14,6 +14,7 @@ CONFIG_GMAC_TX_DELAY=1 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_DFU=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_SCSI_AHCI=y diff --git a/configs/Cubietruck_plus_defconfig b/configs/Cubietruck_plus_defconfig index 13f958977be..cbd77cfc029 100644 --- a/configs/Cubietruck_plus_defconfig +++ b/configs/Cubietruck_plus_defconfig @@ -16,6 +16,7 @@ CONFIG_I2C0_ENABLE=y CONFIG_AXP_GPIO=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/Empire_electronix_d709_defconfig b/configs/Empire_electronix_d709_defconfig index a9bbe8bcffa..d1b76663fbc 100644 --- a/configs/Empire_electronix_d709_defconfig +++ b/configs/Empire_electronix_d709_defconfig @@ -17,6 +17,7 @@ CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Empire_electronix_m712_defconfig b/configs/Empire_electronix_m712_defconfig index fc1f26b7a99..e2d8a21a64a 100644 --- a/configs/Empire_electronix_m712_defconfig +++ b/configs/Empire_electronix_m712_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Hummingbird_A31_defconfig b/configs/Hummingbird_A31_defconfig index 24e8b5be1b5..20144b23028 100644 --- a/configs/Hummingbird_A31_defconfig +++ b/configs/Hummingbird_A31_defconfig @@ -9,6 +9,7 @@ CONFIG_USB2_VBUS_PIN="" CONFIG_VIDEO_VGA_VIA_LCD=y CONFIG_VIDEO_VGA_EXTERNAL_DAC_EN="PH25" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y diff --git a/configs/Hyundai_A7HD_defconfig b/configs/Hyundai_A7HD_defconfig index 482e0fb7a83..0c655b24e76 100644 --- a/configs/Hyundai_A7HD_defconfig +++ b/configs/Hyundai_A7HD_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Itead_Ibox_A20_defconfig b/configs/Itead_Ibox_A20_defconfig index 58184422147..b8f1350c878 100644 --- a/configs/Itead_Ibox_A20_defconfig +++ b/configs/Itead_Ibox_A20_defconfig @@ -9,6 +9,7 @@ CONFIG_SATAPWR="PB8" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/Lamobo_R1_defconfig b/configs/Lamobo_R1_defconfig index 6dd7b7ae702..8b25863b30c 100644 --- a/configs/Lamobo_R1_defconfig +++ b/configs/Lamobo_R1_defconfig @@ -11,6 +11,7 @@ CONFIG_GMAC_TX_DELAY=4 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/LicheePi_Zero_defconfig b/configs/LicheePi_Zero_defconfig index 9815348badd..5bc36f29680 100644 --- a/configs/LicheePi_Zero_defconfig +++ b/configs/LicheePi_Zero_defconfig @@ -5,4 +5,5 @@ CONFIG_SPL=y CONFIG_MACH_SUN8I_V3S=y CONFIG_DRAM_CLK=360 # CONFIG_HAS_ARMV7_SECURE_BASE is not set +CONFIG_SYS_PBSIZE=1024 # CONFIG_NETDEVICES is not set diff --git a/configs/Linksprite_pcDuino3_Nano_defconfig b/configs/Linksprite_pcDuino3_Nano_defconfig index 25cea843739..37726bedf89 100644 --- a/configs/Linksprite_pcDuino3_Nano_defconfig +++ b/configs/Linksprite_pcDuino3_Nano_defconfig @@ -11,6 +11,7 @@ CONFIG_GMAC_TX_DELAY=3 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/Linksprite_pcDuino3_defconfig b/configs/Linksprite_pcDuino3_defconfig index de88dd0a303..4545bdcd999 100644 --- a/configs/Linksprite_pcDuino3_defconfig +++ b/configs/Linksprite_pcDuino3_defconfig @@ -9,6 +9,7 @@ CONFIG_SATAPWR="PH2" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/Linksprite_pcDuino_defconfig b/configs/Linksprite_pcDuino_defconfig index 49dcfa098ee..c671bab2e7a 100644 --- a/configs/Linksprite_pcDuino_defconfig +++ b/configs/Linksprite_pcDuino_defconfig @@ -7,6 +7,7 @@ CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig index bd2f3172211..df4da884355 100644 --- a/configs/M5208EVBE_defconfig +++ b/configs/M5208EVBE_defconfig @@ -14,6 +14,7 @@ CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_MII=y diff --git a/configs/M5235EVB_Flash32_defconfig b/configs/M5235EVB_Flash32_defconfig index e3b0146d841..5789d89047f 100644 --- a/configs/M5235EVB_Flash32_defconfig +++ b/configs/M5235EVB_Flash32_defconfig @@ -14,6 +14,7 @@ CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig index d026400745b..43a584f8e46 100644 --- a/configs/M5235EVB_defconfig +++ b/configs/M5235EVB_defconfig @@ -14,6 +14,7 @@ CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set diff --git a/configs/M5249EVB_defconfig b/configs/M5249EVB_defconfig index 9a360b0eae2..65606c42c3c 100644 --- a/configs/M5249EVB_defconfig +++ b/configs/M5249EVB_defconfig @@ -14,6 +14,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SYS_DEVICE_NULLDEV=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_LOOPW=y CONFIG_CMD_MX_CYCLIC=y diff --git a/configs/M5253DEMO_defconfig b/configs/M5253DEMO_defconfig index 6f69acaee16..b8a0cb49312 100644 --- a/configs/M5253DEMO_defconfig +++ b/configs/M5253DEMO_defconfig @@ -13,6 +13,7 @@ CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5272C3_defconfig b/configs/M5272C3_defconfig index ed48264ed9c..59c49223d7e 100644 --- a/configs/M5272C3_defconfig +++ b/configs/M5272C3_defconfig @@ -14,6 +14,7 @@ CONFIG_BOOTDELAY=5 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/M5275EVB_defconfig b/configs/M5275EVB_defconfig index 2f517984b63..9774e77b6e9 100644 --- a/configs/M5275EVB_defconfig +++ b/configs/M5275EVB_defconfig @@ -16,6 +16,7 @@ CONFIG_BOOTCOMMAND="bootm ffe40000" # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set diff --git a/configs/M5282EVB_defconfig b/configs/M5282EVB_defconfig index 850d027f001..7d77f6c47f1 100644 --- a/configs/M5282EVB_defconfig +++ b/configs/M5282EVB_defconfig @@ -14,6 +14,7 @@ CONFIG_BOOTDELAY=5 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig index 005a3bcf08c..45656a34f20 100644 --- a/configs/M53017EVB_defconfig +++ b/configs/M53017EVB_defconfig @@ -16,6 +16,7 @@ CONFIG_BOOTARGS="root=/dev/mtdblock3 rw rootfstype=jffs2" # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_MII=y diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig index 83a3bb07aeb..940196f73a0 100644 --- a/configs/M5329AFEE_defconfig +++ b/configs/M5329AFEE_defconfig @@ -14,6 +14,7 @@ CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig index 728f2b18e66..a885281d1b7 100644 --- a/configs/M5329BFEE_defconfig +++ b/configs/M5329BFEE_defconfig @@ -14,6 +14,7 @@ CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig index f61e344a518..c7c619ff693 100644 --- a/configs/M5373EVB_defconfig +++ b/configs/M5373EVB_defconfig @@ -14,6 +14,7 @@ CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig index f99a830b546..236be1628ce 100644 --- a/configs/MCR3000_defconfig +++ b/configs/MCR3000_defconfig @@ -31,6 +31,7 @@ CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="S3K> " +CONFIG_SYS_PBSIZE=278 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_IMI is not set diff --git a/configs/MK808C_defconfig b/configs/MK808C_defconfig index 3ed962d7cd9..f4d31b39240 100644 --- a/configs/MK808C_defconfig +++ b/configs/MK808C_defconfig @@ -6,6 +6,7 @@ CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig index 4a9db732f92..efdddf7c2b3 100644 --- a/configs/MPC837XERDB_defconfig +++ b/configs/MPC837XERDB_defconfig @@ -153,6 +153,7 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_PCI_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig index 6933699771f..f2dd5d3f8cf 100644 --- a/configs/MPC8548CDS_36BIT_defconfig +++ b/configs/MPC8548CDS_36BIT_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath # CONFIG_MISC_INIT_R is not set CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_I2C=y diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig index ee9c14880c6..55acf63ae1d 100644 --- a/configs/MPC8548CDS_defconfig +++ b/configs/MPC8548CDS_defconfig @@ -19,6 +19,7 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath # CONFIG_MISC_INIT_R is not set CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_I2C=y diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig index 97f641d71cd..4bd0b1a27b7 100644 --- a/configs/MPC8548CDS_legacy_defconfig +++ b/configs/MPC8548CDS_legacy_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath # CONFIG_MISC_INIT_R is not set CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_I2C=y diff --git a/configs/MSI_Primo73_defconfig b/configs/MSI_Primo73_defconfig index 071169fd298..5a43945596a 100644 --- a/configs/MSI_Primo73_defconfig +++ b/configs/MSI_Primo73_defconfig @@ -11,6 +11,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/MSI_Primo81_defconfig b/configs/MSI_Primo81_defconfig index e77b0072923..de1b6884b8f 100644 --- a/configs/MSI_Primo81_defconfig +++ b/configs/MSI_Primo81_defconfig @@ -13,6 +13,7 @@ CONFIG_VIDEO_LCD_BL_EN="PA25" CONFIG_VIDEO_LCD_BL_PWM="PH13" CONFIG_VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 # CONFIG_REQUIRE_SERIAL_CONSOLE is not set CONFIG_USB_MUSB_HOST=y diff --git a/configs/Marsboard_A10_defconfig b/configs/Marsboard_A10_defconfig index 61d97831975..8ba587db9cb 100644 --- a/configs/Marsboard_A10_defconfig +++ b/configs/Marsboard_A10_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/Mele_A1000G_quad_defconfig b/configs/Mele_A1000G_quad_defconfig index c6bfe381db8..13f418fb0cc 100644 --- a/configs/Mele_A1000G_quad_defconfig +++ b/configs/Mele_A1000G_quad_defconfig @@ -8,6 +8,7 @@ CONFIG_INITIAL_USB_SCAN_DELAY=2000 CONFIG_USB1_VBUS_PIN="PC27" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y diff --git a/configs/Mele_A1000_defconfig b/configs/Mele_A1000_defconfig index d3a01275cf5..a62ca5d2f18 100644 --- a/configs/Mele_A1000_defconfig +++ b/configs/Mele_A1000_defconfig @@ -9,6 +9,7 @@ CONFIG_VIDEO_COMPOSITE=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/Mele_I7_defconfig b/configs/Mele_I7_defconfig index 2b9bca13d08..62cb674d295 100644 --- a/configs/Mele_I7_defconfig +++ b/configs/Mele_I7_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_ZQ=120 CONFIG_USB1_VBUS_PIN="PC27" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y diff --git a/configs/Mele_M3_defconfig b/configs/Mele_M3_defconfig index 77cb464c932..fce30278d49 100644 --- a/configs/Mele_M3_defconfig +++ b/configs/Mele_M3_defconfig @@ -10,6 +10,7 @@ CONFIG_VIDEO_VGA=y CONFIG_VIDEO_COMPOSITE=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Mele_M5_defconfig b/configs/Mele_M5_defconfig index f2ee3b1c0cf..79ea3f0db29 100644 --- a/configs/Mele_M5_defconfig +++ b/configs/Mele_M5_defconfig @@ -10,6 +10,7 @@ CONFIG_VIDEO_COMPOSITE=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/Mele_M9_defconfig b/configs/Mele_M9_defconfig index be6dd417545..1338e0973db 100644 --- a/configs/Mele_M9_defconfig +++ b/configs/Mele_M9_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_ZQ=120 CONFIG_USB1_VBUS_PIN="PC27" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y diff --git a/configs/Merrii_A80_Optimus_defconfig b/configs/Merrii_A80_Optimus_defconfig index c5d1f40df39..5f008a206e7 100644 --- a/configs/Merrii_A80_Optimus_defconfig +++ b/configs/Merrii_A80_Optimus_defconfig @@ -12,5 +12,6 @@ CONFIG_USB0_ID_DET="PH3" CONFIG_USB1_VBUS_PIN="PH4" CONFIG_USB3_VBUS_PIN="PH5" CONFIG_AXP_GPIO=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_SUN8I_RSB=y CONFIG_AXP809_POWER=y diff --git a/configs/Mini-X_defconfig b/configs/Mini-X_defconfig index e8bc1485766..61f880e15d9 100644 --- a/configs/Mini-X_defconfig +++ b/configs/Mini-X_defconfig @@ -7,6 +7,7 @@ CONFIG_USB0_VBUS_PIN="PB9" CONFIG_VIDEO_COMPOSITE=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Nintendo_NES_Classic_Edition_defconfig b/configs/Nintendo_NES_Classic_Edition_defconfig index b66023418ae..84b36a02b62 100644 --- a/configs/Nintendo_NES_Classic_Edition_defconfig +++ b/configs/Nintendo_NES_Classic_Edition_defconfig @@ -9,6 +9,7 @@ CONFIG_DRAM_ODT_EN=y CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT" CONFIG_AXP_GPIO=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTDPARTS=y # CONFIG_MMC is not set diff --git a/configs/Orangepi_defconfig b/configs/Orangepi_defconfig index d69bc7af93b..eed986aa15c 100644 --- a/configs/Orangepi_defconfig +++ b/configs/Orangepi_defconfig @@ -13,6 +13,7 @@ CONFIG_GMAC_TX_DELAY=3 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/Orangepi_mini_defconfig b/configs/Orangepi_mini_defconfig index 508cace424c..974826baed0 100644 --- a/configs/Orangepi_mini_defconfig +++ b/configs/Orangepi_mini_defconfig @@ -15,6 +15,7 @@ CONFIG_GMAC_TX_DELAY=3 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index b44264f41d6..dc4d1c8bb9b 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -37,6 +37,7 @@ CONFIG_TPL_I2C=y CONFIG_TPL_MPC8XXX_INIT_DDR=y CONFIG_TPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index bd5d7b652b4..6ded15625c5 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index 516198b9634..da9690688c4 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index a545cffe4d9..84ebcd53b35 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index 9cb7f55ecf4..d103ed599b6 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -36,6 +36,7 @@ CONFIG_TPL_I2C=y CONFIG_TPL_MPC8XXX_INIT_DDR=y CONFIG_TPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index 510035739fd..8a416bc4d93 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 160f4a0dfde..e0a9c2df2ec 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index cf61ca3b922..215671b4e7f 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 67659cfc906..4bda8f2068f 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -38,6 +38,7 @@ CONFIG_TPL_I2C=y CONFIG_TPL_MPC8XXX_INIT_DDR=y CONFIG_TPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 228db54c22c..dc2e40d530d 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -22,6 +22,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 2774a5c5c44..f7cf815433a 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index 240aa3a4c2e..ab378da0aad 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 18215d8f358..9f839f55fbe 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -37,6 +37,7 @@ CONFIG_TPL_I2C=y CONFIG_TPL_MPC8XXX_INIT_DDR=y CONFIG_TPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index 21ef7a0d76f..4824169b481 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -21,6 +21,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index 4ad9633bf60..f40cc9fcbec 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 9b05f484682..f371661e553 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 56b984e5ae6..fd68dc70bab 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -38,6 +38,7 @@ CONFIG_TPL_MPC8XXX_INIT_DDR=y CONFIG_TPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 4407a02a7d9..fb085552759 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index ee0fdd6657d..62ea0fe3289 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index bbfc4a5bcff..80108f3d210 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -24,6 +24,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 00d847d50af..87d12d8fb00 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -37,6 +37,7 @@ CONFIG_TPL_MPC8XXX_INIT_DDR=y CONFIG_TPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index feb00ea9161..7b03e9a3006 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index f18f4b2ce15..600691517c2 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index aec0d47acb7..2cde204313f 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -23,6 +23,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index 0d713624d48..3898e20d188 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -37,6 +37,7 @@ CONFIG_TPL_MPC8XXX_INIT_DDR=y CONFIG_TPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index b50dfcbc392..345a85521cd 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index 6649f5b2fea..ac7ee81d6d5 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index cbbdb0fb113..f1c8c7179cc 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -23,6 +23,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index e167468ed38..a2e0e9f7de8 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -38,6 +38,7 @@ CONFIG_TPL_MPC8XXX_INIT_DDR=y CONFIG_TPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 1e15552edc7..092681c1d83 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index cf0ae5da3cf..f505a7a5087 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index bd189b965b0..bf998dacf99 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -24,6 +24,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 29d90c91400..b45e23f32c1 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -37,6 +37,7 @@ CONFIG_TPL_MPC8XXX_INIT_DDR=y CONFIG_TPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 540999bef21..5e152d6b36b 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 0881e35476a..75f16593fb7 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index eba11d340ac..b68777dfa4c 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -23,6 +23,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index 9717f50834a..9389d992562 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -24,6 +24,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index 50065c4a967..31d5814d55c 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -24,6 +24,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index 25f32c03c14..7e913c81366 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -26,6 +26,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index 29e94fcd094..23165b83f74 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -22,6 +22,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index 638b409b963..7c5b6d288b0 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -24,6 +24,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index e05ea44d2c2..41ec73a6be4 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -24,6 +24,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index 9bfde175420..bdbf2e959e3 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -26,6 +26,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index d62a200871a..953cbd4b0b7 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -22,6 +22,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index 63f8e6aa9d4..e603f81287e 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -24,6 +24,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index 56da9d80b73..90b4688ea2e 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -26,6 +26,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index ec5d2f9ac6c..85acd7e427f 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -22,6 +22,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index 2ac298a4314..6e0bdb2e130 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -24,6 +24,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index a1ddca57750..e040fab7cb8 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -24,6 +24,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index 32fec67e949..1e1a2f80365 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -26,6 +26,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index 48bd2b6f1bf..ec897c33231 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -22,6 +22,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y diff --git a/configs/SBx81LIFKW_defconfig b/configs/SBx81LIFKW_defconfig index ef427490ff9..fb12b9be3ef 100644 --- a/configs/SBx81LIFKW_defconfig +++ b/configs/SBx81LIFKW_defconfig @@ -20,6 +20,7 @@ CONFIG_SILENT_U_BOOT_ONLY=y CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y diff --git a/configs/SBx81LIFXCAT_defconfig b/configs/SBx81LIFXCAT_defconfig index 687e064fa8f..eb68c25f092 100644 --- a/configs/SBx81LIFXCAT_defconfig +++ b/configs/SBx81LIFXCAT_defconfig @@ -20,6 +20,7 @@ CONFIG_SILENT_U_BOOT_ONLY=y CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/Sinlinx_SinA31s_defconfig b/configs/Sinlinx_SinA31s_defconfig index 238b0073e79..4495b806ceb 100644 --- a/configs/Sinlinx_SinA31s_defconfig +++ b/configs/Sinlinx_SinA31s_defconfig @@ -10,6 +10,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=3 CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y diff --git a/configs/Sinlinx_SinA33_defconfig b/configs/Sinlinx_SinA33_defconfig index 4eb5300b046..0f30dfc1dc9 100644 --- a/configs/Sinlinx_SinA33_defconfig +++ b/configs/Sinlinx_SinA33_defconfig @@ -13,6 +13,7 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_DFU=y CONFIG_DFU_RAM=y CONFIG_FASTBOOT_CMD_OEM_FORMAT=y diff --git a/configs/Sinovoip_BPI_M2_defconfig b/configs/Sinovoip_BPI_M2_defconfig index aba95270eb2..ebb9e352264 100644 --- a/configs/Sinovoip_BPI_M2_defconfig +++ b/configs/Sinovoip_BPI_M2_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=432 CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y diff --git a/configs/Sinovoip_BPI_M3_defconfig b/configs/Sinovoip_BPI_M3_defconfig index d27f495f48f..23240a138c4 100644 --- a/configs/Sinovoip_BPI_M3_defconfig +++ b/configs/Sinovoip_BPI_M3_defconfig @@ -17,6 +17,7 @@ CONFIG_AXP_GPIO=y CONFIG_SATAPWR="PD25" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y +CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_REALTEK=y CONFIG_SUN8I_EMAC=y CONFIG_AXP_DCDC5_VOLT=1200 diff --git a/configs/Sunchip_CX-A99_defconfig b/configs/Sunchip_CX-A99_defconfig index bb62ae9a7a9..ee0c15b9c0a 100644 --- a/configs/Sunchip_CX-A99_defconfig +++ b/configs/Sunchip_CX-A99_defconfig @@ -12,3 +12,4 @@ CONFIG_USB0_VBUS_PIN="PH15" CONFIG_USB1_VBUS_PIN="PL7" CONFIG_USB3_VBUS_PIN="PL8" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index c86c5c15309..dc2b7b3f61b 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index a820d2969e3..9a3e19a98f8 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index 2708e9f0911..2381a0d30e9 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index 3359c59958e..0f7e062380f 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -25,6 +25,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index 978c6c0bb65..e221dd05922 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DM=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index 3cb72f03d6b..7a6c96c4ffd 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DM=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 662c93691d1..d39b9e07e20 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DM=y diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig index 23f116fb7cc..f05e66e0d37 100644 --- a/configs/T1042D4RDB_defconfig +++ b/configs/T1042D4RDB_defconfig @@ -21,6 +21,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DM=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index f5fc3e19b58..ec54a71b016 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index d440ab69a68..0d57dade82d 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index 0464557c772..d9822bab3fd 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index f3ae31bf222..3838e28f415 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -43,6 +43,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig index 81623471926..6158be76fe5 100644 --- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudra CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_GREPENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index 51184a08d7c..fd658454c4a 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudra CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index 1c73bfb3d01..c6df1fc6573 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_MEMTEST=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index f6668720cf3..7fc6ec429cc 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_MEMTEST=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index 2578b0eabb8..ebc948c18a0 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -41,6 +41,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_MEMTEST=y diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index 3d3dc7c8a43..66d043309b3 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -24,6 +24,7 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudra CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_MEMTEST=y diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index e9d78e92c95..03529ff0d8b 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_MEMTEST=y diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index 9951efbb3d5..35ce1edd689 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_MEMTEST=y diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index 59f67d88a02..14ae4f0e961 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_MEMTEST=y diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig index 0c954e51386..56b174fad74 100644 --- a/configs/T2080RDB_revD_defconfig +++ b/configs/T2080RDB_revD_defconfig @@ -25,6 +25,7 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudra CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_MEMTEST=y diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index 43354c0af2b..6d270813585 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DM=y diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index 40bcbfe98b5..4f19024a6be 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -22,6 +22,7 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudra CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DM=y diff --git a/configs/UTOO_P66_defconfig b/configs/UTOO_P66_defconfig index b021b0a8865..64ab3821890 100644 --- a/configs/UTOO_P66_defconfig +++ b/configs/UTOO_P66_defconfig @@ -21,6 +21,7 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_TL059WV5C0=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Wexler_TAB7200_defconfig b/configs/Wexler_TAB7200_defconfig index 101ce57aa44..9ecb64b3d56 100644 --- a/configs/Wexler_TAB7200_defconfig +++ b/configs/Wexler_TAB7200_defconfig @@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Wits_Pro_A20_DKT_defconfig b/configs/Wits_Pro_A20_DKT_defconfig index 83b82133b96..7deea8af63e 100644 --- a/configs/Wits_Pro_A20_DKT_defconfig +++ b/configs/Wits_Pro_A20_DKT_defconfig @@ -13,6 +13,7 @@ CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/Wobo_i5_defconfig b/configs/Wobo_i5_defconfig index e0687bf887d..95279c3ccc9 100644 --- a/configs/Wobo_i5_defconfig +++ b/configs/Wobo_i5_defconfig @@ -8,6 +8,7 @@ CONFIG_MMC0_CD_PIN="PB3" CONFIG_USB1_VBUS_PIN="PG12" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Yones_Toptech_BD1078_defconfig b/configs/Yones_Toptech_BD1078_defconfig index f1ceb8b5527..89196e8ba28 100644 --- a/configs/Yones_Toptech_BD1078_defconfig +++ b/configs/Yones_Toptech_BD1078_defconfig @@ -20,6 +20,7 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Yones_Toptech_BS1078_V2_defconfig b/configs/Yones_Toptech_BS1078_V2_defconfig index 6701ecce2fe..a14881b3293 100644 --- a/configs/Yones_Toptech_BS1078_V2_defconfig +++ b/configs/Yones_Toptech_BS1078_V2_defconfig @@ -16,5 +16,6 @@ CONFIG_VIDEO_LCD_BL_EN="PA25" CONFIG_VIDEO_LCD_BL_PWM="PH13" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_USB_MUSB_HOST=y diff --git a/configs/a3y17lte_defconfig b/configs/a3y17lte_defconfig index 536e23e1df9..5a2a46ed64b 100644 --- a/configs/a3y17lte_defconfig +++ b/configs/a3y17lte_defconfig @@ -17,6 +17,7 @@ CONFIG_SAVE_PREV_BL_FDT_ADDR=y CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_DM_I2C_GPIO=y diff --git a/configs/a5y17lte_defconfig b/configs/a5y17lte_defconfig index c6f452a8558..4876a367693 100644 --- a/configs/a5y17lte_defconfig +++ b/configs/a5y17lte_defconfig @@ -17,6 +17,7 @@ CONFIG_SAVE_PREV_BL_FDT_ADDR=y CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_DM_I2C_GPIO=y diff --git a/configs/a64-olinuxino-emmc_defconfig b/configs/a64-olinuxino-emmc_defconfig index 8ec9eb3e9c2..6a1289758aa 100644 --- a/configs/a64-olinuxino-emmc_defconfig +++ b/configs/a64-olinuxino-emmc_defconfig @@ -6,6 +6,7 @@ CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/a64-olinuxino_defconfig b/configs/a64-olinuxino_defconfig index 16cef18beef..89618ac6a70 100644 --- a/configs/a64-olinuxino_defconfig +++ b/configs/a64-olinuxino_defconfig @@ -6,6 +6,7 @@ CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/a7y17lte_defconfig b/configs/a7y17lte_defconfig index 28e9c097d19..8ee48e3f80c 100644 --- a/configs/a7y17lte_defconfig +++ b/configs/a7y17lte_defconfig @@ -17,6 +17,7 @@ CONFIG_SAVE_PREV_BL_FDT_ADDR=y CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_DM_I2C_GPIO=y diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig index 8284feb773a..9c1fe568964 100644 --- a/configs/ae350_rv32_defconfig +++ b/configs/ae350_rv32_defconfig @@ -12,6 +12,7 @@ CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="RISC-V # " +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig index 8406eb5c333..502701f35c8 100644 --- a/configs/ae350_rv32_spl_defconfig +++ b/configs/ae350_rv32_spl_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_BINMAN_FDT is not set CONFIG_SYS_PROMPT="RISC-V # " +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig index 5db1a7cbd70..8291a698218 100644 --- a/configs/ae350_rv32_spl_xip_defconfig +++ b/configs/ae350_rv32_spl_xip_defconfig @@ -19,6 +19,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_BINMAN_FDT is not set CONFIG_SYS_PROMPT="RISC-V # " +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv32_xip_defconfig b/configs/ae350_rv32_xip_defconfig index d76118630be..62fb51baad4 100644 --- a/configs/ae350_rv32_xip_defconfig +++ b/configs/ae350_rv32_xip_defconfig @@ -13,6 +13,7 @@ CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="RISC-V # " +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig index 860a45f7fbf..681c40fd770 100644 --- a/configs/ae350_rv64_defconfig +++ b/configs/ae350_rv64_defconfig @@ -13,6 +13,7 @@ CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="RISC-V # " +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig index 6abc9c1388d..8da4786d7a5 100644 --- a/configs/ae350_rv64_spl_defconfig +++ b/configs/ae350_rv64_spl_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_BINMAN_FDT is not set CONFIG_SYS_PROMPT="RISC-V # " +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig index f3ace4453f1..e2022e7ec25 100644 --- a/configs/ae350_rv64_spl_xip_defconfig +++ b/configs/ae350_rv64_spl_xip_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_BINMAN_FDT is not set CONFIG_SYS_PROMPT="RISC-V # " +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv64_xip_defconfig b/configs/ae350_rv64_xip_defconfig index 3375cb69e64..b5bdf94dafb 100644 --- a/configs/ae350_rv64_xip_defconfig +++ b/configs/ae350_rv64_xip_defconfig @@ -14,6 +14,7 @@ CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="RISC-V # " +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/alt_defconfig b/configs/alt_defconfig index 6ab4fe7a818..1edcb2b319b 100644 --- a/configs/alt_defconfig +++ b/configs/alt_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=256 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig index 2fc93ea20e5..535682516ba 100644 --- a/configs/am335x_shc_defconfig +++ b/configs/am335x_shc_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1049 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig index a8111e94be8..b0146a394bb 100644 --- a/configs/am335x_shc_ict_defconfig +++ b/configs/am335x_shc_ict_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1049 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig index 901688c7da8..8ddf834d766 100644 --- a/configs/am335x_shc_netboot_defconfig +++ b/configs/am335x_shc_netboot_defconfig @@ -44,6 +44,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1049 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig index e17d85f8bfc..e50cca7c02b 100644 --- a/configs/am335x_shc_sdboot_defconfig +++ b/configs/am335x_shc_sdboot_defconfig @@ -43,6 +43,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1049 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig index 184e8868a41..26468ca2a9c 100644 --- a/configs/am3517_evm_defconfig +++ b/configs/am3517_evm_defconfig @@ -31,6 +31,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 # CONFIG_SPL_POWER is not set CONFIG_SYS_PROMPT="AM3517_EVM # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1054 # CONFIG_CMD_IMI is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0xaa0000 diff --git a/configs/amarula_a64_relic_defconfig b/configs/amarula_a64_relic_defconfig index ae44b66d109..2811667c511 100644 --- a/configs/amarula_a64_relic_defconfig +++ b/configs/amarula_a64_relic_defconfig @@ -7,6 +7,7 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_VIDEO_DE2 is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_MUSB_GADGET=y diff --git a/configs/amcore_defconfig b/configs/amcore_defconfig index 00620d4579f..53bfbcf5710 100644 --- a/configs/amcore_defconfig +++ b/configs/amcore_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_PROMPT="amcore $ " +CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_IMLS=y # CONFIG_CMD_XIMG is not set diff --git a/configs/ap121_defconfig b/configs/ap121_defconfig index 13120f370e2..1ae619005bd 100644 --- a/configs/ap121_defconfig +++ b/configs/ap121_defconfig @@ -21,6 +21,7 @@ CONFIG_BOOTCOMMAND="sf probe;mtdparts default;bootm 0x9f650000" CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="ap121 # " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_ELF is not set diff --git a/configs/ap143_defconfig b/configs/ap143_defconfig index 2f1a9f3cc12..061627f649d 100644 --- a/configs/ap143_defconfig +++ b/configs/ap143_defconfig @@ -23,6 +23,7 @@ CONFIG_BOOTCOMMAND="sf probe;mtdparts default;bootm 0x9f680000" CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="ap143 # " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_ELF is not set diff --git a/configs/ap152_defconfig b/configs/ap152_defconfig index ded583f398d..a67ba607983 100644 --- a/configs/ap152_defconfig +++ b/configs/ap152_defconfig @@ -23,6 +23,7 @@ CONFIG_BOOTCOMMAND="sf probe;mtdparts default;bootm 0x9f060000" CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="ap152 # " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_ELF is not set diff --git a/configs/apalis-imx8_defconfig b/configs/apalis-imx8_defconfig index e32e2dd03c5..9f47695e9c4 100644 --- a/configs/apalis-imx8_defconfig +++ b/configs/apalis-imx8_defconfig @@ -22,6 +22,7 @@ CONFIG_LOG=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2068 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set CONFIG_CMD_ASKENV=y diff --git a/configs/apalis-tk1_defconfig b/configs/apalis-tk1_defconfig index e017b7e0378..4d8ebc4ad55 100644 --- a/configs/apalis-tk1_defconfig +++ b/configs/apalis-tk1_defconfig @@ -23,6 +23,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SYS_PROMPT="Apalis TK1 # " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1054 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index 718623df79b..134612328d5 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -43,6 +43,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SYS_PROMPT="Apalis iMX6 # " CONFIG_SYS_MAXARGS=48 +CONFIG_SYS_PBSIZE=1055 # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/apalis_t30_defconfig b/configs/apalis_t30_defconfig index 5f9d670211e..0a6abe605f6 100644 --- a/configs/apalis_t30_defconfig +++ b/configs/apalis_t30_defconfig @@ -19,6 +19,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SYS_PROMPT="Apalis T30 # " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1054 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/apple_m1_defconfig b/configs/apple_m1_defconfig index 886fc4a6feb..6bba71cf5b4 100644 --- a/configs/apple_m1_defconfig +++ b/configs/apple_m1_defconfig @@ -6,6 +6,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_LATE_INIT=y +CONFIG_SYS_PBSIZE=276 # CONFIG_NET is not set CONFIG_APPLE_SPI_KEYB=y # CONFIG_MMC is not set diff --git a/configs/aristainetos2c_defconfig b/configs/aristainetos2c_defconfig index bd1eb732bac..7a3e690ed66 100644 --- a/configs/aristainetos2c_defconfig +++ b/configs/aristainetos2c_defconfig @@ -24,6 +24,7 @@ CONFIG_BOARD_TYPES=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/aristainetos2ccslb_defconfig b/configs/aristainetos2ccslb_defconfig index 4745f03c50e..6bc78b77329 100644 --- a/configs/aristainetos2ccslb_defconfig +++ b/configs/aristainetos2ccslb_defconfig @@ -24,6 +24,7 @@ CONFIG_BOARD_TYPES=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/armadillo-800eva_defconfig b/configs/armadillo-800eva_defconfig index 4d3b3a3c51e..d4490ea8d04 100644 --- a/configs/armadillo-800eva_defconfig +++ b/configs/armadillo-800eva_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_MONITOR_BASE=0x00000000 CONFIG_BOOTDELAY=3 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PBSIZE=256 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/arndale_defconfig b/configs/arndale_defconfig index c7fc2454b32..7a5fb2ee981 100644 --- a/configs/arndale_defconfig +++ b/configs/arndale_defconfig @@ -24,6 +24,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SYS_PROMPT="ARNDALE # " +CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/astro_mcf5373l_defconfig b/configs/astro_mcf5373l_defconfig index 1eea56b5ef2..4c2121116a2 100644 --- a/configs/astro_mcf5373l_defconfig +++ b/configs/astro_mcf5373l_defconfig @@ -19,6 +19,7 @@ CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="URMEL > " +CONFIG_SYS_PBSIZE=281 CONFIG_CMD_IMLS=y CONFIG_CMD_FPGA_LOADMK=y CONFIG_CMD_I2C=y diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig index a2e1272c358..eb16ba2d4e7 100644 --- a/configs/at91sam9260ek_dataflash_cs0_defconfig +++ b/configs/at91sam9260ek_dataflash_cs0_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig index 204f7e3173c..e1d8e2529db 100644 --- a/configs/at91sam9260ek_dataflash_cs1_defconfig +++ b/configs/at91sam9260ek_dataflash_cs1_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe 0:1; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/at91sam9260ek_nandflash_defconfig b/configs/at91sam9260ek_nandflash_defconfig index 547f11ce6a0..5e49df59538 100644 --- a/configs/at91sam9260ek_nandflash_defconfig +++ b/configs/at91sam9260ek_nandflash_defconfig @@ -24,6 +24,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig index dc6b40c04e9..4a268dde821 100644 --- a/configs/at91sam9261ek_dataflash_cs0_defconfig +++ b/configs/at91sam9261ek_dataflash_cs0_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_RESET_PHY_R=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig index 5d7a7f17093..d730e088766 100644 --- a/configs/at91sam9261ek_dataflash_cs3_defconfig +++ b/configs/at91sam9261ek_dataflash_cs3_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_RESET_PHY_R=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig index ee250d7e4ae..b8e43491e8b 100644 --- a/configs/at91sam9261ek_nandflash_defconfig +++ b/configs/at91sam9261ek_nandflash_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_RESET_PHY_R=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig index d0d5b1a572f..f6a595355c9 100644 --- a/configs/at91sam9263ek_dataflash_cs0_defconfig +++ b/configs/at91sam9263ek_dataflash_cs0_defconfig @@ -27,6 +27,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig index d0d5b1a572f..f6a595355c9 100644 --- a/configs/at91sam9263ek_dataflash_defconfig +++ b/configs/at91sam9263ek_dataflash_defconfig @@ -27,6 +27,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/at91sam9263ek_nandflash_defconfig b/configs/at91sam9263ek_nandflash_defconfig index 1807e3cb97a..a2a2a9e80cb 100644 --- a/configs/at91sam9263ek_nandflash_defconfig +++ b/configs/at91sam9263ek_nandflash_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/at91sam9263ek_norflash_boot_defconfig b/configs/at91sam9263ek_norflash_boot_defconfig index 585e10b891b..f92fd392ddc 100644 --- a/configs/at91sam9263ek_norflash_boot_defconfig +++ b/configs/at91sam9263ek_norflash_boot_defconfig @@ -24,6 +24,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/at91sam9263ek_norflash_defconfig b/configs/at91sam9263ek_norflash_defconfig index 19b3d9da88a..a34b7ee5d62 100644 --- a/configs/at91sam9263ek_norflash_defconfig +++ b/configs/at91sam9263ek_norflash_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig index 18433376c71..252611c2c8a 100644 --- a/configs/at91sam9g10ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_RESET_PHY_R=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig index edf84fd0b51..dce9ff8bd35 100644 --- a/configs/at91sam9g10ek_dataflash_cs3_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_RESET_PHY_R=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/at91sam9g10ek_nandflash_defconfig b/configs/at91sam9g10ek_nandflash_defconfig index 390516c7684..f9e1a334723 100644 --- a/configs/at91sam9g10ek_nandflash_defconfig +++ b/configs/at91sam9g10ek_nandflash_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_RESET_PHY_R=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/at91sam9g20ek_2mmc_defconfig b/configs/at91sam9g20ek_2mmc_defconfig index 34b0b830e54..93018b72573 100644 --- a/configs/at91sam9g20ek_2mmc_defconfig +++ b/configs/at91sam9g20ek_2mmc_defconfig @@ -26,6 +26,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x22000000 uImage; bootm" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig b/configs/at91sam9g20ek_2mmc_nandflash_defconfig index 0eb118e93f4..b8d5a64cb0d 100644 --- a/configs/at91sam9g20ek_2mmc_nandflash_defconfig +++ b/configs/at91sam9g20ek_2mmc_nandflash_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig index 596c9bf6ed4..f014d909505 100644 --- a/configs/at91sam9g20ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig index 281894d91fa..0f837c9e58e 100644 --- a/configs/at91sam9g20ek_dataflash_cs1_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe 0:1; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/at91sam9g20ek_nandflash_defconfig b/configs/at91sam9g20ek_nandflash_defconfig index d7a57db08b8..9b9c918a624 100644 --- a/configs/at91sam9g20ek_nandflash_defconfig +++ b/configs/at91sam9g20ek_nandflash_defconfig @@ -24,6 +24,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig index 03e6d3a9bd5..c0ca368f789 100644 --- a/configs/at91sam9m10g45ek_mmc_defconfig +++ b/configs/at91sam9m10g45ek_mmc_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig b/configs/at91sam9m10g45ek_nandflash_defconfig index f1c8574685a..2311a40987e 100644 --- a/configs/at91sam9m10g45ek_nandflash_defconfig +++ b/configs/at91sam9m10g45ek_nandflash_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig index 9cb1ea28f3d..9ab9effc935 100644 --- a/configs/at91sam9n12ek_mmc_defconfig +++ b/configs/at91sam9n12ek_mmc_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig index d73d80b5af8..0ac792c528f 100644 --- a/configs/at91sam9n12ek_nandflash_defconfig +++ b/configs/at91sam9n12ek_nandflash_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig index 9c984a941fe..6d036ab8bc2 100644 --- a/configs/at91sam9n12ek_spiflash_defconfig +++ b/configs/at91sam9n12ek_spiflash_defconfig @@ -22,6 +22,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y diff --git a/configs/at91sam9rlek_dataflash_defconfig b/configs/at91sam9rlek_dataflash_defconfig index fad75acbebe..e10506dfa09 100644 --- a/configs/at91sam9rlek_dataflash_defconfig +++ b/configs/at91sam9rlek_dataflash_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/at91sam9rlek_mmc_defconfig b/configs/at91sam9rlek_mmc_defconfig index fb683a722ce..b8dcfbdaa42 100644 --- a/configs/at91sam9rlek_mmc_defconfig +++ b/configs/at91sam9rlek_mmc_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/at91sam9rlek_nandflash_defconfig b/configs/at91sam9rlek_nandflash_defconfig index e42a999dcc2..9ccdace8462 100644 --- a/configs/at91sam9rlek_nandflash_defconfig +++ b/configs/at91sam9rlek_nandflash_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig index 2fe34776b66..11cfcd319d0 100644 --- a/configs/at91sam9x5ek_dataflash_defconfig +++ b/configs/at91sam9x5ek_dataflash_defconfig @@ -27,6 +27,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig index 6bca1c6d38e..863161e15ca 100644 --- a/configs/at91sam9x5ek_mmc_defconfig +++ b/configs/at91sam9x5ek_mmc_defconfig @@ -24,6 +24,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig index 327fa336a85..00559dcbc0e 100644 --- a/configs/at91sam9x5ek_nandflash_defconfig +++ b/configs/at91sam9x5ek_nandflash_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig index 50b3fc9b515..3d783b36e42 100644 --- a/configs/at91sam9x5ek_spiflash_defconfig +++ b/configs/at91sam9x5ek_spiflash_defconfig @@ -28,6 +28,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig index a2e1272c358..eb16ba2d4e7 100644 --- a/configs/at91sam9xeek_dataflash_cs0_defconfig +++ b/configs/at91sam9xeek_dataflash_cs0_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig index 204f7e3173c..e1d8e2529db 100644 --- a/configs/at91sam9xeek_dataflash_cs1_defconfig +++ b/configs/at91sam9xeek_dataflash_cs1_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe 0:1; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/at91sam9xeek_nandflash_defconfig b/configs/at91sam9xeek_nandflash_defconfig index 547f11ce6a0..5e49df59538 100644 --- a/configs/at91sam9xeek_nandflash_defconfig +++ b/configs/at91sam9xeek_nandflash_defconfig @@ -24,6 +24,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig index 373926859c0..a98aa8caf58 100644 --- a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig +++ b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig @@ -28,6 +28,7 @@ CONFIG_BOOTDELAY=0 CONFIG_CLOCKS=y CONFIG_SPL_OS_BOOT=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2073 CONFIG_CMD_MEMTEST=y CONFIG_CMD_FPGA_LOADBP=y CONFIG_CMD_FPGA_LOADP=y diff --git a/configs/axm_defconfig b/configs/axm_defconfig index 89b9f9faea7..607e1f7d1a2 100644 --- a/configs/axm_defconfig +++ b/configs/axm_defconfig @@ -45,6 +45,7 @@ CONFIG_SPL_NAND_BASE=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig index 0f3e06263d3..c23071e62c2 100644 --- a/configs/axs101_defconfig +++ b/configs/axs101_defconfig @@ -17,6 +17,7 @@ CONFIG_BOARD_TYPES=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="AXS# " +CONFIG_SYS_PBSIZE=278 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y CONFIG_CMD_SPI=y diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig index d86fb9c8d3c..bb2f783dd1e 100644 --- a/configs/axs103_defconfig +++ b/configs/axs103_defconfig @@ -17,6 +17,7 @@ CONFIG_BOARD_TYPES=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="AXS# " +CONFIG_SYS_PBSIZE=278 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y CONFIG_CMD_SPI=y diff --git a/configs/ba10_tv_box_defconfig b/configs/ba10_tv_box_defconfig index b89dd8ea62b..b14731554b7 100644 --- a/configs/ba10_tv_box_defconfig +++ b/configs/ba10_tv_box_defconfig @@ -10,6 +10,7 @@ CONFIG_USB2_VBUS_PIN="PH12" CONFIG_VIDEO_COMPOSITE=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/bananapi_m1_plus_defconfig b/configs/bananapi_m1_plus_defconfig index 2f0c22f62fa..1b5f6ba4d39 100644 --- a/configs/bananapi_m1_plus_defconfig +++ b/configs/bananapi_m1_plus_defconfig @@ -10,6 +10,7 @@ CONFIG_GMAC_TX_DELAY=3 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_NETCONSOLE=y CONFIG_SCSI_AHCI=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/bananapi_m2_berry_defconfig b/configs/bananapi_m2_berry_defconfig index a35fcdb64e8..d7d7ced9d9b 100644 --- a/configs/bananapi_m2_berry_defconfig +++ b/configs/bananapi_m2_berry_defconfig @@ -10,6 +10,7 @@ CONFIG_USB1_VBUS_PIN="PH23" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/bananapi_m2_plus_h3_defconfig b/configs/bananapi_m2_plus_h3_defconfig index 26ced59fb02..d706c9a4e17 100644 --- a/configs/bananapi_m2_plus_h3_defconfig +++ b/configs/bananapi_m2_plus_h3_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=672 CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/bananapi_m2_plus_h5_defconfig b/configs/bananapi_m2_plus_h5_defconfig index fb6c945919a..111e037ee57 100644 --- a/configs/bananapi_m2_plus_h5_defconfig +++ b/configs/bananapi_m2_plus_h5_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=672 CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/bananapi_m2_zero_defconfig b/configs/bananapi_m2_zero_defconfig index ac3f8f5ab8b..74c164c27c5 100644 --- a/configs/bananapi_m2_zero_defconfig +++ b/configs/bananapi_m2_zero_defconfig @@ -6,3 +6,4 @@ CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=408 CONFIG_MMC0_CD_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig index 5463b046fdb..6c1aa1ae743 100644 --- a/configs/bananapi_m64_defconfig +++ b/configs/bananapi_m64_defconfig @@ -7,6 +7,7 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/bayleybay_defconfig b/configs/bayleybay_defconfig index 667240bff1c..80602fbbff9 100644 --- a/configs/bayleybay_defconfig +++ b/configs/bayleybay_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/bcm7260_defconfig b/configs/bcm7260_defconfig index b8b744e4bfb..024cad147dd 100644 --- a/configs/bcm7260_defconfig +++ b/configs/bcm7260_defconfig @@ -20,6 +20,7 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot>" CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=536 CONFIG_CMD_ASKENV=y CONFIG_CMD_GPT=y # CONFIG_RANDOM_UUID is not set diff --git a/configs/bcm7445_defconfig b/configs/bcm7445_defconfig index eecee5a5cc6..ce01797a1b9 100644 --- a/configs/bcm7445_defconfig +++ b/configs/bcm7445_defconfig @@ -21,6 +21,7 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot>" CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=536 CONFIG_CMD_ASKENV=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/bcm963158_ram_defconfig b/configs/bcm963158_ram_defconfig index cd622d6425f..944f8beb04e 100644 --- a/configs/bcm963158_ram_defconfig +++ b/configs/bcm963158_ram_defconfig @@ -21,6 +21,7 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_PBSIZE=276 # CONFIG_CMD_LZMADEC is not set # CONFIG_CMD_UNZIP is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/bcm96753ref_ram_defconfig b/configs/bcm96753ref_ram_defconfig index ca3ac5b235b..8f69f868c4e 100644 --- a/configs/bcm96753ref_ram_defconfig +++ b/configs/bcm96753ref_ram_defconfig @@ -24,6 +24,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_PBSIZE=276 # CONFIG_CMD_BOOTD is not set # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/bcm968360bg_ram_defconfig b/configs/bcm968360bg_ram_defconfig index 466d1bd9744..489e1b16cf9 100644 --- a/configs/bcm968360bg_ram_defconfig +++ b/configs/bcm968360bg_ram_defconfig @@ -19,6 +19,7 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_GPIO=y CONFIG_CMD_MTD=y CONFIG_CMD_NAND=y diff --git a/configs/bcm968380gerg_ram_defconfig b/configs/bcm968380gerg_ram_defconfig index 4dd7739889b..d861c143932 100644 --- a/configs/bcm968380gerg_ram_defconfig +++ b/configs/bcm968380gerg_ram_defconfig @@ -19,6 +19,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="bcm968380gerg # " CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_PBSIZE=545 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/bcm968580xref_ram_defconfig b/configs/bcm968580xref_ram_defconfig index feda8f43fed..5ca77db0733 100644 --- a/configs/bcm968580xref_ram_defconfig +++ b/configs/bcm968580xref_ram_defconfig @@ -19,6 +19,7 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_GPIO=y CONFIG_CMD_MTD=y CONFIG_CMD_NAND=y diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig index a3ada3c36cf..70379d76b05 100644 --- a/configs/bcm_ns3_defconfig +++ b/configs/bcm_ns3_defconfig @@ -25,6 +25,7 @@ CONFIG_SILENT_U_BOOT_ONLY=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1049 # CONFIG_SYS_XTRACE is not set CONFIG_CMD_GPT=y CONFIG_CMD_GPT_RENAME=y diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig index fc4ab4dd890..48e2b26436d 100644 --- a/configs/beaver_defconfig +++ b/configs/beaver_defconfig @@ -16,6 +16,7 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra30 (Beaver) # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2084 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/beelink_gs1_defconfig b/configs/beelink_gs1_defconfig index 42925eabcb0..339e6c9e3c9 100644 --- a/configs/beelink_gs1_defconfig +++ b/configs/beelink_gs1_defconfig @@ -8,6 +8,7 @@ CONFIG_MMC0_CD_PIN="PF6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_PSCI_RESET is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/beelink_x2_defconfig b/configs/beelink_x2_defconfig index 6206d909003..432079a6ad3 100644 --- a/configs/beelink_x2_defconfig +++ b/configs/beelink_x2_defconfig @@ -6,5 +6,6 @@ CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=567 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig index 0d4007dbd1f..6e88048e0a4 100644 --- a/configs/bitmain_antminer_s9_defconfig +++ b/configs/bitmain_antminer_s9_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_STACK_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="antminer> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=2075 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_DM is not set diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig index 324a80e4af1..7fc3c278c5c 100644 --- a/configs/bk4r1_defconfig +++ b/configs/bk4r1_defconfig @@ -30,6 +30,7 @@ CONFIG_BOOTCOMMAND="run set_gpio122; run set_gpio96; sf probe; run manage_userda CONFIG_USE_PREBOOT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 # CONFIG_CMD_ELF is not set CONFIG_CMD_MEMTEST=y CONFIG_CMD_DM=y diff --git a/configs/blanche_defconfig b/configs/blanche_defconfig index 1ab40d617ab..b21c5fd446d 100644 --- a/configs/blanche_defconfig +++ b/configs/blanche_defconfig @@ -19,6 +19,7 @@ CONFIG_ENV_ADDR=0x40000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=256 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/boston32r2_defconfig b/configs/boston32r2_defconfig index b27ce773ede..abc783e905f 100644 --- a/configs/boston32r2_defconfig +++ b/configs/boston32r2_defconfig @@ -19,6 +19,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " +CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston32r2el_defconfig b/configs/boston32r2el_defconfig index 985e8bdb051..2d4ecdc33fe 100644 --- a/configs/boston32r2el_defconfig +++ b/configs/boston32r2el_defconfig @@ -20,6 +20,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " +CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston32r6_defconfig b/configs/boston32r6_defconfig index bedac025402..4187540fb3c 100644 --- a/configs/boston32r6_defconfig +++ b/configs/boston32r6_defconfig @@ -20,6 +20,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " +CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston32r6el_defconfig b/configs/boston32r6el_defconfig index b90a58c502f..968826e6fd6 100644 --- a/configs/boston32r6el_defconfig +++ b/configs/boston32r6el_defconfig @@ -21,6 +21,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " +CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston64r2_defconfig b/configs/boston64r2_defconfig index bca4a0412cc..c3c4f12a6ec 100644 --- a/configs/boston64r2_defconfig +++ b/configs/boston64r2_defconfig @@ -20,6 +20,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " +CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston64r2el_defconfig b/configs/boston64r2el_defconfig index 681c05321ae..f3f70f95e4d 100644 --- a/configs/boston64r2el_defconfig +++ b/configs/boston64r2el_defconfig @@ -21,6 +21,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " +CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston64r6_defconfig b/configs/boston64r6_defconfig index 0aabb22b2fc..4e5a4ac3cf0 100644 --- a/configs/boston64r6_defconfig +++ b/configs/boston64r6_defconfig @@ -20,6 +20,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " +CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston64r6el_defconfig b/configs/boston64r6el_defconfig index f1e0175db7b..f78d331ebbe 100644 --- a/configs/boston64r6el_defconfig +++ b/configs/boston64r6el_defconfig @@ -21,6 +21,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " +CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig index 2a7ddb4b350..9aef0297268 100644 --- a/configs/brppt1_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/brppt1_nand_defconfig b/configs/brppt1_nand_defconfig index eb6b83cc552..475ecaf0ab6 100644 --- a/configs/brppt1_nand_defconfig +++ b/configs/brppt1_nand_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig index ec2de59c20f..8c8b6411a12 100644 --- a/configs/brppt1_spi_defconfig +++ b/configs/brppt1_spi_defconfig @@ -47,6 +47,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/brppt2_defconfig b/configs/brppt2_defconfig index bcaab38b7ac..b9f3587bdaa 100644 --- a/configs/brppt2_defconfig +++ b/configs/brppt2_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set diff --git a/configs/brsmarc1_defconfig b/configs/brsmarc1_defconfig index 29c54fc856e..259fdf12e61 100644 --- a/configs/brsmarc1_defconfig +++ b/configs/brsmarc1_defconfig @@ -45,6 +45,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_NETBSD is not set diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig index a8a0815e266..fce5245fc61 100644 --- a/configs/brxre1_defconfig +++ b/configs/brxre1_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_NETBSD is not set diff --git a/configs/bubblegum_96_defconfig b/configs/bubblegum_96_defconfig index 33402f297c7..f577ec07019 100644 --- a/configs/bubblegum_96_defconfig +++ b/configs/bubblegum_96_defconfig @@ -15,6 +15,7 @@ CONFIG_BOOTARGS="console=ttyOWL5,115200n8" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot => " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1051 CONFIG_CMD_MD5SUM=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_CACHE=y diff --git a/configs/cardhu_defconfig b/configs/cardhu_defconfig index d683c1799f0..3cacee77634 100644 --- a/configs/cardhu_defconfig +++ b/configs/cardhu_defconfig @@ -15,6 +15,7 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra30 (Cardhu) # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2084 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/cei-tk1-som_defconfig b/configs/cei-tk1-som_defconfig index 695d19e2162..8ded21a8748 100644 --- a/configs/cei-tk1-som_defconfig +++ b/configs/cei-tk1-som_defconfig @@ -17,6 +17,7 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra124 (TK1-SOM) # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2086 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/cgtqmx8_defconfig b/configs/cgtqmx8_defconfig index c53fa742751..7585e6ec0d8 100644 --- a/configs/cgtqmx8_defconfig +++ b/configs/cgtqmx8_defconfig @@ -33,6 +33,7 @@ CONFIG_SYS_MMCSD_FS_BOOT_PARTITION=0 CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/cherryhill_defconfig b/configs/cherryhill_defconfig index 38302ddc2f2..1d4256e37ba 100644 --- a/configs/cherryhill_defconfig +++ b/configs/cherryhill_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_MMC=y CONFIG_CMD_SPI=y diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index 82692542078..11116510f3e 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -51,6 +51,7 @@ CONFIG_SPL_POWER=y # CONFIG_SPL_SPI_FLASH_TINY is not set CONFIG_TPL_POWER=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_PMC=y CONFIG_CMD_GPIO=y diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig index b29c5ccd7a4..46397c3efa0 100644 --- a/configs/chromebook_link64_defconfig +++ b/configs/chromebook_link64_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_PCI=y CONFIG_SPL_PCH=y CONFIG_SPL_RTC=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_GPIO=y CONFIG_CMD_SPI=y diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig index 9186621f8d0..46ac5d5272e 100644 --- a/configs/chromebook_link_defconfig +++ b/configs/chromebook_link_defconfig @@ -28,6 +28,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_GPIO=y CONFIG_CMD_PART=y diff --git a/configs/chromebook_samus_defconfig b/configs/chromebook_samus_defconfig index 93f1d403fa2..e6d37307b09 100644 --- a/configs/chromebook_samus_defconfig +++ b/configs/chromebook_samus_defconfig @@ -28,6 +28,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/chromebook_samus_tpl_defconfig b/configs/chromebook_samus_tpl_defconfig index 36871182395..65a879d36d9 100644 --- a/configs/chromebook_samus_tpl_defconfig +++ b/configs/chromebook_samus_tpl_defconfig @@ -46,6 +46,7 @@ CONFIG_TPL_PCH=y CONFIG_TPL_DM_SPI=y CONFIG_TPL_DM_SPI_FLASH=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/chromebox_panther_defconfig b/configs/chromebox_panther_defconfig index 363b5f39f01..c909d316a34 100644 --- a/configs/chromebox_panther_defconfig +++ b/configs/chromebox_panther_defconfig @@ -24,6 +24,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GPIO=y CONFIG_CMD_PART=y CONFIG_CMD_SPI=y diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig index 8c98762a54d..b42e5c25aec 100644 --- a/configs/cl-som-imx7_defconfig +++ b/configs/cl-som-imx7_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="CL-SOM-iMX7 # " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=543 CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index d7ea95bbff7..bb63d5f7756 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -37,6 +37,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="CM-FX6 # " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=538 # CONFIG_CMD_XIMG is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/cm_t335_defconfig b/configs/cm_t335_defconfig index 556035f4f2b..162aabe4ff6 100644 --- a/configs/cm_t335_defconfig +++ b/configs/cm_t335_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_WATCHDOG=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set CONFIG_SYS_PROMPT="CM-T335 # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1051 CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y CONFIG_CMD_EEPROM_LAYOUT=y diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig index 0a64d1dc830..c3ddc5e0a92 100644 --- a/configs/cm_t43_defconfig +++ b/configs/cm_t43_defconfig @@ -41,6 +41,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_PROMPT="CM-T43 # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y CONFIG_CMD_EEPROM_LAYOUT=y diff --git a/configs/cobra5272_defconfig b/configs/cobra5272_defconfig index eacfc661433..c6eff7d9352 100644 --- a/configs/cobra5272_defconfig +++ b/configs/cobra5272_defconfig @@ -14,6 +14,7 @@ CONFIG_BOOTDELAY=5 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="COBRA > " +CONFIG_SYS_PBSIZE=281 CONFIG_CMD_IMLS=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/colibri-imx6ull-emmc_defconfig b/configs/colibri-imx6ull-emmc_defconfig index fb33c5718a6..bfbbf34ae5c 100644 --- a/configs/colibri-imx6ull-emmc_defconfig +++ b/configs/colibri-imx6ull-emmc_defconfig @@ -22,6 +22,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_PROMPT="Colibri iMX6ULL # " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=547 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_CMD_ELF is not set diff --git a/configs/colibri-imx6ull_defconfig b/configs/colibri-imx6ull_defconfig index 30445e8c754..750b03b74d8 100644 --- a/configs/colibri-imx6ull_defconfig +++ b/configs/colibri-imx6ull_defconfig @@ -24,6 +24,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_PROMPT="Colibri iMX6ULL # " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=547 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_CMD_ELF is not set diff --git a/configs/colibri-imx8x_defconfig b/configs/colibri-imx8x_defconfig index 29016ad8bd3..3abe7a8579e 100644 --- a/configs/colibri-imx8x_defconfig +++ b/configs/colibri-imx8x_defconfig @@ -21,6 +21,7 @@ CONFIG_LOG=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2068 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set CONFIG_CMD_ASKENV=y diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 55338122d88..0bd601b55d3 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SYS_PROMPT="Colibri iMX6 # " CONFIG_SYS_MAXARGS=48 +CONFIG_SYS_PBSIZE=1056 # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig index 1fd64ec4278..f56064d34d3 100644 --- a/configs/colibri_imx7_defconfig +++ b/configs/colibri_imx7_defconfig @@ -26,6 +26,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_LATE_INIT=y CONFIG_SYS_PROMPT="Colibri iMX7 # " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=544 # CONFIG_CMD_BOOTD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set diff --git a/configs/colibri_imx7_emmc_defconfig b/configs/colibri_imx7_emmc_defconfig index cef48b9fca6..361077ee84e 100644 --- a/configs/colibri_imx7_emmc_defconfig +++ b/configs/colibri_imx7_emmc_defconfig @@ -25,6 +25,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_LATE_INIT=y CONFIG_SYS_PROMPT="Colibri iMX7 # " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=544 # CONFIG_CMD_BOOTD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig index 456d43afa22..a7b9cb88276 100644 --- a/configs/colibri_t20_defconfig +++ b/configs/colibri_t20_defconfig @@ -18,6 +18,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SYS_PROMPT="Colibri T20 # " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1055 # CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/colibri_t30_defconfig b/configs/colibri_t30_defconfig index 1e1f1bfa088..1e1a4354d49 100644 --- a/configs/colibri_t30_defconfig +++ b/configs/colibri_t30_defconfig @@ -19,6 +19,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SYS_PROMPT="Colibri T30 # " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1055 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig index c5f4322923b..d92756fb166 100644 --- a/configs/colibri_vf_defconfig +++ b/configs/colibri_vf_defconfig @@ -29,6 +29,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_PROMPT="Colibri VFxx # " +CONFIG_SYS_PBSIZE=1056 # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_BOOTM is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/colorfly_e708_q1_defconfig b/configs/colorfly_e708_q1_defconfig index 5d3636e34e8..304ae18a857 100644 --- a/configs/colorfly_e708_q1_defconfig +++ b/configs/colorfly_e708_q1_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_BL_EN="PA25" CONFIG_VIDEO_LCD_BL_PWM="PH13" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_AXP_DLDO2_VOLT=1800 CONFIG_USB_MUSB_HOST=y diff --git a/configs/comtrend_ar5315u_ram_defconfig b/configs/comtrend_ar5315u_ram_defconfig index ab49a6c1a58..0389db76d57 100644 --- a/configs/comtrend_ar5315u_ram_defconfig +++ b/configs/comtrend_ar5315u_ram_defconfig @@ -20,6 +20,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="AR-5315un # " CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_PBSIZE=541 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/comtrend_ar5387un_ram_defconfig b/configs/comtrend_ar5387un_ram_defconfig index 4e5c704751d..d9a97c5799d 100644 --- a/configs/comtrend_ar5387un_ram_defconfig +++ b/configs/comtrend_ar5387un_ram_defconfig @@ -20,6 +20,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="AR-5387un # " CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_PBSIZE=541 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/comtrend_ct5361_ram_defconfig b/configs/comtrend_ct5361_ram_defconfig index 0c3fb8e94b5..b3c4109e93f 100644 --- a/configs/comtrend_ct5361_ram_defconfig +++ b/configs/comtrend_ct5361_ram_defconfig @@ -20,6 +20,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="CT-5361 # " CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_PBSIZE=539 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/comtrend_vr3032u_ram_defconfig b/configs/comtrend_vr3032u_ram_defconfig index 77e67ca4446..536cd62c461 100644 --- a/configs/comtrend_vr3032u_ram_defconfig +++ b/configs/comtrend_vr3032u_ram_defconfig @@ -20,6 +20,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="VR-3032u # " CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_PBSIZE=540 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/comtrend_wap5813n_ram_defconfig b/configs/comtrend_wap5813n_ram_defconfig index 881c30a60e7..e6282858136 100644 --- a/configs/comtrend_wap5813n_ram_defconfig +++ b/configs/comtrend_wap5813n_ram_defconfig @@ -20,6 +20,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="WAP-5813n # " CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_PBSIZE=541 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig index 1c5efec707f..c41b83121e7 100644 --- a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig +++ b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig @@ -32,6 +32,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/conga-qeval20-qa3-e3845_defconfig b/configs/conga-qeval20-qa3-e3845_defconfig index 5aba0e2f7f7..84ba5cadfec 100644 --- a/configs/conga-qeval20-qa3-e3845_defconfig +++ b/configs/conga-qeval20-qa3-e3845_defconfig @@ -28,6 +28,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/coreboot64_defconfig b/configs/coreboot64_defconfig index 34278487486..a61f869291d 100644 --- a/configs/coreboot64_defconfig +++ b/configs/coreboot64_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IDE=y CONFIG_CMD_MMC=y CONFIG_CMD_PART=y diff --git a/configs/coreboot_defconfig b/configs/coreboot_defconfig index b09f3f03601..792d35eec58 100644 --- a/configs/coreboot_defconfig +++ b/configs/coreboot_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IDE=y CONFIG_CMD_MMC=y CONFIG_CMD_PART=y diff --git a/configs/cortina_presidio-asic-base_defconfig b/configs/cortina_presidio-asic-base_defconfig index 3c5290e1e7b..100f81e66f0 100644 --- a/configs/cortina_presidio-asic-base_defconfig +++ b/configs/cortina_presidio-asic-base_defconfig @@ -21,6 +21,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_SYS_PROMPT="G3#" CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_WDT=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIMER=y diff --git a/configs/cortina_presidio-asic-emmc_defconfig b/configs/cortina_presidio-asic-emmc_defconfig index 01b07df1118..228215b507b 100644 --- a/configs/cortina_presidio-asic-emmc_defconfig +++ b/configs/cortina_presidio-asic-emmc_defconfig @@ -19,6 +19,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_SYS_PROMPT="G3#" CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_WDT=y diff --git a/configs/cortina_presidio-asic-pnand_defconfig b/configs/cortina_presidio-asic-pnand_defconfig index 996041a04ab..b8b86845625 100644 --- a/configs/cortina_presidio-asic-pnand_defconfig +++ b/configs/cortina_presidio-asic-pnand_defconfig @@ -21,6 +21,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_SYS_PROMPT="G3#" CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_MTD=y CONFIG_CMD_WDT=y CONFIG_CMD_CACHE=y diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig index c0ae60f7e33..6698b7ea81a 100644 --- a/configs/corvus_defconfig +++ b/configs/corvus_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_BASE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/cougarcanyon2_defconfig b/configs/cougarcanyon2_defconfig index 9226c780d9a..09a6e4bc001 100644 --- a/configs/cougarcanyon2_defconfig +++ b/configs/cougarcanyon2_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_GPIO=y CONFIG_CMD_PART=y diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig index 590fee97942..addaf3b7f79 100644 --- a/configs/crownbay_defconfig +++ b/configs/crownbay_defconfig @@ -23,6 +23,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/cubieboard7_defconfig b/configs/cubieboard7_defconfig index 35fd580c2ce..1a930ca8667 100644 --- a/configs/cubieboard7_defconfig +++ b/configs/cubieboard7_defconfig @@ -14,6 +14,7 @@ CONFIG_BOOTARGS="console=ttyOWL3,115200n8" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot => " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1051 CONFIG_CMD_MMC=y CONFIG_MMC_OWL=y CONFIG_PHY_REALTEK=y diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig index 090cbcec694..b74fafd9faa 100644 --- a/configs/d2net_v2_defconfig +++ b/configs/d2net_v2_defconfig @@ -28,6 +28,7 @@ CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="d2v2> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1047 CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4 CONFIG_CMD_I2C=y diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index bfc8488e0e8..a692e1456c1 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x8000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot > " +CONFIG_SYS_PBSIZE=1050 CONFIG_CRC32_VERIFY=y CONFIG_CMD_MX_CYCLIC=y CONFIG_CMD_DM=y diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig index b1d84f1594e..68318dc4fcc 100644 --- a/configs/da850evm_direct_nor_defconfig +++ b/configs/da850evm_direct_nor_defconfig @@ -29,6 +29,7 @@ CONFIG_CLOCKS=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot > " +CONFIG_SYS_PBSIZE=1050 # CONFIG_CMD_BOOTZ is not set CONFIG_CMD_IMLS=y CONFIG_CRC32_VERIFY=y diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig index 0f5e135f1bf..c382c38050e 100644 --- a/configs/da850evm_nand_defconfig +++ b/configs/da850evm_nand_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_NAND_SIMPLE=y CONFIG_SPL_NAND_BASE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot > " +CONFIG_SYS_PBSIZE=1050 CONFIG_CRC32_VERIFY=y CONFIG_CMD_MX_CYCLIC=y CONFIG_CMD_DM=y diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig index 4eec628d8ae..fca2ae668d2 100644 --- a/configs/dalmore_defconfig +++ b/configs/dalmore_defconfig @@ -16,6 +16,7 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra114 (Dalmore) # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2086 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/deneb_defconfig b/configs/deneb_defconfig index aa8bc6f39a4..cd809b96b72 100644 --- a/configs/deneb_defconfig +++ b/configs/deneb_defconfig @@ -43,6 +43,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2073 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_CMD_EXPORTENV is not set diff --git a/configs/dfi-bt700-q7x-151_defconfig b/configs/dfi-bt700-q7x-151_defconfig index 0dfb7bbe025..177764ef80c 100644 --- a/configs/dfi-bt700-q7x-151_defconfig +++ b/configs/dfi-bt700-q7x-151_defconfig @@ -27,6 +27,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index b5b5db60e56..8c0b9b3d456 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -38,6 +38,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x11400 CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_MEMTEST=y CONFIG_CMD_UNZIP=y CONFIG_CMD_DFU=y diff --git a/configs/difrnce_dit4350_defconfig b/configs/difrnce_dit4350_defconfig index e1067b66eec..29d9978cb32 100644 --- a/configs/difrnce_dit4350_defconfig +++ b/configs/difrnce_dit4350_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/display5_defconfig b/configs/display5_defconfig index e4b672122f0..0c47e83b77f 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -50,6 +50,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="display5 > " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=2076 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_ELF is not set CONFIG_CMD_SPL=y diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig index 0aa7e7111a6..cb27169b721 100644 --- a/configs/display5_factory_defconfig +++ b/configs/display5_factory_defconfig @@ -48,6 +48,7 @@ CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="display5 factory > " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=2084 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_ELF is not set CONFIG_CMD_SPL=y diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig index d591c4a689c..eb6797872c9 100644 --- a/configs/dockstar_defconfig +++ b/configs/dockstar_defconfig @@ -22,6 +22,7 @@ CONFIG_USE_PREBOOT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="DockStar> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1051 # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y CONFIG_CMD_USB=y diff --git a/configs/draco_defconfig b/configs/draco_defconfig index 531b2ef76a6..cae88613213 100644 --- a/configs/draco_defconfig +++ b/configs/draco_defconfig @@ -47,6 +47,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1049 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig index 2ea25d95a2a..28ce34cb2aa 100644 --- a/configs/dragonboard410c_defconfig +++ b/configs/dragonboard410c_defconfig @@ -20,6 +20,7 @@ CONFIG_USE_PREBOOT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="dragonboard410c => " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=548 # CONFIG_CMD_IMI is not set CONFIG_CMD_MD5SUM=y CONFIG_CMD_MEMINFO=y diff --git a/configs/dragonboard820c_defconfig b/configs/dragonboard820c_defconfig index 58e3f039f82..f44be0c0a63 100644 --- a/configs/dragonboard820c_defconfig +++ b/configs/dragonboard820c_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTARGS="console=ttyMSM0,115200n8" CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="dragonboard820c => " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=548 CONFIG_CMD_MD5SUM=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_GPIO=y diff --git a/configs/dserve_dsrv9703c_defconfig b/configs/dserve_dsrv9703c_defconfig index 60910c3ce35..dfc270ccc52 100644 --- a/configs/dserve_dsrv9703c_defconfig +++ b/configs/dserve_dsrv9703c_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/durian_defconfig b/configs/durian_defconfig index 8ce80f9d903..2ebb6914893 100644 --- a/configs/durian_defconfig +++ b/configs/durian_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200 earlycon=pl011,0x28001000 root=/dev/sda2 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_LAST_STAGE_INIT=y CONFIG_SYS_PROMPT="durian#" +CONFIG_SYS_PBSIZE=280 # CONFIG_CMD_LZMADEC is not set # CONFIG_CMD_UNZIP is not set CONFIG_CMD_PCI=y diff --git a/configs/ea-lpc3250devkitv2_defconfig b/configs/ea-lpc3250devkitv2_defconfig index 51a440f29eb..f76ce58fff9 100644 --- a/configs/ea-lpc3250devkitv2_defconfig +++ b/configs/ea-lpc3250devkitv2_defconfig @@ -18,6 +18,7 @@ CONFIG_BOARD_SIZE_LIMIT=1048575 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="EA-LPC3250v2=> " +CONFIG_SYS_PBSIZE=288 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_OF_CONTROL=y diff --git a/configs/eb_cpu5282_defconfig b/configs/eb_cpu5282_defconfig index dc649f213fa..a0cfb1eee22 100644 --- a/configs/eb_cpu5282_defconfig +++ b/configs/eb_cpu5282_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTCOMMAND="printenv" CONFIG_MISC_INIT_R=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="\nEB+CPU5282> " +CONFIG_SYS_PBSIZE=1054 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set diff --git a/configs/edison_defconfig b/configs/edison_defconfig index 3f27a2f43df..af70b736a8e 100644 --- a/configs/edison_defconfig +++ b/configs/edison_defconfig @@ -15,6 +15,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=128 +CONFIG_SYS_PBSIZE=2068 CONFIG_CMD_CPU=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/edminiv2_defconfig b/configs/edminiv2_defconfig index 4987e094659..c3293e20246 100644 --- a/configs/edminiv2_defconfig +++ b/configs/edminiv2_defconfig @@ -25,6 +25,7 @@ CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="EDMiniV2> " +CONFIG_SYS_PBSIZE=1051 CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y diff --git a/configs/efi-x86_app32_defconfig b/configs/efi-x86_app32_defconfig index 7a723c136c2..4ae74dbd2e3 100644 --- a/configs/efi-x86_app32_defconfig +++ b/configs/efi-x86_app32_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTM is not set CONFIG_CMD_PART=y # CONFIG_CMD_NET is not set diff --git a/configs/efi-x86_app64_defconfig b/configs/efi-x86_app64_defconfig index 98f91d81164..3f1e80120c6 100644 --- a/configs/efi-x86_app64_defconfig +++ b/configs/efi-x86_app64_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTM is not set CONFIG_CMD_PART=y # CONFIG_CMD_NET is not set diff --git a/configs/efi-x86_payload32_defconfig b/configs/efi-x86_payload32_defconfig index ceadd8290d0..42fb89d5b3e 100644 --- a/configs/efi-x86_payload32_defconfig +++ b/configs/efi-x86_payload32_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IDE=y CONFIG_CMD_MMC=y CONFIG_CMD_PART=y diff --git a/configs/efi-x86_payload64_defconfig b/configs/efi-x86_payload64_defconfig index b5d1cf12435..eef51e8efc3 100644 --- a/configs/efi-x86_payload64_defconfig +++ b/configs/efi-x86_payload64_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IDE=y CONFIG_CMD_MMC=y CONFIG_CMD_PART=y diff --git a/configs/emlid_neutis_n5_devboard_defconfig b/configs/emlid_neutis_n5_devboard_defconfig index a3b43dffc63..e54f4aa7524 100644 --- a/configs/emlid_neutis_n5_devboard_defconfig +++ b/configs/emlid_neutis_n5_devboard_defconfig @@ -8,4 +8,5 @@ CONFIG_DRAM_ZQ=3881977 # CONFIG_DRAM_ODT_EN is not set CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SUPPORT_EMMC_BOOT=y diff --git a/configs/emsdp_defconfig b/configs/emsdp_defconfig index 17ca315a4ac..2491183fcce 100644 --- a/configs/emsdp_defconfig +++ b/configs/emsdp_defconfig @@ -13,6 +13,7 @@ CONFIG_SYS_LOAD_ADDR=0x10000000 CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="emsdp# " +CONFIG_SYS_PBSIZE=280 # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_MMC=y diff --git a/configs/espresso7420_defconfig b/configs/espresso7420_defconfig index 533757ba5b4..e06eb995a15 100644 --- a/configs/espresso7420_defconfig +++ b/configs/espresso7420_defconfig @@ -17,6 +17,7 @@ CONFIG_CONSOLE_MUX=y # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_PROMPT="ESPRESSO7420 # " +CONFIG_SYS_PBSIZE=1024 # CONFIG_CMD_SETEXPR is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_MMC is not set diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig index 2337b0f4535..c1d5512d6da 100644 --- a/configs/etamin_defconfig +++ b/configs/etamin_defconfig @@ -48,6 +48,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1049 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig index 18faa1a7fb3..1364c37b63c 100644 --- a/configs/ethernut5_defconfig +++ b/configs/ethernut5_defconfig @@ -22,6 +22,7 @@ CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x22000000 0xc6000 0x294000; bootm 0x2 CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y diff --git a/configs/ev-imx280-nano-x-mb_defconfig b/configs/ev-imx280-nano-x-mb_defconfig index 864933842a6..20ac5ddb332 100644 --- a/configs/ev-imx280-nano-x-mb_defconfig +++ b/configs/ev-imx280-nano-x-mb_defconfig @@ -9,6 +9,7 @@ CONFIG_EV_IMX280_NANO_X_MB=y CONFIG_IMX_MODULE_FUSE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig index 2371cc2742c..df328d96f07 100644 --- a/configs/evb-ast2500_defconfig +++ b/configs/evb-ast2500_defconfig @@ -18,6 +18,7 @@ CONFIG_PRE_CONSOLE_BUFFER=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index f84b723bbba..6e5c1bd2c58 100644 --- a/configs/evb-ast2600_defconfig +++ b/configs/evb-ast2600_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_DM_RESET=y CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/ga10h_v1_1_defconfig b/configs/ga10h_v1_1_defconfig index 599eeb96b4f..440a263c191 100644 --- a/configs/ga10h_v1_1_defconfig +++ b/configs/ga10h_v1_1_defconfig @@ -17,6 +17,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 CONFIG_USB_EHCI_HCD=y diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig index 58c8bb9040b..104532bd05f 100644 --- a/configs/galileo_defconfig +++ b/configs/galileo_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig index dd61b834a92..b4e60290b18 100644 --- a/configs/gardena-smart-gateway-at91sam_defconfig +++ b/configs/gardena-smart-gateway-at91sam_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_LICENSE=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMINFO=y diff --git a/configs/gardena-smart-gateway-mt7688_defconfig b/configs/gardena-smart-gateway-mt7688_defconfig index 2e8a0425b96..f29a75f2a6d 100644 --- a/configs/gardena-smart-gateway-mt7688_defconfig +++ b/configs/gardena-smart-gateway-mt7688_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_LICENSE=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/ge_b1x5v2_defconfig b/configs/ge_b1x5v2_defconfig index 0096acae5ce..fd1f3e37de3 100644 --- a/configs/ge_b1x5v2_defconfig +++ b/configs/ge_b1x5v2_defconfig @@ -44,6 +44,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index 6d5496cde78..c9e4ee8f93d 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -24,6 +24,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set diff --git a/configs/giedi_defconfig b/configs/giedi_defconfig index 0017a3505f2..07249f3b346 100644 --- a/configs/giedi_defconfig +++ b/configs/giedi_defconfig @@ -43,6 +43,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2073 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_CMD_EXPORTENV is not set diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig index 27b73740b25..bd74ab4444b 100644 --- a/configs/goflexhome_defconfig +++ b/configs/goflexhome_defconfig @@ -22,6 +22,7 @@ CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="GoFlexHome> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1053 # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y CONFIG_CMD_SATA=y diff --git a/configs/gose_defconfig b/configs/gose_defconfig index a81dacdcaba..8917bb84866 100644 --- a/configs/gose_defconfig +++ b/configs/gose_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=256 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/grpeach_defconfig b/configs/grpeach_defconfig index fb5b90f32b4..56b9bbae9cc 100644 --- a/configs/grpeach_defconfig +++ b/configs/grpeach_defconfig @@ -19,6 +19,7 @@ CONFIG_BOOTARGS="ignore_loglevel" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=256 # CONFIG_CMD_ELF is not set CONFIG_CMD_GPIO=y CONFIG_CMD_USB=y diff --git a/configs/gt90h_v4_defconfig b/configs/gt90h_v4_defconfig index 1a5fe06bbe1..929d93c8899 100644 --- a/configs/gt90h_v4_defconfig +++ b/configs/gt90h_v4_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 CONFIG_USB_MUSB_HOST=y diff --git a/configs/gurnard_defconfig b/configs/gurnard_defconfig index e353b64e517..636e5ebea8b 100644 --- a/configs/gurnard_defconfig +++ b/configs/gurnard_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index 0bb8997001d..f0e720463b6 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -51,6 +51,7 @@ CONFIG_SPL_POWER=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Ventana > " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=539 CONFIG_CMD_BOOTZ=y CONFIG_CMD_SPL_WRITE_SIZE=0x20000 CONFIG_CMD_UNZIP=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index 4a0c0620bcd..53d5bddd619 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -51,6 +51,7 @@ CONFIG_SPL_POWER=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Ventana > " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=539 CONFIG_CMD_BOOTZ=y CONFIG_CMD_SPL_WRITE_SIZE=0x20000 CONFIG_CMD_UNZIP=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index 16e94bc28ad..e0225278582 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -52,6 +52,7 @@ CONFIG_SPL_POWER=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Ventana > " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=539 CONFIG_CMD_BOOTZ=y CONFIG_CMD_SPL_NAND_OFS=0x1100000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 diff --git a/configs/h8_homlet_v2_defconfig b/configs/h8_homlet_v2_defconfig index 29f965200e1..795de6f3ee9 100644 --- a/configs/h8_homlet_v2_defconfig +++ b/configs/h8_homlet_v2_defconfig @@ -11,6 +11,7 @@ CONFIG_USB1_VBUS_PIN="PL6" CONFIG_AXP_GPIO=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y +CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO4_VOLT=3300 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/harmony_defconfig b/configs/harmony_defconfig index 245d9ded90d..4ff4e8a86bb 100644 --- a/configs/harmony_defconfig +++ b/configs/harmony_defconfig @@ -14,6 +14,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra20 (Harmony) # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2085 # CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/hihope_rzg2_defconfig b/configs/hihope_rzg2_defconfig index 48869f18f24..4470cc7fb33 100644 --- a/configs/hihope_rzg2_defconfig +++ b/configs/hihope_rzg2_defconfig @@ -22,6 +22,7 @@ CONFIG_DEFAULT_FDT_FILE="r8a774a1-hihope-rzg2m.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2068 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/hikey960_defconfig b/configs/hikey960_defconfig index 627daa1fb83..f4b28b9a304 100644 --- a/configs/hikey960_defconfig +++ b/configs/hikey960_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTARGS="console=ttyAMA6,115200n8 root=/dev/mmcblk0p2 rw" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="U-Boot => " +CONFIG_SYS_PBSIZE=283 CONFIG_CMD_MD5SUM=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_GPT=y diff --git a/configs/hikey_defconfig b/configs/hikey_defconfig index 379dd841818..a7690458b29 100644 --- a/configs/hikey_defconfig +++ b/configs/hikey_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/mmcblk0p9 rw" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/hsdk_4xd_defconfig b/configs/hsdk_4xd_defconfig index b043982e360..8a455175fd2 100644 --- a/configs/hsdk_4xd_defconfig +++ b/configs/hsdk_4xd_defconfig @@ -19,6 +19,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_BOARD_LATE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="hsdk-4xd# " +CONFIG_SYS_PBSIZE=2075 CONFIG_CMD_ENV_FLAGS=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y diff --git a/configs/hsdk_defconfig b/configs/hsdk_defconfig index ce8f72d6934..9303a26b434 100644 --- a/configs/hsdk_defconfig +++ b/configs/hsdk_defconfig @@ -18,6 +18,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_BOARD_LATE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="hsdk# " +CONFIG_SYS_PBSIZE=2071 CONFIG_CMD_ENV_FLAGS=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y diff --git a/configs/huawei_hg556a_ram_defconfig b/configs/huawei_hg556a_ram_defconfig index 32e6abc2d21..5de0fe99017 100644 --- a/configs/huawei_hg556a_ram_defconfig +++ b/configs/huawei_hg556a_ram_defconfig @@ -20,6 +20,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="HG556a # " CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_PBSIZE=538 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/i12-tvbox_defconfig b/configs/i12-tvbox_defconfig index 257dd89af45..a336dd47f05 100644 --- a/configs/i12-tvbox_defconfig +++ b/configs/i12-tvbox_defconfig @@ -8,6 +8,7 @@ CONFIG_MACPWR="PH21" CONFIG_VIDEO_COMPOSITE=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/iNet_3F_defconfig b/configs/iNet_3F_defconfig index 436e3a8c209..88d48610b25 100644 --- a/configs/iNet_3F_defconfig +++ b/configs/iNet_3F_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/iNet_3W_defconfig b/configs/iNet_3W_defconfig index 6978f8b0aab..91b7807e2ae 100644 --- a/configs/iNet_3W_defconfig +++ b/configs/iNet_3W_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/iNet_86VS_defconfig b/configs/iNet_86VS_defconfig index 2c8ecb51de0..f4943012e21 100644 --- a/configs/iNet_86VS_defconfig +++ b/configs/iNet_86VS_defconfig @@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/iNet_D978_rev2_defconfig b/configs/iNet_D978_rev2_defconfig index 9a90252dbd7..339e9f6d12d 100644 --- a/configs/iNet_D978_rev2_defconfig +++ b/configs/iNet_D978_rev2_defconfig @@ -17,6 +17,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 # CONFIG_REQUIRE_SERIAL_CONSOLE is not set CONFIG_CONS_INDEX=5 diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig index a2994b3510c..5e3e26d1a7d 100644 --- a/configs/ib62x0_defconfig +++ b/configs/ib62x0_defconfig @@ -21,6 +21,7 @@ CONFIG_USE_PREBOOT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ib62x0 => " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1051 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y diff --git a/configs/icnova-a20-swac_defconfig b/configs/icnova-a20-swac_defconfig index de766b226bb..44080b99865 100644 --- a/configs/icnova-a20-swac_defconfig +++ b/configs/icnova-a20-swac_defconfig @@ -20,6 +20,7 @@ CONFIG_VIDEO_LCD_POWER="PH22" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_UNZIP=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig index 57d647f5d3e..879f3d30d01 100644 --- a/configs/iconnect_defconfig +++ b/configs/iconnect_defconfig @@ -23,6 +23,7 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="iConnect> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1051 # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y CONFIG_CMD_PCI=y diff --git a/configs/imgtec_xilfpga_defconfig b/configs/imgtec_xilfpga_defconfig index cc79f99330a..0fb04e9bf22 100644 --- a/configs/imgtec_xilfpga_defconfig +++ b/configs/imgtec_xilfpga_defconfig @@ -17,6 +17,7 @@ CONFIG_HUSH_PARSER=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="MIPSfpga # " +CONFIG_SYS_PBSIZE=1052 # CONFIG_CMD_SAVEENV is not set CONFIG_CMD_MEMINFO=y CONFIG_CMD_DHCP=y diff --git a/configs/imx6dl_icore_nand_defconfig b/configs/imx6dl_icore_nand_defconfig index 577041794ac..c98a5cc735a 100644 --- a/configs/imx6dl_icore_nand_defconfig +++ b/configs/imx6dl_icore_nand_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=541 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index 23b6bf85b5e..6f249dbe2fc 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_SPL=y CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y diff --git a/configs/imx6q_icore_nand_defconfig b/configs/imx6q_icore_nand_defconfig index a14ecf629ba..278bc98cbc1 100644 --- a/configs/imx6q_icore_nand_defconfig +++ b/configs/imx6q_icore_nand_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=541 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index ae454af7996..e804f75247c 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="i.MX6 Logic # " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=543 CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x1500000 CONFIG_CMD_SPL_WRITE_SIZE=0x00100000 diff --git a/configs/imx6qdl_icore_mipi_defconfig b/configs/imx6qdl_icore_mipi_defconfig index 6a4bed2fd26..a2f1abe1aa6 100644 --- a/configs/imx6qdl_icore_mipi_defconfig +++ b/configs/imx6qdl_icore_mipi_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl-mipi> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=546 CONFIG_CMD_SPL=y CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index e1815562483..91b32e4a035 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -43,6 +43,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=541 CONFIG_CMD_SPL=y CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index a14ecf629ba..278bc98cbc1 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=541 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig index ed7f3f3bdc5..cfd35608cfc 100644 --- a/configs/imx6qdl_icore_rqs_defconfig +++ b/configs/imx6qdl_icore_rqs_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl-rqs> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=545 CONFIG_CMD_SPL=y CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig index a113ddaa595..a84547feddd 100644 --- a/configs/imx6ul_geam_mmc_defconfig +++ b/configs/imx6ul_geam_mmc_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="geam6ul> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=538 CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig index e6dd918c052..8bd4360efd2 100644 --- a/configs/imx6ul_geam_nand_defconfig +++ b/configs/imx6ul_geam_nand_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="geam6ul> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=538 CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig index b7647aa721d..9262055f1da 100644 --- a/configs/imx6ul_isiot_emmc_defconfig +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="isiotmx6ul> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=541 CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig index 22387f3820d..d1da6da311c 100644 --- a/configs/imx6ul_isiot_nand_defconfig +++ b/configs/imx6ul_isiot_nand_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="isiotmx6ul> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=541 CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/imx7_cm_defconfig b/configs/imx7_cm_defconfig index 80fe0e7178e..e6b14661579 100644 --- a/configs/imx7_cm_defconfig +++ b/configs/imx7_cm_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_IMI is not set diff --git a/configs/imx8mm-cl-iot-gate-optee_defconfig b/configs/imx8mm-cl-iot-gate-optee_defconfig index 519d94de85f..ba70c161b08 100644 --- a/configs/imx8mm-cl-iot-gate-optee_defconfig +++ b/configs/imx8mm-cl-iot-gate-optee_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2074 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_EEPROM=y diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig index adc653d4aaf..3697bb7479d 100644 --- a/configs/imx8mm-cl-iot-gate_defconfig +++ b/configs/imx8mm-cl-iot-gate_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2074 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_EEPROM=y diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig index 9d4deccfc78..3296e77bc4a 100644 --- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig +++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig @@ -29,6 +29,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_POWER=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2074 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig index e9c611cf121..39ab52903f8 100644 --- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig +++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig @@ -29,6 +29,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_POWER=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2074 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/imx8mm-mx8menlo_defconfig b/configs/imx8mm-mx8menlo_defconfig index 60b473e2706..8991afffef9 100644 --- a/configs/imx8mm-mx8menlo_defconfig +++ b/configs/imx8mm-mx8menlo_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="Verdin iMX8MM # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2081 # CONFIG_BOOTM_NETBSD is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_EXPORTENV is not set diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig index 7e3b95ead99..3ce4f823238 100644 --- a/configs/imx8mm_beacon_defconfig +++ b/configs/imx8mm_beacon_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2074 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/imx8mm_data_modul_edm_sbc_defconfig b/configs/imx8mm_data_modul_edm_sbc_defconfig index 6484ce15ec7..4dced5a60c9 100644 --- a/configs/imx8mm_data_modul_edm_sbc_defconfig +++ b/configs/imx8mm_data_modul_edm_sbc_defconfig @@ -55,6 +55,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2074 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index 08f62b99189..51e1a65451c 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2074 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig index cdb6ef37bef..2cef22b9acd 100644 --- a/configs/imx8mm_venice_defconfig +++ b/configs/imx8mm_venice_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2074 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CRC32_VERIFY=y diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig index 593b8035013..0900164648b 100644 --- a/configs/imx8mn_beacon_2g_defconfig +++ b/configs/imx8mn_beacon_2g_defconfig @@ -41,6 +41,7 @@ CONFIG_SPL_POWER=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2074 # CONFIG_BOOTM_NETBSD is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig index 9b7da660d4c..a3e46bfe6ea 100644 --- a/configs/imx8mn_beacon_defconfig +++ b/configs/imx8mn_beacon_defconfig @@ -41,6 +41,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2074 # CONFIG_BOOTM_NETBSD is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/imx8mn_bsh_smm_s2_defconfig b/configs/imx8mn_bsh_smm_s2_defconfig index a1f461618f3..a5839d73498 100644 --- a/configs/imx8mn_bsh_smm_s2_defconfig +++ b/configs/imx8mn_bsh_smm_s2_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2067 CONFIG_CMD_FUSE=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y diff --git a/configs/imx8mn_bsh_smm_s2pro_defconfig b/configs/imx8mn_bsh_smm_s2pro_defconfig index a3652eb7416..b7470ec16aa 100644 --- a/configs/imx8mn_bsh_smm_s2pro_defconfig +++ b/configs/imx8mn_bsh_smm_s2pro_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2067 CONFIG_CMD_FUSE=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig index 9aa2757ba28..ce5aa8de88b 100644 --- a/configs/imx8mn_ddr4_evk_defconfig +++ b/configs/imx8mn_ddr4_evk_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2074 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CMD_ERASEENV=y diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig index d9b43f1798f..bbe476a2e89 100644 --- a/configs/imx8mn_evk_defconfig +++ b/configs/imx8mn_evk_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2074 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CMD_ERASEENV=y diff --git a/configs/imx8mn_var_som_defconfig b/configs/imx8mn_var_som_defconfig index d4930b10707..b46f19297ed 100644 --- a/configs/imx8mn_var_som_defconfig +++ b/configs/imx8mn_var_som_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2067 CONFIG_CMD_FUSE=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig index 35549aaaf8a..4b8dde82d5c 100644 --- a/configs/imx8mn_venice_defconfig +++ b/configs/imx8mn_venice_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2074 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CRC32_VERIFY=y diff --git a/configs/imx8mp_dhcom_pdk2_defconfig b/configs/imx8mp_dhcom_pdk2_defconfig index 51181470a4b..fd0d19bad36 100644 --- a/configs/imx8mp_dhcom_pdk2_defconfig +++ b/configs/imx8mp_dhcom_pdk2_defconfig @@ -55,6 +55,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2081 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index 90a6f39e8b5..39216509d85 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2074 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/imx8mp_rsb3720a1_4G_defconfig b/configs/imx8mp_rsb3720a1_4G_defconfig index 5a47b9239d8..c5d32fc7d17 100644 --- a/configs/imx8mp_rsb3720a1_4G_defconfig +++ b/configs/imx8mp_rsb3720a1_4G_defconfig @@ -44,6 +44,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2074 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/imx8mp_rsb3720a1_6G_defconfig b/configs/imx8mp_rsb3720a1_6G_defconfig index 934e14cf30f..1d898480e28 100644 --- a/configs/imx8mp_rsb3720a1_6G_defconfig +++ b/configs/imx8mp_rsb3720a1_6G_defconfig @@ -44,6 +44,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2074 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/imx8mp_venice_defconfig b/configs/imx8mp_venice_defconfig index 6d1f48d098e..e1a4e1a2f36 100644 --- a/configs/imx8mp_venice_defconfig +++ b/configs/imx8mp_venice_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2074 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CRC32_VERIFY=y diff --git a/configs/imx8mq_cm_defconfig b/configs/imx8mq_cm_defconfig index 4155a471b5a..4c8eecaad9a 100644 --- a/configs/imx8mq_cm_defconfig +++ b/configs/imx8mq_cm_defconfig @@ -33,6 +33,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index 05d81f958e5..3ab7977e413 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1050 # CONFIG_BOOTM_NETBSD is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig index 2e42872f843..cdd69cffa7d 100644 --- a/configs/imx8qm_mek_defconfig +++ b/configs/imx8qm_mek_defconfig @@ -35,6 +35,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_CMD_EXPORTENV is not set diff --git a/configs/imx8qm_rom7720_a1_4G_defconfig b/configs/imx8qm_rom7720_a1_4G_defconfig index d9997cfa828..338cce1f261 100644 --- a/configs/imx8qm_rom7720_a1_4G_defconfig +++ b/configs/imx8qm_rom7720_a1_4G_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index 23f9e3a35a1..a8376b93ae4 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -35,6 +35,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 CONFIG_SPL_POWER_DOMAIN=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2068 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_CMD_EXPORTENV is not set diff --git a/configs/imx8ulp_evk_defconfig b/configs/imx8ulp_evk_defconfig index 094622a8b24..917e2cded4e 100644 --- a/configs/imx8ulp_evk_defconfig +++ b/configs/imx8ulp_evk_defconfig @@ -33,6 +33,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2068 CONFIG_CMD_MEMTEST=y CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y diff --git a/configs/imxrt1020-evk_defconfig b/configs/imxrt1020-evk_defconfig index 3c490bf6b23..58a546463e7 100644 --- a/configs/imxrt1020-evk_defconfig +++ b/configs/imxrt1020-evk_defconfig @@ -27,6 +27,7 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x100 # CONFIG_SPL_CRC32 is not set +CONFIG_SYS_PBSIZE=276 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set diff --git a/configs/imxrt1050-evk_defconfig b/configs/imxrt1050-evk_defconfig index 7193e937552..bdd14a38fed 100644 --- a/configs/imxrt1050-evk_defconfig +++ b/configs/imxrt1050-evk_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x100 # CONFIG_SPL_CRC32 is not set +CONFIG_SYS_PBSIZE=276 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set diff --git a/configs/inet1_defconfig b/configs/inet1_defconfig index f81120b1197..13fd425d5e2 100644 --- a/configs/inet1_defconfig +++ b/configs/inet1_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/inet86dz_defconfig b/configs/inet86dz_defconfig index 3ade9fea824..2b824983ac7 100644 --- a/configs/inet86dz_defconfig +++ b/configs/inet86dz_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 CONFIG_USB_MUSB_HOST=y diff --git a/configs/inet97fv2_defconfig b/configs/inet97fv2_defconfig index d5d2dc32c93..4b9946f92db 100644 --- a/configs/inet97fv2_defconfig +++ b/configs/inet97fv2_defconfig @@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/inet98v_rev2_defconfig b/configs/inet98v_rev2_defconfig index bd6c45bd661..f068de4b57f 100644 --- a/configs/inet98v_rev2_defconfig +++ b/configs/inet98v_rev2_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/inet9f_rev03_defconfig b/configs/inet9f_rev03_defconfig index 4485f930236..08efec27097 100644 --- a/configs/inet9f_rev03_defconfig +++ b/configs/inet9f_rev03_defconfig @@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/inet_q972_defconfig b/configs/inet_q972_defconfig index 1769256b7d1..73700b12297 100644 --- a/configs/inet_q972_defconfig +++ b/configs/inet_q972_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_BL_EN="PA25" CONFIG_VIDEO_LCD_BL_PWM="PH13" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig index bef1912d5bb..a24a53caa7b 100644 --- a/configs/inetspace_v2_defconfig +++ b/configs/inetspace_v2_defconfig @@ -28,6 +28,7 @@ CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1046 CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4 CONFIG_CMD_I2C=y diff --git a/configs/integratorap_cm720t_defconfig b/configs/integratorap_cm720t_defconfig index c33ef94d2c9..7f5e470906f 100644 --- a/configs/integratorap_cm720t_defconfig +++ b/configs/integratorap_cm720t_defconfig @@ -17,6 +17,7 @@ CONFIG_HUSH_PARSER=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="Integrator-AP # " +CONFIG_SYS_PBSIZE=289 CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/integratorap_cm920t_defconfig b/configs/integratorap_cm920t_defconfig index a3e6b8d8e8e..c7c15e68853 100644 --- a/configs/integratorap_cm920t_defconfig +++ b/configs/integratorap_cm920t_defconfig @@ -17,6 +17,7 @@ CONFIG_HUSH_PARSER=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="Integrator-AP # " +CONFIG_SYS_PBSIZE=289 CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/integratorap_cm926ejs_defconfig b/configs/integratorap_cm926ejs_defconfig index af0d73b4f87..e2b69d2cac2 100644 --- a/configs/integratorap_cm926ejs_defconfig +++ b/configs/integratorap_cm926ejs_defconfig @@ -17,6 +17,7 @@ CONFIG_HUSH_PARSER=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="Integrator-AP # " +CONFIG_SYS_PBSIZE=289 CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/integratorap_cm946es_defconfig b/configs/integratorap_cm946es_defconfig index 52846913b69..5b224c73f9c 100644 --- a/configs/integratorap_cm946es_defconfig +++ b/configs/integratorap_cm946es_defconfig @@ -17,6 +17,7 @@ CONFIG_HUSH_PARSER=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="Integrator-AP # " +CONFIG_SYS_PBSIZE=289 CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/integratorcp_cm1136_defconfig b/configs/integratorcp_cm1136_defconfig index 8bafa694db4..8e41e240aac 100644 --- a/configs/integratorcp_cm1136_defconfig +++ b/configs/integratorcp_cm1136_defconfig @@ -21,6 +21,7 @@ CONFIG_HUSH_PARSER=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="Integrator-CP # " +CONFIG_SYS_PBSIZE=289 CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/integratorcp_cm920t_defconfig b/configs/integratorcp_cm920t_defconfig index 59bee63e613..fbb43f4a179 100644 --- a/configs/integratorcp_cm920t_defconfig +++ b/configs/integratorcp_cm920t_defconfig @@ -21,6 +21,7 @@ CONFIG_HUSH_PARSER=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="Integrator-CP # " +CONFIG_SYS_PBSIZE=289 CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/integratorcp_cm926ejs_defconfig b/configs/integratorcp_cm926ejs_defconfig index e4c91956651..d744dd1de0e 100644 --- a/configs/integratorcp_cm926ejs_defconfig +++ b/configs/integratorcp_cm926ejs_defconfig @@ -21,6 +21,7 @@ CONFIG_HUSH_PARSER=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="Integrator-CP # " +CONFIG_SYS_PBSIZE=289 CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/integratorcp_cm946es_defconfig b/configs/integratorcp_cm946es_defconfig index d228c8ad554..14f0bb7cc82 100644 --- a/configs/integratorcp_cm946es_defconfig +++ b/configs/integratorcp_cm946es_defconfig @@ -21,6 +21,7 @@ CONFIG_HUSH_PARSER=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="Integrator-CP # " +CONFIG_SYS_PBSIZE=289 CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/iot2050_defconfig b/configs/iot2050_defconfig index 089b98c7046..01ef500d82b 100644 --- a/configs/iot2050_defconfig +++ b/configs/iot2050_defconfig @@ -46,6 +46,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_SYS_PROMPT="IOT2050> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y CONFIG_CMD_GPT=y diff --git a/configs/iot_devkit_defconfig b/configs/iot_devkit_defconfig index b22050daa37..d415cc35aa4 100644 --- a/configs/iot_devkit_defconfig +++ b/configs/iot_devkit_defconfig @@ -14,6 +14,7 @@ CONFIG_SYS_LOAD_ADDR=0x30000000 CONFIG_LOCALVERSION="-iotdk-1.0" # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_SYS_PROMPT="IoTDK# " +CONFIG_SYS_PBSIZE=280 # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_BOOTM is not set # CONFIG_CMD_ELF is not set diff --git a/configs/jesurun_q5_defconfig b/configs/jesurun_q5_defconfig index 0ff666b2ee5..d5b0da01edf 100644 --- a/configs/jesurun_q5_defconfig +++ b/configs/jesurun_q5_defconfig @@ -9,6 +9,7 @@ CONFIG_USB0_VBUS_PIN="PB9" CONFIG_VIDEO_COMPOSITE=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig index b06b48b2c70..3867076d98e 100644 --- a/configs/jetson-tk1_defconfig +++ b/configs/jetson-tk1_defconfig @@ -16,6 +16,7 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra124 (Jetson TK1) # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2089 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/khadas-edge-captain-rk3399_defconfig b/configs/khadas-edge-captain-rk3399_defconfig index cddf5228b60..44ec22f2a37 100644 --- a/configs/khadas-edge-captain-rk3399_defconfig +++ b/configs/khadas-edge-captain-rk3399_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y CONFIG_SYS_PROMPT="kedge# " +CONFIG_SYS_PBSIZE=1048 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/khadas-edge-rk3399_defconfig b/configs/khadas-edge-rk3399_defconfig index bd52c015fa4..a2f27407aa7 100644 --- a/configs/khadas-edge-rk3399_defconfig +++ b/configs/khadas-edge-rk3399_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y CONFIG_SYS_PROMPT="kedge# " +CONFIG_SYS_PBSIZE=1048 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/khadas-edge-v-rk3399_defconfig b/configs/khadas-edge-v-rk3399_defconfig index 21bf9487a86..949fb333bc0 100644 --- a/configs/khadas-edge-v-rk3399_defconfig +++ b/configs/khadas-edge-v-rk3399_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y CONFIG_SYS_PROMPT="kedge# " +CONFIG_SYS_PBSIZE=1048 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig index ddfa8ba99bd..2beaf28490a 100644 --- a/configs/km_kirkwood_128m16_defconfig +++ b/configs/km_kirkwood_128m16_defconfig @@ -23,6 +23,7 @@ CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig index 434d1b26018..bb96558ee55 100644 --- a/configs/km_kirkwood_defconfig +++ b/configs/km_kirkwood_defconfig @@ -23,6 +23,7 @@ CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig index a886dfe6a80..fb8c1db04cb 100644 --- a/configs/km_kirkwood_pci_defconfig +++ b/configs/km_kirkwood_pci_defconfig @@ -24,6 +24,7 @@ CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig index 06392326942..a6b501528ae 100644 --- a/configs/kmcent2_defconfig +++ b/configs/kmcent2_defconfig @@ -24,6 +24,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_DM=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig index c1920d96f3d..c8bb0585bf5 100644 --- a/configs/kmcoge5ne_defconfig +++ b/configs/kmcoge5ne_defconfig @@ -169,6 +169,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig index 80e829ca3c6..f814e6bc01a 100644 --- a/configs/kmcoge5un_defconfig +++ b/configs/kmcoge5un_defconfig @@ -26,6 +26,7 @@ CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig index 9fc8f0ae999..58813b7f55a 100644 --- a/configs/kmeter1_defconfig +++ b/configs/kmeter1_defconfig @@ -139,6 +139,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig index ede5f9bfa45..7f08ddc7dc3 100644 --- a/configs/kmnusa_defconfig +++ b/configs/kmnusa_defconfig @@ -27,6 +27,7 @@ CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig index 24f2435806e..6061fcfd176 100644 --- a/configs/kmopti2_defconfig +++ b/configs/kmopti2_defconfig @@ -152,6 +152,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig index a76291d1094..11a6039f681 100644 --- a/configs/kmsupx5_defconfig +++ b/configs/kmsupx5_defconfig @@ -132,6 +132,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kmsuse2_defconfig b/configs/kmsuse2_defconfig index fac49711ac9..e2e469e3f55 100644 --- a/configs/kmsuse2_defconfig +++ b/configs/kmsuse2_defconfig @@ -28,6 +28,7 @@ CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set diff --git a/configs/kmtegr1_defconfig b/configs/kmtegr1_defconfig index 5a7f0a9ebf2..1f0a4422392 100644 --- a/configs/kmtegr1_defconfig +++ b/configs/kmtegr1_defconfig @@ -131,6 +131,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig index 639adf95de1..a8c6daefc9f 100644 --- a/configs/kmtepr2_defconfig +++ b/configs/kmtepr2_defconfig @@ -152,6 +152,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig index c3a88f69267..43fe94230cd 100644 --- a/configs/koelsch_defconfig +++ b/configs/koelsch_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=256 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/kontron-sl-mx6ul_defconfig b/configs/kontron-sl-mx6ul_defconfig index 2712d4b177e..1ba4d1fca84 100644 --- a/configs/kontron-sl-mx6ul_defconfig +++ b/configs/kontron-sl-mx6ul_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig index 2e9d52522b2..7a3a8d5caff 100644 --- a/configs/kontron-sl-mx8mm_defconfig +++ b/configs/kontron-sl-mx8mm_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SPL_ATF=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_LZMADEC is not set CONFIG_CMD_CLK=y diff --git a/configs/kontron_pitx_imx8m_defconfig b/configs/kontron_pitx_imx8m_defconfig index 07a07bd53f9..cfc76354375 100644 --- a/configs/kontron_pitx_imx8m_defconfig +++ b/configs/kontron_pitx_imx8m_defconfig @@ -35,6 +35,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_PBSIZE=276 # CONFIG_BOOTM_NETBSD is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/kontron_sl28_defconfig b/configs/kontron_sl28_defconfig index dc8c28f8cca..2a39ec1921e 100644 --- a/configs/kontron_sl28_defconfig +++ b/configs/kontron_sl28_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x230000 +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/kp_imx53_defconfig b/configs/kp_imx53_defconfig index 3ec33477208..6f60aa96f12 100644 --- a/configs/kp_imx53_defconfig +++ b/configs/kp_imx53_defconfig @@ -22,6 +22,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig index bdc39542f2e..012a5c492ed 100644 --- a/configs/kp_imx6q_tpc_defconfig +++ b/configs/kp_imx6q_tpc_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_RAW_IMAGE_SUPPORT=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_ELF is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/kzm9g_defconfig b/configs/kzm9g_defconfig index 45881b5dd1c..4477966542a 100644 --- a/configs/kzm9g_defconfig +++ b/configs/kzm9g_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTARGS="root=/dev/null console=ttySC4,115200" # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="KZM-A9-GT# " +CONFIG_SYS_PBSIZE=256 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y diff --git a/configs/lager_defconfig b/configs/lager_defconfig index 503c7e05dfb..98e6d9201d2 100644 --- a/configs/lager_defconfig +++ b/configs/lager_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=256 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/libretech_all_h3_cc_h2_plus_defconfig b/configs/libretech_all_h3_cc_h2_plus_defconfig index 8725fe64cdc..d720dd5c8bd 100644 --- a/configs/libretech_all_h3_cc_h2_plus_defconfig +++ b/configs/libretech_all_h3_cc_h2_plus_defconfig @@ -6,6 +6,7 @@ CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/libretech_all_h3_cc_h3_defconfig b/configs/libretech_all_h3_cc_h3_defconfig index 5275fdc36da..6b9faddb901 100644 --- a/configs/libretech_all_h3_cc_h3_defconfig +++ b/configs/libretech_all_h3_cc_h3_defconfig @@ -6,6 +6,7 @@ CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/libretech_all_h3_cc_h5_defconfig b/configs/libretech_all_h3_cc_h5_defconfig index 96274019499..a20d43f0fed 100644 --- a/configs/libretech_all_h3_cc_h5_defconfig +++ b/configs/libretech_all_h3_cc_h5_defconfig @@ -6,6 +6,7 @@ CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/libretech_all_h3_it_h5_defconfig b/configs/libretech_all_h3_it_h5_defconfig index cb7ffb4d7da..5bc923a68f4 100644 --- a/configs/libretech_all_h3_it_h5_defconfig +++ b/configs/libretech_all_h3_it_h5_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=672 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SPI_FLASH_XMC=y CONFIG_SPI=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/libretech_all_h5_cc_h5_defconfig b/configs/libretech_all_h5_cc_h5_defconfig index c3aa4b10617..987393d168e 100644 --- a/configs/libretech_all_h5_cc_h5_defconfig +++ b/configs/libretech_all_h5_cc_h5_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=672 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SPI_FLASH_XMC=y CONFIG_SUN8I_EMAC=y CONFIG_SPI=y diff --git a/configs/licheepi_nano_defconfig b/configs/licheepi_nano_defconfig index 9fd1dcc9958..8502cf3e8d2 100644 --- a/configs/licheepi_nano_defconfig +++ b/configs/licheepi_nano_defconfig @@ -10,3 +10,5 @@ CONFIG_DRAM_CLK=156 CONFIG_DRAM_ZQ=0 # CONFIG_VIDEO_SUNXI is not set CONFIG_SPL_SPI_SUNXI=y +CONFIG_SYS_PBSIZE=1024 +# CONFIG_SYSRESET is not set diff --git a/configs/linkit-smart-7688_defconfig b/configs/linkit-smart-7688_defconfig index 6746c6cda31..8ffe8a58933 100644 --- a/configs/linkit-smart-7688_defconfig +++ b/configs/linkit-smart-7688_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_LICENSE=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/liteboard_defconfig b/configs/liteboard_defconfig index c78ffab48df..334b22ac8ab 100644 --- a/configs/liteboard_defconfig +++ b/configs/liteboard_defconfig @@ -27,6 +27,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/ls1012a2g5rdb_qspi_defconfig b/configs/ls1012a2g5rdb_qspi_defconfig index f39d860a0cb..5be2d6637e0 100644 --- a/configs/ls1012a2g5rdb_qspi_defconfig +++ b/configs/ls1012a2g5rdb_qspi_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd; run qspi_bootcmd; env exists secureboot # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1012a2g5rdb_tfa_defconfig b/configs/ls1012a2g5rdb_tfa_defconfig index b54a3888d07..4a65705a8eb 100644 --- a/configs/ls1012a2g5rdb_tfa_defconfig +++ b/configs/ls1012a2g5rdb_tfa_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1012afrdm_qspi_defconfig b/configs/ls1012afrdm_qspi_defconfig index 7e623b3d11f..61a1534a51b 100644 --- a/configs/ls1012afrdm_qspi_defconfig +++ b/configs/ls1012afrdm_qspi_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd;run qspi_bootcmd" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1012afrdm_tfa_defconfig b/configs/ls1012afrdm_tfa_defconfig index adc0bf95033..c425a7aae83 100644 --- a/configs/ls1012afrdm_tfa_defconfig +++ b/configs/ls1012afrdm_tfa_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig index 1e9f044f9a2..92a84cee395 100644 --- a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig @@ -25,6 +25,7 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd; run sd_bootcmd; env exists secureboot && # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1012afrwy_qspi_defconfig b/configs/ls1012afrwy_qspi_defconfig index db2feb4d0a2..4d1fa3d9789 100644 --- a/configs/ls1012afrwy_qspi_defconfig +++ b/configs/ls1012afrwy_qspi_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd; run sd_bootcmd; env exists secureboot && # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig index c7aea79ef57..21c989cff9f 100644 --- a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig @@ -25,6 +25,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1012afrwy_tfa_defconfig b/configs/ls1012afrwy_tfa_defconfig index 7d892a33f3c..129855f9840 100644 --- a/configs/ls1012afrwy_tfa_defconfig +++ b/configs/ls1012afrwy_tfa_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig index c31576256aa..9ded76474e5 100644 --- a/configs/ls1012aqds_qspi_defconfig +++ b/configs/ls1012aqds_qspi_defconfig @@ -30,6 +30,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 diff --git a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig index 9261a6dd90e..a77e124b4b7 100644 --- a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig @@ -29,6 +29,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 diff --git a/configs/ls1012aqds_tfa_defconfig b/configs/ls1012aqds_tfa_defconfig index bc7b349cc5b..5f361b6a355 100644 --- a/configs/ls1012aqds_tfa_defconfig +++ b/configs/ls1012aqds_tfa_defconfig @@ -31,6 +31,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig index 2113c1312a5..d27b24efeed 100644 --- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd; run qspi_bootcmd; env exists secureboot # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1012ardb_qspi_defconfig b/configs/ls1012ardb_qspi_defconfig index 963d23534ab..50134ea5745 100644 --- a/configs/ls1012ardb_qspi_defconfig +++ b/configs/ls1012ardb_qspi_defconfig @@ -28,6 +28,7 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd; run qspi_bootcmd; env exists secureboot # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig index 6b092efdc5e..6dc5674dbf1 100644 --- a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1012ardb_tfa_defconfig b/configs/ls1012ardb_tfa_defconfig index 9b974818d6f..4224b48f9d8 100644 --- a/configs/ls1012ardb_tfa_defconfig +++ b/configs/ls1012ardb_tfa_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1021aiot_qspi_defconfig b/configs/ls1021aiot_qspi_defconfig index 0e869a2295e..cb6f146304d 100644 --- a/configs/ls1021aiot_qspi_defconfig +++ b/configs/ls1021aiot_qspi_defconfig @@ -22,6 +22,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig index 030480bdbf8..e7475459128 100644 --- a/configs/ls1021aiot_sdcard_defconfig +++ b/configs/ls1021aiot_sdcard_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig index 70501cb3f09..6a610bfa517 100644 --- a/configs/ls1021aqds_ddr4_nor_defconfig +++ b/configs/ls1021aqds_ddr4_nor_defconfig @@ -32,6 +32,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig index 1948abc74ac..f933edb2bf4 100644 --- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig +++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig @@ -32,6 +32,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index 7bb42051378..70a51934320 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -50,6 +50,7 @@ CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig index 6b6cf1fcdde..2e441686d74 100644 --- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig @@ -31,6 +31,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig index d5b85db931a..6461bbe74d3 100644 --- a/configs/ls1021aqds_nor_defconfig +++ b/configs/ls1021aqds_nor_defconfig @@ -32,6 +32,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig index 6f18270c7ef..002c6c218d6 100644 --- a/configs/ls1021aqds_nor_lpuart_defconfig +++ b/configs/ls1021aqds_nor_lpuart_defconfig @@ -32,6 +32,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig index d677ff72288..a7f5cb0492c 100644 --- a/configs/ls1021aqds_qspi_defconfig +++ b/configs/ls1021aqds_qspi_defconfig @@ -31,6 +31,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index 61809aae70e..eaa9a7781a3 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -48,6 +48,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index 66f930aa61d..605bc23b410 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -47,6 +47,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021atsn_qspi_defconfig b/configs/ls1021atsn_qspi_defconfig index 0b42b195f9a..cbd68899030 100644 --- a/configs/ls1021atsn_qspi_defconfig +++ b/configs/ls1021atsn_qspi_defconfig @@ -24,6 +24,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_GREPENV=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig index e6fdec2974c..82b38a88839 100644 --- a/configs/ls1021atsn_sdcard_defconfig +++ b/configs/ls1021atsn_sdcard_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_GREPENV=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig index 628e1d475e5..1ddd433de2d 100644 --- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig @@ -30,6 +30,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig index c4df3338d7d..429cada84b4 100644 --- a/configs/ls1021atwr_nor_defconfig +++ b/configs/ls1021atwr_nor_defconfig @@ -31,6 +31,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig index aa6b619d34b..802225ba5cb 100644 --- a/configs/ls1021atwr_nor_lpuart_defconfig +++ b/configs/ls1021atwr_nor_lpuart_defconfig @@ -31,6 +31,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig index 1edc123181f..08d0c0074ab 100644 --- a/configs/ls1021atwr_qspi_defconfig +++ b/configs/ls1021atwr_qspi_defconfig @@ -32,6 +32,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index 7824b24fb0d..dada092a29f 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -47,6 +47,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index 8bab45bcffe..813bf7ff08c 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -48,6 +48,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index a0f05d513da..b928b6c3bc9 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -49,6 +49,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig index 7004285f354..7b8f71cfb55 100644 --- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig @@ -30,6 +30,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig index 2f383beacea..8c1655341e5 100644 --- a/configs/ls1028aqds_tfa_defconfig +++ b/configs/ls1028aqds_tfa_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1028aqds_tfa_lpuart_defconfig b/configs/ls1028aqds_tfa_lpuart_defconfig index e884a677eec..7e0860103f0 100644 --- a/configs/ls1028aqds_tfa_lpuart_defconfig +++ b/configs/ls1028aqds_tfa_lpuart_defconfig @@ -31,6 +31,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig index 72625e1acf5..15777f93b60 100644 --- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig @@ -29,6 +29,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M" CONFIG_ID_EEPROM=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig index 080f53a8ffd..ec4f253e9f0 100644 --- a/configs/ls1028ardb_tfa_defconfig +++ b/configs/ls1028ardb_tfa_defconfig @@ -31,6 +31,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M" CONFIG_ID_EEPROM=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index f931a9c4cb3..a3c0abb8497 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -37,6 +37,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig index 2d44d1e834e..c32a5f2605d 100644 --- a/configs/ls1043aqds_lpuart_defconfig +++ b/configs/ls1043aqds_lpuart_defconfig @@ -37,6 +37,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index b42b161613b..04e34133465 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -54,6 +54,7 @@ CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig index ab987667074..609ce43e53d 100644 --- a/configs/ls1043aqds_nor_ddr3_defconfig +++ b/configs/ls1043aqds_nor_ddr3_defconfig @@ -37,6 +37,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig index d0adc19cc3b..d143978d8fc 100644 --- a/configs/ls1043aqds_qspi_defconfig +++ b/configs/ls1043aqds_qspi_defconfig @@ -38,6 +38,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index 4a6d32d55b2..a508885be91 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -54,6 +54,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index 391a0c62493..bed7b45770c 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -54,6 +54,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig index 40fbddd8719..9035594139d 100644 --- a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig @@ -36,6 +36,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1043aqds_tfa_defconfig b/configs/ls1043aqds_tfa_defconfig index 37cdeeb7612..6bf75006867 100644 --- a/configs/ls1043aqds_tfa_defconfig +++ b/configs/ls1043aqds_tfa_defconfig @@ -39,6 +39,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index 4b680d0bca0..adad36f5a83 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -24,6 +24,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig index c06889232ce..3a283ff9445 100644 --- a/configs/ls1043ardb_defconfig +++ b/configs/ls1043ardb_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd; env exists secureboot & CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index 41c53d935ff..29558ea737d 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index ff699158447..cb6344e6624 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -44,6 +44,7 @@ CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index 20671c303a8..b6987a5dfd9 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_SPL=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index 0e48737e0c8..d118e0578fb 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -43,6 +43,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_SPL=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig index aeff6575008..34f6952f43d 100644 --- a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y diff --git a/configs/ls1043ardb_tfa_defconfig b/configs/ls1043ardb_tfa_defconfig index b5a3e55c16f..5d361831959 100644 --- a/configs/ls1043ardb_tfa_defconfig +++ b/configs/ls1043ardb_tfa_defconfig @@ -28,6 +28,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y diff --git a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig index 3b303aafc00..00444420b9d 100644 --- a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig @@ -23,6 +23,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/ls1046afrwy_tfa_defconfig b/configs/ls1046afrwy_tfa_defconfig index 9ca48af1f05..95ecf2adfb4 100644 --- a/configs/ls1046afrwy_tfa_defconfig +++ b/configs/ls1046afrwy_tfa_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig index 3e61619c25f..fe1a601f470 100644 --- a/configs/ls1046aqds_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_SECURE_BOOT_defconfig @@ -35,6 +35,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd; env exists secureboot && esbc_halt;;" CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig index b9bcfe47a2d..c90f4867d85 100644 --- a/configs/ls1046aqds_defconfig +++ b/configs/ls1046aqds_defconfig @@ -37,6 +37,7 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd; env exists secureboot & CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig index 60685c57948..06ad3f383d8 100644 --- a/configs/ls1046aqds_lpuart_defconfig +++ b/configs/ls1046aqds_lpuart_defconfig @@ -37,6 +37,7 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd; env exists secureboot & CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig index 8fdcc67f32c..56fa46945fd 100644 --- a/configs/ls1046aqds_nand_defconfig +++ b/configs/ls1046aqds_nand_defconfig @@ -55,6 +55,7 @@ CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig index 778f82049b5..d397c09ce3d 100644 --- a/configs/ls1046aqds_qspi_defconfig +++ b/configs/ls1046aqds_qspi_defconfig @@ -38,6 +38,7 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd; env exists secureboot & CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index f2bbed2a2eb..d36bedde32f 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -55,6 +55,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index c6f83f885a4..2abc2b1ccdc 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -55,6 +55,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig index 4b04b2a4def..58bc95d91c3 100644 --- a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig @@ -36,6 +36,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1046aqds_tfa_defconfig b/configs/ls1046aqds_tfa_defconfig index 6006d5a83f5..881f1f1b636 100644 --- a/configs/ls1046aqds_tfa_defconfig +++ b/configs/ls1046aqds_tfa_defconfig @@ -39,6 +39,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig index 678c703c789..cfd2208ff73 100644 --- a/configs/ls1046ardb_emmc_defconfig +++ b/configs/ls1046ardb_emmc_defconfig @@ -45,6 +45,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig index a5e2ced67d7..0879f58a86a 100644 --- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig @@ -30,6 +30,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="run distro_bootcmd; run qspi_bootcmd; env exists secureboot && esbc_halt;;" CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig index a7297441954..4e1d7c08915 100644 --- a/configs/ls1046ardb_qspi_defconfig +++ b/configs/ls1046ardb_qspi_defconfig @@ -33,6 +33,7 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd; run qspi_bootcmd; env exists secureboot CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig index b32319d9626..cf7d46e0881 100644 --- a/configs/ls1046ardb_qspi_spl_defconfig +++ b/configs/ls1046ardb_qspi_spl_defconfig @@ -49,6 +49,7 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_OS_BASE=0x40980000 CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_SPL=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig index a3825646bb9..f385d289f22 100644 --- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig index 44b2ebf3e4f..95b79b9572a 100644 --- a/configs/ls1046ardb_sdcard_defconfig +++ b/configs/ls1046ardb_sdcard_defconfig @@ -45,6 +45,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y diff --git a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig index 7351c5c844c..62020ee6c89 100644 --- a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig @@ -27,6 +27,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y diff --git a/configs/ls1046ardb_tfa_defconfig b/configs/ls1046ardb_tfa_defconfig index 0cdbc90d0e7..c0685777eac 100644 --- a/configs/ls1046ardb_tfa_defconfig +++ b/configs/ls1046ardb_tfa_defconfig @@ -30,6 +30,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y diff --git a/configs/ls1088aqds_defconfig b/configs/ls1088aqds_defconfig index c3990d68d9b..8e8caa438b2 100644 --- a/configs/ls1088aqds_defconfig +++ b/configs/ls1088aqds_defconfig @@ -36,6 +36,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig index 2f29658840d..5c3daac4020 100644 --- a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig @@ -35,6 +35,7 @@ CONFIG_BOOTCOMMAND="sf probe 0:0;sf read 0x80001000 0xd00000 0x100000; fsl_mc la CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_RESET_PHY_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1088aqds_qspi_defconfig b/configs/ls1088aqds_qspi_defconfig index e721208662b..75c00989d8e 100644 --- a/configs/ls1088aqds_qspi_defconfig +++ b/configs/ls1088aqds_qspi_defconfig @@ -37,6 +37,7 @@ CONFIG_BOOTCOMMAND="sf probe 0:0;sf read 0x80001000 0xd00000 0x100000; fsl_mc la CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_RESET_PHY_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig index 28bd446ccdf..811a97cf9f9 100644 --- a/configs/ls1088aqds_sdcard_ifc_defconfig +++ b/configs/ls1088aqds_sdcard_ifc_defconfig @@ -46,6 +46,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig index 07ded3fe5e8..09e00445f9e 100644 --- a/configs/ls1088aqds_sdcard_qspi_defconfig +++ b/configs/ls1088aqds_sdcard_qspi_defconfig @@ -46,6 +46,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1088aqds_tfa_defconfig b/configs/ls1088aqds_tfa_defconfig index b3ac59d5155..a135de388ff 100644 --- a/configs/ls1088aqds_tfa_defconfig +++ b/configs/ls1088aqds_tfa_defconfig @@ -39,6 +39,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig index f2eb917fc6e..850c3d9c6ba 100644 --- a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig @@ -36,6 +36,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1088ardb_qspi_defconfig b/configs/ls1088ardb_qspi_defconfig index 45c8717aaf7..7653a2733d5 100644 --- a/configs/ls1088ardb_qspi_defconfig +++ b/configs/ls1088ardb_qspi_defconfig @@ -38,6 +38,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig index 4b95e40d567..3cf4180b977 100644 --- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig @@ -46,6 +46,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig index 44ac8193e57..51db7a64a4a 100644 --- a/configs/ls1088ardb_sdcard_qspi_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_defconfig @@ -47,6 +47,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig index 5331cbc6e5b..7354d4132dc 100644 --- a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig @@ -37,6 +37,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1088ardb_tfa_defconfig b/configs/ls1088ardb_tfa_defconfig index 944d90279bb..bb7e57691e7 100644 --- a/configs/ls1088ardb_tfa_defconfig +++ b/configs/ls1088ardb_tfa_defconfig @@ -39,6 +39,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig index 59a6d4d1dc0..e78b226ccc5 100644 --- a/configs/ls2080aqds_SECURE_BOOT_defconfig +++ b/configs/ls2080aqds_SECURE_BOOT_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load" CONFIG_RESET_PHY_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig index bdea6bb204a..c4ba0d45fae 100644 --- a/configs/ls2080aqds_defconfig +++ b/configs/ls2080aqds_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load" CONFIG_RESET_PHY_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index df5b1d6ffd0..240ce113c1c 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig index daff6f788a3..88ba55124e2 100644 --- a/configs/ls2080aqds_qspi_defconfig +++ b/configs/ls2080aqds_qspi_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load" CONFIG_RESET_PHY_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig index 084b2b9e362..9dae1c74512 100644 --- a/configs/ls2080aqds_sdcard_defconfig +++ b/configs/ls2080aqds_sdcard_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_I2C=y diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig index 429dfd722c1..b799f349a57 100644 --- a/configs/ls2080ardb_SECURE_BOOT_defconfig +++ b/configs/ls2080ardb_SECURE_BOOT_defconfig @@ -31,6 +31,7 @@ CONFIG_BOOTCOMMAND="env exists mcinitcmd && env exists secureboot && esbc_valida CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig index 72a2b3ba9b2..6bb10b817a0 100644 --- a/configs/ls2080ardb_defconfig +++ b/configs/ls2080ardb_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTCOMMAND="env exists mcinitcmd && env exists secureboot && esbc_valida CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index 52f495fdb48..60eeb79d3aa 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig index ca69a46043b..3fa37ddf18d 100644 --- a/configs/ls2081ardb_defconfig +++ b/configs/ls2081ardb_defconfig @@ -33,6 +33,7 @@ CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x806c0000 0x6c0000 0x40000; env exist CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_GPT=y diff --git a/configs/ls2088aqds_tfa_defconfig b/configs/ls2088aqds_tfa_defconfig index 11d7a5177bc..c46e506213c 100644 --- a/configs/ls2088aqds_tfa_defconfig +++ b/configs/ls2088aqds_tfa_defconfig @@ -30,6 +30,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_RESET_PHY_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig index 35d769a3812..39540c74be2 100644 --- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig @@ -30,6 +30,7 @@ CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x806c0000 0x6c0000 0x40000; env exist CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig index cc4a11baaa6..f702a392358 100644 --- a/configs/ls2088ardb_qspi_defconfig +++ b/configs/ls2088ardb_qspi_defconfig @@ -34,6 +34,7 @@ CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x806c0000 0x6c0000 0x40000; env exist CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y diff --git a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig index 3a533689f4b..2f0ece68eb9 100644 --- a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig @@ -34,6 +34,7 @@ CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/ls2088ardb_tfa_defconfig b/configs/ls2088ardb_tfa_defconfig index 5808f3df1e0..37d32752788 100644 --- a/configs/ls2088ardb_tfa_defconfig +++ b/configs/ls2088ardb_tfa_defconfig @@ -36,6 +36,7 @@ CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig index 03a3c84ddaa..abb095d98ac 100644 --- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig @@ -35,6 +35,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig index 3b8dde93624..e8ae5af0ade 100644 --- a/configs/lx2160aqds_tfa_defconfig +++ b/configs/lx2160aqds_tfa_defconfig @@ -38,6 +38,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig index a10ac5eb2c1..d7ebf896fbe 100644 --- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig @@ -35,6 +35,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x2 CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig index cb743649491..d3cfb1fea52 100644 --- a/configs/lx2160ardb_tfa_defconfig +++ b/configs/lx2160ardb_tfa_defconfig @@ -38,6 +38,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x2 CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 diff --git a/configs/lx2160ardb_tfa_stmm_defconfig b/configs/lx2160ardb_tfa_stmm_defconfig index b1d843805ee..5589c48beff 100644 --- a/configs/lx2160ardb_tfa_stmm_defconfig +++ b/configs/lx2160ardb_tfa_stmm_defconfig @@ -38,6 +38,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x2 CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_EEPROM=y diff --git a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig index 597f1f4d6c0..d0f92f8e2c0 100644 --- a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig @@ -36,6 +36,7 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_RESET_PHY_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 diff --git a/configs/lx2162aqds_tfa_defconfig b/configs/lx2162aqds_tfa_defconfig index a507586100c..df437a6bebc 100644 --- a/configs/lx2162aqds_tfa_defconfig +++ b/configs/lx2162aqds_tfa_defconfig @@ -39,6 +39,7 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_RESET_PHY_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 diff --git a/configs/lx2162aqds_tfa_verified_boot_defconfig b/configs/lx2162aqds_tfa_verified_boot_defconfig index e66f9bd2917..c48c8a3ffb9 100644 --- a/configs/lx2162aqds_tfa_verified_boot_defconfig +++ b/configs/lx2162aqds_tfa_verified_boot_defconfig @@ -40,6 +40,7 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_RESET_PHY_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 diff --git a/configs/malta64_defconfig b/configs/malta64_defconfig index 88d3cbea8e9..165ec03d0bc 100644 --- a/configs/malta64_defconfig +++ b/configs/malta64_defconfig @@ -14,6 +14,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="malta # " +CONFIG_SYS_PBSIZE=281 CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y # CONFIG_CMD_LOADB is not set diff --git a/configs/malta64el_defconfig b/configs/malta64el_defconfig index d4f043ebf29..8b49325628f 100644 --- a/configs/malta64el_defconfig +++ b/configs/malta64el_defconfig @@ -16,6 +16,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="maltael # " +CONFIG_SYS_PBSIZE=283 CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y # CONFIG_CMD_LOADB is not set diff --git a/configs/malta_defconfig b/configs/malta_defconfig index 2002425f378..52e83390be3 100644 --- a/configs/malta_defconfig +++ b/configs/malta_defconfig @@ -13,6 +13,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="malta # " +CONFIG_SYS_PBSIZE=281 CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y # CONFIG_CMD_LOADB is not set diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig index 2c6f99e96bf..3ae26d22ee1 100644 --- a/configs/maltael_defconfig +++ b/configs/maltael_defconfig @@ -15,6 +15,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="maltael # " +CONFIG_SYS_PBSIZE=283 CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y # CONFIG_CMD_LOADB is not set diff --git a/configs/marsboard_defconfig b/configs/marsboard_defconfig index 47a32e96067..c7212ebcd3b 100644 --- a/configs/marsboard_defconfig +++ b/configs/marsboard_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig index ded7245644c..e837b391ebc 100644 --- a/configs/mccmon6_nor_defconfig +++ b/configs/mccmon6_nor_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_SYS_OS_BASE=0x8180000 CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NOR_OFS=0x09600000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig index 5020b87ec81..0f17ccdc85d 100644 --- a/configs/mccmon6_sd_defconfig +++ b/configs/mccmon6_sd_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NOR_OFS=0x09600000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 diff --git a/configs/medcom-wide_defconfig b/configs/medcom-wide_defconfig index cd039d2c651..f85dba5e4fb 100644 --- a/configs/medcom-wide_defconfig +++ b/configs/medcom-wide_defconfig @@ -15,6 +15,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra20 (Medcom-Wide) # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2089 # CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/meerkat96_defconfig b/configs/meerkat96_defconfig index 31e436d1f05..4fdcdafac20 100644 --- a/configs/meerkat96_defconfig +++ b/configs/meerkat96_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/meesc_dataflash_defconfig b/configs/meesc_dataflash_defconfig index e636a3199ae..e69aae49f5a 100644 --- a/configs/meesc_dataflash_defconfig +++ b/configs/meesc_dataflash_defconfig @@ -18,6 +18,7 @@ CONFIG_USE_PREBOOT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_LOADS is not set diff --git a/configs/meesc_defconfig b/configs/meesc_defconfig index c549fa232fa..d08acb6fbd7 100644 --- a/configs/meesc_defconfig +++ b/configs/meesc_defconfig @@ -17,6 +17,7 @@ CONFIG_USE_PREBOOT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_LOADS is not set diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index 6823d41e966..31d2c48e590 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_OS_BASE=0x2c060000 CONFIG_SYS_PROMPT="U-Boot-mONStR> " CONFIG_SYS_MAXARGS=15 +CONFIG_SYS_PBSIZE=544 CONFIG_CMD_IMLS=y CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y diff --git a/configs/microchip_mpfs_icicle_defconfig b/configs/microchip_mpfs_icicle_defconfig index 6cae07a1d1a..1a524a92348 100644 --- a/configs/microchip_mpfs_icicle_defconfig +++ b/configs/microchip_mpfs_icicle_defconfig @@ -12,6 +12,7 @@ CONFIG_FIT=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_SYS_PROMPT="RISC-V # " +CONFIG_SYS_PBSIZE=282 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_DM_MTD=y diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig index c051e00a6ab..87eb82a79af 100644 --- a/configs/minnowmax_defconfig +++ b/configs/minnowmax_defconfig @@ -32,6 +32,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/mixtile_loftq_defconfig b/configs/mixtile_loftq_defconfig index 0e4cdc44670..0cd94d7b438 100644 --- a/configs/mixtile_loftq_defconfig +++ b/configs/mixtile_loftq_defconfig @@ -9,6 +9,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB1_VBUS_PIN="PH24" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y diff --git a/configs/mk802_a10s_defconfig b/configs/mk802_a10s_defconfig index 21f7a6e535d..1fa1f0031b0 100644 --- a/configs/mk802_a10s_defconfig +++ b/configs/mk802_a10s_defconfig @@ -8,6 +8,7 @@ CONFIG_DRAM_EMR1=0 CONFIG_USB1_VBUS_PIN="PB10" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/mk802_defconfig b/configs/mk802_defconfig index 416565e5af2..281130a43e2 100644 --- a/configs/mk802_defconfig +++ b/configs/mk802_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_USB2_VBUS_PIN="PH12" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/mk802ii_defconfig b/configs/mk802ii_defconfig index 965a9cd5c4b..8123d900d93 100644 --- a/configs/mk802ii_defconfig +++ b/configs/mk802ii_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN4I=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig index 20bca75adfc..e94835bc35e 100644 --- a/configs/mk808_defconfig +++ b/configs/mk808_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_FS_EXT4=y CONFIG_SYS_MMCSD_FS_BOOT_PARTITION=2 CONFIG_TPL_NEEDS_SEPARATE_STACK=y +CONFIG_SYS_PBSIZE=276 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set diff --git a/configs/mscc_jr2_defconfig b/configs/mscc_jr2_defconfig index 1b77a08a93c..65b5cd86922 100644 --- a/configs/mscc_jr2_defconfig +++ b/configs/mscc_jr2_defconfig @@ -26,6 +26,7 @@ CONFIG_BOARD_TYPES=y CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SYS_PROMPT="jr2 # " +CONFIG_SYS_PBSIZE=279 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_ELF is not set diff --git a/configs/mscc_luton_defconfig b/configs/mscc_luton_defconfig index 502c8ef61c5..99e85ecef00 100644 --- a/configs/mscc_luton_defconfig +++ b/configs/mscc_luton_defconfig @@ -28,6 +28,7 @@ CONFIG_BOARD_TYPES=y CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SYS_PROMPT="luton # " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_ELF is not set diff --git a/configs/mscc_ocelot_defconfig b/configs/mscc_ocelot_defconfig index f3f8eb38473..c9dfaf331f2 100644 --- a/configs/mscc_ocelot_defconfig +++ b/configs/mscc_ocelot_defconfig @@ -25,6 +25,7 @@ CONFIG_BOARD_TYPES=y CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SYS_PROMPT="ocelot # " +CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_ELF is not set diff --git a/configs/mscc_serval_defconfig b/configs/mscc_serval_defconfig index 9bc94ebbb87..f034fd6fbbc 100644 --- a/configs/mscc_serval_defconfig +++ b/configs/mscc_serval_defconfig @@ -23,6 +23,7 @@ CONFIG_BOARD_TYPES=y CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SYS_PROMPT="serval # " +CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_ELF is not set diff --git a/configs/mscc_servalt_defconfig b/configs/mscc_servalt_defconfig index f861b4713d8..018c618f5e4 100644 --- a/configs/mscc_servalt_defconfig +++ b/configs/mscc_servalt_defconfig @@ -22,6 +22,7 @@ CONFIG_BOARD_TYPES=y CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SYS_PROMPT="servalt # " +CONFIG_SYS_PBSIZE=283 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_ELF is not set diff --git a/configs/mt7622_rfb_defconfig b/configs/mt7622_rfb_defconfig index 1f12cfd4316..c2df7172296 100644 --- a/configs/mt7622_rfb_defconfig +++ b/configs/mt7622_rfb_defconfig @@ -15,6 +15,7 @@ CONFIG_LOGLEVEL=7 CONFIG_LOG=y CONFIG_SYS_PROMPT="MT7622> " CONFIG_SYS_MAXARGS=8 +CONFIG_SYS_PBSIZE=1049 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/mt7623a_unielec_u7623_02_defconfig b/configs/mt7623a_unielec_u7623_02_defconfig index f50307462c4..962e452c278 100644 --- a/configs/mt7623a_unielec_u7623_02_defconfig +++ b/configs/mt7623a_unielec_u7623_02_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_MAXARGS=8 +CONFIG_SYS_PBSIZE=1049 CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/mt7623n_bpir2_defconfig b/configs/mt7623n_bpir2_defconfig index e2d68b9c9d1..b65b597f01d 100644 --- a/configs/mt7623n_bpir2_defconfig +++ b/configs/mt7623n_bpir2_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_MAXARGS=8 +CONFIG_SYS_PBSIZE=1049 CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/mt7629_rfb_defconfig b/configs/mt7629_rfb_defconfig index 87e57379d22..80e530836d5 100644 --- a/configs/mt7629_rfb_defconfig +++ b/configs/mt7629_rfb_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_MAXARGS=8 +CONFIG_SYS_PBSIZE=1049 CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/mt8183_pumpkin_defconfig b/configs/mt8183_pumpkin_defconfig index ea7ab5c8096..95486aed976 100644 --- a/configs/mt8183_pumpkin_defconfig +++ b/configs/mt8183_pumpkin_defconfig @@ -23,6 +23,7 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="mt8183-pumpkin" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/mt8512_bm1_emmc_defconfig b/configs/mt8512_bm1_emmc_defconfig index 7e711b1b469..c75b9ff5d21 100644 --- a/configs/mt8512_bm1_emmc_defconfig +++ b/configs/mt8512_bm1_emmc_defconfig @@ -15,6 +15,7 @@ CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_DEFAULT_FDT_FILE="mt8512-bm1-emmc.dtb" CONFIG_SYS_PROMPT="MT8512> " +CONFIG_SYS_PBSIZE=281 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/mt8516_pumpkin_defconfig b/configs/mt8516_pumpkin_defconfig index 52c12609b15..5b10aebe023 100644 --- a/configs/mt8516_pumpkin_defconfig +++ b/configs/mt8516_pumpkin_defconfig @@ -22,6 +22,7 @@ CONFIG_DEFAULT_FDT_FILE="mt8516-pumpkin" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_LATE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/mt8518_ap1_emmc_defconfig b/configs/mt8518_ap1_emmc_defconfig index a994cd3a2da..da029ee1ed4 100644 --- a/configs/mt8518_ap1_emmc_defconfig +++ b/configs/mt8518_ap1_emmc_defconfig @@ -15,6 +15,7 @@ CONFIG_FIT_SIGNATURE=y CONFIG_DEFAULT_FDT_FILE="mt8518-ap1-emmc.dtb" CONFIG_BOARD_LATE_INIT=y CONFIG_SYS_PROMPT="MT8518> " +CONFIG_SYS_PBSIZE=281 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_MMC=y CONFIG_EFI_PARTITION=y diff --git a/configs/mvebu_crb_cn9130_defconfig b/configs/mvebu_crb_cn9130_defconfig index fd0a5d93681..7e4addd1bfc 100644 --- a/configs/mvebu_crb_cn9130_defconfig +++ b/configs/mvebu_crb_cn9130_defconfig @@ -23,6 +23,7 @@ CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="Marvell>> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1051 CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_MTD=y diff --git a/configs/mvebu_db_cn9130_defconfig b/configs/mvebu_db_cn9130_defconfig index f86110838dc..1bcbb5bda63 100644 --- a/configs/mvebu_db_cn9130_defconfig +++ b/configs/mvebu_db_cn9130_defconfig @@ -25,6 +25,7 @@ CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="Marvell>> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1051 CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_MTD=y diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig index e3b6c64c087..1e501275dec 100644 --- a/configs/mx51evk_defconfig +++ b/configs/mx51evk_defconfig @@ -18,6 +18,7 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y CONFIG_CMD_FUSE=y diff --git a/configs/mx53cx9020_defconfig b/configs/mx53cx9020_defconfig index f79595db688..8d5c76f69e4 100644 --- a/configs/mx53cx9020_defconfig +++ b/configs/mx53cx9020_defconfig @@ -13,6 +13,7 @@ CONFIG_SYS_LOAD_ADDR=0x70010000 CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=1 CONFIG_USE_PREBOOT=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/mx53loco_defconfig b/configs/mx53loco_defconfig index 7cf959beec7..bede23dccc0 100644 --- a/configs/mx53loco_defconfig +++ b/configs/mx53loco_defconfig @@ -23,6 +23,7 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y CONFIG_CMD_MMC=y diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index 5f5b17e3351..b5bff664878 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y # CONFIG_CMD_PINMUX is not set diff --git a/configs/mx6memcal_defconfig b/configs/mx6memcal_defconfig index fb1a4878a40..d555dbf7b1b 100644 --- a/configs/mx6memcal_defconfig +++ b/configs/mx6memcal_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=528 # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_BOOTM is not set # CONFIG_CMD_ELF is not set diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig index 31e8d3264a1..551057fcfa2 100644 --- a/configs/mx6qsabrelite_defconfig +++ b/configs/mx6qsabrelite_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y # CONFIG_CMD_FLASH is not set diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig index f5097c94e82..f96bbcd07c3 100644 --- a/configs/mx6sabreauto_defconfig +++ b/configs/mx6sabreauto_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index 9b3d5944c29..33d8db9dff2 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_SPL=y CONFIG_CMD_SPL_WRITE_SIZE=0x20000 diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig index a2fb782e2be..34f9b06deef 100644 --- a/configs/mx6slevk_defconfig +++ b/configs/mx6slevk_defconfig @@ -16,6 +16,7 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig index 15f563f9195..5e54fd3eac4 100644 --- a/configs/mx6slevk_spinor_defconfig +++ b/configs/mx6slevk_spinor_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig index 03f0bb42095..828922c6c39 100644 --- a/configs/mx6slevk_spl_defconfig +++ b/configs/mx6slevk_spl_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/mx6sllevk_defconfig b/configs/mx6sllevk_defconfig index 7571f8c0840..ec6843e5743 100644 --- a/configs/mx6sllevk_defconfig +++ b/configs/mx6sllevk_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/mx6sllevk_plugin_defconfig b/configs/mx6sllevk_plugin_defconfig index 975e2ed053e..bd44298cb29 100644 --- a/configs/mx6sllevk_plugin_defconfig +++ b/configs/mx6sllevk_plugin_defconfig @@ -19,6 +19,7 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig index c0ff4acf674..d32ea1ea3ca 100644 --- a/configs/mx6sxsabreauto_defconfig +++ b/configs/mx6sxsabreauto_defconfig @@ -15,6 +15,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig index 911839d6e0a..c41b2d9264e 100644 --- a/configs/mx6sxsabresd_defconfig +++ b/configs/mx6sxsabresd_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTCOMMAND="run findfdt; mmc dev ${mmcdev}; if mmc rescan; then if run l CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig index b12a8b0e46c..51dfe8ce03a 100644 --- a/configs/mx6ul_14x14_evk_defconfig +++ b/configs/mx6ul_14x14_evk_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig index b97e34f3a94..d2ef51e0042 100644 --- a/configs/mx6ul_9x9_evk_defconfig +++ b/configs/mx6ul_9x9_evk_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/mx6ull_14x14_evk_defconfig b/configs/mx6ull_14x14_evk_defconfig index da912a71cda..c48fd4adae0 100644 --- a/configs/mx6ull_14x14_evk_defconfig +++ b/configs/mx6ull_14x14_evk_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc resc CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/mx6ull_14x14_evk_plugin_defconfig b/configs/mx6ull_14x14_evk_plugin_defconfig index 087aa8e5ae6..a9b7eb4aaff 100644 --- a/configs/mx6ull_14x14_evk_plugin_defconfig +++ b/configs/mx6ull_14x14_evk_plugin_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc resc CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/mx6ulz_14x14_evk_defconfig b/configs/mx6ulz_14x14_evk_defconfig index 2a13767da87..a3afd12d2cb 100644 --- a/configs/mx6ulz_14x14_evk_defconfig +++ b/configs/mx6ulz_14x14_evk_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc resc CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig index da55c2ad176..0de958b621b 100644 --- a/configs/mx7dsabresd_defconfig +++ b/configs/mx7dsabresd_defconfig @@ -17,6 +17,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/mx7dsabresd_qspi_defconfig b/configs/mx7dsabresd_qspi_defconfig index 4c4d8a105a4..c52f45a9749 100644 --- a/configs/mx7dsabresd_qspi_defconfig +++ b/configs/mx7dsabresd_qspi_defconfig @@ -16,6 +16,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/mx7ulp_com_defconfig b/configs/mx7ulp_com_defconfig index b9154a9e3c6..ac062c387a8 100644 --- a/configs/mx7ulp_com_defconfig +++ b/configs/mx7ulp_com_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTCOMMAND="if run loadimage; then run mmcboot; fi" CONFIG_DEFAULT_FDT_FILE="imx7ulp-com" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/mx7ulp_evk_defconfig b/configs/mx7ulp_evk_defconfig index b5760392e81..891ea8ceb0a 100644 --- a/configs/mx7ulp_evk_defconfig +++ b/configs/mx7ulp_evk_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=256 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_FUSE=y diff --git a/configs/mx7ulp_evk_plugin_defconfig b/configs/mx7ulp_evk_plugin_defconfig index b622fb349c4..f29ecf6c83c 100644 --- a/configs/mx7ulp_evk_plugin_defconfig +++ b/configs/mx7ulp_evk_plugin_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=256 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_MEMTEST=y CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y diff --git a/configs/myir_mys_6ulx_defconfig b/configs/myir_mys_6ulx_defconfig index d647f1c2ab5..f5ccf669f29 100644 --- a/configs/myir_mys_6ulx_defconfig +++ b/configs/myir_mys_6ulx_defconfig @@ -25,6 +25,7 @@ CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_MEMTEST=y CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y diff --git a/configs/nanopi_a64_defconfig b/configs/nanopi_a64_defconfig index 70fc257eebd..042689e933c 100644 --- a/configs/nanopi_a64_defconfig +++ b/configs/nanopi_a64_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nanopi_m1_defconfig b/configs/nanopi_m1_defconfig index dc2dbd62900..547c20358f2 100644 --- a/configs/nanopi_m1_defconfig +++ b/configs/nanopi_m1_defconfig @@ -5,5 +5,6 @@ CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=408 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nanopi_m1_plus_defconfig b/configs/nanopi_m1_plus_defconfig index 37b7817d869..5ce046cd3f7 100644 --- a/configs/nanopi_m1_plus_defconfig +++ b/configs/nanopi_m1_plus_defconfig @@ -8,6 +8,7 @@ CONFIG_MACPWR="PD6" CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nanopi_neo2_defconfig b/configs/nanopi_neo2_defconfig index 95dd56aa04c..f994fceffd4 100644 --- a/configs/nanopi_neo2_defconfig +++ b/configs/nanopi_neo2_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881977 # CONFIG_DRAM_ODT_EN is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nanopi_neo_air_defconfig b/configs/nanopi_neo_air_defconfig index 806d95c1cc7..23c1527e9cd 100644 --- a/configs/nanopi_neo_air_defconfig +++ b/configs/nanopi_neo_air_defconfig @@ -7,5 +7,6 @@ CONFIG_DRAM_CLK=408 # CONFIG_VIDEO_DE2 is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y +CONFIG_SYS_PBSIZE=1024 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nanopi_neo_defconfig b/configs/nanopi_neo_defconfig index c0255196384..e46e5b81059 100644 --- a/configs/nanopi_neo_defconfig +++ b/configs/nanopi_neo_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=408 # CONFIG_VIDEO_DE2 is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nanopi_neo_plus2_defconfig b/configs/nanopi_neo_plus2_defconfig index 924ff38f17c..8eb370ab6a4 100644 --- a/configs/nanopi_neo_plus2_defconfig +++ b/configs/nanopi_neo_plus2_defconfig @@ -9,6 +9,7 @@ CONFIG_DRAM_ZQ=3881977 CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nanopi_r1s_h5_defconfig b/configs/nanopi_r1s_h5_defconfig index 27cf172d72a..9d0a4d7e500 100644 --- a/configs/nanopi_r1s_h5_defconfig +++ b/configs/nanopi_r1s_h5_defconfig @@ -9,6 +9,7 @@ CONFIG_DRAM_ZQ=3881977 CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig index a3129fb410d..ba82b08cac0 100644 --- a/configs/nas220_defconfig +++ b/configs/nas220_defconfig @@ -21,6 +21,7 @@ CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="nas220> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1049 # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_NAND=y diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig index 1081ae8e4ee..112f34d1aa2 100644 --- a/configs/net2big_v2_defconfig +++ b/configs/net2big_v2_defconfig @@ -29,6 +29,7 @@ CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="2big2> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1048 CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4 CONFIG_CMD_I2C=y diff --git a/configs/netgear_cg3100d_ram_defconfig b/configs/netgear_cg3100d_ram_defconfig index c4bbc9f3d04..d82df1e3d55 100644 --- a/configs/netgear_cg3100d_ram_defconfig +++ b/configs/netgear_cg3100d_ram_defconfig @@ -18,6 +18,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="CG3100D # " CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_PBSIZE=539 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/netgear_dgnd3700v2_ram_defconfig b/configs/netgear_dgnd3700v2_ram_defconfig index 84d954d57a0..d30545948ba 100644 --- a/configs/netgear_dgnd3700v2_ram_defconfig +++ b/configs/netgear_dgnd3700v2_ram_defconfig @@ -21,6 +21,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="DGND3700v2 # " CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_PBSIZE=542 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig index 1d6304cd28c..6dcb57cab6b 100644 --- a/configs/netspace_lite_v2_defconfig +++ b/configs/netspace_lite_v2_defconfig @@ -29,6 +29,7 @@ CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1046 CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4 CONFIG_CMD_I2C=y diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig index 4f85aa77be9..802c5ea26b2 100644 --- a/configs/netspace_max_v2_defconfig +++ b/configs/netspace_max_v2_defconfig @@ -29,6 +29,7 @@ CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1046 CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4 CONFIG_CMD_I2C=y diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig index 7325f215361..a580b7a362b 100644 --- a/configs/netspace_mini_v2_defconfig +++ b/configs/netspace_mini_v2_defconfig @@ -29,6 +29,7 @@ CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1046 CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4 CONFIG_CMD_I2C=y diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig index 48c0e4f9662..9bdcc075334 100644 --- a/configs/netspace_v2_defconfig +++ b/configs/netspace_v2_defconfig @@ -29,6 +29,7 @@ CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1046 CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4 CONFIG_CMD_I2C=y diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig index c8d2cff57a2..2d653d4d0d3 100644 --- a/configs/nitrogen6dl2g_defconfig +++ b/configs/nitrogen6dl2g_defconfig @@ -30,6 +30,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig index 50a2701ec71..282fea4508d 100644 --- a/configs/nitrogen6dl_defconfig +++ b/configs/nitrogen6dl_defconfig @@ -30,6 +30,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig index 3e6f358f47e..2bf3e3a9614 100644 --- a/configs/nitrogen6q2g_defconfig +++ b/configs/nitrogen6q2g_defconfig @@ -30,6 +30,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig index 0483417d2ac..e169350f55d 100644 --- a/configs/nitrogen6q_defconfig +++ b/configs/nitrogen6q_defconfig @@ -30,6 +30,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig index 059a958ec80..60edd7d6e32 100644 --- a/configs/nitrogen6s1g_defconfig +++ b/configs/nitrogen6s1g_defconfig @@ -30,6 +30,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig index e22f6897265..7d1da4cf6b1 100644 --- a/configs/nitrogen6s_defconfig +++ b/configs/nitrogen6s_defconfig @@ -30,6 +30,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y diff --git a/configs/nokia_rx51_defconfig b/configs/nokia_rx51_defconfig index 309cf28269c..a8707b4cf15 100644 --- a/configs/nokia_rx51_defconfig +++ b/configs/nokia_rx51_defconfig @@ -28,6 +28,7 @@ CONFIG_PREBOOT="run preboot" # CONFIG_SYS_DEVICE_NULLDEV is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Nokia RX-51 # " +CONFIG_SYS_PBSIZE=287 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_NETBSD is not set diff --git a/configs/novena_defconfig b/configs/novena_defconfig index 0a34e99f094..a75ce588c51 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_BUS=2 diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig index aad5d1f857a..978570c3191 100644 --- a/configs/nsa310s_defconfig +++ b/configs/nsa310s_defconfig @@ -22,6 +22,7 @@ CONFIG_USE_PREBOOT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="NSA310s> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y diff --git a/configs/nsim_700_defconfig b/configs/nsim_700_defconfig index 4dcb948f498..359edf18f0b 100644 --- a/configs/nsim_700_defconfig +++ b/configs/nsim_700_defconfig @@ -14,6 +14,7 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_SYS_PROMPT="nsim# " +CONFIG_SYS_PBSIZE=279 # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y diff --git a/configs/nsim_700be_defconfig b/configs/nsim_700be_defconfig index cf62da15f2b..00ff67046fd 100644 --- a/configs/nsim_700be_defconfig +++ b/configs/nsim_700be_defconfig @@ -15,6 +15,7 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_SYS_PROMPT="nsim# " +CONFIG_SYS_PBSIZE=279 # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y diff --git a/configs/nsim_hs38_defconfig b/configs/nsim_hs38_defconfig index d85d00e00af..8cbad8649d7 100644 --- a/configs/nsim_hs38_defconfig +++ b/configs/nsim_hs38_defconfig @@ -16,6 +16,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SYS_PROMPT="nsim# " +CONFIG_SYS_PBSIZE=279 CONFIG_CMD_DM=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y diff --git a/configs/nsim_hs38be_defconfig b/configs/nsim_hs38be_defconfig index 7d16c2ed6e5..6542da11ecc 100644 --- a/configs/nsim_hs38be_defconfig +++ b/configs/nsim_hs38be_defconfig @@ -16,6 +16,7 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_SYS_PROMPT="nsim# " +CONFIG_SYS_PBSIZE=279 # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig index 0c906fcde4c..531cc0266e6 100644 --- a/configs/nyan-big_defconfig +++ b/configs/nyan-big_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_PROMPT="Tegra124 (Nyan-big) # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2087 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/o4-imx6ull-nano_defconfig b/configs/o4-imx6ull-nano_defconfig index 158caf13e00..b634a82eaa7 100644 --- a/configs/o4-imx6ull-nano_defconfig +++ b/configs/o4-imx6ull-nano_defconfig @@ -9,6 +9,7 @@ CONFIG_MT41K256M16HA_125E=y CONFIG_IMX_MODULE_FUSE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/oceanic_5205_5inmfd_defconfig b/configs/oceanic_5205_5inmfd_defconfig index 7ce63ba665d..5392e3485f5 100644 --- a/configs/oceanic_5205_5inmfd_defconfig +++ b/configs/oceanic_5205_5inmfd_defconfig @@ -10,6 +10,7 @@ CONFIG_DRAM_ZQ=3881949 CONFIG_MMC0_CD_PIN="" CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_SPI=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/octeon_ebb7304_defconfig b/configs/octeon_ebb7304_defconfig index f70f0d214cf..b965919c278 100644 --- a/configs/octeon_ebb7304_defconfig +++ b/configs/octeon_ebb7304_defconfig @@ -18,6 +18,7 @@ CONFIG_OF_BOARD_FIXUP=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_LATE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/octeon_nic23_defconfig b/configs/octeon_nic23_defconfig index 3ab5838f03e..4137c6156a5 100644 --- a/configs/octeon_nic23_defconfig +++ b/configs/octeon_nic23_defconfig @@ -25,6 +25,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/octeontx2_95xx_defconfig b/configs/octeontx2_95xx_defconfig index 0c6c538a587..34f31ae75d4 100644 --- a/configs/octeontx2_95xx_defconfig +++ b/configs/octeontx2_95xx_defconfig @@ -34,6 +34,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Marvell> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1050 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set CONFIG_CMD_MD5SUM=y CONFIG_MD5SUM_VERIFY=y diff --git a/configs/octeontx2_96xx_defconfig b/configs/octeontx2_96xx_defconfig index 92d6ce531ce..481b89f864b 100644 --- a/configs/octeontx2_96xx_defconfig +++ b/configs/octeontx2_96xx_defconfig @@ -34,6 +34,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Marvell> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1050 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set CONFIG_CMD_MD5SUM=y CONFIG_MD5SUM_VERIFY=y diff --git a/configs/octeontx_81xx_defconfig b/configs/octeontx_81xx_defconfig index 539ebf16f3c..a92cac31538 100644 --- a/configs/octeontx_81xx_defconfig +++ b/configs/octeontx_81xx_defconfig @@ -34,6 +34,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Marvell> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1050 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set CONFIG_CMD_MD5SUM=y CONFIG_MD5SUM_VERIFY=y diff --git a/configs/octeontx_83xx_defconfig b/configs/octeontx_83xx_defconfig index dad06f6df5c..ad7edf0a9a5 100644 --- a/configs/octeontx_83xx_defconfig +++ b/configs/octeontx_83xx_defconfig @@ -32,6 +32,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Marvell> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1050 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set CONFIG_CMD_MD5SUM=y CONFIG_MD5SUM_VERIFY=y diff --git a/configs/odroid-xu3_defconfig b/configs/odroid-xu3_defconfig index a4c9c79b81d..17ef8ad9923 100644 --- a/configs/odroid-xu3_defconfig +++ b/configs/odroid-xu3_defconfig @@ -25,6 +25,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_LATE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="ODROID-XU3 # " +CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig index f2a8cd41912..a4013a6eca7 100644 --- a/configs/odroid_defconfig +++ b/configs/odroid_defconfig @@ -27,6 +27,7 @@ CONFIG_BOARD_TYPES=y CONFIG_BOARD_LATE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="Odroid # " +CONFIG_SYS_PBSIZE=1024 # CONFIG_CMD_XIMG is not set CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_DFU=y diff --git a/configs/omap35_logic_defconfig b/configs/omap35_logic_defconfig index 9d69cc5b31b..72b83b42426 100644 --- a/configs/omap35_logic_defconfig +++ b/configs/omap35_logic_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 CONFIG_SYS_PROMPT="OMAP Logic # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1054 # CONFIG_CMD_IMI is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x240000 diff --git a/configs/omap35_logic_somlv_defconfig b/configs/omap35_logic_somlv_defconfig index 8b7af0b0139..5db671d694e 100644 --- a/configs/omap35_logic_somlv_defconfig +++ b/configs/omap35_logic_somlv_defconfig @@ -36,6 +36,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 # CONFIG_SPL_POWER is not set CONFIG_SYS_PROMPT="OMAP Logic # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1054 # CONFIG_CMD_IMI is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x240000 diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig index 5c3c846d98f..8a542763c1e 100644 --- a/configs/omap3_beagle_defconfig +++ b/configs/omap3_beagle_defconfig @@ -23,6 +23,7 @@ CONFIG_SPL_NAND_SIMPLE=y CONFIG_SPL_NAND_BASE=y CONFIG_SYS_PROMPT="BeagleBoard # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1055 CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x280000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig index b7fd976e8b6..a4bcb43926d 100644 --- a/configs/omap3_evm_defconfig +++ b/configs/omap3_evm_defconfig @@ -23,6 +23,7 @@ CONFIG_SPL_NAND_SIMPLE=y CONFIG_SPL_NAND_BASE=y CONFIG_SYS_PROMPT="OMAP3_EVM # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1053 CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x280000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index ce93059c197..dfd9c307339 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 CONFIG_SYS_PROMPT="OMAP Logic # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1054 # CONFIG_CMD_IMI is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x240000 diff --git a/configs/omap3_logic_somlv_defconfig b/configs/omap3_logic_somlv_defconfig index 0b5ffc07941..2c5d60d164a 100644 --- a/configs/omap3_logic_somlv_defconfig +++ b/configs/omap3_logic_somlv_defconfig @@ -36,6 +36,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 # CONFIG_SPL_POWER is not set CONFIG_SYS_PROMPT="OMAP Logic # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1054 # CONFIG_CMD_IMI is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x240000 diff --git a/configs/openpiton_riscv64_defconfig b/configs/openpiton_riscv64_defconfig index 1700f4a2a5b..7aec52985bb 100644 --- a/configs/openpiton_riscv64_defconfig +++ b/configs/openpiton_riscv64_defconfig @@ -17,6 +17,7 @@ CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fdt addr ${fdtcontroladdr}; fdt move ${fdtcontroladdr} ${fdt_addr_r}; load mmc ${mmcdev}:${mmcpart} ${kernel_addr_r} ${image}; booti ${kernel_addr_r} - ${fdt_addr_r}; " CONFIG_SYS_PROMPT="openpiton$ " +CONFIG_SYS_PBSIZE=284 # CONFIG_CMD_CPU is not set CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_NETBSD is not set diff --git a/configs/openpiton_riscv64_spl_defconfig b/configs/openpiton_riscv64_spl_defconfig index 8a7e3ccf3df..4f3080a65ac 100644 --- a/configs/openpiton_riscv64_spl_defconfig +++ b/configs/openpiton_riscv64_spl_defconfig @@ -27,6 +27,7 @@ CONFIG_SPL_CPU=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_RTC=y CONFIG_SYS_PROMPT="openpiton$ " +CONFIG_SYS_PBSIZE=284 # CONFIG_CMD_CPU is not set CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_NETBSD is not set diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig index b56da14c678..8b0b4c33e14 100644 --- a/configs/opos6uldev_defconfig +++ b/configs/opos6uldev_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="BIOS> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=535 CONFIG_CMD_CONFIG=y CONFIG_CMD_LICENSE=y CONFIG_CMD_BOOTZ=y diff --git a/configs/orangepi_2_defconfig b/configs/orangepi_2_defconfig index 7aaa5190b3a..f1e260317de 100644 --- a/configs/orangepi_2_defconfig +++ b/configs/orangepi_2_defconfig @@ -8,6 +8,7 @@ CONFIG_DRAM_CLK=672 CONFIG_USB1_VBUS_PIN="PG13" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_3_defconfig b/configs/orangepi_3_defconfig index ebecf49ebda..59e85bb24e8 100644 --- a/configs/orangepi_3_defconfig +++ b/configs/orangepi_3_defconfig @@ -8,6 +8,7 @@ CONFIG_MMC0_CD_PIN="PF6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_BLUETOOTH_DT_DEVICE_FIXUP="brcm,bcm4345c5" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_SUN50I_USB3=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y diff --git a/configs/orangepi_lite2_defconfig b/configs/orangepi_lite2_defconfig index 75c97d6b897..e7e18effd16 100644 --- a/configs/orangepi_lite2_defconfig +++ b/configs/orangepi_lite2_defconfig @@ -7,5 +7,6 @@ CONFIG_SUNXI_DRAM_H6_LPDDR3=y CONFIG_MMC0_CD_PIN="PF6" # CONFIG_PSCI_RESET is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_lite_defconfig b/configs/orangepi_lite_defconfig index 96bbd1bab6f..4f48ef1b5f5 100644 --- a/configs/orangepi_lite_defconfig +++ b/configs/orangepi_lite_defconfig @@ -5,5 +5,6 @@ CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_one_defconfig b/configs/orangepi_one_defconfig index 1064b4a39de..ee9d8f397b2 100644 --- a/configs/orangepi_one_defconfig +++ b/configs/orangepi_one_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_one_plus_defconfig b/configs/orangepi_one_plus_defconfig index 55a8b003fb5..e13a32041ae 100644 --- a/configs/orangepi_one_plus_defconfig +++ b/configs/orangepi_one_plus_defconfig @@ -7,5 +7,6 @@ CONFIG_SUNXI_DRAM_H6_LPDDR3=y CONFIG_MMC0_CD_PIN="PF6" # CONFIG_PSCI_RESET is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig index 777af8c60ea..6a6b81fa393 100644 --- a/configs/orangepi_pc2_defconfig +++ b/configs/orangepi_pc2_defconfig @@ -9,6 +9,7 @@ CONFIG_MACPWR="PD6" CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/orangepi_pc_defconfig b/configs/orangepi_pc_defconfig index 905ff7b1271..2ef2a962f41 100644 --- a/configs/orangepi_pc_defconfig +++ b/configs/orangepi_pc_defconfig @@ -6,6 +6,7 @@ CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=624 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_pc_plus_defconfig b/configs/orangepi_pc_plus_defconfig index f845138153d..8457b78a39c 100644 --- a/configs/orangepi_pc_plus_defconfig +++ b/configs/orangepi_pc_plus_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=624 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_plus2e_defconfig b/configs/orangepi_plus2e_defconfig index 138a6a72b8c..f33b75d5e3d 100644 --- a/configs/orangepi_plus2e_defconfig +++ b/configs/orangepi_plus2e_defconfig @@ -8,6 +8,7 @@ CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_plus_defconfig b/configs/orangepi_plus_defconfig index 76de72aa228..e8fda9a5f11 100644 --- a/configs/orangepi_plus_defconfig +++ b/configs/orangepi_plus_defconfig @@ -10,6 +10,7 @@ CONFIG_USB1_VBUS_PIN="PG13" CONFIG_SATAPWR="PG11" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_prime_defconfig b/configs/orangepi_prime_defconfig index 95a82e20f3e..29ef1b8553a 100644 --- a/configs/orangepi_prime_defconfig +++ b/configs/orangepi_prime_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881977 # CONFIG_DRAM_ODT_EN is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_r1_defconfig b/configs/orangepi_r1_defconfig index 4496aa4a45c..6b68f77833d 100644 --- a/configs/orangepi_r1_defconfig +++ b/configs/orangepi_r1_defconfig @@ -8,6 +8,7 @@ CONFIG_DRAM_CLK=624 CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SPI_FLASH_WINBOND=y CONFIG_SUN8I_EMAC=y CONFIG_SPI=y diff --git a/configs/orangepi_win_defconfig b/configs/orangepi_win_defconfig index 3b78ad7e52d..9fce313eb9e 100644 --- a/configs/orangepi_win_defconfig +++ b/configs/orangepi_win_defconfig @@ -7,6 +7,7 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MACPWR="PD14" CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_REALTEK=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_zero2_defconfig b/configs/orangepi_zero2_defconfig index 54faf6aba2c..4788102e975 100644 --- a/configs/orangepi_zero2_defconfig +++ b/configs/orangepi_zero2_defconfig @@ -11,6 +11,7 @@ CONFIG_MMC0_CD_PIN="PF6" CONFIG_R_I2C_ENABLE=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/orangepi_zero_defconfig b/configs/orangepi_zero_defconfig index 2dc69d2994a..e6af0fb8e7d 100644 --- a/configs/orangepi_zero_defconfig +++ b/configs/orangepi_zero_defconfig @@ -8,6 +8,7 @@ CONFIG_DRAM_CLK=624 CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SPI_FLASH_WINBOND=y CONFIG_SUN8I_EMAC=y CONFIG_SPI=y diff --git a/configs/orangepi_zero_plus2_defconfig b/configs/orangepi_zero_plus2_defconfig index 9583d24c8d6..623dd040835 100644 --- a/configs/orangepi_zero_plus2_defconfig +++ b/configs/orangepi_zero_plus2_defconfig @@ -9,6 +9,7 @@ CONFIG_DRAM_ZQ=3881977 CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_zero_plus2_h3_defconfig b/configs/orangepi_zero_plus2_h3_defconfig index 55a251374a1..ff73e84a58d 100644 --- a/configs/orangepi_zero_plus2_h3_defconfig +++ b/configs/orangepi_zero_plus2_h3_defconfig @@ -8,6 +8,7 @@ CONFIG_DRAM_CLK=672 CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_zero_plus_defconfig b/configs/orangepi_zero_plus_defconfig index f3ecf35eee1..e7d6b5d32ca 100644 --- a/configs/orangepi_zero_plus_defconfig +++ b/configs/orangepi_zero_plus_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=624 CONFIG_DRAM_ZQ=3881977 # CONFIG_DRAM_ODT_EN is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/origen_defconfig b/configs/origen_defconfig index 05d955696b2..b8a6b79acb0 100644 --- a/configs/origen_defconfig +++ b/configs/origen_defconfig @@ -23,6 +23,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SYS_PROMPT="ORIGEN # " +CONFIG_SYS_PBSIZE=1024 # CONFIG_CMD_XIMG is not set CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_DFU=y diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig index 61e90d661ca..d93b355d47d 100644 --- a/configs/p2371-0000_defconfig +++ b/configs/p2371-0000_defconfig @@ -14,6 +14,7 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P2371-0000) # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2089 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig index 5fbcb7dec3f..74125c15a87 100644 --- a/configs/p2371-2180_defconfig +++ b/configs/p2371-2180_defconfig @@ -17,6 +17,7 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P2371-2180) # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2089 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig index 2df2979b007..b4e14add1d7 100644 --- a/configs/p2571_defconfig +++ b/configs/p2571_defconfig @@ -15,6 +15,7 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P2571) # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2084 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig index bf7d094ae63..7b2fd5795a0 100644 --- a/configs/p2771-0000-000_defconfig +++ b/configs/p2771-0000-000_defconfig @@ -15,6 +15,7 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-000) # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2093 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig index 9aee01e99dd..41621970f00 100644 --- a/configs/p2771-0000-500_defconfig +++ b/configs/p2771-0000-500_defconfig @@ -15,6 +15,7 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-500) # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2093 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig index d72f02ddab6..fbe4aea1bd3 100644 --- a/configs/p3450-0000_defconfig +++ b/configs/p3450-0000_defconfig @@ -18,6 +18,7 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P3450-0000) # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2089 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/parrot_r16_defconfig b/configs/parrot_r16_defconfig index d56c4504b6a..5922e645075 100644 --- a/configs/parrot_r16_defconfig +++ b/configs/parrot_r16_defconfig @@ -11,6 +11,7 @@ CONFIG_USB0_ID_DET="PD10" CONFIG_USB1_VBUS_PIN="PD12" CONFIG_AXP_GPIO=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_CONS_INDEX=5 CONFIG_USB_EHCI_HCD=y diff --git a/configs/paz00_defconfig b/configs/paz00_defconfig index b0e650ee8c8..df43008b1cf 100644 --- a/configs/paz00_defconfig +++ b/configs/paz00_defconfig @@ -14,6 +14,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra20 (Paz00) MOD # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2087 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig index 264bff86fb9..a9580be8e50 100644 --- a/configs/pcm052_defconfig +++ b/configs/pcm052_defconfig @@ -22,6 +22,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run bootcmd_nand" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig index 35c2befef8c..47e2199b47b 100644 --- a/configs/pcm058_defconfig +++ b/configs/pcm058_defconfig @@ -39,6 +39,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x31400 CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig index 7c45872052a..2a2a0e09e2d 100644 --- a/configs/peach-pi_defconfig +++ b/configs/peach-pi_defconfig @@ -23,6 +23,7 @@ CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SYS_PROMPT="Peach-Pi # " +CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig index 9e1fdd4e6a2..a3f364e2d42 100644 --- a/configs/peach-pit_defconfig +++ b/configs/peach-pit_defconfig @@ -22,6 +22,7 @@ CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SYS_PROMPT="Peach-Pit # " +CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig index 018e84218e8..99891d7bc34 100644 --- a/configs/pg_wcom_expu1_defconfig +++ b/configs/pg_wcom_expu1_defconfig @@ -42,6 +42,7 @@ CONFIG_EVENT=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/pg_wcom_expu1_update_defconfig b/configs/pg_wcom_expu1_update_defconfig index e237a64d275..ce99c099c8d 100644 --- a/configs/pg_wcom_expu1_update_defconfig +++ b/configs/pg_wcom_expu1_update_defconfig @@ -40,6 +40,7 @@ CONFIG_EVENT=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig index 919dba52147..7a9515bb8fd 100644 --- a/configs/pg_wcom_seli8_defconfig +++ b/configs/pg_wcom_seli8_defconfig @@ -42,6 +42,7 @@ CONFIG_EVENT=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/pg_wcom_seli8_update_defconfig b/configs/pg_wcom_seli8_update_defconfig index 8e3e30feff1..fcefa5a3c6f 100644 --- a/configs/pg_wcom_seli8_update_defconfig +++ b/configs/pg_wcom_seli8_update_defconfig @@ -40,6 +40,7 @@ CONFIG_EVENT=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig index a52cc356286..0a6c6a9fb24 100644 --- a/configs/phycore-imx8mm_defconfig +++ b/configs/phycore-imx8mm_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2074 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig index 78a85e1dab0..19fc768419f 100644 --- a/configs/phycore-imx8mp_defconfig +++ b/configs/phycore-imx8mp_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2074 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/phycore_pcl063_defconfig b/configs/phycore_pcl063_defconfig index dbd4a06800a..6dcb789609f 100644 --- a/configs/phycore_pcl063_defconfig +++ b/configs/phycore_pcl063_defconfig @@ -21,6 +21,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_MEMTEST=y CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y diff --git a/configs/phycore_pcl063_ull_defconfig b/configs/phycore_pcl063_ull_defconfig index 6698045e7f5..e40ca07b7c0 100644 --- a/configs/phycore_pcl063_ull_defconfig +++ b/configs/phycore_pcl063_ull_defconfig @@ -21,6 +21,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y diff --git a/configs/pic32mzdask_defconfig b/configs/pic32mzdask_defconfig index 8c5934cc916..21f407c1f35 100644 --- a/configs/pic32mzdask_defconfig +++ b/configs/pic32mzdask_defconfig @@ -16,6 +16,7 @@ CONFIG_TIMESTAMP=y CONFIG_BOOTDELAY=5 CONFIG_BOOTCOMMAND="run distro_bootcmd || run legacy_bootcmd" CONFIG_SYS_PROMPT="dask # " +CONFIG_SYS_PBSIZE=1048 # CONFIG_CMD_SAVEENV is not set CONFIG_LOOPW=y CONFIG_CMD_MEMINFO=y diff --git a/configs/pico-dwarf-imx6ul_defconfig b/configs/pico-dwarf-imx6ul_defconfig index 430372cec64..15dc2098ad4 100644 --- a/configs/pico-dwarf-imx6ul_defconfig +++ b/configs/pico-dwarf-imx6ul_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y diff --git a/configs/pico-dwarf-imx7d_defconfig b/configs/pico-dwarf-imx7d_defconfig index 92c85ca46c5..9d6a9168aee 100644 --- a/configs/pico-dwarf-imx7d_defconfig +++ b/configs/pico-dwarf-imx7d_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_IMI is not set diff --git a/configs/pico-hobbit-imx6ul_defconfig b/configs/pico-hobbit-imx6ul_defconfig index 776cf500fb6..eeb95d431db 100644 --- a/configs/pico-hobbit-imx6ul_defconfig +++ b/configs/pico-hobbit-imx6ul_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig index 6f1675d4ffe..464fdccc97b 100644 --- a/configs/pico-hobbit-imx7d_defconfig +++ b/configs/pico-hobbit-imx7d_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_IMI is not set diff --git a/configs/pico-imx6_defconfig b/configs/pico-imx6_defconfig index 816f9041dd2..6887ee98ce1 100644 --- a/configs/pico-imx6_defconfig +++ b/configs/pico-imx6_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_SPL=y CONFIG_CMD_SPL_WRITE_SIZE=0x20000 diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig index 3ec16b6d1b9..7e923d0bc02 100644 --- a/configs/pico-imx6ul_defconfig +++ b/configs/pico-imx6ul_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_SPL=y CONFIG_CMD_SPL_WRITE_SIZE=0x20000 diff --git a/configs/pico-imx7d_bl33_defconfig b/configs/pico-imx7d_bl33_defconfig index 90355db2046..18fa0026b67 100644 --- a/configs/pico-imx7d_bl33_defconfig +++ b/configs/pico-imx7d_bl33_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y CONFIG_CMD_SPL=y diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig index c89736b3ed5..9750f97ef16 100644 --- a/configs/pico-imx7d_defconfig +++ b/configs/pico-imx7d_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_IMI is not set diff --git a/configs/pico-nymph-imx7d_defconfig b/configs/pico-nymph-imx7d_defconfig index 92c85ca46c5..9d6a9168aee 100644 --- a/configs/pico-nymph-imx7d_defconfig +++ b/configs/pico-nymph-imx7d_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_IMI is not set diff --git a/configs/pico-pi-imx6ul_defconfig b/configs/pico-pi-imx6ul_defconfig index 6bc8d5d8cd5..2cc6d4f8bed 100644 --- a/configs/pico-pi-imx6ul_defconfig +++ b/configs/pico-pi-imx6ul_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig index c94cfe385bd..9a91ace6fe1 100644 --- a/configs/pico-pi-imx7d_defconfig +++ b/configs/pico-pi-imx7d_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_IMI is not set diff --git a/configs/pine64-lts_defconfig b/configs/pine64-lts_defconfig index 7e7c2d79104..94c03f16a8c 100644 --- a/configs/pine64-lts_defconfig +++ b/configs/pine64-lts_defconfig @@ -10,6 +10,7 @@ CONFIG_MMC0_CD_PIN="" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SUN8I_EMAC=y diff --git a/configs/pine64_plus_defconfig b/configs/pine64_plus_defconfig index f42f4e5923a..dc02ca10d7e 100644 --- a/configs/pine64_plus_defconfig +++ b/configs/pine64_plus_defconfig @@ -6,6 +6,7 @@ CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_PINE64_DT_SELECTION=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_OF_LIST="sun50i-a64-pine64 sun50i-a64-pine64-plus" CONFIG_PHY_REALTEK=y CONFIG_SUN8I_EMAC=y diff --git a/configs/pine_h64_defconfig b/configs/pine_h64_defconfig index 09a4275f0e7..7466c3b2c5f 100644 --- a/configs/pine_h64_defconfig +++ b/configs/pine_h64_defconfig @@ -11,6 +11,7 @@ CONFIG_USB3_VBUS_PIN="PL5" CONFIG_SPL_SPI_SUNXI=y # CONFIG_PSCI_RESET is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SUN8I_EMAC=y diff --git a/configs/pinebook_defconfig b/configs/pinebook_defconfig index 26918dd3875..1bdfcf27be0 100644 --- a/configs/pinebook_defconfig +++ b/configs/pinebook_defconfig @@ -8,6 +8,7 @@ CONFIG_DRAM_CLK=552 CONFIG_DRAM_ZQ=3881949 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_R_I2C_ENABLE=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_DM_REGULATOR_FIXED=y diff --git a/configs/pinecube_defconfig b/configs/pinecube_defconfig index 28e347b4d95..1259b85361d 100644 --- a/configs/pinecube_defconfig +++ b/configs/pinecube_defconfig @@ -9,6 +9,7 @@ CONFIG_DRAM_ODT_EN=y CONFIG_I2C0_ENABLE=y # CONFIG_HAS_ARMV7_SECURE_BASE is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/pinephone_defconfig b/configs/pinephone_defconfig index 9d39204a439..ae60943e95a 100644 --- a/configs/pinephone_defconfig +++ b/configs/pinephone_defconfig @@ -10,6 +10,7 @@ CONFIG_DRAM_ZQ=3881949 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_PINEPHONE_DT_SELECTION=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_OF_LIST="sun50i-a64-pinephone-1.1 sun50i-a64-pinephone-1.2" CONFIG_LED_STATUS=y CONFIG_LED_STATUS_GPIO=y diff --git a/configs/pinetab_defconfig b/configs/pinetab_defconfig index 0cc24146b39..4ecd241b52f 100644 --- a/configs/pinetab_defconfig +++ b/configs/pinetab_defconfig @@ -8,3 +8,4 @@ CONFIG_DRAM_CLK=552 CONFIG_DRAM_ZQ=3881949 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 diff --git a/configs/plutux_defconfig b/configs/plutux_defconfig index 8d719a330fb..7f35bd2345a 100644 --- a/configs/plutux_defconfig +++ b/configs/plutux_defconfig @@ -16,6 +16,7 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra20 (Plutux) # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2084 # CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/pm9261_defconfig b/configs/pm9261_defconfig index 8b14e0daf3a..585bf7ed6f3 100644 --- a/configs/pm9261_defconfig +++ b/configs/pm9261_defconfig @@ -22,6 +22,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="pm9261> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig index 78f2ae9a4be..fdc89a972e1 100644 --- a/configs/pm9263_defconfig +++ b/configs/pm9263_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="u-boot-pm9263> " +CONFIG_SYS_PBSIZE=288 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/pm9g45_defconfig b/configs/pm9g45_defconfig index 1b4dbdeafac..296b38a5b2b 100644 --- a/configs/pm9g45_defconfig +++ b/configs/pm9g45_defconfig @@ -24,6 +24,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig index d512fd4b996..699e8e2beab 100644 --- a/configs/pogo_e02_defconfig +++ b/configs/pogo_e02_defconfig @@ -21,6 +21,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="PogoE02> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1050 # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y CONFIG_CMD_USB=y diff --git a/configs/pogo_v4_defconfig b/configs/pogo_v4_defconfig index fb564b54671..ba4245ea174 100644 --- a/configs/pogo_v4_defconfig +++ b/configs/pogo_v4_defconfig @@ -23,6 +23,7 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Pogo_V4> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set diff --git a/configs/polaroid_mid2407pxe03_defconfig b/configs/polaroid_mid2407pxe03_defconfig index 17fffeb1e26..ed8b780b01e 100644 --- a/configs/polaroid_mid2407pxe03_defconfig +++ b/configs/polaroid_mid2407pxe03_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 CONFIG_USB_MUSB_HOST=y diff --git a/configs/polaroid_mid2809pxe04_defconfig b/configs/polaroid_mid2809pxe04_defconfig index e542b711132..5953344491c 100644 --- a/configs/polaroid_mid2809pxe04_defconfig +++ b/configs/polaroid_mid2809pxe04_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 CONFIG_USB_MUSB_HOST=y diff --git a/configs/poleg_evb_defconfig b/configs/poleg_evb_defconfig index 6d1b2bde250..25a774da5d9 100644 --- a/configs/poleg_evb_defconfig +++ b/configs/poleg_evb_defconfig @@ -17,6 +17,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run common_bootargs; run romboot" CONFIG_SYS_PROMPT="U-Boot>" CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=280 CONFIG_CMD_GPIO=y CONFIG_CMD_SPI=y CONFIG_CMD_CACHE=y diff --git a/configs/pomelo_defconfig b/configs/pomelo_defconfig index 5dcd1e57761..008ea768c00 100644 --- a/configs/pomelo_defconfig +++ b/configs/pomelo_defconfig @@ -14,6 +14,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200 earlycon=pl011,0x28001000 root=/dev/sda2 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_LAST_STAGE_INIT=y CONFIG_SYS_PROMPT="pomelo#" +CONFIG_SYS_PBSIZE=280 CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/poplar_defconfig b/configs/poplar_defconfig index 8479b62f306..e5b7f5b11fd 100644 --- a/configs/poplar_defconfig +++ b/configs/poplar_defconfig @@ -13,6 +13,7 @@ CONFIG_DISTRO_DEFAULTS=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="poplar# " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=537 CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_ISO_PARTITION is not set diff --git a/configs/porter_defconfig b/configs/porter_defconfig index 05f85d33b64..046623eafdc 100644 --- a/configs/porter_defconfig +++ b/configs/porter_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=256 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/pov_protab2_ips9_defconfig b/configs/pov_protab2_ips9_defconfig index a62c9f8fa37..cf7f57574e0 100644 --- a/configs/pov_protab2_ips9_defconfig +++ b/configs/pov_protab2_ips9_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig index 23bb593e6d2..046b82de08e 100644 --- a/configs/pxm2_defconfig +++ b/configs/pxm2_defconfig @@ -46,6 +46,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1049 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set diff --git a/configs/q8_a13_tablet_defconfig b/configs/q8_a13_tablet_defconfig index f269b8a5889..08be8810d8c 100644 --- a/configs/q8_a13_tablet_defconfig +++ b/configs/q8_a13_tablet_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/q8_a23_tablet_800x480_defconfig b/configs/q8_a23_tablet_800x480_defconfig index dda1a0c51f6..6053587dddf 100644 --- a/configs/q8_a23_tablet_800x480_defconfig +++ b/configs/q8_a23_tablet_800x480_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 CONFIG_USB_MUSB_HOST=y diff --git a/configs/q8_a33_tablet_1024x600_defconfig b/configs/q8_a33_tablet_1024x600_defconfig index 7925677d30e..0870d234e86 100644 --- a/configs/q8_a33_tablet_1024x600_defconfig +++ b/configs/q8_a33_tablet_1024x600_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 CONFIG_USB_MUSB_HOST=y diff --git a/configs/q8_a33_tablet_800x480_defconfig b/configs/q8_a33_tablet_800x480_defconfig index f3335f9d233..3b99004fb9a 100644 --- a/configs/q8_a33_tablet_800x480_defconfig +++ b/configs/q8_a33_tablet_800x480_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 CONFIG_USB_MUSB_HOST=y diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig index eac2cc2854d..55444b69a7a 100644 --- a/configs/qemu-ppce500_defconfig +++ b/configs/qemu-ppce500_defconfig @@ -16,6 +16,7 @@ CONFIG_BOOTCOMMAND="test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $ # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_REGINFO=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y diff --git a/configs/qemu-riscv32_defconfig b/configs/qemu-riscv32_defconfig index 91b5c9a3b80..dd0232e7eaf 100644 --- a/configs/qemu-riscv32_defconfig +++ b/configs/qemu-riscv32_defconfig @@ -9,6 +9,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set diff --git a/configs/qemu-riscv32_smode_defconfig b/configs/qemu-riscv32_smode_defconfig index 5a135f8624c..06a58918787 100644 --- a/configs/qemu-riscv32_smode_defconfig +++ b/configs/qemu-riscv32_smode_defconfig @@ -10,6 +10,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig index 410aecf2162..086e9c686cd 100644 --- a/configs/qemu-riscv32_spl_defconfig +++ b/configs/qemu-riscv32_spl_defconfig @@ -13,6 +13,7 @@ CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y +CONFIG_SYS_PBSIZE=276 # CONFIG_CMD_MII is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y diff --git a/configs/qemu-riscv64_defconfig b/configs/qemu-riscv64_defconfig index f7b9de10875..027717d2c77 100644 --- a/configs/qemu-riscv64_defconfig +++ b/configs/qemu-riscv64_defconfig @@ -10,6 +10,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig index 4d83570c455..cc2696c204c 100644 --- a/configs/qemu-riscv64_smode_defconfig +++ b/configs/qemu-riscv64_smode_defconfig @@ -13,6 +13,7 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr}; fdt addr ${fdtcontroladdr};" CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig index e19273e79cd..cb57dae247a 100644 --- a/configs/qemu-riscv64_spl_defconfig +++ b/configs/qemu-riscv64_spl_defconfig @@ -13,6 +13,7 @@ CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y +CONFIG_SYS_PBSIZE=276 # CONFIG_CMD_MII is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig index cc8393e6b98..485f4a0ac21 100644 --- a/configs/qemu-x86_64_defconfig +++ b/configs/qemu-x86_64_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_NET=y CONFIG_SPL_PCI=y CONFIG_SPL_PCH=y CONFIG_SPL_RTC=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig index 6010b61d2df..b9ab1805ab2 100644 --- a/configs/qemu-x86_defconfig +++ b/configs/qemu-x86_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_PCI_INIT_R=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig index 8d5c5751961..18f34332cdb 100644 --- a/configs/qemu_arm64_defconfig +++ b/configs/qemu_arm64_defconfig @@ -22,6 +22,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_PCI_INIT_R=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_DFU=y diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig index 3b019e4bbe9..ffa691774e5 100644 --- a/configs/qemu_arm_defconfig +++ b/configs/qemu_arm_defconfig @@ -24,6 +24,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_PCI_INIT_R=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_DFU=y diff --git a/configs/r2dplus_defconfig b/configs/r2dplus_defconfig index 40617089ee7..edb1591a933 100644 --- a/configs/r2dplus_defconfig +++ b/configs/r2dplus_defconfig @@ -17,6 +17,7 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="pci enum" CONFIG_DISPLAY_BOARDINFO=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=256 CONFIG_CMD_IMLS=y CONFIG_CMD_DM=y CONFIG_CMD_IDE=y diff --git a/configs/r7-tv-dongle_defconfig b/configs/r7-tv-dongle_defconfig index 8875a09b2c9..a8452ba3b74 100644 --- a/configs/r7-tv-dongle_defconfig +++ b/configs/r7-tv-dongle_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=384 CONFIG_USB1_VBUS_PIN="PG13" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig index b6a113ab5d8..4f4bd7a40b3 100644 --- a/configs/r8a77970_eagle_defconfig +++ b/configs/r8a77970_eagle_defconfig @@ -23,6 +23,7 @@ CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77970-eagle. CONFIG_DEFAULT_FDT_FILE="r8a77970-eagle.dtb" CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2068 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/r8a77980_condor_defconfig b/configs/r8a77980_condor_defconfig index a3716dcdd40..17df03cbe99 100644 --- a/configs/r8a77980_condor_defconfig +++ b/configs/r8a77980_condor_defconfig @@ -24,6 +24,7 @@ CONFIG_DEFAULT_FDT_FILE="r8a77980-condor.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2068 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig index 33995af431a..b3bc8a754d1 100644 --- a/configs/r8a77990_ebisu_defconfig +++ b/configs/r8a77990_ebisu_defconfig @@ -25,6 +25,7 @@ CONFIG_DEFAULT_FDT_FILE="r8a77990-ebisu.dtb" CONFIG_UPDATE_TFTP=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2068 CONFIG_CMD_BOOTZ=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_DFU=y diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig index 1c5536a540d..1d73756f952 100644 --- a/configs/r8a77995_draak_defconfig +++ b/configs/r8a77995_draak_defconfig @@ -24,6 +24,7 @@ CONFIG_DEFAULT_FDT_FILE="r8a77995-draak.dtb" CONFIG_UPDATE_TFTP=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2068 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/r8a779a0_falcon_defconfig b/configs/r8a779a0_falcon_defconfig index 2921bcf66bb..41353538f2b 100644 --- a/configs/r8a779a0_falcon_defconfig +++ b/configs/r8a779a0_falcon_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a779a0-falcon CONFIG_DEFAULT_FDT_FILE="r8a779a0-falcon.dtb" CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2068 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig index 2f10ad0e144..ae57cd4e1cc 100644 --- a/configs/rastaban_defconfig +++ b/configs/rastaban_defconfig @@ -47,6 +47,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1049 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set diff --git a/configs/rcar3_salvator-x_defconfig b/configs/rcar3_salvator-x_defconfig index 97b3f853016..d2233d7eef1 100644 --- a/configs/rcar3_salvator-x_defconfig +++ b/configs/rcar3_salvator-x_defconfig @@ -24,6 +24,7 @@ CONFIG_DEFAULT_FDT_FILE="r8a77950-salvator-x.dtb" CONFIG_UPDATE_TFTP=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2068 CONFIG_CMD_BOOTZ=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_DFU=y diff --git a/configs/rcar3_ulcb_defconfig b/configs/rcar3_ulcb_defconfig index 11f55bc6f19..8402634cc01 100644 --- a/configs/rcar3_ulcb_defconfig +++ b/configs/rcar3_ulcb_defconfig @@ -24,6 +24,7 @@ CONFIG_DEFAULT_FDT_FILE="r8a77950-ulcb.dtb" CONFIG_UPDATE_TFTP=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2068 CONFIG_CMD_BOOTZ=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_DFU=y diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig index dbe4b50a4dd..15c1c5a3c44 100644 --- a/configs/riotboard_defconfig +++ b/configs/riotboard_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x0 CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig index be0e1c7d186..ce37b578e26 100644 --- a/configs/rock960-rk3399_defconfig +++ b/configs/rock960-rk3399_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y CONFIG_SYS_PROMPT="rock960 => " +CONFIG_SYS_PBSIZE=1052 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig index 2e4a0df39bd..1cea925b52d 100644 --- a/configs/rpi_0_w_defconfig +++ b/configs/rpi_0_w_defconfig @@ -16,6 +16,7 @@ CONFIG_USE_PREBOOT=y CONFIG_MISC_INIT_R=y CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=1049 CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig index 7b78e84ba32..e9764b70f42 100644 --- a/configs/rpi_2_defconfig +++ b/configs/rpi_2_defconfig @@ -17,6 +17,7 @@ CONFIG_USE_PREBOOT=y CONFIG_MISC_INIT_R=y CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=1049 CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig index c1d55388101..93ea995b4b0 100644 --- a/configs/rpi_3_32b_defconfig +++ b/configs/rpi_3_32b_defconfig @@ -16,6 +16,7 @@ CONFIG_USE_PREBOOT=y CONFIG_MISC_INIT_R=y CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=1049 CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/rpi_3_b_plus_defconfig b/configs/rpi_3_b_plus_defconfig index f935e678780..d2db701d5b8 100644 --- a/configs/rpi_3_b_plus_defconfig +++ b/configs/rpi_3_b_plus_defconfig @@ -15,6 +15,7 @@ CONFIG_USE_PREBOOT=y CONFIG_MISC_INIT_R=y CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=1049 CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig index 9e4e168ef04..21df49f000f 100644 --- a/configs/rpi_3_defconfig +++ b/configs/rpi_3_defconfig @@ -15,6 +15,7 @@ CONFIG_USE_PREBOOT=y CONFIG_MISC_INIT_R=y CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=1049 CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig index a699591ceec..cdb773069d8 100644 --- a/configs/rpi_4_32b_defconfig +++ b/configs/rpi_4_32b_defconfig @@ -14,6 +14,7 @@ CONFIG_PREBOOT="pci enum; usb start;" CONFIG_MISC_INIT_R=y CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=1049 CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig index eae03bf023c..0827559be5a 100644 --- a/configs/rpi_4_defconfig +++ b/configs/rpi_4_defconfig @@ -14,6 +14,7 @@ CONFIG_PREBOOT="pci enum; usb start;" CONFIG_MISC_INIT_R=y CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=1049 CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig index 933e1422065..9cbfb90c01c 100644 --- a/configs/rpi_arm64_defconfig +++ b/configs/rpi_arm64_defconfig @@ -14,6 +14,7 @@ CONFIG_PREBOOT="pci enum; usb start;" CONFIG_MISC_INIT_R=y CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=1049 CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig index 0fe4ec4cf40..014898a3799 100644 --- a/configs/rpi_defconfig +++ b/configs/rpi_defconfig @@ -16,6 +16,7 @@ CONFIG_USE_PREBOOT=y CONFIG_MISC_INIT_R=y CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=1049 CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/rut_defconfig b/configs/rut_defconfig index 8e126e0aec9..0b25a598f41 100644 --- a/configs/rut_defconfig +++ b/configs/rut_defconfig @@ -46,6 +46,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1049 CONFIG_CMD_ASKENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_DFU=y diff --git a/configs/rzg2_beacon_defconfig b/configs/rzg2_beacon_defconfig index 608be08b278..930e3e60776 100644 --- a/configs/rzg2_beacon_defconfig +++ b/configs/rzg2_beacon_defconfig @@ -21,6 +21,7 @@ CONFIG_DEFAULT_FDT_FILE="r8a774a1-beacon-rzg2m-kit.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2068 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/s5p4418_nanopi2_defconfig b/configs/s5p4418_nanopi2_defconfig index 4d571acd870..cebca7447b2 100644 --- a/configs/s5p4418_nanopi2_defconfig +++ b/configs/s5p4418_nanopi2_defconfig @@ -27,6 +27,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="nanopi2# " +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_RTEMS is not set diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig index 5c39c1d6bbe..2b4cb5cb819 100644 --- a/configs/s5p_goni_defconfig +++ b/configs/s5p_goni_defconfig @@ -21,6 +21,7 @@ CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="Goni # " +CONFIG_SYS_PBSIZE=384 # CONFIG_CMD_XIMG is not set CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_DFU=y diff --git a/configs/s5pc210_universal_defconfig b/configs/s5pc210_universal_defconfig index e7bd1ae047e..d5860fdda93 100644 --- a/configs/s5pc210_universal_defconfig +++ b/configs/s5pc210_universal_defconfig @@ -22,6 +22,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="Universal # " +CONFIG_SYS_PBSIZE=1024 # CONFIG_CMD_XIMG is not set CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_DFU=y diff --git a/configs/sagem_f@st1704_ram_defconfig b/configs/sagem_f@st1704_ram_defconfig index fd246b15c4d..48dd55cac62 100644 --- a/configs/sagem_f@st1704_ram_defconfig +++ b/configs/sagem_f@st1704_ram_defconfig @@ -19,6 +19,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="F@ST1704 # " CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_PBSIZE=540 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/sam9x60_curiosity_mmc_defconfig b/configs/sam9x60_curiosity_mmc_defconfig index dd884bf8aa6..d0064dee583 100644 --- a/configs/sam9x60_curiosity_mmc_defconfig +++ b/configs/sam9x60_curiosity_mmc_defconfig @@ -27,6 +27,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 CONFIG_CMD_BOOTZ=y CONFIG_CMD_CLK=y CONFIG_CMD_DM=y diff --git a/configs/sam9x60ek_mmc_defconfig b/configs/sam9x60ek_mmc_defconfig index bc0164c38e4..1818a0c7347 100644 --- a/configs/sam9x60ek_mmc_defconfig +++ b/configs/sam9x60ek_mmc_defconfig @@ -27,6 +27,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 CONFIG_CMD_BOOTZ=y CONFIG_CMD_CLK=y CONFIG_CMD_DM=y diff --git a/configs/sam9x60ek_nandflash_defconfig b/configs/sam9x60ek_nandflash_defconfig index 5c34f089e67..9e68cb75ad9 100644 --- a/configs/sam9x60ek_nandflash_defconfig +++ b/configs/sam9x60ek_nandflash_defconfig @@ -27,6 +27,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 CONFIG_CMD_BOOTZ=y CONFIG_CMD_CLK=y CONFIG_CMD_DM=y diff --git a/configs/sam9x60ek_qspiflash_defconfig b/configs/sam9x60ek_qspiflash_defconfig index 1a64b2948f5..45a332d115e 100644 --- a/configs/sam9x60ek_qspiflash_defconfig +++ b/configs/sam9x60ek_qspiflash_defconfig @@ -28,6 +28,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 CONFIG_CMD_BOOTZ=y CONFIG_CMD_CLK=y CONFIG_CMD_DM=y diff --git a/configs/sama5d27_giantboard_defconfig b/configs/sama5d27_giantboard_defconfig index 4977189716f..5d1bad87c27 100644 --- a/configs/sama5d27_giantboard_defconfig +++ b/configs/sama5d27_giantboard_defconfig @@ -37,6 +37,7 @@ CONFIG_BOOTCOMMAND="fatload mmc 0 0x22000000 at91-sama5d27_giantboard.dtb; fatlo # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig index 3e8c7b5d112..1441db5ad57 100644 --- a/configs/sama5d27_som1_ek_mmc1_defconfig +++ b/configs/sama5d27_som1_ek_mmc1_defconfig @@ -33,6 +33,7 @@ CONFIG_BOOTCOMMAND="fatload mmc 1 0x22000000 at91-sama5d27_som1_ek.dtb; fatload # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig index 4a9a1f9bdf6..187aae8a0bd 100644 --- a/configs/sama5d27_som1_ek_mmc_defconfig +++ b/configs/sama5d27_som1_ek_mmc_defconfig @@ -34,6 +34,7 @@ CONFIG_BOOTCOMMAND="fatload mmc 0 0x22000000 at91-sama5d27_som1_ek.dtb; fatload # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig index a20272fe427..52383694808 100644 --- a/configs/sama5d27_som1_ek_qspiflash_defconfig +++ b/configs/sama5d27_som1_ek_qspiflash_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwai # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig index 05a2e412a6d..2ff8871a90e 100644 --- a/configs/sama5d27_wlsom1_ek_mmc_defconfig +++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_DISPLAY_PRINT=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_AT91_MCK_BYPASS=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig index 691b0c21fc0..4cdc2b06f31 100644 --- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig +++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_AT91_MCK_BYPASS=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig index bb70c10e256..abc8e5dbf1d 100644 --- a/configs/sama5d2_icp_mmc_defconfig +++ b/configs/sama5d2_icp_mmc_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_AT91_MCK_BYPASS=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set CONFIG_CMD_DM=y diff --git a/configs/sama5d2_icp_qspiflash_defconfig b/configs/sama5d2_icp_qspiflash_defconfig index 715691844f6..88462465d83 100644 --- a/configs/sama5d2_icp_qspiflash_defconfig +++ b/configs/sama5d2_icp_qspiflash_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x21000000 at91-sama5d2_icp.dtb; fatload mmc CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_CONFIG=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/sama5d2_ptc_ek_mmc_defconfig b/configs/sama5d2_ptc_ek_mmc_defconfig index 542d667d7e2..b2c531740dc 100644 --- a/configs/sama5d2_ptc_ek_mmc_defconfig +++ b/configs/sama5d2_ptc_ek_mmc_defconfig @@ -25,6 +25,7 @@ CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set diff --git a/configs/sama5d2_ptc_ek_nandflash_defconfig b/configs/sama5d2_ptc_ek_nandflash_defconfig index e1887e14b19..9bdb3151f06 100644 --- a/configs/sama5d2_ptc_ek_nandflash_defconfig +++ b/configs/sama5d2_ptc_ek_nandflash_defconfig @@ -25,6 +25,7 @@ CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig index 081f5f9d9c6..e39e283ad93 100644 --- a/configs/sama5d2_xplained_emmc_defconfig +++ b/configs/sama5d2_xplained_emmc_defconfig @@ -32,6 +32,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x22000000 at91-sama5d2_xplained.dtb; fatload mmc 0:1 0x23000000 zImage; bootz 0x23000000 - 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index 255fb0fa7d5..c4e885c54ae 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -34,6 +34,7 @@ CONFIG_BOOTCOMMAND="fatload mmc 1:1 0x22000000 at91-sama5d2_xplained.dtb; fatloa # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig index 5bd4d69332c..667614f67cf 100644 --- a/configs/sama5d2_xplained_qspiflash_defconfig +++ b/configs/sama5d2_xplained_qspiflash_defconfig @@ -35,6 +35,7 @@ CONFIG_BOOTCOMMAND="sf probe 1:0; sf read 0x22000000 0x180000 0x80000; sf read 0 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index b1c27e98518..117143c9601 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set diff --git a/configs/sama5d36ek_cmp_mmc_defconfig b/configs/sama5d36ek_cmp_mmc_defconfig index 256ab76b076..f1141ca905c 100644 --- a/configs/sama5d36ek_cmp_mmc_defconfig +++ b/configs/sama5d36ek_cmp_mmc_defconfig @@ -25,6 +25,7 @@ CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig index d89b539ccf5..dc48fa78fd4 100644 --- a/configs/sama5d36ek_cmp_nandflash_defconfig +++ b/configs/sama5d36ek_cmp_nandflash_defconfig @@ -25,6 +25,7 @@ CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0 CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig index 9fbed91b845..0305025a1e4 100644 --- a/configs/sama5d36ek_cmp_spiflash_defconfig +++ b/configs/sama5d36ek_cmp_spiflash_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x220 CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index b9b938bab77..a477d231be3 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -33,6 +33,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_name}.dtb; fi; fatload mmc 0:1 0x21000000 ${dtb_name}; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index d8dd849dc0d..3d8b32e58ca 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index 2dbf9abf4cd..654b5fd589c 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -35,6 +35,7 @@ CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set CONFIG_CMD_IMLS=y diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index 27ab84c3a37..a951701595a 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set CONFIG_CMD_IMLS=y diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index 6a4230207de..4c6fc3d6523 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index c217d6d439b..795a2470bfc 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -34,6 +34,7 @@ CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_ # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index 5c62a7f6aee..44ee8adc258 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index 60bd2eb8f1b..66280f236a3 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig index c36175c8cec..5cfd45059ff 100644 --- a/configs/sama5d4ek_mmc_defconfig +++ b/configs/sama5d4ek_mmc_defconfig @@ -35,6 +35,7 @@ CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig index 7c544017cfe..7e04a208fcd 100644 --- a/configs/sama5d4ek_nandflash_defconfig +++ b/configs/sama5d4ek_nandflash_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig index 0b86976df9e..5f002b7eca6 100644 --- a/configs/sama5d4ek_spiflash_defconfig +++ b/configs/sama5d4ek_spiflash_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig index 42d96f7c022..a0e2316262e 100644 --- a/configs/sama7g5ek_mmc1_defconfig +++ b/configs/sama7g5ek_mmc1_defconfig @@ -23,6 +23,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fatload mmc 1:1 0x61000000 at91-sama7g5ek.dtb; fatload mmc 1:1 0x62000000 zImage; bootz 0x62000000 - 0x61000000" CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set CONFIG_CMD_MD5SUM=y diff --git a/configs/sama7g5ek_mmc_defconfig b/configs/sama7g5ek_mmc_defconfig index e03a6ba9af4..3b62dd3ba06 100644 --- a/configs/sama7g5ek_mmc_defconfig +++ b/configs/sama7g5ek_mmc_defconfig @@ -23,6 +23,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x61000000 at91-sama7g5ek.dtb; fatload mmc 0:1 0x62000000 zImage; bootz 0x62000000 - 0x61000000" CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set CONFIG_CMD_MD5SUM=y diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig index d9aecfa7bc8..68a10456d9d 100644 --- a/configs/seaboard_defconfig +++ b/configs/seaboard_defconfig @@ -14,6 +14,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_PREBOOT=y CONFIG_SYS_PROMPT="Tegra20 (SeaBoard) # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2086 # CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/seeed_npi_imx6ull_defconfig b/configs/seeed_npi_imx6ull_defconfig index 95cb376e113..8fb5590c1eb 100644 --- a/configs/seeed_npi_imx6ull_defconfig +++ b/configs/seeed_npi_imx6ull_defconfig @@ -26,6 +26,7 @@ CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_MEMTEST=y CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y diff --git a/configs/sfr_nb4-ser_ram_defconfig b/configs/sfr_nb4-ser_ram_defconfig index 890e637d1ef..07f0289724e 100644 --- a/configs/sfr_nb4-ser_ram_defconfig +++ b/configs/sfr_nb4-ser_ram_defconfig @@ -21,6 +21,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="NB4-SER # " CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_PBSIZE=539 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/sifive_unleashed_defconfig b/configs/sifive_unleashed_defconfig index fe2227e596b..a1744744e77 100644 --- a/configs/sifive_unleashed_defconfig +++ b/configs/sifive_unleashed_defconfig @@ -25,6 +25,7 @@ CONFIG_MISC_INIT_R=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_PBSIZE=276 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_CLK=y diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig index 5d070843bc0..c7999f1b9b3 100644 --- a/configs/sifive_unmatched_defconfig +++ b/configs/sifive_unmatched_defconfig @@ -29,6 +29,7 @@ CONFIG_ID_EEPROM=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_EEPROM=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_PWM=y diff --git a/configs/silinux_ek874_defconfig b/configs/silinux_ek874_defconfig index 3cd72a77439..08553661d91 100644 --- a/configs/silinux_ek874_defconfig +++ b/configs/silinux_ek874_defconfig @@ -25,6 +25,7 @@ CONFIG_DEFAULT_FDT_FILE="r8a774c0-ek874.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2068 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/silk_defconfig b/configs/silk_defconfig index 9ae358d97a7..e77578f6d6f 100644 --- a/configs/silk_defconfig +++ b/configs/silk_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=256 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/sipeed_maix_bitm_defconfig b/configs/sipeed_maix_bitm_defconfig index 7d1722c8833..4a8f76e893e 100644 --- a/configs/sipeed_maix_bitm_defconfig +++ b/configs/sipeed_maix_bitm_defconfig @@ -11,6 +11,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run k210_bootcmd" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_MTDIDS_DEFAULT="nor0=spi3:0" CONFIG_MTDPARTS_DEFAULT="nor0:1M(u-boot),0x1000@0xfff000(env)" # CONFIG_NET is not set diff --git a/configs/sipeed_maix_smode_defconfig b/configs/sipeed_maix_smode_defconfig index 0008f5cfa7e..cd4d10504df 100644 --- a/configs/sipeed_maix_smode_defconfig +++ b/configs/sipeed_maix_smode_defconfig @@ -12,6 +12,7 @@ CONFIG_STACK_SIZE=0x100000 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run k210_bootcmd" CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_MTDIDS_DEFAULT="nor0=spi3:0" CONFIG_MTDPARTS_DEFAULT="nor0:1M(u-boot),0x1000@0xfff000(env)" # CONFIG_NET is not set diff --git a/configs/slimbootloader_defconfig b/configs/slimbootloader_defconfig index 5988777fb90..2e938b64867 100644 --- a/configs/slimbootloader_defconfig +++ b/configs/slimbootloader_defconfig @@ -13,6 +13,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_BOOTP_BOOTFILESIZE=y diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig index af848d13c73..717baa2d3ed 100644 --- a/configs/smartweb_defconfig +++ b/configs/smartweb_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_NAND_BASE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=537 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y # CONFIG_CMD_LOADS is not set diff --git a/configs/smdk5250_defconfig b/configs/smdk5250_defconfig index 31332af41d4..f20e9823420 100644 --- a/configs/smdk5250_defconfig +++ b/configs/smdk5250_defconfig @@ -26,6 +26,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SYS_PROMPT="SMDK5250 # " +CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/smdk5420_defconfig b/configs/smdk5420_defconfig index 7f2e42a3a52..1658eea2474 100644 --- a/configs/smdk5420_defconfig +++ b/configs/smdk5420_defconfig @@ -24,6 +24,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SYS_PROMPT="SMDK5420 # " +CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig index 2fe065e9fc5..e03abd11685 100644 --- a/configs/smdkc100_defconfig +++ b/configs/smdkc100_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTCOMMAND="run ubifsboot" CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="SMDKC100 # " +CONFIG_SYS_PBSIZE=384 # CONFIG_CMD_FLASH is not set CONFIG_CMD_ONENAND=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/smdkv310_defconfig b/configs/smdkv310_defconfig index 55528cc5f8e..4b313c91ffe 100644 --- a/configs/smdkv310_defconfig +++ b/configs/smdkv310_defconfig @@ -18,6 +18,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="fatload mmc 0 40007000 uImage; bootm 40007000" # CONFIG_SPL_FRAMEWORK is not set CONFIG_SYS_PROMPT="SMDKV310 # " +CONFIG_SYS_PBSIZE=1024 # CONFIG_CMD_XIMG is not set CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/smegw01_defconfig b/configs/smegw01_defconfig index 7231642c9e3..25a75d1aa5a 100644 --- a/configs/smegw01_defconfig +++ b/configs/smegw01_defconfig @@ -21,6 +21,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="if run loadimage; then run mmcboot; fi; " CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/snapper9260_defconfig b/configs/snapper9260_defconfig index 4c93ba4e057..5e75102aab5 100644 --- a/configs/snapper9260_defconfig +++ b/configs/snapper9260_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 ip=any" CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Snapper> " +CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/snapper9g20_defconfig b/configs/snapper9g20_defconfig index 34f563c3ddf..25c2e19b8e3 100644 --- a/configs/snapper9g20_defconfig +++ b/configs/snapper9g20_defconfig @@ -19,6 +19,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 ip=any" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/sniper_defconfig b/configs/sniper_defconfig index 6d63d30d522..1491cdf1351 100644 --- a/configs/sniper_defconfig +++ b/configs/sniper_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=2 # CONFIG_SPL_FS_EXT4 is not set # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SYS_PROMPT="sniper # " +CONFIG_SYS_PBSIZE=538 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/snow_defconfig b/configs/snow_defconfig index e7cf8d87222..710be757795 100644 --- a/configs/snow_defconfig +++ b/configs/snow_defconfig @@ -28,6 +28,7 @@ CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SYS_PROMPT="snow # " +CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/socfpga_agilex_atf_defconfig b/configs/socfpga_agilex_atf_defconfig index 76b08606764..9fd631bf0dd 100644 --- a/configs/socfpga_agilex_atf_defconfig +++ b/configs/socfpga_agilex_atf_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2082 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig index c8ccb05d4ad..f356466d54c 100644 --- a/configs/socfpga_agilex_defconfig +++ b/configs/socfpga_agilex_defconfig @@ -28,6 +28,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2082 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_agilex_vab_defconfig b/configs/socfpga_agilex_vab_defconfig index d32e9af033e..1ec6d7b1aa6 100644 --- a/configs/socfpga_agilex_vab_defconfig +++ b/configs/socfpga_agilex_vab_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2082 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_n5x_atf_defconfig b/configs/socfpga_n5x_atf_defconfig index 5fa30b9f2d2..5e213d0a0e4 100644 --- a/configs/socfpga_n5x_atf_defconfig +++ b/configs/socfpga_n5x_atf_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_N5X # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2079 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_n5x_defconfig b/configs/socfpga_n5x_defconfig index 7368f6cd6c1..1fd4131108b 100644 --- a/configs/socfpga_n5x_defconfig +++ b/configs/socfpga_n5x_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_N5X # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2079 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_n5x_vab_defconfig b/configs/socfpga_n5x_vab_defconfig index 300eb558f56..89a9025ae71 100644 --- a/configs/socfpga_n5x_vab_defconfig +++ b/configs/socfpga_n5x_vab_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_N5X # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2079 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_stratix10_atf_defconfig b/configs/socfpga_stratix10_atf_defconfig index 50bab708ea0..db486958013 100644 --- a/configs/socfpga_stratix10_atf_defconfig +++ b/configs/socfpga_stratix10_atf_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2085 CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index fe571113c30..2d5315cf743 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -29,6 +29,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x3C00000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2085 CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig index 2abb81c53b4..d902019d6cd 100644 --- a/configs/socrates_defconfig +++ b/configs/socrates_defconfig @@ -21,6 +21,7 @@ CONFIG_PREBOOT="echo;echo Welcome on the ABB Socrates Board;echo" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_REGINFO=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/som-db5800-som-6867_defconfig b/configs/som-db5800-som-6867_defconfig index fb630bddc79..3b96d64b3b6 100644 --- a/configs/som-db5800-som-6867_defconfig +++ b/configs/som-db5800-som-6867_defconfig @@ -28,6 +28,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_GPIO=y CONFIG_CMD_PART=y diff --git a/configs/somlabs_visionsom_6ull_defconfig b/configs/somlabs_visionsom_6ull_defconfig index 772d549cd57..b99266fec74 100644 --- a/configs/somlabs_visionsom_6ull_defconfig +++ b/configs/somlabs_visionsom_6ull_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTCOMMAND="run setfdtfile; run checkbootdev; run loadfdt;if run loadboo CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/sopine_baseboard_defconfig b/configs/sopine_baseboard_defconfig index fbbef7a9f9a..f2220465f39 100644 --- a/configs/sopine_baseboard_defconfig +++ b/configs/sopine_baseboard_defconfig @@ -11,6 +11,7 @@ CONFIG_MMC0_CD_PIN="" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SUN8I_EMAC=y diff --git a/configs/spring_defconfig b/configs/spring_defconfig index 8f4a8a1e5d0..0d145c4e0c6 100644 --- a/configs/spring_defconfig +++ b/configs/spring_defconfig @@ -28,6 +28,7 @@ CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SYS_PROMPT="spring # " +CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/starqltechn_defconfig b/configs/starqltechn_defconfig index 9687afd9caf..4d555ce0f90 100644 --- a/configs/starqltechn_defconfig +++ b/configs/starqltechn_defconfig @@ -15,6 +15,7 @@ CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GPIO=y CONFIG_CMD_BMP=y # CONFIG_NET is not set diff --git a/configs/stemmy_defconfig b/configs/stemmy_defconfig index f49f970bec7..6ae4c39bb4d 100644 --- a/configs/stemmy_defconfig +++ b/configs/stemmy_defconfig @@ -15,6 +15,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fastbootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_CONFIG=y CONFIG_CMD_LICENSE=y CONFIG_CMD_DM=y diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig index 642c199c5cb..a0b1e0dd74b 100644 --- a/configs/stih410-b2260_defconfig +++ b/configs/stih410-b2260_defconfig @@ -16,6 +16,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAS1,115200 CONSOLE=/dev/ttyAS1 consoleblank=0 root=/dev/mmcblk0p2 rootfstype=ext4 rw rootwait mem=992M@0x40000000 vmalloc=256m" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="stih410-b2260 => " +CONFIG_SYS_PBSIZE=1058 CONFIG_CMD_ASKENV=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/stm32746g-eval_defconfig b/configs/stm32746g-eval_defconfig index b2820149a32..b90492685ac 100644 --- a/configs/stm32746g-eval_defconfig +++ b/configs/stm32746g-eval_defconfig @@ -19,6 +19,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SYS_PROMPT="U-Boot > " +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_GPT=y # CONFIG_RANDOM_UUID is not set CONFIG_CMD_MMC=y diff --git a/configs/stm32746g-eval_spl_defconfig b/configs/stm32746g-eval_spl_defconfig index 6ec0b3cf599..7522a0e0b54 100644 --- a/configs/stm32746g-eval_spl_defconfig +++ b/configs/stm32746g-eval_spl_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_XIP_SUPPORT=y CONFIG_SPL_DM_RESET=y CONFIG_SYS_PROMPT="U-Boot > " +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_GPT=y # CONFIG_RANDOM_UUID is not set CONFIG_CMD_MMC=y diff --git a/configs/stm32f429-discovery_defconfig b/configs/stm32f429-discovery_defconfig index c48052ab13a..b6f030ae11b 100644 --- a/configs/stm32f429-discovery_defconfig +++ b/configs/stm32f429-discovery_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot > " +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_IMLS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIMER=y diff --git a/configs/stm32f429-evaluation_defconfig b/configs/stm32f429-evaluation_defconfig index 2217584a3c7..2de8408f364 100644 --- a/configs/stm32f429-evaluation_defconfig +++ b/configs/stm32f429-evaluation_defconfig @@ -14,6 +14,7 @@ CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="U-Boot > " +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_IMLS=y CONFIG_CMD_GPT=y # CONFIG_RANDOM_UUID is not set diff --git a/configs/stm32f469-discovery_defconfig b/configs/stm32f469-discovery_defconfig index 8af71302b25..1a5425d32e6 100644 --- a/configs/stm32f469-discovery_defconfig +++ b/configs/stm32f469-discovery_defconfig @@ -14,6 +14,7 @@ CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="U-Boot > " +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_IMLS=y CONFIG_CMD_GPT=y # CONFIG_RANDOM_UUID is not set diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig index 64d7d18a69a..0473ed6e609 100644 --- a/configs/stm32f746-disco_defconfig +++ b/configs/stm32f746-disco_defconfig @@ -19,6 +19,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SYS_PROMPT="U-Boot > " +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_GPT=y # CONFIG_RANDOM_UUID is not set CONFIG_CMD_MMC=y diff --git a/configs/stm32f746-disco_spl_defconfig b/configs/stm32f746-disco_spl_defconfig index c417a4ff75b..440022d7523 100644 --- a/configs/stm32f746-disco_spl_defconfig +++ b/configs/stm32f746-disco_spl_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_XIP_SUPPORT=y CONFIG_SPL_DM_RESET=y CONFIG_SYS_PROMPT="U-Boot > " +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_GPT=y # CONFIG_RANDOM_UUID is not set CONFIG_CMD_MMC=y diff --git a/configs/stm32f769-disco_defconfig b/configs/stm32f769-disco_defconfig index 89fac36e707..180112a5a06 100644 --- a/configs/stm32f769-disco_defconfig +++ b/configs/stm32f769-disco_defconfig @@ -18,6 +18,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="U-Boot > " +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_GPT=y # CONFIG_RANDOM_UUID is not set CONFIG_CMD_MMC=y diff --git a/configs/stm32f769-disco_spl_defconfig b/configs/stm32f769-disco_spl_defconfig index 92c8490a840..7594eff47c6 100644 --- a/configs/stm32f769-disco_spl_defconfig +++ b/configs/stm32f769-disco_spl_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_XIP_SUPPORT=y CONFIG_SPL_DM_RESET=y CONFIG_SYS_PROMPT="U-Boot > " +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_GPT=y # CONFIG_RANDOM_UUID is not set CONFIG_CMD_MMC=y diff --git a/configs/stm32h743-disco_defconfig b/configs/stm32h743-disco_defconfig index 43e92287592..9b60b3e4469 100644 --- a/configs/stm32h743-disco_defconfig +++ b/configs/stm32h743-disco_defconfig @@ -17,6 +17,7 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_DEFAULT_FDT_FILE="stm32h743i-disco" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="U-Boot > " +CONFIG_SYS_PBSIZE=282 CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/stm32h743-eval_defconfig b/configs/stm32h743-eval_defconfig index d7c1c79bb35..c571ee295b3 100644 --- a/configs/stm32h743-eval_defconfig +++ b/configs/stm32h743-eval_defconfig @@ -17,6 +17,7 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_DEFAULT_FDT_FILE="stm32h743i-eval" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="U-Boot > " +CONFIG_SYS_PBSIZE=282 CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/stm32h750-art-pi_defconfig b/configs/stm32h750-art-pi_defconfig index 7a2709d52fb..e4403a263ae 100644 --- a/configs/stm32h750-art-pi_defconfig +++ b/configs/stm32h750-art-pi_defconfig @@ -23,6 +23,7 @@ CONFIG_DEFAULT_FDT_FILE="stm32h750i-art-pi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SYS_PROMPT="U-Boot > " +CONFIG_SYS_PBSIZE=282 CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig index 7bf24cf0178..122fe363d59 100644 --- a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SYS_PROMPT="STM32MP> " +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig index a2f4b7e6d97..659a0e5a214 100644 --- a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SYS_PROMPT="STM32MP> " +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig index 65bb1c67555..ca0f7334389 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SYS_PROMPT="STM32MP> " +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig index 39f7d9643b1..58ec3633488 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SYS_PROMPT="STM32MP> " +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 1b1c255b981..4710a1daaaf 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_SPI_FLASH_MTD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="STM32MP> " +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index 02b37e14eae..c22db794b12 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -21,6 +21,7 @@ CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="STM32MP> " +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index ca3873c7e6c..19eccec78e3 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -40,6 +40,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y CONFIG_SYS_PROMPT="STM32MP> " +CONFIG_SYS_PBSIZE=1050 # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXPORTENV is not set CONFIG_CMD_EEPROM=y diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index 4e70566e3f1..2768417289c 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -38,6 +38,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y CONFIG_SYS_PROMPT="STM32MP> " +CONFIG_SYS_PBSIZE=1050 # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXPORTENV is not set CONFIG_CMD_EEPROM=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index df31c0fbb10..ca22553bda9 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -22,6 +22,7 @@ CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="STM32MP> " +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/stmark2_defconfig b/configs/stmark2_defconfig index 75369d2a0e1..64ac6614e9e 100644 --- a/configs/stmark2_defconfig +++ b/configs/stmark2_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTCOMMAND="sf probe 0:1 50000000; sf read ${loadaddr} 0x100000 ${kern_s CONFIG_HUSH_PARSER=y # CONFIG_CMDLINE_EDITING is not set CONFIG_SYS_PROMPT="stmark2 $ " +CONFIG_SYS_PBSIZE=283 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_EXPORTENV is not set diff --git a/configs/stout_defconfig b/configs/stout_defconfig index 35c99aaed37..5338ca9cf93 100644 --- a/configs/stout_defconfig +++ b/configs/stout_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=256 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/stv0991_defconfig b/configs/stv0991_defconfig index 27d1f40f3c1..d03d984871a 100644 --- a/configs/stv0991_defconfig +++ b/configs/stv0991_defconfig @@ -23,6 +23,7 @@ CONFIG_BOOTCOMMAND="go 0x40040000" CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="STV0991> " +CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_MEMTEST=y CONFIG_CMD_SPI=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/sun8i_a23_evb_defconfig b/configs/sun8i_a23_evb_defconfig index a3b1d76d8bb..21ea2ba66ef 100644 --- a/configs/sun8i_a23_evb_defconfig +++ b/configs/sun8i_a23_evb_defconfig @@ -9,6 +9,7 @@ CONFIG_USB0_VBUS_PIN="axp_drivebus" CONFIG_USB0_VBUS_DET="axp_vbus_detect" CONFIG_USB1_VBUS_PIN="PH7" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_CONS_INDEX=5 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/sunxi_Gemei_G9_defconfig b/configs/sunxi_Gemei_G9_defconfig index 3fee7c2e50c..8b8a880d45e 100644 --- a/configs/sunxi_Gemei_G9_defconfig +++ b/configs/sunxi_Gemei_G9_defconfig @@ -12,6 +12,7 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig index 3cc5c2dc63f..4b4f692fe4f 100644 --- a/configs/syzygy_hub_defconfig +++ b/configs/syzygy_hub_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x0 CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=2071 CONFIG_CMD_FPGA_LOADBP=y CONFIG_CMD_FPGA_LOADFS=y CONFIG_CMD_FPGA_LOADMK=y diff --git a/configs/tanix_tx6_defconfig b/configs/tanix_tx6_defconfig index 0390347415c..cf34b508a73 100644 --- a/configs/tanix_tx6_defconfig +++ b/configs/tanix_tx6_defconfig @@ -8,3 +8,4 @@ CONFIG_DRAM_CLK=648 CONFIG_MMC0_CD_PIN="PF6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig index e6bef6c974e..902bfb50c75 100644 --- a/configs/taurus_defconfig +++ b/configs/taurus_defconfig @@ -49,6 +49,7 @@ CONFIG_SPL_NAND_BASE=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_SYS_XTRACE is not set # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/tb100_defconfig b/configs/tb100_defconfig index 7b843a71f09..0fe537992f0 100644 --- a/configs/tb100_defconfig +++ b/configs/tb100_defconfig @@ -11,6 +11,7 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_SYS_PROMPT="[tb100]:~# " +CONFIG_SYS_PBSIZE=284 # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 2d9fbd3cc20..1519f7dbce5 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -29,6 +29,7 @@ CONFIG_PRE_CONSOLE_BUFFER=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Matrix U-Boot> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=544 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/tbs_a711_defconfig b/configs/tbs_a711_defconfig index b3c2e69d6cd..a8a9b855cc3 100644 --- a/configs/tbs_a711_defconfig +++ b/configs/tbs_a711_defconfig @@ -13,6 +13,7 @@ CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT" CONFIG_USB0_ID_DET="PH11" CONFIG_AXP_GPIO=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_PBSIZE=1024 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_AXP_DCDC5_VOLT=1200 CONFIG_USB_EHCI_HCD=y diff --git a/configs/tec-ng_defconfig b/configs/tec-ng_defconfig index 29dda19280f..d2b15a2a620 100644 --- a/configs/tec-ng_defconfig +++ b/configs/tec-ng_defconfig @@ -16,6 +16,7 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra30 (TEC-NG) # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2084 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/tec_defconfig b/configs/tec_defconfig index 47cba3c9bfd..f1960307abf 100644 --- a/configs/tec_defconfig +++ b/configs/tec_defconfig @@ -15,6 +15,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra20 (TEC) # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2081 # CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/ten64_tfa_defconfig b/configs/ten64_tfa_defconfig index 77c869406ea..4bbee30b064 100644 --- a/configs/ten64_tfa_defconfig +++ b/configs/ten64_tfa_defconfig @@ -28,6 +28,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_PCI_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_BOOTMENU=y CONFIG_CMD_GREPENV=y diff --git a/configs/teres_i_defconfig b/configs/teres_i_defconfig index e7de85eb506..12e91a58936 100644 --- a/configs/teres_i_defconfig +++ b/configs/teres_i_defconfig @@ -9,6 +9,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB1_VBUS_PIN="PL7" CONFIG_I2C0_ENABLE=y CONFIG_PREBOOT="setenv usb_pgood_delay 2000; usb start" +CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_DM_REGULATOR_FIXED=y diff --git a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig index 25758b434f5..daaefba3642 100644 --- a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig +++ b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig @@ -27,6 +27,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/theadorable-x86-conga-qa3-e3845_defconfig b/configs/theadorable-x86-conga-qa3-e3845_defconfig index 73241aeed09..a62ce3e0a5c 100644 --- a/configs/theadorable-x86-conga-qa3-e3845_defconfig +++ b/configs/theadorable-x86-conga-qa3-e3845_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/theadorable-x86-dfi-bt700_defconfig b/configs/theadorable-x86-dfi-bt700_defconfig index 9dd2d4f387d..a54f34a6cf7 100644 --- a/configs/theadorable-x86-dfi-bt700_defconfig +++ b/configs/theadorable-x86-dfi-bt700_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig index f21ed54646b..1e646868217 100644 --- a/configs/thuban_defconfig +++ b/configs/thuban_defconfig @@ -47,6 +47,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1049 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set diff --git a/configs/thunderx_88xx_defconfig b/configs/thunderx_88xx_defconfig index a74e0856b2f..bb87c891377 100644 --- a/configs/thunderx_88xx_defconfig +++ b/configs/thunderx_88xx_defconfig @@ -22,6 +22,7 @@ CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="ThunderX_88XX> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=544 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_EDITENV is not set diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig index 1cc3248c9d3..e62b7dc8587 100644 --- a/configs/topic_miami_defconfig +++ b/configs/topic_miami_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SYS_PROMPT="zynq-uboot> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=2077 CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig index fb862b0d460..5acf1dec108 100644 --- a/configs/topic_miamilite_defconfig +++ b/configs/topic_miamilite_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SYS_PROMPT="zynq-uboot> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=2077 CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig index 28bf9ecad72..7a51c5c7c4b 100644 --- a/configs/topic_miamiplus_defconfig +++ b/configs/topic_miamiplus_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SYS_PROMPT="zynq-uboot> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=2077 CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y diff --git a/configs/total_compute_defconfig b/configs/total_compute_defconfig index f380a82a205..64a637efc8a 100644 --- a/configs/total_compute_defconfig +++ b/configs/total_compute_defconfig @@ -23,6 +23,7 @@ CONFIG_AVB_BUF_ADDR=0x90000000 CONFIG_AVB_BUF_SIZE=0x10000000 CONFIG_SYS_PROMPT="TOTAL_COMPUTE# " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=544 # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set diff --git a/configs/tqma6dl_mba6_mmc_defconfig b/configs/tqma6dl_mba6_mmc_defconfig index ce7111414c0..a02ee927852 100644 --- a/configs/tqma6dl_mba6_mmc_defconfig +++ b/configs/tqma6dl_mba6_mmc_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTCOMMAND="run mmcboot; run netboot; run panicboot" CONFIG_DEFAULT_FDT_FILE="imx6dl-mba6x.dtb" CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/tqma6dl_mba6_spi_defconfig b/configs/tqma6dl_mba6_spi_defconfig index 4183ffb24aa..8f7e0ac1019 100644 --- a/configs/tqma6dl_mba6_spi_defconfig +++ b/configs/tqma6dl_mba6_spi_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTCOMMAND="sf probe; run mmcboot; run netboot; run panicboot" CONFIG_DEFAULT_FDT_FILE="imx6dl-mba6x.dtb" CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/tqma6q_mba6_mmc_defconfig b/configs/tqma6q_mba6_mmc_defconfig index 031cef82fb3..48822f388c8 100644 --- a/configs/tqma6q_mba6_mmc_defconfig +++ b/configs/tqma6q_mba6_mmc_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTCOMMAND="run mmcboot; run netboot; run panicboot" CONFIG_DEFAULT_FDT_FILE="imx6q-mba6x.dtb" CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/tqma6q_mba6_spi_defconfig b/configs/tqma6q_mba6_spi_defconfig index 19f0ec06f75..ed774262aec 100644 --- a/configs/tqma6q_mba6_spi_defconfig +++ b/configs/tqma6q_mba6_spi_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTCOMMAND="sf probe; run mmcboot; run netboot; run panicboot" CONFIG_DEFAULT_FDT_FILE="imx6q-mba6x.dtb" CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/tqma6s_mba6_mmc_defconfig b/configs/tqma6s_mba6_mmc_defconfig index 96e4d29b648..9400c648121 100644 --- a/configs/tqma6s_mba6_mmc_defconfig +++ b/configs/tqma6s_mba6_mmc_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTCOMMAND="run mmcboot; run netboot; run panicboot" CONFIG_DEFAULT_FDT_FILE="imx6dl-mba6x.dtb" CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/tqma6s_mba6_spi_defconfig b/configs/tqma6s_mba6_spi_defconfig index 1b83dc25221..ddbf9a757e6 100644 --- a/configs/tqma6s_mba6_spi_defconfig +++ b/configs/tqma6s_mba6_spi_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTCOMMAND="sf probe; run mmcboot; run netboot; run panicboot" CONFIG_DEFAULT_FDT_FILE="imx6dl-mba6x.dtb" CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/trats2_defconfig b/configs/trats2_defconfig index 6c43a02cb0c..a000d807801 100644 --- a/configs/trats2_defconfig +++ b/configs/trats2_defconfig @@ -24,6 +24,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="Trats2 # " +CONFIG_SYS_PBSIZE=1024 # CONFIG_CMD_XIMG is not set CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_DFU=y diff --git a/configs/trats_defconfig b/configs/trats_defconfig index 5990dc12263..267ca86c813 100644 --- a/configs/trats_defconfig +++ b/configs/trats_defconfig @@ -23,6 +23,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="Trats # " +CONFIG_SYS_PBSIZE=1024 # CONFIG_CMD_XIMG is not set CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_DFU=y diff --git a/configs/trimslice_defconfig b/configs/trimslice_defconfig index a435fe1926b..03e6e7c5249 100644 --- a/configs/trimslice_defconfig +++ b/configs/trimslice_defconfig @@ -16,6 +16,7 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra20 (TrimSlice) # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2087 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig index ae55980f2c9..331bfe80a50 100644 --- a/configs/tuge1_defconfig +++ b/configs/tuge1_defconfig @@ -132,6 +132,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/tuxx1_defconfig b/configs/tuxx1_defconfig index 9c865c143a5..617bca3b5a1 100644 --- a/configs/tuxx1_defconfig +++ b/configs/tuxx1_defconfig @@ -154,6 +154,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/uDPU_defconfig b/configs/uDPU_defconfig index ed13a2b43a4..8097141ae8c 100644 --- a/configs/uDPU_defconfig +++ b/configs/uDPU_defconfig @@ -25,6 +25,7 @@ CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="uDPU>> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1048 # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig index 9980a6e955e..d3b49bffeb7 100644 --- a/configs/udoo_defconfig +++ b/configs/udoo_defconfig @@ -26,6 +26,7 @@ CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y # CONFIG_CMD_PINMUX is not set diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig index 5885cfe9689..699e68986fa 100644 --- a/configs/udoo_neo_defconfig +++ b/configs/udoo_neo_defconfig @@ -26,6 +26,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y # CONFIG_CMD_PINMUX is not set diff --git a/configs/usb_a9263_dataflash_defconfig b/configs/usb_a9263_dataflash_defconfig index 65f6a5e9714..e6dcd09fb02 100644 --- a/configs/usb_a9263_dataflash_defconfig +++ b/configs/usb_a9263_dataflash_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTCOMMAND="nboot 21000000 0" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_LOADB is not set diff --git a/configs/usbarmory_defconfig b/configs/usbarmory_defconfig index 6141a5cfd01..c01ca017064 100644 --- a/configs/usbarmory_defconfig +++ b/configs/usbarmory_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_MEMTEST_START=0x70000000 CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="run distro_bootcmd; setenv bootargs console=${console} ${bootargs_default}; ext2load mmc 0:1 ${kernel_addr_r} /boot/zImage; ext2load mmc 0:1 ${fdt_addr_r} /boot/${fdtfile}; bootz ${kernel_addr_r} - ${fdt_addr_r}" +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_MEMTEST=y CONFIG_CMD_FUSE=y CONFIG_CMD_I2C=y diff --git a/configs/variscite_dart6ul_defconfig b/configs/variscite_dart6ul_defconfig index cf17f7e4330..7322b12bd17 100644 --- a/configs/variscite_dart6ul_defconfig +++ b/configs/variscite_dart6ul_defconfig @@ -21,6 +21,7 @@ CONFIG_BOOTCOMMAND="run mmc_mmc_fit" CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig index 79e30788388..676ef29b516 100644 --- a/configs/venice2_defconfig +++ b/configs/venice2_defconfig @@ -16,6 +16,7 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra124 (Venice2) # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2086 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/ventana_defconfig b/configs/ventana_defconfig index 4d9fe46b2fa..46d2a55d2c2 100644 --- a/configs/ventana_defconfig +++ b/configs/ventana_defconfig @@ -14,6 +14,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_PREBOOT=y CONFIG_SYS_PROMPT="Tegra20 (Ventana) # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2085 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig index 1f77b3000c5..4489213d50f 100644 --- a/configs/verdin-imx8mm_defconfig +++ b/configs/verdin-imx8mm_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="Verdin iMX8MM # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2081 # CONFIG_BOOTM_NETBSD is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_EXPORTENV is not set diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig index c09d56119c4..c1c7d09c6ff 100644 --- a/configs/verdin-imx8mp_defconfig +++ b/configs/verdin-imx8mp_defconfig @@ -50,6 +50,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="Verdin iMX8MP # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2081 # CONFIG_BOOTM_NETBSD is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_EXPORTENV is not set diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig index 794ce7394cc..0aca0fa3d2d 100644 --- a/configs/vexpress_aemv8a_juno_defconfig +++ b/configs/vexpress_aemv8a_juno_defconfig @@ -15,6 +15,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/sda2 rw rootwait earlycon=pl # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="VExpress64# " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=541 CONFIG_CMD_MEMTEST=y CONFIG_CMD_ARMFLASH=y CONFIG_CMD_PCI=y diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig index 7e4a5cc9bcc..561474c7762 100644 --- a/configs/vexpress_aemv8a_semi_defconfig +++ b/configs/vexpress_aemv8a_semi_defconfig @@ -15,6 +15,7 @@ CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1c090000 debug user_debug=31 l # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="VExpress64# " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=541 CONFIG_CMD_ABOOTIMG=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_ARMFLASH=y diff --git a/configs/vexpress_aemv8r_defconfig b/configs/vexpress_aemv8r_defconfig index 6b470f59a3e..928b64b1660 100644 --- a/configs/vexpress_aemv8r_defconfig +++ b/configs/vexpress_aemv8r_defconfig @@ -12,5 +12,6 @@ CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x9c090000 rootfstype=ext4 root= # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="VExpress64# " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=541 # CONFIG_MMC is not set CONFIG_VIRTIO_MMIO=y diff --git a/configs/vexpress_ca9x4_defconfig b/configs/vexpress_ca9x4_defconfig index e221e8207e4..51cf3629b86 100644 --- a/configs/vexpress_ca9x4_defconfig +++ b/configs/vexpress_ca9x4_defconfig @@ -16,6 +16,7 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd; run bootflash" CONFIG_DEFAULT_FDT_FILE="vexpress-v2p-ca9.dtb" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig index b3c66dfc618..462e4a1bb4f 100644 --- a/configs/vf610twr_defconfig +++ b/configs/vf610twr_defconfig @@ -25,6 +25,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_FUSE=y diff --git a/configs/vf610twr_nand_defconfig b/configs/vf610twr_nand_defconfig index 9cbd62e3c8d..8ab5157cb7b 100644 --- a/configs/vf610twr_nand_defconfig +++ b/configs/vf610twr_nand_defconfig @@ -25,6 +25,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_FUSE=y diff --git a/configs/vinco_defconfig b/configs/vinco_defconfig index e1e1f953826..2743b06e164 100644 --- a/configs/vinco_defconfig +++ b/configs/vinco_defconfig @@ -22,6 +22,7 @@ CONFIG_BOOTCOMMAND="mmc dev 0 0;mmc read ${loadaddr} ${k_offset} ${k_blksize};mm CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="vinco => " +CONFIG_SYS_PBSIZE=282 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set CONFIG_CMD_GPT=y diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig index cf14a0e6c4c..4ee03411e9e 100644 --- a/configs/vining_2000_defconfig +++ b/configs/vining_2000_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/vocore2_defconfig b/configs/vocore2_defconfig index 6240e47b3f2..777b97b82d4 100644 --- a/configs/vocore2_defconfig +++ b/configs/vocore2_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_LICENSE=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index f605ce1cd72..82fb14f1bb9 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/warp7_bl33_defconfig b/configs/warp7_bl33_defconfig index 70f12dc81c2..a50a1c8bc77 100644 --- a/configs/warp7_bl33_defconfig +++ b/configs/warp7_bl33_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then run do_bootscript_hab # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig index 50c4ba0f305..40f9e502e92 100644 --- a/configs/warp7_defconfig +++ b/configs/warp7_defconfig @@ -24,6 +24,7 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then run do_bootscript_hab # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/warp_defconfig b/configs/warp_defconfig index a77148f8c0c..4c9f7051fef 100644 --- a/configs/warp_defconfig +++ b/configs/warp_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/x530_defconfig b/configs/x530_defconfig index 860cb220713..0c2168ba92f 100644 --- a/configs/x530_defconfig +++ b/configs/x530_defconfig @@ -28,6 +28,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_MEMINFO=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/xenguest_arm64_defconfig b/configs/xenguest_arm64_defconfig index 93e0b7f59b6..fec124204b7 100644 --- a/configs/xenguest_arm64_defconfig +++ b/configs/xenguest_arm64_defconfig @@ -12,6 +12,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTDELAY=10 CONFIG_SYS_PROMPT="xenguest# " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1051 # CONFIG_CMD_BDI is not set # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set diff --git a/configs/xilinx_versal_mini_defconfig b/configs/xilinx_versal_mini_defconfig index 153f8e796e9..08db407ebad 100644 --- a/configs/xilinx_versal_mini_defconfig +++ b/configs/xilinx_versal_mini_defconfig @@ -30,6 +30,7 @@ CONFIG_CLOCKS=y # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_PROMPT="Versal> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1049 # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_BOOTM is not set diff --git a/configs/xilinx_versal_mini_emmc0_defconfig b/configs/xilinx_versal_mini_emmc0_defconfig index af7727c2e1c..d88821775a9 100644 --- a/configs/xilinx_versal_mini_emmc0_defconfig +++ b/configs/xilinx_versal_mini_emmc0_defconfig @@ -26,6 +26,7 @@ CONFIG_CLOCKS=y # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_PROMPT="Versal> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1049 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/xilinx_versal_mini_emmc1_defconfig b/configs/xilinx_versal_mini_emmc1_defconfig index 073467212b3..3c3c7b3b977 100644 --- a/configs/xilinx_versal_mini_emmc1_defconfig +++ b/configs/xilinx_versal_mini_emmc1_defconfig @@ -26,6 +26,7 @@ CONFIG_CLOCKS=y # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_PROMPT="Versal> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1049 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index d7dda69496b..78a0cc38280 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -23,6 +23,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_CLOCKS=y CONFIG_SYS_PROMPT="Versal> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2073 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_MEMTEST=y diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index 75afd1c6024..61a748b4882 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=2071 # CONFIG_BOOTM_NETBSD is not set CONFIG_CMD_IMLS=y CONFIG_CMD_THOR_DOWNLOAD=y diff --git a/configs/xilinx_zynqmp_mini_defconfig b/configs/xilinx_zynqmp_mini_defconfig index ff1c60762bf..2053bf325db 100644 --- a/configs/xilinx_zynqmp_mini_defconfig +++ b/configs/xilinx_zynqmp_mini_defconfig @@ -22,6 +22,7 @@ CONFIG_CLOCKS=y # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1049 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index d220e58f63a..217b7bb929b 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -25,6 +25,7 @@ CONFIG_CLOCKS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1049 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index a66e1427194..9ff23936def 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -25,6 +25,7 @@ CONFIG_CLOCKS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1049 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig index e5c4599ce56..48a2ff2806f 100644 --- a/configs/xilinx_zynqmp_mini_nand_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_defconfig @@ -23,6 +23,7 @@ CONFIG_CLOCKS=y # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1049 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/xilinx_zynqmp_mini_nand_single_defconfig b/configs/xilinx_zynqmp_mini_nand_single_defconfig index 6a596292115..a4ee0e64218 100644 --- a/configs/xilinx_zynqmp_mini_nand_single_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_single_defconfig @@ -23,6 +23,7 @@ CONFIG_CLOCKS=y # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1049 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index 00ba942a0fe..e2dca7e24cd 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -25,6 +25,7 @@ CONFIG_CLOCKS=y # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=1049 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/xilinx_zynqmp_r5_defconfig b/configs/xilinx_zynqmp_r5_defconfig index c383f4c0762..1aed7304b5d 100644 --- a/configs/xilinx_zynqmp_r5_defconfig +++ b/configs/xilinx_zynqmp_r5_defconfig @@ -16,6 +16,7 @@ CONFIG_BOOTSTAGE=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="ZynqMP r5> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=284 # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_BOOTSTAGE=y CONFIG_OF_EMBED=y diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 8b1529d8907..698149711ca 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -41,6 +41,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2073 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/xtfpga_defconfig b/configs/xtfpga_defconfig index 5de17c6c8c6..ec7c5637e4a 100644 --- a/configs/xtfpga_defconfig +++ b/configs/xtfpga_defconfig @@ -17,6 +17,7 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_PBSIZE=1049 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CRC32_VERIFY=y diff --git a/configs/zeropi_defconfig b/configs/zeropi_defconfig index 11f3715e6dc..dd0dbc96ef6 100644 --- a/configs/zeropi_defconfig +++ b/configs/zeropi_defconfig @@ -8,6 +8,7 @@ CONFIG_MACPWR="PD6" # CONFIG_VIDEO_DE2 is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y +CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig index 8136e3540af..a26fe838b74 100644 --- a/configs/zynq_cse_nand_defconfig +++ b/configs/zynq_cse_nand_defconfig @@ -26,6 +26,7 @@ CONFIG_SPL_STACK_R=y # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1047 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig index 2920d87ab42..bae6a2fdb81 100644 --- a/configs/zynq_cse_nor_defconfig +++ b/configs/zynq_cse_nor_defconfig @@ -26,6 +26,7 @@ CONFIG_SPL_STACK_R=y # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1047 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 0d1b214ce18..0b858601a1a 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -35,6 +35,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_PBSIZE=1047 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h index 0d235f867f6..a2cfa84397a 100644 --- a/include/config_fallbacks.h +++ b/include/config_fallbacks.h @@ -38,8 +38,4 @@ #endif #endif -#ifndef CONFIG_SYS_PBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#endif - #endif /* __CONFIG_FALLBACKS_H */ diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 2ddd110e443..8b96f816833 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -86,9 +86,6 @@ /* Miscellaneous configurable options */ -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ - + sizeof(CONFIG_SYS_PROMPT) + 16) /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index 1d90505ee25..69b350f502a 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -76,7 +76,5 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) #endif /* __APALIS_IMX8_H */ diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h index acd140ee35e..44af5b44bad 100644 --- a/include/configs/armadillo-800eva.h +++ b/include/configs/armadillo-800eva.h @@ -29,7 +29,6 @@ #define ARMADILLO_800EVA_SDRAM_BASE 0x40000000 #define ARMADILLO_800EVA_SDRAM_SIZE (512 * 1024 * 1024) -#define CONFIG_SYS_PBSIZE 256 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* SCIF */ diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index 2d30b976985..0a5fab36f44 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -31,12 +31,6 @@ */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -/* - * Print Buffer Size - */ -#define CONFIG_SYS_PBSIZE \ - (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) - /* * Boot Argument Buffer Size */ diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h index 0cdb35b56a9..cb90c898658 100644 --- a/include/configs/bcm_ns3.h +++ b/include/configs/bcm_ns3.h @@ -30,8 +30,6 @@ #define CONFIG_SYS_NS16550_CLK 25000000 #define CONFIG_SYS_CBSIZE SZ_1K -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h index 9feb9e5ae05..127b540c623 100644 --- a/include/configs/colibri-imx8x.h +++ b/include/configs/colibri-imx8x.h @@ -109,8 +109,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) /* Generic Timer Definitions */ diff --git a/include/configs/display5.h b/include/configs/display5.h index 9ebfd4bd2a0..d697b7dd817 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -287,9 +287,6 @@ #undef CONFIG_SYS_CBSIZE #define CONFIG_SYS_CBSIZE 2048 -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_STANDALONE_LOAD_ADDR 0x10001000 diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h index dd1cbd7ab84..a6b0f3600e6 100644 --- a/include/configs/exynos-common.h +++ b/include/configs/exynos-common.h @@ -27,7 +27,6 @@ /* Miscellaneous configurable options */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE diff --git a/include/configs/exynos7420-common.h b/include/configs/exynos7420-common.h index 5658da474cb..7798023d6fc 100644 --- a/include/configs/exynos7420-common.h +++ b/include/configs/exynos7420-common.h @@ -17,7 +17,6 @@ /* Miscellaneous configurable options */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE diff --git a/include/configs/exynos78x0-common.h b/include/configs/exynos78x0-common.h index ec43e133dde..a4ac27b1876 100644 --- a/include/configs/exynos78x0-common.h +++ b/include/configs/exynos78x0-common.h @@ -20,7 +20,6 @@ /* Miscellaneous configurable options */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE diff --git a/include/configs/gazerbeam.h b/include/configs/gazerbeam.h index 60347335e8a..bf222f76589 100644 --- a/include/configs/gazerbeam.h +++ b/include/configs/gazerbeam.h @@ -60,8 +60,6 @@ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index 347845f1d50..6c0c87490f9 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -11,7 +11,6 @@ /* Board Clock , P1 clock frequency (XTAL=13.33MHz) */ /* Miscellaneous */ -#define CONFIG_SYS_PBSIZE 256 /* Internal RAM Size (RZ/A1=3M, RZ/A1M=5M, RZ/A1H=10M) */ #define CONFIG_SYS_SDRAM_BASE 0x20000000 diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index d3adee64cd5..7a55433642d 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -150,8 +150,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) /* USDHC */ diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h index d2c8e641475..102f8f20825 100644 --- a/include/configs/imx8mm_beacon.h +++ b/include/configs/imx8mm_beacon.h @@ -96,6 +96,4 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) #endif diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h index 9b03a576aa1..201d2c659cb 100644 --- a/include/configs/imx8mm_data_modul_edm_sbc.h +++ b/include/configs/imx8mm_data_modul_edm_sbc.h @@ -44,8 +44,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE \ - (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* PHY needs a longer autonegotiation timeout after reset */ #define PHY_ANEG_TIMEOUT 20000 diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index c4a433b93ad..307bf53d4f6 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -73,8 +73,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_FEC_MXC_PHYADDR 0 diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index 13df41aa9bb..3ee227a2fc7 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -71,8 +71,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) /* USDHC */ #define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index 41ffe309017..2fa8d994d2e 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -107,7 +107,5 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) #endif diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h index f23581b8337..62ef52e6d99 100644 --- a/include/configs/imx8mn_beacon.h +++ b/include/configs/imx8mn_beacon.h @@ -112,6 +112,4 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) #endif diff --git a/include/configs/imx8mn_bsh_smm_s2_common.h b/include/configs/imx8mn_bsh_smm_s2_common.h index 9373fab7fcc..12c332eab79 100644 --- a/include/configs/imx8mn_bsh_smm_s2_common.h +++ b/include/configs/imx8mn_bsh_smm_s2_common.h @@ -50,8 +50,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) /* I2C */ diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index b5918d48afa..f5586999fa8 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -80,7 +80,5 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) #endif diff --git a/include/configs/imx8mn_var_som.h b/include/configs/imx8mn_var_som.h index 0d3729e32ab..02bb9584f59 100644 --- a/include/configs/imx8mn_var_som.h +++ b/include/configs/imx8mn_var_som.h @@ -69,8 +69,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) /* USDHC */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index c00aec9fa1e..a32d9860cf1 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -103,7 +103,5 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) #endif diff --git a/include/configs/imx8mp_dhcom_pdk2.h b/include/configs/imx8mp_dhcom_pdk2.h index c4ea430dff4..a2226e05eb3 100644 --- a/include/configs/imx8mp_dhcom_pdk2.h +++ b/include/configs/imx8mp_dhcom_pdk2.h @@ -44,8 +44,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE \ - (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* PHY needs a longer autonegotiation timeout after reset */ #define PHY_ANEG_TIMEOUT 20000 diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index ef8ec35847e..f029c6dea50 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -84,7 +84,5 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) #endif diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index 29229be32a1..d64353206f3 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -171,8 +171,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h index d68c2cfae18..5ac72e6ba6c 100644 --- a/include/configs/imx8mp_venice.h +++ b/include/configs/imx8mp_venice.h @@ -103,8 +103,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) /* FEC */ #define FEC_QUIRK_ENET_MAC diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index fd3f3b0435c..95aaedecd47 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -76,8 +76,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 768a62920b8..d39c9d3d759 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -82,8 +82,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index 09b25b31c04..c0e4b8645d6 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -110,8 +110,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index a560b5bd36b..e6903a68af4 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -73,7 +73,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* Using ULP WDOG for reset */ #define WDOG_BASE_ADDR WDG3_RBASE diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h index 7e99490e527..2ea8b82dd09 100644 --- a/include/configs/kzm9g.h +++ b/include/configs/kzm9g.h @@ -23,7 +23,6 @@ #define CONFIG_SYS_MAX_FLASH_SECT (512) /* prompt */ -#define CONFIG_SYS_PBSIZE 256 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* SCIF */ diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index 272d7e1496a..15433cd901e 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -177,8 +177,6 @@ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE \ - (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_LS102XA_STREAM_ID diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index 5c2ed14bfd5..151501fe9b2 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -60,8 +60,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */ #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 41b72c9508c..b7373fb3108 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -150,8 +150,6 @@ unsigned long long get_qixis_addr(void); /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */ #ifdef CONFIG_SPL diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index ed65f6c364e..cc9f863680d 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -117,8 +117,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */ #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ diff --git a/include/configs/mt7622.h b/include/configs/mt7622.h index 146bca748da..32db4bc5db0 100644 --- a/include/configs/mt7622.h +++ b/include/configs/mt7622.h @@ -13,8 +13,6 @@ #define CONFIG_SYS_BOOTM_LEN SZ_64M #define CONFIG_SYS_CBSIZE SZ_1K -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_NONCACHED_MEMORY SZ_1M /* Uboot definition */ diff --git a/include/configs/mt7623.h b/include/configs/mt7623.h index be39c69f605..0ee55c2275e 100644 --- a/include/configs/mt7623.h +++ b/include/configs/mt7623.h @@ -15,8 +15,6 @@ #define CONFIG_SYS_BOOTM_LEN SZ_64M #define CONFIG_SYS_CBSIZE SZ_1K -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_NONCACHED_MEMORY SZ_1M diff --git a/include/configs/mt7629.h b/include/configs/mt7629.h index f5b3cf86c71..d937d87021f 100644 --- a/include/configs/mt7629.h +++ b/include/configs/mt7629.h @@ -15,8 +15,6 @@ #define CONFIG_SYS_BOOTM_LEN SZ_64M #define CONFIG_SYS_CBSIZE SZ_1K -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_NONCACHED_MEMORY SZ_1M diff --git a/include/configs/mx6memcal.h b/include/configs/mx6memcal.h index 42d5e248ba1..6991221f601 100644 --- a/include/configs/mx6memcal.h +++ b/include/configs/mx6memcal.h @@ -25,8 +25,6 @@ #error please define serial console (CONFIG_SERIAL_CONSOLE_UARTx) #endif -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + 16) - /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index abba909790f..74b00901ffd 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -89,8 +89,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/poleg.h b/include/configs/poleg.h index f1b54248b62..0771f9408a3 100644 --- a/include/configs/poleg.h +++ b/include/configs/poleg.h @@ -12,7 +12,6 @@ #endif #define CONFIG_SYS_CBSIZE 256 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_BOOTMAPSZ (0x30 << 20) #define CONFIG_SYS_SDRAM_BASE 0x0 #define CONFIG_SYS_INIT_SP_ADDR (0x00008000 - GENERATED_GBL_DATA_SIZE) diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h index efb3075acfb..583aa9d09bd 100644 --- a/include/configs/presidio_asic.h +++ b/include/configs/presidio_asic.h @@ -43,8 +43,6 @@ /* Console I/O Buffer Size */ #define CONFIG_SYS_CBSIZE 256 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define KSEG1_ATU_XLAT(x) (x) diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index 54674094e83..ae712629df3 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -9,8 +9,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x8C000000 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 -#define CONFIG_SYS_PBSIZE 256 - /* Address of u-boot image in Flash */ #define CONFIG_SYS_MONITOR_LEN (256 * 1024) #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h index 9bc24434980..b4d2a5252f5 100644 --- a/include/configs/rcar-gen2-common.h +++ b/include/configs/rcar-gen2-common.h @@ -19,7 +19,6 @@ #endif /* console */ -#define CONFIG_SYS_PBSIZE 256 #define CONFIG_SYS_BAUDRATE_TABLE { 38400, 115200 } #define CONFIG_SYS_SDRAM_BASE (RCAR_GEN2_SDRAM_BASE) diff --git a/include/configs/s5p4418_nanopi2.h b/include/configs/s5p4418_nanopi2.h index 0e64a15bc86..e2bdc0957bb 100644 --- a/include/configs/s5p4418_nanopi2.h +++ b/include/configs/s5p4418_nanopi2.h @@ -79,9 +79,6 @@ /* Console I/O Buffer Size */ #define CONFIG_SYS_CBSIZE 1024 -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 3b4347dd00b..97ff46d5ad7 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -121,8 +121,6 @@ "opts=always_resume=1\0" \ "dfu_alt_info=" CONFIG_DFU_ALT "\0" -#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ - /* Goni has 3 banks of DRAM, but swap the bank */ #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* OneDRAM Bank #0 */ #define PHYS_SDRAM_1_SIZE (80 << 20) /* 80 MB in Bank #0 */ diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index 8eea45450b5..df5fa99324f 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -87,7 +87,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ /* SMDKC100 has 1 banks of DRAM, we use only one in U-Boot */ #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* SDRAM Bank #1 */ diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 5459f892ee6..adaa39bbb2b 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -21,8 +21,6 @@ * U-Boot console configurations */ #define CONFIG_SYS_CBSIZE 2048 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Extend size of kernel image for uncompression */ diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index ee2c58aeb9c..49899203142 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -46,9 +46,6 @@ #define CONFIG_PRAM 2048 /* 2048 KB */ #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 068340aa964..bae5620cbb1 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -103,7 +103,6 @@ * Miscellaneous configurable options */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ /* standalone support */ #define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h index 19fa02ce5cc..44c0606543a 100644 --- a/include/configs/synquacer.h +++ b/include/configs/synquacer.h @@ -41,7 +41,6 @@ #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE} #define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* Since U-Boot 64bit PCIe support is limited, disable 64bit MMIO support */ diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 8bad995b080..dea6f8892fc 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -40,7 +40,6 @@ * than 256 and so it is not possible to edit it */ #define CONFIG_SYS_CBSIZE (1024 * 2) /* Console I/O Buffer Size */ -/* Print Buffer Size */ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 5c33baaa5e7..3d1fd167bee 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -89,8 +89,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) /* ENET */ #define CONFIG_FEC_MXC_PHYADDR 7 diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index 68a93c639c9..f15bebf55d2 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -105,7 +105,5 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) #endif /* __VERDIN_IMX8MP_H */ diff --git a/include/configs/xenguest_arm64.h b/include/configs/xenguest_arm64.h index d42adcefd7f..ccd4049f266 100644 --- a/include/configs/xenguest_arm64.h +++ b/include/configs/xenguest_arm64.h @@ -16,8 +16,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ -- GitLab From d31466b382dd05a5439d12d69ddd6e8eaff0e5e6 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 11 May 2022 18:01:06 -0400 Subject: [PATCH 003/581] Convert CONFIG_SYS_CBSIZE to Kconfig This converts the following to Kconfig: CONFIG_SYS_CBSIZE Signed-off-by: Tom Rini --- README | 2 -- cmd/Kconfig | 9 +++++++++ configs/10m50_defconfig | 1 + configs/3c120_defconfig | 1 + configs/SBx81LIFKW_defconfig | 1 + configs/SBx81LIFXCAT_defconfig | 1 + configs/alt_defconfig | 1 + configs/ap121_defconfig | 1 + configs/ap143_defconfig | 1 + configs/ap152_defconfig | 1 + configs/apalis-imx8_defconfig | 1 + configs/apalis-tk1_defconfig | 1 + configs/apalis_imx6_defconfig | 1 + configs/apalis_t30_defconfig | 1 + configs/apple_m1_defconfig | 1 + configs/armadillo-800eva_defconfig | 1 + configs/at91sam9260ek_dataflash_cs0_defconfig | 1 + configs/at91sam9260ek_dataflash_cs1_defconfig | 1 + configs/at91sam9260ek_nandflash_defconfig | 1 + configs/at91sam9261ek_dataflash_cs0_defconfig | 1 + configs/at91sam9261ek_dataflash_cs3_defconfig | 1 + configs/at91sam9261ek_nandflash_defconfig | 1 + configs/at91sam9263ek_dataflash_cs0_defconfig | 1 + configs/at91sam9263ek_dataflash_defconfig | 1 + configs/at91sam9263ek_nandflash_defconfig | 1 + configs/at91sam9263ek_norflash_boot_defconfig | 1 + configs/at91sam9263ek_norflash_defconfig | 1 + configs/at91sam9g10ek_dataflash_cs0_defconfig | 1 + configs/at91sam9g10ek_dataflash_cs3_defconfig | 1 + configs/at91sam9g10ek_nandflash_defconfig | 1 + configs/at91sam9g20ek_2mmc_defconfig | 1 + configs/at91sam9g20ek_2mmc_nandflash_defconfig | 1 + configs/at91sam9g20ek_dataflash_cs0_defconfig | 1 + configs/at91sam9g20ek_dataflash_cs1_defconfig | 1 + configs/at91sam9g20ek_nandflash_defconfig | 1 + configs/at91sam9m10g45ek_mmc_defconfig | 1 + configs/at91sam9m10g45ek_nandflash_defconfig | 1 + configs/at91sam9n12ek_mmc_defconfig | 1 + configs/at91sam9n12ek_nandflash_defconfig | 1 + configs/at91sam9n12ek_spiflash_defconfig | 1 + configs/at91sam9rlek_dataflash_defconfig | 1 + configs/at91sam9rlek_mmc_defconfig | 1 + configs/at91sam9rlek_nandflash_defconfig | 1 + configs/at91sam9x5ek_dataflash_defconfig | 1 + configs/at91sam9x5ek_mmc_defconfig | 1 + configs/at91sam9x5ek_nandflash_defconfig | 1 + configs/at91sam9x5ek_spiflash_defconfig | 1 + configs/at91sam9xeek_dataflash_cs0_defconfig | 1 + configs/at91sam9xeek_dataflash_cs1_defconfig | 1 + configs/at91sam9xeek_nandflash_defconfig | 1 + configs/axm_defconfig | 1 + configs/axs101_defconfig | 1 + configs/axs103_defconfig | 1 + configs/bcm7260_defconfig | 1 + configs/bcm7445_defconfig | 1 + configs/bcm963158_ram_defconfig | 1 + configs/bcm96753ref_ram_defconfig | 1 + configs/bcm968360bg_ram_defconfig | 1 + configs/bcm968380gerg_ram_defconfig | 1 + configs/bcm968580xref_ram_defconfig | 1 + configs/bk4r1_defconfig | 1 + configs/blanche_defconfig | 1 + configs/boston32r2_defconfig | 1 + configs/boston32r2el_defconfig | 1 + configs/boston32r6_defconfig | 1 + configs/boston32r6el_defconfig | 1 + configs/boston64r2_defconfig | 1 + configs/boston64r2el_defconfig | 1 + configs/boston64r6_defconfig | 1 + configs/boston64r6el_defconfig | 1 + configs/brppt1_mmc_defconfig | 1 + configs/brppt1_nand_defconfig | 1 + configs/brppt1_spi_defconfig | 1 + configs/brsmarc1_defconfig | 1 + configs/brxre1_defconfig | 1 + configs/cgtqmx8_defconfig | 1 + configs/colibri-imx8x_defconfig | 1 + configs/colibri_imx6_defconfig | 1 + configs/colibri_t20_defconfig | 1 + configs/colibri_t30_defconfig | 1 + configs/comtrend_ar5315u_ram_defconfig | 1 + configs/comtrend_ar5387un_ram_defconfig | 1 + configs/comtrend_ct5361_ram_defconfig | 1 + configs/comtrend_vr3032u_ram_defconfig | 1 + configs/comtrend_wap5813n_ram_defconfig | 1 + configs/cortina_presidio-asic-base_defconfig | 1 + configs/cortina_presidio-asic-emmc_defconfig | 1 + configs/cortina_presidio-asic-pnand_defconfig | 1 + configs/corvus_defconfig | 1 + configs/deneb_defconfig | 1 + configs/display5_defconfig | 1 + configs/display5_factory_defconfig | 1 + configs/dragonboard410c_defconfig | 1 + configs/dragonboard820c_defconfig | 1 + configs/durian_defconfig | 1 + configs/ea-lpc3250devkitv2_defconfig | 1 + configs/eb_cpu5282_defconfig | 1 + configs/eb_cpu5282_internal_defconfig | 1 + configs/edison_defconfig | 1 + configs/emsdp_defconfig | 1 + configs/ethernut5_defconfig | 1 + configs/evb-ast2500_defconfig | 1 + configs/evb-ast2600_defconfig | 1 + configs/gardena-smart-gateway-at91sam_defconfig | 1 + configs/gardena-smart-gateway-mt7688_defconfig | 1 + configs/gazerbeam_defconfig | 1 + configs/giedi_defconfig | 1 + configs/gose_defconfig | 1 + configs/grpeach_defconfig | 1 + configs/gurnard_defconfig | 1 + configs/hikey960_defconfig | 1 + configs/hikey_defconfig | 1 + configs/hsdk_4xd_defconfig | 1 + configs/hsdk_defconfig | 1 + configs/huawei_hg556a_ram_defconfig | 1 + configs/ids8313_defconfig | 1 + configs/imx8mm-cl-iot-gate-optee_defconfig | 1 + configs/imx8mm-cl-iot-gate_defconfig | 1 + configs/imx8mm-icore-mx8mm-ctouch2_defconfig | 1 + configs/imx8mm-icore-mx8mm-edimm2.2_defconfig | 1 + configs/imx8mm-mx8menlo_defconfig | 1 + configs/imx8mm_beacon_defconfig | 1 + configs/imx8mm_data_modul_edm_sbc_defconfig | 1 + configs/imx8mm_evk_defconfig | 1 + configs/imx8mm_venice_defconfig | 1 + configs/imx8mn_beacon_2g_defconfig | 1 + configs/imx8mn_beacon_defconfig | 1 + configs/imx8mn_bsh_smm_s2_defconfig | 1 + configs/imx8mn_bsh_smm_s2pro_defconfig | 1 + configs/imx8mn_ddr4_evk_defconfig | 1 + configs/imx8mn_evk_defconfig | 1 + configs/imx8mn_var_som_defconfig | 1 + configs/imx8mn_venice_defconfig | 1 + configs/imx8mp_dhcom_pdk2_defconfig | 1 + configs/imx8mp_evk_defconfig | 1 + configs/imx8mp_rsb3720a1_4G_defconfig | 1 + configs/imx8mp_rsb3720a1_6G_defconfig | 1 + configs/imx8mp_venice_defconfig | 1 + configs/imx8qm_mek_defconfig | 1 + configs/imx8qm_rom7720_a1_4G_defconfig | 1 + configs/imx8qxp_mek_defconfig | 1 + configs/imx8ulp_evk_defconfig | 1 + configs/imxrt1020-evk_defconfig | 1 + configs/imxrt1050-evk_defconfig | 1 + configs/integratorap_cm720t_defconfig | 1 + configs/integratorap_cm920t_defconfig | 1 + configs/integratorap_cm926ejs_defconfig | 1 + configs/integratorap_cm946es_defconfig | 1 + configs/integratorcp_cm1136_defconfig | 1 + configs/integratorcp_cm920t_defconfig | 1 + configs/integratorcp_cm926ejs_defconfig | 1 + configs/integratorcp_cm946es_defconfig | 1 + configs/iot_devkit_defconfig | 1 + configs/km_kirkwood_128m16_defconfig | 1 + configs/km_kirkwood_defconfig | 1 + configs/km_kirkwood_pci_defconfig | 1 + configs/kmcent2_defconfig | 1 + configs/kmcoge5ne_defconfig | 1 + configs/kmcoge5un_defconfig | 1 + configs/kmeter1_defconfig | 1 + configs/kmnusa_defconfig | 1 + configs/kmopti2_defconfig | 1 + configs/kmsupx5_defconfig | 1 + configs/kmsuse2_defconfig | 1 + configs/kmtegr1_defconfig | 1 + configs/kmtepr2_defconfig | 1 + configs/koelsch_defconfig | 1 + configs/kontron-sl-mx8mm_defconfig | 1 + configs/kontron_pitx_imx8m_defconfig | 1 + configs/kontron_sl28_defconfig | 1 + configs/kzm9g_defconfig | 1 + configs/lager_defconfig | 1 + configs/linkit-smart-7688_defconfig | 1 + configs/ls1021aiot_qspi_defconfig | 1 + configs/ls1021aiot_sdcard_defconfig | 1 + configs/ls1021aqds_ddr4_nor_defconfig | 1 + configs/ls1021aqds_ddr4_nor_lpuart_defconfig | 1 + configs/ls1021aqds_nand_defconfig | 1 + configs/ls1021aqds_nor_SECURE_BOOT_defconfig | 1 + configs/ls1021aqds_nor_defconfig | 1 + configs/ls1021aqds_nor_lpuart_defconfig | 1 + configs/ls1021aqds_qspi_defconfig | 1 + configs/ls1021aqds_sdcard_ifc_defconfig | 1 + configs/ls1021aqds_sdcard_qspi_defconfig | 1 + configs/ls1021atsn_qspi_defconfig | 1 + configs/ls1021atsn_sdcard_defconfig | 1 + configs/ls1021atwr_nor_SECURE_BOOT_defconfig | 1 + configs/ls1021atwr_nor_defconfig | 1 + configs/ls1021atwr_nor_lpuart_defconfig | 1 + configs/ls1021atwr_qspi_defconfig | 1 + configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig | 1 + configs/ls1021atwr_sdcard_ifc_defconfig | 1 + configs/ls1021atwr_sdcard_qspi_defconfig | 1 + configs/m53menlo_defconfig | 1 + configs/malta64_defconfig | 1 + configs/malta64el_defconfig | 1 + configs/malta_defconfig | 1 + configs/maltael_defconfig | 1 + configs/meesc_dataflash_defconfig | 1 + configs/meesc_defconfig | 1 + configs/microblaze-generic_defconfig | 1 + configs/microchip_mpfs_icicle_defconfig | 1 + configs/mk808_defconfig | 1 + configs/mscc_jr2_defconfig | 1 + configs/mscc_luton_defconfig | 1 + configs/mscc_ocelot_defconfig | 1 + configs/mscc_serval_defconfig | 1 + configs/mscc_servalt_defconfig | 1 + configs/mt8183_pumpkin_defconfig | 1 + configs/mt8512_bm1_emmc_defconfig | 1 + configs/mt8516_pumpkin_defconfig | 1 + configs/mt8518_ap1_emmc_defconfig | 1 + configs/mx51evk_defconfig | 1 + configs/mx53ppd_defconfig | 1 + configs/mx7ulp_com_defconfig | 1 + configs/mx7ulp_evk_defconfig | 1 + configs/mx7ulp_evk_plugin_defconfig | 1 + configs/netgear_cg3100d_ram_defconfig | 1 + configs/netgear_dgnd3700v2_ram_defconfig | 1 + configs/nokia_rx51_defconfig | 1 + configs/nsim_700_defconfig | 1 + configs/nsim_700be_defconfig | 1 + configs/nsim_hs38_defconfig | 1 + configs/nsim_hs38be_defconfig | 1 + configs/octeon_ebb7304_defconfig | 1 + configs/octeon_nic23_defconfig | 1 + configs/openpiton_riscv64_defconfig | 1 + configs/openpiton_riscv64_spl_defconfig | 1 + configs/pcm052_defconfig | 1 + configs/pg_wcom_expu1_defconfig | 1 + configs/pg_wcom_expu1_update_defconfig | 1 + configs/pg_wcom_seli8_defconfig | 1 + configs/pg_wcom_seli8_update_defconfig | 1 + configs/phycore-imx8mm_defconfig | 1 + configs/phycore-imx8mp_defconfig | 1 + configs/pm9261_defconfig | 1 + configs/pm9263_defconfig | 1 + configs/pm9g45_defconfig | 1 + configs/poleg_evb_defconfig | 1 + configs/pomelo_defconfig | 1 + configs/poplar_defconfig | 1 + configs/porter_defconfig | 1 + configs/qemu-riscv32_defconfig | 1 + configs/qemu-riscv32_smode_defconfig | 1 + configs/qemu-riscv32_spl_defconfig | 1 + configs/qemu-riscv64_defconfig | 1 + configs/qemu-riscv64_smode_defconfig | 1 + configs/qemu-riscv64_spl_defconfig | 1 + configs/qemu_arm64_defconfig | 1 + configs/qemu_arm_defconfig | 1 + configs/r2dplus_defconfig | 1 + configs/s5p_goni_defconfig | 1 + configs/sagem_f@st1704_ram_defconfig | 1 + configs/sam9x60_curiosity_mmc_defconfig | 1 + configs/sam9x60ek_mmc_defconfig | 1 + configs/sam9x60ek_nandflash_defconfig | 1 + configs/sam9x60ek_qspiflash_defconfig | 1 + configs/sama5d27_giantboard_defconfig | 1 + configs/sama5d27_som1_ek_mmc1_defconfig | 1 + configs/sama5d27_som1_ek_mmc_defconfig | 1 + configs/sama5d27_som1_ek_qspiflash_defconfig | 1 + configs/sama5d27_wlsom1_ek_mmc_defconfig | 1 + configs/sama5d27_wlsom1_ek_qspiflash_defconfig | 1 + configs/sama5d2_icp_mmc_defconfig | 1 + configs/sama5d2_icp_qspiflash_defconfig | 1 + configs/sama5d2_ptc_ek_mmc_defconfig | 1 + configs/sama5d2_ptc_ek_nandflash_defconfig | 1 + configs/sama5d2_xplained_emmc_defconfig | 1 + configs/sama5d2_xplained_mmc_defconfig | 1 + configs/sama5d2_xplained_qspiflash_defconfig | 1 + configs/sama5d2_xplained_spiflash_defconfig | 1 + configs/sama5d36ek_cmp_mmc_defconfig | 1 + configs/sama5d36ek_cmp_nandflash_defconfig | 1 + configs/sama5d36ek_cmp_spiflash_defconfig | 1 + configs/sama5d3_xplained_mmc_defconfig | 1 + configs/sama5d3_xplained_nandflash_defconfig | 1 + configs/sama5d3xek_mmc_defconfig | 1 + configs/sama5d3xek_nandflash_defconfig | 1 + configs/sama5d3xek_spiflash_defconfig | 1 + configs/sama5d4_xplained_mmc_defconfig | 1 + configs/sama5d4_xplained_nandflash_defconfig | 1 + configs/sama5d4_xplained_spiflash_defconfig | 1 + configs/sama5d4ek_mmc_defconfig | 1 + configs/sama5d4ek_nandflash_defconfig | 1 + configs/sama5d4ek_spiflash_defconfig | 1 + configs/sama7g5ek_mmc1_defconfig | 1 + configs/sama7g5ek_mmc_defconfig | 1 + configs/sfr_nb4-ser_ram_defconfig | 1 + configs/sifive_unleashed_defconfig | 1 + configs/sifive_unmatched_defconfig | 1 + configs/silk_defconfig | 1 + configs/sipeed_maix_bitm_defconfig | 1 + configs/sipeed_maix_smode_defconfig | 1 + configs/smartweb_defconfig | 1 + configs/smdkc100_defconfig | 1 + configs/snapper9260_defconfig | 1 + configs/snapper9g20_defconfig | 1 + configs/sniper_defconfig | 1 + configs/starqltechn_defconfig | 1 + configs/stemmy_defconfig | 1 + configs/stm32h743-disco_defconfig | 1 + configs/stm32h743-eval_defconfig | 1 + configs/stm32h750-art-pi_defconfig | 1 + configs/stout_defconfig | 1 + configs/taurus_defconfig | 1 + configs/tb100_defconfig | 1 + configs/thunderx_88xx_defconfig | 1 + configs/total_compute_defconfig | 1 + configs/tuge1_defconfig | 1 + configs/tuxx1_defconfig | 1 + configs/usb_a9263_dataflash_defconfig | 1 + configs/verdin-imx8mm_defconfig | 1 + configs/verdin-imx8mp_defconfig | 1 + configs/vexpress_aemv8a_juno_defconfig | 1 + configs/vexpress_aemv8a_semi_defconfig | 1 + configs/vexpress_aemv8r_defconfig | 1 + configs/vexpress_ca9x4_defconfig | 1 + configs/vf610twr_defconfig | 1 + configs/vf610twr_nand_defconfig | 1 + configs/vinco_defconfig | 1 + configs/vocore2_defconfig | 1 + configs/x530_defconfig | 1 + configs/xilinx_versal_mini_defconfig | 1 + configs/xilinx_versal_mini_emmc0_defconfig | 1 + configs/xilinx_versal_mini_emmc1_defconfig | 1 + configs/xilinx_zynqmp_mini_defconfig | 1 + configs/xilinx_zynqmp_mini_emmc0_defconfig | 1 + configs/xilinx_zynqmp_mini_emmc1_defconfig | 1 + configs/xilinx_zynqmp_mini_nand_defconfig | 1 + configs/xilinx_zynqmp_mini_nand_single_defconfig | 1 + configs/xilinx_zynqmp_mini_qspi_defconfig | 1 + configs/xilinx_zynqmp_r5_defconfig | 1 + configs/zynq_cse_nand_defconfig | 1 + configs/zynq_cse_nor_defconfig | 1 + configs/zynq_cse_qspi_defconfig | 1 + include/config_fallbacks.h | 9 --------- include/configs/apalis-imx8.h | 2 -- include/configs/apalis-tk1.h | 4 ---- include/configs/apalis_imx6.h | 2 -- include/configs/apalis_t30.h | 4 ---- include/configs/ax25-ae350.h | 1 - include/configs/bcm_ns3.h | 1 - include/configs/bcmstb.h | 1 - include/configs/bmips_common.h | 1 - include/configs/bur_cfg_common.h | 3 --- include/configs/capricorn-common.h | 1 - include/configs/ci20.h | 1 - include/configs/colibri-imx8x.h | 2 -- include/configs/colibri_imx6.h | 2 -- include/configs/colibri_t20.h | 4 ---- include/configs/colibri_t30.h | 4 ---- include/configs/colibri_vf.h | 1 - include/configs/da850evm.h | 1 - include/configs/devkit3250.h | 1 - include/configs/display5.h | 2 -- include/configs/dragonboard410c.h | 3 --- include/configs/dragonboard820c.h | 3 --- include/configs/eb_cpu5282.h | 1 - include/configs/edison.h | 1 - include/configs/edminiv2.h | 2 -- include/configs/exynos-common.h | 1 - include/configs/exynos7420-common.h | 1 - include/configs/exynos78x0-common.h | 1 - include/configs/gardena-smart-gateway-mt7688.h | 1 - include/configs/gazerbeam.h | 2 -- include/configs/highbank.h | 1 - include/configs/hikey.h | 3 --- include/configs/hsdk-4xd.h | 1 - include/configs/hsdk.h | 1 - include/configs/ids8313.h | 1 - include/configs/imgtec_xilfpga.h | 1 - include/configs/imx27lite-common.h | 1 - include/configs/imx8mm-cl-iot-gate.h | 2 -- include/configs/imx8mm_beacon.h | 2 -- include/configs/imx8mm_data_modul_edm_sbc.h | 4 ++-- include/configs/imx8mm_evk.h | 2 -- include/configs/imx8mm_icore_mx8mm.h | 2 -- include/configs/imx8mm_venice.h | 2 -- include/configs/imx8mn_beacon.h | 2 -- include/configs/imx8mn_bsh_smm_s2_common.h | 2 -- include/configs/imx8mn_evk.h | 2 -- include/configs/imx8mn_var_som.h | 2 -- include/configs/imx8mn_venice.h | 2 -- include/configs/imx8mp_dhcom_pdk2.h | 1 - include/configs/imx8mp_evk.h | 2 -- include/configs/imx8mp_rsb3720.h | 4 ++-- include/configs/imx8mp_venice.h | 2 -- include/configs/imx8mq_cm.h | 2 -- include/configs/imx8mq_evk.h | 2 -- include/configs/imx8mq_phanbell.h | 2 -- include/configs/imx8qxp_mek.h | 1 - include/configs/imx8ulp_evk.h | 2 -- include/configs/km/keymile-common.h | 5 ----- include/configs/kp_imx53.h | 1 - include/configs/legoev3.h | 1 - include/configs/linkit-smart-7688.h | 1 - include/configs/ls1012a_common.h | 3 --- include/configs/ls1021atsn.h | 1 - include/configs/ls1028a_common.h | 2 -- include/configs/ls1043a_common.h | 3 --- include/configs/ls1046a_common.h | 3 --- include/configs/ls1088a_common.h | 2 -- include/configs/ls2080a_common.h | 3 --- include/configs/lx2160a_common.h | 2 -- include/configs/m53menlo.h | 1 - include/configs/meesc.h | 2 -- include/configs/meson64.h | 2 -- include/configs/microblaze-generic.h | 3 --- include/configs/mt7620.h | 2 -- include/configs/mt7622.h | 1 - include/configs/mt7623.h | 1 - include/configs/mt7628.h | 2 -- include/configs/mt7629.h | 1 - include/configs/mv-common.h | 2 -- include/configs/mvebu_armada-37xx.h | 2 -- include/configs/mvebu_armada-8k.h | 2 -- include/configs/mx53cx9020.h | 1 - include/configs/mx53loco.h | 1 - include/configs/mx53ppd.h | 1 - include/configs/mx6_common.h | 1 - include/configs/mx7_common.h | 1 - include/configs/mx7ulp_evk.h | 1 - include/configs/mxs.h | 1 - include/configs/octeontx2_common.h | 2 -- include/configs/octeontx_common.h | 2 -- include/configs/omapl138_lcdk.h | 1 - include/configs/owl-common.h | 1 - include/configs/phycore_imx8mm.h | 2 -- include/configs/phycore_imx8mp.h | 2 -- include/configs/pic32mzdask.h | 1 - include/configs/pico-imx8mq.h | 2 -- include/configs/poleg.h | 1 - include/configs/poplar.h | 3 --- include/configs/presidio_asic.h | 1 - include/configs/px30_common.h | 2 -- include/configs/qemu-arm.h | 2 -- include/configs/rcar-gen3-common.h | 1 - include/configs/rk3036_common.h | 2 -- include/configs/rk3066_common.h | 2 -- include/configs/rk3128_common.h | 2 -- include/configs/rk3188_common.h | 2 -- include/configs/rk322x_common.h | 1 - include/configs/rk3288_common.h | 2 -- include/configs/rk3308_common.h | 1 - include/configs/rk3328_common.h | 2 -- include/configs/rk3368_common.h | 1 - include/configs/rk3399_common.h | 2 -- include/configs/rk3568_common.h | 2 -- include/configs/rpi.h | 1 - include/configs/rv1108_common.h | 2 -- include/configs/s5p4418_nanopi2.h | 2 -- include/configs/sandbox.h | 2 -- include/configs/sdm845.h | 3 --- include/configs/siemens-am33x-common.h | 1 - include/configs/smartweb.h | 1 - include/configs/sniper.h | 2 -- include/configs/socfpga_common.h | 1 - include/configs/socfpga_soc64_common.h | 1 - include/configs/stih410-b2260.h | 3 --- include/configs/stm32f429-discovery.h | 2 -- include/configs/stm32f429-evaluation.h | 2 -- include/configs/stm32f469-discovery.h | 2 -- include/configs/stm32f746-disco.h | 2 -- include/configs/stm32mp15_common.h | 1 - include/configs/stmark2.h | 1 - include/configs/stv0991.h | 1 - include/configs/sunxi-common.h | 1 - include/configs/synquacer.h | 2 -- include/configs/tegra-common.h | 6 ------ include/configs/thunderx_88xx.h | 2 -- include/configs/ti814x_evm.h | 1 - include/configs/ti_armv7_common.h | 1 - include/configs/total_compute.h | 3 --- include/configs/tplink_wdr4300.h | 1 - include/configs/turris_mox.h | 1 - include/configs/uniphier.h | 1 - include/configs/usbarmory.h | 1 - include/configs/verdin-imx8mm.h | 2 -- include/configs/verdin-imx8mp.h | 2 -- include/configs/vexpress_aemv8.h | 3 --- include/configs/vexpress_common.h | 3 --- include/configs/vocore2.h | 1 - include/configs/work_92105.h | 1 - include/configs/x86-common.h | 1 - include/configs/xenguest_arm64.h | 2 -- include/configs/xilinx_versal.h | 2 -- include/configs/xilinx_versal_mini.h | 3 --- include/configs/xilinx_zynqmp.h | 2 -- include/configs/xilinx_zynqmp_mini.h | 3 --- include/configs/xtfpga.h | 1 - include/configs/zynq-common.h | 2 -- include/configs/zynq_cse.h | 4 ---- 492 files changed, 346 insertions(+), 291 deletions(-) diff --git a/README b/README index d4d88d98c94..e738fa9273f 100644 --- a/README +++ b/README @@ -1853,8 +1853,6 @@ Configuration Settings: - CONFIG_SYS_PROMPT: This is what U-Boot prints on the console to prompt for user input. -- CONFIG_SYS_CBSIZE: Buffer size for input from the Console - - CONFIG_SYS_BARGSIZE: Buffer size for Boot Arguments which are passed to the application (usually a Linux kernel) when it is booted diff --git a/cmd/Kconfig b/cmd/Kconfig index b50e53e1480..06ec81007ad 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -75,6 +75,15 @@ config SYS_MAXARGS int "Maximum number arguments accepted by commands" default 16 +config SYS_CBSIZE + int "Console input buffer size" + default 2048 if ARCH_TEGRA || ARCH_VERSAL || ARCH_ZYNQ || ARCH_ZYNQMP || \ + RCAR_GEN3 || TARGET_SOCFPGA_SOC64 + default 512 if ARCH_MX5 || ARCH_MX6 || ARCH_MX7 || FSL_LSCH2 || \ + FSL_LSCH3 || X86 + default 256 if M68K || PPC + default 1024 + config SYS_PBSIZE int "Buffer size for console output" default 1044 diff --git a/configs/10m50_defconfig b/configs/10m50_defconfig index b5b3f0033b5..6c56cdc3286 100644 --- a/configs/10m50_defconfig +++ b/configs/10m50_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_MONITOR_BASE=0xCFF80000 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_CPU=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/3c120_defconfig b/configs/3c120_defconfig index 114823da758..617b25a375b 100644 --- a/configs/3c120_defconfig +++ b/configs/3c120_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_MONITOR_BASE=0xD7F80000 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_CPU=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/SBx81LIFKW_defconfig b/configs/SBx81LIFKW_defconfig index fb12b9be3ef..3c77bdcc2c1 100644 --- a/configs/SBx81LIFKW_defconfig +++ b/configs/SBx81LIFKW_defconfig @@ -20,6 +20,7 @@ CONFIG_SILENT_U_BOOT_ONLY=y CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set diff --git a/configs/SBx81LIFXCAT_defconfig b/configs/SBx81LIFXCAT_defconfig index eb68c25f092..1a0cf14d261 100644 --- a/configs/SBx81LIFXCAT_defconfig +++ b/configs/SBx81LIFXCAT_defconfig @@ -20,6 +20,7 @@ CONFIG_SILENT_U_BOOT_ONLY=y CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set diff --git a/configs/alt_defconfig b/configs/alt_defconfig index 1edcb2b319b..5a75381bb3f 100644 --- a/configs/alt_defconfig +++ b/configs/alt_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=256 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/ap121_defconfig b/configs/ap121_defconfig index 1ae619005bd..0baa4c8d12e 100644 --- a/configs/ap121_defconfig +++ b/configs/ap121_defconfig @@ -21,6 +21,7 @@ CONFIG_BOOTCOMMAND="sf probe;mtdparts default;bootm 0x9f650000" CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="ap121 # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/ap143_defconfig b/configs/ap143_defconfig index 061627f649d..b6ab065c6d6 100644 --- a/configs/ap143_defconfig +++ b/configs/ap143_defconfig @@ -23,6 +23,7 @@ CONFIG_BOOTCOMMAND="sf probe;mtdparts default;bootm 0x9f680000" CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="ap143 # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/ap152_defconfig b/configs/ap152_defconfig index a67ba607983..0ee5f828ab0 100644 --- a/configs/ap152_defconfig +++ b/configs/ap152_defconfig @@ -23,6 +23,7 @@ CONFIG_BOOTCOMMAND="sf probe;mtdparts default;bootm 0x9f060000" CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="ap152 # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/apalis-imx8_defconfig b/configs/apalis-imx8_defconfig index 9f47695e9c4..779a989d248 100644 --- a/configs/apalis-imx8_defconfig +++ b/configs/apalis-imx8_defconfig @@ -22,6 +22,7 @@ CONFIG_LOG=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2068 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set diff --git a/configs/apalis-tk1_defconfig b/configs/apalis-tk1_defconfig index 4d8ebc4ad55..6be7c5a5737 100644 --- a/configs/apalis-tk1_defconfig +++ b/configs/apalis-tk1_defconfig @@ -23,6 +23,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SYS_PROMPT="Apalis TK1 # " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=1024 CONFIG_SYS_PBSIZE=1054 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index 134612328d5..11ee2f3d34a 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -43,6 +43,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SYS_PROMPT="Apalis iMX6 # " CONFIG_SYS_MAXARGS=48 +CONFIG_SYS_CBSIZE=1024 CONFIG_SYS_PBSIZE=1055 # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set diff --git a/configs/apalis_t30_defconfig b/configs/apalis_t30_defconfig index 0a6abe605f6..17283539a0a 100644 --- a/configs/apalis_t30_defconfig +++ b/configs/apalis_t30_defconfig @@ -19,6 +19,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SYS_PROMPT="Apalis T30 # " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=1024 CONFIG_SYS_PBSIZE=1054 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y diff --git a/configs/apple_m1_defconfig b/configs/apple_m1_defconfig index 6bba71cf5b4..c4fd8034565 100644 --- a/configs/apple_m1_defconfig +++ b/configs/apple_m1_defconfig @@ -6,6 +6,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_LATE_INIT=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_NET is not set CONFIG_APPLE_SPI_KEYB=y diff --git a/configs/armadillo-800eva_defconfig b/configs/armadillo-800eva_defconfig index d4490ea8d04..784064a17b9 100644 --- a/configs/armadillo-800eva_defconfig +++ b/configs/armadillo-800eva_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_MONITOR_BASE=0x00000000 CONFIG_BOOTDELAY=3 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=256 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig index eb16ba2d4e7..5d49332a35b 100644 --- a/configs/at91sam9260ek_dataflash_cs0_defconfig +++ b/configs/at91sam9260ek_dataflash_cs0_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig index e1d8e2529db..0ad24a2d5dd 100644 --- a/configs/at91sam9260ek_dataflash_cs1_defconfig +++ b/configs/at91sam9260ek_dataflash_cs1_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe 0:1; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/at91sam9260ek_nandflash_defconfig b/configs/at91sam9260ek_nandflash_defconfig index 5e49df59538..926708d2168 100644 --- a/configs/at91sam9260ek_nandflash_defconfig +++ b/configs/at91sam9260ek_nandflash_defconfig @@ -24,6 +24,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig index 4a268dde821..56f57024df4 100644 --- a/configs/at91sam9261ek_dataflash_cs0_defconfig +++ b/configs/at91sam9261ek_dataflash_cs0_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_RESET_PHY_R=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig index d730e088766..18734958952 100644 --- a/configs/at91sam9261ek_dataflash_cs3_defconfig +++ b/configs/at91sam9261ek_dataflash_cs3_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_RESET_PHY_R=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig index b8e43491e8b..7f6fc42df4d 100644 --- a/configs/at91sam9261ek_nandflash_defconfig +++ b/configs/at91sam9261ek_nandflash_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_RESET_PHY_R=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig index f6a595355c9..55686f7128f 100644 --- a/configs/at91sam9263ek_dataflash_cs0_defconfig +++ b/configs/at91sam9263ek_dataflash_cs0_defconfig @@ -27,6 +27,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig index f6a595355c9..55686f7128f 100644 --- a/configs/at91sam9263ek_dataflash_defconfig +++ b/configs/at91sam9263ek_dataflash_defconfig @@ -27,6 +27,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/at91sam9263ek_nandflash_defconfig b/configs/at91sam9263ek_nandflash_defconfig index a2a2a9e80cb..8c31f70073f 100644 --- a/configs/at91sam9263ek_nandflash_defconfig +++ b/configs/at91sam9263ek_nandflash_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/at91sam9263ek_norflash_boot_defconfig b/configs/at91sam9263ek_norflash_boot_defconfig index f92fd392ddc..60380e25ab8 100644 --- a/configs/at91sam9263ek_norflash_boot_defconfig +++ b/configs/at91sam9263ek_norflash_boot_defconfig @@ -24,6 +24,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/at91sam9263ek_norflash_defconfig b/configs/at91sam9263ek_norflash_defconfig index a34b7ee5d62..439c4e11c96 100644 --- a/configs/at91sam9263ek_norflash_defconfig +++ b/configs/at91sam9263ek_norflash_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig index 252611c2c8a..252a34f7ce8 100644 --- a/configs/at91sam9g10ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_RESET_PHY_R=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig index dce9ff8bd35..b1450af8932 100644 --- a/configs/at91sam9g10ek_dataflash_cs3_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_RESET_PHY_R=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set diff --git a/configs/at91sam9g10ek_nandflash_defconfig b/configs/at91sam9g10ek_nandflash_defconfig index f9e1a334723..38be58fa89e 100644 --- a/configs/at91sam9g10ek_nandflash_defconfig +++ b/configs/at91sam9g10ek_nandflash_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_RESET_PHY_R=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set diff --git a/configs/at91sam9g20ek_2mmc_defconfig b/configs/at91sam9g20ek_2mmc_defconfig index 93018b72573..90bd1517297 100644 --- a/configs/at91sam9g20ek_2mmc_defconfig +++ b/configs/at91sam9g20ek_2mmc_defconfig @@ -26,6 +26,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x22000000 uImage; bootm" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig b/configs/at91sam9g20ek_2mmc_nandflash_defconfig index b8d5a64cb0d..51586d801ce 100644 --- a/configs/at91sam9g20ek_2mmc_nandflash_defconfig +++ b/configs/at91sam9g20ek_2mmc_nandflash_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig index f014d909505..f0813e0ae93 100644 --- a/configs/at91sam9g20ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig index 0f837c9e58e..96975a3e126 100644 --- a/configs/at91sam9g20ek_dataflash_cs1_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe 0:1; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/at91sam9g20ek_nandflash_defconfig b/configs/at91sam9g20ek_nandflash_defconfig index 9b9c918a624..af7fe326aba 100644 --- a/configs/at91sam9g20ek_nandflash_defconfig +++ b/configs/at91sam9g20ek_nandflash_defconfig @@ -24,6 +24,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig index c0ca368f789..b6cc3754298 100644 --- a/configs/at91sam9m10g45ek_mmc_defconfig +++ b/configs/at91sam9m10g45ek_mmc_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig b/configs/at91sam9m10g45ek_nandflash_defconfig index 2311a40987e..2937de43298 100644 --- a/configs/at91sam9m10g45ek_nandflash_defconfig +++ b/configs/at91sam9m10g45ek_nandflash_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig index 9ab9effc935..06ea24bbb50 100644 --- a/configs/at91sam9n12ek_mmc_defconfig +++ b/configs/at91sam9n12ek_mmc_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig index 0ac792c528f..0b33ce79347 100644 --- a/configs/at91sam9n12ek_nandflash_defconfig +++ b/configs/at91sam9n12ek_nandflash_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig index 6d036ab8bc2..b2d9eb31127 100644 --- a/configs/at91sam9n12ek_spiflash_defconfig +++ b/configs/at91sam9n12ek_spiflash_defconfig @@ -22,6 +22,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set diff --git a/configs/at91sam9rlek_dataflash_defconfig b/configs/at91sam9rlek_dataflash_defconfig index e10506dfa09..a06e2625b9d 100644 --- a/configs/at91sam9rlek_dataflash_defconfig +++ b/configs/at91sam9rlek_dataflash_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/at91sam9rlek_mmc_defconfig b/configs/at91sam9rlek_mmc_defconfig index b8dcfbdaa42..ef74c6b349e 100644 --- a/configs/at91sam9rlek_mmc_defconfig +++ b/configs/at91sam9rlek_mmc_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/at91sam9rlek_nandflash_defconfig b/configs/at91sam9rlek_nandflash_defconfig index 9ccdace8462..d8f490f16bf 100644 --- a/configs/at91sam9rlek_nandflash_defconfig +++ b/configs/at91sam9rlek_nandflash_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig index 11cfcd319d0..75528ad15e6 100644 --- a/configs/at91sam9x5ek_dataflash_defconfig +++ b/configs/at91sam9x5ek_dataflash_defconfig @@ -27,6 +27,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig index 863161e15ca..0e301439704 100644 --- a/configs/at91sam9x5ek_mmc_defconfig +++ b/configs/at91sam9x5ek_mmc_defconfig @@ -24,6 +24,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig index 00559dcbc0e..125dc19abf0 100644 --- a/configs/at91sam9x5ek_nandflash_defconfig +++ b/configs/at91sam9x5ek_nandflash_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig index 3d783b36e42..96ab238461c 100644 --- a/configs/at91sam9x5ek_spiflash_defconfig +++ b/configs/at91sam9x5ek_spiflash_defconfig @@ -28,6 +28,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig index eb16ba2d4e7..5d49332a35b 100644 --- a/configs/at91sam9xeek_dataflash_cs0_defconfig +++ b/configs/at91sam9xeek_dataflash_cs0_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig index e1d8e2529db..0ad24a2d5dd 100644 --- a/configs/at91sam9xeek_dataflash_cs1_defconfig +++ b/configs/at91sam9xeek_dataflash_cs1_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe 0:1; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/at91sam9xeek_nandflash_defconfig b/configs/at91sam9xeek_nandflash_defconfig index 5e49df59538..926708d2168 100644 --- a/configs/at91sam9xeek_nandflash_defconfig +++ b/configs/at91sam9xeek_nandflash_defconfig @@ -24,6 +24,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/axm_defconfig b/configs/axm_defconfig index 607e1f7d1a2..d17cdd29c56 100644 --- a/configs/axm_defconfig +++ b/configs/axm_defconfig @@ -45,6 +45,7 @@ CONFIG_SPL_NAND_BASE=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig index c23071e62c2..581f4e67cce 100644 --- a/configs/axs101_defconfig +++ b/configs/axs101_defconfig @@ -17,6 +17,7 @@ CONFIG_BOARD_TYPES=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="AXS# " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=278 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig index bb2f783dd1e..3e24770e3da 100644 --- a/configs/axs103_defconfig +++ b/configs/axs103_defconfig @@ -17,6 +17,7 @@ CONFIG_BOARD_TYPES=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="AXS# " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=278 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y diff --git a/configs/bcm7260_defconfig b/configs/bcm7260_defconfig index 024cad147dd..28042202109 100644 --- a/configs/bcm7260_defconfig +++ b/configs/bcm7260_defconfig @@ -20,6 +20,7 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot>" CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=536 CONFIG_CMD_ASKENV=y CONFIG_CMD_GPT=y diff --git a/configs/bcm7445_defconfig b/configs/bcm7445_defconfig index ce01797a1b9..0382034a479 100644 --- a/configs/bcm7445_defconfig +++ b/configs/bcm7445_defconfig @@ -21,6 +21,7 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot>" CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=536 CONFIG_CMD_ASKENV=y CONFIG_CMD_MMC=y diff --git a/configs/bcm963158_ram_defconfig b/configs/bcm963158_ram_defconfig index 944f8beb04e..e9bf7527dad 100644 --- a/configs/bcm963158_ram_defconfig +++ b/configs/bcm963158_ram_defconfig @@ -21,6 +21,7 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_CMD_LZMADEC is not set # CONFIG_CMD_UNZIP is not set diff --git a/configs/bcm96753ref_ram_defconfig b/configs/bcm96753ref_ram_defconfig index 8f69f868c4e..ac710f41799 100644 --- a/configs/bcm96753ref_ram_defconfig +++ b/configs/bcm96753ref_ram_defconfig @@ -24,6 +24,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_CMD_BOOTD is not set # CONFIG_BOOTM_NETBSD is not set diff --git a/configs/bcm968360bg_ram_defconfig b/configs/bcm968360bg_ram_defconfig index 489e1b16cf9..9d1202c8e81 100644 --- a/configs/bcm968360bg_ram_defconfig +++ b/configs/bcm968360bg_ram_defconfig @@ -19,6 +19,7 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_GPIO=y CONFIG_CMD_MTD=y diff --git a/configs/bcm968380gerg_ram_defconfig b/configs/bcm968380gerg_ram_defconfig index d861c143932..d35a2ba5461 100644 --- a/configs/bcm968380gerg_ram_defconfig +++ b/configs/bcm968380gerg_ram_defconfig @@ -19,6 +19,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="bcm968380gerg # " CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=545 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y diff --git a/configs/bcm968580xref_ram_defconfig b/configs/bcm968580xref_ram_defconfig index 5ca77db0733..8de6edb5b95 100644 --- a/configs/bcm968580xref_ram_defconfig +++ b/configs/bcm968580xref_ram_defconfig @@ -19,6 +19,7 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_GPIO=y CONFIG_CMD_MTD=y diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig index 7fc3c278c5c..838090e3039 100644 --- a/configs/bk4r1_defconfig +++ b/configs/bk4r1_defconfig @@ -30,6 +30,7 @@ CONFIG_BOOTCOMMAND="run set_gpio122; run set_gpio96; sf probe; run manage_userda CONFIG_USE_PREBOOT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_CMD_ELF is not set CONFIG_CMD_MEMTEST=y diff --git a/configs/blanche_defconfig b/configs/blanche_defconfig index b21c5fd446d..01e9ea37222 100644 --- a/configs/blanche_defconfig +++ b/configs/blanche_defconfig @@ -19,6 +19,7 @@ CONFIG_ENV_ADDR=0x40000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=256 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/boston32r2_defconfig b/configs/boston32r2_defconfig index abc783e905f..691e47c5508 100644 --- a/configs/boston32r2_defconfig +++ b/configs/boston32r2_defconfig @@ -19,6 +19,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y diff --git a/configs/boston32r2el_defconfig b/configs/boston32r2el_defconfig index 2d4ecdc33fe..3c4aac93d89 100644 --- a/configs/boston32r2el_defconfig +++ b/configs/boston32r2el_defconfig @@ -20,6 +20,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y diff --git a/configs/boston32r6_defconfig b/configs/boston32r6_defconfig index 4187540fb3c..30c5356c015 100644 --- a/configs/boston32r6_defconfig +++ b/configs/boston32r6_defconfig @@ -20,6 +20,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y diff --git a/configs/boston32r6el_defconfig b/configs/boston32r6el_defconfig index 968826e6fd6..f1253e6a51c 100644 --- a/configs/boston32r6el_defconfig +++ b/configs/boston32r6el_defconfig @@ -21,6 +21,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y diff --git a/configs/boston64r2_defconfig b/configs/boston64r2_defconfig index c3c4f12a6ec..a7c67805ab1 100644 --- a/configs/boston64r2_defconfig +++ b/configs/boston64r2_defconfig @@ -20,6 +20,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y diff --git a/configs/boston64r2el_defconfig b/configs/boston64r2el_defconfig index f3f70f95e4d..326c757057f 100644 --- a/configs/boston64r2el_defconfig +++ b/configs/boston64r2el_defconfig @@ -21,6 +21,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y diff --git a/configs/boston64r6_defconfig b/configs/boston64r6_defconfig index 4e5a4ac3cf0..d31b92dc3cd 100644 --- a/configs/boston64r6_defconfig +++ b/configs/boston64r6_defconfig @@ -20,6 +20,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y diff --git a/configs/boston64r6el_defconfig b/configs/boston64r6el_defconfig index f78d331ebbe..72b3649d4a1 100644 --- a/configs/boston64r6el_defconfig +++ b/configs/boston64r6el_defconfig @@ -21,6 +21,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig index 9aef0297268..2172d44d2ee 100644 --- a/configs/brppt1_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/brppt1_nand_defconfig b/configs/brppt1_nand_defconfig index 475ecaf0ab6..e4ede331e35 100644 --- a/configs/brppt1_nand_defconfig +++ b/configs/brppt1_nand_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig index 8c8b6411a12..cbe0d7ba840 100644 --- a/configs/brppt1_spi_defconfig +++ b/configs/brppt1_spi_defconfig @@ -47,6 +47,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/brsmarc1_defconfig b/configs/brsmarc1_defconfig index 259fdf12e61..824f3c22d0b 100644 --- a/configs/brsmarc1_defconfig +++ b/configs/brsmarc1_defconfig @@ -45,6 +45,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig index fce5245fc61..ebdfe2819e1 100644 --- a/configs/brxre1_defconfig +++ b/configs/brxre1_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/cgtqmx8_defconfig b/configs/cgtqmx8_defconfig index 7585e6ec0d8..78dfcbc2107 100644 --- a/configs/cgtqmx8_defconfig +++ b/configs/cgtqmx8_defconfig @@ -33,6 +33,7 @@ CONFIG_SYS_MMCSD_FS_BOOT_PARTITION=0 CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set diff --git a/configs/colibri-imx8x_defconfig b/configs/colibri-imx8x_defconfig index 3abe7a8579e..bb6c14c3560 100644 --- a/configs/colibri-imx8x_defconfig +++ b/configs/colibri-imx8x_defconfig @@ -21,6 +21,7 @@ CONFIG_LOG=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2068 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 0bd601b55d3..1873581e755 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SYS_PROMPT="Colibri iMX6 # " CONFIG_SYS_MAXARGS=48 +CONFIG_SYS_CBSIZE=1024 CONFIG_SYS_PBSIZE=1056 # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig index a7b9cb88276..99b7d4a712e 100644 --- a/configs/colibri_t20_defconfig +++ b/configs/colibri_t20_defconfig @@ -18,6 +18,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SYS_PROMPT="Colibri T20 # " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=1024 CONFIG_SYS_PBSIZE=1055 # CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/colibri_t30_defconfig b/configs/colibri_t30_defconfig index 1e1a4354d49..54191832724 100644 --- a/configs/colibri_t30_defconfig +++ b/configs/colibri_t30_defconfig @@ -19,6 +19,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SYS_PROMPT="Colibri T30 # " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=1024 CONFIG_SYS_PBSIZE=1055 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y diff --git a/configs/comtrend_ar5315u_ram_defconfig b/configs/comtrend_ar5315u_ram_defconfig index 0389db76d57..c62531681a0 100644 --- a/configs/comtrend_ar5315u_ram_defconfig +++ b/configs/comtrend_ar5315u_ram_defconfig @@ -20,6 +20,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="AR-5315un # " CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=541 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y diff --git a/configs/comtrend_ar5387un_ram_defconfig b/configs/comtrend_ar5387un_ram_defconfig index d9a97c5799d..67fa622769a 100644 --- a/configs/comtrend_ar5387un_ram_defconfig +++ b/configs/comtrend_ar5387un_ram_defconfig @@ -20,6 +20,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="AR-5387un # " CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=541 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y diff --git a/configs/comtrend_ct5361_ram_defconfig b/configs/comtrend_ct5361_ram_defconfig index b3c4109e93f..0e6e8234c1e 100644 --- a/configs/comtrend_ct5361_ram_defconfig +++ b/configs/comtrend_ct5361_ram_defconfig @@ -20,6 +20,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="CT-5361 # " CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=539 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y diff --git a/configs/comtrend_vr3032u_ram_defconfig b/configs/comtrend_vr3032u_ram_defconfig index 536cd62c461..5f8db634acd 100644 --- a/configs/comtrend_vr3032u_ram_defconfig +++ b/configs/comtrend_vr3032u_ram_defconfig @@ -20,6 +20,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="VR-3032u # " CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=540 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y diff --git a/configs/comtrend_wap5813n_ram_defconfig b/configs/comtrend_wap5813n_ram_defconfig index e6282858136..36cd978bfaa 100644 --- a/configs/comtrend_wap5813n_ram_defconfig +++ b/configs/comtrend_wap5813n_ram_defconfig @@ -20,6 +20,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="WAP-5813n # " CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=541 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y diff --git a/configs/cortina_presidio-asic-base_defconfig b/configs/cortina_presidio-asic-base_defconfig index 100f81e66f0..99c167f345e 100644 --- a/configs/cortina_presidio-asic-base_defconfig +++ b/configs/cortina_presidio-asic-base_defconfig @@ -21,6 +21,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_SYS_PROMPT="G3#" CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_WDT=y CONFIG_CMD_CACHE=y diff --git a/configs/cortina_presidio-asic-emmc_defconfig b/configs/cortina_presidio-asic-emmc_defconfig index 228215b507b..cb826361297 100644 --- a/configs/cortina_presidio-asic-emmc_defconfig +++ b/configs/cortina_presidio-asic-emmc_defconfig @@ -19,6 +19,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_SYS_PROMPT="G3#" CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/cortina_presidio-asic-pnand_defconfig b/configs/cortina_presidio-asic-pnand_defconfig index b8b86845625..867db8c01f1 100644 --- a/configs/cortina_presidio-asic-pnand_defconfig +++ b/configs/cortina_presidio-asic-pnand_defconfig @@ -21,6 +21,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_SYS_PROMPT="G3#" CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_MTD=y CONFIG_CMD_WDT=y diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig index 6698b7ea81a..443f15e71d3 100644 --- a/configs/corvus_defconfig +++ b/configs/corvus_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_BASE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/deneb_defconfig b/configs/deneb_defconfig index cd809b96b72..f02b10bcfad 100644 --- a/configs/deneb_defconfig +++ b/configs/deneb_defconfig @@ -43,6 +43,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2073 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set diff --git a/configs/display5_defconfig b/configs/display5_defconfig index 0c47e83b77f..2b92ed95b4b 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -50,6 +50,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="display5 > " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2076 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_ELF is not set diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig index cb27169b721..9c3965c0a6f 100644 --- a/configs/display5_factory_defconfig +++ b/configs/display5_factory_defconfig @@ -48,6 +48,7 @@ CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="display5 factory > " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2084 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_ELF is not set diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig index 28ce34cb2aa..32c14173e60 100644 --- a/configs/dragonboard410c_defconfig +++ b/configs/dragonboard410c_defconfig @@ -20,6 +20,7 @@ CONFIG_USE_PREBOOT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="dragonboard410c => " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=548 # CONFIG_CMD_IMI is not set CONFIG_CMD_MD5SUM=y diff --git a/configs/dragonboard820c_defconfig b/configs/dragonboard820c_defconfig index f44be0c0a63..09888cdfb19 100644 --- a/configs/dragonboard820c_defconfig +++ b/configs/dragonboard820c_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTARGS="console=ttyMSM0,115200n8" CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="dragonboard820c => " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=548 CONFIG_CMD_MD5SUM=y CONFIG_CMD_MEMINFO=y diff --git a/configs/durian_defconfig b/configs/durian_defconfig index 2ebb6914893..c4eb39222e5 100644 --- a/configs/durian_defconfig +++ b/configs/durian_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200 earlycon=pl011,0x28001000 root=/dev/sda2 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_LAST_STAGE_INIT=y CONFIG_SYS_PROMPT="durian#" +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=280 # CONFIG_CMD_LZMADEC is not set # CONFIG_CMD_UNZIP is not set diff --git a/configs/ea-lpc3250devkitv2_defconfig b/configs/ea-lpc3250devkitv2_defconfig index f76ce58fff9..bba37551a3e 100644 --- a/configs/ea-lpc3250devkitv2_defconfig +++ b/configs/ea-lpc3250devkitv2_defconfig @@ -18,6 +18,7 @@ CONFIG_BOARD_SIZE_LIMIT=1048575 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="EA-LPC3250v2=> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=288 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/eb_cpu5282_defconfig b/configs/eb_cpu5282_defconfig index a0cfb1eee22..f8c0198d25e 100644 --- a/configs/eb_cpu5282_defconfig +++ b/configs/eb_cpu5282_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTCOMMAND="printenv" CONFIG_MISC_INIT_R=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="\nEB+CPU5282> " +CONFIG_SYS_CBSIZE=1024 CONFIG_SYS_PBSIZE=1054 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y diff --git a/configs/eb_cpu5282_internal_defconfig b/configs/eb_cpu5282_internal_defconfig index 2f2692340f2..93b860d8370 100644 --- a/configs/eb_cpu5282_internal_defconfig +++ b/configs/eb_cpu5282_internal_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTCOMMAND="printenv" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_CBSIZE=1024 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set diff --git a/configs/edison_defconfig b/configs/edison_defconfig index af70b736a8e..dbca94525ed 100644 --- a/configs/edison_defconfig +++ b/configs/edison_defconfig @@ -15,6 +15,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=128 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2068 CONFIG_CMD_CPU=y CONFIG_CMD_ASKENV=y diff --git a/configs/emsdp_defconfig b/configs/emsdp_defconfig index 2491183fcce..02dbcb160f9 100644 --- a/configs/emsdp_defconfig +++ b/configs/emsdp_defconfig @@ -13,6 +13,7 @@ CONFIG_SYS_LOAD_ADDR=0x10000000 CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="emsdp# " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=280 # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig index 1364c37b63c..da8c0bd9cbe 100644 --- a/configs/ethernut5_defconfig +++ b/configs/ethernut5_defconfig @@ -22,6 +22,7 @@ CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x22000000 0xc6000 0x294000; bootm 0x2 CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_IMLS=y diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig index df328d96f07..9d2c4f81c5a 100644 --- a/configs/evb-ast2500_defconfig +++ b/configs/evb-ast2500_defconfig @@ -18,6 +18,7 @@ CONFIG_PRE_CONSOLE_BUFFER=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index 6e5c1bd2c58..d90529e0f13 100644 --- a/configs/evb-ast2600_defconfig +++ b/configs/evb-ast2600_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_DM_RESET=y CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig index b4e60290b18..0dbd0849581 100644 --- a/configs/gardena-smart-gateway-at91sam_defconfig +++ b/configs/gardena-smart-gateway-at91sam_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_LICENSE=y CONFIG_CMD_BOOTZ=y diff --git a/configs/gardena-smart-gateway-mt7688_defconfig b/configs/gardena-smart-gateway-mt7688_defconfig index f29a75f2a6d..7b0b2a5c588 100644 --- a/configs/gardena-smart-gateway-mt7688_defconfig +++ b/configs/gardena-smart-gateway-mt7688_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_LICENSE=y # CONFIG_CMD_ELF is not set diff --git a/configs/gazerbeam_defconfig b/configs/gazerbeam_defconfig index f2f0257071c..2f3b29e9918 100644 --- a/configs/gazerbeam_defconfig +++ b/configs/gazerbeam_defconfig @@ -130,6 +130,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=1024 CONFIG_CMD_CPU=y CONFIG_CMD_BINOP=y CONFIG_CMD_MEMTEST=y diff --git a/configs/giedi_defconfig b/configs/giedi_defconfig index 07249f3b346..2be2e767ca2 100644 --- a/configs/giedi_defconfig +++ b/configs/giedi_defconfig @@ -43,6 +43,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2073 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set diff --git a/configs/gose_defconfig b/configs/gose_defconfig index 8917bb84866..57bf892f055 100644 --- a/configs/gose_defconfig +++ b/configs/gose_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=256 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/grpeach_defconfig b/configs/grpeach_defconfig index 56b9bbae9cc..c204603192c 100644 --- a/configs/grpeach_defconfig +++ b/configs/grpeach_defconfig @@ -19,6 +19,7 @@ CONFIG_BOOTARGS="ignore_loglevel" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=256 # CONFIG_CMD_ELF is not set CONFIG_CMD_GPIO=y diff --git a/configs/gurnard_defconfig b/configs/gurnard_defconfig index 636e5ebea8b..01546de8fda 100644 --- a/configs/gurnard_defconfig +++ b/configs/gurnard_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set diff --git a/configs/hikey960_defconfig b/configs/hikey960_defconfig index f4b28b9a304..7921beafbbd 100644 --- a/configs/hikey960_defconfig +++ b/configs/hikey960_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTARGS="console=ttyAMA6,115200n8 root=/dev/mmcblk0p2 rw" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="U-Boot => " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=283 CONFIG_CMD_MD5SUM=y CONFIG_CMD_MEMINFO=y diff --git a/configs/hikey_defconfig b/configs/hikey_defconfig index a7690458b29..9d597b81ce2 100644 --- a/configs/hikey_defconfig +++ b/configs/hikey_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/mmcblk0p9 rw" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/hsdk_4xd_defconfig b/configs/hsdk_4xd_defconfig index 8a455175fd2..4fb43d308b7 100644 --- a/configs/hsdk_4xd_defconfig +++ b/configs/hsdk_4xd_defconfig @@ -19,6 +19,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_BOARD_LATE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="hsdk-4xd# " +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2075 CONFIG_CMD_ENV_FLAGS=y # CONFIG_CMD_FLASH is not set diff --git a/configs/hsdk_defconfig b/configs/hsdk_defconfig index 9303a26b434..ddcae02331c 100644 --- a/configs/hsdk_defconfig +++ b/configs/hsdk_defconfig @@ -18,6 +18,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_BOARD_LATE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="hsdk# " +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2071 CONFIG_CMD_ENV_FLAGS=y # CONFIG_CMD_FLASH is not set diff --git a/configs/huawei_hg556a_ram_defconfig b/configs/huawei_hg556a_ram_defconfig index 5de0fe99017..fbdbf4b8d76 100644 --- a/configs/huawei_hg556a_ram_defconfig +++ b/configs/huawei_hg556a_ram_defconfig @@ -20,6 +20,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="HG556a # " CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=538 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig index 7415b1158c6..c885de7663d 100644 --- a/configs/ids8313_defconfig +++ b/configs/ids8313_defconfig @@ -140,6 +140,7 @@ CONFIG_PREBOOT="echo;echo Type \"run nfsboot\" to mount root filesystem over NFS CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_CBSIZE=1024 CONFIG_CMD_IMLS=y CONFIG_CMD_ENV_FLAGS=y CONFIG_CMD_I2C=y diff --git a/configs/imx8mm-cl-iot-gate-optee_defconfig b/configs/imx8mm-cl-iot-gate-optee_defconfig index ba70c161b08..d79203d0aa4 100644 --- a/configs/imx8mm-cl-iot-gate-optee_defconfig +++ b/configs/imx8mm-cl-iot-gate-optee_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig index 3697bb7479d..e525e2d4a17 100644 --- a/configs/imx8mm-cl-iot-gate_defconfig +++ b/configs/imx8mm-cl-iot-gate_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig index 3296e77bc4a..1787b5082a1 100644 --- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig +++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig @@ -29,6 +29,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_POWER=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig index 39ab52903f8..9096bab638d 100644 --- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig +++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig @@ -29,6 +29,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_POWER=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/imx8mm-mx8menlo_defconfig b/configs/imx8mm-mx8menlo_defconfig index 8991afffef9..347abb3a19d 100644 --- a/configs/imx8mm-mx8menlo_defconfig +++ b/configs/imx8mm-mx8menlo_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="Verdin iMX8MM # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2081 # CONFIG_BOOTM_NETBSD is not set CONFIG_CMD_ASKENV=y diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig index 3ce4f823238..494f469fe11 100644 --- a/configs/imx8mm_beacon_defconfig +++ b/configs/imx8mm_beacon_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/imx8mm_data_modul_edm_sbc_defconfig b/configs/imx8mm_data_modul_edm_sbc_defconfig index 4dced5a60c9..be921506432 100644 --- a/configs/imx8mm_data_modul_edm_sbc_defconfig +++ b/configs/imx8mm_data_modul_edm_sbc_defconfig @@ -55,6 +55,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index 51e1a65451c..5f7e5f7b4a3 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig index 2cef22b9acd..d5a20159601 100644 --- a/configs/imx8mm_venice_defconfig +++ b/configs/imx8mm_venice_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig index 0900164648b..6a2f0dcac3f 100644 --- a/configs/imx8mn_beacon_2g_defconfig +++ b/configs/imx8mn_beacon_2g_defconfig @@ -41,6 +41,7 @@ CONFIG_SPL_POWER=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 # CONFIG_BOOTM_NETBSD is not set # CONFIG_CMD_EXPORTENV is not set diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig index a3e46bfe6ea..d2d182d342d 100644 --- a/configs/imx8mn_beacon_defconfig +++ b/configs/imx8mn_beacon_defconfig @@ -41,6 +41,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 # CONFIG_BOOTM_NETBSD is not set # CONFIG_CMD_EXPORTENV is not set diff --git a/configs/imx8mn_bsh_smm_s2_defconfig b/configs/imx8mn_bsh_smm_s2_defconfig index a5839d73498..69ba13797a3 100644 --- a/configs/imx8mn_bsh_smm_s2_defconfig +++ b/configs/imx8mn_bsh_smm_s2_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2067 CONFIG_CMD_FUSE=y CONFIG_CMD_USB=y diff --git a/configs/imx8mn_bsh_smm_s2pro_defconfig b/configs/imx8mn_bsh_smm_s2pro_defconfig index b7470ec16aa..655dfbe6c48 100644 --- a/configs/imx8mn_bsh_smm_s2pro_defconfig +++ b/configs/imx8mn_bsh_smm_s2pro_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2067 CONFIG_CMD_FUSE=y CONFIG_CMD_MMC=y diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig index ce5aa8de88b..6f96f3aeef8 100644 --- a/configs/imx8mn_ddr4_evk_defconfig +++ b/configs/imx8mn_ddr4_evk_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig index bbe476a2e89..9c879cd6d1c 100644 --- a/configs/imx8mn_evk_defconfig +++ b/configs/imx8mn_evk_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/imx8mn_var_som_defconfig b/configs/imx8mn_var_som_defconfig index b46f19297ed..161f2752a1c 100644 --- a/configs/imx8mn_var_som_defconfig +++ b/configs/imx8mn_var_som_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2067 CONFIG_CMD_FUSE=y CONFIG_CMD_MMC=y diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig index 4b8dde82d5c..7c23351da5a 100644 --- a/configs/imx8mn_venice_defconfig +++ b/configs/imx8mn_venice_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/imx8mp_dhcom_pdk2_defconfig b/configs/imx8mp_dhcom_pdk2_defconfig index fd0d19bad36..3ef5dc01fd1 100644 --- a/configs/imx8mp_dhcom_pdk2_defconfig +++ b/configs/imx8mp_dhcom_pdk2_defconfig @@ -55,6 +55,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2081 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index 39216509d85..a2025f2116c 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/imx8mp_rsb3720a1_4G_defconfig b/configs/imx8mp_rsb3720a1_4G_defconfig index c5d32fc7d17..e3e9bc7e7ab 100644 --- a/configs/imx8mp_rsb3720a1_4G_defconfig +++ b/configs/imx8mp_rsb3720a1_4G_defconfig @@ -44,6 +44,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_ERASEENV=y diff --git a/configs/imx8mp_rsb3720a1_6G_defconfig b/configs/imx8mp_rsb3720a1_6G_defconfig index 1d898480e28..3b0e02e3d03 100644 --- a/configs/imx8mp_rsb3720a1_6G_defconfig +++ b/configs/imx8mp_rsb3720a1_6G_defconfig @@ -44,6 +44,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_ERASEENV=y diff --git a/configs/imx8mp_venice_defconfig b/configs/imx8mp_venice_defconfig index e1a4e1a2f36..80724ac1a2b 100644 --- a/configs/imx8mp_venice_defconfig +++ b/configs/imx8mp_venice_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig index cdd69cffa7d..1bc0a9d1b27 100644 --- a/configs/imx8qm_mek_defconfig +++ b/configs/imx8qm_mek_defconfig @@ -35,6 +35,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set diff --git a/configs/imx8qm_rom7720_a1_4G_defconfig b/configs/imx8qm_rom7720_a1_4G_defconfig index 338cce1f261..6ed2882aaab 100644 --- a/configs/imx8qm_rom7720_a1_4G_defconfig +++ b/configs/imx8qm_rom7720_a1_4G_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index a8376b93ae4..bd4ab56ad59 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -35,6 +35,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 CONFIG_SPL_POWER_DOMAIN=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2068 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set diff --git a/configs/imx8ulp_evk_defconfig b/configs/imx8ulp_evk_defconfig index 917e2cded4e..88ba690fc48 100644 --- a/configs/imx8ulp_evk_defconfig +++ b/configs/imx8ulp_evk_defconfig @@ -33,6 +33,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2068 CONFIG_CMD_MEMTEST=y CONFIG_CMD_FUSE=y diff --git a/configs/imxrt1020-evk_defconfig b/configs/imxrt1020-evk_defconfig index 58a546463e7..86b4a6b2a2a 100644 --- a/configs/imxrt1020-evk_defconfig +++ b/configs/imxrt1020-evk_defconfig @@ -27,6 +27,7 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x100 # CONFIG_SPL_CRC32 is not set +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/imxrt1050-evk_defconfig b/configs/imxrt1050-evk_defconfig index bdd14a38fed..09432d9793f 100644 --- a/configs/imxrt1050-evk_defconfig +++ b/configs/imxrt1050-evk_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x100 # CONFIG_SPL_CRC32 is not set +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/integratorap_cm720t_defconfig b/configs/integratorap_cm720t_defconfig index 7f5e470906f..72da7b89267 100644 --- a/configs/integratorap_cm720t_defconfig +++ b/configs/integratorap_cm720t_defconfig @@ -17,6 +17,7 @@ CONFIG_HUSH_PARSER=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="Integrator-AP # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=289 CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y diff --git a/configs/integratorap_cm920t_defconfig b/configs/integratorap_cm920t_defconfig index c7c15e68853..4464803c35f 100644 --- a/configs/integratorap_cm920t_defconfig +++ b/configs/integratorap_cm920t_defconfig @@ -17,6 +17,7 @@ CONFIG_HUSH_PARSER=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="Integrator-AP # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=289 CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y diff --git a/configs/integratorap_cm926ejs_defconfig b/configs/integratorap_cm926ejs_defconfig index e2b69d2cac2..c8f9d4a9766 100644 --- a/configs/integratorap_cm926ejs_defconfig +++ b/configs/integratorap_cm926ejs_defconfig @@ -17,6 +17,7 @@ CONFIG_HUSH_PARSER=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="Integrator-AP # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=289 CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y diff --git a/configs/integratorap_cm946es_defconfig b/configs/integratorap_cm946es_defconfig index 5b224c73f9c..15e803038b4 100644 --- a/configs/integratorap_cm946es_defconfig +++ b/configs/integratorap_cm946es_defconfig @@ -17,6 +17,7 @@ CONFIG_HUSH_PARSER=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="Integrator-AP # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=289 CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y diff --git a/configs/integratorcp_cm1136_defconfig b/configs/integratorcp_cm1136_defconfig index 8e41e240aac..e6cf28fa433 100644 --- a/configs/integratorcp_cm1136_defconfig +++ b/configs/integratorcp_cm1136_defconfig @@ -21,6 +21,7 @@ CONFIG_HUSH_PARSER=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="Integrator-CP # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=289 CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y diff --git a/configs/integratorcp_cm920t_defconfig b/configs/integratorcp_cm920t_defconfig index fbb43f4a179..f740cd4ff61 100644 --- a/configs/integratorcp_cm920t_defconfig +++ b/configs/integratorcp_cm920t_defconfig @@ -21,6 +21,7 @@ CONFIG_HUSH_PARSER=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="Integrator-CP # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=289 CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y diff --git a/configs/integratorcp_cm926ejs_defconfig b/configs/integratorcp_cm926ejs_defconfig index d744dd1de0e..96ba15f0fa9 100644 --- a/configs/integratorcp_cm926ejs_defconfig +++ b/configs/integratorcp_cm926ejs_defconfig @@ -21,6 +21,7 @@ CONFIG_HUSH_PARSER=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="Integrator-CP # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=289 CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y diff --git a/configs/integratorcp_cm946es_defconfig b/configs/integratorcp_cm946es_defconfig index 14f0bb7cc82..017aaf72137 100644 --- a/configs/integratorcp_cm946es_defconfig +++ b/configs/integratorcp_cm946es_defconfig @@ -21,6 +21,7 @@ CONFIG_HUSH_PARSER=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="Integrator-CP # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=289 CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y diff --git a/configs/iot_devkit_defconfig b/configs/iot_devkit_defconfig index d415cc35aa4..1380a6a8e34 100644 --- a/configs/iot_devkit_defconfig +++ b/configs/iot_devkit_defconfig @@ -14,6 +14,7 @@ CONFIG_SYS_LOAD_ADDR=0x30000000 CONFIG_LOCALVERSION="-iotdk-1.0" # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_SYS_PROMPT="IoTDK# " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=280 # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_BOOTM is not set diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig index 2beaf28490a..7c42cf653cb 100644 --- a/configs/km_kirkwood_128m16_defconfig +++ b/configs/km_kirkwood_128m16_defconfig @@ -23,6 +23,7 @@ CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig index bb96558ee55..596856f6180 100644 --- a/configs/km_kirkwood_defconfig +++ b/configs/km_kirkwood_defconfig @@ -23,6 +23,7 @@ CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig index fb8c1db04cb..ba0d74d0d07 100644 --- a/configs/km_kirkwood_pci_defconfig +++ b/configs/km_kirkwood_pci_defconfig @@ -24,6 +24,7 @@ CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig index a6b501528ae..17e899a9196 100644 --- a/configs/kmcent2_defconfig +++ b/configs/kmcent2_defconfig @@ -24,6 +24,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_DM=y CONFIG_CMD_I2C=y diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig index c8bb0585bf5..924f9ac4637 100644 --- a/configs/kmcoge5ne_defconfig +++ b/configs/kmcoge5ne_defconfig @@ -169,6 +169,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig index f814e6bc01a..24743226c1c 100644 --- a/configs/kmcoge5un_defconfig +++ b/configs/kmcoge5un_defconfig @@ -26,6 +26,7 @@ CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig index 58813b7f55a..dfa2500a29a 100644 --- a/configs/kmeter1_defconfig +++ b/configs/kmeter1_defconfig @@ -139,6 +139,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig index 7f08ddc7dc3..0d3867221a9 100644 --- a/configs/kmnusa_defconfig +++ b/configs/kmnusa_defconfig @@ -27,6 +27,7 @@ CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig index 6061fcfd176..7775b604f57 100644 --- a/configs/kmopti2_defconfig +++ b/configs/kmopti2_defconfig @@ -152,6 +152,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig index 11a6039f681..221335da8ea 100644 --- a/configs/kmsupx5_defconfig +++ b/configs/kmsupx5_defconfig @@ -132,6 +132,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y diff --git a/configs/kmsuse2_defconfig b/configs/kmsuse2_defconfig index e2e469e3f55..c50f79cc361 100644 --- a/configs/kmsuse2_defconfig +++ b/configs/kmsuse2_defconfig @@ -28,6 +28,7 @@ CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/kmtegr1_defconfig b/configs/kmtegr1_defconfig index 1f0a4422392..f1791a0fc0e 100644 --- a/configs/kmtegr1_defconfig +++ b/configs/kmtegr1_defconfig @@ -131,6 +131,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig index a8c6daefc9f..6670c317a19 100644 --- a/configs/kmtepr2_defconfig +++ b/configs/kmtepr2_defconfig @@ -152,6 +152,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig index 43fe94230cd..ff71d1463b2 100644 --- a/configs/koelsch_defconfig +++ b/configs/koelsch_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=256 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig index 7a3a8d5caff..4ba834514a0 100644 --- a/configs/kontron-sl-mx8mm_defconfig +++ b/configs/kontron-sl-mx8mm_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SPL_ATF=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_LZMADEC is not set diff --git a/configs/kontron_pitx_imx8m_defconfig b/configs/kontron_pitx_imx8m_defconfig index cfc76354375..ae94ed1f12a 100644 --- a/configs/kontron_pitx_imx8m_defconfig +++ b/configs/kontron_pitx_imx8m_defconfig @@ -35,6 +35,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_BOOTM_NETBSD is not set # CONFIG_CMD_EXPORTENV is not set diff --git a/configs/kontron_sl28_defconfig b/configs/kontron_sl28_defconfig index 2a39ec1921e..1bae4709210 100644 --- a/configs/kontron_sl28_defconfig +++ b/configs/kontron_sl28_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x230000 +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kzm9g_defconfig b/configs/kzm9g_defconfig index 4477966542a..779f0d9ed89 100644 --- a/configs/kzm9g_defconfig +++ b/configs/kzm9g_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTARGS="root=/dev/null console=ttySC4,115200" # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="KZM-A9-GT# " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=256 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y diff --git a/configs/lager_defconfig b/configs/lager_defconfig index 98e6d9201d2..a58c23a524f 100644 --- a/configs/lager_defconfig +++ b/configs/lager_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=256 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/linkit-smart-7688_defconfig b/configs/linkit-smart-7688_defconfig index 8ffe8a58933..b137edd7e6a 100644 --- a/configs/linkit-smart-7688_defconfig +++ b/configs/linkit-smart-7688_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_LICENSE=y # CONFIG_CMD_ELF is not set diff --git a/configs/ls1021aiot_qspi_defconfig b/configs/ls1021aiot_qspi_defconfig index cb6f146304d..8b588f7d704 100644 --- a/configs/ls1021aiot_qspi_defconfig +++ b/configs/ls1021aiot_qspi_defconfig @@ -22,6 +22,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig index e7475459128..b554b616228 100644 --- a/configs/ls1021aiot_sdcard_defconfig +++ b/configs/ls1021aiot_sdcard_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig index 6a610bfa517..915871338e0 100644 --- a/configs/ls1021aqds_ddr4_nor_defconfig +++ b/configs/ls1021aqds_ddr4_nor_defconfig @@ -32,6 +32,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig index f933edb2bf4..00d9d3eced9 100644 --- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig +++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig @@ -32,6 +32,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index 70a51934320..bdb66d0e837 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -50,6 +50,7 @@ CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig index 2e441686d74..ad7e390b5c4 100644 --- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig @@ -31,6 +31,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig index 6461bbe74d3..1434817e1c4 100644 --- a/configs/ls1021aqds_nor_defconfig +++ b/configs/ls1021aqds_nor_defconfig @@ -32,6 +32,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig index 002c6c218d6..9bfbe2eff97 100644 --- a/configs/ls1021aqds_nor_lpuart_defconfig +++ b/configs/ls1021aqds_nor_lpuart_defconfig @@ -32,6 +32,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig index a7f5cb0492c..02d056f4e6c 100644 --- a/configs/ls1021aqds_qspi_defconfig +++ b/configs/ls1021aqds_qspi_defconfig @@ -31,6 +31,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index eaa9a7781a3..c936c0051af 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -48,6 +48,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index 605bc23b410..230f1470afe 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -47,6 +47,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1021atsn_qspi_defconfig b/configs/ls1021atsn_qspi_defconfig index cbd68899030..cfa83b8c3b8 100644 --- a/configs/ls1021atsn_qspi_defconfig +++ b/configs/ls1021atsn_qspi_defconfig @@ -24,6 +24,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_GREPENV=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig index 82b38a88839..4754a37f0d4 100644 --- a/configs/ls1021atsn_sdcard_defconfig +++ b/configs/ls1021atsn_sdcard_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_GREPENV=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig index 1ddd433de2d..175f10f1f55 100644 --- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig @@ -30,6 +30,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig index 429cada84b4..e80b793a382 100644 --- a/configs/ls1021atwr_nor_defconfig +++ b/configs/ls1021atwr_nor_defconfig @@ -31,6 +31,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig index 802225ba5cb..a22d2a59210 100644 --- a/configs/ls1021atwr_nor_lpuart_defconfig +++ b/configs/ls1021atwr_nor_lpuart_defconfig @@ -31,6 +31,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig index 08d0c0074ab..aadc61b66ca 100644 --- a/configs/ls1021atwr_qspi_defconfig +++ b/configs/ls1021atwr_qspi_defconfig @@ -32,6 +32,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index dada092a29f..69df4623ddb 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -47,6 +47,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index 813bf7ff08c..637cc96928b 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -48,6 +48,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index b928b6c3bc9..9050bba7011 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -49,6 +49,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index cfaa0e13698..a1a56645921 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=1024 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DM=y diff --git a/configs/malta64_defconfig b/configs/malta64_defconfig index 165ec03d0bc..944d0fd8a8d 100644 --- a/configs/malta64_defconfig +++ b/configs/malta64_defconfig @@ -14,6 +14,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="malta # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y diff --git a/configs/malta64el_defconfig b/configs/malta64el_defconfig index 8b49325628f..907fd19328b 100644 --- a/configs/malta64el_defconfig +++ b/configs/malta64el_defconfig @@ -16,6 +16,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="maltael # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=283 CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y diff --git a/configs/malta_defconfig b/configs/malta_defconfig index 52e83390be3..f2b507e200c 100644 --- a/configs/malta_defconfig +++ b/configs/malta_defconfig @@ -13,6 +13,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="malta # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig index 3ae26d22ee1..866f34f8326 100644 --- a/configs/maltael_defconfig +++ b/configs/maltael_defconfig @@ -15,6 +15,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="maltael # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=283 CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y diff --git a/configs/meesc_dataflash_defconfig b/configs/meesc_dataflash_defconfig index e69aae49f5a..315c4841825 100644 --- a/configs/meesc_dataflash_defconfig +++ b/configs/meesc_dataflash_defconfig @@ -18,6 +18,7 @@ CONFIG_USE_PREBOOT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/meesc_defconfig b/configs/meesc_defconfig index d08acb6fbd7..9246f095254 100644 --- a/configs/meesc_defconfig +++ b/configs/meesc_defconfig @@ -17,6 +17,7 @@ CONFIG_USE_PREBOOT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index 31d2c48e590..a919d8bcf89 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_OS_BASE=0x2c060000 CONFIG_SYS_PROMPT="U-Boot-mONStR> " CONFIG_SYS_MAXARGS=15 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=544 CONFIG_CMD_IMLS=y CONFIG_CMD_SPL=y diff --git a/configs/microchip_mpfs_icicle_defconfig b/configs/microchip_mpfs_icicle_defconfig index 1a524a92348..5453af8508e 100644 --- a/configs/microchip_mpfs_icicle_defconfig +++ b/configs/microchip_mpfs_icicle_defconfig @@ -12,6 +12,7 @@ CONFIG_FIT=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_SYS_PROMPT="RISC-V # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_BOOTP_SEND_HOSTNAME=y diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig index e94835bc35e..7923fadf336 100644 --- a/configs/mk808_defconfig +++ b/configs/mk808_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_FS_EXT4=y CONFIG_SYS_MMCSD_FS_BOOT_PARTITION=2 CONFIG_TPL_NEEDS_SEPARATE_STACK=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set diff --git a/configs/mscc_jr2_defconfig b/configs/mscc_jr2_defconfig index 65b5cd86922..e48d4a8d8fe 100644 --- a/configs/mscc_jr2_defconfig +++ b/configs/mscc_jr2_defconfig @@ -26,6 +26,7 @@ CONFIG_BOARD_TYPES=y CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SYS_PROMPT="jr2 # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=279 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/mscc_luton_defconfig b/configs/mscc_luton_defconfig index 99e85ecef00..1a2db895d02 100644 --- a/configs/mscc_luton_defconfig +++ b/configs/mscc_luton_defconfig @@ -28,6 +28,7 @@ CONFIG_BOARD_TYPES=y CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SYS_PROMPT="luton # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/mscc_ocelot_defconfig b/configs/mscc_ocelot_defconfig index c9dfaf331f2..d05a26df31d 100644 --- a/configs/mscc_ocelot_defconfig +++ b/configs/mscc_ocelot_defconfig @@ -25,6 +25,7 @@ CONFIG_BOARD_TYPES=y CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SYS_PROMPT="ocelot # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/mscc_serval_defconfig b/configs/mscc_serval_defconfig index f034fd6fbbc..a56c5ebdecf 100644 --- a/configs/mscc_serval_defconfig +++ b/configs/mscc_serval_defconfig @@ -23,6 +23,7 @@ CONFIG_BOARD_TYPES=y CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SYS_PROMPT="serval # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/mscc_servalt_defconfig b/configs/mscc_servalt_defconfig index 018c618f5e4..cf1c4db1d38 100644 --- a/configs/mscc_servalt_defconfig +++ b/configs/mscc_servalt_defconfig @@ -22,6 +22,7 @@ CONFIG_BOARD_TYPES=y CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SYS_PROMPT="servalt # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=283 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/mt8183_pumpkin_defconfig b/configs/mt8183_pumpkin_defconfig index 95486aed976..ab2a9c7efa1 100644 --- a/configs/mt8183_pumpkin_defconfig +++ b/configs/mt8183_pumpkin_defconfig @@ -23,6 +23,7 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="mt8183-pumpkin" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/mt8512_bm1_emmc_defconfig b/configs/mt8512_bm1_emmc_defconfig index c75b9ff5d21..4e7b8fbdd35 100644 --- a/configs/mt8512_bm1_emmc_defconfig +++ b/configs/mt8512_bm1_emmc_defconfig @@ -15,6 +15,7 @@ CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_DEFAULT_FDT_FILE="mt8512-bm1-emmc.dtb" CONFIG_SYS_PROMPT="MT8512> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_MMC=y diff --git a/configs/mt8516_pumpkin_defconfig b/configs/mt8516_pumpkin_defconfig index 5b10aebe023..0425ffd0f97 100644 --- a/configs/mt8516_pumpkin_defconfig +++ b/configs/mt8516_pumpkin_defconfig @@ -22,6 +22,7 @@ CONFIG_DEFAULT_FDT_FILE="mt8516-pumpkin" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_LATE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/mt8518_ap1_emmc_defconfig b/configs/mt8518_ap1_emmc_defconfig index da029ee1ed4..8a2ddabcda7 100644 --- a/configs/mt8518_ap1_emmc_defconfig +++ b/configs/mt8518_ap1_emmc_defconfig @@ -15,6 +15,7 @@ CONFIG_FIT_SIGNATURE=y CONFIG_DEFAULT_FDT_FILE="mt8518-ap1-emmc.dtb" CONFIG_BOARD_LATE_INIT=y CONFIG_SYS_PROMPT="MT8518> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_MMC=y diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig index 1e501275dec..8bd32003812 100644 --- a/configs/mx51evk_defconfig +++ b/configs/mx51evk_defconfig @@ -18,6 +18,7 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig index 77551cd0489..c92e89c612b 100644 --- a/configs/mx53ppd_defconfig +++ b/configs/mx53ppd_defconfig @@ -23,6 +23,7 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=48 +CONFIG_SYS_CBSIZE=1024 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y CONFIG_CMD_FUSE=y diff --git a/configs/mx7ulp_com_defconfig b/configs/mx7ulp_com_defconfig index ac062c387a8..5b3b332f10d 100644 --- a/configs/mx7ulp_com_defconfig +++ b/configs/mx7ulp_com_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTCOMMAND="if run loadimage; then run mmcboot; fi" CONFIG_DEFAULT_FDT_FILE="imx7ulp-com" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y diff --git a/configs/mx7ulp_evk_defconfig b/configs/mx7ulp_evk_defconfig index 891ea8ceb0a..6a22040c035 100644 --- a/configs/mx7ulp_evk_defconfig +++ b/configs/mx7ulp_evk_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=256 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y diff --git a/configs/mx7ulp_evk_plugin_defconfig b/configs/mx7ulp_evk_plugin_defconfig index f29ecf6c83c..ea03eb37717 100644 --- a/configs/mx7ulp_evk_plugin_defconfig +++ b/configs/mx7ulp_evk_plugin_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=256 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_MEMTEST=y CONFIG_CMD_FUSE=y diff --git a/configs/netgear_cg3100d_ram_defconfig b/configs/netgear_cg3100d_ram_defconfig index d82df1e3d55..05ab61beb16 100644 --- a/configs/netgear_cg3100d_ram_defconfig +++ b/configs/netgear_cg3100d_ram_defconfig @@ -18,6 +18,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="CG3100D # " CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=539 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y diff --git a/configs/netgear_dgnd3700v2_ram_defconfig b/configs/netgear_dgnd3700v2_ram_defconfig index d30545948ba..e1f9ceed080 100644 --- a/configs/netgear_dgnd3700v2_ram_defconfig +++ b/configs/netgear_dgnd3700v2_ram_defconfig @@ -21,6 +21,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="DGND3700v2 # " CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=542 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y diff --git a/configs/nokia_rx51_defconfig b/configs/nokia_rx51_defconfig index a8707b4cf15..6c3a95cd069 100644 --- a/configs/nokia_rx51_defconfig +++ b/configs/nokia_rx51_defconfig @@ -28,6 +28,7 @@ CONFIG_PREBOOT="run preboot" # CONFIG_SYS_DEVICE_NULLDEV is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Nokia RX-51 # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=287 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/nsim_700_defconfig b/configs/nsim_700_defconfig index 359edf18f0b..068b654dc9f 100644 --- a/configs/nsim_700_defconfig +++ b/configs/nsim_700_defconfig @@ -14,6 +14,7 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_SYS_PROMPT="nsim# " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=279 # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y diff --git a/configs/nsim_700be_defconfig b/configs/nsim_700be_defconfig index 00ff67046fd..58ed0d188fe 100644 --- a/configs/nsim_700be_defconfig +++ b/configs/nsim_700be_defconfig @@ -15,6 +15,7 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_SYS_PROMPT="nsim# " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=279 # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y diff --git a/configs/nsim_hs38_defconfig b/configs/nsim_hs38_defconfig index 8cbad8649d7..357d61f55db 100644 --- a/configs/nsim_hs38_defconfig +++ b/configs/nsim_hs38_defconfig @@ -16,6 +16,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SYS_PROMPT="nsim# " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=279 CONFIG_CMD_DM=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/nsim_hs38be_defconfig b/configs/nsim_hs38be_defconfig index 6542da11ecc..e9b4f6c1365 100644 --- a/configs/nsim_hs38be_defconfig +++ b/configs/nsim_hs38be_defconfig @@ -16,6 +16,7 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_SYS_PROMPT="nsim# " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=279 # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y diff --git a/configs/octeon_ebb7304_defconfig b/configs/octeon_ebb7304_defconfig index b965919c278..dc2e215c050 100644 --- a/configs/octeon_ebb7304_defconfig +++ b/configs/octeon_ebb7304_defconfig @@ -18,6 +18,7 @@ CONFIG_OF_BOARD_FIXUP=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_LATE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/octeon_nic23_defconfig b/configs/octeon_nic23_defconfig index 4137c6156a5..53309152301 100644 --- a/configs/octeon_nic23_defconfig +++ b/configs/octeon_nic23_defconfig @@ -25,6 +25,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/openpiton_riscv64_defconfig b/configs/openpiton_riscv64_defconfig index 7aec52985bb..3af8aee4540 100644 --- a/configs/openpiton_riscv64_defconfig +++ b/configs/openpiton_riscv64_defconfig @@ -17,6 +17,7 @@ CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fdt addr ${fdtcontroladdr}; fdt move ${fdtcontroladdr} ${fdt_addr_r}; load mmc ${mmcdev}:${mmcpart} ${kernel_addr_r} ${image}; booti ${kernel_addr_r} - ${fdt_addr_r}; " CONFIG_SYS_PROMPT="openpiton$ " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=284 # CONFIG_CMD_CPU is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/openpiton_riscv64_spl_defconfig b/configs/openpiton_riscv64_spl_defconfig index 4f3080a65ac..a5c01d365cc 100644 --- a/configs/openpiton_riscv64_spl_defconfig +++ b/configs/openpiton_riscv64_spl_defconfig @@ -27,6 +27,7 @@ CONFIG_SPL_CPU=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_RTC=y CONFIG_SYS_PROMPT="openpiton$ " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=284 # CONFIG_CMD_CPU is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig index a9580be8e50..75999d177dc 100644 --- a/configs/pcm052_defconfig +++ b/configs/pcm052_defconfig @@ -22,6 +22,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run bootcmd_nand" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig index 99891d7bc34..c5d65740834 100644 --- a/configs/pg_wcom_expu1_defconfig +++ b/configs/pg_wcom_expu1_defconfig @@ -42,6 +42,7 @@ CONFIG_EVENT=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/pg_wcom_expu1_update_defconfig b/configs/pg_wcom_expu1_update_defconfig index ce99c099c8d..c2b079df379 100644 --- a/configs/pg_wcom_expu1_update_defconfig +++ b/configs/pg_wcom_expu1_update_defconfig @@ -40,6 +40,7 @@ CONFIG_EVENT=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig index 7a9515bb8fd..56e922a241c 100644 --- a/configs/pg_wcom_seli8_defconfig +++ b/configs/pg_wcom_seli8_defconfig @@ -42,6 +42,7 @@ CONFIG_EVENT=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/pg_wcom_seli8_update_defconfig b/configs/pg_wcom_seli8_update_defconfig index fcefa5a3c6f..9d25094a9a6 100644 --- a/configs/pg_wcom_seli8_update_defconfig +++ b/configs/pg_wcom_seli8_update_defconfig @@ -40,6 +40,7 @@ CONFIG_EVENT=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig index 0a6c6a9fb24..5f6455b70c3 100644 --- a/configs/phycore-imx8mm_defconfig +++ b/configs/phycore-imx8mm_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig index 19fc768419f..300216846dc 100644 --- a/configs/phycore-imx8mp_defconfig +++ b/configs/phycore-imx8mp_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/pm9261_defconfig b/configs/pm9261_defconfig index 585bf7ed6f3..c423c14e93c 100644 --- a/configs/pm9261_defconfig +++ b/configs/pm9261_defconfig @@ -22,6 +22,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="pm9261> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig index fdc89a972e1..0013210f6cf 100644 --- a/configs/pm9263_defconfig +++ b/configs/pm9263_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="u-boot-pm9263> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=288 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set diff --git a/configs/pm9g45_defconfig b/configs/pm9g45_defconfig index 296b38a5b2b..364ea830085 100644 --- a/configs/pm9g45_defconfig +++ b/configs/pm9g45_defconfig @@ -24,6 +24,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/poleg_evb_defconfig b/configs/poleg_evb_defconfig index 25a774da5d9..739bfcf1b61 100644 --- a/configs/poleg_evb_defconfig +++ b/configs/poleg_evb_defconfig @@ -17,6 +17,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run common_bootargs; run romboot" CONFIG_SYS_PROMPT="U-Boot>" CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=280 CONFIG_CMD_GPIO=y CONFIG_CMD_SPI=y diff --git a/configs/pomelo_defconfig b/configs/pomelo_defconfig index 008ea768c00..9c527181c49 100644 --- a/configs/pomelo_defconfig +++ b/configs/pomelo_defconfig @@ -14,6 +14,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200 earlycon=pl011,0x28001000 root=/dev/sda2 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_LAST_STAGE_INIT=y CONFIG_SYS_PROMPT="pomelo#" +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=280 CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/poplar_defconfig b/configs/poplar_defconfig index e5b7f5b11fd..f0c2040ca97 100644 --- a/configs/poplar_defconfig +++ b/configs/poplar_defconfig @@ -13,6 +13,7 @@ CONFIG_DISTRO_DEFAULTS=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="poplar# " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=537 CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/porter_defconfig b/configs/porter_defconfig index 046623eafdc..7b78c68fd41 100644 --- a/configs/porter_defconfig +++ b/configs/porter_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=256 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/qemu-riscv32_defconfig b/configs/qemu-riscv32_defconfig index dd0232e7eaf..8d8c9e275f1 100644 --- a/configs/qemu-riscv32_defconfig +++ b/configs/qemu-riscv32_defconfig @@ -9,6 +9,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu-riscv32_smode_defconfig b/configs/qemu-riscv32_smode_defconfig index 06a58918787..2845cbcdc63 100644 --- a/configs/qemu-riscv32_smode_defconfig +++ b/configs/qemu-riscv32_smode_defconfig @@ -10,6 +10,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig index 086e9c686cd..f9bdf68fd80 100644 --- a/configs/qemu-riscv32_spl_defconfig +++ b/configs/qemu-riscv32_spl_defconfig @@ -13,6 +13,7 @@ CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_CMD_MII is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/qemu-riscv64_defconfig b/configs/qemu-riscv64_defconfig index 027717d2c77..fadbba45f65 100644 --- a/configs/qemu-riscv64_defconfig +++ b/configs/qemu-riscv64_defconfig @@ -10,6 +10,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig index cc2696c204c..83b922654ba 100644 --- a/configs/qemu-riscv64_smode_defconfig +++ b/configs/qemu-riscv64_smode_defconfig @@ -13,6 +13,7 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr}; fdt addr ${fdtcontroladdr};" CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig index cb57dae247a..5cd22450714 100644 --- a/configs/qemu-riscv64_spl_defconfig +++ b/configs/qemu-riscv64_spl_defconfig @@ -13,6 +13,7 @@ CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_CMD_MII is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig index 18f34332cdb..c472d7ec5ee 100644 --- a/configs/qemu_arm64_defconfig +++ b/configs/qemu_arm64_defconfig @@ -22,6 +22,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_PCI_INIT_R=y +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig index ffa691774e5..6f5ba1fca49 100644 --- a/configs/qemu_arm_defconfig +++ b/configs/qemu_arm_defconfig @@ -24,6 +24,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_PCI_INIT_R=y +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/r2dplus_defconfig b/configs/r2dplus_defconfig index edb1591a933..5a38b070437 100644 --- a/configs/r2dplus_defconfig +++ b/configs/r2dplus_defconfig @@ -17,6 +17,7 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="pci enum" CONFIG_DISPLAY_BOARDINFO=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=256 CONFIG_CMD_IMLS=y CONFIG_CMD_DM=y diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig index 2b4cb5cb819..5b4930128d7 100644 --- a/configs/s5p_goni_defconfig +++ b/configs/s5p_goni_defconfig @@ -21,6 +21,7 @@ CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="Goni # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=384 # CONFIG_CMD_XIMG is not set CONFIG_CMD_THOR_DOWNLOAD=y diff --git a/configs/sagem_f@st1704_ram_defconfig b/configs/sagem_f@st1704_ram_defconfig index 48dd55cac62..4aff0f34a60 100644 --- a/configs/sagem_f@st1704_ram_defconfig +++ b/configs/sagem_f@st1704_ram_defconfig @@ -19,6 +19,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="F@ST1704 # " CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=540 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y diff --git a/configs/sam9x60_curiosity_mmc_defconfig b/configs/sam9x60_curiosity_mmc_defconfig index d0064dee583..3adf9f146da 100644 --- a/configs/sam9x60_curiosity_mmc_defconfig +++ b/configs/sam9x60_curiosity_mmc_defconfig @@ -27,6 +27,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 CONFIG_CMD_BOOTZ=y CONFIG_CMD_CLK=y diff --git a/configs/sam9x60ek_mmc_defconfig b/configs/sam9x60ek_mmc_defconfig index 1818a0c7347..e7858bf8578 100644 --- a/configs/sam9x60ek_mmc_defconfig +++ b/configs/sam9x60ek_mmc_defconfig @@ -27,6 +27,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 CONFIG_CMD_BOOTZ=y CONFIG_CMD_CLK=y diff --git a/configs/sam9x60ek_nandflash_defconfig b/configs/sam9x60ek_nandflash_defconfig index 9e68cb75ad9..2ffb4486c12 100644 --- a/configs/sam9x60ek_nandflash_defconfig +++ b/configs/sam9x60ek_nandflash_defconfig @@ -27,6 +27,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 CONFIG_CMD_BOOTZ=y CONFIG_CMD_CLK=y diff --git a/configs/sam9x60ek_qspiflash_defconfig b/configs/sam9x60ek_qspiflash_defconfig index 45a332d115e..13d08ff408e 100644 --- a/configs/sam9x60ek_qspiflash_defconfig +++ b/configs/sam9x60ek_qspiflash_defconfig @@ -28,6 +28,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 CONFIG_CMD_BOOTZ=y CONFIG_CMD_CLK=y diff --git a/configs/sama5d27_giantboard_defconfig b/configs/sama5d27_giantboard_defconfig index 5d1bad87c27..610f85a302d 100644 --- a/configs/sama5d27_giantboard_defconfig +++ b/configs/sama5d27_giantboard_defconfig @@ -37,6 +37,7 @@ CONFIG_BOOTCOMMAND="fatload mmc 0 0x22000000 at91-sama5d27_giantboard.dtb; fatlo # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_I2C=y diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig index 1441db5ad57..b4c8863e9bf 100644 --- a/configs/sama5d27_som1_ek_mmc1_defconfig +++ b/configs/sama5d27_som1_ek_mmc1_defconfig @@ -33,6 +33,7 @@ CONFIG_BOOTCOMMAND="fatload mmc 1 0x22000000 at91-sama5d27_som1_ek.dtb; fatload # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig index 187aae8a0bd..2ec2f094eee 100644 --- a/configs/sama5d27_som1_ek_mmc_defconfig +++ b/configs/sama5d27_som1_ek_mmc_defconfig @@ -34,6 +34,7 @@ CONFIG_BOOTCOMMAND="fatload mmc 0 0x22000000 at91-sama5d27_som1_ek.dtb; fatload # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig index 52383694808..55155c7861a 100644 --- a/configs/sama5d27_som1_ek_qspiflash_defconfig +++ b/configs/sama5d27_som1_ek_qspiflash_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwai # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig index 2ff8871a90e..5413652fad5 100644 --- a/configs/sama5d27_wlsom1_ek_mmc_defconfig +++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_DISPLAY_PRINT=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_AT91_MCK_BYPASS=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig index 4cdc2b06f31..3bc9558aea1 100644 --- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig +++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_AT91_MCK_BYPASS=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig index abc8e5dbf1d..69d8eedb872 100644 --- a/configs/sama5d2_icp_mmc_defconfig +++ b/configs/sama5d2_icp_mmc_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_AT91_MCK_BYPASS=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/sama5d2_icp_qspiflash_defconfig b/configs/sama5d2_icp_qspiflash_defconfig index 88462465d83..ca5787b1bec 100644 --- a/configs/sama5d2_icp_qspiflash_defconfig +++ b/configs/sama5d2_icp_qspiflash_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x21000000 at91-sama5d2_icp.dtb; fatload mmc CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_CONFIG=y CONFIG_CMD_BOOTZ=y diff --git a/configs/sama5d2_ptc_ek_mmc_defconfig b/configs/sama5d2_ptc_ek_mmc_defconfig index b2c531740dc..f3e515b55de 100644 --- a/configs/sama5d2_ptc_ek_mmc_defconfig +++ b/configs/sama5d2_ptc_ek_mmc_defconfig @@ -25,6 +25,7 @@ CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y diff --git a/configs/sama5d2_ptc_ek_nandflash_defconfig b/configs/sama5d2_ptc_ek_nandflash_defconfig index 9bdb3151f06..c71e8402af8 100644 --- a/configs/sama5d2_ptc_ek_nandflash_defconfig +++ b/configs/sama5d2_ptc_ek_nandflash_defconfig @@ -25,6 +25,7 @@ CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig index e39e283ad93..3af514530d9 100644 --- a/configs/sama5d2_xplained_emmc_defconfig +++ b/configs/sama5d2_xplained_emmc_defconfig @@ -32,6 +32,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x22000000 at91-sama5d2_xplained.dtb; fatload mmc 0:1 0x23000000 zImage; bootz 0x23000000 - 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index c4e885c54ae..b852b4e3a00 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -34,6 +34,7 @@ CONFIG_BOOTCOMMAND="fatload mmc 1:1 0x22000000 at91-sama5d2_xplained.dtb; fatloa # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig index 667614f67cf..c41c6e134c3 100644 --- a/configs/sama5d2_xplained_qspiflash_defconfig +++ b/configs/sama5d2_xplained_qspiflash_defconfig @@ -35,6 +35,7 @@ CONFIG_BOOTCOMMAND="sf probe 1:0; sf read 0x22000000 0x180000 0x80000; sf read 0 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index 117143c9601..4981a8a55ec 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y diff --git a/configs/sama5d36ek_cmp_mmc_defconfig b/configs/sama5d36ek_cmp_mmc_defconfig index f1141ca905c..a20b60093d0 100644 --- a/configs/sama5d36ek_cmp_mmc_defconfig +++ b/configs/sama5d36ek_cmp_mmc_defconfig @@ -25,6 +25,7 @@ CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig index dc48fa78fd4..21447263822 100644 --- a/configs/sama5d36ek_cmp_nandflash_defconfig +++ b/configs/sama5d36ek_cmp_nandflash_defconfig @@ -25,6 +25,7 @@ CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0 CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig index 0305025a1e4..2190edd55f2 100644 --- a/configs/sama5d36ek_cmp_spiflash_defconfig +++ b/configs/sama5d36ek_cmp_spiflash_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x220 CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index a477d231be3..86724e4df37 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -33,6 +33,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_name}.dtb; fi; fatload mmc 0:1 0x21000000 ${dtb_name}; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index 3d8b32e58ca..7a870ac38b3 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index 654b5fd589c..742830562f8 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -35,6 +35,7 @@ CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index a951701595a..55b9e9570ef 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index 4c6fc3d6523..20ea57ff4aa 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index 795a2470bfc..1b17400267b 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -34,6 +34,7 @@ CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_ # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index 44ee8adc258..49e3c778dc4 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index 66280f236a3..5df91abc6ff 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig index 5cfd45059ff..4c200304a46 100644 --- a/configs/sama5d4ek_mmc_defconfig +++ b/configs/sama5d4ek_mmc_defconfig @@ -35,6 +35,7 @@ CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig index 7e04a208fcd..4f016bc8243 100644 --- a/configs/sama5d4ek_nandflash_defconfig +++ b/configs/sama5d4ek_nandflash_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig index 5f002b7eca6..469040627c2 100644 --- a/configs/sama5d4ek_spiflash_defconfig +++ b/configs/sama5d4ek_spiflash_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig index a0e2316262e..f28720ca198 100644 --- a/configs/sama7g5ek_mmc1_defconfig +++ b/configs/sama7g5ek_mmc1_defconfig @@ -23,6 +23,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fatload mmc 1:1 0x61000000 at91-sama7g5ek.dtb; fatload mmc 1:1 0x62000000 zImage; bootz 0x62000000 - 0x61000000" CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/sama7g5ek_mmc_defconfig b/configs/sama7g5ek_mmc_defconfig index 3b62dd3ba06..80834bc8442 100644 --- a/configs/sama7g5ek_mmc_defconfig +++ b/configs/sama7g5ek_mmc_defconfig @@ -23,6 +23,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x61000000 at91-sama7g5ek.dtb; fatload mmc 0:1 0x62000000 zImage; bootz 0x62000000 - 0x61000000" CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/sfr_nb4-ser_ram_defconfig b/configs/sfr_nb4-ser_ram_defconfig index 07f0289724e..13da31e3004 100644 --- a/configs/sfr_nb4-ser_ram_defconfig +++ b/configs/sfr_nb4-ser_ram_defconfig @@ -21,6 +21,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="NB4-SER # " CONFIG_SYS_MAXARGS=24 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=539 CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y diff --git a/configs/sifive_unleashed_defconfig b/configs/sifive_unleashed_defconfig index a1744744e77..19603592748 100644 --- a/configs/sifive_unleashed_defconfig +++ b/configs/sifive_unleashed_defconfig @@ -25,6 +25,7 @@ CONFIG_MISC_INIT_R=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig index c7999f1b9b3..41224d03814 100644 --- a/configs/sifive_unmatched_defconfig +++ b/configs/sifive_unmatched_defconfig @@ -29,6 +29,7 @@ CONFIG_ID_EEPROM=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_EEPROM=y CONFIG_CMD_MEMINFO=y diff --git a/configs/silk_defconfig b/configs/silk_defconfig index e77578f6d6f..065241279ed 100644 --- a/configs/silk_defconfig +++ b/configs/silk_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=256 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/sipeed_maix_bitm_defconfig b/configs/sipeed_maix_bitm_defconfig index 4a8f76e893e..d977a9eb303 100644 --- a/configs/sipeed_maix_bitm_defconfig +++ b/configs/sipeed_maix_bitm_defconfig @@ -11,6 +11,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run k210_bootcmd" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_MTDIDS_DEFAULT="nor0=spi3:0" CONFIG_MTDPARTS_DEFAULT="nor0:1M(u-boot),0x1000@0xfff000(env)" diff --git a/configs/sipeed_maix_smode_defconfig b/configs/sipeed_maix_smode_defconfig index cd4d10504df..36c2dbb8a85 100644 --- a/configs/sipeed_maix_smode_defconfig +++ b/configs/sipeed_maix_smode_defconfig @@ -12,6 +12,7 @@ CONFIG_STACK_SIZE=0x100000 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run k210_bootcmd" CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_MTDIDS_DEFAULT="nor0=spi3:0" CONFIG_MTDPARTS_DEFAULT="nor0:1M(u-boot),0x1000@0xfff000(env)" diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig index 717baa2d3ed..a9f90e90753 100644 --- a/configs/smartweb_defconfig +++ b/configs/smartweb_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_NAND_BASE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=537 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig index e03abd11685..d4d45c928ab 100644 --- a/configs/smdkc100_defconfig +++ b/configs/smdkc100_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTCOMMAND="run ubifsboot" CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="SMDKC100 # " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=384 # CONFIG_CMD_FLASH is not set CONFIG_CMD_ONENAND=y diff --git a/configs/snapper9260_defconfig b/configs/snapper9260_defconfig index 5e75102aab5..9fb55dc9af3 100644 --- a/configs/snapper9260_defconfig +++ b/configs/snapper9260_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 ip=any" CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Snapper> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set diff --git a/configs/snapper9g20_defconfig b/configs/snapper9g20_defconfig index 25c2e19b8e3..aa765c41779 100644 --- a/configs/snapper9g20_defconfig +++ b/configs/snapper9g20_defconfig @@ -19,6 +19,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 ip=any" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set diff --git a/configs/sniper_defconfig b/configs/sniper_defconfig index 1491cdf1351..483b3713186 100644 --- a/configs/sniper_defconfig +++ b/configs/sniper_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=2 # CONFIG_SPL_FS_EXT4 is not set # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SYS_PROMPT="sniper # " +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=538 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/starqltechn_defconfig b/configs/starqltechn_defconfig index 4d555ce0f90..2d07767b61b 100644 --- a/configs/starqltechn_defconfig +++ b/configs/starqltechn_defconfig @@ -15,6 +15,7 @@ CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GPIO=y CONFIG_CMD_BMP=y diff --git a/configs/stemmy_defconfig b/configs/stemmy_defconfig index 6ae4c39bb4d..b5a96321d24 100644 --- a/configs/stemmy_defconfig +++ b/configs/stemmy_defconfig @@ -15,6 +15,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fastbootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_CONFIG=y CONFIG_CMD_LICENSE=y diff --git a/configs/stm32h743-disco_defconfig b/configs/stm32h743-disco_defconfig index 9b60b3e4469..4989f2c2a90 100644 --- a/configs/stm32h743-disco_defconfig +++ b/configs/stm32h743-disco_defconfig @@ -17,6 +17,7 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_DEFAULT_FDT_FILE="stm32h743i-disco" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="U-Boot > " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/stm32h743-eval_defconfig b/configs/stm32h743-eval_defconfig index c571ee295b3..c9009bf9db0 100644 --- a/configs/stm32h743-eval_defconfig +++ b/configs/stm32h743-eval_defconfig @@ -17,6 +17,7 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_DEFAULT_FDT_FILE="stm32h743i-eval" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="U-Boot > " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/stm32h750-art-pi_defconfig b/configs/stm32h750-art-pi_defconfig index e4403a263ae..932c78ef225 100644 --- a/configs/stm32h750-art-pi_defconfig +++ b/configs/stm32h750-art-pi_defconfig @@ -23,6 +23,7 @@ CONFIG_DEFAULT_FDT_FILE="stm32h750i-art-pi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SYS_PROMPT="U-Boot > " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/stout_defconfig b/configs/stout_defconfig index 5338ca9cf93..46b2549ca4e 100644 --- a/configs/stout_defconfig +++ b/configs/stout_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=256 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig index 902bfb50c75..90f9133cb62 100644 --- a/configs/taurus_defconfig +++ b/configs/taurus_defconfig @@ -49,6 +49,7 @@ CONFIG_SPL_NAND_BASE=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_SYS_XTRACE is not set # CONFIG_CMD_BDI is not set diff --git a/configs/tb100_defconfig b/configs/tb100_defconfig index 0fe537992f0..d9d67262cec 100644 --- a/configs/tb100_defconfig +++ b/configs/tb100_defconfig @@ -11,6 +11,7 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_SYS_PROMPT="[tb100]:~# " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=284 # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y diff --git a/configs/thunderx_88xx_defconfig b/configs/thunderx_88xx_defconfig index bb87c891377..ee7818db14d 100644 --- a/configs/thunderx_88xx_defconfig +++ b/configs/thunderx_88xx_defconfig @@ -22,6 +22,7 @@ CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="ThunderX_88XX> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=544 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/total_compute_defconfig b/configs/total_compute_defconfig index 64a637efc8a..1a674de8157 100644 --- a/configs/total_compute_defconfig +++ b/configs/total_compute_defconfig @@ -23,6 +23,7 @@ CONFIG_AVB_BUF_ADDR=0x90000000 CONFIG_AVB_BUF_SIZE=0x10000000 CONFIG_SYS_PROMPT="TOTAL_COMPUTE# " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=544 # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig index 331bfe80a50..3c2a7a34d1c 100644 --- a/configs/tuge1_defconfig +++ b/configs/tuge1_defconfig @@ -132,6 +132,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y diff --git a/configs/tuxx1_defconfig b/configs/tuxx1_defconfig index 617bca3b5a1..8f273da2f1f 100644 --- a/configs/tuxx1_defconfig +++ b/configs/tuxx1_defconfig @@ -154,6 +154,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y diff --git a/configs/usb_a9263_dataflash_defconfig b/configs/usb_a9263_dataflash_defconfig index e6dcd09fb02..b6846503ef4 100644 --- a/configs/usb_a9263_dataflash_defconfig +++ b/configs/usb_a9263_dataflash_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTCOMMAND="nboot 21000000 0" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig index 4489213d50f..ec47a0f10bd 100644 --- a/configs/verdin-imx8mm_defconfig +++ b/configs/verdin-imx8mm_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="Verdin iMX8MM # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2081 # CONFIG_BOOTM_NETBSD is not set CONFIG_CMD_ASKENV=y diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig index c1c7d09c6ff..10d88ff79f1 100644 --- a/configs/verdin-imx8mp_defconfig +++ b/configs/verdin-imx8mp_defconfig @@ -50,6 +50,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="Verdin iMX8MP # " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2081 # CONFIG_BOOTM_NETBSD is not set CONFIG_CMD_ASKENV=y diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig index 0aca0fa3d2d..688cecb7632 100644 --- a/configs/vexpress_aemv8a_juno_defconfig +++ b/configs/vexpress_aemv8a_juno_defconfig @@ -15,6 +15,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/sda2 rw rootwait earlycon=pl # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="VExpress64# " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=541 CONFIG_CMD_MEMTEST=y CONFIG_CMD_ARMFLASH=y diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig index 561474c7762..95412d24eea 100644 --- a/configs/vexpress_aemv8a_semi_defconfig +++ b/configs/vexpress_aemv8a_semi_defconfig @@ -15,6 +15,7 @@ CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1c090000 debug user_debug=31 l # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="VExpress64# " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=541 CONFIG_CMD_ABOOTIMG=y CONFIG_CMD_MEMTEST=y diff --git a/configs/vexpress_aemv8r_defconfig b/configs/vexpress_aemv8r_defconfig index 928b64b1660..2cc28d6c6a3 100644 --- a/configs/vexpress_aemv8r_defconfig +++ b/configs/vexpress_aemv8r_defconfig @@ -12,6 +12,7 @@ CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x9c090000 rootfstype=ext4 root= # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="VExpress64# " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=541 # CONFIG_MMC is not set CONFIG_VIRTIO_MMIO=y diff --git a/configs/vexpress_ca9x4_defconfig b/configs/vexpress_ca9x4_defconfig index 51cf3629b86..258337e1297 100644 --- a/configs/vexpress_ca9x4_defconfig +++ b/configs/vexpress_ca9x4_defconfig @@ -16,6 +16,7 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd; run bootflash" CONFIG_DEFAULT_FDT_FILE="vexpress-v2p-ca9.dtb" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig index 462e4a1bb4f..0a3374cd545 100644 --- a/configs/vf610twr_defconfig +++ b/configs/vf610twr_defconfig @@ -25,6 +25,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y diff --git a/configs/vf610twr_nand_defconfig b/configs/vf610twr_nand_defconfig index 8ab5157cb7b..f6ed47f7348 100644 --- a/configs/vf610twr_nand_defconfig +++ b/configs/vf610twr_nand_defconfig @@ -25,6 +25,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y diff --git a/configs/vinco_defconfig b/configs/vinco_defconfig index 2743b06e164..280a2ba294b 100644 --- a/configs/vinco_defconfig +++ b/configs/vinco_defconfig @@ -22,6 +22,7 @@ CONFIG_BOOTCOMMAND="mmc dev 0 0;mmc read ${loadaddr} ${k_offset} ${k_blksize};mm CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="vinco => " +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/vocore2_defconfig b/configs/vocore2_defconfig index 777b97b82d4..ff7a0ddd18e 100644 --- a/configs/vocore2_defconfig +++ b/configs/vocore2_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_LICENSE=y # CONFIG_BOOTM_NETBSD is not set diff --git a/configs/x530_defconfig b/configs/x530_defconfig index 0c2168ba92f..47601c41646 100644 --- a/configs/x530_defconfig +++ b/configs/x530_defconfig @@ -28,6 +28,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_MEMINFO=y # CONFIG_CMD_FLASH is not set diff --git a/configs/xilinx_versal_mini_defconfig b/configs/xilinx_versal_mini_defconfig index 08db407ebad..b8772c70927 100644 --- a/configs/xilinx_versal_mini_defconfig +++ b/configs/xilinx_versal_mini_defconfig @@ -30,6 +30,7 @@ CONFIG_CLOCKS=y # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_PROMPT="Versal> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=1024 CONFIG_SYS_PBSIZE=1049 # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set diff --git a/configs/xilinx_versal_mini_emmc0_defconfig b/configs/xilinx_versal_mini_emmc0_defconfig index d88821775a9..e55881185cf 100644 --- a/configs/xilinx_versal_mini_emmc0_defconfig +++ b/configs/xilinx_versal_mini_emmc0_defconfig @@ -26,6 +26,7 @@ CONFIG_CLOCKS=y # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_PROMPT="Versal> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=1024 CONFIG_SYS_PBSIZE=1049 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/xilinx_versal_mini_emmc1_defconfig b/configs/xilinx_versal_mini_emmc1_defconfig index 3c3c7b3b977..67390b841b1 100644 --- a/configs/xilinx_versal_mini_emmc1_defconfig +++ b/configs/xilinx_versal_mini_emmc1_defconfig @@ -26,6 +26,7 @@ CONFIG_CLOCKS=y # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_PROMPT="Versal> " CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=1024 CONFIG_SYS_PBSIZE=1049 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/xilinx_zynqmp_mini_defconfig b/configs/xilinx_zynqmp_mini_defconfig index 2053bf325db..50f87ba6028 100644 --- a/configs/xilinx_zynqmp_mini_defconfig +++ b/configs/xilinx_zynqmp_mini_defconfig @@ -22,6 +22,7 @@ CONFIG_CLOCKS=y # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=1024 CONFIG_SYS_PBSIZE=1049 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index 217b7bb929b..8a8522d4bb7 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -25,6 +25,7 @@ CONFIG_CLOCKS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=1024 CONFIG_SYS_PBSIZE=1049 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index 9ff23936def..7b24a2ea61b 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -25,6 +25,7 @@ CONFIG_CLOCKS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=1024 CONFIG_SYS_PBSIZE=1049 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig index 48a2ff2806f..dd5a36c92e9 100644 --- a/configs/xilinx_zynqmp_mini_nand_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_defconfig @@ -23,6 +23,7 @@ CONFIG_CLOCKS=y # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=1024 CONFIG_SYS_PBSIZE=1049 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/xilinx_zynqmp_mini_nand_single_defconfig b/configs/xilinx_zynqmp_mini_nand_single_defconfig index a4ee0e64218..b1bc70c4eae 100644 --- a/configs/xilinx_zynqmp_mini_nand_single_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_single_defconfig @@ -23,6 +23,7 @@ CONFIG_CLOCKS=y # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=1024 CONFIG_SYS_PBSIZE=1049 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index e2dca7e24cd..f8425dc4d23 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -25,6 +25,7 @@ CONFIG_CLOCKS=y # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=1024 CONFIG_SYS_PBSIZE=1049 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/xilinx_zynqmp_r5_defconfig b/configs/xilinx_zynqmp_r5_defconfig index 1aed7304b5d..1ae63490306 100644 --- a/configs/xilinx_zynqmp_r5_defconfig +++ b/configs/xilinx_zynqmp_r5_defconfig @@ -16,6 +16,7 @@ CONFIG_BOOTSTAGE=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="ZynqMP r5> " CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=284 # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_BOOTSTAGE=y diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig index a26fe838b74..d21ca5550a3 100644 --- a/configs/zynq_cse_nand_defconfig +++ b/configs/zynq_cse_nand_defconfig @@ -26,6 +26,7 @@ CONFIG_SPL_STACK_R=y # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=1024 CONFIG_SYS_PBSIZE=1047 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig index bae6a2fdb81..12a704be206 100644 --- a/configs/zynq_cse_nor_defconfig +++ b/configs/zynq_cse_nor_defconfig @@ -26,6 +26,7 @@ CONFIG_SPL_STACK_R=y # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=1024 CONFIG_SYS_PBSIZE=1047 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 0b858601a1a..392235088fb 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -35,6 +35,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_CBSIZE=1024 CONFIG_SYS_PBSIZE=1047 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h index a2cfa84397a..4fb74e7568b 100644 --- a/include/config_fallbacks.h +++ b/include/config_fallbacks.h @@ -29,13 +29,4 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } #endif -/* Console I/O Buffer Size */ -#ifndef CONFIG_SYS_CBSIZE -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_SYS_CBSIZE 1024 -#else -#define CONFIG_SYS_CBSIZE 256 -#endif -#endif - #endif /* __CONFIG_FALLBACKS_H */ diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index 69b350f502a..837c344b7a3 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -73,8 +73,6 @@ #define PHYS_SDRAM_1_SIZE SZ_2G /* 2 GB */ #define PHYS_SDRAM_2_SIZE SZ_2G /* 2 GB */ -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE SZ_2K #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #endif /* __APALIS_IMX8_H */ diff --git a/include/configs/apalis-tk1.h b/include/configs/apalis-tk1.h index fc802d1f7ff..ee9e9b2103f 100644 --- a/include/configs/apalis-tk1.h +++ b/include/configs/apalis-tk1.h @@ -89,10 +89,6 @@ "source ${loadaddr}\0" \ "vidargs=fbcon=map:1\0" -/* Increase console I/O buffer size */ -#undef CONFIG_SYS_CBSIZE -#define CONFIG_SYS_CBSIZE 1024 - /* Increase arguments buffer size */ #undef CONFIG_SYS_BARGSIZE #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index c825940cf10..74020e20912 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -119,8 +119,6 @@ "vidargs=mxc_hdmi.only_cea=1 fbmem=32M\0" /* Miscellaneous configurable options */ -#undef CONFIG_SYS_CBSIZE -#define CONFIG_SYS_CBSIZE 1024 /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h index 6b169a091ed..46ccea9c3e2 100644 --- a/include/configs/apalis_t30.h +++ b/include/configs/apalis_t30.h @@ -26,10 +26,6 @@ /* PCI networking support */ #define CONFIG_E1000_NO_NVM -/* Increase console I/O buffer size */ -#undef CONFIG_SYS_CBSIZE -#define CONFIG_SYS_CBSIZE 1024 - /* Increase arguments buffer size */ #undef CONFIG_SYS_BARGSIZE #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index 0a5fab36f44..16545ca9413 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -29,7 +29,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ /* * Boot Argument Buffer Size diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h index cb90c898658..85d8e31ef08 100644 --- a/include/configs/bcm_ns3.h +++ b/include/configs/bcm_ns3.h @@ -29,7 +29,6 @@ /* console configuration */ #define CONFIG_SYS_NS16550_CLK 25000000 -#define CONFIG_SYS_CBSIZE SZ_1K #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* diff --git a/include/configs/bcmstb.h b/include/configs/bcmstb.h index 6cf2886b5d2..5f8c5dee3c9 100644 --- a/include/configs/bcmstb.h +++ b/include/configs/bcmstb.h @@ -90,7 +90,6 @@ extern phys_addr_t prior_stage_fdt_address; /* * CONFIG_SYS_LOAD_ADDR - 1 MiB. */ -#define CONFIG_SYS_CBSIZE 512 /* * Large kernel image bootm configuration. diff --git a/include/configs/bmips_common.h b/include/configs/bmips_common.h index 64c9ea1e143..f85b9039fdd 100644 --- a/include/configs/bmips_common.h +++ b/include/configs/bmips_common.h @@ -14,6 +14,5 @@ /* Memory usage */ #define CONFIG_SYS_BOOTPARAMS_LEN SZ_128K -#define CONFIG_SYS_CBSIZE SZ_512 #endif /* __CONFIG_BMIPS_COMMON_H */ diff --git a/include/configs/bur_cfg_common.h b/include/configs/bur_cfg_common.h index 39fc05b0be1..304abc6d2e2 100644 --- a/include/configs/bur_cfg_common.h +++ b/include/configs/bur_cfg_common.h @@ -27,7 +27,4 @@ /* As stated above, the following choices are optional. */ -/* Console I/O Buffer Size */ -#define CONFIG_SYS_CBSIZE 512 - #endif /* __BUR_CFG_COMMON_H__ */ diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index ccc712786f4..5731a9e1110 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -118,7 +118,6 @@ #define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 GB */ /* Console buffer and boot args */ -#define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define BOOTAUX_RESERVED_MEM_BASE 0x88000000 diff --git a/include/configs/ci20.h b/include/configs/ci20.h index 2d72d9939ce..016e1079309 100644 --- a/include/configs/ci20.h +++ b/include/configs/ci20.h @@ -28,7 +28,6 @@ #define DM9000_IO CONFIG_DM9000_BASE #define DM9000_DATA (CONFIG_DM9000_BASE + 2) -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot argument buffer size */ diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h index 127b540c623..c94c704dc78 100644 --- a/include/configs/colibri-imx8x.h +++ b/include/configs/colibri-imx8x.h @@ -106,8 +106,6 @@ #define PHYS_SDRAM_1_SIZE SZ_2G /* 2 GB */ #define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 GB */ -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE SZ_2K #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Generic Timer Definitions */ diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 22a4d7f948e..b87365a584c 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -106,8 +106,6 @@ "vidargs=fbmem=8M\0" /* Miscellaneous configurable options */ -#undef CONFIG_SYS_CBSIZE -#define CONFIG_SYS_CBSIZE 1024 /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index a67fbeca7f9..315e95998fb 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -28,10 +28,6 @@ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ UBOOT_UPDATE -/* Increase console I/O buffer size */ -#undef CONFIG_SYS_CBSIZE -#define CONFIG_SYS_CBSIZE 1024 - /* Increase arguments buffer size */ #undef CONFIG_SYS_BARGSIZE #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE diff --git a/include/configs/colibri_t30.h b/include/configs/colibri_t30.h index bf8da9fcf98..36e01dd9d89 100644 --- a/include/configs/colibri_t30.h +++ b/include/configs/colibri_t30.h @@ -24,10 +24,6 @@ #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE -/* Increase console I/O buffer size */ -#undef CONFIG_SYS_CBSIZE -#define CONFIG_SYS_CBSIZE 1024 - /* Increase arguments buffer size */ #undef CONFIG_SYS_BARGSIZE #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 99b0cbb3420..d739e461e79 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -82,7 +82,6 @@ "video-mode=dcufb:640x480-16@60,monitor=lcd\0" /* Miscellaneous configurable options */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Physical memory map */ diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 855711e6290..842158ae6d6 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -148,7 +148,6 @@ /* * U-Boot general configuration */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ /* diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index bc5282a4893..5e8310c1933 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -64,7 +64,6 @@ /* * U-Boot General Configurations */ -#define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* diff --git a/include/configs/display5.h b/include/configs/display5.h index d697b7dd817..3737503c0c5 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -284,8 +284,6 @@ "\0" \ /* Miscellaneous configurable options */ -#undef CONFIG_SYS_CBSIZE -#define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h index f8186a1f0a8..e3fffbebaca 100644 --- a/include/configs/dragonboard410c.h +++ b/include/configs/dragonboard410c.h @@ -74,7 +74,4 @@ REFLASH(dragonboard/u-boot.img, 8)\ "pxefile_addr_r=0x90100000\0"\ BOOTENV -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ - #endif diff --git a/include/configs/dragonboard820c.h b/include/configs/dragonboard820c.h index 11dee56090e..372369977a7 100644 --- a/include/configs/dragonboard820c.h +++ b/include/configs/dragonboard820c.h @@ -43,7 +43,4 @@ "pxefile_addr_r=0x90100000\0"\ BOOTENV -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 512 - #endif diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 28bf35ca988..5ad769cce99 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -29,7 +29,6 @@ * Environment is in the second sector of the first 256k of flash * *----------------------------------------------------------------------*/ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /*#define CONFIG_SYS_DRAM_TEST 1 */ diff --git a/include/configs/edison.h b/include/configs/edison.h index 3161776c949..a6ec6389b07 100644 --- a/include/configs/edison.h +++ b/include/configs/edison.h @@ -10,7 +10,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_STACK_SIZE (32 * 1024) diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index 8e2c24594fa..685eb7d0251 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -90,8 +90,6 @@ /* auto boot */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ - /* * Network */ diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h index a6b0f3600e6..7411552b9ba 100644 --- a/include/configs/exynos-common.h +++ b/include/configs/exynos-common.h @@ -26,7 +26,6 @@ #define CONFIG_PWM /* Miscellaneous configurable options */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE diff --git a/include/configs/exynos7420-common.h b/include/configs/exynos7420-common.h index 7798023d6fc..f9db9a269f0 100644 --- a/include/configs/exynos7420-common.h +++ b/include/configs/exynos7420-common.h @@ -16,7 +16,6 @@ #include /* Miscellaneous configurable options */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE diff --git a/include/configs/exynos78x0-common.h b/include/configs/exynos78x0-common.h index a4ac27b1876..b443370067a 100644 --- a/include/configs/exynos78x0-common.h +++ b/include/configs/exynos78x0-common.h @@ -19,7 +19,6 @@ #include /* Miscellaneous configurable options */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE diff --git a/include/configs/gardena-smart-gateway-mt7688.h b/include/configs/gardena-smart-gateway-mt7688.h index 9b78e1f16d0..3c4a13cd0d5 100644 --- a/include/configs/gardena-smart-gateway-mt7688.h +++ b/include/configs/gardena-smart-gateway-mt7688.h @@ -41,7 +41,6 @@ /* Memory usage */ #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) -#define CONFIG_SYS_CBSIZE 512 /* Environment settings */ diff --git a/include/configs/gazerbeam.h b/include/configs/gazerbeam.h index bf222f76589..b1589185775 100644 --- a/include/configs/gazerbeam.h +++ b/include/configs/gazerbeam.h @@ -58,8 +58,6 @@ * Miscellaneous configurable options */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ - #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* diff --git a/include/configs/highbank.h b/include/configs/highbank.h index 0ff70fdc668..98b17af489f 100644 --- a/include/configs/highbank.h +++ b/include/configs/highbank.h @@ -19,7 +19,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_64BIT_LBA diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 92e401eb99d..646f196f00f 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -61,7 +61,4 @@ /* Preserve environment on eMMC */ -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ - #endif /* __HIKEY_H */ diff --git a/include/configs/hsdk-4xd.h b/include/configs/hsdk-4xd.h index d3d8896ecff..fa86a333b20 100644 --- a/include/configs/hsdk-4xd.h +++ b/include/configs/hsdk-4xd.h @@ -105,7 +105,6 @@ setenv core_iccm_3 0x6; setenv core_dccm_3 0x6;\0" */ /* Cli configuration */ -#define CONFIG_SYS_CBSIZE SZ_2K /* * Callback configuration diff --git a/include/configs/hsdk.h b/include/configs/hsdk.h index 64dce521056..e142035a8bf 100644 --- a/include/configs/hsdk.h +++ b/include/configs/hsdk.h @@ -100,7 +100,6 @@ setenv core_iccm_2 0x10; setenv core_dccm_2 0x10; \ setenv core_iccm_3 0x6; setenv core_dccm_3 0x6;\0" /* Cli configuration */ -#define CONFIG_SYS_CBSIZE SZ_2K /* * Callback configuration diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h index 356bf6c636d..0bd09c00db7 100644 --- a/include/configs/ids8313.h +++ b/include/configs/ids8313.h @@ -216,7 +216,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_LOADS_ECHO diff --git a/include/configs/imgtec_xilfpga.h b/include/configs/imgtec_xilfpga.h index edd24a4b556..21dee858666 100644 --- a/include/configs/imgtec_xilfpga.h +++ b/include/configs/imgtec_xilfpga.h @@ -35,7 +35,6 @@ /*------------------------------------------------------------ * Console Configuration */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ /* ------------------------------------------------- * Environment diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h index 6790053bb8d..0c8f9faba30 100644 --- a/include/configs/imx27lite-common.h +++ b/include/configs/imx27lite-common.h @@ -106,7 +106,6 @@ /* * U-Boot general configuration */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index 7a55433642d..3b07e925d3b 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -147,8 +147,6 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3) -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* USDHC */ diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h index 102f8f20825..e704fc59012 100644 --- a/include/configs/imx8mm_beacon.h +++ b/include/configs/imx8mm_beacon.h @@ -93,7 +93,5 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #endif diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h index 201d2c659cb..deae85f58b5 100644 --- a/include/configs/imx8mm_data_modul_edm_sbc.h +++ b/include/configs/imx8mm_data_modul_edm_sbc.h @@ -41,8 +41,8 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x40000000 /* Minimum 1 GiB DDR */ -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 2048 +#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR + #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* PHY needs a longer autonegotiation timeout after reset */ diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index 307bf53d4f6..6c6a5b2de01 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -70,8 +70,6 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_FEC_MXC_PHYADDR 0 diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index 3ee227a2fc7..590c764c070 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -68,8 +68,6 @@ /* UART */ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* USDHC */ diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index 2fa8d994d2e..51e3406b227 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -104,8 +104,6 @@ /* UART */ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE SZ_2K #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #endif diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h index 62ef52e6d99..5b45de19d36 100644 --- a/include/configs/imx8mn_beacon.h +++ b/include/configs/imx8mn_beacon.h @@ -109,7 +109,5 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #endif diff --git a/include/configs/imx8mn_bsh_smm_s2_common.h b/include/configs/imx8mn_bsh_smm_s2_common.h index 12c332eab79..8b5a2771447 100644 --- a/include/configs/imx8mn_bsh_smm_s2_common.h +++ b/include/configs/imx8mn_bsh_smm_s2_common.h @@ -47,8 +47,6 @@ #define CONFIG_MXC_UART_BASE UART4_BASE_ADDR -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE SZ_2K #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* I2C */ diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index f5586999fa8..4cc9ab025f0 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -77,8 +77,6 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #endif diff --git a/include/configs/imx8mn_var_som.h b/include/configs/imx8mn_var_som.h index 02bb9584f59..a518bbff73e 100644 --- a/include/configs/imx8mn_var_som.h +++ b/include/configs/imx8mn_var_som.h @@ -66,8 +66,6 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(4) -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE SZ_2K #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* USDHC */ diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index a32d9860cf1..538b23ab0a1 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -100,8 +100,6 @@ /* UART */ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE SZ_2K #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #endif diff --git a/include/configs/imx8mp_dhcom_pdk2.h b/include/configs/imx8mp_dhcom_pdk2.h index a2226e05eb3..d5df08fdeb5 100644 --- a/include/configs/imx8mp_dhcom_pdk2.h +++ b/include/configs/imx8mp_dhcom_pdk2.h @@ -42,7 +42,6 @@ #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* PHY needs a longer autonegotiation timeout after reset */ diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index f029c6dea50..e9392c64e49 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -81,8 +81,6 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #endif diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index d64353206f3..bc0d2975b7b 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -168,8 +168,8 @@ #define PHYS_SDRAM_2_SIZE 0x80000000 /* 2 GB */ #endif -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 2048 +#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR + #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h index 5ac72e6ba6c..c910d429213 100644 --- a/include/configs/imx8mp_venice.h +++ b/include/configs/imx8mp_venice.h @@ -100,8 +100,6 @@ /* UART */ #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE SZ_2K #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* FEC */ diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index 95aaedecd47..ccaf76cbbcd 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -73,8 +73,6 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index d39c9d3d759..532fa773ba3 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -79,8 +79,6 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index c0e4b8645d6..2b2829f2e17 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -107,8 +107,6 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index 57a3277ddb2..c8decee0337 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -128,7 +128,6 @@ #endif /* Misc configuration */ -#define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #endif /* __IMX8QXP_MEK_H */ diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index e6903a68af4..3f99c6b4144 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -70,8 +70,6 @@ #define PHYS_SDRAM 0x80000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Using ULP WDOG for reset */ diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h index 2c000189811..76895b4462c 100644 --- a/include/configs/km/keymile-common.h +++ b/include/configs/km/keymile-common.h @@ -12,11 +12,6 @@ /* * Miscellaneous configurable options */ -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#else -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#endif #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_HUSH_INIT_VAR diff --git a/include/configs/kp_imx53.h b/include/configs/kp_imx53.h index 534263f62b3..2a37a5231b7 100644 --- a/include/configs/kp_imx53.h +++ b/include/configs/kp_imx53.h @@ -61,7 +61,6 @@ #include /* Miscellaneous configurable options */ -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ /* Physical Memory Map */ #define PHYS_SDRAM_1 CSD0_BASE_ADDR diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index 4c132c6851a..8e0b6d11842 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -50,7 +50,6 @@ /* * U-Boot general configuration */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ /* diff --git a/include/configs/linkit-smart-7688.h b/include/configs/linkit-smart-7688.h index 667b2c6b231..35a6db4c186 100644 --- a/include/configs/linkit-smart-7688.h +++ b/include/configs/linkit-smart-7688.h @@ -42,7 +42,6 @@ /* Memory usage */ #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) -#define CONFIG_SYS_CBSIZE 512 /* Environment settings */ diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 98cb0015598..51aa176f7c8 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -68,9 +68,6 @@ "bootm $kernel_load" #endif -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ - #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ #include diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index 15433cd901e..2b90c1d6967 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -176,7 +176,6 @@ /* Miscellaneous configurable options */ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_LS102XA_STREAM_ID diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index 151501fe9b2..e4b86c22409 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -58,8 +58,6 @@ "run emmc_hdploadcmd; run distro_bootcmd;run emmc_bootcmd; " \ "env exists secureboot && esbc_halt;" -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */ #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index bedd444ae49..7457dad8668 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -254,9 +254,6 @@ #endif #endif -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ - #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ #include diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 5e2b8a64dd8..000f19a73e2 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -234,9 +234,6 @@ #endif -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ - #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ #include diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index b7373fb3108..a9922f15ab7 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -148,8 +148,6 @@ unsigned long long get_qixis_addr(void); " 0x580e00000 \0" #endif -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */ #ifdef CONFIG_SPL diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 21235ff0f54..974e98ab1d0 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -142,9 +142,6 @@ unsigned long long get_qixis_addr(void); "mcinitcmd=fsl_mc start mc 0x580a00000" \ " 0x580e00000 \0" -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ - #define CONFIG_SPL_BSS_START_ADDR 0x80100000 #define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 #define CONFIG_SPL_MAX_SIZE 0x16000 diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index cc9f863680d..bc210dab916 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -115,8 +115,6 @@ #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */ #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index ea582e5d075..50941b818d2 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -32,7 +32,6 @@ /* * U-Boot general configurations */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot argument buffer size */ diff --git a/include/configs/meesc.h b/include/configs/meesc.h index 6b6c90eb5ed..51f7fd59ac3 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -69,6 +69,4 @@ /* hw-controller addresses */ #define CONFIG_ET1100_BASE 0x70000000 -#define CONFIG_SYS_CBSIZE 512 - #endif diff --git a/include/configs/meson64.h b/include/configs/meson64.h index 3824d24ce1f..2935cf490e0 100644 --- a/include/configs/meson64.h +++ b/include/configs/meson64.h @@ -29,8 +29,6 @@ #define STDIN_CFG "serial" #endif -#define CONFIG_SYS_CBSIZE 1024 - #define CONFIG_SYS_SDRAM_BASE 0 #define CONFIG_SYS_INIT_SP_ADDR 0x20000000 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64 MiB */ diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index ac7a623bdb2..1c4e135a479 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -34,9 +34,6 @@ #define XILINX_DCACHE_BYTE_SIZE 32768 #endif -/* size of console buffer */ -#define CONFIG_SYS_CBSIZE 512 - #define CONFIG_HOSTNAME "microblaze-generic" /* architecture dependent code */ diff --git a/include/configs/mt7620.h b/include/configs/mt7620.h index af8d6afbf0b..1c70deff70b 100644 --- a/include/configs/mt7620.h +++ b/include/configs/mt7620.h @@ -18,8 +18,6 @@ #define CONFIG_SYS_BOOTM_LEN 0x1000000 -#define CONFIG_SYS_CBSIZE 1024 - /* SPL */ #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE diff --git a/include/configs/mt7622.h b/include/configs/mt7622.h index 32db4bc5db0..0101d48456e 100644 --- a/include/configs/mt7622.h +++ b/include/configs/mt7622.h @@ -12,7 +12,6 @@ #include #define CONFIG_SYS_BOOTM_LEN SZ_64M -#define CONFIG_SYS_CBSIZE SZ_1K #define CONFIG_SYS_NONCACHED_MEMORY SZ_1M /* Uboot definition */ diff --git a/include/configs/mt7623.h b/include/configs/mt7623.h index 0ee55c2275e..563784271d0 100644 --- a/include/configs/mt7623.h +++ b/include/configs/mt7623.h @@ -14,7 +14,6 @@ /* Miscellaneous configurable options */ #define CONFIG_SYS_BOOTM_LEN SZ_64M -#define CONFIG_SYS_CBSIZE SZ_1K #define CONFIG_SYS_NONCACHED_MEMORY SZ_1M diff --git a/include/configs/mt7628.h b/include/configs/mt7628.h index 21381217fc8..4f934ea40d0 100644 --- a/include/configs/mt7628.h +++ b/include/configs/mt7628.h @@ -18,8 +18,6 @@ #define CONFIG_SYS_BOOTM_LEN 0x1000000 -#define CONFIG_SYS_CBSIZE 1024 - /* Serial SPL */ #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL) #define CONFIG_SYS_NS16550_MEM32 diff --git a/include/configs/mt7629.h b/include/configs/mt7629.h index d937d87021f..24890b6f940 100644 --- a/include/configs/mt7629.h +++ b/include/configs/mt7629.h @@ -14,7 +14,6 @@ /* Miscellaneous configurable options */ #define CONFIG_SYS_BOOTM_LEN SZ_64M -#define CONFIG_SYS_CBSIZE SZ_1K #define CONFIG_SYS_NONCACHED_MEMORY SZ_1M diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index 34af2041a8e..384a8f7d1dd 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -50,8 +50,6 @@ /* auto boot */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ - /* * Other required minimal configurations */ diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h index 276b55570da..f6eb6bf0147 100644 --- a/include/configs/mvebu_armada-37xx.h +++ b/include/configs/mvebu_armada-37xx.h @@ -25,8 +25,6 @@ 4000000, 4500000, 5000000, 5500000, \ 6000000 } -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ - /* * Other required minimal configurations */ diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h index a37586a9947..d880b890072 100644 --- a/include/configs/mvebu_armada-8k.h +++ b/include/configs/mvebu_armada-8k.h @@ -19,8 +19,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ 115200, 230400, 460800, 921600 } -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ - /* * Other required minimal configurations */ diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h index fafc5f1adcb..a33132a58ee 100644 --- a/include/configs/mx53cx9020.h +++ b/include/configs/mx53cx9020.h @@ -55,7 +55,6 @@ BOOTENV /* Miscellaneous configurable options */ -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ /* Physical Memory Map */ #define PHYS_SDRAM_1 CSD0_BASE_ADDR diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 8b9f0a29017..1e2e55d89be 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -88,7 +88,6 @@ "fi;\0" /* Miscellaneous configurable options */ -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ /* Physical Memory Map */ #define PHYS_SDRAM_1 CSD0_BASE_ADDR diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index fba57ac533e..002a3e5adb1 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -86,7 +86,6 @@ "lcd:800x480-24@60,monitor=lcd\0" \ /* Miscellaneous configurable options */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index e34a6985ef9..75bc27d1798 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -26,7 +26,6 @@ #include /* Miscellaneous configurable options */ -#define CONFIG_SYS_CBSIZE 512 /* MMC */ diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index 0ef216e1a46..9f4dbec0700 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -23,7 +23,6 @@ #define CONFIG_IOMUX_LPSR /* Miscellaneous configurable options */ -#define CONFIG_SYS_CBSIZE 512 /* UART */ diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h index a6e533cabc0..a91e13104bc 100644 --- a/include/configs/mx7ulp_evk.h +++ b/include/configs/mx7ulp_evk.h @@ -23,7 +23,6 @@ #define LPUART_BASE LPUART4_RBASE /* Miscellaneous configurable options */ -#define CONFIG_SYS_CBSIZE 512 /* Physical Memory Map */ diff --git a/include/configs/mxs.h b/include/configs/mxs.h index d25b621350b..7065992a864 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -78,7 +78,6 @@ */ /* U-Boot general configuration */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot argument buffer size */ diff --git a/include/configs/octeontx2_common.h b/include/configs/octeontx2_common.h index 3b34b56c7a8..f30851cc878 100644 --- a/include/configs/octeontx2_common.h +++ b/include/configs/octeontx2_common.h @@ -22,8 +22,6 @@ "ethrotate=yes\0" \ "autoload=0\0" -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 1024 /** Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_MMC_MAX_BLK_COUNT 8192 diff --git a/include/configs/octeontx_common.h b/include/configs/octeontx_common.h index ddc70d4b942..f79c1c4fdb5 100644 --- a/include/configs/octeontx_common.h +++ b/include/configs/octeontx_common.h @@ -53,8 +53,6 @@ # define CONFIG_SYS_64BIT_LBA #endif -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 1024 /** Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_MMC_MAX_BLK_COUNT 8192 diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 0d69316862d..a1264bf4db2 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -139,7 +139,6 @@ /* * U-Boot general configuration */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ /* diff --git a/include/configs/owl-common.h b/include/configs/owl-common.h index 8de23e9c76a..d6948cca289 100644 --- a/include/configs/owl-common.h +++ b/include/configs/owl-common.h @@ -23,7 +23,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x7ff00) /* Console configuration */ -#define CONFIG_SYS_CBSIZE 1024 /* Console buffer size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #endif diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h index 028bf69a9c5..4eec7fb208c 100644 --- a/include/configs/phycore_imx8mm.h +++ b/include/configs/phycore_imx8mm.h @@ -86,8 +86,6 @@ /* UART */ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3) -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE SZ_2K #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #endif /* __PHYCORE_IMX8MM_H */ diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h index 734699cdfdb..6c59e7ba579 100644 --- a/include/configs/phycore_imx8mp.h +++ b/include/configs/phycore_imx8mp.h @@ -86,8 +86,6 @@ /* UART */ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE SZ_2K #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #endif /* __PHYCORE_IMX8MP_H */ diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h index ef3b0f73d62..c18834c437d 100644 --- a/include/configs/pic32mzdask.h +++ b/include/configs/pic32mzdask.h @@ -41,7 +41,6 @@ /*------------------------------------------------------------ * Console Configuration */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ /*-------------------------------------------------- * USB Configuration diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index 74b00901ffd..a586e60fec9 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -86,8 +86,6 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/poleg.h b/include/configs/poleg.h index 0771f9408a3..b58850c5e7c 100644 --- a/include/configs/poleg.h +++ b/include/configs/poleg.h @@ -11,7 +11,6 @@ #define CONFIG_SYS_PL310_BASE 0xF03FC000 /* L2 - Cache Regs Base (4k Space)*/ #endif -#define CONFIG_SYS_CBSIZE 256 #define CONFIG_SYS_BOOTMAPSZ (0x30 << 20) #define CONFIG_SYS_SDRAM_BASE 0x0 #define CONFIG_SYS_INIT_SP_ADDR (0x00008000 - GENERATED_GBL_DATA_SIZE) diff --git a/include/configs/poplar.h b/include/configs/poplar.h index 52285db27eb..4cc3f26133e 100644 --- a/include/configs/poplar.h +++ b/include/configs/poplar.h @@ -49,7 +49,4 @@ "ramdisk_addr_r=0x32400000\0" \ BOOTENV -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 512 - #endif /* _POPLAR_H_ */ diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h index 583aa9d09bd..dd03c5c03c0 100644 --- a/include/configs/presidio_asic.h +++ b/include/configs/presidio_asic.h @@ -42,7 +42,6 @@ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* Console I/O Buffer Size */ -#define CONFIG_SYS_CBSIZE 256 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define KSEG1_ATU_XLAT(x) (x) diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h index a7f5e911655..eaaf8cad01c 100644 --- a/include/configs/px30_common.h +++ b/include/configs/px30_common.h @@ -8,8 +8,6 @@ #include "rockchip-common.h" -#define CONFIG_SYS_CBSIZE 1024 - #define CONFIG_SYS_NS16550_MEM32 /* FIXME: ff020000 is pmu_mem (10k), while ff0e0000 is regular int_mem */ diff --git a/include/configs/qemu-arm.h b/include/configs/qemu-arm.h index 550e26f3f18..c0b5731e0e1 100644 --- a/include/configs/qemu-arm.h +++ b/include/configs/qemu-arm.h @@ -79,8 +79,6 @@ "ramdisk_addr_r=0x44000000\0" \ BOOTENV -#define CONFIG_SYS_CBSIZE 512 - #define CONFIG_SYS_MAX_FLASH_SECT 256 /* Sector: 256K, Bank: 64M */ #endif /* __CONFIG_H */ diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index 2c8000f03b1..ae585bb2c02 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -24,7 +24,6 @@ #define GICC_BASE 0xF1020000 /* console */ -#define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400 } diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index ab2b492d03f..5428935b19c 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -8,8 +8,6 @@ #include #include "rockchip-common.h" -#define CONFIG_SYS_CBSIZE 1024 - #define CONFIG_SYS_HZ_CLOCK 24000000 #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h index be7d644e1e5..30f037766dc 100644 --- a/include/configs/rk3066_common.h +++ b/include/configs/rk3066_common.h @@ -9,8 +9,6 @@ #include #include "rockchip-common.h" -#define CONFIG_SYS_CBSIZE 256 - #define CONFIG_SYS_INIT_SP_ADDR 0x78000000 #define CONFIG_IRAM_BASE 0x10080000 diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h index 8c2e9dc4116..b7b61ed424e 100644 --- a/include/configs/rk3128_common.h +++ b/include/configs/rk3128_common.h @@ -8,8 +8,6 @@ #include "rockchip-common.h" -#define CONFIG_SYS_CBSIZE 1024 - #define CONFIG_SYS_HZ_CLOCK 24000000 #define CONFIG_IRAM_BASE 0x10080000 diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h index 7449e816b7d..47f70f1aad4 100644 --- a/include/configs/rk3188_common.h +++ b/include/configs/rk3188_common.h @@ -9,8 +9,6 @@ #include #include "rockchip-common.h" -#define CONFIG_SYS_CBSIZE 1024 - #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM /* Bootrom will load u-boot binary to 0x60000000 once return from SPL */ #endif diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index 36191ee9c12..c32e2236265 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -8,7 +8,6 @@ #include #include "rockchip-common.h" -#define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ #define CONFIG_SYS_HZ_CLOCK 24000000 diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 075623f342a..77ab7cea2db 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -11,8 +11,6 @@ #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64MB */ -#define CONFIG_SYS_CBSIZE 1024 - #define CONFIG_SYS_HZ_CLOCK 24000000 #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h index 44a3e7adf20..3268181611f 100644 --- a/include/configs/rk3308_common.h +++ b/include/configs/rk3308_common.h @@ -8,7 +8,6 @@ #include "rockchip-common.h" -#define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SPL_MAX_SIZE 0x20000 #define CONFIG_SPL_BSS_START_ADDR 0x00400000 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 2b8d77c47ed..283b644e474 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -10,8 +10,6 @@ #define CONFIG_IRAM_BASE 0xff090000 -#define CONFIG_SYS_CBSIZE 1024 - #define CONFIG_SYS_INIT_SP_ADDR 0x00300000 #define CONFIG_SPL_STACK 0x00400000 #define CONFIG_SPL_MAX_SIZE 0x40000 diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index 2f71ce72df8..cd81caf9853 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -13,7 +13,6 @@ #define CONFIG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 -#define CONFIG_SYS_CBSIZE 1024 #define CONFIG_IRAM_BASE 0xff8c0000 diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 8e137376661..d2f286521b5 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -8,8 +8,6 @@ #include "rockchip-common.h" -#define CONFIG_SYS_CBSIZE 1024 - #define CONFIG_IRAM_BASE 0xff8c0000 #define CONFIG_SYS_INIT_SP_ADDR 0x00300000 diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h index e9947ea4923..0563d9025fc 100644 --- a/include/configs/rk3568_common.h +++ b/include/configs/rk3568_common.h @@ -8,8 +8,6 @@ #include "rockchip-common.h" -#define CONFIG_SYS_CBSIZE 1024 - #define CONFIG_IRAM_BASE 0xfdcc0000 #define CONFIG_SYS_INIT_SP_ADDR 0x00c00000 diff --git a/include/configs/rpi.h b/include/configs/rpi.h index 7a5f0851b53..9e2b24a2d37 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -60,7 +60,6 @@ #endif /* Console configuration */ -#define CONFIG_SYS_CBSIZE 1024 /* Environment */ diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h index d0f70b04e75..54f423cb28d 100644 --- a/include/configs/rv1108_common.h +++ b/include/configs/rv1108_common.h @@ -10,8 +10,6 @@ #define CONFIG_IRAM_BASE 0x10080000 -#define CONFIG_SYS_CBSIZE 1024 - #define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) /* TIMER1,initialized by ddr initialize code */ #define CONFIG_SYS_TIMER_BASE 0x10350020 diff --git a/include/configs/s5p4418_nanopi2.h b/include/configs/s5p4418_nanopi2.h index e2bdc0957bb..a25dce59da4 100644 --- a/include/configs/s5p4418_nanopi2.h +++ b/include/configs/s5p4418_nanopi2.h @@ -77,8 +77,6 @@ */ /* board_init_f->init_sequence, call arch_cpu_init */ -/* Console I/O Buffer Size */ -#define CONFIG_SYS_CBSIZE 1024 /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index 7b6db46ee17..c22b74f707e 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -12,8 +12,6 @@ #define CONFIG_MALLOC_F_ADDR 0x0010000 -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ - /* GUIDs for capsule updatable firmware images */ #define SANDBOX_UBOOT_IMAGE_GUID \ EFI_GUID(0x09d7cf52, 0x0720, 0x4710, 0x91, 0xd1, \ diff --git a/include/configs/sdm845.h b/include/configs/sdm845.h index a69a70364fa..e1b8c61d076 100644 --- a/include/configs/sdm845.h +++ b/include/configs/sdm845.h @@ -24,7 +24,4 @@ /* Size of malloc() pool */ #define CONFIG_SYS_BOOTM_LEN SZ_64M -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 512 - #endif diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 37e65990acf..5757b63ab18 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -28,7 +28,6 @@ #define V_SCLK (V_OSCK) /* Console I/O Buffer Size */ -#define CONFIG_SYS_CBSIZE 1024 /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 599a5134b08..b51a5203547 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -88,7 +88,6 @@ #endif /* General Boot Parameter */ -#define CONFIG_SYS_CBSIZE 512 /* * The NAND Flash partitions: diff --git a/include/configs/sniper.h b/include/configs/sniper.h index ca3da9547cb..2a2609d9668 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -61,8 +61,6 @@ #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" -#define CONFIG_SYS_CBSIZE 512 - /* * Serial */ diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 0cdb5473b18..4a099837e93 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -59,7 +59,6 @@ /* * U-Boot general configurations */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ /* Print buffer size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot argument buffer size */ diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index adaa39bbb2b..14cc708079a 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -20,7 +20,6 @@ /* * U-Boot console configurations */ -#define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Extend size of kernel image for uncompression */ diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h index 3e6feae1fa3..fba93fd9d32 100644 --- a/include/configs/stih410-b2260.h +++ b/include/configs/stih410-b2260.h @@ -47,9 +47,6 @@ CONFIG_SYS_MALLOC_LEN - \ CONFIG_SYS_GBL_DATA_SIZE) -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ - /* USB Configs */ #define CONFIG_USB_OHCI_NEW #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 diff --git a/include/configs/stm32f429-discovery.h b/include/configs/stm32f429-discovery.h index 21bab5aafd5..de17c8b8e19 100644 --- a/include/configs/stm32f429-discovery.h +++ b/include/configs/stm32f429-discovery.h @@ -19,8 +19,6 @@ #define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ -#define CONFIG_SYS_CBSIZE 1024 - #define CONFIG_EXTRA_ENV_SETTINGS \ "bootargs_romfs=uclinux.physaddr=0x08180000 root=/dev/mtdblock0\0" \ "bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \ diff --git a/include/configs/stm32f429-evaluation.h b/include/configs/stm32f429-evaluation.h index 4c421b9596f..4efe40f6c97 100644 --- a/include/configs/stm32f429-evaluation.h +++ b/include/configs/stm32f429-evaluation.h @@ -24,8 +24,6 @@ #define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ -#define CONFIG_SYS_CBSIZE 1024 - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) diff --git a/include/configs/stm32f469-discovery.h b/include/configs/stm32f469-discovery.h index e91f8da280d..42e96b03609 100644 --- a/include/configs/stm32f469-discovery.h +++ b/include/configs/stm32f469-discovery.h @@ -24,8 +24,6 @@ #define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ -#define CONFIG_SYS_CBSIZE 1024 - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h index cc3d4b4449d..375f2a7e0ba 100644 --- a/include/configs/stm32f746-disco.h +++ b/include/configs/stm32f746-disco.h @@ -26,8 +26,6 @@ #define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ -#define CONFIG_SYS_CBSIZE 1024 - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) diff --git a/include/configs/stm32mp15_common.h b/include/configs/stm32mp15_common.h index 6b40cdb0177..60947d69b53 100644 --- a/include/configs/stm32mp15_common.h +++ b/include/configs/stm32mp15_common.h @@ -19,7 +19,6 @@ /* * Console I/O buffer size */ -#define CONFIG_SYS_CBSIZE SZ_1K /* * For booting Linux, use the first 256 MB of memory, since this is diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index 49899203142..9c453fce6f7 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -44,7 +44,6 @@ #define CONFIG_EXTRA_CLOCK #define CONFIG_PRAM 2048 /* 2048 KB */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h index 137672909be..caedd8ff2a3 100644 --- a/include/configs/stv0991.h +++ b/include/configs/stv0991.h @@ -14,7 +14,6 @@ #define PHYS_SDRAM_1_SIZE 0x00198000 /* user interface */ -#define CONFIG_SYS_CBSIZE 1024 /* MISC */ #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index bae5620cbb1..c47f4752fc4 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -102,7 +102,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ /* standalone support */ #define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h index 44c0606543a..3278c4b938b 100644 --- a/include/configs/synquacer.h +++ b/include/configs/synquacer.h @@ -40,8 +40,6 @@ #define CONFIG_SYS_FLASH_BASE (0x08000000) #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE} -#define CONFIG_SYS_CBSIZE 1024 - /* Since U-Boot 64bit PCIe support is limited, disable 64bit MMIO support */ #define DEFAULT_DFU_ALT_INFO "dfu_alt_info=" \ diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index dea6f8892fc..55c0f27d71f 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -35,12 +35,6 @@ */ #define CONFIG_SYS_MMC_MAX_DEVICE 4 -/* - * Increasing the size of the IO buffer as default nfsargs size is more - * than 256 and so it is not possible to edit it - */ -#define CONFIG_SYS_CBSIZE (1024 * 2) /* Console I/O Buffer Size */ - /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h index 0282b36c68c..16dc7d09220 100644 --- a/include/configs/thunderx_88xx.h +++ b/include/configs/thunderx_88xx.h @@ -47,8 +47,6 @@ /* Do not preserve environment */ -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ #define PLL_REF_CLK 50000000 /* 50 MHz */ #define NS_PER_REF_CLK_TICK (1000000000/PLL_REF_CLK) diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index 95434aa5169..3ce2c1fdc0a 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -62,7 +62,6 @@ /* Console I/O Buffer Size */ -#define CONFIG_SYS_CBSIZE 512 /** * Physical Memory Map diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index e28d91a37a3..9e18a6c6d06 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -89,7 +89,6 @@ /* As stated above, the following choices are optional. */ /* Console I/O Buffer Size */ -#define CONFIG_SYS_CBSIZE 1024 /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE diff --git a/include/configs/total_compute.h b/include/configs/total_compute.h index a4ab6196840..7ab79261361 100644 --- a/include/configs/total_compute.h +++ b/include/configs/total_compute.h @@ -46,9 +46,6 @@ * Else boot FIT image. */ -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ - #define CONFIG_SYS_FLASH_BASE 0x0C000000 /* 256 x 256KiB sectors */ #define CONFIG_SYS_MAX_FLASH_SECT 256 diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h index 1e2c552bf50..30f8376b7e0 100644 --- a/include/configs/tplink_wdr4300.h +++ b/include/configs/tplink_wdr4300.h @@ -27,7 +27,6 @@ * Command */ /* Miscellaneous configurable options */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot argument buffer size */ diff --git a/include/configs/turris_mox.h b/include/configs/turris_mox.h index 7f1363f3cf7..64b049f4d68 100644 --- a/include/configs/turris_mox.h +++ b/include/configs/turris_mox.h @@ -11,7 +11,6 @@ #define CONFIG_SYS_BOOTM_LEN (64 << 20) #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000) -#define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_BAUDRATE_TABLE { 300, 600, 1200, 1800, 2400, 4800, \ 9600, 19200, 38400, 57600, 115200, \ 230400, 460800, 500000, 576000, \ diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index f813f88cdd7..9bea5a26077 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -41,7 +41,6 @@ #define CONFIG_SYS_MONITOR_LEN 0x00200000 /* 2MB */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h index 0faa656bc63..1c3545f64dd 100644 --- a/include/configs/usbarmory.h +++ b/include/configs/usbarmory.h @@ -15,7 +15,6 @@ /* U-Boot environment */ /* U-Boot general configurations */ -#define CONFIG_SYS_CBSIZE 512 /* UART */ #define CONFIG_MXC_UART_BASE UART1_BASE diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 3d1fd167bee..b251e2b9258 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -86,8 +86,6 @@ /* UART */ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE SZ_2K #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* ENET */ diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index f15bebf55d2..df6dc7447e9 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -102,8 +102,6 @@ /* UART */ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3) -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE SZ_2K #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #endif /* __VERDIN_IMX8MP_H */ diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index b672ac54919..df76b9a5612 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -263,9 +263,6 @@ EXTRA_ENV_NAMES \ BOOTENV -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ - #ifdef CONFIG_TARGET_VEXPRESS64_JUNO #define CONFIG_SYS_FLASH_BASE 0x08000000 /* 255 x 256KiB sectors + 4 x 64KiB sectors at the end = 259 */ diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index 599caaca17d..f27280af99e 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -197,7 +197,4 @@ #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE0, \ CONFIG_SYS_FLASH_BASE1 } -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ - #endif /* VEXPRESS_COMMON_H */ diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h index 2f3e32cf2b4..b924b24c62c 100644 --- a/include/configs/vocore2.h +++ b/include/configs/vocore2.h @@ -35,7 +35,6 @@ /* Memory usage */ #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) -#define CONFIG_SYS_CBSIZE 512 /* Environment settings */ diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index 33245375979..9b7cc7a4c4f 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -27,7 +27,6 @@ /* * U-Boot General Configurations */ -#define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index a22f97042f7..48091b95ca7 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -40,7 +40,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_CBSIZE 512 /*----------------------------------------------------------------------- * CPU Features diff --git a/include/configs/xenguest_arm64.h b/include/configs/xenguest_arm64.h index ccd4049f266..322b2cfef82 100644 --- a/include/configs/xenguest_arm64.h +++ b/include/configs/xenguest_arm64.h @@ -13,8 +13,6 @@ #undef CONFIG_SYS_SDRAM_BASE -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #undef CONFIG_EXTRA_ENV_SETTINGS diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h index 060e964caf0..d1e2753cbbe 100644 --- a/include/configs/xilinx_versal.h +++ b/include/configs/xilinx_versal.h @@ -27,9 +27,7 @@ /* Miscellaneous configurable options */ -/* Monitor Command Prompt */ /* Console I/O Buffer Size */ -#define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #if defined(CONFIG_CMD_DFU) diff --git a/include/configs/xilinx_versal_mini.h b/include/configs/xilinx_versal_mini.h index a94ab1fd207..e1f95de3c34 100644 --- a/include/configs/xilinx_versal_mini.h +++ b/include/configs/xilinx_versal_mini.h @@ -17,7 +17,4 @@ /* Undef unneeded configs */ #undef CONFIG_EXTRA_ENV_SETTINGS -#undef CONFIG_SYS_CBSIZE -#define CONFIG_SYS_CBSIZE 1024 - #endif /* __CONFIG_VERSAL_MINI_H */ diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 5bfb736133d..2abf96f3544 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -51,9 +51,7 @@ # define PARTS_DEFAULT #endif -/* Monitor Command Prompt */ /* Console I/O Buffer Size */ -#define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Ethernet driver */ diff --git a/include/configs/xilinx_zynqmp_mini.h b/include/configs/xilinx_zynqmp_mini.h index baef561c0b5..94f5f0c4a71 100644 --- a/include/configs/xilinx_zynqmp_mini.h +++ b/include/configs/xilinx_zynqmp_mini.h @@ -18,7 +18,4 @@ #undef CONFIG_EXTRA_ENV_SETTINGS #undef CONFIG_SYS_INIT_SP_ADDR -#undef CONFIG_SYS_CBSIZE -#define CONFIG_SYS_CBSIZE 1024 - #endif /* __CONFIG_ZYNQMP_MINI_H */ diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h index 92e5b436a32..89b6d198d7f 100644 --- a/include/configs/xtfpga.h +++ b/include/configs/xtfpga.h @@ -98,7 +98,6 @@ /*==============================*/ /* Console I/O Buffer Size */ -#define CONFIG_SYS_CBSIZE 1024 /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index f8c0800e5fc..40ca3cedbb8 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -199,8 +199,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_SYS_CBSIZE 2048 /* Console I/O Buffer Size */ - #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000 #define CONFIG_SYS_INIT_RAM_SIZE 0x2000 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ diff --git a/include/configs/zynq_cse.h b/include/configs/zynq_cse.h index 7eafdfd9a65..79c77c9603b 100644 --- a/include/configs/zynq_cse.h +++ b/include/configs/zynq_cse.h @@ -14,10 +14,6 @@ /* Undef unneeded configs */ #undef CONFIG_EXTRA_ENV_SETTINGS -#undef CONFIG_SYS_CBSIZE - -#define CONFIG_SYS_CBSIZE 1024 - #undef CONFIG_SYS_INIT_RAM_ADDR #undef CONFIG_SYS_INIT_RAM_SIZE #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFDE000 -- GitLab From 6889412ad5e78f207b7155d81ea6c334e417e21e Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 12 May 2022 10:02:06 -0400 Subject: [PATCH 004/581] Convert CONFIG_SYS_BARGSIZE to Kconfig This converts the following to Kconfig: CONFIG_SYS_BARGSIZE Signed-off-by: Tom Rini --- Kconfig | 8 ++++++++ README | 4 ---- boot/image-board.c | 6 ++---- configs/eb_cpu5282_defconfig | 1 + configs/eb_cpu5282_internal_defconfig | 1 + configs/gazerbeam_defconfig | 1 + configs/ids8313_defconfig | 1 + configs/stmark2_defconfig | 1 + include/configs/am3517_evm.h | 3 --- include/configs/apalis-imx8.h | 2 -- include/configs/apalis-tk1.h | 4 ---- include/configs/apalis_t30.h | 4 ---- include/configs/ax25-ae350.h | 5 ----- include/configs/bcm_ns3.h | 2 -- include/configs/capricorn-common.h | 3 --- include/configs/ci20.h | 3 --- include/configs/colibri-imx8x.h | 2 -- include/configs/colibri_t20.h | 4 ---- include/configs/colibri_t30.h | 4 ---- include/configs/colibri_vf.h | 1 - include/configs/da850evm.h | 1 - include/configs/devkit3250.h | 1 - include/configs/devkit8000.h | 2 -- include/configs/display5.h | 2 -- include/configs/eb_cpu5282.h | 2 -- include/configs/edison.h | 2 -- include/configs/exynos-common.h | 3 --- include/configs/exynos7420-common.h | 3 --- include/configs/exynos78x0-common.h | 3 --- include/configs/gazerbeam.h | 2 -- include/configs/highbank.h | 1 - include/configs/ids8313.h | 1 - include/configs/imx27lite-common.h | 3 --- include/configs/imx8mm-cl-iot-gate.h | 2 -- include/configs/imx8mm_beacon.h | 1 - include/configs/imx8mm_data_modul_edm_sbc.h | 2 -- include/configs/imx8mm_evk.h | 2 -- include/configs/imx8mm_icore_mx8mm.h | 2 -- include/configs/imx8mm_venice.h | 4 +++- include/configs/imx8mn_beacon.h | 1 - include/configs/imx8mn_bsh_smm_s2_common.h | 2 -- include/configs/imx8mn_evk.h | 2 -- include/configs/imx8mn_var_som.h | 2 -- include/configs/imx8mn_venice.h | 4 +++- include/configs/imx8mp_dhcom_pdk2.h | 3 --- include/configs/imx8mp_evk.h | 2 -- include/configs/imx8mp_rsb3720.h | 2 -- include/configs/imx8mp_venice.h | 2 -- include/configs/imx8mq_cm.h | 2 -- include/configs/imx8mq_evk.h | 2 -- include/configs/imx8mq_phanbell.h | 2 -- include/configs/imx8qxp_mek.h | 1 - include/configs/imx8ulp_evk.h | 2 -- include/configs/km/keymile-common.h | 1 - include/configs/legoev3.h | 1 - include/configs/ls1021atsn.h | 2 -- include/configs/ls1028a_common.h | 2 -- include/configs/ls1088a_common.h | 2 -- include/configs/lx2160a_common.h | 2 -- include/configs/m53menlo.h | 2 -- include/configs/mx53ppd.h | 2 -- include/configs/mxs.h | 2 -- include/configs/octeontx2_common.h | 2 -- include/configs/octeontx_common.h | 2 -- include/configs/omapl138_lcdk.h | 1 - include/configs/owl-common.h | 1 - include/configs/phycore_imx8mm.h | 2 -- include/configs/phycore_imx8mp.h | 2 -- include/configs/pico-imx8mq.h | 2 -- include/configs/presidio_asic.h | 1 - include/configs/rcar-gen3-common.h | 1 - include/configs/s5p4418_nanopi2.h | 3 --- include/configs/siemens-am33x-common.h | 3 --- include/configs/socfpga_common.h | 2 -- include/configs/socfpga_soc64_common.h | 1 - include/configs/stmark2.h | 3 --- include/configs/tegra-common.h | 3 --- include/configs/ti_armv7_common.h | 3 --- include/configs/tplink_wdr4300.h | 2 -- include/configs/uniphier.h | 3 --- include/configs/verdin-imx8mm.h | 2 -- include/configs/verdin-imx8mp.h | 2 -- include/configs/work_92105.h | 1 - include/configs/xenguest_arm64.h | 2 -- include/configs/xilinx_versal.h | 1 - include/configs/xilinx_zynqmp.h | 1 - include/configs/xtfpga.h | 3 --- 87 files changed, 21 insertions(+), 172 deletions(-) diff --git a/Kconfig b/Kconfig index f7e3c332f07..f0179689186 100644 --- a/Kconfig +++ b/Kconfig @@ -228,6 +228,14 @@ config SYS_BOOT_GET_CMDLINE Enables allocating and saving kernel cmdline in space between "bootm_low" and "bootm_low" + BOOTMAPSZ. +config SYS_BARGSIZE + int "Size of kernel command line buffer in bytes" + depends on SYS_BOOT_GET_CMDLINE + default 512 + help + Buffer size for Boot Arguments which are passed to the application + (usually a Linux kernel) when it is booted + config SYS_BOOT_GET_KBD bool "Enable kernel board information setup" help diff --git a/README b/README index e738fa9273f..e686839637f 100644 --- a/README +++ b/README @@ -1853,10 +1853,6 @@ Configuration Settings: - CONFIG_SYS_PROMPT: This is what U-Boot prints on the console to prompt for user input. -- CONFIG_SYS_BARGSIZE: Buffer size for Boot Arguments which are passed to - the application (usually a Linux kernel) when it is - booted - - CONFIG_SYS_BAUDRATE_TABLE: List of legal baudrate settings for this board. diff --git a/boot/image-board.c b/boot/image-board.c index 0d2e0fc9692..cfc1c658e3a 100644 --- a/boot/image-board.c +++ b/boot/image-board.c @@ -21,10 +21,6 @@ #include #include -#ifndef CONFIG_SYS_BARGSIZE -#define CONFIG_SYS_BARGSIZE 512 -#endif - DECLARE_GLOBAL_DATA_PTR; #if CONFIG_IS_ENABLED(LEGACY_IMAGE_FORMAT) @@ -827,6 +823,7 @@ int boot_get_loadable(int argc, char *const argv[], bootm_headers_t *images, return 0; } +#ifdef CONFIG_SYS_BOOT_GET_CMDLINE /** * boot_get_cmdline - allocate and initialize kernel cmdline * @lmb: pointer to lmb handle, will be used for memory mgmt @@ -900,6 +897,7 @@ int boot_get_kbd(struct lmb *lmb, struct bd_info **kbd) return 0; } +#endif int image_setup_linux(bootm_headers_t *images) { diff --git a/configs/eb_cpu5282_defconfig b/configs/eb_cpu5282_defconfig index f8c0198d25e..5a33e2f0ae2 100644 --- a/configs/eb_cpu5282_defconfig +++ b/configs/eb_cpu5282_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_LOAD_ADDR=0x20000 CONFIG_ENV_ADDR=0xFF040000 CONFIG_TARGET_EB_CPU5282=y CONFIG_MCFTMR=y +CONFIG_SYS_BARGSIZE=1024 CONFIG_SYS_MONITOR_BASE=0xFF000400 CONFIG_BOOTDELAY=5 CONFIG_BOOT_RETRY=y diff --git a/configs/eb_cpu5282_internal_defconfig b/configs/eb_cpu5282_internal_defconfig index 93b860d8370..d23b7170cdd 100644 --- a/configs/eb_cpu5282_internal_defconfig +++ b/configs/eb_cpu5282_internal_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_LOAD_ADDR=0x20000 CONFIG_ENV_ADDR=0xFF040000 CONFIG_TARGET_EB_CPU5282=y CONFIG_MCFTMR=y +CONFIG_SYS_BARGSIZE=1024 CONFIG_SYS_MONITOR_BASE=0xF0000418 CONFIG_BOOTDELAY=5 CONFIG_BOOT_RETRY=y diff --git a/configs/gazerbeam_defconfig b/configs/gazerbeam_defconfig index 2f3b29e9918..c48541a9ec5 100644 --- a/configs/gazerbeam_defconfig +++ b/configs/gazerbeam_defconfig @@ -112,6 +112,7 @@ CONFIG_SYS_FPGA_FLAVOR_GAZERBEAM=y CONFIG_CMD_IOLOOP=y CONFIG_SYS_MEMTEST_START=0x00001000 CONFIG_SYS_MEMTEST_END=0x07e00000 +CONFIG_SYS_BARGSIZE=1024 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig index c885de7663d..b8070e7351a 100644 --- a/configs/ids8313_defconfig +++ b/configs/ids8313_defconfig @@ -119,6 +119,7 @@ CONFIG_ACR_PIPE_DEP_4=y CONFIG_ACR_RPTCNT_4=y CONFIG_LCRR_EADC_1=y CONFIG_LCRR_CLKDIV_2=y +CONFIG_SYS_BARGSIZE=1024 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_LEGACY_IMAGE_FORMAT=y diff --git a/configs/stmark2_defconfig b/configs/stmark2_defconfig index 64ac6614e9e..e56ca93d4b8 100644 --- a/configs/stmark2_defconfig +++ b/configs/stmark2_defconfig @@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="stmark2" CONFIG_SYS_LOAD_ADDR=0x40010000 CONFIG_TARGET_STMARK2=y CONFIG_MCFTMR=y +CONFIG_SYS_BARGSIZE=256 CONFIG_TIMESTAMP=y CONFIG_SYS_MONITOR_BASE=0x47E00400 CONFIG_USE_BOOTARGS=y diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 8b96f816833..db3298781d1 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -86,9 +86,6 @@ /* Miscellaneous configurable options */ -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - /* memtest works on */ /* Physical Memory Map */ diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index 837c344b7a3..3a0d19613be 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -73,6 +73,4 @@ #define PHYS_SDRAM_1_SIZE SZ_2G /* 2 GB */ #define PHYS_SDRAM_2_SIZE SZ_2G /* 2 GB */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - #endif /* __APALIS_IMX8_H */ diff --git a/include/configs/apalis-tk1.h b/include/configs/apalis-tk1.h index ee9e9b2103f..19e6a1e04ee 100644 --- a/include/configs/apalis-tk1.h +++ b/include/configs/apalis-tk1.h @@ -89,10 +89,6 @@ "source ${loadaddr}\0" \ "vidargs=fbcon=map:1\0" -/* Increase arguments buffer size */ -#undef CONFIG_SYS_BARGSIZE -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h index 46ccea9c3e2..104c4135e28 100644 --- a/include/configs/apalis_t30.h +++ b/include/configs/apalis_t30.h @@ -26,10 +26,6 @@ /* PCI networking support */ #define CONFIG_E1000_NO_NVM -/* Increase arguments buffer size */ -#undef CONFIG_SYS_BARGSIZE -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - #define UBOOT_UPDATE \ "uboot_hwpart=1\0" \ "uboot_blk=0\0" \ diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index 16545ca9413..633be8f6141 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -30,11 +30,6 @@ * Miscellaneous configurable options */ -/* - * Boot Argument Buffer Size - */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - /* DT blob (fdt) address */ #define CONFIG_SYS_FDT_BASE 0x800f0000 diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h index 85d8e31ef08..87c9f5e2dde 100644 --- a/include/configs/bcm_ns3.h +++ b/include/configs/bcm_ns3.h @@ -29,8 +29,6 @@ /* console configuration */ #define CONFIG_SYS_NS16550_CLK 25000000 -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - /* * Increase max uncompressed/gunzip size, keeping size same as EMMC linux * partition. diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index 5731a9e1110..63d02c5b44f 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -117,9 +117,6 @@ #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1 GB */ #define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 GB */ -/* Console buffer and boot args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - #define BOOTAUX_RESERVED_MEM_BASE 0x88000000 #define BOOTAUX_RESERVED_MEM_SIZE SZ_128M /* Reserve from second 128MB */ diff --git a/include/configs/ci20.h b/include/configs/ci20.h index 016e1079309..4af11496cb1 100644 --- a/include/configs/ci20.h +++ b/include/configs/ci20.h @@ -28,9 +28,6 @@ #define DM9000_IO CONFIG_DM9000_BASE #define DM9000_DATA (CONFIG_DM9000_BASE + 2) -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - /* Boot argument buffer size */ - /* Miscellaneous configuration options */ #define CONFIG_SYS_BOOTM_LEN (64 << 20) diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h index c94c704dc78..852e8165874 100644 --- a/include/configs/colibri-imx8x.h +++ b/include/configs/colibri-imx8x.h @@ -106,8 +106,6 @@ #define PHYS_SDRAM_1_SIZE SZ_2G /* 2 GB */ #define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 GB */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - /* Generic Timer Definitions */ #define BOOTAUX_RESERVED_MEM_BASE 0x88000000 diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index 315e95998fb..1e6561dc281 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -28,10 +28,6 @@ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ UBOOT_UPDATE -/* Increase arguments buffer size */ -#undef CONFIG_SYS_BARGSIZE -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/colibri_t30.h b/include/configs/colibri_t30.h index 36e01dd9d89..c9d384e2bdb 100644 --- a/include/configs/colibri_t30.h +++ b/include/configs/colibri_t30.h @@ -24,10 +24,6 @@ #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE -/* Increase arguments buffer size */ -#undef CONFIG_SYS_BARGSIZE -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - #define UBOOT_UPDATE \ "uboot_hwpart=1\0" \ "uboot_blk=0\0" \ diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index d739e461e79..7c313f94fe9 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -82,7 +82,6 @@ "video-mode=dcufb:640x480-16@60,monitor=lcd\0" /* Miscellaneous configurable options */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Physical memory map */ #define PHYS_SDRAM (0x80000000) diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 842158ae6d6..12f5bbf5127 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -148,7 +148,6 @@ /* * U-Boot general configuration */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ /* * Linux Information diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 5e8310c1933..93a704cc31d 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -64,7 +64,6 @@ /* * U-Boot General Configurations */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* * Pass open firmware flat tree diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index 5dbd126a2a0..efb20eacd1e 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -111,8 +111,6 @@ "fi; " \ "else run nandboot; fi\0" -/* Boot Argument Buffer Size */ - /* Defines for SPL */ /* NAND boot config */ diff --git a/include/configs/display5.h b/include/configs/display5.h index 3737503c0c5..93dcec5612b 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -285,8 +285,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - #define CONFIG_STANDALONE_LOAD_ADDR 0x10001000 /* Physical Memory Map */ diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 5ad769cce99..9374928a9e4 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -29,8 +29,6 @@ * Environment is in the second sector of the first 256k of flash * *----------------------------------------------------------------------*/ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - /*#define CONFIG_SYS_DRAM_TEST 1 */ #undef CONFIG_SYS_DRAM_TEST diff --git a/include/configs/edison.h b/include/configs/edison.h index a6ec6389b07..34536ecf850 100644 --- a/include/configs/edison.h +++ b/include/configs/edison.h @@ -10,8 +10,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - #define CONFIG_SYS_STACK_SIZE (32 * 1024) #define CONFIG_SYS_MONITOR_LEN (256 * 1024) diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h index 7411552b9ba..cbcef261f43 100644 --- a/include/configs/exynos-common.h +++ b/include/configs/exynos-common.h @@ -27,7 +27,4 @@ /* Miscellaneous configurable options */ -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - #endif /* __CONFIG_H */ diff --git a/include/configs/exynos7420-common.h b/include/configs/exynos7420-common.h index f9db9a269f0..e8aed567102 100644 --- a/include/configs/exynos7420-common.h +++ b/include/configs/exynos7420-common.h @@ -17,9 +17,6 @@ /* Miscellaneous configurable options */ -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - /* select serial console configuration */ /* IRAM Layout */ diff --git a/include/configs/exynos78x0-common.h b/include/configs/exynos78x0-common.h index b443370067a..3c2a293e534 100644 --- a/include/configs/exynos78x0-common.h +++ b/include/configs/exynos78x0-common.h @@ -20,9 +20,6 @@ /* Miscellaneous configurable options */ -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - #define CPU_RELEASE_ADDR secondary_boot_addr #define CONFIG_SYS_BAUDRATE_TABLE \ diff --git a/include/configs/gazerbeam.h b/include/configs/gazerbeam.h index b1589185775..040fd00bb35 100644 --- a/include/configs/gazerbeam.h +++ b/include/configs/gazerbeam.h @@ -58,8 +58,6 @@ * Miscellaneous configurable options */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - /* * For booting Linux, the board info and command line data * have to be in the first 256 MB of memory, since this is diff --git a/include/configs/highbank.h b/include/configs/highbank.h index 98b17af489f..200cba3e705 100644 --- a/include/configs/highbank.h +++ b/include/configs/highbank.h @@ -19,7 +19,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_64BIT_LBA diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h index 0bd09c00db7..3fd441e30ba 100644 --- a/include/configs/ids8313.h +++ b/include/configs/ids8313.h @@ -216,7 +216,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_LOADS_ECHO #undef CONFIG_SYS_LOADS_BAUD_CHANGE diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h index 0c8f9faba30..009c3cc5c1e 100644 --- a/include/configs/imx27lite-common.h +++ b/include/configs/imx27lite-common.h @@ -106,9 +106,6 @@ /* * U-Boot general configuration */ -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index 3b07e925d3b..c8875daa92d 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -147,8 +147,6 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3) -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - /* USDHC */ #define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h index e704fc59012..ddd19cc8ce7 100644 --- a/include/configs/imx8mm_beacon.h +++ b/include/configs/imx8mm_beacon.h @@ -93,5 +93,4 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #endif diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h index deae85f58b5..6c5dbd7dde3 100644 --- a/include/configs/imx8mm_data_modul_edm_sbc.h +++ b/include/configs/imx8mm_data_modul_edm_sbc.h @@ -43,8 +43,6 @@ #define CONFIG_MXC_UART_BASE UART3_BASE_ADDR -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - /* PHY needs a longer autonegotiation timeout after reset */ #define PHY_ANEG_TIMEOUT 20000 diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index 6c6a5b2de01..5de1a77973a 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -70,8 +70,6 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - #define CONFIG_FEC_MXC_PHYADDR 0 #endif diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index 590c764c070..63bd865398d 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -68,8 +68,6 @@ /* UART */ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - /* USDHC */ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index 51e3406b227..f69678f495f 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -104,6 +104,8 @@ /* UART */ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +/* FEC */ +#define CONFIG_FEC_MXC_PHYADDR 0 +#define FEC_QUIRK_ENET_MAC #endif diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h index 5b45de19d36..11dd56cfe7b 100644 --- a/include/configs/imx8mn_beacon.h +++ b/include/configs/imx8mn_beacon.h @@ -109,5 +109,4 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #endif diff --git a/include/configs/imx8mn_bsh_smm_s2_common.h b/include/configs/imx8mn_bsh_smm_s2_common.h index 8b5a2771447..367b9ee0607 100644 --- a/include/configs/imx8mn_bsh_smm_s2_common.h +++ b/include/configs/imx8mn_bsh_smm_s2_common.h @@ -47,8 +47,6 @@ #define CONFIG_MXC_UART_BASE UART4_BASE_ADDR -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - /* I2C */ #endif /* __IMX8MN_BSH_SMM_S2_COMMON_H */ diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index 4cc9ab025f0..b0bcd02d1fd 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -77,6 +77,4 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - #endif diff --git a/include/configs/imx8mn_var_som.h b/include/configs/imx8mn_var_som.h index a518bbff73e..7f7def8f260 100644 --- a/include/configs/imx8mn_var_som.h +++ b/include/configs/imx8mn_var_som.h @@ -66,8 +66,6 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(4) -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - /* USDHC */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index 538b23ab0a1..4641996fef2 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -100,6 +100,8 @@ /* UART */ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +/* FEC */ +#define CONFIG_FEC_MXC_PHYADDR 0 +#define FEC_QUIRK_ENET_MAC #endif diff --git a/include/configs/imx8mp_dhcom_pdk2.h b/include/configs/imx8mp_dhcom_pdk2.h index d5df08fdeb5..18ccc6f9270 100644 --- a/include/configs/imx8mp_dhcom_pdk2.h +++ b/include/configs/imx8mp_dhcom_pdk2.h @@ -41,9 +41,6 @@ #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR -/* Monitor Command Prompt */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - /* PHY needs a longer autonegotiation timeout after reset */ #define PHY_ANEG_TIMEOUT 20000 #define FEC_QUIRK_ENET_MAC diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index e9392c64e49..3ec4fb1fdd1 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -81,6 +81,4 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - #endif diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index bc0d2975b7b..31f23e30a6a 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -170,8 +170,6 @@ #define CONFIG_MXC_UART_BASE UART3_BASE_ADDR -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h index c910d429213..e693bbe6886 100644 --- a/include/configs/imx8mp_venice.h +++ b/include/configs/imx8mp_venice.h @@ -100,8 +100,6 @@ /* UART */ #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - /* FEC */ #define FEC_QUIRK_ENET_MAC diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index ccaf76cbbcd..b8c0717c7a3 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -73,8 +73,6 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 532fa773ba3..32ea06cf9c8 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -79,8 +79,6 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index 2b2829f2e17..fcfd794ea3c 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -107,8 +107,6 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index c8decee0337..8eb6ab8552b 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -128,6 +128,5 @@ #endif /* Misc configuration */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #endif /* __IMX8QXP_MEK_H */ diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index 3f99c6b4144..66bf816ecf0 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -70,8 +70,6 @@ #define PHYS_SDRAM 0x80000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - /* Using ULP WDOG for reset */ #define WDOG_BASE_ADDR WDG3_RBASE #endif diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h index 76895b4462c..64d121bb5b5 100644 --- a/include/configs/km/keymile-common.h +++ b/include/configs/km/keymile-common.h @@ -12,7 +12,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_HUSH_INIT_VAR diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index 8e0b6d11842..a717bb0ae72 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -50,7 +50,6 @@ /* * U-Boot general configuration */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ /* * Linux Information diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index 2b90c1d6967..577ba6dfc04 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -176,8 +176,6 @@ /* Miscellaneous configurable options */ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - #define CONFIG_LS102XA_STREAM_ID #define CONFIG_SYS_INIT_SP_OFFSET \ diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index e4b86c22409..5b198ad8df0 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -58,8 +58,6 @@ "run emmc_hdploadcmd; run distro_bootcmd;run emmc_bootcmd; " \ "env exists secureboot && esbc_halt;" -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */ - #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ #define OCRAM_NONSECURE_SIZE 0x00010000 diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index a9922f15ab7..78d3d57eec3 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -148,8 +148,6 @@ unsigned long long get_qixis_addr(void); " 0x580e00000 \0" #endif -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */ - #ifdef CONFIG_SPL #define CONFIG_SPL_BSS_START_ADDR 0x80100000 #define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index bc210dab916..5717a3dd317 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -115,8 +115,6 @@ #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */ - #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ /* Initial environment variables */ diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 50941b818d2..0e89dae7701 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -32,8 +32,6 @@ /* * U-Boot general configurations */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - /* Boot argument buffer size */ /* * Serial Driver diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index 002a3e5adb1..46b4cce3f8a 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -87,8 +87,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ /* Physical Memory Map */ diff --git a/include/configs/mxs.h b/include/configs/mxs.h index 7065992a864..5118c53ad3d 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -78,8 +78,6 @@ */ /* U-Boot general configuration */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - /* Boot argument buffer size */ /* * Drivers diff --git a/include/configs/octeontx2_common.h b/include/configs/octeontx2_common.h index f30851cc878..4df3be1b1ea 100644 --- a/include/configs/octeontx2_common.h +++ b/include/configs/octeontx2_common.h @@ -22,8 +22,6 @@ "ethrotate=yes\0" \ "autoload=0\0" -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - #define CONFIG_SYS_MMC_MAX_BLK_COUNT 8192 #if defined(CONFIG_MMC_OCTEONTX) diff --git a/include/configs/octeontx_common.h b/include/configs/octeontx_common.h index f79c1c4fdb5..959f3d1347d 100644 --- a/include/configs/octeontx_common.h +++ b/include/configs/octeontx_common.h @@ -53,8 +53,6 @@ # define CONFIG_SYS_64BIT_LBA #endif -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - #define CONFIG_SYS_MMC_MAX_BLK_COUNT 8192 /** EMMC specific defines */ diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index a1264bf4db2..b7698c86454 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -139,7 +139,6 @@ /* * U-Boot general configuration */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ /* * USB Configs diff --git a/include/configs/owl-common.h b/include/configs/owl-common.h index d6948cca289..0372bd7c79d 100644 --- a/include/configs/owl-common.h +++ b/include/configs/owl-common.h @@ -23,6 +23,5 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x7ff00) /* Console configuration */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #endif diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h index 4eec7fb208c..df175311597 100644 --- a/include/configs/phycore_imx8mm.h +++ b/include/configs/phycore_imx8mm.h @@ -86,6 +86,4 @@ /* UART */ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3) -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - #endif /* __PHYCORE_IMX8MM_H */ diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h index 6c59e7ba579..8247c7ce397 100644 --- a/include/configs/phycore_imx8mp.h +++ b/include/configs/phycore_imx8mp.h @@ -86,6 +86,4 @@ /* UART */ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - #endif /* __PHYCORE_IMX8MP_H */ diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index a586e60fec9..d59f70a61a7 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -86,8 +86,6 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h index dd03c5c03c0..fcec8b0038a 100644 --- a/include/configs/presidio_asic.h +++ b/include/configs/presidio_asic.h @@ -42,7 +42,6 @@ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* Console I/O Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define KSEG1_ATU_XLAT(x) (x) diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index ae585bb2c02..e65ab72ca9c 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -24,7 +24,6 @@ #define GICC_BASE 0xF1020000 /* console */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400 } /* PHY needs a longer autoneg timeout */ diff --git a/include/configs/s5p4418_nanopi2.h b/include/configs/s5p4418_nanopi2.h index a25dce59da4..0c2b05dc8c2 100644 --- a/include/configs/s5p4418_nanopi2.h +++ b/include/configs/s5p4418_nanopi2.h @@ -77,9 +77,6 @@ */ /* board_init_f->init_sequence, call arch_cpu_init */ -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - /*----------------------------------------------------------------------- * serial console configuration */ diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 5757b63ab18..322fd24302f 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -29,9 +29,6 @@ /* Console I/O Buffer Size */ -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - /* * memtest works on 8 MB in DRAM after skipping 32MB from * start addr of ram disk diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 4a099837e93..e8ee53969c4 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -60,8 +60,6 @@ * U-Boot general configurations */ /* Print buffer size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - /* Boot argument buffer size */ /* * Cache diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 14cc708079a..045e66492e4 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -20,7 +20,6 @@ /* * U-Boot console configurations */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Extend size of kernel image for uncompression */ #define CONFIG_SYS_BOOTM_LEN (32 * 1024 * 1024) diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index 9c453fce6f7..a56bc4e1540 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -45,9 +45,6 @@ #define CONFIG_PRAM 2048 /* 2048 KB */ -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - #define CONFIG_SYS_MBAR 0xFC000000 /* diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 55c0f27d71f..eb0359b4db1 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -35,9 +35,6 @@ */ #define CONFIG_SYS_MMC_MAX_DEVICE 4 -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) - #ifdef CONFIG_ARM64 #define FDTFILE "nvidia/" CONFIG_DEFAULT_DEVICE_TREE ".dtb" #else diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index 9e18a6c6d06..90dfb1feeb7 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -89,9 +89,6 @@ /* As stated above, the following choices are optional. */ /* Console I/O Buffer Size */ -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - /* * When we have SPI, NOR or NAND flash we expect to be making use of * mtdparts, both for ease of use in U-Boot and for passing information diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h index 30f8376b7e0..bdb77cfc2c7 100644 --- a/include/configs/tplink_wdr4300.h +++ b/include/configs/tplink_wdr4300.h @@ -27,8 +27,6 @@ * Command */ /* Miscellaneous configurable options */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - /* Boot argument buffer size */ /* USB, USB storage, USB ethernet */ #define CONFIG_EHCI_MMIO_BIG_ENDIAN diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 9bea5a26077..cbdb2d91bda 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -41,9 +41,6 @@ #define CONFIG_SYS_MONITOR_LEN 0x00200000 /* 2MB */ -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) - #if !defined(CONFIG_ARM64) /* Time clock 1MHz */ #define CONFIG_SYS_TIMER_RATE 1000000 diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index b251e2b9258..c7de503abad 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -86,8 +86,6 @@ /* UART */ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - /* ENET */ #define CONFIG_FEC_MXC_PHYADDR 7 diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index df6dc7447e9..a61192f8f9a 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -102,6 +102,4 @@ /* UART */ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3) -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - #endif /* __VERDIN_IMX8MP_H */ diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index 9b7cc7a4c4f..4d46ce024f1 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -27,7 +27,6 @@ /* * U-Boot General Configurations */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* * NAND chip timings for FIXME: which one? diff --git a/include/configs/xenguest_arm64.h b/include/configs/xenguest_arm64.h index 322b2cfef82..364dae0cd93 100644 --- a/include/configs/xenguest_arm64.h +++ b/include/configs/xenguest_arm64.h @@ -13,8 +13,6 @@ #undef CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ "loadimage=ext4load pvblock 0 0x90000000 /boot/Image;\0" \ diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h index d1e2753cbbe..3221bd20a71 100644 --- a/include/configs/xilinx_versal.h +++ b/include/configs/xilinx_versal.h @@ -28,7 +28,6 @@ /* Miscellaneous configurable options */ /* Console I/O Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #if defined(CONFIG_CMD_DFU) #define DFU_DEFAULT_POLL_TIMEOUT 300 diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 2abf96f3544..31a6beb0111 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -52,7 +52,6 @@ #endif /* Console I/O Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Ethernet driver */ #if defined(CONFIG_ZYNQ_GEM) diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h index 89b6d198d7f..4218015c377 100644 --- a/include/configs/xtfpga.h +++ b/include/configs/xtfpga.h @@ -98,9 +98,6 @@ /*==============================*/ /* Console I/O Buffer Size */ - /* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - /*==============================*/ /* U-Boot autoboot configuration */ /*==============================*/ -- GitLab From b7fbdc55c7c72e97595f1f3233c0e9477c97c52b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 12 May 2022 16:12:16 -0400 Subject: [PATCH 005/581] Convert CONFIG_HUSH_INIT_VAR to Kconfig This converts the following to Kconfig: CONFIG_HUSH_INIT_VAR Signed-off-by: Tom Rini --- board/keymile/Kconfig | 3 +++ include/configs/km/keymile-common.h | 2 -- include/configs/socfpga_arria5_secu1.h | 1 - 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/board/keymile/Kconfig b/board/keymile/Kconfig index 863c07db47d..f22faee0ee4 100644 --- a/board/keymile/Kconfig +++ b/board/keymile/Kconfig @@ -11,6 +11,9 @@ if VENDOR_KM menu "KM Board Setup" +config HUSH_INIT_VAR + def_bool y + config KM_PNVRAM hex "Pseudo RAM" default 0x80000 diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h index 64d121bb5b5..4bca1a78302 100644 --- a/include/configs/km/keymile-common.h +++ b/include/configs/km/keymile-common.h @@ -13,8 +13,6 @@ * Miscellaneous configurable options */ -#define CONFIG_HUSH_INIT_VAR - #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } #define CONFIG_LOADS_ECHO diff --git a/include/configs/socfpga_arria5_secu1.h b/include/configs/socfpga_arria5_secu1.h index 88fd8ae44cc..3a77c71874d 100644 --- a/include/configs/socfpga_arria5_secu1.h +++ b/include/configs/socfpga_arria5_secu1.h @@ -9,7 +9,6 @@ #include #include -#define CONFIG_HUSH_INIT_VAR /* Eternal oscillator */ #define CONFIG_SYS_TIMER_RATE 40000000 -- GitLab From 167f699ba142193e67cade8d19127cfda723ce38 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 12 May 2022 16:45:08 -0400 Subject: [PATCH 006/581] Convert CONFIG_SYS_BOOTPARAMS_LEN to Kconfig This converts the following to Kconfig: CONFIG_SYS_BOOTPARAMS_LEN Signed-off-by: Tom Rini --- common/Kconfig | 12 ++++++++++++ common/board_r.c | 4 ++-- configs/M5208EVBE_defconfig | 1 + configs/M5235EVB_Flash32_defconfig | 1 + configs/M5235EVB_defconfig | 1 + configs/M5249EVB_defconfig | 1 + configs/M5253DEMO_defconfig | 1 + configs/M5272C3_defconfig | 1 + configs/M5275EVB_defconfig | 1 + configs/M5282EVB_defconfig | 1 + configs/M53017EVB_defconfig | 1 + configs/M5329AFEE_defconfig | 1 + configs/M5329BFEE_defconfig | 1 + configs/M5373EVB_defconfig | 1 + configs/amcore_defconfig | 1 + configs/ap121_defconfig | 1 + configs/ap143_defconfig | 1 + configs/ap152_defconfig | 1 + configs/astro_mcf5373l_defconfig | 1 + configs/bcm968380gerg_ram_defconfig | 1 + configs/ci20_mmc_defconfig | 1 + configs/cobra5272_defconfig | 1 + configs/comtrend_ar5315u_ram_defconfig | 1 + configs/comtrend_ar5387un_ram_defconfig | 1 + configs/comtrend_ct5361_ram_defconfig | 1 + configs/comtrend_vr3032u_ram_defconfig | 1 + configs/comtrend_wap5813n_ram_defconfig | 1 + configs/eb_cpu5282_defconfig | 1 + configs/eb_cpu5282_internal_defconfig | 1 + configs/gardena-smart-gateway-mt7688_defconfig | 1 + configs/hihope_rzg2_defconfig | 1 + configs/huawei_hg556a_ram_defconfig | 1 + configs/linkit-smart-7688_defconfig | 1 + configs/malta64_defconfig | 1 + configs/malta64el_defconfig | 1 + configs/malta_defconfig | 1 + configs/maltael_defconfig | 1 + configs/mt7620_mt7530_rfb_defconfig | 1 + configs/mt7620_rfb_defconfig | 1 + configs/mt7628_rfb_defconfig | 1 + configs/netgear_cg3100d_ram_defconfig | 1 + configs/netgear_dgnd3700v2_ram_defconfig | 1 + configs/pic32mzdask_defconfig | 2 ++ configs/r8a77970_eagle_defconfig | 1 + configs/r8a77980_condor_defconfig | 1 + configs/r8a77990_ebisu_defconfig | 1 + configs/r8a77995_draak_defconfig | 1 + configs/r8a779a0_falcon_defconfig | 1 + configs/rcar3_salvator-x_defconfig | 1 + configs/rcar3_ulcb_defconfig | 1 + configs/rzg2_beacon_defconfig | 1 + configs/sagem_f@st1704_ram_defconfig | 1 + configs/sfr_nb4-ser_ram_defconfig | 1 + configs/silinux_ek874_defconfig | 1 + configs/stmark2_defconfig | 1 + configs/tplink_wdr4300_defconfig | 1 + configs/vocore2_defconfig | 1 + configs/xtfpga_defconfig | 1 + include/configs/M5208EVBE.h | 2 -- include/configs/M5235EVB.h | 2 -- include/configs/M5249EVB.h | 1 - include/configs/M5253DEMO.h | 1 - include/configs/M5272C3.h | 1 - include/configs/M5275EVB.h | 1 - include/configs/M5282EVB.h | 1 - include/configs/M53017EVB.h | 2 -- include/configs/M5329EVB.h | 2 -- include/configs/M5373EVB.h | 2 -- include/configs/amcore.h | 1 - include/configs/ap121.h | 2 -- include/configs/ap143.h | 2 -- include/configs/ap152.h | 2 -- include/configs/astro_mcf5373l.h | 2 -- include/configs/bmips_common.h | 3 --- include/configs/ci20.h | 1 - include/configs/cobra5272.h | 1 - include/configs/eb_cpu5282.h | 1 - include/configs/gardena-smart-gateway-mt7688.h | 3 --- include/configs/linkit-smart-7688.h | 3 --- include/configs/malta.h | 1 - include/configs/mt7620.h | 2 -- include/configs/mt7628.h | 2 -- include/configs/pic32mzdask.h | 1 - include/configs/rcar-gen3-common.h | 2 -- include/configs/stmark2.h | 1 - include/configs/tplink_wdr4300.h | 2 -- include/configs/vocore2.h | 3 --- include/configs/xtfpga.h | 3 --- 88 files changed, 71 insertions(+), 55 deletions(-) diff --git a/common/Kconfig b/common/Kconfig index a96842a5c11..84db2e43f15 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -659,6 +659,18 @@ config MISC_INIT_R help Enabling this option calls 'misc_init_r' function +config SYS_MALLOC_BOOTPARAMS + bool "Malloc a buffer to use for bootparams" + help + In some cases rather than using a known location to store the + bi_boot_params portion of gd we need to allocate it from our malloc pool. + +config SYS_BOOTPARAMS_LEN + hex "Size of the bootparam buffer to malloc in bytes" + depends on SYS_MALLOC_BOOTPARAMS + default 0x20000 if MIPS || RCAR_GEN3 + default 0x10000 + config ID_EEPROM bool "Enable I2C connected system identifier EEPROM" help diff --git a/common/board_r.c b/common/board_r.c index 6f4aca2077d..22b5deaa8c2 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -457,7 +457,7 @@ static int initr_env(void) return 0; } -#ifdef CONFIG_SYS_BOOTPARAMS_LEN +#ifdef CONFIG_SYS_MALLOC_BOOTPARAMS static int initr_malloc_bootparams(void) { gd->bd->bi_boot_params = (ulong)malloc(CONFIG_SYS_BOOTPARAMS_LEN); @@ -713,7 +713,7 @@ static init_fnc_t init_sequence_r[] = { initr_pvblock, #endif initr_env, -#ifdef CONFIG_SYS_BOOTPARAMS_LEN +#ifdef CONFIG_SYS_MALLOC_BOOTPARAMS initr_malloc_bootparams, #endif INIT_FUNC_WATCHDOG_RESET diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig index df4da884355..757792f9b0f 100644 --- a/configs/M5208EVBE_defconfig +++ b/configs/M5208EVBE_defconfig @@ -11,6 +11,7 @@ CONFIG_MCFTMR=y CONFIG_SYS_MONITOR_BASE=0x00000400 CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " diff --git a/configs/M5235EVB_Flash32_defconfig b/configs/M5235EVB_Flash32_defconfig index 5789d89047f..1ed127ca3c2 100644 --- a/configs/M5235EVB_Flash32_defconfig +++ b/configs/M5235EVB_Flash32_defconfig @@ -12,6 +12,7 @@ CONFIG_MCFTMR=y CONFIG_SYS_MONITOR_BASE=0xFFC00400 CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig index 43a584f8e46..fed386c164a 100644 --- a/configs/M5235EVB_defconfig +++ b/configs/M5235EVB_defconfig @@ -11,6 +11,7 @@ CONFIG_MCFTMR=y CONFIG_SYS_MONITOR_BASE=0xFFE00400 CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " diff --git a/configs/M5249EVB_defconfig b/configs/M5249EVB_defconfig index 65606c42c3c..171df12564f 100644 --- a/configs/M5249EVB_defconfig +++ b/configs/M5249EVB_defconfig @@ -13,6 +13,7 @@ CONFIG_SYS_MONITOR_BASE=0xFFE00400 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SYS_DEVICE_NULLDEV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_CMDLINE_EDITING is not set CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/M5253DEMO_defconfig b/configs/M5253DEMO_defconfig index b8a0cb49312..b3e6277a7e6 100644 --- a/configs/M5253DEMO_defconfig +++ b/configs/M5253DEMO_defconfig @@ -11,6 +11,7 @@ CONFIG_MCFTMR=y CONFIG_SYS_MONITOR_BASE=0xFF800400 CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/M5272C3_defconfig b/configs/M5272C3_defconfig index 59c49223d7e..376fb425306 100644 --- a/configs/M5272C3_defconfig +++ b/configs/M5272C3_defconfig @@ -11,6 +11,7 @@ CONFIG_MCFTMR=y CONFIG_SYS_MONITOR_BASE=0xFFE00400 CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " diff --git a/configs/M5275EVB_defconfig b/configs/M5275EVB_defconfig index 9774e77b6e9..3420934caf7 100644 --- a/configs/M5275EVB_defconfig +++ b/configs/M5275EVB_defconfig @@ -13,6 +13,7 @@ CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="bootm ffe40000" # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " diff --git a/configs/M5282EVB_defconfig b/configs/M5282EVB_defconfig index 7d77f6c47f1..8f38710b074 100644 --- a/configs/M5282EVB_defconfig +++ b/configs/M5282EVB_defconfig @@ -11,6 +11,7 @@ CONFIG_MCFTMR=y CONFIG_SYS_MONITOR_BASE=0xFFE00400 CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig index 45656a34f20..246bc8a3bed 100644 --- a/configs/M53017EVB_defconfig +++ b/configs/M53017EVB_defconfig @@ -13,6 +13,7 @@ CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock3 rw rootfstype=jffs2" # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig index 940196f73a0..3536b4432de 100644 --- a/configs/M5329AFEE_defconfig +++ b/configs/M5329AFEE_defconfig @@ -11,6 +11,7 @@ CONFIG_MCFTMR=y CONFIG_SYS_MONITOR_BASE=0x00000400 CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig index a885281d1b7..a020775c87d 100644 --- a/configs/M5329BFEE_defconfig +++ b/configs/M5329BFEE_defconfig @@ -11,6 +11,7 @@ CONFIG_MCFTMR=y CONFIG_SYS_MONITOR_BASE=0x00000400 CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig index c7c619ff693..b008b91fdd5 100644 --- a/configs/M5373EVB_defconfig +++ b/configs/M5373EVB_defconfig @@ -11,6 +11,7 @@ CONFIG_MCFTMR=y CONFIG_SYS_MONITOR_BASE=0x00000400 CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " diff --git a/configs/amcore_defconfig b/configs/amcore_defconfig index 53bfbcf5710..ad549c02c15 100644 --- a/configs/amcore_defconfig +++ b/configs/amcore_defconfig @@ -15,6 +15,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="bootm ffc20000" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_PROMPT="amcore $ " diff --git a/configs/ap121_defconfig b/configs/ap121_defconfig index 0baa4c8d12e..648cf227e3c 100644 --- a/configs/ap121_defconfig +++ b/configs/ap121_defconfig @@ -20,6 +20,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe;mtdparts default;bootm 0x9f650000" CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SYS_PROMPT="ap121 # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 diff --git a/configs/ap143_defconfig b/configs/ap143_defconfig index b6ab065c6d6..272d1c2e396 100644 --- a/configs/ap143_defconfig +++ b/configs/ap143_defconfig @@ -22,6 +22,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe;mtdparts default;bootm 0x9f680000" CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SYS_PROMPT="ap143 # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 diff --git a/configs/ap152_defconfig b/configs/ap152_defconfig index 0ee5f828ab0..67c36cdab81 100644 --- a/configs/ap152_defconfig +++ b/configs/ap152_defconfig @@ -22,6 +22,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe;mtdparts default;bootm 0x9f060000" CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SYS_PROMPT="ap152 # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 diff --git a/configs/astro_mcf5373l_defconfig b/configs/astro_mcf5373l_defconfig index 4c2121116a2..3a44c7e8ec9 100644 --- a/configs/astro_mcf5373l_defconfig +++ b/configs/astro_mcf5373l_defconfig @@ -16,6 +16,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="protect off 0x80000 0x1ffffff;run env_check;run xilinxload&&run alteraload&&bootm 0x80000;update;reset" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="URMEL > " diff --git a/configs/bcm968380gerg_ram_defconfig b/configs/bcm968380gerg_ram_defconfig index d35a2ba5461..0475535e991 100644 --- a/configs/bcm968380gerg_ram_defconfig +++ b/configs/bcm968380gerg_ram_defconfig @@ -16,6 +16,7 @@ CONFIG_MIPS_BOOT_FDT=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="bcm968380gerg # " CONFIG_SYS_MAXARGS=24 diff --git a/configs/ci20_mmc_defconfig b/configs/ci20_mmc_defconfig index a533706fac1..4d963c3eb35 100644 --- a/configs/ci20_mmc_defconfig +++ b/configs/ci20_mmc_defconfig @@ -22,6 +22,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_SPL_BANNER_PRINT is not set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1c diff --git a/configs/cobra5272_defconfig b/configs/cobra5272_defconfig index c6eff7d9352..42f6087d83c 100644 --- a/configs/cobra5272_defconfig +++ b/configs/cobra5272_defconfig @@ -11,6 +11,7 @@ CONFIG_MCFTMR=y CONFIG_SYS_MONITOR_BASE=0xFFE00400 CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="COBRA > " diff --git a/configs/comtrend_ar5315u_ram_defconfig b/configs/comtrend_ar5315u_ram_defconfig index c62531681a0..170b766089d 100644 --- a/configs/comtrend_ar5315u_ram_defconfig +++ b/configs/comtrend_ar5315u_ram_defconfig @@ -17,6 +17,7 @@ CONFIG_MIPS_BOOT_FDT=y CONFIG_REMAKE_ELF=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="AR-5315un # " CONFIG_SYS_MAXARGS=24 diff --git a/configs/comtrend_ar5387un_ram_defconfig b/configs/comtrend_ar5387un_ram_defconfig index 67fa622769a..599fda481aa 100644 --- a/configs/comtrend_ar5387un_ram_defconfig +++ b/configs/comtrend_ar5387un_ram_defconfig @@ -17,6 +17,7 @@ CONFIG_MIPS_BOOT_FDT=y CONFIG_REMAKE_ELF=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="AR-5387un # " CONFIG_SYS_MAXARGS=24 diff --git a/configs/comtrend_ct5361_ram_defconfig b/configs/comtrend_ct5361_ram_defconfig index 0e6e8234c1e..b1ad57b5a56 100644 --- a/configs/comtrend_ct5361_ram_defconfig +++ b/configs/comtrend_ct5361_ram_defconfig @@ -17,6 +17,7 @@ CONFIG_MIPS_BOOT_FDT=y CONFIG_REMAKE_ELF=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="CT-5361 # " CONFIG_SYS_MAXARGS=24 diff --git a/configs/comtrend_vr3032u_ram_defconfig b/configs/comtrend_vr3032u_ram_defconfig index 5f8db634acd..d07895de9b8 100644 --- a/configs/comtrend_vr3032u_ram_defconfig +++ b/configs/comtrend_vr3032u_ram_defconfig @@ -17,6 +17,7 @@ CONFIG_MIPS_BOOT_FDT=y CONFIG_REMAKE_ELF=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="VR-3032u # " CONFIG_SYS_MAXARGS=24 diff --git a/configs/comtrend_wap5813n_ram_defconfig b/configs/comtrend_wap5813n_ram_defconfig index 36cd978bfaa..ca370e66a34 100644 --- a/configs/comtrend_wap5813n_ram_defconfig +++ b/configs/comtrend_wap5813n_ram_defconfig @@ -17,6 +17,7 @@ CONFIG_MIPS_BOOT_FDT=y CONFIG_REMAKE_ELF=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="WAP-5813n # " CONFIG_SYS_MAXARGS=24 diff --git a/configs/eb_cpu5282_defconfig b/configs/eb_cpu5282_defconfig index 5a33e2f0ae2..d634280de5d 100644 --- a/configs/eb_cpu5282_defconfig +++ b/configs/eb_cpu5282_defconfig @@ -17,6 +17,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="printenv" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="\nEB+CPU5282> " CONFIG_SYS_CBSIZE=1024 diff --git a/configs/eb_cpu5282_internal_defconfig b/configs/eb_cpu5282_internal_defconfig index d23b7170cdd..a726fdb56e3 100644 --- a/configs/eb_cpu5282_internal_defconfig +++ b/configs/eb_cpu5282_internal_defconfig @@ -17,6 +17,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="printenv" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_CBSIZE=1024 CONFIG_CMD_IMLS=y diff --git a/configs/gardena-smart-gateway-mt7688_defconfig b/configs/gardena-smart-gateway-mt7688_defconfig index 7b0b2a5c588..b07e7c78d06 100644 --- a/configs/gardena-smart-gateway-mt7688_defconfig +++ b/configs/gardena-smart-gateway-mt7688_defconfig @@ -36,6 +36,7 @@ CONFIG_BOOTCOMMAND="cp.b 83000000 84000000 10000 && dhcp uEnv.txt && env import CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y diff --git a/configs/hihope_rzg2_defconfig b/configs/hihope_rzg2_defconfig index 4470cc7fb33..8bf14e09d47 100644 --- a/configs/hihope_rzg2_defconfig +++ b/configs/hihope_rzg2_defconfig @@ -20,6 +20,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a774a1-hihope-rzg2m.dtb; booti 0x48080000 - 0x48000000" CONFIG_DEFAULT_FDT_FILE="r8a774a1-hihope-rzg2m.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 diff --git a/configs/huawei_hg556a_ram_defconfig b/configs/huawei_hg556a_ram_defconfig index fbdbf4b8d76..1c43ae262d8 100644 --- a/configs/huawei_hg556a_ram_defconfig +++ b/configs/huawei_hg556a_ram_defconfig @@ -17,6 +17,7 @@ CONFIG_MIPS_BOOT_FDT=y CONFIG_REMAKE_ELF=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="HG556a # " CONFIG_SYS_MAXARGS=24 diff --git a/configs/linkit-smart-7688_defconfig b/configs/linkit-smart-7688_defconfig index b137edd7e6a..d50c77d8b63 100644 --- a/configs/linkit-smart-7688_defconfig +++ b/configs/linkit-smart-7688_defconfig @@ -28,6 +28,7 @@ CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y diff --git a/configs/malta64_defconfig b/configs/malta64_defconfig index 944d0fd8a8d..cbea4fadff7 100644 --- a/configs/malta64_defconfig +++ b/configs/malta64_defconfig @@ -12,6 +12,7 @@ CONFIG_CPU_MIPS64_R2=y # CONFIG_AUTOBOOT is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="malta # " CONFIG_SYS_CBSIZE=256 diff --git a/configs/malta64el_defconfig b/configs/malta64el_defconfig index 907fd19328b..b268e33a379 100644 --- a/configs/malta64el_defconfig +++ b/configs/malta64el_defconfig @@ -14,6 +14,7 @@ CONFIG_CPU_MIPS64_R2=y # CONFIG_AUTOBOOT is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="maltael # " CONFIG_SYS_CBSIZE=256 diff --git a/configs/malta_defconfig b/configs/malta_defconfig index f2b507e200c..7b1b50547a4 100644 --- a/configs/malta_defconfig +++ b/configs/malta_defconfig @@ -11,6 +11,7 @@ CONFIG_TARGET_MALTA=y # CONFIG_AUTOBOOT is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="malta # " CONFIG_SYS_CBSIZE=256 diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig index 866f34f8326..540864b5732 100644 --- a/configs/maltael_defconfig +++ b/configs/maltael_defconfig @@ -13,6 +13,7 @@ CONFIG_SYS_LITTLE_ENDIAN=y # CONFIG_AUTOBOOT is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="maltael # " CONFIG_SYS_CBSIZE=256 diff --git a/configs/mt7620_mt7530_rfb_defconfig b/configs/mt7620_mt7530_rfb_defconfig index af1282c9904..5bf12729050 100644 --- a/configs/mt7620_mt7530_rfb_defconfig +++ b/configs/mt7620_mt7530_rfb_defconfig @@ -23,6 +23,7 @@ CONFIG_MIPS_BOOT_FDT=y CONFIG_DEBUG_UART=y CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y # CONFIG_CMD_ELF is not set diff --git a/configs/mt7620_rfb_defconfig b/configs/mt7620_rfb_defconfig index ac7a56ef1ea..8a4124e95ca 100644 --- a/configs/mt7620_rfb_defconfig +++ b/configs/mt7620_rfb_defconfig @@ -22,6 +22,7 @@ CONFIG_MIPS_BOOT_FDT=y CONFIG_DEBUG_UART=y CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y # CONFIG_CMD_ELF is not set diff --git a/configs/mt7628_rfb_defconfig b/configs/mt7628_rfb_defconfig index 5862295871b..3ca36cdede3 100644 --- a/configs/mt7628_rfb_defconfig +++ b/configs/mt7628_rfb_defconfig @@ -22,6 +22,7 @@ CONFIG_MIPS_BOOT_FDT=y CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y # CONFIG_CMD_ELF is not set diff --git a/configs/netgear_cg3100d_ram_defconfig b/configs/netgear_cg3100d_ram_defconfig index 05ab61beb16..4336116f577 100644 --- a/configs/netgear_cg3100d_ram_defconfig +++ b/configs/netgear_cg3100d_ram_defconfig @@ -15,6 +15,7 @@ CONFIG_MIPS_BOOT_FDT=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="CG3100D # " CONFIG_SYS_MAXARGS=24 diff --git a/configs/netgear_dgnd3700v2_ram_defconfig b/configs/netgear_dgnd3700v2_ram_defconfig index e1f9ceed080..bbfa9e13fa3 100644 --- a/configs/netgear_dgnd3700v2_ram_defconfig +++ b/configs/netgear_dgnd3700v2_ram_defconfig @@ -18,6 +18,7 @@ CONFIG_REMAKE_ELF=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="DGND3700v2 # " CONFIG_SYS_MAXARGS=24 diff --git a/configs/pic32mzdask_defconfig b/configs/pic32mzdask_defconfig index 21f407c1f35..12cff6ab0b9 100644 --- a/configs/pic32mzdask_defconfig +++ b/configs/pic32mzdask_defconfig @@ -15,6 +15,8 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_TIMESTAMP=y CONFIG_BOOTDELAY=5 CONFIG_BOOTCOMMAND="run distro_bootcmd || run legacy_bootcmd" +CONFIG_SYS_MALLOC_BOOTPARAMS=y +CONFIG_SYS_BOOTPARAMS_LEN=0x1000 CONFIG_SYS_PROMPT="dask # " CONFIG_SYS_PBSIZE=1048 # CONFIG_CMD_SAVEENV is not set diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig index 4f4bd7a40b3..b37577b46ef 100644 --- a/configs/r8a77970_eagle_defconfig +++ b/configs/r8a77970_eagle_defconfig @@ -21,6 +21,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77970-eagle.dtb; booti 0x48080000 - 0x48000000" CONFIG_DEFAULT_FDT_FILE="r8a77970-eagle.dtb" +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 diff --git a/configs/r8a77980_condor_defconfig b/configs/r8a77980_condor_defconfig index 17df03cbe99..a5da38ed7b6 100644 --- a/configs/r8a77980_condor_defconfig +++ b/configs/r8a77980_condor_defconfig @@ -22,6 +22,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77980-condor.dtb; booti 0x48080000 - 0x48000000" CONFIG_DEFAULT_FDT_FILE="r8a77980-condor.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig index b3bc8a754d1..7ba55737d84 100644 --- a/configs/r8a77990_ebisu_defconfig +++ b/configs/r8a77990_ebisu_defconfig @@ -22,6 +22,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77990-ebisu.dtb; booti 0x48080000 - 0x48000000" CONFIG_DEFAULT_FDT_FILE="r8a77990-ebisu.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_UPDATE_TFTP=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig index 1d73756f952..e2a7e5f636d 100644 --- a/configs/r8a77995_draak_defconfig +++ b/configs/r8a77995_draak_defconfig @@ -21,6 +21,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77995-draak.dtb; booti 0x48080000 - 0x48000000" CONFIG_DEFAULT_FDT_FILE="r8a77995-draak.dtb" +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_UPDATE_TFTP=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 diff --git a/configs/r8a779a0_falcon_defconfig b/configs/r8a779a0_falcon_defconfig index 41353538f2b..e15884222a0 100644 --- a/configs/r8a779a0_falcon_defconfig +++ b/configs/r8a779a0_falcon_defconfig @@ -24,6 +24,7 @@ CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.2 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a779a0-falcon.dtb; booti 0x48080000 - 0x48000000" CONFIG_DEFAULT_FDT_FILE="r8a779a0-falcon.dtb" +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 diff --git a/configs/rcar3_salvator-x_defconfig b/configs/rcar3_salvator-x_defconfig index d2233d7eef1..7bcbb3a1339 100644 --- a/configs/rcar3_salvator-x_defconfig +++ b/configs/rcar3_salvator-x_defconfig @@ -21,6 +21,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77950-salvator-x.dtb; booti 0x48080000 - 0x48000000" CONFIG_DEFAULT_FDT_FILE="r8a77950-salvator-x.dtb" +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_UPDATE_TFTP=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 diff --git a/configs/rcar3_ulcb_defconfig b/configs/rcar3_ulcb_defconfig index 8402634cc01..c953299c0d0 100644 --- a/configs/rcar3_ulcb_defconfig +++ b/configs/rcar3_ulcb_defconfig @@ -21,6 +21,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77950-ulcb.dtb; booti 0x48080000 - 0x48000000" CONFIG_DEFAULT_FDT_FILE="r8a77950-ulcb.dtb" +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_UPDATE_TFTP=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 diff --git a/configs/rzg2_beacon_defconfig b/configs/rzg2_beacon_defconfig index 930e3e60776..1451a40dd93 100644 --- a/configs/rzg2_beacon_defconfig +++ b/configs/rzg2_beacon_defconfig @@ -19,6 +19,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" CONFIG_DEFAULT_FDT_FILE="r8a774a1-beacon-rzg2m-kit.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 diff --git a/configs/sagem_f@st1704_ram_defconfig b/configs/sagem_f@st1704_ram_defconfig index 4aff0f34a60..875ae210de4 100644 --- a/configs/sagem_f@st1704_ram_defconfig +++ b/configs/sagem_f@st1704_ram_defconfig @@ -16,6 +16,7 @@ CONFIG_MIPS_BOOT_FDT=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="F@ST1704 # " CONFIG_SYS_MAXARGS=24 diff --git a/configs/sfr_nb4-ser_ram_defconfig b/configs/sfr_nb4-ser_ram_defconfig index 13da31e3004..6f261882faa 100644 --- a/configs/sfr_nb4-ser_ram_defconfig +++ b/configs/sfr_nb4-ser_ram_defconfig @@ -18,6 +18,7 @@ CONFIG_MIPS_BOOT_FDT=y CONFIG_REMAKE_ELF=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="NB4-SER # " CONFIG_SYS_MAXARGS=24 diff --git a/configs/silinux_ek874_defconfig b/configs/silinux_ek874_defconfig index 08553661d91..74523483926 100644 --- a/configs/silinux_ek874_defconfig +++ b/configs/silinux_ek874_defconfig @@ -23,6 +23,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a774c0-ek874.dtb; booti 0x48080000 - 0x48000000" CONFIG_DEFAULT_FDT_FILE="r8a774c0-ek874.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 diff --git a/configs/stmark2_defconfig b/configs/stmark2_defconfig index e56ca93d4b8..dfec23e7518 100644 --- a/configs/stmark2_defconfig +++ b/configs/stmark2_defconfig @@ -16,6 +16,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 rw rootfstype=ramfs rdinit= CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe 0:1 50000000; sf read ${loadaddr} 0x100000 ${kern_size}; bootm ${loadaddr}" # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_HUSH_PARSER=y # CONFIG_CMDLINE_EDITING is not set CONFIG_SYS_PROMPT="stmark2 $ " diff --git a/configs/tplink_wdr4300_defconfig b/configs/tplink_wdr4300_defconfig index 62d9ec297bb..6a0686b32cc 100644 --- a/configs/tplink_wdr4300_defconfig +++ b/configs/tplink_wdr4300_defconfig @@ -15,6 +15,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="dhcp 192.168.1.1:wdr4300.fit && bootm $loadaddr" CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_ELF is not set diff --git a/configs/vocore2_defconfig b/configs/vocore2_defconfig index ff7a0ddd18e..33d27ad4b62 100644 --- a/configs/vocore2_defconfig +++ b/configs/vocore2_defconfig @@ -30,6 +30,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_LOGLEVEL=8 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y diff --git a/configs/xtfpga_defconfig b/configs/xtfpga_defconfig index ec7c5637e4a..e98af5ec7e6 100644 --- a/configs/xtfpga_defconfig +++ b/configs/xtfpga_defconfig @@ -15,6 +15,7 @@ CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press to stop\n" CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_MISC_INIT_R=y +CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_PBSIZE=1049 diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index 275fb5665fd..135dec0ebb4 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -83,8 +83,6 @@ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ -#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 - /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 13743dab52d..88f5f155633 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -88,8 +88,6 @@ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ -#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 - /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index f68eb979bdd..1a604f5c81e 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -65,7 +65,6 @@ #endif #define CONFIG_SYS_MONITOR_LEN 0x20000 -#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 /* * For booting Linux, the board info and command line data diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index 079675be5bc..0a416dc1226 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -91,7 +91,6 @@ #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ #define CONFIG_SYS_MONITOR_LEN 0x40000 -#define CONFIG_SYS_BOOTPARAMS_LEN (64*1024) /* * For booting Linux, the board info and command line data diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index b8918680c14..6b4028c17ca 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -89,7 +89,6 @@ #define CONFIG_SYS_FLASH_BASE 0xffe00000 #define CONFIG_SYS_MONITOR_LEN 0x20000 -#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 /* * For booting Linux, the board info and command line data diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 68e3c89a1cd..99412aabdec 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -91,7 +91,6 @@ #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE #define CONFIG_SYS_MONITOR_LEN 0x20000 -#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 /* * For booting Linux, the board info and command line data diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index b6e569d8202..fe04a70b61e 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -92,7 +92,6 @@ #define CONFIG_SYS_INT_FLASH_ENABLE 0x21 #define CONFIG_SYS_MONITOR_LEN 0x20000 -#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 /* * For booting Linux, the board info and command line data diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index 34b5ceb20c4..9b84d3693a3 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -97,8 +97,6 @@ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ -#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 - /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index 673b0dc2e8d..7e65f9914f4 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -93,8 +93,6 @@ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ -#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 - /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index 4c9fc43fd6c..b131aefd6dd 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -95,8 +95,6 @@ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ -#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 - /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is diff --git a/include/configs/amcore.h b/include/configs/amcore.h index 898978eb96a..e80c9f6d680 100644 --- a/include/configs/amcore.h +++ b/include/configs/amcore.h @@ -46,7 +46,6 @@ #define CONFIG_SYS_WRITE_SWAPPED_DATA /* reserve 128-4KB */ #define CONFIG_SYS_MONITOR_LEN ((128 - 4) * 1024) -#define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024) #define LDS_BOARD_TEXT \ . = DEFINED(env_offset) ? env_offset : .; \ diff --git a/include/configs/ap121.h b/include/configs/ap121.h index e1c2e066131..711406a5505 100644 --- a/include/configs/ap121.h +++ b/include/configs/ap121.h @@ -9,8 +9,6 @@ #define CONFIG_SYS_MHZ 200 #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) -#define CONFIG_SYS_BOOTPARAMS_LEN 0x20000 - #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000 diff --git a/include/configs/ap143.h b/include/configs/ap143.h index 37fc196514f..f89c41a7442 100644 --- a/include/configs/ap143.h +++ b/include/configs/ap143.h @@ -9,8 +9,6 @@ #define CONFIG_SYS_MHZ 325 #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) -#define CONFIG_SYS_BOOTPARAMS_LEN 0x20000 - #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000 diff --git a/include/configs/ap152.h b/include/configs/ap152.h index 9f476333710..9a0d7d2c6d6 100644 --- a/include/configs/ap152.h +++ b/include/configs/ap152.h @@ -9,8 +9,6 @@ #define CONFIG_SYS_MHZ 375 #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) -#define CONFIG_SYS_BOOTPARAMS_LEN 0x20000 - #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000 diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index 9d1203f3978..8362fb5ce3c 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -204,8 +204,6 @@ /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MONITOR_LEN (256 << 10) -#define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024) - /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is diff --git a/include/configs/bmips_common.h b/include/configs/bmips_common.h index f85b9039fdd..7e358a6314b 100644 --- a/include/configs/bmips_common.h +++ b/include/configs/bmips_common.h @@ -12,7 +12,4 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ 230400, 500000, 1500000 } -/* Memory usage */ -#define CONFIG_SYS_BOOTPARAMS_LEN SZ_128K - #endif /* __CONFIG_BMIPS_COMMON_H */ diff --git a/include/configs/ci20.h b/include/configs/ci20.h index 4af11496cb1..d2cb2f4b6f2 100644 --- a/include/configs/ci20.h +++ b/include/configs/ci20.h @@ -15,7 +15,6 @@ /* Memory configuration */ #define CONFIG_SYS_MONITOR_LEN (512 * 1024) -#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* cached (KSEG0) address */ #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index 1822ce5120a..f1a4df726f4 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -190,7 +190,6 @@ enter a valid image address in flash */ #define CONFIG_SYS_FLASH_BASE 0xffe00000 #define CONFIG_SYS_MONITOR_LEN 0x20000 -#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 /* * For booting Linux, the board info and command line data diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 9374928a9e4..70ee288aa72 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -81,7 +81,6 @@ #define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_SDRAM_SIZE0 #define CONFIG_SYS_MONITOR_LEN 0x20000 -#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 /* * For booting Linux, the board info and command line data diff --git a/include/configs/gardena-smart-gateway-mt7688.h b/include/configs/gardena-smart-gateway-mt7688.h index 3c4a13cd0d5..3fe37eae8bf 100644 --- a/include/configs/gardena-smart-gateway-mt7688.h +++ b/include/configs/gardena-smart-gateway-mt7688.h @@ -39,9 +39,6 @@ /* RAM */ -/* Memory usage */ -#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) - /* Environment settings */ #endif /* __CONFIG_GARDENA_SMART_GATEWAY_H */ diff --git a/include/configs/linkit-smart-7688.h b/include/configs/linkit-smart-7688.h index 35a6db4c186..b0d77d1c624 100644 --- a/include/configs/linkit-smart-7688.h +++ b/include/configs/linkit-smart-7688.h @@ -40,9 +40,6 @@ /* RAM */ -/* Memory usage */ -#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) - /* Environment settings */ #endif /* __CONFIG_LINKIT_SMART_7688_H */ diff --git a/include/configs/malta.h b/include/configs/malta.h index 84e5f985b1a..225ed7cd5cd 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -37,7 +37,6 @@ #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 -#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) #define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) /* diff --git a/include/configs/mt7620.h b/include/configs/mt7620.h index 1c70deff70b..bcbc70b0945 100644 --- a/include/configs/mt7620.h +++ b/include/configs/mt7620.h @@ -10,8 +10,6 @@ #define CONFIG_SYS_MIPS_TIMER_FREQ 290000000 -#define CONFIG_SYS_BOOTPARAMS_LEN 0x20000 - #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 diff --git a/include/configs/mt7628.h b/include/configs/mt7628.h index 4f934ea40d0..efda683b4a7 100644 --- a/include/configs/mt7628.h +++ b/include/configs/mt7628.h @@ -10,8 +10,6 @@ #define CONFIG_SYS_MIPS_TIMER_FREQ 290000000 -#define CONFIG_SYS_BOOTPARAMS_LEN 0x20000 - #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_INIT_SP_OFFSET 0x80000 diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h index c18834c437d..10795df3761 100644 --- a/include/configs/pic32mzdask.h +++ b/include/configs/pic32mzdask.h @@ -28,7 +28,6 @@ /* SDRAM Configuration (for final code, data, stack, heap) */ #define CONFIG_SYS_SDRAM_BASE 0x88000000 -#define CONFIG_SYS_BOOTPARAMS_LEN (4 << 10) #define CONFIG_SYS_MONITOR_LEN (192 << 10) diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index e65ab72ca9c..a0ba0c2ea78 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -15,8 +15,6 @@ #define CONFIG_SPL_TARGET "spl/u-boot-spl.scif" #endif -#define CONFIG_SYS_BOOTPARAMS_LEN SZ_128K - /* boot option */ /* Generic Interrupt Controller Definitions */ diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index a56bc4e1540..b0a89734feb 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -73,7 +73,6 @@ #define CONFIG_SERIAL_BOOT #endif -#define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MONITOR_LEN (256 << 10) diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h index bdb77cfc2c7..daeaab80718 100644 --- a/include/configs/tplink_wdr4300.h +++ b/include/configs/tplink_wdr4300.h @@ -9,8 +9,6 @@ #define CONFIG_SYS_MHZ 280 #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) -#define CONFIG_SYS_BOOTPARAMS_LEN 0x20000 - #define CONFIG_SYS_SDRAM_BASE 0xa0000000 #define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000 diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h index b924b24c62c..af792c78ee2 100644 --- a/include/configs/vocore2.h +++ b/include/configs/vocore2.h @@ -33,9 +33,6 @@ /* RAM */ -/* Memory usage */ -#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) - /* Environment settings */ #endif //__VOCORE2_CONFIG_H__ diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h index 4218015c377..215b7592d2a 100644 --- a/include/configs/xtfpga.h +++ b/include/configs/xtfpga.h @@ -62,9 +62,6 @@ # define CONFIG_SYS_MONITOR_LEN 0x00040000 /* 256KB */ #endif -/* Linux boot param area in RAM (used only when booting linux) */ -#define CONFIG_SYS_BOOTPARAMS_LEN (64 << 10) - /* Memory test is destructive so default must not overlap vectors or U-Boot*/ /* Load address for stand-alone applications. -- GitLab From 12f613cf0e823b278917faf58643383bf309e668 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 12 May 2022 17:22:26 -0400 Subject: [PATCH 007/581] arm: omap2plus: Move CONFIG_SYS_PTV out of CONFIG namespace This is always defined to 2, and referenced in two places. Move the define to and make sure the code that uses this includes that file. Make not include that file, as we don't need to be doing so. Signed-off-by: Tom Rini --- arch/arm/include/asm/arch-omap4/clock.h | 1 - arch/arm/include/asm/arch-omap5/clock.h | 1 - arch/arm/include/asm/omap_common.h | 1 + arch/arm/mach-omap2/sata.c | 1 + arch/arm/mach-omap2/timer.c | 5 +++-- drivers/timer/omap-timer.c | 5 +++-- include/configs/bur_am335x_common.h | 1 - include/configs/nokia_rx51.h | 1 - include/configs/siemens-am33x-common.h | 1 - include/configs/sniper.h | 1 - include/configs/ti814x_evm.h | 1 - include/configs/ti816x_evm.h | 1 - include/configs/ti_armv7_common.h | 3 --- 13 files changed, 8 insertions(+), 15 deletions(-) diff --git a/arch/arm/include/asm/arch-omap4/clock.h b/arch/arm/include/asm/arch-omap4/clock.h index 0a626fe647a..4054dd8edcb 100644 --- a/arch/arm/include/asm/arch-omap4/clock.h +++ b/arch/arm/include/asm/arch-omap4/clock.h @@ -7,7 +7,6 @@ */ #ifndef _CLOCKS_OMAP4_H_ #define _CLOCKS_OMAP4_H_ -#include /* * Assuming a maximum of 1.5 GHz ARM speed and a minimum of 2 cycles per diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h index a00626e357c..b18ef459dec 100644 --- a/arch/arm/include/asm/arch-omap5/clock.h +++ b/arch/arm/include/asm/arch-omap5/clock.h @@ -8,7 +8,6 @@ */ #ifndef _CLOCKS_OMAP5_H_ #define _CLOCKS_OMAP5_H_ -#include /* * Assuming a maximum of 1.5 GHz ARM speed and a minimum of 2 cycles per diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index 264a2e717a7..17fdfbcffb7 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -13,6 +13,7 @@ #include #define NUM_SYS_CLKS 7 +#define SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ struct bd_info; diff --git a/arch/arm/mach-omap2/sata.c b/arch/arm/mach-omap2/sata.c index 4672dc534c5..53c39ce1fb6 100644 --- a/arch/arm/mach-omap2/sata.c +++ b/arch/arm/mach-omap2/sata.c @@ -13,6 +13,7 @@ #include #include #include +#include #include "pipe3-phy.h" static struct pipe3_dpll_map dpll_map_sata[] = { diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 82b10f6b248..00d91c10136 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -22,6 +22,7 @@ #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; @@ -33,7 +34,7 @@ static ulong get_timer_masked(void); * Nothing really to do with interrupts, just starts up a counter. */ -#define TIMER_CLOCK (V_SCLK / (2 << CONFIG_SYS_PTV)) +#define TIMER_CLOCK (V_SCLK / (2 << SYS_PTV)) #define TIMER_OVERFLOW_VAL 0xffffffff #define TIMER_LOAD_VAL 0 @@ -42,7 +43,7 @@ int timer_init(void) /* start the counter ticking up, reload value on overflow */ writel(TIMER_LOAD_VAL, &timer_base->tldr); /* enable timer */ - writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, + writel((SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, &timer_base->tclr); return 0; diff --git a/drivers/timer/omap-timer.c b/drivers/timer/omap-timer.c index 25a6108fef2..aa2e4360c1b 100644 --- a/drivers/timer/omap-timer.c +++ b/drivers/timer/omap-timer.c @@ -11,6 +11,7 @@ #include #include #include +#include #include /* Timer register bits */ @@ -61,13 +62,13 @@ static int omap_timer_probe(struct udevice *dev) if (!uc_priv->clock_rate) uc_priv->clock_rate = V_SCLK; - uc_priv->clock_rate /= (2 << CONFIG_SYS_PTV); + uc_priv->clock_rate /= (2 << SYS_PTV); /* start the counter ticking up, reload value on overflow */ writel(0, &priv->regs->tldr); writel(0, &priv->regs->tcrr); /* enable timer */ - writel((CONFIG_SYS_PTV << 2) | TCLR_PRE_EN | TCLR_AUTO_RELOAD | + writel((SYS_PTV << 2) | TCLR_PRE_EN | TCLR_AUTO_RELOAD | TCLR_START, &priv->regs->tclr); return 0; diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h index 5fc8ce622b1..1c3c86eb59f 100644 --- a/include/configs/bur_am335x_common.h +++ b/include/configs/bur_am335x_common.h @@ -24,7 +24,6 @@ #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ /* Timer information */ -#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ #include diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index f273e243e55..f33dd19ea36 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -153,7 +153,6 @@ * This rate is divided by a local divisor. */ #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ /* * Physical Memory Map diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 322fd24302f..2b4d05b7165 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -42,7 +42,6 @@ GENERATED_GBL_DATA_SIZE) /* Platform/Board specific defs */ #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ -#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ /* NS16550 Configuration */ #define CONFIG_SYS_NS16550_SERIAL diff --git a/include/configs/sniper.h b/include/configs/sniper.h index 2a2609d9668..2daaadd3146 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -16,7 +16,6 @@ */ #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 -#define CONFIG_SYS_PTV 2 #define V_NS16550_CLK 48000000 #define V_OSCK 26000000 diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index 3ce2c1fdc0a..ff5bbad90e7 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -77,7 +77,6 @@ * Platform/Board specific defs */ #define CONFIG_SYS_TIMERBASE 0x4802E000 -#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ /* NS16550 Configuration */ #define CONFIG_SYS_NS16550_SERIAL diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index c2dfdebcd5b..ba3bc43aa0e 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -28,7 +28,6 @@ * Platform/Board specific defs */ #define CONFIG_SYS_TIMERBASE 0x4802E000 -#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ /* * NS16550 Configuration diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index 90dfb1feeb7..cd136f696a4 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -71,9 +71,6 @@ GENERATED_GBL_DATA_SIZE) #endif -/* Timer information. */ -#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ - /* If DM_I2C, enable non-DM I2C support */ /* -- GitLab From a581eba01d9acdaa73457a9bbbf30f518780dc97 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 12 May 2022 17:35:40 -0400 Subject: [PATCH 008/581] spl: Remove CONFIG_SPL_BOARD_LOAD_IMAGE This symbol has been unused in code for some time now, remove the final references. Signed-off-by: Tom Rini --- arch/sandbox/include/asm/spl.h | 2 -- arch/x86/include/asm/spl.h | 2 -- include/configs/chromebook_link.h | 2 -- include/configs/qemu-x86.h | 2 -- 4 files changed, 8 deletions(-) diff --git a/arch/sandbox/include/asm/spl.h b/arch/sandbox/include/asm/spl.h index d25dc7c82a0..bf5a585622b 100644 --- a/arch/sandbox/include/asm/spl.h +++ b/arch/sandbox/include/asm/spl.h @@ -6,8 +6,6 @@ #ifndef __asm_spl_h #define __asm_spl_h -#define CONFIG_SPL_BOARD_LOAD_IMAGE - enum { BOOT_DEVICE_BOARD, }; diff --git a/arch/x86/include/asm/spl.h b/arch/x86/include/asm/spl.h index cc6cac08f23..483cf702cbb 100644 --- a/arch/x86/include/asm/spl.h +++ b/arch/x86/include/asm/spl.h @@ -7,8 +7,6 @@ #ifndef __asm_spl_h #define __asm_spl_h -#define CONFIG_SPL_BOARD_LOAD_IMAGE - enum { BOOT_DEVICE_SPI_MMAP = 10, BOOT_DEVICE_FAST_SPI, diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h index 96d5cf1a338..0787359674d 100644 --- a/include/configs/chromebook_link.h +++ b/include/configs/chromebook_link.h @@ -15,6 +15,4 @@ #include #include -#define CONFIG_SPL_BOARD_LOAD_IMAGE - #endif /* __CONFIG_H */ diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h index e9dbd54517f..ba843e35a40 100644 --- a/include/configs/qemu-x86.h +++ b/include/configs/qemu-x86.h @@ -34,6 +34,4 @@ * - AHCI controller is supported for QEMU '-M q35' target */ -#define CONFIG_SPL_BOARD_LOAD_IMAGE - #endif /* __CONFIG_H */ -- GitLab From 2179dc085d7b7f2e71cdaa1ff73b21a0ef0b8b5d Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 13 May 2022 12:14:07 -0400 Subject: [PATCH 009/581] P1010RDB: Remove CONFIG_SPL_NAND_MINIMAL This symbol is not used anywhere, remove it. Signed-off-by: Tom Rini --- include/configs/P1010RDB.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 0c19b92940e..0c4a2f01ad4 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -75,7 +75,6 @@ #define CONFIG_SYS_NAND_U_BOOT_START (0x11000000) #elif defined(CONFIG_SPL_BUILD) #define CONFIG_SPL_INIT_MINIMAL -#define CONFIG_SPL_NAND_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_MAX_SIZE 8192 #define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10) -- GitLab From aa473e70ac2de96135d14cd6720f4a61c0328d0d Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 13 May 2022 12:42:13 -0400 Subject: [PATCH 010/581] fsl-layerscape: Remove CONFIG_SPL_PBL_PAD This option is not referenced in code, remove it. Signed-off-by: Tom Rini --- include/configs/ls1043a_common.h | 1 - include/configs/ls1046a_common.h | 2 -- 2 files changed, 3 deletions(-) diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 7457dad8668..0b54c52b4f2 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -78,7 +78,6 @@ /* NAND SPL */ #ifdef CONFIG_NAND_BOOT -#define CONFIG_SPL_PBL_PAD #define CONFIG_SPL_MAX_SIZE 0x1a000 #define CONFIG_SPL_STACK 0x1001d000 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 000f19a73e2..21830c0bda9 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -89,8 +89,6 @@ /* NAND SPL */ #ifdef CONFIG_NAND_BOOT -#define CONFIG_SPL_PBL_PAD - #define CONFIG_SPL_MAX_SIZE 0x17000 /* 90 KiB */ #define CONFIG_SPL_STACK 0x1001f000 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE -- GitLab From d498c670541a010899b25f9653713a804575606e Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 13 May 2022 13:37:30 -0400 Subject: [PATCH 011/581] spl: Remove CONFIG_SPL_SATA_BOOT_DEVICE This is only referenced in non-SPL_DM cases, of which there are currently none. Remove this option and slightly re-organize the code is there is now never an if/else at the start of spl_sata_load_image() Signed-off-by: Tom Rini --- common/spl/spl_sata.c | 20 +++++--------------- include/configs/imx6_spl.h | 1 - 2 files changed, 5 insertions(+), 16 deletions(-) diff --git a/common/spl/spl_sata.c b/common/spl/spl_sata.c index 1f3a144cdfb..d03f86344e0 100644 --- a/common/spl/spl_sata.c +++ b/common/spl/spl_sata.c @@ -73,21 +73,11 @@ static int spl_sata_load_image(struct spl_image_info *spl_image, int err = 0; struct blk_desc *stor_dev; -#if !defined(CONFIG_DM_SCSI) && !defined(CONFIG_AHCI) - err = init_sata(CONFIG_SPL_SATA_BOOT_DEVICE); -#endif - if (err) { -#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT - printf("spl: sata init failed: err - %d\n", err); -#endif - return err; - } else { - /* try to recognize storage devices immediately */ - scsi_scan(false); - stor_dev = blk_get_devnum_by_type(IF_TYPE_SCSI, 0); - if (!stor_dev) - return -ENODEV; - } + /* try to recognize storage devices immediately */ + scsi_scan(false); + stor_dev = blk_get_devnum_by_type(IF_TYPE_SCSI, 0); + if (!stor_dev) + return -ENODEV; #if CONFIG_IS_ENABLED(OS_BOOT) if (spl_start_uboot() || diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h index 234aacb3b91..7215bda973f 100644 --- a/include/configs/imx6_spl.h +++ b/include/configs/imx6_spl.h @@ -60,7 +60,6 @@ /* SATA support */ #if defined(CONFIG_SPL_SATA) -#define CONFIG_SPL_SATA_BOOT_DEVICE 0 #define CONFIG_SYS_SATA_FAT_BOOT_PARTITION 1 #endif -- GitLab From 2f57139c211d193debddd25f45c02b738cefd871 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 13 May 2022 09:18:27 -0400 Subject: [PATCH 012/581] Convert CONFIG_SYS_FLASH_CFI_WIDTH to Kconfig This converts the following to Kconfig: CONFIG_SYS_FLASH_CFI_WIDTH Signed-off-by: Tom Rini --- configs/M5208EVBE_defconfig | 1 + configs/M5235EVB_Flash32_defconfig | 1 + configs/M5235EVB_defconfig | 1 + configs/M5249EVB_defconfig | 1 + configs/M5272C3_defconfig | 1 + configs/M5282EVB_defconfig | 1 + configs/M53017EVB_defconfig | 1 + configs/M5329AFEE_defconfig | 1 + configs/M5329BFEE_defconfig | 1 + configs/M5373EVB_defconfig | 1 + configs/ae350_rv32_defconfig | 1 + configs/ae350_rv32_spl_defconfig | 1 + configs/ae350_rv32_spl_xip_defconfig | 1 + configs/ae350_rv32_xip_defconfig | 1 + configs/ae350_rv64_defconfig | 1 + configs/ae350_rv64_spl_defconfig | 1 + configs/ae350_rv64_spl_xip_defconfig | 1 + configs/ae350_rv64_xip_defconfig | 1 + configs/blanche_defconfig | 1 + configs/eb_cpu5282_defconfig | 1 + configs/eb_cpu5282_internal_defconfig | 1 + configs/kzm9g_defconfig | 1 + configs/mccmon6_nor_defconfig | 1 + configs/mccmon6_sd_defconfig | 1 + configs/omap35_logic_somlv_defconfig | 1 + configs/omap3_logic_somlv_defconfig | 1 + configs/r8a77990_ebisu_defconfig | 1 + configs/r8a77995_draak_defconfig | 1 + configs/rcar3_salvator-x_defconfig | 1 + configs/rcar3_ulcb_defconfig | 1 + configs/total_compute_defconfig | 1 + configs/vexpress_aemv8a_juno_defconfig | 1 + configs/vexpress_aemv8a_semi_defconfig | 1 + configs/xtfpga_defconfig | 1 + drivers/mtd/Kconfig | 29 ++++++++++++++++++++++++++ drivers/mtd/cfi_flash.c | 7 ------- include/configs/M5208EVBE.h | 1 - include/configs/M5235EVB.h | 5 ----- include/configs/M5249EVB.h | 1 - include/configs/M5253DEMO.h | 1 - include/configs/M5272C3.h | 1 - include/configs/M5282EVB.h | 1 - include/configs/M53017EVB.h | 1 - include/configs/M5329EVB.h | 1 - include/configs/M5373EVB.h | 1 - include/configs/am335x_evm.h | 1 - include/configs/armadillo-800eva.h | 1 - include/configs/ax25-ae350.h | 1 - include/configs/blanche.h | 1 - include/configs/dra7xx_evm.h | 1 - include/configs/draak.h | 1 - include/configs/eb_cpu5282.h | 1 - include/configs/ebisu.h | 1 - include/configs/ids8313.h | 1 - include/configs/kzm9g.h | 1 - include/configs/mccmon6.h | 1 - include/configs/mx6sabreauto.h | 1 - include/configs/octeon_ebb7304.h | 1 - include/configs/omap3_logic.h | 1 - include/configs/salvator-x.h | 1 - include/configs/total_compute.h | 2 -- include/configs/ulcb.h | 1 - include/configs/vexpress_aemv8.h | 2 -- include/configs/xtfpga.h | 1 - 64 files changed, 63 insertions(+), 41 deletions(-) diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig index 757792f9b0f..4ab888f59ed 100644 --- a/configs/M5208EVBE_defconfig +++ b/configs/M5208EVBE_defconfig @@ -34,6 +34,7 @@ CONFIG_SYS_I2C_SLAVE=0x7F CONFIG_SYS_I2C_SPEED=80000 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_DM_ETH=y diff --git a/configs/M5235EVB_Flash32_defconfig b/configs/M5235EVB_Flash32_defconfig index 1ed127ca3c2..2a799627841 100644 --- a/configs/M5235EVB_Flash32_defconfig +++ b/configs/M5235EVB_Flash32_defconfig @@ -41,6 +41,7 @@ CONFIG_SYS_I2C_SLAVE=0x7F CONFIG_SYS_I2C_SPEED=80000 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI_WIDTH_32BIT=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_DM_ETH=y diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig index fed386c164a..5eeed2d2f31 100644 --- a/configs/M5235EVB_defconfig +++ b/configs/M5235EVB_defconfig @@ -41,6 +41,7 @@ CONFIG_SYS_I2C_SLAVE=0x7F CONFIG_SYS_I2C_SPEED=80000 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_DM_ETH=y diff --git a/configs/M5249EVB_defconfig b/configs/M5249EVB_defconfig index 171df12564f..f99375b535e 100644 --- a/configs/M5249EVB_defconfig +++ b/configs/M5249EVB_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_MCFUART=y diff --git a/configs/M5272C3_defconfig b/configs/M5272C3_defconfig index 376fb425306..e3f736bf630 100644 --- a/configs/M5272C3_defconfig +++ b/configs/M5272C3_defconfig @@ -54,6 +54,7 @@ CONFIG_SYS_BR7_PRELIM=0x701 CONFIG_SYS_OR7_PRELIM=0xFFC0007C CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_DM_ETH=y diff --git a/configs/M5282EVB_defconfig b/configs/M5282EVB_defconfig index 8f38710b074..42940e1000a 100644 --- a/configs/M5282EVB_defconfig +++ b/configs/M5282EVB_defconfig @@ -30,6 +30,7 @@ CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_DM_ETH=y diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig index 246bc8a3bed..901a15d5061 100644 --- a/configs/M53017EVB_defconfig +++ b/configs/M53017EVB_defconfig @@ -36,6 +36,7 @@ CONFIG_SYS_I2C_SLAVE=0x7F CONFIG_SYS_I2C_SPEED=80000 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig index 3536b4432de..0bce9d8f422 100644 --- a/configs/M5329AFEE_defconfig +++ b/configs/M5329AFEE_defconfig @@ -36,6 +36,7 @@ CONFIG_SYS_I2C_SPEED=80000 CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_DM_ETH=y diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig index a020775c87d..efc7733b44c 100644 --- a/configs/M5329BFEE_defconfig +++ b/configs/M5329BFEE_defconfig @@ -37,6 +37,7 @@ CONFIG_SYS_I2C_SPEED=80000 CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig index b008b91fdd5..920a86fa9aa 100644 --- a/configs/M5373EVB_defconfig +++ b/configs/M5373EVB_defconfig @@ -37,6 +37,7 @@ CONFIG_SYS_I2C_SPEED=80000 CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig index 9c1fe568964..340ec49c461 100644 --- a/configs/ae350_rv32_defconfig +++ b/configs/ae350_rv32_defconfig @@ -29,6 +29,7 @@ CONFIG_FTSDC010=y CONFIG_FTSDC010_SDIO=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig index 502701f35c8..fffae6f5af0 100644 --- a/configs/ae350_rv32_spl_defconfig +++ b/configs/ae350_rv32_spl_defconfig @@ -33,6 +33,7 @@ CONFIG_FTSDC010=y CONFIG_FTSDC010_SDIO=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig index 8291a698218..20acfadefed 100644 --- a/configs/ae350_rv32_spl_xip_defconfig +++ b/configs/ae350_rv32_spl_xip_defconfig @@ -35,6 +35,7 @@ CONFIG_FTSDC010=y CONFIG_FTSDC010_SDIO=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/ae350_rv32_xip_defconfig b/configs/ae350_rv32_xip_defconfig index 62fb51baad4..16ff634d15a 100644 --- a/configs/ae350_rv32_xip_defconfig +++ b/configs/ae350_rv32_xip_defconfig @@ -30,6 +30,7 @@ CONFIG_FTSDC010=y CONFIG_FTSDC010_SDIO=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig index 681c40fd770..ba525c98c2a 100644 --- a/configs/ae350_rv64_defconfig +++ b/configs/ae350_rv64_defconfig @@ -30,6 +30,7 @@ CONFIG_FTSDC010=y CONFIG_FTSDC010_SDIO=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig index 8da4786d7a5..2580bda17f4 100644 --- a/configs/ae350_rv64_spl_defconfig +++ b/configs/ae350_rv64_spl_defconfig @@ -34,6 +34,7 @@ CONFIG_FTSDC010=y CONFIG_FTSDC010_SDIO=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig index e2022e7ec25..d8fe93f1f8c 100644 --- a/configs/ae350_rv64_spl_xip_defconfig +++ b/configs/ae350_rv64_spl_xip_defconfig @@ -36,6 +36,7 @@ CONFIG_FTSDC010=y CONFIG_FTSDC010_SDIO=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/ae350_rv64_xip_defconfig b/configs/ae350_rv64_xip_defconfig index b5bdf94dafb..49511ab1549 100644 --- a/configs/ae350_rv64_xip_defconfig +++ b/configs/ae350_rv64_xip_defconfig @@ -31,6 +31,7 @@ CONFIG_FTSDC010=y CONFIG_FTSDC010_SDIO=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/blanche_defconfig b/configs/blanche_defconfig index 01e9ea37222..f4bb406be3c 100644 --- a/configs/blanche_defconfig +++ b/configs/blanche_defconfig @@ -55,6 +55,7 @@ CONFIG_RENESAS_SDHI=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_CFI=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/eb_cpu5282_defconfig b/configs/eb_cpu5282_defconfig index d634280de5d..4cf03abc61e 100644 --- a/configs/eb_cpu5282_defconfig +++ b/configs/eb_cpu5282_defconfig @@ -45,6 +45,7 @@ CONFIG_LED_STATUS_BOOT=0 CONFIG_LED_STATUS_CMD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_DM_ETH=y diff --git a/configs/eb_cpu5282_internal_defconfig b/configs/eb_cpu5282_internal_defconfig index a726fdb56e3..11785158469 100644 --- a/configs/eb_cpu5282_internal_defconfig +++ b/configs/eb_cpu5282_internal_defconfig @@ -43,6 +43,7 @@ CONFIG_LED_STATUS_BOOT=0 CONFIG_LED_STATUS_CMD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_DM_ETH=y diff --git a/configs/kzm9g_defconfig b/configs/kzm9g_defconfig index 779f0d9ed89..9a944cad39c 100644 --- a/configs/kzm9g_defconfig +++ b/configs/kzm9g_defconfig @@ -36,6 +36,7 @@ CONFIG_SYS_I2C_SH=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_SYS_FLASH_CFI=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0x10000000 diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig index e837b391ebc..3718d08b670 100644 --- a/configs/mccmon6_nor_defconfig +++ b/configs/mccmon6_nor_defconfig @@ -60,6 +60,7 @@ CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig index 0f17ccdc85d..3228050dd20 100644 --- a/configs/mccmon6_sd_defconfig +++ b/configs/mccmon6_sd_defconfig @@ -58,6 +58,7 @@ CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/omap35_logic_somlv_defconfig b/configs/omap35_logic_somlv_defconfig index 5db671d694e..ffb0e28569a 100644 --- a/configs/omap35_logic_somlv_defconfig +++ b/configs/omap35_logic_somlv_defconfig @@ -62,6 +62,7 @@ CONFIG_MMC_OMAP_HS=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/omap3_logic_somlv_defconfig b/configs/omap3_logic_somlv_defconfig index 2c5d60d164a..b49734666d7 100644 --- a/configs/omap3_logic_somlv_defconfig +++ b/configs/omap3_logic_somlv_defconfig @@ -63,6 +63,7 @@ CONFIG_MMC_OMAP36XX_PINS=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig index 7ba55737d84..3fd65e97c44 100644 --- a/configs/r8a77990_ebisu_defconfig +++ b/configs/r8a77990_ebisu_defconfig @@ -72,6 +72,7 @@ CONFIG_RENESAS_SDHI=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_CFI_FLASH=y CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_FLASH_CFI_MTD=y diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig index e2a7e5f636d..ee0f6151317 100644 --- a/configs/r8a77995_draak_defconfig +++ b/configs/r8a77995_draak_defconfig @@ -66,6 +66,7 @@ CONFIG_RENESAS_SDHI=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_CFI_FLASH=y CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_FLASH_CFI_MTD=y diff --git a/configs/rcar3_salvator-x_defconfig b/configs/rcar3_salvator-x_defconfig index 7bcbb3a1339..7263b32101d 100644 --- a/configs/rcar3_salvator-x_defconfig +++ b/configs/rcar3_salvator-x_defconfig @@ -75,6 +75,7 @@ CONFIG_RENESAS_SDHI=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_CFI_FLASH=y CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_FLASH_CFI_MTD=y diff --git a/configs/rcar3_ulcb_defconfig b/configs/rcar3_ulcb_defconfig index c953299c0d0..052465c8d7a 100644 --- a/configs/rcar3_ulcb_defconfig +++ b/configs/rcar3_ulcb_defconfig @@ -74,6 +74,7 @@ CONFIG_RENESAS_SDHI=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_CFI_FLASH=y CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_FLASH_CFI_MTD=y diff --git a/configs/total_compute_defconfig b/configs/total_compute_defconfig index 1a674de8157..e0f76b711b3 100644 --- a/configs/total_compute_defconfig +++ b/configs/total_compute_defconfig @@ -49,6 +49,7 @@ CONFIG_ARM_PL180_MMCI=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI_WIDTH_32BIT=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig index 688cecb7632..fdfcf3b4960 100644 --- a/configs/vexpress_aemv8a_juno_defconfig +++ b/configs/vexpress_aemv8a_juno_defconfig @@ -26,6 +26,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_UBI=y # CONFIG_MMC is not set CONFIG_MTD=y +CONFIG_SYS_FLASH_CFI_WIDTH_32BIT=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig index 95412d24eea..0ae8ae10a31 100644 --- a/configs/vexpress_aemv8a_semi_defconfig +++ b/configs/vexpress_aemv8a_semi_defconfig @@ -25,6 +25,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_UBI=y # CONFIG_MMC is not set CONFIG_MTD=y +CONFIG_SYS_FLASH_CFI_WIDTH_32BIT=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/xtfpga_defconfig b/configs/xtfpga_defconfig index e98af5ec7e6..eab40fc0d13 100644 --- a/configs/xtfpga_defconfig +++ b/configs/xtfpga_defconfig @@ -38,6 +38,7 @@ CONFIG_DM=y # CONFIG_DM_SEQ_ALIAS is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_PHYLIB=y diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index 4088267dd11..c3f5455347e 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -48,6 +48,35 @@ config FLASH_CFI_DRIVER option. Visit for more information on CFI. +choice + prompt "Data-width of the flash device" + depends on FLASH_CFI_DRIVER + default SYS_FLASH_CFI_WIDTH_8BIT + +config SYS_FLASH_CFI_WIDTH_8BIT + bool "Data-width of the device is 8-bit" + +config SYS_FLASH_CFI_WIDTH_16BIT + bool "Data-width of the device is 16-bit" + +config SYS_FLASH_CFI_WIDTH_32BIT + bool "Data-width of the device is 32-bit" + +config SYS_FLASH_CFI_WIDTH_64BIT + bool "Data-width of the device is 64-bit" + +endchoice + +config SYS_FLASH_CFI_WIDTH + hex + depends on FLASH_CFI_DRIVER + default 0x1 if SYS_FLASH_CFI_WIDTH_8BIT + default 0x2 if SYS_FLASH_CFI_WIDTH_16BIT + default 0x4 if SYS_FLASH_CFI_WIDTH_32BIT + default 0x8 if SYS_FLASH_CFI_WIDTH_64BIT + help + This must be kept in sync with the table in include/flash.h + config CFI_FLASH bool "Enable Driver Model for CFI Flash driver" depends on DM_MTD diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index aae3ea0d1b4..49504107065 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -68,13 +68,6 @@ static uint flash_verbose = 1; flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */ -/* - * Check if chip width is defined. If not, start detecting with 8bit. - */ -#ifndef CONFIG_SYS_FLASH_CFI_WIDTH -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT -#endif - #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define __maybe_weak __weak #else diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index 135dec0ebb4..4ca71ad41ba 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -94,7 +94,6 @@ /* FLASH organization */ #ifdef CONFIG_SYS_FLASH_CFI # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ -# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_SECT 254 /* max number of sectors on one chip */ #endif diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 88f5f155633..68b695c6fbb 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -102,11 +102,6 @@ */ #ifdef CONFIG_SYS_FLASH_CFI # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ -#ifdef CONFIG_NORFLASH_PS32BIT -# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT -#else -# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -#endif # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ #endif diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index 1a604f5c81e..64eae702160 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -79,7 +79,6 @@ #ifdef CONFIG_SYS_FLASH_CFI # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ -# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ # define CONFIG_SYS_FLASH_CHECKSUM # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index 0a416dc1226..e81768441ec 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -115,7 +115,6 @@ * 0x30 is block erase in SST */ # define CONFIG_SYS_FLASH_SIZE 0x800000 -# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_FLASH_CFI_LEGACY #else # define CONFIG_SYS_SST_SECT 2048 diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index 6b4028c17ca..bd4c531751e 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -102,7 +102,6 @@ */ #ifdef CONFIG_SYS_FLASH_CFI # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ -# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ #endif diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index fe04a70b61e..c0358ccc526 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -106,7 +106,6 @@ #ifdef CONFIG_SYS_FLASH_CFI # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ -# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ # define CONFIG_SYS_FLASH_CHECKSUM # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index 9b84d3693a3..15173d49b00 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -111,7 +111,6 @@ #ifdef CONFIG_SYS_FLASH_CFI # define CONFIG_FLASH_SPANSION_S29WS_N 1 # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ -# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ #endif diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index 7e65f9914f4..06c023b3ad6 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -106,7 +106,6 @@ */ #ifdef CONFIG_SYS_FLASH_CFI # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ -# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ #endif diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index b131aefd6dd..6b2d60fac84 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -108,7 +108,6 @@ */ #ifdef CONFIG_SYS_FLASH_CFI # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ -# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ #endif diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index fd5b209a52d..78b359dcea9 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -241,7 +241,6 @@ #if defined(CONFIG_NOR) #define CONFIG_SYS_MAX_FLASH_SECT 128 #define CONFIG_SYS_FLASH_BASE (0x08000000) -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_FLASH_SIZE 0x01000000 #endif /* NOR support */ diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h index 44af5b44bad..e7d685a657e 100644 --- a/include/configs/armadillo-800eva.h +++ b/include/configs/armadillo-800eva.h @@ -47,7 +47,6 @@ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* FLASH */ -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_FLASH_BASE 0x00000000 #define CONFIG_SYS_MAX_FLASH_SECT 512 #define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) } diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index 633be8f6141..03fe9469bf1 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -58,7 +58,6 @@ /* use CFI framework */ -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* support JEDEC */ diff --git a/include/configs/blanche.h b/include/configs/blanche.h index 4f8da594043..d0f37b6cc20 100644 --- a/include/configs/blanche.h +++ b/include/configs/blanche.h @@ -28,7 +28,6 @@ #if !defined(CONFIG_MTD_NOR_FLASH) #define CONFIG_SH_QSPI_BASE 0xE6B10000 #else -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_BASE 0x00000000 #define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MB */ diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index e16af8824b4..9f685b19879 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -95,7 +95,6 @@ #if defined(CONFIG_NOR) /* NOR: device related configs */ #define CONFIG_SYS_MAX_FLASH_SECT 512 -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_FLASH_SIZE (64 * 1024 * 1024) /* 64 MB */ #define CONFIG_SYS_FLASH_BASE (0x08000000) /* Reduce SPL size by removing unlikey targets */ diff --git a/include/configs/draak.h b/include/configs/draak.h index 476b4c3710a..a38e4863483 100644 --- a/include/configs/draak.h +++ b/include/configs/draak.h @@ -15,7 +15,6 @@ #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_MAX_FLASH_SECT 256 #define CONFIG_SYS_WRITE_SWAPPED_DATA diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 70ee288aa72..cbc29ddb518 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -102,7 +102,6 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 10000000 #define CONFIG_SYS_FLASH_SIZE 16*1024*1024 -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } diff --git a/include/configs/ebisu.h b/include/configs/ebisu.h index 3adc4180efd..3dc111f5248 100644 --- a/include/configs/ebisu.h +++ b/include/configs/ebisu.h @@ -18,7 +18,6 @@ #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_MAX_FLASH_SECT 256 #define CONFIG_SYS_WRITE_SWAPPED_DATA diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h index 3fd441e30ba..d5c9489bce6 100644 --- a/include/configs/ids8313.h +++ b/include/configs/ids8313.h @@ -108,7 +108,6 @@ /* * NOR FLASH setup */ -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT #define CONFIG_FLASH_SHOW_PROGRESS 50 #define CONFIG_SYS_FLASH_BASE 0xFF800000 diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h index 2ea8b82dd09..442505adaa1 100644 --- a/include/configs/kzm9g.h +++ b/include/configs/kzm9g.h @@ -19,7 +19,6 @@ /* NOR Flash */ #define KZM_FLASH_BASE (0x00000000) #define CONFIG_SYS_FLASH_BASE (KZM_FLASH_BASE) -#define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT) #define CONFIG_SYS_MAX_FLASH_SECT (512) /* prompt */ diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index dcce52eb7d3..f24a0072417 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -31,7 +31,6 @@ /* NOR 16-bit mode */ #define CONFIG_SYS_FLASH_BASE WEIM_ARB_BASE_ADDR -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_FLASH_VERIFY diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h index a212652fd7f..4537fce19de 100644 --- a/include/configs/mx6sabreauto.h +++ b/include/configs/mx6sabreauto.h @@ -42,7 +42,6 @@ #define CONFIG_SYS_FLASH_SECT_SIZE (128 * 1024) #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #endif #define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/octeon_ebb7304.h b/include/configs/octeon_ebb7304.h index 8c6c57bd546..7035e631342 100644 --- a/include/configs/octeon_ebb7304.h +++ b/include/configs/octeon_ebb7304.h @@ -13,7 +13,6 @@ * CFI flash */ #define CONFIG_SYS_MAX_FLASH_SECT 256 -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index d3839eb1229..4112e5570f6 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -154,7 +154,6 @@ #endif #define CONFIG_SYS_MAX_FLASH_SECT 256 -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_FLASH_SIZE 0x4000000 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ diff --git a/include/configs/salvator-x.h b/include/configs/salvator-x.h index eb00e2b004b..4b0f20e89b7 100644 --- a/include/configs/salvator-x.h +++ b/include/configs/salvator-x.h @@ -16,7 +16,6 @@ #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_MAX_FLASH_SECT 256 #define CONFIG_SYS_WRITE_SWAPPED_DATA diff --git a/include/configs/total_compute.h b/include/configs/total_compute.h index 7ab79261361..c0495b7e153 100644 --- a/include/configs/total_compute.h +++ b/include/configs/total_compute.h @@ -50,8 +50,6 @@ /* 256 x 256KiB sectors */ #define CONFIG_SYS_MAX_FLASH_SECT 256 -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT - #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ #define FLASH_MAX_SECTOR_SIZE 0x00040000 diff --git a/include/configs/ulcb.h b/include/configs/ulcb.h index 14ea40bee3e..578873295fb 100644 --- a/include/configs/ulcb.h +++ b/include/configs/ulcb.h @@ -16,7 +16,6 @@ #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_MAX_FLASH_SECT 256 #define CONFIG_SYS_WRITE_SWAPPED_DATA diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index df76b9a5612..904ed8df0be 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -276,8 +276,6 @@ /* Store environment at top of flash */ #endif -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT - #ifdef CONFIG_USB_EHCI_HCD #define CONFIG_USB_OHCI_NEW #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h index 215b7592d2a..7392582b5e4 100644 --- a/include/configs/xtfpga.h +++ b/include/configs/xtfpga.h @@ -170,7 +170,6 @@ /* Flash & Environment */ /*=====================*/ -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #ifdef CONFIG_XTFPGA_LX60 # define CONFIG_SYS_FLASH_SIZE 0x0040000 /* 4MB */ # define CONFIG_SYS_FLASH_SECT_SZ 0x10000 /* block size 64KB */ -- GitLab From e2475141bde98b8da61e109e82d22be5e99a725b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 13 May 2022 09:36:03 -0400 Subject: [PATCH 013/581] Convert CONFIG_SYS_CFI_FLASH_STATUS_POLL to Kconfig This converts the following to Kconfig: CONFIG_SYS_CFI_FLASH_STATUS_POLL Signed-off-by: Tom Rini --- configs/3c120_defconfig | 1 + configs/ae350_rv32_defconfig | 1 + configs/ae350_rv32_spl_defconfig | 1 + configs/ae350_rv32_spl_xip_defconfig | 1 + configs/ae350_rv32_xip_defconfig | 1 + configs/ae350_rv64_defconfig | 1 + configs/ae350_rv64_spl_defconfig | 1 + configs/ae350_rv64_spl_xip_defconfig | 1 + configs/ae350_rv64_xip_defconfig | 1 + drivers/mtd/Kconfig | 4 ++++ include/configs/3c120_devboard.h | 1 - include/configs/ax25-ae350.h | 4 ---- 12 files changed, 13 insertions(+), 5 deletions(-) diff --git a/configs/3c120_defconfig b/configs/3c120_defconfig index 617b25a375b..f266c0e5e41 100644 --- a/configs/3c120_defconfig +++ b/configs/3c120_defconfig @@ -39,6 +39,7 @@ CONFIG_ALTERA_SYSID=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y +CONFIG_SYS_CFI_FLASH_STATUS_POLL=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig index 340ec49c461..714a7075913 100644 --- a/configs/ae350_rv32_defconfig +++ b/configs/ae350_rv32_defconfig @@ -31,6 +31,7 @@ CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_CFI_FLASH=y +CONFIG_SYS_CFI_FLASH_STATUS_POLL=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig index fffae6f5af0..17e8fb730ab 100644 --- a/configs/ae350_rv32_spl_defconfig +++ b/configs/ae350_rv32_spl_defconfig @@ -34,6 +34,7 @@ CONFIG_FTSDC010_SDIO=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y +CONFIG_SYS_CFI_FLASH_STATUS_POLL=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig index 20acfadefed..bd8b05879d7 100644 --- a/configs/ae350_rv32_spl_xip_defconfig +++ b/configs/ae350_rv32_spl_xip_defconfig @@ -36,6 +36,7 @@ CONFIG_FTSDC010_SDIO=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y +CONFIG_SYS_CFI_FLASH_STATUS_POLL=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/ae350_rv32_xip_defconfig b/configs/ae350_rv32_xip_defconfig index 16ff634d15a..f0b842f35ed 100644 --- a/configs/ae350_rv32_xip_defconfig +++ b/configs/ae350_rv32_xip_defconfig @@ -32,6 +32,7 @@ CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_CFI_FLASH=y +CONFIG_SYS_CFI_FLASH_STATUS_POLL=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig index ba525c98c2a..5425255a700 100644 --- a/configs/ae350_rv64_defconfig +++ b/configs/ae350_rv64_defconfig @@ -32,6 +32,7 @@ CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_CFI_FLASH=y +CONFIG_SYS_CFI_FLASH_STATUS_POLL=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig index 2580bda17f4..8c23ebaf211 100644 --- a/configs/ae350_rv64_spl_defconfig +++ b/configs/ae350_rv64_spl_defconfig @@ -35,6 +35,7 @@ CONFIG_FTSDC010_SDIO=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y +CONFIG_SYS_CFI_FLASH_STATUS_POLL=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig index d8fe93f1f8c..65b1686c4ef 100644 --- a/configs/ae350_rv64_spl_xip_defconfig +++ b/configs/ae350_rv64_spl_xip_defconfig @@ -37,6 +37,7 @@ CONFIG_FTSDC010_SDIO=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y +CONFIG_SYS_CFI_FLASH_STATUS_POLL=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/ae350_rv64_xip_defconfig b/configs/ae350_rv64_xip_defconfig index 49511ab1549..d4b2e638b29 100644 --- a/configs/ae350_rv64_xip_defconfig +++ b/configs/ae350_rv64_xip_defconfig @@ -33,6 +33,7 @@ CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y CONFIG_CFI_FLASH=y +CONFIG_SYS_CFI_FLASH_STATUS_POLL=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index c3f5455347e..d0ab7c18c64 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -96,6 +96,10 @@ config CFI_FLASH_USE_WEAK_ACCESSORS Enable this option to allow for the flash_{read,write}{8,16,32,64} functions to be overridden by the platform. +config SYS_CFI_FLASH_STATUS_POLL + bool "Poll status on AMD flash chips" + depends on FLASH_CFI_DRIVER + config SYS_FLASH_USE_BUFFER_WRITE bool "Enable buffered writes to flash" depends on FLASH_CFI_DRIVER diff --git a/include/configs/3c120_devboard.h b/include/configs/3c120_devboard.h index 9db0f0efb15..2d52dc6f660 100644 --- a/include/configs/3c120_devboard.h +++ b/include/configs/3c120_devboard.h @@ -19,7 +19,6 @@ /* * CFI Flash */ -#define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* fix amd flash issue */ #define CONFIG_SYS_MAX_FLASH_SECT 512 /* diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index 03fe9469bf1..264d708fa9f 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -56,10 +56,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000000 - \ GENERATED_GBL_DATA_SIZE) -/* use CFI framework */ - -#define CONFIG_SYS_CFI_FLASH_STATUS_POLL - /* support JEDEC */ #define PHYS_FLASH_1 0x88000000 /* BANK 0 */ #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 -- GitLab From b35316fb67cb7aeaf022032ce078135251372f39 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 13 May 2022 12:26:35 -0400 Subject: [PATCH 014/581] Convert CONFIG_SPL_INIT_MINIMAL et al to Kconfig This converts the following to Kconfig: CONFIG_SPL_INIT_MINIMAL CONFIG_SPL_FLUSH_IMAGE CONFIG_SPL_SKIP_RELOCATE Signed-off-by: Tom Rini --- README | 6 ------ arch/powerpc/cpu/mpc83xx/Makefile | 2 ++ arch/powerpc/cpu/mpc83xx/start.S | 2 +- arch/powerpc/cpu/mpc85xx/Makefile | 2 ++ arch/powerpc/cpu/mpc85xx/cpu_init_early.c | 2 +- arch/powerpc/cpu/mpc85xx/start.S | 2 +- arch/powerpc/cpu/mpc85xx/tlb.c | 2 +- arch/powerpc/cpu/mpc8xxx/Makefile | 2 ++ arch/powerpc/cpu/mpc8xxx/law.c | 4 ++-- arch/powerpc/lib/Makefile | 2 ++ board/congatec/common/Makefile | 2 ++ board/freescale/common/Makefile | 2 ++ board/freescale/p1010rdb/Makefile | 2 ++ board/freescale/p1_p2_rdb_pc/Makefile | 2 ++ common/spl/Kconfig | 14 ++++++++++++++ configs/P1010RDB-PA_36BIT_NAND_defconfig | 2 ++ configs/P1010RDB-PA_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PA_NAND_defconfig | 2 ++ configs/P1010RDB-PA_NOR_defconfig | 1 + configs/P1010RDB-PA_SDCARD_defconfig | 1 + configs/P1010RDB-PA_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_36BIT_NAND_defconfig | 2 ++ configs/P1010RDB-PB_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_NAND_defconfig | 2 ++ configs/P1010RDB-PB_NOR_defconfig | 1 + configs/P1010RDB-PB_SDCARD_defconfig | 1 + configs/P1010RDB-PB_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_NAND_defconfig | 2 ++ configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_defconfig | 1 + configs/P1020RDB-PC_NAND_defconfig | 2 ++ configs/P1020RDB-PC_SDCARD_defconfig | 1 + configs/P1020RDB-PC_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_defconfig | 1 + configs/P1020RDB-PD_NAND_defconfig | 2 ++ configs/P1020RDB-PD_SDCARD_defconfig | 1 + configs/P1020RDB-PD_SPIFLASH_defconfig | 1 + configs/P1020RDB-PD_defconfig | 1 + configs/P2020RDB-PC_36BIT_NAND_defconfig | 2 ++ configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_36BIT_defconfig | 1 + configs/P2020RDB-PC_NAND_defconfig | 2 ++ configs/P2020RDB-PC_SDCARD_defconfig | 1 + configs/P2020RDB-PC_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_defconfig | 1 + configs/T1024RDB_NAND_defconfig | 2 ++ configs/T1024RDB_SDCARD_defconfig | 2 ++ configs/T1024RDB_SPIFLASH_defconfig | 2 ++ configs/T1042D4RDB_NAND_defconfig | 2 ++ configs/T1042D4RDB_SDCARD_defconfig | 2 ++ configs/T1042D4RDB_SPIFLASH_defconfig | 2 ++ configs/T2080QDS_NAND_defconfig | 2 ++ configs/T2080QDS_SDCARD_defconfig | 2 ++ configs/T2080QDS_SPIFLASH_defconfig | 2 ++ configs/T2080RDB_NAND_defconfig | 2 ++ configs/T2080RDB_SDCARD_defconfig | 2 ++ configs/T2080RDB_SPIFLASH_defconfig | 2 ++ configs/T2080RDB_revD_NAND_defconfig | 2 ++ configs/T2080RDB_revD_SDCARD_defconfig | 2 ++ configs/T2080RDB_revD_SPIFLASH_defconfig | 2 ++ configs/T4240RDB_SDCARD_defconfig | 2 ++ include/configs/P1010RDB.h | 9 +-------- include/configs/T102xRDB.h | 2 -- include/configs/T104xRDB.h | 2 -- include/configs/T208xQDS.h | 2 -- include/configs/T208xRDB.h | 2 -- include/configs/T4240RDB.h | 2 -- include/configs/p1_p2_rdb_pc.h | 7 +------ 74 files changed, 115 insertions(+), 36 deletions(-) diff --git a/README b/README index e686839637f..484a2c500cc 100644 --- a/README +++ b/README @@ -1716,9 +1716,6 @@ The following options need to be configured: For ARM, enable an optional function to print more information about the running system. - CONFIG_SPL_INIT_MINIMAL - Arch init code should be built for a very small image - CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR, CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS Sector and number of sectors to load kernel argument @@ -1742,9 +1739,6 @@ The following options need to be configured: continuing (the hardware starts execution after just loading the first page rather than the full 4K). - CONFIG_SPL_SKIP_RELOCATE - Avoid SPL relocation - CONFIG_SPL_UBI Support for a lightweight UBI (fastmap) scanner and loader diff --git a/arch/powerpc/cpu/mpc83xx/Makefile b/arch/powerpc/cpu/mpc83xx/Makefile index 7c4ef7657e5..1255f533e34 100644 --- a/arch/powerpc/cpu/mpc83xx/Makefile +++ b/arch/powerpc/cpu/mpc83xx/Makefile @@ -8,10 +8,12 @@ MINIMAL= ifdef CONFIG_SPL_BUILD +ifndef CONFIG_TPL_BUILD ifdef CONFIG_SPL_INIT_MINIMAL MINIMAL=y endif endif +endif extra-y = start.o diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S index 0944d191057..7a01b16b75e 100644 --- a/arch/powerpc/cpu/mpc83xx/start.S +++ b/arch/powerpc/cpu/mpc83xx/start.S @@ -39,7 +39,7 @@ #endif #if defined(CONFIG_NAND_SPL) || \ - (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL)) + (defined(CONFIG_SPL_BUILD) && CONFIG_IS_ENABLED(INIT_MINIMAL)) #define MINIMAL_SPL #endif diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile index c32cde04e16..f3ee7d34949 100644 --- a/arch/powerpc/cpu/mpc85xx/Makefile +++ b/arch/powerpc/cpu/mpc85xx/Makefile @@ -9,10 +9,12 @@ MINIMAL= ifdef CONFIG_SPL_BUILD +ifndef CONFIG_TPL_BUILD ifdef CONFIG_SPL_INIT_MINIMAL MINIMAL=y endif endif +endif extra-y = start.o resetvec.o diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c index 5a0d33b1b3d..584454e01fe 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c @@ -177,7 +177,7 @@ void cpu_init_early_f(void *fdt) invalidate_tlb(1); #if defined(CONFIG_SYS_PPC_E500_DEBUG_TLB) && \ - !(defined(CONFIG_SPL_INIT_MINIMAL) && defined(CONFIG_SPL_BUILD)) && \ + !(CONFIG_IS_ENABLED(INIT_MINIMAL) && defined(CONFIG_SPL_BUILD)) && \ !defined(CONFIG_NAND_SPL) disable_tlb(CONFIG_SYS_PPC_E500_DEBUG_TLB); #endif diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 2b2ad973599..7a079edb691 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -27,7 +27,7 @@ #define LAW_EN 0x80000000 #if defined(CONFIG_NAND_SPL) || \ - (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL)) + (defined(CONFIG_SPL_BUILD) && CONFIG_IS_ENABLED(INIT_MINIMAL)) #define MINIMAL_SPL #endif diff --git a/arch/powerpc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c index 550d45da0ef..4f6778c720d 100644 --- a/arch/powerpc/cpu/mpc85xx/tlb.c +++ b/arch/powerpc/cpu/mpc85xx/tlb.c @@ -44,7 +44,7 @@ __weak void init_tlbs(void) } #if !defined(CONFIG_NAND_SPL) && \ - (!defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL_INIT_MINIMAL)) + (!defined(CONFIG_SPL_BUILD) || !CONFIG_IS_ENABLED(INIT_MINIMAL)) void read_tlbcam_entry(int idx, u32 *valid, u32 *tsize, unsigned long *epn, phys_addr_t *rpn) { diff --git a/arch/powerpc/cpu/mpc8xxx/Makefile b/arch/powerpc/cpu/mpc8xxx/Makefile index bec891d5401..e3a536d4f8c 100644 --- a/arch/powerpc/cpu/mpc8xxx/Makefile +++ b/arch/powerpc/cpu/mpc8xxx/Makefile @@ -5,10 +5,12 @@ MINIMAL= ifdef CONFIG_SPL_BUILD +ifndef CONFIG_TPL_BUILD ifdef CONFIG_SPL_INIT_MINIMAL MINIMAL=y endif endif +endif ifdef MINIMAL diff --git a/arch/powerpc/cpu/mpc8xxx/law.c b/arch/powerpc/cpu/mpc8xxx/law.c index cf03f410190..713ff172bce 100644 --- a/arch/powerpc/cpu/mpc8xxx/law.c +++ b/arch/powerpc/cpu/mpc8xxx/law.c @@ -79,7 +79,7 @@ void disable_law(u8 idx) } #if !defined(CONFIG_NAND_SPL) && \ - (!defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL_INIT_MINIMAL)) + (!defined(CONFIG_SPL_BUILD) || !CONFIG_IS_ENABLED(INIT_MINIMAL)) static int get_law_entry(u8 i, struct law_entry *e) { u32 lawar; @@ -110,7 +110,7 @@ int set_next_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id) } #if !defined(CONFIG_NAND_SPL) && \ - (!defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL_INIT_MINIMAL)) + (!defined(CONFIG_SPL_BUILD) || !CONFIG_IS_ENABLED(INIT_MINIMAL)) int set_last_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id) { u32 idx; diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile index 2782740bf5b..066d7f408e0 100644 --- a/arch/powerpc/lib/Makefile +++ b/arch/powerpc/lib/Makefile @@ -10,10 +10,12 @@ lib-$(CONFIG_USE_PRIVATE_LIBGCC) += _ashldi3.o _ashrdi3.o _lshrdi3.o MINIMAL= ifdef CONFIG_SPL_BUILD +ifndef CONFIG_TPL_BUILD ifdef CONFIG_SPL_INIT_MINIMAL MINIMAL=y endif endif +endif obj-y += bdinfo.o diff --git a/board/congatec/common/Makefile b/board/congatec/common/Makefile index d4ddfbf9716..2db0fc1ae5c 100644 --- a/board/congatec/common/Makefile +++ b/board/congatec/common/Makefile @@ -8,10 +8,12 @@ MINIMAL= ifdef CONFIG_SPL_BUILD +ifndef CONFIG_TPL_BUILD ifdef CONFIG_SPL_INIT_MINIMAL MINIMAL=y endif endif +endif ifdef MINIMAL # necessary to create built-in.o diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile index 4df484935f4..4214c6e46e4 100644 --- a/board/freescale/common/Makefile +++ b/board/freescale/common/Makefile @@ -6,10 +6,12 @@ MINIMAL= ifdef CONFIG_SPL_BUILD +ifndef CONFIG_TPL_BUILD ifdef CONFIG_SPL_INIT_MINIMAL MINIMAL=y endif endif +endif ifdef MINIMAL # necessary to create built-in.o diff --git a/board/freescale/p1010rdb/Makefile b/board/freescale/p1010rdb/Makefile index 36b34c70aa8..a00806e6aae 100644 --- a/board/freescale/p1010rdb/Makefile +++ b/board/freescale/p1010rdb/Makefile @@ -5,10 +5,12 @@ MINIMAL= ifdef CONFIG_SPL_BUILD +ifndef CONFIG_TPL_BUILD ifdef CONFIG_SPL_INIT_MINIMAL MINIMAL=y endif endif +endif ifdef MINIMAL obj-y += spl_minimal.o diff --git a/board/freescale/p1_p2_rdb_pc/Makefile b/board/freescale/p1_p2_rdb_pc/Makefile index a7736d8332d..cbdb2507e83 100644 --- a/board/freescale/p1_p2_rdb_pc/Makefile +++ b/board/freescale/p1_p2_rdb_pc/Makefile @@ -5,10 +5,12 @@ MINIMAL= ifdef CONFIG_SPL_BUILD +ifndef CONFIG_TPL_BUILD ifdef CONFIG_SPL_INIT_MINIMAL MINIMAL=y endif endif +endif ifdef MINIMAL obj-y += spl_minimal.o diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 50ff113cab2..42681211d0d 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -140,6 +140,20 @@ config SPL_FSL_PBL endmenu +menu "PowerPC SPL specific options" + depends on PPC && (SUPPORT_SPL && !SPL_FRAMEWORK) + +config SPL_INIT_MINIMAL + bool "Arch init code will be built for a very small image" + +config SPL_FLUSH_IMAGE + bool "Clean dcache and invalidate icache after loading the image" + +config SPL_SKIP_RELOCATE + bool "Skip relocating SPL" + +endmenu + config HANDOFF bool "Pass hand-off information from SPL to U-Boot proper" depends on SPL && BLOBLIST diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index dc4d1c8bb9b..79de9b41dcc 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -29,6 +29,8 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NAND_BOOT=y +CONFIG_SPL_INIT_MINIMAL=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_DRIVERS_MISC=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index 6ded15625c5..0c1cd2f1969 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudra CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index da9690688c4..6f6d6445dd7 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -27,6 +27,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MMC_BOOT=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index 84ebcd53b35..bef25841163 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -30,6 +30,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_SPI_BOOT=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index d103ed599b6..a3e6120b948 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -28,6 +28,8 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NAND_BOOT=y +CONFIG_SPL_INIT_MINIMAL=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_DRIVERS_MISC=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index 8a416bc4d93..349c6477a40 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -19,6 +19,7 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudra CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index e0a9c2df2ec..bb34c0499ed 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -26,6 +26,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MMC_BOOT=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index 215671b4e7f..f42ba10be9a 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -29,6 +29,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_SPI_BOOT=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 4bda8f2068f..b807eb1ee35 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -30,6 +30,8 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NAND_BOOT=y +CONFIG_SPL_INIT_MINIMAL=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_DRIVERS_MISC=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index dc2e40d530d..9186e6fafe8 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index f7cf815433a..3b1912d282f 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -28,6 +28,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MMC_BOOT=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index ab378da0aad..8ec1e93426e 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -31,6 +31,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_SPI_BOOT=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 9f839f55fbe..eb0e48289d7 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -29,6 +29,8 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NAND_BOOT=y +CONFIG_SPL_INIT_MINIMAL=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_DRIVERS_MISC=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index 4824169b481..b2a3587171d 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index f40cc9fcbec..0b547456a1a 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -27,6 +27,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MMC_BOOT=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index f371661e553..c92036e9d95 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -30,6 +30,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_SPI_BOOT=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index fd68dc70bab..f5892e98bf7 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -30,6 +30,8 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NAND_BOOT=y +CONFIG_SPL_INIT_MINIMAL=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_ENV_SUPPORT=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index fb085552759..deaeb0a4e1b 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -29,6 +29,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MMC_BOOT=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index 62ea0fe3289..4dffe7e5b34 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -32,6 +32,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_SPI_BOOT=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index 80108f3d210..f127d8c92dc 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -22,6 +22,7 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$con CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 87d12d8fb00..ff27fd2a7bf 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -29,6 +29,8 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NAND_BOOT=y +CONFIG_SPL_INIT_MINIMAL=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_ENV_SUPPORT=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 7b03e9a3006..a2d16e31a7a 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -28,6 +28,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MMC_BOOT=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 600691517c2..7cd087e01ce 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -31,6 +31,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_SPI_BOOT=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 2cde204313f..069a35f3df8 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -21,6 +21,7 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$con CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index 3898e20d188..9b8793298ed 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -29,6 +29,8 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NAND_BOOT=y +CONFIG_SPL_INIT_MINIMAL=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_ENV_SUPPORT=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index 345a85521cd..f7acd3996ce 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -28,6 +28,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MMC_BOOT=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index ac7ee81d6d5..daed834c0fc 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -31,6 +31,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_SPI_BOOT=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index f1c8c7179cc..ccb1e30b4ec 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -21,6 +21,7 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$con CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index a2e0e9f7de8..d6f3fb24222 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -30,6 +30,8 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NAND_BOOT=y +CONFIG_SPL_INIT_MINIMAL=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_ENV_SUPPORT=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 092681c1d83..50bf852203c 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -29,6 +29,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MMC_BOOT=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index f505a7a5087..a99f46a8801 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -32,6 +32,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_SPI_BOOT=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index bf998dacf99..cbae767fceb 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -22,6 +22,7 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$con CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index b45e23f32c1..1031ebe4628 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -29,6 +29,8 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NAND_BOOT=y +CONFIG_SPL_INIT_MINIMAL=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_ENV_SUPPORT=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 5e152d6b36b..6c757c2a69e 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -28,6 +28,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MMC_BOOT=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 75f16593fb7..91ca330b119 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -31,6 +31,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_SPI_BOOT=y +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index b68777dfa4c..f33b69d97d7 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -21,6 +21,7 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$con CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set +CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index dc2b7b3f61b..218985606d1 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -34,6 +34,8 @@ CONFIG_ID_EEPROM=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index 9a3e19a98f8..d0b7f7174e0 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -35,6 +35,8 @@ CONFIG_ID_EEPROM=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index 2381a0d30e9..fce2aac36b2 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -38,6 +38,8 @@ CONFIG_ID_EEPROM=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index e221dd05922..7c0e35b67b4 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -30,6 +30,8 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index 7a6c96c4ffd..bd9d1aefc60 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -31,6 +31,8 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index d39b9e07e20..21a7c18a29b 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -34,6 +34,8 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index ec54a71b016..5b17526766a 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -35,6 +35,8 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index 0d57dade82d..a3ec6bc5bc9 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -36,6 +36,8 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 3838e28f415..956835167bd 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -39,6 +39,8 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index c6df1fc6573..8a6e6899c80 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -33,6 +33,8 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index 7fc6ec429cc..beb714a7027 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -34,6 +34,8 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index ebc948c18a0..14fa9f6efde 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -37,6 +37,8 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index 03529ff0d8b..3ba54841f2a 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -34,6 +34,8 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index 35ce1edd689..9afa79b0f71 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -35,6 +35,8 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index 14ae4f0e961..f86de3a6852 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -38,6 +38,8 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index 6d270813585..fe5481ec7fc 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -32,6 +32,8 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 0c4a2f01ad4..8667941a0ab 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -16,7 +16,6 @@ #include #ifdef CONFIG_SDCARD -#define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_PAD_TO 0x18000 #define CONFIG_SPL_MAX_SIZE (96 * 1024) @@ -36,7 +35,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc #else #define CONFIG_SPL_SPI_FLASH_MINIMAL -#define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_PAD_TO 0x18000 #define CONFIG_SPL_MAX_SIZE (96 * 1024) @@ -53,8 +51,6 @@ #ifdef CONFIG_MTD_RAW_NAND #ifdef CONFIG_NXP_ESBC -#define CONFIG_SPL_INIT_MINIMAL -#define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_MAX_SIZE 8192 @@ -65,7 +61,6 @@ #define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 #else #ifdef CONFIG_TPL_BUILD -#define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_NAND_INIT #define CONFIG_SPL_COMMON_INIT_DDR #define CONFIG_SPL_MAX_SIZE (128 << 10) @@ -74,8 +69,6 @@ #define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000) #define CONFIG_SYS_NAND_U_BOOT_START (0x11000000) #elif defined(CONFIG_SPL_BUILD) -#define CONFIG_SPL_INIT_MINIMAL -#define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_MAX_SIZE 8192 #define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0xD0000000 @@ -455,7 +448,7 @@ extern unsigned long get_sdram_size(void); #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) -#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL) +#if defined(CONFIG_SPL_BUILD) && CONFIG_IS_ENABLED(INIT_MINIMAL) #define CONFIG_NS16550_MIN_FUNCTIONS #endif diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index e7cc39e78a9..30570ad5119 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -21,13 +21,11 @@ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #ifdef CONFIG_RAMBOOT_PBL -#define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_PAD_TO 0x40000 #define CONFIG_SPL_MAX_SIZE 0x28000 #define RESET_VECTOR_OFFSET 0x27FFC #define BOOT_PAGE_OFFSET 0x27000 #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_SKIP_RELOCATE #define CONFIG_SPL_COMMON_INIT_DDR #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE #endif diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index de31f695c60..2d9c8fcd175 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -15,11 +15,9 @@ #include #ifdef CONFIG_RAMBOOT_PBL -#define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_PAD_TO 0x40000 #define CONFIG_SPL_MAX_SIZE 0x28000 #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_SKIP_RELOCATE #define CONFIG_SPL_COMMON_INIT_DDR #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE #endif diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 82e0fc46c7b..1f546f4407c 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -29,13 +29,11 @@ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #ifdef CONFIG_RAMBOOT_PBL -#define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_PAD_TO 0x40000 #define CONFIG_SPL_MAX_SIZE 0x28000 #define RESET_VECTOR_OFFSET 0x27FFC #define BOOT_PAGE_OFFSET 0x27000 #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_SKIP_RELOCATE #define CONFIG_SPL_COMMON_INIT_DDR #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE #endif diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 94385443253..1bd4b36eb8b 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -24,13 +24,11 @@ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #ifdef CONFIG_RAMBOOT_PBL -#define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_PAD_TO 0x40000 #define CONFIG_SPL_MAX_SIZE 0x28000 #define RESET_VECTOR_OFFSET 0x27FFC #define BOOT_PAGE_OFFSET 0x27000 #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_SKIP_RELOCATE #define CONFIG_SPL_COMMON_INIT_DDR #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE #endif diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 834855c336c..934f98ca373 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -22,7 +22,6 @@ #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #else -#define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_PAD_TO 0x40000 #define CONFIG_SPL_MAX_SIZE 0x28000 #define RESET_VECTOR_OFFSET 0x27FFC @@ -40,7 +39,6 @@ #endif #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_SKIP_RELOCATE #define CONFIG_SPL_COMMON_INIT_DDR #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE #endif diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index f6ecf2a7a8b..d2c8d23c31c 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -77,7 +77,6 @@ #endif #ifdef CONFIG_SDCARD -#define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_PAD_TO 0x20000 #define CONFIG_SPL_MAX_SIZE (128 * 1024) @@ -91,7 +90,6 @@ #endif #elif defined(CONFIG_SPIFLASH) #define CONFIG_SPL_SPI_FLASH_MINIMAL -#define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_PAD_TO 0x20000 #define CONFIG_SPL_MAX_SIZE (128 * 1024) @@ -105,7 +103,6 @@ #endif #elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD -#define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_NAND_INIT #define CONFIG_SPL_COMMON_INIT_DDR #define CONFIG_SPL_MAX_SIZE (128 << 10) @@ -114,8 +111,6 @@ #define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000) #define CONFIG_SYS_NAND_U_BOOT_START (0x11000000) #elif defined(CONFIG_SPL_BUILD) -#define CONFIG_SPL_INIT_MINIMAL -#define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_MAX_SIZE 4096 #define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10) @@ -402,7 +397,7 @@ #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) -#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL) +#if defined(CONFIG_SPL_BUILD) && CONFIG_IS_ENABLED(INIT_MINIMAL) #define CONFIG_NS16550_MIN_FUNCTIONS #endif -- GitLab From bab1b35c617a339da8f859bfea90ec304859b354 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 13 May 2022 12:46:23 -0400 Subject: [PATCH 015/581] Convert CONFIG_SPL_NAND_RAW_ONLY et al to Kconfig This converts the following to Kconfig: CONFIG_SPL_NAND_RAW_ONLY CONFIG_SPL_NAND_SOFTECC Signed-off-by: Tom Rini --- README | 4 ---- common/spl/Kconfig | 12 +++++++++++- configs/axm_defconfig | 2 ++ configs/corvus_defconfig | 2 ++ configs/devkit3250_defconfig | 2 ++ configs/gardena-smart-gateway-at91sam_defconfig | 1 + configs/smartweb_defconfig | 2 ++ configs/taurus_defconfig | 2 ++ include/configs/at91sam9m10g45ek.h | 1 - include/configs/corvus.h | 2 -- include/configs/devkit3250.h | 5 ----- include/configs/gardena-smart-gateway-at91sam.h | 1 - include/configs/pm9g45.h | 1 - include/configs/smartweb.h | 2 -- include/configs/taurus.h | 2 -- 15 files changed, 22 insertions(+), 19 deletions(-) diff --git a/README b/README index 484a2c500cc..0fd92cfaebc 100644 --- a/README +++ b/README @@ -1743,10 +1743,6 @@ The following options need to be configured: Support for a lightweight UBI (fastmap) scanner and loader - CONFIG_SPL_NAND_RAW_ONLY - Support to boot only raw u-boot.bin images. Use this only - if you need to save space. - CONFIG_SPL_COMMON_INIT_DDR Set for common ddr init with serial presence detect in SPL binary. diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 42681211d0d..b45607b3f75 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -763,13 +763,23 @@ config SPL_NAND_SUPPORT This enables the drivers in drivers/mtd/nand/raw as part of an SPL build. +config SPL_NAND_RAW_ONLY + bool "Support to boot only raw u-boot.bin images" + depends on SPL_NAND_SUPPORT + help + Use this only if you need to save space. + config SPL_NAND_DRIVERS bool "Use standard NAND driver" help SPL uses normal NAND drivers, not minimal drivers. config SPL_NAND_ECC - bool "Include standard software ECC in the SPL" + bool "Include standard ECC in SPL" + +config SPL_NAND_SOFTECC + bool "Use software ECC in SPL" + depends on SPL_NAND_ECC config SPL_NAND_SIMPLE bool "Support simple NAND drivers in SPL" diff --git a/configs/axm_defconfig b/configs/axm_defconfig index d17cdd29c56..ebda5a49fe9 100644 --- a/configs/axm_defconfig +++ b/configs/axm_defconfig @@ -39,8 +39,10 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_CRC32=y CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_NAND_RAW_ONLY=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y +CONFIG_SPL_NAND_SOFTECC=y CONFIG_SPL_NAND_BASE=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_HUSH_PARSER=y diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig index 443f15e71d3..9b55d9e87db 100644 --- a/configs/corvus_defconfig +++ b/configs/corvus_defconfig @@ -32,8 +32,10 @@ CONFIG_BOOTCOMMAND="nand read 0x70000000 0x200000 0x300000;bootm 0x70000000" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_NAND_RAW_ONLY=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y +CONFIG_SPL_NAND_SOFTECC=y CONFIG_SPL_NAND_BASE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig index 71e80e80485..5b25463df96 100644 --- a/configs/devkit3250_defconfig +++ b/configs/devkit3250_defconfig @@ -26,8 +26,10 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_NAND_RAW_ONLY=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y +CONFIG_SPL_NAND_SOFTECC=y CONFIG_SPL_NAND_SIMPLE=y CONFIG_CMD_IMLS=y CONFIG_CMD_GPIO=y diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig index 0dbd0849581..2ee71636534 100644 --- a/configs/gardena-smart-gateway-at91sam_defconfig +++ b/configs/gardena-smart-gateway-at91sam_defconfig @@ -35,6 +35,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_NAND_RAW_ONLY=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y CONFIG_HUSH_PARSER=y diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig index a9f90e90753..b3c6d23e717 100644 --- a/configs/smartweb_defconfig +++ b/configs/smartweb_defconfig @@ -33,8 +33,10 @@ CONFIG_BOOTCOMMAND="run flashboot" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_NAND_RAW_ONLY=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y +CONFIG_SPL_NAND_SOFTECC=y CONFIG_SPL_NAND_BASE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig index 90f9133cb62..8bc5afdc2e5 100644 --- a/configs/taurus_defconfig +++ b/configs/taurus_defconfig @@ -43,8 +43,10 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_CRC32=y CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_NAND_RAW_ONLY=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y +CONFIG_SPL_NAND_SOFTECC=y CONFIG_SPL_NAND_BASE=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_HUSH_PARSER=y diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 38b9061080a..2930d7a1499 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -56,7 +56,6 @@ #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" #elif CONFIG_NAND_BOOT -#define CONFIG_SPL_NAND_SOFTECC #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 #define CONFIG_SYS_NAND_ECCSIZE 256 diff --git a/include/configs/corvus.h b/include/configs/corvus.h index 4809b59ecc3..b4fef73121a 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -63,8 +63,6 @@ #define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE #define CONFIG_SPL_BSS_MAX_SIZE (SZ_2K) -#define CONFIG_SPL_NAND_RAW_ONLY -#define CONFIG_SPL_NAND_SOFTECC #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 93a704cc31d..d2a760e9b1f 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -97,11 +97,6 @@ /* SPL will use serial */ -/* SPL loads an image from NAND */ -#define CONFIG_SPL_NAND_RAW_ONLY - -#define CONFIG_SPL_NAND_SOFTECC - #define CONFIG_SPL_MAX_SIZE 0x20000 #define CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE diff --git a/include/configs/gardena-smart-gateway-at91sam.h b/include/configs/gardena-smart-gateway-at91sam.h index 5e6a8ee770e..3e99d2cfb04 100644 --- a/include/configs/gardena-smart-gateway-at91sam.h +++ b/include/configs/gardena-smart-gateway-at91sam.h @@ -51,7 +51,6 @@ #define CONFIG_SYS_MCKR 0x1301 #define CONFIG_SYS_MCKR_CSS 0x1302 -#define CONFIG_SPL_NAND_RAW_ONLY #define CONFIG_SYS_NAND_U_BOOT_SIZE 0xa0000 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index b858aaa1ccd..658b8a7f15f 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -61,7 +61,6 @@ #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" #elif CONFIG_NAND_BOOT -#define CONFIG_SPL_NAND_SOFTECC #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 #define CONFIG_SYS_NAND_ECCSIZE 256 diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index b51a5203547..d58d76d1091 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -126,8 +126,6 @@ #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) -#define CONFIG_SPL_NAND_RAW_ONLY -#define CONFIG_SPL_NAND_SOFTECC #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 77d80bfc981..768bfc6cc6c 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -152,8 +152,6 @@ #define CONFIG_SPL_BSS_MAX_SIZE (3 * SZ_512) #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) -#define CONFIG_SPL_NAND_RAW_ONLY -#define CONFIG_SPL_NAND_SOFTECC #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE -- GitLab From 4a11e34bc9c0f3818f3e847ac51c82d1c9bbb807 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 13 May 2022 17:12:35 -0400 Subject: [PATCH 016/581] Convert CONFIG_SPL_FS_LOAD_PAYLOAD_NAME et al to Kconfig This converts the following to Kconfig: CONFIG_SPL_FS_LOAD_ARGS_NAME CONFIG_SPL_FS_LOAD_KERNEL_NAME CONFIG_SPL_FS_LOAD_PAYLOAD_NAME Signed-off-by: Tom Rini --- README | 11 -------- common/spl/Kconfig | 25 +++++++++++++++++++ common/spl/spl_sata.c | 4 --- configs/am335x_evm_defconfig | 1 + configs/am335x_evm_spiboot_defconfig | 1 + configs/am335x_hs_evm_defconfig | 1 + configs/am43xx_evm_defconfig | 1 + configs/am43xx_evm_rtconly_defconfig | 1 + configs/am43xx_evm_usbhost_boot_defconfig | 1 + configs/am43xx_hs_evm_defconfig | 1 + configs/am57xx_evm_defconfig | 1 + configs/am57xx_hs_evm_defconfig | 1 + configs/am57xx_hs_evm_usb_defconfig | 1 + configs/am64x_evm_a53_defconfig | 1 + configs/am65x_evm_a53_defconfig | 1 + configs/am65x_hs_evm_a53_defconfig | 1 + ...edev_cc_v1_0_ultrazedev_som_v1_0_defconfig | 2 ++ configs/dra7xx_evm_defconfig | 1 + configs/dra7xx_hs_evm_defconfig | 1 + configs/dra7xx_hs_evm_usb_defconfig | 1 + configs/imx6q_logic_defconfig | 1 + configs/j7200_evm_a72_defconfig | 1 + configs/j721e_evm_a72_defconfig | 1 + configs/j721e_hs_evm_a72_defconfig | 1 + configs/j721s2_evm_a72_defconfig | 1 + configs/mx6cuboxi_defconfig | 1 + configs/mx6sabreauto_defconfig | 1 + configs/mx6slevk_spl_defconfig | 1 + configs/mx6ul_14x14_evk_defconfig | 1 + configs/mx6ul_9x9_evk_defconfig | 1 + configs/novena_defconfig | 1 + configs/openpiton_riscv64_spl_defconfig | 1 + configs/pcm058_defconfig | 1 + configs/pico-imx6_defconfig | 1 + configs/riotboard_defconfig | 2 ++ configs/syzygy_hub_defconfig | 1 + configs/udoo_defconfig | 1 + configs/udoo_neo_defconfig | 1 + configs/vining_2000_defconfig | 1 + configs/wandboard_defconfig | 1 + configs/xilinx_zynq_virt_defconfig | 2 ++ configs/xilinx_zynqmp_virt_defconfig | 2 ++ include/configs/am3517_evm.h | 4 --- include/configs/am64x_evm.h | 4 --- include/configs/am65x_evm.h | 4 --- include/configs/at91sam9m10g45ek.h | 2 -- include/configs/at91sam9n12ek.h | 4 --- include/configs/at91sam9x5ek.h | 4 --- include/configs/ax25-ae350.h | 4 --- include/configs/embestmx6boards.h | 2 -- include/configs/imx6-engicam.h | 2 -- include/configs/imx6_logic.h | 2 -- include/configs/imx6_spl.h | 9 ------- include/configs/imx6dl-mamoj.h | 2 -- include/configs/imx7_spl.h | 9 ------- include/configs/j721e_evm.h | 4 --- include/configs/j721s2_evm.h | 4 --- include/configs/ls1046ardb.h | 2 -- include/configs/mccmon6.h | 1 - include/configs/mx6sabreauto.h | 2 -- include/configs/mx6sabresd.h | 2 -- include/configs/openpiton-riscv64.h | 1 - include/configs/pico-imx6.h | 2 -- include/configs/pico-imx6ul.h | 2 -- include/configs/pico-imx7d.h | 2 -- include/configs/pm9g45.h | 2 -- include/configs/rk3288_common.h | 3 --- include/configs/sama5d27_som1_ek.h | 4 --- include/configs/sama5d27_wlsom1_ek.h | 4 --- include/configs/sama5d2_icp.h | 4 --- include/configs/sama5d2_xplained.h | 4 --- include/configs/sama5d3_xplained.h | 6 ----- include/configs/sama5d3xek.h | 4 --- include/configs/sama5d4_xplained.h | 4 --- include/configs/sama5d4ek.h | 4 --- include/configs/siemens-am33x-common.h | 2 -- include/configs/sniper.h | 2 -- include/configs/socfpga_common.h | 7 ------ include/configs/socfpga_soc64_common.h | 7 ------ include/configs/ti814x_evm.h | 2 -- include/configs/ti_armv7_common.h | 8 ------ include/configs/topic_miami.h | 1 - include/configs/vyasa-rk3288.h | 2 -- include/configs/xilinx_zynqmp.h | 7 ------ include/configs/zynq-common.h | 8 ------ 85 files changed, 68 insertions(+), 174 deletions(-) diff --git a/README b/README index 0fd92cfaebc..f39b215d019 100644 --- a/README +++ b/README @@ -1722,17 +1722,6 @@ The following options need to be configured: parameters from when MMC is being used in raw mode (for falcon mode) - CONFIG_SPL_FS_LOAD_PAYLOAD_NAME - Filename to read to load U-Boot when reading from filesystem - - CONFIG_SPL_FS_LOAD_KERNEL_NAME - Filename to read to load kernel uImage when reading - from filesystem (for Falcon mode) - - CONFIG_SPL_FS_LOAD_ARGS_NAME - Filename to read to load kernel argument parameters - when reading from filesystem (for Falcon mode) - CONFIG_SPL_MPC83XX_WAIT_FOR_NAND Set this for NAND SPL on PPC mpc83xx targets, so that start.S waits for the rest of the SPL to load before diff --git a/common/spl/Kconfig b/common/spl/Kconfig index b45607b3f75..df2075c7cf2 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -605,6 +605,31 @@ config SPL_FS_FAT filesystem from within SPL. Support for the underlying block device (e.g. MMC or USB) must be enabled separately. +config SPL_FS_LOAD_PAYLOAD_NAME + string "File to load for U-Boot from the filesystem" + depends on SPL_FS_EXT4 || SPL_FS_FAT || SPL_FS_SQUASHFS + default "tispl.bin" if SYS_K3_SPL_ATF + default "u-boot.itb" if SPL_LOAD_FIT + default "u-boot.img" + help + Filename to read to load U-Boot when reading from filesystem. + +config SPL_FS_LOAD_KERNEL_NAME + string "File to load for the OS kernel from the filesystem" + depends on (SPL_FS_EXT4 || SPL_FS_FAT || SPL_FS_SQUASHFS) && SPL_OS_BOOT + default "uImage" + help + Filename to read to load for the OS kernel when reading from the + filesystem. + +config SPL_FS_LOAD_ARGS_NAME + string "File to load for the OS kernel argument parameters from the filesystem" + depends on (SPL_FS_EXT4 || SPL_FS_FAT || SPL_FS_SQUASHFS) && SPL_OS_BOOT + default "args" + help + Filename to read to load for the OS kernel argument parameters from + the filesystem. + config SPL_FAT_WRITE bool "Support write for FAT filesystems" help diff --git a/common/spl/spl_sata.c b/common/spl/spl_sata.c index d03f86344e0..1351d78612a 100644 --- a/common/spl/spl_sata.c +++ b/common/spl/spl_sata.c @@ -21,10 +21,6 @@ #define CONFIG_SYS_SATA_FAT_BOOT_PARTITION 1 #endif -#ifndef CONFIG_SPL_FS_LOAD_PAYLOAD_NAME -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" -#endif - #ifndef CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR /* Dummy value to make the compiler happy */ #define CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR 0x100 diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig index 17c67108b69..c7d19315016 100644 --- a/configs/am335x_evm_defconfig +++ b/configs/am335x_evm_defconfig @@ -21,6 +21,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_ETH=y # CONFIG_SPL_FS_EXT4 is not set +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_MUSB_NEW=y CONFIG_SPL_NAND_DRIVERS=y diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig index 3f3a81a1d98..bdb0ef0b976 100644 --- a/configs/am335x_evm_spiboot_defconfig +++ b/configs/am335x_evm_spiboot_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_FIT_IMAGE_TINY=y # CONFIG_SPL_FS_EXT4 is not set +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_MTD_SUPPORT=y # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_DM_SPI_FLASH=y diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig index 074a654b55a..7123a167eb3 100644 --- a/configs/am335x_hs_evm_defconfig +++ b/configs/am335x_hs_evm_defconfig @@ -20,6 +20,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_FIT_IMAGE_TINY=y # CONFIG_SPL_ENV_SUPPORT is not set # CONFIG_SPL_FS_EXT4 is not set +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_MTD_SUPPORT=y # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_NAND_DRIVERS=y diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig index 6e37c2ca2d7..24ecf1fbe02 100644 --- a/configs/am43xx_evm_defconfig +++ b/configs/am43xx_evm_defconfig @@ -16,6 +16,7 @@ CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_MISC_INIT_R is not set CONFIG_SPL_ETH=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/am43xx_evm_rtconly_defconfig b/configs/am43xx_evm_rtconly_defconfig index 6b24aac067a..6c9a62c40df 100644 --- a/configs/am43xx_evm_rtconly_defconfig +++ b/configs/am43xx_evm_rtconly_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_MISC_INIT_R is not set +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig index a3de93d9bf9..2bd98cf4f7e 100644 --- a/configs/am43xx_evm_usbhost_boot_defconfig +++ b/configs/am43xx_evm_usbhost_boot_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_MISC_INIT_R is not set +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig index cc75fe9eb3d..33b008f5a90 100644 --- a/configs/am43xx_hs_evm_defconfig +++ b/configs/am43xx_hs_evm_defconfig @@ -23,6 +23,7 @@ CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_MISC_INIT_R is not set CONFIG_SPL_ETH=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index c19ec97a832..2769d3518c6 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -28,6 +28,7 @@ CONFIG_AVB_VERIFY=y CONFIG_ANDROID_AB=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_DMA=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_OS_BOOT=y diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index ca78622eb2b..2d23db26c6b 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -31,6 +31,7 @@ CONFIG_AVB_VERIFY=y CONFIG_ANDROID_AB=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_DMA=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index 40c628a4988..b218b1b50d0 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -34,6 +34,7 @@ CONFIG_AVB_VERIFY=y CONFIG_ANDROID_AB=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_DMA=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_RAM_SUPPORT=y diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig index 489a750230b..ed603a19f5b 100644 --- a/configs/am64x_evm_a53_defconfig +++ b/configs/am64x_evm_a53_defconfig @@ -38,6 +38,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 CONFIG_SPL_DMA=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_ETH=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_I2C=y CONFIG_SPL_DM_MAILBOX=y CONFIG_SPL_DM_SPI_FLASH=y diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig index 3c654391b13..236e32f21a3 100644 --- a/configs/am65x_evm_a53_defconfig +++ b/configs/am65x_evm_a53_defconfig @@ -39,6 +39,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 CONFIG_SPL_DMA=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_I2C=y CONFIG_SPL_DM_MAILBOX=y CONFIG_SPL_MTD_SUPPORT=y diff --git a/configs/am65x_hs_evm_a53_defconfig b/configs/am65x_hs_evm_a53_defconfig index ccfd0dbe5f7..99c78d3b425 100644 --- a/configs/am65x_hs_evm_a53_defconfig +++ b/configs/am65x_hs_evm_a53_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 CONFIG_SPL_DMA=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_I2C=y CONFIG_SPL_DM_MAILBOX=y CONFIG_SPL_MTD_SUPPORT=y diff --git a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig index a98aa8caf58..90ca33b8244 100644 --- a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig +++ b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig @@ -26,6 +26,8 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x10000000 CONFIG_BOOTDELAY=0 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_CLOCKS=y +CONFIG_SPL_FS_LOAD_KERNEL_NAME="atf-uboot.ub" +CONFIG_SPL_FS_LOAD_ARGS_NAME="u-boot.bin" CONFIG_SPL_OS_BOOT=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2073 diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index dcb7b3f78f7..f04a2fbca6f 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -28,6 +28,7 @@ CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_MISC_INIT_R is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_DMA=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_BASE=y diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index 340d4f99f87..6bb5c3c2ad0 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -31,6 +31,7 @@ CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_MISC_INIT_R is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_DMA=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig index 12b92f3bc4a..652d9924bb8 100644 --- a/configs/dra7xx_hs_evm_usb_defconfig +++ b/configs/dra7xx_hs_evm_usb_defconfig @@ -33,6 +33,7 @@ CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_MISC_INIT_R is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_DMA=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_RAM_SUPPORT=y diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index e804f75247c..c5ad6dcdd1f 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -29,6 +29,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SPL_RAW_IMAGE_SUPPORT=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_DMA=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_OS_BOOT=y diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig index f90a184c63f..ac5152a164c 100644 --- a/configs/j7200_evm_a72_defconfig +++ b/configs/j7200_evm_a72_defconfig @@ -39,6 +39,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 CONFIG_SPL_DMA=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_I2C=y CONFIG_SPL_DM_MAILBOX=y CONFIG_SPL_MTD_SUPPORT=y diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index 90805e43a91..b507f23e8df 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -36,6 +36,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 CONFIG_SPL_DMA=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_I2C=y CONFIG_SPL_DM_MAILBOX=y CONFIG_SPL_DM_SPI_FLASH=y diff --git a/configs/j721e_hs_evm_a72_defconfig b/configs/j721e_hs_evm_a72_defconfig index ae2865b3033..a07204dd98e 100644 --- a/configs/j721e_hs_evm_a72_defconfig +++ b/configs/j721e_hs_evm_a72_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_I2C=y CONFIG_SPL_DM_MAILBOX=y CONFIG_SPL_DM_SPI_FLASH=y diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig index 6bb2e6a3187..90b941157be 100644 --- a/configs/j721s2_evm_a72_defconfig +++ b/configs/j721s2_evm_a72_defconfig @@ -39,6 +39,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 CONFIG_SPL_DMA=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_I2C=y CONFIG_SPL_DM_MAILBOX=y CONFIG_SPL_MTD_SUPPORT=y diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index b5bff664878..41122ade90e 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -27,6 +27,7 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="if hdmidet; then usb start; setenv stdin serial,usbkbd; setenv stdout serial,vidconsole; setenv stderr serial,vidconsole; else setenv stdin serial; setenv stdout serial; setenv stderr serial; fi;" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_FS_EXT4=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig index f96bbcd07c3..3d2e906f934 100644 --- a/configs/mx6sabreauto_defconfig +++ b/configs/mx6sabreauto_defconfig @@ -35,6 +35,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SPL_LEGACY_IMAGE_FORMAT=y CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_FS_EXT4=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig index 828922c6c39..24407c113d6 100644 --- a/configs/mx6slevk_spl_defconfig +++ b/configs/mx6slevk_spl_defconfig @@ -26,6 +26,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_FS_EXT4=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig index 51dfe8ce03a..065ead0a7ad 100644 --- a/configs/mx6ul_14x14_evk_defconfig +++ b/configs/mx6ul_14x14_evk_defconfig @@ -28,6 +28,7 @@ CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc resc CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_FS_EXT4=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig index d2ef51e0042..2f46b68cbe9 100644 --- a/configs/mx6ul_9x9_evk_defconfig +++ b/configs/mx6ul_9x9_evk_defconfig @@ -28,6 +28,7 @@ CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc resc CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_FS_EXT4=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y diff --git a/configs/novena_defconfig b/configs/novena_defconfig index a75ce588c51..215aaa605b5 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd ; run net_nfs" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_SPL_FS_EXT4=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/openpiton_riscv64_spl_defconfig b/configs/openpiton_riscv64_spl_defconfig index a5c01d365cc..6e4e4549419 100644 --- a/configs/openpiton_riscv64_spl_defconfig +++ b/configs/openpiton_riscv64_spl_defconfig @@ -25,6 +25,7 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_BANNER_PRINT is not set CONFIG_SPL_CPU=y CONFIG_SPL_FS_EXT4=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="boot/fw_payload.bin" CONFIG_SPL_RTC=y CONFIG_SYS_PROMPT="openpiton$ " CONFIG_SYS_CBSIZE=256 diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig index 47e2199b47b..54bef4e062e 100644 --- a/configs/pcm058_defconfig +++ b/configs/pcm058_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x18a CONFIG_SPL_DMA=y CONFIG_SPL_FS_EXT4=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x31400 diff --git a/configs/pico-imx6_defconfig b/configs/pico-imx6_defconfig index 6887ee98ce1..09809542606 100644 --- a/configs/pico-imx6_defconfig +++ b/configs/pico-imx6_defconfig @@ -29,6 +29,7 @@ CONFIG_DEFAULT_FDT_FILE="ask" CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_FS_EXT4=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig index 15c1c5a3c44..8e74a1f087f 100644 --- a/configs/riotboard_defconfig +++ b/configs/riotboard_defconfig @@ -29,6 +29,8 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_RAW_IMAGE_SUPPORT=y CONFIG_SPL_FS_EXT4=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" +CONFIG_SPL_FS_LOAD_ARGS_NAME="imx6dl-riotboard.dtb" CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x0 diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig index 4b4f692fe4f..b1990841987 100644 --- a/configs/syzygy_hub_defconfig +++ b/configs/syzygy_hub_defconfig @@ -26,6 +26,7 @@ CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_USE_PREBOOT=y CONFIG_CLOCKS=y CONFIG_SPL_STACK_R=y +CONFIG_SPL_FS_LOAD_ARGS_NAME="system.dtb" CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x0 diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig index d3b49bffeb7..e21945116c0 100644 --- a/configs/udoo_defconfig +++ b/configs/udoo_defconfig @@ -23,6 +23,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_FS_EXT4=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig index 699e68986fa..fff11bb10e9 100644 --- a/configs/udoo_neo_defconfig +++ b/configs/udoo_neo_defconfig @@ -24,6 +24,7 @@ CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_FS_EXT4=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig index 4ee03411e9e..a8c3d907d1d 100644 --- a/configs/vining_2000_defconfig +++ b/configs/vining_2000_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_FS_EXT4=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index 82fb14f1bb9..fadc8af36eb 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -35,6 +35,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_FS_EXT4=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index 61a748b4882..5e724f063f9 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -29,6 +29,8 @@ CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_USE_PREBOOT=y CONFIG_CLOCKS=y CONFIG_SPL_STACK_R=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" +CONFIG_SPL_FS_LOAD_ARGS_NAME="system.dtb" CONFIG_SPL_FPGA=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 698149711ca..35625a4c1fa 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -32,6 +32,8 @@ CONFIG_PREBOOT="run scsi_init;usb start" CONFIG_BOARD_EARLY_INIT_R=y CONFIG_CLOCKS=y CONFIG_SPL_STACK_R=y +CONFIG_SPL_FS_LOAD_KERNEL_NAME="atf-uboot.ub" +CONFIG_SPL_FS_LOAD_ARGS_NAME="u-boot.bin" CONFIG_SPL_FPGA=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_RAM_SUPPORT=y diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index db3298781d1..1848aecb390 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -104,8 +104,4 @@ #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ -/* Defines for SPL */ - -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" - #endif /* __CONFIG_H */ diff --git a/include/configs/am64x_evm.h b/include/configs/am64x_evm.h index d84a8db97ed..0abaddcae6d 100644 --- a/include/configs/am64x_evm.h +++ b/include/configs/am64x_evm.h @@ -18,10 +18,6 @@ /* DDR Configuration */ #define CONFIG_SYS_SDRAM_BASE1 0x880000000 -#ifdef CONFIG_SYS_K3_SPL_ATF -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "tispl.bin" -#endif - #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE #if defined(CONFIG_TARGET_AM642_A53_EVM) #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + SZ_4M) diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h index b1f9050f3f5..ba50c759c00 100644 --- a/include/configs/am65x_evm.h +++ b/include/configs/am65x_evm.h @@ -44,10 +44,6 @@ #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M #endif -#ifdef CONFIG_SYS_K3_SPL_ATF -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "tispl.bin" -#endif - #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE #define CONFIG_SYS_BOOTM_LEN SZ_64M diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 2930d7a1499..20753e00de7 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -53,8 +53,6 @@ #define CONFIG_SYS_SPL_MALLOC_START 0x70080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" - #elif CONFIG_NAND_BOOT #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index 7d378177b04..7bc8a36481d 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -75,8 +75,4 @@ #define CONFIG_SYS_MCKR 0x1301 #define CONFIG_SYS_MCKR_CSS 0x1302 -#ifdef CONFIG_SD_BOOT -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" -#endif - #endif diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index 013c7cfc59c..cab44d2645a 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -70,8 +70,4 @@ #define CONFIG_SYS_MCKR 0x1301 #define CONFIG_SYS_MCKR_CSS 0x1302 -#ifdef CONFIG_SD_BOOT -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" -#endif - #endif diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index 264d708fa9f..242b73f8f2f 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -11,10 +11,6 @@ #define CONFIG_SPL_MAX_SIZE 0x00100000 #define CONFIG_SPL_BSS_START_ADDR 0x04000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 - -#ifdef CONFIG_SPL_MMC -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.itb" -#endif #endif #define RISCV_MMODE_TIMERBASE 0xe6000000 diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index 1bf564c3606..119d59951f2 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -59,8 +59,6 @@ #include "imx6_spl.h" /* RiOTboard */ #define CONFIG_SYS_SPL_ARGS_ADDR 0x13000000 -#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" -#define CONFIG_SPL_FS_LOAD_ARGS_NAME "imx6dl-riotboard.dtb" #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 /* offset 69KB */ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 /* offset 69KB */ diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h index 26d7a88ebde..24b70bf82f8 100644 --- a/include/configs/imx6-engicam.h +++ b/include/configs/imx6-engicam.h @@ -140,8 +140,6 @@ /* Falcon Mode */ #ifdef CONFIG_SPL_OS_BOOT -# define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" -# define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" # define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 /* MMC support: args@1MB kernel@2MB */ diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h index 65f8944ccaf..b77c335f904 100644 --- a/include/configs/imx6_logic.h +++ b/include/configs/imx6_logic.h @@ -135,8 +135,6 @@ #endif /* Falcon Mode */ -#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" -#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" #define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 /* Falcon Mode - MMC support: args@1MB kernel@2MB */ diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h index 7215bda973f..38aec9436e4 100644 --- a/include/configs/imx6_spl.h +++ b/include/configs/imx6_spl.h @@ -63,15 +63,6 @@ #define CONFIG_SYS_SATA_FAT_BOOT_PARTITION 1 #endif -/* Define the payload for FAT/EXT support */ -#if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4) -# ifdef CONFIG_OF_CONTROL -# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img" -# else -# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" -# endif -#endif - #if defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL) || \ defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) #define CONFIG_SPL_BSS_START_ADDR 0x88200000 diff --git a/include/configs/imx6dl-mamoj.h b/include/configs/imx6dl-mamoj.h index ba79e1bccfa..85ca89790c0 100644 --- a/include/configs/imx6dl-mamoj.h +++ b/include/configs/imx6dl-mamoj.h @@ -51,8 +51,6 @@ #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Falcon */ -#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" -#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" #define CONFIG_SYS_SPL_ARGS_ADDR 0x13000000 /* MMC support: args@1MB kernel@2MB */ diff --git a/include/configs/imx7_spl.h b/include/configs/imx7_spl.h index 128f612392f..39136ea49a8 100644 --- a/include/configs/imx7_spl.h +++ b/include/configs/imx7_spl.h @@ -43,15 +43,6 @@ #define CONFIG_SYS_MONITOR_LEN 409600 /* 400 KB */ #endif -/* Define the payload for FAT/EXT support */ -#if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4) -# ifdef CONFIG_OF_CONTROL -# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img" -# else -# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" -# endif -#endif - #define CONFIG_SPL_BSS_START_ADDR 0x88200000 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ #define CONFIG_SYS_SPL_MALLOC_START 0x88300000 diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index 2590ee6b014..5538fee9460 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -49,10 +49,6 @@ /* Image load address in RAM for DFU boot*/ #endif -#ifdef CONFIG_SYS_K3_SPL_ATF -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "tispl.bin" -#endif - #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE #define CONFIG_SYS_BOOTM_LEN SZ_64M diff --git a/include/configs/j721s2_evm.h b/include/configs/j721s2_evm.h index a5505f079b4..d0a78fd7cc8 100644 --- a/include/configs/j721s2_evm.h +++ b/include/configs/j721s2_evm.h @@ -50,10 +50,6 @@ /* Image load address in RAM for DFU boot*/ #endif -#ifdef CONFIG_SYS_K3_SPL_ATF -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "tispl.bin" -#endif - #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE #define CONFIG_SYS_BOOTM_LEN SZ_64M diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 3dfbae268e4..ff76e694567 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -139,8 +139,6 @@ #endif #endif -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" - #include #endif /* __LS1046ARDB_H__ */ diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index f24a0072417..df6c5094bef 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -21,7 +21,6 @@ */ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR (0x800) #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (0x80) -#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "fitImage" #define CONFIG_MXC_UART_BASE UART1_BASE diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h index 4537fce19de..00ca50a4e64 100644 --- a/include/configs/mx6sabreauto.h +++ b/include/configs/mx6sabreauto.h @@ -28,8 +28,6 @@ /* Falcon Mode */ #ifdef CONFIG_SPL_OS_BOOT -#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" -#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" #define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 /* Falcon Mode - MMC support: args@1MB kernel@2MB */ diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 5a854b9d194..c78ddc42568 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -18,8 +18,6 @@ #include "mx6sabre_common.h" /* Falcon Mode */ -#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" -#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" #define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 /* Falcon Mode - MMC support: args@1MB kernel@2MB */ diff --git a/include/configs/openpiton-riscv64.h b/include/configs/openpiton-riscv64.h index 75b48f880af..f909aa862fd 100644 --- a/include/configs/openpiton-riscv64.h +++ b/include/configs/openpiton-riscv64.h @@ -28,7 +28,6 @@ #define CONFIG_SPL_STACK (0x80000000 + 0x04000000 - \ GENERATED_GBL_DATA_SIZE) -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "boot/fw_payload.bin" #define CONFIG_SPL_GD_ADDR 0x85000000 #endif diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h index c288908046a..b4b556f3bc0 100644 --- a/include/configs/pico-imx6.h +++ b/include/configs/pico-imx6.h @@ -14,8 +14,6 @@ #ifdef CONFIG_SPL_OS_BOOT /* Falcon Mode */ -#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" -#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" #define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 /* Falcon Mode - MMC support: args@1MB kernel@2MB */ diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index 1f111ea3064..aadf6861ca1 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -16,8 +16,6 @@ #ifdef CONFIG_SPL_OS_BOOT /* Falcon Mode */ -#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" -#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" #define CONFIG_SYS_SPL_ARGS_ADDR 0x88000000 /* Falcon Mode - MMC support: args@1MB kernel@2MB */ diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index 06fd78f9da6..d196662dc3e 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -14,8 +14,6 @@ #ifdef CONFIG_SPL_OS_BOOT /* Falcon Mode */ -#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" -#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" #define CONFIG_SYS_SPL_ARGS_ADDR 0x88000000 /* Falcon Mode - MMC support: args@1MB kernel@2MB */ diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index 658b8a7f15f..0bcc2f35f5c 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -58,8 +58,6 @@ #define CONFIG_SYS_SPL_MALLOC_START 0x70080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" - #elif CONFIG_NAND_BOOT #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 77ab7cea2db..ae57353ce35 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -23,9 +23,6 @@ /* RAW SD card / eMMC locations. */ -/* FAT sd card locations. */ -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" - #define CONFIG_SYS_SDRAM_BASE 0 #define SDRAM_BANK_SIZE (2UL << 30) #define SDRAM_MAX_SIZE 0xfe000000 diff --git a/include/configs/sama5d27_som1_ek.h b/include/configs/sama5d27_som1_ek.h index b9144584e3e..1ac4f66a91c 100644 --- a/include/configs/sama5d27_som1_ek.h +++ b/include/configs/sama5d27_som1_ek.h @@ -30,8 +30,4 @@ #define CONFIG_SYS_MONITOR_LEN (512 << 10) -#ifdef CONFIG_SD_BOOT -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" -#endif - #endif diff --git a/include/configs/sama5d27_wlsom1_ek.h b/include/configs/sama5d27_wlsom1_ek.h index e611e7b5104..a1c0e6a1eb6 100644 --- a/include/configs/sama5d27_wlsom1_ek.h +++ b/include/configs/sama5d27_wlsom1_ek.h @@ -35,8 +35,4 @@ #define CONFIG_SYS_MONITOR_LEN (512 << 10) -#ifdef CONFIG_SD_BOOT -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" -#endif - #endif diff --git a/include/configs/sama5d2_icp.h b/include/configs/sama5d2_icp.h index c3a5c2ae323..8cb80efe8e5 100644 --- a/include/configs/sama5d2_icp.h +++ b/include/configs/sama5d2_icp.h @@ -42,8 +42,4 @@ #define CONFIG_SYS_MONITOR_LEN (512 << 10) -#ifdef CONFIG_SD_BOOT -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" -#endif - #endif diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h index cab6ae50698..c2fe118b5bc 100644 --- a/include/configs/sama5d2_xplained.h +++ b/include/configs/sama5d2_xplained.h @@ -27,8 +27,4 @@ #define CONFIG_SYS_MONITOR_LEN (512 << 10) -#ifdef CONFIG_SD_BOOT -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" -#endif - #endif diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index 68bbe8f29c8..1617ebc643d 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -65,10 +65,6 @@ /* size of u-boot.bin to load */ #define CONFIG_SYS_MONITOR_LEN (2 * SZ_512K) -#ifdef CONFIG_SD_BOOT -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" -#endif - /* Falcon boot support on raw MMC */ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x100 /* 128 KiB */ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) @@ -76,8 +72,6 @@ #define CONFIG_SYS_SPL_ARGS_ADDR 0x22000000 /* Falcon boot support on FAT on MMC */ -#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" -#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" /* Falcon boot support on raw NAND */ #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x1a0000 diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index 3be2c83fce0..94f4ae6a1f0 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -76,8 +76,4 @@ #define CONFIG_SYS_MONITOR_LEN (512 << 10) -#ifdef CONFIG_SD_BOOT -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" -#endif - #endif diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h index e0e0bc6beb7..42a7ac402d2 100644 --- a/include/configs/sama5d4_xplained.h +++ b/include/configs/sama5d4_xplained.h @@ -41,8 +41,4 @@ #define CONFIG_SYS_MONITOR_LEN (512 << 10) -#ifdef CONFIG_SD_BOOT -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" -#endif - #endif diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h index 2549d4c1a19..6519956e09c 100644 --- a/include/configs/sama5d4ek.h +++ b/include/configs/sama5d4ek.h @@ -41,8 +41,4 @@ #define CONFIG_SYS_MONITOR_LEN (512 << 10) -#ifdef CONFIG_SD_BOOT -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" -#endif - #endif diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 2b4d05b7165..22c6015e28a 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -59,8 +59,6 @@ #define CONFIG_SPL_BSS_START_ADDR 0x80000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" - #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 10, 11, 12, 13, 14, 15, 16, 17, \ 18, 19, 20, 21, 22, 23, 24, 25, \ diff --git a/include/configs/sniper.h b/include/configs/sniper.h index 2daaadd3146..e8a57faac52 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -58,8 +58,6 @@ #define CONFIG_SYS_SPL_MALLOC_SIZE (1024 * 1024) #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" - /* * Serial */ diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index e8ee53969c4..23467773ce3 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -162,13 +162,6 @@ #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE #endif -/* SPL SDMMC boot support */ -#ifdef CONFIG_SPL_MMC -#if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4) -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" -#endif -#endif - /* SPL QSPI boot support */ /* SPL NAND boot support */ diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 045e66492e4..750cc00f849 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -162,11 +162,4 @@ unsigned int cm_get_l4_sys_free_clk_hz(void); #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR \ - CONFIG_SYS_SPL_MALLOC_SIZE) -/* SPL SDMMC boot support */ -#ifdef CONFIG_SPL_LOAD_FIT -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.itb" -#else -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" -#endif - #endif /* __CONFIG_SOCFPGA_SOC64_COMMON_H__ */ diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index ff5bbad90e7..299eec75bdf 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -93,8 +93,6 @@ #define CONFIG_SPL_BSS_START_ADDR 0x80000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" - #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 /* diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index cd136f696a4..a4fdc2de8b2 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -132,16 +132,8 @@ CONFIG_SPL_TEXT_BASE) #endif - -/* FAT sd card locations. */ -#ifndef CONFIG_SPL_FS_LOAD_PAYLOAD_NAME -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" -#endif - #ifdef CONFIG_SPL_OS_BOOT /* FAT */ -#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" -#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" /* RAW SD card / eMMC */ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x1500 /* address 0x2A0000 */ diff --git a/include/configs/topic_miami.h b/include/configs/topic_miami.h index f859656b396..f8c782123ac 100644 --- a/include/configs/topic_miami.h +++ b/include/configs/topic_miami.h @@ -19,7 +19,6 @@ /* SPL settings */ #undef CONFIG_SPL_MAX_FOOTPRINT #define CONFIG_SPL_MAX_FOOTPRINT CONFIG_SYS_SPI_U_BOOT_OFFS -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" /* Setup proper boot sequences for Miami boards */ diff --git a/include/configs/vyasa-rk3288.h b/include/configs/vyasa-rk3288.h index a51b169c618..fb76e5544ac 100644 --- a/include/configs/vyasa-rk3288.h +++ b/include/configs/vyasa-rk3288.h @@ -22,8 +22,6 @@ #ifndef CONFIG_TPL_BUILD /* Falcon Mode */ -#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" -#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" #define CONFIG_SYS_SPL_ARGS_ADDR 0x0ffe5000 /* Falcon Mode - MMC support: args@16MB kernel@17MB */ diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 31a6beb0111..a007d364bb8 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -215,20 +215,13 @@ #endif /* u-boot is like dtb */ -#define CONFIG_SPL_FS_LOAD_ARGS_NAME "u-boot.bin" #define CONFIG_SYS_SPL_ARGS_ADDR 0x8000000 /* ATF is my kernel image */ -#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "atf-uboot.ub" /* MMC support */ # define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 /* unused */ # define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 /* unused */ -# if defined(CONFIG_SPL_LOAD_FIT) -# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.itb" -# else -# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" -# endif #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU) # define CONFIG_SPL_HASH diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 40ca3cedbb8..a93dbfb1029 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -212,17 +212,9 @@ /* Boot FreeBSD/vxWorks from an ELF image */ #define CONFIG_SYS_MMC_MAX_DEVICE 1 -/* MMC support */ -#ifdef CONFIG_MMC_SDHCI_ZYNQ -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" -#endif - /* Address in RAM where the parameters must be copied by SPL. */ #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000 -#define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb" -#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" - /* Not using MMC raw mode - just for compilation purpose */ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 -- GitLab From ca8a329a1b7f3195ee56fee4c0906ee883383dfa Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 16 May 2022 17:20:26 -0400 Subject: [PATCH 017/581] Convert CONFIG_SPL_PAD_TO et al to Kconfig This converts the following to Kconfig: CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE CONFIG_TPL_PAD_TO CONFIG_TPL_MAX_SIZE Note that we need to make TPL_MAX_SIZE be hex, and so move and convert the existing places. Signed-off-by: Tom Rini --- README | 24 --------- arch/arm/mach-rockchip/px30/Kconfig | 3 -- arch/arm/mach-rockchip/rk322x/Kconfig | 3 -- arch/arm/mach-rockchip/rk3288/Kconfig | 3 -- arch/arm/mach-rockchip/rk3328/Kconfig | 3 -- arch/arm/mach-rockchip/rk3368/Kconfig | 3 -- arch/arm/mach-rockchip/rk3399/Kconfig | 3 -- common/spl/Kconfig | 50 +++++++++++++++++-- configs/P1010RDB-PA_36BIT_NAND_defconfig | 2 + configs/P1010RDB-PA_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PA_NAND_defconfig | 2 + configs/P1010RDB-PA_NOR_defconfig | 1 + configs/P1010RDB-PA_SDCARD_defconfig | 1 + configs/P1010RDB-PA_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_36BIT_NAND_defconfig | 2 + configs/P1010RDB-PB_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_NAND_defconfig | 2 + configs/P1010RDB-PB_NOR_defconfig | 1 + configs/P1010RDB-PB_SDCARD_defconfig | 1 + configs/P1010RDB-PB_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_NAND_defconfig | 2 + configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_defconfig | 1 + configs/P1020RDB-PC_NAND_defconfig | 2 + configs/P1020RDB-PC_SDCARD_defconfig | 1 + configs/P1020RDB-PC_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_defconfig | 1 + configs/P1020RDB-PD_NAND_defconfig | 2 + configs/P1020RDB-PD_SDCARD_defconfig | 1 + configs/P1020RDB-PD_SPIFLASH_defconfig | 1 + configs/P1020RDB-PD_defconfig | 1 + configs/P2020RDB-PC_36BIT_NAND_defconfig | 2 + configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_36BIT_defconfig | 1 + configs/P2020RDB-PC_NAND_defconfig | 2 + configs/P2020RDB-PC_SDCARD_defconfig | 1 + configs/P2020RDB-PC_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_defconfig | 1 + configs/T1024RDB_NAND_defconfig | 2 + configs/T1024RDB_SDCARD_defconfig | 2 + configs/T1024RDB_SPIFLASH_defconfig | 2 + configs/T1042D4RDB_NAND_defconfig | 2 + configs/T1042D4RDB_SDCARD_defconfig | 2 + configs/T1042D4RDB_SPIFLASH_defconfig | 2 + configs/T2080QDS_NAND_defconfig | 2 + configs/T2080QDS_SDCARD_defconfig | 2 + configs/T2080QDS_SPIFLASH_defconfig | 2 + configs/T2080RDB_NAND_defconfig | 2 + configs/T2080RDB_SDCARD_defconfig | 2 + configs/T2080RDB_SPIFLASH_defconfig | 2 + configs/T2080RDB_revD_NAND_defconfig | 2 + configs/T2080RDB_revD_SDCARD_defconfig | 2 + configs/T2080RDB_revD_SPIFLASH_defconfig | 2 + configs/T4240RDB_SDCARD_defconfig | 2 + configs/ae350_rv32_spl_defconfig | 3 +- configs/ae350_rv32_spl_xip_defconfig | 3 +- configs/ae350_rv64_spl_defconfig | 3 +- configs/ae350_rv64_spl_xip_defconfig | 3 +- configs/alt_defconfig | 1 + configs/am335x_hs_evm_defconfig | 1 + configs/am335x_hs_evm_uart_defconfig | 1 + configs/am3517_evm_defconfig | 1 + configs/am43xx_evm_defconfig | 1 + configs/am43xx_evm_rtconly_defconfig | 1 + configs/am43xx_evm_usbhost_boot_defconfig | 1 + configs/am43xx_hs_evm_defconfig | 1 + configs/am57xx_evm_defconfig | 1 + configs/am57xx_hs_evm_defconfig | 1 + configs/am57xx_hs_evm_usb_defconfig | 1 + configs/am64x_evm_a53_defconfig | 1 + configs/am64x_evm_r5_defconfig | 1 + configs/am65x_evm_a53_defconfig | 1 + configs/am65x_evm_r5_defconfig | 1 + configs/am65x_evm_r5_usbdfu_defconfig | 1 + configs/am65x_evm_r5_usbmsc_defconfig | 1 + configs/am65x_hs_evm_a53_defconfig | 1 + configs/am65x_hs_evm_r5_defconfig | 1 + configs/at91sam9m10g45ek_mmc_defconfig | 1 + configs/at91sam9m10g45ek_nandflash_defconfig | 1 + configs/at91sam9n12ek_mmc_defconfig | 1 + configs/at91sam9n12ek_nandflash_defconfig | 1 + configs/at91sam9n12ek_spiflash_defconfig | 1 + configs/at91sam9x5ek_dataflash_defconfig | 1 + configs/at91sam9x5ek_mmc_defconfig | 1 + configs/at91sam9x5ek_nandflash_defconfig | 1 + configs/at91sam9x5ek_spiflash_defconfig | 1 + ...edev_cc_v1_0_ultrazedev_som_v1_0_defconfig | 1 + configs/axm_defconfig | 2 + configs/bitmain_antminer_s9_defconfig | 1 + configs/cgtqmx8_defconfig | 1 + configs/chromebit_mickey_defconfig | 1 + configs/chromebook_bob_defconfig | 2 + configs/chromebook_jerry_defconfig | 1 + configs/chromebook_kevin_defconfig | 2 + configs/chromebook_minnie_defconfig | 1 + configs/chromebook_speedy_defconfig | 1 + configs/ci20_mmc_defconfig | 1 + configs/cl-som-imx7_defconfig | 1 + configs/clearfog_defconfig | 1 + configs/cm_t43_defconfig | 1 + configs/controlcenterdc_defconfig | 1 + configs/corvus_defconfig | 2 + configs/da850evm_defconfig | 1 + configs/da850evm_nand_defconfig | 1 + configs/db-88f6720_defconfig | 1 + configs/db-88f6820-amc_defconfig | 1 + configs/db-88f6820-gp_defconfig | 1 + configs/db-mv784mp-gp_defconfig | 1 + configs/deneb_defconfig | 1 + configs/devkit3250_defconfig | 1 + configs/devkit8000_defconfig | 1 + configs/dra7xx_evm_defconfig | 1 + configs/dra7xx_hs_evm_defconfig | 1 + configs/dra7xx_hs_evm_usb_defconfig | 1 + configs/ds414_defconfig | 1 + configs/edminiv2_defconfig | 1 + configs/elgin-rv1108_defconfig | 1 + configs/evb-px30_defconfig | 3 ++ configs/evb-px5_defconfig | 3 ++ configs/evb-rk3036_defconfig | 1 + configs/evb-rk3128_defconfig | 1 + configs/evb-rk3229_defconfig | 3 ++ configs/evb-rk3288_defconfig | 1 + configs/evb-rk3308_defconfig | 2 + configs/evb-rk3328_defconfig | 3 ++ configs/evb-rk3399_defconfig | 2 + configs/evb-rk3568_defconfig | 2 + configs/evb-rv1108_defconfig | 1 + configs/ficus-rk3399_defconfig | 2 + configs/firefly-px30_defconfig | 3 ++ configs/firefly-rk3288_defconfig | 1 + configs/firefly-rk3399_defconfig | 2 + .../gardena-smart-gateway-at91sam_defconfig | 2 + .../gardena-smart-gateway-mt7688_defconfig | 1 + configs/geekbox_defconfig | 2 + configs/giedi_defconfig | 1 + configs/gose_defconfig | 1 + configs/helios4_defconfig | 1 + configs/igep00x0_defconfig | 1 + configs/imx7_cm_defconfig | 1 + configs/imx8mm-cl-iot-gate-optee_defconfig | 1 + configs/imx8mm-cl-iot-gate_defconfig | 1 + configs/imx8mm-icore-mx8mm-ctouch2_defconfig | 1 + configs/imx8mm-icore-mx8mm-edimm2.2_defconfig | 1 + configs/imx8mm-mx8menlo_defconfig | 1 + configs/imx8mm_beacon_defconfig | 1 + configs/imx8mm_data_modul_edm_sbc_defconfig | 1 + configs/imx8mm_evk_defconfig | 1 + configs/imx8mm_venice_defconfig | 1 + configs/imx8mn_beacon_2g_defconfig | 1 + configs/imx8mn_beacon_defconfig | 1 + configs/imx8mn_bsh_smm_s2_defconfig | 1 + configs/imx8mn_bsh_smm_s2pro_defconfig | 1 + configs/imx8mn_ddr4_evk_defconfig | 1 + configs/imx8mn_evk_defconfig | 1 + configs/imx8mn_var_som_defconfig | 1 + configs/imx8mn_venice_defconfig | 1 + configs/imx8mp_evk_defconfig | 1 + configs/imx8mp_rsb3720a1_4G_defconfig | 1 + configs/imx8mp_rsb3720a1_6G_defconfig | 1 + configs/imx8mp_venice_defconfig | 1 + configs/imx8mq_cm_defconfig | 1 + configs/imx8mq_evk_defconfig | 1 + configs/imx8mq_phanbell_defconfig | 1 + configs/imx8qm_mek_defconfig | 1 + configs/imx8qm_rom7720_a1_4G_defconfig | 1 + configs/imx8qxp_mek_defconfig | 1 + configs/imx8ulp_evk_defconfig | 1 + configs/iot2050_defconfig | 1 + configs/j7200_evm_a72_defconfig | 1 + configs/j7200_evm_r5_defconfig | 1 + configs/j721e_evm_a72_defconfig | 1 + configs/j721e_evm_r5_defconfig | 1 + configs/j721e_hs_evm_a72_defconfig | 1 + configs/j721e_hs_evm_r5_defconfig | 1 + configs/j721s2_evm_a72_defconfig | 1 + configs/j721s2_evm_r5_defconfig | 1 + configs/k2e_evm_defconfig | 1 + configs/k2e_hs_evm_defconfig | 1 + configs/k2g_evm_defconfig | 1 + configs/k2g_hs_evm_defconfig | 1 + configs/k2hk_evm_defconfig | 1 + configs/k2hk_hs_evm_defconfig | 1 + configs/k2l_evm_defconfig | 1 + configs/k2l_hs_evm_defconfig | 1 + configs/khadas-edge-captain-rk3399_defconfig | 2 + configs/khadas-edge-rk3399_defconfig | 2 + configs/khadas-edge-v-rk3399_defconfig | 2 + configs/koelsch_defconfig | 1 + configs/kontron-sl-mx8mm_defconfig | 1 + configs/kontron_pitx_imx8m_defconfig | 1 + configs/kontron_sl28_defconfig | 1 + configs/kylin-rk3036_defconfig | 1 + configs/lager_defconfig | 1 + configs/leez-rk3399_defconfig | 2 + configs/linkit-smart-7688_defconfig | 1 + configs/lion-rk3368_defconfig | 3 ++ configs/ls1021aiot_sdcard_defconfig | 2 + configs/ls1021aqds_nand_defconfig | 2 + configs/ls1021aqds_sdcard_ifc_defconfig | 2 + configs/ls1021aqds_sdcard_qspi_defconfig | 2 + configs/ls1021atsn_sdcard_defconfig | 2 + ...s1021atwr_sdcard_ifc_SECURE_BOOT_defconfig | 2 + configs/ls1021atwr_sdcard_ifc_defconfig | 2 + configs/ls1021atwr_sdcard_qspi_defconfig | 2 + configs/ls1043aqds_nand_defconfig | 2 + configs/ls1043aqds_sdcard_ifc_defconfig | 2 + configs/ls1043aqds_sdcard_qspi_defconfig | 2 + configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 2 + configs/ls1043ardb_nand_defconfig | 2 + .../ls1043ardb_sdcard_SECURE_BOOT_defconfig | 2 + configs/ls1043ardb_sdcard_defconfig | 2 + configs/ls1046aqds_nand_defconfig | 2 + configs/ls1046aqds_sdcard_ifc_defconfig | 2 + configs/ls1046aqds_sdcard_qspi_defconfig | 2 + configs/ls1046ardb_emmc_defconfig | 2 + configs/ls1046ardb_qspi_spl_defconfig | 2 + .../ls1046ardb_sdcard_SECURE_BOOT_defconfig | 2 + configs/ls1046ardb_sdcard_defconfig | 2 + configs/ls1088aqds_sdcard_ifc_defconfig | 1 + configs/ls1088aqds_sdcard_qspi_defconfig | 1 + ...1088ardb_sdcard_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1088ardb_sdcard_qspi_defconfig | 1 + configs/ls2080aqds_SECURE_BOOT_defconfig | 1 + configs/ls2080aqds_defconfig | 1 + configs/ls2080aqds_nand_defconfig | 2 + configs/ls2080aqds_qspi_defconfig | 1 + configs/ls2080aqds_sdcard_defconfig | 1 + configs/ls2080ardb_SECURE_BOOT_defconfig | 1 + configs/ls2080ardb_defconfig | 1 + configs/ls2080ardb_nand_defconfig | 2 + configs/ls2081ardb_defconfig | 1 + configs/ls2088aqds_tfa_defconfig | 1 + configs/ls2088ardb_qspi_SECURE_BOOT_defconfig | 1 + configs/ls2088ardb_qspi_defconfig | 1 + configs/ls2088ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls2088ardb_tfa_defconfig | 1 + configs/m53menlo_defconfig | 1 + configs/maxbcm_defconfig | 1 + configs/miqi-rk3288_defconfig | 1 + configs/mk808_defconfig | 4 +- configs/mt7620_mt7530_rfb_defconfig | 1 + configs/mt7620_rfb_defconfig | 1 + configs/mt7628_rfb_defconfig | 1 + configs/mt7629_rfb_defconfig | 1 + configs/nanopc-t4-rk3399_defconfig | 2 + configs/nanopi-m4-2gb-rk3399_defconfig | 2 + configs/nanopi-m4-rk3399_defconfig | 2 + configs/nanopi-m4b-rk3399_defconfig | 2 + configs/nanopi-neo4-rk3399_defconfig | 2 + configs/nanopi-r2s-rk3328_defconfig | 3 ++ configs/nanopi-r4s-rk3399_defconfig | 2 + configs/odroid-go2_defconfig | 3 ++ configs/omap35_logic_defconfig | 1 + configs/omap35_logic_somlv_defconfig | 1 + configs/omap3_beagle_defconfig | 1 + configs/omap3_evm_defconfig | 1 + configs/omap3_logic_defconfig | 1 + configs/omap3_logic_somlv_defconfig | 1 + configs/omap4_panda_defconfig | 1 + configs/omap4_sdp4430_defconfig | 1 + configs/omap5_uevm_defconfig | 1 + configs/omapl138_lcdk_defconfig | 1 + configs/openpiton_riscv64_spl_defconfig | 1 + configs/orangepi-rk3399_defconfig | 2 + configs/orangepi_zero2_defconfig | 1 + configs/phycore-imx8mm_defconfig | 1 + configs/phycore-imx8mp_defconfig | 1 + configs/phycore-rk3288_defconfig | 1 + configs/pico-dwarf-imx7d_defconfig | 1 + configs/pico-hobbit-imx7d_defconfig | 1 + configs/pico-imx7d_bl33_defconfig | 1 + configs/pico-imx7d_defconfig | 1 + configs/pico-imx8mq_defconfig | 1 + configs/pico-nymph-imx7d_defconfig | 1 + configs/pico-pi-imx7d_defconfig | 1 + configs/pinebook-pro-rk3399_defconfig | 2 + configs/pm9g45_defconfig | 1 + configs/popmetal-rk3288_defconfig | 1 + configs/porter_defconfig | 1 + configs/puma-rk3399_defconfig | 2 + configs/px30-core-ctouch2-of10-px30_defconfig | 3 ++ configs/px30-core-ctouch2-px30_defconfig | 3 ++ configs/px30-core-edimm2.2-px30_defconfig | 3 ++ configs/qemu-riscv32_spl_defconfig | 1 + configs/qemu-riscv64_spl_defconfig | 1 + configs/roc-cc-rk3308_defconfig | 2 + configs/roc-cc-rk3328_defconfig | 3 ++ configs/roc-pc-mezzanine-rk3399_defconfig | 2 + configs/roc-pc-rk3399_defconfig | 2 + configs/rock-pi-4-rk3399_defconfig | 2 + configs/rock-pi-4c-rk3399_defconfig | 2 + configs/rock-pi-e-rk3328_defconfig | 3 ++ configs/rock-pi-n10-rk3399pro_defconfig | 2 + configs/rock-pi-n8-rk3288_defconfig | 1 + configs/rock2_defconfig | 1 + configs/rock64-rk3328_defconfig | 3 ++ configs/rock960-rk3399_defconfig | 2 + configs/rock_defconfig | 2 + configs/rockpro64-rk3399_defconfig | 2 + configs/sama5d27_giantboard_defconfig | 1 + configs/sama5d27_som1_ek_mmc1_defconfig | 1 + configs/sama5d27_som1_ek_mmc_defconfig | 1 + configs/sama5d27_som1_ek_qspiflash_defconfig | 1 + configs/sama5d27_wlsom1_ek_mmc_defconfig | 1 + .../sama5d27_wlsom1_ek_qspiflash_defconfig | 1 + configs/sama5d2_icp_mmc_defconfig | 1 + configs/sama5d2_icp_qspiflash_defconfig | 1 + configs/sama5d2_xplained_emmc_defconfig | 1 + configs/sama5d2_xplained_mmc_defconfig | 1 + configs/sama5d2_xplained_qspiflash_defconfig | 1 + configs/sama5d2_xplained_spiflash_defconfig | 1 + configs/sama5d36ek_cmp_mmc_defconfig | 1 + configs/sama5d36ek_cmp_nandflash_defconfig | 1 + configs/sama5d36ek_cmp_spiflash_defconfig | 1 + configs/sama5d3_xplained_mmc_defconfig | 1 + configs/sama5d3_xplained_nandflash_defconfig | 1 + configs/sama5d3xek_mmc_defconfig | 1 + configs/sama5d3xek_nandflash_defconfig | 1 + configs/sama5d3xek_spiflash_defconfig | 1 + configs/sama5d4_xplained_mmc_defconfig | 1 + configs/sama5d4_xplained_nandflash_defconfig | 1 + configs/sama5d4_xplained_spiflash_defconfig | 1 + configs/sama5d4ek_mmc_defconfig | 1 + configs/sama5d4ek_nandflash_defconfig | 1 + configs/sama5d4ek_spiflash_defconfig | 1 + configs/sheep-rk3368_defconfig | 2 + configs/sifive_unleashed_defconfig | 1 + configs/sifive_unmatched_defconfig | 1 + configs/silk_defconfig | 1 + configs/smartweb_defconfig | 2 + configs/sniper_defconfig | 1 + configs/socfpga_agilex_atf_defconfig | 1 + configs/socfpga_agilex_defconfig | 1 + configs/socfpga_agilex_vab_defconfig | 1 + configs/socfpga_arria10_defconfig | 1 + configs/socfpga_arria5_defconfig | 1 + configs/socfpga_cyclone5_defconfig | 1 + configs/socfpga_dbm_soc1_defconfig | 1 + configs/socfpga_de0_nano_soc_defconfig | 1 + configs/socfpga_de10_nano_defconfig | 1 + configs/socfpga_de10_standard_defconfig | 1 + configs/socfpga_de1_soc_defconfig | 1 + configs/socfpga_is1_defconfig | 1 + configs/socfpga_mcvevk_defconfig | 1 + configs/socfpga_n5x_atf_defconfig | 1 + configs/socfpga_n5x_defconfig | 1 + configs/socfpga_n5x_vab_defconfig | 1 + configs/socfpga_secu1_defconfig | 1 + configs/socfpga_sockit_defconfig | 1 + configs/socfpga_socrates_defconfig | 1 + configs/socfpga_sr1500_defconfig | 1 + configs/socfpga_stratix10_atf_defconfig | 1 + configs/socfpga_stratix10_defconfig | 1 + configs/socfpga_vining_fpga_defconfig | 1 + configs/stm32746g-eval_defconfig | 1 + configs/stm32746g-eval_spl_defconfig | 1 + configs/stm32f746-disco_defconfig | 1 + configs/stm32f746-disco_spl_defconfig | 1 + configs/stm32f769-disco_defconfig | 1 + configs/stm32f769-disco_spl_defconfig | 1 + configs/stout_defconfig | 1 + configs/syzygy_hub_defconfig | 1 + configs/taurus_defconfig | 2 + configs/theadorable_debug_defconfig | 1 + configs/ti816x_evm_defconfig | 1 + configs/tinker-rk3288_defconfig | 1 + configs/tinker-s-rk3288_defconfig | 3 +- configs/topic_miami_defconfig | 1 + configs/topic_miamilite_defconfig | 1 + configs/topic_miamiplus_defconfig | 1 + configs/turris_omnia_defconfig | 1 + configs/uniphier_ld4_sld8_defconfig | 2 + configs/uniphier_v7_defconfig | 2 + configs/uniphier_v8_defconfig | 2 + configs/verdin-imx8mm_defconfig | 1 + configs/verdin-imx8mp_defconfig | 1 + configs/vocore2_defconfig | 1 + configs/vyasa-rk3288_defconfig | 1 + configs/work_92105_defconfig | 1 + configs/x530_defconfig | 1 + configs/xilinx_zynq_virt_defconfig | 1 + configs/xilinx_zynqmp_mini_defconfig | 1 + configs/xilinx_zynqmp_mini_emmc0_defconfig | 1 + configs/xilinx_zynqmp_mini_emmc1_defconfig | 1 + configs/xilinx_zynqmp_mini_nand_defconfig | 1 + .../xilinx_zynqmp_mini_nand_single_defconfig | 1 + configs/xilinx_zynqmp_mini_qspi_defconfig | 1 + configs/xilinx_zynqmp_virt_defconfig | 1 + configs/zynq_cse_nand_defconfig | 1 + configs/zynq_cse_nor_defconfig | 1 + configs/zynq_cse_qspi_defconfig | 1 + include/config_fallbacks.h | 8 --- include/configs/P1010RDB.h | 9 ---- include/configs/T102xRDB.h | 2 - include/configs/T104xRDB.h | 2 - include/configs/T208xQDS.h | 2 - include/configs/T208xRDB.h | 2 - include/configs/T4240RDB.h | 2 - include/configs/alt.h | 1 - include/configs/am64x_evm.h | 1 - include/configs/am65x_evm.h | 2 - include/configs/at91sam9m10g45ek.h | 1 - include/configs/at91sam9n12ek.h | 1 - include/configs/at91sam9x5ek.h | 1 - include/configs/ax25-ae350.h | 1 - include/configs/bur_am335x_common.h | 2 - include/configs/capricorn-common.h | 1 - include/configs/cgtqmx8.h | 1 - include/configs/ci20.h | 2 - include/configs/clearfog.h | 1 - include/configs/controlcenterdc.h | 6 --- include/configs/corvus.h | 2 - include/configs/da850evm.h | 4 -- include/configs/db-88f6720.h | 1 - include/configs/db-88f6820-amc.h | 1 - include/configs/db-88f6820-gp.h | 1 - include/configs/db-mv784mp-gp.h | 1 - include/configs/devkit3250.h | 3 -- include/configs/ds414.h | 1 - include/configs/edminiv2.h | 1 - .../configs/gardena-smart-gateway-at91sam.h | 2 - .../configs/gardena-smart-gateway-mt7688.h | 2 - include/configs/gose.h | 1 - include/configs/helios4.h | 1 - include/configs/imx6_spl.h | 4 -- include/configs/imx7_spl.h | 2 - include/configs/imx8mm-cl-iot-gate.h | 1 - include/configs/imx8mm_beacon.h | 1 - include/configs/imx8mm_data_modul_edm_sbc.h | 1 - include/configs/imx8mm_evk.h | 1 - include/configs/imx8mm_icore_mx8mm.h | 1 - include/configs/imx8mm_venice.h | 1 - include/configs/imx8mn_beacon.h | 1 - include/configs/imx8mn_bsh_smm_s2_common.h | 1 - include/configs/imx8mn_evk.h | 1 - include/configs/imx8mn_var_som.h | 1 - include/configs/imx8mn_venice.h | 1 - include/configs/imx8mp_evk.h | 1 - include/configs/imx8mp_rsb3720.h | 1 - include/configs/imx8mp_venice.h | 1 - include/configs/imx8mq_cm.h | 1 - include/configs/imx8mq_evk.h | 1 - include/configs/imx8mq_phanbell.h | 1 - include/configs/imx8qm_mek.h | 1 - include/configs/imx8qm_rom7720.h | 1 - include/configs/imx8qxp_mek.h | 1 - include/configs/imx8ulp_evk.h | 1 - include/configs/iot2050.h | 2 - include/configs/j721e_evm.h | 2 - include/configs/j721s2_evm.h | 2 - include/configs/koelsch.h | 1 - include/configs/kontron-sl-mx8mm.h | 1 - include/configs/kontron_pitx_imx8m.h | 1 - include/configs/kontron_sl28.h | 1 - include/configs/lager.h | 1 - include/configs/linkit-smart-7688.h | 2 - include/configs/ls1021aiot.h | 2 - include/configs/ls1021aqds.h | 4 -- include/configs/ls1021atsn.h | 2 - include/configs/ls1021atwr.h | 2 - include/configs/ls1043a_common.h | 3 -- include/configs/ls1043aqds.h | 1 - include/configs/ls1043ardb.h | 1 - include/configs/ls1046a_common.h | 5 -- include/configs/ls1046aqds.h | 1 - include/configs/ls1088a_common.h | 1 - include/configs/ls2080a_common.h | 1 - include/configs/ls2080aqds.h | 1 - include/configs/ls2080ardb.h | 1 - include/configs/m53menlo.h | 1 - include/configs/maxbcm.h | 1 - include/configs/mt7620.h | 2 - include/configs/mt7628.h | 2 - include/configs/mt7629.h | 2 - include/configs/omapl138_lcdk.h | 1 - include/configs/openpiton-riscv64.h | 1 - include/configs/p1_p2_rdb_pc.h | 8 --- include/configs/phycore_imx8mm.h | 1 - include/configs/phycore_imx8mp.h | 1 - include/configs/pico-imx8mq.h | 1 - include/configs/pm9g45.h | 1 - include/configs/porter.h | 1 - include/configs/px30_common.h | 1 - include/configs/qemu-riscv.h | 1 - include/configs/rcar-gen3-common.h | 1 - include/configs/rk3066_common.h | 2 - include/configs/rk3188_common.h | 1 - include/configs/rk322x_common.h | 1 - include/configs/rk3308_common.h | 1 - include/configs/rk3328_common.h | 1 - include/configs/rk3368_common.h | 1 - include/configs/rk3399_common.h | 2 - include/configs/rk3568_common.h | 1 - include/configs/rockchip-common.h | 1 - include/configs/sama5d27_som1_ek.h | 1 - include/configs/sama5d27_wlsom1_ek.h | 1 - include/configs/sama5d2_icp.h | 1 - include/configs/sama5d2_xplained.h | 1 - include/configs/sama5d3_xplained.h | 1 - include/configs/sama5d3xek.h | 1 - include/configs/sama5d4_xplained.h | 1 - include/configs/sama5d4ek.h | 1 - include/configs/siemens-am33x-common.h | 2 - include/configs/sifive-unleashed.h | 1 - include/configs/sifive-unmatched.h | 1 - include/configs/silk.h | 1 - include/configs/smartweb.h | 2 - include/configs/sniper.h | 2 - include/configs/socfpga_common.h | 5 -- include/configs/socfpga_soc64_common.h | 1 - include/configs/stm32f746-disco.h | 1 - include/configs/stout.h | 1 - include/configs/sunxi-common.h | 8 --- include/configs/taurus.h | 2 - include/configs/theadorable.h | 1 - include/configs/ti814x_evm.h | 2 - include/configs/ti816x_evm.h | 2 - include/configs/ti_armv7_common.h | 4 -- include/configs/ti_armv7_keystone2.h | 2 - include/configs/turris_omnia.h | 1 - include/configs/uniphier.h | 3 -- include/configs/verdin-imx8mm.h | 1 - include/configs/verdin-imx8mp.h | 1 - include/configs/vocore2.h | 2 - include/configs/work_92105.h | 1 - include/configs/x530.h | 1 - include/configs/xilinx_zynqmp.h | 1 - include/configs/zynq-common.h | 1 - scripts/Makefile.spl | 2 +- 536 files changed, 561 insertions(+), 281 deletions(-) diff --git a/README b/README index f39b215d019..074fabb4e91 100644 --- a/README +++ b/README @@ -1665,12 +1665,6 @@ The following options need to be configured: CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE must not be both defined at the same time. - CONFIG_SPL_MAX_SIZE - Maximum size of the SPL image (text, data, rodata, and - linker lists sections), BSS excluded. - When defined, the linker checks that the actual size does - not exceed it. - CONFIG_SPL_RELOC_TEXT_BASE Address to relocate to. If unspecified, this is equal to CONFIG_SPL_TEXT_BASE (i.e. no relocation is done). @@ -1760,13 +1754,6 @@ The following options need to be configured: CONFIG_SPL_RAM_DEVICE Support for running image already present in ram, in SPL binary - CONFIG_SPL_PAD_TO - Image offset to which the SPL should be padded before appending - the SPL payload. By default, this is defined as - CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined. - CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL - payload without any padding, or >= CONFIG_SPL_MAX_SIZE. - CONFIG_SPL_TARGET Final target image containing SPL and payload. Some SPLs use an arch-specific makefile fragment instead, for @@ -1778,17 +1765,6 @@ The following options need to be configured: option to re-enable it. This will affect the output of the bootm command when booting a FIT image. -- TPL framework - CONFIG_TPL - Enable building of TPL globally. - - CONFIG_TPL_PAD_TO - Image offset to which the TPL should be padded before appending - the TPL payload. By default, this is defined as - CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined. - CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL - payload without any padding, or >= CONFIG_SPL_MAX_SIZE. - - Interrupt support (PPC): There are common interrupt_init() and timer_interrupt() diff --git a/arch/arm/mach-rockchip/px30/Kconfig b/arch/arm/mach-rockchip/px30/Kconfig index 4886fe946e3..28639c00414 100644 --- a/arch/arm/mach-rockchip/px30/Kconfig +++ b/arch/arm/mach-rockchip/px30/Kconfig @@ -56,9 +56,6 @@ config TPL_LDSCRIPT config TPL_TEXT_BASE default 0xff0e1000 -config TPL_MAX_SIZE - default 10240 - config TPL_STACK default 0xff0e4fff diff --git a/arch/arm/mach-rockchip/rk322x/Kconfig b/arch/arm/mach-rockchip/rk322x/Kconfig index 058f848ddc7..9ad1f54055b 100644 --- a/arch/arm/mach-rockchip/rk322x/Kconfig +++ b/arch/arm/mach-rockchip/rk322x/Kconfig @@ -26,9 +26,6 @@ config SPL_LIBGENERIC_SUPPORT config SPL_SERIAL default y -config TPL_MAX_SIZE - default 28672 - config TPL_STACK default 0x10088000 diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig index dd8c7826fc1..e8c57843a38 100644 --- a/arch/arm/mach-rockchip/rk3288/Kconfig +++ b/arch/arm/mach-rockchip/rk3288/Kconfig @@ -172,9 +172,6 @@ config SPL_SERIAL config TPL_LDSCRIPT default "arch/arm/mach-rockchip/u-boot-tpl.lds" -config TPL_MAX_SIZE - default 32768 - config TPL_STACK default 0xff718000 diff --git a/arch/arm/mach-rockchip/rk3328/Kconfig b/arch/arm/mach-rockchip/rk3328/Kconfig index f6f1e06a83f..d5cb649ae6b 100644 --- a/arch/arm/mach-rockchip/rk3328/Kconfig +++ b/arch/arm/mach-rockchip/rk3328/Kconfig @@ -36,9 +36,6 @@ config TPL_LDSCRIPT config TPL_TEXT_BASE default 0xff091000 -config TPL_MAX_SIZE - default 28672 - config TPL_STACK default 0xff098000 diff --git a/arch/arm/mach-rockchip/rk3368/Kconfig b/arch/arm/mach-rockchip/rk3368/Kconfig index 104db36737b..25afd3cb607 100644 --- a/arch/arm/mach-rockchip/rk3368/Kconfig +++ b/arch/arm/mach-rockchip/rk3368/Kconfig @@ -71,9 +71,6 @@ config SPL_LDSCRIPT config SPL_STACK_R_ADDR default 0x04000000 -config TPL_MAX_SIZE - default 28672 - config TPL_STACK default 0xff8cffff diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig index c1f251316cb..b48feeb3466 100644 --- a/arch/arm/mach-rockchip/rk3399/Kconfig +++ b/arch/arm/mach-rockchip/rk3399/Kconfig @@ -143,9 +143,6 @@ config SPL_LIBGENERIC_SUPPORT config TPL_LDSCRIPT default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds" -config TPL_MAX_SIZE - default 188416 - config TPL_STACK default 0xff8effff diff --git a/common/spl/Kconfig b/common/spl/Kconfig index df2075c7cf2..ff8690d4f6a 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -75,6 +75,36 @@ config SPL_SIZE_LIMIT_PROVIDE_STACK of SRAM available for SPL when the stack required before reolcation uses this SRAM, too. +config SPL_MAX_SIZE + hex "Maximum size of the SPL image, excluding BSS" + default 0x30000 if ARCH_MX6 && MX6_OCRAM_256KB + default 0x1b000 if AM33XX && !TI_SECURE_DEVICE + default 0x10000 if ARCH_MX6 && !MX6_OCRAM_256KB + default 0x7fa0 if SUNXI_SRAM_ADDRESS = 0x10000 + default 0x7fa0 if SUNXI_SRAM_ADDRESS = 0x20000 && !MACH_SUN50I_H616 + default 0x7000 if RCAR_GEN3 + default 0x5fa0 if SUNXI_SRAM_ADDRESS = 0x0 + default 0x0 + help + Maximum size of the SPL image (text, data, rodata, and linker lists + sections), BSS excluded. When defined, the linker checks that the + actual size does not exceed it. + +config SPL_PAD_TO + hex "Offset to which the SPL should be padded before appending the SPL payload" + default 0x31000 if ARCH_MX6 && MX6_OCRAM_256KB + default 0x11000 if ARCH_MX7 || (ARCH_MX6 && !MX6_OCRAM_256KB) + default 0x10000 if ARCH_KEYSTONE + default 0x8000 if ARCH_SUNXI && !MACH_SUN50I_H616 + default TPL_MAX_SIZE if TPL_MAX_SIZE > SPL_MAX_SIZE + default SPL_MAX_SIZE + help + Image offset to which the SPL should be padded before appending the + SPL payload. By default, this is defined as CONFIG_SPL_MAX_SIZE, or 0 if + CONFIG_SPL_MAX_SIZE is undefined. CONFIG_SPL_PAD_TO must be either + 0, meaning to append the SPL payload without any padding, or >= + CONFIG_SPL_MAX_SIZE. + config SPL_SYS_STACK_F_CHECK_BYTE hex default 0xaa @@ -1489,12 +1519,26 @@ config TPL_TEXT_BASE The base address for the .text section of the TPL stage. config TPL_MAX_SIZE - int "Maximum size (in bytes) for the TPL stage" - default 0 - depends on TPL + hex "Maximum size (in bytes) for the TPL stage" + default 0x2e000 if ROCKCHIP_RK3399 + default 0x8000 if ROCKCHIP_RK3288 + default 0x7000 if ROCKCHIP_RK322X || ROCKCHIP_RK3328 || ROCKCHIP_RK3368 + default 0x2800 if ROCKCHIP_PX30 + default 0x0 help The maximum size (in bytes) of the TPL stage. +config TPL_PAD_TO + hex "Offset to which the TPL should be padded before appending the TPL payload" + depends on !TPL_FRAMEWORK && PPC + default TPL_MAX_SIZE + help + Image offset to which the TPL should be padded before appending the + TPL payload. By default, this is defined as CONFIG_TPL_MAX_SIZE, or 0 if + CONFIG_TPL_MAX_SIZE is undefined. CONFIG_TPL_PAD_TO must be either + 0, meaning to append the TPL payload without any padding, or >= + CONFIG_TPL_MAX_SIZE. + config TPL_STACK hex "Address of the initial stack-pointer for the TPL stage" depends on TPL_NEEDS_SEPARATE_STACK diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index 79de9b41dcc..ed9ee113695 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -28,11 +28,13 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x2000 CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y +CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_TPL_DRIVERS_MISC=y CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index 0c1cd2f1969..1a78db709c4 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudra CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index 6f6d6445dd7..6845645d47b 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index bef25841163..961d3eafffa 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -29,6 +29,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index a3e6120b948..ee416a581a3 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -27,11 +27,13 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x2000 CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y +CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_TPL_DRIVERS_MISC=y CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index 349c6477a40..d1d08fd818b 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -19,6 +19,7 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudra CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index bb34c0499ed..4298c6d80c1 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index f42ba10be9a..766eb1d5dac 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -28,6 +28,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index b807eb1ee35..10275a313b5 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -29,11 +29,13 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x2000 CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y +CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_TPL_DRIVERS_MISC=y CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 9186e6fafe8..693de45423e 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 3b1912d282f..8c6ff1cd704 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -27,6 +27,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index 8ec1e93426e..74ae1643342 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -30,6 +30,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index eb0e48289d7..d103e9bc02c 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -28,11 +28,13 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x2000 CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y +CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_TPL_DRIVERS_MISC=y CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index b2a3587171d..5d47b6c805e 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index 0b547456a1a..83d4ee205f5 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -26,6 +26,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index c92036e9d95..60513725bc5 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -29,6 +29,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index f5892e98bf7..d6de87f9af3 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -29,11 +29,13 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x1000 CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y +CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C=y CONFIG_TPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index deaeb0a4e1b..6b381204068 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -28,6 +28,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index 4dffe7e5b34..1424742f3ca 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -31,6 +31,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index f127d8c92dc..086fab47d29 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -22,6 +22,7 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$con CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set +CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index ff27fd2a7bf..832a1f3fda5 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -28,11 +28,13 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x1000 CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y +CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C=y CONFIG_TPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index a2d16e31a7a..f3e57082e0a 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -27,6 +27,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 7cd087e01ce..3f965697b26 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -30,6 +30,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 069a35f3df8..36472f75fd8 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -21,6 +21,7 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$con CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set +CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index 9b8793298ed..a42baf4ffd2 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -28,11 +28,13 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x1000 CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y +CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C=y CONFIG_TPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index f7acd3996ce..6443fb0bcce 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -27,6 +27,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index daed834c0fc..a59ec504a9d 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -30,6 +30,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index ccb1e30b4ec..0a69b439340 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -21,6 +21,7 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$con CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set +CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index d6f3fb24222..b337b2c5af6 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -29,11 +29,13 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x1000 CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y +CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C=y CONFIG_TPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 50bf852203c..bb8ce4f3715 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -28,6 +28,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index a99f46a8801..7e9c54b0475 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -31,6 +31,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index cbae767fceb..d550be2e5da 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -22,6 +22,7 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$con CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set +CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 1031ebe4628..37b8edf8e71 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -28,11 +28,13 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x1000 CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y +CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C=y CONFIG_TPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 6c757c2a69e..a10522873c0 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -27,6 +27,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 91ca330b119..75316881fd8 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -30,6 +30,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index f33b69d97d7..48451fdded9 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -21,6 +21,7 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$con CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set +CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index 218985606d1..f328cfde20d 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -32,6 +32,8 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x28000 +CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_FSL_PBL=y CONFIG_SPL_FLUSH_IMAGE=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index d0b7f7174e0..bdfc14e23ae 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -33,6 +33,8 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x28000 +CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_FSL_PBL=y CONFIG_SPL_FLUSH_IMAGE=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index fce2aac36b2..5da72857215 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -36,6 +36,8 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x28000 +CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_FSL_PBL=y CONFIG_SPL_FLUSH_IMAGE=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index 7c0e35b67b4..d5dadf0e675 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -28,6 +28,8 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x28000 +CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_FSL_PBL=y CONFIG_SPL_FLUSH_IMAGE=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index bd9d1aefc60..9ee4d2bc403 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -29,6 +29,8 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x28000 +CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_FSL_PBL=y CONFIG_SPL_FLUSH_IMAGE=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 21a7c18a29b..cde17d28795 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -32,6 +32,8 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x28000 +CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_FSL_PBL=y CONFIG_SPL_FLUSH_IMAGE=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 5b17526766a..56e9817f8a9 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -33,6 +33,8 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudra CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x28000 +CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_FSL_PBL=y CONFIG_SPL_FLUSH_IMAGE=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index a3ec6bc5bc9..640288e6d6a 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -34,6 +34,8 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudra CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x28000 +CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_FSL_PBL=y CONFIG_SPL_FLUSH_IMAGE=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 956835167bd..b3fdedb61bd 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -37,6 +37,8 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudra CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x28000 +CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_FSL_PBL=y CONFIG_SPL_FLUSH_IMAGE=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index 8a6e6899c80..e6249d70e86 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -31,6 +31,8 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudra CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x28000 +CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_FSL_PBL=y CONFIG_SPL_FLUSH_IMAGE=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index beb714a7027..84bc23ba8c4 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -32,6 +32,8 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudra CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x28000 +CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_FSL_PBL=y CONFIG_SPL_FLUSH_IMAGE=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index 14fa9f6efde..29be1322488 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -35,6 +35,8 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudra CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x28000 +CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_FSL_PBL=y CONFIG_SPL_FLUSH_IMAGE=y diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index 3ba54841f2a..5e799cf3fde 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -32,6 +32,8 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudra CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x28000 +CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_FSL_PBL=y CONFIG_SPL_FLUSH_IMAGE=y diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index 9afa79b0f71..5ab3becef4e 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -33,6 +33,8 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudra CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x28000 +CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_FSL_PBL=y CONFIG_SPL_FLUSH_IMAGE=y diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index f86de3a6852..ae28d8da063 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -36,6 +36,8 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudra CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x28000 +CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_FSL_PBL=y CONFIG_SPL_FLUSH_IMAGE=y diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index fe5481ec7fc..b6edf0f787e 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -30,6 +30,8 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudra CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x28000 +CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_FSL_PBL=y CONFIG_SPL_FLUSH_IMAGE=y diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig index 17e8fb730ab..45eb33eae88 100644 --- a/configs/ae350_rv32_spl_defconfig +++ b/configs/ae350_rv32_spl_defconfig @@ -15,7 +15,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x00200000 CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_BINMAN_FDT is not set +CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_IMLS=y @@ -43,3 +43,4 @@ CONFIG_BAUDRATE=38400 CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_ATCSPI200_SPI=y +# CONFIG_BINMAN_FDT is not set diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig index bd8b05879d7..e5c5d9680e1 100644 --- a/configs/ae350_rv32_spl_xip_defconfig +++ b/configs/ae350_rv32_spl_xip_defconfig @@ -17,7 +17,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x80010000 CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_BINMAN_FDT is not set +CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_IMLS=y @@ -45,3 +45,4 @@ CONFIG_BAUDRATE=38400 CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_ATCSPI200_SPI=y +# CONFIG_BINMAN_FDT is not set diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig index 8c23ebaf211..856b0c06bc0 100644 --- a/configs/ae350_rv64_spl_defconfig +++ b/configs/ae350_rv64_spl_defconfig @@ -16,7 +16,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x00200000 CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_BINMAN_FDT is not set +CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_IMLS=y @@ -44,3 +44,4 @@ CONFIG_BAUDRATE=38400 CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_ATCSPI200_SPI=y +# CONFIG_BINMAN_FDT is not set diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig index 65b1686c4ef..9536fc58208 100644 --- a/configs/ae350_rv64_spl_xip_defconfig +++ b/configs/ae350_rv64_spl_xip_defconfig @@ -18,7 +18,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x80010000 CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_BINMAN_FDT is not set +CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_IMLS=y @@ -46,3 +46,4 @@ CONFIG_BAUDRATE=38400 CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_ATCSPI200_SPI=y +# CONFIG_BINMAN_FDT is not set diff --git a/configs/alt_defconfig b/configs/alt_defconfig index 5a75381bb3f..8a7fe556925 100644 --- a/configs/alt_defconfig +++ b/configs/alt_defconfig @@ -28,6 +28,7 @@ CONFIG_SYS_LOAD_ADDR=0x50000000 CONFIG_ENV_ADDR=0xC0000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 +CONFIG_SPL_MAX_SIZE=0x4000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_RAM_SUPPORT=y diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig index 7123a167eb3..36ebff3d397 100644 --- a/configs/am335x_hs_evm_defconfig +++ b/configs/am335x_hs_evm_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTCOMMAND="run findfdt; run init_console; run finduuid; run distro_boot CONFIG_LOGLEVEL=3 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_MAX_SIZE=0xb0b0 CONFIG_SPL_FIT_IMAGE_TINY=y # CONFIG_SPL_ENV_SUPPORT is not set # CONFIG_SPL_FS_EXT4 is not set diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig index 120f3ad9c4d..cd1f7e3722c 100644 --- a/configs/am335x_hs_evm_uart_defconfig +++ b/configs/am335x_hs_evm_uart_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTCOMMAND="run findfdt; run init_console; run finduuid; run distro_boot CONFIG_LOGLEVEL=3 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_MAX_SIZE=0x9ab0 CONFIG_SPL_FIT_IMAGE_TINY=y # CONFIG_SPL_ENV_SUPPORT is not set # CONFIG_SPL_FS_EXT4 is not set diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig index 26468ca2a9c..1ae12cb6fbd 100644 --- a/configs/am3517_evm_defconfig +++ b/configs/am3517_evm_defconfig @@ -16,6 +16,7 @@ CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=10 CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then echo SD/MMC found on device $mmcdev; if run loadbootenv; then run importbootenv; fi; echo Checking if uenvcmd is set ...; if test -n $uenvcmd; then echo Running uenvcmd ...; run uenvcmd; fi; echo Running default loadimage ...; setenv bootfile zImage; if run loadimage; then run loadfdt; run mmcboot; fi; else run nandboot; fi" +CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set # CONFIG_SPL_FS_EXT4 is not set diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig index 24ecf1fbe02..282fcf6e0f6 100644 --- a/configs/am43xx_evm_defconfig +++ b/configs/am43xx_evm_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_MISC_INIT_R is not set +CONFIG_SPL_MAX_SIZE=0x439e0 CONFIG_SPL_ETH=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_MTD_SUPPORT=y diff --git a/configs/am43xx_evm_rtconly_defconfig b/configs/am43xx_evm_rtconly_defconfig index 6c9a62c40df..b28b3a133f0 100644 --- a/configs/am43xx_evm_rtconly_defconfig +++ b/configs/am43xx_evm_rtconly_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_MISC_INIT_R is not set +CONFIG_SPL_MAX_SIZE=0x439e0 CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig index 2bd98cf4f7e..14a34501c93 100644 --- a/configs/am43xx_evm_usbhost_boot_defconfig +++ b/configs/am43xx_evm_usbhost_boot_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_MISC_INIT_R is not set +CONFIG_SPL_MAX_SIZE=0x37690 CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig index 33b008f5a90..6b08ebe9894 100644 --- a/configs/am43xx_hs_evm_defconfig +++ b/configs/am43xx_hs_evm_defconfig @@ -22,6 +22,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_MISC_INIT_R is not set +CONFIG_SPL_MAX_SIZE=0x36100 CONFIG_SPL_ETH=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_MTD_SUPPORT=y diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index 2769d3518c6..400a1ae5c82 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -26,6 +26,7 @@ CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_MISC_INIT_R is not set CONFIG_AVB_VERIFY=y CONFIG_ANDROID_AB=y +CONFIG_SPL_MAX_SIZE=0x7bc00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_DMA=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index 2d23db26c6b..7131b1c9c00 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -29,6 +29,7 @@ CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_MISC_INIT_R is not set CONFIG_AVB_VERIFY=y CONFIG_ANDROID_AB=y +CONFIG_SPL_MAX_SIZE=0x7a8b0 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_DMA=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index b218b1b50d0..bf3934729c4 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -32,6 +32,7 @@ CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_MISC_INIT_R is not set CONFIG_AVB_VERIFY=y CONFIG_ANDROID_AB=y +CONFIG_SPL_MAX_SIZE=0x74eb0 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_DMA=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig index ed603a19f5b..9e251c1ed90 100644 --- a/configs/am64x_evm_a53_defconfig +++ b/configs/am64x_evm_a53_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run get_kern_${boot}; run get_fdt_${boot}; run run_kern" CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x180000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y diff --git a/configs/am64x_evm_r5_defconfig b/configs/am64x_evm_r5_defconfig index 0f76a0a8824..6ad98a43032 100644 --- a/configs/am64x_evm_r5_defconfig +++ b/configs/am64x_evm_r5_defconfig @@ -31,6 +31,7 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y +CONFIG_SPL_MAX_SIZE=0x180000 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig index 236e32f21a3..3915c3bb5b4 100644 --- a/configs/am65x_evm_a53_defconfig +++ b/configs/am65x_evm_a53_defconfig @@ -33,6 +33,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run init_${boot}; run boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern" CONFIG_LOGLEVEL=7 CONFIG_CONSOLE_MUX=y +CONFIG_SPL_MAX_SIZE=0x58000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index f5d4e32ddf6..cea8231c106 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -31,6 +31,7 @@ CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y +CONFIG_SPL_MAX_SIZE=0x58000 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y diff --git a/configs/am65x_evm_r5_usbdfu_defconfig b/configs/am65x_evm_r5_usbdfu_defconfig index d6b3bb5521c..ea237914af3 100644 --- a/configs/am65x_evm_r5_usbdfu_defconfig +++ b/configs/am65x_evm_r5_usbdfu_defconfig @@ -23,6 +23,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_MAX_SIZE=0x58000 CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_EARLY_BSS=y diff --git a/configs/am65x_evm_r5_usbmsc_defconfig b/configs/am65x_evm_r5_usbmsc_defconfig index 3d8b6deb221..41fabd44f6f 100644 --- a/configs/am65x_evm_r5_usbmsc_defconfig +++ b/configs/am65x_evm_r5_usbmsc_defconfig @@ -22,6 +22,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_LOAD_FIT=y CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_MAX_SIZE=0x58000 CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_EARLY_BSS=y diff --git a/configs/am65x_hs_evm_a53_defconfig b/configs/am65x_hs_evm_a53_defconfig index 99c78d3b425..0dc42101901 100644 --- a/configs/am65x_hs_evm_a53_defconfig +++ b/configs/am65x_hs_evm_a53_defconfig @@ -33,6 +33,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run get_fit_${boot}; run get_overlaystring; run run_fit" CONFIG_LOGLEVEL=7 CONFIG_CONSOLE_MUX=y +CONFIG_SPL_MAX_SIZE=0x58000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/am65x_hs_evm_r5_defconfig b/configs/am65x_hs_evm_r5_defconfig index 8826be3fc87..214349dab17 100644 --- a/configs/am65x_hs_evm_r5_defconfig +++ b/configs/am65x_hs_evm_r5_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_MAX_SIZE=0x58000 CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_EARLY_BSS=y diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig index b6cc3754298..72b747f7787 100644 --- a/configs/at91sam9m10g45ek_mmc_defconfig +++ b/configs/at91sam9m10g45ek_mmc_defconfig @@ -23,6 +23,7 @@ CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x71000000 dtb; fatload mmc 0:1 0x72000000 z CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_RESET_PHY_R=y +CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_CBSIZE=256 diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig b/configs/at91sam9m10g45ek_nandflash_defconfig index 2937de43298..724fda01e8e 100644 --- a/configs/at91sam9m10g45ek_nandflash_defconfig +++ b/configs/at91sam9m10g45ek_nandflash_defconfig @@ -23,6 +23,7 @@ CONFIG_BOOTCOMMAND="nand read 0x70000000 0x200000 0x300000;bootm 0x70000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_RESET_PHY_R=y +CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_CBSIZE=256 diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig index 06ea24bbb50..986aaec25f2 100644 --- a/configs/at91sam9n12ek_mmc_defconfig +++ b/configs/at91sam9n12ek_mmc_defconfig @@ -18,6 +18,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};fatload mmc 0:1 0x21000000 dtb;fatload mmc 0:1 0x22000000 uImage;bootm 0x22000000 - 0x21000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_MAX_SIZE=0x6000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_CBSIZE=256 diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig index 0b33ce79347..3a5a3f1aa14 100644 --- a/configs/at91sam9n12ek_nandflash_defconfig +++ b/configs/at91sam9n12ek_nandflash_defconfig @@ -18,6 +18,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_nand};nand read 0x21000000 0x180000 0x080000;nand read 0x22000000 0x200000 0x400000;bootm 0x22000000 - 0x21000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_MAX_SIZE=0x6000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_CBSIZE=256 diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig index b2d9eb31127..f5426508129 100644 --- a/configs/at91sam9n12ek_spiflash_defconfig +++ b/configs/at91sam9n12ek_spiflash_defconfig @@ -20,6 +20,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_nand};sf probe 0; sf read 0x22000000 0x100000 0x300000; bootm 0x22000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_MAX_SIZE=0x6000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_CBSIZE=256 diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig index 75528ad15e6..671a01b15a7 100644 --- a/configs/at91sam9x5ek_dataflash_defconfig +++ b/configs/at91sam9x5ek_dataflash_defconfig @@ -25,6 +25,7 @@ CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x22000000 0x84000 0x294000; bootm 0x220 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_MAX_SIZE=0x6000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_CBSIZE=256 diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig index 0e301439704..13ccaecd9a4 100644 --- a/configs/at91sam9x5ek_mmc_defconfig +++ b/configs/at91sam9x5ek_mmc_defconfig @@ -22,6 +22,7 @@ CONFIG_BOOTARGS="mem=128M console=ttyS0,115200 mtdparts=atmel_nand:8M(bootstrap/ # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_MAX_SIZE=0x6000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_CBSIZE=256 diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig index 125dc19abf0..cdc12d42a5c 100644 --- a/configs/at91sam9x5ek_nandflash_defconfig +++ b/configs/at91sam9x5ek_nandflash_defconfig @@ -24,6 +24,7 @@ CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x600000; nand read 0x21000000 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_MAX_SIZE=0x6000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_CBSIZE=256 diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig index 96ab238461c..2fd143c16a5 100644 --- a/configs/at91sam9x5ek_spiflash_defconfig +++ b/configs/at91sam9x5ek_spiflash_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x22000000 0x100000 0x300000; bootm 0x22 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_MAX_SIZE=0x6000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_CBSIZE=256 diff --git a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig index 90ca33b8244..2903c491f5a 100644 --- a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig +++ b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig @@ -26,6 +26,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x10000000 CONFIG_BOOTDELAY=0 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_CLOCKS=y +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_FS_LOAD_KERNEL_NAME="atf-uboot.ub" CONFIG_SPL_FS_LOAD_ARGS_NAME="u-boot.bin" CONFIG_SPL_OS_BOOT=y diff --git a/configs/axm_defconfig b/configs/axm_defconfig index ebda5a49fe9..23ad604f4b3 100644 --- a/configs/axm_defconfig +++ b/configs/axm_defconfig @@ -35,6 +35,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run flash_self" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_MAX_SIZE=0x3e00 +CONFIG_SPL_PAD_TO=0x20000 # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_CRC32=y diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig index 6e88048e0a4..f26776de6df 100644 --- a/configs/bitmain_antminer_s9_defconfig +++ b/configs/bitmain_antminer_s9_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_CLOCKS=y +CONFIG_SPL_MAX_SIZE=0x30000 CONFIG_SPL_STACK_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="antminer> " diff --git a/configs/cgtqmx8_defconfig b/configs/cgtqmx8_defconfig index 78dfcbc2107..33ba9d6f495 100644 --- a/configs/cgtqmx8_defconfig +++ b/configs/cgtqmx8_defconfig @@ -26,6 +26,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index 81662915d24..6ccce21dafb 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -23,6 +23,7 @@ CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-mickey.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig index 1b2db5d0a8f..53b04354829 100644 --- a/configs/chromebook_bob_defconfig +++ b/configs/chromebook_bob_defconfig @@ -26,6 +26,8 @@ CONFIG_MISC_INIT_R=y CONFIG_BLOBLIST=y CONFIG_BLOBLIST_ADDR=0x100000 CONFIG_BLOBLIST_SIZE=0x1000 +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_HANDOFF=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index d3d9f8fc0ba..9d88c664b9d 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -24,6 +24,7 @@ CONFIG_LOG=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 diff --git a/configs/chromebook_kevin_defconfig b/configs/chromebook_kevin_defconfig index ad6cbca198b..6a3f3cf0cbb 100644 --- a/configs/chromebook_kevin_defconfig +++ b/configs/chromebook_kevin_defconfig @@ -27,6 +27,8 @@ CONFIG_MISC_INIT_R=y CONFIG_BLOBLIST=y CONFIG_BLOBLIST_ADDR=0x100000 CONFIG_BLOBLIST_SIZE=0x1000 +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_HANDOFF=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index 63899f37aaa..fac8a900dc7 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -24,6 +24,7 @@ CONFIG_SILENT_CONSOLE=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig index 9343263be5e..7fd4d573953 100644 --- a/configs/chromebook_speedy_defconfig +++ b/configs/chromebook_speedy_defconfig @@ -24,6 +24,7 @@ CONFIG_SILENT_CONSOLE=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 diff --git a/configs/ci20_mmc_defconfig b/configs/ci20_mmc_defconfig index 4d963c3eb35..2337ac6a8be 100644 --- a/configs/ci20_mmc_defconfig +++ b/configs/ci20_mmc_defconfig @@ -23,6 +23,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MALLOC_BOOTPARAMS=y +CONFIG_SPL_MAX_SIZE=0x2e00 # CONFIG_SPL_BANNER_PRINT is not set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1c diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig index b42e5c25aec..7e872fa2155 100644 --- a/configs/cl-som-imx7_defconfig +++ b/configs/cl-som-imx7_defconfig @@ -25,6 +25,7 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="echo SD boot attempt ...; run sdbootscript; run sdboot; echo eMMC boot attempt ...; run emmcbootscript; run emmcboot; echo USB boot attempt ...; run usbbootscript; " CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80 CONFIG_SPL_I2C=y diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig index b4ec8e76354..9931a02db0d 100644 --- a/configs/clearfog_defconfig +++ b/configs/clearfog_defconfig @@ -24,6 +24,7 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x22fd0 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_TLV_EEPROM=y diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig index c3ddc5e0a92..1507131d07f 100644 --- a/configs/cm_t43_defconfig +++ b/configs/cm_t43_defconfig @@ -27,6 +27,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_MISC_INIT_R is not set +CONFIG_SPL_MAX_SIZE=0x37690 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x480 CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C=y diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig index 18b854e7058..e7650f5e471 100644 --- a/configs/controlcenterdc_defconfig +++ b/configs/controlcenterdc_defconfig @@ -32,6 +32,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_LATE_INIT=y CONFIG_LAST_STAGE_INIT=y +CONFIG_SPL_MAX_SIZE=0x27fd0 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_I2C=y diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig index 9b55d9e87db..1c7bc9e0546 100644 --- a/configs/corvus_defconfig +++ b/configs/corvus_defconfig @@ -30,6 +30,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="nand read 0x70000000 0x200000 0x300000;bootm 0x70000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_MAX_SIZE=0x3000 +CONFIG_SPL_PAD_TO=0x20000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_RAW_ONLY=y diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index a692e1456c1..40da37f1b41 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -33,6 +33,7 @@ CONFIG_DEFAULT_FDT_FILE="da850-evm.dtb" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_CLOCKS=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_PAD_TO=0x8000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_DM_SPI_FLASH=y diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig index c382c38050e..3f27999673a 100644 --- a/configs/da850evm_nand_defconfig +++ b/configs/da850evm_nand_defconfig @@ -30,6 +30,7 @@ CONFIG_DEFAULT_FDT_FILE="da850-evm.dtb" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_CLOCKS=y +CONFIG_SPL_PAD_TO=0x8000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig index f92f2c49c92..da17225b490 100644 --- a/configs/db-88f6720_defconfig +++ b/configs/db-88f6720_defconfig @@ -23,6 +23,7 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x1ffd0 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_I2C=y diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig index 24b9f53fb6b..dcf1ffd61ee 100644 --- a/configs/db-88f6820-amc_defconfig +++ b/configs/db-88f6820-amc_defconfig @@ -24,6 +24,7 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x22fd0 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=96 # CONFIG_CMD_FLASH is not set diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig index c25e795cbde..b7f66ae1522 100644 --- a/configs/db-88f6820-gp_defconfig +++ b/configs/db-88f6820-gp_defconfig @@ -23,6 +23,7 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x22fd0 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_I2C=y diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig index 145b7d97dd4..4c7a42409b0 100644 --- a/configs/db-mv784mp-gp_defconfig +++ b/configs/db-mv784mp-gp_defconfig @@ -23,6 +23,7 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x1bfd0 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set diff --git a/configs/deneb_defconfig b/configs/deneb_defconfig index f02b10bcfad..c1fb57b9884 100644 --- a/configs/deneb_defconfig +++ b/configs/deneb_defconfig @@ -34,6 +34,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="if usrbutton; then run flash_self_test; reset; fi;run flash_self;reset;" CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig index 5b25463df96..ba9ee13534a 100644 --- a/configs/devkit3250_defconfig +++ b/configs/devkit3250_defconfig @@ -23,6 +23,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="dhcp; tftp ${loadaddr} ${serverip}:${tftpdir}/${bootfile}; tftp ${dtbaddr} ${serverip}:${tftpdir}/devkit3250.dtb; setenv nfsargs ip=dhcp root=/dev/nfs nfsroot=${serverip}:${nfsroot},tcp; setenv bootargs ${bootargs} ${nfsargs} ${userargs}; bootm ${loadaddr} - ${dtbaddr}" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index 0db8b83f3eb..2db73e165a3 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="run autoboot" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_SIMPLE=y diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index f04a2fbca6f..ded2e6cefd4 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTCOMMAND="if test ${dofastboot} -eq 1; then echo Boot fastboot request CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_MISC_INIT_R is not set +CONFIG_SPL_MAX_SIZE=0x7bc00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_DMA=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index 6bb5c3c2ad0..b9d3f665dcf 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -29,6 +29,7 @@ CONFIG_BOOTCOMMAND="if test ${dofastboot} -eq 1; then echo Boot fastboot request CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_MISC_INIT_R is not set +CONFIG_SPL_MAX_SIZE=0x7a8b0 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_DMA=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig index 652d9924bb8..739c48b461a 100644 --- a/configs/dra7xx_hs_evm_usb_defconfig +++ b/configs/dra7xx_hs_evm_usb_defconfig @@ -31,6 +31,7 @@ CONFIG_BOOTCOMMAND="if test ${dofastboot} -eq 1; then echo Boot fastboot request CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_MISC_INIT_R is not set +CONFIG_SPL_MAX_SIZE=0x74eb0 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_DMA=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig index e10b9d2de66..fe9ab06aa28 100644 --- a/configs/ds414_defconfig +++ b/configs/ds414_defconfig @@ -31,6 +31,7 @@ CONFIG_BOOTCOMMAND="sf probe; sf read ${loadaddr} 0xd0000 0x2d0000; sf read ${ra # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x1bfd0 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set diff --git a/configs/edminiv2_defconfig b/configs/edminiv2_defconfig index c3293e20246..f18e483f6a7 100644 --- a/configs/edminiv2_defconfig +++ b/configs/edminiv2_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y CONFIG_RESET_PHY_R=y +CONFIG_SPL_MAX_SIZE=0xfff0 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y diff --git a/configs/elgin-rv1108_defconfig b/configs/elgin-rv1108_defconfig index 113b7c8cfe0..8a57c15ff08 100644 --- a/configs/elgin-rv1108_defconfig +++ b/configs/elgin-rv1108_defconfig @@ -19,6 +19,7 @@ CONFIG_DEFAULT_FDT_FILE="rv1108-elgin-r1.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_CMD_GPIO=y CONFIG_RANDOM_UUID=y CONFIG_CMD_MMC=y diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig index 36eaf4e6b95..f7fa65e69fb 100644 --- a/configs/evb-px30_defconfig +++ b/configs/evb-px30_defconfig @@ -28,12 +28,15 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/px30-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y # CONFIG_TPL_BANNER_PRINT is not set CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set +CONFIG_TPL_MAX_SIZE=0x20000 # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig index 1e2b0f03087..10586a53847 100644 --- a/configs/evb-px5_defconfig +++ b/configs/evb-px5_defconfig @@ -32,6 +32,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-px5-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y @@ -39,6 +41,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_TPL=y +CONFIG_TPL_MAX_SIZE=0x40000 CONFIG_CMD_MMC=y CONFIG_CMD_CACHE=y CONFIG_SPL_OF_CONTROL=y diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig index dcc70cb0bc7..ea4427ed495 100644 --- a/configs/evb-rk3036_defconfig +++ b/configs/evb-rk3036_defconfig @@ -23,6 +23,7 @@ CONFIG_DEFAULT_FDT_FILE="rk3036-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_STACK_R=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig index d232d78d6e5..4424cc866b1 100644 --- a/configs/evb-rk3128_defconfig +++ b/configs/evb-rk3128_defconfig @@ -16,6 +16,7 @@ CONFIG_FIT=y CONFIG_DEFAULT_FDT_FILE="rk3128-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig index 8eda765fb37..abca41de13a 100644 --- a/configs/evb-rk3229_defconfig +++ b/configs/evb-rk3229_defconfig @@ -26,10 +26,13 @@ CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3229-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x100000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_OPTEE_IMAGE=y +CONFIG_TPL_MAX_SIZE=0x100000 CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB_MASS_STORAGE=y diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index 14a1d4cf332..0a5ee20709f 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -24,6 +24,7 @@ CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-evb-rk808.dtb" CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SPL_OPTEE_IMAGE=y diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig index b4ce8a1a396..694256e3e84 100644 --- a/configs/evb-rk3308_defconfig +++ b/configs/evb-rk3308_defconfig @@ -22,6 +22,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_BOOTDELAY=0 CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_STACK_R=y # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig index 7e0c4c50a61..f5c9f7b88bd 100644 --- a/configs/evb-rk3328_defconfig +++ b/configs/evb-rk3328_defconfig @@ -25,12 +25,15 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_TPL_MAX_SIZE=0x40000 CONFIG_TPL_DRIVERS_MISC=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index a9afb63fdd9..baf3a115156 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -14,6 +14,8 @@ CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-evb.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/evb-rk3568_defconfig b/configs/evb-rk3568_defconfig index 1d61c151943..a45fac0c2f7 100644 --- a/configs/evb-rk3568_defconfig +++ b/configs/evb-rk3568_defconfig @@ -24,6 +24,8 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig index fcdef1d3549..013fabfb2f2 100644 --- a/configs/evb-rv1108_defconfig +++ b/configs/evb-rv1108_defconfig @@ -15,6 +15,7 @@ CONFIG_DEFAULT_FDT_FILE="rv1108-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_RANDOM_UUID=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/ficus-rk3399_defconfig b/configs/ficus-rk3399_defconfig index 1ee3cb225bf..68b830dcb81 100644 --- a/configs/ficus-rk3399_defconfig +++ b/configs/ficus-rk3399_defconfig @@ -14,6 +14,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 diff --git a/configs/firefly-px30_defconfig b/configs/firefly-px30_defconfig index 01858a65b4c..57ac37fc642 100644 --- a/configs/firefly-px30_defconfig +++ b/configs/firefly-px30_defconfig @@ -29,12 +29,15 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/px30-firefly.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y # CONFIG_TPL_BANNER_PRINT is not set CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set +CONFIG_TPL_MAX_SIZE=0x20000 # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index c0dbd8470a7..629272a94bc 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -20,6 +20,7 @@ CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-firefly.dtb" CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_CMD_GPIO=y diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig index 3803e42f380..4ed54ea4d39 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -15,6 +15,8 @@ CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-firefly.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig index 2ee71636534..2dd0aa2acfc 100644 --- a/configs/gardena-smart-gateway-at91sam_defconfig +++ b/configs/gardena-smart-gateway-at91sam_defconfig @@ -32,6 +32,8 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs rw" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SPL_MAX_SIZE=0x7000 +CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/gardena-smart-gateway-mt7688_defconfig b/configs/gardena-smart-gateway-mt7688_defconfig index b07e7c78d06..11ad133c733 100644 --- a/configs/gardena-smart-gateway-mt7688_defconfig +++ b/configs/gardena-smart-gateway-mt7688_defconfig @@ -37,6 +37,7 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MALLOC_BOOTPARAMS=y +CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y diff --git a/configs/geekbox_defconfig b/configs/geekbox_defconfig index 8287600e0ba..b4705ecbea6 100644 --- a/configs/geekbox_defconfig +++ b/configs/geekbox_defconfig @@ -15,6 +15,8 @@ CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-geekbox.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/giedi_defconfig b/configs/giedi_defconfig index 2be2e767ca2..6fd6e56fe54 100644 --- a/configs/giedi_defconfig +++ b/configs/giedi_defconfig @@ -34,6 +34,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="if usrbutton; then run flash_self_test; reset; fi;run flash_self;reset;" CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/gose_defconfig b/configs/gose_defconfig index 57bf892f055..6efa4a54407 100644 --- a/configs/gose_defconfig +++ b/configs/gose_defconfig @@ -28,6 +28,7 @@ CONFIG_SYS_LOAD_ADDR=0x50000000 CONFIG_ENV_ADDR=0xC0000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 +CONFIG_SPL_MAX_SIZE=0x4000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_RAM_SUPPORT=y diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig index 3f648fb678e..393483820d6 100644 --- a/configs/helios4_defconfig +++ b/configs/helios4_defconfig @@ -24,6 +24,7 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x22fd0 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_TLV_EEPROM=y diff --git a/configs/igep00x0_defconfig b/configs/igep00x0_defconfig index 24d6502c066..2e1811228e5 100644 --- a/configs/igep00x0_defconfig +++ b/configs/igep00x0_defconfig @@ -15,6 +15,7 @@ CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_FS_EXT4 is not set CONFIG_SPL_MTD_SUPPORT=y diff --git a/configs/imx7_cm_defconfig b/configs/imx7_cm_defconfig index e6b14661579..912b3a6fd7a 100644 --- a/configs/imx7_cm_defconfig +++ b/configs/imx7_cm_defconfig @@ -24,6 +24,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="run boot${boot-mode}" CONFIG_DEFAULT_FDT_FILE="ask" # CONFIG_BOARD_EARLY_INIT_F is not set +CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/imx8mm-cl-iot-gate-optee_defconfig b/configs/imx8mm-cl-iot-gate-optee_defconfig index d79203d0aa4..2d0e336d1d7 100644 --- a/configs/imx8mm-cl-iot-gate-optee_defconfig +++ b/configs/imx8mm-cl-iot-gate-optee_defconfig @@ -23,6 +23,7 @@ CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig index e525e2d4a17..ba5d5f1e6c4 100644 --- a/configs/imx8mm-cl-iot-gate_defconfig +++ b/configs/imx8mm-cl-iot-gate_defconfig @@ -25,6 +25,7 @@ CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig index 1787b5082a1..fce998d3bb3 100644 --- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig +++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig @@ -23,6 +23,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-ctouch2.dtb" +CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig index 9096bab638d..03e33f395b4 100644 --- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig +++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig @@ -23,6 +23,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-edimm2.2.dtb" +CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/imx8mm-mx8menlo_defconfig b/configs/imx8mm-mx8menlo_defconfig index 347abb3a19d..9ab6c36f7ae 100644 --- a/configs/imx8mm-mx8menlo_defconfig +++ b/configs/imx8mm-mx8menlo_defconfig @@ -34,6 +34,7 @@ CONFIG_LOG=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig index 494f469fe11..bcf18b3613c 100644 --- a/configs/imx8mm_beacon_defconfig +++ b/configs/imx8mm_beacon_defconfig @@ -25,6 +25,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; fi;" CONFIG_DEFAULT_FDT_FILE="imx8mm-beacon-kit.dtb" +CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/imx8mm_data_modul_edm_sbc_defconfig b/configs/imx8mm_data_modul_edm_sbc_defconfig index be921506432..5a67bbff215 100644 --- a/configs/imx8mm_data_modul_edm_sbc_defconfig +++ b/configs/imx8mm_data_modul_edm_sbc_defconfig @@ -41,6 +41,7 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x25000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_LEGACY_IMAGE_FORMAT=y CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index 5f7e5f7b4a3..86f24a0d2dd 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -23,6 +23,7 @@ CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig index d5a20159601..9586f650a37 100644 --- a/configs/imx8mm_venice_defconfig +++ b/configs/imx8mm_venice_defconfig @@ -31,6 +31,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="gsc wd-disable" CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig index 6a2f0dcac3f..aec7ddd72e0 100644 --- a/configs/imx8mn_beacon_2g_defconfig +++ b/configs/imx8mn_beacon_2g_defconfig @@ -32,6 +32,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" CONFIG_DEFAULT_FDT_FILE="imx8mn-beacon-kit.dtb" CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig index d2d182d342d..865b06b038c 100644 --- a/configs/imx8mn_beacon_defconfig +++ b/configs/imx8mn_beacon_defconfig @@ -31,6 +31,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" CONFIG_DEFAULT_FDT_FILE="imx8mn-beacon-kit.dtb" CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/imx8mn_bsh_smm_s2_defconfig b/configs/imx8mn_bsh_smm_s2_defconfig index 69ba13797a3..1a4db336090 100644 --- a/configs/imx8mn_bsh_smm_s2_defconfig +++ b/configs/imx8mn_bsh_smm_s2_defconfig @@ -26,6 +26,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="freescale/imx8mn-bsh-smm-s2.dtb" CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/imx8mn_bsh_smm_s2pro_defconfig b/configs/imx8mn_bsh_smm_s2pro_defconfig index 655dfbe6c48..69dde3f25a3 100644 --- a/configs/imx8mn_bsh_smm_s2pro_defconfig +++ b/configs/imx8mn_bsh_smm_s2pro_defconfig @@ -27,6 +27,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="freescale/imx8mn-bsh-smm-s2pro.dtb" CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig index 6f96f3aeef8..c62b193b878 100644 --- a/configs/imx8mn_ddr4_evk_defconfig +++ b/configs/imx8mn_ddr4_evk_defconfig @@ -25,6 +25,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mn-ddr4-evk.dtb" CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig index 9c879cd6d1c..2aef70be67e 100644 --- a/configs/imx8mn_evk_defconfig +++ b/configs/imx8mn_evk_defconfig @@ -26,6 +26,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mn-evk.dtb" CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set diff --git a/configs/imx8mn_var_som_defconfig b/configs/imx8mn_var_som_defconfig index 161f2752a1c..7fdaa2c3a6c 100644 --- a/configs/imx8mn_var_som_defconfig +++ b/configs/imx8mn_var_som_defconfig @@ -27,6 +27,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="freescale/imx8mn-var-som-symphony.dtb" CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig index 7c23351da5a..30a0a838162 100644 --- a/configs/imx8mn_venice_defconfig +++ b/configs/imx8mn_venice_defconfig @@ -32,6 +32,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="gsc wd-disable" CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index a2025f2116c..905f52a1e12 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mp-evk.dtb" CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x26000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/imx8mp_rsb3720a1_4G_defconfig b/configs/imx8mp_rsb3720a1_4G_defconfig index e3e9bc7e7ab..6a03f67563c 100644 --- a/configs/imx8mp_rsb3720a1_4G_defconfig +++ b/configs/imx8mp_rsb3720a1_4G_defconfig @@ -34,6 +34,7 @@ CONFIG_DEFAULT_FDT_FILE="imx8mp-rsb3720-a1.dtb" CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x26000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/imx8mp_rsb3720a1_6G_defconfig b/configs/imx8mp_rsb3720a1_6G_defconfig index 3b0e02e3d03..bc7f3108366 100644 --- a/configs/imx8mp_rsb3720a1_6G_defconfig +++ b/configs/imx8mp_rsb3720a1_6G_defconfig @@ -34,6 +34,7 @@ CONFIG_DEFAULT_FDT_FILE="imx8mp-rsb3720-a1.dtb" CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x26000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/imx8mp_venice_defconfig b/configs/imx8mp_venice_defconfig index 80724ac1a2b..6c144c51c75 100644 --- a/configs/imx8mp_venice_defconfig +++ b/configs/imx8mp_venice_defconfig @@ -32,6 +32,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="gsc wd-disable" CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x26000 CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/imx8mq_cm_defconfig b/configs/imx8mq_cm_defconfig index 4c8eecaad9a..f396b42221a 100644 --- a/configs/imx8mq_cm_defconfig +++ b/configs/imx8mq_cm_defconfig @@ -27,6 +27,7 @@ CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index 3ab7977e413..07453918dbb 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/imx8mq_phanbell_defconfig b/configs/imx8mq_phanbell_defconfig index 81ea5108805..77693db947a 100644 --- a/configs/imx8mq_phanbell_defconfig +++ b/configs/imx8mq_phanbell_defconfig @@ -31,6 +31,7 @@ CONFIG_SD_BOOT=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_MAX_SIZE=0x2b000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig index 1bc0a9d1b27..9f68877125e 100644 --- a/configs/imx8qm_mek_defconfig +++ b/configs/imx8qm_mek_defconfig @@ -28,6 +28,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if test ${sec_boot} = yes; then if run loadcntr; then run mmcboot; else run netboot; fi; else if run loadimage; then run mmcboot; else run netboot; fi; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/imx8qm_rom7720_a1_4G_defconfig b/configs/imx8qm_rom7720_a1_4G_defconfig index 6ed2882aaab..da9b1ab194c 100644 --- a/configs/imx8qm_rom7720_a1_4G_defconfig +++ b/configs/imx8qm_rom7720_a1_4G_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index bd4ab56ad59..d0f42842fca 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -28,6 +28,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if test ${sec_boot} = yes; then if run loadcntr; then run mmcboot; else run netboot; fi; else if run loadimage; then run mmcboot; else run netboot; fi; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/imx8ulp_evk_defconfig b/configs/imx8ulp_evk_defconfig index 88ba690fc48..3d09aaa865d 100644 --- a/configs/imx8ulp_evk_defconfig +++ b/configs/imx8ulp_evk_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd;run bsp_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx8ulp-evk" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/iot2050_defconfig b/configs/iot2050_defconfig index 01ef500d82b..6cabc10925b 100644 --- a/configs/iot2050_defconfig +++ b/configs/iot2050_defconfig @@ -31,6 +31,7 @@ CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_SPL_SHOW_BOOT_PROGRESS=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_MAX_SIZE=0x58000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig index ac5152a164c..e633f2243aa 100644 --- a/configs/j7200_evm_a72_defconfig +++ b/configs/j7200_evm_a72_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern" CONFIG_LOGLEVEL=7 +CONFIG_SPL_MAX_SIZE=0xc0000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig index 4883e8a1899..451f25cf3db 100644 --- a/configs/j7200_evm_r5_defconfig +++ b/configs/j7200_evm_r5_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_MAX_SIZE=0xc0000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index b507f23e8df..c0f55d8f835 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run init_${boot}; run main_cpsw0_qsgmii_phyinit; run boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern" CONFIG_LOGLEVEL=7 +CONFIG_SPL_MAX_SIZE=0xc0000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index c7899fcddd1..45bebbe66b0 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_MAX_SIZE=0xc0000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y diff --git a/configs/j721e_hs_evm_a72_defconfig b/configs/j721e_hs_evm_a72_defconfig index a07204dd98e..34bd47608da 100644 --- a/configs/j721e_hs_evm_a72_defconfig +++ b/configs/j721e_hs_evm_a72_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run main_cpsw0_qsgmii_phyinit; run boot_rprocs; run get_fit_${boot}; run get_overlaystring; run run_fit" CONFIG_LOGLEVEL=7 +CONFIG_SPL_MAX_SIZE=0xc0000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y diff --git a/configs/j721e_hs_evm_r5_defconfig b/configs/j721e_hs_evm_r5_defconfig index 7a5867bb7d2..42ccbe28c7a 100644 --- a/configs/j721e_hs_evm_r5_defconfig +++ b/configs/j721e_hs_evm_r5_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_MAX_SIZE=0xc0000 CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_EARLY_BSS=y diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig index 90b941157be..503b8fb512f 100644 --- a/configs/j721s2_evm_a72_defconfig +++ b/configs/j721s2_evm_a72_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run main_cpsw0_qsgmii_phyinit; run boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern" CONFIG_LOGLEVEL=7 +CONFIG_SPL_MAX_SIZE=0xc0000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig index 57f6c7bdfea..7f1d2b05048 100644 --- a/configs/j721s2_evm_r5_defconfig +++ b/configs/j721s2_evm_r5_defconfig @@ -32,6 +32,7 @@ CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y +CONFIG_SPL_MAX_SIZE=0xc0000 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index 5de27f06bad..89726c96799 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -27,6 +27,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run init_${boot}; run get_mon_${boot} run_mon; run get_kern_${boot}; run init_fw_rd_${boot}; run get_fdt_${boot}; run run_kern" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_MAX_SIZE=0xfff8 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/k2e_hs_evm_defconfig b/configs/k2e_hs_evm_defconfig index 25f22937157..b1cfa34d0f0 100644 --- a/configs/k2e_hs_evm_defconfig +++ b/configs/k2e_hs_evm_defconfig @@ -20,6 +20,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run run_mon_hs; run init_${boot}; run get_fit_${boot}; bootm ${addr_fit}#${name_fdt}" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_MAX_SIZE=0xfff8 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index fc33225bac7..e98e9533546 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -26,6 +26,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run get_mon_${boot} run_mon; run set_name_pmmc get_pmmc_${boot} run_pmmc; run get_kern_${boot}; run init_fw_rd_${boot}; run get_fdt_${boot}; run run_kern" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_MAX_SIZE=0xfff8 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/k2g_hs_evm_defconfig b/configs/k2g_hs_evm_defconfig index 2767cd82db0..11717af6594 100644 --- a/configs/k2g_hs_evm_defconfig +++ b/configs/k2g_hs_evm_defconfig @@ -19,6 +19,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run envboot; run run_mon_hs; run init_${boot}; run get_fit_${boot}; bootm ${addr_fit}#${name_fdt}" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_MAX_SIZE=0xfff8 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index 206bccdbbd6..93a29fb31e9 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -27,6 +27,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run init_${boot}; run get_mon_${boot} run_mon; run get_kern_${boot}; run init_fw_rd_${boot}; run get_fdt_${boot}; run run_kern" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_MAX_SIZE=0xfff8 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig index af56223f662..fae63da58bc 100644 --- a/configs/k2hk_hs_evm_defconfig +++ b/configs/k2hk_hs_evm_defconfig @@ -20,6 +20,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run run_mon_hs; run init_${boot}; run get_fit_${boot}; bootm ${addr_fit}#${name_fdt}" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_MAX_SIZE=0xfff8 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index 3fcca0100d1..852d2d8467b 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -27,6 +27,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run init_${boot}; run get_mon_${boot} run_mon; run get_kern_${boot}; run init_fw_rd_${boot}; run get_fdt_${boot}; run run_kern" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_MAX_SIZE=0xfff8 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/k2l_hs_evm_defconfig b/configs/k2l_hs_evm_defconfig index 2e46eac3d77..8879710162c 100644 --- a/configs/k2l_hs_evm_defconfig +++ b/configs/k2l_hs_evm_defconfig @@ -20,6 +20,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run run_mon_hs; run init_${boot}; run get_fit_${boot}; bootm ${addr_fit}#${name_fdt}" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_MAX_SIZE=0xfff8 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/khadas-edge-captain-rk3399_defconfig b/configs/khadas-edge-captain-rk3399_defconfig index 44ec22f2a37..91e01705168 100644 --- a/configs/khadas-edge-captain-rk3399_defconfig +++ b/configs/khadas-edge-captain-rk3399_defconfig @@ -14,6 +14,8 @@ CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge-captain.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/khadas-edge-rk3399_defconfig b/configs/khadas-edge-rk3399_defconfig index a2f27407aa7..6eb1c35e86b 100644 --- a/configs/khadas-edge-rk3399_defconfig +++ b/configs/khadas-edge-rk3399_defconfig @@ -14,6 +14,8 @@ CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/khadas-edge-v-rk3399_defconfig b/configs/khadas-edge-v-rk3399_defconfig index 949fb333bc0..8529b4c2844 100644 --- a/configs/khadas-edge-v-rk3399_defconfig +++ b/configs/khadas-edge-v-rk3399_defconfig @@ -14,6 +14,8 @@ CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge-v.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig index ff71d1463b2..58239a78d81 100644 --- a/configs/koelsch_defconfig +++ b/configs/koelsch_defconfig @@ -28,6 +28,7 @@ CONFIG_SYS_LOAD_ADDR=0x50000000 CONFIG_ENV_ADDR=0xC0000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 +CONFIG_SPL_MAX_SIZE=0x4000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_RAM_SUPPORT=y diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig index 4ba834514a0..bc7c99783a2 100644 --- a/configs/kontron-sl-mx8mm_defconfig +++ b/configs/kontron-sl-mx8mm_defconfig @@ -26,6 +26,7 @@ CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_BOARD_TYPES=y +CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/kontron_pitx_imx8m_defconfig b/configs/kontron_pitx_imx8m_defconfig index ae94ed1f12a..7b0d6b91d01 100644 --- a/configs/kontron_pitx_imx8m_defconfig +++ b/configs/kontron_pitx_imx8m_defconfig @@ -30,6 +30,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/kontron_sl28_defconfig b/configs/kontron_sl28_defconfig index 1bae4709210..fcc6dd394d9 100644 --- a/configs/kontron_sl28_defconfig +++ b/configs/kontron_sl28_defconfig @@ -35,6 +35,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOARD_LATE_INIT=y CONFIG_PCI_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig index 0111f30e14d..876a7e5a95d 100644 --- a/configs/kylin-rk3036_defconfig +++ b/configs/kylin-rk3036_defconfig @@ -25,6 +25,7 @@ CONFIG_DEFAULT_FDT_FILE="rk3036-kylin.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_STACK_R=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/lager_defconfig b/configs/lager_defconfig index a58c23a524f..a2cfcb061fa 100644 --- a/configs/lager_defconfig +++ b/configs/lager_defconfig @@ -28,6 +28,7 @@ CONFIG_SYS_LOAD_ADDR=0x50000000 CONFIG_ENV_ADDR=0xC0000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 +CONFIG_SPL_MAX_SIZE=0x4000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_RAM_SUPPORT=y diff --git a/configs/leez-rk3399_defconfig b/configs/leez-rk3399_defconfig index 2fa8d563ebe..9bd3e20c3ef 100644 --- a/configs/leez-rk3399_defconfig +++ b/configs/leez-rk3399_defconfig @@ -14,6 +14,8 @@ CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-leez-p710.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/linkit-smart-7688_defconfig b/configs/linkit-smart-7688_defconfig index d50c77d8b63..ed23c13061b 100644 --- a/configs/linkit-smart-7688_defconfig +++ b/configs/linkit-smart-7688_defconfig @@ -29,6 +29,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MALLOC_BOOTPARAMS=y +CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig index 426913816bf..7dc518758a8 100644 --- a/configs/lion-rk3368_defconfig +++ b/configs/lion-rk3368_defconfig @@ -30,6 +30,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-lion-haikou.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y @@ -38,6 +40,7 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 CONFIG_SPL_ATF=y CONFIG_TPL=y +CONFIG_TPL_MAX_SIZE=0x40000 CONFIG_TPL_DRIVERS_MISC=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig index b554b616228..14406bc9fb3 100644 --- a/configs/ls1021aiot_sdcard_defconfig +++ b/configs/ls1021aiot_sdcard_defconfig @@ -31,6 +31,8 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SPL_MAX_SIZE=0x1a000 +CONFIG_SPL_PAD_TO=0x1c000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index bdb66d0e837..dc8b03ee02a 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -41,6 +41,8 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SPL_MAX_SIZE=0x1a000 +CONFIG_SPL_PAD_TO=0x1c000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index c936c0051af..b7d46ad6db1 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -40,6 +40,8 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SPL_MAX_SIZE=0x1a000 +CONFIG_SPL_PAD_TO=0x1c000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index 230f1470afe..ad03479f8b0 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -39,6 +39,8 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SPL_MAX_SIZE=0x1a000 +CONFIG_SPL_PAD_TO=0x1c000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig index 4754a37f0d4..e76e3df75ec 100644 --- a/configs/ls1021atsn_sdcard_defconfig +++ b/configs/ls1021atsn_sdcard_defconfig @@ -33,6 +33,8 @@ CONFIG_SILENT_CONSOLE=y CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SPL_MAX_SIZE=0x1a000 +CONFIG_SPL_PAD_TO=0x1c000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index 69df4623ddb..5348ade5e14 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -40,6 +40,8 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SPL_MAX_SIZE=0x1a000 +CONFIG_SPL_PAD_TO=0x1c000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index 637cc96928b..c9537ed4ac3 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -41,6 +41,8 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SPL_MAX_SIZE=0x1a000 +CONFIG_SPL_PAD_TO=0x1c000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index 9050bba7011..82030f8f3cd 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -42,6 +42,8 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SPL_MAX_SIZE=0x1a000 +CONFIG_SPL_PAD_TO=0x1c000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index 04e34133465..079cbb3f1fc 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -45,6 +45,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x1a000 +CONFIG_SPL_PAD_TO=0x20000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index a508885be91..71ecfccb48d 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -46,6 +46,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x17000 +CONFIG_SPL_PAD_TO=0x1d000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index bed7b45770c..d51cc08ef6c 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -46,6 +46,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x17000 +CONFIG_SPL_PAD_TO=0x1d000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index 29558ea737d..9d566d3def9 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -29,6 +29,8 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x1a000 +CONFIG_SPL_PAD_TO=0x20000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index cb6344e6624..cc60fa65d15 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -34,6 +34,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x1a000 +CONFIG_SPL_PAD_TO=0x20000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index b6987a5dfd9..1a7fc26ee38 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -30,6 +30,8 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" CONFIG_BOOTCOMMAND="run distro_bootcmd; run sd_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x17000 +CONFIG_SPL_PAD_TO=0x1d000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index d118e0578fb..74a426cdc6c 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -35,6 +35,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="run distro_bootcmd; run sd_bootcmd; env exists secureboot && esbc_halt;" CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x17000 +CONFIG_SPL_PAD_TO=0x1d000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig index 56fa46945fd..f56f078d12e 100644 --- a/configs/ls1046aqds_nand_defconfig +++ b/configs/ls1046aqds_nand_defconfig @@ -45,6 +45,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="run distro_bootcmd; run nand_bootcmd; env exists secureboot && esbc_halt;;" CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x17000 +CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index d36bedde32f..be7903b0a0f 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -46,6 +46,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="run distro_bootcmd; run sd_bootcmd; env exists secureboot && esbc_halt;;" CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x1f000 +CONFIG_SPL_PAD_TO=0x21000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index 2abc2b1ccdc..3fc281fe8ec 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -46,6 +46,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="run distro_bootcmd; run sd_bootcmd; env exists secureboot && esbc_halt;;" CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x1f000 +CONFIG_SPL_PAD_TO=0x21000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig index cfd2208ff73..b9219b52010 100644 --- a/configs/ls1046ardb_emmc_defconfig +++ b/configs/ls1046ardb_emmc_defconfig @@ -36,6 +36,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x1f000 +CONFIG_SPL_PAD_TO=0x21000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig index cf7d46e0881..50b26b3ff81 100644 --- a/configs/ls1046ardb_qspi_spl_defconfig +++ b/configs/ls1046ardb_qspi_spl_defconfig @@ -40,6 +40,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="run distro_bootcmd; run qspi_bootcmd; env exists secureboot && esbc_halt;;" CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x1f000 +CONFIG_SPL_PAD_TO=0x20000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig index f385d289f22..6a5c8997c9c 100644 --- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -34,6 +34,8 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_BOOTCOMMAND="run distro_bootcmd;run sd_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x1f000 +CONFIG_SPL_PAD_TO=0x21000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig index 95b79b9572a..f573a679f2b 100644 --- a/configs/ls1046ardb_sdcard_defconfig +++ b/configs/ls1046ardb_sdcard_defconfig @@ -36,6 +36,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="run distro_bootcmd;run sd_bootcmd; env exists secureboot && esbc_halt;" CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x1f000 +CONFIG_SPL_PAD_TO=0x21000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig index 811a97cf9f9..de3c11382ae 100644 --- a/configs/ls1088aqds_sdcard_ifc_defconfig +++ b/configs/ls1088aqds_sdcard_ifc_defconfig @@ -39,6 +39,7 @@ CONFIG_BOOTCOMMAND="mmcinfo;mmc read 0x80001000 0x6800 0x800; fsl_mc lazyapply d # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_RESET_PHY_R=y +CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig index 09e00445f9e..a3064090152 100644 --- a/configs/ls1088aqds_sdcard_qspi_defconfig +++ b/configs/ls1088aqds_sdcard_qspi_defconfig @@ -40,6 +40,7 @@ CONFIG_BOOTCOMMAND="mmcinfo;mmc read 0x80001000 0x6800 0x800; fsl_mc lazyapply d # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_RESET_PHY_R=y +CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig index 3cf4180b977..a727b5c358a 100644 --- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig @@ -40,6 +40,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig index 51db7a64a4a..d2db36cecc3 100644 --- a/configs/ls1088ardb_sdcard_qspi_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_defconfig @@ -41,6 +41,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig index e78b226ccc5..3a0e29009ea 100644 --- a/configs/ls2080aqds_SECURE_BOOT_defconfig +++ b/configs/ls2080aqds_SECURE_BOOT_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load" CONFIG_RESET_PHY_R=y +CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig index c4ba0d45fae..28f796e6c2f 100644 --- a/configs/ls2080aqds_defconfig +++ b/configs/ls2080aqds_defconfig @@ -26,6 +26,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load" CONFIG_RESET_PHY_R=y +CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index 240ce113c1c..547fe5c1234 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -31,6 +31,8 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load" CONFIG_RESET_PHY_R=y +CONFIG_SPL_MAX_SIZE=0x16000 +CONFIG_SPL_PAD_TO=0x20000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig index 88ba55124e2..6359a732059 100644 --- a/configs/ls2080aqds_qspi_defconfig +++ b/configs/ls2080aqds_qspi_defconfig @@ -26,6 +26,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load" CONFIG_RESET_PHY_R=y +CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig index 9dae1c74512..f724c0e0524 100644 --- a/configs/ls2080aqds_sdcard_defconfig +++ b/configs/ls2080aqds_sdcard_defconfig @@ -32,6 +32,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_BOOTCOMMAND="mmc read 0x80200000 0x6800 0x800; fsl_mc apply dpl 0x80200000 && mmc read $kernel_load $kernel_start $kernel_size && bootm $kernel_load" CONFIG_RESET_PHY_R=y +CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig index b799f349a57..715eb8c6d27 100644 --- a/configs/ls2080ardb_SECURE_BOOT_defconfig +++ b/configs/ls2080ardb_SECURE_BOOT_defconfig @@ -30,6 +30,7 @@ CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="env exists mcinitcmd && env exists secureboot && esbc_validate 0x5806C0000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x580d00000;run distro_bootcmd;run nor_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig index 6bb10b817a0..2efcfd1d8ab 100644 --- a/configs/ls2080ardb_defconfig +++ b/configs/ls2080ardb_defconfig @@ -31,6 +31,7 @@ CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="env exists mcinitcmd && env exists secureboot && esbc_validate 0x5806C0000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x580d00000;run distro_bootcmd;run nor_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index 60eeb79d3aa..6c499b8fbaf 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -37,6 +37,8 @@ CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="env exists mcinitcmd && env exists secureboot && esbc_validate 0x5806C0000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x580d00000;run distro_bootcmd;run nor_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SPL_MAX_SIZE=0x16000 +CONFIG_SPL_PAD_TO=0x80000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig index 3fa37ddf18d..c4e4be1ef7a 100644 --- a/configs/ls2081ardb_defconfig +++ b/configs/ls2081ardb_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x806c0000 0x6c0000 0x40000; env exists mcinitcmd && env exists secureboot && esbc_validate 0x806C0000; sf read 0x80d00000 0xd00000 0x100000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x80d00000; run distro_bootcmd;run qspi_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y diff --git a/configs/ls2088aqds_tfa_defconfig b/configs/ls2088aqds_tfa_defconfig index c46e506213c..3948edb77aa 100644 --- a/configs/ls2088aqds_tfa_defconfig +++ b/configs/ls2088aqds_tfa_defconfig @@ -29,6 +29,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_RESET_PHY_R=y +CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig index 39540c74be2..5fa0785f642 100644 --- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig @@ -29,6 +29,7 @@ CONFIG_BOOTDELAY=10 CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x806c0000 0x6c0000 0x40000; env exists mcinitcmd && env exists secureboot && esbc_validate 0x806C0000; sf read 0x80d00000 0xd00000 0x100000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x80d00000; run distro_bootcmd;run qspi_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig index f702a392358..5014eb4a46b 100644 --- a/configs/ls2088ardb_qspi_defconfig +++ b/configs/ls2088ardb_qspi_defconfig @@ -33,6 +33,7 @@ CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x806c0000 0x6c0000 0x40000; env exists mcinitcmd && env exists secureboot && esbc_validate 0x806C0000; sf read 0x80d00000 0xd00000 0x100000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x80d00000; run distro_bootcmd;run qspi_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y diff --git a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig index 2f0ece68eb9..b33754882f3 100644 --- a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig @@ -33,6 +33,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y diff --git a/configs/ls2088ardb_tfa_defconfig b/configs/ls2088ardb_tfa_defconfig index 37d32752788..0d912219fa8 100644 --- a/configs/ls2088ardb_tfa_defconfig +++ b/configs/ls2088ardb_tfa_defconfig @@ -35,6 +35,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y +CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index a1a56645921..378b9f2a361 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -31,6 +31,7 @@ CONFIG_BOOTCOMMAND="run mmc_mmc" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="run try_bootscript" CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_PAD_TO=0x8000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig index 4e9ec52809a..4f651619f0e 100644 --- a/configs/maxbcm_defconfig +++ b/configs/maxbcm_defconfig @@ -22,6 +22,7 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x1bfd0 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_I2C=y diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig index c5af739fa48..8d3bd5d2be9 100644 --- a/configs/miqi-rk3288_defconfig +++ b/configs/miqi-rk3288_defconfig @@ -20,6 +20,7 @@ CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-miqi.dtb" CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_CMD_GPIO=y diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig index 7923fadf336..9d5f0932736 100644 --- a/configs/mk808_defconfig +++ b/configs/mk808_defconfig @@ -16,7 +16,6 @@ CONFIG_SPL_TEXT_BASE=0x60000000 CONFIG_ROCKCHIP_RK3066=y # CONFIG_ROCKCHIP_STIMER is not set CONFIG_TPL_TEXT_BASE=0x10080C04 -CONFIG_TPL_MAX_SIZE=32764 CONFIG_TPL_STACK=0x1008FFFF CONFIG_TARGET_MK808=y CONFIG_SPL_STACK_R_ADDR=0x70000000 @@ -32,12 +31,15 @@ CONFIG_DEFAULT_FDT_FILE="rk3066a-mk808.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x32000 +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000 CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_FS_EXT4=y CONFIG_SYS_MMCSD_FS_BOOT_PARTITION=2 CONFIG_TPL_NEEDS_SEPARATE_STACK=y +CONFIG_TPL_MAX_SIZE=0x7ffc CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_BOOTM_PLAN9 is not set diff --git a/configs/mt7620_mt7530_rfb_defconfig b/configs/mt7620_mt7530_rfb_defconfig index 5bf12729050..9622d821c13 100644 --- a/configs/mt7620_mt7530_rfb_defconfig +++ b/configs/mt7620_mt7530_rfb_defconfig @@ -24,6 +24,7 @@ CONFIG_DEBUG_UART=y CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_SYS_MALLOC_BOOTPARAMS=y +CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y # CONFIG_CMD_ELF is not set diff --git a/configs/mt7620_rfb_defconfig b/configs/mt7620_rfb_defconfig index 8a4124e95ca..048a83c0052 100644 --- a/configs/mt7620_rfb_defconfig +++ b/configs/mt7620_rfb_defconfig @@ -23,6 +23,7 @@ CONFIG_DEBUG_UART=y CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_SYS_MALLOC_BOOTPARAMS=y +CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y # CONFIG_CMD_ELF is not set diff --git a/configs/mt7628_rfb_defconfig b/configs/mt7628_rfb_defconfig index 3ca36cdede3..fedc217a9cf 100644 --- a/configs/mt7628_rfb_defconfig +++ b/configs/mt7628_rfb_defconfig @@ -23,6 +23,7 @@ CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SYS_MALLOC_BOOTPARAMS=y +CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y # CONFIG_CMD_ELF is not set diff --git a/configs/mt7629_rfb_defconfig b/configs/mt7629_rfb_defconfig index 80e530836d5..b1f528bbdde 100644 --- a/configs/mt7629_rfb_defconfig +++ b/configs/mt7629_rfb_defconfig @@ -22,6 +22,7 @@ CONFIG_BOOTDELAY=3 CONFIG_DEFAULT_FDT_FILE="mt7629-rfb" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_NOR_SUPPORT=y diff --git a/configs/nanopc-t4-rk3399_defconfig b/configs/nanopc-t4-rk3399_defconfig index 31de4bd1a94..81d474ed235 100644 --- a/configs/nanopc-t4-rk3399_defconfig +++ b/configs/nanopc-t4-rk3399_defconfig @@ -14,6 +14,8 @@ CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopc-t4.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/nanopi-m4-2gb-rk3399_defconfig b/configs/nanopi-m4-2gb-rk3399_defconfig index 7c8eff869b6..608ef3824f0 100644 --- a/configs/nanopi-m4-2gb-rk3399_defconfig +++ b/configs/nanopi-m4-2gb-rk3399_defconfig @@ -14,6 +14,8 @@ CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4-2gb.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/nanopi-m4-rk3399_defconfig b/configs/nanopi-m4-rk3399_defconfig index d500ebe58dc..c504a6d1755 100644 --- a/configs/nanopi-m4-rk3399_defconfig +++ b/configs/nanopi-m4-rk3399_defconfig @@ -14,6 +14,8 @@ CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/nanopi-m4b-rk3399_defconfig b/configs/nanopi-m4b-rk3399_defconfig index 16e39035e5e..de950c36933 100644 --- a/configs/nanopi-m4b-rk3399_defconfig +++ b/configs/nanopi-m4b-rk3399_defconfig @@ -14,6 +14,8 @@ CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4b.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/nanopi-neo4-rk3399_defconfig b/configs/nanopi-neo4-rk3399_defconfig index 753ba92d0ed..b3dfafa971d 100644 --- a/configs/nanopi-neo4-rk3399_defconfig +++ b/configs/nanopi-neo4-rk3399_defconfig @@ -14,6 +14,8 @@ CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-neo4.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/nanopi-r2s-rk3328_defconfig b/configs/nanopi-r2s-rk3328_defconfig index 453e54295de..54ccecb33e1 100644 --- a/configs/nanopi-r2s-rk3328_defconfig +++ b/configs/nanopi-r2s-rk3328_defconfig @@ -26,6 +26,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2s.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y @@ -33,6 +35,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_TPL_MAX_SIZE=0x40000 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/nanopi-r4s-rk3399_defconfig b/configs/nanopi-r4s-rk3399_defconfig index 46ba07f4d55..f5e24e8814f 100644 --- a/configs/nanopi-r4s-rk3399_defconfig +++ b/configs/nanopi-r4s-rk3399_defconfig @@ -14,6 +14,8 @@ CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-r4s.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/odroid-go2_defconfig b/configs/odroid-go2_defconfig index 8ff71fd28cd..4e57a2b52ea 100644 --- a/configs/odroid-go2_defconfig +++ b/configs/odroid-go2_defconfig @@ -32,6 +32,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3326-odroid-go2.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y @@ -40,6 +42,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set +CONFIG_TPL_MAX_SIZE=0x20000 # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set diff --git a/configs/omap35_logic_defconfig b/configs/omap35_logic_defconfig index 72b83b42426..d205cc308cc 100644 --- a/configs/omap35_logic_defconfig +++ b/configs/omap35_logic_defconfig @@ -20,6 +20,7 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="setenv preboot;saveenv;" CONFIG_DEFAULT_FDT_FILE="logicpd-torpedo-35xx-devkit.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set # CONFIG_SPL_FS_EXT4 is not set diff --git a/configs/omap35_logic_somlv_defconfig b/configs/omap35_logic_somlv_defconfig index ffb0e28569a..b0832a09fde 100644 --- a/configs/omap35_logic_somlv_defconfig +++ b/configs/omap35_logic_somlv_defconfig @@ -21,6 +21,7 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="setenv preboot;saveenv;" CONFIG_DEFAULT_FDT_FILE="logicpd-som-lv-35xx-devkit.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set # CONFIG_SPL_FS_EXT4 is not set diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig index 8a542763c1e..1518d1e5e3e 100644 --- a/configs/omap3_beagle_defconfig +++ b/configs/omap3_beagle_defconfig @@ -14,6 +14,7 @@ CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="omap3-beagle.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_FS_EXT4 is not set CONFIG_SPL_MTD_SUPPORT=y diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig index a4bcb43926d..914b1ea1096 100644 --- a/configs/omap3_evm_defconfig +++ b/configs/omap3_evm_defconfig @@ -14,6 +14,7 @@ CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run e CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="omap3-evm.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_FS_EXT4 is not set CONFIG_SPL_MTD_SUPPORT=y diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index dfd9c307339..4d3cafc7ae1 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -19,6 +19,7 @@ CONFIG_BOOTCOMMAND="run autoboot" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="setenv preboot;saveenv;" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set # CONFIG_SPL_FS_EXT4 is not set diff --git a/configs/omap3_logic_somlv_defconfig b/configs/omap3_logic_somlv_defconfig index b49734666d7..4afc37bec64 100644 --- a/configs/omap3_logic_somlv_defconfig +++ b/configs/omap3_logic_somlv_defconfig @@ -21,6 +21,7 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="setenv preboot;saveenv;" CONFIG_DEFAULT_FDT_FILE="logicpd-som-lv-37xx-devkit.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set # CONFIG_SPL_FS_EXT4 is not set diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig index 6b8ce982aaa..a815b9ab573 100644 --- a/configs/omap4_panda_defconfig +++ b/configs/omap4_panda_defconfig @@ -11,6 +11,7 @@ CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run f CONFIG_DEFAULT_FDT_FILE="omap4-panda.dtb" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SPL_MAX_SIZE=0xbc00 # CONFIG_SPL_FS_EXT4 is not set # CONFIG_SPL_I2C is not set # CONFIG_SPL_NAND_SUPPORT is not set diff --git a/configs/omap4_sdp4430_defconfig b/configs/omap4_sdp4430_defconfig index 6185421708e..7a435930f87 100644 --- a/configs/omap4_sdp4430_defconfig +++ b/configs/omap4_sdp4430_defconfig @@ -15,6 +15,7 @@ CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run f CONFIG_DEFAULT_FDT_FILE="omap4-sdp.dtb" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SPL_MAX_SIZE=0xbc00 # CONFIG_SPL_I2C is not set # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SYS_MAXARGS=64 diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig index 748b0125276..beccc82aa69 100644 --- a/configs/omap5_uevm_defconfig +++ b/configs/omap5_uevm_defconfig @@ -14,6 +14,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="if test ${dofastboot} -eq 1; then echo Boot fastboot requested, resetting dofastboot ...;setenv dofastboot 0; saveenv;echo Booting into fastboot ...; fastboot 1;fi;if test ${boot_fit} -eq 1; then run update_to_fit;fi;run findfdt; run finduuid; run distro_bootcmd;run emmc_android_boot; " CONFIG_DEFAULT_FDT_FILE="omap5-uevm.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SPL_MAX_SIZE=0x1dc00 # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index 799dc407571..0ae02d923d3 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -31,6 +31,7 @@ CONFIG_LOGLEVEL=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_CLOCKS=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_PAD_TO=0x8000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xb5 CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/openpiton_riscv64_spl_defconfig b/configs/openpiton_riscv64_spl_defconfig index 6e4e4549419..fdb34d9d06e 100644 --- a/configs/openpiton_riscv64_spl_defconfig +++ b/configs/openpiton_riscv64_spl_defconfig @@ -20,6 +20,7 @@ CONFIG_ENV_VARS_UBOOT_CONFIG=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fdt addr ${fdtcontroladdr}; fdt move ${fdtcontroladdr} ${fdt_addr_r}; load mmc ${mmcdev}:${mmcpart} ${kernel_addr_r} ${image}; booti ${kernel_addr_r} - ${fdt_addr_r}; " +CONFIG_SPL_MAX_SIZE=0x100000 # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_BANNER_PRINT is not set diff --git a/configs/orangepi-rk3399_defconfig b/configs/orangepi-rk3399_defconfig index 461300fd106..b090e928dfd 100644 --- a/configs/orangepi-rk3399_defconfig +++ b/configs/orangepi-rk3399_defconfig @@ -14,6 +14,8 @@ CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-orangepi.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/orangepi_zero2_defconfig b/configs/orangepi_zero2_defconfig index 4788102e975..d9c89c88a97 100644 --- a/configs/orangepi_zero2_defconfig +++ b/configs/orangepi_zero2_defconfig @@ -10,6 +10,7 @@ CONFIG_MACH_SUN50I_H616=y CONFIG_MMC0_CD_PIN="PF6" CONFIG_R_I2C_ENABLE=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_MAX_SIZE=0xbfa0 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig index 5f6455b70c3..13b1b75b4a2 100644 --- a/configs/phycore-imx8mm_defconfig +++ b/configs/phycore-imx8mm_defconfig @@ -26,6 +26,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadimage; then run mmcboot; else run netboot; fi; fi;" CONFIG_DEFAULT_FDT_FILE="oftree" CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig index 300216846dc..7ec698bc6d3 100644 --- a/configs/phycore-imx8mp_defconfig +++ b/configs/phycore-imx8mp_defconfig @@ -27,6 +27,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadimage; then run mmcboot; else run netboot; fi; fi;" CONFIG_DEFAULT_FDT_FILE="oftree" CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x26000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig index 64446492221..5b67b96254e 100644 --- a/configs/phycore-rk3288_defconfig +++ b/configs/phycore-rk3288_defconfig @@ -21,6 +21,7 @@ CONFIG_DEFAULT_FDT_FILE="rk3288-phycore-rdk.dtb" CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_CMD_GPIO=y diff --git a/configs/pico-dwarf-imx7d_defconfig b/configs/pico-dwarf-imx7d_defconfig index 9d6a9168aee..d030af10951 100644 --- a/configs/pico-dwarf-imx7d_defconfig +++ b/configs/pico-dwarf-imx7d_defconfig @@ -25,6 +25,7 @@ CONFIG_HAS_BOARD_SIZE_LIMIT=y CONFIG_BOARD_SIZE_LIMIT=715776 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx7d-pico-dwarf.dtb" +CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig index 464fdccc97b..568623b5556 100644 --- a/configs/pico-hobbit-imx7d_defconfig +++ b/configs/pico-hobbit-imx7d_defconfig @@ -25,6 +25,7 @@ CONFIG_HAS_BOARD_SIZE_LIMIT=y CONFIG_BOARD_SIZE_LIMIT=715776 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx7d-pico-hobbit.dtb" +CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pico-imx7d_bl33_defconfig b/configs/pico-imx7d_bl33_defconfig index 18fa0026b67..d814a42a9f3 100644 --- a/configs/pico-imx7d_bl33_defconfig +++ b/configs/pico-imx7d_bl33_defconfig @@ -26,6 +26,7 @@ CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run distro_bootcmd" +CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig index 9750f97ef16..cea2df659c7 100644 --- a/configs/pico-imx7d_defconfig +++ b/configs/pico-imx7d_defconfig @@ -25,6 +25,7 @@ CONFIG_HAS_BOARD_SIZE_LIMIT=y CONFIG_BOARD_SIZE_LIMIT=715776 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="ask" +CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pico-imx8mq_defconfig b/configs/pico-imx8mq_defconfig index 44027ce171d..ba384d4be7f 100644 --- a/configs/pico-imx8mq_defconfig +++ b/configs/pico-imx8mq_defconfig @@ -30,6 +30,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/pico-nymph-imx7d_defconfig b/configs/pico-nymph-imx7d_defconfig index 9d6a9168aee..d030af10951 100644 --- a/configs/pico-nymph-imx7d_defconfig +++ b/configs/pico-nymph-imx7d_defconfig @@ -25,6 +25,7 @@ CONFIG_HAS_BOARD_SIZE_LIMIT=y CONFIG_BOARD_SIZE_LIMIT=715776 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx7d-pico-dwarf.dtb" +CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig index 9a91ace6fe1..822f61def6f 100644 --- a/configs/pico-pi-imx7d_defconfig +++ b/configs/pico-pi-imx7d_defconfig @@ -25,6 +25,7 @@ CONFIG_HAS_BOARD_SIZE_LIMIT=y CONFIG_BOARD_SIZE_LIMIT=715776 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx7d-pico-pi.dtb" +CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig index 8ca1d0708f9..825d8602e6b 100644 --- a/configs/pinebook-pro-rk3399_defconfig +++ b/configs/pinebook-pro-rk3399_defconfig @@ -19,6 +19,8 @@ CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-pinebook-pro.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/pm9g45_defconfig b/configs/pm9g45_defconfig index 364ea830085..34bf3d7e93a 100644 --- a/configs/pm9g45_defconfig +++ b/configs/pm9g45_defconfig @@ -22,6 +22,7 @@ CONFIG_BOOTCOMMAND="nand read 0x70000000 0x200000 0x300000;bootm 0x70000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_RESET_PHY_R=y +CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_CBSIZE=256 diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig index cb463a9b69a..8acd84a060e 100644 --- a/configs/popmetal-rk3288_defconfig +++ b/configs/popmetal-rk3288_defconfig @@ -21,6 +21,7 @@ CONFIG_DEFAULT_FDT_FILE="rk3288-popmetal.dtb" CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_CMD_GPIO=y diff --git a/configs/porter_defconfig b/configs/porter_defconfig index 7b78c68fd41..528dd9e6d4e 100644 --- a/configs/porter_defconfig +++ b/configs/porter_defconfig @@ -28,6 +28,7 @@ CONFIG_SYS_LOAD_ADDR=0x50000000 CONFIG_ENV_ADDR=0xC0000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 +CONFIG_SPL_MAX_SIZE=0x4000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_RAM_SUPPORT=y diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index 7ce2dc07192..a29018501f4 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -20,6 +20,8 @@ CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-puma-haikou.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 diff --git a/configs/px30-core-ctouch2-of10-px30_defconfig b/configs/px30-core-ctouch2-of10-px30_defconfig index 213d01fe7a8..005abd968b8 100644 --- a/configs/px30-core-ctouch2-of10-px30_defconfig +++ b/configs/px30-core-ctouch2-of10-px30_defconfig @@ -29,12 +29,15 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/px30-engicam-px30-core-ctouch2-of10.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y # CONFIG_TPL_BANNER_PRINT is not set CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set +CONFIG_TPL_MAX_SIZE=0x20000 # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set diff --git a/configs/px30-core-ctouch2-px30_defconfig b/configs/px30-core-ctouch2-px30_defconfig index 875d7aa7de3..16503ae794f 100644 --- a/configs/px30-core-ctouch2-px30_defconfig +++ b/configs/px30-core-ctouch2-px30_defconfig @@ -29,12 +29,15 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/px30-engicam-px30-core-ctouch2.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y # CONFIG_TPL_BANNER_PRINT is not set CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set +CONFIG_TPL_MAX_SIZE=0x20000 # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set diff --git a/configs/px30-core-edimm2.2-px30_defconfig b/configs/px30-core-edimm2.2-px30_defconfig index 4e2fa8cf7dc..ab7c0692b4f 100644 --- a/configs/px30-core-edimm2.2-px30_defconfig +++ b/configs/px30-core-edimm2.2-px30_defconfig @@ -29,12 +29,15 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/px30-engicam-px30-core-edimm2.2.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y # CONFIG_TPL_BANNER_PRINT is not set CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set +CONFIG_TPL_MAX_SIZE=0x20000 # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig index f9bdf68fd80..efd38f52b78 100644 --- a/configs/qemu-riscv32_spl_defconfig +++ b/configs/qemu-riscv32_spl_defconfig @@ -13,6 +13,7 @@ CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y +CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_CMD_MII is not set diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig index 5cd22450714..de82869525f 100644 --- a/configs/qemu-riscv64_spl_defconfig +++ b/configs/qemu-riscv64_spl_defconfig @@ -13,6 +13,7 @@ CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y +CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_CMD_MII is not set diff --git a/configs/roc-cc-rk3308_defconfig b/configs/roc-cc-rk3308_defconfig index 0ae45ca8a19..f90c36332b2 100644 --- a/configs/roc-cc-rk3308_defconfig +++ b/configs/roc-cc-rk3308_defconfig @@ -22,6 +22,8 @@ CONFIG_FIT_VERBOSE=y CONFIG_BOOTDELAY=0 CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_STACK_R=y # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig index 5fc4dd77943..e9907debfbe 100644 --- a/configs/roc-cc-rk3328_defconfig +++ b/configs/roc-cc-rk3328_defconfig @@ -26,6 +26,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-roc-cc.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y @@ -33,6 +35,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_TPL_MAX_SIZE=0x40000 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig index fd857ed0ffd..135679b872f 100644 --- a/configs/roc-pc-mezzanine-rk3399_defconfig +++ b/configs/roc-pc-mezzanine-rk3399_defconfig @@ -20,6 +20,8 @@ CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-mezzanine.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x20000 diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index 4684fa6e747..c98fd0303c6 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -20,6 +20,8 @@ CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x20000 diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig index 80d1e63b59c..ebc318405ad 100644 --- a/configs/rock-pi-4-rk3399_defconfig +++ b/configs/rock-pi-4-rk3399_defconfig @@ -16,6 +16,8 @@ CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4b.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/rock-pi-4c-rk3399_defconfig b/configs/rock-pi-4c-rk3399_defconfig index bda4b70dbf9..23381540987 100644 --- a/configs/rock-pi-4c-rk3399_defconfig +++ b/configs/rock-pi-4c-rk3399_defconfig @@ -16,6 +16,8 @@ CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4c.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig index 36038d90530..26f9c91b6d8 100644 --- a/configs/rock-pi-e-rk3328_defconfig +++ b/configs/rock-pi-e-rk3328_defconfig @@ -27,6 +27,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock-pi-e.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y @@ -35,6 +37,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_TPL_MAX_SIZE=0x40000 CONFIG_TPL_DRIVERS_MISC=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y diff --git a/configs/rock-pi-n10-rk3399pro_defconfig b/configs/rock-pi-n10-rk3399pro_defconfig index 7151da4c191..c31a5ed531e 100644 --- a/configs/rock-pi-n10-rk3399pro_defconfig +++ b/configs/rock-pi-n10-rk3399pro_defconfig @@ -18,6 +18,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399pro-rock-pi-n10.dtb" # CONFIG_CONSOLE_MUX is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/rock-pi-n8-rk3288_defconfig b/configs/rock-pi-n8-rk3288_defconfig index 6d13e351ee6..19c3f54d80b 100644 --- a/configs/rock-pi-n8-rk3288_defconfig +++ b/configs/rock-pi-n8-rk3288_defconfig @@ -20,6 +20,7 @@ CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_CMD_SPL=y diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig index e8d183cd9b6..fbaf82df13a 100644 --- a/configs/rock2_defconfig +++ b/configs/rock2_defconfig @@ -21,6 +21,7 @@ CONFIG_DEFAULT_FDT_FILE="rk3288-rock2-square.dtb" CONFIG_SILENT_CONSOLE=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_CMD_GPIO=y diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig index ea61fe738f2..2524ad94498 100644 --- a/configs/rock64-rk3328_defconfig +++ b/configs/rock64-rk3328_defconfig @@ -26,6 +26,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock64.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y @@ -33,6 +35,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_TPL_MAX_SIZE=0x40000 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig index ce37b578e26..b581a900c7a 100644 --- a/configs/rock960-rk3399_defconfig +++ b/configs/rock960-rk3399_defconfig @@ -15,6 +15,8 @@ CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/rock_defconfig b/configs/rock_defconfig index 4aa4608f904..9ec2c4b9231 100644 --- a/configs/rock_defconfig +++ b/configs/rock_defconfig @@ -22,6 +22,8 @@ CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3188-radxarock.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x7800 +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_RANDOM_UUID=y diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig index e6f7a8469a3..a4f3d3d68a9 100644 --- a/configs/rockpro64-rk3399_defconfig +++ b/configs/rockpro64-rk3399_defconfig @@ -19,6 +19,8 @@ CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/sama5d27_giantboard_defconfig b/configs/sama5d27_giantboard_defconfig index 610f85a302d..050d9bf1d48 100644 --- a/configs/sama5d27_giantboard_defconfig +++ b/configs/sama5d27_giantboard_defconfig @@ -36,6 +36,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fatload mmc 0 0x22000000 at91-sama5d27_giantboard.dtb; fatload mmc 0 0x23000000 zImage; bootz 0x23000000 - 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig index b4c8863e9bf..4a72c7e6cf6 100644 --- a/configs/sama5d27_som1_ek_mmc1_defconfig +++ b/configs/sama5d27_som1_ek_mmc1_defconfig @@ -32,6 +32,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fatload mmc 1 0x22000000 at91-sama5d27_som1_ek.dtb; fatload mmc 1 0x23000000 zImage; bootz 0x23000000 - 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig index 2ec2f094eee..82a6803ab3c 100644 --- a/configs/sama5d27_som1_ek_mmc_defconfig +++ b/configs/sama5d27_som1_ek_mmc_defconfig @@ -33,6 +33,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fatload mmc 0 0x22000000 at91-sama5d27_som1_ek.dtb; fatload mmc 0 0x23000000 zImage; bootz 0x23000000 - 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig index 55155c7861a..e590643e741 100644 --- a/configs/sama5d27_som1_ek_qspiflash_defconfig +++ b/configs/sama5d27_som1_ek_qspiflash_defconfig @@ -31,6 +31,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig index 5413652fad5..607272f0726 100644 --- a/configs/sama5d27_wlsom1_ek_mmc_defconfig +++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_ # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_DISPLAY_PRINT=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_AT91_MCK_BYPASS=y diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig index 3bc9558aea1..08fc34ef59e 100644 --- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig +++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x220 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_DISPLAY_PRINT=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_DM_SPI_FLASH=y diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig index 69d8eedb872..ee2817b4d66 100644 --- a/configs/sama5d2_icp_mmc_defconfig +++ b/configs/sama5d2_icp_mmc_defconfig @@ -31,6 +31,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x21000000 at91-sama5d2_icp.dtb; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_DISPLAY_PRINT=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_RAM_SUPPORT=y diff --git a/configs/sama5d2_icp_qspiflash_defconfig b/configs/sama5d2_icp_qspiflash_defconfig index ca5787b1bec..9678b72f771 100644 --- a/configs/sama5d2_icp_qspiflash_defconfig +++ b/configs/sama5d2_icp_qspiflash_defconfig @@ -26,6 +26,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x21000000 at91-sama5d2_icp.dtb; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig index 3af514530d9..12ad0a443f8 100644 --- a/configs/sama5d2_xplained_emmc_defconfig +++ b/configs/sama5d2_xplained_emmc_defconfig @@ -31,6 +31,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwai CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x22000000 at91-sama5d2_xplained.dtb; fatload mmc 0:1 0x23000000 zImage; bootz 0x23000000 - 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index b852b4e3a00..18d866c0f8e 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -33,6 +33,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fatload mmc 1:1 0x22000000 at91-sama5d2_xplained.dtb; fatload mmc 1:1 0x23000000 zImage; bootz 0x23000000 - 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig index c41c6e134c3..d3b9c4fcb39 100644 --- a/configs/sama5d2_xplained_qspiflash_defconfig +++ b/configs/sama5d2_xplained_qspiflash_defconfig @@ -34,6 +34,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe 1:0; sf read 0x22000000 0x180000 0x80000; sf read 0x23000000 0x200000 0x600000; bootz 0x23000000 - 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index 4981a8a55ec..e494893c051 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -35,6 +35,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="ext4load mmc 0:1 0x22000000 /boot/at91-sama5d2_xplained.dtb; ext4load mmc 0:1 0x23000000 /boot/zImage; bootz 0x23000000 - 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 diff --git a/configs/sama5d36ek_cmp_mmc_defconfig b/configs/sama5d36ek_cmp_mmc_defconfig index a20b60093d0..72d0958873a 100644 --- a/configs/sama5d36ek_cmp_mmc_defconfig +++ b/configs/sama5d36ek_cmp_mmc_defconfig @@ -24,6 +24,7 @@ CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_ # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig index 21447263822..4e1e012cd97 100644 --- a/configs/sama5d36ek_cmp_nandflash_defconfig +++ b/configs/sama5d36ek_cmp_nandflash_defconfig @@ -24,6 +24,7 @@ CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig index 2190edd55f2..1bf6e66d67a 100644 --- a/configs/sama5d36ek_cmp_spiflash_defconfig +++ b/configs/sama5d36ek_cmp_spiflash_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x220 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index 86724e4df37..d39974e3575 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwai CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_name}.dtb; fi; fatload mmc 0:1 0x21000000 ${dtb_name}; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index 7a870ac38b3..878eca9cd98 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -29,6 +29,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(boots CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0x200000 0x600000;bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index 742830562f8..5074d015125 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -34,6 +34,7 @@ CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_ # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index 55b9e9570ef..ef88b51dacf 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -31,6 +31,7 @@ CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index 20ea57ff4aa..04d68d33a03 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -34,6 +34,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(boots CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x22000000 0x6c000 0x394000; bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index 1b17400267b..04358d19120 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -33,6 +33,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_name}.dtb; fi; fatload mmc 0:1 0x21000000 ${dtb_name}; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index 49e3c778dc4..77851be9bdb 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -30,6 +30,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0x200000 0x600000;bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index 5df91abc6ff..979186b4474 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -35,6 +35,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x22000000 0x6c000 0x394000; bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig index 4c200304a46..98819d9ddb7 100644 --- a/configs/sama5d4ek_mmc_defconfig +++ b/configs/sama5d4ek_mmc_defconfig @@ -34,6 +34,7 @@ CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_ # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig index 4f016bc8243..a402d693b3a 100644 --- a/configs/sama5d4ek_nandflash_defconfig +++ b/configs/sama5d4ek_nandflash_defconfig @@ -31,6 +31,7 @@ CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig index 469040627c2..364e949cb99 100644 --- a/configs/sama5d4ek_spiflash_defconfig +++ b/configs/sama5d4ek_spiflash_defconfig @@ -34,6 +34,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(boots CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x22000000 0x6c000 0x394000; bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 diff --git a/configs/sheep-rk3368_defconfig b/configs/sheep-rk3368_defconfig index 80f599d3a39..5b804685012 100644 --- a/configs/sheep-rk3368_defconfig +++ b/configs/sheep-rk3368_defconfig @@ -15,6 +15,8 @@ CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-sheep.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_CMD_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_REGMAP=y diff --git a/configs/sifive_unleashed_defconfig b/configs/sifive_unleashed_defconfig index 19603592748..f219bd21b48 100644 --- a/configs/sifive_unleashed_defconfig +++ b/configs/sifive_unleashed_defconfig @@ -22,6 +22,7 @@ CONFIG_DEFAULT_FDT_FILE="sifive/hifive-unleashed-a00.dtb" CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig index 41224d03814..40aa38fe524 100644 --- a/configs/sifive_unmatched_defconfig +++ b/configs/sifive_unmatched_defconfig @@ -26,6 +26,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ID_EEPROM=y +CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/silk_defconfig b/configs/silk_defconfig index 065241279ed..6cbe5aaa865 100644 --- a/configs/silk_defconfig +++ b/configs/silk_defconfig @@ -28,6 +28,7 @@ CONFIG_SYS_LOAD_ADDR=0x50000000 CONFIG_ENV_ADDR=0xC0000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 +CONFIG_SPL_MAX_SIZE=0x4000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_RAM_SUPPORT=y diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig index b3c6d23e717..38ddb142b17 100644 --- a/configs/smartweb_defconfig +++ b/configs/smartweb_defconfig @@ -32,6 +32,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run flashboot" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_MAX_SIZE=0x1000 +CONFIG_SPL_PAD_TO=0x20000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_RAW_ONLY=y CONFIG_SPL_NAND_DRIVERS=y diff --git a/configs/sniper_defconfig b/configs/sniper_defconfig index 483b3713186..ef2f49f627e 100644 --- a/configs/sniper_defconfig +++ b/configs/sniper_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="setenv boot_mmc_part ${kernel_mmc_part}; if test reboot-${reboot-mode} = reboot-r; then echo recovery; setenv boot_mmc_part ${recovery_mmc_part}; fi; if test reboot-${reboot-mode} = reboot-b; then echo fastboot; fastboot 0; fi; part start mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_start; part size mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_size; mmc dev ${boot_mmc_dev}; mmc read ${kernel_addr_r} ${boot_mmc_start} ${boot_mmc_size} && bootm ${kernel_addr_r};" CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_SPL_MAX_SIZE=0xec00 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=2 diff --git a/configs/socfpga_agilex_atf_defconfig b/configs/socfpga_agilex_atf_defconfig index 9fd631bf0dd..f84f258e1cf 100644 --- a/configs/socfpga_agilex_atf_defconfig +++ b/configs/socfpga_agilex_atf_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="earlycon" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_CRC32=y CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig index f356466d54c..bc8e7811ee8 100644 --- a/configs/socfpga_agilex_defconfig +++ b/configs/socfpga_agilex_defconfig @@ -22,6 +22,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="earlycon" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot" +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000 diff --git a/configs/socfpga_agilex_vab_defconfig b/configs/socfpga_agilex_vab_defconfig index 1ec6d7b1aa6..7bb0df2c448 100644 --- a/configs/socfpga_agilex_vab_defconfig +++ b/configs/socfpga_agilex_vab_defconfig @@ -26,6 +26,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="earlycon" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_CRC32=y CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig index 903d885334d..c3cd442d374 100644 --- a/configs/socfpga_arria10_defconfig +++ b/configs/socfpga_arria10_defconfig @@ -24,6 +24,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y +CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_FPGA=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index 37a401eafc6..ee0585ca323 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y +CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index a9dfeef7413..3ab2a7d4573 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y +CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_dbm_soc1_defconfig b/configs/socfpga_dbm_soc1_defconfig index bb06c408c8e..cccee6f777a 100644 --- a/configs/socfpga_dbm_soc1_defconfig +++ b/configs/socfpga_dbm_soc1_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y +CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_HUSH_PARSER=y diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig index e45e3dbaa70..74b1c803f5a 100644 --- a/configs/socfpga_de0_nano_soc_defconfig +++ b/configs/socfpga_de0_nano_soc_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y +CONFIG_SPL_PAD_TO=0x10000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig index 7a022992cbb..9ae804f5f65 100644 --- a/configs/socfpga_de10_nano_defconfig +++ b/configs/socfpga_de10_nano_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y +CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_de10_standard_defconfig b/configs/socfpga_de10_standard_defconfig index 0a2a190340e..8a63e4c5913 100644 --- a/configs/socfpga_de10_standard_defconfig +++ b/configs/socfpga_de10_standard_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y +CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig index c2fac57d55c..cf48d443e4b 100644 --- a/configs/socfpga_de1_soc_defconfig +++ b/configs/socfpga_de1_soc_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y +CONFIG_SPL_PAD_TO=0x10000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig index 770347c0407..c289f1b8bfa 100644 --- a/configs/socfpga_is1_defconfig +++ b/configs/socfpga_is1_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y +CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig index 936402ba819..97977d33bd4 100644 --- a/configs/socfpga_mcvevk_defconfig +++ b/configs/socfpga_mcvevk_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y +CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_n5x_atf_defconfig b/configs/socfpga_n5x_atf_defconfig index 5e213d0a0e4..dc4734b8969 100644 --- a/configs/socfpga_n5x_atf_defconfig +++ b/configs/socfpga_n5x_atf_defconfig @@ -24,6 +24,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="earlycon panic=-1 earlyprintk=ttyS0,115200" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_CRC32=y CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/socfpga_n5x_defconfig b/configs/socfpga_n5x_defconfig index 1fd4131108b..3a17ace0fda 100644 --- a/configs/socfpga_n5x_defconfig +++ b/configs/socfpga_n5x_defconfig @@ -19,6 +19,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="earlycon panic=-1 earlyprintk=ttyS0,115200" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot" +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000 diff --git a/configs/socfpga_n5x_vab_defconfig b/configs/socfpga_n5x_vab_defconfig index 89a9025ae71..e1e61753b90 100644 --- a/configs/socfpga_n5x_vab_defconfig +++ b/configs/socfpga_n5x_vab_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="earlycon panic=-1 earlyprintk=ttyS0,115200" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_CRC32=y CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig index 2fea52b6eff..c55ed87f210 100644 --- a/configs/socfpga_secu1_defconfig +++ b/configs/socfpga_secu1_defconfig @@ -31,6 +31,7 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1 diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig index fba917ac3e3..db8dd0b2f20 100644 --- a/configs/socfpga_sockit_defconfig +++ b/configs/socfpga_sockit_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y +CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index 99f82e7f1c2..2602839e9d5 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y +CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index cdc48b1455d..d939d0cce4a 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_CLOCKS=y +CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_stratix10_atf_defconfig b/configs/socfpga_stratix10_atf_defconfig index db486958013..87c188fa9d7 100644 --- a/configs/socfpga_stratix10_atf_defconfig +++ b/configs/socfpga_stratix10_atf_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="earlycon" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_CRC32=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000 diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index 2d5315cf743..9db555a846a 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -24,6 +24,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="earlycon" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot" +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x3C00000 CONFIG_HUSH_PARSER=y diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index 202121511c1..154f8197b5d 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_CMDLINE_PS_SUPPORT=y diff --git a/configs/stm32746g-eval_defconfig b/configs/stm32746g-eval_defconfig index b90492685ac..92bd206b32c 100644 --- a/configs/stm32746g-eval_defconfig +++ b/configs/stm32746g-eval_defconfig @@ -18,6 +18,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_PAD_TO=0x8000 CONFIG_SYS_PROMPT="U-Boot > " CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_GPT=y diff --git a/configs/stm32746g-eval_spl_defconfig b/configs/stm32746g-eval_spl_defconfig index 7522a0e0b54..c8e30525a58 100644 --- a/configs/stm32746g-eval_spl_defconfig +++ b/configs/stm32746g-eval_spl_defconfig @@ -26,6 +26,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_PAD_TO=0x8000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_MTD_SUPPORT=y diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig index 0473ed6e609..76023a5dab3 100644 --- a/configs/stm32f746-disco_defconfig +++ b/configs/stm32f746-disco_defconfig @@ -18,6 +18,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_PAD_TO=0x8000 CONFIG_SYS_PROMPT="U-Boot > " CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_GPT=y diff --git a/configs/stm32f746-disco_spl_defconfig b/configs/stm32f746-disco_spl_defconfig index 440022d7523..1eeae3a4ac3 100644 --- a/configs/stm32f746-disco_spl_defconfig +++ b/configs/stm32f746-disco_spl_defconfig @@ -26,6 +26,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_PAD_TO=0x8000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_MTD_SUPPORT=y diff --git a/configs/stm32f769-disco_defconfig b/configs/stm32f769-disco_defconfig index 180112a5a06..7894594b01e 100644 --- a/configs/stm32f769-disco_defconfig +++ b/configs/stm32f769-disco_defconfig @@ -17,6 +17,7 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" # CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_PAD_TO=0x8000 CONFIG_SYS_PROMPT="U-Boot > " CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_GPT=y diff --git a/configs/stm32f769-disco_spl_defconfig b/configs/stm32f769-disco_spl_defconfig index 7594eff47c6..570f69fe1d2 100644 --- a/configs/stm32f769-disco_spl_defconfig +++ b/configs/stm32f769-disco_spl_defconfig @@ -25,6 +25,7 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" # CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_PAD_TO=0x8000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_MTD_SUPPORT=y diff --git a/configs/stout_defconfig b/configs/stout_defconfig index 46b2549ca4e..4fa82776545 100644 --- a/configs/stout_defconfig +++ b/configs/stout_defconfig @@ -28,6 +28,7 @@ CONFIG_SYS_LOAD_ADDR=0x50000000 CONFIG_ENV_ADDR=0xC0000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 +CONFIG_SPL_MAX_SIZE=0x4000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_RAM_SUPPORT=y diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig index b1990841987..279da693229 100644 --- a/configs/syzygy_hub_defconfig +++ b/configs/syzygy_hub_defconfig @@ -25,6 +25,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_USE_PREBOOT=y CONFIG_CLOCKS=y +CONFIG_SPL_MAX_SIZE=0x30000 CONFIG_SPL_STACK_R=y CONFIG_SPL_FS_LOAD_ARGS_NAME="system.dtb" CONFIG_SPL_OS_BOOT=y diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig index 8bc5afdc2e5..15687143358 100644 --- a/configs/taurus_defconfig +++ b/configs/taurus_defconfig @@ -39,6 +39,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_MAX_SIZE=0x3e00 +CONFIG_SPL_PAD_TO=0x20000 # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_CRC32=y diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index 43b7a70bcda..851b560d433 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -27,6 +27,7 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x1bfd0 CONFIG_SPL_I2C=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig index 85d7d2677a9..8134ccec9a1 100644 --- a/configs/ti816x_evm_defconfig +++ b/configs/ti816x_evm_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTCOMMAND="mmc rescan;fatload mmc 0 ${loadaddr} uImage;bootm ${loadaddr CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_MISC_INIT_R is not set +CONFIG_SPL_MAX_SIZE=0xfff1b400 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig index 5c2366098b7..019fe4b26e4 100644 --- a/configs/tinker-rk3288_defconfig +++ b/configs/tinker-rk3288_defconfig @@ -21,6 +21,7 @@ CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-tinker.dtb" CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_I2C=y diff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig index 4b6ae64988a..27d2e5c4028 100644 --- a/configs/tinker-s-rk3288_defconfig +++ b/configs/tinker-s-rk3288_defconfig @@ -11,7 +11,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker-s" CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_TINKER_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x800000 -CONFIG_SPL_SIZE_LIMIT=0x4B000 +CONFIG_SPL_SIZE_LIMIT=0x4b000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 @@ -21,6 +21,7 @@ CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-tinker-s.dtb" CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x300000 CONFIG_SPL_I2C=y diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig index e62b7dc8587..4e8f5fe078b 100644 --- a/configs/topic_miami_defconfig +++ b/configs/topic_miami_defconfig @@ -25,6 +25,7 @@ CONFIG_BOOTDELAY=0 CONFIG_BOOTCOMMAND="if mmcinfo; then if fatload mmc 0 0x1900000 ${bootscript}; then source 0x1900000; fi; fi; run $modeboot" CONFIG_USE_PREBOOT=y CONFIG_CLOCKS=y +CONFIG_SPL_MAX_SIZE=0x30000 CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig index 5acf1dec108..1e64b06e059 100644 --- a/configs/topic_miamilite_defconfig +++ b/configs/topic_miamilite_defconfig @@ -25,6 +25,7 @@ CONFIG_BOOTDELAY=0 CONFIG_BOOTCOMMAND="if mmcinfo; then if fatload mmc 0 0x1900000 ${bootscript}; then source 0x1900000; fi; fi; run $modeboot" CONFIG_USE_PREBOOT=y CONFIG_CLOCKS=y +CONFIG_SPL_MAX_SIZE=0x30000 CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig index 7a51c5c7c4b..bd70cb7015c 100644 --- a/configs/topic_miamiplus_defconfig +++ b/configs/topic_miamiplus_defconfig @@ -25,6 +25,7 @@ CONFIG_BOOTDELAY=0 CONFIG_BOOTCOMMAND="if mmcinfo; then if fatload mmc 0 0x1900000 ${bootscript}; then source 0x1900000; fi; fi; run $modeboot" CONFIG_USE_PREBOOT=y CONFIG_CLOCKS=y +CONFIG_SPL_MAX_SIZE=0x30000 CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index b8b01e2b33f..684d5d35ec3 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -36,6 +36,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x22fd0 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig index 03e4f1fb036..c0e4f15af54 100644 --- a/configs/uniphier_ld4_sld8_defconfig +++ b/configs/uniphier_ld4_sld8_defconfig @@ -16,6 +16,8 @@ CONFIG_BOOTCOMMAND="run ${bootdev}script; run ${bootdev}boot" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="env exist ${bootdev}preboot && run ${bootdev}preboot" CONFIG_LOGLEVEL=6 +CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_PAD_TO=0x20000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_CMD_CONFIG=y diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig index b69b2b26570..13e208c1a03 100644 --- a/configs/uniphier_v7_defconfig +++ b/configs/uniphier_v7_defconfig @@ -16,6 +16,8 @@ CONFIG_BOOTCOMMAND="run ${bootdev}script; run ${bootdev}boot" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="env exist ${bootdev}preboot && run ${bootdev}preboot" CONFIG_LOGLEVEL=6 +CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_PAD_TO=0x20000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_CMD_CONFIG=y diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig index db986cf13b8..c0cdc121f0a 100644 --- a/configs/uniphier_v8_defconfig +++ b/configs/uniphier_v8_defconfig @@ -15,6 +15,8 @@ CONFIG_BOOTCOMMAND="run ${bootdev}script; run ${bootdev}boot" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="env exist ${bootdev}preboot && run ${bootdev}preboot" CONFIG_LOGLEVEL=6 +CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_PAD_TO=0x20000 CONFIG_CMD_CONFIG=y # CONFIG_CMD_XIMG is not set CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig index ec47a0f10bd..e2e6cfb9623 100644 --- a/configs/verdin-imx8mm_defconfig +++ b/configs/verdin-imx8mm_defconfig @@ -32,6 +32,7 @@ CONFIG_LOG=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig index 10d88ff79f1..0ec44aab4be 100644 --- a/configs/verdin-imx8mp_defconfig +++ b/configs/verdin-imx8mp_defconfig @@ -40,6 +40,7 @@ CONFIG_LOG=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x26000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/vocore2_defconfig b/configs/vocore2_defconfig index 33d27ad4b62..42031be6270 100644 --- a/configs/vocore2_defconfig +++ b/configs/vocore2_defconfig @@ -31,6 +31,7 @@ CONFIG_LOGLEVEL=8 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_MALLOC_BOOTPARAMS=y +CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig index ecba1a76c38..dedf6277195 100644 --- a/configs/vyasa-rk3288_defconfig +++ b/configs/vyasa-rk3288_defconfig @@ -20,6 +20,7 @@ CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-vyasa.dtb" CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_OS_BOOT=y diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig index 4c5008fedef..e3409ad305e 100644 --- a/configs/work_92105_defconfig +++ b/configs/work_92105_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTARGS="console=ttyS2,115200n8" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_SPL_PAD_TO=0x20000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/x530_defconfig b/configs/x530_defconfig index 47601c41646..d145c8fa7d3 100644 --- a/configs/x530_defconfig +++ b/configs/x530_defconfig @@ -26,6 +26,7 @@ CONFIG_SILENT_U_BOOT_ONLY=y CONFIG_SILENT_CONSOLE_UPDATE_ON_RELOC=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x22fd0 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_CBSIZE=256 diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index 5e724f063f9..c01a9189d44 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -28,6 +28,7 @@ CONFIG_LEGACY_IMAGE_FORMAT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_USE_PREBOOT=y CONFIG_CLOCKS=y +CONFIG_SPL_MAX_SIZE=0x30000 CONFIG_SPL_STACK_R=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_FS_LOAD_ARGS_NAME="system.dtb" diff --git a/configs/xilinx_zynqmp_mini_defconfig b/configs/xilinx_zynqmp_mini_defconfig index 50f87ba6028..cb714d78622 100644 --- a/configs/xilinx_zynqmp_mini_defconfig +++ b/configs/xilinx_zynqmp_mini_defconfig @@ -18,6 +18,7 @@ CONFIG_REMAKE_ELF=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y +CONFIG_SPL_MAX_SIZE=0x40000 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index 8a8522d4bb7..a3d46c02eb7 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -22,6 +22,7 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y +CONFIG_SPL_MAX_SIZE=0x40000 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_MAXARGS=64 diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index 7b24a2ea61b..0de4e232913 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -22,6 +22,7 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y +CONFIG_SPL_MAX_SIZE=0x40000 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_MAXARGS=64 diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig index dd5a36c92e9..fbace07a9b5 100644 --- a/configs/xilinx_zynqmp_mini_nand_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_defconfig @@ -19,6 +19,7 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y +CONFIG_SPL_MAX_SIZE=0x40000 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set diff --git a/configs/xilinx_zynqmp_mini_nand_single_defconfig b/configs/xilinx_zynqmp_mini_nand_single_defconfig index b1bc70c4eae..dccd5fc4788 100644 --- a/configs/xilinx_zynqmp_mini_nand_single_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_single_defconfig @@ -19,6 +19,7 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y +CONFIG_SPL_MAX_SIZE=0x40000 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index f8425dc4d23..d5ca194ca7c 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -21,6 +21,7 @@ CONFIG_REMAKE_ELF=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y +CONFIG_SPL_MAX_SIZE=0x40000 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 35625a4c1fa..91c65c9279a 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -31,6 +31,7 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="run scsi_init;usb start" CONFIG_BOARD_EARLY_INIT_R=y CONFIG_CLOCKS=y +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_STACK_R=y CONFIG_SPL_FS_LOAD_KERNEL_NAME="atf-uboot.ub" CONFIG_SPL_FS_LOAD_ARGS_NAME="u-boot.bin" diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig index d21ca5550a3..38002882ead 100644 --- a/configs/zynq_cse_nand_defconfig +++ b/configs/zynq_cse_nand_defconfig @@ -21,6 +21,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y +CONFIG_SPL_MAX_SIZE=0x30000 CONFIG_SPL_STACK_R=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig index 12a704be206..41c870499cc 100644 --- a/configs/zynq_cse_nor_defconfig +++ b/configs/zynq_cse_nor_defconfig @@ -21,6 +21,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y +CONFIG_SPL_MAX_SIZE=0x30000 CONFIG_SPL_STACK_R=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 392235088fb..b057ee7169d 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -28,6 +28,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_ARCH_EARLY_INIT_R is not set # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y +CONFIG_SPL_MAX_SIZE=0x30000 CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h index 4fb74e7568b..17c76bcf3db 100644 --- a/include/config_fallbacks.h +++ b/include/config_fallbacks.h @@ -9,20 +9,12 @@ #ifndef __CONFIG_FALLBACKS_H #define __CONFIG_FALLBACKS_H -#ifdef CONFIG_SPL #ifdef CONFIG_SPL_PAD_TO #ifdef CONFIG_SPL_MAX_SIZE #if CONFIG_SPL_PAD_TO && CONFIG_SPL_PAD_TO < CONFIG_SPL_MAX_SIZE #error CONFIG_SPL_PAD_TO < CONFIG_SPL_MAX_SIZE #endif #endif -#else -#ifdef CONFIG_SPL_MAX_SIZE -#define CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE -#else -#define CONFIG_SPL_PAD_TO 0 -#endif -#endif #endif #ifndef CONFIG_SYS_BAUDRATE_TABLE diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 8667941a0ab..3b7a4925129 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -17,8 +17,6 @@ #ifdef CONFIG_SDCARD #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_PAD_TO 0x18000 -#define CONFIG_SPL_MAX_SIZE (96 * 1024) #define CONFIG_SYS_MMC_U_BOOT_SIZE (512 << 10) #define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000) #define CONFIG_SYS_MMC_U_BOOT_START (0x11000000) @@ -36,8 +34,6 @@ #else #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_PAD_TO 0x18000 -#define CONFIG_SPL_MAX_SIZE (96 * 1024) #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (512 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000) @@ -53,7 +49,6 @@ #ifdef CONFIG_NXP_ESBC #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_MAX_SIZE 8192 #define CONFIG_SPL_RELOC_TEXT_BASE 0x00100000 #define CONFIG_SPL_RELOC_STACK 0x00100000 #define CONFIG_SYS_NAND_U_BOOT_SIZE ((768 << 10) - 0x2000) @@ -63,13 +58,11 @@ #ifdef CONFIG_TPL_BUILD #define CONFIG_SPL_NAND_INIT #define CONFIG_SPL_COMMON_INIT_DDR -#define CONFIG_SPL_MAX_SIZE (128 << 10) #define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_NAND_U_BOOT_SIZE (576 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000) #define CONFIG_SYS_NAND_U_BOOT_START (0x11000000) #elif defined(CONFIG_SPL_BUILD) -#define CONFIG_SPL_MAX_SIZE 8192 #define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0xD0000000 #define CONFIG_SYS_NAND_U_BOOT_START 0xD0000000 @@ -78,8 +71,6 @@ #define CONFIG_SYS_MPC85XX_NO_RESETVEC #endif #endif -#define CONFIG_SPL_PAD_TO 0x20000 -#define CONFIG_TPL_PAD_TO 0x20000 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #endif #endif diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 30570ad5119..c912062ce4e 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -21,8 +21,6 @@ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #ifdef CONFIG_RAMBOOT_PBL -#define CONFIG_SPL_PAD_TO 0x40000 -#define CONFIG_SPL_MAX_SIZE 0x28000 #define RESET_VECTOR_OFFSET 0x27FFC #define BOOT_PAGE_OFFSET 0x27000 #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 2d9c8fcd175..81b820ee6cb 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -15,8 +15,6 @@ #include #ifdef CONFIG_RAMBOOT_PBL -#define CONFIG_SPL_PAD_TO 0x40000 -#define CONFIG_SPL_MAX_SIZE 0x28000 #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_COMMON_INIT_DDR #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 1f546f4407c..a18f44caa38 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -29,8 +29,6 @@ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #ifdef CONFIG_RAMBOOT_PBL -#define CONFIG_SPL_PAD_TO 0x40000 -#define CONFIG_SPL_MAX_SIZE 0x28000 #define RESET_VECTOR_OFFSET 0x27FFC #define BOOT_PAGE_OFFSET 0x27000 #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 1bd4b36eb8b..96a8ad102bd 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -24,8 +24,6 @@ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #ifdef CONFIG_RAMBOOT_PBL -#define CONFIG_SPL_PAD_TO 0x40000 -#define CONFIG_SPL_MAX_SIZE 0x28000 #define RESET_VECTOR_OFFSET 0x27FFC #define BOOT_PAGE_OFFSET 0x27000 #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 934f98ca373..6dd43340d65 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -22,8 +22,6 @@ #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #else -#define CONFIG_SPL_PAD_TO 0x40000 -#define CONFIG_SPL_MAX_SIZE 0x28000 #define RESET_VECTOR_OFFSET 0x27FFC #define BOOT_PAGE_OFFSET 0x27000 diff --git a/include/configs/alt.h b/include/configs/alt.h index 090bee7d2d6..eb71c6d1de5 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -40,6 +40,5 @@ /* SPL support */ #define CONFIG_SPL_STACK 0xe6340000 -#define CONFIG_SPL_MAX_SIZE 0x4000 #endif /* __ALT_H */ diff --git a/include/configs/am64x_evm.h b/include/configs/am64x_evm.h index 0abaddcae6d..98f2ecae202 100644 --- a/include/configs/am64x_evm.h +++ b/include/configs/am64x_evm.h @@ -18,7 +18,6 @@ /* DDR Configuration */ #define CONFIG_SYS_SDRAM_BASE1 0x880000000 -#define CONFIG_SPL_MAX_SIZE CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE #if defined(CONFIG_TARGET_AM642_A53_EVM) #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + SZ_4M) #else diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h index ba50c759c00..0093f077ed3 100644 --- a/include/configs/am65x_evm.h +++ b/include/configs/am65x_evm.h @@ -44,8 +44,6 @@ #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M #endif -#define CONFIG_SPL_MAX_SIZE CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE - #define CONFIG_SYS_BOOTM_LEN SZ_64M #define PARTS_DEFAULT \ diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 20753e00de7..7cdd682894e 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -41,7 +41,6 @@ #endif /* Defines for SPL */ -#define CONFIG_SPL_MAX_SIZE 0x010000 #define CONFIG_SPL_STACK 0x310000 #define CONFIG_SYS_MONITOR_LEN 0x80000 diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index 7bc8a36481d..94f1096f402 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -60,7 +60,6 @@ #endif /* SPL */ -#define CONFIG_SPL_MAX_SIZE 0x6000 #define CONFIG_SPL_STACK 0x308000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index cab44d2645a..a0f0916ab78 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -55,7 +55,6 @@ #endif /* SPL */ -#define CONFIG_SPL_MAX_SIZE 0x6000 #define CONFIG_SPL_STACK 0x308000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index 242b73f8f2f..be420bf154f 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -8,7 +8,6 @@ #define __CONFIG_H #ifdef CONFIG_SPL -#define CONFIG_SPL_MAX_SIZE 0x00100000 #define CONFIG_SPL_BSS_START_ADDR 0x04000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 #endif diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h index 1c3c86eb59f..157d51e02f3 100644 --- a/include/configs/bur_am335x_common.h +++ b/include/configs/bur_am335x_common.h @@ -36,8 +36,6 @@ * Y-MODEM to load u-boot.img, when booted over UART. We must also include * the scratch space that U-Boot uses in SRAM. */ -#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ - CONFIG_SPL_TEXT_BASE) /* * Since SPL did pll and ddr initialization for us, diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index 63d02c5b44f..92b26e735ba 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -15,7 +15,6 @@ /* SPL config */ #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) #define CONFIG_SPL_STACK 0x013E000 diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h index 4c04bbf6447..00408fce52e 100644 --- a/include/configs/cgtqmx8.h +++ b/include/configs/cgtqmx8.h @@ -12,7 +12,6 @@ #include #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) #define CONFIG_SPL_STACK 0x013E000 diff --git a/include/configs/ci20.h b/include/configs/ci20.h index d2cb2f4b6f2..af9e4a34746 100644 --- a/include/configs/ci20.h +++ b/include/configs/ci20.h @@ -33,8 +33,6 @@ /* SPL */ #define CONFIG_SPL_STACK 0xf4008000 /* only max. 2KB spare! */ -#define CONFIG_SPL_MAX_SIZE ((14 * 1024) - 0xa00) - #define CONFIG_SPL_BSS_START_ADDR 0xf4004000 #define CONFIG_SPL_BSS_MAX_SIZE 0x00002000 /* 512KB, arbitrary */ diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h index 871e87c26d0..b8af7187c17 100644 --- a/include/configs/clearfog.h +++ b/include/configs/clearfog.h @@ -44,7 +44,6 @@ /* Defines for SPL */ #define CONFIG_SPL_SIZE (140 << 10) -#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - (CONFIG_SPL_TEXT_BASE - 0x40000000)) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h index b499d7085fd..94f61f99687 100644 --- a/include/configs/controlcenterdc.h +++ b/include/configs/controlcenterdc.h @@ -37,12 +37,6 @@ /* Defines for SPL */ #define CONFIG_SPL_SIZE (160 << 10) -#if defined(CONFIG_SECURED_MODE_IMAGE) -#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x2614) -#else -#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x30) -#endif - #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) diff --git a/include/configs/corvus.h b/include/configs/corvus.h index b4fef73121a..95ea75ced1d 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -57,7 +57,6 @@ /* bootstrap + u-boot + env in nandflash */ /* Defines for SPL */ -#define CONFIG_SPL_MAX_SIZE (12 * SZ_1K) #define CONFIG_SPL_STACK (SZ_16K) #define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE @@ -79,7 +78,6 @@ #define CONFIG_SYS_MCKR 0x1301 #define CONFIG_SYS_MCKR_CSS 0x1302 -#define CONFIG_SPL_PAD_TO CONFIG_SYS_NAND_U_BOOT_OFFS #define CONFIG_SYS_SPL_LEN CONFIG_SPL_PAD_TO #endif diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 12f5bbf5127..5e3925e5fd5 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -178,10 +178,6 @@ #define CONFIG_USB_OHCI_NEW #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 -#ifndef CONFIG_MTD_NOR_FLASH -#define CONFIG_SPL_PAD_TO 32768 -#endif - #ifdef CONFIG_SPL_BUILD /* defines for SPL */ #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ diff --git a/include/configs/db-88f6720.h b/include/configs/db-88f6720.h index 16c83a88dac..dd5a8389eba 100644 --- a/include/configs/db-88f6720.h +++ b/include/configs/db-88f6720.h @@ -34,7 +34,6 @@ /* SPL */ /* Defines for SPL */ -#define CONFIG_SPL_MAX_SIZE ((128 << 10) - (CONFIG_SPL_TEXT_BASE - 0x40000000)) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h index 9ad9173f7d4..e0e9c7ce6d5 100644 --- a/include/configs/db-88f6820-amc.h +++ b/include/configs/db-88f6820-amc.h @@ -41,7 +41,6 @@ /* Defines for SPL */ #define CONFIG_SPL_SIZE (140 << 10) -#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - (CONFIG_SPL_TEXT_BASE - 0x40000000)) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index 8dc73e8b1cc..11f522a25ab 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -41,7 +41,6 @@ /* Defines for SPL */ #define CONFIG_SPL_SIZE (140 << 10) -#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - (CONFIG_SPL_TEXT_BASE - 0x40000000)) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index d6850bd32e7..98ce65f5da3 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -53,7 +53,6 @@ /* SPL */ /* Defines for SPL */ -#define CONFIG_SPL_MAX_SIZE ((128 << 10) - (CONFIG_SPL_TEXT_BASE - 0x40000000)) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index d2a760e9b1f..c944910584f 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -97,9 +97,6 @@ /* SPL will use serial */ -#define CONFIG_SPL_MAX_SIZE 0x20000 -#define CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE - /* U-Boot will be 0x60000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */ #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000 diff --git a/include/configs/ds414.h b/include/configs/ds414.h index dbccd46bbdb..2c07a9e3403 100644 --- a/include/configs/ds414.h +++ b/include/configs/ds414.h @@ -45,7 +45,6 @@ /* SPL */ /* Defines for SPL */ -#define CONFIG_SPL_MAX_SIZE ((128 << 10) - (CONFIG_SPL_TEXT_BASE - 0x40000000)) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index 685eb7d0251..c3acaef238f 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -15,7 +15,6 @@ * SPL */ -#define CONFIG_SPL_MAX_SIZE 0x0000fff0 #define CONFIG_SPL_STACK 0x00020000 #define CONFIG_SPL_BSS_START_ADDR 0x00020000 #define CONFIG_SPL_BSS_MAX_SIZE 0x0001ffff diff --git a/include/configs/gardena-smart-gateway-at91sam.h b/include/configs/gardena-smart-gateway-at91sam.h index 3e99d2cfb04..ae1fc826612 100644 --- a/include/configs/gardena-smart-gateway-at91sam.h +++ b/include/configs/gardena-smart-gateway-at91sam.h @@ -36,7 +36,6 @@ #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 /* SPL */ -#define CONFIG_SPL_MAX_SIZE 0x7000 #define CONFIG_SPL_STACK 0x308000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 @@ -55,7 +54,6 @@ #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE -#define CONFIG_SPL_PAD_TO CONFIG_SYS_NAND_U_BOOT_OFFS #define CONFIG_SYS_SPL_LEN CONFIG_SPL_PAD_TO #endif diff --git a/include/configs/gardena-smart-gateway-mt7688.h b/include/configs/gardena-smart-gateway-mt7688.h index 3fe37eae8bf..efb05302344 100644 --- a/include/configs/gardena-smart-gateway-mt7688.h +++ b/include/configs/gardena-smart-gateway-mt7688.h @@ -19,8 +19,6 @@ #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SPL_BSS_START_ADDR 0x80010000 #define CONFIG_SPL_BSS_MAX_SIZE 0x10000 -#define CONFIG_SPL_MAX_SIZE 0x10000 -#define CONFIG_SPL_PAD_TO 0 /* Dummy value */ #define CONFIG_SYS_UBOOT_BASE 0 diff --git a/include/configs/gose.h b/include/configs/gose.h index 4ffa5bea8f8..70c4e91eee1 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -35,6 +35,5 @@ /* SPL support */ #define CONFIG_SPL_STACK 0xe6340000 -#define CONFIG_SPL_MAX_SIZE 0x4000 #endif /* __GOSE_H */ diff --git a/include/configs/helios4.h b/include/configs/helios4.h index 151ab66f4c3..d405d4b3f6a 100644 --- a/include/configs/helios4.h +++ b/include/configs/helios4.h @@ -44,7 +44,6 @@ /* Defines for SPL */ #define CONFIG_SPL_SIZE (140 << 10) -#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - (CONFIG_SPL_TEXT_BASE - 0x40000000)) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h index 38aec9436e4..5b8d7590312 100644 --- a/include/configs/imx6_spl.h +++ b/include/configs/imx6_spl.h @@ -21,14 +21,12 @@ * and some padding thus 'our' max size is really 0x00908000 - 0x00938000 * or 192KB */ -#define CONFIG_SPL_MAX_SIZE 0x30000 #define CONFIG_SPL_STACK 0x0093FFB8 /* * Pad SPL to 196KB (4KB header + 192KB max size). This allows to write the * SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a * boot media (given that boot media specific offset is configured properly). */ -#define CONFIG_SPL_PAD_TO 0x31000 #else /* * see Figure 8-3 in IMX6SDL Reference manuals: @@ -42,14 +40,12 @@ * and some padding thus 'our' max size is really 0x00908000 - 0x00918000 * or 64KB */ -#define CONFIG_SPL_MAX_SIZE 0x10000 #define CONFIG_SPL_STACK 0x0091FFB8 /* * Pad SPL to 68KB (4KB header + 64KB max size). This allows to write the * SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a * boot media (given that boot media specific offset is configured properly). */ -#define CONFIG_SPL_PAD_TO 0x11000 #endif diff --git a/include/configs/imx7_spl.h b/include/configs/imx7_spl.h index 39136ea49a8..135727bab9a 100644 --- a/include/configs/imx7_spl.h +++ b/include/configs/imx7_spl.h @@ -26,7 +26,6 @@ * CONFIG_SPL_TEXT_BASE could be moved to 0x00911000 to gain 4KB of space * for the SPL, but 56KB should be more than enough for the SPL. */ -#define CONFIG_SPL_MAX_SIZE 0xE000 #define CONFIG_SPL_STACK 0x00946BB8 /* * Pad SPL to 68KB (4KB header + 56KB max size + 8KB extra padding) @@ -36,7 +35,6 @@ * u-boot-with-spl.imx directly to a boot media (given that boot media specific * offset is configured properly). */ -#define CONFIG_SPL_PAD_TO 0x11000 /* MMC support */ #if defined(CONFIG_SPL_MMC) diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index c8875daa92d..cb66f5c23cc 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -12,7 +12,6 @@ #include #define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) -#define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h index ddd19cc8ce7..7238b11964a 100644 --- a/include/configs/imx8mm_beacon.h +++ b/include/configs/imx8mm_beacon.h @@ -9,7 +9,6 @@ #include #include -#define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h index 6c5dbd7dde3..2999e836229 100644 --- a/include/configs/imx8mm_data_modul_edm_sbc.h +++ b/include/configs/imx8mm_data_modul_edm_sbc.h @@ -12,7 +12,6 @@ #define CONFIG_SYS_BOOTM_LEN SZ_128M -#define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_1M #define CONFIG_SPL_STACK 0x920000 diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index 5de1a77973a..679ec85f9b7 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -11,7 +11,6 @@ #include #define CONFIG_SYS_BOOTM_LEN (64 * SZ_1M) -#define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index 63bd865398d..1f8718ac4a6 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -10,7 +10,6 @@ #include #include -#define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index f69678f495f..3666d250fe4 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -9,7 +9,6 @@ #include #include -#define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h index 11dd56cfe7b..decc169079f 100644 --- a/include/configs/imx8mn_beacon.h +++ b/include/configs/imx8mn_beacon.h @@ -9,7 +9,6 @@ #include #include -#define CONFIG_SPL_MAX_SIZE (148 * SZ_1K) #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mn_bsh_smm_s2_common.h b/include/configs/imx8mn_bsh_smm_s2_common.h index 367b9ee0607..f1351edf8f1 100644 --- a/include/configs/imx8mn_bsh_smm_s2_common.h +++ b/include/configs/imx8mn_bsh_smm_s2_common.h @@ -12,7 +12,6 @@ #define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) -#define CONFIG_SPL_MAX_SIZE (148 * SZ_1K) #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index b0bcd02d1fd..5a9caa5a086 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -12,7 +12,6 @@ #define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) -#define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mn_var_som.h b/include/configs/imx8mn_var_som.h index 7f7def8f260..7d761357319 100644 --- a/include/configs/imx8mn_var_som.h +++ b/include/configs/imx8mn_var_som.h @@ -12,7 +12,6 @@ #define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) -#define CONFIG_SPL_MAX_SIZE (148 * SZ_1K) #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index 4641996fef2..d2ab9f8add7 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -9,7 +9,6 @@ #include #include -#define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index 3ec4fb1fdd1..e74348b0966 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -12,7 +12,6 @@ #define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) -#define CONFIG_SPL_MAX_SIZE (152 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index 31f23e30a6a..e08f773be2a 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -14,7 +14,6 @@ #define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) -#define CONFIG_SPL_MAX_SIZE (152 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h index e693bbe6886..c91ea1c3357 100644 --- a/include/configs/imx8mp_venice.h +++ b/include/configs/imx8mp_venice.h @@ -9,7 +9,6 @@ #include #include -#define CONFIG_SPL_MAX_SIZE (152 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index b8c0717c7a3..f989a3dea5b 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -12,7 +12,6 @@ #define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) -#define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 32ea06cf9c8..8d8bdb8e194 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -12,7 +12,6 @@ #define CONFIG_SYS_BOOTM_LEN (64 * SZ_1M) -#define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index fcfd794ea3c..759f2555ddb 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -9,7 +9,6 @@ #include #include -#define CONFIG_SPL_MAX_SIZE (172 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index 61d56e269ac..9a5160d8d07 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -13,7 +13,6 @@ #define CONFIG_SYS_BOOTM_LEN (64 * SZ_1M) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) #define CONFIG_SPL_STACK 0x013E000 diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h index 81ab5d8caa5..43c4c3cc4e3 100644 --- a/include/configs/imx8qm_rom7720.h +++ b/include/configs/imx8qm_rom7720.h @@ -10,7 +10,6 @@ #include #include -#define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SPL_BSS_START_ADDR 0x00128000 #define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index 8eb6ab8552b..abbcf999256 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -11,7 +11,6 @@ #include #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) #define CONFIG_SPL_STACK 0x013E000 diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index 66bf816ecf0..92615dff4a7 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -10,7 +10,6 @@ #include #define CONFIG_SYS_BOOTM_LEN (SZ_64M) -#define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/iot2050.h b/include/configs/iot2050.h index 91ed76bb40b..a5c1c36de35 100644 --- a/include/configs/iot2050.h +++ b/include/configs/iot2050.h @@ -17,8 +17,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + \ CONFIG_SYS_K3_NON_SECURE_MSRAM_SIZE) -#define CONFIG_SPL_MAX_SIZE CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE - #define CONFIG_SYS_BOOTM_LEN SZ_64M /* U-Boot general configuration */ diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index 5538fee9460..3ddd72e281f 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -49,8 +49,6 @@ /* Image load address in RAM for DFU boot*/ #endif -#define CONFIG_SPL_MAX_SIZE CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE - #define CONFIG_SYS_BOOTM_LEN SZ_64M /* HyperFlash related configuration */ diff --git a/include/configs/j721s2_evm.h b/include/configs/j721s2_evm.h index d0a78fd7cc8..32af9de30b6 100644 --- a/include/configs/j721s2_evm.h +++ b/include/configs/j721s2_evm.h @@ -50,8 +50,6 @@ /* Image load address in RAM for DFU boot*/ #endif -#define CONFIG_SPL_MAX_SIZE CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE - #define CONFIG_SYS_BOOTM_LEN SZ_64M /* U-Boot general configuration */ diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index c0997aa3ddd..8ab93ae353f 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -35,6 +35,5 @@ /* SPL support */ #define CONFIG_SPL_STACK 0xe6340000 -#define CONFIG_SPL_MAX_SIZE 0x4000 #endif /* __KOELSCH_H */ diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h index 231571b05eb..1d2db72557e 100644 --- a/include/configs/kontron-sl-mx8mm.h +++ b/include/configs/kontron-sl-mx8mm.h @@ -58,7 +58,6 @@ #endif #define CONFIG_SYS_BOOTM_LEN SZ_64M -#define CONFIG_SPL_MAX_SIZE (148 * SZ_1K) #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_STACK 0x91fff0 diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index 1834991ac3b..96f0c1ac615 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -9,7 +9,6 @@ #define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) -#define CONFIG_SPL_MAX_SIZE (124 * SZ_1K) #define CONFIG_SYS_MONITOR_LEN (512 * SZ_1K) /* GUID for capsule updatable firmware image */ diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index c47b5940fb2..25cb8f6f84f 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -44,7 +44,6 @@ /* SPL */ #define CONFIG_SPL_BSS_START_ADDR 0x80100000 #define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 -#define CONFIG_SPL_MAX_SIZE 0x20000 #define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 diff --git a/include/configs/lager.h b/include/configs/lager.h index a5abbaaeab1..ee37b2a6b33 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -36,6 +36,5 @@ /* SPL support */ #define CONFIG_SPL_STACK 0xe6340000 -#define CONFIG_SPL_MAX_SIZE 0x4000 #endif /* __LAGER_H */ diff --git a/include/configs/linkit-smart-7688.h b/include/configs/linkit-smart-7688.h index b0d77d1c624..c0bc23ef211 100644 --- a/include/configs/linkit-smart-7688.h +++ b/include/configs/linkit-smart-7688.h @@ -19,8 +19,6 @@ #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SPL_BSS_START_ADDR 0x80010000 #define CONFIG_SPL_BSS_MAX_SIZE 0x10000 -#define CONFIG_SPL_MAX_SIZE 0x10000 -#define CONFIG_SPL_PAD_TO 0 /* Dummy value */ #define CONFIG_SYS_UBOOT_BASE 0 diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 82ae3492a2f..f1e42a593f0 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -42,9 +42,7 @@ #define SDRAM_CFG_BI 0x00000001 #ifdef CONFIG_SD_BOOT -#define CONFIG_SPL_MAX_SIZE 0x1a000 #define CONFIG_SPL_STACK 0x1001d000 -#define CONFIG_SPL_PAD_TO 0x1c000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \ CONFIG_SYS_MONITOR_LEN) diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 7b79e0841a5..b655b7ea46c 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -11,9 +11,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE #ifdef CONFIG_SD_BOOT -#define CONFIG_SPL_MAX_SIZE 0x1a000 #define CONFIG_SPL_STACK 0x1001d000 -#define CONFIG_SPL_PAD_TO 0x1c000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \ CONFIG_SYS_MONITOR_LEN) @@ -24,9 +22,7 @@ #endif #ifdef CONFIG_NAND_BOOT -#define CONFIG_SPL_MAX_SIZE 0x1a000 #define CONFIG_SPL_STACK 0x1001d000 -#define CONFIG_SPL_PAD_TO 0x1c000 #define CONFIG_SYS_NAND_U_BOOT_SIZE (400 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index 577ba6dfc04..d60701bcb98 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -44,9 +44,7 @@ #define CONFIG_U_BOOT_HDR_SIZE (16 << 10) #endif /* ifdef CONFIG_NXP_ESBC */ -#define CONFIG_SPL_MAX_SIZE 0x1a000 #define CONFIG_SPL_STACK 0x1001d000 -#define CONFIG_SPL_PAD_TO 0x1c000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \ CONFIG_SYS_MONITOR_LEN) diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index b36c8dccf17..c573adf85da 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -46,9 +46,7 @@ #define CONFIG_U_BOOT_HDR_SIZE (16 << 10) #endif /* ifdef CONFIG_NXP_ESBC */ -#define CONFIG_SPL_MAX_SIZE 0x1a000 #define CONFIG_SPL_STACK 0x1001d000 -#define CONFIG_SPL_PAD_TO 0x1c000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \ CONFIG_SYS_MONITOR_LEN) diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 0b54c52b4f2..a87494363ac 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -52,9 +52,7 @@ /* SD boot SPL */ #ifdef CONFIG_SD_BOOT -#define CONFIG_SPL_MAX_SIZE 0x17000 #define CONFIG_SPL_STACK 0x1001e000 -#define CONFIG_SPL_PAD_TO 0x1d000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) @@ -78,7 +76,6 @@ /* NAND SPL */ #ifdef CONFIG_NAND_BOOT -#define CONFIG_SPL_MAX_SIZE 0x1a000 #define CONFIG_SPL_STACK 0x1001d000 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index b4329c2e89e..8fd1af76f94 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -128,7 +128,6 @@ #endif #ifdef CONFIG_NAND_BOOT -#define CONFIG_SPL_PAD_TO 0x20000 /* block aligned */ #define CONFIG_SYS_NAND_U_BOOT_SIZE (640 << 10) #endif diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 3ac4cb7643d..16815f4fb00 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -101,7 +101,6 @@ #define CONFIG_MTD_NAND_VERIFY_WRITE #ifdef CONFIG_NAND_BOOT -#define CONFIG_SPL_PAD_TO 0x20000 /* block aligned */ #define CONFIG_SYS_NAND_U_BOOT_SIZE (1024 << 10) #endif diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 21830c0bda9..ed43c12f410 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -51,9 +51,7 @@ /* SD boot SPL */ #ifdef CONFIG_SD_BOOT -#define CONFIG_SPL_MAX_SIZE 0x1f000 /* 124 KiB */ #define CONFIG_SPL_STACK 0x10020000 -#define CONFIG_SPL_PAD_TO 0x21000 /* 132 KiB */ #define CONFIG_SPL_BSS_START_ADDR 0x8f000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ @@ -76,9 +74,7 @@ #if defined(CONFIG_QSPI_BOOT) && defined(CONFIG_SPL) #define CONFIG_SPL_TARGET "spl/u-boot-spl.pbl" -#define CONFIG_SPL_MAX_SIZE 0x1f000 #define CONFIG_SPL_STACK 0x10020000 -#define CONFIG_SPL_PAD_TO 0x20000 #define CONFIG_SPL_BSS_START_ADDR 0x8f000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ @@ -89,7 +85,6 @@ /* NAND SPL */ #ifdef CONFIG_NAND_BOOT -#define CONFIG_SPL_MAX_SIZE 0x17000 /* 90 KiB */ #define CONFIG_SPL_STACK 0x1001f000 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 05aeedc4107..124f279c48e 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -145,7 +145,6 @@ #endif #ifdef CONFIG_NAND_BOOT -#define CONFIG_SPL_PAD_TO 0x40000 /* block aligned */ #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) #endif diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 78d3d57eec3..f0351327923 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -151,7 +151,6 @@ unsigned long long get_qixis_addr(void); #ifdef CONFIG_SPL #define CONFIG_SPL_BSS_START_ADDR 0x80100000 #define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 -#define CONFIG_SPL_MAX_SIZE 0x16000 #define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0) #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 974e98ab1d0..e225c0721c3 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -144,7 +144,6 @@ unsigned long long get_qixis_addr(void); #define CONFIG_SPL_BSS_START_ADDR 0x80100000 #define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 -#define CONFIG_SPL_MAX_SIZE 0x16000 #define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0) #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 4975fb782b3..9ce48a09602 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -191,7 +191,6 @@ #define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NAND_FTIM2 #define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3 -#define CONFIG_SPL_PAD_TO 0x20000 #define CONFIG_SYS_NAND_U_BOOT_SIZE (640 * 1024) #endif #else diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 52a48bd4b89..cdfc9fd82e8 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -174,7 +174,6 @@ #define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NAND_FTIM2 #define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3 -#define CONFIG_SPL_PAD_TO 0x80000 #define CONFIG_SYS_NAND_U_BOOT_SIZE (512 * 1024) #else #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 0e89dae7701..d547dba322d 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -114,7 +114,6 @@ * NAND SPL */ #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx" -#define CONFIG_SPL_PAD_TO 0x8000 #define CONFIG_SPL_STACK 0x70004000 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index e4df9d8dfff..86d7fc8feaa 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -48,7 +48,6 @@ /* SPL */ /* Defines for SPL */ -#define CONFIG_SPL_MAX_SIZE ((128 << 10) - (CONFIG_SPL_TEXT_BASE - 0x40000000)) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) diff --git a/include/configs/mt7620.h b/include/configs/mt7620.h index bcbc70b0945..eae4d391e9d 100644 --- a/include/configs/mt7620.h +++ b/include/configs/mt7620.h @@ -21,8 +21,6 @@ #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SPL_BSS_START_ADDR 0x80010000 #define CONFIG_SPL_BSS_MAX_SIZE 0x10000 -#define CONFIG_SPL_MAX_SIZE 0x10000 -#define CONFIG_SPL_PAD_TO 0 /* Dummy value */ #define CONFIG_SYS_UBOOT_BASE 0 diff --git a/include/configs/mt7628.h b/include/configs/mt7628.h index efda683b4a7..c53b987ed19 100644 --- a/include/configs/mt7628.h +++ b/include/configs/mt7628.h @@ -33,8 +33,6 @@ #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SPL_BSS_START_ADDR 0x80010000 #define CONFIG_SPL_BSS_MAX_SIZE 0x10000 -#define CONFIG_SPL_MAX_SIZE 0x10000 -#define CONFIG_SPL_PAD_TO 0 /* Dummy value */ #define CONFIG_SYS_UBOOT_BASE 0 diff --git a/include/configs/mt7629.h b/include/configs/mt7629.h index 24890b6f940..e3ec2b90c09 100644 --- a/include/configs/mt7629.h +++ b/include/configs/mt7629.h @@ -21,9 +21,7 @@ /* Defines for SPL */ #define CONFIG_SPL_STACK 0x106000 -#define CONFIG_SPL_MAX_SIZE SZ_64K #define CONFIG_SPL_MAX_FOOTPRINT SZ_64K -#define CONFIG_SPL_PAD_TO 0x10000 #define CONFIG_SPI_ADDR 0x30000000 #define CONFIG_SYS_UBOOT_BASE (CONFIG_SPI_ADDR + CONFIG_SPL_PAD_TO) diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index b7698c86454..60f4302d82f 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -177,7 +177,6 @@ #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN #define CONFIG_SPL_STACK 0x8001ff00 #define CONFIG_SPL_MAX_FOOTPRINT 32768 -#define CONFIG_SPL_PAD_TO 32768 /* additions for new relocation code, must added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0xc0000000 diff --git a/include/configs/openpiton-riscv64.h b/include/configs/openpiton-riscv64.h index f909aa862fd..4901a00cdf6 100644 --- a/include/configs/openpiton-riscv64.h +++ b/include/configs/openpiton-riscv64.h @@ -19,7 +19,6 @@ #define CONFIG_SYS_BOOTM_LEN SZ_256M #ifdef CONFIG_SPL -#define CONFIG_SPL_MAX_SIZE 0x00100000 #define CONFIG_SPL_BSS_START_ADDR 0x82000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index d2c8d23c31c..755775f5568 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -78,8 +78,6 @@ #ifdef CONFIG_SDCARD #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_PAD_TO 0x20000 -#define CONFIG_SPL_MAX_SIZE (128 * 1024) #define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000) #define CONFIG_SYS_MMC_U_BOOT_START (0x11000000) @@ -91,8 +89,6 @@ #elif defined(CONFIG_SPIFLASH) #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_PAD_TO 0x20000 -#define CONFIG_SPL_MAX_SIZE (128 * 1024) #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000) @@ -105,14 +101,12 @@ #ifdef CONFIG_TPL_BUILD #define CONFIG_SPL_NAND_INIT #define CONFIG_SPL_COMMON_INIT_DDR -#define CONFIG_SPL_MAX_SIZE (128 << 10) #define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_NAND_U_BOOT_SIZE (832 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000) #define CONFIG_SYS_NAND_U_BOOT_START (0x11000000) #elif defined(CONFIG_SPL_BUILD) #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_MAX_SIZE 4096 #define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0xf8f80000 #define CONFIG_SYS_NAND_U_BOOT_START 0xf8f80000 @@ -122,8 +116,6 @@ #endif #endif /* not CONFIG_TPL_BUILD */ -#define CONFIG_SPL_PAD_TO 0x20000 -#define CONFIG_TPL_PAD_TO 0x20000 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #endif diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h index df175311597..4876a4b8a3e 100644 --- a/include/configs/phycore_imx8mm.h +++ b/include/configs/phycore_imx8mm.h @@ -12,7 +12,6 @@ #include #define CONFIG_SYS_BOOTM_LEN SZ_64M -#define CONFIG_SPL_MAX_SIZE (148 * SZ_1K) #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h index 8247c7ce397..9c870edfa5e 100644 --- a/include/configs/phycore_imx8mp.h +++ b/include/configs/phycore_imx8mp.h @@ -12,7 +12,6 @@ #define CONFIG_SYS_BOOTM_LEN SZ_64M -#define CONFIG_SPL_MAX_SIZE (152 * SZ_1K) #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index d59f70a61a7..c412ada5c82 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -9,7 +9,6 @@ #include #include -#define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index 0bcc2f35f5c..6c9a68eec93 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -46,7 +46,6 @@ #endif /* Defines for SPL */ -#define CONFIG_SPL_MAX_SIZE 0x010000 #define CONFIG_SPL_STACK 0x310000 #define CONFIG_SYS_MONITOR_LEN 0x80000 diff --git a/include/configs/porter.h b/include/configs/porter.h index bf380ddf05b..89fd0f2c643 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -40,6 +40,5 @@ /* SPL support */ #define CONFIG_SPL_STACK 0xe6340000 -#define CONFIG_SPL_MAX_SIZE 0x4000 #endif /* __PORTER_H */ diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h index eaaf8cad01c..9b967b8d90f 100644 --- a/include/configs/px30_common.h +++ b/include/configs/px30_common.h @@ -15,7 +15,6 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x00400000 #define CONFIG_SPL_STACK 0x00400000 -#define CONFIG_SPL_MAX_SIZE 0x20000 #define CONFIG_SPL_BSS_START_ADDR 0x4000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x4000 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h index f462895fb5f..f26dcfc21c1 100644 --- a/include/configs/qemu-riscv.h +++ b/include/configs/qemu-riscv.h @@ -10,7 +10,6 @@ #ifdef CONFIG_SPL -#define CONFIG_SPL_MAX_SIZE 0x00100000 #define CONFIG_SPL_BSS_START_ADDR 0x84000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 #define CONFIG_SYS_SPL_MALLOC_START 0x84100000 diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index a0ba0c2ea78..9aaefb8cd1b 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -53,6 +53,5 @@ #define CONFIG_SPL_BSS_MAX_SIZE 0x1000 #endif #define CONFIG_SPL_STACK 0xe6304000 -#define CONFIG_SPL_MAX_SIZE 0x7000 #endif /* __RCAR_GEN3_COMMON_H */ diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h index 30f037766dc..e838f379d7e 100644 --- a/include/configs/rk3066_common.h +++ b/include/configs/rk3066_common.h @@ -13,8 +13,6 @@ #define CONFIG_IRAM_BASE 0x10080000 -#define CONFIG_SPL_MAX_SIZE 0x32000 - #define CONFIG_SPL_STACK 0x1008FFFF #define CONFIG_SYS_SDRAM_BASE 0x60000000 diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h index 47f70f1aad4..77b23f1e224 100644 --- a/include/configs/rk3188_common.h +++ b/include/configs/rk3188_common.h @@ -19,7 +19,6 @@ #define CONFIG_IRAM_BASE 0x10080000 /* spl size 32kb sram - 2kb bootrom */ -#define CONFIG_SPL_MAX_SIZE (0x8000 - 0x800) #define CONFIG_SPL_STACK 0x10087fff diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index c32e2236265..f4668f08aec 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -13,7 +13,6 @@ #define CONFIG_SYS_HZ_CLOCK 24000000 #define CONFIG_SYS_INIT_SP_ADDR 0x61100000 -#define CONFIG_SPL_MAX_SIZE 0x100000 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (28 << 10) #define CONFIG_ROCKCHIP_CHIP_TAG "RK32" diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h index 3268181611f..65a5d1da1f3 100644 --- a/include/configs/rk3308_common.h +++ b/include/configs/rk3308_common.h @@ -8,7 +8,6 @@ #include "rockchip-common.h" -#define CONFIG_SPL_MAX_SIZE 0x20000 #define CONFIG_SPL_BSS_START_ADDR 0x00400000 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 283b644e474..5ba34e8cd72 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -12,7 +12,6 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x00300000 #define CONFIG_SPL_STACK 0x00400000 -#define CONFIG_SPL_MAX_SIZE 0x40000 #define CONFIG_SPL_BSS_START_ADDR 0x2000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index cd81caf9853..0561c2c1835 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -18,7 +18,6 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x00300000 -#define CONFIG_SPL_MAX_SIZE 0x40000 #define CONFIG_SPL_BSS_START_ADDR 0x400000 #define CONFIG_SPL_BSS_MAX_SIZE 0x20000 #define CONFIG_SPL_STACK 0x00188000 diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index d2f286521b5..32529cede10 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -14,12 +14,10 @@ #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT) #define CONFIG_SPL_STACK 0x00400000 -#define CONFIG_SPL_MAX_SIZE 0x40000 #define CONFIG_SPL_BSS_START_ADDR 0x00400000 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 #else #define CONFIG_SPL_STACK 0xff8effff -#define CONFIG_SPL_MAX_SIZE 0x30000 - 0x2000 /* BSS setup */ #define CONFIG_SPL_BSS_START_ADDR 0xff8e0000 #define CONFIG_SPL_BSS_MAX_SIZE 0x10000 diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h index 0563d9025fc..245e3039fd5 100644 --- a/include/configs/rk3568_common.h +++ b/include/configs/rk3568_common.h @@ -13,7 +13,6 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x00c00000 #define CONFIG_SPL_STACK 0x00400000 -#define CONFIG_SPL_MAX_SIZE 0x20000 #define CONFIG_SPL_BSS_START_ADDR 0x4000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x4000 diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h index 0c08776ae26..4c964cc3770 100644 --- a/include/configs/rockchip-common.h +++ b/include/configs/rockchip-common.h @@ -10,7 +10,6 @@ #define CONFIG_SYS_NS16550_MEM32 /* ((CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR - 64) * 512) */ -#define CONFIG_SPL_PAD_TO 8355840 #ifndef CONFIG_SPL_BUILD diff --git a/include/configs/sama5d27_som1_ek.h b/include/configs/sama5d27_som1_ek.h index 1ac4f66a91c..33435d2050c 100644 --- a/include/configs/sama5d27_som1_ek.h +++ b/include/configs/sama5d27_som1_ek.h @@ -22,7 +22,6 @@ #endif /* SPL */ -#define CONFIG_SPL_MAX_SIZE 0x10000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 diff --git a/include/configs/sama5d27_wlsom1_ek.h b/include/configs/sama5d27_wlsom1_ek.h index a1c0e6a1eb6..e7a792ffe2c 100644 --- a/include/configs/sama5d27_wlsom1_ek.h +++ b/include/configs/sama5d27_wlsom1_ek.h @@ -27,7 +27,6 @@ #endif /* SPL */ -#define CONFIG_SPL_MAX_SIZE 0x10000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 diff --git a/include/configs/sama5d2_icp.h b/include/configs/sama5d2_icp.h index 8cb80efe8e5..5b7db47dc17 100644 --- a/include/configs/sama5d2_icp.h +++ b/include/configs/sama5d2_icp.h @@ -34,7 +34,6 @@ #endif /* SPL */ -#define CONFIG_SPL_MAX_SIZE 0x10000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h index c2fe118b5bc..1b02fc14921 100644 --- a/include/configs/sama5d2_xplained.h +++ b/include/configs/sama5d2_xplained.h @@ -19,7 +19,6 @@ #endif /* SPL */ -#define CONFIG_SPL_MAX_SIZE 0x10000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index 1617ebc643d..6d25bd6012b 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -56,7 +56,6 @@ #endif /* SPL */ -#define CONFIG_SPL_MAX_SIZE 0x18000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index 94f4ae6a1f0..9fca0033307 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -68,7 +68,6 @@ #endif /* SPL */ -#define CONFIG_SPL_MAX_SIZE 0x18000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h index 42a7ac402d2..5bc8744c154 100644 --- a/include/configs/sama5d4_xplained.h +++ b/include/configs/sama5d4_xplained.h @@ -33,7 +33,6 @@ #endif /* SPL */ -#define CONFIG_SPL_MAX_SIZE 0x18000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h index 6519956e09c..08f042d6a26 100644 --- a/include/configs/sama5d4ek.h +++ b/include/configs/sama5d4ek.h @@ -33,7 +33,6 @@ #endif /* SPL */ -#define CONFIG_SPL_MAX_SIZE 0x18000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 22c6015e28a..94596a8e4f4 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -53,8 +53,6 @@ /* I2C Configuration */ /* Defines for SPL */ -#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ - CONFIG_SPL_TEXT_BASE) #define CONFIG_SPL_BSS_START_ADDR 0x80000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ diff --git a/include/configs/sifive-unleashed.h b/include/configs/sifive-unleashed.h index 96e2eb67988..c2672334759 100644 --- a/include/configs/sifive-unleashed.h +++ b/include/configs/sifive-unleashed.h @@ -13,7 +13,6 @@ #ifdef CONFIG_SPL -#define CONFIG_SPL_MAX_SIZE 0x00100000 #define CONFIG_SPL_BSS_START_ADDR 0x85000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h index fa734a66be7..a3dfc13bf61 100644 --- a/include/configs/sifive-unmatched.h +++ b/include/configs/sifive-unmatched.h @@ -13,7 +13,6 @@ #ifdef CONFIG_SPL -#define CONFIG_SPL_MAX_SIZE 0x00100000 #define CONFIG_SPL_BSS_START_ADDR 0x85000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ diff --git a/include/configs/silk.h b/include/configs/silk.h index 574ba228d8a..a273f21b64c 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -40,6 +40,5 @@ /* SPL support */ #define CONFIG_SPL_STACK 0xe6340000 -#define CONFIG_SPL_MAX_SIZE 0x4000 #endif /* __SILK_H */ diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index d58d76d1091..ffd2b214d7e 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -117,7 +117,6 @@ #endif /* Defines for SPL */ -#define CONFIG_SPL_MAX_SIZE (SZ_4K) #define CONFIG_SPL_BSS_START_ADDR CONFIG_SYS_SDRAM_BASE #define CONFIG_SPL_BSS_MAX_SIZE (SZ_16K) @@ -144,7 +143,6 @@ #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR) #define CONFIG_SYS_AT91_PLLB 0x10483f0e -#define CONFIG_SPL_PAD_TO CONFIG_SYS_NAND_U_BOOT_OFFS #define CONFIG_SYS_SPL_LEN CONFIG_SPL_PAD_TO #endif /* __CONFIG_H */ diff --git a/include/configs/sniper.h b/include/configs/sniper.h index e8a57faac52..631eefd3979 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -50,8 +50,6 @@ * SPL */ -#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ - CONFIG_SPL_TEXT_BASE) #define CONFIG_SPL_BSS_START_ADDR 0x80000000 #define CONFIG_SPL_BSS_MAX_SIZE (512 * 1024) #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 23467773ce3..6943dc04de2 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -14,10 +14,8 @@ #if defined(CONFIG_TARGET_SOCFPGA_GEN5) #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000 #define CONFIG_SYS_INIT_RAM_SIZE SOCFPGA_PHYS_OCRAM_SIZE -#define CONFIG_SPL_PAD_TO 0x10000 #elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) #define CONFIG_SYS_INIT_RAM_ADDR 0xFFE00000 -#define CONFIG_SPL_PAD_TO 0x40000 /* SPL memory allocation configuration, this is for FAT implementation */ #ifndef CONFIG_SYS_SPL_MALLOC_SIZE #define CONFIG_SYS_SPL_MALLOC_SIZE 0x10000 @@ -158,9 +156,6 @@ * 0xFFEz_zzzz ...... Malloc area (grows up to top) * 0xFFE3_FFFF ...... End of SRAM (top) */ -#ifndef CONFIG_SPL_TEXT_BASE -#define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE -#endif /* SPL QSPI boot support */ diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 750cc00f849..ebbd9fc492e 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -153,7 +153,6 @@ unsigned int cm_get_l4_sys_free_clk_hz(void); * */ #define CONFIG_SPL_TARGET "spl/u-boot-spl-dtb.hex" -#define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ #define CONFIG_SPL_BSS_START_ADDR (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE \ diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h index 375f2a7e0ba..261e4c8b5ad 100644 --- a/include/configs/stm32f746-disco.h +++ b/include/configs/stm32f746-disco.h @@ -47,7 +47,6 @@ #define CONFIG_SYS_UBOOT_START 0x080083FD #define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + \ CONFIG_SYS_SPL_LEN) -#define CONFIG_SPL_PAD_TO 0x8000 /* DT blob (fdt) address */ #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \ diff --git a/include/configs/stout.h b/include/configs/stout.h index bcc6fcd36b3..d709c2109f1 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -44,6 +44,5 @@ /* SPL support */ #define CONFIG_SPL_STACK 0xe6340000 -#define CONFIG_SPL_MAX_SIZE 0x4000 #endif /* __STOUT_H */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index c47f4752fc4..c92427a4cc9 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -115,7 +115,6 @@ * autoconf.mk. */ #if CONFIG_SUNXI_SRAM_ADDRESS == 0x10000 -#define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */ #ifdef CONFIG_ARM64 /* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */ #define LOW_LEVEL_SRAM_STACK 0x00054000 @@ -124,24 +123,17 @@ #endif /* !CONFIG_ARM64 */ #elif CONFIG_SUNXI_SRAM_ADDRESS == 0x20000 #ifdef CONFIG_MACH_SUN50I_H616 -#define CONFIG_SPL_MAX_SIZE 0xbfa0 /* 48 KiB */ #define LOW_LEVEL_SRAM_STACK 0x58000 #else -#define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */ /* end of SRAM A2 on H6 for now */ #define LOW_LEVEL_SRAM_STACK 0x00118000 #endif #else -#define CONFIG_SPL_MAX_SIZE 0x5fa0 /* 24KB on sun4i/sun7i */ #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ #endif #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK -#ifndef CONFIG_MACH_SUN50I_H616 -#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ -#endif - /* Ethernet support */ #ifdef CONFIG_USB_EHCI_HCD diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 768bfc6cc6c..4e5f373cf9e 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -142,7 +142,6 @@ #endif /* #ifndef CONFIG_SPL_BUILD */ /* Defines for SPL */ -#define CONFIG_SPL_MAX_SIZE (31 * SZ_512) #define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + SZ_16K) #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ CONFIG_SYS_MALLOC_LEN) @@ -170,7 +169,6 @@ #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR) #define CONFIG_SYS_AT91_PLLB 0x10193F05 -#define CONFIG_SPL_PAD_TO CONFIG_SYS_NAND_U_BOOT_OFFS #define CONFIG_SYS_SPL_LEN CONFIG_SPL_PAD_TO #endif diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h index fdf048b27b3..3add6fa5570 100644 --- a/include/configs/theadorable.h +++ b/include/configs/theadorable.h @@ -73,7 +73,6 @@ /* SPL */ /* Defines for SPL */ -#define CONFIG_SPL_MAX_SIZE ((128 << 10) - (CONFIG_SPL_TEXT_BASE - 0x40000000)) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index 299eec75bdf..a513d662e6a 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -87,8 +87,6 @@ /* CPU */ /* Defines for SPL */ -#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ - CONFIG_SPL_TEXT_BASE) #define CONFIG_SPL_BSS_START_ADDR 0x80000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index ba3bc43aa0e..fa5d91099e1 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -64,7 +64,5 @@ /* SPL */ /* Defines for SPL */ -#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ - CONFIG_SPL_TEXT_BASE) #endif diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index a4fdc2de8b2..782b53f8c0c 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -127,10 +127,6 @@ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_8M #endif -#ifndef CONFIG_SPL_MAX_SIZE -#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ - CONFIG_SPL_TEXT_BASE) -#endif #ifdef CONFIG_SPL_OS_BOOT /* FAT */ diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 57f013cbf84..564af6dc2dc 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -27,8 +27,6 @@ #endif /* SPL SPI Loader Configuration */ -#define CONFIG_SPL_PAD_TO 65536 -#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_PAD_TO - 8) #define CONFIG_SPL_BSS_START_ADDR (CONFIG_ISW_ENTRY_ADDR + \ CONFIG_SPL_MAX_SIZE) #define CONFIG_SPL_BSS_MAX_SIZE (32 * 1024) diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h index 8119340b112..b293ed41f54 100644 --- a/include/configs/turris_omnia.h +++ b/include/configs/turris_omnia.h @@ -28,7 +28,6 @@ /* Defines for SPL */ #define CONFIG_SPL_SIZE (140 << 10) -#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - (CONFIG_SPL_TEXT_BASE - 0x40000000)) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index cbdb2d91bda..99c8a0a7ac2 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -183,9 +183,6 @@ #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_MAX_FOOTPRINT 0x10000 -#define CONFIG_SPL_MAX_SIZE 0x10000 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 -#define CONFIG_SPL_PAD_TO 0x20000 - #endif /* __CONFIG_UNIPHIER_H__ */ diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index c7de503abad..e5989346629 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -9,7 +9,6 @@ #include #include -#define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index a61192f8f9a..f0765f4f820 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -9,7 +9,6 @@ #include #include -#define CONFIG_SPL_MAX_SIZE (152 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h index af792c78ee2..45528503b01 100644 --- a/include/configs/vocore2.h +++ b/include/configs/vocore2.h @@ -19,8 +19,6 @@ #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SPL_BSS_START_ADDR 0x80010000 #define CONFIG_SPL_BSS_MAX_SIZE 0x10000 -#define CONFIG_SPL_MAX_SIZE 0x10000 -#define CONFIG_SPL_PAD_TO 0 /* Dummy value */ #define CONFIG_SYS_UBOOT_BASE 0 diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index 4d46ce024f1..d1515d98cd1 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -67,7 +67,6 @@ /* Use the framework and generic lib */ /* SPL will use serial */ /* SPL will load U-Boot from NAND offset 0x40000 */ -#define CONFIG_SPL_PAD_TO 0x20000 /* U-Boot will be 0x40000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */ #define CONFIG_SYS_MONITOR_LEN 0x40000 /* actually, MAX size */ #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE diff --git a/include/configs/x530.h b/include/configs/x530.h index 67ff01db904..d23b7b4d924 100644 --- a/include/configs/x530.h +++ b/include/configs/x530.h @@ -68,7 +68,6 @@ /* Defines for SPL */ #define CONFIG_SPL_SIZE (140 << 10) -#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - (CONFIG_SPL_TEXT_BASE - 0x40000000)) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index a007d364bb8..ce7c4d2bdea 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -202,7 +202,6 @@ #endif #define CONFIG_SPL_STACK 0xfffffffc -#define CONFIG_SPL_MAX_SIZE 0x40000 /* Just random location in OCM */ #define CONFIG_SPL_BSS_START_ADDR 0x0 diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index a93dbfb1029..d904dbd8d46 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -230,7 +230,6 @@ /* SP location before relocation, must use scratch RAM */ /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */ -#define CONFIG_SPL_MAX_SIZE 0x30000 /* On the top of OCM space */ #define CONFIG_SYS_SPL_MALLOC_START CONFIG_SPL_STACK_R_ADDR diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl index f047d4e0941..c1d32f58791 100644 --- a/scripts/Makefile.spl +++ b/scripts/Makefile.spl @@ -194,7 +194,7 @@ LDPPFLAGS += \ # Turn various CONFIG symbols into IMAGE symbols for easy reuse of # the scripts between SPL, TPL and VPL. -ifneq ($(CONFIG_$(SPL_TPL_)MAX_SIZE),) +ifneq ($(CONFIG_$(SPL_TPL_)MAX_SIZE),0x0) LDPPFLAGS += -DIMAGE_MAX_SIZE=$(CONFIG_$(SPL_TPL_)MAX_SIZE) endif ifneq ($(CONFIG_$(SPL_TPL_)TEXT_BASE),) -- GitLab From 9b5f9aeb3b48dbc059272168635a397ea5096a31 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 19 May 2022 15:09:22 -0400 Subject: [PATCH 018/581] Convert CONFIG_SPL_BSS_MAX_SIZE et al to Kconfig This converts the following to Kconfig: CONFIG_SPL_BSS_MAX_SIZE CONFIG_SPL_MAX_FOOTPRINT Note that the da850evm platforms were violating the "only use one" rule here, and so now hard-code their BSS limit. Signed-off-by: Tom Rini --- README | 14 ------- .../davinci/da8xxevm/u-boot-spl-da850evm.lds | 2 +- common/spl/Kconfig | 38 +++++++++++++++++++ configs/alt_defconfig | 1 + configs/am64x_evm_a53_defconfig | 1 + configs/am64x_evm_r5_defconfig | 1 + configs/am65x_evm_a53_defconfig | 1 + configs/am65x_evm_r5_defconfig | 1 + configs/am65x_evm_r5_usbdfu_defconfig | 1 + configs/am65x_evm_r5_usbmsc_defconfig | 1 + configs/am65x_hs_evm_a53_defconfig | 1 + configs/am65x_hs_evm_r5_defconfig | 1 + configs/apalis-tk1_defconfig | 2 + configs/apalis_t30_defconfig | 2 + configs/arndale_defconfig | 2 + ...edev_cc_v1_0_ultrazedev_som_v1_0_defconfig | 1 + configs/axm_defconfig | 1 + configs/beaver_defconfig | 2 + configs/bitmain_antminer_s9_defconfig | 1 + configs/cardhu_defconfig | 2 + configs/cei-tk1-som_defconfig | 2 + configs/cgtqmx8_defconfig | 1 + configs/chromebit_mickey_defconfig | 1 + configs/chromebook_bob_defconfig | 1 + configs/chromebook_coral_defconfig | 1 + configs/chromebook_jerry_defconfig | 1 + configs/chromebook_kevin_defconfig | 1 + configs/chromebook_link64_defconfig | 1 + configs/chromebook_minnie_defconfig | 1 + configs/chromebook_samus_tpl_defconfig | 1 + configs/chromebook_speedy_defconfig | 1 + configs/ci20_mmc_defconfig | 1 + configs/cl-som-imx7_defconfig | 1 + configs/clearfog_defconfig | 1 + configs/colibri_t20_defconfig | 2 + configs/colibri_t30_defconfig | 2 + configs/controlcenterdc_defconfig | 1 + configs/coreboot64_defconfig | 1 + configs/corvus_defconfig | 1 + configs/da850evm_defconfig | 2 + configs/da850evm_nand_defconfig | 2 + configs/dalmore_defconfig | 2 + configs/db-88f6720_defconfig | 1 + configs/db-88f6820-amc_defconfig | 1 + configs/db-88f6820-gp_defconfig | 1 + configs/db-mv784mp-gp_defconfig | 1 + configs/deneb_defconfig | 1 + configs/devkit3250_defconfig | 1 + configs/ds414_defconfig | 1 + configs/edminiv2_defconfig | 1 + configs/evb-ast2600_defconfig | 1 + configs/evb-px30_defconfig | 1 + configs/evb-px5_defconfig | 1 + configs/evb-rk3036_defconfig | 1 + configs/evb-rk3229_defconfig | 1 + configs/evb-rk3288_defconfig | 1 + configs/evb-rk3308_defconfig | 1 + configs/evb-rk3328_defconfig | 1 + configs/evb-rk3399_defconfig | 1 + configs/evb-rk3568_defconfig | 1 + configs/ficus-rk3399_defconfig | 1 + configs/firefly-px30_defconfig | 1 + configs/firefly-rk3288_defconfig | 1 + configs/firefly-rk3399_defconfig | 1 + .../gardena-smart-gateway-at91sam_defconfig | 1 + .../gardena-smart-gateway-mt7688_defconfig | 1 + configs/giedi_defconfig | 1 + configs/gose_defconfig | 1 + configs/harmony_defconfig | 2 + configs/helios4_defconfig | 1 + configs/imx28_xea_defconfig | 1 + configs/imx28_xea_sb_defconfig | 1 + configs/imx7_cm_defconfig | 1 + configs/imx8mm-cl-iot-gate-optee_defconfig | 1 + configs/imx8mm-cl-iot-gate_defconfig | 1 + configs/imx8mm-icore-mx8mm-ctouch2_defconfig | 1 + configs/imx8mm-icore-mx8mm-edimm2.2_defconfig | 1 + configs/imx8mm-mx8menlo_defconfig | 1 + configs/imx8mm_beacon_defconfig | 1 + configs/imx8mm_data_modul_edm_sbc_defconfig | 1 + configs/imx8mm_evk_defconfig | 1 + configs/imx8mm_venice_defconfig | 1 + configs/imx8mn_beacon_2g_defconfig | 1 + configs/imx8mn_beacon_defconfig | 1 + configs/imx8mn_bsh_smm_s2_defconfig | 1 + configs/imx8mn_bsh_smm_s2pro_defconfig | 1 + configs/imx8mn_ddr4_evk_defconfig | 1 + configs/imx8mn_evk_defconfig | 1 + configs/imx8mn_var_som_defconfig | 1 + configs/imx8mn_venice_defconfig | 1 + configs/imx8mp_dhcom_pdk2_defconfig | 2 + configs/imx8mp_evk_defconfig | 1 + configs/imx8mp_rsb3720a1_4G_defconfig | 1 + configs/imx8mp_rsb3720a1_6G_defconfig | 1 + configs/imx8mp_venice_defconfig | 1 + configs/imx8mq_cm_defconfig | 1 + configs/imx8mq_evk_defconfig | 1 + configs/imx8mq_phanbell_defconfig | 1 + configs/imx8qm_mek_defconfig | 1 + configs/imx8qm_rom7720_a1_4G_defconfig | 1 + configs/imx8qxp_mek_defconfig | 1 + configs/imx8ulp_evk_defconfig | 1 + configs/imxrt1020-evk_defconfig | 1 + configs/imxrt1050-evk_defconfig | 1 + configs/iot2050_defconfig | 1 + configs/j7200_evm_a72_defconfig | 1 + configs/j7200_evm_r5_defconfig | 1 + configs/j721e_evm_a72_defconfig | 1 + configs/j721e_evm_r5_defconfig | 1 + configs/j721e_hs_evm_a72_defconfig | 1 + configs/j721e_hs_evm_r5_defconfig | 1 + configs/j721s2_evm_a72_defconfig | 1 + configs/j721s2_evm_r5_defconfig | 1 + configs/jetson-tk1_defconfig | 2 + configs/k2e_evm_defconfig | 1 + configs/k2g_evm_defconfig | 1 + configs/k2hk_evm_defconfig | 1 + configs/k2l_evm_defconfig | 1 + configs/khadas-edge-captain-rk3399_defconfig | 1 + configs/khadas-edge-rk3399_defconfig | 1 + configs/khadas-edge-v-rk3399_defconfig | 1 + configs/koelsch_defconfig | 1 + configs/kontron-sl-mx8mm_defconfig | 1 + configs/kontron_pitx_imx8m_defconfig | 1 + configs/kontron_sl28_defconfig | 1 + configs/kylin-rk3036_defconfig | 1 + configs/lager_defconfig | 1 + configs/leez-rk3399_defconfig | 1 + configs/linkit-smart-7688_defconfig | 1 + configs/lion-rk3368_defconfig | 1 + configs/ls1021aiot_sdcard_defconfig | 1 + configs/ls1021aqds_nand_defconfig | 1 + configs/ls1021aqds_sdcard_ifc_defconfig | 1 + configs/ls1021aqds_sdcard_qspi_defconfig | 1 + configs/ls1021atsn_sdcard_defconfig | 1 + ...s1021atwr_sdcard_ifc_SECURE_BOOT_defconfig | 1 + configs/ls1021atwr_sdcard_ifc_defconfig | 1 + configs/ls1021atwr_sdcard_qspi_defconfig | 1 + configs/ls1043aqds_nand_defconfig | 1 + configs/ls1043aqds_sdcard_ifc_defconfig | 1 + configs/ls1043aqds_sdcard_qspi_defconfig | 1 + configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_nand_defconfig | 1 + .../ls1043ardb_sdcard_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_sdcard_defconfig | 1 + configs/ls1046aqds_nand_defconfig | 1 + configs/ls1046aqds_sdcard_ifc_defconfig | 1 + configs/ls1046aqds_sdcard_qspi_defconfig | 1 + configs/ls1046ardb_emmc_defconfig | 1 + configs/ls1046ardb_qspi_spl_defconfig | 1 + .../ls1046ardb_sdcard_SECURE_BOOT_defconfig | 1 + configs/ls1046ardb_sdcard_defconfig | 1 + configs/ls1088aqds_sdcard_ifc_defconfig | 1 + configs/ls1088aqds_sdcard_qspi_defconfig | 1 + ...1088ardb_sdcard_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1088ardb_sdcard_qspi_defconfig | 1 + configs/ls2080aqds_nand_defconfig | 1 + configs/ls2080aqds_sdcard_defconfig | 1 + configs/ls2080ardb_nand_defconfig | 1 + configs/m53menlo_defconfig | 1 + configs/maxbcm_defconfig | 1 + configs/medcom-wide_defconfig | 2 + configs/microblaze-generic_defconfig | 2 + configs/miqi-rk3288_defconfig | 1 + configs/mk808_defconfig | 1 + configs/mt7620_mt7530_rfb_defconfig | 1 + configs/mt7620_rfb_defconfig | 1 + configs/mt7628_rfb_defconfig | 1 + configs/mt7629_rfb_defconfig | 2 + configs/mx23_olinuxino_defconfig | 1 + configs/mx23evk_defconfig | 1 + configs/mx28evk_auart_console_defconfig | 1 + configs/mx28evk_defconfig | 1 + configs/mx28evk_nand_defconfig | 1 + configs/mx28evk_spi_defconfig | 1 + configs/nanopc-t4-rk3399_defconfig | 1 + configs/nanopi-m4-2gb-rk3399_defconfig | 1 + configs/nanopi-m4-rk3399_defconfig | 1 + configs/nanopi-m4b-rk3399_defconfig | 1 + configs/nanopi-neo4-rk3399_defconfig | 1 + configs/nanopi-r2s-rk3328_defconfig | 1 + configs/nanopi-r4s-rk3399_defconfig | 1 + configs/nyan-big_defconfig | 2 + configs/odroid-go2_defconfig | 1 + configs/omapl138_lcdk_defconfig | 2 + configs/orangepi-rk3399_defconfig | 1 + configs/origen_defconfig | 2 + configs/paz00_defconfig | 2 + configs/peach-pi_defconfig | 2 + configs/peach-pit_defconfig | 2 + configs/phycore-imx8mm_defconfig | 1 + configs/phycore-imx8mp_defconfig | 1 + configs/phycore-rk3288_defconfig | 1 + configs/pico-dwarf-imx7d_defconfig | 1 + configs/pico-hobbit-imx7d_defconfig | 1 + configs/pico-imx7d_bl33_defconfig | 1 + configs/pico-imx7d_defconfig | 1 + configs/pico-imx8mq_defconfig | 1 + configs/pico-nymph-imx7d_defconfig | 1 + configs/pico-pi-imx7d_defconfig | 1 + configs/pinebook-pro-rk3399_defconfig | 1 + configs/plutux_defconfig | 2 + configs/popmetal-rk3288_defconfig | 1 + configs/porter_defconfig | 1 + configs/puma-rk3399_defconfig | 1 + configs/px30-core-ctouch2-of10-px30_defconfig | 1 + configs/px30-core-ctouch2-px30_defconfig | 1 + configs/px30-core-edimm2.2-px30_defconfig | 1 + configs/qemu-x86_64_defconfig | 1 + configs/r8a77970_eagle_defconfig | 1 + configs/r8a77980_condor_defconfig | 1 + configs/r8a77990_ebisu_defconfig | 1 + configs/r8a77995_draak_defconfig | 1 + configs/r8a779a0_falcon_defconfig | 1 + configs/rcar3_salvator-x_defconfig | 1 + configs/rcar3_ulcb_defconfig | 1 + configs/roc-cc-rk3308_defconfig | 1 + configs/roc-cc-rk3328_defconfig | 1 + configs/roc-pc-mezzanine-rk3399_defconfig | 1 + configs/roc-pc-rk3399_defconfig | 1 + configs/rock-pi-4-rk3399_defconfig | 1 + configs/rock-pi-4c-rk3399_defconfig | 1 + configs/rock-pi-e-rk3328_defconfig | 1 + configs/rock-pi-n10-rk3399pro_defconfig | 1 + configs/rock-pi-n8-rk3288_defconfig | 1 + configs/rock2_defconfig | 1 + configs/rock64-rk3328_defconfig | 1 + configs/rock960-rk3399_defconfig | 1 + configs/rock_defconfig | 1 + configs/rockpro64-rk3399_defconfig | 1 + configs/sama5d27_giantboard_defconfig | 1 + configs/sama5d27_som1_ek_mmc1_defconfig | 1 + configs/sama5d27_som1_ek_mmc_defconfig | 1 + configs/sama5d27_som1_ek_qspiflash_defconfig | 1 + configs/sama5d27_wlsom1_ek_mmc_defconfig | 1 + .../sama5d27_wlsom1_ek_qspiflash_defconfig | 1 + configs/sama5d2_icp_mmc_defconfig | 1 + configs/sama5d2_xplained_emmc_defconfig | 1 + configs/sama5d2_xplained_mmc_defconfig | 1 + configs/sama5d2_xplained_qspiflash_defconfig | 1 + configs/sama5d2_xplained_spiflash_defconfig | 1 + configs/sama5d3_xplained_mmc_defconfig | 1 + configs/sama5d3_xplained_nandflash_defconfig | 1 + configs/sama5d3xek_mmc_defconfig | 1 + configs/sama5d3xek_nandflash_defconfig | 1 + configs/sama5d3xek_spiflash_defconfig | 1 + configs/sama5d4_xplained_mmc_defconfig | 1 + configs/sama5d4_xplained_nandflash_defconfig | 1 + configs/sama5d4_xplained_spiflash_defconfig | 1 + configs/sama5d4ek_mmc_defconfig | 1 + configs/sama5d4ek_nandflash_defconfig | 1 + configs/sama5d4ek_spiflash_defconfig | 1 + configs/sandbox_noinst_defconfig | 1 + configs/sandbox_spl_defconfig | 1 + configs/sandbox_vpl_defconfig | 1 + configs/seaboard_defconfig | 2 + configs/silinux_ek874_defconfig | 1 + configs/silk_defconfig | 1 + configs/smartweb_defconfig | 1 + configs/smdk5250_defconfig | 2 + configs/smdk5420_defconfig | 2 + configs/smdkv310_defconfig | 2 + configs/snow_defconfig | 2 + configs/socfpga_agilex_atf_defconfig | 1 + configs/socfpga_agilex_defconfig | 1 + configs/socfpga_agilex_vab_defconfig | 1 + configs/socfpga_arria10_defconfig | 1 + configs/socfpga_arria5_defconfig | 1 + configs/socfpga_cyclone5_defconfig | 1 + configs/socfpga_dbm_soc1_defconfig | 1 + configs/socfpga_de0_nano_soc_defconfig | 1 + configs/socfpga_de10_nano_defconfig | 1 + configs/socfpga_de10_standard_defconfig | 1 + configs/socfpga_de1_soc_defconfig | 1 + configs/socfpga_is1_defconfig | 1 + configs/socfpga_mcvevk_defconfig | 1 + configs/socfpga_n5x_atf_defconfig | 1 + configs/socfpga_n5x_defconfig | 1 + configs/socfpga_n5x_vab_defconfig | 1 + configs/socfpga_secu1_defconfig | 1 + configs/socfpga_sockit_defconfig | 1 + configs/socfpga_socrates_defconfig | 1 + configs/socfpga_sr1500_defconfig | 1 + configs/socfpga_stratix10_atf_defconfig | 1 + configs/socfpga_stratix10_defconfig | 1 + configs/socfpga_vining_fpga_defconfig | 1 + configs/spring_defconfig | 2 + configs/stm32746g-eval_spl_defconfig | 1 + configs/stm32f746-disco_spl_defconfig | 1 + configs/stm32f769-disco_spl_defconfig | 1 + ...stm32mp15-icore-stm32mp1-ctouch2_defconfig | 2 + ...tm32mp15-icore-stm32mp1-edimm2.2_defconfig | 2 + ...-microgea-stm32mp1-microdev2-of7_defconfig | 2 + ...mp15-microgea-stm32mp1-microdev2_defconfig | 2 + configs/stm32mp15_basic_defconfig | 2 + configs/stm32mp15_dhcom_basic_defconfig | 2 + configs/stm32mp15_dhcor_basic_defconfig | 2 + configs/stout_defconfig | 1 + configs/syzygy_hub_defconfig | 1 + configs/taurus_defconfig | 1 + configs/tec-ng_defconfig | 2 + configs/tec_defconfig | 2 + configs/theadorable_debug_defconfig | 1 + configs/tinker-rk3288_defconfig | 1 + configs/tinker-s-rk3288_defconfig | 1 + configs/topic_miami_defconfig | 1 + configs/topic_miamilite_defconfig | 1 + configs/topic_miamiplus_defconfig | 1 + configs/trimslice_defconfig | 2 + configs/turris_omnia_defconfig | 1 + configs/uniphier_ld4_sld8_defconfig | 1 + configs/uniphier_v7_defconfig | 1 + configs/venice2_defconfig | 2 + configs/ventana_defconfig | 2 + configs/verdin-imx8mm_defconfig | 1 + configs/verdin-imx8mp_defconfig | 1 + configs/vocore2_defconfig | 1 + configs/vyasa-rk3288_defconfig | 1 + configs/work_92105_defconfig | 1 + configs/x530_defconfig | 1 + configs/xilinx_zynq_virt_defconfig | 1 + configs/xilinx_zynqmp_mini_emmc0_defconfig | 1 + configs/xilinx_zynqmp_mini_emmc1_defconfig | 1 + configs/xilinx_zynqmp_mini_qspi_defconfig | 1 + configs/xilinx_zynqmp_virt_defconfig | 1 + configs/zynq_cse_nand_defconfig | 1 + configs/zynq_cse_nor_defconfig | 1 + configs/zynq_cse_qspi_defconfig | 1 + include/configs/am64x_evm.h | 7 ---- include/configs/am65x_evm.h | 7 ---- include/configs/at91sam9m10g45ek.h | 1 - include/configs/at91sam9n12ek.h | 1 - include/configs/at91sam9x5ek.h | 1 - include/configs/ax25-ae350.h | 1 - include/configs/bur_am335x_common.h | 1 - include/configs/capricorn-common.h | 1 - include/configs/cgtqmx8.h | 1 - include/configs/ci20.h | 1 - include/configs/clearfog.h | 1 - include/configs/controlcenterdc.h | 1 - include/configs/corvus.h | 1 - include/configs/da850evm.h | 2 - include/configs/db-88f6720.h | 1 - include/configs/db-88f6820-amc.h | 1 - include/configs/db-88f6820-gp.h | 1 - include/configs/db-mv784mp-gp.h | 1 - include/configs/devkit8000.h | 1 - include/configs/ds414.h | 1 - include/configs/edminiv2.h | 1 - include/configs/exynos5250-common.h | 2 - include/configs/exynos5420-common.h | 2 - .../configs/gardena-smart-gateway-at91sam.h | 1 - .../configs/gardena-smart-gateway-mt7688.h | 1 - include/configs/helios4.h | 1 - include/configs/imx6_spl.h | 2 - include/configs/imx7_spl.h | 1 - include/configs/imx8mm-cl-iot-gate.h | 1 - include/configs/imx8mm_beacon.h | 1 - include/configs/imx8mm_data_modul_edm_sbc.h | 1 - include/configs/imx8mm_evk.h | 1 - include/configs/imx8mm_icore_mx8mm.h | 1 - include/configs/imx8mm_venice.h | 1 - include/configs/imx8mn_beacon.h | 1 - include/configs/imx8mn_bsh_smm_s2_common.h | 1 - include/configs/imx8mn_evk.h | 1 - include/configs/imx8mn_var_som.h | 1 - include/configs/imx8mn_venice.h | 1 - include/configs/imx8mp_dhcom_pdk2.h | 2 - include/configs/imx8mp_evk.h | 1 - include/configs/imx8mp_rsb3720.h | 1 - include/configs/imx8mp_venice.h | 1 - include/configs/imx8mq_cm.h | 1 - include/configs/imx8mq_evk.h | 1 - include/configs/imx8mq_phanbell.h | 1 - include/configs/imx8qm_mek.h | 1 - include/configs/imx8qm_rom7720.h | 1 - include/configs/imx8qxp_mek.h | 1 - include/configs/imx8ulp_evk.h | 1 - include/configs/j721e_evm.h | 7 ---- include/configs/j721s2_evm.h | 7 ---- include/configs/kontron-sl-mx8mm.h | 1 - include/configs/kontron_pitx_imx8m.h | 1 - include/configs/kontron_sl28.h | 1 - include/configs/linkit-smart-7688.h | 1 - include/configs/ls1021aiot.h | 1 - include/configs/ls1021aqds.h | 2 - include/configs/ls1021atsn.h | 1 - include/configs/ls1021atwr.h | 1 - include/configs/ls1043a_common.h | 2 - include/configs/ls1046a_common.h | 3 -- include/configs/ls1088a_common.h | 1 - include/configs/ls2080a_common.h | 1 - include/configs/maxbcm.h | 1 - include/configs/microblaze-generic.h | 5 --- include/configs/mt7620.h | 1 - include/configs/mt7628.h | 1 - include/configs/mt7629.h | 1 - include/configs/omapl138_lcdk.h | 2 - include/configs/openpiton-riscv64.h | 1 - include/configs/origen.h | 2 - include/configs/phycore_imx8mm.h | 1 - include/configs/phycore_imx8mp.h | 1 - include/configs/pico-imx8mq.h | 1 - include/configs/pm9g45.h | 1 - include/configs/px30_common.h | 1 - include/configs/qemu-riscv.h | 1 - include/configs/rcar-gen3-common.h | 2 - include/configs/rk3308_common.h | 1 - include/configs/rk3328_common.h | 1 - include/configs/rk3368_common.h | 1 - include/configs/rk3399_common.h | 2 - include/configs/rk3568_common.h | 1 - include/configs/sama5d27_som1_ek.h | 1 - include/configs/sama5d27_wlsom1_ek.h | 1 - include/configs/sama5d2_icp.h | 1 - include/configs/sama5d2_xplained.h | 1 - include/configs/sama5d3_xplained.h | 1 - include/configs/sama5d3xek.h | 1 - include/configs/sama5d4_xplained.h | 1 - include/configs/sama5d4ek.h | 1 - include/configs/siemens-am33x-common.h | 1 - include/configs/sifive-unleashed.h | 1 - include/configs/sifive-unmatched.h | 1 - include/configs/smartweb.h | 1 - include/configs/smdkv310.h | 2 - include/configs/sniper.h | 1 - include/configs/socfpga_soc64_common.h | 1 - include/configs/stm32mp15_common.h | 1 - include/configs/sunxi-common.h | 2 - include/configs/taurus.h | 1 - include/configs/tegra-common.h | 2 - include/configs/theadorable.h | 1 - include/configs/ti814x_evm.h | 1 - include/configs/ti_armv7_common.h | 1 - include/configs/ti_armv7_keystone2.h | 3 +- include/configs/topic_miami.h | 4 -- include/configs/turris_omnia.h | 1 - include/configs/uniphier.h | 2 - include/configs/verdin-imx8mm.h | 1 - include/configs/verdin-imx8mp.h | 1 - include/configs/vocore2.h | 1 - include/configs/x530.h | 1 - include/configs/xilinx_zynqmp.h | 1 - include/configs/zynq-common.h | 1 - include/configs/zynq_cse.h | 2 - 445 files changed, 407 insertions(+), 182 deletions(-) diff --git a/README b/README index 074fabb4e91..efec01a8aae 100644 --- a/README +++ b/README @@ -1658,13 +1658,6 @@ The following options need to be configured: CONFIG_SPL Enable building of SPL globally. - CONFIG_SPL_MAX_FOOTPRINT - Maximum size in memory allocated to the SPL, BSS included. - When defined, the linker checks that the actual memory - used by SPL from _start to __bss_end does not exceed it. - CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE - must not be both defined at the same time. - CONFIG_SPL_RELOC_TEXT_BASE Address to relocate to. If unspecified, this is equal to CONFIG_SPL_TEXT_BASE (i.e. no relocation is done). @@ -1672,13 +1665,6 @@ The following options need to be configured: CONFIG_SPL_BSS_START_ADDR Link address for the BSS within the SPL binary. - CONFIG_SPL_BSS_MAX_SIZE - Maximum size in memory allocated to the SPL BSS. - When defined, the linker checks that the actual memory used - by SPL from __bss_start to __bss_end does not exceed it. - CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE - must not be both defined at the same time. - CONFIG_SPL_STACK Adress of the start of the stack SPL will use diff --git a/board/davinci/da8xxevm/u-boot-spl-da850evm.lds b/board/davinci/da8xxevm/u-boot-spl-da850evm.lds index 8f04911306b..f6b9de29084 100644 --- a/board/davinci/da8xxevm/u-boot-spl-da850evm.lds +++ b/board/davinci/da8xxevm/u-boot-spl-da850evm.lds @@ -11,7 +11,7 @@ MEMORY { .sram : ORIGIN = IMAGE_TEXT_BASE,\ LENGTH = CONFIG_SPL_MAX_FOOTPRINT } MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \ - LENGTH = CONFIG_SPL_BSS_MAX_SIZE } + LENGTH = 0x1080000 } OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") OUTPUT_ARCH(arm) diff --git a/common/spl/Kconfig b/common/spl/Kconfig index ff8690d4f6a..48af2a3d483 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -105,6 +105,44 @@ config SPL_PAD_TO 0, meaning to append the SPL payload without any padding, or >= CONFIG_SPL_MAX_SIZE. +choice + prompt "Enforce SPL BSS limit" + depends on SPL && !PPC + default SPL_BSS_LIMIT + help + In some platforms we only want to enforce a limit on the size of the + BSS in memory. On other platforms we need to enforce a limit on the + whole of the memory allocation as we're strictly limited to a small + typically non-DRAM location. Finally, other platforms do not enforce + a memory limit within SPL. + +config SPL_NO_BSS_LIMIT + bool "Do not enforce a build time limit on the size of the BSS" + +config SPL_BSS_LIMIT + bool "Enforce a limit on the size of the BSS only" + +config SPL_FOOTPRINT_LIMIT + bool "Enforce a limit on the whole of memory allocated to SPL, BSS included" + +endchoice + +config SPL_BSS_MAX_SIZE + hex "Maximum size in memory allocated to the SPL BSS" + depends on SPL_BSS_LIMIT + default 0x100000 if ARCH_MX6 || RISCV + default 0x80000 if ARCH_OMAP2PLUS || ARCH_SUNXI + help + When non-zero, the linker checks that the actual memory used by SPL + from __bss_start to __bss_end does not exceed it. + +config SPL_MAX_FOOTPRINT + hex "Maximum size in memory allocated to the SPL, BSS included" + depends on SPL_FOOTPRINT_LIMIT + help + When non-zero, the linker checks that the actual memory used by SPL + from _start to __bss_end does not exceed it. + config SPL_SYS_STACK_F_CHECK_BYTE hex default 0xaa diff --git a/configs/alt_defconfig b/configs/alt_defconfig index 8a7fe556925..a7ba2460c9c 100644 --- a/configs/alt_defconfig +++ b/configs/alt_defconfig @@ -29,6 +29,7 @@ CONFIG_ENV_ADDR=0xC0000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_MAX_SIZE=0x4000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_RAM_SUPPORT=y diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig index 9e251c1ed90..93358c1745d 100644 --- a/configs/am64x_evm_a53_defconfig +++ b/configs/am64x_evm_a53_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run get_kern_${boot}; run get_fdt_${boot}; run run_kern" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x180000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y diff --git a/configs/am64x_evm_r5_defconfig b/configs/am64x_evm_r5_defconfig index 6ad98a43032..cbeb8bf8704 100644 --- a/configs/am64x_evm_r5_defconfig +++ b/configs/am64x_evm_r5_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x180000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig index 3915c3bb5b4..1966ff378c8 100644 --- a/configs/am65x_evm_a53_defconfig +++ b/configs/am65x_evm_a53_defconfig @@ -34,6 +34,7 @@ CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run init_${boot}; run boot_ CONFIG_LOGLEVEL=7 CONFIG_CONSOLE_MUX=y CONFIG_SPL_MAX_SIZE=0x58000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index cea8231c106..c686b405398 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -32,6 +32,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x58000 +CONFIG_SPL_BSS_MAX_SIZE=0xc00 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y diff --git a/configs/am65x_evm_r5_usbdfu_defconfig b/configs/am65x_evm_r5_usbdfu_defconfig index ea237914af3..175c4ceb3f1 100644 --- a/configs/am65x_evm_r5_usbdfu_defconfig +++ b/configs/am65x_evm_r5_usbdfu_defconfig @@ -24,6 +24,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0x58000 +CONFIG_SPL_BSS_MAX_SIZE=0xc00 CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_EARLY_BSS=y diff --git a/configs/am65x_evm_r5_usbmsc_defconfig b/configs/am65x_evm_r5_usbmsc_defconfig index 41fabd44f6f..c81400030d8 100644 --- a/configs/am65x_evm_r5_usbmsc_defconfig +++ b/configs/am65x_evm_r5_usbmsc_defconfig @@ -23,6 +23,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0x58000 +CONFIG_SPL_BSS_MAX_SIZE=0xc00 CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_EARLY_BSS=y diff --git a/configs/am65x_hs_evm_a53_defconfig b/configs/am65x_hs_evm_a53_defconfig index 0dc42101901..3ee472653f2 100644 --- a/configs/am65x_hs_evm_a53_defconfig +++ b/configs/am65x_hs_evm_a53_defconfig @@ -34,6 +34,7 @@ CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run get_fit_${bo CONFIG_LOGLEVEL=7 CONFIG_CONSOLE_MUX=y CONFIG_SPL_MAX_SIZE=0x58000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/am65x_hs_evm_r5_defconfig b/configs/am65x_hs_evm_r5_defconfig index 214349dab17..fc8cc9151da 100644 --- a/configs/am65x_hs_evm_r5_defconfig +++ b/configs/am65x_hs_evm_r5_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0x58000 +CONFIG_SPL_BSS_MAX_SIZE=0xc00 CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_EARLY_BSS=y diff --git a/configs/apalis-tk1_defconfig b/configs/apalis-tk1_defconfig index 6be7c5a5737..548ff2e2152 100644 --- a/configs/apalis-tk1_defconfig +++ b/configs/apalis-tk1_defconfig @@ -21,6 +21,8 @@ CONFIG_SYS_STDIO_DEREGISTER=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SYS_PROMPT="Apalis TK1 # " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=1024 diff --git a/configs/apalis_t30_defconfig b/configs/apalis_t30_defconfig index 17283539a0a..b665ca2f4b4 100644 --- a/configs/apalis_t30_defconfig +++ b/configs/apalis_t30_defconfig @@ -17,6 +17,8 @@ CONFIG_SYS_STDIO_DEREGISTER=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SYS_PROMPT="Apalis T30 # " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=1024 diff --git a/configs/arndale_defconfig b/configs/arndale_defconfig index 7a5fb2ee981..62d8819e354 100644 --- a/configs/arndale_defconfig +++ b/configs/arndale_defconfig @@ -23,6 +23,8 @@ CONFIG_USE_PREBOOT=y CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x3800 CONFIG_SYS_PROMPT="ARNDALE # " CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_GPIO=y diff --git a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig index 2903c491f5a..c2858692d94 100644 --- a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig +++ b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTDELAY=0 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FS_LOAD_KERNEL_NAME="atf-uboot.ub" CONFIG_SPL_FS_LOAD_ARGS_NAME="u-boot.bin" CONFIG_SPL_OS_BOOT=y diff --git a/configs/axm_defconfig b/configs/axm_defconfig index 23ad604f4b3..1d49c196f3f 100644 --- a/configs/axm_defconfig +++ b/configs/axm_defconfig @@ -37,6 +37,7 @@ CONFIG_BOOTCOMMAND="run flash_self" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x3e00 CONFIG_SPL_PAD_TO=0x20000 +CONFIG_SPL_BSS_MAX_SIZE=0x600 # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_CRC32=y diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig index 48e2b26436d..d61f25376f5 100644 --- a/configs/beaver_defconfig +++ b/configs/beaver_defconfig @@ -14,6 +14,8 @@ CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SYS_PROMPT="Tegra30 (Beaver) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2084 diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig index f26776de6df..be5b8a0a329 100644 --- a/configs/bitmain_antminer_s9_defconfig +++ b/configs/bitmain_antminer_s9_defconfig @@ -28,6 +28,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_STACK_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="antminer> " diff --git a/configs/cardhu_defconfig b/configs/cardhu_defconfig index 3cacee77634..92729c3179f 100644 --- a/configs/cardhu_defconfig +++ b/configs/cardhu_defconfig @@ -13,6 +13,8 @@ CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SYS_PROMPT="Tegra30 (Cardhu) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2084 diff --git a/configs/cei-tk1-som_defconfig b/configs/cei-tk1-som_defconfig index 8ded21a8748..0e583194a13 100644 --- a/configs/cei-tk1-som_defconfig +++ b/configs/cei-tk1-som_defconfig @@ -15,6 +15,8 @@ CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SYS_PROMPT="Tegra124 (TK1-SOM) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2086 diff --git a/configs/cgtqmx8_defconfig b/configs/cgtqmx8_defconfig index 33ba9d6f495..83c001cd744 100644 --- a/configs/cgtqmx8_defconfig +++ b/configs/cgtqmx8_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x1f000 +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index 6ccce21dafb..ad62b9fb3b3 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -24,6 +24,7 @@ CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-mickey.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig index 53b04354829..9e7b0037b2e 100644 --- a/configs/chromebook_bob_defconfig +++ b/configs/chromebook_bob_defconfig @@ -28,6 +28,7 @@ CONFIG_BLOBLIST_ADDR=0x100000 CONFIG_BLOBLIST_SIZE=0x1000 CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_HANDOFF=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index 11116510f3e..298f4be7c44 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -41,6 +41,7 @@ CONFIG_BLOBLIST=y # CONFIG_TPL_BLOBLIST is not set CONFIG_BLOBLIST_ADDR=0x100000 CONFIG_BLOBLIST_SIZE=0x30000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_HANDOFF=y CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index 9d88c664b9d..ae35cde24c6 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -25,6 +25,7 @@ CONFIG_LOG=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 diff --git a/configs/chromebook_kevin_defconfig b/configs/chromebook_kevin_defconfig index 6a3f3cf0cbb..ef8a30d3a41 100644 --- a/configs/chromebook_kevin_defconfig +++ b/configs/chromebook_kevin_defconfig @@ -29,6 +29,7 @@ CONFIG_BLOBLIST_ADDR=0x100000 CONFIG_BLOBLIST_SIZE=0x1000 CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_HANDOFF=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig index 46397c3efa0..28206ee8cec 100644 --- a/configs/chromebook_link64_defconfig +++ b/configs/chromebook_link64_defconfig @@ -32,6 +32,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_CPU=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index fac8a900dc7..a7540afc0a2 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -25,6 +25,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 diff --git a/configs/chromebook_samus_tpl_defconfig b/configs/chromebook_samus_tpl_defconfig index 65a879d36d9..5ad17d217b1 100644 --- a/configs/chromebook_samus_tpl_defconfig +++ b/configs/chromebook_samus_tpl_defconfig @@ -35,6 +35,7 @@ CONFIG_MISC_INIT_R=y CONFIG_BLOBLIST=y CONFIG_BLOBLIST_ADDR=0xff7c0000 CONFIG_BLOBLIST_SIZE=0x1000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_HANDOFF=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_DM_SPI_FLASH=y diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig index 7fd4d573953..20b6c8e9f0d 100644 --- a/configs/chromebook_speedy_defconfig +++ b/configs/chromebook_speedy_defconfig @@ -25,6 +25,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 diff --git a/configs/ci20_mmc_defconfig b/configs/ci20_mmc_defconfig index 2337ac6a8be..e8bcc0b7f99 100644 --- a/configs/ci20_mmc_defconfig +++ b/configs/ci20_mmc_defconfig @@ -24,6 +24,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_MAX_SIZE=0x2e00 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_BANNER_PRINT is not set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1c diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig index 7e872fa2155..af7fb37afcc 100644 --- a/configs/cl-som-imx7_defconfig +++ b/configs/cl-som-imx7_defconfig @@ -26,6 +26,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="echo SD boot attempt ...; run sdbootscript; run sdboot; echo eMMC boot attempt ...; run emmcbootscript; run emmcboot; echo USB boot attempt ...; run usbbootscript; " CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0xe000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80 CONFIG_SPL_I2C=y diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig index 9931a02db0d..81588c897ee 100644 --- a/configs/clearfog_defconfig +++ b/configs/clearfog_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x22fd0 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_TLV_EEPROM=y diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig index 99b7d4a712e..76eb9e12c29 100644 --- a/configs/colibri_t20_defconfig +++ b/configs/colibri_t20_defconfig @@ -16,6 +16,8 @@ CONFIG_SYS_STDIO_DEREGISTER=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SYS_PROMPT="Colibri T20 # " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=1024 diff --git a/configs/colibri_t30_defconfig b/configs/colibri_t30_defconfig index 54191832724..c9f8a5e65e4 100644 --- a/configs/colibri_t30_defconfig +++ b/configs/colibri_t30_defconfig @@ -17,6 +17,8 @@ CONFIG_SYS_STDIO_DEREGISTER=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SYS_PROMPT="Colibri T30 # " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=1024 diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig index e7650f5e471..88104e696bf 100644 --- a/configs/controlcenterdc_defconfig +++ b/configs/controlcenterdc_defconfig @@ -33,6 +33,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_LATE_INIT=y CONFIG_LAST_STAGE_INIT=y CONFIG_SPL_MAX_SIZE=0x27fd0 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_I2C=y diff --git a/configs/coreboot64_defconfig b/configs/coreboot64_defconfig index a61f869291d..3bd099e7231 100644 --- a/configs/coreboot64_defconfig +++ b/configs/coreboot64_defconfig @@ -20,6 +20,7 @@ CONFIG_PRE_CONSOLE_BUFFER=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IDE=y diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig index 1c7bc9e0546..de0d526f34e 100644 --- a/configs/corvus_defconfig +++ b/configs/corvus_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTCOMMAND="nand read 0x70000000 0x200000 0x300000;bootm 0x70000000" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x3000 CONFIG_SPL_PAD_TO=0x20000 +CONFIG_SPL_BSS_MAX_SIZE=0x800 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_RAW_ONLY=y diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index 40da37f1b41..724e2face57 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -34,6 +34,8 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_CLOCKS=y CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x8000 +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_DM_SPI_FLASH=y diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig index 3f27999673a..4f5374f71f9 100644 --- a/configs/da850evm_nand_defconfig +++ b/configs/da850evm_nand_defconfig @@ -31,6 +31,8 @@ CONFIG_DEFAULT_FDT_FILE="da850-evm.dtb" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x8000 +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig index fca2ae668d2..1a0ad00a319 100644 --- a/configs/dalmore_defconfig +++ b/configs/dalmore_defconfig @@ -14,6 +14,8 @@ CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SYS_PROMPT="Tegra114 (Dalmore) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2086 diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig index da17225b490..8d48428c225 100644 --- a/configs/db-88f6720_defconfig +++ b/configs/db-88f6720_defconfig @@ -24,6 +24,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x1ffd0 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_I2C=y diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig index dcf1ffd61ee..248be49b029 100644 --- a/configs/db-88f6820-amc_defconfig +++ b/configs/db-88f6820-amc_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x22fd0 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=96 # CONFIG_CMD_FLASH is not set diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig index b7f66ae1522..6b7fb83348c 100644 --- a/configs/db-88f6820-gp_defconfig +++ b/configs/db-88f6820-gp_defconfig @@ -24,6 +24,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x22fd0 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_I2C=y diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig index 4c7a42409b0..57bed92d4be 100644 --- a/configs/db-mv784mp-gp_defconfig +++ b/configs/db-mv784mp-gp_defconfig @@ -24,6 +24,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x1bfd0 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set diff --git a/configs/deneb_defconfig b/configs/deneb_defconfig index c1fb57b9884..8546c8efac0 100644 --- a/configs/deneb_defconfig +++ b/configs/deneb_defconfig @@ -35,6 +35,7 @@ CONFIG_BOOTCOMMAND="if usrbutton; then run flash_self_test; reset; fi;run flash_ CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x1f000 +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig index ba9ee13534a..e8575ef9a72 100644 --- a/configs/devkit3250_defconfig +++ b/configs/devkit3250_defconfig @@ -24,6 +24,7 @@ CONFIG_BOOTCOMMAND="dhcp; tftp ${loadaddr} ${serverip}:${tftpdir}/${bootfile}; t # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig index fe9ab06aa28..64cecace0b6 100644 --- a/configs/ds414_defconfig +++ b/configs/ds414_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTCOMMAND="sf probe; sf read ${loadaddr} 0xd0000 0x2d0000; sf read ${ra CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1bfd0 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set diff --git a/configs/edminiv2_defconfig b/configs/edminiv2_defconfig index f18e483f6a7..dfb3e861f32 100644 --- a/configs/edminiv2_defconfig +++ b/configs/edminiv2_defconfig @@ -21,6 +21,7 @@ CONFIG_BOOTDELAY=3 CONFIG_ARCH_MISC_INIT=y CONFIG_RESET_PHY_R=y CONFIG_SPL_MAX_SIZE=0xfff0 +CONFIG_SPL_BSS_MAX_SIZE=0x1ffff CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index d90529e0f13..38d78d51924 100644 --- a/configs/evb-ast2600_defconfig +++ b/configs/evb-ast2600_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTCOMMAND="run bootspi" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000000 diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig index f7fa65e69fb..57186bdcf16 100644 --- a/configs/evb-px30_defconfig +++ b/configs/evb-px30_defconfig @@ -30,6 +30,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig index 10586a53847..d297e71d706 100644 --- a/configs/evb-px5_defconfig +++ b/configs/evb-px5_defconfig @@ -34,6 +34,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x20000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig index ea4427ed495..06bfa952eef 100644 --- a/configs/evb-rk3036_defconfig +++ b/configs/evb-rk3036_defconfig @@ -24,6 +24,7 @@ CONFIG_DEFAULT_FDT_FILE="rk3036-evb.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK_R=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig index abca41de13a..eed68f5357e 100644 --- a/configs/evb-rk3229_defconfig +++ b/configs/evb-rk3229_defconfig @@ -28,6 +28,7 @@ CONFIG_DEFAULT_FDT_FILE="rk3229-evb.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index 0a5ee20709f..a4f63c80ef2 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -25,6 +25,7 @@ CONFIG_DEFAULT_FDT_FILE="rk3288-evb-rk808.dtb" CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SPL_OPTEE_IMAGE=y diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig index 694256e3e84..b0cb84d6f00 100644 --- a/configs/evb-rk3308_defconfig +++ b/configs/evb-rk3308_defconfig @@ -24,6 +24,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_STACK_R=y # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig index f5c9f7b88bd..6f5cacbd119 100644 --- a/configs/evb-rk3328_defconfig +++ b/configs/evb-rk3328_defconfig @@ -27,6 +27,7 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-evb.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index baf3a115156..651939415e8 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -16,6 +16,7 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-evb.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/evb-rk3568_defconfig b/configs/evb-rk3568_defconfig index a45fac0c2f7..867868bd9ee 100644 --- a/configs/evb-rk3568_defconfig +++ b/configs/evb-rk3568_defconfig @@ -26,6 +26,7 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-evb.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y diff --git a/configs/ficus-rk3399_defconfig b/configs/ficus-rk3399_defconfig index 68b830dcb81..d41ee492fec 100644 --- a/configs/ficus-rk3399_defconfig +++ b/configs/ficus-rk3399_defconfig @@ -16,6 +16,7 @@ CONFIG_DEBUG_UART=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x10000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 diff --git a/configs/firefly-px30_defconfig b/configs/firefly-px30_defconfig index 57ac37fc642..93f30dc5d59 100644 --- a/configs/firefly-px30_defconfig +++ b/configs/firefly-px30_defconfig @@ -31,6 +31,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 629272a94bc..47322763fa4 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -21,6 +21,7 @@ CONFIG_DEFAULT_FDT_FILE="rk3288-firefly.dtb" CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_CMD_GPIO=y diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig index 4ed54ea4d39..679f36455f0 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -17,6 +17,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig index 2dd0aa2acfc..b22c1b1f8d8 100644 --- a/configs/gardena-smart-gateway-at91sam_defconfig +++ b/configs/gardena-smart-gateway-at91sam_defconfig @@ -34,6 +34,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_MAX_SIZE=0x7000 CONFIG_SPL_PAD_TO=0x40000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/gardena-smart-gateway-mt7688_defconfig b/configs/gardena-smart-gateway-mt7688_defconfig index 11ad133c733..fd9dd9fbcbe 100644 --- a/configs/gardena-smart-gateway-mt7688_defconfig +++ b/configs/gardena-smart-gateway-mt7688_defconfig @@ -38,6 +38,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y diff --git a/configs/giedi_defconfig b/configs/giedi_defconfig index 6fd6e56fe54..377e0c492e1 100644 --- a/configs/giedi_defconfig +++ b/configs/giedi_defconfig @@ -35,6 +35,7 @@ CONFIG_BOOTCOMMAND="if usrbutton; then run flash_self_test; reset; fi;run flash_ CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x1f000 +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/gose_defconfig b/configs/gose_defconfig index 6efa4a54407..5f6f7610b15 100644 --- a/configs/gose_defconfig +++ b/configs/gose_defconfig @@ -29,6 +29,7 @@ CONFIG_ENV_ADDR=0xC0000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_MAX_SIZE=0x4000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_RAM_SUPPORT=y diff --git a/configs/harmony_defconfig b/configs/harmony_defconfig index 4ff4e8a86bb..6497d41f97c 100644 --- a/configs/harmony_defconfig +++ b/configs/harmony_defconfig @@ -12,6 +12,8 @@ CONFIG_TARGET_HARMONY=y CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SYS_PROMPT="Tegra20 (Harmony) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2085 diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig index 393483820d6..0b7cd74723f 100644 --- a/configs/helios4_defconfig +++ b/configs/helios4_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x22fd0 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_TLV_EEPROM=y diff --git a/configs/imx28_xea_defconfig b/configs/imx28_xea_defconfig index 4837209be10..8388cd631f2 100644 --- a/configs/imx28_xea_defconfig +++ b/configs/imx28_xea_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTCOMMAND="run ${bootpri} ; run ${bootsec}" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="run prebootcmd" CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/imx28_xea_sb_defconfig b/configs/imx28_xea_sb_defconfig index 91f046e2882..bad232ceec5 100644 --- a/configs/imx28_xea_sb_defconfig +++ b/configs/imx28_xea_sb_defconfig @@ -24,6 +24,7 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="run prebootcmd" CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/imx7_cm_defconfig b/configs/imx7_cm_defconfig index 912b3a6fd7a..351d47fe552 100644 --- a/configs/imx7_cm_defconfig +++ b/configs/imx7_cm_defconfig @@ -25,6 +25,7 @@ CONFIG_BOOTCOMMAND="run boot${boot-mode}" CONFIG_DEFAULT_FDT_FILE="ask" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_SPL_MAX_SIZE=0xe000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/imx8mm-cl-iot-gate-optee_defconfig b/configs/imx8mm-cl-iot-gate-optee_defconfig index 2d0e336d1d7..f2ce0a712db 100644 --- a/configs/imx8mm-cl-iot-gate-optee_defconfig +++ b/configs/imx8mm-cl-iot-gate-optee_defconfig @@ -24,6 +24,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig index ba5d5f1e6c4..add2687779e 100644 --- a/configs/imx8mm-cl-iot-gate_defconfig +++ b/configs/imx8mm-cl-iot-gate_defconfig @@ -26,6 +26,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig index fce998d3bb3..6e3cb0601e1 100644 --- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig +++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig @@ -24,6 +24,7 @@ CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-ctouch2.dtb" CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig index 03e33f395b4..3a2259515e0 100644 --- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig +++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig @@ -24,6 +24,7 @@ CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-edimm2.2.dtb" CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/imx8mm-mx8menlo_defconfig b/configs/imx8mm-mx8menlo_defconfig index 9ab6c36f7ae..1eb00e1a745 100644 --- a/configs/imx8mm-mx8menlo_defconfig +++ b/configs/imx8mm-mx8menlo_defconfig @@ -35,6 +35,7 @@ CONFIG_LOG=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig index bcf18b3613c..d11671f0346 100644 --- a/configs/imx8mm_beacon_defconfig +++ b/configs/imx8mm_beacon_defconfig @@ -26,6 +26,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; fi;" CONFIG_DEFAULT_FDT_FILE="imx8mm-beacon-kit.dtb" CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/imx8mm_data_modul_edm_sbc_defconfig b/configs/imx8mm_data_modul_edm_sbc_defconfig index 5a67bbff215..b76f4c44e31 100644 --- a/configs/imx8mm_data_modul_edm_sbc_defconfig +++ b/configs/imx8mm_data_modul_edm_sbc_defconfig @@ -42,6 +42,7 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_LEGACY_IMAGE_FORMAT=y CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index 86f24a0d2dd..00f605804df 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -24,6 +24,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig index 9586f650a37..1db032f39ec 100644 --- a/configs/imx8mm_venice_defconfig +++ b/configs/imx8mm_venice_defconfig @@ -32,6 +32,7 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="gsc wd-disable" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig index aec7ddd72e0..905d3e502ab 100644 --- a/configs/imx8mn_beacon_2g_defconfig +++ b/configs/imx8mn_beacon_2g_defconfig @@ -33,6 +33,7 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_DEFAULT_FDT_FILE="imx8mn-beacon-kit.dtb" CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig index 865b06b038c..f4b61c1aa5d 100644 --- a/configs/imx8mn_beacon_defconfig +++ b/configs/imx8mn_beacon_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_DEFAULT_FDT_FILE="imx8mn-beacon-kit.dtb" CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/imx8mn_bsh_smm_s2_defconfig b/configs/imx8mn_bsh_smm_s2_defconfig index 1a4db336090..2e27dd98c56 100644 --- a/configs/imx8mn_bsh_smm_s2_defconfig +++ b/configs/imx8mn_bsh_smm_s2_defconfig @@ -27,6 +27,7 @@ CONFIG_DEFAULT_FDT_FILE="freescale/imx8mn-bsh-smm-s2.dtb" CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/imx8mn_bsh_smm_s2pro_defconfig b/configs/imx8mn_bsh_smm_s2pro_defconfig index 69dde3f25a3..706beb9e653 100644 --- a/configs/imx8mn_bsh_smm_s2pro_defconfig +++ b/configs/imx8mn_bsh_smm_s2pro_defconfig @@ -28,6 +28,7 @@ CONFIG_DEFAULT_FDT_FILE="freescale/imx8mn-bsh-smm-s2pro.dtb" CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig index c62b193b878..22255418863 100644 --- a/configs/imx8mn_ddr4_evk_defconfig +++ b/configs/imx8mn_ddr4_evk_defconfig @@ -26,6 +26,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mn-ddr4-evk.dtb" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig index 2aef70be67e..beb89a7523e 100644 --- a/configs/imx8mn_evk_defconfig +++ b/configs/imx8mn_evk_defconfig @@ -27,6 +27,7 @@ CONFIG_DEFAULT_FDT_FILE="imx8mn-evk.dtb" CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set diff --git a/configs/imx8mn_var_som_defconfig b/configs/imx8mn_var_som_defconfig index 7fdaa2c3a6c..c7916891727 100644 --- a/configs/imx8mn_var_som_defconfig +++ b/configs/imx8mn_var_som_defconfig @@ -28,6 +28,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="freescale/imx8mn-var-som-symphony.dtb" CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig index 30a0a838162..2ca467871bd 100644 --- a/configs/imx8mn_venice_defconfig +++ b/configs/imx8mn_venice_defconfig @@ -33,6 +33,7 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="gsc wd-disable" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/imx8mp_dhcom_pdk2_defconfig b/configs/imx8mp_dhcom_pdk2_defconfig index 3ef5dc01fd1..6507b9d8b19 100644 --- a/configs/imx8mp_dhcom_pdk2_defconfig +++ b/configs/imx8mp_dhcom_pdk2_defconfig @@ -45,6 +45,8 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index 905f52a1e12..55dce14294e 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -29,6 +29,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mp-evk.dtb" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 +CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/imx8mp_rsb3720a1_4G_defconfig b/configs/imx8mp_rsb3720a1_4G_defconfig index 6a03f67563c..152b0bae091 100644 --- a/configs/imx8mp_rsb3720a1_4G_defconfig +++ b/configs/imx8mp_rsb3720a1_4G_defconfig @@ -35,6 +35,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 +CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/imx8mp_rsb3720a1_6G_defconfig b/configs/imx8mp_rsb3720a1_6G_defconfig index bc7f3108366..223767bb7d7 100644 --- a/configs/imx8mp_rsb3720a1_6G_defconfig +++ b/configs/imx8mp_rsb3720a1_6G_defconfig @@ -35,6 +35,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 +CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/imx8mp_venice_defconfig b/configs/imx8mp_venice_defconfig index 6c144c51c75..c44eadae602 100644 --- a/configs/imx8mp_venice_defconfig +++ b/configs/imx8mp_venice_defconfig @@ -33,6 +33,7 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="gsc wd-disable" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 +CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/imx8mq_cm_defconfig b/configs/imx8mq_cm_defconfig index f396b42221a..a9cc11c22fe 100644 --- a/configs/imx8mq_cm_defconfig +++ b/configs/imx8mq_cm_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x1f000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index 07453918dbb..7cd1d3177d1 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -30,6 +30,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x1f000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/imx8mq_phanbell_defconfig b/configs/imx8mq_phanbell_defconfig index 77693db947a..83485648a57 100644 --- a/configs/imx8mq_phanbell_defconfig +++ b/configs/imx8mq_phanbell_defconfig @@ -32,6 +32,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x2b000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig index 9f68877125e..5ca28bcc0a4 100644 --- a/configs/imx8qm_mek_defconfig +++ b/configs/imx8qm_mek_defconfig @@ -29,6 +29,7 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x1f000 +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/imx8qm_rom7720_a1_4G_defconfig b/configs/imx8qm_rom7720_a1_4G_defconfig index da9b1ab194c..d456c4d21c7 100644 --- a/configs/imx8qm_rom7720_a1_4G_defconfig +++ b/configs/imx8qm_rom7720_a1_4G_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x1f000 +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index d0f42842fca..a6f12f33030 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -29,6 +29,7 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x1f000 +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/imx8ulp_evk_defconfig b/configs/imx8ulp_evk_defconfig index 3d09aaa865d..778766cd979 100644 --- a/configs/imx8ulp_evk_defconfig +++ b/configs/imx8ulp_evk_defconfig @@ -28,6 +28,7 @@ CONFIG_DEFAULT_FDT_FILE="imx8ulp-evk" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/imxrt1020-evk_defconfig b/configs/imxrt1020-evk_defconfig index 86b4a6b2a2a..b60533aec47 100644 --- a/configs/imxrt1020-evk_defconfig +++ b/configs/imxrt1020-evk_defconfig @@ -21,6 +21,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_SD_BOOT=y # CONFIG_USE_BOOTCOMMAND is not set # CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/imxrt1050-evk_defconfig b/configs/imxrt1050-evk_defconfig index 09432d9793f..344186a570b 100644 --- a/configs/imxrt1050-evk_defconfig +++ b/configs/imxrt1050-evk_defconfig @@ -24,6 +24,7 @@ CONFIG_SD_BOOT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y # CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/iot2050_defconfig b/configs/iot2050_defconfig index 6cabc10925b..d307d7575ee 100644 --- a/configs/iot2050_defconfig +++ b/configs/iot2050_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_SHOW_BOOT_PROGRESS=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0x58000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig index e633f2243aa..fc171db8606 100644 --- a/configs/j7200_evm_a72_defconfig +++ b/configs/j7200_evm_a72_defconfig @@ -33,6 +33,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern" CONFIG_LOGLEVEL=7 CONFIG_SPL_MAX_SIZE=0xc0000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig index 451f25cf3db..572a66633c6 100644 --- a/configs/j7200_evm_r5_defconfig +++ b/configs/j7200_evm_r5_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0xc0000 +CONFIG_SPL_BSS_MAX_SIZE=0xa000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index c0f55d8f835..68a29ecde0f 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run init_${boot}; run main_cpsw0_qsgmii_phyinit; run boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern" CONFIG_LOGLEVEL=7 CONFIG_SPL_MAX_SIZE=0xc0000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index 45bebbe66b0..3b4c1e168c7 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0xc0000 +CONFIG_SPL_BSS_MAX_SIZE=0xa000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y diff --git a/configs/j721e_hs_evm_a72_defconfig b/configs/j721e_hs_evm_a72_defconfig index 34bd47608da..dbf97bde459 100644 --- a/configs/j721e_hs_evm_a72_defconfig +++ b/configs/j721e_hs_evm_a72_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run main_cpsw0_qsgmii_phyinit; run boot_rprocs; run get_fit_${boot}; run get_overlaystring; run run_fit" CONFIG_LOGLEVEL=7 CONFIG_SPL_MAX_SIZE=0xc0000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y diff --git a/configs/j721e_hs_evm_r5_defconfig b/configs/j721e_hs_evm_r5_defconfig index 42ccbe28c7a..606473c863e 100644 --- a/configs/j721e_hs_evm_r5_defconfig +++ b/configs/j721e_hs_evm_r5_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0xc0000 +CONFIG_SPL_BSS_MAX_SIZE=0xa000 CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_EARLY_BSS=y diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig index 503b8fb512f..fffae21d78c 100644 --- a/configs/j721s2_evm_a72_defconfig +++ b/configs/j721s2_evm_a72_defconfig @@ -33,6 +33,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run main_cpsw0_qsgmii_phyinit; run boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern" CONFIG_LOGLEVEL=7 CONFIG_SPL_MAX_SIZE=0xc0000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig index 7f1d2b05048..427dcf8f8ac 100644 --- a/configs/j721s2_evm_r5_defconfig +++ b/configs/j721s2_evm_r5_defconfig @@ -33,6 +33,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0xc0000 +CONFIG_SPL_BSS_MAX_SIZE=0xa000 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig index 3867076d98e..20fed61ec7a 100644 --- a/configs/jetson-tk1_defconfig +++ b/configs/jetson-tk1_defconfig @@ -14,6 +14,8 @@ CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SYS_PROMPT="Tegra124 (Jetson TK1) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2089 diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index 89726c96799..29de4b2aa94 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -28,6 +28,7 @@ CONFIG_BOOTCOMMAND="run init_${boot}; run get_mon_${boot} run_mon; run get_kern_ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0xfff8 +CONFIG_SPL_BSS_MAX_SIZE=0x8000 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index e98e9533546..a9b4afe12db 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run get_mon_${bo CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0xfff8 +CONFIG_SPL_BSS_MAX_SIZE=0x8000 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index 93a29fb31e9..799e4e43076 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -28,6 +28,7 @@ CONFIG_BOOTCOMMAND="run init_${boot}; run get_mon_${boot} run_mon; run get_kern_ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0xfff8 +CONFIG_SPL_BSS_MAX_SIZE=0x8000 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index 852d2d8467b..b1bfbd8d9ba 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -28,6 +28,7 @@ CONFIG_BOOTCOMMAND="run init_${boot}; run get_mon_${boot} run_mon; run get_kern_ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0xfff8 +CONFIG_SPL_BSS_MAX_SIZE=0x8000 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/khadas-edge-captain-rk3399_defconfig b/configs/khadas-edge-captain-rk3399_defconfig index 91e01705168..d5d75971a27 100644 --- a/configs/khadas-edge-captain-rk3399_defconfig +++ b/configs/khadas-edge-captain-rk3399_defconfig @@ -16,6 +16,7 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge-captain.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/khadas-edge-rk3399_defconfig b/configs/khadas-edge-rk3399_defconfig index 6eb1c35e86b..701cfc664a4 100644 --- a/configs/khadas-edge-rk3399_defconfig +++ b/configs/khadas-edge-rk3399_defconfig @@ -16,6 +16,7 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/khadas-edge-v-rk3399_defconfig b/configs/khadas-edge-v-rk3399_defconfig index 8529b4c2844..d5d5b63a27c 100644 --- a/configs/khadas-edge-v-rk3399_defconfig +++ b/configs/khadas-edge-v-rk3399_defconfig @@ -16,6 +16,7 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge-v.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig index 58239a78d81..c67553bcdc4 100644 --- a/configs/koelsch_defconfig +++ b/configs/koelsch_defconfig @@ -29,6 +29,7 @@ CONFIG_ENV_ADDR=0xC0000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_MAX_SIZE=0x4000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_RAM_SUPPORT=y diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig index bc7c99783a2..db69cf53c8c 100644 --- a/configs/kontron-sl-mx8mm_defconfig +++ b/configs/kontron-sl-mx8mm_defconfig @@ -27,6 +27,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOARD_TYPES=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/kontron_pitx_imx8m_defconfig b/configs/kontron_pitx_imx8m_defconfig index 7b0d6b91d01..f8e11f581f0 100644 --- a/configs/kontron_pitx_imx8m_defconfig +++ b/configs/kontron_pitx_imx8m_defconfig @@ -31,6 +31,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1f000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/kontron_sl28_defconfig b/configs/kontron_sl28_defconfig index fcc6dd394d9..bf252923716 100644 --- a/configs/kontron_sl28_defconfig +++ b/configs/kontron_sl28_defconfig @@ -36,6 +36,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOARD_LATE_INIT=y CONFIG_PCI_INIT_R=y CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig index 876a7e5a95d..0e45892dcfa 100644 --- a/configs/kylin-rk3036_defconfig +++ b/configs/kylin-rk3036_defconfig @@ -26,6 +26,7 @@ CONFIG_DEFAULT_FDT_FILE="rk3036-kylin.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK_R=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/lager_defconfig b/configs/lager_defconfig index a2cfcb061fa..7a97fb9f2c4 100644 --- a/configs/lager_defconfig +++ b/configs/lager_defconfig @@ -29,6 +29,7 @@ CONFIG_ENV_ADDR=0xC0000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_MAX_SIZE=0x4000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_RAM_SUPPORT=y diff --git a/configs/leez-rk3399_defconfig b/configs/leez-rk3399_defconfig index 9bd3e20c3ef..6f7f0e09a4d 100644 --- a/configs/leez-rk3399_defconfig +++ b/configs/leez-rk3399_defconfig @@ -16,6 +16,7 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-leez-p710.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/linkit-smart-7688_defconfig b/configs/linkit-smart-7688_defconfig index ed23c13061b..3c385774c69 100644 --- a/configs/linkit-smart-7688_defconfig +++ b/configs/linkit-smart-7688_defconfig @@ -30,6 +30,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig index 7dc518758a8..7c7bfad4653 100644 --- a/configs/lion-rk3368_defconfig +++ b/configs/lion-rk3368_defconfig @@ -32,6 +32,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x20000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig index 14406bc9fb3..85b0c937cdb 100644 --- a/configs/ls1021aiot_sdcard_defconfig +++ b/configs/ls1021aiot_sdcard_defconfig @@ -33,6 +33,7 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index dc8b03ee02a..4ec86e736d2 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -43,6 +43,7 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index b7d46ad6db1..079b19ab5e7 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -42,6 +42,7 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index ad03479f8b0..a6a4be372ee 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -41,6 +41,7 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig index e76e3df75ec..b97c0a0035a 100644 --- a/configs/ls1021atsn_sdcard_defconfig +++ b/configs/ls1021atsn_sdcard_defconfig @@ -35,6 +35,7 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index 5348ade5e14..772737ff562 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -42,6 +42,7 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index c9537ed4ac3..d04a0b6f0f8 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -43,6 +43,7 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index 82030f8f3cd..3b1e5d9df88 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -44,6 +44,7 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index 079cbb3f1fc..4c7767e09b9 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -47,6 +47,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x20000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index 71ecfccb48d..ec8c55cd519 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -48,6 +48,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x17000 CONFIG_SPL_PAD_TO=0x1d000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index d51cc08ef6c..9dbaf7c6b51 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -48,6 +48,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x17000 CONFIG_SPL_PAD_TO=0x1d000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index 9d566d3def9..437b8802f22 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -31,6 +31,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x20000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index cc60fa65d15..68bf7da0e78 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -36,6 +36,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x20000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index 1a7fc26ee38..448c796666c 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd; run sd_bootcmd; env exists secureboot && CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x17000 CONFIG_SPL_PAD_TO=0x1d000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index 74a426cdc6c..0aaaa8cad0a 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -37,6 +37,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x17000 CONFIG_SPL_PAD_TO=0x1d000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig index f56f078d12e..065f6d0ad5d 100644 --- a/configs/ls1046aqds_nand_defconfig +++ b/configs/ls1046aqds_nand_defconfig @@ -47,6 +47,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x17000 CONFIG_SPL_PAD_TO=0x40000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index be7903b0a0f..90badb14e73 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -48,6 +48,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_PAD_TO=0x21000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index 3fc281fe8ec..0c78b58a6b6 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -48,6 +48,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_PAD_TO=0x21000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig index b9219b52010..fd825695b48 100644 --- a/configs/ls1046ardb_emmc_defconfig +++ b/configs/ls1046ardb_emmc_defconfig @@ -38,6 +38,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_PAD_TO=0x21000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig index 50b26b3ff81..e2c221bfc66 100644 --- a/configs/ls1046ardb_qspi_spl_defconfig +++ b/configs/ls1046ardb_qspi_spl_defconfig @@ -42,6 +42,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_PAD_TO=0x20000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig index 6a5c8997c9c..a560aa5ec54 100644 --- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -36,6 +36,7 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd;run sd_bootcmd; env exists secureboot && CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_PAD_TO=0x21000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig index f573a679f2b..2bb13e067ab 100644 --- a/configs/ls1046ardb_sdcard_defconfig +++ b/configs/ls1046ardb_sdcard_defconfig @@ -38,6 +38,7 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_PAD_TO=0x21000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig index de3c11382ae..fa0a0166f67 100644 --- a/configs/ls1088aqds_sdcard_ifc_defconfig +++ b/configs/ls1088aqds_sdcard_ifc_defconfig @@ -40,6 +40,7 @@ CONFIG_BOOTCOMMAND="mmcinfo;mmc read 0x80001000 0x6800 0x800; fsl_mc lazyapply d CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_RESET_PHY_R=y CONFIG_SPL_MAX_SIZE=0x16000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig index a3064090152..d9f2aaa08b4 100644 --- a/configs/ls1088aqds_sdcard_qspi_defconfig +++ b/configs/ls1088aqds_sdcard_qspi_defconfig @@ -41,6 +41,7 @@ CONFIG_BOOTCOMMAND="mmcinfo;mmc read 0x80001000 0x6800 0x800; fsl_mc lazyapply d CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_RESET_PHY_R=y CONFIG_SPL_MAX_SIZE=0x16000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig index a727b5c358a..ebfe7d78cf1 100644 --- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig @@ -41,6 +41,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_SPL_MAX_SIZE=0x16000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig index d2db36cecc3..8f4b4f32754 100644 --- a/configs/ls1088ardb_sdcard_qspi_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_defconfig @@ -42,6 +42,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_SPL_MAX_SIZE=0x16000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index 547fe5c1234..4fca0b1a281 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -33,6 +33,7 @@ CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_l CONFIG_RESET_PHY_R=y CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SPL_PAD_TO=0x20000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig index f724c0e0524..7aae9ed8cd5 100644 --- a/configs/ls2080aqds_sdcard_defconfig +++ b/configs/ls2080aqds_sdcard_defconfig @@ -33,6 +33,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="mmc read 0x80200000 0x6800 0x800; fsl_mc apply dpl 0x80200000 && mmc read $kernel_load $kernel_start $kernel_size && bootm $kernel_load" CONFIG_RESET_PHY_R=y CONFIG_SPL_MAX_SIZE=0x16000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index 6c499b8fbaf..89dc2f656d7 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -39,6 +39,7 @@ CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SPL_PAD_TO=0x80000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index 378b9f2a361..336ba0180e7 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -32,6 +32,7 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="run try_bootscript" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_PAD_TO=0x8000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig index 4f651619f0e..50cf48d2e68 100644 --- a/configs/maxbcm_defconfig +++ b/configs/maxbcm_defconfig @@ -23,6 +23,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x1bfd0 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_I2C=y diff --git a/configs/medcom-wide_defconfig b/configs/medcom-wide_defconfig index f85dba5e4fb..4b2e305c107 100644 --- a/configs/medcom-wide_defconfig +++ b/configs/medcom-wide_defconfig @@ -13,6 +13,8 @@ CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SYS_PROMPT="Tegra20 (Medcom-Wide) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2089 diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index a919d8bcf89..a7698ac1ec1 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -24,6 +24,8 @@ CONFIG_PREBOOT="echo U-BOOT for ${hostname};setenv preboot;echo" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0xffb00 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig index 8d3bd5d2be9..d26195e44ea 100644 --- a/configs/miqi-rk3288_defconfig +++ b/configs/miqi-rk3288_defconfig @@ -21,6 +21,7 @@ CONFIG_DEFAULT_FDT_FILE="rk3288-miqi.dtb" CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_CMD_GPIO=y diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig index 9d5f0932736..54b419f4da6 100644 --- a/configs/mk808_defconfig +++ b/configs/mk808_defconfig @@ -33,6 +33,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x32000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000 CONFIG_SPL_SEPARATE_BSS=y diff --git a/configs/mt7620_mt7530_rfb_defconfig b/configs/mt7620_mt7530_rfb_defconfig index 9622d821c13..2d45c3db1fe 100644 --- a/configs/mt7620_mt7530_rfb_defconfig +++ b/configs/mt7620_mt7530_rfb_defconfig @@ -25,6 +25,7 @@ CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y # CONFIG_CMD_ELF is not set diff --git a/configs/mt7620_rfb_defconfig b/configs/mt7620_rfb_defconfig index 048a83c0052..137d88b35a1 100644 --- a/configs/mt7620_rfb_defconfig +++ b/configs/mt7620_rfb_defconfig @@ -24,6 +24,7 @@ CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y # CONFIG_CMD_ELF is not set diff --git a/configs/mt7628_rfb_defconfig b/configs/mt7628_rfb_defconfig index fedc217a9cf..46848736648 100644 --- a/configs/mt7628_rfb_defconfig +++ b/configs/mt7628_rfb_defconfig @@ -24,6 +24,7 @@ CONFIG_FIT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y # CONFIG_CMD_ELF is not set diff --git a/configs/mt7629_rfb_defconfig b/configs/mt7629_rfb_defconfig index b1f528bbdde..5f301e0eceb 100644 --- a/configs/mt7629_rfb_defconfig +++ b/configs/mt7629_rfb_defconfig @@ -23,6 +23,8 @@ CONFIG_DEFAULT_FDT_FILE="mt7629-rfb" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_NOR_SUPPORT=y diff --git a/configs/mx23_olinuxino_defconfig b/configs/mx23_olinuxino_defconfig index 465259a1035..d1d983d0f03 100644 --- a/configs/mx23_olinuxino_defconfig +++ b/configs/mx23_olinuxino_defconfig @@ -21,6 +21,7 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_NO_CPU_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/mx23evk_defconfig b/configs/mx23evk_defconfig index a9d7b1402bd..fbd999236c1 100644 --- a/configs/mx23evk_defconfig +++ b/configs/mx23evk_defconfig @@ -22,6 +22,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_NO_CPU_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/mx28evk_auart_console_defconfig b/configs/mx28evk_auart_console_defconfig index aa0ac1cfd0f..28a81e476c5 100644 --- a/configs/mx28evk_auart_console_defconfig +++ b/configs/mx28evk_auart_console_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_NO_CPU_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig index 446f206928e..b4e7d0d29fe 100644 --- a/configs/mx28evk_defconfig +++ b/configs/mx28evk_defconfig @@ -23,6 +23,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_NO_CPU_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/mx28evk_nand_defconfig b/configs/mx28evk_nand_defconfig index 4a13b2a6769..749c6481c2f 100644 --- a/configs/mx28evk_nand_defconfig +++ b/configs/mx28evk_nand_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_NO_CPU_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/mx28evk_spi_defconfig b/configs/mx28evk_spi_defconfig index 91fb6dbe46d..35fac909317 100644 --- a/configs/mx28evk_spi_defconfig +++ b/configs/mx28evk_spi_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_NO_CPU_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/nanopc-t4-rk3399_defconfig b/configs/nanopc-t4-rk3399_defconfig index 81d474ed235..bd1548adcaf 100644 --- a/configs/nanopc-t4-rk3399_defconfig +++ b/configs/nanopc-t4-rk3399_defconfig @@ -16,6 +16,7 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopc-t4.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/nanopi-m4-2gb-rk3399_defconfig b/configs/nanopi-m4-2gb-rk3399_defconfig index 608ef3824f0..3c8b41943a4 100644 --- a/configs/nanopi-m4-2gb-rk3399_defconfig +++ b/configs/nanopi-m4-2gb-rk3399_defconfig @@ -16,6 +16,7 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4-2gb.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/nanopi-m4-rk3399_defconfig b/configs/nanopi-m4-rk3399_defconfig index c504a6d1755..a71df3bbcc7 100644 --- a/configs/nanopi-m4-rk3399_defconfig +++ b/configs/nanopi-m4-rk3399_defconfig @@ -16,6 +16,7 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/nanopi-m4b-rk3399_defconfig b/configs/nanopi-m4b-rk3399_defconfig index de950c36933..fb6d62c16a2 100644 --- a/configs/nanopi-m4b-rk3399_defconfig +++ b/configs/nanopi-m4b-rk3399_defconfig @@ -16,6 +16,7 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4b.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/nanopi-neo4-rk3399_defconfig b/configs/nanopi-neo4-rk3399_defconfig index b3dfafa971d..8f10d3c0b17 100644 --- a/configs/nanopi-neo4-rk3399_defconfig +++ b/configs/nanopi-neo4-rk3399_defconfig @@ -16,6 +16,7 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-neo4.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/nanopi-r2s-rk3328_defconfig b/configs/nanopi-r2s-rk3328_defconfig index 54ccecb33e1..e82214d8ff4 100644 --- a/configs/nanopi-r2s-rk3328_defconfig +++ b/configs/nanopi-r2s-rk3328_defconfig @@ -28,6 +28,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y diff --git a/configs/nanopi-r4s-rk3399_defconfig b/configs/nanopi-r4s-rk3399_defconfig index f5e24e8814f..72a96b049bb 100644 --- a/configs/nanopi-r4s-rk3399_defconfig +++ b/configs/nanopi-r4s-rk3399_defconfig @@ -16,6 +16,7 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-r4s.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig index 531cc0266e6..4433b65644f 100644 --- a/configs/nyan-big_defconfig +++ b/configs/nyan-big_defconfig @@ -23,6 +23,8 @@ CONFIG_SPL_BOOTSTAGE=y CONFIG_BOOTSTAGE_STASH=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0xef8100 CONFIG_SYS_PROMPT="Tegra124 (Nyan-big) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2087 diff --git a/configs/odroid-go2_defconfig b/configs/odroid-go2_defconfig index 4e57a2b52ea..c15e9f335de 100644 --- a/configs/odroid-go2_defconfig +++ b/configs/odroid-go2_defconfig @@ -34,6 +34,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index 0ae02d923d3..108a31441b4 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -32,6 +32,8 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_CLOCKS=y CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x8000 +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xb5 CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/orangepi-rk3399_defconfig b/configs/orangepi-rk3399_defconfig index b090e928dfd..c266641c896 100644 --- a/configs/orangepi-rk3399_defconfig +++ b/configs/orangepi-rk3399_defconfig @@ -16,6 +16,7 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-orangepi.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/origen_defconfig b/configs/origen_defconfig index b8a6b79acb0..5aa8f10bc7b 100644 --- a/configs/origen_defconfig +++ b/configs/origen_defconfig @@ -22,6 +22,8 @@ CONFIG_BOOTCOMMAND="if mmc rescan; then echo SD/MMC found on device ${mmcdev};if CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x3800 CONFIG_SYS_PROMPT="ORIGEN # " CONFIG_SYS_PBSIZE=1024 # CONFIG_CMD_XIMG is not set diff --git a/configs/paz00_defconfig b/configs/paz00_defconfig index df43008b1cf..08106e98111 100644 --- a/configs/paz00_defconfig +++ b/configs/paz00_defconfig @@ -12,6 +12,8 @@ CONFIG_TARGET_PAZ00=y CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SYS_PROMPT="Tegra20 (Paz00) MOD # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2087 diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig index 2a2a0e09e2d..d71ceada989 100644 --- a/configs/peach-pi_defconfig +++ b/configs/peach-pi_defconfig @@ -22,6 +22,8 @@ CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x7800 CONFIG_SYS_PROMPT="Peach-Pi # " CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_GPIO=y diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig index a3f364e2d42..98eeab54bd3 100644 --- a/configs/peach-pit_defconfig +++ b/configs/peach-pit_defconfig @@ -21,6 +21,8 @@ CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x7800 CONFIG_SYS_PROMPT="Peach-Pit # " CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_GPIO=y diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig index 13b1b75b4a2..492451da044 100644 --- a/configs/phycore-imx8mm_defconfig +++ b/configs/phycore-imx8mm_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadimage; the CONFIG_DEFAULT_FDT_FILE="oftree" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig index 7ec698bc6d3..bc2fe25545e 100644 --- a/configs/phycore-imx8mp_defconfig +++ b/configs/phycore-imx8mp_defconfig @@ -28,6 +28,7 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadimage; the CONFIG_DEFAULT_FDT_FILE="oftree" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 +CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig index 5b67b96254e..ce1271ef716 100644 --- a/configs/phycore-rk3288_defconfig +++ b/configs/phycore-rk3288_defconfig @@ -22,6 +22,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_CMD_GPIO=y diff --git a/configs/pico-dwarf-imx7d_defconfig b/configs/pico-dwarf-imx7d_defconfig index d030af10951..00067d2e46d 100644 --- a/configs/pico-dwarf-imx7d_defconfig +++ b/configs/pico-dwarf-imx7d_defconfig @@ -26,6 +26,7 @@ CONFIG_BOARD_SIZE_LIMIT=715776 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx7d-pico-dwarf.dtb" CONFIG_SPL_MAX_SIZE=0xe000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig index 568623b5556..64c2ca4b189 100644 --- a/configs/pico-hobbit-imx7d_defconfig +++ b/configs/pico-hobbit-imx7d_defconfig @@ -26,6 +26,7 @@ CONFIG_BOARD_SIZE_LIMIT=715776 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx7d-pico-hobbit.dtb" CONFIG_SPL_MAX_SIZE=0xe000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pico-imx7d_bl33_defconfig b/configs/pico-imx7d_bl33_defconfig index d814a42a9f3..d13336d0548 100644 --- a/configs/pico-imx7d_bl33_defconfig +++ b/configs/pico-imx7d_bl33_defconfig @@ -27,6 +27,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_SPL_MAX_SIZE=0xe000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig index cea2df659c7..a6ee5cebfe2 100644 --- a/configs/pico-imx7d_defconfig +++ b/configs/pico-imx7d_defconfig @@ -26,6 +26,7 @@ CONFIG_BOARD_SIZE_LIMIT=715776 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="ask" CONFIG_SPL_MAX_SIZE=0xe000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pico-imx8mq_defconfig b/configs/pico-imx8mq_defconfig index ba384d4be7f..b706b80874f 100644 --- a/configs/pico-imx8mq_defconfig +++ b/configs/pico-imx8mq_defconfig @@ -31,6 +31,7 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x1f000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/pico-nymph-imx7d_defconfig b/configs/pico-nymph-imx7d_defconfig index d030af10951..00067d2e46d 100644 --- a/configs/pico-nymph-imx7d_defconfig +++ b/configs/pico-nymph-imx7d_defconfig @@ -26,6 +26,7 @@ CONFIG_BOARD_SIZE_LIMIT=715776 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx7d-pico-dwarf.dtb" CONFIG_SPL_MAX_SIZE=0xe000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig index 822f61def6f..b74b2582cb9 100644 --- a/configs/pico-pi-imx7d_defconfig +++ b/configs/pico-pi-imx7d_defconfig @@ -26,6 +26,7 @@ CONFIG_BOARD_SIZE_LIMIT=715776 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx7d-pico-pi.dtb" CONFIG_SPL_MAX_SIZE=0xe000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig index 825d8602e6b..f41a66a3047 100644 --- a/configs/pinebook-pro-rk3399_defconfig +++ b/configs/pinebook-pro-rk3399_defconfig @@ -21,6 +21,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/plutux_defconfig b/configs/plutux_defconfig index 7f35bd2345a..95b25162777 100644 --- a/configs/plutux_defconfig +++ b/configs/plutux_defconfig @@ -14,6 +14,8 @@ CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SYS_PROMPT="Tegra20 (Plutux) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2084 diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig index 8acd84a060e..4354b2893f7 100644 --- a/configs/popmetal-rk3288_defconfig +++ b/configs/popmetal-rk3288_defconfig @@ -22,6 +22,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_CMD_GPIO=y diff --git a/configs/porter_defconfig b/configs/porter_defconfig index 528dd9e6d4e..ae6863373f8 100644 --- a/configs/porter_defconfig +++ b/configs/porter_defconfig @@ -29,6 +29,7 @@ CONFIG_ENV_ADDR=0xC0000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_MAX_SIZE=0x4000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_RAM_SUPPORT=y diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index a29018501f4..866d624c18f 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -22,6 +22,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x10000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 diff --git a/configs/px30-core-ctouch2-of10-px30_defconfig b/configs/px30-core-ctouch2-of10-px30_defconfig index 005abd968b8..b4692250196 100644 --- a/configs/px30-core-ctouch2-of10-px30_defconfig +++ b/configs/px30-core-ctouch2-of10-px30_defconfig @@ -31,6 +31,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y diff --git a/configs/px30-core-ctouch2-px30_defconfig b/configs/px30-core-ctouch2-px30_defconfig index 16503ae794f..f704aeb56e9 100644 --- a/configs/px30-core-ctouch2-px30_defconfig +++ b/configs/px30-core-ctouch2-px30_defconfig @@ -31,6 +31,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y diff --git a/configs/px30-core-edimm2.2-px30_defconfig b/configs/px30-core-edimm2.2-px30_defconfig index ab7c0692b4f..c9b6523e319 100644 --- a/configs/px30-core-edimm2.2-px30_defconfig +++ b/configs/px30-core-edimm2.2-px30_defconfig @@ -31,6 +31,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig index 485f4a0ac21..66192734d55 100644 --- a/configs/qemu-x86_64_defconfig +++ b/configs/qemu-x86_64_defconfig @@ -30,6 +30,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_PCI_INIT_R=y +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_CPU=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig index b37577b46ef..b42e13bb558 100644 --- a/configs/r8a77970_eagle_defconfig +++ b/configs/r8a77970_eagle_defconfig @@ -22,6 +22,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77970-eagle.dtb; booti 0x48080000 - 0x48000000" CONFIG_DEFAULT_FDT_FILE="r8a77970-eagle.dtb" CONFIG_SYS_MALLOC_BOOTPARAMS=y +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 diff --git a/configs/r8a77980_condor_defconfig b/configs/r8a77980_condor_defconfig index a5da38ed7b6..f05590f7b3d 100644 --- a/configs/r8a77980_condor_defconfig +++ b/configs/r8a77980_condor_defconfig @@ -23,6 +23,7 @@ CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77980-condor CONFIG_DEFAULT_FDT_FILE="r8a77980-condor.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_SYS_MALLOC_BOOTPARAMS=y +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig index 3fd65e97c44..a2349c03dd5 100644 --- a/configs/r8a77990_ebisu_defconfig +++ b/configs/r8a77990_ebisu_defconfig @@ -24,6 +24,7 @@ CONFIG_DEFAULT_FDT_FILE="r8a77990-ebisu.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_UPDATE_TFTP=y +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig index ee0f6151317..1fe0d2abc58 100644 --- a/configs/r8a77995_draak_defconfig +++ b/configs/r8a77995_draak_defconfig @@ -23,6 +23,7 @@ CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77995-draak. CONFIG_DEFAULT_FDT_FILE="r8a77995-draak.dtb" CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_UPDATE_TFTP=y +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 diff --git a/configs/r8a779a0_falcon_defconfig b/configs/r8a779a0_falcon_defconfig index e15884222a0..67e9aa3be7b 100644 --- a/configs/r8a779a0_falcon_defconfig +++ b/configs/r8a779a0_falcon_defconfig @@ -25,6 +25,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a779a0-falcon.dtb; booti 0x48080000 - 0x48000000" CONFIG_DEFAULT_FDT_FILE="r8a779a0-falcon.dtb" CONFIG_SYS_MALLOC_BOOTPARAMS=y +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 diff --git a/configs/rcar3_salvator-x_defconfig b/configs/rcar3_salvator-x_defconfig index 7263b32101d..ab865bcc940 100644 --- a/configs/rcar3_salvator-x_defconfig +++ b/configs/rcar3_salvator-x_defconfig @@ -23,6 +23,7 @@ CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77950-salvat CONFIG_DEFAULT_FDT_FILE="r8a77950-salvator-x.dtb" CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_UPDATE_TFTP=y +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 diff --git a/configs/rcar3_ulcb_defconfig b/configs/rcar3_ulcb_defconfig index 052465c8d7a..0b512765331 100644 --- a/configs/rcar3_ulcb_defconfig +++ b/configs/rcar3_ulcb_defconfig @@ -23,6 +23,7 @@ CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77950-ulcb.d CONFIG_DEFAULT_FDT_FILE="r8a77950-ulcb.dtb" CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_UPDATE_TFTP=y +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 diff --git a/configs/roc-cc-rk3308_defconfig b/configs/roc-cc-rk3308_defconfig index f90c36332b2..b3cda0f8cf1 100644 --- a/configs/roc-cc-rk3308_defconfig +++ b/configs/roc-cc-rk3308_defconfig @@ -24,6 +24,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_STACK_R=y # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig index e9907debfbe..7df26d4d298 100644 --- a/configs/roc-cc-rk3328_defconfig +++ b/configs/roc-cc-rk3328_defconfig @@ -28,6 +28,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig index 135679b872f..5e16e1074a3 100644 --- a/configs/roc-pc-mezzanine-rk3399_defconfig +++ b/configs/roc-pc-mezzanine-rk3399_defconfig @@ -22,6 +22,7 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-mezzanine.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x20000 diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index c98fd0303c6..65f10518ab5 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -22,6 +22,7 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x20000 diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig index ebc318405ad..ee9224a6406 100644 --- a/configs/rock-pi-4-rk3399_defconfig +++ b/configs/rock-pi-4-rk3399_defconfig @@ -18,6 +18,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/rock-pi-4c-rk3399_defconfig b/configs/rock-pi-4c-rk3399_defconfig index 23381540987..6aec015ff82 100644 --- a/configs/rock-pi-4c-rk3399_defconfig +++ b/configs/rock-pi-4c-rk3399_defconfig @@ -18,6 +18,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig index 26f9c91b6d8..cb31b314f94 100644 --- a/configs/rock-pi-e-rk3328_defconfig +++ b/configs/rock-pi-e-rk3328_defconfig @@ -29,6 +29,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y diff --git a/configs/rock-pi-n10-rk3399pro_defconfig b/configs/rock-pi-n10-rk3399pro_defconfig index c31a5ed531e..c1cfb5c71a3 100644 --- a/configs/rock-pi-n10-rk3399pro_defconfig +++ b/configs/rock-pi-n10-rk3399pro_defconfig @@ -20,6 +20,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/rock-pi-n8-rk3288_defconfig b/configs/rock-pi-n8-rk3288_defconfig index 19c3f54d80b..2c0f24c528f 100644 --- a/configs/rock-pi-n8-rk3288_defconfig +++ b/configs/rock-pi-n8-rk3288_defconfig @@ -21,6 +21,7 @@ CONFIG_USE_PREBOOT=y CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_CMD_SPL=y diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig index fbaf82df13a..5a22dfe3bd0 100644 --- a/configs/rock2_defconfig +++ b/configs/rock2_defconfig @@ -22,6 +22,7 @@ CONFIG_SILENT_CONSOLE=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_CMD_GPIO=y diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig index 2524ad94498..c17bc535d8f 100644 --- a/configs/rock64-rk3328_defconfig +++ b/configs/rock64-rk3328_defconfig @@ -28,6 +28,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig index b581a900c7a..e91b469825f 100644 --- a/configs/rock960-rk3399_defconfig +++ b/configs/rock960-rk3399_defconfig @@ -17,6 +17,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/rock_defconfig b/configs/rock_defconfig index 9ec2c4b9231..0c10338c4ae 100644 --- a/configs/rock_defconfig +++ b/configs/rock_defconfig @@ -24,6 +24,7 @@ CONFIG_DEFAULT_FDT_FILE="rk3188-radxarock.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x7800 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_RANDOM_UUID=y diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig index a4f3d3d68a9..424f21cf15e 100644 --- a/configs/rockpro64-rk3399_defconfig +++ b/configs/rockpro64-rk3399_defconfig @@ -21,6 +21,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 diff --git a/configs/sama5d27_giantboard_defconfig b/configs/sama5d27_giantboard_defconfig index 050d9bf1d48..e8a0c40253b 100644 --- a/configs/sama5d27_giantboard_defconfig +++ b/configs/sama5d27_giantboard_defconfig @@ -37,6 +37,7 @@ CONFIG_BOOTCOMMAND="fatload mmc 0 0x22000000 at91-sama5d27_giantboard.dtb; fatlo # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig index 4a72c7e6cf6..599e6ec12a2 100644 --- a/configs/sama5d27_som1_ek_mmc1_defconfig +++ b/configs/sama5d27_som1_ek_mmc1_defconfig @@ -33,6 +33,7 @@ CONFIG_BOOTCOMMAND="fatload mmc 1 0x22000000 at91-sama5d27_som1_ek.dtb; fatload # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig index 82a6803ab3c..6cf60dde97a 100644 --- a/configs/sama5d27_som1_ek_mmc_defconfig +++ b/configs/sama5d27_som1_ek_mmc_defconfig @@ -34,6 +34,7 @@ CONFIG_BOOTCOMMAND="fatload mmc 0 0x22000000 at91-sama5d27_som1_ek.dtb; fatload # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig index e590643e741..f2038eea672 100644 --- a/configs/sama5d27_som1_ek_qspiflash_defconfig +++ b/configs/sama5d27_som1_ek_qspiflash_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwai # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig index 607272f0726..e83a034b2e6 100644 --- a/configs/sama5d27_wlsom1_ek_mmc_defconfig +++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig @@ -33,6 +33,7 @@ CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_DISPLAY_PRINT=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_AT91_MCK_BYPASS=y diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig index 08fc34ef59e..e6caba0be23 100644 --- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig +++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig @@ -33,6 +33,7 @@ CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x220 CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_DISPLAY_PRINT=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_DM_SPI_FLASH=y diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig index ee2817b4d66..c6ae3eee7eb 100644 --- a/configs/sama5d2_icp_mmc_defconfig +++ b/configs/sama5d2_icp_mmc_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x21000000 at91-sama5d2_icp.dtb; fatload mmc # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_DISPLAY_PRINT=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_RAM_SUPPORT=y diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig index 12ad0a443f8..32d87ec6c91 100644 --- a/configs/sama5d2_xplained_emmc_defconfig +++ b/configs/sama5d2_xplained_emmc_defconfig @@ -32,6 +32,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x22000000 at91-sama5d2_xplained.dtb; fatload mmc 0:1 0x23000000 zImage; bootz 0x23000000 - 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index 18d866c0f8e..f5ac4f6df96 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -34,6 +34,7 @@ CONFIG_BOOTCOMMAND="fatload mmc 1:1 0x22000000 at91-sama5d2_xplained.dtb; fatloa # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig index d3b9c4fcb39..55c4353c42a 100644 --- a/configs/sama5d2_xplained_qspiflash_defconfig +++ b/configs/sama5d2_xplained_qspiflash_defconfig @@ -35,6 +35,7 @@ CONFIG_BOOTCOMMAND="sf probe 1:0; sf read 0x22000000 0x180000 0x80000; sf read 0 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index e494893c051..4364e413c4c 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -36,6 +36,7 @@ CONFIG_BOOTCOMMAND="ext4load mmc 0:1 0x22000000 /boot/at91-sama5d2_xplained.dtb; # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index d39974e3575..99ac6953e87 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -33,6 +33,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_name}.dtb; fi; fatload mmc 0:1 0x21000000 ${dtb_name}; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index 878eca9cd98..0fb60933ab9 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -30,6 +30,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0x200000 0x600000;bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index 5074d015125..8af8eb9d0e6 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -35,6 +35,7 @@ CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index ef88b51dacf..6dddf0b203b 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0 CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index 04d68d33a03..4ae23d800e5 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -35,6 +35,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x22000000 0x6c000 0x394000; bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index 04358d19120..c1e5a6dadb7 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -34,6 +34,7 @@ CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_ # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x18000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index 77851be9bdb..d460269abed 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -31,6 +31,7 @@ CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x18000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index 979186b4474..922de42daf4 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -36,6 +36,7 @@ CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x220 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x18000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig index 98819d9ddb7..1bcb6081563 100644 --- a/configs/sama5d4ek_mmc_defconfig +++ b/configs/sama5d4ek_mmc_defconfig @@ -35,6 +35,7 @@ CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig index a402d693b3a..d272536a0b0 100644 --- a/configs/sama5d4ek_nandflash_defconfig +++ b/configs/sama5d4ek_nandflash_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0 CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig index 364e949cb99..8d1f8bd1202 100644 --- a/configs/sama5d4ek_spiflash_defconfig +++ b/configs/sama5d4ek_spiflash_defconfig @@ -35,6 +35,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x22000000 0x6c000 0x394000; bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 diff --git a/configs/sandbox_noinst_defconfig b/configs/sandbox_noinst_defconfig index c9430da0f09..c718374ed58 100644 --- a/configs/sandbox_noinst_defconfig +++ b/configs/sandbox_noinst_defconfig @@ -29,6 +29,7 @@ CONFIG_BOOTSTAGE_STASH_SIZE=0x4096 CONFIG_CONSOLE_RECORD=y CONFIG_CONSOLE_RECORD_OUT_SIZE=0x1000 CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_HANDOFF=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig index 13a76e89ea5..45a6b81a3d2 100644 --- a/configs/sandbox_spl_defconfig +++ b/configs/sandbox_spl_defconfig @@ -29,6 +29,7 @@ CONFIG_BOOTSTAGE_STASH_SIZE=0x4096 CONFIG_CONSOLE_RECORD=y CONFIG_CONSOLE_RECORD_OUT_SIZE=0x1000 CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_HANDOFF=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/sandbox_vpl_defconfig b/configs/sandbox_vpl_defconfig index e4ec16b3c92..c91ee2af71f 100644 --- a/configs/sandbox_vpl_defconfig +++ b/configs/sandbox_vpl_defconfig @@ -33,6 +33,7 @@ CONFIG_BOOTSTAGE_STASH_SIZE=0x4096 CONFIG_CONSOLE_RECORD=y CONFIG_CONSOLE_RECORD_OUT_SIZE=0x1000 CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_HANDOFF=y CONFIG_SPL_BOARD_INIT=y CONFIG_TPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig index 68a10456d9d..fb67ce6e155 100644 --- a/configs/seaboard_defconfig +++ b/configs/seaboard_defconfig @@ -12,6 +12,8 @@ CONFIG_TARGET_SEABOARD=y CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_PREBOOT=y +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SYS_PROMPT="Tegra20 (SeaBoard) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2086 diff --git a/configs/silinux_ek874_defconfig b/configs/silinux_ek874_defconfig index 74523483926..e728cb22269 100644 --- a/configs/silinux_ek874_defconfig +++ b/configs/silinux_ek874_defconfig @@ -24,6 +24,7 @@ CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a774c0-ek874. CONFIG_DEFAULT_FDT_FILE="r8a774c0-ek874.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_SYS_MALLOC_BOOTPARAMS=y +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 diff --git a/configs/silk_defconfig b/configs/silk_defconfig index 6cbe5aaa865..2f6bd2728bb 100644 --- a/configs/silk_defconfig +++ b/configs/silk_defconfig @@ -29,6 +29,7 @@ CONFIG_ENV_ADDR=0xC0000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_MAX_SIZE=0x4000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_RAM_SUPPORT=y diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig index 38ddb142b17..8a11e7b12f4 100644 --- a/configs/smartweb_defconfig +++ b/configs/smartweb_defconfig @@ -34,6 +34,7 @@ CONFIG_BOOTCOMMAND="run flashboot" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x1000 CONFIG_SPL_PAD_TO=0x20000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_RAW_ONLY=y CONFIG_SPL_NAND_DRIVERS=y diff --git a/configs/smdk5250_defconfig b/configs/smdk5250_defconfig index f20e9823420..290a74d1fe4 100644 --- a/configs/smdk5250_defconfig +++ b/configs/smdk5250_defconfig @@ -25,6 +25,8 @@ CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x3800 CONFIG_SYS_PROMPT="SMDK5250 # " CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_GPIO=y diff --git a/configs/smdk5420_defconfig b/configs/smdk5420_defconfig index 1658eea2474..cad63be4e9d 100644 --- a/configs/smdk5420_defconfig +++ b/configs/smdk5420_defconfig @@ -23,6 +23,8 @@ CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x7800 CONFIG_SYS_PROMPT="SMDK5420 # " CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_GPIO=y diff --git a/configs/smdkv310_defconfig b/configs/smdkv310_defconfig index 4b313c91ffe..be5f86d1398 100644 --- a/configs/smdkv310_defconfig +++ b/configs/smdkv310_defconfig @@ -17,6 +17,8 @@ CONFIG_SYS_LOAD_ADDR=0x43e00000 CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="fatload mmc 0 40007000 uImage; bootm 40007000" # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x3800 CONFIG_SYS_PROMPT="SMDKV310 # " CONFIG_SYS_PBSIZE=1024 # CONFIG_CMD_XIMG is not set diff --git a/configs/snow_defconfig b/configs/snow_defconfig index 710be757795..29e6e375e10 100644 --- a/configs/snow_defconfig +++ b/configs/snow_defconfig @@ -27,6 +27,8 @@ CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x3800 CONFIG_SYS_PROMPT="snow # " CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_GPIO=y diff --git a/configs/socfpga_agilex_atf_defconfig b/configs/socfpga_agilex_atf_defconfig index f84f258e1cf..af99cacba01 100644 --- a/configs/socfpga_agilex_atf_defconfig +++ b/configs/socfpga_agilex_atf_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTARGS="earlycon" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_CRC32=y CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig index bc8e7811ee8..265d8d98068 100644 --- a/configs/socfpga_agilex_defconfig +++ b/configs/socfpga_agilex_defconfig @@ -23,6 +23,7 @@ CONFIG_BOOTARGS="earlycon" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot" CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000 diff --git a/configs/socfpga_agilex_vab_defconfig b/configs/socfpga_agilex_vab_defconfig index 7bb0df2c448..21917f95b84 100644 --- a/configs/socfpga_agilex_vab_defconfig +++ b/configs/socfpga_agilex_vab_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTARGS="earlycon" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_CRC32=y CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig index c3cd442d374..884adf4d826 100644 --- a/configs/socfpga_arria10_defconfig +++ b/configs/socfpga_arria10_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x40000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_FPGA=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index ee0585ca323..e1a2171c12b 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index 3ab2a7d4573..1e9b3def108 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_dbm_soc1_defconfig b/configs/socfpga_dbm_soc1_defconfig index cccee6f777a..687be5211c5 100644 --- a/configs/socfpga_dbm_soc1_defconfig +++ b/configs/socfpga_dbm_soc1_defconfig @@ -22,6 +22,7 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_HUSH_PARSER=y diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig index 74b1c803f5a..0eaa19b7671 100644 --- a/configs/socfpga_de0_nano_soc_defconfig +++ b/configs/socfpga_de0_nano_soc_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 +CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig index 9ae804f5f65..4f27a6be7df 100644 --- a/configs/socfpga_de10_nano_defconfig +++ b/configs/socfpga_de10_nano_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_de10_standard_defconfig b/configs/socfpga_de10_standard_defconfig index 8a63e4c5913..bd75122aa06 100644 --- a/configs/socfpga_de10_standard_defconfig +++ b/configs/socfpga_de10_standard_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig index cf48d443e4b..829194ed846 100644 --- a/configs/socfpga_de1_soc_defconfig +++ b/configs/socfpga_de1_soc_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 +CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig index c289f1b8bfa..f613ce178c8 100644 --- a/configs/socfpga_is1_defconfig +++ b/configs/socfpga_is1_defconfig @@ -22,6 +22,7 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig index 97977d33bd4..421e5037484 100644 --- a/configs/socfpga_mcvevk_defconfig +++ b/configs/socfpga_mcvevk_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_n5x_atf_defconfig b/configs/socfpga_n5x_atf_defconfig index dc4734b8969..e1dddf9a15e 100644 --- a/configs/socfpga_n5x_atf_defconfig +++ b/configs/socfpga_n5x_atf_defconfig @@ -25,6 +25,7 @@ CONFIG_BOOTARGS="earlycon panic=-1 earlyprintk=ttyS0,115200" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_CRC32=y CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/socfpga_n5x_defconfig b/configs/socfpga_n5x_defconfig index 3a17ace0fda..63e2ef98757 100644 --- a/configs/socfpga_n5x_defconfig +++ b/configs/socfpga_n5x_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTARGS="earlycon panic=-1 earlyprintk=ttyS0,115200" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot" CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000 diff --git a/configs/socfpga_n5x_vab_defconfig b/configs/socfpga_n5x_vab_defconfig index e1e61753b90..79c7a92db62 100644 --- a/configs/socfpga_n5x_vab_defconfig +++ b/configs/socfpga_n5x_vab_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTARGS="earlycon panic=-1 earlyprintk=ttyS0,115200" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_CRC32=y CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig index c55ed87f210..edd55d641c8 100644 --- a/configs/socfpga_secu1_defconfig +++ b/configs/socfpga_secu1_defconfig @@ -32,6 +32,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x10000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1 diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig index db8dd0b2f20..24245c41595 100644 --- a/configs/socfpga_sockit_defconfig +++ b/configs/socfpga_sockit_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index 2602839e9d5..cb87bf2ac55 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index d939d0cce4a..5eb9eb458f8 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -26,6 +26,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_stratix10_atf_defconfig b/configs/socfpga_stratix10_atf_defconfig index 87c188fa9d7..7a6304d1f5f 100644 --- a/configs/socfpga_stratix10_atf_defconfig +++ b/configs/socfpga_stratix10_atf_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTARGS="earlycon" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_CRC32=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000 diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index 9db555a846a..21e99ab9fdf 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -25,6 +25,7 @@ CONFIG_BOOTARGS="earlycon" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot" CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x3C00000 CONFIG_HUSH_PARSER=y diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index 154f8197b5d..99bcbbf8a2e 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -26,6 +26,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x10000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_CMDLINE_PS_SUPPORT=y diff --git a/configs/spring_defconfig b/configs/spring_defconfig index 0d145c4e0c6..3a7746cd1c1 100644 --- a/configs/spring_defconfig +++ b/configs/spring_defconfig @@ -27,6 +27,8 @@ CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x3800 CONFIG_SYS_PROMPT="spring # " CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_GPIO=y diff --git a/configs/stm32746g-eval_spl_defconfig b/configs/stm32746g-eval_spl_defconfig index c8e30525a58..16b8b64c04b 100644 --- a/configs/stm32746g-eval_spl_defconfig +++ b/configs/stm32746g-eval_spl_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_PAD_TO=0x8000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_MTD_SUPPORT=y diff --git a/configs/stm32f746-disco_spl_defconfig b/configs/stm32f746-disco_spl_defconfig index 1eeae3a4ac3..87d67e4b48c 100644 --- a/configs/stm32f746-disco_spl_defconfig +++ b/configs/stm32f746-disco_spl_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_PAD_TO=0x8000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_MTD_SUPPORT=y diff --git a/configs/stm32f769-disco_spl_defconfig b/configs/stm32f769-disco_spl_defconfig index 570f69fe1d2..72175f719df 100644 --- a/configs/stm32f769-disco_spl_defconfig +++ b/configs/stm32f769-disco_spl_defconfig @@ -26,6 +26,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_PAD_TO=0x8000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_MTD_SUPPORT=y diff --git a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig index 122fe363d59..1fdceb708f7 100644 --- a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig @@ -15,6 +15,8 @@ CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x3db00 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig index 659a0e5a214..323d3214dfe 100644 --- a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig @@ -15,6 +15,8 @@ CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x3db00 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig index ca0f7334389..0eb3a54576d 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig @@ -15,6 +15,8 @@ CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x3db00 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig index 58ec3633488..fece692fa2e 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig @@ -15,6 +15,8 @@ CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x3db00 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 4710a1daaaf..c211205fe1d 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -25,6 +25,8 @@ CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_SPL_LOG=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x3db00 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 19eccec78e3..1fae0e441cf 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -25,6 +25,8 @@ CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_CONSOLE_MUX=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x3db00 CONFIG_SPL_LEGACY_IMAGE_FORMAT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index 2768417289c..c79bae65bce 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -23,6 +23,8 @@ CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_CONSOLE_MUX=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x3db00 CONFIG_SPL_LEGACY_IMAGE_FORMAT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 diff --git a/configs/stout_defconfig b/configs/stout_defconfig index 4fa82776545..1722cc8282a 100644 --- a/configs/stout_defconfig +++ b/configs/stout_defconfig @@ -29,6 +29,7 @@ CONFIG_ENV_ADDR=0xC0000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_MAX_SIZE=0x4000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_RAM_SUPPORT=y diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig index 279da693229..a9dc04cdfb9 100644 --- a/configs/syzygy_hub_defconfig +++ b/configs/syzygy_hub_defconfig @@ -26,6 +26,7 @@ CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_USE_PREBOOT=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_STACK_R=y CONFIG_SPL_FS_LOAD_ARGS_NAME="system.dtb" CONFIG_SPL_OS_BOOT=y diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig index 15687143358..79ceebe2db0 100644 --- a/configs/taurus_defconfig +++ b/configs/taurus_defconfig @@ -41,6 +41,7 @@ CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x3e00 CONFIG_SPL_PAD_TO=0x20000 +CONFIG_SPL_BSS_MAX_SIZE=0x600 # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_CRC32=y diff --git a/configs/tec-ng_defconfig b/configs/tec-ng_defconfig index d2b15a2a620..e305b5bcb10 100644 --- a/configs/tec-ng_defconfig +++ b/configs/tec-ng_defconfig @@ -14,6 +14,8 @@ CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SYS_PROMPT="Tegra30 (TEC-NG) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2084 diff --git a/configs/tec_defconfig b/configs/tec_defconfig index f1960307abf..9c644e68220 100644 --- a/configs/tec_defconfig +++ b/configs/tec_defconfig @@ -13,6 +13,8 @@ CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SYS_PROMPT="Tegra20 (TEC) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2081 diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index 851b560d433..3834c2b0908 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -28,6 +28,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x1bfd0 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_I2C=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig index 019fe4b26e4..969dd1fcbe1 100644 --- a/configs/tinker-rk3288_defconfig +++ b/configs/tinker-rk3288_defconfig @@ -22,6 +22,7 @@ CONFIG_DEFAULT_FDT_FILE="rk3288-tinker.dtb" CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_I2C=y diff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig index 27d2e5c4028..0cf5a358e9e 100644 --- a/configs/tinker-s-rk3288_defconfig +++ b/configs/tinker-s-rk3288_defconfig @@ -22,6 +22,7 @@ CONFIG_DEFAULT_FDT_FILE="rk3288-tinker-s.dtb" CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x300000 CONFIG_SPL_I2C=y diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig index 4e8f5fe078b..ed6ac3b7ae8 100644 --- a/configs/topic_miami_defconfig +++ b/configs/topic_miami_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTCOMMAND="if mmcinfo; then if fatload mmc 0 0x1900000 ${bootscript}; t CONFIG_USE_PREBOOT=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig index 1e64b06e059..a80ee224320 100644 --- a/configs/topic_miamilite_defconfig +++ b/configs/topic_miamilite_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTCOMMAND="if mmcinfo; then if fatload mmc 0 0x1900000 ${bootscript}; t CONFIG_USE_PREBOOT=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig index bd70cb7015c..a402478f64c 100644 --- a/configs/topic_miamiplus_defconfig +++ b/configs/topic_miamiplus_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTCOMMAND="if mmcinfo; then if fatload mmc 0 0x1900000 ${bootscript}; t CONFIG_USE_PREBOOT=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 diff --git a/configs/trimslice_defconfig b/configs/trimslice_defconfig index 03e6e7c5249..7d79ea3ec53 100644 --- a/configs/trimslice_defconfig +++ b/configs/trimslice_defconfig @@ -14,6 +14,8 @@ CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SYS_PROMPT="Tegra20 (TrimSlice) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2087 diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index 684d5d35ec3..36db6e4e924 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -37,6 +37,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x22fd0 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig index c0e4f15af54..b07f055f5d5 100644 --- a/configs/uniphier_ld4_sld8_defconfig +++ b/configs/uniphier_ld4_sld8_defconfig @@ -18,6 +18,7 @@ CONFIG_PREBOOT="env exist ${bootdev}preboot && run ${bootdev}preboot" CONFIG_LOGLEVEL=6 CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_PAD_TO=0x20000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_CMD_CONFIG=y diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig index 13e208c1a03..319e483bfd7 100644 --- a/configs/uniphier_v7_defconfig +++ b/configs/uniphier_v7_defconfig @@ -18,6 +18,7 @@ CONFIG_PREBOOT="env exist ${bootdev}preboot && run ${bootdev}preboot" CONFIG_LOGLEVEL=6 CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_PAD_TO=0x20000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_CMD_CONFIG=y diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig index 676ef29b516..0ad69b3e678 100644 --- a/configs/venice2_defconfig +++ b/configs/venice2_defconfig @@ -14,6 +14,8 @@ CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SYS_PROMPT="Tegra124 (Venice2) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2086 diff --git a/configs/ventana_defconfig b/configs/ventana_defconfig index 46d2a55d2c2..0b1d0f728ee 100644 --- a/configs/ventana_defconfig +++ b/configs/ventana_defconfig @@ -12,6 +12,8 @@ CONFIG_TARGET_VENTANA=y CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_PREBOOT=y +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SYS_PROMPT="Tegra20 (Ventana) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2085 diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig index e2e6cfb9623..f25d12609c3 100644 --- a/configs/verdin-imx8mm_defconfig +++ b/configs/verdin-imx8mm_defconfig @@ -33,6 +33,7 @@ CONFIG_LOG=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig index 0ec44aab4be..afe6bbaf429 100644 --- a/configs/verdin-imx8mp_defconfig +++ b/configs/verdin-imx8mp_defconfig @@ -41,6 +41,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 +CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/vocore2_defconfig b/configs/vocore2_defconfig index 42031be6270..d53851cb4e2 100644 --- a/configs/vocore2_defconfig +++ b/configs/vocore2_defconfig @@ -32,6 +32,7 @@ CONFIG_LOGLEVEL=8 CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig index dedf6277195..a4d4d78f543 100644 --- a/configs/vyasa-rk3288_defconfig +++ b/configs/vyasa-rk3288_defconfig @@ -21,6 +21,7 @@ CONFIG_DEFAULT_FDT_FILE="rk3288-vyasa.dtb" CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_OS_BOOT=y diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig index e3409ad305e..daed5e5ba49 100644 --- a/configs/work_92105_defconfig +++ b/configs/work_92105_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTARGS="console=ttyS2,115200n8" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_PAD_TO=0x20000 +CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/x530_defconfig b/configs/x530_defconfig index d145c8fa7d3..be05d8e433f 100644 --- a/configs/x530_defconfig +++ b/configs/x530_defconfig @@ -27,6 +27,7 @@ CONFIG_SILENT_CONSOLE_UPDATE_ON_RELOC=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x22fd0 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_CBSIZE=256 diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index c01a9189d44..fd8fd1ddfda 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -29,6 +29,7 @@ CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_USE_PREBOOT=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_STACK_R=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_FS_LOAD_ARGS_NAME="system.dtb" diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index a3d46c02eb7..1cc3b21de1a 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -23,6 +23,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_MAXARGS=64 diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index 0de4e232913..ac3989c9274 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -23,6 +23,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_MAXARGS=64 diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index d5ca194ca7c..d8c76a02213 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -22,6 +22,7 @@ CONFIG_REMAKE_ELF=y # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 91c65c9279a..40c9c28e139 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -32,6 +32,7 @@ CONFIG_PREBOOT="run scsi_init;usb start" CONFIG_BOARD_EARLY_INIT_R=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_STACK_R=y CONFIG_SPL_FS_LOAD_KERNEL_NAME="atf-uboot.ub" CONFIG_SPL_FS_LOAD_ARGS_NAME="u-boot.bin" diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig index 38002882ead..cb7181324e8 100644 --- a/configs/zynq_cse_nand_defconfig +++ b/configs/zynq_cse_nand_defconfig @@ -22,6 +22,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 +CONFIG_SPL_BSS_MAX_SIZE=0x8000 CONFIG_SPL_STACK_R=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig index 41c870499cc..da7b9d037c3 100644 --- a/configs/zynq_cse_nor_defconfig +++ b/configs/zynq_cse_nor_defconfig @@ -22,6 +22,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 +CONFIG_SPL_BSS_MAX_SIZE=0x8000 CONFIG_SPL_STACK_R=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index b057ee7169d..2f32f9d9a82 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -29,6 +29,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 +CONFIG_SPL_BSS_MAX_SIZE=0x8000 CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 diff --git a/include/configs/am64x_evm.h b/include/configs/am64x_evm.h index 98f2ecae202..f1bef40a7ca 100644 --- a/include/configs/am64x_evm.h +++ b/include/configs/am64x_evm.h @@ -21,13 +21,6 @@ #if defined(CONFIG_TARGET_AM642_A53_EVM) #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + SZ_4M) #else -/* - * Maximum size in memory allocated to the SPL BSS. Keep it as tight as - * possible (to allow the build to go through), as this directly affects - * our memory footprint. The less we use for BSS the more we have available - * for everything else. - */ -#define CONFIG_SPL_BSS_MAX_SIZE 0x4000 /* * Link BSS to be within SPL in a dedicated region located near the top of * the MCU SRAM, this way making it available also before relocation. Note diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h index 0093f077ed3..b6281677810 100644 --- a/include/configs/am65x_evm.h +++ b/include/configs/am65x_evm.h @@ -21,13 +21,6 @@ #ifdef CONFIG_TARGET_AM654_A53_EVM #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + SZ_4M) #else -/* - * Maximum size in memory allocated to the SPL BSS. Keep it as tight as - * possible (to allow the build to go through), as this directly affects - * our memory footprint. The less we use for BSS the more we have available - * for everything else. - */ -#define CONFIG_SPL_BSS_MAX_SIZE 0xc00 /* * Link BSS to be within SPL in a dedicated region located near the top of * the MCU SRAM, this way making it available also before relocation. Note diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 7cdd682894e..56313e35218 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -48,7 +48,6 @@ #ifdef CONFIG_SD_BOOT #define CONFIG_SPL_BSS_START_ADDR 0x70000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 #define CONFIG_SYS_SPL_MALLOC_START 0x70080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index 94f1096f402..aaf5e7dbef1 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -63,7 +63,6 @@ #define CONFIG_SPL_STACK 0x308000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index a0f0916ab78..2eb7787c202 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -58,7 +58,6 @@ #define CONFIG_SPL_STACK 0x308000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index be420bf154f..391aa006299 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -9,7 +9,6 @@ #ifdef CONFIG_SPL #define CONFIG_SPL_BSS_START_ADDR 0x04000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 #endif #define RISCV_MMODE_TIMERBASE 0xe6000000 diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h index 157d51e02f3..586275feee7 100644 --- a/include/configs/bur_am335x_common.h +++ b/include/configs/bur_am335x_common.h @@ -71,7 +71,6 @@ * ---------------------------------------------------------------------------- */ #define CONFIG_SPL_BSS_START_ADDR 0x80A00000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index 92b26e735ba..959d94acc47 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -19,7 +19,6 @@ #define CONFIG_SPL_STACK 0x013E000 #define CONFIG_SPL_BSS_START_ADDR 0x00128000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ #define CONFIG_SYS_SPL_MALLOC_START 0x00120000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ #define CONFIG_MALLOC_F_ADDR 0x00120000 diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h index 00408fce52e..e4cac0062da 100644 --- a/include/configs/cgtqmx8.h +++ b/include/configs/cgtqmx8.h @@ -16,7 +16,6 @@ #define CONFIG_SPL_STACK 0x013E000 #define CONFIG_SPL_BSS_START_ADDR 0x00128000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ #define CONFIG_SYS_SPL_MALLOC_START 0x00120000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ #define CONFIG_SERIAL_LPUART_BASE 0x5a060000 diff --git a/include/configs/ci20.h b/include/configs/ci20.h index af9e4a34746..33de2b7864a 100644 --- a/include/configs/ci20.h +++ b/include/configs/ci20.h @@ -34,7 +34,6 @@ #define CONFIG_SPL_STACK 0xf4008000 /* only max. 2KB spare! */ #define CONFIG_SPL_BSS_START_ADDR 0xf4004000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x00002000 /* 512KB, arbitrary */ #define CONFIG_SPL_START_S_PATH "arch/mips/mach-jz47xx" diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h index b8af7187c17..22f37495299 100644 --- a/include/configs/clearfog.h +++ b/include/configs/clearfog.h @@ -46,7 +46,6 @@ #define CONFIG_SPL_SIZE (140 << 10) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) -#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MALLOC_SIMPLE diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h index 94f61f99687..9fafa8fe35f 100644 --- a/include/configs/controlcenterdc.h +++ b/include/configs/controlcenterdc.h @@ -38,7 +38,6 @@ #define CONFIG_SPL_SIZE (160 << 10) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) -#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MALLOC_SIMPLE diff --git a/include/configs/corvus.h b/include/configs/corvus.h index 95ea75ced1d..b16c3717d92 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -60,7 +60,6 @@ #define CONFIG_SPL_STACK (SZ_16K) #define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE -#define CONFIG_SPL_BSS_MAX_SIZE (SZ_2K) #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 5e3925e5fd5..76440fa51c5 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -33,7 +33,6 @@ #define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */ #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/ #define CONFIG_SPL_BSS_START_ADDR DAVINCI_DDR_EMIF_DATA_BASE -#define CONFIG_SPL_BSS_MAX_SIZE 0x1080000 /* memtest start addr */ /* memtest will be run on 16MB */ @@ -184,7 +183,6 @@ CONFIG_SYS_MALLOC_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN #define CONFIG_SPL_STACK 0x8001ff00 -#define CONFIG_SPL_MAX_FOOTPRINT 32768 #endif diff --git a/include/configs/db-88f6720.h b/include/configs/db-88f6720.h index dd5a8389eba..f8d50d25965 100644 --- a/include/configs/db-88f6720.h +++ b/include/configs/db-88f6720.h @@ -36,7 +36,6 @@ /* Defines for SPL */ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) -#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MALLOC_SIMPLE diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h index e0e9c7ce6d5..06161e46702 100644 --- a/include/configs/db-88f6820-amc.h +++ b/include/configs/db-88f6820-amc.h @@ -43,7 +43,6 @@ #define CONFIG_SPL_SIZE (140 << 10) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) -#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MALLOC_SIMPLE diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index 11f522a25ab..6294092f874 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -43,7 +43,6 @@ #define CONFIG_SPL_SIZE (140 << 10) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) -#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MALLOC_SIMPLE diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index 98ce65f5da3..14b307343ce 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -55,7 +55,6 @@ /* Defines for SPL */ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) -#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MALLOC_SIMPLE diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index efb20eacd1e..6d0f63d075d 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -24,7 +24,6 @@ */ #define CONFIG_SPL_BSS_START_ADDR 0x80000500 /* leave space for bootargs*/ -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ diff --git a/include/configs/ds414.h b/include/configs/ds414.h index 2c07a9e3403..94b4ebc3934 100644 --- a/include/configs/ds414.h +++ b/include/configs/ds414.h @@ -47,7 +47,6 @@ /* Defines for SPL */ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) -#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MALLOC_SIMPLE diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index c3acaef238f..a09d39ee23d 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -17,7 +17,6 @@ #define CONFIG_SPL_STACK 0x00020000 #define CONFIG_SPL_BSS_START_ADDR 0x00020000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x0001ffff #define CONFIG_SYS_SPL_MALLOC_START 0x00040000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x0001ffff #define CONFIG_SYS_UBOOT_BASE 0xfff90000 diff --git a/include/configs/exynos5250-common.h b/include/configs/exynos5250-common.h index 36c3a613eb7..fc5b2eb07d8 100644 --- a/include/configs/exynos5250-common.h +++ b/include/configs/exynos5250-common.h @@ -13,8 +13,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024) - #define CONFIG_IRAM_STACK 0x02050000 #define CONFIG_SYS_INIT_SP_ADDR CONFIG_IRAM_STACK diff --git a/include/configs/exynos5420-common.h b/include/configs/exynos5420-common.h index 51f9f221742..5e1aba7692e 100644 --- a/include/configs/exynos5420-common.h +++ b/include/configs/exynos5420-common.h @@ -16,8 +16,6 @@ #define CONFIG_IRAM_TOP 0x02074000 -#define CONFIG_SPL_MAX_FOOTPRINT (30 * 1024) - #define CONFIG_PHY_IRAM_BASE 0x02020000 /* Address for relocating helper code (Last 4 KB of IRAM) */ diff --git a/include/configs/gardena-smart-gateway-at91sam.h b/include/configs/gardena-smart-gateway-at91sam.h index ae1fc826612..89dbbb039be 100644 --- a/include/configs/gardena-smart-gateway-at91sam.h +++ b/include/configs/gardena-smart-gateway-at91sam.h @@ -39,7 +39,6 @@ #define CONFIG_SPL_STACK 0x308000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/gardena-smart-gateway-mt7688.h b/include/configs/gardena-smart-gateway-mt7688.h index efb05302344..c012931722e 100644 --- a/include/configs/gardena-smart-gateway-mt7688.h +++ b/include/configs/gardena-smart-gateway-mt7688.h @@ -18,7 +18,6 @@ #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SPL_BSS_START_ADDR 0x80010000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x10000 /* Dummy value */ #define CONFIG_SYS_UBOOT_BASE 0 diff --git a/include/configs/helios4.h b/include/configs/helios4.h index d405d4b3f6a..3a748ea3b89 100644 --- a/include/configs/helios4.h +++ b/include/configs/helios4.h @@ -46,7 +46,6 @@ #define CONFIG_SPL_SIZE (140 << 10) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) -#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MALLOC_SIMPLE diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h index 5b8d7590312..ad6bbd802b5 100644 --- a/include/configs/imx6_spl.h +++ b/include/configs/imx6_spl.h @@ -62,12 +62,10 @@ #if defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL) || \ defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) #define CONFIG_SPL_BSS_START_ADDR 0x88200000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ #define CONFIG_SYS_SPL_MALLOC_START 0x88300000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ #else #define CONFIG_SPL_BSS_START_ADDR 0x18200000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ #define CONFIG_SYS_SPL_MALLOC_START 0x18300000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ #endif diff --git a/include/configs/imx7_spl.h b/include/configs/imx7_spl.h index 135727bab9a..33a6185ef94 100644 --- a/include/configs/imx7_spl.h +++ b/include/configs/imx7_spl.h @@ -42,7 +42,6 @@ #endif #define CONFIG_SPL_BSS_START_ADDR 0x88200000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ #define CONFIG_SYS_SPL_MALLOC_START 0x88300000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index cb66f5c23cc..d1af65e75ce 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -19,7 +19,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_STACK 0x920000 #define CONFIG_SPL_BSS_START_ADDR 0x910000 -#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */ #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h index 7238b11964a..3d8b262f474 100644 --- a/include/configs/imx8mm_beacon.h +++ b/include/configs/imx8mm_beacon.h @@ -16,7 +16,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_STACK 0x920000 #define CONFIG_SPL_BSS_START_ADDR 0x910000 -#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */ #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h index 2999e836229..b0f66a44b0b 100644 --- a/include/configs/imx8mm_data_modul_edm_sbc.h +++ b/include/configs/imx8mm_data_modul_edm_sbc.h @@ -17,7 +17,6 @@ #define CONFIG_SPL_STACK 0x920000 #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_BSS_START_ADDR 0x910000 -#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 kiB */ #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M /* 16 MiB */ diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index 679ec85f9b7..cbf95f9273f 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -18,7 +18,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_STACK 0x920000 #define CONFIG_SPL_BSS_START_ADDR 0x910000 -#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */ #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index 1f8718ac4a6..d0aab994203 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -17,7 +17,6 @@ #ifdef CONFIG_SPL_BUILD # define CONFIG_SPL_STACK 0x920000 # define CONFIG_SPL_BSS_START_ADDR 0x910000 -# define CONFIG_SPL_BSS_MAX_SIZE SZ_8K # define CONFIG_SYS_SPL_MALLOC_START 0x42200000 # define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index 3666d250fe4..df65fe9f867 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -16,7 +16,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_STACK 0x920000 #define CONFIG_SPL_BSS_START_ADDR 0x910000 -#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_1M diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h index decc169079f..8768d52a6a4 100644 --- a/include/configs/imx8mn_beacon.h +++ b/include/configs/imx8mn_beacon.h @@ -16,7 +16,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_STACK 0x187FF0 #define CONFIG_SPL_BSS_START_ADDR 0x0095e000 -#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K diff --git a/include/configs/imx8mn_bsh_smm_s2_common.h b/include/configs/imx8mn_bsh_smm_s2_common.h index f1351edf8f1..a05011d7c52 100644 --- a/include/configs/imx8mn_bsh_smm_s2_common.h +++ b/include/configs/imx8mn_bsh_smm_s2_common.h @@ -18,7 +18,6 @@ #define CONFIG_SPL_STACK 0x980000 #define CONFIG_SPL_BSS_START_ADDR 0x950000 -#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index 5a9caa5a086..1d6c92d4f95 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -19,7 +19,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_STACK 0x980000 #define CONFIG_SPL_BSS_START_ADDR 0x950000 -#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */ #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ diff --git a/include/configs/imx8mn_var_som.h b/include/configs/imx8mn_var_som.h index 7d761357319..267100cecae 100644 --- a/include/configs/imx8mn_var_som.h +++ b/include/configs/imx8mn_var_som.h @@ -18,7 +18,6 @@ #define CONFIG_SPL_STACK 0x980000 #define CONFIG_SPL_BSS_START_ADDR 0x950000 -#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index d2ab9f8add7..f17c2170f70 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -16,7 +16,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_STACK 0x980000 #define CONFIG_SPL_BSS_START_ADDR 0x950000 -#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */ #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ diff --git a/include/configs/imx8mp_dhcom_pdk2.h b/include/configs/imx8mp_dhcom_pdk2.h index 18ccc6f9270..8a09cf74532 100644 --- a/include/configs/imx8mp_dhcom_pdk2.h +++ b/include/configs/imx8mp_dhcom_pdk2.h @@ -12,13 +12,11 @@ #define CONFIG_SYS_BOOTM_LEN SZ_128M -#define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_1M #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_STACK 0x96FC00 #define CONFIG_SPL_BSS_START_ADDR 0x0096FC00 -#define CONFIG_SPL_BSS_MAX_SIZE 0x400 /* 1 KiB */ #define CONFIG_SYS_SPL_MALLOC_START 0x4c000000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 kiB */ diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index e74348b0966..ab7bab4ee70 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -19,7 +19,6 @@ /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ #define CONFIG_SPL_STACK 0x960000 #define CONFIG_SPL_BSS_START_ADDR 0x0098FC00 -#define CONFIG_SPL_BSS_MAX_SIZE 0x400 /* 1 KB */ #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index e08f773be2a..dba28139ec2 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -29,7 +29,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_STACK 0x960000 #define CONFIG_SPL_BSS_START_ADDR 0x0098FC00 -#define CONFIG_SPL_BSS_MAX_SIZE 0x400 /* 1 KB */ #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h index c91ea1c3357..a510fa78539 100644 --- a/include/configs/imx8mp_venice.h +++ b/include/configs/imx8mp_venice.h @@ -16,7 +16,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_STACK 0x960000 #define CONFIG_SPL_BSS_START_ADDR 0x0098FC00 -#define CONFIG_SPL_BSS_MAX_SIZE 0x400 /* 1 KB */ #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index f989a3dea5b..26a8c56711d 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -17,7 +17,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_STACK 0x187FF0 #define CONFIG_SPL_BSS_START_ADDR 0x00180000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */ #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 8d8bdb8e194..c49eaae62ba 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -18,7 +18,6 @@ /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ #define CONFIG_SPL_STACK 0x187FF0 #define CONFIG_SPL_BSS_START_ADDR 0x00180000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */ #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index 759f2555ddb..6fa53fe456c 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -15,7 +15,6 @@ /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ #define CONFIG_SPL_STACK 0x187FF0 #define CONFIG_SPL_BSS_START_ADDR 0x00180000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */ #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index 9a5160d8d07..f409c52e9af 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -17,7 +17,6 @@ #define CONFIG_SPL_STACK 0x013E000 #define CONFIG_SPL_BSS_START_ADDR 0x00128000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ #define CONFIG_SYS_SPL_MALLOC_START 0x00120000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ #define CONFIG_SERIAL_LPUART_BASE 0x5a060000 diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h index 43c4c3cc4e3..19e18b772b3 100644 --- a/include/configs/imx8qm_rom7720.h +++ b/include/configs/imx8qm_rom7720.h @@ -11,7 +11,6 @@ #include #define CONFIG_SPL_BSS_START_ADDR 0x00128000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index abbcf999256..053649fa1ed 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -15,7 +15,6 @@ #define CONFIG_SPL_STACK 0x013E000 #define CONFIG_SPL_BSS_START_ADDR 0x00128000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ #define CONFIG_SYS_SPL_MALLOC_START 0x00120000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ #define CONFIG_SERIAL_LPUART_BASE 0x5a060000 diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index 92615dff4a7..296d8eb7266 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -16,7 +16,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_STACK 0x22050000 #define CONFIG_SPL_BSS_START_ADDR 0x22048000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */ #define CONFIG_SYS_SPL_MALLOC_START 0x22040000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x8000 /* 32 KB */ diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index 3ddd72e281f..8ebdb7ce5d7 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -25,13 +25,6 @@ /* Image load address in RAM for DFU boot*/ #else #define CONFIG_SYS_UBOOT_BASE 0x50080000 -/* - * Maximum size in memory allocated to the SPL BSS. Keep it as tight as - * possible (to allow the build to go through), as this directly affects - * our memory footprint. The less we use for BSS the more we have available - * for everything else. - */ -#define CONFIG_SPL_BSS_MAX_SIZE 0xA000 /* * Link BSS to be within SPL in a dedicated region located near the top of * the MCU SRAM, this way making it available also before relocation. Note diff --git a/include/configs/j721s2_evm.h b/include/configs/j721s2_evm.h index 32af9de30b6..9b79e2b5378 100644 --- a/include/configs/j721s2_evm.h +++ b/include/configs/j721s2_evm.h @@ -26,13 +26,6 @@ /* Image load address in RAM for DFU boot*/ #else #define CONFIG_SYS_UBOOT_BASE 0x50080000 -/* - * Maximum size in memory allocated to the SPL BSS. Keep it as tight as - * possible (to allow the build to go through), as this directly affects - * our memory footprint. The less we use for BSS the more we have available - * for everything else. - */ -#define CONFIG_SPL_BSS_MAX_SIZE 0xA000 /* * Link BSS to be within SPL in a dedicated region located near the top of * the MCU SRAM, this way making it available also before relocation. Note diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h index 1d2db72557e..159b2127cb9 100644 --- a/include/configs/kontron-sl-mx8mm.h +++ b/include/configs/kontron-sl-mx8mm.h @@ -62,7 +62,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_STACK 0x91fff0 #define CONFIG_SPL_BSS_START_ADDR 0x910000 -#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index 96f0c1ac615..056163a2709 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -19,7 +19,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_STACK 0x187FF0 #define CONFIG_SPL_BSS_START_ADDR 0x00180000 -#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index 25cb8f6f84f..579687db1a1 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -43,7 +43,6 @@ /* SPL */ #define CONFIG_SPL_BSS_START_ADDR 0x80100000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 #define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 diff --git a/include/configs/linkit-smart-7688.h b/include/configs/linkit-smart-7688.h index c0bc23ef211..56a0c996c07 100644 --- a/include/configs/linkit-smart-7688.h +++ b/include/configs/linkit-smart-7688.h @@ -18,7 +18,6 @@ #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SPL_BSS_START_ADDR 0x80010000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x10000 /* Dummy value */ #define CONFIG_SYS_UBOOT_BASE 0 diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index f1e42a593f0..7d2a823ac7e 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -48,7 +48,6 @@ CONFIG_SYS_MONITOR_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 #define CONFIG_SPL_BSS_START_ADDR 0x80100000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_MONITOR_LEN 0x80000 #endif diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index b655b7ea46c..a18e047e2d4 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -17,7 +17,6 @@ CONFIG_SYS_MONITOR_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 #define CONFIG_SPL_BSS_START_ADDR 0x80100000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_MONITOR_LEN 0xc0000 #endif @@ -31,7 +30,6 @@ #define CONFIG_SYS_SPL_MALLOC_START 0x80200000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 #define CONFIG_SPL_BSS_START_ADDR 0x80100000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_MONITOR_LEN 0x80000 #endif diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index d60701bcb98..4775ec7a1db 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -50,7 +50,6 @@ CONFIG_SYS_MONITOR_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 #define CONFIG_SPL_BSS_START_ADDR 0x80100000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #ifdef CONFIG_U_BOOT_HDR_SIZE /* diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index c573adf85da..1c5d71c646a 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -52,7 +52,6 @@ CONFIG_SYS_MONITOR_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 #define CONFIG_SPL_BSS_START_ADDR 0x80100000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #ifdef CONFIG_U_BOOT_HDR_SIZE /* diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index a87494363ac..130f291a85a 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -58,7 +58,6 @@ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 #define CONFIG_SPL_BSS_START_ADDR 0x8f000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #ifdef CONFIG_NXP_ESBC #define CONFIG_U_BOOT_HDR_SIZE (16 << 10) @@ -82,7 +81,6 @@ #define CONFIG_SYS_SPL_MALLOC_START 0x80200000 #define CONFIG_SPL_BSS_START_ADDR 0x80100000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #ifdef CONFIG_NXP_ESBC #define CONFIG_U_BOOT_HDR_SIZE (16 << 10) diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index ed43c12f410..4378637c61d 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -53,7 +53,6 @@ #ifdef CONFIG_SD_BOOT #define CONFIG_SPL_STACK 0x10020000 #define CONFIG_SPL_BSS_START_ADDR 0x8f000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 @@ -76,7 +75,6 @@ #define CONFIG_SPL_TARGET "spl/u-boot-spl.pbl" #define CONFIG_SPL_STACK 0x10020000 #define CONFIG_SPL_BSS_START_ADDR 0x8f000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 @@ -90,7 +88,6 @@ #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SPL_BSS_START_ADDR 0x8f000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index f0351327923..348388046b8 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -150,7 +150,6 @@ unsigned long long get_qixis_addr(void); #ifdef CONFIG_SPL #define CONFIG_SPL_BSS_START_ADDR 0x80100000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 #define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0) #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index e225c0721c3..a2203ddc474 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -143,7 +143,6 @@ unsigned long long get_qixis_addr(void); " 0x580e00000 \0" #define CONFIG_SPL_BSS_START_ADDR 0x80100000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 #define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0) #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index 86d7fc8feaa..a57946fb0f8 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -50,7 +50,6 @@ /* Defines for SPL */ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) -#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MALLOC_SIMPLE diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 1c4e135a479..37bd4785492 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -134,9 +134,4 @@ /* Just for sure that there is a space for stack */ #define CONFIG_SPL_STACK_SIZE 0x100 -#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \ - CONFIG_SYS_INIT_RAM_ADDR - \ - CONFIG_SYS_MALLOC_F_LEN - \ - CONFIG_SPL_STACK_SIZE) - #endif /* __CONFIG_H */ diff --git a/include/configs/mt7620.h b/include/configs/mt7620.h index eae4d391e9d..9ecc55cbf4d 100644 --- a/include/configs/mt7620.h +++ b/include/configs/mt7620.h @@ -20,7 +20,6 @@ #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SPL_BSS_START_ADDR 0x80010000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x10000 /* Dummy value */ #define CONFIG_SYS_UBOOT_BASE 0 diff --git a/include/configs/mt7628.h b/include/configs/mt7628.h index c53b987ed19..cc02cf00854 100644 --- a/include/configs/mt7628.h +++ b/include/configs/mt7628.h @@ -32,7 +32,6 @@ #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SPL_BSS_START_ADDR 0x80010000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x10000 /* Dummy value */ #define CONFIG_SYS_UBOOT_BASE 0 diff --git a/include/configs/mt7629.h b/include/configs/mt7629.h index e3ec2b90c09..0462bceb312 100644 --- a/include/configs/mt7629.h +++ b/include/configs/mt7629.h @@ -21,7 +21,6 @@ /* Defines for SPL */ #define CONFIG_SPL_STACK 0x106000 -#define CONFIG_SPL_MAX_FOOTPRINT SZ_64K #define CONFIG_SPI_ADDR 0x30000000 #define CONFIG_SYS_UBOOT_BASE (CONFIG_SPI_ADDR + CONFIG_SPL_PAD_TO) diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 60f4302d82f..05ece09fbe0 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -29,7 +29,6 @@ #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/ #define CONFIG_SPL_BSS_START_ADDR DAVINCI_DDR_EMIF_DATA_BASE -#define CONFIG_SPL_BSS_MAX_SIZE 0x1080000 /* memtest start addr */ @@ -176,7 +175,6 @@ CONFIG_SYS_MALLOC_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN #define CONFIG_SPL_STACK 0x8001ff00 -#define CONFIG_SPL_MAX_FOOTPRINT 32768 /* additions for new relocation code, must added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0xc0000000 diff --git a/include/configs/openpiton-riscv64.h b/include/configs/openpiton-riscv64.h index 4901a00cdf6..e82766c5ef1 100644 --- a/include/configs/openpiton-riscv64.h +++ b/include/configs/openpiton-riscv64.h @@ -20,7 +20,6 @@ #ifdef CONFIG_SPL #define CONFIG_SPL_BSS_START_ADDR 0x82000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x0100000 diff --git a/include/configs/origen.h b/include/configs/origen.h index c4f5997c3de..9ec8b638289 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -48,8 +48,6 @@ #define RESERVE_BLOCK_SIZE (512) #define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ -#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024) - #define CONFIG_SYS_INIT_SP_ADDR 0x02040000 #endif /* __CONFIG_H */ diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h index 4876a4b8a3e..a3027695c0e 100644 --- a/include/configs/phycore_imx8mm.h +++ b/include/configs/phycore_imx8mm.h @@ -19,7 +19,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_STACK 0x920000 #define CONFIG_SPL_BSS_START_ADDR 0x910000 -#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h index 9c870edfa5e..7f5db9079ae 100644 --- a/include/configs/phycore_imx8mp.h +++ b/include/configs/phycore_imx8mp.h @@ -19,7 +19,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_STACK 0x960000 #define CONFIG_SPL_BSS_START_ADDR 0x98FC00 -#define CONFIG_SPL_BSS_MAX_SIZE SZ_1K #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index c412ada5c82..49fb57a6edf 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -15,7 +15,6 @@ /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ #define CONFIG_SPL_STACK 0x187FF0 #define CONFIG_SPL_BSS_START_ADDR 0x00180000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */ #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index 6c9a68eec93..fa2ab562f33 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -53,7 +53,6 @@ #ifdef CONFIG_SD_BOOT #define CONFIG_SPL_BSS_START_ADDR 0x70000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 #define CONFIG_SYS_SPL_MALLOC_START 0x70080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h index 9b967b8d90f..9541a7f19e2 100644 --- a/include/configs/px30_common.h +++ b/include/configs/px30_common.h @@ -16,7 +16,6 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x00400000 #define CONFIG_SPL_STACK 0x00400000 #define CONFIG_SPL_BSS_START_ADDR 0x4000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x4000 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ #define GICD_BASE 0xff131000 diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h index f26dcfc21c1..69d92e643a5 100644 --- a/include/configs/qemu-riscv.h +++ b/include/configs/qemu-riscv.h @@ -11,7 +11,6 @@ #ifdef CONFIG_SPL #define CONFIG_SPL_BSS_START_ADDR 0x84000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 #define CONFIG_SYS_SPL_MALLOC_START 0x84100000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index 9aaefb8cd1b..645b0e91b1d 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -47,10 +47,8 @@ /* SPL support */ #if defined(CONFIG_R8A7795) || defined(CONFIG_R8A7796) || defined(CONFIG_R8A77965) #define CONFIG_SPL_BSS_START_ADDR 0xe633f000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 #else #define CONFIG_SPL_BSS_START_ADDR 0xe631f000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 #endif #define CONFIG_SPL_STACK 0xe6304000 diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h index 65a5d1da1f3..24d60867817 100644 --- a/include/configs/rk3308_common.h +++ b/include/configs/rk3308_common.h @@ -9,7 +9,6 @@ #include "rockchip-common.h" #define CONFIG_SPL_BSS_START_ADDR 0x00400000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 #define CONFIG_SYS_NS16550_MEM32 diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 5ba34e8cd72..29f1aa71337 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -13,7 +13,6 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x00300000 #define CONFIG_SPL_STACK 0x00400000 #define CONFIG_SPL_BSS_START_ADDR 0x2000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index 0561c2c1835..ff3f025bd10 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -19,7 +19,6 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x00300000 #define CONFIG_SPL_BSS_START_ADDR 0x400000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x20000 #define CONFIG_SPL_STACK 0x00188000 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 32529cede10..f09ffd9fde8 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -15,12 +15,10 @@ #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT) #define CONFIG_SPL_STACK 0x00400000 #define CONFIG_SPL_BSS_START_ADDR 0x00400000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 #else #define CONFIG_SPL_STACK 0xff8effff /* BSS setup */ #define CONFIG_SPL_BSS_START_ADDR 0xff8e0000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x10000 #endif #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h index 245e3039fd5..02efb258d34 100644 --- a/include/configs/rk3568_common.h +++ b/include/configs/rk3568_common.h @@ -14,7 +14,6 @@ #define CONFIG_SPL_STACK 0x00400000 #define CONFIG_SPL_BSS_START_ADDR 0x4000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x4000 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ diff --git a/include/configs/sama5d27_som1_ek.h b/include/configs/sama5d27_som1_ek.h index 33435d2050c..eb29f211ef0 100644 --- a/include/configs/sama5d27_som1_ek.h +++ b/include/configs/sama5d27_som1_ek.h @@ -23,7 +23,6 @@ /* SPL */ #define CONFIG_SPL_BSS_START_ADDR 0x20000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/sama5d27_wlsom1_ek.h b/include/configs/sama5d27_wlsom1_ek.h index e7a792ffe2c..54ef48ce3ed 100644 --- a/include/configs/sama5d27_wlsom1_ek.h +++ b/include/configs/sama5d27_wlsom1_ek.h @@ -28,7 +28,6 @@ /* SPL */ #define CONFIG_SPL_BSS_START_ADDR 0x20000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/sama5d2_icp.h b/include/configs/sama5d2_icp.h index 5b7db47dc17..bd24d5743d4 100644 --- a/include/configs/sama5d2_icp.h +++ b/include/configs/sama5d2_icp.h @@ -35,7 +35,6 @@ /* SPL */ #define CONFIG_SPL_BSS_START_ADDR 0x20000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h index 1b02fc14921..c4774db89e7 100644 --- a/include/configs/sama5d2_xplained.h +++ b/include/configs/sama5d2_xplained.h @@ -20,7 +20,6 @@ /* SPL */ #define CONFIG_SPL_BSS_START_ADDR 0x20000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index 6d25bd6012b..d59b8b138aa 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -57,7 +57,6 @@ /* SPL */ #define CONFIG_SPL_BSS_START_ADDR 0x20000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index 9fca0033307..dabbe73e646 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -69,7 +69,6 @@ /* SPL */ #define CONFIG_SPL_BSS_START_ADDR 0x20000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h index 5bc8744c154..74213203454 100644 --- a/include/configs/sama5d4_xplained.h +++ b/include/configs/sama5d4_xplained.h @@ -34,7 +34,6 @@ /* SPL */ #define CONFIG_SPL_BSS_START_ADDR 0x20000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h index 08f042d6a26..b34d6c72641 100644 --- a/include/configs/sama5d4ek.h +++ b/include/configs/sama5d4ek.h @@ -34,7 +34,6 @@ /* SPL */ #define CONFIG_SPL_BSS_START_ADDR 0x20000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 94596a8e4f4..cc7330b8877 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -55,7 +55,6 @@ /* Defines for SPL */ #define CONFIG_SPL_BSS_START_ADDR 0x80000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 10, 11, 12, 13, 14, 15, 16, 17, \ diff --git a/include/configs/sifive-unleashed.h b/include/configs/sifive-unleashed.h index c2672334759..04ac4d43e79 100644 --- a/include/configs/sifive-unleashed.h +++ b/include/configs/sifive-unleashed.h @@ -14,7 +14,6 @@ #ifdef CONFIG_SPL #define CONFIG_SPL_BSS_START_ADDR 0x85000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h index a3dfc13bf61..a81b655e191 100644 --- a/include/configs/sifive-unmatched.h +++ b/include/configs/sifive-unmatched.h @@ -14,7 +14,6 @@ #ifdef CONFIG_SPL #define CONFIG_SPL_BSS_START_ADDR 0x85000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index ffd2b214d7e..64b55a251d7 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -119,7 +119,6 @@ /* Defines for SPL */ #define CONFIG_SPL_BSS_START_ADDR CONFIG_SYS_SDRAM_BASE -#define CONFIG_SPL_BSS_MAX_SIZE (SZ_16K) #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index 9ff05fcca78..baa2d064fd6 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -44,8 +44,6 @@ #define RESERVE_BLOCK_SIZE (512) #define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ -#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024) - #define CONFIG_SYS_INIT_SP_ADDR 0x02040000 /* Ethernet Controllor Driver */ diff --git a/include/configs/sniper.h b/include/configs/sniper.h index 631eefd3979..9de446fdaf7 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -51,7 +51,6 @@ */ #define CONFIG_SPL_BSS_START_ADDR 0x80000000 -#define CONFIG_SPL_BSS_MAX_SIZE (512 * 1024) #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 #define CONFIG_SYS_SPL_MALLOC_SIZE (1024 * 1024) #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index ebbd9fc492e..c399ba36c08 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -154,7 +154,6 @@ unsigned int cm_get_l4_sys_free_clk_hz(void); */ #define CONFIG_SPL_TARGET "spl/u-boot-spl-dtb.hex" #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR -#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ #define CONFIG_SPL_BSS_START_ADDR (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE \ - CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE (CONFIG_SYS_MALLOC_LEN) diff --git a/include/configs/stm32mp15_common.h b/include/configs/stm32mp15_common.h index 60947d69b53..993c0d5abbe 100644 --- a/include/configs/stm32mp15_common.h +++ b/include/configs/stm32mp15_common.h @@ -37,7 +37,6 @@ /* Restrict SPL to fit within SYSRAM */ #define STM32_SYSRAM_END (STM32_SYSRAM_BASE + STM32_SYSRAM_SIZE) -#define CONFIG_SPL_MAX_FOOTPRINT (STM32_SYSRAM_END - CONFIG_SPL_TEXT_BASE) #define CONFIG_SPL_STACK (STM32_SYSRAM_BASE + \ STM32_SYSRAM_SIZE) #endif /* #ifdef CONFIG_SPL */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index c92427a4cc9..37020871143 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -61,8 +61,6 @@ #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 #endif -#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */ - /* * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is * slightly bigger. Note that it is possible to map the first 32 KiB of the diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 4e5f373cf9e..c03631aac40 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -148,7 +148,6 @@ #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN #define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE -#define CONFIG_SPL_BSS_MAX_SIZE (3 * SZ_512) #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index eb0359b4db1..cc7e5c78664 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -61,8 +61,6 @@ #ifndef CONFIG_ARM64 /* Defines for SPL */ -#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \ - CONFIG_SPL_TEXT_BASE) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 #endif diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h index 3add6fa5570..dbc358d9d8d 100644 --- a/include/configs/theadorable.h +++ b/include/configs/theadorable.h @@ -75,7 +75,6 @@ /* Defines for SPL */ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) -#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MALLOC_SIMPLE diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index a513d662e6a..41534509b08 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -89,7 +89,6 @@ /* Defines for SPL */ #define CONFIG_SPL_BSS_START_ADDR 0x80000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index 782b53f8c0c..3ae8ab90ff9 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -120,7 +120,6 @@ */ #ifndef CONFIG_SPL_BSS_START_ADDR #define CONFIG_SPL_BSS_START_ADDR 0x80a00000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ #endif #ifndef CONFIG_SYS_SPL_MALLOC_START #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 564af6dc2dc..1302377478a 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -29,7 +29,6 @@ /* SPL SPI Loader Configuration */ #define CONFIG_SPL_BSS_START_ADDR (CONFIG_ISW_ENTRY_ADDR + \ CONFIG_SPL_MAX_SIZE) -#define CONFIG_SPL_BSS_MAX_SIZE (32 * 1024) #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE (32 * 1024) @@ -40,7 +39,7 @@ KEYSTONE_SPL_STACK_SIZE - 4) /* SRAM scratch space entries */ -#define SRAM_SCRATCH_SPACE_ADDR CONFIG_SPL_STACK + 0x8 +#define SRAM_SCRATCH_SPACE_ADDR 0xc0c23fc #define TI_SRAM_SCRATCH_BOARD_EEPROM_START (SRAM_SCRATCH_SPACE_ADDR) #define TI_SRAM_SCRATCH_BOARD_EEPROM_END (SRAM_SCRATCH_SPACE_ADDR + 0x200) diff --git a/include/configs/topic_miami.h b/include/configs/topic_miami.h index f8c782123ac..83abaeddf12 100644 --- a/include/configs/topic_miami.h +++ b/include/configs/topic_miami.h @@ -16,10 +16,6 @@ /* Fixup settings */ -/* SPL settings */ -#undef CONFIG_SPL_MAX_FOOTPRINT -#define CONFIG_SPL_MAX_FOOTPRINT CONFIG_SYS_SPI_U_BOOT_OFFS - /* Setup proper boot sequences for Miami boards */ #if defined(CONFIG_USB_HOST) diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h index b293ed41f54..fbdd2a4f08d 100644 --- a/include/configs/turris_omnia.h +++ b/include/configs/turris_omnia.h @@ -30,7 +30,6 @@ #define CONFIG_SPL_SIZE (140 << 10) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) -#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 99c8a0a7ac2..c86acc9a42a 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -182,7 +182,5 @@ #define CONFIG_SYS_UBOOT_BASE (0x130000 - 0x40) #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_MAX_FOOTPRINT 0x10000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 #endif /* __CONFIG_UNIPHIER_H__ */ diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index e5989346629..f97e39dd206 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -18,7 +18,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_STACK 0x920000 #define CONFIG_SPL_BSS_START_ADDR 0x910000 -#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */ #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index f0765f4f820..47956751050 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -17,7 +17,6 @@ /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ #define CONFIG_SPL_STACK 0x960000 #define CONFIG_SPL_BSS_START_ADDR 0x0098fc00 -#define CONFIG_SPL_BSS_MAX_SIZE SZ_1K #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h index 45528503b01..5a215f14fdb 100644 --- a/include/configs/vocore2.h +++ b/include/configs/vocore2.h @@ -18,7 +18,6 @@ #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SPL_BSS_START_ADDR 0x80010000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x10000 /* Dummy value */ #define CONFIG_SYS_UBOOT_BASE 0 diff --git a/include/configs/x530.h b/include/configs/x530.h index d23b7b4d924..6218291c56f 100644 --- a/include/configs/x530.h +++ b/include/configs/x530.h @@ -70,7 +70,6 @@ #define CONFIG_SPL_SIZE (140 << 10) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) -#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MALLOC_SIMPLE diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index ce7c4d2bdea..8396cdbedec 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -205,7 +205,6 @@ /* Just random location in OCM */ #define CONFIG_SPL_BSS_START_ADDR 0x0 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #if defined(CONFIG_SPL_SPI_FLASH_SUPPORT) # define CONFIG_SYS_SPI_KERNEL_OFFS 0x80000 diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index d904dbd8d46..3c484af7182 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -244,6 +244,5 @@ /* BSS setup */ #define CONFIG_SPL_BSS_START_ADDR 0x100000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 #endif /* __CONFIG_ZYNQ_COMMON_H */ diff --git a/include/configs/zynq_cse.h b/include/configs/zynq_cse.h index 79c77c9603b..ff9d6d15dc4 100644 --- a/include/configs/zynq_cse.h +++ b/include/configs/zynq_cse.h @@ -19,8 +19,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFDE000 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 #undef CONFIG_SPL_BSS_START_ADDR -#undef CONFIG_SPL_BSS_MAX_SIZE #define CONFIG_SPL_BSS_START_ADDR 0x20000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x8000 #endif /* __CONFIG_ZYNQ_CSE_H */ -- GitLab From 66bda092cf2af51f2731991fe7d2d14de8aa32fa Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 20 May 2022 12:36:05 -0400 Subject: [PATCH 019/581] Convert CONFIG_SPL_SYS_MALLOC_SIMPLE to Kconfig This converts the following to Kconfig: CONFIG_SPL_SYS_MALLOC_SIMPLE The problem here is that a few platforms have been doing: #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MALLOC_SIMPLE #endif instead of defining CONFIG_SPL_SYS_MALLOC_SIMPLE directly. Correct this and update the documentation in a few places to match usage. Signed-off-by: Tom Rini --- configs/clearfog_defconfig | 1 + configs/db-88f6720_defconfig | 1 + configs/db-88f6820-amc_defconfig | 1 + configs/db-88f6820-gp_defconfig | 1 + configs/db-mv784mp-gp_defconfig | 1 + configs/ds414_defconfig | 1 + configs/helios4_defconfig | 1 + configs/maxbcm_defconfig | 1 + configs/theadorable_debug_defconfig | 1 + configs/x530_defconfig | 1 + doc/develop/driver-model/design.rst | 2 +- drivers/core/Kconfig | 6 +++--- include/configs/clearfog.h | 4 ---- include/configs/controlcenterdc.h | 4 ---- include/configs/db-88f6720.h | 4 ---- include/configs/db-88f6820-amc.h | 4 ---- include/configs/db-88f6820-gp.h | 4 ---- include/configs/db-mv784mp-gp.h | 4 ---- include/configs/ds414.h | 4 ---- include/configs/helios4.h | 4 ---- include/configs/maxbcm.h | 4 ---- include/configs/theadorable.h | 4 ---- include/configs/x530.h | 4 ---- 23 files changed, 14 insertions(+), 48 deletions(-) diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig index 81588c897ee..cbdf8f61b17 100644 --- a/configs/clearfog_defconfig +++ b/configs/clearfog_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x22fd0 CONFIG_SPL_BSS_MAX_SIZE=0x4000 +CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_TLV_EEPROM=y diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig index 8d48428c225..5970e750a83 100644 --- a/configs/db-88f6720_defconfig +++ b/configs/db-88f6720_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x1ffd0 CONFIG_SPL_BSS_MAX_SIZE=0x4000 +CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_I2C=y diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig index 248be49b029..79ed57ce6ea 100644 --- a/configs/db-88f6820-amc_defconfig +++ b/configs/db-88f6820-amc_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x22fd0 CONFIG_SPL_BSS_MAX_SIZE=0x4000 +CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=96 # CONFIG_CMD_FLASH is not set diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig index 6b7fb83348c..dfb6d216356 100644 --- a/configs/db-88f6820-gp_defconfig +++ b/configs/db-88f6820-gp_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x22fd0 CONFIG_SPL_BSS_MAX_SIZE=0x4000 +CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_I2C=y diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig index 57bed92d4be..8aafb00c9a1 100644 --- a/configs/db-mv784mp-gp_defconfig +++ b/configs/db-mv784mp-gp_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x1bfd0 CONFIG_SPL_BSS_MAX_SIZE=0x4000 +CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig index 64cecace0b6..6e4b95eb90e 100644 --- a/configs/ds414_defconfig +++ b/configs/ds414_defconfig @@ -33,6 +33,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1bfd0 CONFIG_SPL_BSS_MAX_SIZE=0x4000 +CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig index 0b7cd74723f..626469eb524 100644 --- a/configs/helios4_defconfig +++ b/configs/helios4_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x22fd0 CONFIG_SPL_BSS_MAX_SIZE=0x4000 +CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_TLV_EEPROM=y diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig index 50cf48d2e68..8856d34167e 100644 --- a/configs/maxbcm_defconfig +++ b/configs/maxbcm_defconfig @@ -24,6 +24,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x1bfd0 CONFIG_SPL_BSS_MAX_SIZE=0x4000 +CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_I2C=y diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index 3834c2b0908..7e9d89442ce 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -29,6 +29,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x1bfd0 CONFIG_SPL_BSS_MAX_SIZE=0x4000 +CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_I2C=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/x530_defconfig b/configs/x530_defconfig index be05d8e433f..61f61e4a165 100644 --- a/configs/x530_defconfig +++ b/configs/x530_defconfig @@ -29,6 +29,7 @@ CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x22fd0 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/doc/develop/driver-model/design.rst b/doc/develop/driver-model/design.rst index 5f33f9fbb32..a75d637ec33 100644 --- a/doc/develop/driver-model/design.rst +++ b/doc/develop/driver-model/design.rst @@ -1135,7 +1135,7 @@ constrained systems. To enable driver model in SPL, define CONFIG_SPL_DM. You might want to consider the following option also. See the main README for more details. - - CONFIG_SYS_MALLOC_SIMPLE + - CONFIG_SPL_SYS_MALLOC_SIMPLE - CONFIG_DM_WARN - CONFIG_DM_DEVICE_REMOVE - CONFIG_DM_STDIO diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig index 408a8d8e28b..27d6578772a 100644 --- a/drivers/core/Kconfig +++ b/drivers/core/Kconfig @@ -15,7 +15,7 @@ config SPL_DM Enable driver model in SPL. You will need to provide a suitable malloc() implementation. If you are not using the full malloc() enabled by CONFIG_SYS_SPL_MALLOC_START, - consider using CONFIG_SYS_MALLOC_SIMPLE. In that case you + consider using CONFIG_SPL_SYS_MALLOC_SIMPLE. In that case you must provide CONFIG_SPL_SYS_MALLOC_F_LEN to set the size. In most cases driver model will only allocate a few uclasses and devices in SPL, so 1KB should be enable. See @@ -28,7 +28,7 @@ config TPL_DM Enable driver model in TPL. You will need to provide a suitable malloc() implementation. If you are not using the full malloc() enabled by CONFIG_SYS_SPL_MALLOC_START, - consider using CONFIG_SYS_MALLOC_SIMPLE. In that case you + consider using CONFIG_TPL_SYS_MALLOC_SIMPLE. In that case you must provide CONFIG_SPL_SYS_MALLOC_F_LEN to set the size. In most cases driver model will only allocate a few uclasses and devices in SPL, so 1KB should be enough. See @@ -43,7 +43,7 @@ config VPL_DM Enable driver model in VPL. You will need to provide a suitable malloc() implementation. If you are not using the full malloc() enabled by CONFIG_SYS_SPL_MALLOC_START, - consider using CONFIG_SYS_MALLOC_SIMPLE. + consider using CONFIG_SPL_SYS_MALLOC_SIMPLE. config DM_WARN bool "Enable warnings in driver model" diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h index 22f37495299..b67a31981b0 100644 --- a/include/configs/clearfog.h +++ b/include/configs/clearfog.h @@ -47,10 +47,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MALLOC_SIMPLE -#endif - #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h index 9fafa8fe35f..08eb0dbbf95 100644 --- a/include/configs/controlcenterdc.h +++ b/include/configs/controlcenterdc.h @@ -39,10 +39,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MALLOC_SIMPLE -#endif - #define CONFIG_SPL_STACK (0x40000000 + ((212 - 16) << 10)) #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) diff --git a/include/configs/db-88f6720.h b/include/configs/db-88f6720.h index f8d50d25965..89786044c83 100644 --- a/include/configs/db-88f6720.h +++ b/include/configs/db-88f6720.h @@ -37,10 +37,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MALLOC_SIMPLE -#endif - #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h index 06161e46702..56fd872272d 100644 --- a/include/configs/db-88f6820-amc.h +++ b/include/configs/db-88f6820-amc.h @@ -44,10 +44,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MALLOC_SIMPLE -#endif - #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index 6294092f874..0c42ef415da 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -44,10 +44,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MALLOC_SIMPLE -#endif - #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index 14b307343ce..4e0563dd5da 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -56,10 +56,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MALLOC_SIMPLE -#endif - #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) diff --git a/include/configs/ds414.h b/include/configs/ds414.h index 94b4ebc3934..41f72eef4fc 100644 --- a/include/configs/ds414.h +++ b/include/configs/ds414.h @@ -48,10 +48,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MALLOC_SIMPLE -#endif - #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) diff --git a/include/configs/helios4.h b/include/configs/helios4.h index 3a748ea3b89..aed4d7e8f53 100644 --- a/include/configs/helios4.h +++ b/include/configs/helios4.h @@ -47,10 +47,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MALLOC_SIMPLE -#endif - #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index a57946fb0f8..0eaf08e18c9 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -51,10 +51,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MALLOC_SIMPLE -#endif - #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h index dbc358d9d8d..8e13b47eab9 100644 --- a/include/configs/theadorable.h +++ b/include/configs/theadorable.h @@ -76,10 +76,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MALLOC_SIMPLE -#endif - #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) diff --git a/include/configs/x530.h b/include/configs/x530.h index 6218291c56f..5065eb87a39 100644 --- a/include/configs/x530.h +++ b/include/configs/x530.h @@ -71,10 +71,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MALLOC_SIMPLE -#endif - #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) -- GitLab From 6074a536d502f638b19507536b41213c5c119e46 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 21 May 2022 11:26:27 -0400 Subject: [PATCH 020/581] ppc / layerscape: Clean up CONFIG_SYS_CCSR_DO_NOT_RELOCATE usage A number of PowerPC platforms define this, for SPL. To move this to Kconfig, it needs to be CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE, so use CONFIG_IS_ENABLED() to check for usage. A number of layerscape platforms bring this logic from PowerPC, but only need a small part of it, for the fman driver. Remove their unused portion at least. Signed-off-by: Tom Rini --- README | 4 ---- .../asm/arch-fsl-layerscape/immap_lsch2.h | 19 ------------------- .../include/asm/arch-ls102xa/immap_ls102xa.h | 18 ------------------ common/spl/Kconfig | 11 +++++++++++ configs/P1010RDB-PA_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PA_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PA_NAND_defconfig | 1 + configs/P1010RDB-PA_NOR_defconfig | 1 + configs/P1010RDB-PA_SDCARD_defconfig | 1 + configs/P1010RDB-PA_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PB_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_NAND_defconfig | 1 + configs/P1010RDB-PB_NOR_defconfig | 1 + configs/P1010RDB-PB_SDCARD_defconfig | 1 + configs/P1010RDB-PB_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_defconfig | 1 + configs/P1020RDB-PC_NAND_defconfig | 1 + configs/P1020RDB-PC_SDCARD_defconfig | 1 + configs/P1020RDB-PC_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_defconfig | 1 + configs/P1020RDB-PD_NAND_defconfig | 1 + configs/P1020RDB-PD_SDCARD_defconfig | 1 + configs/P1020RDB-PD_SPIFLASH_defconfig | 1 + configs/P1020RDB-PD_defconfig | 1 + configs/P2020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_36BIT_defconfig | 1 + configs/P2020RDB-PC_NAND_defconfig | 1 + configs/P2020RDB-PC_SDCARD_defconfig | 1 + configs/P2020RDB-PC_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_defconfig | 1 + configs/T1024RDB_NAND_defconfig | 1 + configs/T1024RDB_SDCARD_defconfig | 1 + configs/T1024RDB_SPIFLASH_defconfig | 1 + configs/T1042D4RDB_NAND_defconfig | 1 + configs/T1042D4RDB_SDCARD_defconfig | 1 + configs/T1042D4RDB_SPIFLASH_defconfig | 1 + configs/T2080QDS_NAND_defconfig | 1 + configs/T2080QDS_SDCARD_defconfig | 1 + configs/T2080QDS_SPIFLASH_defconfig | 1 + configs/T2080RDB_NAND_defconfig | 1 + configs/T2080RDB_SDCARD_defconfig | 1 + configs/T2080RDB_SPIFLASH_defconfig | 1 + configs/T2080RDB_revD_NAND_defconfig | 1 + configs/T2080RDB_revD_SDCARD_defconfig | 1 + configs/T2080RDB_revD_SPIFLASH_defconfig | 1 + configs/T4240RDB_SDCARD_defconfig | 1 + include/configs/P1010RDB.h | 5 ----- include/configs/T102xRDB.h | 3 --- include/configs/T104xRDB.h | 3 --- include/configs/T208xQDS.h | 3 --- include/configs/T208xRDB.h | 3 --- include/configs/T4240RDB.h | 3 --- include/configs/p1_p2_rdb_pc.h | 6 ------ include/mpc85xx.h | 4 ++-- 64 files changed, 65 insertions(+), 69 deletions(-) diff --git a/README b/README index efec01a8aae..9f1561b92ca 100644 --- a/README +++ b/README @@ -2117,10 +2117,6 @@ Low Level (hardware related) configuration options: used in assembly code, so it must not contain typecasts or integer size suffixes (e.g. "ULL"). -- CONFIG_SYS_CCSR_DO_NOT_RELOCATE: - If this macro is defined, then CONFIG_SYS_CCSRBAR_PHYS will be - forced to a value that ensures that CCSR is not relocated. - - CONFIG_SYS_IMMR: Physical address of the Internal Memory. DO NOT CHANGE unless you know exactly what you're doing! (11-4) [MPC8xx systems only] diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index 06adf669390..61db1738f33 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -142,25 +142,6 @@ #define TP_CLUSTER_INIT_MASK 0x0000003f /* initiator mask */ #define TP_INIT_PER_CLUSTER 4 -/* - * Define default values for some CCSR macros to make header files cleaner* - * - * To completely disable CCSR relocation in a board header file, define - * CONFIG_SYS_CCSR_DO_NOT_RELOCATE. This will force CONFIG_SYS_CCSRBAR_PHYS - * to a value that is the same as CONFIG_SYS_CCSRBAR. - */ - -#ifdef CONFIG_SYS_CCSRBAR_PHYS -#error "Do not define CONFIG_SYS_CCSRBAR_PHYS directly. Use \ -CONFIG_SYS_CCSRBAR_PHYS_LOW and/or CONFIG_SYS_CCSRBAR_PHYS_HIGH instead." -#endif - -#ifdef CONFIG_SYS_CCSR_DO_NOT_RELOCATE -#undef CONFIG_SYS_CCSRBAR_PHYS_HIGH -#undef CONFIG_SYS_CCSRBAR_PHYS_LOW -#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0 -#endif - #ifndef CONFIG_SYS_CCSRBAR #define CONFIG_SYS_CCSRBAR 0x01000000 #endif diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h index f2ba182346e..b0acf677984 100644 --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h @@ -42,24 +42,6 @@ #define DCFG_DCSR_PORCR1 0 -/* - * Define default values for some CCSR macros to make header files cleaner - * - * To completely disable CCSR relocation in a board header file, define - * CONFIG_SYS_CCSR_DO_NOT_RELOCATE. This will force CONFIG_SYS_CCSRBAR_PHYS - * to a value that is the same as CONFIG_SYS_CCSRBAR. - */ - -#ifdef CONFIG_SYS_CCSRBAR_PHYS -#error "Do not define CONFIG_SYS_CCSRBAR_PHYS directly." -#endif - -#ifdef CONFIG_SYS_CCSR_DO_NOT_RELOCATE -#undef CONFIG_SYS_CCSRBAR_PHYS_HIGH -#undef CONFIG_SYS_CCSRBAR_PHYS_LOW -#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0 -#endif - #ifndef CONFIG_SYS_CCSRBAR #define CONFIG_SYS_CCSRBAR CONFIG_SYS_IMMR #endif diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 48af2a3d483..3cee3c323e8 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -206,6 +206,17 @@ config SPL_FSL_PBL Create boot binary having SPL binary in PBI format concatenated with u-boot binary. +config SPL_SYS_CCSR_DO_NOT_RELOCATE + bool "Ensures that CCSR is not relocated" + depends on PPC + help + If this is defined, then CONFIG_SYS_CCSRBAR_PHYS will be forced to a + value that ensures that CCSR is not relocated. + +config TPL_SYS_CCSR_DO_NOT_RELOCATE + def_bool y + depends on SPL_SYS_CCSR_DO_NOT_RELOCATE + endmenu menu "PowerPC SPL specific options" diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index ed9ee113695..6b8c424c13b 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -30,6 +30,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MAX_SIZE=0x2000 CONFIG_SPL_NAND_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index 1a78db709c4..68cb2b14f1d 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_MAX_SIZE=0x18000 +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index 6845645d47b..235bb23593d 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -28,6 +28,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_MMC_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index 961d3eafffa..933572f855b 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -31,6 +31,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_SPI_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index ee416a581a3..6731429d532 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -29,6 +29,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MAX_SIZE=0x2000 CONFIG_SPL_NAND_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index d1d08fd818b..95bd7861bdb 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_MAX_SIZE=0x18000 +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 4298c6d80c1..87116c11fc0 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -27,6 +27,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_MMC_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index 766eb1d5dac..4d0b405bb7d 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -30,6 +30,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_SPI_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 10275a313b5..2e9f9ee0c22 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -31,6 +31,7 @@ CONFIG_ID_EEPROM=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MAX_SIZE=0x2000 CONFIG_SPL_NAND_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 693de45423e..26040927c89 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -22,6 +22,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x18000 +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 8c6ff1cd704..cf00a72f409 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -29,6 +29,7 @@ CONFIG_ID_EEPROM=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_MMC_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index 74ae1643342..996b60d8b31 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -32,6 +32,7 @@ CONFIG_ID_EEPROM=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_SPI_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index d103e9bc02c..42981c5a11d 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -30,6 +30,7 @@ CONFIG_ID_EEPROM=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MAX_SIZE=0x2000 CONFIG_SPL_NAND_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index 5d47b6c805e..3f9fa6b8181 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -21,6 +21,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x18000 +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index 83d4ee205f5..34f1a5f2b6f 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -28,6 +28,7 @@ CONFIG_ID_EEPROM=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_MMC_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 60513725bc5..e48b0d1807f 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -31,6 +31,7 @@ CONFIG_ID_EEPROM=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_SPI_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index d6de87f9af3..8ca01a0adc3 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -31,6 +31,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MAX_SIZE=0x1000 CONFIG_SPL_NAND_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 6b381204068..2dfb279d35b 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -30,6 +30,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_MMC_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index 1424742f3ca..21aaa204610 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -33,6 +33,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_SPI_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index 086fab47d29..0bf940b9c04 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -23,6 +23,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 832a1f3fda5..fe3ef2ea750 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -30,6 +30,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MAX_SIZE=0x1000 CONFIG_SPL_NAND_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index f3e57082e0a..77e791f9e32 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -29,6 +29,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_MMC_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 3f965697b26..47f42e847ba 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -32,6 +32,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_SPI_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 36472f75fd8..9ecae6c8b26 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -22,6 +22,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index a42baf4ffd2..f2608fc353e 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -30,6 +30,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MAX_SIZE=0x1000 CONFIG_SPL_NAND_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index 6443fb0bcce..db9c782ffef 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -29,6 +29,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_MMC_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index a59ec504a9d..236f07bd0e1 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -32,6 +32,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_SPI_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index 0a69b439340..1f40e8d2abf 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -22,6 +22,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index b337b2c5af6..72b7f7b7046 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -31,6 +31,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MAX_SIZE=0x1000 CONFIG_SPL_NAND_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index bb8ce4f3715..b9604a7d5ab 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -30,6 +30,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_MMC_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 7e9c54b0475..4740e884e2e 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -33,6 +33,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_SPI_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index d550be2e5da..945a031c07b 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -23,6 +23,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 37b8edf8e71..03e0d74cb9d 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -30,6 +30,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MAX_SIZE=0x1000 CONFIG_SPL_NAND_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index a10522873c0..80eb5f4bd90 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -29,6 +29,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_MMC_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 75316881fd8..85e5546e1ab 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -32,6 +32,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_SPI_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index 48451fdded9..8029c630c86 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -22,6 +22,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index f328cfde20d..ae8828d7e6d 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_MAX_SIZE=0x28000 CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index bdfc14e23ae..8ac0e4a5dac 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_MAX_SIZE=0x28000 CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index 5da72857215..ebe814f3813 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_MAX_SIZE=0x28000 CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index d5dadf0e675..e12bb9f1590 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_MAX_SIZE=0x28000 CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index 9ee4d2bc403..01a6e97afc4 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_MAX_SIZE=0x28000 CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index cde17d28795..ce334b12a99 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_MAX_SIZE=0x28000 CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 56e9817f8a9..67f84d2b809 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_MAX_SIZE=0x28000 CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index 640288e6d6a..5cfdb5659dc 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_MAX_SIZE=0x28000 CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index b3fdedb61bd..99889cf6df1 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -41,6 +41,7 @@ CONFIG_SPL_MAX_SIZE=0x28000 CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index e6249d70e86..0046bd38672 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_MAX_SIZE=0x28000 CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index 84bc23ba8c4..0d09be36c85 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_MAX_SIZE=0x28000 CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index 29be1322488..5cbfc55a5a5 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_MAX_SIZE=0x28000 CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index 5e799cf3fde..bc307fa59a3 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_MAX_SIZE=0x28000 CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index 5ab3becef4e..e0456dee077 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_MAX_SIZE=0x28000 CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index ae28d8da063..4bef18e0f92 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_MAX_SIZE=0x28000 CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index b6edf0f787e..f68d98c7eee 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_MAX_SIZE=0x28000 CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 3b7a4925129..734c33bd6a3 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -189,11 +189,6 @@ extern unsigned long get_sdram_size(void); #define CONFIG_SYS_CCSRBAR 0xffe00000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR -/* Don't relocate CCSRBAR while in NAND_SPL */ -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE -#endif - /* * Memory map * diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index c912062ce4e..fcc31a0401b 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -23,10 +23,7 @@ #ifdef CONFIG_RAMBOOT_PBL #define RESET_VECTOR_OFFSET 0x27FFC #define BOOT_PAGE_OFFSET 0x27000 -#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_COMMON_INIT_DDR -#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE -#endif #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 81b820ee6cb..9f7ba9bd804 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -15,10 +15,7 @@ #include #ifdef CONFIG_RAMBOOT_PBL -#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_COMMON_INIT_DDR -#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE -#endif #define RESET_VECTOR_OFFSET 0x27FFC #define BOOT_PAGE_OFFSET 0x27000 diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index a18f44caa38..10bbf6e76f2 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -31,10 +31,7 @@ #ifdef CONFIG_RAMBOOT_PBL #define RESET_VECTOR_OFFSET 0x27FFC #define BOOT_PAGE_OFFSET 0x27000 -#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_COMMON_INIT_DDR -#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE -#endif #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 96a8ad102bd..a186ae33048 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -26,10 +26,7 @@ #ifdef CONFIG_RAMBOOT_PBL #define RESET_VECTOR_OFFSET 0x27FFC #define BOOT_PAGE_OFFSET 0x27000 -#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_COMMON_INIT_DDR -#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE -#endif #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 6dd43340d65..c565e94023d 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -36,10 +36,7 @@ #endif #endif -#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_COMMON_INIT_DDR -#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE -#endif #endif #endif /* CONFIG_RAMBOOT_PBL */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 755775f5568..2f65afe38bb 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -139,12 +139,6 @@ #define CONFIG_SYS_CCSRBAR 0xffe00000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR -/* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k - SPL code*/ -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE -#endif - /* DDR Setup */ #define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_SYS_SPD_BUS_NUM 1 diff --git a/include/mpc85xx.h b/include/mpc85xx.h index 2c69a60de63..053b68a10a4 100644 --- a/include/mpc85xx.h +++ b/include/mpc85xx.h @@ -26,7 +26,7 @@ * Define default values for some CCSR macros to make header files cleaner* * * To completely disable CCSR relocation in a board header file, define - * CONFIG_SYS_CCSR_DO_NOT_RELOCATE. This will force CONFIG_SYS_CCSRBAR_PHYS + * CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE. This will force CONFIG_SYS_CCSRBAR_PHYS * to a value that is the same as CONFIG_SYS_CCSRBAR. */ @@ -35,7 +35,7 @@ CONFIG_SYS_CCSRBAR_PHYS_LOW and/or CONFIG_SYS_CCSRBAR_PHYS_HIGH instead." #endif -#ifdef CONFIG_SYS_CCSR_DO_NOT_RELOCATE +#if CONFIG_IS_ENABLED(SYS_CCSR_DO_NOT_RELOCATE) #undef CONFIG_SYS_CCSRBAR_PHYS_HIGH #undef CONFIG_SYS_CCSRBAR_PHYS_LOW #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0 -- GitLab From 90f0819a318b44d0c92611b7419d73781402476d Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 21 May 2022 14:44:28 -0400 Subject: [PATCH 021/581] Convert CONFIG_SPL_COMMON_INIT_DDR to Kconfig This converts the following to Kconfig: CONFIG_SPL_COMMON_INIT_DDR Signed-off-by: Tom Rini --- README | 4 ---- board/freescale/p1010rdb/tlb.c | 3 +-- board/freescale/p1_p2_rdb_pc/tlb.c | 3 +-- configs/P1010RDB-PA_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PA_36BIT_NOR_defconfig | 2 ++ configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PA_NAND_defconfig | 1 + configs/P1010RDB-PA_NOR_defconfig | 2 ++ configs/P1010RDB-PA_SDCARD_defconfig | 1 + configs/P1010RDB-PA_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PB_36BIT_NOR_defconfig | 2 ++ configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_NAND_defconfig | 1 + configs/P1010RDB-PB_NOR_defconfig | 2 ++ configs/P1010RDB-PB_SDCARD_defconfig | 1 + configs/P1010RDB-PB_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_defconfig | 2 ++ configs/P1020RDB-PC_NAND_defconfig | 1 + configs/P1020RDB-PC_SDCARD_defconfig | 1 + configs/P1020RDB-PC_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_defconfig | 2 ++ configs/P1020RDB-PD_NAND_defconfig | 1 + configs/P1020RDB-PD_SDCARD_defconfig | 1 + configs/P1020RDB-PD_SPIFLASH_defconfig | 1 + configs/P1020RDB-PD_defconfig | 2 ++ configs/P2020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_36BIT_defconfig | 2 ++ configs/P2020RDB-PC_NAND_defconfig | 1 + configs/P2020RDB-PC_SDCARD_defconfig | 1 + configs/P2020RDB-PC_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_defconfig | 2 ++ drivers/ddr/fsl/Kconfig | 14 ++++++++++++++ include/configs/P1010RDB.h | 7 ------- include/configs/T102xRDB.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240RDB.h | 2 -- include/configs/p1_p2_rdb_pc.h | 7 ------- 47 files changed, 61 insertions(+), 28 deletions(-) diff --git a/README b/README index 9f1561b92ca..d6ff909e9a4 100644 --- a/README +++ b/README @@ -1712,10 +1712,6 @@ The following options need to be configured: Support for a lightweight UBI (fastmap) scanner and loader - CONFIG_SPL_COMMON_INIT_DDR - Set for common ddr init with serial presence detect in - SPL binary. - CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT, CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE, CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS, diff --git a/board/freescale/p1010rdb/tlb.c b/board/freescale/p1010rdb/tlb.c index 04faefe994d..7992666e930 100644 --- a/board/freescale/p1010rdb/tlb.c +++ b/board/freescale/p1010rdb/tlb.c @@ -72,8 +72,7 @@ struct fsl_e_tlb_entry tlb_table[] = { MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 7, BOOKE_PAGESZ_1M, 1), -#if defined(CONFIG_SYS_RAMBOOT) || \ - (defined(CONFIG_SPL) && !defined(CONFIG_SPL_COMMON_INIT_DDR)) +#if defined(CONFIG_SYS_RAMBOOT) || !CONFIG_IS_ENABLED(COMMON_INIT_DDR) SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M, 0, 8, BOOKE_PAGESZ_1G, 1), diff --git a/board/freescale/p1_p2_rdb_pc/tlb.c b/board/freescale/p1_p2_rdb_pc/tlb.c index 5931ec650bd..6ded38ac683 100644 --- a/board/freescale/p1_p2_rdb_pc/tlb.c +++ b/board/freescale/p1_p2_rdb_pc/tlb.c @@ -77,8 +77,7 @@ struct fsl_e_tlb_entry tlb_table[] = { 0, 7, BOOKE_PAGESZ_1M, 1), #endif -#if defined(CONFIG_SYS_RAMBOOT) || \ - (defined(CONFIG_SPL) && !defined(CONFIG_SPL_COMMON_INIT_DDR)) +#if defined(CONFIG_SYS_RAMBOOT) || !CONFIG_IS_ENABLED(COMMON_INIT_DDR) /* **M** - 1G DDR for eSDHC/eSPI/NAND boot */ SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M, diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index 6b8c424c13b..f6426f0c171 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -68,6 +68,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index 68cb2b14f1d..7040c598a96 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -49,6 +49,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -89,3 +90,4 @@ CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y CONFIG_ADDR_MAP=y +CONFIG_COMMON_INIT_DDR=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index 235bb23593d..57ad4b4485a 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -60,6 +60,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index 933572f855b..ce5f1fd2762 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -63,6 +63,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index 6731429d532..fca971bcf43 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -67,6 +67,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index 95bd7861bdb..d1046698d35 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -48,6 +48,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -87,3 +88,4 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_COMMON_INIT_DDR=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 87116c11fc0..44d3512db22 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -59,6 +59,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index 4d0b405bb7d..5e6d0c23445 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -62,6 +62,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 2e9f9ee0c22..39391699499 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -69,6 +69,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 26040927c89..9692aaeaa70 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -50,6 +50,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -91,3 +92,4 @@ CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y CONFIG_ADDR_MAP=y +CONFIG_COMMON_INIT_DDR=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index cf00a72f409..4e5e92d9670 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -61,6 +61,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index 996b60d8b31..f67961d8315 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -64,6 +64,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 42981c5a11d..da189ce8569 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -68,6 +68,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index 3f9fa6b8181..ca2ce61a1d4 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -49,6 +49,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -89,3 +90,4 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_COMMON_INIT_DDR=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index 34f1a5f2b6f..b5d097add8f 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -60,6 +60,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index e48b0d1807f..62d8e77745c 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -63,6 +63,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 8ca01a0adc3..e9a7237a080 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -78,6 +78,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 2dfb279d35b..6c47be30b72 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -69,6 +69,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index 21aaa204610..3b2e7ce1118 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -72,6 +72,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index 0bf940b9c04..f3bbb604859 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -58,6 +58,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -101,3 +102,4 @@ CONFIG_USB=y CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y +CONFIG_COMMON_INIT_DDR=y diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index fe3ef2ea750..cf211c7f5d5 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -77,6 +77,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 77e791f9e32..55dc19d658a 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -68,6 +68,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 47f42e847ba..c4391ed5424 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -71,6 +71,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 9ecae6c8b26..7e20aa78875 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -57,6 +57,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -99,3 +100,4 @@ CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y +CONFIG_COMMON_INIT_DDR=y diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index f2608fc353e..c85ec6d2520 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -80,6 +80,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index db9c782ffef..a1bbb639257 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -71,6 +71,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index 236f07bd0e1..e859587ccd3 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -74,6 +74,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index 1f40e8d2abf..966b9de5c79 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -60,6 +60,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -103,3 +104,4 @@ CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y +CONFIG_COMMON_INIT_DDR=y diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index 72b7f7b7046..eefc72e4987 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -82,6 +82,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index b9604a7d5ab..5ac2f8c566d 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -73,6 +73,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 4740e884e2e..6150b84d11b 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -76,6 +76,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index 945a031c07b..fc22e624319 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -62,6 +62,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -106,3 +107,4 @@ CONFIG_USB=y CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y +CONFIG_COMMON_INIT_DDR=y diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 03e0d74cb9d..dc94e25375c 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -81,6 +81,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 80eb5f4bd90..4f33a697cda 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -72,6 +72,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 85e5546e1ab..e63cd161ddb 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -75,6 +75,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index 8029c630c86..dd316f540fb 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -61,6 +61,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -104,3 +105,4 @@ CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y +CONFIG_COMMON_INIT_DDR=y diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig index 5925fe9e287..fe69bef3d3a 100644 --- a/drivers/ddr/fsl/Kconfig +++ b/drivers/ddr/fsl/Kconfig @@ -263,6 +263,20 @@ config SYS_OR7_PRELIM depends on SYS_BR7_PRELIM_BOOL endmenu +if TARGET_P1010RDB_PA || TARGET_P1010RDB_PB || TARGET_P1020RDB_PC || \ + TARGET_P1020RDB_PD || TARGET_P2020RDB + +config COMMON_INIT_DDR + bool "Do not have a TLB entry to cover common DDR init with serial presence detect (SPD)" + +config SPL_COMMON_INIT_DDR + bool "Do not have a TLB entry to cover common DDR init with SPD in SPL" + +config TPL_COMMON_INIT_DDR + bool "Do not have a TLB entry to cover common DDR init with SPD in TPL" + +endif + config SYS_FSL_ERRATUM_A008378 bool diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 734c33bd6a3..ffd2cf943d2 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -22,9 +22,6 @@ #define CONFIG_SYS_MMC_U_BOOT_START (0x11000000) #define CONFIG_SYS_MMC_U_BOOT_OFFS (96 << 10) #define CONFIG_SYS_MPC85XX_NO_RESETVEC -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_COMMON_INIT_DDR -#endif #endif #ifdef CONFIG_SPIFLASH @@ -39,9 +36,6 @@ #define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (96 << 10) #define CONFIG_SYS_MPC85XX_NO_RESETVEC -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_COMMON_INIT_DDR -#endif #endif #endif @@ -57,7 +51,6 @@ #else #ifdef CONFIG_TPL_BUILD #define CONFIG_SPL_NAND_INIT -#define CONFIG_SPL_COMMON_INIT_DDR #define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_NAND_U_BOOT_SIZE (576 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000) diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index fcc31a0401b..5de7b7c2dbf 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -23,7 +23,6 @@ #ifdef CONFIG_RAMBOOT_PBL #define RESET_VECTOR_OFFSET 0x27FFC #define BOOT_PAGE_OFFSET 0x27000 -#define CONFIG_SPL_COMMON_INIT_DDR #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 9f7ba9bd804..a7530693e7d 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -15,7 +15,6 @@ #include #ifdef CONFIG_RAMBOOT_PBL -#define CONFIG_SPL_COMMON_INIT_DDR #define RESET_VECTOR_OFFSET 0x27FFC #define BOOT_PAGE_OFFSET 0x27000 diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 10bbf6e76f2..d6bb8d18f90 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -31,7 +31,6 @@ #ifdef CONFIG_RAMBOOT_PBL #define RESET_VECTOR_OFFSET 0x27FFC #define BOOT_PAGE_OFFSET 0x27000 -#define CONFIG_SPL_COMMON_INIT_DDR #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index a186ae33048..350ecf1d2be 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -26,7 +26,6 @@ #ifdef CONFIG_RAMBOOT_PBL #define RESET_VECTOR_OFFSET 0x27FFC #define BOOT_PAGE_OFFSET 0x27000 -#define CONFIG_SPL_COMMON_INIT_DDR #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index c565e94023d..9a3dd14abdb 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -36,8 +36,6 @@ #endif #endif -#define CONFIG_SPL_COMMON_INIT_DDR - #endif #endif /* CONFIG_RAMBOOT_PBL */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 2f65afe38bb..bb44372d6de 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -83,9 +83,6 @@ #define CONFIG_SYS_MMC_U_BOOT_START (0x11000000) #define CONFIG_SYS_MMC_U_BOOT_OFFS (128 << 10) #define CONFIG_SYS_MPC85XX_NO_RESETVEC -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_COMMON_INIT_DDR -#endif #elif defined(CONFIG_SPIFLASH) #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" @@ -94,13 +91,9 @@ #define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (128 << 10) #define CONFIG_SYS_MPC85XX_NO_RESETVEC -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_COMMON_INIT_DDR -#endif #elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD #define CONFIG_SPL_NAND_INIT -#define CONFIG_SPL_COMMON_INIT_DDR #define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_NAND_U_BOOT_SIZE (832 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000) -- GitLab From 1cb7d7781242b1fddf791f73d32221796f643bf5 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 25 May 2022 15:11:18 -0400 Subject: [PATCH 022/581] m68k: Remove dead code There are no mcf5227x platforms, remove the CPU code. Signed-off-by: Tom Rini --- arch/m68k/Kconfig | 6 - arch/m68k/cpu/mcf5227x/Makefile | 9 - arch/m68k/cpu/mcf5227x/cpu.c | 67 ---- arch/m68k/cpu/mcf5227x/cpu_init.c | 152 --------- arch/m68k/cpu/mcf5227x/dspi.c | 43 --- arch/m68k/cpu/mcf5227x/interrupts.c | 37 --- arch/m68k/cpu/mcf5227x/speed.c | 127 ------- arch/m68k/cpu/mcf5227x/start.S | 491 ---------------------------- 8 files changed, 932 deletions(-) delete mode 100644 arch/m68k/cpu/mcf5227x/Makefile delete mode 100644 arch/m68k/cpu/mcf5227x/cpu.c delete mode 100644 arch/m68k/cpu/mcf5227x/cpu_init.c delete mode 100644 arch/m68k/cpu/mcf5227x/dspi.c delete mode 100644 arch/m68k/cpu/mcf5227x/interrupts.c delete mode 100644 arch/m68k/cpu/mcf5227x/speed.c delete mode 100644 arch/m68k/cpu/mcf5227x/start.S diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig index 7f6e4310f1f..e609ae0c9cd 100644 --- a/arch/m68k/Kconfig +++ b/arch/m68k/Kconfig @@ -53,12 +53,6 @@ config MCF5441x select DM_SERIAL bool -config MCF5227x - select OF_CONTROL - select DM - select DM_SERIAL - bool - # processor type config M5208 bool diff --git a/arch/m68k/cpu/mcf5227x/Makefile b/arch/m68k/cpu/mcf5227x/Makefile deleted file mode 100644 index 6a38c4838e9..00000000000 --- a/arch/m68k/cpu/mcf5227x/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2000-2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. - -# ccflags-y += -DET_DEBUG - -extra-y = start.o -obj-y = cpu.o speed.o cpu_init.o interrupts.o dspi.o diff --git a/arch/m68k/cpu/mcf5227x/cpu.c b/arch/m68k/cpu/mcf5227x/cpu.c deleted file mode 100644 index a7adf64f0de..00000000000 --- a/arch/m68k/cpu/mcf5227x/cpu.c +++ /dev/null @@ -1,67 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * - * (C) Copyright 2000-2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc. - * TsiChung Liew (Tsi-Chung.Liew@freescale.com) - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -{ - rcm_t *rcm = (rcm_t *) (MMAP_RCM); - udelay(1000); - setbits_8(&rcm->rcr, RCM_RCR_SOFTRST); - - /* we don't return! */ - return 0; -}; - -#if defined(CONFIG_DISPLAY_CPUINFO) -int print_cpuinfo(void) -{ - ccm_t *ccm = (ccm_t *) MMAP_CCM; - u16 msk; - u16 id = 0; - u8 ver; - - puts("CPU: "); - msk = (in_be16(&ccm->cir) >> 6); - ver = (in_be16(&ccm->cir) & 0x003f); - switch (msk) { - case 0x6c: - id = 52277; - break; - } - - if (id) { - char buf1[32], buf2[32], buf3[32]; - - printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk, - ver); - printf(" CPU CLK %s MHz BUS CLK %s MHz FLB CLK %s MHz\n", - strmhz(buf1, gd->cpu_clk), - strmhz(buf2, gd->bus_clk), - strmhz(buf3, gd->arch.flb_clk)); - printf(" INP CLK %s MHz VCO CLK %s MHz\n", - strmhz(buf1, gd->arch.inp_clk), - strmhz(buf2, gd->arch.vco_clk)); - } - - return 0; -} -#endif /* CONFIG_DISPLAY_CPUINFO */ diff --git a/arch/m68k/cpu/mcf5227x/cpu_init.c b/arch/m68k/cpu/mcf5227x/cpu_init.c deleted file mode 100644 index 4ab13b4d8ea..00000000000 --- a/arch/m68k/cpu/mcf5227x/cpu_init.c +++ /dev/null @@ -1,152 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * - * (C) Copyright 2000-2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * (C) Copyright 2004-2007, 2012 Freescale Semiconductor, Inc. - * TsiChung Liew (Tsi-Chung.Liew@freescale.com) - */ - -#include -#include -#include -#include - -#include -#include -#include -#include - -void cfspi_port_conf(void) -{ - gpio_t *gpio = (gpio_t *)MMAP_GPIO; - - out_8(&gpio->par_dspi, - GPIO_PAR_DSPI_SIN_SIN | GPIO_PAR_DSPI_SOUT_SOUT | - GPIO_PAR_DSPI_SCK_SCK); -} - -/* - * Breath some life into the CPU... - * - * Set up the memory map, - * initialize a bunch of registers, - * initialize the UPM's - */ -void cpu_init_f(void) -{ - gpio_t *gpio = (gpio_t *) MMAP_GPIO; - fbcs_t *fbcs __maybe_unused = (fbcs_t *) MMAP_FBCS; - -#if !defined(CONFIG_CF_SBF) - scm1_t *scm1 = (scm1_t *) MMAP_SCM1; - pll_t *pll = (pll_t *)MMAP_PLL; - - /* Workaround, must place before fbcs */ - out_be32(&pll->psr, 0x12); - - out_be32(&scm1->mpr, 0x77777777); - out_be32(&scm1->pacra, 0); - out_be32(&scm1->pacrb, 0); - out_be32(&scm1->pacrc, 0); - out_be32(&scm1->pacrd, 0); - out_be32(&scm1->pacre, 0); - out_be32(&scm1->pacrf, 0); - out_be32(&scm1->pacrg, 0); - out_be32(&scm1->pacri, 0); - -#if (defined(CONFIG_SYS_CS0_BASE) && defined(CONFIG_SYS_CS0_MASK) \ - && defined(CONFIG_SYS_CS0_CTRL)) - out_be32(&fbcs->csar0, CONFIG_SYS_CS0_BASE); - out_be32(&fbcs->cscr0, CONFIG_SYS_CS0_CTRL); - out_be32(&fbcs->csmr0, CONFIG_SYS_CS0_MASK); -#endif -#endif /* CONFIG_CF_SBF */ - -#if (defined(CONFIG_SYS_CS1_BASE) && defined(CONFIG_SYS_CS1_MASK) \ - && defined(CONFIG_SYS_CS1_CTRL)) - out_be32(&fbcs->csar1, CONFIG_SYS_CS1_BASE); - out_be32(&fbcs->cscr1, CONFIG_SYS_CS1_CTRL); - out_be32(&fbcs->csmr1, CONFIG_SYS_CS1_MASK); -#endif - -#if (defined(CONFIG_SYS_CS2_BASE) && defined(CONFIG_SYS_CS2_MASK) \ - && defined(CONFIG_SYS_CS2_CTRL)) - out_be32(&fbcs->csar2, CONFIG_SYS_CS2_BASE); - out_be32(&fbcs->cscr2, CONFIG_SYS_CS2_CTRL); - out_be32(&fbcs->csmr2, CONFIG_SYS_CS2_MASK); -#endif - -#if (defined(CONFIG_SYS_CS3_BASE) && defined(CONFIG_SYS_CS3_MASK) \ - && defined(CONFIG_SYS_CS3_CTRL)) - out_be32(&fbcs->csar3, CONFIG_SYS_CS3_BASE); - out_be32(&fbcs->cscr3, CONFIG_SYS_CS3_CTRL); - out_be32(&fbcs->csmr3, CONFIG_SYS_CS3_MASK); -#endif - -#if (defined(CONFIG_SYS_CS4_BASE) && defined(CONFIG_SYS_CS4_MASK) \ - && defined(CONFIG_SYS_CS4_CTRL)) - out_be32(&fbcs->csar4, CONFIG_SYS_CS4_BASE); - out_be32(&fbcs->cscr4, CONFIG_SYS_CS4_CTRL); - out_be32(&fbcs->csmr4, CONFIG_SYS_CS4_MASK); -#endif - -#if (defined(CONFIG_SYS_CS5_BASE) && defined(CONFIG_SYS_CS5_MASK) \ - && defined(CONFIG_SYS_CS5_CTRL)) - out_be32(&fbcs->csar5, CONFIG_SYS_CS5_BASE); - out_be32(&fbcs->cscr5, CONFIG_SYS_CS5_CTRL); - out_be32(&fbcs->csmr5, CONFIG_SYS_CS5_MASK); -#endif - -#ifdef CONFIG_SYS_I2C_FSL - out_8(&gpio->par_i2c, GPIO_PAR_I2C_SCL_SCL | GPIO_PAR_I2C_SDA_SDA); -#endif - - icache_enable(); - - cfspi_port_conf(); -} - -/* - * initialize higher level parts of CPU like timers - */ -int cpu_init_r(void) -{ -#ifdef CONFIG_MCFRTC - rtc_t *rtc = (rtc_t *)(CONFIG_SYS_MCFRTC_BASE); - rtcex_t *rtcex = (rtcex_t *)&rtc->extended; - - out_be32(&rtcex->gocu, (CONFIG_SYS_RTC_OSCILLATOR >> 16) & 0xffff); - out_be32(&rtcex->gocl, CONFIG_SYS_RTC_OSCILLATOR & 0xffff); -#endif - - return (0); -} - -void uart_port_conf(int port) -{ - gpio_t *gpio = (gpio_t *) MMAP_GPIO; - - /* Setup Ports: */ - switch (port) { - case 0: - clrbits_be16(&gpio->par_uart, - ~(GPIO_PAR_UART_U0TXD_UNMASK & GPIO_PAR_UART_U0RXD_UNMASK)); - setbits_be16(&gpio->par_uart, - GPIO_PAR_UART_U0TXD_U0TXD | GPIO_PAR_UART_U0RXD_U0RXD); - break; - case 1: - clrbits_be16(&gpio->par_uart, - ~(GPIO_PAR_UART_U1TXD_UNMASK & GPIO_PAR_UART_U1RXD_UNMASK)); - setbits_be16(&gpio->par_uart, - GPIO_PAR_UART_U1TXD_U1TXD | GPIO_PAR_UART_U1RXD_U1RXD); - break; - case 2: - clrbits_8(&gpio->par_dspi, - ~(GPIO_PAR_DSPI_SIN_UNMASK & GPIO_PAR_DSPI_SOUT_UNMASK)); - out_8(&gpio->par_dspi, - GPIO_PAR_DSPI_SIN_U2RXD | GPIO_PAR_DSPI_SOUT_U2TXD); - break; - } -} diff --git a/arch/m68k/cpu/mcf5227x/dspi.c b/arch/m68k/cpu/mcf5227x/dspi.c deleted file mode 100644 index 8fc4da271e8..00000000000 --- a/arch/m68k/cpu/mcf5227x/dspi.c +++ /dev/null @@ -1,43 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2019 - * Angelo Dureghello - * - * CPU specific dspi routines - */ - -#include -#include -#include - -#ifdef CONFIG_CF_DSPI -void dspi_chip_select(int cs) -{ - struct gpio *gpio = (struct gpio *)MMAP_GPIO; - - switch (cs) { - case 0: - clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_UNMASK); - setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0); - break; - case 2: - clrbits_8(&gpio->par_timer, ~GPIO_PAR_TIMER_T2IN_UNMASK); - setbits_8(&gpio->par_timer, GPIO_PAR_TIMER_T2IN_DSPIPCS2); - break; - } -} - -void dspi_chip_unselect(int cs) -{ - struct gpio *gpio = (struct gpio *)MMAP_GPIO; - - switch (cs) { - case 0: - clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0); - break; - case 2: - clrbits_8(&gpio->par_timer, ~GPIO_PAR_TIMER_T2IN_UNMASK); - break; - } -} -#endif /* CONFIG_CF_DSPI */ diff --git a/arch/m68k/cpu/mcf5227x/interrupts.c b/arch/m68k/cpu/mcf5227x/interrupts.c deleted file mode 100644 index 5a6a88cd571..00000000000 --- a/arch/m68k/cpu/mcf5227x/interrupts.c +++ /dev/null @@ -1,37 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc. - * TsiChung Liew (Tsi-Chung.Liew@freescale.com) - */ - -/* CPU specific interrupt routine */ -#include -#include -#include -#include - -int interrupt_init(void) -{ - int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE); - - /* Make sure all interrupts are disabled */ - setbits_be32(&intp->imrh0, 0xffffffff); - setbits_be32(&intp->imrl0, 0xffffffff); - - enable_interrupts(); - return 0; -} - -#if defined(CONFIG_MCFTMR) -void dtimer_intr_setup(void) -{ - int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE); - - out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI); - clrbits_be32(&intp->imrh0, CONFIG_SYS_TMRINTR_MASK); -} -#endif diff --git a/arch/m68k/cpu/mcf5227x/speed.c b/arch/m68k/cpu/mcf5227x/speed.c deleted file mode 100644 index fa9d5cb7887..00000000000 --- a/arch/m68k/cpu/mcf5227x/speed.c +++ /dev/null @@ -1,127 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * - * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc. - * TsiChung Liew (Tsi-Chung.Liew@freescale.com) - */ - -#include -#include -#include -#include - -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -/* - * Low Power Divider specifications - */ -#define CLOCK_LPD_MIN (1 << 0) /* Divider (decoded) */ -#define CLOCK_LPD_MAX (1 << 15) /* Divider (decoded) */ - -#define CLOCK_PLL_FVCO_MAX 540000000 -#define CLOCK_PLL_FVCO_MIN 300000000 - -#define CLOCK_PLL_FSYS_MAX 266666666 -#define CLOCK_PLL_FSYS_MIN 100000000 -#define MHZ 1000000 - -void clock_enter_limp(int lpdiv) -{ - ccm_t *ccm = (ccm_t *)MMAP_CCM; - int i, j; - - /* Check bounds of divider */ - if (lpdiv < CLOCK_LPD_MIN) - lpdiv = CLOCK_LPD_MIN; - if (lpdiv > CLOCK_LPD_MAX) - lpdiv = CLOCK_LPD_MAX; - - /* Round divider down to nearest power of two */ - for (i = 0, j = lpdiv; j != 1; j >>= 1, i++) ; - - /* Apply the divider to the system clock */ - clrsetbits_be16(&ccm->cdr, 0x0f00, CCM_CDR_LPDIV(i)); - - /* Enable Limp Mode */ - setbits_be16(&ccm->misccr, CCM_MISCCR_LIMP); -} - -/* - * brief Exit Limp mode - * warning The PLL should be set and locked prior to exiting Limp mode - */ -void clock_exit_limp(void) -{ - ccm_t *ccm = (ccm_t *)MMAP_CCM; - pll_t *pll = (pll_t *)MMAP_PLL; - - /* Exit Limp mode */ - clrbits_be16(&ccm->misccr, CCM_MISCCR_LIMP); - - /* Wait for the PLL to lock */ - while (!(in_be32(&pll->psr) & PLL_PSR_LOCK)) - ; -} - -/* - * get_clocks() fills in gd->cpu_clock and gd->bus_clk - */ -int get_clocks(void) -{ - - ccm_t *ccm = (ccm_t *)MMAP_CCM; - pll_t *pll = (pll_t *)MMAP_PLL; - int vco, temp, pcrvalue, pfdr; - u8 bootmode; - - pcrvalue = in_be32(&pll->pcr) & 0xFF0F0FFF; - pfdr = pcrvalue >> 24; - - if (pfdr == 0x1E) - bootmode = 0; /* Normal Mode */ - -#ifdef CONFIG_CF_SBF - bootmode = 3; /* Serial Mode */ -#endif - - if (bootmode == 0) { - /* Normal mode */ - vco = ((in_be32(&pll->pcr) & 0xFF000000) >> 24) * CONFIG_SYS_INPUT_CLKSRC; - if ((vco < CLOCK_PLL_FVCO_MIN) || (vco > CLOCK_PLL_FVCO_MAX)) { - /* Default value */ - pcrvalue = (in_be32(&pll->pcr) & 0x00FFFFFF); - pcrvalue |= 0x1E << 24; - out_be32(&pll->pcr, pcrvalue); - vco = - ((in_be32(&pll->pcr) & 0xFF000000) >> 24) * - CONFIG_SYS_INPUT_CLKSRC; - } - gd->arch.vco_clk = vco; /* Vco clock */ - } else if (bootmode == 3) { - /* serial mode */ - vco = ((in_be32(&pll->pcr) & 0xFF000000) >> 24) * CONFIG_SYS_INPUT_CLKSRC; - gd->arch.vco_clk = vco; /* Vco clock */ - } - - if ((in_be16(&ccm->ccr) & CCM_MISCCR_LIMP) == CCM_MISCCR_LIMP) { - /* Limp mode */ - } else { - gd->arch.inp_clk = CONFIG_SYS_INPUT_CLKSRC; /* Input clock */ - - temp = (in_be32(&pll->pcr) & PLL_PCR_OUTDIV1_MASK) + 1; - gd->cpu_clk = vco / temp; /* cpu clock */ - - temp = ((in_be32(&pll->pcr) & PLL_PCR_OUTDIV2_MASK) >> 4) + 1; - gd->arch.flb_clk = vco / temp; /* flexbus clock */ - gd->bus_clk = gd->arch.flb_clk; - } - -#ifdef CONFIG_SYS_I2C_FSL - gd->arch.i2c1_clk = gd->bus_clk; -#endif - - return (0); -} diff --git a/arch/m68k/cpu/mcf5227x/start.S b/arch/m68k/cpu/mcf5227x/start.S deleted file mode 100644 index 632f1b1f38c..00000000000 --- a/arch/m68k/cpu/mcf5227x/start.S +++ /dev/null @@ -1,491 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2003 Josef Baumgartner - * Based on code from Bernhard Kuhn - */ - -#include -#include -#include - -#define _START _start -#define _FAULT _fault - -#define SAVE_ALL \ - move.w #0x2700,%sr; /* disable intrs */ \ - subl #60,%sp; /* space for 15 regs */ \ - moveml %d0-%d7/%a0-%a6,%sp@; - -#define RESTORE_ALL \ - moveml %sp@,%d0-%d7/%a0-%a6; \ - addl #60,%sp; /* space for 15 regs */ \ - rte; - -#if defined(CONFIG_CF_SBF) -#define ASM_DRAMINIT (asm_dram_init - CONFIG_SYS_TEXT_BASE + \ - CONFIG_SYS_INIT_RAM_ADDR) -#define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_SYS_TEXT_BASE + \ - CONFIG_SYS_INIT_RAM_ADDR) -#endif - -.text - -/* - * Vector table. This is used for initial platform startup. - * These vectors are to catch any un-intended traps. - */ -_vectors: -#if defined(CONFIG_CF_SBF) -INITSP: .long 0 /* Initial SP */ -INITPC: .long ASM_DRAMINIT /* Initial PC */ -#else -INITSP: .long 0 /* Initial SP */ -INITPC: .long _START /* Initial PC */ -#endif - -vector02_0F: -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT - -/* Reserved */ -vector10_17: -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT - -vector18_1F: -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT - -#if !defined(CONFIG_CF_SBF) -/* TRAP #0 - #15 */ -vector20_2F: -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT - -/* Reserved */ -vector30_3F: -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT - -vector64_127: -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT - -vector128_191: -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT - -vector192_255: -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -#endif - -#if defined(CONFIG_CF_SBF) - /* Image header: chksum 4 bytes, len 4 bytes, img dest 4 bytes */ -asm_sbf_img_hdr: - .long 0x00000000 /* checksum, not yet implemented */ - .long 0x00020000 /* image length */ - .long CONFIG_SYS_TEXT_BASE /* image to be relocated at */ - -asm_dram_init: - move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0 - movec %d0, %RAMBAR1 /* init Rambar */ - - move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp - clr.l %sp@- - - /* Must disable global address */ - move.l #0xFC008000, %a1 - move.l #(CONFIG_SYS_CS0_BASE), (%a1) - move.l #0xFC008008, %a1 - move.l #(CONFIG_SYS_CS0_CTRL), (%a1) - move.l #0xFC008004, %a1 - move.l #(CONFIG_SYS_CS0_MASK), (%a1) - - /* - * Dram Initialization - * a1, a2, and d0 - */ - move.l #0xFC0A4074, %a1 - move.b #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1) - nop - - /* SDRAM Chip 0 and 1 */ - move.l #0xFC0B8110, %a1 - move.l #0xFC0B8114, %a2 - - /* calculate the size */ - move.l #0x13, %d1 - move.l #(CONFIG_SYS_SDRAM_SIZE), %d2 -#ifdef CONFIG_SYS_SDRAM_BASE1 - lsr.l #1, %d2 -#endif - -dramsz_loop: - lsr.l #1, %d2 - add.l #1, %d1 - cmp.l #1, %d2 - bne dramsz_loop - - /* SDRAM Chip 0 and 1 */ - move.l #(CONFIG_SYS_SDRAM_BASE), (%a1) - or.l %d1, (%a1) -#ifdef CONFIG_SYS_SDRAM_BASE1 - move.l #(CONFIG_SYS_SDRAM_BASE1), (%a2) - or.l %d1, (%a2) -#endif - nop - - /* dram cfg1 and cfg2 */ - move.l #0xFC0B8008, %a1 - move.l #(CONFIG_SYS_SDRAM_CFG1), (%a1) - nop - move.l #0xFC0B800C, %a2 - move.l #(CONFIG_SYS_SDRAM_CFG2), (%a2) - nop - - move.l #0xFC0B8000, %a1 /* Mode */ - move.l #0xFC0B8004, %a2 /* Ctrl */ - - /* Issue PALL */ - move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2) - nop - - /* Issue LEMR */ - move.l #(CONFIG_SYS_SDRAM_MODE), (%a1) - nop - move.l #(CONFIG_SYS_SDRAM_EMOD), (%a1) - nop - - move.l #1000, %d0 -wait1000: - nop - subq.l #1, %d0 - bne wait1000 - - /* Issue PALL */ - move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2) - nop - - /* Perform two refresh cycles */ - move.l #(CONFIG_SYS_SDRAM_CTRL + 4), %d0 - nop - move.l %d0, (%a2) - move.l %d0, (%a2) - nop - - move.l #(CONFIG_SYS_SDRAM_CTRL), %d0 - and.l #0x7FFFFFFF, %d0 - or.l #0x10000c00, %d0 - move.l %d0, (%a2) - nop - - /* - * DSPI Initialization - * a0 - general, sram - 0x80008000 - 32, see M52277EVB.h - * a1 - dspi status - * a2 - dtfr - * a3 - drfr - * a4 - Dst addr - */ - - /* Enable pins for DSPI mode - chip-selects are enabled later */ - move.l #0xFC0A4036, %a0 - move.b #0x3F, %d0 - move.b %d0, (%a0) - - /* DSPI CS */ -#ifdef CONFIG_SYS_DSPI_CS0 - move.b (%a0), %d0 - or.l #0xC0, %d0 - move.b %d0, (%a0) -#endif -#ifdef CONFIG_SYS_DSPI_CS2 - move.l #0xFC0A4037, %a0 - move.b (%a0), %d0 - or.l #0x10, %d0 - move.b %d0, (%a0) -#endif - nop - - /* Configure DSPI module */ - move.l #0xFC05C000, %a0 - move.l #0x80FF0C00, (%a0) /* Master, clear TX/RX FIFO */ - - move.l #0xFC05C00C, %a0 - move.l #0x3E000011, (%a0) - - move.l #0xFC05C034, %a2 /* dtfr */ - move.l #0xFC05C03B, %a3 /* drfr */ - - move.l #(ASM_SBF_IMG_HDR + 4), %a1 - move.l (%a1)+, %d5 - move.l (%a1), %a4 - - move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_SBFHDR_DATA_OFFSET), %a0 - move.l #(CONFIG_SYS_SBFHDR_SIZE), %d4 - - move.l #0xFC05C02C, %a1 /* dspi status */ - - /* Issue commands and address */ - move.l #0x8004000B, %d2 /* Fast Read Cmd */ - jsr asm_dspi_wr_status - jsr asm_dspi_rd_status - - move.l #0x80040000, %d2 /* Address byte 2 */ - jsr asm_dspi_wr_status - jsr asm_dspi_rd_status - - move.l #0x80040000, %d2 /* Address byte 1 */ - jsr asm_dspi_wr_status - jsr asm_dspi_rd_status - - move.l #0x80040000, %d2 /* Address byte 0 */ - jsr asm_dspi_wr_status - jsr asm_dspi_rd_status - - move.l #0x80040000, %d2 /* Dummy Wr and Rd */ - jsr asm_dspi_wr_status - jsr asm_dspi_rd_status - - /* Transfer serial boot header to sram */ -asm_dspi_rd_loop1: - move.l #0x80040000, %d2 - jsr asm_dspi_wr_status - jsr asm_dspi_rd_status - - move.b %d1, (%a0) /* read, copy to dst */ - - add.l #1, %a0 /* inc dst by 1 */ - sub.l #1, %d4 /* dec cnt by 1 */ - bne asm_dspi_rd_loop1 - - /* Transfer u-boot from serial flash to memory */ -asm_dspi_rd_loop2: - move.l #0x80040000, %d2 - jsr asm_dspi_wr_status - jsr asm_dspi_rd_status - - move.b %d1, (%a4) /* read, copy to dst */ - - add.l #1, %a4 /* inc dst by 1 */ - sub.l #1, %d5 /* dec cnt by 1 */ - bne asm_dspi_rd_loop2 - - move.l #0x00040000, %d2 /* Terminate */ - jsr asm_dspi_wr_status - jsr asm_dspi_rd_status - - /* jump to memory and execute */ - move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0 - move.l %a0, (%a1) - jmp (%a0) - -asm_dspi_wr_status: - move.l (%a1), %d0 /* status */ - and.l #0x0000F000, %d0 - cmp.l #0x00003000, %d0 - bgt asm_dspi_wr_status - - move.l %d2, (%a2) - rts - -asm_dspi_rd_status: - move.l (%a1), %d0 /* status */ - and.l #0x000000F0, %d0 - lsr.l #4, %d0 - cmp.l #0, %d0 - beq asm_dspi_rd_status - - move.b (%a3), %d1 - rts -#endif /* CONFIG_CF_SBF */ - -.text - . = 0x400 -.globl _start -_start: - nop - nop - move.w #0x2700,%sr /* Mask off Interrupt */ - - /* Set vector base register at the beginning of the Flash */ -#if defined(CONFIG_CF_SBF) - move.l #CONFIG_SYS_TEXT_BASE, %d0 - movec %d0, %VBR -#else - move.l #CONFIG_SYS_FLASH_BASE, %d0 - movec %d0, %VBR - - move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0 - movec %d0, %RAMBAR1 -#endif - - /* invalidate and disable cache */ - move.l #CF_CACR_CINV, %d0 /* Invalidate cache cmd */ - movec %d0, %CACR /* Invalidate cache */ - move.l #0, %d0 - movec %d0, %ACR0 - movec %d0, %ACR1 - - /* initialize general use internal ram */ - move.l #0, %d0 - move.l #(ICACHE_STATUS), %a1 /* icache */ - move.l #(DCACHE_STATUS), %a2 /* icache */ - move.l %d0, (%a1) - move.l %d0, (%a2) - - /* put relocation table address to a5 */ - move.l #__got_start, %a5 - - /* setup stack initially on top of internal static ram */ - move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE), %sp - - /* - * if configured, malloc_f arena will be reserved first, - * then (and always) gd struct space will be reserved - */ - move.l %sp, -(%sp) - bsr board_init_f_alloc_reserve - - /* update stack and frame-pointers */ - move.l %d0, %sp - move.l %sp, %fp - - /* initialize reserved area */ - move.l %d0, -(%sp) - bsr board_init_f_init_reserve - - /* run low-level CPU init code (from flash) */ - bsr cpu_init_f - clr.l %sp@- - - /* run low-level board init code (from flash) */ - move.l #board_init_f, %a1 - jsr (%a1) - - /* board_init_f() does not return */ - -/******************************************************************************/ - -/* - * void relocate_code(addr_sp, gd, addr_moni) - * - * This "function" does not return, instead it continues in RAM - * after relocating the monitor code. - * - * r3 = dest - * r4 = src - * r5 = length in bytes - * r6 = cachelinesize - */ -.globl relocate_code -relocate_code: - link.w %a6,#0 - move.l 8(%a6), %sp /* set new stack pointer */ - - move.l 12(%a6), %d0 /* Save copy of Global Data pointer */ - move.l 16(%a6), %a0 /* Save copy of Destination Address */ - - move.l #CONFIG_SYS_MONITOR_BASE, %a1 - move.l #__init_end, %a2 - move.l %a0, %a3 - - /* copy the code to RAM */ -1: - move.l (%a1)+, (%a3)+ - cmp.l %a1,%a2 - bgt.s 1b - -/* - * We are done. Do not return, instead branch to second part of board - * initialization, now running from RAM. - */ - move.l %a0, %a1 - add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1 - jmp (%a1) - -in_ram: - -clear_bss: - /* - * Now clear BSS segment - */ - move.l %a0, %a1 - add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1 - move.l %a0, %d1 - add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1 -6: - clr.l (%a1)+ - cmp.l %a1,%d1 - bgt.s 6b - - /* - * fix got table in RAM - */ - move.l %a0, %a1 - add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1 - move.l %a1,%a5 /* fix got pointer register a5 */ - - move.l %a0, %a2 - add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2 - -7: - move.l (%a1),%d1 - sub.l #_start,%d1 - add.l %a0,%d1 - move.l %d1,(%a1)+ - cmp.l %a2, %a1 - bne 7b - - /* calculate relative jump to board_init_r in ram */ - move.l %a0, %a1 - add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1 - - /* set parameters for board_init_r */ - move.l %a0,-(%sp) /* dest_addr */ - move.l %d0,-(%sp) /* gd */ - jsr (%a1) - -/******************************************************************************/ - -/* exception code */ -.globl _fault -_fault: - bra _fault - -.globl _exc_handler -_exc_handler: - SAVE_ALL - movel %sp,%sp@- - bsr exc_handler - addql #4,%sp - RESTORE_ALL - -.globl _int_handler -_int_handler: - SAVE_ALL - movel %sp,%sp@- - bsr int_handler - addql #4,%sp - RESTORE_ALL - -/******************************************************************************/ - -.align 4 -- GitLab From 3135ba642f9a02a3a45d978d2425c1488d6efbbd Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 25 May 2022 16:13:48 -0400 Subject: [PATCH 023/581] arm: pxa: Remove CONFIG_CPU_PXA25X There are no platforms that set this, remove the code. Signed-off-by: Tom Rini --- arch/arm/cpu/pxa/Makefile | 1 - arch/arm/cpu/pxa/cpuinfo.c | 6 - arch/arm/cpu/pxa/start.S | 111 +- arch/arm/include/asm/arch-pxa/config.h | 2 - arch/arm/include/asm/config.h | 1 - drivers/mmc/pxa_mmc_gen.c | 7 +- drivers/net/smc91111.h | 152 +- drivers/serial/serial_pxa.c | 1 - drivers/usb/gadget/Makefile | 1 - drivers/usb/gadget/pxa25x_udc.c | 2049 ------------------------ drivers/usb/gadget/pxa25x_udc.h | 149 -- include/dm/platform_data/serial_pxa.h | 15 - include/lcd.h | 3 +- 13 files changed, 6 insertions(+), 2492 deletions(-) delete mode 100644 drivers/usb/gadget/pxa25x_udc.c delete mode 100644 drivers/usb/gadget/pxa25x_udc.h diff --git a/arch/arm/cpu/pxa/Makefile b/arch/arm/cpu/pxa/Makefile index 263d9ddb4a0..fab77325c79 100644 --- a/arch/arm/cpu/pxa/Makefile +++ b/arch/arm/cpu/pxa/Makefile @@ -5,7 +5,6 @@ extra-y = start.o -obj-$(CONFIG_CPU_PXA25X) += pxa2xx.o obj-$(CONFIG_CPU_PXA27X) += pxa2xx.o obj-y += cpuinfo.o diff --git a/arch/arm/cpu/pxa/cpuinfo.c b/arch/arm/cpu/pxa/cpuinfo.c index 0d9542f998e..549b61d6e0f 100644 --- a/arch/arm/cpu/pxa/cpuinfo.c +++ b/arch/arm/cpu/pxa/cpuinfo.c @@ -11,12 +11,6 @@ #include #include -#ifdef CONFIG_CPU_PXA25X -#if ((CONFIG_SYS_INIT_SP_ADDR) != 0xfffff800) -#error "Init SP address must be set to 0xfffff800 for PXA250" -#endif -#endif - #define CPU_MASK_PXA_PRODID 0x000003f0 #define CPU_MASK_PXA_REVID 0x0000000f diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S index 896e05f1fda..ab7bcb4e562 100644 --- a/arch/arm/cpu/pxa/start.S +++ b/arch/arm/cpu/pxa/start.S @@ -49,9 +49,6 @@ reset: bl cpu_init_crit #endif -#ifdef CONFIG_CPU_PXA25X - bl lock_cache_for_stack -#endif #ifdef CONFIG_CPU_PXA27X /* * enable clock for SRAM @@ -67,20 +64,7 @@ reset: .globl c_runtime_cpu_setup c_runtime_cpu_setup: - -#ifdef CONFIG_CPU_PXA25X - /* - * Unlock (actually, disable) the cache now that board_init_f - * is done. We could do this earlier but we would need to add - * a new C runtime hook, whereas c_runtime_cpu_setup already - * exists. - * As this routine is just a call to cpu_init_crit, let us - * tail-optimize and do a simple branch here. - */ - b cpu_init_crit -#else bx lr -#endif /* ************************************************************************* @@ -92,7 +76,7 @@ c_runtime_cpu_setup: * ************************************************************************* */ -#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) || defined(CONFIG_CPU_PXA25X) +#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) cpu_init_crit: /* * flush v4 I/D caches @@ -111,95 +95,4 @@ cpu_init_crit: mcr p15, 0, r0, c1, c0, 0 mov pc, lr /* back to my caller */ -#endif /* !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) || CONFIG_CPU_PXA25X */ - -/* - * Enable MMU to use DCache as DRAM. - * - * This is useful on PXA25x and PXA26x in early bootstages, where there is no - * other possible memory available to hold stack. - */ -#ifdef CONFIG_CPU_PXA25X -.macro CPWAIT reg - mrc p15, 0, \reg, c2, c0, 0 - mov \reg, \reg - sub pc, pc, #4 -.endm -lock_cache_for_stack: - /* Domain access -- enable for all CPs */ - ldr r0, =0x0000ffff - mcr p15, 0, r0, c3, c0, 0 - - /* Point TTBR to MMU table */ - ldr r0, =mmutable - mcr p15, 0, r0, c2, c0, 0 - - /* Kick in MMU, ICache, DCache, BTB */ - mrc p15, 0, r0, c1, c0, 0 - bic r0, #0x1b00 - bic r0, #0x0087 - orr r0, #0x1800 - orr r0, #0x0005 - mcr p15, 0, r0, c1, c0, 0 - CPWAIT r0 - - /* Unlock Icache, Dcache */ - mcr p15, 0, r0, c9, c1, 1 - mcr p15, 0, r0, c9, c2, 1 - - /* Flush Icache, Dcache, BTB */ - mcr p15, 0, r0, c7, c7, 0 - - /* Unlock I-TLB, D-TLB */ - mcr p15, 0, r0, c10, c4, 1 - mcr p15, 0, r0, c10, c8, 1 - - /* Flush TLB */ - mcr p15, 0, r0, c8, c7, 0 - - /* Allocate 4096 bytes of Dcache as RAM */ - - /* Drain pending loads and stores */ - mcr p15, 0, r0, c7, c10, 4 - - mov r4, #0x00 - mov r5, #0x00 - mov r2, #0x01 - mcr p15, 0, r0, c9, c2, 0 - CPWAIT r0 - - /* 128 lines reserved (128 x 32bytes = 4096 bytes total) */ - mov r0, #128 - ldr r1, =0xfffff000 - -alloc: - mcr p15, 0, r1, c7, c2, 5 - /* Drain pending loads and stores */ - mcr p15, 0, r0, c7, c10, 4 - strd r4, [r1], #8 - strd r4, [r1], #8 - strd r4, [r1], #8 - strd r4, [r1], #8 - subs r0, #0x01 - bne alloc - /* Drain pending loads and stores */ - mcr p15, 0, r0, c7, c10, 4 - mov r2, #0x00 - mcr p15, 0, r2, c9, c2, 0 - CPWAIT r0 - - mov pc, lr - -.section .mmutable, "a" -mmutable: - .align 14 - /* 0x00000000 - 0xffe00000 : 1:1, uncached mapping */ - .set __base, 0 - .rept 0xfff - .word (__base << 20) | 0xc12 - .set __base, __base + 1 - .endr - - /* 0xfff00000 : 1:1, cached mapping */ - .word (0xfff << 20) | 0x1c1e -#endif /* CONFIG_CPU_PXA25X */ +#endif /* !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) */ diff --git a/arch/arm/include/asm/arch-pxa/config.h b/arch/arm/include/asm/arch-pxa/config.h index 75b0e491ed5..11effd47f5b 100644 --- a/arch/arm/include/asm/arch-pxa/config.h +++ b/arch/arm/include/asm/arch-pxa/config.h @@ -13,8 +13,6 @@ */ #if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS) #define CONFIG_SYS_TIMER_RATE 3250000 -#elif defined(CONFIG_CPU_PXA25X) -#define CONFIG_SYS_TIMER_RATE 3686400 #else #error "Timer frequency unknown - please config PXA CPU type" #endif diff --git a/arch/arm/include/asm/config.h b/arch/arm/include/asm/config.h index 14860d89b6b..26f18777914 100644 --- a/arch/arm/include/asm/config.h +++ b/arch/arm/include/asm/config.h @@ -11,7 +11,6 @@ #if defined(CONFIG_ARCH_LS1021A) || \ defined(CONFIG_CPU_PXA27X) || \ defined(CONFIG_CPU_MONAHANS) || \ - defined(CONFIG_CPU_PXA25X) || \ defined(CONFIG_FSL_LAYERSCAPE) #include #endif diff --git a/drivers/mmc/pxa_mmc_gen.c b/drivers/mmc/pxa_mmc_gen.c index 2b45549a143..a0e1a76d571 100644 --- a/drivers/mmc/pxa_mmc_gen.c +++ b/drivers/mmc/pxa_mmc_gen.c @@ -20,12 +20,7 @@ #include /* PXAMMC Generic default config for various CPUs */ -#if defined(CONFIG_CPU_PXA25X) -#define PXAMMC_FIFO_SIZE 1 -#define PXAMMC_MIN_SPEED 312500 -#define PXAMMC_MAX_SPEED 20000000 -#define PXAMMC_HOST_CAPS (0) -#elif defined(CONFIG_CPU_PXA27X) +#if defined(CONFIG_CPU_PXA27X) #define PXAMMC_CRC_SKIP #define PXAMMC_FIFO_SIZE 32 #define PXAMMC_MIN_SPEED 304000 diff --git a/drivers/net/smc91111.h b/drivers/net/smc91111.h index db324c17d67..f2ba3447459 100644 --- a/drivers/net/smc91111.h +++ b/drivers/net/smc91111.h @@ -66,155 +66,7 @@ struct smc91111_priv{ #define SMC_IO_EXTENT 16 -#ifdef CONFIG_CPU_PXA25X - -#ifdef CONFIG_XSENGINE -#define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+((r)<<1)))) -#define SMC_inw(a,r) (*((volatile word *)((a)->iobase+((r)<<1)))) -#define SMC_inb(a,p) ({ \ - unsigned int __p = (unsigned int)((a)->iobase + ((p)<<1)); \ - unsigned int __v = *(volatile unsigned short *)((__p) & ~2); \ - if (__p & 2) __v >>= 8; \ - else __v &= 0xff; \ - __v; }) -#else -#define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r)))) -#define SMC_inw(a,r) (*((volatile word *)((a)->iobase+(r)))) -#define SMC_inb(a,p) ({ \ - unsigned int __p = (unsigned int)((a)->iobase + (p)); \ - unsigned int __v = *(volatile unsigned short *)((__p) & ~1); \ - if (__p & 1) __v >>= 8; \ - else __v &= 0xff; \ - __v; }) -#endif - -#ifdef CONFIG_XSENGINE -#define SMC_outl(a,d,r) (*((volatile dword *)((a)->iobase+(r<<1))) = d) -#define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+(r<<1))) = d) -#else -#define SMC_outl(a,d,r) (*((volatile dword *)((a)->iobase+(r))) = d) -#define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+(r))) = d) -#endif - -#define SMC_outb(a,d,r) ({ word __d = (byte)(d); \ - word __w = SMC_inw((a),(r)&~1); \ - __w &= ((r)&1) ? 0x00FF : 0xFF00; \ - __w |= ((r)&1) ? __d<<8 : __d; \ - SMC_outw((a),__w,(r)&~1); \ - }) - -#define SMC_outsl(a,r,b,l) ({ int __i; \ - dword *__b2; \ - __b2 = (dword *) b; \ - for (__i = 0; __i < l; __i++) { \ - SMC_outl((a), *(__b2 + __i), r); \ - } \ - }) - -#define SMC_outsw(a,r,b,l) ({ int __i; \ - word *__b2; \ - __b2 = (word *) b; \ - for (__i = 0; __i < l; __i++) { \ - SMC_outw((a), *(__b2 + __i), r); \ - } \ - }) - -#define SMC_insl(a,r,b,l) ({ int __i ; \ - dword *__b2; \ - __b2 = (dword *) b; \ - for (__i = 0; __i < l; __i++) { \ - *(__b2 + __i) = SMC_inl((a),(r)); \ - SMC_inl((a),0); \ - }; \ - }) - -#define SMC_insw(a,r,b,l) ({ int __i ; \ - word *__b2; \ - __b2 = (word *) b; \ - for (__i = 0; __i < l; __i++) { \ - *(__b2 + __i) = SMC_inw((a),(r)); \ - SMC_inw((a),0); \ - }; \ - }) - -#define SMC_insb(a,r,b,l) ({ int __i ; \ - byte *__b2; \ - __b2 = (byte *) b; \ - for (__i = 0; __i < l; __i++) { \ - *(__b2 + __i) = SMC_inb((a),(r)); \ - SMC_inb((a),0); \ - }; \ - }) - -#elif defined(CONFIG_LEON) /* if not CONFIG_CPU_PXA25X */ - -#define SMC_LEON_SWAP16(_x_) ({ word _x = (_x_); ((_x << 8) | (_x >> 8)); }) - -#define SMC_LEON_SWAP32(_x_) \ - ({ dword _x = (_x_); \ - ((_x << 24) | \ - ((0x0000FF00UL & _x) << 8) | \ - ((0x00FF0000UL & _x) >> 8) | \ - (_x >> 24)); }) - -#define SMC_inl(a,r) (SMC_LEON_SWAP32((*(volatile dword *)((a)->iobase+((r)<<0))))) -#define SMC_inl_nosw(a,r) ((*(volatile dword *)((a)->iobase+((r)<<0)))) -#define SMC_inw(a,r) (SMC_LEON_SWAP16((*(volatile word *)((a)->iobase+((r)<<0))))) -#define SMC_inw_nosw(a,r) ((*(volatile word *)((a)->iobase+((r)<<0)))) -#define SMC_inb(a,p) ({ \ - word ___v = SMC_inw((a),(p) & ~1); \ - if ((p) & 1) ___v >>= 8; \ - else ___v &= 0xff; \ - ___v; }) - -#define SMC_outl(a,d,r) (*(volatile dword *)((a)->iobase+((r)<<0))=SMC_LEON_SWAP32(d)) -#define SMC_outl_nosw(a,d,r) (*(volatile dword *)((a)->iobase+((r)<<0))=(d)) -#define SMC_outw(a,d,r) (*(volatile word *)((a)->iobase+((r)<<0))=SMC_LEON_SWAP16(d)) -#define SMC_outw_nosw(a,d,r) (*(volatile word *)((a)->iobase+((r)<<0))=(d)) -#define SMC_outb(a,d,r) do{ word __d = (byte)(d); \ - word __w = SMC_inw((a),(r)&~1); \ - __w &= ((r)&1) ? 0x00FF : 0xFF00; \ - __w |= ((r)&1) ? __d<<8 : __d; \ - SMC_outw((a),__w,(r)&~1); \ - }while(0) -#define SMC_outsl(a,r,b,l) do{ int __i; \ - dword *__b2; \ - __b2 = (dword *) b; \ - for (__i = 0; __i < l; __i++) { \ - SMC_outl_nosw((a), *(__b2 + __i), r); \ - } \ - }while(0) -#define SMC_outsw(a,r,b,l) do{ int __i; \ - word *__b2; \ - __b2 = (word *) b; \ - for (__i = 0; __i < l; __i++) { \ - SMC_outw_nosw((a), *(__b2 + __i), r); \ - } \ - }while(0) -#define SMC_insl(a,r,b,l) do{ int __i ; \ - dword *__b2; \ - __b2 = (dword *) b; \ - for (__i = 0; __i < l; __i++) { \ - *(__b2 + __i) = SMC_inl_nosw((a),(r)); \ - }; \ - }while(0) - -#define SMC_insw(a,r,b,l) do{ int __i ; \ - word *__b2; \ - __b2 = (word *) b; \ - for (__i = 0; __i < l; __i++) { \ - *(__b2 + __i) = SMC_inw_nosw((a),(r)); \ - }; \ - }while(0) - -#define SMC_insb(a,r,b,l) do{ int __i ; \ - byte *__b2; \ - __b2 = (byte *) b; \ - for (__i = 0; __i < l; __i++) { \ - *(__b2 + __i) = SMC_inb((a),(r)); \ - }; \ - }while(0) -#elif defined(CONFIG_MS7206SE) +#if defined(CONFIG_MS7206SE) #define SWAB7206(x) ({ word __x = x; ((__x << 8)|(__x >> 8)); }) #define SMC_inw(a, r) *((volatile word*)((a)->iobase + (r))) #define SMC_inb(a, r) (*((volatile byte*)((a)->iobase + ((r) ^ 0x01)))) @@ -244,7 +96,7 @@ struct smc91111_priv{ __b2++; \ } \ } while (0) -#else /* if not CONFIG_CPU_PXA25X and not CONFIG_LEON */ +#else #ifndef CONFIG_SMC_USE_IOFUNCS /* these macros don't work on some boards */ /* diff --git a/drivers/serial/serial_pxa.c b/drivers/serial/serial_pxa.c index 330fc127ecb..aa928efdc00 100644 --- a/drivers/serial/serial_pxa.c +++ b/drivers/serial/serial_pxa.c @@ -88,7 +88,6 @@ static struct pxa_uart_regs *pxa_uart_index_to_regs(uint32_t uart_index) case FFUART_INDEX: return (struct pxa_uart_regs *)FFUART_BASE; case BTUART_INDEX: return (struct pxa_uart_regs *)BTUART_BASE; case STUART_INDEX: return (struct pxa_uart_regs *)STUART_BASE; - case HWUART_INDEX: return (struct pxa_uart_regs *)HWUART_BASE; default: return NULL; } diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile index d5d891b2053..d8de8efa0a4 100644 --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile @@ -37,7 +37,6 @@ ifdef CONFIG_USB_ETHER obj-y += ether.o obj-$(CONFIG_USB_ETH_RNDIS) += rndis.o obj-$(CONFIG_CI_UDC) += ci_udc.o -obj-$(CONFIG_CPU_PXA25X) += pxa25x_udc.o else # Devices not related to the new gadget layer depend on CONFIG_USB_DEVICE ifdef CONFIG_USB_DEVICE diff --git a/drivers/usb/gadget/pxa25x_udc.c b/drivers/usb/gadget/pxa25x_udc.c deleted file mode 100644 index d19ac1d0353..00000000000 --- a/drivers/usb/gadget/pxa25x_udc.c +++ /dev/null @@ -1,2049 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Intel PXA25x and IXP4xx on-chip full speed USB device controllers - * - * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker) - * Copyright (C) 2003 Robert Schwebel, Pengutronix - * Copyright (C) 2003 Benedikt Spranger, Pengutronix - * Copyright (C) 2003 David Brownell - * Copyright (C) 2003 Joshua Wise - * Copyright (C) 2012 Lukasz Dalek - * - * MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell"); - */ - -#define CONFIG_USB_PXA25X_SMALL -#define DRIVER_NAME "pxa25x_udc_linux" -#define ARCH_HAS_PREFETCH - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "pxa25x_udc.h" - -/* - * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x - * series processors. The UDC for the IXP 4xx series is very similar. - * There are fifteen endpoints, in addition to ep0. - * - * Such controller drivers work with a gadget driver. The gadget driver - * returns descriptors, implements configuration and data protocols used - * by the host to interact with this device, and allocates endpoints to - * the different protocol interfaces. The controller driver virtualizes - * usb hardware so that the gadget drivers will be more portable. - * - * This UDC hardware wants to implement a bit too much USB protocol, so - * it constrains the sorts of USB configuration change events that work. - * The errata for these chips are misleading; some "fixed" bugs from - * pxa250 a0/a1 b0/b1/b2 sure act like they're still there. - * - * Note that the UDC hardware supports DMA (except on IXP) but that's - * not used here. IN-DMA (to host) is simple enough, when the data is - * suitably aligned (16 bytes) ... the network stack doesn't do that, - * other software can. OUT-DMA is buggy in most chip versions, as well - * as poorly designed (data toggle not automatic). So this driver won't - * bother using DMA. (Mostly-working IN-DMA support was available in - * kernels before 2.6.23, but was never enabled or well tested.) - */ - -#define DRIVER_VERSION "18-August-2012" -#define DRIVER_DESC "PXA 25x USB Device Controller driver" - -static const char driver_name[] = "pxa25x_udc"; -static const char ep0name[] = "ep0"; - -/* Watchdog */ -static inline void start_watchdog(struct pxa25x_udc *udc) -{ - debug("Started watchdog\n"); - udc->watchdog.base = get_timer(0); - udc->watchdog.running = 1; -} - -static inline void stop_watchdog(struct pxa25x_udc *udc) -{ - udc->watchdog.running = 0; - debug("Stopped watchdog\n"); -} - -static inline void test_watchdog(struct pxa25x_udc *udc) -{ - if (!udc->watchdog.running) - return; - - debug("watchdog %ld %ld\n", get_timer(udc->watchdog.base), - udc->watchdog.period); - - if (get_timer(udc->watchdog.base) >= udc->watchdog.period) { - stop_watchdog(udc); - udc->watchdog.function(udc); - } -} - -static void udc_watchdog(struct pxa25x_udc *dev) -{ - uint32_t udccs0 = readl(&dev->regs->udccs[0]); - - debug("Fired up udc_watchdog\n"); - - local_irq_disable(); - if (dev->ep0state == EP0_STALL - && (udccs0 & UDCCS0_FST) == 0 - && (udccs0 & UDCCS0_SST) == 0) { - writel(UDCCS0_FST|UDCCS0_FTF, &dev->regs->udccs[0]); - debug("ep0 re-stall\n"); - start_watchdog(dev); - } - local_irq_enable(); -} - -#ifdef DEBUG - -static const char * const state_name[] = { - "EP0_IDLE", - "EP0_IN_DATA_PHASE", "EP0_OUT_DATA_PHASE", - "EP0_END_XFER", "EP0_STALL" -}; - -static void -dump_udccr(const char *label) -{ - u32 udccr = readl(&UDC_REGS->udccr); - debug("%s %02X =%s%s%s%s%s%s%s%s\n", - label, udccr, - (udccr & UDCCR_REM) ? " rem" : "", - (udccr & UDCCR_RSTIR) ? " rstir" : "", - (udccr & UDCCR_SRM) ? " srm" : "", - (udccr & UDCCR_SUSIR) ? " susir" : "", - (udccr & UDCCR_RESIR) ? " resir" : "", - (udccr & UDCCR_RSM) ? " rsm" : "", - (udccr & UDCCR_UDA) ? " uda" : "", - (udccr & UDCCR_UDE) ? " ude" : ""); -} - -static void -dump_udccs0(const char *label) -{ - u32 udccs0 = readl(&UDC_REGS->udccs[0]); - - debug("%s %s %02X =%s%s%s%s%s%s%s%s\n", - label, state_name[the_controller->ep0state], udccs0, - (udccs0 & UDCCS0_SA) ? " sa" : "", - (udccs0 & UDCCS0_RNE) ? " rne" : "", - (udccs0 & UDCCS0_FST) ? " fst" : "", - (udccs0 & UDCCS0_SST) ? " sst" : "", - (udccs0 & UDCCS0_DRWF) ? " dwrf" : "", - (udccs0 & UDCCS0_FTF) ? " ftf" : "", - (udccs0 & UDCCS0_IPR) ? " ipr" : "", - (udccs0 & UDCCS0_OPR) ? " opr" : ""); -} - -static void -dump_state(struct pxa25x_udc *dev) -{ - u32 tmp; - unsigned i; - - debug("%s, uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n", - state_name[dev->ep0state], - readl(&UDC_REGS->uicr1), readl(&UDC_REGS->uicr0), - readl(&UDC_REGS->usir1), readl(&UDC_REGS->usir0), - readl(&UDC_REGS->ufnrh), readl(&UDC_REGS->ufnrl)); - dump_udccr("udccr"); - if (dev->has_cfr) { - tmp = readl(&UDC_REGS->udccfr); - debug("udccfr %02X =%s%s\n", tmp, - (tmp & UDCCFR_AREN) ? " aren" : "", - (tmp & UDCCFR_ACM) ? " acm" : ""); - } - - if (!dev->driver) { - debug("no gadget driver bound\n"); - return; - } else - debug("ep0 driver '%s'\n", "ether"); - - dump_udccs0("udccs0"); - debug("ep0 IN %lu/%lu, OUT %lu/%lu\n", - dev->stats.write.bytes, dev->stats.write.ops, - dev->stats.read.bytes, dev->stats.read.ops); - - for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++) { - if (dev->ep[i].desc == NULL) - continue; - debug("udccs%d = %02x\n", i, *dev->ep->reg_udccs); - } -} - -#else /* DEBUG */ - -static inline void dump_udccr(const char *label) { } -static inline void dump_udccs0(const char *label) { } -static inline void dump_state(struct pxa25x_udc *dev) { } - -#endif /* DEBUG */ - -/* - * --------------------------------------------------------------------------- - * endpoint related parts of the api to the usb controller hardware, - * used by gadget driver; and the inner talker-to-hardware core. - * --------------------------------------------------------------------------- - */ - -static void pxa25x_ep_fifo_flush(struct usb_ep *ep); -static void nuke(struct pxa25x_ep *, int status); - -/* one GPIO should control a D+ pullup, so host sees this device (or not) */ -static void pullup_off(void) -{ - struct pxa2xx_udc_mach_info *mach = the_controller->mach; - - if (mach->udc_command) - mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT); -} - -static void pullup_on(void) -{ - struct pxa2xx_udc_mach_info *mach = the_controller->mach; - - if (mach->udc_command) - mach->udc_command(PXA2XX_UDC_CMD_CONNECT); -} - -static void pio_irq_enable(int bEndpointAddress) -{ - bEndpointAddress &= 0xf; - if (bEndpointAddress < 8) { - clrbits_le32(&the_controller->regs->uicr0, - 1 << bEndpointAddress); - } else { - bEndpointAddress -= 8; - clrbits_le32(&the_controller->regs->uicr1, - 1 << bEndpointAddress); - } -} - -static void pio_irq_disable(int bEndpointAddress) -{ - bEndpointAddress &= 0xf; - if (bEndpointAddress < 8) { - setbits_le32(&the_controller->regs->uicr0, - 1 << bEndpointAddress); - } else { - bEndpointAddress -= 8; - setbits_le32(&the_controller->regs->uicr1, - 1 << bEndpointAddress); - } -} - -static inline void udc_set_mask_UDCCR(int mask) -{ - /* - * The UDCCR reg contains mask and interrupt status bits, - * so using '|=' isn't safe as it may ack an interrupt. - */ - const uint32_t mask_bits = UDCCR_REM | UDCCR_SRM | UDCCR_UDE; - - mask &= mask_bits; - clrsetbits_le32(&the_controller->regs->udccr, ~mask_bits, mask); -} - -static inline void udc_clear_mask_UDCCR(int mask) -{ - const uint32_t mask_bits = UDCCR_REM | UDCCR_SRM | UDCCR_UDE; - - mask = ~mask & mask_bits; - clrbits_le32(&the_controller->regs->udccr, ~mask); -} - -static inline void udc_ack_int_UDCCR(int mask) -{ - const uint32_t mask_bits = UDCCR_REM | UDCCR_SRM | UDCCR_UDE; - - mask &= ~mask_bits; - clrsetbits_le32(&the_controller->regs->udccr, ~mask_bits, mask); -} - -/* - * endpoint enable/disable - * - * we need to verify the descriptors used to enable endpoints. since pxa25x - * endpoint configurations are fixed, and are pretty much always enabled, - * there's not a lot to manage here. - * - * because pxa25x can't selectively initialize bulk (or interrupt) endpoints, - * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except - * for a single interface (with only the default altsetting) and for gadget - * drivers that don't halt endpoints (not reset by set_interface). that also - * means that if you use ISO, you must violate the USB spec rule that all - * iso endpoints must be in non-default altsettings. - */ -static int pxa25x_ep_enable(struct usb_ep *_ep, - const struct usb_endpoint_descriptor *desc) -{ - struct pxa25x_ep *ep; - struct pxa25x_udc *dev; - - ep = container_of(_ep, struct pxa25x_ep, ep); - if (!_ep || !desc || ep->desc || _ep->name == ep0name - || desc->bDescriptorType != USB_DT_ENDPOINT - || ep->bEndpointAddress != desc->bEndpointAddress - || ep->fifo_size < - le16_to_cpu(get_unaligned(&desc->wMaxPacketSize))) { - printf("%s, bad ep or descriptor\n", __func__); - return -EINVAL; - } - - /* xfer types must match, except that interrupt ~= bulk */ - if (ep->bmAttributes != desc->bmAttributes - && ep->bmAttributes != USB_ENDPOINT_XFER_BULK - && desc->bmAttributes != USB_ENDPOINT_XFER_INT) { - printf("%s, %s type mismatch\n", __func__, _ep->name); - return -EINVAL; - } - - /* hardware _could_ do smaller, but driver doesn't */ - if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK - && le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)) - != BULK_FIFO_SIZE) - || !get_unaligned(&desc->wMaxPacketSize)) { - printf("%s, bad %s maxpacket\n", __func__, _ep->name); - return -ERANGE; - } - - dev = ep->dev; - if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) { - printf("%s, bogus device state\n", __func__); - return -ESHUTDOWN; - } - - ep->desc = desc; - ep->stopped = 0; - ep->pio_irqs = 0; - ep->ep.maxpacket = le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)); - - /* flush fifo (mostly for OUT buffers) */ - pxa25x_ep_fifo_flush(_ep); - - /* ... reset halt state too, if we could ... */ - - debug("enabled %s\n", _ep->name); - return 0; -} - -static int pxa25x_ep_disable(struct usb_ep *_ep) -{ - struct pxa25x_ep *ep; - unsigned long flags; - - ep = container_of(_ep, struct pxa25x_ep, ep); - if (!_ep || !ep->desc) { - printf("%s, %s not enabled\n", __func__, - _ep ? ep->ep.name : NULL); - return -EINVAL; - } - local_irq_save(flags); - - nuke(ep, -ESHUTDOWN); - - /* flush fifo (mostly for IN buffers) */ - pxa25x_ep_fifo_flush(_ep); - - ep->desc = NULL; - ep->stopped = 1; - - local_irq_restore(flags); - debug("%s disabled\n", _ep->name); - return 0; -} - -/*-------------------------------------------------------------------------*/ - -/* - * for the pxa25x, these can just wrap kmalloc/kfree. gadget drivers - * must still pass correctly initialized endpoints, since other controller - * drivers may care about how it's currently set up (dma issues etc). - */ - -/* - * pxa25x_ep_alloc_request - allocate a request data structure - */ -static struct usb_request * -pxa25x_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags) -{ - struct pxa25x_request *req; - - req = kzalloc(sizeof(*req), gfp_flags); - if (!req) - return NULL; - - INIT_LIST_HEAD(&req->queue); - return &req->req; -} - - -/* - * pxa25x_ep_free_request - deallocate a request data structure - */ -static void -pxa25x_ep_free_request(struct usb_ep *_ep, struct usb_request *_req) -{ - struct pxa25x_request *req; - - req = container_of(_req, struct pxa25x_request, req); - WARN_ON(!list_empty(&req->queue)); - kfree(req); -} - -/*-------------------------------------------------------------------------*/ - -/* - * done - retire a request; caller blocked irqs - */ -static void done(struct pxa25x_ep *ep, struct pxa25x_request *req, int status) -{ - unsigned stopped = ep->stopped; - - list_del_init(&req->queue); - - if (likely(req->req.status == -EINPROGRESS)) - req->req.status = status; - else - status = req->req.status; - - if (status && status != -ESHUTDOWN) - debug("complete %s req %p stat %d len %u/%u\n", - ep->ep.name, &req->req, status, - req->req.actual, req->req.length); - - /* don't modify queue heads during completion callback */ - ep->stopped = 1; - req->req.complete(&ep->ep, &req->req); - ep->stopped = stopped; -} - - -static inline void ep0_idle(struct pxa25x_udc *dev) -{ - dev->ep0state = EP0_IDLE; -} - -static int -write_packet(u32 *uddr, struct pxa25x_request *req, unsigned max) -{ - u8 *buf; - unsigned length, count; - - debug("%s(): uddr %p\n", __func__, uddr); - - buf = req->req.buf + req->req.actual; - prefetch(buf); - - /* how big will this packet be? */ - length = min(req->req.length - req->req.actual, max); - req->req.actual += length; - - count = length; - while (likely(count--)) - writeb(*buf++, uddr); - - return length; -} - -/* - * write to an IN endpoint fifo, as many packets as possible. - * irqs will use this to write the rest later. - * caller guarantees at least one packet buffer is ready (or a zlp). - */ -static int -write_fifo(struct pxa25x_ep *ep, struct pxa25x_request *req) -{ - unsigned max; - - max = le16_to_cpu(get_unaligned(&ep->desc->wMaxPacketSize)); - do { - unsigned count; - int is_last, is_short; - - count = write_packet(ep->reg_uddr, req, max); - - /* last packet is usually short (or a zlp) */ - if (unlikely(count != max)) - is_last = is_short = 1; - else { - if (likely(req->req.length != req->req.actual) - || req->req.zero) - is_last = 0; - else - is_last = 1; - /* interrupt/iso maxpacket may not fill the fifo */ - is_short = unlikely(max < ep->fifo_size); - } - - debug_cond(NOISY, "wrote %s %d bytes%s%s %d left %p\n", - ep->ep.name, count, - is_last ? "/L" : "", is_short ? "/S" : "", - req->req.length - req->req.actual, req); - - /* - * let loose that packet. maybe try writing another one, - * double buffering might work. TSP, TPC, and TFS - * bit values are the same for all normal IN endpoints. - */ - writel(UDCCS_BI_TPC, ep->reg_udccs); - if (is_short) - writel(UDCCS_BI_TSP, ep->reg_udccs); - - /* requests complete when all IN data is in the FIFO */ - if (is_last) { - done(ep, req, 0); - if (list_empty(&ep->queue)) - pio_irq_disable(ep->bEndpointAddress); - return 1; - } - - /* - * TODO experiment: how robust can fifo mode tweaking be? - * double buffering is off in the default fifo mode, which - * prevents TFS from being set here. - */ - - } while (readl(ep->reg_udccs) & UDCCS_BI_TFS); - return 0; -} - -/* - * caller asserts req->pending (ep0 irq status nyet cleared); starts - * ep0 data stage. these chips want very simple state transitions. - */ -static inline -void ep0start(struct pxa25x_udc *dev, u32 flags, const char *tag) -{ - writel(flags|UDCCS0_SA|UDCCS0_OPR, &dev->regs->udccs[0]); - writel(USIR0_IR0, &dev->regs->usir0); - dev->req_pending = 0; - debug_cond(NOISY, "%s() %s, udccs0: %02x/%02x usir: %X.%X\n", - __func__, tag, readl(&dev->regs->udccs[0]), flags, - readl(&dev->regs->usir1), readl(&dev->regs->usir0)); -} - -static int -write_ep0_fifo(struct pxa25x_ep *ep, struct pxa25x_request *req) -{ - unsigned count; - int is_short; - - count = write_packet(&ep->dev->regs->uddr0, req, EP0_FIFO_SIZE); - ep->dev->stats.write.bytes += count; - - /* last packet "must be" short (or a zlp) */ - is_short = (count != EP0_FIFO_SIZE); - - debug_cond(NOISY, "ep0in %d bytes %d left %p\n", count, - req->req.length - req->req.actual, req); - - if (unlikely(is_short)) { - if (ep->dev->req_pending) - ep0start(ep->dev, UDCCS0_IPR, "short IN"); - else - writel(UDCCS0_IPR, &ep->dev->regs->udccs[0]); - - count = req->req.length; - done(ep, req, 0); - ep0_idle(ep->dev); - - /* - * This seems to get rid of lost status irqs in some cases: - * host responds quickly, or next request involves config - * change automagic, or should have been hidden, or ... - * - * FIXME get rid of all udelays possible... - */ - if (count >= EP0_FIFO_SIZE) { - count = 100; - do { - if ((readl(&ep->dev->regs->udccs[0]) & - UDCCS0_OPR) != 0) { - /* clear OPR, generate ack */ - writel(UDCCS0_OPR, - &ep->dev->regs->udccs[0]); - break; - } - count--; - udelay(1); - } while (count); - } - } else if (ep->dev->req_pending) - ep0start(ep->dev, 0, "IN"); - - return is_short; -} - - -/* - * read_fifo - unload packet(s) from the fifo we use for usb OUT - * transfers and put them into the request. caller should have made - * sure there's at least one packet ready. - * - * returns true if the request completed because of short packet or the - * request buffer having filled (and maybe overran till end-of-packet). - */ -static int -read_fifo(struct pxa25x_ep *ep, struct pxa25x_request *req) -{ - u32 udccs; - u8 *buf; - unsigned bufferspace, count, is_short; - - for (;;) { - /* - * make sure there's a packet in the FIFO. - * UDCCS_{BO,IO}_RPC are all the same bit value. - * UDCCS_{BO,IO}_RNE are all the same bit value. - */ - udccs = readl(ep->reg_udccs); - if (unlikely((udccs & UDCCS_BO_RPC) == 0)) - break; - buf = req->req.buf + req->req.actual; - prefetchw(buf); - bufferspace = req->req.length - req->req.actual; - - /* read all bytes from this packet */ - if (likely(udccs & UDCCS_BO_RNE)) { - count = 1 + (0x0ff & readl(ep->reg_ubcr)); - req->req.actual += min(count, bufferspace); - } else /* zlp */ - count = 0; - is_short = (count < ep->ep.maxpacket); - debug_cond(NOISY, "read %s %02x, %d bytes%s req %p %d/%d\n", - ep->ep.name, udccs, count, - is_short ? "/S" : "", - req, req->req.actual, req->req.length); - while (likely(count-- != 0)) { - u8 byte = readb(ep->reg_uddr); - - if (unlikely(bufferspace == 0)) { - /* - * this happens when the driver's buffer - * is smaller than what the host sent. - * discard the extra data. - */ - if (req->req.status != -EOVERFLOW) - printf("%s overflow %d\n", - ep->ep.name, count); - req->req.status = -EOVERFLOW; - } else { - *buf++ = byte; - bufferspace--; - } - } - writel(UDCCS_BO_RPC, ep->reg_udccs); - /* RPC/RSP/RNE could now reflect the other packet buffer */ - - /* iso is one request per packet */ - if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) { - if (udccs & UDCCS_IO_ROF) - req->req.status = -EHOSTUNREACH; - /* more like "is_done" */ - is_short = 1; - } - - /* completion */ - if (is_short || req->req.actual == req->req.length) { - done(ep, req, 0); - if (list_empty(&ep->queue)) - pio_irq_disable(ep->bEndpointAddress); - return 1; - } - - /* finished that packet. the next one may be waiting... */ - } - return 0; -} - -/* - * special ep0 version of the above. no UBCR0 or double buffering; status - * handshaking is magic. most device protocols don't need control-OUT. - * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other - * protocols do use them. - */ -static int -read_ep0_fifo(struct pxa25x_ep *ep, struct pxa25x_request *req) -{ - u8 *buf, byte; - unsigned bufferspace; - - buf = req->req.buf + req->req.actual; - bufferspace = req->req.length - req->req.actual; - - while (readl(&ep->dev->regs->udccs[0]) & UDCCS0_RNE) { - byte = (u8)readb(&ep->dev->regs->uddr0); - - if (unlikely(bufferspace == 0)) { - /* - * this happens when the driver's buffer - * is smaller than what the host sent. - * discard the extra data. - */ - if (req->req.status != -EOVERFLOW) - printf("%s overflow\n", ep->ep.name); - req->req.status = -EOVERFLOW; - } else { - *buf++ = byte; - req->req.actual++; - bufferspace--; - } - } - - writel(UDCCS0_OPR | UDCCS0_IPR, &ep->dev->regs->udccs[0]); - - /* completion */ - if (req->req.actual >= req->req.length) - return 1; - - /* finished that packet. the next one may be waiting... */ - return 0; -} - -/*-------------------------------------------------------------------------*/ - -static int -pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) -{ - struct pxa25x_request *req; - struct pxa25x_ep *ep; - struct pxa25x_udc *dev; - unsigned long flags; - - req = container_of(_req, struct pxa25x_request, req); - if (unlikely(!_req || !_req->complete || !_req->buf - || !list_empty(&req->queue))) { - printf("%s, bad params\n", __func__); - return -EINVAL; - } - - ep = container_of(_ep, struct pxa25x_ep, ep); - if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) { - printf("%s, bad ep\n", __func__); - return -EINVAL; - } - - dev = ep->dev; - if (unlikely(!dev->driver - || dev->gadget.speed == USB_SPEED_UNKNOWN)) { - printf("%s, bogus device state\n", __func__); - return -ESHUTDOWN; - } - - /* - * iso is always one packet per request, that's the only way - * we can report per-packet status. that also helps with dma. - */ - if (unlikely(ep->bmAttributes == USB_ENDPOINT_XFER_ISOC - && req->req.length > - le16_to_cpu(get_unaligned(&ep->desc->wMaxPacketSize)))) - return -EMSGSIZE; - - debug_cond(NOISY, "%s queue req %p, len %d buf %p\n", - _ep->name, _req, _req->length, _req->buf); - - local_irq_save(flags); - - _req->status = -EINPROGRESS; - _req->actual = 0; - - /* kickstart this i/o queue? */ - if (list_empty(&ep->queue) && !ep->stopped) { - if (ep->desc == NULL/* ep0 */) { - unsigned length = _req->length; - - switch (dev->ep0state) { - case EP0_IN_DATA_PHASE: - dev->stats.write.ops++; - if (write_ep0_fifo(ep, req)) - req = NULL; - break; - - case EP0_OUT_DATA_PHASE: - dev->stats.read.ops++; - /* messy ... */ - if (dev->req_config) { - debug("ep0 config ack%s\n", - dev->has_cfr ? "" : " raced"); - if (dev->has_cfr) - writel(UDCCFR_AREN|UDCCFR_ACM - |UDCCFR_MB1, - &ep->dev->regs->udccfr); - done(ep, req, 0); - dev->ep0state = EP0_END_XFER; - local_irq_restore(flags); - return 0; - } - if (dev->req_pending) - ep0start(dev, UDCCS0_IPR, "OUT"); - if (length == 0 || - ((readl( - &ep->dev->regs->udccs[0]) - & UDCCS0_RNE) != 0 - && read_ep0_fifo(ep, req))) { - ep0_idle(dev); - done(ep, req, 0); - req = NULL; - } - break; - - default: - printf("ep0 i/o, odd state %d\n", - dev->ep0state); - local_irq_restore(flags); - return -EL2HLT; - } - /* can the FIFO can satisfy the request immediately? */ - } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0) { - if ((readl(ep->reg_udccs) & UDCCS_BI_TFS) != 0 - && write_fifo(ep, req)) - req = NULL; - } else if ((readl(ep->reg_udccs) & UDCCS_BO_RFS) != 0 - && read_fifo(ep, req)) { - req = NULL; - } - - if (likely(req && ep->desc)) - pio_irq_enable(ep->bEndpointAddress); - } - - /* pio or dma irq handler advances the queue. */ - if (likely(req != NULL)) - list_add_tail(&req->queue, &ep->queue); - local_irq_restore(flags); - - return 0; -} - - -/* - * nuke - dequeue ALL requests - */ -static void nuke(struct pxa25x_ep *ep, int status) -{ - struct pxa25x_request *req; - - /* called with irqs blocked */ - while (!list_empty(&ep->queue)) { - req = list_entry(ep->queue.next, - struct pxa25x_request, - queue); - done(ep, req, status); - } - if (ep->desc) - pio_irq_disable(ep->bEndpointAddress); -} - - -/* dequeue JUST ONE request */ -static int pxa25x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) -{ - struct pxa25x_ep *ep; - struct pxa25x_request *req; - unsigned long flags; - - ep = container_of(_ep, struct pxa25x_ep, ep); - if (!_ep || ep->ep.name == ep0name) - return -EINVAL; - - local_irq_save(flags); - - /* make sure it's actually queued on this endpoint */ - list_for_each_entry(req, &ep->queue, queue) { - if (&req->req == _req) - break; - } - if (&req->req != _req) { - local_irq_restore(flags); - return -EINVAL; - } - - done(ep, req, -ECONNRESET); - - local_irq_restore(flags); - return 0; -} - -/*-------------------------------------------------------------------------*/ - -static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value) -{ - struct pxa25x_ep *ep; - unsigned long flags; - - ep = container_of(_ep, struct pxa25x_ep, ep); - if (unlikely(!_ep - || (!ep->desc && ep->ep.name != ep0name)) - || ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) { - printf("%s, bad ep\n", __func__); - return -EINVAL; - } - if (value == 0) { - /* - * this path (reset toggle+halt) is needed to implement - * SET_INTERFACE on normal hardware. but it can't be - * done from software on the PXA UDC, and the hardware - * forgets to do it as part of SET_INTERFACE automagic. - */ - printf("only host can clear %s halt\n", _ep->name); - return -EROFS; - } - - local_irq_save(flags); - - if ((ep->bEndpointAddress & USB_DIR_IN) != 0 - && ((readl(ep->reg_udccs) & UDCCS_BI_TFS) == 0 - || !list_empty(&ep->queue))) { - local_irq_restore(flags); - return -EAGAIN; - } - - /* FST bit is the same for control, bulk in, bulk out, interrupt in */ - writel(UDCCS_BI_FST|UDCCS_BI_FTF, ep->reg_udccs); - - /* ep0 needs special care */ - if (!ep->desc) { - start_watchdog(ep->dev); - ep->dev->req_pending = 0; - ep->dev->ep0state = EP0_STALL; - - /* and bulk/intr endpoints like dropping stalls too */ - } else { - unsigned i; - for (i = 0; i < 1000; i += 20) { - if (readl(ep->reg_udccs) & UDCCS_BI_SST) - break; - udelay(20); - } - } - local_irq_restore(flags); - - debug("%s halt\n", _ep->name); - return 0; -} - -static int pxa25x_ep_fifo_status(struct usb_ep *_ep) -{ - struct pxa25x_ep *ep; - - ep = container_of(_ep, struct pxa25x_ep, ep); - if (!_ep) { - printf("%s, bad ep\n", __func__); - return -ENODEV; - } - /* pxa can't report unclaimed bytes from IN fifos */ - if ((ep->bEndpointAddress & USB_DIR_IN) != 0) - return -EOPNOTSUPP; - if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN - || (readl(ep->reg_udccs) & UDCCS_BO_RFS) == 0) - return 0; - else - return (readl(ep->reg_ubcr) & 0xfff) + 1; -} - -static void pxa25x_ep_fifo_flush(struct usb_ep *_ep) -{ - struct pxa25x_ep *ep; - - ep = container_of(_ep, struct pxa25x_ep, ep); - if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) { - printf("%s, bad ep\n", __func__); - return; - } - - /* toggle and halt bits stay unchanged */ - - /* for OUT, just read and discard the FIFO contents. */ - if ((ep->bEndpointAddress & USB_DIR_IN) == 0) { - while (((readl(ep->reg_udccs)) & UDCCS_BO_RNE) != 0) - (void)readb(ep->reg_uddr); - return; - } - - /* most IN status is the same, but ISO can't stall */ - writel(UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR - | (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC - ? 0 : UDCCS_BI_SST), ep->reg_udccs); -} - - -static struct usb_ep_ops pxa25x_ep_ops = { - .enable = pxa25x_ep_enable, - .disable = pxa25x_ep_disable, - - .alloc_request = pxa25x_ep_alloc_request, - .free_request = pxa25x_ep_free_request, - - .queue = pxa25x_ep_queue, - .dequeue = pxa25x_ep_dequeue, - - .set_halt = pxa25x_ep_set_halt, - .fifo_status = pxa25x_ep_fifo_status, - .fifo_flush = pxa25x_ep_fifo_flush, -}; - - -/* --------------------------------------------------------------------------- - * device-scoped parts of the api to the usb controller hardware - * --------------------------------------------------------------------------- - */ - -static int pxa25x_udc_get_frame(struct usb_gadget *_gadget) -{ - return ((readl(&the_controller->regs->ufnrh) & 0x07) << 8) | - (readl(&the_controller->regs->ufnrl) & 0xff); -} - -static int pxa25x_udc_wakeup(struct usb_gadget *_gadget) -{ - /* host may not have enabled remote wakeup */ - if ((readl(&the_controller->regs->udccs[0]) & UDCCS0_DRWF) == 0) - return -EHOSTUNREACH; - udc_set_mask_UDCCR(UDCCR_RSM); - return 0; -} - -static void stop_activity(struct pxa25x_udc *, struct usb_gadget_driver *); -static void udc_enable(struct pxa25x_udc *); -static void udc_disable(struct pxa25x_udc *); - -/* - * We disable the UDC -- and its 48 MHz clock -- whenever it's not - * in active use. - */ -static int pullup(struct pxa25x_udc *udc) -{ - if (udc->pullup) - pullup_on(); - else - pullup_off(); - - - int is_active = udc->pullup; - if (is_active) { - if (!udc->active) { - udc->active = 1; - udc_enable(udc); - } - } else { - if (udc->active) { - if (udc->gadget.speed != USB_SPEED_UNKNOWN) - stop_activity(udc, udc->driver); - udc_disable(udc); - udc->active = 0; - } - - } - return 0; -} - -/* VBUS reporting logically comes from a transceiver */ -static int pxa25x_udc_vbus_session(struct usb_gadget *_gadget, int is_active) -{ - struct pxa25x_udc *udc; - - udc = container_of(_gadget, struct pxa25x_udc, gadget); - printf("vbus %s\n", is_active ? "supplied" : "inactive"); - pullup(udc); - return 0; -} - -/* drivers may have software control over D+ pullup */ -static int pxa25x_udc_pullup(struct usb_gadget *_gadget, int is_active) -{ - struct pxa25x_udc *udc; - - udc = container_of(_gadget, struct pxa25x_udc, gadget); - - /* not all boards support pullup control */ - if (!udc->mach->udc_command) - return -EOPNOTSUPP; - - udc->pullup = (is_active != 0); - pullup(udc); - return 0; -} - -/* - * boards may consume current from VBUS, up to 100-500mA based on config. - * the 500uA suspend ceiling means that exclusively vbus-powered PXA designs - * violate USB specs. - */ -static int pxa25x_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA) -{ - return -EOPNOTSUPP; -} - -static const struct usb_gadget_ops pxa25x_udc_ops = { - .get_frame = pxa25x_udc_get_frame, - .wakeup = pxa25x_udc_wakeup, - .vbus_session = pxa25x_udc_vbus_session, - .pullup = pxa25x_udc_pullup, - .vbus_draw = pxa25x_udc_vbus_draw, -}; - -/*-------------------------------------------------------------------------*/ - -/* - * udc_disable - disable USB device controller - */ -static void udc_disable(struct pxa25x_udc *dev) -{ - /* block all irqs */ - udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM); - writel(0xff, &dev->regs->uicr0); - writel(0xff, &dev->regs->uicr1); - writel(UFNRH_SIM, &dev->regs->ufnrh); - - /* if hardware supports it, disconnect from usb */ - pullup_off(); - - udc_clear_mask_UDCCR(UDCCR_UDE); - - ep0_idle(dev); - dev->gadget.speed = USB_SPEED_UNKNOWN; -} - -/* - * udc_reinit - initialize software state - */ -static void udc_reinit(struct pxa25x_udc *dev) -{ - u32 i; - - /* device/ep0 records init */ - INIT_LIST_HEAD(&dev->gadget.ep_list); - INIT_LIST_HEAD(&dev->gadget.ep0->ep_list); - dev->ep0state = EP0_IDLE; - - /* basic endpoint records init */ - for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) { - struct pxa25x_ep *ep = &dev->ep[i]; - - if (i != 0) - list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list); - - ep->desc = NULL; - ep->stopped = 0; - INIT_LIST_HEAD(&ep->queue); - ep->pio_irqs = 0; - } - - /* the rest was statically initialized, and is read-only */ -} - -/* - * until it's enabled, this UDC should be completely invisible - * to any USB host. - */ -static void udc_enable(struct pxa25x_udc *dev) -{ - debug("udc: enabling udc\n"); - - udc_clear_mask_UDCCR(UDCCR_UDE); - - /* - * Try to clear these bits before we enable the udc. - * Do not touch reset ack bit, we would take care of it in - * interrupt handle routine - */ - udc_ack_int_UDCCR(UDCCR_SUSIR|UDCCR_RESIR); - - ep0_idle(dev); - dev->gadget.speed = USB_SPEED_UNKNOWN; - dev->stats.irqs = 0; - - /* - * sequence taken from chapter 12.5.10, PXA250 AppProcDevManual: - * - enable UDC - * - if RESET is already in progress, ack interrupt - * - unmask reset interrupt - */ - udc_set_mask_UDCCR(UDCCR_UDE); - if (!(readl(&dev->regs->udccr) & UDCCR_UDA)) - udc_ack_int_UDCCR(UDCCR_RSTIR); - - if (dev->has_cfr /* UDC_RES2 is defined */) { - /* - * pxa255 (a0+) can avoid a set_config race that could - * prevent gadget drivers from configuring correctly - */ - writel(UDCCFR_ACM | UDCCFR_MB1, &dev->regs->udccfr); - } - - /* enable suspend/resume and reset irqs */ - udc_clear_mask_UDCCR(UDCCR_SRM | UDCCR_REM); - - /* enable ep0 irqs */ - clrbits_le32(&dev->regs->uicr0, UICR0_IM0); - - /* if hardware supports it, pullup D+ and wait for reset */ - pullup_on(); -} - -static inline void clear_ep_state(struct pxa25x_udc *dev) -{ - unsigned i; - - /* - * hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint - * fifos, and pending transactions mustn't be continued in any case. - */ - for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++) - nuke(&dev->ep[i], -ECONNABORTED); -} - -static void handle_ep0(struct pxa25x_udc *dev) -{ - u32 udccs0 = readl(&dev->regs->udccs[0]); - struct pxa25x_ep *ep = &dev->ep[0]; - struct pxa25x_request *req; - union { - struct usb_ctrlrequest r; - u8 raw[8]; - u32 word[2]; - } u; - - if (list_empty(&ep->queue)) - req = NULL; - else - req = list_entry(ep->queue.next, struct pxa25x_request, queue); - - /* clear stall status */ - if (udccs0 & UDCCS0_SST) { - nuke(ep, -EPIPE); - writel(UDCCS0_SST, &dev->regs->udccs[0]); - stop_watchdog(dev); - ep0_idle(dev); - } - - /* previous request unfinished? non-error iff back-to-back ... */ - if ((udccs0 & UDCCS0_SA) != 0 && dev->ep0state != EP0_IDLE) { - nuke(ep, 0); - stop_watchdog(dev); - ep0_idle(dev); - } - - switch (dev->ep0state) { - case EP0_IDLE: - /* late-breaking status? */ - udccs0 = readl(&dev->regs->udccs[0]); - - /* start control request? */ - if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE)) - == (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))) { - int i; - - nuke(ep, -EPROTO); - - /* read SETUP packet */ - for (i = 0; i < 8; i++) { - if (unlikely(!(readl(&dev->regs->udccs[0]) & - UDCCS0_RNE))) { -bad_setup: - debug("SETUP %d!\n", i); - goto stall; - } - u.raw[i] = (u8)readb(&dev->regs->uddr0); - } - if (unlikely((readl(&dev->regs->udccs[0]) & - UDCCS0_RNE) != 0)) - goto bad_setup; - -got_setup: - debug("SETUP %02x.%02x v%04x i%04x l%04x\n", - u.r.bRequestType, u.r.bRequest, - le16_to_cpu(u.r.wValue), - le16_to_cpu(u.r.wIndex), - le16_to_cpu(u.r.wLength)); - - /* cope with automagic for some standard requests. */ - dev->req_std = (u.r.bRequestType & USB_TYPE_MASK) - == USB_TYPE_STANDARD; - dev->req_config = 0; - dev->req_pending = 1; - switch (u.r.bRequest) { - /* hardware restricts gadget drivers here! */ - case USB_REQ_SET_CONFIGURATION: - debug("GOT SET_CONFIGURATION\n"); - if (u.r.bRequestType == USB_RECIP_DEVICE) { - /* - * reflect hardware's automagic - * up to the gadget driver. - */ -config_change: - dev->req_config = 1; - clear_ep_state(dev); - /* - * if !has_cfr, there's no synch - * else use AREN (later) not SA|OPR - * USIR0_IR0 acts edge sensitive - */ - } - break; - /* ... and here, even more ... */ - case USB_REQ_SET_INTERFACE: - if (u.r.bRequestType == USB_RECIP_INTERFACE) { - /* - * udc hardware is broken by design: - * - altsetting may only be zero; - * - hw resets all interfaces' eps; - * - ep reset doesn't include halt(?). - */ - printf("broken set_interface (%d/%d)\n", - le16_to_cpu(u.r.wIndex), - le16_to_cpu(u.r.wValue)); - goto config_change; - } - break; - /* hardware was supposed to hide this */ - case USB_REQ_SET_ADDRESS: - debug("GOT SET ADDRESS\n"); - if (u.r.bRequestType == USB_RECIP_DEVICE) { - ep0start(dev, 0, "address"); - return; - } - break; - } - - if (u.r.bRequestType & USB_DIR_IN) - dev->ep0state = EP0_IN_DATA_PHASE; - else - dev->ep0state = EP0_OUT_DATA_PHASE; - - i = dev->driver->setup(&dev->gadget, &u.r); - if (i < 0) { - /* hardware automagic preventing STALL... */ - if (dev->req_config) { - /* - * hardware sometimes neglects to tell - * tell us about config change events, - * so later ones may fail... - */ - printf("config change %02x fail %d?\n", - u.r.bRequest, i); - return; - /* - * TODO experiment: if has_cfr, - * hardware didn't ACK; maybe we - * could actually STALL! - */ - } - if (0) { -stall: - /* uninitialized when goto stall */ - i = 0; - } - debug("protocol STALL, " - "%02x err %d\n", - readl(&dev->regs->udccs[0]), i); - - /* - * the watchdog timer helps deal with cases - * where udc seems to clear FST wrongly, and - * then NAKs instead of STALLing. - */ - ep0start(dev, UDCCS0_FST|UDCCS0_FTF, "stall"); - start_watchdog(dev); - dev->ep0state = EP0_STALL; - - /* deferred i/o == no response yet */ - } else if (dev->req_pending) { - if (likely(dev->ep0state == EP0_IN_DATA_PHASE - || dev->req_std || u.r.wLength)) - ep0start(dev, 0, "defer"); - else - ep0start(dev, UDCCS0_IPR, "defer/IPR"); - } - - /* expect at least one data or status stage irq */ - return; - - } else if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA)) - == (UDCCS0_OPR|UDCCS0_SA))) { - unsigned i; - - /* - * pxa210/250 erratum 131 for B0/B1 says RNE lies. - * still observed on a pxa255 a0. - */ - debug("e131\n"); - nuke(ep, -EPROTO); - - /* read SETUP data, but don't trust it too much */ - for (i = 0; i < 8; i++) - u.raw[i] = (u8)readb(&dev->regs->uddr0); - if ((u.r.bRequestType & USB_RECIP_MASK) - > USB_RECIP_OTHER) - goto stall; - if (u.word[0] == 0 && u.word[1] == 0) - goto stall; - goto got_setup; - } else { - /* - * some random early IRQ: - * - we acked FST - * - IPR cleared - * - OPR got set, without SA (likely status stage) - */ - debug("random IRQ %X %X\n", udccs0, - readl(&dev->regs->udccs[0])); - writel(udccs0 & (UDCCS0_SA|UDCCS0_OPR), - &dev->regs->udccs[0]); - } - break; - case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */ - if (udccs0 & UDCCS0_OPR) { - debug("ep0in premature status\n"); - if (req) - done(ep, req, 0); - ep0_idle(dev); - } else /* irq was IPR clearing */ { - if (req) { - debug("next ep0 in packet\n"); - /* this IN packet might finish the request */ - (void) write_ep0_fifo(ep, req); - } /* else IN token before response was written */ - } - break; - case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */ - if (udccs0 & UDCCS0_OPR) { - if (req) { - /* this OUT packet might finish the request */ - if (read_ep0_fifo(ep, req)) - done(ep, req, 0); - /* else more OUT packets expected */ - } /* else OUT token before read was issued */ - } else /* irq was IPR clearing */ { - debug("ep0out premature status\n"); - if (req) - done(ep, req, 0); - ep0_idle(dev); - } - break; - case EP0_END_XFER: - if (req) - done(ep, req, 0); - /* - * ack control-IN status (maybe in-zlp was skipped) - * also appears after some config change events. - */ - if (udccs0 & UDCCS0_OPR) - writel(UDCCS0_OPR, &dev->regs->udccs[0]); - ep0_idle(dev); - break; - case EP0_STALL: - writel(UDCCS0_FST, &dev->regs->udccs[0]); - break; - } - - writel(USIR0_IR0, &dev->regs->usir0); -} - -static void handle_ep(struct pxa25x_ep *ep) -{ - struct pxa25x_request *req; - int is_in = ep->bEndpointAddress & USB_DIR_IN; - int completed; - u32 udccs, tmp; - - do { - completed = 0; - if (likely(!list_empty(&ep->queue))) - req = list_entry(ep->queue.next, - struct pxa25x_request, queue); - else - req = NULL; - - /* TODO check FST handling */ - - udccs = readl(ep->reg_udccs); - if (unlikely(is_in)) { /* irq from TPC, SST, or (ISO) TUR */ - tmp = UDCCS_BI_TUR; - if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK)) - tmp |= UDCCS_BI_SST; - tmp &= udccs; - if (likely(tmp)) - writel(tmp, ep->reg_udccs); - if (req && likely((udccs & UDCCS_BI_TFS) != 0)) - completed = write_fifo(ep, req); - - } else { /* irq from RPC (or for ISO, ROF) */ - if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK)) - tmp = UDCCS_BO_SST | UDCCS_BO_DME; - else - tmp = UDCCS_IO_ROF | UDCCS_IO_DME; - tmp &= udccs; - if (likely(tmp)) - writel(tmp, ep->reg_udccs); - - /* fifos can hold packets, ready for reading... */ - if (likely(req)) - completed = read_fifo(ep, req); - else - pio_irq_disable(ep->bEndpointAddress); - } - ep->pio_irqs++; - } while (completed); -} - -/* - * pxa25x_udc_irq - interrupt handler - * - * avoid delays in ep0 processing. the control handshaking isn't always - * under software control (pxa250c0 and the pxa255 are better), and delays - * could cause usb protocol errors. - */ -static struct pxa25x_udc memory; -static int -pxa25x_udc_irq(void) -{ - struct pxa25x_udc *dev = &memory; - int handled; - - test_watchdog(dev); - - dev->stats.irqs++; - do { - u32 udccr = readl(&dev->regs->udccr); - - handled = 0; - - /* SUSpend Interrupt Request */ - if (unlikely(udccr & UDCCR_SUSIR)) { - udc_ack_int_UDCCR(UDCCR_SUSIR); - handled = 1; - debug("USB suspend\n"); - - if (dev->gadget.speed != USB_SPEED_UNKNOWN - && dev->driver - && dev->driver->suspend) - dev->driver->suspend(&dev->gadget); - ep0_idle(dev); - } - - /* RESume Interrupt Request */ - if (unlikely(udccr & UDCCR_RESIR)) { - udc_ack_int_UDCCR(UDCCR_RESIR); - handled = 1; - debug("USB resume\n"); - - if (dev->gadget.speed != USB_SPEED_UNKNOWN - && dev->driver - && dev->driver->resume) - dev->driver->resume(&dev->gadget); - } - - /* ReSeT Interrupt Request - USB reset */ - if (unlikely(udccr & UDCCR_RSTIR)) { - udc_ack_int_UDCCR(UDCCR_RSTIR); - handled = 1; - - if ((readl(&dev->regs->udccr) & UDCCR_UDA) == 0) { - debug("USB reset start\n"); - - /* - * reset driver and endpoints, - * in case that's not yet done - */ - stop_activity(dev, dev->driver); - - } else { - debug("USB reset end\n"); - dev->gadget.speed = USB_SPEED_FULL; - memset(&dev->stats, 0, sizeof dev->stats); - /* driver and endpoints are still reset */ - } - - } else { - u32 uicr0 = readl(&dev->regs->uicr0); - u32 uicr1 = readl(&dev->regs->uicr1); - u32 usir0 = readl(&dev->regs->usir0); - u32 usir1 = readl(&dev->regs->usir1); - - usir0 = usir0 & ~uicr0; - usir1 = usir1 & ~uicr1; - int i; - - if (unlikely(!usir0 && !usir1)) - continue; - - debug_cond(NOISY, "irq %02x.%02x\n", usir1, usir0); - - /* control traffic */ - if (usir0 & USIR0_IR0) { - dev->ep[0].pio_irqs++; - handle_ep0(dev); - handled = 1; - } - - /* endpoint data transfers */ - for (i = 0; i < 8; i++) { - u32 tmp = 1 << i; - - if (i && (usir0 & tmp)) { - handle_ep(&dev->ep[i]); - setbits_le32(&dev->regs->usir0, tmp); - handled = 1; - } -#ifndef CONFIG_USB_PXA25X_SMALL - if (usir1 & tmp) { - handle_ep(&dev->ep[i+8]); - setbits_le32(&dev->regs->usir1, tmp); - handled = 1; - } -#endif - } - } - - /* we could also ask for 1 msec SOF (SIR) interrupts */ - - } while (handled); - return IRQ_HANDLED; -} - -/*-------------------------------------------------------------------------*/ - -/* - * this uses load-time allocation and initialization (instead of - * doing it at run-time) to save code, eliminate fault paths, and - * be more obviously correct. - */ -static struct pxa25x_udc memory = { - .regs = UDC_REGS, - - .gadget = { - .ops = &pxa25x_udc_ops, - .ep0 = &memory.ep[0].ep, - .name = driver_name, - }, - - /* control endpoint */ - .ep[0] = { - .ep = { - .name = ep0name, - .ops = &pxa25x_ep_ops, - .maxpacket = EP0_FIFO_SIZE, - }, - .dev = &memory, - .reg_udccs = &UDC_REGS->udccs[0], - .reg_uddr = &UDC_REGS->uddr0, - }, - - /* first group of endpoints */ - .ep[1] = { - .ep = { - .name = "ep1in-bulk", - .ops = &pxa25x_ep_ops, - .maxpacket = BULK_FIFO_SIZE, - }, - .dev = &memory, - .fifo_size = BULK_FIFO_SIZE, - .bEndpointAddress = USB_DIR_IN | 1, - .bmAttributes = USB_ENDPOINT_XFER_BULK, - .reg_udccs = &UDC_REGS->udccs[1], - .reg_uddr = &UDC_REGS->uddr1, - }, - .ep[2] = { - .ep = { - .name = "ep2out-bulk", - .ops = &pxa25x_ep_ops, - .maxpacket = BULK_FIFO_SIZE, - }, - .dev = &memory, - .fifo_size = BULK_FIFO_SIZE, - .bEndpointAddress = 2, - .bmAttributes = USB_ENDPOINT_XFER_BULK, - .reg_udccs = &UDC_REGS->udccs[2], - .reg_ubcr = &UDC_REGS->ubcr2, - .reg_uddr = &UDC_REGS->uddr2, - }, -#ifndef CONFIG_USB_PXA25X_SMALL - .ep[3] = { - .ep = { - .name = "ep3in-iso", - .ops = &pxa25x_ep_ops, - .maxpacket = ISO_FIFO_SIZE, - }, - .dev = &memory, - .fifo_size = ISO_FIFO_SIZE, - .bEndpointAddress = USB_DIR_IN | 3, - .bmAttributes = USB_ENDPOINT_XFER_ISOC, - .reg_udccs = &UDC_REGS->udccs[3], - .reg_uddr = &UDC_REGS->uddr3, - }, - .ep[4] = { - .ep = { - .name = "ep4out-iso", - .ops = &pxa25x_ep_ops, - .maxpacket = ISO_FIFO_SIZE, - }, - .dev = &memory, - .fifo_size = ISO_FIFO_SIZE, - .bEndpointAddress = 4, - .bmAttributes = USB_ENDPOINT_XFER_ISOC, - .reg_udccs = &UDC_REGS->udccs[4], - .reg_ubcr = &UDC_REGS->ubcr4, - .reg_uddr = &UDC_REGS->uddr4, - }, - .ep[5] = { - .ep = { - .name = "ep5in-int", - .ops = &pxa25x_ep_ops, - .maxpacket = INT_FIFO_SIZE, - }, - .dev = &memory, - .fifo_size = INT_FIFO_SIZE, - .bEndpointAddress = USB_DIR_IN | 5, - .bmAttributes = USB_ENDPOINT_XFER_INT, - .reg_udccs = &UDC_REGS->udccs[5], - .reg_uddr = &UDC_REGS->uddr5, - }, - - /* second group of endpoints */ - .ep[6] = { - .ep = { - .name = "ep6in-bulk", - .ops = &pxa25x_ep_ops, - .maxpacket = BULK_FIFO_SIZE, - }, - .dev = &memory, - .fifo_size = BULK_FIFO_SIZE, - .bEndpointAddress = USB_DIR_IN | 6, - .bmAttributes = USB_ENDPOINT_XFER_BULK, - .reg_udccs = &UDC_REGS->udccs[6], - .reg_uddr = &UDC_REGS->uddr6, - }, - .ep[7] = { - .ep = { - .name = "ep7out-bulk", - .ops = &pxa25x_ep_ops, - .maxpacket = BULK_FIFO_SIZE, - }, - .dev = &memory, - .fifo_size = BULK_FIFO_SIZE, - .bEndpointAddress = 7, - .bmAttributes = USB_ENDPOINT_XFER_BULK, - .reg_udccs = &UDC_REGS->udccs[7], - .reg_ubcr = &UDC_REGS->ubcr7, - .reg_uddr = &UDC_REGS->uddr7, - }, - .ep[8] = { - .ep = { - .name = "ep8in-iso", - .ops = &pxa25x_ep_ops, - .maxpacket = ISO_FIFO_SIZE, - }, - .dev = &memory, - .fifo_size = ISO_FIFO_SIZE, - .bEndpointAddress = USB_DIR_IN | 8, - .bmAttributes = USB_ENDPOINT_XFER_ISOC, - .reg_udccs = &UDC_REGS->udccs[8], - .reg_uddr = &UDC_REGS->uddr8, - }, - .ep[9] = { - .ep = { - .name = "ep9out-iso", - .ops = &pxa25x_ep_ops, - .maxpacket = ISO_FIFO_SIZE, - }, - .dev = &memory, - .fifo_size = ISO_FIFO_SIZE, - .bEndpointAddress = 9, - .bmAttributes = USB_ENDPOINT_XFER_ISOC, - .reg_udccs = &UDC_REGS->udccs[9], - .reg_ubcr = &UDC_REGS->ubcr9, - .reg_uddr = &UDC_REGS->uddr9, - }, - .ep[10] = { - .ep = { - .name = "ep10in-int", - .ops = &pxa25x_ep_ops, - .maxpacket = INT_FIFO_SIZE, - }, - .dev = &memory, - .fifo_size = INT_FIFO_SIZE, - .bEndpointAddress = USB_DIR_IN | 10, - .bmAttributes = USB_ENDPOINT_XFER_INT, - .reg_udccs = &UDC_REGS->udccs[10], - .reg_uddr = &UDC_REGS->uddr10, - }, - - /* third group of endpoints */ - .ep[11] = { - .ep = { - .name = "ep11in-bulk", - .ops = &pxa25x_ep_ops, - .maxpacket = BULK_FIFO_SIZE, - }, - .dev = &memory, - .fifo_size = BULK_FIFO_SIZE, - .bEndpointAddress = USB_DIR_IN | 11, - .bmAttributes = USB_ENDPOINT_XFER_BULK, - .reg_udccs = &UDC_REGS->udccs[11], - .reg_uddr = &UDC_REGS->uddr11, - }, - .ep[12] = { - .ep = { - .name = "ep12out-bulk", - .ops = &pxa25x_ep_ops, - .maxpacket = BULK_FIFO_SIZE, - }, - .dev = &memory, - .fifo_size = BULK_FIFO_SIZE, - .bEndpointAddress = 12, - .bmAttributes = USB_ENDPOINT_XFER_BULK, - .reg_udccs = &UDC_REGS->udccs[12], - .reg_ubcr = &UDC_REGS->ubcr12, - .reg_uddr = &UDC_REGS->uddr12, - }, - .ep[13] = { - .ep = { - .name = "ep13in-iso", - .ops = &pxa25x_ep_ops, - .maxpacket = ISO_FIFO_SIZE, - }, - .dev = &memory, - .fifo_size = ISO_FIFO_SIZE, - .bEndpointAddress = USB_DIR_IN | 13, - .bmAttributes = USB_ENDPOINT_XFER_ISOC, - .reg_udccs = &UDC_REGS->udccs[13], - .reg_uddr = &UDC_REGS->uddr13, - }, - .ep[14] = { - .ep = { - .name = "ep14out-iso", - .ops = &pxa25x_ep_ops, - .maxpacket = ISO_FIFO_SIZE, - }, - .dev = &memory, - .fifo_size = ISO_FIFO_SIZE, - .bEndpointAddress = 14, - .bmAttributes = USB_ENDPOINT_XFER_ISOC, - .reg_udccs = &UDC_REGS->udccs[14], - .reg_ubcr = &UDC_REGS->ubcr14, - .reg_uddr = &UDC_REGS->uddr14, - }, - .ep[15] = { - .ep = { - .name = "ep15in-int", - .ops = &pxa25x_ep_ops, - .maxpacket = INT_FIFO_SIZE, - }, - .dev = &memory, - .fifo_size = INT_FIFO_SIZE, - .bEndpointAddress = USB_DIR_IN | 15, - .bmAttributes = USB_ENDPOINT_XFER_INT, - .reg_udccs = &UDC_REGS->udccs[15], - .reg_uddr = &UDC_REGS->uddr15, - }, -#endif /* !CONFIG_USB_PXA25X_SMALL */ -}; - -static void udc_command(int cmd) -{ - switch (cmd) { - case PXA2XX_UDC_CMD_CONNECT: - setbits_le32(GPDR(CONFIG_USB_DEV_PULLUP_GPIO), - GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO)); - - /* enable pullup */ - writel(GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), - GPCR(CONFIG_USB_DEV_PULLUP_GPIO)); - - debug("Connected to USB\n"); - break; - - case PXA2XX_UDC_CMD_DISCONNECT: - /* disable pullup resistor */ - writel(GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), - GPSR(CONFIG_USB_DEV_PULLUP_GPIO)); - - /* setup pin as input, line will float */ - clrbits_le32(GPDR(CONFIG_USB_DEV_PULLUP_GPIO), - GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO)); - - debug("Disconnected from USB\n"); - break; - } -} - -static struct pxa2xx_udc_mach_info mach_info = { - .udc_command = udc_command, -}; - -/* - * when a driver is successfully registered, it will receive - * control requests including set_configuration(), which enables - * non-control requests. then usb traffic follows until a - * disconnect is reported. then a host may connect again, or - * the driver might get unbound. - */ -int usb_gadget_register_driver(struct usb_gadget_driver *driver) -{ - struct pxa25x_udc *dev = &memory; - int retval; - uint32_t chiprev; - - if (!driver - || driver->speed < USB_SPEED_FULL - || !driver->disconnect - || !driver->setup) - return -EINVAL; - if (!dev) - return -ENODEV; - if (dev->driver) - return -EBUSY; - - /* Enable clock for usb controller */ - setbits_le32(CKEN, CKEN11_USB); - - /* first hook up the driver ... */ - dev->driver = driver; - dev->pullup = 1; - - /* trigger chiprev-specific logic */ - switch ((chiprev = pxa_get_cpu_revision())) { - case PXA255_A0: - dev->has_cfr = 1; - break; - case PXA250_A0: - case PXA250_A1: - /* A0/A1 "not released"; ep 13, 15 unusable */ - /* fall through */ - case PXA250_B2: case PXA210_B2: - case PXA250_B1: case PXA210_B1: - case PXA250_B0: case PXA210_B0: - /* OUT-DMA is broken ... */ - /* fall through */ - case PXA250_C0: case PXA210_C0: - break; - default: - printf("%s: unrecognized processor: %08x\n", - DRIVER_NAME, chiprev); - return -ENODEV; - } - - the_controller = dev; - - /* prepare watchdog timer */ - dev->watchdog.running = 0; - dev->watchdog.period = 5000 * CONFIG_SYS_HZ / 1000000; /* 5 ms */ - dev->watchdog.function = udc_watchdog; - - dev->mach = &mach_info; - - udc_disable(dev); - udc_reinit(dev); - - dev->gadget.name = "pxa2xx_udc"; - retval = driver->bind(&dev->gadget); - if (retval) { - printf("bind to driver %s --> error %d\n", - DRIVER_NAME, retval); - dev->driver = NULL; - return retval; - } - - /* - * ... then enable host detection and ep0; and we're ready - * for set_configuration as well as eventual disconnect. - */ - printf("registered gadget driver '%s'\n", DRIVER_NAME); - - pullup(dev); - dump_state(dev); - return 0; -} - -static void -stop_activity(struct pxa25x_udc *dev, struct usb_gadget_driver *driver) -{ - int i; - - /* don't disconnect drivers more than once */ - if (dev->gadget.speed == USB_SPEED_UNKNOWN) - driver = NULL; - dev->gadget.speed = USB_SPEED_UNKNOWN; - - /* prevent new request submissions, kill any outstanding requests */ - for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) { - struct pxa25x_ep *ep = &dev->ep[i]; - - ep->stopped = 1; - nuke(ep, -ESHUTDOWN); - } - stop_watchdog(dev); - - /* report disconnect; the driver is already quiesced */ - if (driver) - driver->disconnect(&dev->gadget); - - /* re-init driver-visible data structures */ - udc_reinit(dev); -} - -int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) -{ - struct pxa25x_udc *dev = the_controller; - - if (!dev) - return -ENODEV; - if (!driver || driver != dev->driver || !driver->unbind) - return -EINVAL; - - local_irq_disable(); - dev->pullup = 0; - pullup(dev); - stop_activity(dev, driver); - local_irq_enable(); - - driver->unbind(&dev->gadget); - dev->driver = NULL; - - printf("unregistered gadget driver '%s'\n", DRIVER_NAME); - dump_state(dev); - - the_controller = NULL; - - clrbits_le32(CKEN, CKEN11_USB); - - return 0; -} - -extern void udc_disconnect(void) -{ - setbits_le32(CKEN, CKEN11_USB); - udc_clear_mask_UDCCR(UDCCR_UDE); - udc_command(PXA2XX_UDC_CMD_DISCONNECT); - clrbits_le32(CKEN, CKEN11_USB); -} - -/*-------------------------------------------------------------------------*/ - -extern int -usb_gadget_handle_interrupts(int index) -{ - return pxa25x_udc_irq(); -} diff --git a/drivers/usb/gadget/pxa25x_udc.h b/drivers/usb/gadget/pxa25x_udc.h deleted file mode 100644 index 7c3882aa1e0..00000000000 --- a/drivers/usb/gadget/pxa25x_udc.h +++ /dev/null @@ -1,149 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Intel PXA25x on-chip full speed USB device controller - * - * Copyright (C) 2003 Robert Schwebel , Pengutronix - * Copyright (C) 2003 David Brownell - * Copyright (C) 2012 Lukasz Dalek - */ - -#ifndef __LINUX_USB_GADGET_PXA25X_H -#define __LINUX_USB_GADGET_PXA25X_H - -#include -#include - -/* - * Prefetching support - only ARMv5. - */ - -#ifdef ARCH_HAS_PREFETCH -static inline void prefetch(const void *ptr) -{ - __asm__ __volatile__( - "pld\t%a0" - : - : "p" (ptr) - : "cc"); -} - -#define prefetchw(ptr) prefetch(ptr) -#endif /* ARCH_HAS_PREFETCH */ - -/*-------------------------------------------------------------------------*/ - -#define UDC_REGS ((struct pxa25x_udc_regs *)PXA25X_UDC_BASE) - -/*-------------------------------------------------------------------------*/ - -struct pxa2xx_udc_mach_info { - int (*udc_is_connected)(void); /* do we see host? */ - void (*udc_command)(int cmd); -#define PXA2XX_UDC_CMD_CONNECT 0 /* let host see us */ -#define PXA2XX_UDC_CMD_DISCONNECT 1 /* so host won't see us */ -}; - -struct pxa25x_udc; - -struct pxa25x_ep { - struct usb_ep ep; - struct pxa25x_udc *dev; - - const struct usb_endpoint_descriptor *desc; - struct list_head queue; - unsigned long pio_irqs; - - unsigned short fifo_size; - u8 bEndpointAddress; - u8 bmAttributes; - - unsigned stopped:1; - - /* UDCCS = UDC Control/Status for this EP - * UBCR = UDC Byte Count Remaining (contents of OUT fifo) - * UDDR = UDC Endpoint Data Register (the fifo) - * DRCM = DMA Request Channel Map - */ - u32 *reg_udccs; - u32 *reg_ubcr; - u32 *reg_uddr; -}; - -struct pxa25x_request { - struct usb_request req; - struct list_head queue; -}; - -enum ep0_state { - EP0_IDLE, - EP0_IN_DATA_PHASE, - EP0_OUT_DATA_PHASE, - EP0_END_XFER, - EP0_STALL, -}; - -#define EP0_FIFO_SIZE 16U -#define BULK_FIFO_SIZE 64U -#define ISO_FIFO_SIZE 256U -#define INT_FIFO_SIZE 8U - -struct udc_stats { - struct ep0stats { - unsigned long ops; - unsigned long bytes; - } read, write; - unsigned long irqs; -}; - -#ifdef CONFIG_USB_PXA25X_SMALL -/* when memory's tight, SMALL config saves code+data. */ -#define PXA_UDC_NUM_ENDPOINTS 3 -#endif - -#ifndef PXA_UDC_NUM_ENDPOINTS -#define PXA_UDC_NUM_ENDPOINTS 16 -#endif - -struct pxa25x_watchdog { - unsigned running:1; - ulong period; - ulong base; - struct pxa25x_udc *udc; - - void (*function)(struct pxa25x_udc *udc); -}; - -struct pxa25x_udc { - struct usb_gadget gadget; - struct usb_gadget_driver *driver; - struct pxa25x_udc_regs *regs; - - enum ep0_state ep0state; - struct udc_stats stats; - unsigned got_irq:1, - pullup:1, - has_cfr:1, - req_pending:1, - req_std:1, - req_config:1, - active:1; - - struct clk *clk; - struct pxa2xx_udc_mach_info *mach; - u64 dma_mask; - struct pxa25x_ep ep[PXA_UDC_NUM_ENDPOINTS]; - - struct pxa25x_watchdog watchdog; -}; - -/*-------------------------------------------------------------------------*/ - -static struct pxa25x_udc *the_controller; - -/*-------------------------------------------------------------------------*/ - -#ifndef DEBUG -# define NOISY 0 -#endif - -#endif /* __LINUX_USB_GADGET_PXA25X_H */ diff --git a/include/dm/platform_data/serial_pxa.h b/include/dm/platform_data/serial_pxa.h index 0d7dc4c462d..e1a02aed28e 100644 --- a/include/dm/platform_data/serial_pxa.h +++ b/include/dm/platform_data/serial_pxa.h @@ -16,13 +16,6 @@ #define BTUART_INDEX 0 #define FFUART_INDEX 1 #define STUART_INDEX 2 -#elif CONFIG_CPU_PXA25X -#define UART_CLK_BASE BIT(4) /* HWUART */ -#define UART_CLK_REG CKEN -#define HWUART_INDEX 0 -#define STUART_INDEX 1 -#define FFUART_INDEX 2 -#define BTUART_INDEX 3 #else /* PXA27x */ #define UART_CLK_BASE CKEN5_STUART #define UART_CLK_REG CKEN @@ -31,14 +24,6 @@ #define BTUART_INDEX 2 #endif -/* - * Only PXA250 has HWUART, to avoid poluting the code with more macros, - * artificially introduce this. - */ -#ifndef CONFIG_CPU_PXA25X -#define HWUART_INDEX 0xff -#endif - /* * struct pxa_serial_plat - information about a PXA port * diff --git a/include/lcd.h b/include/lcd.h index 51a79317bba..7570e7ac609 100644 --- a/include/lcd.h +++ b/include/lcd.h @@ -40,8 +40,7 @@ ulong lcd_setmem(ulong addr); */ void lcd_set_flush_dcache(int flush); -#if defined(CONFIG_CPU_PXA25X) || defined(CONFIG_CPU_PXA27X) || \ - defined CONFIG_CPU_MONAHANS +#if defined(CONFIG_CPU_PXA27X) || defined CONFIG_CPU_MONAHANS #include #elif defined(CONFIG_ATMEL_LCD) || defined(CONFIG_ATMEL_HLCD) #include -- GitLab From 3b2979eefaeb46d2f978e13c33bb88ec0e7ee09a Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 24 May 2022 09:57:18 -0400 Subject: [PATCH 024/581] mvebu: Use CONFIG_SPL_STACK + 4 directly for bootparam location The definition of CONFIG_SPL_BOOTROM_SAVE is always a fixed CONFIG_SPL_STACK + 4, while CONFIG_SPL_STACK is not constant. This change will make it clear where the location is still, once CONFIG_SPL_STACK moves to Kconfig. Cc: Stefan Roese Signed-off-by: Tom Rini --- arch/arm/mach-mvebu/lowlevel_spl.S | 8 ++++---- arch/arm/mach-mvebu/spl.c | 2 +- include/configs/clearfog.h | 1 - include/configs/controlcenterdc.h | 1 - include/configs/db-88f6720.h | 1 - include/configs/db-88f6820-amc.h | 1 - include/configs/db-88f6820-gp.h | 1 - include/configs/db-mv784mp-gp.h | 1 - include/configs/ds414.h | 1 - include/configs/helios4.h | 1 - include/configs/maxbcm.h | 1 - include/configs/theadorable.h | 1 - include/configs/turris_omnia.h | 1 - include/configs/x530.h | 1 - 14 files changed, 5 insertions(+), 17 deletions(-) diff --git a/arch/arm/mach-mvebu/lowlevel_spl.S b/arch/arm/mach-mvebu/lowlevel_spl.S index 501c239e9d3..49891df9ea9 100644 --- a/arch/arm/mach-mvebu/lowlevel_spl.S +++ b/arch/arm/mach-mvebu/lowlevel_spl.S @@ -8,19 +8,19 @@ * contains U-Boot SPL, optionally it can also contain additional arguments. * The number of these arguments is in r0, pointer to the argument array in r1. * BootROM expects executable BIN header code to return to address stored in lr. - * Other registers (r2 - r12) must be preserved. We save all registers to - * CONFIG_SPL_BOOTROM_SAVE address. BIN header arguments (passed via r0 and r1) + * Other registers (r2 - r12) must be preserved. We save all registers to the + * address of CONFIG_SPL_STACK + 4. BIN header arguments (passed via r0 and r1) * are currently not used by U-Boot SPL binary. */ ENTRY(save_boot_params) stmfd sp!, {r0 - r12, lr} /* @ save registers on stack */ - ldr r12, =CONFIG_SPL_BOOTROM_SAVE + ldr r12, =(CONFIG_SPL_STACK + 4) str sp, [r12] b save_boot_params_ret ENDPROC(save_boot_params) ENTRY(return_to_bootrom) - ldr r12, =CONFIG_SPL_BOOTROM_SAVE + ldr r12, =(CONFIG_SPL_STACK + 4) ldr sp, [r12] ldmfd sp!, {r0 - r12, lr} /* @ restore registers from stack */ mov r0, #0x0 /* @ return value: 0x0 NO_ERR */ diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c index fa9a1d7ab65..13c99913c38 100644 --- a/arch/arm/mach-mvebu/spl.c +++ b/arch/arm/mach-mvebu/spl.c @@ -283,7 +283,7 @@ u32 spl_boot_device(void) int board_return_to_bootrom(struct spl_image_info *spl_image, struct spl_boot_device *bootdev) { - u32 *regs = *(u32 **)CONFIG_SPL_BOOTROM_SAVE; + u32 *regs = *(u32 **)(CONFIG_SPL_STACK + 4); printf("Returning to BootROM (return address 0x%08x)...\n", regs[13]); return_to_bootrom(); diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h index b67a31981b0..6cf44877601 100644 --- a/include/configs/clearfog.h +++ b/include/configs/clearfog.h @@ -48,7 +48,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) -#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) #if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA) /* SPL related MMC defines */ diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h index 08eb0dbbf95..78b7d4f17f2 100644 --- a/include/configs/controlcenterdc.h +++ b/include/configs/controlcenterdc.h @@ -40,7 +40,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) #define CONFIG_SPL_STACK (0x40000000 + ((212 - 16) << 10)) -#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD /* SPL related MMC defines */ diff --git a/include/configs/db-88f6720.h b/include/configs/db-88f6720.h index 89786044c83..eeaae1fdabc 100644 --- a/include/configs/db-88f6720.h +++ b/include/configs/db-88f6720.h @@ -38,6 +38,5 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) -#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) #endif /* _CONFIG_DB_88F6720_H */ diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h index 56fd872272d..cb2050015e0 100644 --- a/include/configs/db-88f6820-amc.h +++ b/include/configs/db-88f6820-amc.h @@ -45,7 +45,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) -#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) /* * mv-common.h should be defined after CMD configs since it used them diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index 0c42ef415da..e1a97daeac8 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -45,7 +45,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) -#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD /* SPL related MMC defines */ diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index 4e0563dd5da..2ec9afe8e84 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -57,7 +57,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) -#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ #define CONFIG_SPD_EEPROM 0x4e diff --git a/include/configs/ds414.h b/include/configs/ds414.h index 41f72eef4fc..3eff94f116e 100644 --- a/include/configs/ds414.h +++ b/include/configs/ds414.h @@ -49,7 +49,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) -#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) /* Default Environment */ diff --git a/include/configs/helios4.h b/include/configs/helios4.h index aed4d7e8f53..e90cea374b2 100644 --- a/include/configs/helios4.h +++ b/include/configs/helios4.h @@ -48,7 +48,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) -#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) #if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA) /* SPL related MMC defines */ diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index 0eaf08e18c9..939046f6de8 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -52,7 +52,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) -#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) /* SPL related SPI defines */ diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h index 8e13b47eab9..626261d0742 100644 --- a/include/configs/theadorable.h +++ b/include/configs/theadorable.h @@ -77,7 +77,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) -#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ #define CONFIG_SYS_SDRAM_SIZE SZ_2G diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h index fbdd2a4f08d..089828fa3d1 100644 --- a/include/configs/turris_omnia.h +++ b/include/configs/turris_omnia.h @@ -32,7 +32,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) -#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) #ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC /* SPL related MMC defines */ diff --git a/include/configs/x530.h b/include/configs/x530.h index 5065eb87a39..601a7ee7d4f 100644 --- a/include/configs/x530.h +++ b/include/configs/x530.h @@ -72,6 +72,5 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) -#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) #endif /* _CONFIG_X530_H */ -- GitLab From 85758d8aa1337fdba794e235df7ecf5d2118f05e Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 24 May 2022 13:11:41 -0400 Subject: [PATCH 025/581] arm: Use CONFIG_SPL_STACK or CONFIG_SYS_INIT_SP_ADDR directly. In some cases, we define CONFIG_SYS_INIT_SP_ADDR differently for SPL or full U-Boot. This case should be making use of CONFIG_SPL_STACK, as that's what that variable is for. In a few other cases we define CONFIG_SPL_STACK directly to CONFIG_SYS_INIT_SP_ADDR, but do not need to as the code handles this correctly, normally. Signed-off-by: Tom Rini --- include/configs/imxrt1020-evk.h | 5 ----- include/configs/imxrt1050-evk.h | 5 ----- include/configs/sam9x60_curiosity.h | 5 +---- include/configs/sama5d27_som1_ek.h | 5 +---- include/configs/sama5d27_wlsom1_ek.h | 5 +---- include/configs/sama5d2_icp.h | 5 +---- include/configs/sama5d2_xplained.h | 5 +---- include/configs/sama5d3_xplained.h | 5 +---- include/configs/sama5d3xek.h | 5 +---- include/configs/sama5d4_xplained.h | 5 +---- include/configs/sama5d4ek.h | 5 +---- include/configs/sama7g5ek.h | 5 +---- include/configs/smartweb.h | 5 +---- include/configs/socfpga_soc64_common.h | 10 +++------- include/configs/stm32f746-disco.h | 5 ----- 15 files changed, 14 insertions(+), 66 deletions(-) diff --git a/include/configs/imxrt1020-evk.h b/include/configs/imxrt1020-evk.h index 79feab389e3..afae6a4e387 100644 --- a/include/configs/imxrt1020-evk.h +++ b/include/configs/imxrt1020-evk.h @@ -24,12 +24,7 @@ * Configuration of the external SDRAM memory */ -/* For SPL */ -#ifdef CONFIG_SUPPORT_SPL -#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR #define CONFIG_SYS_SPL_LEN 0x00008000 #define CONFIG_SYS_UBOOT_START 0x800023FD -#endif -/* For SPL ends */ #endif /* __IMXRT1020_EVK_H */ diff --git a/include/configs/imxrt1050-evk.h b/include/configs/imxrt1050-evk.h index 5c2f975ba7f..4b341a349c2 100644 --- a/include/configs/imxrt1050-evk.h +++ b/include/configs/imxrt1050-evk.h @@ -31,12 +31,7 @@ * Configuration of the external SDRAM memory */ -/* For SPL */ -#ifdef CONFIG_SUPPORT_SPL -#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR #define CONFIG_SYS_SPL_LEN 0x00008000 #define CONFIG_SYS_UBOOT_START 0x800023FD -#endif -/* For SPL ends */ #endif /* __IMXRT1050_EVK_H */ diff --git a/include/configs/sam9x60_curiosity.h b/include/configs/sam9x60_curiosity.h index 2708711a4eb..aa3feb4a367 100644 --- a/include/configs/sam9x60_curiosity.h +++ b/include/configs/sam9x60_curiosity.h @@ -20,12 +20,9 @@ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x8000000 /* 128 MB */ -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_INIT_SP_ADDR 0x218000 -#else +#define CONFIG_SPL_STACK 0x218000 #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_SDRAM_BASE + 16 * 1024 + CONFIG_SYS_MALLOC_F_LEN - \ GENERATED_GBL_DATA_SIZE) -#endif #endif diff --git a/include/configs/sama5d27_som1_ek.h b/include/configs/sama5d27_som1_ek.h index eb29f211ef0..933dcace9d7 100644 --- a/include/configs/sama5d27_som1_ek.h +++ b/include/configs/sama5d27_som1_ek.h @@ -14,14 +14,11 @@ #undef CONFIG_SYS_AT91_MAIN_CLOCK #define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_INIT_SP_ADDR 0x218000 -#else #define CONFIG_SYS_INIT_SP_ADDR \ (0x22000000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE) -#endif /* SPL */ +#define CONFIG_SPL_STACK 0x218000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/sama5d27_wlsom1_ek.h b/include/configs/sama5d27_wlsom1_ek.h index 54ef48ce3ed..9bf7016acaf 100644 --- a/include/configs/sama5d27_wlsom1_ek.h +++ b/include/configs/sama5d27_wlsom1_ek.h @@ -19,14 +19,11 @@ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x10000000 -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_INIT_SP_ADDR 0x218000 -#else #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) -#endif /* SPL */ +#define CONFIG_SPL_STACK 0x218000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/sama5d2_icp.h b/include/configs/sama5d2_icp.h index bd24d5743d4..09cc53ef122 100644 --- a/include/configs/sama5d2_icp.h +++ b/include/configs/sama5d2_icp.h @@ -18,12 +18,9 @@ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_INIT_SP_ADDR 0x218000 -#else +#define CONFIG_SPL_STACK 0x218000 #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) -#endif #ifdef CONFIG_SD_BOOT /* u-boot env in sd/mmc card */ diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h index c4774db89e7..99bc2a16231 100644 --- a/include/configs/sama5d2_xplained.h +++ b/include/configs/sama5d2_xplained.h @@ -11,14 +11,11 @@ #include "at91-sama5_common.h" -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_INIT_SP_ADDR 0x218000 -#else #define CONFIG_SYS_INIT_SP_ADDR \ (0x22000000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE) -#endif /* SPL */ +#define CONFIG_SPL_STACK 0x218000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index d59b8b138aa..6f5fb994e0f 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -27,12 +27,9 @@ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x10000000 -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_INIT_SP_ADDR 0x318000 -#else +#define CONFIG_SPL_STACK 0x318000 #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) -#endif /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index dabbe73e646..28493dc377c 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -38,12 +38,9 @@ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_INIT_SP_ADDR 0x318000 -#else +#define CONFIG_SPL_STACK 0x318000 #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) -#endif /* SerialFlash */ diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h index 74213203454..2839a12061a 100644 --- a/include/configs/sama5d4_xplained.h +++ b/include/configs/sama5d4_xplained.h @@ -15,12 +15,9 @@ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_INIT_SP_ADDR 0x218000 -#else +#define CONFIG_SPL_STACK 0x218000 #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) -#endif /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h index b34d6c72641..b8b6ad27786 100644 --- a/include/configs/sama5d4ek.h +++ b/include/configs/sama5d4ek.h @@ -15,12 +15,9 @@ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_INIT_SP_ADDR 0x218000 -#else +#define CONFIG_SPL_STACK 0x218000 #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) -#endif /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/sama7g5ek.h b/include/configs/sama7g5ek.h index bca7166cb9b..9bb4a09895a 100644 --- a/include/configs/sama7g5ek.h +++ b/include/configs/sama7g5ek.h @@ -16,12 +16,9 @@ #define CONFIG_SYS_SDRAM_BASE 0x60000000 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_INIT_SP_ADDR 0x218000 -#else +#define CONFIG_SPL_STACK 0x218000 #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_SDRAM_BASE + 16 * 1024 + CONFIG_SYS_MALLOC_F_LEN - \ GENERATED_GBL_DATA_SIZE) -#endif #endif diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 64b55a251d7..3b2803f033a 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -104,9 +104,6 @@ \ "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_INIT_SP_ADDR 0x301000 -#else /* * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, * leaving the correct space for initial global data structure above that @@ -114,10 +111,10 @@ */ #define CONFIG_SYS_INIT_SP_ADDR \ (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) -#endif /* Defines for SPL */ +#define CONFIG_SPL_STACK 0x301000 #define CONFIG_SPL_BSS_START_ADDR CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index c399ba36c08..022e0881cb3 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -29,14 +29,8 @@ */ #define CONFIG_SYS_INIT_RAM_ADDR 0xFFE00000 #define CONFIG_SYS_INIT_RAM_SIZE 0x40000 -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR \ - + CONFIG_SYS_INIT_RAM_SIZE \ - - SOC64_HANDOFF_SIZE) -#else #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE \ + 0x100000) -#endif #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_SP_ADDR) /* @@ -153,7 +147,9 @@ unsigned int cm_get_l4_sys_free_clk_hz(void); * */ #define CONFIG_SPL_TARGET "spl/u-boot-spl-dtb.hex" -#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR +#define CONFIG_SPL_STACK (CONFIG_SYS_INIT_RAM_ADDR \ + + CONFIG_SYS_INIT_RAM_SIZE \ + - SOC64_HANDOFF_SIZE) #define CONFIG_SPL_BSS_START_ADDR (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE \ - CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE (CONFIG_SYS_MALLOC_LEN) diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h index 261e4c8b5ad..3ce8c786abf 100644 --- a/include/configs/stm32f746-disco.h +++ b/include/configs/stm32f746-disco.h @@ -39,9 +39,6 @@ "ramdisk_addr_r=0xC0438000\0" \ BOOTENV -/* For SPL */ -#ifdef CONFIG_SUPPORT_SPL -#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_SPL_LEN 0x00008000 #define CONFIG_SYS_UBOOT_START 0x080083FD @@ -51,8 +48,6 @@ /* DT blob (fdt) address */ #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \ 0x1C0000) -#endif -/* For SPL ends */ /* For splashcreen */ -- GitLab From 68eed5bb1cc5581e6347c9e961de84de1510712a Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 24 May 2022 13:23:40 -0400 Subject: [PATCH 026/581] arm: Stop using CONFIG_SYS_GBL_DATA_OFFSET This value is only referenced by PowerPC code in a way other than directly as CONFIG_SYS_INIT_SP_ADDR. Switch to CONFIG_SYS_INIT_SP_ADDR directly. Signed-off-by: Tom Rini --- include/configs/integrator-common.h | 3 +-- include/configs/vexpress_common.h | 3 +-- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/include/configs/integrator-common.h b/include/configs/integrator-common.h index d578b024605..927daa71ad1 100644 --- a/include/configs/integrator-common.h +++ b/include/configs/integrator-common.h @@ -32,10 +32,9 @@ #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \ +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET /* * FLASH and environment organization diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index f27280af99e..86cb56e7a18 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -139,10 +139,9 @@ /* additions for new relocation code */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \ +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET /* Basic environment settings */ #define BOOT_TARGET_DEVICES(func) \ -- GitLab From 06ddcfc95a0eb1cf17c1436bfeb3cc4d056fdb3a Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 24 May 2022 13:40:05 -0400 Subject: [PATCH 027/581] m68k: Stop using CONFIG_SYS_GBL_DATA_OFFSET This value is only referenced by PowerPC code in a way other than directly as CONFIG_SYS_INIT_SP_ADDR. Switch to CONFIG_SYS_INIT_SP_ADDR directly. Signed-off-by: Tom Rini --- include/configs/M5208EVBE.h | 3 +-- include/configs/M5235EVB.h | 3 +-- include/configs/M5249EVB.h | 3 +-- include/configs/M5253DEMO.h | 3 +-- include/configs/M5272C3.h | 3 +-- include/configs/M5275EVB.h | 3 +-- include/configs/M5282EVB.h | 3 +-- include/configs/M53017EVB.h | 3 +-- include/configs/M5329EVB.h | 3 +-- include/configs/M5373EVB.h | 3 +-- include/configs/amcore.h | 3 +-- include/configs/astro_mcf5373l.h | 3 +-- include/configs/cobra5272.h | 3 +-- include/configs/eb_cpu5282.h | 3 +-- include/configs/stmark2.h | 3 +-- 15 files changed, 15 insertions(+), 30 deletions(-) diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index 4ca71ad41ba..04b39cb3d39 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -65,8 +65,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in internal SRAM */ #define CONFIG_SYS_INIT_RAM_CTRL 0x221 -#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 0x10) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 0x10) /* * Start addresses for the final memory configuration diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 68b695c6fbb..c69de822e75 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -75,8 +75,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */ #define CONFIG_SYS_INIT_RAM_CTRL 0x21 -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE - 0x10) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE - 0x10) /*----------------------------------------------------------------------- * Start addresses for the final memory configuration diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index 64eae702160..97b2ce19437 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -44,8 +44,7 @@ */ #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define LDS_BOARD_TEXT \ . = DEFINED(env_offset) ? env_offset : .; \ diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index e81768441ec..939e0ba18f1 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -79,8 +79,7 @@ */ #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /* * Start addresses for the final memory configuration diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index bd4c531751e..4c13f4dd43f 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -76,8 +76,7 @@ */ #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /*----------------------------------------------------------------------- * Start addresses for the final memory configuration diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 99412aabdec..0520869050d 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -78,8 +78,7 @@ */ #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /*----------------------------------------------------------------------- * Start addresses for the final memory configuration diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index c0358ccc526..d4a429cd6b0 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -77,8 +77,7 @@ */ #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /*----------------------------------------------------------------------- * Start addresses for the final memory configuration diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index 15173d49b00..32799c67829 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -79,8 +79,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x20000 /* Size of used area in internal SRAM */ #define CONFIG_SYS_INIT_RAM_CTRL 0x221 -#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 0x10) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 0x10) /* * Start addresses for the final memory configuration diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index 06c023b3ad6..461d7195623 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -75,8 +75,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* Size of used area in internal SRAM */ #define CONFIG_SYS_INIT_RAM_CTRL 0x221 -#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 0x10) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 0x10) /*----------------------------------------------------------------------- * Start addresses for the final memory configuration diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index 6b2d60fac84..ab13e21b167 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -77,8 +77,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* Size of used area in internal SRAM */ #define CONFIG_SYS_INIT_RAM_CTRL 0x221 -#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 0x10) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 0x10) /*----------------------------------------------------------------------- * Start addresses for the final memory configuration diff --git a/include/configs/amcore.h b/include/configs/amcore.h index e80c9f6d680..e416361eb14 100644 --- a/include/configs/amcore.h +++ b/include/configs/amcore.h @@ -32,9 +32,8 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 /* size of internal SRAM */ #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_SIZE 0x1000000 diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index 8362fb5ce3c..fbe1e42c077 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -162,9 +162,8 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 #define CONFIG_SYS_INIT_RAM_CTRL 0x221 -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /* * Start addresses for the final memory configuration diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index f1a4df726f4..8f8e53fe13a 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -165,8 +165,7 @@ enter a valid image address in flash */ */ #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /*----------------------------------------------------------------------- * Start addresses for the final memory configuration diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index cbc29ddb518..84f1cafd92a 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -65,9 +65,8 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 -#define CONFIG_SYS_GBL_DATA_OFFSET \ +#define CONFIG_SYS_INIT_SP_OFFSET \ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /*----------------------------------------------------------------------- * Start addresses for the final memory configuration diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index b0a89734feb..2195feeb658 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -54,9 +54,8 @@ /* End of used area in internal SRAM */ #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 #define CONFIG_SYS_INIT_RAM_CTRL 0x221 -#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - \ +#define CONFIG_SYS_INIT_SP_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) - 32) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET #define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 32) /* -- GitLab From 931bad1c72b5cdc030f4b972420f62de306e11d2 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 24 May 2022 13:49:56 -0400 Subject: [PATCH 028/581] mpc85xx: Switch to setting the initial stack pointer more clearly Currently, since we know that in the combination of CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET all of the "high" bits are in CONFIG_SYS_INIT_RAM_ADDR and "low" bits are in CONFIG_SYS_GBL_DATA_OFFSET we reference this separately in start.S, but added together everywhere else. For clarity consistency, reference the combined value here instead. Signed-off-by: Tom Rini --- arch/powerpc/cpu/mpc85xx/start.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 7a079edb691..48f06f51c8f 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -1160,8 +1160,8 @@ _start_cont: bne 1b #if CONFIG_VAL(SYS_MALLOC_F_LEN) - lis r4,(CONFIG_SYS_INIT_RAM_ADDR)@h - ori r4,r4,(CONFIG_SYS_GBL_DATA_OFFSET)@l + lis r4,(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h + ori r4,r4,(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@l addi r3,r3,16 /* Pre-relocation malloc area */ stw r3,GD_MALLOC_BASE(r4) -- GitLab From 4c97c8cd425ff71004cdd9892ca37d46897a7084 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 24 May 2022 14:14:02 -0400 Subject: [PATCH 029/581] powerpc: Switch to using CONFIG_SYS_INIT_SP_OFFSET from CONFIG_SYS_GBL_DATA_OFFSET In the places where PowerPC references CONFIG_SYS_GBL_DATA_OFFSET it does so as (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET). And it defines CONFIG_SYS_GBL_DATA_OFFSET in the same manner that other architectures define CONFIG_SYS_INIT_SP_OFFSET. Other architectures define CONFIG_SYS_INIT_SP_ADDR as (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) typically. Rename things within PowerPC for consistency with other architectures. Signed-off-by: Tom Rini --- README | 18 ------------------ arch/powerpc/cpu/mpc83xx/cpu_init.c | 2 +- arch/powerpc/cpu/mpc83xx/spl_minimal.c | 2 +- arch/powerpc/cpu/mpc83xx/start.S | 4 ++-- arch/powerpc/cpu/mpc85xx/cpu_init_early.c | 2 +- arch/powerpc/cpu/mpc85xx/start.S | 4 ++-- include/configs/MPC837XERDB.h | 4 ++-- include/configs/MPC8548CDS.h | 4 ++-- include/configs/P1010RDB.h | 5 ++--- include/configs/P2041RDB.h | 5 ++--- include/configs/T102xRDB.h | 5 ++--- include/configs/T104xRDB.h | 5 ++--- include/configs/T208xQDS.h | 5 ++--- include/configs/T208xRDB.h | 5 ++--- include/configs/T4240RDB.h | 5 ++--- include/configs/corenet_ds.h | 4 ++-- include/configs/gazerbeam.h | 4 ++-- include/configs/ids8313.h | 6 ++---- include/configs/km/km-mpc83xx.h | 4 ++-- include/configs/kmcent2.h | 5 ++--- include/configs/p1_p2_rdb_pc.h | 5 ++--- include/configs/qemu-ppce500.h | 5 ++--- include/configs/socrates.h | 4 ++-- 23 files changed, 41 insertions(+), 71 deletions(-) diff --git a/README b/README index d6ff909e9a4..f79a7331b21 100644 --- a/README +++ b/README @@ -2130,24 +2130,6 @@ Low Level (hardware related) configuration options: U-Boot uses the following memory types: - MPC8xx: IMMR (internal memory of the CPU) -- CONFIG_SYS_GBL_DATA_OFFSET: - - Offset of the initial data structure in the memory - area defined by CONFIG_SYS_INIT_RAM_ADDR. Usually - CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial - data is located at the end of the available space - (sometimes written as (CONFIG_SYS_INIT_RAM_SIZE - - GENERATED_GBL_DATA_SIZE), and the initial stack is just - below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR + - CONFIG_SYS_GBL_DATA_OFFSET) downward. - - Note: - On the MPC824X (or other systems that use the data - cache for initial memory) the address chosen for - CONFIG_SYS_INIT_RAM_ADDR is basically arbitrary - it must - point to an otherwise UNUSED address space between - the top of RAM and the start of the PCI space. - - CONFIG_SYS_SCCR: System Clock and reset Control Register (15-27) - CONFIG_SYS_OR_TIMING_SDRAM: diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c b/arch/powerpc/cpu/mpc83xx/cpu_init.c index e6dcb8a3350..b2b259b1cbd 100644 --- a/arch/powerpc/cpu/mpc83xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c @@ -138,7 +138,7 @@ void cpu_init_f (volatile immap_t * im) 0; /* Pointer is writable since we allocated a register for it */ - gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); + gd = (gd_t *)CONFIG_SYS_INIT_SP_ADDR; /* global data region was cleared in start.S */ diff --git a/arch/powerpc/cpu/mpc83xx/spl_minimal.c b/arch/powerpc/cpu/mpc83xx/spl_minimal.c index 11b1e613fb9..6d4655f1ade 100644 --- a/arch/powerpc/cpu/mpc83xx/spl_minimal.c +++ b/arch/powerpc/cpu/mpc83xx/spl_minimal.c @@ -25,7 +25,7 @@ DECLARE_GLOBAL_DATA_PTR; void cpu_init_f (volatile immap_t * im) { /* Pointer is writable since we allocated a register for it */ - gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); + gd = (gd_t *)CONFIG_SYS_INIT_SP_ADDR; /* global data region was cleared in start.S */ diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S index 7a01b16b75e..b136456f5fe 100644 --- a/arch/powerpc/cpu/mpc83xx/start.S +++ b/arch/powerpc/cpu/mpc83xx/start.S @@ -229,8 +229,8 @@ in_flash: /* set up the stack pointer in our newly created * cache-ram; use r3 to keep the new SP for now to * avoid overiding the SP it uselessly */ - lis r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h - ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@l + lis r3, CONFIG_SYS_INIT_SP_ADDR@h + ori r3, r3, CONFIG_SYS_INIT_SP_ADDR@l /* r4 = end of GD area */ addi r4, r3, GENERATED_GBL_DATA_SIZE diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c index 584454e01fe..612941f9e7e 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c @@ -94,7 +94,7 @@ void cpu_init_early_f(void *fdt) #endif /* Pointer is writable since we allocated a register for it */ - gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); + gd = (gd_t *)CONFIG_SYS_INIT_SP_ADDR; /* gd area was zeroed during startup */ diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 48f06f51c8f..649afa0860c 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -1160,8 +1160,8 @@ _start_cont: bne 1b #if CONFIG_VAL(SYS_MALLOC_F_LEN) - lis r4,(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h - ori r4,r4,(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@l + lis r4,CONFIG_SYS_INIT_SP_ADDR@h + ori r4,r4,CONFIG_SYS_INIT_SP_ADDR@l addi r3,r3,16 /* Pre-relocation malloc area */ stw r3,GD_MALLOC_BASE(r4) diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index eb4ccb17eaa..516cd522343 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -141,8 +141,8 @@ #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM */ -#define CONFIG_SYS_GBL_DATA_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* * FLASH on the Local Bus diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 244f811ff65..cadcb4e0ba4 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -244,8 +244,8 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in RAM */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index ffd2cf943d2..d841366c0f2 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -380,9 +380,8 @@ extern unsigned long get_sdram_size(void); #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* stack in RAM */ #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* End of used area in RAM */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE \ - - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_MONITOR_LEN (768 * 1024) diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 3d9e3e1c78b..bdc6607d5d1 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -196,9 +196,8 @@ #endif #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_MONITOR_LEN (768 * 1024) diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 5de7b7c2dbf..3d21821fef0 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -329,9 +329,8 @@ #endif #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_MONITOR_LEN (768 * 1024) diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index a7530693e7d..f1bf26b7401 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -307,9 +307,8 @@ CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_MONITOR_LEN (768 * 1024) diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index d6bb8d18f90..ca9ae9b3a36 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -302,9 +302,8 @@ ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_MONITOR_LEN (768 * 1024) /* diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 350ecf1d2be..ca5bf888bf1 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -261,9 +261,8 @@ ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_MONITOR_LEN (768 * 1024) /* diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 9a3dd14abdb..549252cac80 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -103,9 +103,8 @@ CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_MONITOR_LEN (768 * 1024) diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 121963fe5ce..5153be3ec90 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -194,8 +194,8 @@ #endif #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* Size of used area in RAM */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_MONITOR_LEN (768 * 1024) diff --git a/include/configs/gazerbeam.h b/include/configs/gazerbeam.h index 040fd00bb35..a46403cd374 100644 --- a/include/configs/gazerbeam.h +++ b/include/configs/gazerbeam.h @@ -33,8 +33,8 @@ #define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM */ -#define CONFIG_SYS_GBL_DATA_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* * FLASH on the Local Bus diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h index d5c9489bce6..aaad36bb8ab 100644 --- a/include/configs/ids8313.h +++ b/include/configs/ids8313.h @@ -28,10 +28,8 @@ #define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* End of used area in DPRAM */ -#define CONFIG_SYS_GBL_DATA_SIZE 0x100 -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE \ - - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* * Internal Definitions diff --git a/include/configs/km/km-mpc83xx.h b/include/configs/km/km-mpc83xx.h index e1c161586b4..bf1a2356a97 100644 --- a/include/configs/km/km-mpc83xx.h +++ b/include/configs/km/km-mpc83xx.h @@ -38,8 +38,8 @@ #define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* End of used area in RAM */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* * Init Local Bus Memory Controller: * diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index dc45d16bfe1..60df6a37b78 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -339,9 +339,8 @@ CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_MONITOR_LEN 0xc0000 /* 768k */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index bb44372d6de..ca668e3ccd8 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -284,9 +284,8 @@ /* Size of used area in RAM */ #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_MONITOR_LEN (768 * 1024) diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index 136a2dfa716..ad18a48f3c4 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -56,9 +56,8 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) diff --git a/include/configs/socrates.h b/include/configs/socrates.h index daba8278c6a..76d9e98919a 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -103,8 +103,8 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size used area in RAM*/ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384KiB for Mon */ -- GitLab From be131adb8d1a0b414688c60d47fbe9525d243d79 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 24 May 2022 14:18:11 -0400 Subject: [PATCH 030/581] stih410-b2260: Switch to using GENERATED_GBL_DATA_SIZE We have GENERATED_GBL_DATA_SIZE to tell us how large the generated global data is, so do not use a hard-coded value of 1024 for it. Signed-off-by: Tom Rini --- include/configs/stih410-b2260.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h index fba93fd9d32..69b9232201b 100644 --- a/include/configs/stih410-b2260.h +++ b/include/configs/stih410-b2260.h @@ -42,10 +42,9 @@ /* Extra Commands */ -#define CONFIG_SYS_GBL_DATA_SIZE 1024 /* Global data structures */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE - \ CONFIG_SYS_MALLOC_LEN - \ - CONFIG_SYS_GBL_DATA_SIZE) + GENERATED_GBL_DATA_SIZE) /* USB Configs */ #define CONFIG_USB_OHCI_NEW -- GitLab From 42c6141d379c0458cbacfb166b4a2d4cd8817325 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 25 May 2022 10:16:18 -0400 Subject: [PATCH 031/581] Introduce include/system-constants.h We have a number of CONFIG symbols today that are of the form: SYM1 = CONST1 + CONST2 or other static math operations (shifts, etc). The issue is that by moving these to Kconfig we no longer have the ability to calculate these values, so they become less flexible and useful. It's also the case that sometimes a platform will just define SYM1 directly or perform a slightly different set of calculations. We introduce this header now to have a place to start to handle these cases. Signed-off-by: Tom Rini --- include/system-constants.h | 6 ++++++ 1 file changed, 6 insertions(+) create mode 100644 include/system-constants.h diff --git a/include/system-constants.h b/include/system-constants.h new file mode 100644 index 00000000000..4fd24f46099 --- /dev/null +++ b/include/system-constants.h @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef __SYSTEM_CONSTANTS_H__ +#define __SYSTEM_CONSTANTS_H__ + +#endif -- GitLab From eaf6ea6a1dc10d49cdcbcad0f8b0abb6c1eb1db1 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 25 May 2022 12:16:03 -0400 Subject: [PATCH 032/581] Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using system-constants.h - Make all users of CUSTOM_SYS_INIT_SP_ADDR reference SYS_INIT_SP_ADDR - Introduce HAS_CUSTOM_SYS_INIT_SP_ADDR to allow for setting the stack pointer directly, otherwise we use the common calculation. - On some platforms that were using the standard calculation but did not set CONFIG_SYS_INIT_RAM_SIZE / CONFIG_SYS_INIT_RAM_ADDR, set them. - On a small number of platforms that were not subtracting GENERATED_GBL_DATA_SIZE do so now via the standard calculation. - CONFIG_SYS_INIT_SP_OFFSET is now widely unused, so remove it from most board config header files. Signed-off-by: Tom Rini --- Kconfig | 18 ++++++++++++++++++ README | 6 ------ arch/arc/lib/start.S | 3 ++- arch/arm/cpu/arm926ejs/mxs/start.S | 3 ++- arch/arm/cpu/armv7/lowlevel_init.S | 3 ++- arch/arm/cpu/armv7/start.S | 3 ++- arch/arm/lib/crt0.S | 3 ++- arch/arm/lib/crt0_64.S | 3 ++- arch/arm/lib/vectors_m.S | 3 ++- arch/arm/mach-kirkwood/include/mach/config.h | 3 --- arch/arm/mach-mvebu/include/mach/config.h | 3 --- arch/arm/mach-rmobile/lowlevel_init.S | 1 + arch/arm/mach-rmobile/lowlevel_init_ca15.S | 3 ++- .../mach-uniphier/arm32/late_lowlevel_init.S | 3 ++- arch/mips/cpu/start.S | 8 ++------ arch/mips/mach-mtmips/mt7628/lowlevel_init.S | 11 +++-------- arch/powerpc/cpu/mpc83xx/cpu_init.c | 3 ++- arch/powerpc/cpu/mpc83xx/spl_minimal.c | 3 ++- arch/powerpc/cpu/mpc83xx/start.S | 5 +++-- arch/powerpc/cpu/mpc85xx/cpu_init_early.c | 3 ++- arch/powerpc/cpu/mpc85xx/start.S | 5 +++-- arch/riscv/cpu/start.S | 3 ++- board/synopsys/iot_devkit/u-boot.lds | 1 + configs/SBx81LIFKW_defconfig | 2 ++ configs/SBx81LIFXCAT_defconfig | 2 ++ configs/a3y17lte_defconfig | 2 ++ configs/a5y17lte_defconfig | 2 ++ configs/a7y17lte_defconfig | 2 ++ configs/ae350_rv32_defconfig | 2 ++ configs/ae350_rv32_spl_defconfig | 2 ++ configs/ae350_rv32_spl_xip_defconfig | 2 ++ configs/ae350_rv32_xip_defconfig | 2 ++ configs/ae350_rv64_defconfig | 2 ++ configs/ae350_rv64_spl_defconfig | 2 ++ configs/ae350_rv64_spl_xip_defconfig | 2 ++ configs/ae350_rv64_xip_defconfig | 2 ++ configs/alt_defconfig | 2 ++ configs/am335x_baltos_defconfig | 2 ++ configs/am335x_boneblack_vboot_defconfig | 2 ++ configs/am335x_evm_defconfig | 2 ++ configs/am335x_evm_spiboot_defconfig | 2 ++ configs/am335x_guardian_defconfig | 2 ++ configs/am335x_hs_evm_defconfig | 2 ++ configs/am335x_hs_evm_uart_defconfig | 2 ++ configs/am335x_igep003x_defconfig | 2 ++ configs/am335x_pdu001_defconfig | 2 ++ configs/am335x_shc_defconfig | 2 ++ configs/am335x_shc_ict_defconfig | 2 ++ configs/am335x_shc_netboot_defconfig | 2 ++ configs/am335x_shc_sdboot_defconfig | 2 ++ configs/am335x_sl50_defconfig | 2 ++ configs/am3517_evm_defconfig | 2 ++ configs/am43xx_evm_defconfig | 2 ++ configs/am43xx_evm_qspiboot_defconfig | 2 ++ configs/am43xx_evm_rtconly_defconfig | 2 ++ configs/am43xx_evm_usbhost_boot_defconfig | 2 ++ configs/am43xx_hs_evm_defconfig | 2 ++ configs/am57xx_evm_defconfig | 2 ++ configs/am57xx_hs_evm_defconfig | 2 ++ configs/am57xx_hs_evm_usb_defconfig | 2 ++ configs/am64x_evm_a53_defconfig | 2 ++ configs/am64x_evm_r5_defconfig | 2 ++ configs/am65x_evm_a53_defconfig | 2 ++ configs/am65x_evm_r5_defconfig | 2 ++ configs/am65x_evm_r5_usbdfu_defconfig | 2 ++ configs/am65x_evm_r5_usbmsc_defconfig | 2 ++ configs/am65x_hs_evm_a53_defconfig | 2 ++ configs/am65x_hs_evm_r5_defconfig | 2 ++ configs/ap121_defconfig | 2 ++ configs/ap143_defconfig | 2 ++ configs/ap152_defconfig | 2 ++ configs/apalis-imx8_defconfig | 2 ++ configs/armadillo-800eva_defconfig | 2 ++ configs/arndale_defconfig | 2 ++ configs/at91sam9m10g45ek_mmc_defconfig | 2 ++ configs/at91sam9m10g45ek_nandflash_defconfig | 2 ++ configs/at91sam9n12ek_mmc_defconfig | 2 ++ configs/at91sam9n12ek_nandflash_defconfig | 2 ++ configs/at91sam9n12ek_spiflash_defconfig | 2 ++ configs/at91sam9x5ek_dataflash_defconfig | 2 ++ configs/at91sam9x5ek_mmc_defconfig | 2 ++ configs/at91sam9x5ek_nandflash_defconfig | 2 ++ configs/at91sam9x5ek_spiflash_defconfig | 2 ++ ...zedev_cc_v1_0_ultrazedev_som_v1_0_defconfig | 2 ++ configs/axs101_defconfig | 2 ++ configs/axs103_defconfig | 2 ++ configs/bananapi-m5_defconfig | 2 ++ configs/bcm963158_ram_defconfig | 2 ++ configs/bcm96753ref_ram_defconfig | 2 ++ configs/bcm968360bg_ram_defconfig | 2 ++ configs/bcm968580xref_ram_defconfig | 2 ++ configs/bcm_ns3_defconfig | 2 ++ configs/beelink-gsking-x_defconfig | 2 ++ configs/beelink-gtking_defconfig | 2 ++ configs/beelink-gtkingpro_defconfig | 2 ++ configs/blanche_defconfig | 2 ++ configs/brppt1_mmc_defconfig | 2 ++ configs/brppt1_nand_defconfig | 2 ++ configs/brppt1_spi_defconfig | 2 ++ configs/brsmarc1_defconfig | 2 ++ configs/brxre1_defconfig | 2 ++ configs/bubblegum_96_defconfig | 2 ++ configs/cgtqmx8_defconfig | 2 ++ configs/chiliboard_defconfig | 2 ++ configs/chromebit_mickey_defconfig | 2 ++ configs/chromebook_bob_defconfig | 2 ++ configs/chromebook_jerry_defconfig | 2 ++ configs/chromebook_kevin_defconfig | 2 ++ configs/chromebook_minnie_defconfig | 2 ++ configs/chromebook_speedy_defconfig | 2 ++ configs/clearfog_defconfig | 2 ++ configs/clearfog_gt_8k_defconfig | 2 ++ configs/cm_t335_defconfig | 2 ++ configs/cm_t43_defconfig | 2 ++ configs/colibri-imx8x_defconfig | 2 ++ configs/controlcenterdc_defconfig | 2 ++ configs/cortina_presidio-asic-base_defconfig | 2 ++ configs/cortina_presidio-asic-emmc_defconfig | 2 ++ configs/cortina_presidio-asic-pnand_defconfig | 2 ++ configs/corvus_defconfig | 2 ++ configs/crs305-1g-4s-bit_defconfig | 2 ++ configs/crs305-1g-4s_defconfig | 2 ++ configs/crs326-24g-2s-bit_defconfig | 2 ++ configs/crs326-24g-2s_defconfig | 2 ++ configs/crs328-4c-20s-4s-bit_defconfig | 2 ++ configs/crs328-4c-20s-4s_defconfig | 2 ++ configs/cubieboard7_defconfig | 2 ++ configs/d2net_v2_defconfig | 2 ++ configs/da850evm_defconfig | 2 ++ configs/da850evm_direct_nor_defconfig | 2 ++ configs/da850evm_nand_defconfig | 2 ++ configs/db-88f6720_defconfig | 2 ++ configs/db-88f6820-amc_defconfig | 2 ++ configs/db-88f6820-gp_defconfig | 2 ++ configs/db-mv784mp-gp_defconfig | 2 ++ configs/db-xc3-24g4xg_defconfig | 2 ++ configs/deneb_defconfig | 2 ++ configs/devkit3250_defconfig | 2 ++ configs/devkit8000_defconfig | 2 ++ configs/dns325_defconfig | 2 ++ configs/dockstar_defconfig | 2 ++ configs/dra7xx_evm_defconfig | 2 ++ configs/dra7xx_hs_evm_defconfig | 2 ++ configs/dra7xx_hs_evm_usb_defconfig | 2 ++ configs/draco_defconfig | 2 ++ configs/dragonboard410c_defconfig | 2 ++ configs/dragonboard820c_defconfig | 2 ++ configs/dreamplug_defconfig | 2 ++ configs/ds109_defconfig | 2 ++ configs/ds414_defconfig | 2 ++ configs/durian_defconfig | 2 ++ configs/ea-lpc3250devkitv2_defconfig | 2 ++ configs/edminiv2_defconfig | 2 ++ configs/elgin-rv1108_defconfig | 2 ++ configs/emsdp_defconfig | 2 ++ configs/espresso7420_defconfig | 2 ++ configs/etamin_defconfig | 2 ++ configs/evb-px30_defconfig | 2 ++ configs/evb-px5_defconfig | 2 ++ configs/evb-rk3036_defconfig | 2 ++ configs/evb-rk3128_defconfig | 2 ++ configs/evb-rk3229_defconfig | 2 ++ configs/evb-rk3288_defconfig | 2 ++ configs/evb-rk3308_defconfig | 2 ++ configs/evb-rk3328_defconfig | 2 ++ configs/evb-rk3399_defconfig | 2 ++ configs/evb-rk3568_defconfig | 2 ++ configs/evb-rv1108_defconfig | 2 ++ configs/ficus-rk3399_defconfig | 2 ++ configs/firefly-px30_defconfig | 2 ++ configs/firefly-rk3288_defconfig | 2 ++ configs/firefly-rk3399_defconfig | 2 ++ .../gardena-smart-gateway-at91sam_defconfig | 2 ++ configs/geekbox_defconfig | 2 ++ configs/giedi_defconfig | 2 ++ configs/goflexhome_defconfig | 2 ++ configs/gose_defconfig | 2 ++ configs/grpeach_defconfig | 2 ++ configs/guruplug_defconfig | 2 ++ configs/helios4_defconfig | 2 ++ configs/highbank_defconfig | 2 ++ configs/hikey960_defconfig | 2 ++ configs/hikey_defconfig | 2 ++ configs/hsdk_4xd_defconfig | 2 ++ configs/hsdk_defconfig | 2 ++ configs/ib62x0_defconfig | 2 ++ configs/iconnect_defconfig | 2 ++ configs/igep00x0_defconfig | 2 ++ configs/imgtec_xilfpga_defconfig | 2 ++ configs/imx8qm_mek_defconfig | 2 ++ configs/imx8qm_rom7720_a1_4G_defconfig | 2 ++ configs/imx8qxp_mek_defconfig | 2 ++ configs/imxrt1020-evk_defconfig | 2 ++ configs/imxrt1050-evk_defconfig | 2 ++ configs/inetspace_v2_defconfig | 2 ++ configs/integratorap_cm720t_defconfig | 2 ++ configs/integratorap_cm920t_defconfig | 2 ++ configs/integratorap_cm926ejs_defconfig | 2 ++ configs/integratorap_cm946es_defconfig | 2 ++ configs/integratorcp_cm1136_defconfig | 2 ++ configs/integratorcp_cm920t_defconfig | 2 ++ configs/integratorcp_cm926ejs_defconfig | 2 ++ configs/integratorcp_cm946es_defconfig | 2 ++ configs/iot2050_defconfig | 2 ++ configs/iot_devkit_defconfig | 2 ++ configs/j7200_evm_a72_defconfig | 2 ++ configs/j7200_evm_r5_defconfig | 2 ++ configs/j721e_evm_a72_defconfig | 2 ++ configs/j721e_evm_r5_defconfig | 2 ++ configs/j721e_hs_evm_a72_defconfig | 2 ++ configs/j721e_hs_evm_r5_defconfig | 2 ++ configs/j721s2_evm_a72_defconfig | 2 ++ configs/j721s2_evm_r5_defconfig | 2 ++ configs/jethub_j100_defconfig | 2 ++ configs/jethub_j80_defconfig | 2 ++ configs/k2e_evm_defconfig | 2 ++ configs/k2e_hs_evm_defconfig | 2 ++ configs/k2g_evm_defconfig | 2 ++ configs/k2g_hs_evm_defconfig | 2 ++ configs/k2hk_evm_defconfig | 2 ++ configs/k2hk_hs_evm_defconfig | 2 ++ configs/k2l_evm_defconfig | 2 ++ configs/k2l_hs_evm_defconfig | 2 ++ configs/khadas-edge-captain-rk3399_defconfig | 2 ++ configs/khadas-edge-rk3399_defconfig | 2 ++ configs/khadas-edge-v-rk3399_defconfig | 2 ++ configs/khadas-vim2_defconfig | 2 ++ configs/khadas-vim3_android_ab_defconfig | 2 ++ configs/khadas-vim3_android_defconfig | 2 ++ configs/khadas-vim3_defconfig | 2 ++ configs/khadas-vim3l_android_ab_defconfig | 2 ++ configs/khadas-vim3l_android_defconfig | 2 ++ configs/khadas-vim3l_defconfig | 2 ++ configs/khadas-vim_defconfig | 2 ++ configs/km_kirkwood_128m16_defconfig | 2 ++ configs/km_kirkwood_defconfig | 2 ++ configs/km_kirkwood_pci_defconfig | 2 ++ configs/kmcoge5un_defconfig | 2 ++ configs/kmnusa_defconfig | 2 ++ configs/kmsuse2_defconfig | 2 ++ configs/koelsch_defconfig | 2 ++ configs/kontron_sl28_defconfig | 2 ++ configs/kylin-rk3036_defconfig | 2 ++ configs/lager_defconfig | 2 ++ configs/leez-rk3399_defconfig | 2 ++ configs/legoev3_defconfig | 2 ++ configs/libretech-ac_defconfig | 2 ++ configs/libretech-cc_defconfig | 2 ++ configs/libretech-cc_v2_defconfig | 2 ++ configs/libretech-s905d-pc_defconfig | 2 ++ configs/libretech-s912-pc_defconfig | 2 ++ configs/lion-rk3368_defconfig | 2 ++ configs/ls1012a2g5rdb_qspi_defconfig | 2 ++ configs/ls1012afrdm_qspi_defconfig | 2 ++ configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig | 2 ++ configs/ls1012afrwy_qspi_defconfig | 2 ++ configs/ls1012aqds_qspi_defconfig | 2 ++ configs/ls1012ardb_qspi_SECURE_BOOT_defconfig | 2 ++ configs/ls1012ardb_qspi_defconfig | 2 ++ configs/ls1043aqds_defconfig | 2 ++ configs/ls1043aqds_lpuart_defconfig | 2 ++ configs/ls1043aqds_nand_defconfig | 2 ++ configs/ls1043aqds_nor_ddr3_defconfig | 2 ++ configs/ls1043aqds_qspi_defconfig | 2 ++ configs/ls1043aqds_sdcard_ifc_defconfig | 2 ++ configs/ls1043aqds_sdcard_qspi_defconfig | 2 ++ configs/ls1043ardb_SECURE_BOOT_defconfig | 2 ++ configs/ls1043ardb_defconfig | 2 ++ configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 2 ++ configs/ls1043ardb_nand_defconfig | 2 ++ .../ls1043ardb_sdcard_SECURE_BOOT_defconfig | 2 ++ configs/ls1043ardb_sdcard_defconfig | 2 ++ configs/ls1046aqds_SECURE_BOOT_defconfig | 2 ++ configs/ls1046aqds_defconfig | 2 ++ configs/ls1046aqds_lpuart_defconfig | 2 ++ configs/ls1046aqds_nand_defconfig | 2 ++ configs/ls1046aqds_qspi_defconfig | 2 ++ configs/ls1046aqds_sdcard_ifc_defconfig | 2 ++ configs/ls1046aqds_sdcard_qspi_defconfig | 2 ++ configs/ls1046ardb_emmc_defconfig | 2 ++ configs/ls1046ardb_qspi_SECURE_BOOT_defconfig | 2 ++ configs/ls1046ardb_qspi_defconfig | 2 ++ configs/ls1046ardb_qspi_spl_defconfig | 2 ++ .../ls1046ardb_sdcard_SECURE_BOOT_defconfig | 2 ++ configs/ls1046ardb_sdcard_defconfig | 2 ++ configs/ls1088aqds_defconfig | 2 ++ configs/ls1088aqds_qspi_SECURE_BOOT_defconfig | 2 ++ configs/ls1088aqds_qspi_defconfig | 2 ++ configs/ls1088aqds_sdcard_ifc_defconfig | 2 ++ configs/ls1088aqds_sdcard_qspi_defconfig | 2 ++ configs/ls1088ardb_qspi_SECURE_BOOT_defconfig | 2 ++ configs/ls1088ardb_qspi_defconfig | 2 ++ ...s1088ardb_sdcard_qspi_SECURE_BOOT_defconfig | 2 ++ configs/ls1088ardb_sdcard_qspi_defconfig | 2 ++ configs/ls2080aqds_SECURE_BOOT_defconfig | 2 ++ configs/ls2080aqds_defconfig | 2 ++ configs/ls2080aqds_nand_defconfig | 2 ++ configs/ls2080aqds_qspi_defconfig | 2 ++ configs/ls2080aqds_sdcard_defconfig | 2 ++ configs/ls2080ardb_SECURE_BOOT_defconfig | 2 ++ configs/ls2080ardb_defconfig | 2 ++ configs/ls2080ardb_nand_defconfig | 2 ++ configs/ls2081ardb_defconfig | 2 ++ configs/ls2088ardb_qspi_SECURE_BOOT_defconfig | 2 ++ configs/ls2088ardb_qspi_defconfig | 2 ++ configs/lschlv2_defconfig | 2 ++ configs/lsxhl_defconfig | 2 ++ configs/maxbcm_defconfig | 2 ++ configs/microchip_mpfs_icicle_defconfig | 2 ++ configs/miqi-rk3288_defconfig | 2 ++ configs/mk808_defconfig | 2 ++ configs/mt7623a_unielec_u7623_02_defconfig | 2 ++ configs/mt7623n_bpir2_defconfig | 2 ++ configs/mt7629_rfb_defconfig | 2 ++ configs/mvebu_crb_cn9130_defconfig | 2 ++ configs/mvebu_db-88f3720_defconfig | 2 ++ configs/mvebu_db_armada8k_defconfig | 2 ++ configs/mvebu_db_cn9130_defconfig | 2 ++ configs/mvebu_espressobin-88f3720_defconfig | 2 ++ configs/mvebu_mcbin-88f8040_defconfig | 2 ++ configs/mvebu_puzzle-m801-88f8040_defconfig | 2 ++ configs/nanopc-t4-rk3399_defconfig | 2 ++ configs/nanopi-k2_defconfig | 2 ++ configs/nanopi-m4-2gb-rk3399_defconfig | 2 ++ configs/nanopi-m4-rk3399_defconfig | 2 ++ configs/nanopi-m4b-rk3399_defconfig | 2 ++ configs/nanopi-neo4-rk3399_defconfig | 2 ++ configs/nanopi-r2s-rk3328_defconfig | 2 ++ configs/nanopi-r4s-rk3399_defconfig | 2 ++ configs/nas220_defconfig | 2 ++ configs/net2big_v2_defconfig | 2 ++ configs/netspace_lite_v2_defconfig | 2 ++ configs/netspace_max_v2_defconfig | 2 ++ configs/netspace_mini_v2_defconfig | 2 ++ configs/netspace_v2_defconfig | 2 ++ configs/nsa310s_defconfig | 2 ++ configs/nsim_700_defconfig | 2 ++ configs/nsim_700be_defconfig | 2 ++ configs/nsim_hs38_defconfig | 2 ++ configs/nsim_hs38be_defconfig | 2 ++ configs/octeontx2_95xx_defconfig | 2 ++ configs/octeontx2_96xx_defconfig | 2 ++ configs/octeontx_81xx_defconfig | 2 ++ configs/octeontx_83xx_defconfig | 2 ++ configs/odroid-c2_defconfig | 2 ++ configs/odroid-c4_defconfig | 2 ++ configs/odroid-go2_defconfig | 2 ++ configs/odroid-hc4_defconfig | 2 ++ configs/odroid-n2_defconfig | 2 ++ configs/odroid-xu3_defconfig | 2 ++ configs/odroid_defconfig | 2 ++ configs/omap35_logic_defconfig | 2 ++ configs/omap35_logic_somlv_defconfig | 2 ++ configs/omap3_beagle_defconfig | 2 ++ configs/omap3_evm_defconfig | 2 ++ configs/omap3_logic_defconfig | 2 ++ configs/omap3_logic_somlv_defconfig | 2 ++ configs/omap4_panda_defconfig | 2 ++ configs/omap4_sdp4430_defconfig | 2 ++ configs/omap5_uevm_defconfig | 2 ++ configs/omapl138_lcdk_defconfig | 2 ++ configs/openpiton_riscv64_defconfig | 2 ++ configs/openpiton_riscv64_spl_defconfig | 2 ++ configs/openrd_base_defconfig | 2 ++ configs/openrd_client_defconfig | 2 ++ configs/openrd_ultimate_defconfig | 2 ++ configs/orangepi-rk3399_defconfig | 2 ++ configs/origen_defconfig | 2 ++ configs/p200_defconfig | 2 ++ configs/p201_defconfig | 2 ++ configs/p212_defconfig | 2 ++ configs/peach-pi_defconfig | 2 ++ configs/peach-pit_defconfig | 2 ++ configs/phycore-am335x-r2-regor_defconfig | 2 ++ configs/phycore-am335x-r2-wega_defconfig | 2 ++ configs/phycore-rk3288_defconfig | 2 ++ configs/pic32mzdask_defconfig | 2 ++ configs/pinebook-pro-rk3399_defconfig | 2 ++ configs/pm9261_defconfig | 2 ++ configs/pm9263_defconfig | 2 ++ configs/pm9g45_defconfig | 2 ++ configs/pogo_e02_defconfig | 2 ++ configs/pogo_v4_defconfig | 2 ++ configs/poleg_evb_defconfig | 2 ++ configs/pomelo_defconfig | 2 ++ configs/poplar_defconfig | 2 ++ configs/popmetal-rk3288_defconfig | 2 ++ configs/porter_defconfig | 2 ++ configs/puma-rk3399_defconfig | 2 ++ configs/px30-core-ctouch2-of10-px30_defconfig | 2 ++ configs/px30-core-ctouch2-px30_defconfig | 2 ++ configs/px30-core-edimm2.2-px30_defconfig | 2 ++ configs/pxm2_defconfig | 2 ++ configs/qemu-riscv32_defconfig | 2 ++ configs/qemu-riscv32_smode_defconfig | 2 ++ configs/qemu-riscv32_spl_defconfig | 2 ++ configs/qemu-riscv64_defconfig | 2 ++ configs/qemu-riscv64_smode_defconfig | 2 ++ configs/qemu-riscv64_spl_defconfig | 2 ++ configs/qemu_arm64_defconfig | 2 ++ configs/qemu_arm_defconfig | 2 ++ configs/radxa-zero_defconfig | 2 ++ configs/rastaban_defconfig | 2 ++ configs/roc-cc-rk3308_defconfig | 2 ++ configs/roc-cc-rk3328_defconfig | 2 ++ configs/roc-pc-mezzanine-rk3399_defconfig | 2 ++ configs/roc-pc-rk3399_defconfig | 2 ++ configs/rock-pi-4-rk3399_defconfig | 2 ++ configs/rock-pi-4c-rk3399_defconfig | 2 ++ configs/rock-pi-e-rk3328_defconfig | 2 ++ configs/rock-pi-n10-rk3399pro_defconfig | 2 ++ configs/rock-pi-n8-rk3288_defconfig | 2 ++ configs/rock2_defconfig | 2 ++ configs/rock64-rk3328_defconfig | 2 ++ configs/rock960-rk3399_defconfig | 2 ++ configs/rock_defconfig | 2 ++ configs/rockpro64-rk3399_defconfig | 2 ++ configs/rpi_0_w_defconfig | 2 ++ configs/rpi_2_defconfig | 2 ++ configs/rpi_3_32b_defconfig | 2 ++ configs/rpi_3_b_plus_defconfig | 2 ++ configs/rpi_3_defconfig | 2 ++ configs/rpi_4_32b_defconfig | 2 ++ configs/rpi_4_defconfig | 2 ++ configs/rpi_arm64_defconfig | 2 ++ configs/rpi_defconfig | 2 ++ configs/rut_defconfig | 2 ++ configs/s400_defconfig | 2 ++ configs/s5p4418_nanopi2_defconfig | 2 ++ configs/s5p_goni_defconfig | 2 ++ configs/s5pc210_universal_defconfig | 2 ++ configs/sam9x60_curiosity_mmc_defconfig | 2 ++ configs/sam9x60ek_mmc_defconfig | 2 ++ configs/sam9x60ek_nandflash_defconfig | 2 ++ configs/sam9x60ek_qspiflash_defconfig | 2 ++ configs/sama5d27_giantboard_defconfig | 2 ++ configs/sama5d27_som1_ek_mmc1_defconfig | 2 ++ configs/sama5d27_som1_ek_mmc_defconfig | 2 ++ configs/sama5d27_som1_ek_qspiflash_defconfig | 2 ++ configs/sama5d27_wlsom1_ek_mmc_defconfig | 2 ++ configs/sama5d27_wlsom1_ek_qspiflash_defconfig | 2 ++ configs/sama5d2_icp_mmc_defconfig | 2 ++ configs/sama5d2_icp_qspiflash_defconfig | 2 ++ configs/sama5d2_ptc_ek_mmc_defconfig | 2 ++ configs/sama5d2_ptc_ek_nandflash_defconfig | 2 ++ configs/sama5d2_xplained_emmc_defconfig | 2 ++ configs/sama5d2_xplained_mmc_defconfig | 2 ++ configs/sama5d2_xplained_qspiflash_defconfig | 2 ++ configs/sama5d2_xplained_spiflash_defconfig | 2 ++ configs/sama5d36ek_cmp_mmc_defconfig | 2 ++ configs/sama5d36ek_cmp_nandflash_defconfig | 2 ++ configs/sama5d36ek_cmp_spiflash_defconfig | 2 ++ configs/sama5d3_xplained_mmc_defconfig | 2 ++ configs/sama5d3_xplained_nandflash_defconfig | 2 ++ configs/sama5d3xek_mmc_defconfig | 2 ++ configs/sama5d3xek_nandflash_defconfig | 2 ++ configs/sama5d3xek_spiflash_defconfig | 2 ++ configs/sama5d4_xplained_mmc_defconfig | 2 ++ configs/sama5d4_xplained_nandflash_defconfig | 2 ++ configs/sama5d4_xplained_spiflash_defconfig | 2 ++ configs/sama5d4ek_mmc_defconfig | 2 ++ configs/sama5d4ek_nandflash_defconfig | 2 ++ configs/sama5d4ek_spiflash_defconfig | 2 ++ configs/sama7g5ek_mmc1_defconfig | 2 ++ configs/sama7g5ek_mmc_defconfig | 2 ++ configs/sei510_defconfig | 2 ++ configs/sei610_defconfig | 2 ++ configs/sheep-rk3368_defconfig | 2 ++ configs/sheevaplug_defconfig | 2 ++ configs/sifive_unleashed_defconfig | 2 ++ configs/sifive_unmatched_defconfig | 2 ++ configs/silk_defconfig | 2 ++ configs/sipeed_maix_bitm_defconfig | 2 ++ configs/sipeed_maix_smode_defconfig | 2 ++ configs/smdk5250_defconfig | 2 ++ configs/smdk5420_defconfig | 2 ++ configs/smdkc100_defconfig | 2 ++ configs/smdkv310_defconfig | 2 ++ configs/sniper_defconfig | 2 ++ configs/snow_defconfig | 2 ++ configs/socfpga_agilex_atf_defconfig | 2 ++ configs/socfpga_agilex_defconfig | 2 ++ configs/socfpga_agilex_vab_defconfig | 2 ++ configs/socfpga_arria10_defconfig | 2 ++ configs/socfpga_arria5_defconfig | 2 ++ configs/socfpga_cyclone5_defconfig | 2 ++ configs/socfpga_dbm_soc1_defconfig | 2 ++ configs/socfpga_de0_nano_soc_defconfig | 2 ++ configs/socfpga_de10_nano_defconfig | 2 ++ configs/socfpga_de10_standard_defconfig | 2 ++ configs/socfpga_de1_soc_defconfig | 2 ++ configs/socfpga_is1_defconfig | 2 ++ configs/socfpga_mcvevk_defconfig | 2 ++ configs/socfpga_n5x_atf_defconfig | 2 ++ configs/socfpga_n5x_defconfig | 2 ++ configs/socfpga_n5x_vab_defconfig | 2 ++ configs/socfpga_secu1_defconfig | 2 ++ configs/socfpga_sockit_defconfig | 2 ++ configs/socfpga_socrates_defconfig | 2 ++ configs/socfpga_sr1500_defconfig | 2 ++ configs/socfpga_stratix10_atf_defconfig | 2 ++ configs/socfpga_stratix10_defconfig | 2 ++ configs/socfpga_vining_fpga_defconfig | 2 ++ configs/spring_defconfig | 2 ++ configs/stemmy_defconfig | 2 ++ configs/stih410-b2260_defconfig | 2 ++ configs/stm32746g-eval_defconfig | 2 ++ configs/stm32746g-eval_spl_defconfig | 2 ++ configs/stm32f429-discovery_defconfig | 2 ++ configs/stm32f429-evaluation_defconfig | 2 ++ configs/stm32f469-discovery_defconfig | 2 ++ configs/stm32f746-disco_defconfig | 2 ++ configs/stm32f746-disco_spl_defconfig | 2 ++ configs/stm32f769-disco_defconfig | 2 ++ configs/stm32f769-disco_spl_defconfig | 2 ++ configs/stm32h743-disco_defconfig | 2 ++ configs/stm32h743-eval_defconfig | 2 ++ configs/stm32h750-art-pi_defconfig | 2 ++ .../stm32mp15-icore-stm32mp1-ctouch2_defconfig | 2 ++ ...stm32mp15-icore-stm32mp1-edimm2.2_defconfig | 2 ++ ...5-microgea-stm32mp1-microdev2-of7_defconfig | 2 ++ ...2mp15-microgea-stm32mp1-microdev2_defconfig | 2 ++ configs/stm32mp15_basic_defconfig | 2 ++ configs/stm32mp15_defconfig | 1 + configs/stm32mp15_dhcom_basic_defconfig | 2 ++ configs/stm32mp15_dhcor_basic_defconfig | 2 ++ configs/stm32mp15_trusted_defconfig | 1 + configs/stout_defconfig | 2 ++ configs/synquacer_developerbox_defconfig | 2 ++ configs/tb100_defconfig | 2 ++ configs/theadorable_debug_defconfig | 2 ++ configs/thuban_defconfig | 2 ++ configs/thunderx_88xx_defconfig | 2 ++ configs/ti816x_evm_defconfig | 2 ++ configs/tinker-rk3288_defconfig | 2 ++ configs/tinker-s-rk3288_defconfig | 2 ++ configs/total_compute_defconfig | 2 ++ configs/tplink_wdr4300_defconfig | 2 ++ configs/trats2_defconfig | 2 ++ configs/trats_defconfig | 2 ++ configs/turris_mox_defconfig | 2 ++ configs/turris_omnia_defconfig | 2 ++ configs/u200_defconfig | 2 ++ configs/uDPU_defconfig | 2 ++ configs/uniphier_ld4_sld8_defconfig | 2 ++ configs/uniphier_v7_defconfig | 2 ++ configs/vexpress_aemv8a_juno_defconfig | 2 ++ configs/vexpress_ca9x4_defconfig | 2 ++ configs/vinco_defconfig | 2 ++ configs/vyasa-rk3288_defconfig | 2 ++ configs/wetek-core2_defconfig | 2 ++ configs/work_92105_defconfig | 2 ++ configs/x530_defconfig | 2 ++ configs/xilinx_versal_mini_defconfig | 2 ++ configs/xilinx_versal_mini_emmc0_defconfig | 2 ++ configs/xilinx_versal_mini_emmc1_defconfig | 2 ++ configs/xilinx_zynqmp_mini_defconfig | 2 ++ configs/xilinx_zynqmp_mini_emmc0_defconfig | 2 ++ configs/xilinx_zynqmp_mini_emmc1_defconfig | 2 ++ configs/xilinx_zynqmp_mini_nand_defconfig | 2 ++ .../xilinx_zynqmp_mini_nand_single_defconfig | 2 ++ configs/xilinx_zynqmp_mini_qspi_defconfig | 2 ++ include/configs/M5208EVBE.h | 1 - include/configs/M5235EVB.h | 1 - include/configs/M5249EVB.h | 1 - include/configs/M5253DEMO.h | 1 - include/configs/M5272C3.h | 1 - include/configs/M5275EVB.h | 1 - include/configs/M5282EVB.h | 1 - include/configs/M53017EVB.h | 1 - include/configs/M5329EVB.h | 1 - include/configs/M5373EVB.h | 1 - include/configs/MPC837XERDB.h | 2 -- include/configs/MPC8548CDS.h | 1 - include/configs/P1010RDB.h | 1 - include/configs/P2041RDB.h | 1 - include/configs/T102xRDB.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240RDB.h | 1 - include/configs/alt.h | 3 +-- include/configs/am64x_evm.h | 2 -- include/configs/am65x_evm.h | 2 -- include/configs/amcore.h | 2 -- include/configs/ap121.h | 2 -- include/configs/ap143.h | 2 -- include/configs/ap152.h | 2 -- include/configs/apalis-imx8.h | 2 -- include/configs/apalis_imx6.h | 5 ----- include/configs/aristainetos2.h | 5 ----- include/configs/armadillo-800eva.h | 3 +-- include/configs/arndale.h | 3 --- include/configs/aspeed-common.h | 5 ----- include/configs/astro_mcf5373l.h | 2 -- include/configs/at91sam9260ek.h | 12 +++--------- include/configs/at91sam9261ek.h | 4 ++-- include/configs/at91sam9263ek.h | 4 ++-- include/configs/at91sam9m10g45ek.h | 3 --- include/configs/at91sam9n12ek.h | 8 -------- include/configs/at91sam9rlek.h | 4 ++-- include/configs/at91sam9x5ek.h | 3 --- include/configs/ax25-ae350.h | 2 -- include/configs/axs10x.h | 3 --- include/configs/bcm_ns3.h | 1 - include/configs/bcmstb.h | 3 --- include/configs/bk4r1.h | 5 ----- include/configs/blanche.h | 3 +-- include/configs/broadcom_bcm963158.h | 1 - include/configs/broadcom_bcm96753ref.h | 1 - include/configs/broadcom_bcm968360bg.h | 1 - include/configs/broadcom_bcm968580xref.h | 1 - include/configs/brppt2.h | 4 ---- include/configs/bur_am335x_common.h | 2 -- include/configs/capricorn-common.h | 1 - include/configs/cgtqmx8.h | 2 -- include/configs/cl-som-imx7.h | 5 ----- include/configs/cm_fx6.h | 4 ---- include/configs/cobra5272.h | 1 - include/configs/colibri-imx6ull.h | 5 ----- include/configs/colibri-imx8x.h | 2 -- include/configs/colibri_imx6.h | 5 ----- include/configs/colibri_imx7.h | 5 ----- include/configs/colibri_vf.h | 5 ----- include/configs/corenet_ds.h | 1 - include/configs/corvus.h | 3 --- include/configs/da850evm.h | 7 ------- include/configs/dart_6ul.h | 5 ----- include/configs/devkit3250.h | 3 --- include/configs/dh_imx6.h | 6 ------ include/configs/display5.h | 5 ----- include/configs/dragonboard410c.h | 1 - include/configs/dragonboard820c.h | 1 - include/configs/durian.h | 2 -- include/configs/ea-lpc3250devkitv2.h | 1 - include/configs/eb_cpu5282.h | 2 -- include/configs/edminiv2.h | 2 -- include/configs/el6x_common.h | 5 ----- include/configs/embestmx6boards.h | 5 ----- include/configs/emsdp.h | 2 -- include/configs/espresso7420.h | 1 - include/configs/ethernut5.h | 6 ++---- include/configs/exynos5250-common.h | 4 ---- include/configs/exynos78x0-common.h | 1 - .../configs/gardena-smart-gateway-at91sam.h | 3 --- include/configs/gazerbeam.h | 2 -- include/configs/ge_b1x5v2.h | 5 ----- include/configs/ge_bx50v3.h | 5 ----- include/configs/gose.h | 3 +-- include/configs/grpeach.h | 2 -- include/configs/gw_ventana.h | 5 ----- include/configs/highbank.h | 1 - include/configs/hikey.h | 2 -- include/configs/hikey960.h | 2 -- include/configs/hsdk-4xd.h | 3 --- include/configs/hsdk.h | 3 --- include/configs/ids8313.h | 2 -- include/configs/imgtec_xilfpga.h | 2 -- include/configs/imx27lite-common.h | 2 -- include/configs/imx6-engicam.h | 5 ----- include/configs/imx6_logic.h | 5 ----- include/configs/imx6dl-mamoj.h | 5 ----- include/configs/imx6q-bosch-acc.h | 3 --- include/configs/imx7-cm.h | 5 ----- include/configs/imx8mm-cl-iot-gate.h | 4 ---- include/configs/imx8mm_beacon.h | 4 ---- include/configs/imx8mm_data_modul_edm_sbc.h | 4 ---- include/configs/imx8mm_evk.h | 4 ---- include/configs/imx8mm_icore_mx8mm.h | 4 ---- include/configs/imx8mm_venice.h | 4 ---- include/configs/imx8mn_beacon.h | 4 ---- include/configs/imx8mn_bsh_smm_s2_common.h | 4 ---- include/configs/imx8mn_evk.h | 4 ---- include/configs/imx8mn_var_som.h | 4 ---- include/configs/imx8mn_venice.h | 4 ---- include/configs/imx8mp_dhcom_pdk2.h | 4 ---- include/configs/imx8mp_evk.h | 4 ---- include/configs/imx8mp_rsb3720.h | 4 ---- include/configs/imx8mp_venice.h | 4 ---- include/configs/imx8mq_cm.h | 4 ---- include/configs/imx8mq_evk.h | 4 ---- include/configs/imx8mq_phanbell.h | 4 ---- include/configs/imx8qm_mek.h | 2 -- include/configs/imx8qm_rom7720.h | 2 -- include/configs/imx8qxp_mek.h | 2 -- include/configs/imx8ulp_evk.h | 2 -- include/configs/imxrt1020-evk.h | 2 -- include/configs/imxrt1050-evk.h | 2 -- include/configs/integrator-common.h | 4 ---- include/configs/iot2050.h | 2 -- include/configs/iot_devkit.h | 10 ++++------ include/configs/j721e_evm.h | 2 -- include/configs/j721s2_evm.h | 2 -- include/configs/km/km-mpc83xx.h | 2 -- include/configs/km/pg-wcom-ls102xa.h | 5 ----- include/configs/kmcent2.h | 1 - include/configs/koelsch.h | 3 +-- include/configs/kontron-sl-mx6ul.h | 5 ----- include/configs/kontron-sl-mx8mm.h | 5 ----- include/configs/kontron_pitx_imx8m.h | 4 ---- include/configs/kontron_sl28.h | 1 - include/configs/kp_imx53.h | 5 ----- include/configs/kp_imx6q_tpc.h | 6 ------ include/configs/kzm9g.h | 3 --- include/configs/lager.h | 3 +-- include/configs/legoev3.h | 2 -- include/configs/liteboard.h | 5 ----- include/configs/ls1012a_common.h | 6 ------ include/configs/ls1021aiot.h | 5 ----- include/configs/ls1021aqds.h | 5 ----- include/configs/ls1021atsn.h | 5 ----- include/configs/ls1021atwr.h | 5 ----- include/configs/ls1028a_common.h | 1 - include/configs/ls1043a_common.h | 5 ----- include/configs/ls1043aqds.h | 3 --- include/configs/ls1046a_common.h | 5 ----- include/configs/ls1046aqds.h | 3 --- include/configs/ls1088a_common.h | 5 ----- include/configs/ls2080a_common.h | 5 ----- include/configs/lx2160a_common.h | 1 - include/configs/m53menlo.h | 5 ----- include/configs/mccmon6.h | 5 ----- include/configs/meerkat96.h | 5 ----- include/configs/meesc.h | 9 ++------- include/configs/meson64.h | 1 - include/configs/microchip_mpfs_icicle.h | 1 - include/configs/mt7622.h | 2 -- include/configs/mt7623.h | 2 -- include/configs/mt7629.h | 2 -- include/configs/mt8183.h | 3 --- include/configs/mt8512.h | 3 --- include/configs/mt8516.h | 3 --- include/configs/mt8518.h | 3 --- include/configs/mvebu_armada-37xx.h | 3 --- include/configs/mvebu_armada-8k.h | 3 --- include/configs/mx51evk.h | 5 ----- include/configs/mx53cx9020.h | 5 ----- include/configs/mx53loco.h | 5 ----- include/configs/mx53ppd.h | 5 ----- include/configs/mx6cuboxi.h | 5 ----- include/configs/mx6memcal.h | 5 ----- include/configs/mx6sabre_common.h | 5 ----- include/configs/mx6slevk.h | 5 ----- include/configs/mx6sllevk.h | 5 ----- include/configs/mx6sxsabreauto.h | 5 ----- include/configs/mx6sxsabresd.h | 5 ----- include/configs/mx6ul_14x14_evk.h | 5 ----- include/configs/mx6ullevk.h | 5 ----- include/configs/mx7dsabresd.h | 5 ----- include/configs/mx7ulp_com.h | 5 ----- include/configs/mx7ulp_evk.h | 5 ----- include/configs/mxs.h | 4 ---- include/configs/mys_6ulx.h | 5 ----- include/configs/nitrogen6x.h | 5 ----- include/configs/nokia_rx51.h | 2 -- include/configs/novena.h | 5 ----- include/configs/npi_imx6ull.h | 5 ----- include/configs/nsim.h | 3 --- include/configs/o4-imx6ull-nano.h | 2 -- include/configs/octeontx2_common.h | 1 - include/configs/octeontx_common.h | 1 - include/configs/odroid.h | 3 --- include/configs/odroid_xu3.h | 2 -- include/configs/omapl138_lcdk.h | 2 -- include/configs/openpiton-riscv64.h | 1 - include/configs/opos6uldev.h | 4 ---- include/configs/origen.h | 2 -- include/configs/owl-common.h | 1 - include/configs/p1_p2_rdb_pc.h | 1 - include/configs/pcl063.h | 5 ----- include/configs/pcl063_ull.h | 5 ----- include/configs/pcm052.h | 5 ----- include/configs/pcm058.h | 5 ----- include/configs/peach-pi.h | 1 - include/configs/peach-pit.h | 1 - include/configs/phycore_imx8mm.h | 4 ---- include/configs/phycore_imx8mp.h | 4 ---- include/configs/pic32mzdask.h | 2 -- include/configs/pico-imx6.h | 5 ----- include/configs/pico-imx6ul.h | 5 ----- include/configs/pico-imx7d.h | 5 ----- include/configs/pico-imx8mq.h | 4 ---- include/configs/pm9261.h | 2 -- include/configs/pm9263.h | 2 -- include/configs/pm9g45.h | 3 --- include/configs/poleg.h | 1 - include/configs/pomelo.h | 1 - include/configs/poplar.h | 1 - include/configs/porter.h | 3 +-- include/configs/presidio_asic.h | 1 - include/configs/px30_common.h | 1 - include/configs/qemu-arm.h | 3 --- include/configs/qemu-ppce500.h | 1 - include/configs/qemu-riscv.h | 1 - include/configs/rcar-gen3-common.h | 1 - include/configs/rk3036_common.h | 1 - include/configs/rk3066_common.h | 2 -- include/configs/rk3128_common.h | 2 -- include/configs/rk3188_common.h | 5 ----- include/configs/rk322x_common.h | 2 -- include/configs/rk3288_common.h | 4 ---- include/configs/rk3308_common.h | 1 - include/configs/rk3328_common.h | 1 - include/configs/rk3368_common.h | 2 -- include/configs/rk3399_common.h | 2 -- include/configs/rk3568_common.h | 2 -- include/configs/rpi.h | 3 --- include/configs/rv1108_common.h | 1 - include/configs/s5p4418_nanopi2.h | 1 - include/configs/s5p_goni.h | 2 -- include/configs/s5pc210_universal.h | 3 --- include/configs/sam9x60_curiosity.h | 3 --- include/configs/sam9x60ek.h | 4 ---- include/configs/sama5d27_som1_ek.h | 3 --- include/configs/sama5d27_wlsom1_ek.h | 3 --- include/configs/sama5d2_icp.h | 2 -- include/configs/sama5d2_ptc_ek.h | 3 --- include/configs/sama5d2_xplained.h | 3 --- include/configs/sama5d3_xplained.h | 2 -- include/configs/sama5d3xek.h | 2 -- include/configs/sama5d4_xplained.h | 2 -- include/configs/sama5d4ek.h | 2 -- include/configs/sama7g5ek.h | 3 --- include/configs/siemens-am33x-common.h | 2 -- include/configs/sifive-unleashed.h | 1 - include/configs/sifive-unmatched.h | 1 - include/configs/silk.h | 3 +-- include/configs/sipeed-maix.h | 3 --- include/configs/smartweb.h | 4 ++-- include/configs/smdk5420.h | 1 - include/configs/smdkc100.h | 2 -- include/configs/smdkv310.h | 2 -- include/configs/smegw01.h | 5 ----- include/configs/snapper9260.h | 4 ++-- include/configs/snapper9g45.h | 4 ++-- include/configs/sniper.h | 2 -- include/configs/socfpga_common.h | 5 ----- include/configs/socfpga_soc64_common.h | 3 --- include/configs/socrates.h | 1 - include/configs/somlabs_visionsom_6ull.h | 5 ----- include/configs/stemmy.h | 1 - include/configs/stih410-b2260.h | 4 ---- include/configs/stm32f429-discovery.h | 2 -- include/configs/stm32f429-evaluation.h | 2 -- include/configs/stm32f469-discovery.h | 2 -- include/configs/stm32f746-disco.h | 1 - include/configs/stm32h743-disco.h | 1 - include/configs/stm32h743-eval.h | 1 - include/configs/stm32h750-art-pi.h | 1 - include/configs/stm32mp15_common.h | 1 - include/configs/stout.h | 3 +-- include/configs/stv0991.h | 4 ---- include/configs/sunxi-common.h | 5 ----- include/configs/synquacer.h | 1 - include/configs/taurus.h | 4 ++-- include/configs/tb100.h | 3 --- include/configs/tbs2910.h | 4 ---- include/configs/tegra-common.h | 5 ----- include/configs/thunderx_88xx.h | 1 - include/configs/ti814x_evm.h | 2 -- include/configs/ti_armv7_common.h | 5 ----- include/configs/ti_armv7_keystone2.h | 2 -- include/configs/total_compute.h | 1 - include/configs/tplink_wdr4300.h | 2 -- include/configs/tqma6.h | 5 ----- include/configs/trats.h | 3 --- include/configs/trats2.h | 3 --- include/configs/turris_mox.h | 1 - include/configs/udoo.h | 5 ----- include/configs/udoo_neo.h | 5 ----- include/configs/uniphier.h | 2 -- include/configs/usb_a9263.h | 4 ++-- include/configs/usbarmory.h | 5 ----- include/configs/verdin-imx8mm.h | 4 ---- include/configs/verdin-imx8mp.h | 4 ---- include/configs/vexpress_aemv8.h | 2 -- include/configs/vexpress_common.h | 3 --- include/configs/vf610twr.h | 5 ----- include/configs/vinco.h | 3 --- include/configs/vining_2000.h | 5 ----- include/configs/wandboard.h | 5 ----- include/configs/warp.h | 5 ----- include/configs/warp7.h | 5 ----- include/configs/work_92105.h | 3 --- include/configs/xilinx_versal.h | 2 -- include/configs/xilinx_versal_mini_qspi.h | 3 --- include/configs/xilinx_zynqmp.h | 2 -- include/configs/xilinx_zynqmp_mini.h | 1 - include/configs/xilinx_zynqmp_mini_emmc.h | 2 -- include/configs/xilinx_zynqmp_mini_nand.h | 1 - include/configs/xilinx_zynqmp_mini_qspi.h | 2 -- include/configs/xilinx_zynqmp_r5.h | 3 --- include/configs/xpress.h | 5 ----- include/configs/zynq-common.h | 3 --- include/system-constants.h | 16 ++++++++++++++++ 895 files changed, 1185 insertions(+), 1027 deletions(-) diff --git a/Kconfig b/Kconfig index f0179689186..429b5f9a70d 100644 --- a/Kconfig +++ b/Kconfig @@ -242,6 +242,24 @@ config SYS_BOOT_GET_KBD Enables allocating and saving a kernel copy of the bd_info in space between "bootm_low" and "bootm_low" + BOOTMAPSZ. +config HAS_CUSTOM_SYS_INIT_SP_ADDR + bool "Use a custom location for the initial stack pointer address" + depends on ARC || (ARM && !INIT_SP_RELATIVE) || MIPS || PPC || RISCV + default y if TFABOOT + help + Typically, we use an initial stack pointer address that is calculated + by taking the statically defined CONFIG_SYS_INIT_RAM_ADDR, adding the + statically defined CONFIG_SYS_INIT_RAM_SIZE and then subtracting the + build-time constant of GENERATED_GBL_DATA_SIZE. On MIPS a different + but statica calculation is performed. However, some platforms will + take a different approach. Say Y here to define the address statically + instead. + +config CUSTOM_SYS_INIT_SP_ADDR + hex "Static location for the initial stack pointer" + depends on HAS_CUSTOM_SYS_INIT_SP_ADDR + default SYS_TEXT_BASE if TFABOOT + config SYS_MALLOC_F bool "Enable malloc() pool before relocation" default y if DM diff --git a/README b/README index f79a7331b21..02a2a3ff882 100644 --- a/README +++ b/README @@ -493,12 +493,6 @@ The following options need to be configured: Defines the SEC controller register space as Little Endian - MIPS CPU options: - CONFIG_SYS_INIT_SP_OFFSET - - Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack - pointer. This is needed for the temporary stack before - relocation. - CONFIG_XWAY_SWAP_BYTES Enable compilation of tools/xway-swap-bytes needed for Lantiq diff --git a/arch/arc/lib/start.S b/arch/arc/lib/start.S index 016ae85be23..9f5547e552d 100644 --- a/arch/arc/lib/start.S +++ b/arch/arc/lib/start.S @@ -7,6 +7,7 @@ #include #include #include +#include ENTRY(_start) /* Setup interrupt vector base that matches "__text_start" */ @@ -86,7 +87,7 @@ ENTRY(_start) #endif /* Establish C runtime stack and frame */ - mov %sp, CONFIG_SYS_INIT_SP_ADDR + mov %sp, SYS_INIT_SP_ADDR mov %fp, %sp /* Allocate reserved area from current top of stack */ diff --git a/arch/arm/cpu/arm926ejs/mxs/start.S b/arch/arm/cpu/arm926ejs/mxs/start.S index adec2c8ada6..61982e38a1d 100644 --- a/arch/arm/cpu/arm926ejs/mxs/start.S +++ b/arch/arm/cpu/arm926ejs/mxs/start.S @@ -21,6 +21,7 @@ #include #include #include +#include /* ************************************************************************* @@ -44,7 +45,7 @@ reset: * it point to the end of OCRAM if the SP is zero. */ cmp sp, #0x00000000 - ldreq sp, =CONFIG_SYS_INIT_SP_ADDR + ldreq sp, =SYS_INIT_SP_ADDR /* * Store all registers on old stack pointer, this will allow us later to diff --git a/arch/arm/cpu/armv7/lowlevel_init.S b/arch/arm/cpu/armv7/lowlevel_init.S index ba4b374a8bd..3c8c07fe016 100644 --- a/arch/arm/cpu/armv7/lowlevel_init.S +++ b/arch/arm/cpu/armv7/lowlevel_init.S @@ -13,6 +13,7 @@ #include #include #include +#include .pushsection .text.s_init, "ax" WEAK(s_init) @@ -28,7 +29,7 @@ WEAK(lowlevel_init) #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK) ldr sp, =CONFIG_SPL_STACK #else - ldr sp, =CONFIG_SYS_INIT_SP_ADDR + ldr sp, =SYS_INIT_SP_ADDR #endif bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ #ifdef CONFIG_SPL_DM diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 37036128a78..4f6327fe3ab 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -17,6 +17,7 @@ #include #include #include +#include /************************************************************************* * @@ -254,7 +255,7 @@ ENTRY(cpu_init_cp15) #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK) ldr r0, =(CONFIG_SPL_STACK) #else - ldr r0, =(CONFIG_SYS_INIT_SP_ADDR) + ldr r0, =(SYS_INIT_SP_ADDR) #endif bic r0, r0, #7 /* 8-byte alignment for ABI compliance */ mov sp, r0 diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S index 612a2d5b698..fe6b4472b93 100644 --- a/arch/arm/lib/crt0.S +++ b/arch/arm/lib/crt0.S @@ -9,6 +9,7 @@ #include #include #include +#include /* * This file handles the target-independent stages of the U-Boot @@ -104,7 +105,7 @@ ENTRY(_main) #elif defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK) ldr r0, =(CONFIG_SPL_STACK) #else - ldr r0, =(CONFIG_SYS_INIT_SP_ADDR) + ldr r0, =(SYS_INIT_SP_ADDR) #endif bic r0, r0, #7 /* 8-byte alignment for ABI compliance */ mov sp, r0 diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S index 84c04bd43a2..dcc924dd2f4 100644 --- a/arch/arm/lib/crt0_64.S +++ b/arch/arm/lib/crt0_64.S @@ -13,6 +13,7 @@ #include #include #include +#include /* * This file handles the target-independent stages of the U-Boot @@ -81,7 +82,7 @@ ENTRY(_main) #endif add x0, x0, #CONFIG_SYS_INIT_SP_BSS_OFFSET #else - ldr x0, =(CONFIG_SYS_INIT_SP_ADDR) + ldr x0, =(SYS_INIT_SP_ADDR) #endif bic sp, x0, #0xf /* 16-byte alignment for ABI compliance */ mov x0, sp diff --git a/arch/arm/lib/vectors_m.S b/arch/arm/lib/vectors_m.S index 7d2d55c7f9f..8d88cc756fc 100644 --- a/arch/arm/lib/vectors_m.S +++ b/arch/arm/lib/vectors_m.S @@ -7,6 +7,7 @@ #include #include #include +#include .type __hard_fault_entry, %function __hard_fault_entry: @@ -35,7 +36,7 @@ __invalid_entry: .section .vectors ENTRY(_start) - .long CONFIG_SYS_INIT_SP_ADDR @ 0 - Reset stack pointer + .long SYS_INIT_SP_ADDR @ 0 - Reset stack pointer .long reset @ 1 - Reset .long __invalid_entry @ 2 - NMI .long __hard_fault_entry @ 3 - HardFault diff --git a/arch/arm/mach-kirkwood/include/mach/config.h b/arch/arm/mach-kirkwood/include/mach/config.h index 7810cf22d4e..45ee0272f77 100644 --- a/arch/arm/mach-kirkwood/include/mach/config.h +++ b/arch/arm/mach-kirkwood/include/mach/config.h @@ -27,9 +27,6 @@ #define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ #define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 for kernel */ -/* Kirkwood has 2k of Security SRAM, use it for SP */ -#define CONFIG_SYS_INIT_SP_ADDR 0xC8012000 - #define CONFIG_I2C_MVTWSI_BASE0 KW_TWSI_BASE #define MV_UART_CONSOLE_BASE KW_UART0_BASE #define MV_SATA_BASE KW_SATA_BASE diff --git a/arch/arm/mach-mvebu/include/mach/config.h b/arch/arm/mach-mvebu/include/mach/config.h index fb4e5af770c..4add0d9e103 100644 --- a/arch/arm/mach-mvebu/include/mach/config.h +++ b/arch/arm/mach-mvebu/include/mach/config.h @@ -27,9 +27,6 @@ #define CONFIG_SYS_L2_PL310 -/* end of 16M scrubbed by training in bootrom */ -#define CONFIG_SYS_INIT_SP_ADDR 0x00FF0000 - #define MV_UART_CONSOLE_BASE MVEBU_UART0_BASE /* Needed for SPI NOR booting in SPL */ diff --git a/arch/arm/mach-rmobile/lowlevel_init.S b/arch/arm/mach-rmobile/lowlevel_init.S index eb6012a8740..212e95539bc 100644 --- a/arch/arm/mach-rmobile/lowlevel_init.S +++ b/arch/arm/mach-rmobile/lowlevel_init.S @@ -6,6 +6,7 @@ #include #include +#include ENTRY(lowlevel_init) ldr r0, =MERAM_BASE diff --git a/arch/arm/mach-rmobile/lowlevel_init_ca15.S b/arch/arm/mach-rmobile/lowlevel_init_ca15.S index 967fb027a43..a52b761b25d 100644 --- a/arch/arm/mach-rmobile/lowlevel_init_ca15.S +++ b/arch/arm/mach-rmobile/lowlevel_init_ca15.S @@ -8,6 +8,7 @@ #include #include +#include ENTRY(lowlevel_init) #ifndef CONFIG_SPL_BUILD @@ -75,7 +76,7 @@ _enable_actlr_smp: /* R8A7794 only (CA7) */ #endif _exit_init_l2_a15: - ldr r3, =(CONFIG_SYS_INIT_SP_ADDR) + ldr r3, =(SYS_INIT_SP_ADDR) sub sp, r3, #4 str lr, [sp] diff --git a/arch/arm/mach-uniphier/arm32/late_lowlevel_init.S b/arch/arm/mach-uniphier/arm32/late_lowlevel_init.S index 36db50fd97b..6c722d02eda 100644 --- a/arch/arm/mach-uniphier/arm32/late_lowlevel_init.S +++ b/arch/arm/mach-uniphier/arm32/late_lowlevel_init.S @@ -6,8 +6,9 @@ #include #include +#include ENTRY(lowlevel_init) - ldr sp, = CONFIG_SYS_INIT_SP_ADDR + ldr sp, = SYS_INIT_SP_ADDR b uniphier_cache_disable ENDPROC(lowlevel_init) diff --git a/arch/mips/cpu/start.S b/arch/mips/cpu/start.S index 47251a5b92a..2acc21d5871 100644 --- a/arch/mips/cpu/start.S +++ b/arch/mips/cpu/start.S @@ -10,11 +10,7 @@ #include #include #include - -#ifndef CONFIG_SYS_INIT_SP_ADDR -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ - CONFIG_SYS_INIT_SP_OFFSET) -#endif +#include #ifdef CONFIG_32BIT # define STATUS_SET 0 @@ -44,7 +40,7 @@ .macro setup_stack_gd li t0, -16 - PTR_LI t1, CONFIG_SYS_INIT_SP_ADDR + PTR_LI t1, SYS_INIT_SP_ADDR and sp, t1, t0 # force 16 byte alignment PTR_SUBU \ sp, sp, GD_SIZE # reserve space for gd diff --git a/arch/mips/mach-mtmips/mt7628/lowlevel_init.S b/arch/mips/mach-mtmips/mt7628/lowlevel_init.S index 83cd8fa9b6b..cb369fbc275 100644 --- a/arch/mips/mach-mtmips/mt7628/lowlevel_init.S +++ b/arch/mips/mach-mtmips/mt7628/lowlevel_init.S @@ -12,16 +12,11 @@ #include #include #include +#include #include "mt7628.h" -/* Set temporary stack address range */ -#ifndef CONFIG_SYS_INIT_SP_ADDR -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ - CONFIG_SYS_INIT_SP_OFFSET) -#endif - #define CACHE_STACK_SIZE 0x4000 -#define CACHE_STACK_BASE (CONFIG_SYS_INIT_SP_ADDR - CACHE_STACK_SIZE) +#define CACHE_STACK_BASE (SYS_INIT_SP_ADDR - CACHE_STACK_SIZE) #define DELAY_USEC(us) ((58 * (us)) / 3) @@ -134,7 +129,7 @@ NESTED(lowlevel_init, 0, ra) #if CONFIG_IS_ENABLED(INIT_STACK_WITHOUT_MALLOC_F) /* Set malloc base */ - li t0, (CONFIG_SYS_INIT_SP_ADDR + 15) & (~15) + li t0, (SYS_INIT_SP_ADDR + 15) & (~15) PTR_S t0, GD_MALLOC_BASE(k0) # gd->malloc_base offset #endif diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c b/arch/powerpc/cpu/mpc83xx/cpu_init.c index b2b259b1cbd..e3e1bfd65a5 100644 --- a/arch/powerpc/cpu/mpc83xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include #include @@ -138,7 +139,7 @@ void cpu_init_f (volatile immap_t * im) 0; /* Pointer is writable since we allocated a register for it */ - gd = (gd_t *)CONFIG_SYS_INIT_SP_ADDR; + gd = (gd_t *)SYS_INIT_SP_ADDR; /* global data region was cleared in start.S */ diff --git a/arch/powerpc/cpu/mpc83xx/spl_minimal.c b/arch/powerpc/cpu/mpc83xx/spl_minimal.c index 6d4655f1ade..d8f6cfe2b4a 100644 --- a/arch/powerpc/cpu/mpc83xx/spl_minimal.c +++ b/arch/powerpc/cpu/mpc83xx/spl_minimal.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include @@ -25,7 +26,7 @@ DECLARE_GLOBAL_DATA_PTR; void cpu_init_f (volatile immap_t * im) { /* Pointer is writable since we allocated a register for it */ - gd = (gd_t *)CONFIG_SYS_INIT_SP_ADDR; + gd = (gd_t *)SYS_INIT_SP_ADDR; /* global data region was cleared in start.S */ diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S index b136456f5fe..8a351b927c0 100644 --- a/arch/powerpc/cpu/mpc83xx/start.S +++ b/arch/powerpc/cpu/mpc83xx/start.S @@ -13,6 +13,7 @@ #include #include #include +#include #include #include @@ -229,8 +230,8 @@ in_flash: /* set up the stack pointer in our newly created * cache-ram; use r3 to keep the new SP for now to * avoid overiding the SP it uselessly */ - lis r3, CONFIG_SYS_INIT_SP_ADDR@h - ori r3, r3, CONFIG_SYS_INIT_SP_ADDR@l + lis r3, SYS_INIT_SP_ADDR@h + ori r3, r3, SYS_INIT_SP_ADDR@l /* r4 = end of GD area */ addi r4, r3, GENERATED_GBL_DATA_SIZE diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c index 612941f9e7e..1bba216371b 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -94,7 +95,7 @@ void cpu_init_early_f(void *fdt) #endif /* Pointer is writable since we allocated a register for it */ - gd = (gd_t *)CONFIG_SYS_INIT_SP_ADDR; + gd = (gd_t *)SYS_INIT_SP_ADDR; /* gd area was zeroed during startup */ diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 649afa0860c..9a28269020d 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -14,6 +14,7 @@ #include #include #include +#include #include #include @@ -1160,8 +1161,8 @@ _start_cont: bne 1b #if CONFIG_VAL(SYS_MALLOC_F_LEN) - lis r4,CONFIG_SYS_INIT_SP_ADDR@h - ori r4,r4,CONFIG_SYS_INIT_SP_ADDR@l + lis r4,SYS_INIT_SP_ADDR@h + ori r4,r4,SYS_INIT_SP_ADDR@l addi r3,r3,16 /* Pre-relocation malloc area */ stw r3,GD_MALLOC_BASE(r4) diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index 76850ec9be2..f2ef5564a15 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -13,6 +13,7 @@ #include #include #include +#include #include #include @@ -94,7 +95,7 @@ call_board_init_f: #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK) li t1, CONFIG_SPL_STACK #else - li t1, CONFIG_SYS_INIT_SP_ADDR + li t1, SYS_INIT_SP_ADDR #endif and sp, t1, t0 /* force 16 byte alignment */ diff --git a/board/synopsys/iot_devkit/u-boot.lds b/board/synopsys/iot_devkit/u-boot.lds index d0831687055..5aff100315e 100644 --- a/board/synopsys/iot_devkit/u-boot.lds +++ b/board/synopsys/iot_devkit/u-boot.lds @@ -5,6 +5,7 @@ */ #include +#include MEMORY { ROM : ORIGIN = ROM_BASE, LENGTH = ROM_SIZE diff --git a/configs/SBx81LIFKW_defconfig b/configs/SBx81LIFKW_defconfig index 3c77bdcc2c1..f186f247eb6 100644 --- a/configs/SBx81LIFKW_defconfig +++ b/configs/SBx81LIFKW_defconfig @@ -13,6 +13,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="kirkwood-atl-sbx81lifkw" CONFIG_IDENT_STRING="\nSBx81LIFKW" CONFIG_SYS_LOAD_ADDR=0x1000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y diff --git a/configs/SBx81LIFXCAT_defconfig b/configs/SBx81LIFXCAT_defconfig index 1a0cf14d261..9d579091a82 100644 --- a/configs/SBx81LIFXCAT_defconfig +++ b/configs/SBx81LIFXCAT_defconfig @@ -13,6 +13,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="kirkwood-atl-sbx81lifxcat" CONFIG_IDENT_STRING="\nSBx81LIFXCAT" CONFIG_SYS_LOAD_ADDR=0x1000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y diff --git a/configs/a3y17lte_defconfig b/configs/a3y17lte_defconfig index 5a2a46ed64b..67eb7aff1fd 100644 --- a/configs/a3y17lte_defconfig +++ b/configs/a3y17lte_defconfig @@ -10,6 +10,8 @@ CONFIG_TARGET_A3Y17LTE=y CONFIG_NR_DRAM_BANKS=8 CONFIG_DEFAULT_DEVICE_TREE="exynos78x0-axy17lte" CONFIG_SYS_LOAD_ADDR=0x40001000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40200e50 CONFIG_FIT=y CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="echo Read pressed buttons status;KEY_VOLUMEUP=gpa20;KEY_HOME=gpa17;KEY_VOLUMEDOWN=gpa21;KEY_POWER=gpa00;PRESSED=0;RELEASED=1;if gpio input $KEY_VOLUMEUP; then setenv VOLUME_UP $PRESSED; else setenv VOLUME_UP $RELEASED; fi;if gpio input $KEY_VOLUMEDOWN; then setenv VOLUME_DOWN $PRESSED; else setenv VOLUME_DOWN $RELEASED; fi;if gpio input $KEY_HOME; then setenv HOME $PRESSED; else setenv HOME $RELEASED; fi;if gpio input $KEY_POWER; then setenv POWER $PRESSED; else setenv POWER $RELEASED; fi;" diff --git a/configs/a5y17lte_defconfig b/configs/a5y17lte_defconfig index 4876a367693..44915ea5341 100644 --- a/configs/a5y17lte_defconfig +++ b/configs/a5y17lte_defconfig @@ -10,6 +10,8 @@ CONFIG_TARGET_A5Y17LTE=y CONFIG_NR_DRAM_BANKS=12 CONFIG_DEFAULT_DEVICE_TREE="exynos78x0-axy17lte" CONFIG_SYS_LOAD_ADDR=0x40001000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40200e50 CONFIG_FIT=y CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="echo Read pressed buttons status;KEY_VOLUMEUP=gpa20;KEY_HOME=gpa17;KEY_VOLUMEDOWN=gpa21;KEY_POWER=gpa00;PRESSED=0;RELEASED=1;if gpio input $KEY_VOLUMEUP; then setenv VOLUME_UP $PRESSED; else setenv VOLUME_UP $RELEASED; fi;if gpio input $KEY_VOLUMEDOWN; then setenv VOLUME_DOWN $PRESSED; else setenv VOLUME_DOWN $RELEASED; fi;if gpio input $KEY_HOME; then setenv HOME $PRESSED; else setenv HOME $RELEASED; fi;if gpio input $KEY_POWER; then setenv POWER $PRESSED; else setenv POWER $RELEASED; fi;" diff --git a/configs/a7y17lte_defconfig b/configs/a7y17lte_defconfig index 8ee48e3f80c..58486f6a571 100644 --- a/configs/a7y17lte_defconfig +++ b/configs/a7y17lte_defconfig @@ -10,6 +10,8 @@ CONFIG_TARGET_A7Y17LTE=y CONFIG_NR_DRAM_BANKS=12 CONFIG_DEFAULT_DEVICE_TREE="exynos78x0-axy17lte" CONFIG_SYS_LOAD_ADDR=0x40001000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40200e50 CONFIG_FIT=y CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="echo Read pressed buttons status;KEY_VOLUMEUP=gpa20;KEY_HOME=gpa17;KEY_VOLUMEDOWN=gpa21;KEY_POWER=gpa00;PRESSED=0;RELEASED=1;if gpio input $KEY_VOLUMEUP; then setenv VOLUME_UP $PRESSED; else setenv VOLUME_UP $RELEASED; fi;if gpio input $KEY_VOLUMEDOWN; then setenv VOLUME_DOWN $PRESSED; else setenv VOLUME_DOWN $RELEASED; fi;if gpio input $KEY_HOME; then setenv HOME $PRESSED; else setenv HOME $RELEASED; fi;if gpio input $KEY_POWER; then setenv POWER $PRESSED; else setenv POWER $RELEASED; fi;" diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig index 714a7075913..fcfc7b3fe23 100644 --- a/configs/ae350_rv32_defconfig +++ b/configs/ae350_rv32_defconfig @@ -7,6 +7,8 @@ CONFIG_DEFAULT_DEVICE_TREE="ae350_32" CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_TARGET_AX25_AE350=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe80 CONFIG_FIT=y CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig index 45eb33eae88..e01266bb8bd 100644 --- a/configs/ae350_rv32_spl_defconfig +++ b/configs/ae350_rv32_spl_defconfig @@ -10,6 +10,8 @@ CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_TARGET_AX25_AE350=y CONFIG_RISCV_SMODE=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xffff00 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x00200000 CONFIG_SYS_MONITOR_BASE=0x88000000 diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig index e5c5d9680e1..f37fa045c59 100644 --- a/configs/ae350_rv32_spl_xip_defconfig +++ b/configs/ae350_rv32_spl_xip_defconfig @@ -12,6 +12,8 @@ CONFIG_TARGET_AX25_AE350=y CONFIG_RISCV_SMODE=y CONFIG_XIP=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xffff00 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80010000 CONFIG_SYS_MONITOR_BASE=0x88000000 diff --git a/configs/ae350_rv32_xip_defconfig b/configs/ae350_rv32_xip_defconfig index f0b842f35ed..01883850f9a 100644 --- a/configs/ae350_rv32_xip_defconfig +++ b/configs/ae350_rv32_xip_defconfig @@ -8,6 +8,8 @@ CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_TARGET_AX25_AE350=y CONFIG_XIP=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe80 CONFIG_FIT=y CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig index 5425255a700..477329fa67a 100644 --- a/configs/ae350_rv64_defconfig +++ b/configs/ae350_rv64_defconfig @@ -8,6 +8,8 @@ CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_TARGET_AX25_AE350=y CONFIG_ARCH_RV64I=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffd70 CONFIG_FIT=y CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig index 856b0c06bc0..f62d61c7d37 100644 --- a/configs/ae350_rv64_spl_defconfig +++ b/configs/ae350_rv64_spl_defconfig @@ -11,6 +11,8 @@ CONFIG_TARGET_AX25_AE350=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe70 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x00200000 CONFIG_SYS_MONITOR_BASE=0x88000000 diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig index 9536fc58208..f5fbba86181 100644 --- a/configs/ae350_rv64_spl_xip_defconfig +++ b/configs/ae350_rv64_spl_xip_defconfig @@ -13,6 +13,8 @@ CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y CONFIG_XIP=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe70 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80010000 CONFIG_SYS_MONITOR_BASE=0x88000000 diff --git a/configs/ae350_rv64_xip_defconfig b/configs/ae350_rv64_xip_defconfig index d4b2e638b29..2be91815a8e 100644 --- a/configs/ae350_rv64_xip_defconfig +++ b/configs/ae350_rv64_xip_defconfig @@ -9,6 +9,8 @@ CONFIG_TARGET_AX25_AE350=y CONFIG_ARCH_RV64I=y CONFIG_XIP=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffd70 CONFIG_FIT=y CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 diff --git a/configs/alt_defconfig b/configs/alt_defconfig index a7ba2460c9c..897b3a230e2 100644 --- a/configs/alt_defconfig +++ b/configs/alt_defconfig @@ -26,6 +26,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x50000000 CONFIG_ENV_ADDR=0xC0000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_MAX_SIZE=0x4000 diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig index 653761b6d94..b78316ee172 100644 --- a/configs/am335x_baltos_defconfig +++ b/configs/am335x_baltos_defconfig @@ -12,6 +12,8 @@ CONFIG_SPL=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run usbboot;run mmcboot;setenv mmcdev 1; setenv bootpart 1:2; run mmcboot;run nandboot;" diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig index 53ebc6d62a9..7458e9c3e2c 100644 --- a/configs/am335x_boneblack_vboot_defconfig +++ b/configs/am335x_boneblack_vboot_defconfig @@ -10,6 +10,8 @@ CONFIG_CLOCK_SYNTHESIZER=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_TIMESTAMP=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig index c7d19315016..50d528fa5a2 100644 --- a/configs/am335x_evm_defconfig +++ b/configs/am335x_evm_defconfig @@ -10,6 +10,8 @@ CONFIG_AM335X_USB0_PERIPHERAL=y CONFIG_AM335X_USB1=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_TIMESTAMP=y CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig index bdb0ef0b976..d39941c7d26 100644 --- a/configs/am335x_evm_spiboot_defconfig +++ b/configs/am335x_evm_spiboot_defconfig @@ -12,6 +12,8 @@ CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_TIMESTAMP=y CONFIG_SPL_LOAD_FIT=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/am335x_guardian_defconfig b/configs/am335x_guardian_defconfig index 738d4bbc69d..33d37db284d 100644 --- a/configs/am335x_guardian_defconfig +++ b/configs/am335x_guardian_defconfig @@ -21,6 +21,8 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x81000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030fef0 CONFIG_TIMESTAMP=y CONFIG_BOOTDELAY=0 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig index 36ebff3d397..1e7dc889730 100644 --- a/configs/am335x_hs_evm_defconfig +++ b/configs/am335x_hs_evm_defconfig @@ -9,6 +9,8 @@ CONFIG_AM33XX=y CONFIG_CLOCK_SYNTHESIZER=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_TIMESTAMP=y CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig index cd1f7e3722c..2c987072f75 100644 --- a/configs/am335x_hs_evm_uart_defconfig +++ b/configs/am335x_hs_evm_uart_defconfig @@ -12,6 +12,8 @@ CONFIG_SPL=y # CONFIG_SPL_FS_FAT is not set # CONFIG_SPL_LIBDISK_SUPPORT is not set CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_TIMESTAMP=y CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set diff --git a/configs/am335x_igep003x_defconfig b/configs/am335x_igep003x_defconfig index 85b444a535f..e6bc6597612 100644 --- a/configs/am335x_igep003x_defconfig +++ b/configs/am335x_igep003x_defconfig @@ -14,6 +14,8 @@ CONFIG_SPL=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt;run mmcboot;run nandboot;run netboot;" CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/am335x_pdu001_defconfig b/configs/am335x_pdu001_defconfig index 5e9231b5231..ec56a065fa2 100644 --- a/configs/am335x_pdu001_defconfig +++ b/configs/am335x_pdu001_defconfig @@ -16,6 +16,8 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_LOCALVERSION="-EETS-1.0.0" CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_BOOTDELAY=1 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig index 535682516ba..66d775f2896 100644 --- a/configs/am335x_shc_defconfig +++ b/configs/am335x_shc_defconfig @@ -17,6 +17,8 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SERIES=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_TIMESTAMP=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig index b0146a394bb..9a60c126a67 100644 --- a/configs/am335x_shc_ict_defconfig +++ b/configs/am335x_shc_ict_defconfig @@ -18,6 +18,8 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SHC_ICT=y CONFIG_SERIES=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_TIMESTAMP=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig index 8ddf834d766..354c8786bc3 100644 --- a/configs/am335x_shc_netboot_defconfig +++ b/configs/am335x_shc_netboot_defconfig @@ -18,6 +18,8 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SHC_NETBOOT=y CONFIG_SERIES=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_TIMESTAMP=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig index e50cca7c02b..a29f9d2312a 100644 --- a/configs/am335x_shc_sdboot_defconfig +++ b/configs/am335x_shc_sdboot_defconfig @@ -18,6 +18,8 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SHC_SDBOOT=y CONFIG_SERIES=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_TIMESTAMP=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig index d468c14f092..c8ad4ca6114 100644 --- a/configs/am335x_sl50_defconfig +++ b/configs/am335x_sl50_defconfig @@ -15,6 +15,8 @@ CONFIG_ENV_OFFSET_REDUND=0x20000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_TIMESTAMP=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig index 1ae12cb6fbd..dfd0af08fca 100644 --- a/configs/am3517_evm_defconfig +++ b/configs/am3517_evm_defconfig @@ -14,6 +14,8 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x2500 CONFIG_SPL=y CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_BOOTDELAY=10 CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then echo SD/MMC found on device $mmcdev; if run loadbootenv; then run importbootenv; fi; echo Checking if uenvcmd is set ...; if test -n $uenvcmd; then echo Running uenvcmd ...; run uenvcmd; fi; echo Running default loadimage ...; setenv bootfile zImage; if run loadimage; then run loadfdt; run mmcboot; fi; else run nandboot; fi" CONFIG_SPL_MAX_SIZE=0xec00 diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig index 282fcf6e0f6..96b2704dd1b 100644 --- a/configs/am43xx_evm_defconfig +++ b/configs/am43xx_evm_defconfig @@ -10,6 +10,8 @@ CONFIG_AM43XX=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" diff --git a/configs/am43xx_evm_qspiboot_defconfig b/configs/am43xx_evm_qspiboot_defconfig index b541aa796b9..80ad268fe19 100644 --- a/configs/am43xx_evm_qspiboot_defconfig +++ b/configs/am43xx_evm_qspiboot_defconfig @@ -12,6 +12,8 @@ CONFIG_DEFAULT_DEVICE_TREE="am437x-sk-evm" CONFIG_AM43XX=y CONFIG_ENV_OFFSET_REDUND=0x120000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_QSPI_BOOT=y CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/am43xx_evm_rtconly_defconfig b/configs/am43xx_evm_rtconly_defconfig index b28b3a133f0..84339babc5b 100644 --- a/configs/am43xx_evm_rtconly_defconfig +++ b/configs/am43xx_evm_rtconly_defconfig @@ -10,6 +10,8 @@ CONFIG_AM43XX=y CONFIG_SPL_RTC_DDR_SUPPORT=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig index 14a34501c93..5586ca025d4 100644 --- a/configs/am43xx_evm_usbhost_boot_defconfig +++ b/configs/am43xx_evm_usbhost_boot_defconfig @@ -9,6 +9,8 @@ CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" CONFIG_AM43XX=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig index 6b08ebe9894..cf1db1e66bb 100644 --- a/configs/am43xx_hs_evm_defconfig +++ b/configs/am43xx_hs_evm_defconfig @@ -16,6 +16,8 @@ CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000 CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index 400a1ae5c82..acb2946fdf5 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -15,6 +15,8 @@ CONFIG_SPL_SPI=y CONFIG_ARMV7_LPAE=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037ff00 CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index 7131b1c9c00..e51df5f15b2 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -18,6 +18,8 @@ CONFIG_SPL_SPI=y CONFIG_ARMV7_LPAE=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037ff00 CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index bf3934729c4..c30377338b2 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -20,6 +20,8 @@ CONFIG_SPL_SPI=y CONFIG_ARMV7_LPAE=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037ff00 CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 # CONFIG_USE_SPL_FIT_GENERATOR is not set diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig index 93358c1745d..6dcdb070efa 100644 --- a/configs/am64x_evm_a53_defconfig +++ b/configs/am64x_evm_a53_defconfig @@ -25,6 +25,8 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 diff --git a/configs/am64x_evm_r5_defconfig b/configs/am64x_evm_r5_defconfig index cbeb8bf8704..669e4960e1d 100644 --- a/configs/am64x_evm_r5_defconfig +++ b/configs/am64x_evm_r5_defconfig @@ -24,6 +24,8 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7019b800 CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig index 1966ff378c8..af8160c48f7 100644 --- a/configs/am65x_evm_a53_defconfig +++ b/configs/am65x_evm_a53_defconfig @@ -25,6 +25,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y # CONFIG_PSCI_RESET is not set CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index c686b405398..b6b007525a4 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -24,6 +24,8 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c7effc # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set diff --git a/configs/am65x_evm_r5_usbdfu_defconfig b/configs/am65x_evm_r5_usbdfu_defconfig index 175c4ceb3f1..aece9f2dedd 100644 --- a/configs/am65x_evm_r5_usbdfu_defconfig +++ b/configs/am65x_evm_r5_usbdfu_defconfig @@ -18,6 +18,8 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c7effc # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 diff --git a/configs/am65x_evm_r5_usbmsc_defconfig b/configs/am65x_evm_r5_usbmsc_defconfig index c81400030d8..8d9b7467126 100644 --- a/configs/am65x_evm_r5_usbmsc_defconfig +++ b/configs/am65x_evm_r5_usbmsc_defconfig @@ -18,6 +18,8 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c7effc # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/am65x_hs_evm_a53_defconfig b/configs/am65x_hs_evm_a53_defconfig index 3ee472653f2..efda16e14f5 100644 --- a/configs/am65x_hs_evm_a53_defconfig +++ b/configs/am65x_hs_evm_a53_defconfig @@ -26,6 +26,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y # CONFIG_PSCI_RESET is not set CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set diff --git a/configs/am65x_hs_evm_r5_defconfig b/configs/am65x_hs_evm_r5_defconfig index fc8cc9151da..39ce5276f4e 100644 --- a/configs/am65x_hs_evm_r5_defconfig +++ b/configs/am65x_hs_evm_r5_defconfig @@ -23,6 +23,8 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c7effc # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set diff --git a/configs/ap121_defconfig b/configs/ap121_defconfig index 648cf227e3c..b78437e9232 100644 --- a/configs/ap121_defconfig +++ b/configs/ap121_defconfig @@ -13,6 +13,8 @@ CONFIG_ARCH_ATH79=y CONFIG_DEBUG_UART=y CONFIG_SYS_MEMTEST_START=0x80100000 CONFIG_SYS_MEMTEST_END=0x83f00000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xbd007fff CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs" diff --git a/configs/ap143_defconfig b/configs/ap143_defconfig index 272d1c2e396..f16724e4c05 100644 --- a/configs/ap143_defconfig +++ b/configs/ap143_defconfig @@ -15,6 +15,8 @@ CONFIG_TARGET_AP143=y CONFIG_DEBUG_UART=y CONFIG_SYS_MEMTEST_START=0x80100000 CONFIG_SYS_MEMTEST_END=0x83f00000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xbd001fff CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs" diff --git a/configs/ap152_defconfig b/configs/ap152_defconfig index 67c36cdab81..2036cde385e 100644 --- a/configs/ap152_defconfig +++ b/configs/ap152_defconfig @@ -15,6 +15,8 @@ CONFIG_TARGET_AP152=y CONFIG_DEBUG_UART=y CONFIG_SYS_MEMTEST_START=0x80100000 CONFIG_SYS_MEMTEST_END=0x83f00000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xbd001fff CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs" diff --git a/configs/apalis-imx8_defconfig b/configs/apalis-imx8_defconfig index 779a989d248..b1e6dda8546 100644 --- a/configs/apalis-imx8_defconfig +++ b/configs/apalis-imx8_defconfig @@ -13,6 +13,8 @@ CONFIG_SYS_LOAD_ADDR=0x80280000 CONFIG_SYS_MEMTEST_START=0x88000000 CONFIG_SYS_MEMTEST_END=0x89000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/armadillo-800eva_defconfig b/configs/armadillo-800eva_defconfig index 784064a17b9..6a67c60dd42 100644 --- a/configs/armadillo-800eva_defconfig +++ b/configs/armadillo-800eva_defconfig @@ -15,6 +15,8 @@ CONFIG_TARGET_ARMADILLO_800EVA=y CONFIG_SYS_CLK_FREQ=50000000 CONFIG_SYS_LOAD_ADDR=0x44000000 CONFIG_ENV_ADDR=0x40000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xe8083000 CONFIG_SYS_MONITOR_BASE=0x00000000 CONFIG_BOOTDELAY=3 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/arndale_defconfig b/configs/arndale_defconfig index 62d8819e354..5beba587766 100644 --- a/configs/arndale_defconfig +++ b/configs/arndale_defconfig @@ -17,6 +17,8 @@ CONFIG_SPL=y CONFIG_IDENT_STRING=" for ARNDALE" CONFIG_SYS_LOAD_ADDR=0x43e00000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2050000 CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_USE_PREBOOT=y diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig index 72b747f7787..3c17b64797d 100644 --- a/configs/at91sam9m10g45ek_mmc_defconfig +++ b/configs/at91sam9m10g45ek_mmc_defconfig @@ -14,6 +14,8 @@ CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x70003f00 CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig b/configs/at91sam9m10g45ek_nandflash_defconfig index 724fda01e8e..ecce82447a1 100644 --- a/configs/at91sam9m10g45ek_nandflash_defconfig +++ b/configs/at91sam9m10g45ek_nandflash_defconfig @@ -14,6 +14,8 @@ CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x70003f00 CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig index 986aaec25f2..21cbfbd1f42 100644 --- a/configs/at91sam9n12ek_mmc_defconfig +++ b/configs/at91sam9n12ek_mmc_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x303f00 CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig index 3a5a3f1aa14..beb24e23622 100644 --- a/configs/at91sam9n12ek_nandflash_defconfig +++ b/configs/at91sam9n12ek_nandflash_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x303f00 CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig index f5426508129..3ac22ffb62a 100644 --- a/configs/at91sam9n12ek_spiflash_defconfig +++ b/configs/at91sam9n12ek_spiflash_defconfig @@ -14,6 +14,8 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x303f00 CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig index 671a01b15a7..d31ece77feb 100644 --- a/configs/at91sam9x5ek_dataflash_defconfig +++ b/configs/at91sam9x5ek_dataflash_defconfig @@ -16,6 +16,8 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig index 13ccaecd9a4..cfd2dcd4564 100644 --- a/configs/at91sam9x5ek_mmc_defconfig +++ b/configs/at91sam9x5ek_mmc_defconfig @@ -14,6 +14,8 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig index cdc12d42a5c..508896b311d 100644 --- a/configs/at91sam9x5ek_nandflash_defconfig +++ b/configs/at91sam9x5ek_nandflash_defconfig @@ -14,6 +14,8 @@ CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_FIT=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig index 2fd143c16a5..387dc0ff0c6 100644 --- a/configs/at91sam9x5ek_spiflash_defconfig +++ b/configs/at91sam9x5ek_spiflash_defconfig @@ -16,6 +16,8 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_FIT=y CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig index c2858692d94..8f610c42e04 100644 --- a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig +++ b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig @@ -18,6 +18,8 @@ CONFIG_DEBUG_UART=y CONFIG_SYS_MEMTEST_START=0x00000000 CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8000000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig index 581f4e67cce..efad458720b 100644 --- a/configs/axs101_defconfig +++ b/configs/axs101_defconfig @@ -10,6 +10,8 @@ CONFIG_DEBUG_UART_CLOCK=33333333 CONFIG_SYS_CLK_FREQ=750000000 CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS3,115200n8" diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig index 3e24770e3da..64407655767 100644 --- a/configs/axs103_defconfig +++ b/configs/axs103_defconfig @@ -10,6 +10,8 @@ CONFIG_DEBUG_UART_CLOCK=33333333 CONFIG_SYS_CLK_FREQ=100000000 CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS3,115200n8" diff --git a/configs/bananapi-m5_defconfig b/configs/bananapi-m5_defconfig index 204595eac8e..b54272c2b38 100644 --- a/configs/bananapi-m5_defconfig +++ b/configs/bananapi-m5_defconfig @@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING="bpi-m5" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/bcm963158_ram_defconfig b/configs/bcm963158_ram_defconfig index e9bf7527dad..3bc4ca3ef6e 100644 --- a/configs/bcm963158_ram_defconfig +++ b/configs/bcm963158_ram_defconfig @@ -12,6 +12,8 @@ CONFIG_DEFAULT_DEVICE_TREE="bcm963158" CONFIG_SYS_LOAD_ADDR=0x10000000 CONFIG_TARGET_BCM963158=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x11000000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_RSASSA_PSS=y diff --git a/configs/bcm96753ref_ram_defconfig b/configs/bcm96753ref_ram_defconfig index ac710f41799..59ac1cdf7e1 100644 --- a/configs/bcm96753ref_ram_defconfig +++ b/configs/bcm96753ref_ram_defconfig @@ -13,6 +13,8 @@ CONFIG_ARMV7_LPAE=y CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_TARGET_BCM96753REF=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_CIPHER=y diff --git a/configs/bcm968360bg_ram_defconfig b/configs/bcm968360bg_ram_defconfig index 9d1202c8e81..d327dc68b11 100644 --- a/configs/bcm968360bg_ram_defconfig +++ b/configs/bcm968360bg_ram_defconfig @@ -11,6 +11,8 @@ CONFIG_DEFAULT_DEVICE_TREE="bcm968360bg" CONFIG_SYS_LOAD_ADDR=0x10000000 CONFIG_TARGET_BCM968360BG=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x11000000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/bcm968580xref_ram_defconfig b/configs/bcm968580xref_ram_defconfig index 8de6edb5b95..ef5ae44345e 100644 --- a/configs/bcm968580xref_ram_defconfig +++ b/configs/bcm968580xref_ram_defconfig @@ -11,6 +11,8 @@ CONFIG_DEFAULT_DEVICE_TREE="bcm968580xref" CONFIG_SYS_LOAD_ADDR=0x10000000 CONFIG_TARGET_BCM968580XREF=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x11000000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig index 70379d76b05..9446f8454c1 100644 --- a/configs/bcm_ns3_defconfig +++ b/configs/bcm_ns3_defconfig @@ -8,6 +8,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x80000 CONFIG_DEFAULT_DEVICE_TREE="ns3-board" CONFIG_SYS_LOAD_ADDR=0x80080000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x0 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_SIGNATURE_MAX_SIZE=0x20000000 diff --git a/configs/beelink-gsking-x_defconfig b/configs/beelink-gsking-x_defconfig index 32deaf2d634..2a7fddd7eb5 100644 --- a/configs/beelink-gsking-x_defconfig +++ b/configs/beelink-gsking-x_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" beelink" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/beelink-gtking_defconfig b/configs/beelink-gtking_defconfig index 867d3b27087..862445375dd 100644 --- a/configs/beelink-gtking_defconfig +++ b/configs/beelink-gtking_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" beelink" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/beelink-gtkingpro_defconfig b/configs/beelink-gtkingpro_defconfig index 88fb05702c4..f9300a21acb 100644 --- a/configs/beelink-gtkingpro_defconfig +++ b/configs/beelink-gtkingpro_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" beelink" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/blanche_defconfig b/configs/blanche_defconfig index f4bb406be3c..42f3dc4b6f4 100644 --- a/configs/blanche_defconfig +++ b/configs/blanche_defconfig @@ -16,6 +16,8 @@ CONFIG_R8A7792=y CONFIG_TARGET_BLANCHE=y CONFIG_SYS_LOAD_ADDR=0x50000000 CONFIG_ENV_ADDR=0x40000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig index 2172d44d2ee..932cbbca9da 100644 --- a/configs/brppt1_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -17,6 +17,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x50000 CONFIG_SYS_LOAD_ADDR=0x80000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 # CONFIG_EXPERT is not set # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y diff --git a/configs/brppt1_nand_defconfig b/configs/brppt1_nand_defconfig index e4ede331e35..3363f50ebb5 100644 --- a/configs/brppt1_nand_defconfig +++ b/configs/brppt1_nand_defconfig @@ -14,6 +14,8 @@ CONFIG_TARGET_BRPPT1=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x80000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 # CONFIG_EXPERT is not set # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig index cbe0d7ba840..4b7f781e716 100644 --- a/configs/brppt1_spi_defconfig +++ b/configs/brppt1_spi_defconfig @@ -20,6 +20,8 @@ CONFIG_ENV_OFFSET_REDUND=0x30000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x80000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 # CONFIG_EXPERT is not set # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y diff --git a/configs/brsmarc1_defconfig b/configs/brsmarc1_defconfig index 824f3c22d0b..9739785c994 100644 --- a/configs/brsmarc1_defconfig +++ b/configs/brsmarc1_defconfig @@ -20,6 +20,8 @@ CONFIG_ENV_OFFSET_REDUND=0x30000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x80000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 # CONFIG_EXPERT is not set # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig index ebdfe2819e1..cefc548a00a 100644 --- a/configs/brxre1_defconfig +++ b/configs/brxre1_defconfig @@ -17,6 +17,8 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x50000 CONFIG_SYS_LOAD_ADDR=0x80000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 # CONFIG_EXPERT is not set # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y diff --git a/configs/bubblegum_96_defconfig b/configs/bubblegum_96_defconfig index f577ec07019..0daff7d1505 100644 --- a/configs/bubblegum_96_defconfig +++ b/configs/bubblegum_96_defconfig @@ -8,6 +8,8 @@ CONFIG_MACH_S900=y CONFIG_IDENT_STRING="\nBubblegum-96" CONFIG_SYS_LOAD_ADDR=0x7ffc0 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1107ff00 CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyOWL5,115200n8" diff --git a/configs/cgtqmx8_defconfig b/configs/cgtqmx8_defconfig index 83c001cd744..112a9860d83 100644 --- a/configs/cgtqmx8_defconfig +++ b/configs/cgtqmx8_defconfig @@ -16,6 +16,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x80280000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig index ad7e9602ce0..3b8fdd437f3 100644 --- a/configs/chiliboard_defconfig +++ b/configs/chiliboard_defconfig @@ -16,6 +16,8 @@ CONFIG_ENV_OFFSET_REDUND=0x22000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030fef0 CONFIG_TIMESTAMP=y CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run mmcboot; run nandboot; run netboot" diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index ad62b9fb3b3..0225e108b53 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -18,6 +18,8 @@ CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-mickey.dtb" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig index 9e7b0037b2e..d5676b5ea7a 100644 --- a/configs/chromebook_bob_defconfig +++ b/configs/chromebook_bob_defconfig @@ -18,6 +18,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index ae35cde24c6..89990e51b78 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -17,6 +17,8 @@ CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-jerry.dtb" CONFIG_SILENT_CONSOLE=y diff --git a/configs/chromebook_kevin_defconfig b/configs/chromebook_kevin_defconfig index ef8a30d3a41..5d95c9e68a6 100644 --- a/configs/chromebook_kevin_defconfig +++ b/configs/chromebook_kevin_defconfig @@ -19,6 +19,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-kevin.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index a7540afc0a2..7542d4fb21b 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -18,6 +18,8 @@ CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-minnie.dtb" CONFIG_SILENT_CONSOLE=y diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig index 20b6c8e9f0d..2aaa997ef81 100644 --- a/configs/chromebook_speedy_defconfig +++ b/configs/chromebook_speedy_defconfig @@ -18,6 +18,8 @@ CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-speedy.dtb" CONFIG_SILENT_CONSOLE=y diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig index cbdf8f61b17..fc7aaba37dd 100644 --- a/configs/clearfog_defconfig +++ b/configs/clearfog_defconfig @@ -19,6 +19,8 @@ CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/clearfog_gt_8k_defconfig b/configs/clearfog_gt_8k_defconfig index 1b2ccc3a672..a45c02061ee 100644 --- a/configs/clearfog_gt_8k_defconfig +++ b/configs/clearfog_gt_8k_defconfig @@ -15,6 +15,8 @@ CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/cm_t335_defconfig b/configs/cm_t335_defconfig index 162aabe4ff6..6d77e8ed1be 100644 --- a/configs/cm_t335_defconfig +++ b/configs/cm_t335_defconfig @@ -14,6 +14,8 @@ CONFIG_SPL=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_TIMESTAMP=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig index 1507131d07f..72c71020e0d 100644 --- a/configs/cm_t43_defconfig +++ b/configs/cm_t43_defconfig @@ -22,6 +22,8 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_BOOTCOMMAND="mmc dev 0; if mmc rescan; then if run loadbootscript; then run bootscript; fi; fi; mmc dev 1; if mmc rescan; then run emmcboot; fi;" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/colibri-imx8x_defconfig b/configs/colibri-imx8x_defconfig index bb6c14c3560..964d5bebc12 100644 --- a/configs/colibri-imx8x_defconfig +++ b/configs/colibri-imx8x_defconfig @@ -13,6 +13,8 @@ CONFIG_SYS_LOAD_ADDR=0x80280000 CONFIG_SYS_MEMTEST_START=0x88000000 CONFIG_SYS_MEMTEST_END=0x89000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig index 88104e696bf..fd8cbe577de 100644 --- a/configs/controlcenterdc_defconfig +++ b/configs/controlcenterdc_defconfig @@ -22,6 +22,8 @@ CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_OF_BOARD_FIXUP=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/cortina_presidio-asic-base_defconfig b/configs/cortina_presidio-asic-base_defconfig index 99c167f345e..3edc532e31e 100644 --- a/configs/cortina_presidio-asic-base_defconfig +++ b/configs/cortina_presidio-asic-base_defconfig @@ -11,6 +11,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard" CONFIG_IDENT_STRING="Presidio-SoC" CONFIG_SYS_LOAD_ADDR=0x10000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_REMAKE_ELF=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SHOW_BOOT_PROGRESS=y diff --git a/configs/cortina_presidio-asic-emmc_defconfig b/configs/cortina_presidio-asic-emmc_defconfig index cb826361297..becb1beb1f9 100644 --- a/configs/cortina_presidio-asic-emmc_defconfig +++ b/configs/cortina_presidio-asic-emmc_defconfig @@ -11,6 +11,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard" CONFIG_IDENT_STRING="Presidio-SoC" CONFIG_SYS_LOAD_ADDR=0x10000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_REMAKE_ELF=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SHOW_BOOT_PROGRESS=y diff --git a/configs/cortina_presidio-asic-pnand_defconfig b/configs/cortina_presidio-asic-pnand_defconfig index 867db8c01f1..842ec9fa92a 100644 --- a/configs/cortina_presidio-asic-pnand_defconfig +++ b/configs/cortina_presidio-asic-pnand_defconfig @@ -11,6 +11,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard" CONFIG_IDENT_STRING="Presidio-SoC" CONFIG_SYS_LOAD_ADDR=0x10000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_REMAKE_ELF=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SHOW_BOOT_PROGRESS=y diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig index de0d526f34e..9683c662f9d 100644 --- a/configs/corvus_defconfig +++ b/configs/corvus_defconfig @@ -22,6 +22,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_SYS_LOAD_ADDR=0x70000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x70007f00 CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/crs305-1g-4s-bit_defconfig b/configs/crs305-1g-4s-bit_defconfig index 095f702b9c3..01e784efa85 100644 --- a/configs/crs305-1g-4s-bit_defconfig +++ b/configs/crs305-1g-4s-bit_defconfig @@ -11,6 +11,8 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs305-1g-4s-bit" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_BUILD_TARGET="u-boot.kwb" +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/crs305-1g-4s_defconfig b/configs/crs305-1g-4s_defconfig index d2769974db5..98e10d509dd 100644 --- a/configs/crs305-1g-4s_defconfig +++ b/configs/crs305-1g-4s_defconfig @@ -11,6 +11,8 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs305-1g-4s" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_BUILD_TARGET="u-boot.kwb" +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/crs326-24g-2s-bit_defconfig b/configs/crs326-24g-2s-bit_defconfig index 8f92707367a..dd04bd18a1c 100644 --- a/configs/crs326-24g-2s-bit_defconfig +++ b/configs/crs326-24g-2s-bit_defconfig @@ -11,6 +11,8 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs326-24g-2s-bit" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_BUILD_TARGET="u-boot.kwb" +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/crs326-24g-2s_defconfig b/configs/crs326-24g-2s_defconfig index 8e0843ec14e..8f7b839460b 100644 --- a/configs/crs326-24g-2s_defconfig +++ b/configs/crs326-24g-2s_defconfig @@ -11,6 +11,8 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs326-24g-2s" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_BUILD_TARGET="u-boot.kwb" +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/crs328-4c-20s-4s-bit_defconfig b/configs/crs328-4c-20s-4s-bit_defconfig index ca37a51a37f..68a47fc7c21 100644 --- a/configs/crs328-4c-20s-4s-bit_defconfig +++ b/configs/crs328-4c-20s-4s-bit_defconfig @@ -11,6 +11,8 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs328-4c-20s-4s-bit" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_BUILD_TARGET="u-boot.kwb" +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/crs328-4c-20s-4s_defconfig b/configs/crs328-4c-20s-4s_defconfig index 4bbde0fec07..fbf81013634 100644 --- a/configs/crs328-4c-20s-4s_defconfig +++ b/configs/crs328-4c-20s-4s_defconfig @@ -11,6 +11,8 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs328-4c-20s-4s" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_BUILD_TARGET="u-boot.kwb" +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/cubieboard7_defconfig b/configs/cubieboard7_defconfig index 1a930ca8667..223a775387a 100644 --- a/configs/cubieboard7_defconfig +++ b/configs/cubieboard7_defconfig @@ -7,6 +7,8 @@ CONFIG_MACH_S700=y CONFIG_IDENT_STRING="\ncubieboard7" CONFIG_SYS_LOAD_ADDR=0x7ffc0 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1107ff00 CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyOWL3,115200n8" diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig index b74fafd9faa..4eb74f759f5 100644 --- a/configs/d2net_v2_defconfig +++ b/configs/d2net_v2_defconfig @@ -14,6 +14,8 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-d2net" CONFIG_IDENT_STRING=" D2 v2" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_ENV_ADDR=0x70000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index 724e2face57..8ddde6a80b5 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -23,6 +23,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0xc0700000 CONFIG_LTO=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0000f20 CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig index 68318dc4fcc..88ef772d9d5 100644 --- a/configs/da850evm_direct_nor_defconfig +++ b/configs/da850evm_direct_nor_defconfig @@ -16,6 +16,8 @@ CONFIG_DEFAULT_DEVICE_TREE="da850-evm" CONFIG_SYS_LOAD_ADDR=0xc0700000 CONFIG_ENV_ADDR=0x60100000 CONFIG_LTO=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8001ff00 CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig index 4f5374f71f9..4e3ff702144 100644 --- a/configs/da850evm_nand_defconfig +++ b/configs/da850evm_nand_defconfig @@ -21,6 +21,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0xc0700000 CONFIG_LTO=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0000f20 CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig index 5970e750a83..cf7bd174a58 100644 --- a/configs/db-88f6720_defconfig +++ b/configs/db-88f6720_defconfig @@ -17,6 +17,8 @@ CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig index 79ed57ce6ea..fc2cd98f941 100644 --- a/configs/db-88f6820-amc_defconfig +++ b/configs/db-88f6820-amc_defconfig @@ -17,6 +17,8 @@ CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=200000000 CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_BOOTDELAY=3 diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig index dfb6d216356..8243a49fba7 100644 --- a/configs/db-88f6820-gp_defconfig +++ b/configs/db-88f6820-gp_defconfig @@ -18,6 +18,8 @@ CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig index 8aafb00c9a1..2f5a3215d99 100644 --- a/configs/db-mv784mp-gp_defconfig +++ b/configs/db-mv784mp-gp_defconfig @@ -17,6 +17,8 @@ CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y diff --git a/configs/db-xc3-24g4xg_defconfig b/configs/db-xc3-24g4xg_defconfig index 49c9111e3f9..995835a96b3 100644 --- a/configs/db-xc3-24g4xg_defconfig +++ b/configs/db-xc3-24g4xg_defconfig @@ -12,6 +12,8 @@ CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_BUILD_TARGET="u-boot.kwb" CONFIG_SYS_MEMTEST_START=0x00800000 CONFIG_SYS_MEMTEST_END=0x00ffffff +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/deneb_defconfig b/configs/deneb_defconfig index 8546c8efac0..42f4d40d9e6 100644 --- a/configs/deneb_defconfig +++ b/configs/deneb_defconfig @@ -22,6 +22,8 @@ CONFIG_IDENT_STRING=" ##v01.06" CONFIG_SPL_LOAD_IMX_CONTAINER=y CONFIG_IMX_CONTAINER_CFG="board/siemens/capricorn/uboot-container.cfg" CONFIG_SYS_LOAD_ADDR=0x80280000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig index e8575ef9a72..f447aecf8b0 100644 --- a/configs/devkit3250_defconfig +++ b/configs/devkit3250_defconfig @@ -16,6 +16,8 @@ CONFIG_SPL_TEXT_BASE=0x00000000 CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x80008000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f20 CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index 2db73e165a3..9bc9c0c73da 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -8,6 +8,8 @@ CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_DEVKIT8000=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_BOOTCOMMAND="run autoboot" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_MAX_SIZE=0xec00 diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig index ad5b6ff4e21..585f44d85d3 100644 --- a/configs/dns325_defconfig +++ b/configs/dns325_defconfig @@ -12,6 +12,8 @@ CONFIG_ENV_OFFSET=0xE0000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dns325" CONFIG_IDENT_STRING="\nD-Link DNS-325" CONFIG_SYS_LOAD_ADDR=0x800000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig index eb6797872c9..3cb09ea4f7f 100644 --- a/configs/dockstar_defconfig +++ b/configs/dockstar_defconfig @@ -13,6 +13,8 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dockstar" CONFIG_IDENT_STRING="\nSeagate FreeAgent DockStar" CONFIG_SYS_LOAD_ADDR=0x800000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index ded2e6cefd4..c1d1b5d1319 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -16,6 +16,8 @@ CONFIG_SPL_SPI=y CONFIG_ARMV7_LPAE=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037fef0 CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 # CONFIG_USE_SPL_FIT_GENERATOR is not set diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index b9d3f665dcf..25c27672250 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -19,6 +19,8 @@ CONFIG_SPL_SPI=y CONFIG_ARMV7_LPAE=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037fef0 CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 # CONFIG_USE_SPL_FIT_GENERATOR is not set diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig index 739c48b461a..3463be48c50 100644 --- a/configs/dra7xx_hs_evm_usb_defconfig +++ b/configs/dra7xx_hs_evm_usb_defconfig @@ -21,6 +21,8 @@ CONFIG_SPL_SPI=y CONFIG_ARMV7_LPAE=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037fef0 CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 # CONFIG_USE_SPL_FIT_GENERATOR is not set diff --git a/configs/draco_defconfig b/configs/draco_defconfig index cae88613213..e5e1ba68550 100644 --- a/configs/draco_defconfig +++ b/configs/draco_defconfig @@ -23,6 +23,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"\" to stop\n" diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig index 32c14173e60..2bf759d8437 100644 --- a/configs/dragonboard410c_defconfig +++ b/configs/dragonboard410c_defconfig @@ -10,6 +10,8 @@ CONFIG_DEFAULT_DEVICE_TREE="dragonboard410c" CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 410C" CONFIG_SYS_LOAD_ADDR=0x80080000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007fff0 CONFIG_REMAKE_ELF=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y diff --git a/configs/dragonboard820c_defconfig b/configs/dragonboard820c_defconfig index 09888cdfb19..2ede13fed1b 100644 --- a/configs/dragonboard820c_defconfig +++ b/configs/dragonboard820c_defconfig @@ -10,6 +10,8 @@ CONFIG_TARGET_DRAGONBOARD820C=y CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 820C" CONFIG_SYS_LOAD_ADDR=0x80080000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007fff0 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyMSM0,115200n8" # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig index 28ea27bf55e..80be9b853cb 100644 --- a/configs/dreamplug_defconfig +++ b/configs/dreamplug_defconfig @@ -14,6 +14,8 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dreamplug" CONFIG_IDENT_STRING="\nMarvell-DreamPlug" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_ENV_ADDR=0x100000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/ds109_defconfig b/configs/ds109_defconfig index 8c6a9740ad0..aeea352e258 100644 --- a/configs/ds109_defconfig +++ b/configs/ds109_defconfig @@ -18,6 +18,8 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ds109" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_ENV_ADDR=0x3D0000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv ethact egiga0; ${x_bootcmd_ethernet}; ${x_bootcmd_usb}; ${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_bootargs_root}; bootm 0x6400000;" diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig index 6e4b95eb90e..73907b3e389 100644 --- a/configs/ds414_defconfig +++ b/configs/ds414_defconfig @@ -23,6 +23,8 @@ CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 ip=off initrd=0x8000040,8M root=/dev/md0 rw syno_hw_version=DS414r1 ihd_num=4 netif_num=2 flash_size=8 SataLedSpecial=1 HddHotplug=1" diff --git a/configs/durian_defconfig b/configs/durian_defconfig index c4eb39222e5..eccf55f895e 100644 --- a/configs/durian_defconfig +++ b/configs/durian_defconfig @@ -12,6 +12,8 @@ CONFIG_SYS_LOAD_ADDR=0x90000000 CONFIG_SYS_PCI_64BIT=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x87f00000 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 earlycon=pl011,0x28001000 root=/dev/sda2 rw" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/ea-lpc3250devkitv2_defconfig b/configs/ea-lpc3250devkitv2_defconfig index bba37551a3e..d56a8387630 100644 --- a/configs/ea-lpc3250devkitv2_defconfig +++ b/configs/ea-lpc3250devkitv2_defconfig @@ -11,6 +11,8 @@ CONFIG_TARGET_EA_LPC3250DEVKITV2=y CONFIG_DEFAULT_DEVICE_TREE="lpc3250-ea3250" CONFIG_SYS_LOAD_ADDR=0x80100000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f20 CONFIG_HAS_BOARD_SIZE_LIMIT=y CONFIG_BOARD_SIZE_LIMIT=1048575 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set diff --git a/configs/edminiv2_defconfig b/configs/edminiv2_defconfig index dfb3e861f32..ace1f768c21 100644 --- a/configs/edminiv2_defconfig +++ b/configs/edminiv2_defconfig @@ -16,6 +16,8 @@ CONFIG_SPL=y CONFIG_IDENT_STRING=" EDMiniV2" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_ENV_ADDR=0xFFF84000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xf40 CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y diff --git a/configs/elgin-rv1108_defconfig b/configs/elgin-rv1108_defconfig index 8a57c15ff08..ff014cccb30 100644 --- a/configs/elgin-rv1108_defconfig +++ b/configs/elgin-rv1108_defconfig @@ -13,6 +13,8 @@ CONFIG_DEBUG_UART_BASE=0x10210000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x62000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_DEFAULT_FDT_FILE="rv1108-elgin-r1.dtb" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/emsdp_defconfig b/configs/emsdp_defconfig index 02dbcb160f9..4c2cc348925 100644 --- a/configs/emsdp_defconfig +++ b/configs/emsdp_defconfig @@ -9,6 +9,8 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="emsdp" CONFIG_SYS_CLK_FREQ=40000000 CONFIG_SYS_LOAD_ADDR=0x10000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10100000 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y diff --git a/configs/espresso7420_defconfig b/configs/espresso7420_defconfig index e06eb995a15..9128fa086a7 100644 --- a/configs/espresso7420_defconfig +++ b/configs/espresso7420_defconfig @@ -9,6 +9,8 @@ CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="exynos7420-espresso7420" CONFIG_IDENT_STRING=" for ESPRESSO7420" CONFIG_SYS_LOAD_ADDR=0x43e00000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2158000 # CONFIG_AUTOBOOT is not set CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig index c1d5512d6da..1e7f36eb51c 100644 --- a/configs/etamin_defconfig +++ b/configs/etamin_defconfig @@ -24,6 +24,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"\" to stop\n" diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig index 57186bdcf16..019e9422192 100644 --- a/configs/evb-px30_defconfig +++ b/configs/evb-px30_defconfig @@ -18,6 +18,8 @@ CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig index d297e71d706..238ef9a9e8d 100644 --- a/configs/evb-px5_defconfig +++ b/configs/evb-px5_defconfig @@ -20,6 +20,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig index 06bfa952eef..7bc535e68cf 100644 --- a/configs/evb-rk3036_defconfig +++ b/configs/evb-rk3036_defconfig @@ -17,6 +17,8 @@ CONFIG_DEBUG_UART_BASE=0x20068000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x60800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3036-evb.dtb" diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig index 4424cc866b1..94c32b55423 100644 --- a/configs/evb-rk3128_defconfig +++ b/configs/evb-rk3128_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0x20068000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x60800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000 CONFIG_FIT=y CONFIG_DEFAULT_FDT_FILE="rk3128-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig index eed68f5357e..f44dec09c27 100644 --- a/configs/evb-rk3229_defconfig +++ b/configs/evb-rk3229_defconfig @@ -18,6 +18,8 @@ CONFIG_DEBUG_UART_BASE=0x11030000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x61800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x61100000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index a4f63c80ef2..7c91aacabd6 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -15,6 +15,8 @@ CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig index b0cb84d6f00..8d9ca36cdde 100644 --- a/configs/evb-rk3308_defconfig +++ b/configs/evb-rk3308_defconfig @@ -16,6 +16,8 @@ CONFIG_DEBUG_UART_BASE=0xFF0C0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig index 6f5cacbd119..3aa1ce733c8 100644 --- a/configs/evb-rk3328_defconfig +++ b/configs/evb-rk3328_defconfig @@ -17,6 +17,8 @@ CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index 651939415e8..186ecd1f9d5 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-evb.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 diff --git a/configs/evb-rk3568_defconfig b/configs/evb-rk3568_defconfig index 867868bd9ee..8d1e45391dd 100644 --- a/configs/evb-rk3568_defconfig +++ b/configs/evb-rk3568_defconfig @@ -18,6 +18,8 @@ CONFIG_DEBUG_UART_BASE=0xFE660000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig index 013fabfb2f2..88194317980 100644 --- a/configs/evb-rv1108_defconfig +++ b/configs/evb-rv1108_defconfig @@ -10,6 +10,8 @@ CONFIG_DEBUG_UART_BASE=0x10210000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x62000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000 CONFIG_BOOTCOMMAND="sf probe;sf read 0x62000000 0x140800 0x500000;dcache off;go 0x62000000" CONFIG_DEFAULT_FDT_FILE="rv1108-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/ficus-rk3399_defconfig b/configs/ficus-rk3399_defconfig index d41ee492fec..fac88892d66 100644 --- a/configs/ficus-rk3399_defconfig +++ b/configs/ficus-rk3399_defconfig @@ -13,6 +13,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 diff --git a/configs/firefly-px30_defconfig b/configs/firefly-px30_defconfig index 93f30dc5d59..4330885a306 100644 --- a/configs/firefly-px30_defconfig +++ b/configs/firefly-px30_defconfig @@ -19,6 +19,8 @@ CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 47322763fa4..6351ba1715f 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -15,6 +15,8 @@ CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-firefly.dtb" diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig index 679f36455f0..2be11295243 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-firefly.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig index b22c1b1f8d8..8e509f699da 100644 --- a/configs/gardena-smart-gateway-at91sam_defconfig +++ b/configs/gardena-smart-gateway-at91sam_defconfig @@ -23,6 +23,8 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003f00 CONFIG_FIT=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=0 diff --git a/configs/geekbox_defconfig b/configs/geekbox_defconfig index b4705ecbea6..b2cade74103 100644 --- a/configs/geekbox_defconfig +++ b/configs/geekbox_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFF690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-geekbox.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/giedi_defconfig b/configs/giedi_defconfig index 377e0c492e1..ae05c9a7192 100644 --- a/configs/giedi_defconfig +++ b/configs/giedi_defconfig @@ -22,6 +22,8 @@ CONFIG_IDENT_STRING=" ##v01.07" CONFIG_SPL_LOAD_IMX_CONTAINER=y CONFIG_IMX_CONTAINER_CFG="board/siemens/capricorn/uboot-container.cfg" CONFIG_SYS_LOAD_ADDR=0x80280000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig index bd74ab4444b..cdd71b36ddb 100644 --- a/configs/goflexhome_defconfig +++ b/configs/goflexhome_defconfig @@ -13,6 +13,8 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-goflexnet" CONFIG_IDENT_STRING="\nSeagate GoFlex Home" CONFIG_SYS_LOAD_ADDR=0x800000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/gose_defconfig b/configs/gose_defconfig index 5f6f7610b15..9099f5dc988 100644 --- a/configs/gose_defconfig +++ b/configs/gose_defconfig @@ -26,6 +26,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x50000000 CONFIG_ENV_ADDR=0xC0000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_MAX_SIZE=0x4000 diff --git a/configs/grpeach_defconfig b/configs/grpeach_defconfig index c204603192c..f706ee3dfbe 100644 --- a/configs/grpeach_defconfig +++ b/configs/grpeach_defconfig @@ -13,6 +13,8 @@ CONFIG_DEFAULT_DEVICE_TREE="r7s72100-gr-peach-u-boot" CONFIG_RZA1=y CONFIG_SYS_CLK_FREQ=66666666 CONFIG_SYS_LOAD_ADDR=0x20400000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20900000 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="ignore_loglevel" diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig index 57d66c65132..02c59c3f31d 100644 --- a/configs/guruplug_defconfig +++ b/configs/guruplug_defconfig @@ -12,6 +12,8 @@ CONFIG_ENV_OFFSET=0xE0000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-guruplug-server-plus" CONFIG_IDENT_STRING="\nMarvell-GuruPlug" CONFIG_SYS_LOAD_ADDR=0x800000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_HAS_BOARD_SIZE_LIMIT=y CONFIG_BOARD_SIZE_LIMIT=917504 diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig index 626469eb524..d52d07a87ef 100644 --- a/configs/helios4_defconfig +++ b/configs/helios4_defconfig @@ -19,6 +19,8 @@ CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/highbank_defconfig b/configs/highbank_defconfig index 746f127f0f4..8a7d0fd8a9f 100644 --- a/configs/highbank_defconfig +++ b/configs/highbank_defconfig @@ -14,6 +14,8 @@ CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_ENV_ADDR=0xFFF88000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000000 CONFIG_FIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/hikey960_defconfig b/configs/hikey960_defconfig index 7921beafbbd..0e7f264a2e3 100644 --- a/configs/hikey960_defconfig +++ b/configs/hikey960_defconfig @@ -9,6 +9,8 @@ CONFIG_DEFAULT_DEVICE_TREE="hi3660-hikey960" CONFIG_IDENT_STRING="\nHikey960" CONFIG_SYS_LOAD_ADDR=0x80000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fff0 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA6,115200n8 root=/dev/mmcblk0p2 rw" diff --git a/configs/hikey_defconfig b/configs/hikey_defconfig index 9d597b81ce2..84242e87848 100644 --- a/configs/hikey_defconfig +++ b/configs/hikey_defconfig @@ -9,6 +9,8 @@ CONFIG_DEFAULT_DEVICE_TREE="hi6220-hikey" CONFIG_IDENT_STRING="hikey" CONFIG_SYS_LOAD_ADDR=0x80000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fff0 CONFIG_REMAKE_ELF=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y diff --git a/configs/hsdk_4xd_defconfig b/configs/hsdk_4xd_defconfig index 4fb43d308b7..85844f7ec88 100644 --- a/configs/hsdk_4xd_defconfig +++ b/configs/hsdk_4xd_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_CLOCK=33333333 CONFIG_SYS_CLK_FREQ=500000000 CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/hsdk_defconfig b/configs/hsdk_defconfig index ddcae02331c..a714d28134b 100644 --- a/configs/hsdk_defconfig +++ b/configs/hsdk_defconfig @@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_CLOCK=33333333 CONFIG_SYS_CLK_FREQ=500000000 CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig index 5e3e26d1a7d..3d4bd5145ff 100644 --- a/configs/ib62x0_defconfig +++ b/configs/ib62x0_defconfig @@ -12,6 +12,8 @@ CONFIG_ENV_OFFSET=0xE0000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ib62x0" CONFIG_IDENT_STRING=" RaidSonic ICY BOX IB-NAS62x0" CONFIG_SYS_LOAD_ADDR=0x800000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig index 879f3d30d01..644d0abd3aa 100644 --- a/configs/iconnect_defconfig +++ b/configs/iconnect_defconfig @@ -13,6 +13,8 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-iconnect" CONFIG_IDENT_STRING=" Iomega iConnect" CONFIG_SYS_LOAD_ADDR=0x800000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/igep00x0_defconfig b/configs/igep00x0_defconfig index 2e1811228e5..1cbcfdceeaf 100644 --- a/configs/igep00x0_defconfig +++ b/configs/igep00x0_defconfig @@ -9,6 +9,8 @@ CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_IGEP00X0=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" diff --git a/configs/imgtec_xilfpga_defconfig b/configs/imgtec_xilfpga_defconfig index 0fb04e9bf22..51c7e500dc2 100644 --- a/configs/imgtec_xilfpga_defconfig +++ b/configs/imgtec_xilfpga_defconfig @@ -10,6 +10,8 @@ CONFIG_MIPS_CACHE_SETUP=y CONFIG_MIPS_CACHE_DISABLE=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x87fff000 CONFIG_TIMESTAMP=y CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig index 5ca28bcc0a4..0bd0dbeb6e2 100644 --- a/configs/imx8qm_mek_defconfig +++ b/configs/imx8qm_mek_defconfig @@ -20,6 +20,8 @@ CONFIG_SPL=y CONFIG_SPL_LOAD_IMX_CONTAINER=y CONFIG_IMX_CONTAINER_CFG="board/freescale/imx8qm_mek/uboot-container.cfg" CONFIG_SYS_LOAD_ADDR=0x80280000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y diff --git a/configs/imx8qm_rom7720_a1_4G_defconfig b/configs/imx8qm_rom7720_a1_4G_defconfig index d456c4d21c7..62c1f03b7b0 100644 --- a/configs/imx8qm_rom7720_a1_4G_defconfig +++ b/configs/imx8qm_rom7720_a1_4G_defconfig @@ -16,6 +16,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x80280000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index a6f12f33030..5603bbf1a31 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -20,6 +20,8 @@ CONFIG_SPL=y CONFIG_SPL_LOAD_IMX_CONTAINER=y CONFIG_IMX_CONTAINER_CFG="board/freescale/imx8qxp_mek/uboot-container.cfg" CONFIG_SYS_LOAD_ADDR=0x80280000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y diff --git a/configs/imxrt1020-evk_defconfig b/configs/imxrt1020-evk_defconfig index b60533aec47..6cf12d5ef45 100644 --- a/configs/imxrt1020-evk_defconfig +++ b/configs/imxrt1020-evk_defconfig @@ -18,6 +18,8 @@ CONFIG_SPL_SIZE_LIMIT=0x20000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x20209000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20240000 CONFIG_SD_BOOT=y # CONFIG_USE_BOOTCOMMAND is not set # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/imxrt1050-evk_defconfig b/configs/imxrt1050-evk_defconfig index 344186a570b..9e756386e9b 100644 --- a/configs/imxrt1050-evk_defconfig +++ b/configs/imxrt1050-evk_defconfig @@ -20,6 +20,8 @@ CONFIG_SPL_SIZE_LIMIT=0x20000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x20209000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20280000 CONFIG_SD_BOOT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig index a24a53caa7b..908e50dab13 100644 --- a/configs/inetspace_v2_defconfig +++ b/configs/inetspace_v2_defconfig @@ -14,6 +14,8 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-is2" CONFIG_IDENT_STRING=" IS v2" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_ENV_ADDR=0x70000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/integratorap_cm720t_defconfig b/configs/integratorap_cm720t_defconfig index 72da7b89267..5f4ec5ff8f0 100644 --- a/configs/integratorap_cm720t_defconfig +++ b/configs/integratorap_cm720t_defconfig @@ -7,6 +7,8 @@ CONFIG_CM720T=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x8000 CONFIG_SYS_LOAD_ADDR=0x7fc0 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty" CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/integratorap_cm920t_defconfig b/configs/integratorap_cm920t_defconfig index 4464803c35f..fb86b7cf299 100644 --- a/configs/integratorap_cm920t_defconfig +++ b/configs/integratorap_cm920t_defconfig @@ -7,6 +7,8 @@ CONFIG_CM920T=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x8000 CONFIG_SYS_LOAD_ADDR=0x7fc0 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty" CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/integratorap_cm926ejs_defconfig b/configs/integratorap_cm926ejs_defconfig index c8f9d4a9766..6bf08cd13ae 100644 --- a/configs/integratorap_cm926ejs_defconfig +++ b/configs/integratorap_cm926ejs_defconfig @@ -7,6 +7,8 @@ CONFIG_CM926EJ_S=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x8000 CONFIG_SYS_LOAD_ADDR=0x7fc0 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty" CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/integratorap_cm946es_defconfig b/configs/integratorap_cm946es_defconfig index 15e803038b4..97c44f36955 100644 --- a/configs/integratorap_cm946es_defconfig +++ b/configs/integratorap_cm946es_defconfig @@ -7,6 +7,8 @@ CONFIG_CM946ES=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x8000 CONFIG_SYS_LOAD_ADDR=0x7fc0 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty" CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/integratorcp_cm1136_defconfig b/configs/integratorcp_cm1136_defconfig index e6cf28fa433..89cfa9b9a6f 100644 --- a/configs/integratorcp_cm1136_defconfig +++ b/configs/integratorcp_cm1136_defconfig @@ -9,6 +9,8 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_LOAD_ADDR=0x7fc0 CONFIG_ENV_ADDR=0x24F00000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20 CONFIG_SYS_MONITOR_BASE=0x27F40000 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0" diff --git a/configs/integratorcp_cm920t_defconfig b/configs/integratorcp_cm920t_defconfig index f740cd4ff61..d895ba46292 100644 --- a/configs/integratorcp_cm920t_defconfig +++ b/configs/integratorcp_cm920t_defconfig @@ -9,6 +9,8 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_LOAD_ADDR=0x7fc0 CONFIG_ENV_ADDR=0x24F00000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20 CONFIG_SYS_MONITOR_BASE=0x27F40000 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0" diff --git a/configs/integratorcp_cm926ejs_defconfig b/configs/integratorcp_cm926ejs_defconfig index 96ba15f0fa9..9cf449cb4c8 100644 --- a/configs/integratorcp_cm926ejs_defconfig +++ b/configs/integratorcp_cm926ejs_defconfig @@ -9,6 +9,8 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_LOAD_ADDR=0x7fc0 CONFIG_ENV_ADDR=0x24F00000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20 CONFIG_SYS_MONITOR_BASE=0x27F40000 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0" diff --git a/configs/integratorcp_cm946es_defconfig b/configs/integratorcp_cm946es_defconfig index 017aaf72137..bcbcde21128 100644 --- a/configs/integratorcp_cm946es_defconfig +++ b/configs/integratorcp_cm946es_defconfig @@ -9,6 +9,8 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_LOAD_ADDR=0x7fc0 CONFIG_ENV_ADDR=0x24F00000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20 CONFIG_SYS_MONITOR_BASE=0x27F40000 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0" diff --git a/configs/iot2050_defconfig b/configs/iot2050_defconfig index d307d7575ee..7249b2d6056 100644 --- a/configs/iot2050_defconfig +++ b/configs/iot2050_defconfig @@ -22,6 +22,8 @@ CONFIG_ENV_OFFSET_REDUND=0x6a0000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80100000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set diff --git a/configs/iot_devkit_defconfig b/configs/iot_devkit_defconfig index 1380a6a8e34..08945621400 100644 --- a/configs/iot_devkit_defconfig +++ b/configs/iot_devkit_defconfig @@ -12,6 +12,8 @@ CONFIG_DEFAULT_DEVICE_TREE="iot_devkit" CONFIG_SYS_CLK_FREQ=16000000 CONFIG_SYS_LOAD_ADDR=0x30000000 CONFIG_LOCALVERSION="-iotdk-1.0" +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80008000 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_SYS_PROMPT="IoTDK# " CONFIG_SYS_CBSIZE=256 diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig index fc171db8606..b5efa405712 100644 --- a/configs/j7200_evm_a72_defconfig +++ b/configs/j7200_evm_a72_defconfig @@ -25,6 +25,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y # CONFIG_PSCI_RESET is not set CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig index 572a66633c6..a830cb912c0 100644 --- a/configs/j7200_evm_r5_defconfig +++ b/configs/j7200_evm_r5_defconfig @@ -21,6 +21,8 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41cf5bfc # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index 68a29ecde0f..8b703d18957 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -23,6 +23,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y # CONFIG_PSCI_RESET is not set CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index 3b4c1e168c7..475da6f588f 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -21,6 +21,8 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41cf5bfc # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 diff --git a/configs/j721e_hs_evm_a72_defconfig b/configs/j721e_hs_evm_a72_defconfig index dbf97bde459..fd2c9667f69 100644 --- a/configs/j721e_hs_evm_a72_defconfig +++ b/configs/j721e_hs_evm_a72_defconfig @@ -24,6 +24,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y # CONFIG_PSCI_RESET is not set CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 diff --git a/configs/j721e_hs_evm_r5_defconfig b/configs/j721e_hs_evm_r5_defconfig index 606473c863e..5e253b2c858 100644 --- a/configs/j721e_hs_evm_r5_defconfig +++ b/configs/j721e_hs_evm_r5_defconfig @@ -23,6 +23,8 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41cf5bfc # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig index fffae21d78c..0628e2994bd 100644 --- a/configs/j721s2_evm_a72_defconfig +++ b/configs/j721s2_evm_a72_defconfig @@ -25,6 +25,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y # CONFIG_PSCI_RESET is not set CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig index 427dcf8f8ac..c706ff31997 100644 --- a/configs/j721s2_evm_r5_defconfig +++ b/configs/j721s2_evm_r5_defconfig @@ -23,6 +23,8 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c76000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 diff --git a/configs/jethub_j100_defconfig b/configs/jethub_j100_defconfig index d0070bbb225..342e7e0d79f 100644 --- a/configs/jethub_j100_defconfig +++ b/configs/jethub_j100_defconfig @@ -13,6 +13,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" jethubj100" CONFIG_SYS_LOAD_ADDR=0x01000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/jethub_j80_defconfig b/configs/jethub_j80_defconfig index d750b8a07cd..1a6a697c1ba 100644 --- a/configs/jethub_j80_defconfig +++ b/configs/jethub_j80_defconfig @@ -13,6 +13,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" jethubj80" CONFIG_SYS_LOAD_ADDR=0x01000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index 29de4b2aa94..9c34a0ddc6a 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -22,6 +22,8 @@ CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0fff10 CONFIG_TIMESTAMP=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run init_${boot}; run get_mon_${boot} run_mon; run get_kern_${boot}; run init_fw_rd_${boot}; run get_fdt_${boot}; run run_kern" diff --git a/configs/k2e_hs_evm_defconfig b/configs/k2e_hs_evm_defconfig index b1cfa34d0f0..da4e4ca7f76 100644 --- a/configs/k2e_hs_evm_defconfig +++ b/configs/k2e_hs_evm_defconfig @@ -15,6 +15,8 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm" CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0fff10 CONFIG_TIMESTAMP=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run run_mon_hs; run init_${boot}; run get_fit_${boot}; bootm ${addr_fit}#${name_fdt}" diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index a9b4afe12db..0469e4f1149 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -21,6 +21,8 @@ CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc09ff10 CONFIG_TIMESTAMP=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run get_mon_${boot} run_mon; run set_name_pmmc get_pmmc_${boot} run_pmmc; run get_kern_${boot}; run init_fw_rd_${boot}; run get_fdt_${boot}; run run_kern" diff --git a/configs/k2g_hs_evm_defconfig b/configs/k2g_hs_evm_defconfig index 11717af6594..d865c12166f 100644 --- a/configs/k2g_hs_evm_defconfig +++ b/configs/k2g_hs_evm_defconfig @@ -14,6 +14,8 @@ CONFIG_TARGET_K2G_EVM=y CONFIG_ENV_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm" CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc09ff10 CONFIG_TIMESTAMP=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run envboot; run run_mon_hs; run init_${boot}; run get_fit_${boot}; bootm ${addr_fit}#${name_fdt}" diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index 799e4e43076..543810905cd 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -22,6 +22,8 @@ CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc1fff10 CONFIG_TIMESTAMP=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run init_${boot}; run get_mon_${boot} run_mon; run get_kern_${boot}; run init_fw_rd_${boot}; run get_fdt_${boot}; run run_kern" diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig index fae63da58bc..4f4dbcd5e17 100644 --- a/configs/k2hk_hs_evm_defconfig +++ b/configs/k2hk_hs_evm_defconfig @@ -15,6 +15,8 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm" CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc1fff10 CONFIG_TIMESTAMP=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run run_mon_hs; run init_${boot}; run get_fit_${boot}; bootm ${addr_fit}#${name_fdt}" diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index b1bfbd8d9ba..1a68b45197f 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -22,6 +22,8 @@ CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0fff10 CONFIG_TIMESTAMP=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run init_${boot}; run get_mon_${boot} run_mon; run get_kern_${boot}; run init_fw_rd_${boot}; run get_fdt_${boot}; run run_kern" diff --git a/configs/k2l_hs_evm_defconfig b/configs/k2l_hs_evm_defconfig index 8879710162c..292806ff639 100644 --- a/configs/k2l_hs_evm_defconfig +++ b/configs/k2l_hs_evm_defconfig @@ -14,6 +14,8 @@ CONFIG_TARGET_K2L_EVM=y CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="keystone-k2l-evm" +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0fff10 CONFIG_TIMESTAMP=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/khadas-edge-captain-rk3399_defconfig b/configs/khadas-edge-captain-rk3399_defconfig index d5d75971a27..24fa9b01653 100644 --- a/configs/khadas-edge-captain-rk3399_defconfig +++ b/configs/khadas-edge-captain-rk3399_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge-captain.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 diff --git a/configs/khadas-edge-rk3399_defconfig b/configs/khadas-edge-rk3399_defconfig index 701cfc664a4..78ac8ade588 100644 --- a/configs/khadas-edge-rk3399_defconfig +++ b/configs/khadas-edge-rk3399_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 diff --git a/configs/khadas-edge-v-rk3399_defconfig b/configs/khadas-edge-v-rk3399_defconfig index d5d5b63a27c..2ae99a15b52 100644 --- a/configs/khadas-edge-v-rk3399_defconfig +++ b/configs/khadas-edge-v-rk3399_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge-v.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 diff --git a/configs/khadas-vim2_defconfig b/configs/khadas-vim2_defconfig index 5e3822cf493..bee5abe4cdb 100644 --- a/configs/khadas-vim2_defconfig +++ b/configs/khadas-vim2_defconfig @@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim2" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/khadas-vim3_android_ab_defconfig b/configs/khadas-vim3_android_ab_defconfig index 08f41f3689d..d025e444bdd 100644 --- a/configs/khadas-vim3_android_ab_defconfig +++ b/configs/khadas-vim3_android_ab_defconfig @@ -13,6 +13,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim3" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/khadas-vim3_android_defconfig b/configs/khadas-vim3_android_defconfig index 355f95bb05a..825f687fdd8 100644 --- a/configs/khadas-vim3_android_defconfig +++ b/configs/khadas-vim3_android_defconfig @@ -13,6 +13,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim3" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/khadas-vim3_defconfig b/configs/khadas-vim3_defconfig index 0af85e2bfbf..68ab1546bf0 100644 --- a/configs/khadas-vim3_defconfig +++ b/configs/khadas-vim3_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim3" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/khadas-vim3l_android_ab_defconfig b/configs/khadas-vim3l_android_ab_defconfig index 2afd1afa9b3..fc766ee476c 100644 --- a/configs/khadas-vim3l_android_ab_defconfig +++ b/configs/khadas-vim3l_android_ab_defconfig @@ -13,6 +13,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim3l" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/khadas-vim3l_android_defconfig b/configs/khadas-vim3l_android_defconfig index ef30a628d00..372aa7d91cf 100644 --- a/configs/khadas-vim3l_android_defconfig +++ b/configs/khadas-vim3l_android_defconfig @@ -13,6 +13,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim3l" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/khadas-vim3l_defconfig b/configs/khadas-vim3l_defconfig index 506df51c9d8..df7e01d1f98 100644 --- a/configs/khadas-vim3l_defconfig +++ b/configs/khadas-vim3l_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim3l" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/khadas-vim_defconfig b/configs/khadas-vim_defconfig index 6b4a40334ed..9444fe8258d 100644 --- a/configs/khadas-vim_defconfig +++ b/configs/khadas-vim_defconfig @@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig index 7c42cf653cb..1d8ae5876b9 100644 --- a/configs/km_kirkwood_128m16_defconfig +++ b/configs/km_kirkwood_128m16_defconfig @@ -15,6 +15,8 @@ CONFIG_ENV_OFFSET_REDUND=0x2000 CONFIG_IDENT_STRING="\nHitachi Power Grids Kirkwood 128M16" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_KM_KIRKWOOD_128M16=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig index 596856f6180..d2f2ff4e23e 100644 --- a/configs/km_kirkwood_defconfig +++ b/configs/km_kirkwood_defconfig @@ -15,6 +15,8 @@ CONFIG_ENV_OFFSET_REDUND=0x2000 CONFIG_IDENT_STRING="\nHitachi Power Grids Kirkwood" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_KM_KIRKWOOD=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig index ba0d74d0d07..4d116c3a7ad 100644 --- a/configs/km_kirkwood_pci_defconfig +++ b/configs/km_kirkwood_pci_defconfig @@ -16,6 +16,8 @@ CONFIG_IDENT_STRING="\nHitachi Power Grids Kirkwood PCI" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_KM_FPGA_CONFIG=y CONFIG_KM_KIRKWOOD_PCI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig index 24743226c1c..9654b8d8060 100644 --- a/configs/kmcoge5un_defconfig +++ b/configs/kmcoge5un_defconfig @@ -18,6 +18,8 @@ CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 CONFIG_KM_ENV_IS_IN_SPI_NOR=y CONFIG_KM_PIGGY4_88E6352=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig index 0d3867221a9..8cbde0e178a 100644 --- a/configs/kmnusa_defconfig +++ b/configs/kmnusa_defconfig @@ -19,6 +19,8 @@ CONFIG_KM_FPGA_CONFIG=y CONFIG_KM_ENV_IS_IN_SPI_NOR=y CONFIG_KM_PIGGY4_88E6352=y CONFIG_KM_NUSA=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " diff --git a/configs/kmsuse2_defconfig b/configs/kmsuse2_defconfig index c50f79cc361..8e27f9f6af3 100644 --- a/configs/kmsuse2_defconfig +++ b/configs/kmsuse2_defconfig @@ -20,6 +20,8 @@ CONFIG_KM_FPGA_FORCE_CONFIG=y CONFIG_KM_FPGA_NO_RESET=y CONFIG_KM_ENV_IS_IN_SPI_NOR=y CONFIG_KM_SUSE2=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig index c67553bcdc4..186200f0281 100644 --- a/configs/koelsch_defconfig +++ b/configs/koelsch_defconfig @@ -26,6 +26,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x50000000 CONFIG_ENV_ADDR=0xC0000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_MAX_SIZE=0x4000 diff --git a/configs/kontron_sl28_defconfig b/configs/kontron_sl28_defconfig index bf252923716..9f4be1ac9d0 100644 --- a/configs/kontron_sl28_defconfig +++ b/configs/kontron_sl28_defconfig @@ -25,6 +25,8 @@ CONFIG_ARMV8_PSCI_RELOCATE=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800eff0 CONFIG_MP=y CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig index 0e45892dcfa..4f17de826c8 100644 --- a/configs/kylin-rk3036_defconfig +++ b/configs/kylin-rk3036_defconfig @@ -19,6 +19,8 @@ CONFIG_DEBUG_UART_BASE=0x20068000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x60800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3036-kylin.dtb" diff --git a/configs/lager_defconfig b/configs/lager_defconfig index 7a97fb9f2c4..d13b75de412 100644 --- a/configs/lager_defconfig +++ b/configs/lager_defconfig @@ -26,6 +26,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x50000000 CONFIG_ENV_ADDR=0xC0000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_MAX_SIZE=0x4000 diff --git a/configs/leez-rk3399_defconfig b/configs/leez-rk3399_defconfig index 6f7f0e09a4d..c8e462867e1 100644 --- a/configs/leez-rk3399_defconfig +++ b/configs/leez-rk3399_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-leez-p710.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 diff --git a/configs/legoev3_defconfig b/configs/legoev3_defconfig index 1d35e75a1ba..3612afb463c 100644 --- a/configs/legoev3_defconfig +++ b/configs/legoev3_defconfig @@ -9,6 +9,8 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="da850-lego-ev3" CONFIG_SYS_LOAD_ADDR=0xc0700000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80010000 CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=0 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/libretech-ac_defconfig b/configs/libretech-ac_defconfig index a12e4ade37f..cce1b36758e 100644 --- a/configs/libretech-ac_defconfig +++ b/configs/libretech-ac_defconfig @@ -14,6 +14,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" libretech-ac" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y diff --git a/configs/libretech-cc_defconfig b/configs/libretech-cc_defconfig index 15f18c50972..d1e925039e6 100644 --- a/configs/libretech-cc_defconfig +++ b/configs/libretech-cc_defconfig @@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" libretech-cc" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/libretech-cc_v2_defconfig b/configs/libretech-cc_v2_defconfig index 26a9df2447c..ba27e65d9aa 100644 --- a/configs/libretech-cc_v2_defconfig +++ b/configs/libretech-cc_v2_defconfig @@ -13,6 +13,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" libretech-cc-v2" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y diff --git a/configs/libretech-s905d-pc_defconfig b/configs/libretech-s905d-pc_defconfig index a9c0a5ffe59..99a099d0a52 100644 --- a/configs/libretech-s905d-pc_defconfig +++ b/configs/libretech-s905d-pc_defconfig @@ -14,6 +14,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" libretech-s905d-pc" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y diff --git a/configs/libretech-s912-pc_defconfig b/configs/libretech-s912-pc_defconfig index 5c9f5218a87..e65db0778c2 100644 --- a/configs/libretech-s912-pc_defconfig +++ b/configs/libretech-s912-pc_defconfig @@ -13,6 +13,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" libretech-s912-pc" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig index 7c7bfad4653..c03eecabcac 100644 --- a/configs/lion-rk3368_defconfig +++ b/configs/lion-rk3368_defconfig @@ -19,6 +19,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/ls1012a2g5rdb_qspi_defconfig b/configs/ls1012a2g5rdb_qspi_defconfig index 5be2d6637e0..0ab5c868af4 100644 --- a/configs/ls1012a2g5rdb_qspi_defconfig +++ b/configs/ls1012a2g5rdb_qspi_defconfig @@ -15,6 +15,8 @@ CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1012afrdm_qspi_defconfig b/configs/ls1012afrdm_qspi_defconfig index 61a1534a51b..8c70bf09515 100644 --- a/configs/ls1012afrdm_qspi_defconfig +++ b/configs/ls1012afrdm_qspi_defconfig @@ -14,6 +14,8 @@ CONFIG_QSPI_AHB_INIT=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig index 92a84cee395..7c69d56d52c 100644 --- a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig @@ -13,6 +13,8 @@ CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1012afrwy_qspi_defconfig b/configs/ls1012afrwy_qspi_defconfig index 4d1fa3d9789..bb30e27e00f 100644 --- a/configs/ls1012afrwy_qspi_defconfig +++ b/configs/ls1012afrwy_qspi_defconfig @@ -15,6 +15,8 @@ CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig index 9ded76474e5..1adf0fe0701 100644 --- a/configs/ls1012aqds_qspi_defconfig +++ b/configs/ls1012aqds_qspi_defconfig @@ -16,6 +16,8 @@ CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig index d27b24efeed..02d6e0f2e11 100644 --- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig @@ -14,6 +14,8 @@ CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1012ardb_qspi_defconfig b/configs/ls1012ardb_qspi_defconfig index 50134ea5745..0a6c43f04a5 100644 --- a/configs/ls1012ardb_qspi_defconfig +++ b/configs/ls1012ardb_qspi_defconfig @@ -16,6 +16,8 @@ CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index a3c0abb8497..5a40f002c86 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -25,6 +25,8 @@ CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig index c32a5f2605d..0acb8817ec0 100644 --- a/configs/ls1043aqds_lpuart_defconfig +++ b/configs/ls1043aqds_lpuart_defconfig @@ -25,6 +25,8 @@ CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index 4c7767e09b9..87696444a27 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -30,6 +30,8 @@ CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig index 609ce43e53d..af362b13472 100644 --- a/configs/ls1043aqds_nor_ddr3_defconfig +++ b/configs/ls1043aqds_nor_ddr3_defconfig @@ -25,6 +25,8 @@ CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig index d143978d8fc..6ba6b420c03 100644 --- a/configs/ls1043aqds_qspi_defconfig +++ b/configs/ls1043aqds_qspi_defconfig @@ -25,6 +25,8 @@ CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index ec8c55cd519..140ca826af9 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -31,6 +31,8 @@ CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index 9dbaf7c6b51..b13156a573d 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -30,6 +30,8 @@ CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index adad36f5a83..7f4729fe7df 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -14,6 +14,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_FSL_LS_PPA=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig index 3a283ff9445..454f3dccbba 100644 --- a/configs/ls1043ardb_defconfig +++ b/configs/ls1043ardb_defconfig @@ -15,6 +15,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_FSL_LS_PPA=y CONFIG_ENV_ADDR=0x60300000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index 437b8802f22..33320c24bc1 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -16,6 +16,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index 68bf7da0e78..f47c019745a 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -20,6 +20,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index 448c796666c..40f794001d0 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -17,6 +17,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index 0aaaa8cad0a..94e7b9617f2 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -21,6 +21,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig index fe1a601f470..8b1713099d8 100644 --- a/configs/ls1046aqds_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_SECURE_BOOT_defconfig @@ -24,6 +24,8 @@ CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig index c90f4867d85..bf9f4803a99 100644 --- a/configs/ls1046aqds_defconfig +++ b/configs/ls1046aqds_defconfig @@ -25,6 +25,8 @@ CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig index 06ad3f383d8..c4672d0366e 100644 --- a/configs/ls1046aqds_lpuart_defconfig +++ b/configs/ls1046aqds_lpuart_defconfig @@ -25,6 +25,8 @@ CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig index 065f6d0ad5d..dba986d729f 100644 --- a/configs/ls1046aqds_nand_defconfig +++ b/configs/ls1046aqds_nand_defconfig @@ -30,6 +30,8 @@ CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig index d397c09ce3d..d62e5b611b3 100644 --- a/configs/ls1046aqds_qspi_defconfig +++ b/configs/ls1046aqds_qspi_defconfig @@ -25,6 +25,8 @@ CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index 90badb14e73..0dfbf422516 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -31,6 +31,8 @@ CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index 0c78b58a6b6..52d826fb061 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -30,6 +30,8 @@ CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig index fd825695b48..6e0ce4dade0 100644 --- a/configs/ls1046ardb_emmc_defconfig +++ b/configs/ls1046ardb_emmc_defconfig @@ -22,6 +22,8 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig index 0879f58a86a..2a7c730aa00 100644 --- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig @@ -16,6 +16,8 @@ CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig index 4e1d7c08915..6f9a2e8ea29 100644 --- a/configs/ls1046ardb_qspi_defconfig +++ b/configs/ls1046ardb_qspi_defconfig @@ -18,6 +18,8 @@ CONFIG_QSPI_AHB_INIT=y CONFIG_ENV_ADDR=0x40300000 CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig index e2c221bfc66..39e38e47978 100644 --- a/configs/ls1046ardb_qspi_spl_defconfig +++ b/configs/ls1046ardb_qspi_spl_defconfig @@ -24,6 +24,8 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig index a560aa5ec54..852824eeff5 100644 --- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -21,6 +21,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig index 2bb13e067ab..85a8ec9b108 100644 --- a/configs/ls1046ardb_sdcard_defconfig +++ b/configs/ls1046ardb_sdcard_defconfig @@ -22,6 +22,8 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1088aqds_defconfig b/configs/ls1088aqds_defconfig index 8e8caa438b2..1580ceb6b72 100644 --- a/configs/ls1088aqds_defconfig +++ b/configs/ls1088aqds_defconfig @@ -20,6 +20,8 @@ CONFIG_ENV_ADDR=0x80300000 CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig index 5c3daac4020..b20a5d20f7d 100644 --- a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig @@ -21,6 +21,8 @@ CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls1088aqds_qspi_defconfig b/configs/ls1088aqds_qspi_defconfig index 75c00989d8e..caf5d774f57 100644 --- a/configs/ls1088aqds_qspi_defconfig +++ b/configs/ls1088aqds_qspi_defconfig @@ -23,6 +23,8 @@ CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig index fa0a0166f67..ca634fd3986 100644 --- a/configs/ls1088aqds_sdcard_ifc_defconfig +++ b/configs/ls1088aqds_sdcard_ifc_defconfig @@ -26,6 +26,8 @@ CONFIG_SPL=y CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig index d9f2aaa08b4..b21ce6794bd 100644 --- a/configs/ls1088aqds_sdcard_qspi_defconfig +++ b/configs/ls1088aqds_sdcard_qspi_defconfig @@ -27,6 +27,8 @@ CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig index 850c3d9c6ba..8571eec4619 100644 --- a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig @@ -21,6 +21,8 @@ CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls1088ardb_qspi_defconfig b/configs/ls1088ardb_qspi_defconfig index 7653a2733d5..1cd59ec7e27 100644 --- a/configs/ls1088ardb_qspi_defconfig +++ b/configs/ls1088ardb_qspi_defconfig @@ -23,6 +23,8 @@ CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig index ebfe7d78cf1..e8397fcd4ed 100644 --- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig @@ -26,6 +26,8 @@ CONFIG_SPL=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig index 8f4b4f32754..283dcccc905 100644 --- a/configs/ls1088ardb_sdcard_qspi_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_defconfig @@ -27,6 +27,8 @@ CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig index 3a0e29009ea..26d92f9d9b1 100644 --- a/configs/ls2080aqds_SECURE_BOOT_defconfig +++ b/configs/ls2080aqds_SECURE_BOOT_defconfig @@ -13,6 +13,8 @@ CONFIG_FSL_QIXIS=y # CONFIG_QIXIS_I2C_ACCESS is not set CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig index 28f796e6c2f..f34501f5c2f 100644 --- a/configs/ls2080aqds_defconfig +++ b/configs/ls2080aqds_defconfig @@ -14,6 +14,8 @@ CONFIG_FSL_QIXIS=y CONFIG_FSL_LS_PPA=y CONFIG_ENV_ADDR=0x80300000 CONFIG_AHCI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index 4fca0b1a281..0c57920b487 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -18,6 +18,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig index 6359a732059..8d91394a02b 100644 --- a/configs/ls2080aqds_qspi_defconfig +++ b/configs/ls2080aqds_qspi_defconfig @@ -13,6 +13,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_FSL_QIXIS=y CONFIG_AHCI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig index 7aae9ed8cd5..23c20203ba7 100644 --- a/configs/ls2080aqds_sdcard_defconfig +++ b/configs/ls2080aqds_sdcard_defconfig @@ -20,6 +20,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig index 715eb8c6d27..6b59320f342 100644 --- a/configs/ls2080ardb_SECURE_BOOT_defconfig +++ b/configs/ls2080ardb_SECURE_BOOT_defconfig @@ -17,6 +17,8 @@ CONFIG_FSL_QIXIS=y # CONFIG_QIXIS_I2C_ACCESS is not set CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig index 2efcfd1d8ab..30efcaedbcb 100644 --- a/configs/ls2080ardb_defconfig +++ b/configs/ls2080ardb_defconfig @@ -18,6 +18,8 @@ CONFIG_FSL_QIXIS=y CONFIG_FSL_LS_PPA=y CONFIG_ENV_ADDR=0x80300000 CONFIG_AHCI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index 89dc2f656d7..e703a8cba86 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -23,6 +23,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig index c4e4be1ef7a..64d638b9cff 100644 --- a/configs/ls2081ardb_defconfig +++ b/configs/ls2081ardb_defconfig @@ -18,6 +18,8 @@ CONFIG_FSL_QIXIS=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig index 5fa0785f642..c5e81748b72 100644 --- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig @@ -17,6 +17,8 @@ CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig index 5014eb4a46b..d88fc59211c 100644 --- a/configs/ls2088ardb_qspi_defconfig +++ b/configs/ls2088ardb_qspi_defconfig @@ -19,6 +19,8 @@ CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_ENV_ADDR=0x20300000 CONFIG_AHCI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig index 2ac5266b00c..4fe9f6d3a6b 100644 --- a/configs/lschlv2_defconfig +++ b/configs/lschlv2_defconfig @@ -15,6 +15,8 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-lschlv2" CONFIG_IDENT_STRING=" LS-CHLv2" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_API=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_BOOTDELAY=3 diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig index fa4aeccedec..e57f93ebd14 100644 --- a/configs/lsxhl_defconfig +++ b/configs/lsxhl_defconfig @@ -16,6 +16,8 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-lsxhl" CONFIG_IDENT_STRING=" LS-XHL" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_API=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_BOOTDELAY=3 diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig index 8856d34167e..9c22966d884 100644 --- a/configs/maxbcm_defconfig +++ b/configs/maxbcm_defconfig @@ -17,6 +17,8 @@ CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/microchip_mpfs_icicle_defconfig b/configs/microchip_mpfs_icicle_defconfig index 5453af8508e..462c8b7f291 100644 --- a/configs/microchip_mpfs_icicle_defconfig +++ b/configs/microchip_mpfs_icicle_defconfig @@ -8,6 +8,8 @@ CONFIG_TARGET_MICROCHIP_ICICLE=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_FIT=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig index d26195e44ea..c1151d13b60 100644 --- a/configs/miqi-rk3288_defconfig +++ b/configs/miqi-rk3288_defconfig @@ -15,6 +15,8 @@ CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-miqi.dtb" diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig index 54b419f4da6..fadea658eb2 100644 --- a/configs/mk808_defconfig +++ b/configs/mk808_defconfig @@ -25,6 +25,8 @@ CONFIG_SPL_FS_FAT=y CONFIG_SYS_LOAD_ADDR=0x70800800 CONFIG_SPL_PAYLOAD="u-boot.bin" CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x78000000 CONFIG_SD_BOOT=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3066a-mk808.dtb" diff --git a/configs/mt7623a_unielec_u7623_02_defconfig b/configs/mt7623a_unielec_u7623_02_defconfig index 962e452c278..06e85c2f57d 100644 --- a/configs/mt7623a_unielec_u7623_02_defconfig +++ b/configs/mt7623a_unielec_u7623_02_defconfig @@ -10,6 +10,8 @@ CONFIG_DEFAULT_DEVICE_TREE="mt7623a-unielec-u7623-02-emmc" CONFIG_TARGET_MT7623=y CONFIG_SYS_LOAD_ADDR=0x84000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x81ffff10 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_BOOTDELAY=3 diff --git a/configs/mt7623n_bpir2_defconfig b/configs/mt7623n_bpir2_defconfig index b65b597f01d..4320fe5bb62 100644 --- a/configs/mt7623n_bpir2_defconfig +++ b/configs/mt7623n_bpir2_defconfig @@ -10,6 +10,8 @@ CONFIG_DEFAULT_DEVICE_TREE="mt7623n-bananapi-bpi-r2" CONFIG_TARGET_MT7623=y CONFIG_SYS_LOAD_ADDR=0x84000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x81ffff10 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_BOOTDELAY=3 diff --git a/configs/mt7629_rfb_defconfig b/configs/mt7629_rfb_defconfig index 5f301e0eceb..3ee77f39a3d 100644 --- a/configs/mt7629_rfb_defconfig +++ b/configs/mt7629_rfb_defconfig @@ -15,6 +15,8 @@ CONFIG_SPL_STACK_R_ADDR=0x40800000 CONFIG_SYS_LOAD_ADDR=0x42007f1c CONFIG_SPL_PAYLOAD="u-boot-lzma.img" CONFIG_BUILD_TARGET="u-boot-mtk.bin" +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41fffef0 CONFIG_SPL_IMAGE="spl/u-boot-spl-mtk.bin" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/mvebu_crb_cn9130_defconfig b/configs/mvebu_crb_cn9130_defconfig index 7e4addd1bfc..86e8b75e61b 100644 --- a/configs/mvebu_crb_cn9130_defconfig +++ b/configs/mvebu_crb_cn9130_defconfig @@ -13,6 +13,8 @@ CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/mvebu_db-88f3720_defconfig b/configs/mvebu_db-88f3720_defconfig index ccf0dba28e5..7b7382216ba 100644 --- a/configs/mvebu_db-88f3720_defconfig +++ b/configs/mvebu_db-88f3720_defconfig @@ -15,6 +15,8 @@ CONFIG_SYS_LOAD_ADDR=0x6000000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/mvebu_db_armada8k_defconfig b/configs/mvebu_db_armada8k_defconfig index 023bc21ad4f..0b4afbe59e8 100644 --- a/configs/mvebu_db_armada8k_defconfig +++ b/configs/mvebu_db_armada8k_defconfig @@ -14,6 +14,8 @@ CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/mvebu_db_cn9130_defconfig b/configs/mvebu_db_cn9130_defconfig index 1bcbb5bda63..9f6196095b3 100644 --- a/configs/mvebu_db_cn9130_defconfig +++ b/configs/mvebu_db_cn9130_defconfig @@ -15,6 +15,8 @@ CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/mvebu_espressobin-88f3720_defconfig b/configs/mvebu_espressobin-88f3720_defconfig index aa01da6a09c..8368e4c028b 100644 --- a/configs/mvebu_espressobin-88f3720_defconfig +++ b/configs/mvebu_espressobin-88f3720_defconfig @@ -15,6 +15,8 @@ CONFIG_SYS_LOAD_ADDR=0x6000000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y diff --git a/configs/mvebu_mcbin-88f8040_defconfig b/configs/mvebu_mcbin-88f8040_defconfig index 60d3940d9fd..be4bbe87ca2 100644 --- a/configs/mvebu_mcbin-88f8040_defconfig +++ b/configs/mvebu_mcbin-88f8040_defconfig @@ -15,6 +15,8 @@ CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/mvebu_puzzle-m801-88f8040_defconfig b/configs/mvebu_puzzle-m801-88f8040_defconfig index 289df896883..c05beef8f94 100644 --- a/configs/mvebu_puzzle-m801-88f8040_defconfig +++ b/configs/mvebu_puzzle-m801-88f8040_defconfig @@ -15,6 +15,8 @@ CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autoboot in %d seconds, to stop use 's' key\n" diff --git a/configs/nanopc-t4-rk3399_defconfig b/configs/nanopc-t4-rk3399_defconfig index bd1548adcaf..a1d66c51b5c 100644 --- a/configs/nanopc-t4-rk3399_defconfig +++ b/configs/nanopc-t4-rk3399_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopc-t4.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 diff --git a/configs/nanopi-k2_defconfig b/configs/nanopi-k2_defconfig index bd715b3c6a4..dafbf16cb82 100644 --- a/configs/nanopi-k2_defconfig +++ b/configs/nanopi-k2_defconfig @@ -10,6 +10,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" nanopi-k2" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/nanopi-m4-2gb-rk3399_defconfig b/configs/nanopi-m4-2gb-rk3399_defconfig index 3c8b41943a4..c3ecb994606 100644 --- a/configs/nanopi-m4-2gb-rk3399_defconfig +++ b/configs/nanopi-m4-2gb-rk3399_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4-2gb.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 diff --git a/configs/nanopi-m4-rk3399_defconfig b/configs/nanopi-m4-rk3399_defconfig index a71df3bbcc7..608bed247c9 100644 --- a/configs/nanopi-m4-rk3399_defconfig +++ b/configs/nanopi-m4-rk3399_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 diff --git a/configs/nanopi-m4b-rk3399_defconfig b/configs/nanopi-m4b-rk3399_defconfig index fb6d62c16a2..125c3ee30e3 100644 --- a/configs/nanopi-m4b-rk3399_defconfig +++ b/configs/nanopi-m4b-rk3399_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4b.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 diff --git a/configs/nanopi-neo4-rk3399_defconfig b/configs/nanopi-neo4-rk3399_defconfig index 8f10d3c0b17..3d159ff488a 100644 --- a/configs/nanopi-neo4-rk3399_defconfig +++ b/configs/nanopi-neo4-rk3399_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-neo4.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 diff --git a/configs/nanopi-r2s-rk3328_defconfig b/configs/nanopi-r2s-rk3328_defconfig index e82214d8ff4..0049655be38 100644 --- a/configs/nanopi-r2s-rk3328_defconfig +++ b/configs/nanopi-r2s-rk3328_defconfig @@ -17,6 +17,8 @@ CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y diff --git a/configs/nanopi-r4s-rk3399_defconfig b/configs/nanopi-r4s-rk3399_defconfig index 72a96b049bb..cd7a521d84e 100644 --- a/configs/nanopi-r4s-rk3399_defconfig +++ b/configs/nanopi-r4s-rk3399_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-r4s.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig index ba82b08cac0..ca482ce745e 100644 --- a/configs/nas220_defconfig +++ b/configs/nas220_defconfig @@ -12,6 +12,8 @@ CONFIG_ENV_OFFSET=0xA0000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-blackarmor-nas220" CONFIG_IDENT_STRING="\nNAS 220" CONFIG_SYS_LOAD_ADDR=0x800000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig index 112f34d1aa2..32308a04f65 100644 --- a/configs/net2big_v2_defconfig +++ b/configs/net2big_v2_defconfig @@ -15,6 +15,8 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-net2big" CONFIG_IDENT_STRING=" 2Big v2" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_ENV_ADDR=0x70000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig index 6dcb57cab6b..2a1c3ac2d34 100644 --- a/configs/netspace_lite_v2_defconfig +++ b/configs/netspace_lite_v2_defconfig @@ -15,6 +15,8 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2lite" CONFIG_IDENT_STRING=" NS v2 Lite" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_ENV_ADDR=0x70000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig index 802c5ea26b2..3c847316f6f 100644 --- a/configs/netspace_max_v2_defconfig +++ b/configs/netspace_max_v2_defconfig @@ -15,6 +15,8 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2max" CONFIG_IDENT_STRING=" NS Max v2" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_ENV_ADDR=0x70000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig index a580b7a362b..8239d45a845 100644 --- a/configs/netspace_mini_v2_defconfig +++ b/configs/netspace_mini_v2_defconfig @@ -15,6 +15,8 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2mini" CONFIG_IDENT_STRING=" NS v2 Mini" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_ENV_ADDR=0x70000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig index 9bdcc075334..673e0a42a3f 100644 --- a/configs/netspace_v2_defconfig +++ b/configs/netspace_v2_defconfig @@ -15,6 +15,8 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2" CONFIG_IDENT_STRING=" NS v2" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_ENV_ADDR=0x70000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig index 978570c3191..8b525eb5ff5 100644 --- a/configs/nsa310s_defconfig +++ b/configs/nsa310s_defconfig @@ -14,6 +14,8 @@ CONFIG_ENV_OFFSET=0xE0000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-nsa310s" CONFIG_IDENT_STRING="\nZyXEL NSA310S/320S 1/2-Bay Power Media Server" CONFIG_SYS_LOAD_ADDR=0x800000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_root}; ubi part root; ubifsmount ubi:rootfs; ubifsload 0x800000 ${kernel}; ubifsload 0x700000 ${fdt}; ubifsumount; fdt addr 0x700000; fdt resize; fdt chosen; bootz 0x800000 - 0x700000" diff --git a/configs/nsim_700_defconfig b/configs/nsim_700_defconfig index 068b654dc9f..bcf954aa632 100644 --- a/configs/nsim_700_defconfig +++ b/configs/nsim_700_defconfig @@ -10,6 +10,8 @@ CONFIG_DEBUG_UART_CLOCK=70000000 CONFIG_SYS_CLK_FREQ=70000000 CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" diff --git a/configs/nsim_700be_defconfig b/configs/nsim_700be_defconfig index 58ed0d188fe..5a09db2f9bf 100644 --- a/configs/nsim_700be_defconfig +++ b/configs/nsim_700be_defconfig @@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_CLOCK=70000000 CONFIG_SYS_CLK_FREQ=70000000 CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" diff --git a/configs/nsim_hs38_defconfig b/configs/nsim_hs38_defconfig index 357d61f55db..ad8acec4e08 100644 --- a/configs/nsim_hs38_defconfig +++ b/configs/nsim_hs38_defconfig @@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_CLOCK=70000000 CONFIG_SYS_CLK_FREQ=70000000 CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" diff --git a/configs/nsim_hs38be_defconfig b/configs/nsim_hs38be_defconfig index e9b4f6c1365..8a63e58263f 100644 --- a/configs/nsim_hs38be_defconfig +++ b/configs/nsim_hs38be_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_CLOCK=70000000 CONFIG_SYS_CLK_FREQ=70000000 CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" diff --git a/configs/octeontx2_95xx_defconfig b/configs/octeontx2_95xx_defconfig index 34f31ae75d4..fc7bc6d50ec 100644 --- a/configs/octeontx2_95xx_defconfig +++ b/configs/octeontx2_95xx_defconfig @@ -17,6 +17,8 @@ CONFIG_SYS_LOAD_ADDR=0x4000000 CONFIG_DEBUG_UART=y CONFIG_SYS_MEMTEST_START=0x04000000 CONFIG_SYS_MEMTEST_END=0x040f0000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40ffff0 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/octeontx2_96xx_defconfig b/configs/octeontx2_96xx_defconfig index 481b89f864b..e0d4fe76a0f 100644 --- a/configs/octeontx2_96xx_defconfig +++ b/configs/octeontx2_96xx_defconfig @@ -16,6 +16,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x4000000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40ffff0 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y diff --git a/configs/octeontx_81xx_defconfig b/configs/octeontx_81xx_defconfig index a92cac31538..72e7c6ff539 100644 --- a/configs/octeontx_81xx_defconfig +++ b/configs/octeontx_81xx_defconfig @@ -18,6 +18,8 @@ CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x2800000 CONFIG_SYS_MEMTEST_END=0x28f0000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x28ffff0 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/octeontx_83xx_defconfig b/configs/octeontx_83xx_defconfig index ad7edf0a9a5..fbdf1cb846b 100644 --- a/configs/octeontx_83xx_defconfig +++ b/configs/octeontx_83xx_defconfig @@ -16,6 +16,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x2800000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x28ffff0 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig index 4c82fd097a3..079d86961c2 100644 --- a/configs/odroid-c2_defconfig +++ b/configs/odroid-c2_defconfig @@ -10,6 +10,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" odroid-c2" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/odroid-c4_defconfig b/configs/odroid-c4_defconfig index c1544cba717..12312dbb2a8 100644 --- a/configs/odroid-c4_defconfig +++ b/configs/odroid-c4_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" odroid-c4/hc4" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/odroid-go2_defconfig b/configs/odroid-go2_defconfig index c15e9f335de..2990b65347e 100644 --- a/configs/odroid-go2_defconfig +++ b/configs/odroid-go2_defconfig @@ -21,6 +21,8 @@ CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y diff --git a/configs/odroid-hc4_defconfig b/configs/odroid-hc4_defconfig index 8d546c35175..05d81801887 100644 --- a/configs/odroid-hc4_defconfig +++ b/configs/odroid-hc4_defconfig @@ -13,6 +13,8 @@ CONFIG_IDENT_STRING=" odroid-hc4" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/odroid-n2_defconfig b/configs/odroid-n2_defconfig index 105dca6e103..aa05ee6a5db 100644 --- a/configs/odroid-n2_defconfig +++ b/configs/odroid-n2_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" odroid-n2/n2-plus" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/odroid-xu3_defconfig b/configs/odroid-xu3_defconfig index 17ef8ad9923..7acdca93398 100644 --- a/configs/odroid-xu3_defconfig +++ b/configs/odroid-xu3_defconfig @@ -14,6 +14,8 @@ CONFIG_IDENT_STRING=" for ODROID-XU3/XU4/HC1/HC2" CONFIG_SYS_MEM_TOP_HIDE=0x01600000 CONFIG_SYS_LOAD_ADDR=0x43e00000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x42e00000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig index a4013a6eca7..d442aca7887 100644 --- a/configs/odroid_defconfig +++ b/configs/odroid_defconfig @@ -15,6 +15,8 @@ CONFIG_DEFAULT_DEVICE_TREE="exynos4412-odroid" CONFIG_SYS_MEM_TOP_HIDE=0x00100000 CONFIG_SYS_LOAD_ADDR=0x43e00000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x43dfff10 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/omap35_logic_defconfig b/configs/omap35_logic_defconfig index d205cc308cc..d4b24f4cbd4 100644 --- a/configs/omap35_logic_defconfig +++ b/configs/omap35_logic_defconfig @@ -14,6 +14,8 @@ CONFIG_TARGET_OMAP3_LOGIC=y CONFIG_SPL=y CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_BOOTCOMMAND="run autoboot" CONFIG_USE_PREBOOT=y diff --git a/configs/omap35_logic_somlv_defconfig b/configs/omap35_logic_somlv_defconfig index b0832a09fde..778b15f05a2 100644 --- a/configs/omap35_logic_somlv_defconfig +++ b/configs/omap35_logic_somlv_defconfig @@ -14,6 +14,8 @@ CONFIG_TARGET_OMAP3_LOGIC=y CONFIG_SPL=y CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_SYS_MONITOR_BASE=0x10000000 CONFIG_BOOTCOMMAND="run autoboot" diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig index 1518d1e5e3e..abd15b4d1af 100644 --- a/configs/omap3_beagle_defconfig +++ b/configs/omap3_beagle_defconfig @@ -10,6 +10,8 @@ CONFIG_TARGET_OMAP3_BEAGLE=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="omap3-beagle.dtb" diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig index 914b1ea1096..d981ee5d7a8 100644 --- a/configs/omap3_evm_defconfig +++ b/configs/omap3_evm_defconfig @@ -10,6 +10,8 @@ CONFIG_TARGET_OMAP3_EVM=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run envboot; run distro_bootcmd" CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="omap3-evm.dtb" diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index 4d3cafc7ae1..19a4da16101 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -14,6 +14,8 @@ CONFIG_TARGET_OMAP3_LOGIC=y CONFIG_SPL=y CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_BOOTCOMMAND="run autoboot" CONFIG_USE_PREBOOT=y diff --git a/configs/omap3_logic_somlv_defconfig b/configs/omap3_logic_somlv_defconfig index 4afc37bec64..0f353bf3e09 100644 --- a/configs/omap3_logic_somlv_defconfig +++ b/configs/omap3_logic_somlv_defconfig @@ -14,6 +14,8 @@ CONFIG_TARGET_OMAP3_LOGIC=y CONFIG_SPL=y CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_SYS_MONITOR_BASE=0x10000000 CONFIG_BOOTCOMMAND="run autoboot" diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig index a815b9ab573..23599cf845c 100644 --- a/configs/omap4_panda_defconfig +++ b/configs/omap4_panda_defconfig @@ -7,6 +7,8 @@ CONFIG_OMAP44XX=y CONFIG_TARGET_OMAP4_PANDA=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030df00 CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run findfdt; run init_console; run envboot; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="omap4-panda.dtb" CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/omap4_sdp4430_defconfig b/configs/omap4_sdp4430_defconfig index 7a435930f87..d43262a8745 100644 --- a/configs/omap4_sdp4430_defconfig +++ b/configs/omap4_sdp4430_defconfig @@ -11,6 +11,8 @@ CONFIG_TARGET_OMAP4_SDP4430=y CONFIG_CMD_BAT=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030df00 CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run findfdt; run init_console; run envboot; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="omap4-sdp.dtb" CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig index beccc82aa69..53ae1e65195 100644 --- a/configs/omap5_uevm_defconfig +++ b/configs/omap5_uevm_defconfig @@ -11,6 +11,8 @@ CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_ARMV7_LPAE=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4031ff00 CONFIG_BOOTCOMMAND="if test ${dofastboot} -eq 1; then echo Boot fastboot requested, resetting dofastboot ...;setenv dofastboot 0; saveenv;echo Booting into fastboot ...; fastboot 1;fi;if test ${boot_fit} -eq 1; then run update_to_fit;fi;run findfdt; run finduuid; run distro_bootcmd;run emmc_android_boot; " CONFIG_DEFAULT_FDT_FILE="omap5-uevm.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index 108a31441b4..8b3796dfb63 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -22,6 +22,8 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0xc0700000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0000f20 CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/openpiton_riscv64_defconfig b/configs/openpiton_riscv64_defconfig index 3af8aee4540..aa4c307b4c6 100644 --- a/configs/openpiton_riscv64_defconfig +++ b/configs/openpiton_riscv64_defconfig @@ -11,6 +11,8 @@ CONFIG_RISCV_SMODE=y CONFIG_OF_BOARD_FIXUP=y # CONFIG_LOCALVERSION_AUTO is not set CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x82000000 # CONFIG_EXPERT is not set # CONFIG_LEGACY_IMAGE_FORMAT is not set # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set diff --git a/configs/openpiton_riscv64_spl_defconfig b/configs/openpiton_riscv64_spl_defconfig index fdb34d9d06e..8d2ddedb54c 100644 --- a/configs/openpiton_riscv64_spl_defconfig +++ b/configs/openpiton_riscv64_spl_defconfig @@ -15,6 +15,8 @@ CONFIG_CMODEL_MEDANY=y CONFIG_RISCV_SMODE=y # CONFIG_LOCALVERSION_AUTO is not set CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x82000000 # CONFIG_EXPERT is not set # CONFIG_LEGACY_IMAGE_FORMAT is not set # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig index 5cb166ecb9f..967246a9db9 100644 --- a/configs/openrd_base_defconfig +++ b/configs/openrd_base_defconfig @@ -13,6 +13,8 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-base" CONFIG_IDENT_STRING="\nOpenRD-Base" CONFIG_SYS_LOAD_ADDR=0x800000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_HAS_BOARD_SIZE_LIMIT=y CONFIG_BOARD_SIZE_LIMIT=524288 diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig index db1df949b6e..f1dbed87d69 100644 --- a/configs/openrd_client_defconfig +++ b/configs/openrd_client_defconfig @@ -14,6 +14,8 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-client" CONFIG_IDENT_STRING="\nOpenRD-Client" CONFIG_SYS_LOAD_ADDR=0x800000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_HAS_BOARD_SIZE_LIMIT=y CONFIG_BOARD_SIZE_LIMIT=524288 diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig index 95890ec30f3..49668150fb9 100644 --- a/configs/openrd_ultimate_defconfig +++ b/configs/openrd_ultimate_defconfig @@ -14,6 +14,8 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-ultimate" CONFIG_IDENT_STRING="\nOpenRD-Ultimate" CONFIG_SYS_LOAD_ADDR=0x800000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_HAS_BOARD_SIZE_LIMIT=y CONFIG_BOARD_SIZE_LIMIT=524288 diff --git a/configs/orangepi-rk3399_defconfig b/configs/orangepi-rk3399_defconfig index c266641c896..6a8e3332110 100644 --- a/configs/orangepi-rk3399_defconfig +++ b/configs/orangepi-rk3399_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-orangepi.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 diff --git a/configs/origen_defconfig b/configs/origen_defconfig index 5aa8f10bc7b..0a36472d331 100644 --- a/configs/origen_defconfig +++ b/configs/origen_defconfig @@ -18,6 +18,8 @@ CONFIG_IDENT_STRING=" for ORIGEN" CONFIG_SYS_MEM_TOP_HIDE=0x100000 CONFIG_SYS_LOAD_ADDR=0x43e00000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2040000 CONFIG_BOOTCOMMAND="if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadbootenv; then echo Loaded environment from ${bootenv};run importbootenv;fi;if test -n $uenvcmd; then echo Running uenvcmd ...;run uenvcmd;fi;if run loadbootscript; then run bootscript; fi; fi;load mmc ${mmcdev} ${loadaddr} uImage; bootm ${loadaddr} " CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/p200_defconfig b/configs/p200_defconfig index 7d8daa73c72..5fdcc1216f0 100644 --- a/configs/p200_defconfig +++ b/configs/p200_defconfig @@ -10,6 +10,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" p200" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/p201_defconfig b/configs/p201_defconfig index 77cf2ad1a44..a87c16a60c0 100644 --- a/configs/p201_defconfig +++ b/configs/p201_defconfig @@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" p201" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/p212_defconfig b/configs/p212_defconfig index 633dd45628a..ebcb194767e 100644 --- a/configs/p212_defconfig +++ b/configs/p212_defconfig @@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" p212" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig index d71ceada989..27be6075661 100644 --- a/configs/peach-pi_defconfig +++ b/configs/peach-pi_defconfig @@ -18,6 +18,8 @@ CONFIG_SPL=y CONFIG_IDENT_STRING=" for Peach-Pi" CONFIG_SYS_LOAD_ADDR=0x23e00000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2073800 CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig index 98eeab54bd3..296b4ceb195 100644 --- a/configs/peach-pit_defconfig +++ b/configs/peach-pit_defconfig @@ -17,6 +17,8 @@ CONFIG_SPL=y CONFIG_IDENT_STRING=" for Peach-Pit" CONFIG_SYS_LOAD_ADDR=0x23e00000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2073800 CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y diff --git a/configs/phycore-am335x-r2-regor_defconfig b/configs/phycore-am335x-r2-regor_defconfig index 51b0c6fb55e..87ab811946c 100644 --- a/configs/phycore-am335x-r2-regor_defconfig +++ b/configs/phycore-am335x-r2-regor_defconfig @@ -15,6 +15,8 @@ CONFIG_SPL=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_PAYLOAD="u-boot.img" +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/phycore-am335x-r2-wega_defconfig b/configs/phycore-am335x-r2-wega_defconfig index 59a4ef1f89d..0bd348b5f0f 100644 --- a/configs/phycore-am335x-r2-wega_defconfig +++ b/configs/phycore-am335x-r2-wega_defconfig @@ -15,6 +15,8 @@ CONFIG_SPL=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_PAYLOAD="u-boot.img" +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig index ce1271ef716..522dd6679d7 100644 --- a/configs/phycore-rk3288_defconfig +++ b/configs/phycore-rk3288_defconfig @@ -15,6 +15,8 @@ CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-phycore-rdk.dtb" diff --git a/configs/pic32mzdask_defconfig b/configs/pic32mzdask_defconfig index 12cff6ab0b9..a912ea638ff 100644 --- a/configs/pic32mzdask_defconfig +++ b/configs/pic32mzdask_defconfig @@ -12,6 +12,8 @@ CONFIG_MIPS_BOOT_FDT=y CONFIG_SYS_MEMTEST_START=0x88000000 CONFIG_SYS_MEMTEST_END=0x88080000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007ffff CONFIG_TIMESTAMP=y CONFIG_BOOTDELAY=5 CONFIG_BOOTCOMMAND="run distro_bootcmd || run legacy_bootcmd" diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig index f41a66a3047..5f763acfcef 100644 --- a/configs/pinebook-pro-rk3399_defconfig +++ b/configs/pinebook-pro-rk3399_defconfig @@ -14,6 +14,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-pinebook-pro.dtb" diff --git a/configs/pm9261_defconfig b/configs/pm9261_defconfig index c423c14e93c..c22076250bc 100644 --- a/configs/pm9261_defconfig +++ b/configs/pm9261_defconfig @@ -11,6 +11,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_ENV_ADDR=0x10040000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003f00 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock4 rootfstype=jffs2 fbcon=rotate:3 " diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig index 0013210f6cf..1406e7f1aa4 100644 --- a/configs/pm9263_defconfig +++ b/configs/pm9263_defconfig @@ -11,6 +11,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_ENV_ADDR=0x10040000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003f00 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock4 rootfstype=jffs2 fbcon=rotate:3 " diff --git a/configs/pm9g45_defconfig b/configs/pm9g45_defconfig index 34bf3d7e93a..fbad587d383 100644 --- a/configs/pm9g45_defconfig +++ b/configs/pm9g45_defconfig @@ -13,6 +13,8 @@ CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x70003f00 CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig index 699e8e2beab..b7f9c12efcd 100644 --- a/configs/pogo_e02_defconfig +++ b/configs/pogo_e02_defconfig @@ -13,6 +13,8 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-pogo_e02" CONFIG_IDENT_STRING="\nPogo E02" CONFIG_SYS_LOAD_ADDR=0x800000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/pogo_v4_defconfig b/configs/pogo_v4_defconfig index ba4245ea174..6f928edf41b 100644 --- a/configs/pogo_v4_defconfig +++ b/configs/pogo_v4_defconfig @@ -13,6 +13,8 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-pogoplug-series-4" CONFIG_IDENT_STRING="\nPogoplug V4" CONFIG_SYS_LOAD_ADDR=0x800000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_BOOTSTAGE=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_BOOTDELAY=10 diff --git a/configs/poleg_evb_defconfig b/configs/poleg_evb_defconfig index 739bfcf1b61..16f6215148c 100644 --- a/configs/poleg_evb_defconfig +++ b/configs/poleg_evb_defconfig @@ -13,6 +13,8 @@ CONFIG_DEFAULT_DEVICE_TREE="nuvoton-npcm750-evb" CONFIG_TARGET_POLEG=y CONFIG_SYS_LOAD_ADDR=0x10000000 CONFIG_ENV_ADDR=0x80100000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7f10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run common_bootargs; run romboot" CONFIG_SYS_PROMPT="U-Boot>" diff --git a/configs/pomelo_defconfig b/configs/pomelo_defconfig index 9c527181c49..13b1d7b628b 100644 --- a/configs/pomelo_defconfig +++ b/configs/pomelo_defconfig @@ -8,6 +8,8 @@ CONFIG_DEFAULT_DEVICE_TREE="phytium-pomelo" CONFIG_SYS_LOAD_ADDR=0x90000000 CONFIG_SYS_PCI_64BIT=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2981a000 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 earlycon=pl011,0x28001000 root=/dev/sda2 rw" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/poplar_defconfig b/configs/poplar_defconfig index f0c2040ca97..85ff6bd07cb 100644 --- a/configs/poplar_defconfig +++ b/configs/poplar_defconfig @@ -10,6 +10,8 @@ CONFIG_DEFAULT_DEVICE_TREE="hi3798cv200-poplar" CONFIG_IDENT_STRING="poplar" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x200000 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="poplar# " CONFIG_SYS_MAXARGS=64 diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig index 4354b2893f7..35ec663b3e6 100644 --- a/configs/popmetal-rk3288_defconfig +++ b/configs/popmetal-rk3288_defconfig @@ -15,6 +15,8 @@ CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-popmetal.dtb" diff --git a/configs/porter_defconfig b/configs/porter_defconfig index ae6863373f8..c176051cbd0 100644 --- a/configs/porter_defconfig +++ b/configs/porter_defconfig @@ -26,6 +26,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x50000000 CONFIG_ENV_ADDR=0xC0000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_MAX_SIZE=0x4000 diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index 866d624c18f..f7431ddf3ec 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -17,6 +17,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-puma-haikou.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y diff --git a/configs/px30-core-ctouch2-of10-px30_defconfig b/configs/px30-core-ctouch2-of10-px30_defconfig index b4692250196..66d2ca7c28c 100644 --- a/configs/px30-core-ctouch2-of10-px30_defconfig +++ b/configs/px30-core-ctouch2-of10-px30_defconfig @@ -19,6 +19,8 @@ CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y diff --git a/configs/px30-core-ctouch2-px30_defconfig b/configs/px30-core-ctouch2-px30_defconfig index f704aeb56e9..90fb411d551 100644 --- a/configs/px30-core-ctouch2-px30_defconfig +++ b/configs/px30-core-ctouch2-px30_defconfig @@ -19,6 +19,8 @@ CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y diff --git a/configs/px30-core-edimm2.2-px30_defconfig b/configs/px30-core-edimm2.2-px30_defconfig index c9b6523e319..cc2d5cbeacc 100644 --- a/configs/px30-core-edimm2.2-px30_defconfig +++ b/configs/px30-core-edimm2.2-px30_defconfig @@ -19,6 +19,8 @@ CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig index 046b82de08e..52e7dc8da53 100644 --- a/configs/pxm2_defconfig +++ b/configs/pxm2_defconfig @@ -22,6 +22,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"\" to stop\n" diff --git a/configs/qemu-riscv32_defconfig b/configs/qemu-riscv32_defconfig index 8d8c9e275f1..1f169e1a34f 100644 --- a/configs/qemu-riscv32_defconfig +++ b/configs/qemu-riscv32_defconfig @@ -6,6 +6,8 @@ CONFIG_DEFAULT_DEVICE_TREE="qemu-virt32" CONFIG_SYS_LOAD_ADDR=0x80200000 CONFIG_TARGET_QEMU_VIRT=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_FIT=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y diff --git a/configs/qemu-riscv32_smode_defconfig b/configs/qemu-riscv32_smode_defconfig index 2845cbcdc63..6f501a8798c 100644 --- a/configs/qemu-riscv32_smode_defconfig +++ b/configs/qemu-riscv32_smode_defconfig @@ -7,6 +7,8 @@ CONFIG_SYS_LOAD_ADDR=0x80200000 CONFIG_TARGET_QEMU_VIRT=y CONFIG_RISCV_SMODE=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_FIT=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig index efd38f52b78..73e5883e630 100644 --- a/configs/qemu-riscv32_spl_defconfig +++ b/configs/qemu-riscv32_spl_defconfig @@ -9,6 +9,8 @@ CONFIG_TARGET_QEMU_VIRT=y CONFIG_RISCV_SMODE=y # CONFIG_OF_BOARD_FIXUP is not set CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 CONFIG_DISPLAY_CPUINFO=y diff --git a/configs/qemu-riscv64_defconfig b/configs/qemu-riscv64_defconfig index fadbba45f65..95dc1b47699 100644 --- a/configs/qemu-riscv64_defconfig +++ b/configs/qemu-riscv64_defconfig @@ -7,6 +7,8 @@ CONFIG_SYS_LOAD_ADDR=0x80200000 CONFIG_TARGET_QEMU_VIRT=y CONFIG_ARCH_RV64I=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_FIT=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig index 83b922654ba..3eb3ea756e4 100644 --- a/configs/qemu-riscv64_smode_defconfig +++ b/configs/qemu-riscv64_smode_defconfig @@ -8,6 +8,8 @@ CONFIG_TARGET_QEMU_VIRT=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_FIT=y CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr}; fdt addr ${fdtcontroladdr};" diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig index de82869525f..66d1e56c5cb 100644 --- a/configs/qemu-riscv64_spl_defconfig +++ b/configs/qemu-riscv64_spl_defconfig @@ -9,6 +9,8 @@ CONFIG_TARGET_QEMU_VIRT=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 CONFIG_DISPLAY_CPUINFO=y diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig index c472d7ec5ee..87acf00f30e 100644 --- a/configs/qemu_arm64_defconfig +++ b/configs/qemu_arm64_defconfig @@ -13,6 +13,8 @@ CONFIG_ENV_ADDR=0x4000000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40200000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig index 6f5ba1fca49..d14a7adc5df 100644 --- a/configs/qemu_arm_defconfig +++ b/configs/qemu_arm_defconfig @@ -15,6 +15,8 @@ CONFIG_ENV_ADDR=0x4000000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40200000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/radxa-zero_defconfig b/configs/radxa-zero_defconfig index 84c065cce6a..95f7f429111 100644 --- a/configs/radxa-zero_defconfig +++ b/configs/radxa-zero_defconfig @@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" radxa-zero" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig index ae57cd4e1cc..c7cf3847020 100644 --- a/configs/rastaban_defconfig +++ b/configs/rastaban_defconfig @@ -23,6 +23,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"\" to stop\n" diff --git a/configs/roc-cc-rk3308_defconfig b/configs/roc-cc-rk3308_defconfig index b3cda0f8cf1..e0464a3f2cf 100644 --- a/configs/roc-cc-rk3308_defconfig +++ b/configs/roc-cc-rk3308_defconfig @@ -16,6 +16,8 @@ CONFIG_DEBUG_UART_BASE=0xFF0C0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig index 7df26d4d298..fdaf633f60f 100644 --- a/configs/roc-cc-rk3328_defconfig +++ b/configs/roc-cc-rk3328_defconfig @@ -17,6 +17,8 @@ CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig index 5e16e1074a3..fbcac4cbdb2 100644 --- a/configs/roc-pc-mezzanine-rk3399_defconfig +++ b/configs/roc-pc-mezzanine-rk3399_defconfig @@ -17,6 +17,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-mezzanine.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index 65f10518ab5..b053f7e5846 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -17,6 +17,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig index ee9224a6406..89566cdc757 100644 --- a/configs/rock-pi-4-rk3399_defconfig +++ b/configs/rock-pi-4-rk3399_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4b.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/rock-pi-4c-rk3399_defconfig b/configs/rock-pi-4c-rk3399_defconfig index 6aec015ff82..1820b7695ec 100644 --- a/configs/rock-pi-4c-rk3399_defconfig +++ b/configs/rock-pi-4c-rk3399_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4c.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig index cb31b314f94..e1e50396d32 100644 --- a/configs/rock-pi-e-rk3328_defconfig +++ b/configs/rock-pi-e-rk3328_defconfig @@ -18,6 +18,8 @@ CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y diff --git a/configs/rock-pi-n10-rk3399pro_defconfig b/configs/rock-pi-n10-rk3399pro_defconfig index c1cfb5c71a3..c468d7d1ab3 100644 --- a/configs/rock-pi-n10-rk3399pro_defconfig +++ b/configs/rock-pi-n10-rk3399pro_defconfig @@ -13,6 +13,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399pro-rock-pi-n10.dtb" # CONFIG_CONSOLE_MUX is not set diff --git a/configs/rock-pi-n8-rk3288_defconfig b/configs/rock-pi-n8-rk3288_defconfig index 2c0f24c528f..66258f02c80 100644 --- a/configs/rock-pi-n8-rk3288_defconfig +++ b/configs/rock-pi-n8-rk3288_defconfig @@ -16,6 +16,8 @@ CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y CONFIG_SILENT_CONSOLE=y diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig index 5a22dfe3bd0..ffc11625e14 100644 --- a/configs/rock2_defconfig +++ b/configs/rock2_defconfig @@ -15,6 +15,8 @@ CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-rock2-square.dtb" diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig index c17bc535d8f..7026b6f4d92 100644 --- a/configs/rock64-rk3328_defconfig +++ b/configs/rock64-rk3328_defconfig @@ -17,6 +17,8 @@ CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig index e91b469825f..788adb83e2d 100644 --- a/configs/rock960-rk3399_defconfig +++ b/configs/rock960-rk3399_defconfig @@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/rock_defconfig b/configs/rock_defconfig index 0c10338c4ae..dfc9257225f 100644 --- a/configs/rock_defconfig +++ b/configs/rock_defconfig @@ -18,6 +18,8 @@ CONFIG_DEBUG_UART_BASE=0x20064000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x60800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000 CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3188-radxarock.dtb" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig index 424f21cf15e..8a66931edd0 100644 --- a/configs/rockpro64-rk3399_defconfig +++ b/configs/rockpro64-rk3399_defconfig @@ -15,6 +15,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig index 1cea925b52d..504f475b034 100644 --- a/configs/rpi_0_w_defconfig +++ b/configs/rpi_0_w_defconfig @@ -9,6 +9,8 @@ CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-zero-w" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff00 CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig index e9764b70f42..9e5d97a2269 100644 --- a/configs/rpi_2_defconfig +++ b/configs/rpi_2_defconfig @@ -10,6 +10,8 @@ CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="bcm2836-rpi-2-b" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff00 CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig index 93ea995b4b0..1fc95365dfb 100644 --- a/configs/rpi_3_32b_defconfig +++ b/configs/rpi_3_32b_defconfig @@ -9,6 +9,8 @@ CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff00 CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/rpi_3_b_plus_defconfig b/configs/rpi_3_b_plus_defconfig index d2db701d5b8..a1f9ba78aaa 100644 --- a/configs/rpi_3_b_plus_defconfig +++ b/configs/rpi_3_b_plus_defconfig @@ -8,6 +8,8 @@ CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b-plus" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fffe40 CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig index 21df49f000f..770d496dc6b 100644 --- a/configs/rpi_3_defconfig +++ b/configs/rpi_3_defconfig @@ -8,6 +8,8 @@ CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fffe40 CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig index cdb773069d8..aed6e525474 100644 --- a/configs/rpi_4_32b_defconfig +++ b/configs/rpi_4_32b_defconfig @@ -6,6 +6,8 @@ CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="bcm2711-rpi-4-b" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fffee0 CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="pci enum; usb start;" diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig index 0827559be5a..66375056973 100644 --- a/configs/rpi_4_defconfig +++ b/configs/rpi_4_defconfig @@ -6,6 +6,8 @@ CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="bcm2711-rpi-4-b" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fffe30 CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="pci enum; usb start;" diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig index 9cbfb90c01c..16f64eb5408 100644 --- a/configs/rpi_arm64_defconfig +++ b/configs/rpi_arm64_defconfig @@ -6,6 +6,8 @@ CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="bcm2711-rpi-4-b" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fffe30 CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="pci enum; usb start;" diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig index 014898a3799..00745c2a1ea 100644 --- a/configs/rpi_defconfig +++ b/configs/rpi_defconfig @@ -9,6 +9,8 @@ CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-b" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff00 CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/rut_defconfig b/configs/rut_defconfig index 0b25a598f41..576be6c6fe4 100644 --- a/configs/rut_defconfig +++ b/configs/rut_defconfig @@ -22,6 +22,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"\" to stop\n" diff --git a/configs/s400_defconfig b/configs/s400_defconfig index b0e301097ea..ee855aa4b49 100644 --- a/configs/s400_defconfig +++ b/configs/s400_defconfig @@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" s400" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/s5p4418_nanopi2_defconfig b/configs/s5p4418_nanopi2_defconfig index cebca7447b2..e6e2d3eedbe 100644 --- a/configs/s5p4418_nanopi2_defconfig +++ b/configs/s5p4418_nanopi2_defconfig @@ -18,6 +18,8 @@ CONFIG_ROOT_PART=2 CONFIG_SYS_LOAD_ADDR=0x71080000 CONFIG_SYS_MEMTEST_START=0x71000000 CONFIG_SYS_MEMTEST_END=0xb0000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x74c00000 CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig index 5b4930128d7..a0104044a85 100644 --- a/configs/s5p_goni_defconfig +++ b/configs/s5p_goni_defconfig @@ -11,6 +11,8 @@ CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-goni" CONFIG_TARGET_S5P_GONI=y CONFIG_SYS_LOAD_ADDR=0x34000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x33000000 # CONFIG_AUTOBOOT is not set CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock8 rootfstype=ext4 ${console} ${meminfo} ${mtdparts}" diff --git a/configs/s5pc210_universal_defconfig b/configs/s5pc210_universal_defconfig index d5860fdda93..af7fef58a60 100644 --- a/configs/s5pc210_universal_defconfig +++ b/configs/s5pc210_universal_defconfig @@ -15,6 +15,8 @@ CONFIG_DEFAULT_DEVICE_TREE="exynos4210-universal_c210" CONFIG_SYS_MEM_TOP_HIDE=0x100000 CONFIG_SYS_LOAD_ADDR=0x44800000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x447fff10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="Please use defined boot" CONFIG_BOOTCOMMAND="run mmcboot" diff --git a/configs/sam9x60_curiosity_mmc_defconfig b/configs/sam9x60_curiosity_mmc_defconfig index 3adf9f146da..592667160b6 100644 --- a/configs/sam9x60_curiosity_mmc_defconfig +++ b/configs/sam9x60_curiosity_mmc_defconfig @@ -15,6 +15,8 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=200000000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000bf00 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sam9x60ek_mmc_defconfig b/configs/sam9x60ek_mmc_defconfig index e7858bf8578..9ac46f6a6a0 100644 --- a/configs/sam9x60ek_mmc_defconfig +++ b/configs/sam9x60ek_mmc_defconfig @@ -15,6 +15,8 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=200000000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000bf00 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sam9x60ek_nandflash_defconfig b/configs/sam9x60ek_nandflash_defconfig index 2ffb4486c12..ec005a3d6d3 100644 --- a/configs/sam9x60ek_nandflash_defconfig +++ b/configs/sam9x60ek_nandflash_defconfig @@ -15,6 +15,8 @@ CONFIG_DEBUG_UART_CLOCK=200000000 CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000bf00 CONFIG_FIT=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sam9x60ek_qspiflash_defconfig b/configs/sam9x60ek_qspiflash_defconfig index 13d08ff408e..7898d5597ff 100644 --- a/configs/sam9x60ek_qspiflash_defconfig +++ b/configs/sam9x60ek_qspiflash_defconfig @@ -16,6 +16,8 @@ CONFIG_DEBUG_UART_CLOCK=200000000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000bf00 CONFIG_FIT=y CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d27_giantboard_defconfig b/configs/sama5d27_giantboard_defconfig index e8a0c40253b..4dec17850bd 100644 --- a/configs/sama5d27_giantboard_defconfig +++ b/configs/sama5d27_giantboard_defconfig @@ -24,6 +24,8 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ef0 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig index 599e6ec12a2..2d617200e9e 100644 --- a/configs/sama5d27_som1_ek_mmc1_defconfig +++ b/configs/sama5d27_som1_ek_mmc1_defconfig @@ -23,6 +23,8 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig index 6cf60dde97a..5bbae1299ad 100644 --- a/configs/sama5d27_som1_ek_mmc_defconfig +++ b/configs/sama5d27_som1_ek_mmc_defconfig @@ -24,6 +24,8 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig index f2038eea672..c671328e0c4 100644 --- a/configs/sama5d27_som1_ek_qspiflash_defconfig +++ b/configs/sama5d27_som1_ek_qspiflash_defconfig @@ -24,6 +24,8 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0 CONFIG_FIT=y CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig index e83a034b2e6..78a6ba6f48c 100644 --- a/configs/sama5d27_wlsom1_ek_mmc_defconfig +++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig @@ -22,6 +22,8 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig index e6caba0be23..b3490e940c1 100644 --- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig +++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig @@ -22,6 +22,8 @@ CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_FIT=y CONFIG_QSPI_BOOT=y CONFIG_SPI_BOOT=y diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig index c6ae3eee7eb..9a44370efc7 100644 --- a/configs/sama5d2_icp_mmc_defconfig +++ b/configs/sama5d2_icp_mmc_defconfig @@ -22,6 +22,8 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d2_icp_qspiflash_defconfig b/configs/sama5d2_icp_qspiflash_defconfig index 9678b72f771..373f5639731 100644 --- a/configs/sama5d2_icp_qspiflash_defconfig +++ b/configs/sama5d2_icp_qspiflash_defconfig @@ -16,6 +16,8 @@ CONFIG_SYS_MEMTEST_END=0x40000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_SYS_BOOT_GET_CMDLINE=y CONFIG_SYS_BOOT_GET_KBD=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_FIT=y CONFIG_QSPI_BOOT=y CONFIG_SD_BOOT=y diff --git a/configs/sama5d2_ptc_ek_mmc_defconfig b/configs/sama5d2_ptc_ek_mmc_defconfig index f3e515b55de..c2aa7f0cc7d 100644 --- a/configs/sama5d2_ptc_ek_mmc_defconfig +++ b/configs/sama5d2_ptc_ek_mmc_defconfig @@ -14,6 +14,8 @@ CONFIG_DEBUG_UART_CLOCK=82000000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d2_ptc_ek_nandflash_defconfig b/configs/sama5d2_ptc_ek_nandflash_defconfig index c71e8402af8..b5dc6ccd589 100644 --- a/configs/sama5d2_ptc_ek_nandflash_defconfig +++ b/configs/sama5d2_ptc_ek_nandflash_defconfig @@ -14,6 +14,8 @@ CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_FIT=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig index 32d87ec6c91..3865c66f9d2 100644 --- a/configs/sama5d2_xplained_emmc_defconfig +++ b/configs/sama5d2_xplained_emmc_defconfig @@ -23,6 +23,8 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index f5ac4f6df96..10e28fadc6e 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -24,6 +24,8 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig index 55c4353c42a..7e92c29e87d 100644 --- a/configs/sama5d2_xplained_qspiflash_defconfig +++ b/configs/sama5d2_xplained_qspiflash_defconfig @@ -24,6 +24,8 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0 CONFIG_FIT=y CONFIG_QSPI_BOOT=y CONFIG_SD_BOOT=y diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index 4364e413c4c..6a81c728e71 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -26,6 +26,8 @@ CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0 CONFIG_FIT=y CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d36ek_cmp_mmc_defconfig b/configs/sama5d36ek_cmp_mmc_defconfig index 72d0958873a..898b2f38538 100644 --- a/configs/sama5d36ek_cmp_mmc_defconfig +++ b/configs/sama5d36ek_cmp_mmc_defconfig @@ -14,6 +14,8 @@ CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig index 4e1e012cd97..be4482c9f9c 100644 --- a/configs/sama5d36ek_cmp_nandflash_defconfig +++ b/configs/sama5d36ek_cmp_nandflash_defconfig @@ -14,6 +14,8 @@ CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_FIT=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig index 1bf6e66d67a..6f1cd2055ad 100644 --- a/configs/sama5d36ek_cmp_spiflash_defconfig +++ b/configs/sama5d36ek_cmp_spiflash_defconfig @@ -16,6 +16,8 @@ CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_FIT=y CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index 99ac6953e87..4f4860e8984 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -24,6 +24,8 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index 0fb60933ab9..66381750ce9 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -21,6 +21,8 @@ CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_FIT=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index 8af8eb9d0e6..741ab76b3f1 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -24,6 +24,8 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index 6dddf0b203b..751f1f5904a 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -21,6 +21,8 @@ CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_FIT=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index 4ae23d800e5..952f65ba5b5 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -26,6 +26,8 @@ CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_FIT=y CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index c1e5a6dadb7..a11d260057d 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -24,6 +24,8 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index d460269abed..715b59b4fb9 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -21,6 +21,8 @@ CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_FIT=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index 922de42daf4..e42b6f7cd9d 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -26,6 +26,8 @@ CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_FIT=y CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig index 1bcb6081563..e0c10e0f240 100644 --- a/configs/sama5d4ek_mmc_defconfig +++ b/configs/sama5d4ek_mmc_defconfig @@ -24,6 +24,8 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig index d272536a0b0..dc6c3c4c580 100644 --- a/configs/sama5d4ek_nandflash_defconfig +++ b/configs/sama5d4ek_nandflash_defconfig @@ -21,6 +21,8 @@ CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_FIT=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig index 8d1f8bd1202..b73a35c8a74 100644 --- a/configs/sama5d4ek_spiflash_defconfig +++ b/configs/sama5d4ek_spiflash_defconfig @@ -26,6 +26,8 @@ CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_FIT=y CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig index f28720ca198..367cc48bba6 100644 --- a/configs/sama7g5ek_mmc1_defconfig +++ b/configs/sama7g5ek_mmc1_defconfig @@ -15,6 +15,8 @@ CONFIG_DEBUG_UART=y CONFIG_SYS_MEMTEST_START=0x60000000 CONFIG_SYS_MEMTEST_END=0x70000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60014ef0 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_USE_BOOTARGS=y diff --git a/configs/sama7g5ek_mmc_defconfig b/configs/sama7g5ek_mmc_defconfig index 80834bc8442..1de21b74a46 100644 --- a/configs/sama7g5ek_mmc_defconfig +++ b/configs/sama7g5ek_mmc_defconfig @@ -15,6 +15,8 @@ CONFIG_DEBUG_UART=y CONFIG_SYS_MEMTEST_START=0x60000000 CONFIG_SYS_MEMTEST_END=0x70000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60014ef0 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_USE_BOOTARGS=y diff --git a/configs/sei510_defconfig b/configs/sei510_defconfig index c3572f90b69..79a215fe9e8 100644 --- a/configs/sei510_defconfig +++ b/configs/sei510_defconfig @@ -16,6 +16,8 @@ CONFIG_IDENT_STRING=" sei510" # CONFIG_PSCI_RESET is not set CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y diff --git a/configs/sei610_defconfig b/configs/sei610_defconfig index 24e2a8fd577..a5b28c27745 100644 --- a/configs/sei610_defconfig +++ b/configs/sei610_defconfig @@ -16,6 +16,8 @@ CONFIG_IDENT_STRING=" sei610" # CONFIG_PSCI_RESET is not set CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y diff --git a/configs/sheep-rk3368_defconfig b/configs/sheep-rk3368_defconfig index 5b804685012..0411f26d1be 100644 --- a/configs/sheep-rk3368_defconfig +++ b/configs/sheep-rk3368_defconfig @@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_BASE=0xFF1b0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-sheep.dtb" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig index 7165c97607a..d014b2a8144 100644 --- a/configs/sheevaplug_defconfig +++ b/configs/sheevaplug_defconfig @@ -13,6 +13,8 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-sheevaplug" CONFIG_IDENT_STRING="\nMarvell-Sheevaplug" CONFIG_SYS_LOAD_ADDR=0x800000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_HAS_BOARD_SIZE_LIMIT=y CONFIG_BOARD_SIZE_LIMIT=524288 diff --git a/configs/sifive_unleashed_defconfig b/configs/sifive_unleashed_defconfig index f219bd21b48..f49fd9fba52 100644 --- a/configs/sifive_unleashed_defconfig +++ b/configs/sifive_unleashed_defconfig @@ -14,6 +14,8 @@ CONFIG_TARGET_SIFIVE_UNLEASHED=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x84000000 CONFIG_USE_PREBOOT=y diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig index 40aa38fe524..af8cc68cf62 100644 --- a/configs/sifive_unmatched_defconfig +++ b/configs/sifive_unmatched_defconfig @@ -17,6 +17,8 @@ CONFIG_TARGET_SIFIVE_UNMATCHED=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x84000000 CONFIG_USE_PREBOOT=y diff --git a/configs/silk_defconfig b/configs/silk_defconfig index 2f6bd2728bb..684e36f33d1 100644 --- a/configs/silk_defconfig +++ b/configs/silk_defconfig @@ -26,6 +26,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x50000000 CONFIG_ENV_ADDR=0xC0000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_MAX_SIZE=0x4000 diff --git a/configs/sipeed_maix_bitm_defconfig b/configs/sipeed_maix_bitm_defconfig index d977a9eb303..731665723a1 100644 --- a/configs/sipeed_maix_bitm_defconfig +++ b/configs/sipeed_maix_bitm_defconfig @@ -6,6 +6,8 @@ CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_SYS_LOAD_ADDR=0x80000000 CONFIG_TARGET_SIPEED_MAIX=y CONFIG_ARCH_RV64I=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x803fffff CONFIG_STACK_SIZE=0x100000 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run k210_bootcmd" diff --git a/configs/sipeed_maix_smode_defconfig b/configs/sipeed_maix_smode_defconfig index 36c2dbb8a85..ab2b3532e6b 100644 --- a/configs/sipeed_maix_smode_defconfig +++ b/configs/sipeed_maix_smode_defconfig @@ -8,6 +8,8 @@ CONFIG_SYS_LOAD_ADDR=0x80000000 CONFIG_TARGET_SIPEED_MAIX=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x803fffff CONFIG_STACK_SIZE=0x100000 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run k210_bootcmd" diff --git a/configs/smdk5250_defconfig b/configs/smdk5250_defconfig index 290a74d1fe4..cbbf13526c1 100644 --- a/configs/smdk5250_defconfig +++ b/configs/smdk5250_defconfig @@ -20,6 +20,8 @@ CONFIG_SPL=y CONFIG_IDENT_STRING=" for SMDK5250" CONFIG_SYS_LOAD_ADDR=0x43e00000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2050000 CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y diff --git a/configs/smdk5420_defconfig b/configs/smdk5420_defconfig index cad63be4e9d..7cf2cd5b566 100644 --- a/configs/smdk5420_defconfig +++ b/configs/smdk5420_defconfig @@ -18,6 +18,8 @@ CONFIG_SPL=y CONFIG_IDENT_STRING=" for SMDK5420" CONFIG_SYS_LOAD_ADDR=0x23e00000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2073800 CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig index d4d45c928ab..2c8bd1c8ee2 100644 --- a/configs/smdkc100_defconfig +++ b/configs/smdkc100_defconfig @@ -12,6 +12,8 @@ CONFIG_IDENT_STRING=" for SMDKC100" CONFIG_SYS_CLK_FREQ=12000000 CONFIG_SYS_LOAD_ADDR=0x30000000 CONFIG_ENV_ADDR=0x40000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2f000000 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock5 ubi.mtd=4 rootfstype=cramfs console=ttySAC0,115200n8 mem=128M mtdparts=s3c-onenand:256k(bootloader),128k@0x40000(params),3m@0x60000(kernel),16m@0x360000(test),-(UBI)" diff --git a/configs/smdkv310_defconfig b/configs/smdkv310_defconfig index be5f86d1398..17fc2c41e95 100644 --- a/configs/smdkv310_defconfig +++ b/configs/smdkv310_defconfig @@ -15,6 +15,8 @@ CONFIG_SPL=y CONFIG_IDENT_STRING=" for SMDKC210/V310" CONFIG_SYS_LOAD_ADDR=0x43e00000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2040000 CONFIG_BOOTCOMMAND="fatload mmc 0 40007000 uImage; bootm 40007000" # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_FOOTPRINT_LIMIT=y diff --git a/configs/sniper_defconfig b/configs/sniper_defconfig index ef2f49f627e..4dbe4f1964d 100644 --- a/configs/sniper_defconfig +++ b/configs/sniper_defconfig @@ -9,6 +9,8 @@ CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_SNIPER=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_BOOTCOMMAND="setenv boot_mmc_part ${kernel_mmc_part}; if test reboot-${reboot-mode} = reboot-r; then echo recovery; setenv boot_mmc_part ${recovery_mmc_part}; fi; if test reboot-${reboot-mode} = reboot-b; then echo fastboot; fastboot 0; fi; part start mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_start; part size mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_size; mmc dev ${boot_mmc_dev}; mmc read ${kernel_addr_r} ${boot_mmc_start} ${boot_mmc_size} && bootm ${kernel_addr_r};" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SPL_MAX_SIZE=0xec00 diff --git a/configs/snow_defconfig b/configs/snow_defconfig index 29e6e375e10..4377a58130e 100644 --- a/configs/snow_defconfig +++ b/configs/snow_defconfig @@ -23,6 +23,8 @@ CONFIG_IDENT_STRING=" for snow" CONFIG_SYS_LOAD_ADDR=0x43e00000 CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2050000 CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y diff --git a/configs/socfpga_agilex_atf_defconfig b/configs/socfpga_agilex_atf_defconfig index af99cacba01..10f3947b5db 100644 --- a/configs/socfpga_agilex_atf_defconfig +++ b/configs/socfpga_agilex_atf_defconfig @@ -14,6 +14,8 @@ CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y CONFIG_IDENT_STRING="socfpga_agilex" CONFIG_SPL_FS_FAT=y CONFIG_SYS_LOAD_ADDR=0x02000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig index 265d8d98068..23e1d787435 100644 --- a/configs/socfpga_agilex_defconfig +++ b/configs/socfpga_agilex_defconfig @@ -16,6 +16,8 @@ CONFIG_SPL_FS_FAT=y CONFIG_SYS_LOAD_ADDR=0x02000000 CONFIG_SYS_MEMTEST_START=0x00000000 CONFIG_SYS_MEMTEST_END=0x3fe00000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x101000 CONFIG_REMAKE_ELF=y CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y diff --git a/configs/socfpga_agilex_vab_defconfig b/configs/socfpga_agilex_vab_defconfig index 21917f95b84..c775ecbdcca 100644 --- a/configs/socfpga_agilex_vab_defconfig +++ b/configs/socfpga_agilex_vab_defconfig @@ -15,6 +15,8 @@ CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y CONFIG_IDENT_STRING="socfpga_agilex" CONFIG_SPL_FS_FAT=y CONFIG_SYS_LOAD_ADDR=0x02000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig index 884adf4d826..d326a3fb82d 100644 --- a/configs/socfpga_arria10_defconfig +++ b/configs/socfpga_arria10_defconfig @@ -11,6 +11,8 @@ CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y CONFIG_IDENT_STRING="socfpga_arria10" CONFIG_SPL_FS_FAT=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xffe2b000 CONFIG_FIT=y CONFIG_TIMESTAMP=y CONFIG_SPL_FIT=y diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index e1a2171c12b..62913f6702e 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -8,6 +8,8 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y CONFIG_TIMESTAMP=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index 1e9b3def108..7809b57ab7c 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -8,6 +8,8 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y CONFIG_TIMESTAMP=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/socfpga_dbm_soc1_defconfig b/configs/socfpga_dbm_soc1_defconfig index 687be5211c5..d6b2e663989 100644 --- a/configs/socfpga_dbm_soc1_defconfig +++ b/configs/socfpga_dbm_soc1_defconfig @@ -7,6 +7,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_dbm_soc1" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y CONFIG_TIMESTAMP=y CONFIG_USE_BOOTARGS=y diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig index 0eaa19b7671..036fdcc19af 100644 --- a/configs/socfpga_de0_nano_soc_defconfig +++ b/configs/socfpga_de0_nano_soc_defconfig @@ -8,6 +8,8 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y CONFIG_TIMESTAMP=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig index 4f27a6be7df..71c9eaba7a3 100644 --- a/configs/socfpga_de10_nano_defconfig +++ b/configs/socfpga_de10_nano_defconfig @@ -8,6 +8,8 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de10_nano" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_TERASIC_DE10_NANO=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y CONFIG_TIMESTAMP=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/socfpga_de10_standard_defconfig b/configs/socfpga_de10_standard_defconfig index bd75122aa06..9d496021d82 100644 --- a/configs/socfpga_de10_standard_defconfig +++ b/configs/socfpga_de10_standard_defconfig @@ -8,6 +8,8 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de10_standard" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_TERASIC_DE10_STANDARD=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y CONFIG_TIMESTAMP=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig index 829194ed846..b800f2762d8 100644 --- a/configs/socfpga_de1_soc_defconfig +++ b/configs/socfpga_de1_soc_defconfig @@ -8,6 +8,8 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de1_soc" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_TERASIC_DE1_SOC=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y CONFIG_TIMESTAMP=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig index f613ce178c8..c9a8650c91a 100644 --- a/configs/socfpga_is1_defconfig +++ b/configs/socfpga_is1_defconfig @@ -10,6 +10,8 @@ CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8 CONFIG_TARGET_SOCFPGA_IS1=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y CONFIG_TIMESTAMP=y CONFIG_USE_BOOTARGS=y diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig index 421e5037484..4f703cf3d0b 100644 --- a/configs/socfpga_mcvevk_defconfig +++ b/configs/socfpga_mcvevk_defconfig @@ -8,6 +8,8 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_mcvevk" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_ARIES_MCVEVK=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y CONFIG_TIMESTAMP=y CONFIG_USE_BOOTARGS=y diff --git a/configs/socfpga_n5x_atf_defconfig b/configs/socfpga_n5x_atf_defconfig index e1dddf9a15e..7c7f90146d6 100644 --- a/configs/socfpga_n5x_atf_defconfig +++ b/configs/socfpga_n5x_atf_defconfig @@ -13,6 +13,8 @@ CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_TARGET_SOCFPGA_N5X_SOCDK=y CONFIG_IDENT_STRING="socfpga_n5x" CONFIG_SPL_FS_FAT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/socfpga_n5x_defconfig b/configs/socfpga_n5x_defconfig index 63e2ef98757..8f851e80e29 100644 --- a/configs/socfpga_n5x_defconfig +++ b/configs/socfpga_n5x_defconfig @@ -13,6 +13,8 @@ CONFIG_TARGET_SOCFPGA_N5X_SOCDK=y CONFIG_IDENT_STRING="socfpga_n5x" CONFIG_SPL_FS_FAT=y # CONFIG_PSCI_RESET is not set +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x101000 CONFIG_REMAKE_ELF=y CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y diff --git a/configs/socfpga_n5x_vab_defconfig b/configs/socfpga_n5x_vab_defconfig index 79c7a92db62..82a4f980b89 100644 --- a/configs/socfpga_n5x_vab_defconfig +++ b/configs/socfpga_n5x_vab_defconfig @@ -14,6 +14,8 @@ CONFIG_SOCFPGA_SECURE_VAB_AUTH=y CONFIG_TARGET_SOCFPGA_N5X_SOCDK=y CONFIG_IDENT_STRING="socfpga_n5x" CONFIG_SPL_FS_FAT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig index edd55d641c8..d59e841f761 100644 --- a/configs/socfpga_secu1_defconfig +++ b/configs/socfpga_secu1_defconfig @@ -16,6 +16,8 @@ CONFIG_ENV_OFFSET_REDUND=0x120000 CONFIG_SYS_LOAD_ADDR=0x02000000 CONFIG_BUILD_TARGET="u-boot-with-nand-spl.sfp" CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y CONFIG_BOOT_RETRY=y CONFIG_BOOT_RETRY_TIME=45 diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig index 24245c41595..999e696aa7a 100644 --- a/configs/socfpga_sockit_defconfig +++ b/configs/socfpga_sockit_defconfig @@ -8,6 +8,8 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sockit" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y CONFIG_TIMESTAMP=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index cb87bf2ac55..82549a80af5 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -8,6 +8,8 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_EBV_SOCRATES=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_socrates.dtb" diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index 5eb9eb458f8..cbb751e5a20 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -13,6 +13,8 @@ CONFIG_ENV_OFFSET_REDUND=0xF0000 CONFIG_SYS_MEMTEST_START=0x00000000 CONFIG_SYS_MEMTEST_END=0x40000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y CONFIG_TIMESTAMP=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/socfpga_stratix10_atf_defconfig b/configs/socfpga_stratix10_atf_defconfig index 7a6304d1f5f..52f99dad754 100644 --- a/configs/socfpga_stratix10_atf_defconfig +++ b/configs/socfpga_stratix10_atf_defconfig @@ -14,6 +14,8 @@ CONFIG_TARGET_SOCFPGA_STRATIX10_SOCDK=y CONFIG_IDENT_STRING="socfpga_stratix10" CONFIG_SPL_FS_FAT=y CONFIG_SYS_LOAD_ADDR=0x02000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_SPL_FIT_SIGNATURE=y diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index 21e99ab9fdf..23050c7f663 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -18,6 +18,8 @@ CONFIG_SYS_MEMTEST_START=0x00000000 CONFIG_SYS_MEMTEST_END=0x3fe00000 CONFIG_OPTIMIZE_INLINING=y CONFIG_SPL_OPTIMIZE_INLINING=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x101000 CONFIG_REMAKE_ELF=y CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index 99bcbbf8a2e..37aae07fd64 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -10,6 +10,8 @@ CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_SOFTING_VINING_FPGA=y CONFIG_ENV_OFFSET_REDUND=0x110000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y CONFIG_TIMESTAMP=y CONFIG_BOOTDELAY=5 diff --git a/configs/spring_defconfig b/configs/spring_defconfig index 3a7746cd1c1..ad017564d99 100644 --- a/configs/spring_defconfig +++ b/configs/spring_defconfig @@ -23,6 +23,8 @@ CONFIG_IDENT_STRING=" for spring" CONFIG_SYS_LOAD_ADDR=0x43e00000 CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2050000 CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y diff --git a/configs/stemmy_defconfig b/configs/stemmy_defconfig index b5a96321d24..28a31298737 100644 --- a/configs/stemmy_defconfig +++ b/configs/stemmy_defconfig @@ -10,6 +10,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="ste-ux500-samsung-stemmy" CONFIG_SYS_LOAD_ADDR=0x100000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fastbootcmd" diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig index a0b1e0dd74b..198a0c7f9e5 100644 --- a/configs/stih410-b2260_defconfig +++ b/configs/stih410-b2260_defconfig @@ -10,6 +10,8 @@ CONFIG_DEFAULT_DEVICE_TREE="stih410-b2260" CONFIG_IDENT_STRING="STMicroelectronics STiH410-B2260" CONFIG_SYS_LOAD_ADDR=0x40000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7bdfff10 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_USE_BOOTARGS=y diff --git a/configs/stm32746g-eval_defconfig b/configs/stm32746g-eval_defconfig index 92bd206b32c..e799fc552e5 100644 --- a/configs/stm32746g-eval_defconfig +++ b/configs/stm32746g-eval_defconfig @@ -10,6 +10,8 @@ CONFIG_STM32F7=y CONFIG_TARGET_STM32F746_DISCO=y CONFIG_SYS_LOAD_ADDR=0x8008000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" diff --git a/configs/stm32746g-eval_spl_defconfig b/configs/stm32746g-eval_spl_defconfig index 16b8b64c04b..989bc7af301 100644 --- a/configs/stm32746g-eval_spl_defconfig +++ b/configs/stm32746g-eval_spl_defconfig @@ -18,6 +18,8 @@ CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x8008000 CONFIG_BUILD_TARGET="u-boot-with-spl.bin" CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" diff --git a/configs/stm32f429-discovery_defconfig b/configs/stm32f429-discovery_defconfig index b6f030ae11b..fde427ae692 100644 --- a/configs/stm32f429-discovery_defconfig +++ b/configs/stm32f429-discovery_defconfig @@ -12,6 +12,8 @@ CONFIG_TARGET_STM32F429_DISCOVERY=y CONFIG_SYS_LOAD_ADDR=0x90400000 CONFIG_ENV_ADDR=0x8040000 CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10010000 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" diff --git a/configs/stm32f429-evaluation_defconfig b/configs/stm32f429-evaluation_defconfig index 2de8408f364..e2c41b0844e 100644 --- a/configs/stm32f429-evaluation_defconfig +++ b/configs/stm32f429-evaluation_defconfig @@ -10,6 +10,8 @@ CONFIG_STM32F4=y CONFIG_TARGET_STM32F429_EVALUATION=y CONFIG_SYS_LOAD_ADDR=0x400000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10010000 CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y diff --git a/configs/stm32f469-discovery_defconfig b/configs/stm32f469-discovery_defconfig index 1a5425d32e6..c7dbc69fa88 100644 --- a/configs/stm32f469-discovery_defconfig +++ b/configs/stm32f469-discovery_defconfig @@ -10,6 +10,8 @@ CONFIG_STM32F4=y CONFIG_TARGET_STM32F469_DISCOVERY=y CONFIG_SYS_LOAD_ADDR=0x400000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10010000 CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig index 76023a5dab3..fe5f82c93c9 100644 --- a/configs/stm32f746-disco_defconfig +++ b/configs/stm32f746-disco_defconfig @@ -10,6 +10,8 @@ CONFIG_STM32F7=y CONFIG_TARGET_STM32F746_DISCO=y CONFIG_SYS_LOAD_ADDR=0x8008000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" diff --git a/configs/stm32f746-disco_spl_defconfig b/configs/stm32f746-disco_spl_defconfig index 87d67e4b48c..3aaf7d35121 100644 --- a/configs/stm32f746-disco_spl_defconfig +++ b/configs/stm32f746-disco_spl_defconfig @@ -18,6 +18,8 @@ CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x8008000 CONFIG_BUILD_TARGET="u-boot-with-spl.bin" CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" diff --git a/configs/stm32f769-disco_defconfig b/configs/stm32f769-disco_defconfig index 7894594b01e..e627934d025 100644 --- a/configs/stm32f769-disco_defconfig +++ b/configs/stm32f769-disco_defconfig @@ -10,6 +10,8 @@ CONFIG_STM32F7=y CONFIG_TARGET_STM32F746_DISCO=y CONFIG_SYS_LOAD_ADDR=0x8008000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" diff --git a/configs/stm32f769-disco_spl_defconfig b/configs/stm32f769-disco_spl_defconfig index 72175f719df..55ac1174af6 100644 --- a/configs/stm32f769-disco_spl_defconfig +++ b/configs/stm32f769-disco_spl_defconfig @@ -18,6 +18,8 @@ CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x8008000 CONFIG_BUILD_TARGET="u-boot-with-spl.bin" CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" diff --git a/configs/stm32h743-disco_defconfig b/configs/stm32h743-disco_defconfig index 4989f2c2a90..2b1d1b4e26c 100644 --- a/configs/stm32h743-disco_defconfig +++ b/configs/stm32h743-disco_defconfig @@ -10,6 +10,8 @@ CONFIG_STM32H7=y CONFIG_TARGET_STM32H743_DISCO=y CONFIG_SYS_LOAD_ADDR=0xd0400000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x24040000 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" diff --git a/configs/stm32h743-eval_defconfig b/configs/stm32h743-eval_defconfig index c9009bf9db0..eb848dab6d5 100644 --- a/configs/stm32h743-eval_defconfig +++ b/configs/stm32h743-eval_defconfig @@ -10,6 +10,8 @@ CONFIG_STM32H7=y CONFIG_TARGET_STM32H743_EVAL=y CONFIG_SYS_LOAD_ADDR=0xd0400000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x24040000 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" diff --git a/configs/stm32h750-art-pi_defconfig b/configs/stm32h750-art-pi_defconfig index 932c78ef225..8ba91d34360 100644 --- a/configs/stm32h750-art-pi_defconfig +++ b/configs/stm32h750-art-pi_defconfig @@ -10,6 +10,8 @@ CONFIG_STM32H7=y CONFIG_TARGET_STM32H750_ART_PI=y CONFIG_SYS_LOAD_ADDR=0xc1800000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x24040000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig index 1fdceb708f7..5c131252a5d 100644 --- a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig @@ -13,6 +13,8 @@ CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_SPL_FOOTPRINT_LIMIT=y diff --git a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig index 323d3214dfe..688c9344d17 100644 --- a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig @@ -13,6 +13,8 @@ CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_SPL_FOOTPRINT_LIMIT=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig index 0eb3a54576d..f6d67f3cc82 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig @@ -13,6 +13,8 @@ CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_SPL_FOOTPRINT_LIMIT=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig index fece692fa2e..39c2f295701 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig @@ -13,6 +13,8 @@ CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_SPL_FOOTPRINT_LIMIT=y diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index c211205fe1d..b607c7256e5 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -20,6 +20,8 @@ CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_FIT=y CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index c22db794b12..a6398c75278 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_FIT=y CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 1fae0e441cf..16dcc4ad56f 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -16,6 +16,8 @@ CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0xc1000000 diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index c79bae65bce..9a7266229be 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -14,6 +14,8 @@ CONFIG_SPL_SPI=y # CONFIG_ARMV7_VIRT is not set CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0xc1000000 diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index ca22553bda9..626398b9e86 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_FIT=y CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" diff --git a/configs/stout_defconfig b/configs/stout_defconfig index 1722cc8282a..9ef96bafc99 100644 --- a/configs/stout_defconfig +++ b/configs/stout_defconfig @@ -26,6 +26,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x50000000 CONFIG_ENV_ADDR=0xC0000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_MAX_SIZE=0x4000 diff --git a/configs/synquacer_developerbox_defconfig b/configs/synquacer_developerbox_defconfig index d897eaf9e7c..5e4accf4b12 100644 --- a/configs/synquacer_developerbox_defconfig +++ b/configs/synquacer_developerbox_defconfig @@ -11,6 +11,8 @@ CONFIG_DEFAULT_DEVICE_TREE="synquacer-sc2a11-developerbox" CONFIG_SYS_LOAD_ADDR=0x80000000 CONFIG_TARGET_DEVELOPERBOX=y CONFIG_AHCI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xe0000000 CONFIG_FIT=y CONFIG_BOOTSTAGE_STASH_SIZE=4096 CONFIG_HUSH_PARSER=y diff --git a/configs/tb100_defconfig b/configs/tb100_defconfig index d9d67262cec..575bf2dae28 100644 --- a/configs/tb100_defconfig +++ b/configs/tb100_defconfig @@ -7,6 +7,8 @@ CONFIG_ENV_SIZE=0x800 CONFIG_DEFAULT_DEVICE_TREE="abilis_tb100" CONFIG_SYS_CLK_FREQ=500000000 CONFIG_SYS_LOAD_ADDR=0x82000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index 7e9d89442ce..b830d75dba6 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -19,6 +19,8 @@ CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_SYS_MEM_TOP_HIDE=0x80000 CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y CONFIG_BOOTDELAY=3 diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig index 1e646868217..ed0ee817717 100644 --- a/configs/thuban_defconfig +++ b/configs/thuban_defconfig @@ -23,6 +23,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"\" to stop\n" diff --git a/configs/thunderx_88xx_defconfig b/configs/thunderx_88xx_defconfig index ee7818db14d..03b6201591f 100644 --- a/configs/thunderx_88xx_defconfig +++ b/configs/thunderx_88xx_defconfig @@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" for Cavium Thunder CN88XX ARM v8 Multi-Core" CONFIG_SYS_LOAD_ADDR=0x500000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x57fff0 CONFIG_REMAKE_ELF=y CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig index 8134ccec9a1..243492a9529 100644 --- a/configs/ti816x_evm_defconfig +++ b/configs/ti816x_evm_defconfig @@ -20,6 +20,8 @@ CONFIG_SYS_CLK_FREQ=27000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4031ff00 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyO2,115200n8 noinitrd earlyprintk" diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig index 969dd1fcbe1..32afbebc545 100644 --- a/configs/tinker-rk3288_defconfig +++ b/configs/tinker-rk3288_defconfig @@ -16,6 +16,8 @@ CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-tinker.dtb" diff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig index 0cf5a358e9e..072012e066b 100644 --- a/configs/tinker-s-rk3288_defconfig +++ b/configs/tinker-s-rk3288_defconfig @@ -16,6 +16,8 @@ CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-tinker-s.dtb" diff --git a/configs/total_compute_defconfig b/configs/total_compute_defconfig index e0f76b711b3..2cb17f5040b 100644 --- a/configs/total_compute_defconfig +++ b/configs/total_compute_defconfig @@ -9,6 +9,8 @@ CONFIG_SYS_LOAD_ADDR=0x90000000 CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0xff000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007fff0 CONFIG_REMAKE_ELF=y CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y diff --git a/configs/tplink_wdr4300_defconfig b/configs/tplink_wdr4300_defconfig index 6a0686b32cc..40dc2c158ef 100644 --- a/configs/tplink_wdr4300_defconfig +++ b/configs/tplink_wdr4300_defconfig @@ -8,6 +8,8 @@ CONFIG_ARCH_ATH79=y CONFIG_BOARD_TPLINK_WDR4300=y CONFIG_SYS_MEMTEST_START=0x80100000 CONFIG_SYS_MEMTEST_END=0x83f00000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xbd007fff CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs" diff --git a/configs/trats2_defconfig b/configs/trats2_defconfig index a000d807801..00a663fcf2a 100644 --- a/configs/trats2_defconfig +++ b/configs/trats2_defconfig @@ -14,6 +14,8 @@ CONFIG_DEFAULT_DEVICE_TREE="exynos4412-trats2" CONFIG_SYS_MEM_TOP_HIDE=0x100000 CONFIG_SYS_LOAD_ADDR=0x43e00000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x43dfff10 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/trats_defconfig b/configs/trats_defconfig index 267ca86c813..d5f08666068 100644 --- a/configs/trats_defconfig +++ b/configs/trats_defconfig @@ -14,6 +14,8 @@ CONFIG_DEFAULT_DEVICE_TREE="exynos4210-trats" CONFIG_SYS_MEM_TOP_HIDE=0x100000 CONFIG_SYS_LOAD_ADDR=0x44800000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x447fff10 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_USE_BOOTARGS=y diff --git a/configs/turris_mox_defconfig b/configs/turris_mox_defconfig index 018ec508e80..1df47fe3c9c 100644 --- a/configs/turris_mox_defconfig +++ b/configs/turris_mox_defconfig @@ -16,6 +16,8 @@ CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_OF_BOARD_FIXUP=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index 36db6e4e924..a5087581a4e 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -27,6 +27,8 @@ CONFIG_OF_BOARD_FIXUP=y CONFIG_SYS_MEMTEST_START=0x00800000 CONFIG_SYS_MEMTEST_END=0x00ffffff CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/u200_defconfig b/configs/u200_defconfig index a0bcf5d5bbc..0260a3823fa 100644 --- a/configs/u200_defconfig +++ b/configs/u200_defconfig @@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" u200" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/uDPU_defconfig b/configs/uDPU_defconfig index 8097141ae8c..613a81b9b77 100644 --- a/configs/uDPU_defconfig +++ b/configs/uDPU_defconfig @@ -14,6 +14,8 @@ CONFIG_SYS_LOAD_ADDR=0x6000000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig index b07f055f5d5..10f00b53aae 100644 --- a/configs/uniphier_ld4_sld8_defconfig +++ b/configs/uniphier_ld4_sld8_defconfig @@ -10,6 +10,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_MICRO_SUPPORT_CARD=y CONFIG_SYS_LOAD_ADDR=0x85000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x84000000 CONFIG_TIMESTAMP=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_BOOTCOMMAND="run ${bootdev}script; run ${bootdev}boot" diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig index 319e483bfd7..4a79b6563e8 100644 --- a/configs/uniphier_v7_defconfig +++ b/configs/uniphier_v7_defconfig @@ -10,6 +10,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_MICRO_SUPPORT_CARD=y CONFIG_SYS_LOAD_ADDR=0x85000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x84000000 CONFIG_TIMESTAMP=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_BOOTCOMMAND="run ${bootdev}script; run ${bootdev}boot" diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig index fdfcf3b4960..ba8883dced5 100644 --- a/configs/vexpress_aemv8a_juno_defconfig +++ b/configs/vexpress_aemv8a_juno_defconfig @@ -7,6 +7,8 @@ CONFIG_IDENT_STRING=" vexpress_aemv8a" CONFIG_TARGET_VEXPRESS64_JUNO=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0xff000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007fff0 CONFIG_REMAKE_ELF=y CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y diff --git a/configs/vexpress_ca9x4_defconfig b/configs/vexpress_ca9x4_defconfig index 258337e1297..f2084890ede 100644 --- a/configs/vexpress_ca9x4_defconfig +++ b/configs/vexpress_ca9x4_defconfig @@ -11,6 +11,8 @@ CONFIG_DEFAULT_DEVICE_TREE="vexpress-v2p-ca9" CONFIG_SYS_LOAD_ADDR=0x90000000 CONFIG_ENV_ADDR=0x47F80000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60000f10 CONFIG_SYS_MONITOR_BASE=0x40000000 CONFIG_BOOTCOMMAND="run distro_bootcmd; run bootflash" CONFIG_DEFAULT_FDT_FILE="vexpress-v2p-ca9.dtb" diff --git a/configs/vinco_defconfig b/configs/vinco_defconfig index 280a2ba294b..390712a8df6 100644 --- a/configs/vinco_defconfig +++ b/configs/vinco_defconfig @@ -12,6 +12,8 @@ CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="at91-vinco" CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000f00 CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig index a4d4d78f543..99c8379ac89 100644 --- a/configs/vyasa-rk3288_defconfig +++ b/configs/vyasa-rk3288_defconfig @@ -16,6 +16,8 @@ CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-vyasa.dtb" CONFIG_SILENT_CONSOLE=y diff --git a/configs/wetek-core2_defconfig b/configs/wetek-core2_defconfig index 60dad176ba7..c8fe005e604 100644 --- a/configs/wetek-core2_defconfig +++ b/configs/wetek-core2_defconfig @@ -11,6 +11,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" wetek-core2" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig index daed5e5ba49..2261853d016 100644 --- a/configs/work_92105_defconfig +++ b/configs/work_92105_defconfig @@ -20,6 +20,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x120000 CONFIG_SYS_LOAD_ADDR=0x80008000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007ff20 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS2,115200n8" diff --git a/configs/x530_defconfig b/configs/x530_defconfig index 61f61e4a165..fa385fcb24d 100644 --- a/configs/x530_defconfig +++ b/configs/x530_defconfig @@ -19,6 +19,8 @@ CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_ENV_ADDR=0x100000 CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SILENT_CONSOLE=y diff --git a/configs/xilinx_versal_mini_defconfig b/configs/xilinx_versal_mini_defconfig index b8772c70927..e555c0ccfac 100644 --- a/configs/xilinx_versal_mini_defconfig +++ b/configs/xilinx_versal_mini_defconfig @@ -14,6 +14,8 @@ CONFIG_SYS_MEM_RSVD_FOR_MMU=y CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_SYS_MEMTEST_START=0x00000000 CONFIG_SYS_MEMTEST_END=0x00001000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe0000 # CONFIG_EXPERT is not set CONFIG_REMAKE_ELF=y # CONFIG_LEGACY_IMAGE_FORMAT is not set diff --git a/configs/xilinx_versal_mini_emmc0_defconfig b/configs/xilinx_versal_mini_emmc0_defconfig index e55881185cf..60d2263c584 100644 --- a/configs/xilinx_versal_mini_emmc0_defconfig +++ b/configs/xilinx_versal_mini_emmc0_defconfig @@ -11,6 +11,8 @@ CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="versal-mini-emmc0" # CONFIG_PSCI_RESET is not set CONFIG_SYS_LOAD_ADDR=0x8000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000 # CONFIG_EXPERT is not set CONFIG_REMAKE_ELF=y # CONFIG_AUTOBOOT is not set diff --git a/configs/xilinx_versal_mini_emmc1_defconfig b/configs/xilinx_versal_mini_emmc1_defconfig index 67390b841b1..6bbaf3ce339 100644 --- a/configs/xilinx_versal_mini_emmc1_defconfig +++ b/configs/xilinx_versal_mini_emmc1_defconfig @@ -11,6 +11,8 @@ CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="versal-mini-emmc1" # CONFIG_PSCI_RESET is not set CONFIG_SYS_LOAD_ADDR=0x8000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000 # CONFIG_EXPERT is not set CONFIG_REMAKE_ELF=y # CONFIG_AUTOBOOT is not set diff --git a/configs/xilinx_zynqmp_mini_defconfig b/configs/xilinx_zynqmp_mini_defconfig index cb714d78622..1f14b0d6e97 100644 --- a/configs/xilinx_zynqmp_mini_defconfig +++ b/configs/xilinx_zynqmp_mini_defconfig @@ -12,6 +12,8 @@ CONFIG_ZYNQMP_PSU_INIT_ENABLED=y CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_SYS_MEMTEST_START=0x00000000 CONFIG_SYS_MEMTEST_END=0x00001000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe0000 CONFIG_REMAKE_ELF=y # CONFIG_LEGACY_IMAGE_FORMAT is not set # CONFIG_AUTOBOOT is not set diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index 1cc3b21de1a..058e1643dac 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -13,6 +13,8 @@ CONFIG_SPL=y CONFIG_ZYNQMP_PSU_INIT_ENABLED=y # CONFIG_CMD_ZYNQMP is not set CONFIG_SYS_LOAD_ADDR=0x8000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000 CONFIG_REMAKE_ELF=y # CONFIG_MP is not set CONFIG_FIT=y diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index ac3989c9274..827dbad359b 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -13,6 +13,8 @@ CONFIG_SPL=y CONFIG_ZYNQMP_PSU_INIT_ENABLED=y # CONFIG_CMD_ZYNQMP is not set CONFIG_SYS_LOAD_ADDR=0x8000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000 CONFIG_REMAKE_ELF=y # CONFIG_MP is not set CONFIG_FIT=y diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig index fbace07a9b5..dd426d505e5 100644 --- a/configs/xilinx_zynqmp_mini_nand_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_defconfig @@ -10,6 +10,8 @@ CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-nand" CONFIG_ZYNQMP_PSU_INIT_ENABLED=y # CONFIG_CMD_ZYNQMP is not set CONFIG_SYS_LOAD_ADDR=0x8000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40000 CONFIG_REMAKE_ELF=y # CONFIG_MP is not set CONFIG_FIT=y diff --git a/configs/xilinx_zynqmp_mini_nand_single_defconfig b/configs/xilinx_zynqmp_mini_nand_single_defconfig index dccd5fc4788..1fbd94a969b 100644 --- a/configs/xilinx_zynqmp_mini_nand_single_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_single_defconfig @@ -10,6 +10,8 @@ CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-nand" CONFIG_ZYNQMP_PSU_INIT_ENABLED=y # CONFIG_CMD_ZYNQMP is not set CONFIG_SYS_LOAD_ADDR=0x8000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40000 CONFIG_REMAKE_ELF=y # CONFIG_MP is not set CONFIG_FIT=y diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index d8c76a02213..336ca289bd3 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -14,6 +14,8 @@ CONFIG_ZYNQMP_PSU_INIT_ENABLED=y # CONFIG_CMD_ZYNQMP is not set # CONFIG_PSCI_RESET is not set CONFIG_SYS_LOAD_ADDR=0x8000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe0000 # CONFIG_EXPERT is not set CONFIG_REMAKE_ELF=y # CONFIG_LEGACY_IMAGE_FORMAT is not set diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index 04b39cb3d39..fec73ba3426 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -65,7 +65,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in internal SRAM */ #define CONFIG_SYS_INIT_RAM_CTRL 0x221 -#define CONFIG_SYS_INIT_SP_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 0x10) /* * Start addresses for the final memory configuration diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index c69de822e75..ea89b03c66e 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -75,7 +75,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */ #define CONFIG_SYS_INIT_RAM_CTRL 0x21 -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE - 0x10) /*----------------------------------------------------------------------- * Start addresses for the final memory configuration diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index 97b2ce19437..1889a235a2a 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -44,7 +44,6 @@ */ #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */ -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define LDS_BOARD_TEXT \ . = DEFINED(env_offset) ? env_offset : .; \ diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index 939e0ba18f1..4c1348c79dc 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -79,7 +79,6 @@ */ #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */ -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /* * Start addresses for the final memory configuration diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index 4c13f4dd43f..4a2b37653e0 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -76,7 +76,6 @@ */ #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */ -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /*----------------------------------------------------------------------- * Start addresses for the final memory configuration diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 0520869050d..5e6d0856246 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -78,7 +78,6 @@ */ #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */ -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /*----------------------------------------------------------------------- * Start addresses for the final memory configuration diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index d4a429cd6b0..bb6fbac6876 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -77,7 +77,6 @@ */ #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */ -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /*----------------------------------------------------------------------- * Start addresses for the final memory configuration diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index 32799c67829..b38260ed09a 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -79,7 +79,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x20000 /* Size of used area in internal SRAM */ #define CONFIG_SYS_INIT_RAM_CTRL 0x221 -#define CONFIG_SYS_INIT_SP_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 0x10) /* * Start addresses for the final memory configuration diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index 461d7195623..c65f26cc091 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -75,7 +75,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* Size of used area in internal SRAM */ #define CONFIG_SYS_INIT_RAM_CTRL 0x221 -#define CONFIG_SYS_INIT_SP_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 0x10) /*----------------------------------------------------------------------- * Start addresses for the final memory configuration diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index ab13e21b167..7e45d358797 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -77,7 +77,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* Size of used area in internal SRAM */ #define CONFIG_SYS_INIT_RAM_CTRL 0x221 -#define CONFIG_SYS_INIT_SP_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 0x10) /*----------------------------------------------------------------------- * Start addresses for the final memory configuration diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 516cd522343..d356ff95944 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -141,8 +141,6 @@ #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM */ -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* * FLASH on the Local Bus diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index cadcb4e0ba4..d8ffa2e28a9 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -245,7 +245,6 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in RAM */ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index d841366c0f2..9024df1adcf 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -381,7 +381,6 @@ extern unsigned long get_sdram_size(void); #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* End of used area in RAM */ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_MONITOR_LEN (768 * 1024) diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index bdc6607d5d1..9cce6cf68da 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -197,7 +197,6 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_MONITOR_LEN (768 * 1024) diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 3d21821fef0..5b0cea735df 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -330,7 +330,6 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_MONITOR_LEN (768 * 1024) diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index f1bf26b7401..29b4cc40995 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -308,7 +308,6 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_MONITOR_LEN (768 * 1024) diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index ca9ae9b3a36..22cee32f6d7 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -303,7 +303,6 @@ CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_MONITOR_LEN (768 * 1024) /* diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index ca5bf888bf1..fafd83440ef 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -262,7 +262,6 @@ CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_MONITOR_LEN (768 * 1024) /* diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 549252cac80..4b5c6bcf7eb 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -104,7 +104,6 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_MONITOR_LEN (768 * 1024) diff --git a/include/configs/alt.h b/include/configs/alt.h index eb71c6d1de5..081e2a93b8e 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -11,10 +11,9 @@ #include "rcar-gen2-common.h" -#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000 #define STACK_AREA_SIZE 0x00100000 #define LOW_LEVEL_MERAM_STACK \ - (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) + (SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) /* MEMORY */ #define RCAR_GEN2_SDRAM_BASE 0x40000000 diff --git a/include/configs/am64x_evm.h b/include/configs/am64x_evm.h index f1bef40a7ca..d7ec31708a3 100644 --- a/include/configs/am64x_evm.h +++ b/include/configs/am64x_evm.h @@ -19,7 +19,6 @@ #define CONFIG_SYS_SDRAM_BASE1 0x880000000 #if defined(CONFIG_TARGET_AM642_A53_EVM) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + SZ_4M) #else /* * Link BSS to be within SPL in a dedicated region located near the top of @@ -31,7 +30,6 @@ #define CONFIG_SPL_BSS_START_ADDR (TI_SRAM_SCRATCH_BOARD_EEPROM_START -\ CONFIG_SPL_BSS_MAX_SIZE) /* Set the stack right below the SPL BSS section */ -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_BSS_START_ADDR /* Configure R5 SPL post-relocation malloc pool in DDR */ #define CONFIG_SYS_SPL_MALLOC_START 0x84000000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h index b6281677810..7849976d6f2 100644 --- a/include/configs/am65x_evm.h +++ b/include/configs/am65x_evm.h @@ -19,7 +19,6 @@ /* SPL Loader Configuration */ #ifdef CONFIG_TARGET_AM654_A53_EVM -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + SZ_4M) #else /* * Link BSS to be within SPL in a dedicated region located near the top of @@ -31,7 +30,6 @@ #define CONFIG_SPL_BSS_START_ADDR (CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX -\ CONFIG_SPL_BSS_MAX_SIZE) /* Set the stack right below the SPL BSS section */ -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_BSS_START_ADDR /* Configure R5 SPL post-relocation malloc pool in DDR */ #define CONFIG_SYS_SPL_MALLOC_START 0x84000000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M diff --git a/include/configs/amcore.h b/include/configs/amcore.h index e416361eb14..3c9267b14ec 100644 --- a/include/configs/amcore.h +++ b/include/configs/amcore.h @@ -32,8 +32,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 /* size of internal SRAM */ #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_SIZE 0x1000000 diff --git a/include/configs/ap121.h b/include/configs/ap121.h index 711406a5505..099aac54219 100644 --- a/include/configs/ap121.h +++ b/include/configs/ap121.h @@ -13,8 +13,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE - 1) /* Miscellaneous configurable options */ diff --git a/include/configs/ap143.h b/include/configs/ap143.h index f89c41a7442..60b9e779fa9 100644 --- a/include/configs/ap143.h +++ b/include/configs/ap143.h @@ -13,8 +13,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x2000 -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE - 1) /* * Serial Port diff --git a/include/configs/ap152.h b/include/configs/ap152.h index 9a0d7d2c6d6..d165ead7bb4 100644 --- a/include/configs/ap152.h +++ b/include/configs/ap152.h @@ -13,8 +13,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x2000 -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE - 1) /* * Serial Port diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index 3a0d19613be..4a3e51d19ef 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -60,8 +60,6 @@ /* Link Definitions */ -#define CONFIG_SYS_INIT_SP_ADDR 0x80200000 - /* On Apalis iMX8 USDHC1 is eMMC, USDHC2 is 8-bit and USDHC3 is 4-bit MMC/SD */ #define CONFIG_SYS_FSL_USDHC_NUM 3 diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 74020e20912..28644051471 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -127,9 +127,4 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - #endif /* __CONFIG_H */ diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index 8ee97f1d4e3..026775de7c5 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -417,11 +417,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - #define CONFIG_SYS_FSL_USDHC_NUM 2 /* DMA stuff, needed for GPMI/MXS NAND support */ diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h index e7d685a657e..1c7494183a4 100644 --- a/include/configs/armadillo-800eva.h +++ b/include/configs/armadillo-800eva.h @@ -20,10 +20,9 @@ #define CONFIG_SYS_TIMER_RATE (get_board_sys_clk() / 4) /* STACK */ -#define CONFIG_SYS_INIT_SP_ADDR 0xE8083000 #define STACK_AREA_SIZE 0xC000 #define LOW_LEVEL_MERAM_STACK \ - (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) + (SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) /* MEMORY */ #define ARMADILLO_800EVA_SDRAM_BASE 0x40000000 diff --git a/include/configs/arndale.h b/include/configs/arndale.h index 5109f7de534..5ebba0cda20 100644 --- a/include/configs/arndale.h +++ b/include/configs/arndale.h @@ -18,9 +18,6 @@ #define CONFIG_EXYNOS_SPL /* Miscellaneous configurable options */ -#define CONFIG_IRAM_STACK 0x02050000 - -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_IRAM_STACK #define CONFIG_S5P_PA_SYSRAM 0x02020000 #define CONFIG_SMP_PEN_ADDR CONFIG_S5P_PA_SYSRAM diff --git a/include/configs/aspeed-common.h b/include/configs/aspeed-common.h index 0954bc02aa2..5c9005805e1 100644 --- a/include/configs/aspeed-common.h +++ b/include/configs/aspeed-common.h @@ -24,11 +24,6 @@ #define CONFIG_SYS_INIT_RAM_SIZE (ASPEED_SRAM_SIZE) #endif -#define SYS_INIT_RAM_END (CONFIG_SYS_INIT_RAM_ADDR \ - + CONFIG_SYS_INIT_RAM_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (SYS_INIT_RAM_END \ - - GENERATED_GBL_DATA_SIZE) - /* * NS16550 Configuration */ diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index fbe1e42c077..9bf6968e8ad 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -162,8 +162,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 #define CONFIG_SYS_INIT_RAM_CTRL 0x221 -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) /* * Start addresses for the final memory configuration diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index f5cc0b2b912..2c4f229d347 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -34,17 +34,11 @@ #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 -/* - * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, - * leaving the correct space for initial global data structure above - * that address while providing maximum stack area below. - */ +#define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024) #ifdef CONFIG_AT91SAM9XE -# define CONFIG_SYS_INIT_SP_ADDR \ - (ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE) +# define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM #else -# define CONFIG_SYS_INIT_SP_ADDR \ - (ATMEL_BASE_SRAM1 + 16 * 1024 - GENERATED_GBL_DATA_SIZE) +# define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1 #endif /* NAND flash */ diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 2089fe52e45..563fff531d1 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -26,8 +26,8 @@ /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 -#define CONFIG_SYS_INIT_SP_ADDR \ - (ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024) +#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index b63cd4bb839..c100a411b2d 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -33,8 +33,8 @@ #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 -#define CONFIG_SYS_INIT_SP_ADDR \ - (ATMEL_BASE_SRAM1 + 16 * 1024 - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024) +#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1 /* NOR flash, if populated */ #ifdef CONFIG_SYS_USE_NORFLASH diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 56313e35218..9e43c0e7aa6 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -23,9 +23,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x70000000 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) - /* NAND flash */ #ifdef CONFIG_CMD_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index aaf5e7dbef1..141540bd889 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -22,14 +22,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 -/* - * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, - * leaving the correct space for initial global data structure above - * that address while providing maximum stack area below. - */ -# define CONFIG_SYS_INIT_SP_ADDR \ - (0x00300000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE) - /* DataFlash */ /* NAND flash */ diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index e0aeae88d14..e3350282bcf 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -29,8 +29,8 @@ #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 -#define CONFIG_SYS_INIT_SP_ADDR \ - (ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024) +#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index 2eb7787c202..12a349f867c 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -23,9 +23,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) - /* DataFlash */ /* NAND flash */ diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index 391aa006299..7ca83a82fce 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -47,8 +47,6 @@ #define CONFIG_SYS_NS16550_CLK 19660800 /* Init Stack Pointer */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000000 - \ - GENERATED_GBL_DATA_SIZE) /* support JEDEC */ #define PHYS_FLASH_1 0x88000000 /* BANK 0 */ diff --git a/include/configs/axs10x.h b/include/configs/axs10x.h index cb400be77a6..7e25846e401 100644 --- a/include/configs/axs10x.h +++ b/include/configs/axs10x.h @@ -23,9 +23,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_512M -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) - #define CONFIG_SYS_BOOTM_LEN SZ_128M /* diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h index 87c9f5e2dde..97e1a88f270 100644 --- a/include/configs/bcm_ns3.h +++ b/include/configs/bcm_ns3.h @@ -23,7 +23,6 @@ * Just before re-loaction, new SP is updated and re-location happens. * So pointing the initial SP to end of 2GB DDR is not a problem */ -#define CONFIG_SYS_INIT_SP_ADDR (PHYS_SDRAM_1 + 0x80000000) /* 12MB Malloc size */ /* console configuration */ diff --git a/include/configs/bcmstb.h b/include/configs/bcmstb.h index 5f8c5dee3c9..ed78b732121 100644 --- a/include/configs/bcmstb.h +++ b/include/configs/bcmstb.h @@ -83,9 +83,6 @@ extern phys_addr_t prior_stage_fdt_address; */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x100000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) /* * CONFIG_SYS_LOAD_ADDR - 1 MiB. diff --git a/include/configs/bk4r1.h b/include/configs/bk4r1.h index bd07b4b031b..2069d51d2fd 100644 --- a/include/configs/bk4r1.h +++ b/include/configs/bk4r1.h @@ -213,9 +213,4 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - #endif /* __CONFIG_H */ diff --git a/include/configs/blanche.h b/include/configs/blanche.h index d0f37b6cc20..25b6e7005e7 100644 --- a/include/configs/blanche.h +++ b/include/configs/blanche.h @@ -12,10 +12,9 @@ #include "rcar-gen2-common.h" /* STACK */ -#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000 #define STACK_AREA_SIZE 0x00100000 #define LOW_LEVEL_MERAM_STACK \ - (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) + (SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) /* MEMORY */ #define RCAR_GEN2_SDRAM_BASE 0x40000000 diff --git a/include/configs/broadcom_bcm963158.h b/include/configs/broadcom_bcm963158.h index 4e79ae5e7e2..493114836c8 100644 --- a/include/configs/broadcom_bcm963158.h +++ b/include/configs/broadcom_bcm963158.h @@ -23,7 +23,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* U-Boot */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_16M) #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/broadcom_bcm96753ref.h b/include/configs/broadcom_bcm96753ref.h index 0b9e3745565..33c70c73c1f 100644 --- a/include/configs/broadcom_bcm96753ref.h +++ b/include/configs/broadcom_bcm96753ref.h @@ -22,7 +22,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* U-Boot */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_16M) #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/broadcom_bcm968360bg.h b/include/configs/broadcom_bcm968360bg.h index bc96751090a..8a802357123 100644 --- a/include/configs/broadcom_bcm968360bg.h +++ b/include/configs/broadcom_bcm968360bg.h @@ -22,7 +22,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* U-Boot */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_16M) #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/broadcom_bcm968580xref.h b/include/configs/broadcom_bcm968580xref.h index 7388a2550a1..abc2da3d1fe 100644 --- a/include/configs/broadcom_bcm968580xref.h +++ b/include/configs/broadcom_bcm968580xref.h @@ -22,7 +22,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* U-Boot */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_16M) #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/brppt2.h b/include/configs/brppt2.h index 92f69ba9b0f..7b110f05ca4 100644 --- a/include/configs/brppt2.h +++ b/include/configs/brppt2.h @@ -81,10 +81,6 @@ BUR_COMMON_ENV \ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* Ethernet */ #define CONFIG_FEC_FIXED_SPEED _1000BASET diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h index 586275feee7..6591de49c4d 100644 --- a/include/configs/bur_am335x_common.h +++ b/include/configs/bur_am335x_common.h @@ -48,8 +48,6 @@ * and we place the initial stack pointer in our SRAM. */ #define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ - GENERATED_GBL_DATA_SIZE) /* * Our platforms make use of SPL to initalize the hardware (primarily diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index 959d94acc47..454dac4ad6b 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -104,7 +104,6 @@ ENV_NET /* Default location for tftp and bootm */ -#define CONFIG_SYS_INIT_SP_ADDR 0x80200000 /* On CCP board, USDHC1 is for eMMC */ diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h index e4cac0062da..2553d9aad63 100644 --- a/include/configs/cgtqmx8.h +++ b/include/configs/cgtqmx8.h @@ -118,8 +118,6 @@ /* Link Definitions */ -#define CONFIG_SYS_INIT_SP_ADDR 0x80200000 - #define CONFIG_SYS_FSL_USDHC_NUM 3 #define CONFIG_SYS_SDRAM_BASE 0x80000000 diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index 4b494d8aeef..b19b3ef541c 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -90,11 +90,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* SPI Flash support */ /* FLASH and environment organization */ diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 600999b8e72..cb4cd925d9f 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -24,10 +24,6 @@ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* Serial console */ #define CONFIG_MXC_UART_BASE UART4_BASE diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index 8f8e53fe13a..c926e6ac8ca 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -165,7 +165,6 @@ enter a valid image address in flash */ */ #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */ -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /*----------------------------------------------------------------------- * Start addresses for the final memory configuration diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index 9e5212acb2e..0459cb0286e 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -122,11 +122,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* environment organization */ #if defined(CONFIG_ENV_IS_IN_NAND) #define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SIZE) diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h index 852e8165874..fb7de896b75 100644 --- a/include/configs/colibri-imx8x.h +++ b/include/configs/colibri-imx8x.h @@ -91,8 +91,6 @@ /* Link Definitions */ -#define CONFIG_SYS_INIT_SP_ADDR 0x80200000 - /* Environment in eMMC, before config block at the end of 1st "boot sector" */ /* On Colibri iMX8X USDHC1 is eMMC, USDHC2 is 4-bit SD */ diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index b87365a584c..d7d5c2ddee1 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -114,9 +114,4 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - #endif /* __CONFIG_H */ diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index 3dba7bcef25..180142a6487 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -166,11 +166,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* environment organization */ #if defined(CONFIG_ENV_IS_IN_NAND) #define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SIZE) diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 7c313f94fe9..32e2aabc67c 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -91,11 +91,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* Environment organization */ #ifdef CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_RANGE (4 * 64 * 2048) diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 5153be3ec90..9291b81ac2a 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -195,7 +195,6 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* Size of used area in RAM */ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_MONITOR_LEN (768 * 1024) diff --git a/include/configs/corvus.h b/include/configs/corvus.h index b16c3717d92..99c8cd31110 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -35,9 +35,6 @@ #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + SZ_32K - GENERATED_GBL_DATA_SIZE) - /* NAND flash */ #ifdef CONFIG_CMD_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 76440fa51c5..fd58b1a194e 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -191,13 +191,6 @@ /* additions for new relocation code, must added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0xc0000000 -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_SYS_INIT_SP_ADDR 0x8001ff00 -#else -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \ - GENERATED_GBL_DATA_SIZE) -#endif /* CONFIG_MTD_NOR_FLASH */ - #include #endif /* __CONFIG_H */ diff --git a/include/configs/dart_6ul.h b/include/configs/dart_6ul.h index ad28fa01202..d502e98deae 100644 --- a/include/configs/dart_6ul.h +++ b/include/configs/dart_6ul.h @@ -49,11 +49,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* USB Configs */ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index c944910584f..53c67c706c3 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -18,9 +18,6 @@ #define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_64M -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_4K \ - - GENERATED_GBL_DATA_SIZE) - /* * DMA */ diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index 178f5a6e7d6..d177b457aa4 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -91,12 +91,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* Environment */ #endif /* __DH_IMX6_CONFIG_H */ diff --git a/include/configs/display5.h b/include/configs/display5.h index 93dcec5612b..d7fbfbd702e 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -294,11 +294,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* ENV config */ #ifdef CONFIG_ENV_IS_IN_SPI_FLASH /* The 0x120000 value corresponds to above SPI-NOR memory MAP */ diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h index e3fffbebaca..ed46f26628f 100644 --- a/include/configs/dragonboard410c.h +++ b/include/configs/dragonboard410c.h @@ -18,7 +18,6 @@ /* Note: 8 MiB (0x86000000 - 0x86800000) are reserved for tz/smem/hyp/rmtfs/rfsa */ #define PHYS_SDRAM_1_SIZE SZ_1G #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) #define CONFIG_SYS_BOOTM_LEN SZ_64M /* UART */ diff --git a/include/configs/dragonboard820c.h b/include/configs/dragonboard820c.h index 372369977a7..e3940dc3217 100644 --- a/include/configs/dragonboard820c.h +++ b/include/configs/dragonboard820c.h @@ -20,7 +20,6 @@ #define PHYS_SDRAM_2_SIZE 0x5ea4ffff #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) #define CONFIG_SYS_BOOTM_LEN SZ_64M #ifndef CONFIG_SPL_BUILD diff --git a/include/configs/durian.h b/include/configs/durian.h index f0789d5fb3a..c224511832f 100644 --- a/include/configs/durian.h +++ b/include/configs/durian.h @@ -13,8 +13,6 @@ #define PHYS_SDRAM_1_SIZE 0x7B000000 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_SP_ADDR (0x88000000 - 0x100000) - /* PCI CONFIG */ #define CONFIG_PCI_SCAN_SHOW diff --git a/include/configs/ea-lpc3250devkitv2.h b/include/configs/ea-lpc3250devkitv2.h index 2d0e7878799..1d655292d7e 100644 --- a/include/configs/ea-lpc3250devkitv2.h +++ b/include/configs/ea-lpc3250devkitv2.h @@ -18,7 +18,6 @@ /* * cmd */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_4K - GENERATED_GBL_DATA_SIZE) /* * SoC-specific config diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 84f1cafd92a..61571575081 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -65,8 +65,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /*----------------------------------------------------------------------- * Start addresses for the final memory configuration diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index a09d39ee23d..c0923883acf 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -137,7 +137,5 @@ /* additions for new relocation code, must be added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0 -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) #endif /* _CONFIG_EDMINIV2_H */ diff --git a/include/configs/el6x_common.h b/include/configs/el6x_common.h index bcd7b84cf38..7fc3459ef29 100644 --- a/include/configs/el6x_common.h +++ b/include/configs/el6x_common.h @@ -58,11 +58,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* environment organization */ #endif /* __EL6Q_COMMON_CONFIG_H */ diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index 119d59951f2..21b436bdb4c 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -32,11 +32,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* Environment organization */ #if defined(CONFIG_ENV_IS_IN_MMC) diff --git a/include/configs/emsdp.h b/include/configs/emsdp.h index a560673512e..60fab0419f5 100644 --- a/include/configs/emsdp.h +++ b/include/configs/emsdp.h @@ -11,8 +11,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x10000000 #define CONFIG_SYS_SDRAM_SIZE SZ_16M -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_1M) - /* * Environment */ diff --git a/include/configs/espresso7420.h b/include/configs/espresso7420.h index d936b7f09fc..9632319e126 100644 --- a/include/configs/espresso7420.h +++ b/include/configs/espresso7420.h @@ -14,7 +14,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define CONFIG_SPL_STACK CONFIG_IRAM_END -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_IRAM_END /* DRAM Memory Banks */ #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index 3231f3cc035..8e7bfadf64e 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -22,10 +22,8 @@ #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ /* 32kB internal SRAM */ -#define CONFIG_SRAM_BASE 0x00300000 /*AT91SAM9XE_SRAM_BASE */ -#define CONFIG_SRAM_SIZE (32 << 10) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SRAM_BASE + CONFIG_SRAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_ADDR 0x00300000 /*AT91SAM9XE_SRAM_BASE */ +#define CONFIG_SYS_INIT_RAM_SIZE (32 << 10) /* 128MB SDRAM in 1 bank */ #define CONFIG_SYS_SDRAM_BASE 0x20000000 diff --git a/include/configs/exynos5250-common.h b/include/configs/exynos5250-common.h index fc5b2eb07d8..82cb8aff7b5 100644 --- a/include/configs/exynos5250-common.h +++ b/include/configs/exynos5250-common.h @@ -13,10 +13,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define CONFIG_IRAM_STACK 0x02050000 - -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_IRAM_STACK - /* USB */ #define CONFIG_USB_EHCI_EXYNOS diff --git a/include/configs/exynos78x0-common.h b/include/configs/exynos78x0-common.h index 3c2a293e534..4a2e56b6358 100644 --- a/include/configs/exynos78x0-common.h +++ b/include/configs/exynos78x0-common.h @@ -26,7 +26,6 @@ {9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600} #define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_BOOTM_LEN SZ_32M /* DRAM Memory Banks */ #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ diff --git a/include/configs/gardena-smart-gateway-at91sam.h b/include/configs/gardena-smart-gateway-at91sam.h index 89dbbb039be..940b61b6dd1 100644 --- a/include/configs/gardena-smart-gateway-at91sam.h +++ b/include/configs/gardena-smart-gateway-at91sam.h @@ -21,9 +21,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) - /* NAND flash */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 diff --git a/include/configs/gazerbeam.h b/include/configs/gazerbeam.h index a46403cd374..25095e192f0 100644 --- a/include/configs/gazerbeam.h +++ b/include/configs/gazerbeam.h @@ -33,8 +33,6 @@ #define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM */ -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* * FLASH on the Local Bus diff --git a/include/configs/ge_b1x5v2.h b/include/configs/ge_b1x5v2.h index b4f94992e64..5a5a5d687a8 100644 --- a/include/configs/ge_b1x5v2.h +++ b/include/configs/ge_b1x5v2.h @@ -47,11 +47,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* Command definition */ #define CONFIG_EXTRA_ENV_SETTINGS \ "image=/boot/fitImage\0" \ diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index c80a07655ec..74a2eaa7896 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -105,11 +105,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* environment organization */ #define CONFIG_SYS_FSL_USDHC_NUM 3 diff --git a/include/configs/gose.h b/include/configs/gose.h index 70c4e91eee1..a0af98dd980 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -10,10 +10,9 @@ #include "rcar-gen2-common.h" -#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000 #define STACK_AREA_SIZE 0x00100000 #define LOW_LEVEL_MERAM_STACK \ - (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) + (SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) /* MEMORY */ #define RCAR_GEN2_SDRAM_BASE 0x40000000 diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index 6c0c87490f9..fb69716bcbf 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -15,8 +15,6 @@ /* Internal RAM Size (RZ/A1=3M, RZ/A1M=5M, RZ/A1H=10M) */ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE (10 * 1024 * 1024) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - 1024 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 86d0fb60f1d..cc6909774ed 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -82,11 +82,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* * MTD Command for mtdparts */ diff --git a/include/configs/highbank.h b/include/configs/highbank.h index 200cba3e705..d8e71269366 100644 --- a/include/configs/highbank.h +++ b/include/configs/highbank.h @@ -28,7 +28,6 @@ #define CONFIG_SYS_NVRAM_SIZE 0x8000 /* NVRAM size */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_INIT_SP_ADDR 0x01000000 #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0x20000000\0" \ diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 646f196f00f..33e9aa5ffb4 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -30,8 +30,6 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) - /* Generic Interrupt Controller Definitions */ #define GICD_BASE 0xf6801000 #define GICC_BASE 0xf6802000 diff --git a/include/configs/hikey960.h b/include/configs/hikey960.h index c088f2f2b69..caa6abb9d9d 100644 --- a/include/configs/hikey960.h +++ b/include/configs/hikey960.h @@ -22,8 +22,6 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) - /* Generic Interrupt Controller Definitions */ #define GICD_BASE 0xe82b1000 #define GICC_BASE 0xe82b2000 diff --git a/include/configs/hsdk-4xd.h b/include/configs/hsdk-4xd.h index fa86a333b20..7785bab7147 100644 --- a/include/configs/hsdk-4xd.h +++ b/include/configs/hsdk-4xd.h @@ -25,9 +25,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_1G -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) - #define CONFIG_SYS_BOOTM_LEN SZ_128M /* diff --git a/include/configs/hsdk.h b/include/configs/hsdk.h index e142035a8bf..6dd69ca38b4 100644 --- a/include/configs/hsdk.h +++ b/include/configs/hsdk.h @@ -24,9 +24,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_1G -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) - #define CONFIG_SYS_BOOTM_LEN SZ_128M /* diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h index aaad36bb8ab..39a36779bc4 100644 --- a/include/configs/ids8313.h +++ b/include/configs/ids8313.h @@ -28,8 +28,6 @@ #define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* End of used area in DPRAM */ -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* * Internal Definitions diff --git a/include/configs/imgtec_xilfpga.h b/include/configs/imgtec_xilfpga.h index 21dee858666..599b0c50def 100644 --- a/include/configs/imgtec_xilfpga.h +++ b/include/configs/imgtec_xilfpga.h @@ -25,8 +25,6 @@ /* SDRAM Configuration (for final code, data, stack, heap) */ #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 Mbytes */ -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - 0x1000) /*---------------------------------------------------------------------- * Commands diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h index 009c3cc5c1e..40c0f1fe36b 100644 --- a/include/configs/imx27lite-common.h +++ b/include/configs/imx27lite-common.h @@ -137,6 +137,4 @@ /* additions for new relocation code, must be added to all boards */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \ - GENERATED_GBL_DATA_SIZE) #endif /* __IMX27LITE_COMMON_CONFIG_H */ diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h index 24b70bf82f8..2a794db4dff 100644 --- a/include/configs/imx6-engicam.h +++ b/include/configs/imx6-engicam.h @@ -113,11 +113,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_SP_OFFSET) - /* UART */ #ifdef CONFIG_MXC_UART # ifdef CONFIG_MX6UL diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h index b77c335f904..a8d691586c9 100644 --- a/include/configs/imx6_logic.h +++ b/include/configs/imx6_logic.h @@ -113,11 +113,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* Environment organization */ /* NAND stuff */ diff --git a/include/configs/imx6dl-mamoj.h b/include/configs/imx6dl-mamoj.h index 85ca89790c0..43789323899 100644 --- a/include/configs/imx6dl-mamoj.h +++ b/include/configs/imx6dl-mamoj.h @@ -66,11 +66,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_SP_OFFSET) - /* SPL */ #include "imx6_spl.h" diff --git a/include/configs/imx6q-bosch-acc.h b/include/configs/imx6q-bosch-acc.h index 6d362557ac6..785ac7c5014 100644 --- a/include/configs/imx6q-bosch-acc.h +++ b/include/configs/imx6q-bosch-acc.h @@ -89,9 +89,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* SPL */ #ifdef CONFIG_SPL #include "imx6_spl.h" diff --git a/include/configs/imx7-cm.h b/include/configs/imx7-cm.h index 2d9f8bb510b..2f00198e40e 100644 --- a/include/configs/imx7-cm.h +++ b/include/configs/imx7-cm.h @@ -74,11 +74,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* MMC Config*/ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR #define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index d1af65e75ce..114c8c1a800 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -133,10 +133,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h index 3d8b262f474..0151e81630f 100644 --- a/include/configs/imx8mm_beacon.h +++ b/include/configs/imx8mm_beacon.h @@ -80,10 +80,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h index b0f66a44b0b..9487fe00104 100644 --- a/include/configs/imx8mm_data_modul_edm_sbc.h +++ b/include/configs/imx8mm_data_modul_edm_sbc.h @@ -30,10 +30,6 @@ /* Link Definitions */ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index cbf95f9273f..24345d41a9a 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -56,10 +56,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index d0aab994203..505ef8beb31 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -51,10 +51,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE SZ_2M -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index df65fe9f867..560a876b2ff 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -87,10 +87,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE SZ_2M -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h index 8768d52a6a4..0118ca32a96 100644 --- a/include/configs/imx8mn_beacon.h +++ b/include/configs/imx8mn_beacon.h @@ -92,10 +92,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/imx8mn_bsh_smm_s2_common.h b/include/configs/imx8mn_bsh_smm_s2_common.h index a05011d7c52..91418e67784 100644 --- a/include/configs/imx8mn_bsh_smm_s2_common.h +++ b/include/configs/imx8mn_bsh_smm_s2_common.h @@ -35,10 +35,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE SZ_512K -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index 1d6c92d4f95..b828a5b6349 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -63,10 +63,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/imx8mn_var_som.h b/include/configs/imx8mn_var_som.h index 267100cecae..acfc2834a95 100644 --- a/include/configs/imx8mn_var_som.h +++ b/include/configs/imx8mn_var_som.h @@ -53,10 +53,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE SZ_512K -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index f17c2170f70..56b3fe117f2 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -83,10 +83,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE SZ_2M -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/imx8mp_dhcom_pdk2.h b/include/configs/imx8mp_dhcom_pdk2.h index 8a09cf74532..f641f4902dc 100644 --- a/include/configs/imx8mp_dhcom_pdk2.h +++ b/include/configs/imx8mp_dhcom_pdk2.h @@ -28,10 +28,6 @@ /* Link Definitions */ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index ab7bab4ee70..f066bb00bf2 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -64,10 +64,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* Totally 6GB DDR */ diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index dba28139ec2..b9122d4667f 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -147,10 +147,6 @@ /* Link Definitions */ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* Totally 6GB or 4G DDR */ diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h index a510fa78539..1e8b1ba06e1 100644 --- a/include/configs/imx8mp_venice.h +++ b/include/configs/imx8mp_venice.h @@ -83,10 +83,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE SZ_2M -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index 26a8c56711d..48fa596eee6 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -59,10 +59,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index c49eaae62ba..416c83b4902 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -65,10 +65,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index 6fa53fe456c..84774eed8ee 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -93,10 +93,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index f409c52e9af..0fa5fe58155 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -110,8 +110,6 @@ /* Link Definitions */ -#define CONFIG_SYS_INIT_SP_ADDR 0x80200000 - /* Default environment is in SD */ /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */ diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h index 19e18b772b3..1f86b79d331 100644 --- a/include/configs/imx8qm_rom7720.h +++ b/include/configs/imx8qm_rom7720.h @@ -106,8 +106,6 @@ /* Link Definitions */ -#define CONFIG_SYS_INIT_SP_ADDR 0x80200000 - /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board, * USDHC3 is for SD on base board On DDR4 board, USDHC1 is mux for NAND, * USDHC2 is for SD, USDHC3 is for SD on base board diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index 053649fa1ed..fd4d2c9669f 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -108,8 +108,6 @@ /* Link Definitions */ -#define CONFIG_SYS_INIT_SP_ADDR 0x80200000 - /* Default environment is in SD */ /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */ diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index 296d8eb7266..8fe54f674cd 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -60,8 +60,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_SDRAM_BASE 0x80000000 diff --git a/include/configs/imxrt1020-evk.h b/include/configs/imxrt1020-evk.h index afae6a4e387..ac046b82aa9 100644 --- a/include/configs/imxrt1020-evk.h +++ b/include/configs/imxrt1020-evk.h @@ -9,8 +9,6 @@ #include -#define CONFIG_SYS_INIT_SP_ADDR 0x20240000 - #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE 1 #define PHYS_SDRAM 0x80000000 diff --git a/include/configs/imxrt1050-evk.h b/include/configs/imxrt1050-evk.h index 4b341a349c2..30b2f5d1efe 100644 --- a/include/configs/imxrt1050-evk.h +++ b/include/configs/imxrt1050-evk.h @@ -9,8 +9,6 @@ #include -#define CONFIG_SYS_INIT_SP_ADDR 0x20280000 - #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE 1 #define PHYS_SDRAM 0x80000000 diff --git a/include/configs/integrator-common.h b/include/configs/integrator-common.h index 927daa71ad1..34eec5a33d2 100644 --- a/include/configs/integrator-common.h +++ b/include/configs/integrator-common.h @@ -31,10 +31,6 @@ #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) /* * FLASH and environment organization diff --git a/include/configs/iot2050.h b/include/configs/iot2050.h index a5c1c36de35..296bcd4c7b7 100644 --- a/include/configs/iot2050.h +++ b/include/configs/iot2050.h @@ -14,8 +14,6 @@ #include /* SPL Loader Configuration */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + \ - CONFIG_SYS_K3_NON_SECURE_MSRAM_SIZE) #define CONFIG_SYS_BOOTM_LEN SZ_64M diff --git a/include/configs/iot_devkit.h b/include/configs/iot_devkit.h index 56a67f28914..0ebb1b526e9 100644 --- a/include/configs/iot_devkit.h +++ b/include/configs/iot_devkit.h @@ -30,12 +30,12 @@ * : : | * : : CONFIG_SYS_MALLOC_LEN * : : - * : Specified explicitly by CONFIG_SYS_INIT_SP_ADDR + * : Specified explicitly by CONFIG_CUSTOM_SYS_INIT_SP_ADDR * : * Specified explicitly by CONFIG_SYS_SDRAM_BASE * * NOTES: - * - Stack starts from CONFIG_SYS_INIT_SP_ADDR and grows down, + * - Stack starts from CONFIG_CUSTOM_SYS_INIT_SP_ADDR and grows down, * i.e. towards CONFIG_SYS_SDRAM_BASE but nothing stops it from crossing * that CONFIG_SYS_SDRAM_BASE in which case data won't be really saved on * stack any longer and values popped from stack will contain garbage @@ -53,16 +53,14 @@ #define CONFIG_SYS_SDRAM_BASE DCCM_BASE #define CONFIG_SYS_SDRAM_SIZE DCCM_SIZE -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_32K) - #define CONFIG_SYS_BOOTM_LEN SZ_128K #define ROM_BASE CONFIG_SYS_MONITOR_BASE #define ROM_SIZE SZ_256K -#define RAM_DATA_BASE CONFIG_SYS_INIT_SP_ADDR +#define RAM_DATA_BASE SYS_INIT_SP_ADDR #define RAM_DATA_SIZE CONFIG_SYS_SDRAM_SIZE - \ - (CONFIG_SYS_INIT_SP_ADDR - \ + (SYS_INIT_SP_ADDR - \ CONFIG_SYS_SDRAM_BASE) - \ CONFIG_SYS_MALLOC_LEN - \ CONFIG_ENV_SIZE diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index 8ebdb7ce5d7..ba3f9de6bf6 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -20,7 +20,6 @@ /* SPL Loader Configuration */ #if defined(CONFIG_TARGET_J721E_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + SZ_4M) #define CONFIG_SYS_UBOOT_BASE 0x50280000 /* Image load address in RAM for DFU boot*/ #else @@ -35,7 +34,6 @@ #define CONFIG_SPL_BSS_START_ADDR (CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX -\ CONFIG_SPL_BSS_MAX_SIZE) /* Set the stack right below the SPL BSS section */ -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_BSS_START_ADDR /* Configure R5 SPL post-relocation malloc pool in DDR */ #define CONFIG_SYS_SPL_MALLOC_START 0x84000000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M diff --git a/include/configs/j721s2_evm.h b/include/configs/j721s2_evm.h index 9b79e2b5378..3103face558 100644 --- a/include/configs/j721s2_evm.h +++ b/include/configs/j721s2_evm.h @@ -21,7 +21,6 @@ /* SPL Loader Configuration */ #if defined(CONFIG_TARGET_J721S2_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + SZ_4M) #define CONFIG_SYS_UBOOT_BASE 0x50280000 /* Image load address in RAM for DFU boot*/ #else @@ -36,7 +35,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x41c80000 -\ CONFIG_SPL_BSS_MAX_SIZE) /* Set the stack right below the SPL BSS section */ -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_BSS_START_ADDR /* Configure R5 SPL post-relocation malloc pool in DDR */ #define CONFIG_SYS_SPL_MALLOC_START 0x84000000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M diff --git a/include/configs/km/km-mpc83xx.h b/include/configs/km/km-mpc83xx.h index bf1a2356a97..c8929814aaa 100644 --- a/include/configs/km/km-mpc83xx.h +++ b/include/configs/km/km-mpc83xx.h @@ -38,8 +38,6 @@ #define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* End of used area in RAM */ -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* * Init Local Bus Memory Controller: * diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index dca5589a3ef..7430185666e 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -187,11 +187,6 @@ #define CONFIG_LS102XA_STREAM_ID -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - #define CONFIG_SYS_MONITOR_LEN 0x100000 /* 1Mbyte */ #define CONFIG_SYS_BOOTCOUNT_BE diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 60df6a37b78..4de5736d8ce 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -340,7 +340,6 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_MONITOR_LEN 0xc0000 /* 768k */ diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index 8ab93ae353f..3e46f9d5851 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -10,10 +10,9 @@ #include "rcar-gen2-common.h" -#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000 #define STACK_AREA_SIZE 0x00100000 #define LOW_LEVEL_MERAM_STACK \ - (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) + (SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) /* MEMORY */ #define RCAR_GEN2_SDRAM_BASE 0x40000000 diff --git a/include/configs/kontron-sl-mx6ul.h b/include/configs/kontron-sl-mx6ul.h index 7bc402d578e..b6e68f8f41a 100644 --- a/include/configs/kontron-sl-mx6ul.h +++ b/include/configs/kontron-sl-mx6ul.h @@ -22,11 +22,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - #define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE /* Board and environment settings */ diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h index 159b2127cb9..c731b04b8e7 100644 --- a/include/configs/kontron-sl-mx8mm.h +++ b/include/configs/kontron-sl-mx8mm.h @@ -22,11 +22,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* Board and environment settings */ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3) #define CONFIG_HOSTNAME "kontron-mx8mm" diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index 056163a2709..5e51f4fd477 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -72,10 +72,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index 579687db1a1..129bd7ed174 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -26,7 +26,6 @@ #define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 1 /* early stack pointer */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xeff0) /* SMP */ #define CPU_RELEASE_ADDR secondary_boot_addr diff --git a/include/configs/kp_imx53.h b/include/configs/kp_imx53.h index 2a37a5231b7..c401fd32169 100644 --- a/include/configs/kp_imx53.h +++ b/include/configs/kp_imx53.h @@ -71,11 +71,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* environment organization */ #endif /* __CONFIG_H_ */ diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h index 7d879477d70..5b25be5c925 100644 --- a/include/configs/kp_imx6q_tpc.h +++ b/include/configs/kp_imx6q_tpc.h @@ -97,12 +97,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* Environment */ #endif /* __KP_IMX6Q_TPC_IMX6_CONFIG_H_ */ diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h index 442505adaa1..e084f87d14d 100644 --- a/include/configs/kzm9g.h +++ b/include/configs/kzm9g.h @@ -31,9 +31,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR (0xE5600000) /* on MERAM */ #define CONFIG_SYS_INIT_RAM_SIZE (0x10000) #define LOW_LEVEL_MERAM_STACK (CONFIG_SYS_INIT_RAM_ADDR - 4) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) #define CONFIG_SDRAM_OFFSET_FOR_RT (16 * 1024 * 1024) #define CONFIG_SYS_SDRAM_BASE (KZM_SDRAM_BASE + CONFIG_SDRAM_OFFSET_FOR_RT) #define CONFIG_SYS_SDRAM_SIZE (PHYS_SDRAM_SIZE - CONFIG_SDRAM_OFFSET_FOR_RT) diff --git a/include/configs/lager.h b/include/configs/lager.h index ee37b2a6b33..98c82a0e571 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -11,10 +11,9 @@ #include "rcar-gen2-common.h" -#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000 #define STACK_AREA_SIZE 0x00100000 #define LOW_LEVEL_MERAM_STACK \ - (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) + (SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) /* MEMORY */ #define RCAR_GEN2_SDRAM_BASE 0x40000000 diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index a717bb0ae72..418b08e7335 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -94,8 +94,6 @@ /* additions for new relocation code, must added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0xc0000000 -#define CONFIG_SYS_INIT_SP_ADDR 0x80010000 - #include #endif /* __CONFIG_H */ diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h index fdea7241b02..3c03368b5c0 100644 --- a/include/configs/liteboard.h +++ b/include/configs/liteboard.h @@ -94,11 +94,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* FLASH and environment organization */ /* USB Configs */ diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 51aa176f7c8..1d8d9485e74 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -10,12 +10,6 @@ #include #include -#ifdef CONFIG_TFABOOT -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE -#else -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0) -#endif - #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 7d2a823ac7e..e8827157256 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -133,11 +133,6 @@ #define CONFIG_LS102XA_STREAM_ID -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - #include #endif diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index a18e047e2d4..d2e0f5f9362 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -353,11 +353,6 @@ #define CONFIG_LS102XA_STREAM_ID -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* * Environment */ diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index 4775ec7a1db..35156a00b3a 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -175,11 +175,6 @@ #define CONFIG_LS102XA_STREAM_ID -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* Environment */ #define CONFIG_SYS_BOOTM_LEN 0x8000000 /* 128 MB */ diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 1c5d71c646a..afff8fc3e2c 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -335,11 +335,6 @@ #define CONFIG_LS102XA_STREAM_ID -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* * Environment */ diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index 5b198ad8df0..5b0b86b39be 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -11,7 +11,6 @@ #include /* Link Definitions */ -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 130f291a85a..71070839826 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -30,11 +30,6 @@ #include /* Link Definitions */ -#ifdef CONFIG_TFABOOT -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE -#else -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0) -#endif #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index 8fd1af76f94..75d655c50d6 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -314,9 +314,6 @@ * Miscellaneous configurable options */ -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - /* * Environment */ diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 4378637c61d..bf808d15efa 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -30,11 +30,6 @@ #include /* Link Definitions */ -#ifdef CONFIG_TFABOOT -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE -#else -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0) -#endif #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 124f279c48e..6271135db9f 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -332,9 +332,6 @@ * Miscellaneous configurable options */ -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - /* * Environment */ diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 348388046b8..6ed180984e5 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -25,11 +25,6 @@ #define LS1088ARDB_PB_BOARD 0x4A /* Link Definitions */ -#ifdef CONFIG_TFABOOT -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE -#else -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0) -#endif /* Link Definitions */ #define CONFIG_SYS_FSL_QSPI_BASE 0x20000000 diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index a2203ddc474..5d2b8ebea0d 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -11,11 +11,6 @@ #include /* Link Definitions */ -#ifdef CONFIG_TFABOOT -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE -#else -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0) -#endif /* We need architecture specific misc initializations */ diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 5717a3dd317..56096682c06 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -12,7 +12,6 @@ #define CONFIG_FSL_MEMAC -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_FLASH_BASE 0x20000000 /* DDR */ diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index d547dba322d..58d6418b02e 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -24,11 +24,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* * U-Boot general configurations */ diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index df6c5094bef..ea7823de5a7 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -225,11 +225,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* Environment organization */ /* Envs are stored in NOR flash */ diff --git a/include/configs/meerkat96.h b/include/configs/meerkat96.h index ab8fa85f25e..0ccfe7db5a4 100644 --- a/include/configs/meerkat96.h +++ b/include/configs/meerkat96.h @@ -21,11 +21,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* Environment configs */ /* USB configs */ diff --git a/include/configs/meesc.h b/include/configs/meesc.h index 51f7fd59ac3..6b2296788dc 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -47,13 +47,8 @@ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_SIZE -/* - * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, - * leaving the correct space for initial global data structure above - * that address while providing maximum stack area below. - */ -#define CONFIG_SYS_INIT_SP_ADDR \ - (ATMEL_BASE_SRAM0 + 16 * 1024 - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM0 +#define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024) /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/meson64.h b/include/configs/meson64.h index 2935cf490e0..51dd4d706e0 100644 --- a/include/configs/meson64.h +++ b/include/configs/meson64.h @@ -30,7 +30,6 @@ #endif #define CONFIG_SYS_SDRAM_BASE 0 -#define CONFIG_SYS_INIT_SP_ADDR 0x20000000 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64 MiB */ /* ROM USB boot support, auto-execute boot.scr at scriptaddr */ diff --git a/include/configs/microchip_mpfs_icicle.h b/include/configs/microchip_mpfs_icicle.h index 655c8d6af5d..236db537db7 100644 --- a/include/configs/microchip_mpfs_icicle.h +++ b/include/configs/microchip_mpfs_icicle.h @@ -10,7 +10,6 @@ #include #define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M) #define CONFIG_SYS_BOOTM_LEN SZ_64M diff --git a/include/configs/mt7622.h b/include/configs/mt7622.h index 0101d48456e..6c681a3c30b 100644 --- a/include/configs/mt7622.h +++ b/include/configs/mt7622.h @@ -19,8 +19,6 @@ /* SPL -> Uboot */ #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - \ - GENERATED_GBL_DATA_SIZE) /* DRAM */ #define CONFIG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/mt7623.h b/include/configs/mt7623.h index 563784271d0..06367221ebc 100644 --- a/include/configs/mt7623.h +++ b/include/configs/mt7623.h @@ -20,8 +20,6 @@ /* Environment */ /* Preloader -> Uboot */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - \ - GENERATED_GBL_DATA_SIZE) /* MMC */ #define MMC_SUPPORTS_TUNING diff --git a/include/configs/mt7629.h b/include/configs/mt7629.h index 0462bceb312..64263ce2e63 100644 --- a/include/configs/mt7629.h +++ b/include/configs/mt7629.h @@ -26,8 +26,6 @@ #define CONFIG_SYS_UBOOT_BASE (CONFIG_SPI_ADDR + CONFIG_SPL_PAD_TO) /* SPL -> Uboot */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - \ - GENERATED_GBL_DATA_SIZE) /* UBoot -> Kernel */ #define CONFIG_SYS_SPL_ARGS_ADDR 0x40000000 diff --git a/include/configs/mt8183.h b/include/configs/mt8183.h index ee31c02e6ef..665a4e44f3f 100644 --- a/include/configs/mt8183.h +++ b/include/configs/mt8183.h @@ -18,9 +18,6 @@ #define CONFIG_SYS_NS16550_COM1 0x11005200 #define CONFIG_SYS_NS16550_CLK 26000000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - \ - GENERATED_GBL_DATA_SIZE) - #define CONFIG_SYS_BOOTM_LEN SZ_64M /* Environment settings */ diff --git a/include/configs/mt8512.h b/include/configs/mt8512.h index 1af8d2e480c..d4aa279b551 100644 --- a/include/configs/mt8512.h +++ b/include/configs/mt8512.h @@ -18,9 +18,6 @@ /* Uboot definition */ #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + \ - SZ_2M - \ - GENERATED_GBL_DATA_SIZE) #define ENV_BOOT_READ_IMAGE \ "boot_rd_img=mmc dev 0" \ diff --git a/include/configs/mt8516.h b/include/configs/mt8516.h index cb2af5843fc..928f4b0dc77 100644 --- a/include/configs/mt8516.h +++ b/include/configs/mt8516.h @@ -18,9 +18,6 @@ #define CONFIG_SYS_NS16550_COM1 0x11005000 #define CONFIG_SYS_NS16550_CLK 26000000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - \ - GENERATED_GBL_DATA_SIZE) - #define CONFIG_SYS_BOOTM_LEN SZ_64M /* Environment settings */ diff --git a/include/configs/mt8518.h b/include/configs/mt8518.h index 8ca8d25148a..e313f6f6afa 100644 --- a/include/configs/mt8518.h +++ b/include/configs/mt8518.h @@ -21,9 +21,6 @@ #define CONFIG_SYS_BOOTM_LEN SZ_64M /* Uboot definition */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + \ - SZ_2M - \ - GENERATED_GBL_DATA_SIZE) #define ENV_BOOT_READ_IMAGE \ "boot_rd_img=mmc dev 0" \ diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h index f6eb6bf0147..cae70760bcb 100644 --- a/include/configs/mvebu_armada-37xx.h +++ b/include/configs/mvebu_armada-37xx.h @@ -29,9 +29,6 @@ * Other required minimal configurations */ -/* End of 16M scrubbed by training in bootrom */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000) - /* * Environment */ diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h index d880b890072..7d7c218bc6a 100644 --- a/include/configs/mvebu_armada-8k.h +++ b/include/configs/mvebu_armada-8k.h @@ -23,9 +23,6 @@ * Other required minimal configurations */ -/* End of 16M scrubbed by training in bootrom */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000) - /* When runtime detection fails this is the default */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index ccfe292f6c6..a423dd28b07 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -117,11 +117,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - #define CONFIG_SYS_DDR_CLKSEL 0 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100 #define CONFIG_SYS_MAIN_PWR_ON diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h index a33132a58ee..1e5df3f7d7a 100644 --- a/include/configs/mx53cx9020.h +++ b/include/configs/mx53cx9020.h @@ -67,11 +67,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* environment organization */ /* Framebuffer and LCD */ diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 1e2e55d89be..0268a48c86f 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -100,11 +100,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - #ifdef CONFIG_CMD_SATA #define CONFIG_DWC_AHSATA_PORT_ID 0 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index 46b4cce3f8a..b26613a2ea8 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -100,11 +100,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* FLASH and environment organization */ #define CONFIG_FSL_IIM diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h index 832f73f05ef..76fbbf42daf 100644 --- a/include/configs/mx6cuboxi.h +++ b/include/configs/mx6cuboxi.h @@ -103,11 +103,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* Environment organization */ #endif /* __MX6CUBOXI_CONFIG_H */ diff --git a/include/configs/mx6memcal.h b/include/configs/mx6memcal.h index 6991221f601..ad53f17d671 100644 --- a/include/configs/mx6memcal.h +++ b/include/configs/mx6memcal.h @@ -32,11 +32,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - #define CONFIG_MXC_USB_PORTSC PORT_PTS_UTMI #endif /* __CONFIG_H */ diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index d7408e06a06..bfcab1bed5b 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -143,11 +143,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* Environment organization */ /* Framebuffer */ diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index 3da796d03a0..e03226d4180 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -90,11 +90,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* Environment organization */ /* USB Configs */ diff --git a/include/configs/mx6sllevk.h b/include/configs/mx6sllevk.h index 1b32f58afca..e9ccb99d3ce 100644 --- a/include/configs/mx6sllevk.h +++ b/include/configs/mx6sllevk.h @@ -86,11 +86,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* Environment organization */ /* MMC Configs */ diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h index 372cf8dd711..272492466de 100644 --- a/include/configs/mx6sxsabreauto.h +++ b/include/configs/mx6sxsabreauto.h @@ -82,11 +82,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* MMC Configuration */ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 76e3dc8b382..fda5b03b60f 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -116,11 +116,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* MMC Configuration */ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index 03d799ce654..44e6fd0156f 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -115,11 +115,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* environment organization */ /* USB Configs */ diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h index bc494b46b69..db09db44d53 100644 --- a/include/configs/mx6ullevk.h +++ b/include/configs/mx6ullevk.h @@ -112,11 +112,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* environment organization */ #define CONFIG_IOMUX_LPSR diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index aaad232f0e4..36cef252ea2 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -89,11 +89,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* environment organization */ /* diff --git a/include/configs/mx7ulp_com.h b/include/configs/mx7ulp_com.h index f8a5009637d..c6c3695e5df 100644 --- a/include/configs/mx7ulp_com.h +++ b/include/configs/mx7ulp_com.h @@ -53,10 +53,5 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE SZ_256K -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif /* __CONFIG_H */ diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h index a91e13104bc..57fed4ed69c 100644 --- a/include/configs/mx7ulp_evk.h +++ b/include/configs/mx7ulp_evk.h @@ -97,9 +97,4 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE SZ_256K -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - #endif /* __CONFIG_H */ diff --git a/include/configs/mxs.h b/include/configs/mxs.h index 5118c53ad3d..ebabc92b303 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -59,10 +59,6 @@ #endif /* Point initial SP in SRAM so SPL can use it too. */ -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* * We need to sacrifice first 4 bytes of RAM here to avoid triggering some diff --git a/include/configs/mys_6ulx.h b/include/configs/mys_6ulx.h index 6801fc109ea..fb685ec9631 100644 --- a/include/configs/mys_6ulx.h +++ b/include/configs/mys_6ulx.h @@ -29,11 +29,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* NAND */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index afa4ca5b5af..3aa21a28d15 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -106,11 +106,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* Environment organization */ /* diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index f33dd19ea36..97aafc5f725 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -166,8 +166,6 @@ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /* * Attached kernel image diff --git a/include/configs/novena.h b/include/configs/novena.h index dbde7a0ade5..327dde56970 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -34,11 +34,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* SPL */ #include "imx6_spl.h" /* common IMX6 SPL configuration */ diff --git a/include/configs/npi_imx6ull.h b/include/configs/npi_imx6ull.h index c250fa65060..1fc4b87cab7 100644 --- a/include/configs/npi_imx6ull.h +++ b/include/configs/npi_imx6ull.h @@ -30,11 +30,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* NAND */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 diff --git a/include/configs/nsim.h b/include/configs/nsim.h index de07b6b15f6..586ac3ebcaa 100644 --- a/include/configs/nsim.h +++ b/include/configs/nsim.h @@ -16,9 +16,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_256M -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) - #define CONFIG_SYS_BOOTM_LEN SZ_32M /* diff --git a/include/configs/o4-imx6ull-nano.h b/include/configs/o4-imx6ull-nano.h index 7777935ba6e..00f7d871271 100644 --- a/include/configs/o4-imx6ull-nano.h +++ b/include/configs/o4-imx6ull-nano.h @@ -10,8 +10,6 @@ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #if IS_ENABLED(CONFIG_CMD_USB) # define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/octeontx2_common.h b/include/configs/octeontx2_common.h index 4df3be1b1ea..5c75f23a0bf 100644 --- a/include/configs/octeontx2_common.h +++ b/include/configs/octeontx2_common.h @@ -14,7 +14,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_TEXT_BASE /** Stack starting address */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0xffff0) /** Extra environment settings */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/octeontx_common.h b/include/configs/octeontx_common.h index 959f3d1347d..22d38588780 100644 --- a/include/configs/octeontx_common.h +++ b/include/configs/octeontx_common.h @@ -41,7 +41,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_TEXT_BASE /** Stack starting address */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0xffff0) /** Heap size for U-Boot */ diff --git a/include/configs/odroid.h b/include/configs/odroid.h index b8b47af4712..dec658dd13a 100644 --- a/include/configs/odroid.h +++ b/include/configs/odroid.h @@ -24,9 +24,6 @@ #include -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ - - GENERATED_GBL_DATA_SIZE) - /* Partitions name */ #define PARTS_BOOT "boot" #define PARTS_ROOT "platform" diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index eb35d7b4ae2..8d24a03b722 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -16,8 +16,6 @@ #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000) - /* USB */ #define CONFIG_USB_EHCI_EXYNOS diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 05ece09fbe0..dbb87b9642e 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -178,8 +178,6 @@ /* additions for new relocation code, must added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0xc0000000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \ - GENERATED_GBL_DATA_SIZE) #include diff --git a/include/configs/openpiton-riscv64.h b/include/configs/openpiton-riscv64.h index e82766c5ef1..006ec360ab3 100644 --- a/include/configs/openpiton-riscv64.h +++ b/include/configs/openpiton-riscv64.h @@ -15,7 +15,6 @@ /* Environment options */ #define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_32M) #define CONFIG_SYS_BOOTM_LEN SZ_256M #ifdef CONFIG_SPL diff --git a/include/configs/opos6uldev.h b/include/configs/opos6uldev.h index 1f2887105ff..8624d24b6ea 100644 --- a/include/configs/opos6uldev.h +++ b/include/configs/opos6uldev.h @@ -21,10 +21,6 @@ #define CONFIG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* USB */ #ifdef CONFIG_USB_EHCI_MX6 diff --git a/include/configs/origen.h b/include/configs/origen.h index 9ec8b638289..4d296b7a03f 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -48,6 +48,4 @@ #define RESERVE_BLOCK_SIZE (512) #define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ -#define CONFIG_SYS_INIT_SP_ADDR 0x02040000 - #endif /* __CONFIG_H */ diff --git a/include/configs/owl-common.h b/include/configs/owl-common.h index 0372bd7c79d..b0233b96b06 100644 --- a/include/configs/owl-common.h +++ b/include/configs/owl-common.h @@ -20,7 +20,6 @@ * image to the top of SDRAM. After relocation u-boot moves the stack to the * proper place. */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x7ff00) /* Console configuration */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index ca668e3ccd8..b68082c4110 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -285,7 +285,6 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_MONITOR_LEN (768 * 1024) diff --git a/include/configs/pcl063.h b/include/configs/pcl063.h index 31b7d07a24c..659f20e63ab 100644 --- a/include/configs/pcl063.h +++ b/include/configs/pcl063.h @@ -41,11 +41,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* NAND */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 diff --git a/include/configs/pcl063_ull.h b/include/configs/pcl063_ull.h index 068fc7db347..0d099fa14c2 100644 --- a/include/configs/pcl063_ull.h +++ b/include/configs/pcl063_ull.h @@ -43,11 +43,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* NAND */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h index 79b69dfe175..e360b166f55 100644 --- a/include/configs/pcm052.h +++ b/include/configs/pcm052.h @@ -126,11 +126,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* environment organization */ #endif diff --git a/include/configs/pcm058.h b/include/configs/pcm058.h index 4d4185b4668..e87b6409bab 100644 --- a/include/configs/pcm058.h +++ b/include/configs/pcm058.h @@ -24,11 +24,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* Environment organization */ #define ENV_MMC \ "mmcdev=0\0" \ diff --git a/include/configs/peach-pi.h b/include/configs/peach-pi.h index ba82aaf6537..ff4180a8331 100644 --- a/include/configs/peach-pi.h +++ b/include/configs/peach-pi.h @@ -21,7 +21,6 @@ #include #define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800) /* Display */ #ifdef CONFIG_LCD diff --git a/include/configs/peach-pit.h b/include/configs/peach-pit.h index 16fb2f3a0e3..2c749ac2143 100644 --- a/include/configs/peach-pit.h +++ b/include/configs/peach-pit.h @@ -21,7 +21,6 @@ #include #define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800) /* DRAM Memory Banks */ #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h index a3027695c0e..0366933cea2 100644 --- a/include/configs/phycore_imx8mm.h +++ b/include/configs/phycore_imx8mm.h @@ -70,10 +70,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE SZ_512K -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h index 7f5db9079ae..8434156998a 100644 --- a/include/configs/phycore_imx8mp.h +++ b/include/configs/phycore_imx8mp.h @@ -70,10 +70,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE SZ_512K -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h index 10795df3761..0a07c9c29c1 100644 --- a/include/configs/pic32mzdask.h +++ b/include/configs/pic32mzdask.h @@ -23,8 +23,6 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 #define CONFIG_SYS_INIT_RAM_ADDR \ (CONFIG_SYS_SRAM_BASE + CONFIG_SYS_SRAM_SIZE - CONFIG_SYS_INIT_RAM_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE - 1) /* SDRAM Configuration (for final code, data, stack, heap) */ #define CONFIG_SYS_SDRAM_BASE 0x88000000 diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h index b4b556f3bc0..4910c80e325 100644 --- a/include/configs/pico-imx6.h +++ b/include/configs/pico-imx6.h @@ -107,11 +107,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* Environment organization */ /* Ethernet Configuration */ diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index aadf6861ca1..eef14841903 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -107,11 +107,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* environment organization */ #ifdef CONFIG_DM_VIDEO diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index d196662dc3e..482238b4194 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -108,11 +108,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* PMIC */ #define CONFIG_POWER_PFUZE3000 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index 49fb57a6edf..c8dab24f90a 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -72,10 +72,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index 1db82793970..921f92bd012 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -179,7 +179,5 @@ "" #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - \ - GENERATED_GBL_DATA_SIZE) #endif diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index 143e9f542ac..c6b106c64cb 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -202,7 +202,5 @@ "" #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - \ - GENERATED_GBL_DATA_SIZE) #endif diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index fa2ab562f33..56d2459b978 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -23,9 +23,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x70000000 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) - /* NAND flash */ #ifdef CONFIG_CMD_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/poleg.h b/include/configs/poleg.h index b58850c5e7c..f1c259f4760 100644 --- a/include/configs/poleg.h +++ b/include/configs/poleg.h @@ -13,7 +13,6 @@ #define CONFIG_SYS_BOOTMAPSZ (0x30 << 20) #define CONFIG_SYS_SDRAM_BASE 0x0 -#define CONFIG_SYS_INIT_SP_ADDR (0x00008000 - GENERATED_GBL_DATA_SIZE) /* Default environemnt variables */ #define CONFIG_SERVERIP 192.168.0.1 diff --git a/include/configs/pomelo.h b/include/configs/pomelo.h index cdd6cdb58dd..11d408f1908 100644 --- a/include/configs/pomelo.h +++ b/include/configs/pomelo.h @@ -12,7 +12,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* SIZE of malloc pool */ -#define CONFIG_SYS_INIT_SP_ADDR (0x29800000 + 0x1a000) /*BOOT*/ #define CONFIG_SYS_BOOTM_LEN 0x3c00000 diff --git a/include/configs/poplar.h b/include/configs/poplar.h index 4cc3f26133e..6def3691103 100644 --- a/include/configs/poplar.h +++ b/include/configs/poplar.h @@ -17,7 +17,6 @@ /* SYS */ #define CONFIG_SYS_BOOTM_LEN SZ_64M -#define CONFIG_SYS_INIT_SP_ADDR 0x200000 /* ATF bl33.bin load address (must match) */ diff --git a/include/configs/porter.h b/include/configs/porter.h index 89fd0f2c643..d8c4ea10575 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -12,10 +12,9 @@ #include "rcar-gen2-common.h" -#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000 #define STACK_AREA_SIZE 0x00100000 #define LOW_LEVEL_MERAM_STACK \ - (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) + (SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) /* MEMORY */ #define RCAR_GEN2_SDRAM_BASE 0x40000000 diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h index fcec8b0038a..48c0584d5b3 100644 --- a/include/configs/presidio_asic.h +++ b/include/configs/presidio_asic.h @@ -8,7 +8,6 @@ #ifndef __PRESIDIO_ASIC_H #define __PRESIDIO_ASIC_H -#define CONFIG_SYS_INIT_SP_ADDR 0x00100000 #define CONFIG_SYS_BOOTM_LEN 0x00c00000 /* Generic Timer Definitions */ diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h index 9541a7f19e2..7b36cd765ea 100644 --- a/include/configs/px30_common.h +++ b/include/configs/px30_common.h @@ -13,7 +13,6 @@ /* FIXME: ff020000 is pmu_mem (10k), while ff0e0000 is regular int_mem */ #define CONFIG_IRAM_BASE 0xff020000 -#define CONFIG_SYS_INIT_SP_ADDR 0x00400000 #define CONFIG_SPL_STACK 0x00400000 #define CONFIG_SPL_BSS_START_ADDR 0x4000000 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ diff --git a/include/configs/qemu-arm.h b/include/configs/qemu-arm.h index c0b5731e0e1..14cae43db3a 100644 --- a/include/configs/qemu-arm.h +++ b/include/configs/qemu-arm.h @@ -12,9 +12,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x40000000 -/* The DTB generated by QEMU is placed at start of RAM, stay away from there */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M) - #define CONFIG_SYS_BOOTM_LEN SZ_64M /* GUIDs for capsule updatable firmware images */ diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index ad18a48f3c4..60a17dbcdcd 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -57,7 +57,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h index 69d92e643a5..15e8ae922e4 100644 --- a/include/configs/qemu-riscv.h +++ b/include/configs/qemu-riscv.h @@ -17,7 +17,6 @@ #endif #define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M) #define CONFIG_SYS_BOOTM_LEN SZ_64M diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index 645b0e91b1d..8b4c5c0f105 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -28,7 +28,6 @@ #define PHY_ANEG_TIMEOUT 20000 /* MEMORY */ -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE #define DRAM_RSV_SIZE 0x08000000 #define CONFIG_SYS_SDRAM_BASE (0x40000000 + DRAM_RSV_SIZE) diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index 5428935b19c..0eded1838c2 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -10,7 +10,6 @@ #define CONFIG_SYS_HZ_CLOCK 24000000 -#define CONFIG_SYS_INIT_SP_ADDR 0x60100000 #define CONFIG_SPL_STACK 0x10081fff #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (4 << 10) diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h index e838f379d7e..dd33d30e9e5 100644 --- a/include/configs/rk3066_common.h +++ b/include/configs/rk3066_common.h @@ -9,8 +9,6 @@ #include #include "rockchip-common.h" -#define CONFIG_SYS_INIT_SP_ADDR 0x78000000 - #define CONFIG_IRAM_BASE 0x10080000 #define CONFIG_SPL_STACK 0x1008FFFF diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h index b7b61ed424e..5c60d119f99 100644 --- a/include/configs/rk3128_common.h +++ b/include/configs/rk3128_common.h @@ -12,8 +12,6 @@ #define CONFIG_IRAM_BASE 0x10080000 -#define CONFIG_SYS_INIT_SP_ADDR 0x60100000 - #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ /* RAW SD card / eMMC locations. */ diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h index 77b23f1e224..466b0e74859 100644 --- a/include/configs/rk3188_common.h +++ b/include/configs/rk3188_common.h @@ -9,11 +9,6 @@ #include #include "rockchip-common.h" -#ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM -/* Bootrom will load u-boot binary to 0x60000000 once return from SPL */ -#endif -#define CONFIG_SYS_INIT_SP_ADDR 0x60100000 - #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (0x8000 - 0x800) #define CONFIG_ROCKCHIP_CHIP_TAG "RK31" #define CONFIG_IRAM_BASE 0x10080000 diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index f4668f08aec..dd1a207aed3 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -12,8 +12,6 @@ #define CONFIG_SYS_HZ_CLOCK 24000000 -#define CONFIG_SYS_INIT_SP_ADDR 0x61100000 - #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (28 << 10) #define CONFIG_ROCKCHIP_CHIP_TAG "RK32" #define CONFIG_IRAM_BASE 0x10080000 diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index ae57353ce35..abeb6535ce3 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -13,10 +13,6 @@ #define CONFIG_SYS_HZ_CLOCK 24000000 -#ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM -/* Bootrom will load u-boot binary to 0x0 once return from SPL */ -#endif -#define CONFIG_SYS_INIT_SP_ADDR 0x00100000 #define CONFIG_SPL_STACK 0xff718000 #define CONFIG_IRAM_BASE 0xff700000 diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h index 24d60867817..2433ea83652 100644 --- a/include/configs/rk3308_common.h +++ b/include/configs/rk3308_common.h @@ -13,7 +13,6 @@ #define CONFIG_SYS_NS16550_MEM32 #define CONFIG_IRAM_BASE 0xfff80000 -#define CONFIG_SYS_INIT_SP_ADDR 0x00800000 #define CONFIG_SPL_STACK 0x00400000 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 29f1aa71337..5141c48de78 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -10,7 +10,6 @@ #define CONFIG_IRAM_BASE 0xff090000 -#define CONFIG_SYS_INIT_SP_ADDR 0x00300000 #define CONFIG_SPL_STACK 0x00400000 #define CONFIG_SPL_BSS_START_ADDR 0x2000000 diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index ff3f025bd10..77817a7e73c 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -16,8 +16,6 @@ #define CONFIG_IRAM_BASE 0xff8c0000 -#define CONFIG_SYS_INIT_SP_ADDR 0x00300000 - #define CONFIG_SPL_BSS_START_ADDR 0x400000 #define CONFIG_SPL_STACK 0x00188000 diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index f09ffd9fde8..4582d34af85 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -10,8 +10,6 @@ #define CONFIG_IRAM_BASE 0xff8c0000 -#define CONFIG_SYS_INIT_SP_ADDR 0x00300000 - #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT) #define CONFIG_SPL_STACK 0x00400000 #define CONFIG_SPL_BSS_START_ADDR 0x00400000 diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h index 02efb258d34..2e726b00c96 100644 --- a/include/configs/rk3568_common.h +++ b/include/configs/rk3568_common.h @@ -10,8 +10,6 @@ #define CONFIG_IRAM_BASE 0xfdcc0000 -#define CONFIG_SYS_INIT_SP_ADDR 0x00c00000 - #define CONFIG_SPL_STACK 0x00400000 #define CONFIG_SPL_BSS_START_ADDR 0x4000000 diff --git a/include/configs/rpi.h b/include/configs/rpi.h index 9e2b24a2d37..27738ab1933 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -32,9 +32,6 @@ * the VC uses. */ #define CONFIG_SYS_SDRAM_SIZE SZ_128M -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ - CONFIG_SYS_SDRAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) #ifdef CONFIG_ARM64 #define CONFIG_SYS_BOOTM_LEN SZ_64M diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h index 54f423cb28d..f088f0e7a0c 100644 --- a/include/configs/rv1108_common.h +++ b/include/configs/rv1108_common.h @@ -16,7 +16,6 @@ #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) #define CONFIG_SYS_SDRAM_BASE 0x60000000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x100000) /* rockchip ohci host driver */ #define CONFIG_USB_OHCI_NEW diff --git a/include/configs/s5p4418_nanopi2.h b/include/configs/s5p4418_nanopi2.h index 0c2b05dc8c2..43593572d96 100644 --- a/include/configs/s5p4418_nanopi2.h +++ b/include/configs/s5p4418_nanopi2.h @@ -18,7 +18,6 @@ /*----------------------------------------------------------------------- * System memory Configuration */ -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MEM_SIZE 0x40000000 #define CONFIG_SYS_SDRAM_BASE 0x71000000 diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 97ff46d5ad7..d27116ad113 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -138,8 +138,6 @@ #define CONFIG_SAMSUNG_ONENAND 1 #define CONFIG_SYS_ONENAND_BASE 0xB0000000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000) - #define CONFIG_USB_GADGET_DWC2_OTG_PHY #endif /* __CONFIG_H */ diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index ae56c66e15c..8df7377a0f2 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -21,9 +21,6 @@ #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ - - GENERATED_GBL_DATA_SIZE) - /* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */ #define NORMAL_MTDPARTS_DEFAULT CONFIG_MTDPARTS_DEFAULT diff --git a/include/configs/sam9x60_curiosity.h b/include/configs/sam9x60_curiosity.h index aa3feb4a367..896697bf415 100644 --- a/include/configs/sam9x60_curiosity.h +++ b/include/configs/sam9x60_curiosity.h @@ -21,8 +21,5 @@ #define CONFIG_SYS_SDRAM_SIZE 0x8000000 /* 128 MB */ #define CONFIG_SPL_STACK 0x218000 -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 16 * 1024 + CONFIG_SYS_MALLOC_F_LEN - \ - GENERATED_GBL_DATA_SIZE) #endif diff --git a/include/configs/sam9x60ek.h b/include/configs/sam9x60ek.h index c965fcb4e8f..b9b56d9f1a0 100644 --- a/include/configs/sam9x60ek.h +++ b/include/configs/sam9x60ek.h @@ -26,10 +26,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 megs */ -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 16 * 1024 + CONFIG_SYS_MALLOC_F_LEN - \ - GENERATED_GBL_DATA_SIZE) - /* NAND flash */ #ifdef CONFIG_CMD_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/sama5d27_som1_ek.h b/include/configs/sama5d27_som1_ek.h index 933dcace9d7..2bb71e4f42f 100644 --- a/include/configs/sama5d27_som1_ek.h +++ b/include/configs/sama5d27_som1_ek.h @@ -14,9 +14,6 @@ #undef CONFIG_SYS_AT91_MAIN_CLOCK #define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ -#define CONFIG_SYS_INIT_SP_ADDR \ - (0x22000000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE) - /* SPL */ #define CONFIG_SPL_STACK 0x218000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 diff --git a/include/configs/sama5d27_wlsom1_ek.h b/include/configs/sama5d27_wlsom1_ek.h index 9bf7016acaf..86f7c2bade8 100644 --- a/include/configs/sama5d27_wlsom1_ek.h +++ b/include/configs/sama5d27_wlsom1_ek.h @@ -19,9 +19,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x10000000 -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) - /* SPL */ #define CONFIG_SPL_STACK 0x218000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 diff --git a/include/configs/sama5d2_icp.h b/include/configs/sama5d2_icp.h index 09cc53ef122..f7f746e9b3e 100644 --- a/include/configs/sama5d2_icp.h +++ b/include/configs/sama5d2_icp.h @@ -19,8 +19,6 @@ #define CONFIG_SYS_SDRAM_SIZE 0x20000000 #define CONFIG_SPL_STACK 0x218000 -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) #ifdef CONFIG_SD_BOOT /* u-boot env in sd/mmc card */ diff --git a/include/configs/sama5d2_ptc_ek.h b/include/configs/sama5d2_ptc_ek.h index 1ffe35bd875..3b91e83683a 100644 --- a/include/configs/sama5d2_ptc_ek.h +++ b/include/configs/sama5d2_ptc_ek.h @@ -19,9 +19,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) - /* NAND Flash */ #ifdef CONFIG_CMD_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h index 99bc2a16231..b7cc8d05ce5 100644 --- a/include/configs/sama5d2_xplained.h +++ b/include/configs/sama5d2_xplained.h @@ -11,9 +11,6 @@ #include "at91-sama5_common.h" -#define CONFIG_SYS_INIT_SP_ADDR \ - (0x22000000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE) - /* SPL */ #define CONFIG_SPL_STACK 0x218000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index 6f5fb994e0f..384e8d6e613 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -28,8 +28,6 @@ #define CONFIG_SYS_SDRAM_SIZE 0x10000000 #define CONFIG_SPL_STACK 0x318000 -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index 28493dc377c..161914294c8 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -39,8 +39,6 @@ #define CONFIG_SYS_SDRAM_SIZE 0x20000000 #define CONFIG_SPL_STACK 0x318000 -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) /* SerialFlash */ diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h index 2839a12061a..6328450b995 100644 --- a/include/configs/sama5d4_xplained.h +++ b/include/configs/sama5d4_xplained.h @@ -16,8 +16,6 @@ #define CONFIG_SYS_SDRAM_SIZE 0x20000000 #define CONFIG_SPL_STACK 0x218000 -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h index b8b6ad27786..a00d2851bd0 100644 --- a/include/configs/sama5d4ek.h +++ b/include/configs/sama5d4ek.h @@ -16,8 +16,6 @@ #define CONFIG_SYS_SDRAM_SIZE 0x20000000 #define CONFIG_SPL_STACK 0x218000 -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/sama7g5ek.h b/include/configs/sama7g5ek.h index 9bb4a09895a..97bac63ddde 100644 --- a/include/configs/sama7g5ek.h +++ b/include/configs/sama7g5ek.h @@ -17,8 +17,5 @@ #define CONFIG_SYS_SDRAM_SIZE 0x20000000 #define CONFIG_SPL_STACK 0x218000 -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 16 * 1024 + CONFIG_SYS_MALLOC_F_LEN - \ - GENERATED_GBL_DATA_SIZE) #endif diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index cc7330b8877..8a81ae40819 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -38,8 +38,6 @@ #define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */ #define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1 -#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ - GENERATED_GBL_DATA_SIZE) /* Platform/Board specific defs */ #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ diff --git a/include/configs/sifive-unleashed.h b/include/configs/sifive-unleashed.h index 04ac4d43e79..fd0bb69648a 100644 --- a/include/configs/sifive-unleashed.h +++ b/include/configs/sifive-unleashed.h @@ -24,7 +24,6 @@ #endif #define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M) #define CONFIG_SYS_BOOTM_LEN SZ_64M diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h index a81b655e191..aecfb0b2632 100644 --- a/include/configs/sifive-unmatched.h +++ b/include/configs/sifive-unmatched.h @@ -24,7 +24,6 @@ #endif #define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M) #define CONFIG_SYS_BOOTM_LEN SZ_64M diff --git a/include/configs/silk.h b/include/configs/silk.h index a273f21b64c..a300ae86fc9 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -12,10 +12,9 @@ #include "rcar-gen2-common.h" -#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000 #define STACK_AREA_SIZE 0x00100000 #define LOW_LEVEL_MERAM_STACK \ - (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) + (SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) /* MEMORY */ #define RCAR_GEN2_SDRAM_BASE 0x40000000 diff --git a/include/configs/sipeed-maix.h b/include/configs/sipeed-maix.h index 1cc2992c804..7159fc35d52 100644 --- a/include/configs/sipeed-maix.h +++ b/include/configs/sipeed-maix.h @@ -8,9 +8,6 @@ #include -/* Start just below the second bank so we don't clobber it during reloc */ -#define CONFIG_SYS_INIT_SP_ADDR 0x803FFFFF - #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_SDRAM_SIZE SZ_8M diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 3b2803f033a..533129f311b 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -109,8 +109,8 @@ * leaving the correct space for initial global data structure above that * address while providing maximum stack area below. */ -#define CONFIG_SYS_INIT_SP_ADDR \ - (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 +#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1 /* Defines for SPL */ diff --git a/include/configs/smdk5420.h b/include/configs/smdk5420.h index f26995d5c1c..f8d2fafd278 100644 --- a/include/configs/smdk5420.h +++ b/include/configs/smdk5420.h @@ -18,7 +18,6 @@ #define CONFIG_SMDK5420 /* which is in a SMDK5420 */ #define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800) /* USB */ #define CONFIG_USB_XHCI_EXYNOS diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index df5fa99324f..2f04b077ad3 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -116,8 +116,6 @@ #define CONFIG_SAMSUNG_ONENAND 1 #define CONFIG_SYS_ONENAND_BASE 0xE7100000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000) - /* * Ethernet Contoller driver */ diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index baa2d064fd6..1367b7d0600 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -44,8 +44,6 @@ #define RESERVE_BLOCK_SIZE (512) #define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ -#define CONFIG_SYS_INIT_SP_ADDR 0x02040000 - /* Ethernet Controllor Driver */ #ifdef CONFIG_CMD_NET #define CONFIG_ENV_SROM_BANK 1 diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h index a7f77566042..681c831747b 100644 --- a/include/configs/smegw01.h +++ b/include/configs/smegw01.h @@ -42,9 +42,4 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - #endif diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h index f7ee9dbac35..6ff21b92168 100644 --- a/include/configs/snapper9260.h +++ b/include/configs/snapper9260.h @@ -23,8 +23,8 @@ /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) /* 64MB */ -#define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM1 + 0x1000 - \ - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 +#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1 /* Mem test settings */ diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h index 0e3567f535b..59bba7d143e 100644 --- a/include/configs/snapper9g45.h +++ b/include/configs/snapper9g45.h @@ -23,8 +23,8 @@ /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6 #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) /* 64MB */ -#define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM + 0x1000 - \ - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 +#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM /* Mem test settings */ diff --git a/include/configs/sniper.h b/include/configs/sniper.h index 9de446fdaf7..01697a5c82a 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -33,8 +33,6 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ - GENERATED_GBL_DATA_SIZE) /* * I2C diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 6943dc04de2..bdcb872cd06 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -46,11 +46,6 @@ * phase of U-Boot, too. This prevents overwriting SPL data if stack/heap usage * in U-Boot pre-reloc is higher than in SPL. */ -#if defined(CONFIG_SPL_STACK_R_ADDR) && CONFIG_SPL_STACK_R_ADDR -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_STACK_R_ADDR -#else -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_STACK -#endif #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 022e0881cb3..c4ba1d14f93 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -29,9 +29,6 @@ */ #define CONFIG_SYS_INIT_RAM_ADDR 0xFFE00000 #define CONFIG_SYS_INIT_RAM_SIZE 0x40000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE \ - + 0x100000) -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_SP_ADDR) /* * U-Boot environment configurations diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 76d9e98919a..3309779118a 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -104,7 +104,6 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size used area in RAM*/ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384KiB for Mon */ diff --git a/include/configs/somlabs_visionsom_6ull.h b/include/configs/somlabs_visionsom_6ull.h index d4761296c75..98966cfeb91 100644 --- a/include/configs/somlabs_visionsom_6ull.h +++ b/include/configs/somlabs_visionsom_6ull.h @@ -62,11 +62,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* environment organization */ /* USB Configs */ diff --git a/include/configs/stemmy.h b/include/configs/stemmy.h index 96e759d99ca..4ad55afad86 100644 --- a/include/configs/stemmy.h +++ b/include/configs/stemmy.h @@ -13,7 +13,6 @@ * low-level initialization and rely on configuration provided by the Samsung * bootloader. New images are loaded at the same address for compatibility. */ -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_BOOTM_LEN SZ_64M /* FIXME: This should be loaded from device tree... */ diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h index 69b9232201b..a425dad6921 100644 --- a/include/configs/stih410-b2260.h +++ b/include/configs/stih410-b2260.h @@ -42,10 +42,6 @@ /* Extra Commands */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE - \ - CONFIG_SYS_MALLOC_LEN - \ - GENERATED_GBL_DATA_SIZE) - /* USB Configs */ #define CONFIG_USB_OHCI_NEW #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 diff --git a/include/configs/stm32f429-discovery.h b/include/configs/stm32f429-discovery.h index de17c8b8e19..18c9e5bfb6e 100644 --- a/include/configs/stm32f429-discovery.h +++ b/include/configs/stm32f429-discovery.h @@ -9,8 +9,6 @@ #define CONFIG_SYS_FLASH_BASE 0x08000000 -#define CONFIG_SYS_INIT_SP_ADDR 0x10010000 - /* * Configuration of the external SDRAM memory */ diff --git a/include/configs/stm32f429-evaluation.h b/include/configs/stm32f429-evaluation.h index 4efe40f6c97..6849477beaf 100644 --- a/include/configs/stm32f429-evaluation.h +++ b/include/configs/stm32f429-evaluation.h @@ -14,8 +14,6 @@ #define CONFIG_SYS_FLASH_BASE 0x08000000 -#define CONFIG_SYS_INIT_SP_ADDR 0x10010000 - /* * Configuration of the external SDRAM memory */ diff --git a/include/configs/stm32f469-discovery.h b/include/configs/stm32f469-discovery.h index 42e96b03609..2d8b2d27c92 100644 --- a/include/configs/stm32f469-discovery.h +++ b/include/configs/stm32f469-discovery.h @@ -14,8 +14,6 @@ #define CONFIG_SYS_FLASH_BASE 0x08000000 -#define CONFIG_SYS_INIT_SP_ADDR 0x10010000 - /* * Configuration of the external SDRAM memory */ diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h index 3ce8c786abf..ac54c502178 100644 --- a/include/configs/stm32f746-disco.h +++ b/include/configs/stm32f746-disco.h @@ -13,7 +13,6 @@ #define CONFIG_SYS_BOOTMAPSZ SZ_4M + SZ_2M #define CONFIG_SYS_FLASH_BASE 0x08000000 -#define CONFIG_SYS_INIT_SP_ADDR 0x20050000 /* * Configuration of the external SDRAM memory diff --git a/include/configs/stm32h743-disco.h b/include/configs/stm32h743-disco.h index 1a4334c0787..f959fcf26f3 100644 --- a/include/configs/stm32h743-disco.h +++ b/include/configs/stm32h743-disco.h @@ -14,7 +14,6 @@ #define CONFIG_SYS_BOOTMAPSZ SZ_16M #define CONFIG_SYS_FLASH_BASE 0x08000000 -#define CONFIG_SYS_INIT_SP_ADDR 0x24040000 #define CONFIG_SYS_HZ_CLOCK 1000000 diff --git a/include/configs/stm32h743-eval.h b/include/configs/stm32h743-eval.h index 4337a555158..c8688e9ca7b 100644 --- a/include/configs/stm32h743-eval.h +++ b/include/configs/stm32h743-eval.h @@ -14,7 +14,6 @@ #define CONFIG_SYS_BOOTMAPSZ SZ_16M #define CONFIG_SYS_FLASH_BASE 0x08000000 -#define CONFIG_SYS_INIT_SP_ADDR 0x24040000 #define CONFIG_SYS_HZ_CLOCK 1000000 diff --git a/include/configs/stm32h750-art-pi.h b/include/configs/stm32h750-art-pi.h index e082791d619..f7fa8c51d8e 100644 --- a/include/configs/stm32h750-art-pi.h +++ b/include/configs/stm32h750-art-pi.h @@ -14,7 +14,6 @@ #define CONFIG_SYS_BOOTMAPSZ (SZ_16M + SZ_8M) #define CONFIG_SYS_FLASH_BASE 0x90000000 -#define CONFIG_SYS_INIT_SP_ADDR 0x24040000 #define CONFIG_SYS_HZ_CLOCK 1000000 diff --git a/include/configs/stm32mp15_common.h b/include/configs/stm32mp15_common.h index 993c0d5abbe..ead3b91e67a 100644 --- a/include/configs/stm32mp15_common.h +++ b/include/configs/stm32mp15_common.h @@ -14,7 +14,6 @@ * Configuration of the external SRAM memory used by U-Boot */ #define CONFIG_SYS_SDRAM_BASE STM32_DDR_BASE -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE /* * Console I/O buffer size diff --git a/include/configs/stout.h b/include/configs/stout.h index d709c2109f1..4f7fc23dd2d 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -13,10 +13,9 @@ #include "rcar-gen2-common.h" -#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000 #define STACK_AREA_SIZE 0x00100000 #define LOW_LEVEL_MERAM_STACK \ - (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) + (SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) /* MEMORY */ #define RCAR_GEN2_SDRAM_BASE 0x40000000 diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h index caedd8ff2a3..c57b1ad8a06 100644 --- a/include/configs/stv0991.h +++ b/include/configs/stv0991.h @@ -18,11 +18,7 @@ /* MISC */ #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 #define CONFIG_SYS_INIT_RAM_ADDR 0x00190000 -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /* U-Boot Load Address */ -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* GMAC related configs */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 37020871143..35a2a41d228 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -75,11 +75,6 @@ /* FIXME: this may be larger on some SoCs */ #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h index 3278c4b938b..5b862f4f2ee 100644 --- a/include/configs/synquacer.h +++ b/include/configs/synquacer.h @@ -22,7 +22,6 @@ /* * Boot info */ -#define CONFIG_SYS_INIT_SP_ADDR (0xe0000000) /* stack of init proccess */ /* * Hardware drivers support diff --git a/include/configs/taurus.h b/include/configs/taurus.h index c03631aac40..238074bff4c 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -49,8 +49,8 @@ * leaving the correct space for initial global data structure above * that address while providing maximum stack area below. */ -#define CONFIG_SYS_INIT_SP_ADDR \ - (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 +#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1 /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/tb100.h b/include/configs/tb100.h index 09766fea27a..03aeb4f5d2e 100644 --- a/include/configs/tb100.h +++ b/include/configs/tb100.h @@ -16,9 +16,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_128M -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) - #define CONFIG_SYS_BOOTM_LEN SZ_32M /* diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index b7a94812f35..1ebe28b7c1b 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -17,10 +17,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_BOOTMAPSZ 0x10000000 diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index cc7e5c78664..502508d713a 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -54,12 +54,7 @@ #ifndef CONFIG_ARM64 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#endif -#ifndef CONFIG_ARM64 /* Defines for SPL */ #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 #endif diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h index 16dc7d09220..cc3891fd6df 100644 --- a/include/configs/thunderx_88xx.h +++ b/include/configs/thunderx_88xx.h @@ -15,7 +15,6 @@ #define CONFIG_SYS_LOWMEM_BASE MEM_BASE /* Link Definitions */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) /* SMP Spin Table Definitions */ #define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index 41534509b08..9c1f5ea7c8d 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -70,8 +70,6 @@ #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1024MB */ #define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ - GENERATED_GBL_DATA_SIZE) /** * Platform/Board specific defs diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index 3ae8ab90ff9..316a21524f7 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -66,11 +66,6 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x80000000 -#ifndef CONFIG_SYS_INIT_SP_ADDR -#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ - GENERATED_GBL_DATA_SIZE) -#endif - /* If DM_I2C, enable non-DM I2C support */ /* diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 1302377478a..b804bf3a716 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -17,8 +17,6 @@ /* Memory Configuration */ #define CONFIG_SYS_LPAE_SDRAM_BASE 0x800000000 #define CONFIG_MAX_RAM_BANK_SIZE (2 << 30) /* 2GB */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_ISW_ENTRY_ADDR - \ - GENERATED_GBL_DATA_SIZE) #ifdef CONFIG_SYS_MALLOC_F_LEN #define SPL_MALLOC_F_SIZE CONFIG_SYS_MALLOC_F_LEN diff --git a/include/configs/total_compute.h b/include/configs/total_compute.h index c0495b7e153..41297b693cf 100644 --- a/include/configs/total_compute.h +++ b/include/configs/total_compute.h @@ -10,7 +10,6 @@ #define __TOTAL_COMPUTE_H /* Link Definitions */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) #define CONFIG_SYS_BOOTM_LEN (64 << 20) diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h index daeaab80718..3866a433329 100644 --- a/include/configs/tplink_wdr4300.h +++ b/include/configs/tplink_wdr4300.h @@ -13,8 +13,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE) /* * Serial Port diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index e0cd1ec2518..3290ec021fd 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -286,11 +286,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* * All the defines above are for the TQMa6 SoM * diff --git a/include/configs/trats.h b/include/configs/trats.h index 910fc150b18..6ed1c79c89e 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -25,9 +25,6 @@ #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ - - GENERATED_GBL_DATA_SIZE) - /* Tizen - partitions definitions */ #define PARTS_CSA "csa-mmc" #define PARTS_BOOT "boot" diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 3e121bc6909..a4d598d0851 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -24,9 +24,6 @@ #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ - - GENERATED_GBL_DATA_SIZE) - /* Tizen - partitions definitions */ #define PARTS_CSA "csa-mmc" #define PARTS_BOOT "boot" diff --git a/include/configs/turris_mox.h b/include/configs/turris_mox.h index 64b049f4d68..7fa30d04f3c 100644 --- a/include/configs/turris_mox.h +++ b/include/configs/turris_mox.h @@ -10,7 +10,6 @@ #define CONFIG_SYS_BOOTM_LEN (64 << 20) #define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000) #define CONFIG_SYS_BAUDRATE_TABLE { 300, 600, 1200, 1800, 2400, 4800, \ 9600, 19200, 38400, 57600, 115200, \ 230400, 460800, 500000, 576000, \ diff --git a/include/configs/udoo.h b/include/configs/udoo.h index 4bddc0eca30..c8d1ed4da68 100644 --- a/include/configs/udoo.h +++ b/include/configs/udoo.h @@ -58,11 +58,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* Environment organization */ #endif /* __CONFIG_H * */ diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h index 3a7cb050b10..e30b6cc82d8 100644 --- a/include/configs/udoo_neo.h +++ b/include/configs/udoo_neo.h @@ -63,11 +63,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* PMIC */ #define CONFIG_POWER_PFUZE3000 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index c86acc9a42a..f5e096f38da 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -173,8 +173,6 @@ #define CONFIG_SYS_BOOTMAPSZ 0x20000000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE) - /* only for SPL */ #define CONFIG_SPL_STACK (0x00100000) diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h index 2b6078a1cc9..32e8f6be0d1 100644 --- a/include/configs/usb_a9263.h +++ b/include/configs/usb_a9263.h @@ -28,8 +28,8 @@ #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 -#define CONFIG_SYS_INIT_SP_ADDR \ - (ATMEL_BASE_SRAM1 + 16 * 1024 - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024) +#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1 /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h index 1c3545f64dd..2632d56cb1c 100644 --- a/include/configs/usbarmory.h +++ b/include/configs/usbarmory.h @@ -65,9 +65,4 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - #endif /* __CONFIG_H */ diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index f97e39dd206..ef7ef022ce1 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -66,10 +66,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE SZ_2M -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #if defined(CONFIG_ENV_IS_IN_MMC) /* Environment in eMMC, before config block at the end of 1st "boot sector" */ diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index 47956751050..daff4ccadfc 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -83,10 +83,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE SZ_512K -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */ diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index 904ed8df0be..14b92c095a0 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -11,10 +11,8 @@ /* Link Definitions */ #ifdef CONFIG_TARGET_VEXPRESS64_JUNO -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) #else /* ATF loads u-boot here for BASE_FVP model */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000) #endif #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index 86cb56e7a18..ff7307f0904 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -139,9 +139,6 @@ /* additions for new relocation code */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) /* Basic environment settings */ #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index ec9049e1b3d..6ad1ba9e021 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -130,11 +130,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - #ifdef CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_RANGE (512 * 1024) #endif diff --git a/include/configs/vinco.h b/include/configs/vinco.h index 74eccfa2e64..a1572967618 100644 --- a/include/configs/vinco.h +++ b/include/configs/vinco.h @@ -27,9 +27,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x4000000 -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) - /* MMC */ #ifdef CONFIG_CMD_MMC diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index e7d4fd16cc7..a447ec8c344 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -31,11 +31,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* MMC Configuration */ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index d44b4a0750f..d4224127146 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -103,11 +103,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* Environment organization */ #endif /* __CONFIG_H * */ diff --git a/include/configs/warp.h b/include/configs/warp.h index 8bdda377088..74fa03b53d8 100644 --- a/include/configs/warp.h +++ b/include/configs/warp.h @@ -29,11 +29,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* VDD voltage 1.65 - 1.95 */ #define CONFIG_SYS_SD_VOLTAGE 0x00000080 diff --git a/include/configs/warp7.h b/include/configs/warp7.h index b3c9f14c8f4..c00ca4a1117 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -89,11 +89,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* environment organization */ #define CONFIG_SYS_FSL_USDHC_NUM 1 diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index d1515d98cd1..4df58c77beb 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -19,9 +19,6 @@ #define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_128M -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_512K \ - - GENERATED_GBL_DATA_SIZE) - #define CONFIG_RTC_DS1374 /* diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h index 3221bd20a71..55837e1c564 100644 --- a/include/configs/xilinx_versal.h +++ b/include/configs/xilinx_versal.h @@ -14,8 +14,6 @@ #define GICD_BASE 0xF9000000 #define GICR_BASE 0xF9080000 -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE - /* Serial setup */ #define CONFIG_SYS_BAUDRATE_TABLE \ { 4800, 9600, 19200, 38400, 57600, 115200 } diff --git a/include/configs/xilinx_versal_mini_qspi.h b/include/configs/xilinx_versal_mini_qspi.h index 8572b8b3d2d..e2f2df29354 100644 --- a/include/configs/xilinx_versal_mini_qspi.h +++ b/include/configs/xilinx_versal_mini_qspi.h @@ -12,7 +12,4 @@ #include -#undef CONFIG_SYS_INIT_SP_ADDR -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x20000) - #endif /* __CONFIG_VERSAL_MINI_QSPI_H */ diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 8396cdbedec..360660fd333 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -14,8 +14,6 @@ #define GICD_BASE 0xF9010000 #define GICC_BASE 0xF9020000 -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE - /* Serial setup */ #define CONFIG_SYS_BAUDRATE_TABLE \ { 4800, 9600, 19200, 38400, 57600, 115200 } diff --git a/include/configs/xilinx_zynqmp_mini.h b/include/configs/xilinx_zynqmp_mini.h index 94f5f0c4a71..1c0ab25c644 100644 --- a/include/configs/xilinx_zynqmp_mini.h +++ b/include/configs/xilinx_zynqmp_mini.h @@ -16,6 +16,5 @@ /* Undef unneeded configs */ #undef CONFIG_EXTRA_ENV_SETTINGS -#undef CONFIG_SYS_INIT_SP_ADDR #endif /* __CONFIG_ZYNQMP_MINI_H */ diff --git a/include/configs/xilinx_zynqmp_mini_emmc.h b/include/configs/xilinx_zynqmp_mini_emmc.h index 57c40d61020..f423ddd08ec 100644 --- a/include/configs/xilinx_zynqmp_mini_emmc.h +++ b/include/configs/xilinx_zynqmp_mini_emmc.h @@ -12,6 +12,4 @@ #include -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE - #endif /* __CONFIG_ZYNQMP_MINI_EMMC_H */ diff --git a/include/configs/xilinx_zynqmp_mini_nand.h b/include/configs/xilinx_zynqmp_mini_nand.h index 782e6961682..d2c0e91b32e 100644 --- a/include/configs/xilinx_zynqmp_mini_nand.h +++ b/include/configs/xilinx_zynqmp_mini_nand.h @@ -14,6 +14,5 @@ #define CONFIG_SYS_SDRAM_SIZE 0x1000000 #define CONFIG_SYS_SDRAM_BASE 0x0 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x40000) #endif /* __CONFIG_ZYNQMP_MINI_NAND_H */ diff --git a/include/configs/xilinx_zynqmp_mini_qspi.h b/include/configs/xilinx_zynqmp_mini_qspi.h index 3091bae0511..5bea1c9908c 100644 --- a/include/configs/xilinx_zynqmp_mini_qspi.h +++ b/include/configs/xilinx_zynqmp_mini_qspi.h @@ -12,6 +12,4 @@ #include -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x20000) - #endif /* __CONFIG_ZYNQMP_MINI_QSPI_H */ diff --git a/include/configs/xilinx_zynqmp_r5.h b/include/configs/xilinx_zynqmp_r5.h index 50ea1b39078..37750d3d15d 100644 --- a/include/configs/xilinx_zynqmp_r5.h +++ b/include/configs/xilinx_zynqmp_r5.h @@ -17,9 +17,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) /* Extend size of kernel image for uncompression */ #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) diff --git a/include/configs/xpress.h b/include/configs/xpress.h index bd39b328a67..8e36d1c4c3e 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -28,11 +28,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* Environment is in stored in the eMMC boot partition */ /* USB Configs */ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 3c484af7182..440e80c3803 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -201,9 +201,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000 #define CONFIG_SYS_INIT_RAM_SIZE 0x2000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) /* Extend size of kernel image for uncompression */ diff --git a/include/system-constants.h b/include/system-constants.h index 4fd24f46099..de66fece957 100644 --- a/include/system-constants.h +++ b/include/system-constants.h @@ -3,4 +3,20 @@ #ifndef __SYSTEM_CONSTANTS_H__ #define __SYSTEM_CONSTANTS_H__ +/* + * The most common case for our initial stack pointer address is to + * say that we have defined a static intiial ram address location and + * size and from that we subtract the generated global data size. + */ +#ifdef CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR +#define SYS_INIT_SP_ADDR CONFIG_CUSTOM_SYS_INIT_SP_ADDR +#else +#ifdef CONFIG_MIPS +#define SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET) +#else +#define SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#endif +#endif + #endif -- GitLab From f113d7d3034672de7d074506a05a7055f1f0dcae Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 26 May 2022 13:13:21 -0400 Subject: [PATCH 033/581] Convert CONFIG_SPL_STACK to Kconfig This converts the following to Kconfig: CONFIG_SPL_STACK Signed-off-by: Tom Rini --- README | 32 ------------------- arch/microblaze/cpu/start.S | 2 +- common/spl/Kconfig | 18 +++++++++++ configs/A10-OLinuXino-Lime_defconfig | 1 + configs/A10s-OLinuXino-M_defconfig | 1 + configs/A13-OLinuXinoM_defconfig | 1 + configs/A13-OLinuXino_defconfig | 1 + configs/A20-OLinuXino-Lime2-eMMC_defconfig | 1 + configs/A20-OLinuXino-Lime2_defconfig | 1 + configs/A20-OLinuXino-Lime_defconfig | 1 + configs/A20-OLinuXino_MICRO-eMMC_defconfig | 1 + configs/A20-OLinuXino_MICRO_defconfig | 1 + configs/A20-Olimex-SOM-EVB_defconfig | 1 + configs/A20-Olimex-SOM204-EVB-eMMC_defconfig | 1 + configs/A20-Olimex-SOM204-EVB_defconfig | 1 + configs/A33-OLinuXino_defconfig | 1 + configs/Ainol_AW1_defconfig | 1 + configs/Ampe_A76_defconfig | 1 + configs/Auxtek-T003_defconfig | 1 + configs/Auxtek-T004_defconfig | 1 + configs/Bananapi_M2_Ultra_defconfig | 1 + configs/Bananapi_defconfig | 1 + configs/Bananapi_m2m_defconfig | 1 + configs/Bananapro_defconfig | 1 + configs/CHIP_defconfig | 1 + configs/CHIP_pro_defconfig | 1 + configs/CSQ_CS908_defconfig | 1 + configs/Chuwi_V7_CW0825_defconfig | 1 + configs/Colombus_defconfig | 1 + configs/Cubieboard2_defconfig | 1 + configs/Cubieboard4_defconfig | 1 + configs/Cubieboard_defconfig | 1 + configs/Cubietruck_defconfig | 1 + configs/Cubietruck_plus_defconfig | 1 + configs/Empire_electronix_d709_defconfig | 1 + configs/Empire_electronix_m712_defconfig | 1 + configs/Hummingbird_A31_defconfig | 1 + configs/Hyundai_A7HD_defconfig | 1 + configs/Itead_Ibox_A20_defconfig | 1 + configs/Lamobo_R1_defconfig | 1 + configs/LicheePi_Zero_defconfig | 1 + configs/Linksprite_pcDuino3_Nano_defconfig | 1 + configs/Linksprite_pcDuino3_defconfig | 1 + configs/Linksprite_pcDuino_defconfig | 1 + configs/MK808C_defconfig | 1 + configs/MSI_Primo73_defconfig | 1 + configs/MSI_Primo81_defconfig | 1 + configs/Marsboard_A10_defconfig | 1 + configs/Mele_A1000G_quad_defconfig | 1 + configs/Mele_A1000_defconfig | 1 + configs/Mele_I7_defconfig | 1 + configs/Mele_M3_defconfig | 1 + configs/Mele_M5_defconfig | 1 + configs/Mele_M9_defconfig | 1 + configs/Merrii_A80_Optimus_defconfig | 1 + configs/Mini-X_defconfig | 1 + .../Nintendo_NES_Classic_Edition_defconfig | 1 + configs/Orangepi_defconfig | 1 + configs/Orangepi_mini_defconfig | 1 + configs/Sinlinx_SinA31s_defconfig | 1 + configs/Sinlinx_SinA33_defconfig | 1 + configs/Sinovoip_BPI_M2_defconfig | 1 + configs/Sinovoip_BPI_M3_defconfig | 1 + configs/Sunchip_CX-A99_defconfig | 1 + configs/UTOO_P66_defconfig | 1 + configs/Wexler_TAB7200_defconfig | 1 + configs/Wits_Pro_A20_DKT_defconfig | 1 + configs/Wobo_i5_defconfig | 1 + configs/Yones_Toptech_BD1078_defconfig | 1 + configs/Yones_Toptech_BS1078_V2_defconfig | 1 + configs/a64-olinuxino-emmc_defconfig | 1 + configs/a64-olinuxino_defconfig | 1 + configs/alt_defconfig | 2 ++ configs/amarula_a64_relic_defconfig | 1 + configs/apalis-tk1_defconfig | 2 ++ configs/apalis_imx6_defconfig | 2 ++ configs/apalis_t30_defconfig | 2 ++ ...edev_cc_v1_0_ultrazedev_som_v1_0_defconfig | 2 ++ configs/axm_defconfig | 2 ++ configs/ba10_tv_box_defconfig | 1 + configs/bananapi_m1_plus_defconfig | 1 + configs/bananapi_m2_berry_defconfig | 1 + configs/bananapi_m2_plus_h3_defconfig | 1 + configs/bananapi_m2_plus_h5_defconfig | 1 + configs/bananapi_m2_zero_defconfig | 1 + configs/bananapi_m64_defconfig | 1 + configs/beaver_defconfig | 2 ++ configs/beelink_gs1_defconfig | 1 + configs/beelink_x2_defconfig | 1 + configs/bitmain_antminer_s9_defconfig | 2 ++ configs/brppt2_defconfig | 2 ++ configs/cardhu_defconfig | 2 ++ configs/cei-tk1-som_defconfig | 2 ++ configs/cgtqmx8_defconfig | 2 ++ configs/chromebit_mickey_defconfig | 2 ++ configs/chromebook_bob_defconfig | 2 ++ configs/chromebook_jerry_defconfig | 2 ++ configs/chromebook_kevin_defconfig | 2 ++ configs/chromebook_minnie_defconfig | 2 ++ configs/chromebook_speedy_defconfig | 2 ++ configs/ci20_mmc_defconfig | 2 ++ configs/cl-som-imx7_defconfig | 2 ++ configs/clearfog_defconfig | 2 ++ configs/cm_fx6_defconfig | 2 ++ configs/colibri_imx6_defconfig | 2 ++ configs/colibri_t20_defconfig | 2 ++ configs/colibri_t30_defconfig | 2 ++ configs/colorfly_e708_q1_defconfig | 1 + configs/controlcenterdc_defconfig | 2 ++ configs/corvus_defconfig | 2 ++ configs/da850evm_defconfig | 2 ++ configs/da850evm_nand_defconfig | 2 ++ configs/dalmore_defconfig | 2 ++ configs/db-88f6720_defconfig | 2 ++ configs/db-88f6820-amc_defconfig | 2 ++ configs/db-88f6820-gp_defconfig | 2 ++ configs/db-mv784mp-gp_defconfig | 2 ++ configs/deneb_defconfig | 2 ++ configs/devkit3250_defconfig | 2 ++ configs/dh_imx6_defconfig | 2 ++ configs/difrnce_dit4350_defconfig | 1 + configs/display5_defconfig | 2 ++ configs/display5_factory_defconfig | 2 ++ configs/ds414_defconfig | 2 ++ configs/dserve_dsrv9703c_defconfig | 1 + configs/edminiv2_defconfig | 2 ++ configs/emlid_neutis_n5_devboard_defconfig | 1 + configs/evb-px30_defconfig | 2 ++ configs/evb-px5_defconfig | 2 ++ configs/evb-rk3288_defconfig | 2 ++ configs/evb-rk3308_defconfig | 2 ++ configs/evb-rk3328_defconfig | 2 ++ configs/evb-rk3399_defconfig | 2 ++ configs/evb-rk3568_defconfig | 2 ++ configs/ficus-rk3399_defconfig | 2 ++ configs/firefly-px30_defconfig | 2 ++ configs/firefly-rk3288_defconfig | 2 ++ configs/firefly-rk3399_defconfig | 2 ++ configs/ga10h_v1_1_defconfig | 1 + .../gardena-smart-gateway-at91sam_defconfig | 2 ++ configs/ge_b1x5v2_defconfig | 2 ++ configs/giedi_defconfig | 2 ++ configs/gose_defconfig | 2 ++ configs/gt90h_v4_defconfig | 1 + configs/gwventana_emmc_defconfig | 2 ++ configs/gwventana_gw5904_defconfig | 2 ++ configs/gwventana_nand_defconfig | 2 ++ configs/h8_homlet_v2_defconfig | 1 + configs/harmony_defconfig | 2 ++ configs/helios4_defconfig | 2 ++ configs/i12-tvbox_defconfig | 1 + configs/iNet_3F_defconfig | 1 + configs/iNet_3W_defconfig | 1 + configs/iNet_86VS_defconfig | 1 + configs/iNet_D978_rev2_defconfig | 1 + configs/icnova-a20-swac_defconfig | 1 + configs/imx28_xea_defconfig | 2 ++ configs/imx6dl_icore_nand_defconfig | 2 ++ configs/imx6dl_mamoj_defconfig | 2 ++ configs/imx6q_bosch_acc_defconfig | 2 ++ configs/imx6q_icore_nand_defconfig | 2 ++ configs/imx6q_logic_defconfig | 2 ++ configs/imx6qdl_icore_mipi_defconfig | 2 ++ configs/imx6qdl_icore_mmc_defconfig | 2 ++ configs/imx6qdl_icore_nand_defconfig | 2 ++ configs/imx6qdl_icore_rqs_defconfig | 2 ++ configs/imx6ul_geam_mmc_defconfig | 2 ++ configs/imx6ul_geam_nand_defconfig | 2 ++ configs/imx6ul_isiot_emmc_defconfig | 2 ++ configs/imx6ul_isiot_nand_defconfig | 2 ++ configs/imx7_cm_defconfig | 2 ++ configs/imx8mm-cl-iot-gate-optee_defconfig | 2 ++ configs/imx8mm-cl-iot-gate_defconfig | 2 ++ configs/imx8mm-icore-mx8mm-ctouch2_defconfig | 2 ++ configs/imx8mm-icore-mx8mm-edimm2.2_defconfig | 2 ++ configs/imx8mm-mx8menlo_defconfig | 2 ++ configs/imx8mm_beacon_defconfig | 2 ++ configs/imx8mm_data_modul_edm_sbc_defconfig | 2 ++ configs/imx8mm_evk_defconfig | 2 ++ configs/imx8mm_venice_defconfig | 2 ++ configs/imx8mn_beacon_2g_defconfig | 2 ++ configs/imx8mn_beacon_defconfig | 2 ++ configs/imx8mn_bsh_smm_s2_defconfig | 2 ++ configs/imx8mn_bsh_smm_s2pro_defconfig | 2 ++ configs/imx8mn_ddr4_evk_defconfig | 2 ++ configs/imx8mn_evk_defconfig | 2 ++ configs/imx8mn_var_som_defconfig | 2 ++ configs/imx8mn_venice_defconfig | 2 ++ configs/imx8mp_dhcom_pdk2_defconfig | 2 ++ configs/imx8mp_evk_defconfig | 2 ++ configs/imx8mp_rsb3720a1_4G_defconfig | 2 ++ configs/imx8mp_rsb3720a1_6G_defconfig | 2 ++ configs/imx8mp_venice_defconfig | 2 ++ configs/imx8mq_cm_defconfig | 2 ++ configs/imx8mq_evk_defconfig | 2 ++ configs/imx8mq_phanbell_defconfig | 2 ++ configs/imx8qm_mek_defconfig | 2 ++ configs/imx8qxp_mek_defconfig | 2 ++ configs/imx8ulp_evk_defconfig | 2 ++ configs/inet1_defconfig | 1 + configs/inet86dz_defconfig | 1 + configs/inet97fv2_defconfig | 1 + configs/inet98v_rev2_defconfig | 1 + configs/inet9f_rev03_defconfig | 1 + configs/inet_q972_defconfig | 1 + configs/jesurun_q5_defconfig | 1 + configs/jetson-tk1_defconfig | 2 ++ configs/k2e_evm_defconfig | 2 ++ configs/k2g_evm_defconfig | 2 ++ configs/k2hk_evm_defconfig | 2 ++ configs/k2l_evm_defconfig | 2 ++ configs/khadas-edge-captain-rk3399_defconfig | 2 ++ configs/khadas-edge-rk3399_defconfig | 2 ++ configs/khadas-edge-v-rk3399_defconfig | 2 ++ configs/koelsch_defconfig | 2 ++ configs/kontron-sl-mx6ul_defconfig | 2 ++ configs/kontron-sl-mx8mm_defconfig | 2 ++ configs/kontron_pitx_imx8m_defconfig | 2 ++ configs/kontron_sl28_defconfig | 2 ++ configs/kp_imx6q_tpc_defconfig | 2 ++ configs/lager_defconfig | 2 ++ configs/leez-rk3399_defconfig | 2 ++ configs/libretech_all_h3_cc_h2_plus_defconfig | 1 + configs/libretech_all_h3_cc_h3_defconfig | 1 + configs/libretech_all_h3_cc_h5_defconfig | 1 + configs/libretech_all_h3_it_h5_defconfig | 1 + configs/libretech_all_h5_cc_h5_defconfig | 1 + configs/licheepi_nano_defconfig | 1 + configs/lion-rk3368_defconfig | 2 ++ configs/liteboard_defconfig | 2 ++ configs/ls1021aiot_sdcard_defconfig | 2 ++ configs/ls1021aqds_nand_defconfig | 2 ++ configs/ls1021aqds_sdcard_ifc_defconfig | 2 ++ configs/ls1021aqds_sdcard_qspi_defconfig | 2 ++ configs/ls1021atsn_sdcard_defconfig | 2 ++ ...s1021atwr_sdcard_ifc_SECURE_BOOT_defconfig | 2 ++ configs/ls1021atwr_sdcard_ifc_defconfig | 2 ++ configs/ls1021atwr_sdcard_qspi_defconfig | 2 ++ configs/ls1043aqds_nand_defconfig | 2 ++ configs/ls1043aqds_sdcard_ifc_defconfig | 2 ++ configs/ls1043aqds_sdcard_qspi_defconfig | 2 ++ configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 2 ++ configs/ls1043ardb_nand_defconfig | 2 ++ .../ls1043ardb_sdcard_SECURE_BOOT_defconfig | 2 ++ configs/ls1043ardb_sdcard_defconfig | 2 ++ configs/ls1046aqds_nand_defconfig | 2 ++ configs/ls1046aqds_sdcard_ifc_defconfig | 2 ++ configs/ls1046aqds_sdcard_qspi_defconfig | 2 ++ configs/ls1046ardb_emmc_defconfig | 2 ++ configs/ls1046ardb_qspi_spl_defconfig | 2 ++ .../ls1046ardb_sdcard_SECURE_BOOT_defconfig | 2 ++ configs/ls1046ardb_sdcard_defconfig | 2 ++ configs/ls1088aqds_sdcard_ifc_defconfig | 2 ++ configs/ls1088aqds_sdcard_qspi_defconfig | 2 ++ ...1088ardb_sdcard_qspi_SECURE_BOOT_defconfig | 2 ++ configs/ls1088ardb_sdcard_qspi_defconfig | 2 ++ configs/ls2080aqds_nand_defconfig | 2 ++ configs/ls2080aqds_sdcard_defconfig | 2 ++ configs/ls2080ardb_nand_defconfig | 2 ++ configs/m53menlo_defconfig | 2 ++ configs/maxbcm_defconfig | 2 ++ configs/mccmon6_nor_defconfig | 2 ++ configs/mccmon6_sd_defconfig | 2 ++ configs/medcom-wide_defconfig | 2 ++ configs/microblaze-generic_defconfig | 2 ++ configs/miqi-rk3288_defconfig | 2 ++ configs/mixtile_loftq_defconfig | 1 + configs/mk802_a10s_defconfig | 1 + configs/mk802_defconfig | 1 + configs/mk802ii_defconfig | 1 + configs/mk808_defconfig | 2 ++ configs/mt7629_rfb_defconfig | 2 ++ configs/mx6cuboxi_defconfig | 2 ++ configs/mx6memcal_defconfig | 2 ++ configs/mx6sabreauto_defconfig | 2 ++ configs/mx6sabresd_defconfig | 2 ++ configs/mx6slevk_spl_defconfig | 2 ++ configs/mx6ul_14x14_evk_defconfig | 2 ++ configs/mx6ul_9x9_evk_defconfig | 2 ++ configs/myir_mys_6ulx_defconfig | 2 ++ configs/nanopc-t4-rk3399_defconfig | 2 ++ configs/nanopi-m4-2gb-rk3399_defconfig | 2 ++ configs/nanopi-m4-rk3399_defconfig | 2 ++ configs/nanopi-m4b-rk3399_defconfig | 2 ++ configs/nanopi-neo4-rk3399_defconfig | 2 ++ configs/nanopi-r2s-rk3328_defconfig | 2 ++ configs/nanopi-r4s-rk3399_defconfig | 2 ++ configs/nanopi_a64_defconfig | 1 + configs/nanopi_m1_defconfig | 1 + configs/nanopi_m1_plus_defconfig | 1 + configs/nanopi_neo2_defconfig | 1 + configs/nanopi_neo_air_defconfig | 1 + configs/nanopi_neo_defconfig | 1 + configs/nanopi_neo_plus2_defconfig | 1 + configs/nanopi_r1s_h5_defconfig | 1 + configs/novena_defconfig | 2 ++ configs/nyan-big_defconfig | 2 ++ configs/oceanic_5205_5inmfd_defconfig | 1 + configs/odroid-go2_defconfig | 2 ++ configs/omapl138_lcdk_defconfig | 2 ++ configs/openpiton_riscv64_spl_defconfig | 2 ++ configs/opos6uldev_defconfig | 2 ++ configs/orangepi-rk3399_defconfig | 2 ++ configs/orangepi_2_defconfig | 1 + configs/orangepi_3_defconfig | 1 + configs/orangepi_lite2_defconfig | 1 + configs/orangepi_lite_defconfig | 1 + configs/orangepi_one_defconfig | 1 + configs/orangepi_one_plus_defconfig | 1 + configs/orangepi_pc2_defconfig | 1 + configs/orangepi_pc_defconfig | 1 + configs/orangepi_pc_plus_defconfig | 1 + configs/orangepi_plus2e_defconfig | 1 + configs/orangepi_plus_defconfig | 1 + configs/orangepi_prime_defconfig | 1 + configs/orangepi_r1_defconfig | 1 + configs/orangepi_win_defconfig | 1 + configs/orangepi_zero2_defconfig | 1 + configs/orangepi_zero_defconfig | 1 + configs/orangepi_zero_plus2_defconfig | 1 + configs/orangepi_zero_plus2_h3_defconfig | 1 + configs/orangepi_zero_plus_defconfig | 1 + configs/parrot_r16_defconfig | 1 + configs/paz00_defconfig | 2 ++ configs/pcm058_defconfig | 2 ++ configs/phycore-imx8mm_defconfig | 2 ++ configs/phycore-imx8mp_defconfig | 2 ++ configs/phycore-rk3288_defconfig | 2 ++ configs/phycore_pcl063_defconfig | 2 ++ configs/phycore_pcl063_ull_defconfig | 2 ++ configs/pico-dwarf-imx6ul_defconfig | 2 ++ configs/pico-dwarf-imx7d_defconfig | 2 ++ configs/pico-hobbit-imx6ul_defconfig | 2 ++ configs/pico-hobbit-imx7d_defconfig | 2 ++ configs/pico-imx6_defconfig | 2 ++ configs/pico-imx6ul_defconfig | 2 ++ configs/pico-imx7d_bl33_defconfig | 2 ++ configs/pico-imx7d_defconfig | 2 ++ configs/pico-imx8mq_defconfig | 2 ++ configs/pico-nymph-imx7d_defconfig | 2 ++ configs/pico-pi-imx6ul_defconfig | 2 ++ configs/pico-pi-imx7d_defconfig | 2 ++ configs/pine64-lts_defconfig | 1 + configs/pine64_plus_defconfig | 1 + configs/pine_h64_defconfig | 1 + configs/pinebook-pro-rk3399_defconfig | 2 ++ configs/pinebook_defconfig | 1 + configs/pinecube_defconfig | 1 + configs/pinephone_defconfig | 1 + configs/pinetab_defconfig | 1 + configs/plutux_defconfig | 2 ++ configs/polaroid_mid2407pxe03_defconfig | 1 + configs/polaroid_mid2809pxe04_defconfig | 1 + configs/popmetal-rk3288_defconfig | 2 ++ configs/porter_defconfig | 2 ++ configs/pov_protab2_ips9_defconfig | 1 + configs/puma-rk3399_defconfig | 2 ++ configs/px30-core-ctouch2-of10-px30_defconfig | 2 ++ configs/px30-core-ctouch2-px30_defconfig | 2 ++ configs/px30-core-edimm2.2-px30_defconfig | 2 ++ configs/q8_a13_tablet_defconfig | 1 + configs/q8_a23_tablet_800x480_defconfig | 1 + configs/q8_a33_tablet_1024x600_defconfig | 1 + configs/q8_a33_tablet_800x480_defconfig | 1 + configs/r7-tv-dongle_defconfig | 1 + configs/r8a77970_eagle_defconfig | 2 ++ configs/r8a77980_condor_defconfig | 2 ++ configs/r8a77990_ebisu_defconfig | 2 ++ configs/r8a77995_draak_defconfig | 2 ++ configs/r8a779a0_falcon_defconfig | 2 ++ configs/rcar3_salvator-x_defconfig | 2 ++ configs/rcar3_ulcb_defconfig | 2 ++ configs/riotboard_defconfig | 2 ++ configs/roc-cc-rk3308_defconfig | 2 ++ configs/roc-cc-rk3328_defconfig | 2 ++ configs/roc-pc-mezzanine-rk3399_defconfig | 2 ++ configs/roc-pc-rk3399_defconfig | 2 ++ configs/rock-pi-4-rk3399_defconfig | 2 ++ configs/rock-pi-4c-rk3399_defconfig | 2 ++ configs/rock-pi-e-rk3328_defconfig | 2 ++ configs/rock-pi-n10-rk3399pro_defconfig | 2 ++ configs/rock-pi-n8-rk3288_defconfig | 2 ++ configs/rock2_defconfig | 2 ++ configs/rock64-rk3328_defconfig | 2 ++ configs/rock960-rk3399_defconfig | 2 ++ configs/rock_defconfig | 2 ++ configs/rockpro64-rk3399_defconfig | 2 ++ configs/sama5d27_giantboard_defconfig | 2 ++ configs/sama5d27_som1_ek_mmc1_defconfig | 2 ++ configs/sama5d27_som1_ek_mmc_defconfig | 2 ++ configs/sama5d27_som1_ek_qspiflash_defconfig | 2 ++ configs/sama5d27_wlsom1_ek_mmc_defconfig | 2 ++ .../sama5d27_wlsom1_ek_qspiflash_defconfig | 2 ++ configs/sama5d2_icp_mmc_defconfig | 2 ++ configs/sama5d2_xplained_emmc_defconfig | 2 ++ configs/sama5d2_xplained_mmc_defconfig | 2 ++ configs/sama5d2_xplained_qspiflash_defconfig | 2 ++ configs/sama5d2_xplained_spiflash_defconfig | 2 ++ configs/sama5d3_xplained_mmc_defconfig | 2 ++ configs/sama5d3_xplained_nandflash_defconfig | 2 ++ configs/sama5d3xek_mmc_defconfig | 2 ++ configs/sama5d3xek_nandflash_defconfig | 2 ++ configs/sama5d3xek_spiflash_defconfig | 2 ++ configs/sama5d4_xplained_mmc_defconfig | 2 ++ configs/sama5d4_xplained_nandflash_defconfig | 2 ++ configs/sama5d4_xplained_spiflash_defconfig | 2 ++ configs/sama5d4ek_mmc_defconfig | 2 ++ configs/sama5d4ek_nandflash_defconfig | 2 ++ configs/sama5d4ek_spiflash_defconfig | 2 ++ configs/seaboard_defconfig | 2 ++ configs/seeed_npi_imx6ull_defconfig | 2 ++ configs/sifive_unleashed_defconfig | 2 ++ configs/sifive_unmatched_defconfig | 2 ++ configs/silinux_ek874_defconfig | 2 ++ configs/silk_defconfig | 2 ++ configs/smartweb_defconfig | 2 ++ configs/sniper_defconfig | 2 ++ configs/socfpga_agilex_atf_defconfig | 2 ++ configs/socfpga_agilex_defconfig | 2 ++ configs/socfpga_agilex_vab_defconfig | 2 ++ configs/socfpga_arria10_defconfig | 2 ++ configs/socfpga_arria5_defconfig | 2 ++ configs/socfpga_cyclone5_defconfig | 2 ++ configs/socfpga_dbm_soc1_defconfig | 2 ++ configs/socfpga_de0_nano_soc_defconfig | 2 ++ configs/socfpga_de10_nano_defconfig | 2 ++ configs/socfpga_de10_standard_defconfig | 2 ++ configs/socfpga_de1_soc_defconfig | 2 ++ configs/socfpga_is1_defconfig | 2 ++ configs/socfpga_mcvevk_defconfig | 2 ++ configs/socfpga_n5x_atf_defconfig | 2 ++ configs/socfpga_n5x_defconfig | 2 ++ configs/socfpga_n5x_vab_defconfig | 2 ++ configs/socfpga_secu1_defconfig | 2 ++ configs/socfpga_sockit_defconfig | 2 ++ configs/socfpga_socrates_defconfig | 2 ++ configs/socfpga_sr1500_defconfig | 2 ++ configs/socfpga_stratix10_atf_defconfig | 2 ++ configs/socfpga_stratix10_defconfig | 2 ++ configs/socfpga_vining_fpga_defconfig | 2 ++ configs/sopine_baseboard_defconfig | 1 + ...stm32mp15-icore-stm32mp1-ctouch2_defconfig | 2 ++ ...tm32mp15-icore-stm32mp1-edimm2.2_defconfig | 2 ++ ...-microgea-stm32mp1-microdev2-of7_defconfig | 2 ++ ...mp15-microgea-stm32mp1-microdev2_defconfig | 2 ++ configs/stm32mp15_basic_defconfig | 2 ++ configs/stm32mp15_dhcom_basic_defconfig | 2 ++ configs/stm32mp15_dhcor_basic_defconfig | 2 ++ configs/stout_defconfig | 2 ++ configs/sun8i_a23_evb_defconfig | 1 + configs/sunxi_Gemei_G9_defconfig | 1 + configs/syzygy_hub_defconfig | 2 ++ configs/tanix_tx6_defconfig | 1 + configs/taurus_defconfig | 2 ++ configs/tbs_a711_defconfig | 1 + configs/tec-ng_defconfig | 2 ++ configs/tec_defconfig | 2 ++ configs/teres_i_defconfig | 1 + configs/theadorable_debug_defconfig | 2 ++ configs/tinker-rk3288_defconfig | 2 ++ configs/tinker-s-rk3288_defconfig | 2 ++ configs/topic_miami_defconfig | 2 ++ configs/topic_miamilite_defconfig | 2 ++ configs/topic_miamiplus_defconfig | 2 ++ configs/trimslice_defconfig | 2 ++ configs/turris_omnia_defconfig | 2 ++ configs/udoo_defconfig | 2 ++ configs/udoo_neo_defconfig | 2 ++ configs/uniphier_ld4_sld8_defconfig | 2 ++ configs/uniphier_v7_defconfig | 2 ++ configs/variscite_dart6ul_defconfig | 2 ++ configs/venice2_defconfig | 2 ++ configs/ventana_defconfig | 2 ++ configs/verdin-imx8mm_defconfig | 2 ++ configs/verdin-imx8mp_defconfig | 2 ++ configs/vining_2000_defconfig | 2 ++ configs/vyasa-rk3288_defconfig | 2 ++ configs/wandboard_defconfig | 2 ++ configs/work_92105_defconfig | 2 ++ configs/x530_defconfig | 2 ++ configs/xilinx_zynq_virt_defconfig | 2 ++ configs/xilinx_zynqmp_mini_emmc0_defconfig | 2 ++ configs/xilinx_zynqmp_mini_emmc1_defconfig | 2 ++ configs/xilinx_zynqmp_mini_qspi_defconfig | 2 ++ configs/xilinx_zynqmp_virt_defconfig | 2 ++ configs/zeropi_defconfig | 1 + configs/zynq_cse_nand_defconfig | 2 ++ configs/zynq_cse_nor_defconfig | 2 ++ configs/zynq_cse_qspi_defconfig | 2 ++ include/configs/alt.h | 3 -- include/configs/at91sam9m10g45ek.h | 3 -- include/configs/at91sam9n12ek.h | 1 - include/configs/at91sam9x5ek.h | 1 - include/configs/capricorn-common.h | 1 - include/configs/cgtqmx8.h | 1 - include/configs/ci20.h | 1 - include/configs/clearfog.h | 2 -- include/configs/controlcenterdc.h | 2 -- include/configs/corvus.h | 1 - include/configs/da850evm.h | 1 - include/configs/db-88f6720.h | 2 -- include/configs/db-88f6820-amc.h | 2 -- include/configs/db-88f6820-gp.h | 2 -- include/configs/db-mv784mp-gp.h | 2 -- include/configs/devkit3250.h | 12 ------- include/configs/ds414.h | 2 -- include/configs/edminiv2.h | 1 - include/configs/espresso7420.h | 1 - .../configs/gardena-smart-gateway-at91sam.h | 1 - include/configs/gose.h | 3 -- include/configs/helios4.h | 2 -- include/configs/imx6_spl.h | 2 -- include/configs/imx7_spl.h | 1 - include/configs/imx8mm-cl-iot-gate.h | 1 - include/configs/imx8mm_beacon.h | 1 - include/configs/imx8mm_data_modul_edm_sbc.h | 1 - include/configs/imx8mm_evk.h | 1 - include/configs/imx8mm_icore_mx8mm.h | 1 - include/configs/imx8mm_venice.h | 1 - include/configs/imx8mn_beacon.h | 1 - include/configs/imx8mn_bsh_smm_s2_common.h | 1 - include/configs/imx8mn_evk.h | 1 - include/configs/imx8mn_var_som.h | 1 - include/configs/imx8mn_venice.h | 1 - include/configs/imx8mp_dhcom_pdk2.h | 1 - include/configs/imx8mp_evk.h | 1 - include/configs/imx8mp_rsb3720.h | 1 - include/configs/imx8mp_venice.h | 1 - include/configs/imx8mq_cm.h | 1 - include/configs/imx8mq_evk.h | 1 - include/configs/imx8mq_phanbell.h | 1 - include/configs/imx8qm_mek.h | 1 - include/configs/imx8qxp_mek.h | 1 - include/configs/imx8ulp_evk.h | 1 - include/configs/koelsch.h | 1 - include/configs/kontron-sl-mx8mm.h | 1 - include/configs/kontron_pitx_imx8m.h | 1 - include/configs/kontron_sl28.h | 1 - include/configs/lager.h | 1 - include/configs/ls1021aiot.h | 2 -- include/configs/ls1021aqds.h | 4 --- include/configs/ls1021atsn.h | 2 -- include/configs/ls1021atwr.h | 2 -- include/configs/ls1043a_common.h | 4 --- include/configs/ls1046a_common.h | 3 -- include/configs/ls1088a_common.h | 1 - include/configs/ls2080a_common.h | 1 - include/configs/m53menlo.h | 1 - include/configs/maxbcm.h | 2 -- include/configs/microblaze-generic.h | 3 -- include/configs/mt7629.h | 1 - include/configs/omapl138_lcdk.h | 1 - include/configs/openpiton-riscv64.h | 2 -- include/configs/phycore_imx8mm.h | 1 - include/configs/phycore_imx8mp.h | 1 - include/configs/pico-imx8mq.h | 1 - include/configs/pm9g45.h | 1 - include/configs/porter.h | 1 - include/configs/px30_common.h | 1 - include/configs/rcar-gen3-common.h | 1 - include/configs/rk3036_common.h | 2 -- include/configs/rk3066_common.h | 2 -- include/configs/rk3188_common.h | 2 -- include/configs/rk3288_common.h | 2 -- include/configs/rk3308_common.h | 1 - include/configs/rk3328_common.h | 1 - include/configs/rk3368_common.h | 1 - include/configs/rk3399_common.h | 2 -- include/configs/rk3568_common.h | 1 - include/configs/sam9x60_curiosity.h | 2 -- include/configs/sama5d27_som1_ek.h | 1 - include/configs/sama5d27_wlsom1_ek.h | 1 - include/configs/sama5d2_icp.h | 2 -- include/configs/sama5d2_xplained.h | 1 - include/configs/sama5d3_xplained.h | 2 -- include/configs/sama5d3xek.h | 2 -- include/configs/sama5d4_xplained.h | 2 -- include/configs/sama5d4ek.h | 2 -- include/configs/sama7g5ek.h | 2 -- include/configs/sifive-unleashed.h | 3 -- include/configs/sifive-unmatched.h | 3 -- include/configs/silk.h | 1 - include/configs/smartweb.h | 1 - include/configs/sniper.h | 1 - include/configs/socfpga_common.h | 4 --- include/configs/socfpga_soc64_common.h | 3 -- include/configs/stm32mp15_common.h | 2 -- include/configs/stout.h | 1 - include/configs/sunxi-common.h | 2 -- include/configs/taurus.h | 1 - include/configs/tegra114-common.h | 1 - include/configs/tegra124-common.h | 1 - include/configs/tegra20-common.h | 1 - include/configs/tegra30-common.h | 1 - include/configs/theadorable.h | 2 -- include/configs/ti_armv7_keystone2.h | 4 --- include/configs/turris_omnia.h | 2 -- include/configs/uniphier.h | 1 - include/configs/verdin-imx8mm.h | 1 - include/configs/verdin-imx8mp.h | 1 - include/configs/work_92105.h | 1 - include/configs/x530.h | 2 -- include/configs/xea.h | 1 - include/configs/xilinx_zynqmp.h | 2 -- include/configs/zynq-common.h | 1 - 605 files changed, 831 insertions(+), 220 deletions(-) diff --git a/README b/README index 02a2a3ff882..360d357bfbc 100644 --- a/README +++ b/README @@ -293,33 +293,6 @@ board_init_r(): SPL-specific notes: - stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and - CONFIG_SPL_STACK_R_ADDR points into SDRAM - - preloader_console_init() can be called here - typically this is - done by selecting CONFIG_SPL_BOARD_INIT and then supplying a - spl_board_init() function containing this call - - loads U-Boot or (in falcon mode) Linux - - -Configuration Options: ----------------------- - -Configuration depends on the combination of board and CPU type; all -such information is kept in a configuration file -"include/configs/.h". - -Example: For a TQM823L module, all configuration settings are in -"include/configs/TQM823L.h". - - -Many of the options are named exactly as the corresponding Linux -kernel configuration options. The intention is to make it easier to -build a config tool - later. - -- ARM Platform Bus Type(CCI): - CoreLink Cache Coherent Interconnect (CCI) is ARM BUS which - provides full cache coherency between two clusters of multi-core - CPUs and I/O coherency for devices and I/O masters - CONFIG_SYS_FSL_HAS_CCI400 Defined For SoC that has cache coherent interconnect @@ -1659,9 +1632,6 @@ The following options need to be configured: CONFIG_SPL_BSS_START_ADDR Link address for the BSS within the SPL binary. - CONFIG_SPL_STACK - Adress of the start of the stack SPL will use - CONFIG_SPL_PANIC_ON_RAW_IMAGE When defined, SPL will panic() if the image it has loaded does not have a signature. @@ -1675,8 +1645,6 @@ The following options need to be configured: CONFIG_SPL_RELOC_STACK Adress of the start of the stack SPL will use after relocation. If unspecified, this is equal to - CONFIG_SPL_STACK. - CONFIG_SYS_SPL_MALLOC_START Starting address of the malloc pool used in SPL. When this option is set the full malloc is used in SPL and diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 645f7cb0389..25e9968e4c6 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -19,7 +19,7 @@ _start: mts rslr, r8 #if defined(CONFIG_SPL_BUILD) - addi r1, r0, CONFIG_SPL_STACK_ADDR + addi r1, r0, CONFIG_SPL_STACK #else addi r1, r0, CONFIG_SYS_INIT_SP_OFFSET #endif diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 3cee3c323e8..89288797513 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -357,6 +357,24 @@ config TPL_SYS_MALLOC_SIMPLE this will make the TPL binary smaller at the cost of more heap usage as the *_simple malloc functions do not re-use free-ed mem. +config SPL_SHARES_INIT_SP_ADDR + bool "SPL and U-Boot use the same initial stack pointer location" + depends on (ARM || ARCH_JZ47XX || MICROBLAZE || RISCV) && SPL_FRAMEWORK + default n if ARCH_SUNXI + default y + help + In many cases, we can use the same initial stack pointer address for + both SPL and U-Boot itself. If you need to specify a different address + however, say N here and then set a different value in CONFIG_SPL_STACK. + +config SPL_STACK + hex "Initial stack pointer location" + depends on (ARM || ARCH_JZ47XX || MICROBLAZE || RISCV) && SPL_FRAMEWORK + depends on !SPL_SHARES_INIT_SP_ADDR + help + Address of the start of the stack SPL will use before SDRAM is + initialized. + config SPL_STACK_R bool "Enable SDRAM location for SPL stack" help diff --git a/configs/A10-OLinuXino-Lime_defconfig b/configs/A10-OLinuXino-Lime_defconfig index 07e6e3f0099..026668b0bd0 100644 --- a/configs/A10-OLinuXino-Lime_defconfig +++ b/configs/A10-OLinuXino-Lime_defconfig @@ -11,6 +11,7 @@ CONFIG_I2C1_ENABLE=y CONFIG_SATAPWR="PC3" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y diff --git a/configs/A10s-OLinuXino-M_defconfig b/configs/A10s-OLinuXino-M_defconfig index 2aeaffacd0c..7e9b92ee5ee 100644 --- a/configs/A10s-OLinuXino-M_defconfig +++ b/configs/A10s-OLinuXino-M_defconfig @@ -9,6 +9,7 @@ CONFIG_MMC1_CD_PIN="PG13" CONFIG_MMC_SUNXI_SLOT_EXTRA=1 CONFIG_USB1_VBUS_PIN="PB10" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/A13-OLinuXinoM_defconfig b/configs/A13-OLinuXinoM_defconfig index 4f39d70f815..625a331e445 100644 --- a/configs/A13-OLinuXinoM_defconfig +++ b/configs/A13-OLinuXinoM_defconfig @@ -13,6 +13,7 @@ CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH=y CONFIG_VIDEO_LCD_POWER="PB10" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig index 0746061317b..5e0396c150f 100644 --- a/configs/A13-OLinuXino_defconfig +++ b/configs/A13-OLinuXino_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH=y CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_DFU=y diff --git a/configs/A20-OLinuXino-Lime2-eMMC_defconfig b/configs/A20-OLinuXino-Lime2-eMMC_defconfig index 45f9e9e07d0..e0db1e67388 100644 --- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig +++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig @@ -13,6 +13,7 @@ CONFIG_SATAPWR="PC3" CONFIG_SPL_SPI_SUNXI=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_DFU=y diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig index 187d8a5e6b6..a78cbfb1391 100644 --- a/configs/A20-OLinuXino-Lime2_defconfig +++ b/configs/A20-OLinuXino-Lime2_defconfig @@ -11,6 +11,7 @@ CONFIG_I2C1_ENABLE=y CONFIG_SATAPWR="PC3" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_DFU=y diff --git a/configs/A20-OLinuXino-Lime_defconfig b/configs/A20-OLinuXino-Lime_defconfig index 1964fb6aa3d..da3532ccc46 100644 --- a/configs/A20-OLinuXino-Lime_defconfig +++ b/configs/A20-OLinuXino-Lime_defconfig @@ -9,6 +9,7 @@ CONFIG_I2C1_ENABLE=y CONFIG_SATAPWR="PC3" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y diff --git a/configs/A20-OLinuXino_MICRO-eMMC_defconfig b/configs/A20-OLinuXino_MICRO-eMMC_defconfig index e4892cc5176..0563a5188e6 100644 --- a/configs/A20-OLinuXino_MICRO-eMMC_defconfig +++ b/configs/A20-OLinuXino_MICRO-eMMC_defconfig @@ -11,6 +11,7 @@ CONFIG_VIDEO_VGA=y CONFIG_SATAPWR="PB8" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y diff --git a/configs/A20-OLinuXino_MICRO_defconfig b/configs/A20-OLinuXino_MICRO_defconfig index e491e73ccba..4993cf7d2d7 100644 --- a/configs/A20-OLinuXino_MICRO_defconfig +++ b/configs/A20-OLinuXino_MICRO_defconfig @@ -12,6 +12,7 @@ CONFIG_VIDEO_VGA=y CONFIG_SATAPWR="PB8" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y diff --git a/configs/A20-Olimex-SOM-EVB_defconfig b/configs/A20-Olimex-SOM-EVB_defconfig index 3685a93ca50..0db97ae8415 100644 --- a/configs/A20-Olimex-SOM-EVB_defconfig +++ b/configs/A20-Olimex-SOM-EVB_defconfig @@ -12,6 +12,7 @@ CONFIG_USB0_VBUS_DET="PH5" CONFIG_SATAPWR="PC3" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y diff --git a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig index 24294daaaf8..91d29e44469 100644 --- a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig +++ b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig @@ -13,6 +13,7 @@ CONFIG_SATAPWR="PC3" CONFIG_GMAC_TX_DELAY=4 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y diff --git a/configs/A20-Olimex-SOM204-EVB_defconfig b/configs/A20-Olimex-SOM204-EVB_defconfig index 5dd6f77b7b6..893f2e627d5 100644 --- a/configs/A20-Olimex-SOM204-EVB_defconfig +++ b/configs/A20-Olimex-SOM204-EVB_defconfig @@ -12,6 +12,7 @@ CONFIG_SATAPWR="PC3" CONFIG_GMAC_TX_DELAY=4 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y diff --git a/configs/A33-OLinuXino_defconfig b/configs/A33-OLinuXino_defconfig index 786fc6cf376..c9eec1f8879 100644 --- a/configs/A33-OLinuXino_defconfig +++ b/configs/A33-OLinuXino_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_BL_EN="PB2" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DCDC1_VOLT=3300 CONFIG_USB_MUSB_HOST=y diff --git a/configs/Ainol_AW1_defconfig b/configs/Ainol_AW1_defconfig index 89cad5d6c78..8cd38f7905b 100644 --- a/configs/Ainol_AW1_defconfig +++ b/configs/Ainol_AW1_defconfig @@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Ampe_A76_defconfig b/configs/Ampe_A76_defconfig index b0039243709..68707ed3e95 100644 --- a/configs/Ampe_A76_defconfig +++ b/configs/Ampe_A76_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Auxtek-T003_defconfig b/configs/Auxtek-T003_defconfig index 0f38a85f9f8..703df186b27 100644 --- a/configs/Auxtek-T003_defconfig +++ b/configs/Auxtek-T003_defconfig @@ -8,6 +8,7 @@ CONFIG_DRAM_EMR1=0 CONFIG_USB1_VBUS_PIN="PB10" CONFIG_VIDEO_COMPOSITE=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Auxtek-T004_defconfig b/configs/Auxtek-T004_defconfig index f201bd10819..a8d236eaf9d 100644 --- a/configs/Auxtek-T004_defconfig +++ b/configs/Auxtek-T004_defconfig @@ -6,6 +6,7 @@ CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 CONFIG_USB1_VBUS_PIN="PG13" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Bananapi_M2_Ultra_defconfig b/configs/Bananapi_M2_Ultra_defconfig index 79eb3ede772..7d9c688171d 100644 --- a/configs/Bananapi_M2_Ultra_defconfig +++ b/configs/Bananapi_M2_Ultra_defconfig @@ -12,6 +12,7 @@ CONFIG_USB2_VBUS_PIN="PH23" # CONFIG_HAS_ARMV7_SECURE_BASE is not set CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig index f1b0b6da8f2..6cc2d5b6472 100644 --- a/configs/Bananapi_defconfig +++ b/configs/Bananapi_defconfig @@ -9,6 +9,7 @@ CONFIG_VIDEO_COMPOSITE=y CONFIG_GMAC_TX_DELAY=3 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_NETCONSOLE=y diff --git a/configs/Bananapi_m2m_defconfig b/configs/Bananapi_m2m_defconfig index ba26aa1861a..6a07f26c02c 100644 --- a/configs/Bananapi_m2m_defconfig +++ b/configs/Bananapi_m2m_defconfig @@ -10,6 +10,7 @@ CONFIG_MMC0_CD_PIN="PB4" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB0_ID_DET="PH8" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/Bananapro_defconfig b/configs/Bananapro_defconfig index 9214a9b6960..19b644613a6 100644 --- a/configs/Bananapro_defconfig +++ b/configs/Bananapro_defconfig @@ -11,6 +11,7 @@ CONFIG_VIDEO_COMPOSITE=y CONFIG_GMAC_TX_DELAY=3 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_NETCONSOLE=y diff --git a/configs/CHIP_defconfig b/configs/CHIP_defconfig index be092cd0949..40d2c5b668a 100644 --- a/configs/CHIP_defconfig +++ b/configs/CHIP_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y CONFIG_USB0_VBUS_PIN="PB10" CONFIG_VIDEO_COMPOSITE=y CONFIG_CHIP_DIP_SCAN=y +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_DFU=y diff --git a/configs/CHIP_pro_defconfig b/configs/CHIP_pro_defconfig index 16456c1dea5..90168010bb8 100644 --- a/configs/CHIP_pro_defconfig +++ b/configs/CHIP_pro_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y CONFIG_USB0_VBUS_PIN="PB10" +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 # CONFIG_CMD_FLASH is not set diff --git a/configs/CSQ_CS908_defconfig b/configs/CSQ_CS908_defconfig index f79bc78f24d..49be3fc4a2d 100644 --- a/configs/CSQ_CS908_defconfig +++ b/configs/CSQ_CS908_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=432 CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/Chuwi_V7_CW0825_defconfig b/configs/Chuwi_V7_CW0825_defconfig index d517ab9a7ca..b59d1786e6e 100644 --- a/configs/Chuwi_V7_CW0825_defconfig +++ b/configs/Chuwi_V7_CW0825_defconfig @@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_HITACHI_TX18D42VM=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Colombus_defconfig b/configs/Colombus_defconfig index 5f194606121..24b55bfa8cc 100644 --- a/configs/Colombus_defconfig +++ b/configs/Colombus_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_BL_EN="PM1" CONFIG_VIDEO_LCD_BL_PWM="PH13" CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Cubieboard2_defconfig b/configs/Cubieboard2_defconfig index 0be8a07aa62..794d6668d2f 100644 --- a/configs/Cubieboard2_defconfig +++ b/configs/Cubieboard2_defconfig @@ -8,6 +8,7 @@ CONFIG_MMC0_CD_PIN="PH1" CONFIG_SATAPWR="PB8" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y diff --git a/configs/Cubieboard4_defconfig b/configs/Cubieboard4_defconfig index 82b3ac10f96..928299e8a51 100644 --- a/configs/Cubieboard4_defconfig +++ b/configs/Cubieboard4_defconfig @@ -12,6 +12,7 @@ CONFIG_USB0_ID_DET="PH16" CONFIG_USB1_VBUS_PIN="PH14" CONFIG_USB3_VBUS_PIN="PH15" CONFIG_AXP_GPIO=y +CONFIG_SPL_STACK=0x18000 CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_SUN8I_RSB=y CONFIG_AXP809_POWER=y diff --git a/configs/Cubieboard_defconfig b/configs/Cubieboard_defconfig index 31d4fb4709f..1027c5e3bf9 100644 --- a/configs/Cubieboard_defconfig +++ b/configs/Cubieboard_defconfig @@ -8,6 +8,7 @@ CONFIG_MMC0_CD_PIN="PH1" CONFIG_SATAPWR="PB8" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig index fc692ff761a..560248dc5b1 100644 --- a/configs/Cubietruck_defconfig +++ b/configs/Cubietruck_defconfig @@ -13,6 +13,7 @@ CONFIG_SATAPWR="PH12" CONFIG_GMAC_TX_DELAY=1 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_DFU=y diff --git a/configs/Cubietruck_plus_defconfig b/configs/Cubietruck_plus_defconfig index cbd77cfc029..8119b8b9cf6 100644 --- a/configs/Cubietruck_plus_defconfig +++ b/configs/Cubietruck_plus_defconfig @@ -16,6 +16,7 @@ CONFIG_I2C0_ENABLE=y CONFIG_AXP_GPIO=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Empire_electronix_d709_defconfig b/configs/Empire_electronix_d709_defconfig index d1b76663fbc..0187b896f87 100644 --- a/configs/Empire_electronix_d709_defconfig +++ b/configs/Empire_electronix_d709_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Empire_electronix_m712_defconfig b/configs/Empire_electronix_m712_defconfig index e2d8a21a64a..6570b97ca4c 100644 --- a/configs/Empire_electronix_m712_defconfig +++ b/configs/Empire_electronix_m712_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Hummingbird_A31_defconfig b/configs/Hummingbird_A31_defconfig index 20144b23028..3afe4c56ae4 100644 --- a/configs/Hummingbird_A31_defconfig +++ b/configs/Hummingbird_A31_defconfig @@ -9,6 +9,7 @@ CONFIG_USB2_VBUS_PIN="" CONFIG_VIDEO_VGA_VIA_LCD=y CONFIG_VIDEO_VGA_EXTERNAL_DAC_EN="PH25" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/Hyundai_A7HD_defconfig b/configs/Hyundai_A7HD_defconfig index 0c655b24e76..8bf7d1efba6 100644 --- a/configs/Hyundai_A7HD_defconfig +++ b/configs/Hyundai_A7HD_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW is not set CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Itead_Ibox_A20_defconfig b/configs/Itead_Ibox_A20_defconfig index b8f1350c878..42cb24e88ef 100644 --- a/configs/Itead_Ibox_A20_defconfig +++ b/configs/Itead_Ibox_A20_defconfig @@ -8,6 +8,7 @@ CONFIG_MMC0_CD_PIN="PH1" CONFIG_SATAPWR="PB8" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y diff --git a/configs/Lamobo_R1_defconfig b/configs/Lamobo_R1_defconfig index 8b25863b30c..d4692f8184a 100644 --- a/configs/Lamobo_R1_defconfig +++ b/configs/Lamobo_R1_defconfig @@ -10,6 +10,7 @@ CONFIG_SATAPWR="PB3" CONFIG_GMAC_TX_DELAY=4 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y diff --git a/configs/LicheePi_Zero_defconfig b/configs/LicheePi_Zero_defconfig index 5bc36f29680..2e0b0b71e14 100644 --- a/configs/LicheePi_Zero_defconfig +++ b/configs/LicheePi_Zero_defconfig @@ -5,5 +5,6 @@ CONFIG_SPL=y CONFIG_MACH_SUN8I_V3S=y CONFIG_DRAM_CLK=360 # CONFIG_HAS_ARMV7_SECURE_BASE is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 # CONFIG_NETDEVICES is not set diff --git a/configs/Linksprite_pcDuino3_Nano_defconfig b/configs/Linksprite_pcDuino3_Nano_defconfig index 37726bedf89..dbafdd5bd80 100644 --- a/configs/Linksprite_pcDuino3_Nano_defconfig +++ b/configs/Linksprite_pcDuino3_Nano_defconfig @@ -10,6 +10,7 @@ CONFIG_SATAPWR="PH2" CONFIG_GMAC_TX_DELAY=3 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y diff --git a/configs/Linksprite_pcDuino3_defconfig b/configs/Linksprite_pcDuino3_defconfig index 4545bdcd999..ff6a4e8b379 100644 --- a/configs/Linksprite_pcDuino3_defconfig +++ b/configs/Linksprite_pcDuino3_defconfig @@ -8,6 +8,7 @@ CONFIG_DRAM_ZQ=122 CONFIG_SATAPWR="PH2" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y diff --git a/configs/Linksprite_pcDuino_defconfig b/configs/Linksprite_pcDuino_defconfig index c671bab2e7a..279641551b3 100644 --- a/configs/Linksprite_pcDuino_defconfig +++ b/configs/Linksprite_pcDuino_defconfig @@ -6,6 +6,7 @@ CONFIG_MACH_SUN4I=y CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/MK808C_defconfig b/configs/MK808C_defconfig index f4d31b39240..4e678bdf051 100644 --- a/configs/MK808C_defconfig +++ b/configs/MK808C_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/MSI_Primo73_defconfig b/configs/MSI_Primo73_defconfig index 5a43945596a..7a4b224bf2a 100644 --- a/configs/MSI_Primo73_defconfig +++ b/configs/MSI_Primo73_defconfig @@ -10,6 +10,7 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/MSI_Primo81_defconfig b/configs/MSI_Primo81_defconfig index de1b6884b8f..bb820fd0a39 100644 --- a/configs/MSI_Primo81_defconfig +++ b/configs/MSI_Primo81_defconfig @@ -13,6 +13,7 @@ CONFIG_VIDEO_LCD_BL_EN="PA25" CONFIG_VIDEO_LCD_BL_PWM="PH13" CONFIG_VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 # CONFIG_REQUIRE_SERIAL_CONSOLE is not set diff --git a/configs/Marsboard_A10_defconfig b/configs/Marsboard_A10_defconfig index 8ba587db9cb..c88cfd6aa32 100644 --- a/configs/Marsboard_A10_defconfig +++ b/configs/Marsboard_A10_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Mele_A1000G_quad_defconfig b/configs/Mele_A1000G_quad_defconfig index 13f418fb0cc..8ee6791408a 100644 --- a/configs/Mele_A1000G_quad_defconfig +++ b/configs/Mele_A1000G_quad_defconfig @@ -8,6 +8,7 @@ CONFIG_INITIAL_USB_SCAN_DELAY=2000 CONFIG_USB1_VBUS_PIN="PC27" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/Mele_A1000_defconfig b/configs/Mele_A1000_defconfig index a62ca5d2f18..429baf3faf2 100644 --- a/configs/Mele_A1000_defconfig +++ b/configs/Mele_A1000_defconfig @@ -8,6 +8,7 @@ CONFIG_VIDEO_VGA=y CONFIG_VIDEO_COMPOSITE=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y diff --git a/configs/Mele_I7_defconfig b/configs/Mele_I7_defconfig index 62cb674d295..48dad606b88 100644 --- a/configs/Mele_I7_defconfig +++ b/configs/Mele_I7_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_ZQ=120 CONFIG_USB1_VBUS_PIN="PC27" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/Mele_M3_defconfig b/configs/Mele_M3_defconfig index fce30278d49..ce962395a25 100644 --- a/configs/Mele_M3_defconfig +++ b/configs/Mele_M3_defconfig @@ -9,6 +9,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_VIDEO_VGA=y CONFIG_VIDEO_COMPOSITE=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Mele_M5_defconfig b/configs/Mele_M5_defconfig index 79ea3f0db29..a426729700e 100644 --- a/configs/Mele_M5_defconfig +++ b/configs/Mele_M5_defconfig @@ -9,6 +9,7 @@ CONFIG_MMC0_CD_PIN="PH1" CONFIG_VIDEO_COMPOSITE=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y diff --git a/configs/Mele_M9_defconfig b/configs/Mele_M9_defconfig index 1338e0973db..b84a2aebe20 100644 --- a/configs/Mele_M9_defconfig +++ b/configs/Mele_M9_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_ZQ=120 CONFIG_USB1_VBUS_PIN="PC27" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/Merrii_A80_Optimus_defconfig b/configs/Merrii_A80_Optimus_defconfig index 5f008a206e7..3709a11ec03 100644 --- a/configs/Merrii_A80_Optimus_defconfig +++ b/configs/Merrii_A80_Optimus_defconfig @@ -12,6 +12,7 @@ CONFIG_USB0_ID_DET="PH3" CONFIG_USB1_VBUS_PIN="PH4" CONFIG_USB3_VBUS_PIN="PH5" CONFIG_AXP_GPIO=y +CONFIG_SPL_STACK=0x18000 CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_SUN8I_RSB=y CONFIG_AXP809_POWER=y diff --git a/configs/Mini-X_defconfig b/configs/Mini-X_defconfig index 61f880e15d9..76b6b7d2bce 100644 --- a/configs/Mini-X_defconfig +++ b/configs/Mini-X_defconfig @@ -6,6 +6,7 @@ CONFIG_MACH_SUN4I=y CONFIG_USB0_VBUS_PIN="PB9" CONFIG_VIDEO_COMPOSITE=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Nintendo_NES_Classic_Edition_defconfig b/configs/Nintendo_NES_Classic_Edition_defconfig index 84b36a02b62..5b1a1d40614 100644 --- a/configs/Nintendo_NES_Classic_Edition_defconfig +++ b/configs/Nintendo_NES_Classic_Edition_defconfig @@ -9,6 +9,7 @@ CONFIG_DRAM_ODT_EN=y CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT" CONFIG_AXP_GPIO=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTDPARTS=y diff --git a/configs/Orangepi_defconfig b/configs/Orangepi_defconfig index eed986aa15c..e7cf38ac7d1 100644 --- a/configs/Orangepi_defconfig +++ b/configs/Orangepi_defconfig @@ -12,6 +12,7 @@ CONFIG_VIDEO_COMPOSITE=y CONFIG_GMAC_TX_DELAY=3 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y diff --git a/configs/Orangepi_mini_defconfig b/configs/Orangepi_mini_defconfig index 974826baed0..494edf0625e 100644 --- a/configs/Orangepi_mini_defconfig +++ b/configs/Orangepi_mini_defconfig @@ -14,6 +14,7 @@ CONFIG_VIDEO_COMPOSITE=y CONFIG_GMAC_TX_DELAY=3 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y diff --git a/configs/Sinlinx_SinA31s_defconfig b/configs/Sinlinx_SinA31s_defconfig index 4495b806ceb..2d33331f3d3 100644 --- a/configs/Sinlinx_SinA31s_defconfig +++ b/configs/Sinlinx_SinA31s_defconfig @@ -10,6 +10,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=3 CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/Sinlinx_SinA33_defconfig b/configs/Sinlinx_SinA33_defconfig index 0f30dfc1dc9..fcee14b5462 100644 --- a/configs/Sinlinx_SinA33_defconfig +++ b/configs/Sinlinx_SinA33_defconfig @@ -13,6 +13,7 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_DFU=y CONFIG_DFU_RAM=y diff --git a/configs/Sinovoip_BPI_M2_defconfig b/configs/Sinovoip_BPI_M2_defconfig index ebb9e352264..c080a247105 100644 --- a/configs/Sinovoip_BPI_M2_defconfig +++ b/configs/Sinovoip_BPI_M2_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=432 CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/Sinovoip_BPI_M3_defconfig b/configs/Sinovoip_BPI_M3_defconfig index 23240a138c4..32ec5deca7d 100644 --- a/configs/Sinovoip_BPI_M3_defconfig +++ b/configs/Sinovoip_BPI_M3_defconfig @@ -17,6 +17,7 @@ CONFIG_AXP_GPIO=y CONFIG_SATAPWR="PD25" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_REALTEK=y CONFIG_SUN8I_EMAC=y diff --git a/configs/Sunchip_CX-A99_defconfig b/configs/Sunchip_CX-A99_defconfig index ee0c15b9c0a..749bf1cff9d 100644 --- a/configs/Sunchip_CX-A99_defconfig +++ b/configs/Sunchip_CX-A99_defconfig @@ -12,4 +12,5 @@ CONFIG_USB0_VBUS_PIN="PH15" CONFIG_USB1_VBUS_PIN="PL7" CONFIG_USB3_VBUS_PIN="PL8" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x18000 CONFIG_SYS_PBSIZE=1024 diff --git a/configs/UTOO_P66_defconfig b/configs/UTOO_P66_defconfig index 64ab3821890..4e6652db18f 100644 --- a/configs/UTOO_P66_defconfig +++ b/configs/UTOO_P66_defconfig @@ -20,6 +20,7 @@ CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_TL059WV5C0=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Wexler_TAB7200_defconfig b/configs/Wexler_TAB7200_defconfig index 9ecb64b3d56..f63d18c327f 100644 --- a/configs/Wexler_TAB7200_defconfig +++ b/configs/Wexler_TAB7200_defconfig @@ -13,6 +13,7 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Wits_Pro_A20_DKT_defconfig b/configs/Wits_Pro_A20_DKT_defconfig index 7deea8af63e..09608dd1cc2 100644 --- a/configs/Wits_Pro_A20_DKT_defconfig +++ b/configs/Wits_Pro_A20_DKT_defconfig @@ -12,6 +12,7 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y diff --git a/configs/Wobo_i5_defconfig b/configs/Wobo_i5_defconfig index 95279c3ccc9..ab919c0795a 100644 --- a/configs/Wobo_i5_defconfig +++ b/configs/Wobo_i5_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=432 CONFIG_MMC0_CD_PIN="PB3" CONFIG_USB1_VBUS_PIN="PG12" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Yones_Toptech_BD1078_defconfig b/configs/Yones_Toptech_BD1078_defconfig index 89196e8ba28..1117e147cc1 100644 --- a/configs/Yones_Toptech_BD1078_defconfig +++ b/configs/Yones_Toptech_BD1078_defconfig @@ -19,6 +19,7 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW is not set CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Yones_Toptech_BS1078_V2_defconfig b/configs/Yones_Toptech_BS1078_V2_defconfig index a14881b3293..ef30aee8281 100644 --- a/configs/Yones_Toptech_BS1078_V2_defconfig +++ b/configs/Yones_Toptech_BS1078_V2_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_BL_EN="PA25" CONFIG_VIDEO_LCD_BL_PWM="PH13" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_USB_MUSB_HOST=y diff --git a/configs/a64-olinuxino-emmc_defconfig b/configs/a64-olinuxino-emmc_defconfig index 6a1289758aa..7d8e7649f2a 100644 --- a/configs/a64-olinuxino-emmc_defconfig +++ b/configs/a64-olinuxino-emmc_defconfig @@ -6,6 +6,7 @@ CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SUN8I_EMAC=y diff --git a/configs/a64-olinuxino_defconfig b/configs/a64-olinuxino_defconfig index 89618ac6a70..06f51a8f8d3 100644 --- a/configs/a64-olinuxino_defconfig +++ b/configs/a64-olinuxino_defconfig @@ -6,6 +6,7 @@ CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/alt_defconfig b/configs/alt_defconfig index 897b3a230e2..4e73e6af7d7 100644 --- a/configs/alt_defconfig +++ b/configs/alt_defconfig @@ -34,6 +34,8 @@ CONFIG_SPL_MAX_SIZE=0x4000 CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xe6340000 CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/amarula_a64_relic_defconfig b/configs/amarula_a64_relic_defconfig index 2811667c511..0e173c28c12 100644 --- a/configs/amarula_a64_relic_defconfig +++ b/configs/amarula_a64_relic_defconfig @@ -7,6 +7,7 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_VIDEO_DE2 is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/apalis-tk1_defconfig b/configs/apalis-tk1_defconfig index 548ff2e2152..3c004695897 100644 --- a/configs/apalis-tk1_defconfig +++ b/configs/apalis-tk1_defconfig @@ -23,6 +23,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x800ffffc CONFIG_SYS_PROMPT="Apalis TK1 # " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=1024 diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index 11ee2f3d34a..96483af9442 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -36,6 +36,8 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_DMA=y CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y diff --git a/configs/apalis_t30_defconfig b/configs/apalis_t30_defconfig index b665ca2f4b4..5b31d4c9943 100644 --- a/configs/apalis_t30_defconfig +++ b/configs/apalis_t30_defconfig @@ -19,6 +19,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x800ffffc CONFIG_SYS_PROMPT="Apalis T30 # " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=1024 diff --git a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig index 8f610c42e04..d9330d049dd 100644 --- a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig +++ b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig @@ -30,6 +30,8 @@ CONFIG_BOOTDELAY=0 CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xfffffffc CONFIG_SPL_FS_LOAD_KERNEL_NAME="atf-uboot.ub" CONFIG_SPL_FS_LOAD_ARGS_NAME="u-boot.bin" CONFIG_SPL_OS_BOOT=y diff --git a/configs/axm_defconfig b/configs/axm_defconfig index 1d49c196f3f..2a5458b5214 100644 --- a/configs/axm_defconfig +++ b/configs/axm_defconfig @@ -40,6 +40,8 @@ CONFIG_SPL_PAD_TO=0x20000 CONFIG_SPL_BSS_MAX_SIZE=0x600 # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x304000 CONFIG_SPL_CRC32=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_RAW_ONLY=y diff --git a/configs/ba10_tv_box_defconfig b/configs/ba10_tv_box_defconfig index b14731554b7..66c444fc750 100644 --- a/configs/ba10_tv_box_defconfig +++ b/configs/ba10_tv_box_defconfig @@ -9,6 +9,7 @@ CONFIG_USB0_VBUS_PIN="PB9" CONFIG_USB2_VBUS_PIN="PH12" CONFIG_VIDEO_COMPOSITE=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/bananapi_m1_plus_defconfig b/configs/bananapi_m1_plus_defconfig index 1b5f6ba4d39..955a60ddc34 100644 --- a/configs/bananapi_m1_plus_defconfig +++ b/configs/bananapi_m1_plus_defconfig @@ -9,6 +9,7 @@ CONFIG_VIDEO_COMPOSITE=y CONFIG_GMAC_TX_DELAY=3 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_NETCONSOLE=y diff --git a/configs/bananapi_m2_berry_defconfig b/configs/bananapi_m2_berry_defconfig index d7d7ced9d9b..08f7683233c 100644 --- a/configs/bananapi_m2_berry_defconfig +++ b/configs/bananapi_m2_berry_defconfig @@ -9,6 +9,7 @@ CONFIG_USB1_VBUS_PIN="PH23" # CONFIG_HAS_ARMV7_SECURE_BASE is not set CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y diff --git a/configs/bananapi_m2_plus_h3_defconfig b/configs/bananapi_m2_plus_h3_defconfig index d706c9a4e17..d0981f6481a 100644 --- a/configs/bananapi_m2_plus_h3_defconfig +++ b/configs/bananapi_m2_plus_h3_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=672 CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/bananapi_m2_plus_h5_defconfig b/configs/bananapi_m2_plus_h5_defconfig index 111e037ee57..0fb1bda1c6e 100644 --- a/configs/bananapi_m2_plus_h5_defconfig +++ b/configs/bananapi_m2_plus_h5_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=672 CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/bananapi_m2_zero_defconfig b/configs/bananapi_m2_zero_defconfig index 74c164c27c5..6a3594c0938 100644 --- a/configs/bananapi_m2_zero_defconfig +++ b/configs/bananapi_m2_zero_defconfig @@ -6,4 +6,5 @@ CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=408 CONFIG_MMC0_CD_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig index 6c1aa1ae743..5d1d10a0918 100644 --- a/configs/bananapi_m64_defconfig +++ b/configs/bananapi_m64_defconfig @@ -7,6 +7,7 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SUN8I_EMAC=y diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig index d61f25376f5..e0e4393d390 100644 --- a/configs/beaver_defconfig +++ b/configs/beaver_defconfig @@ -16,6 +16,8 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x800ffffc CONFIG_SYS_PROMPT="Tegra30 (Beaver) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2084 diff --git a/configs/beelink_gs1_defconfig b/configs/beelink_gs1_defconfig index 339e6c9e3c9..6453a72a7d7 100644 --- a/configs/beelink_gs1_defconfig +++ b/configs/beelink_gs1_defconfig @@ -8,6 +8,7 @@ CONFIG_MMC0_CD_PIN="PF6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_PSCI_RESET is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x118000 CONFIG_SYS_PBSIZE=1024 CONFIG_LED=y CONFIG_LED_GPIO=y diff --git a/configs/beelink_x2_defconfig b/configs/beelink_x2_defconfig index 432079a6ad3..4065e64d523 100644 --- a/configs/beelink_x2_defconfig +++ b/configs/beelink_x2_defconfig @@ -6,6 +6,7 @@ CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=567 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig index be5b8a0a329..02a8435fbcd 100644 --- a/configs/bitmain_antminer_s9_defconfig +++ b/configs/bitmain_antminer_s9_defconfig @@ -29,6 +29,8 @@ CONFIG_USE_PREBOOT=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL_STACK_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="antminer> " diff --git a/configs/brppt2_defconfig b/configs/brppt2_defconfig index b9f3587bdaa..af91188b69c 100644 --- a/configs/brppt2_defconfig +++ b/configs/brppt2_defconfig @@ -32,6 +32,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run b_default" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_I2C=y CONFIG_SPL_DM_SPI_FLASH=y diff --git a/configs/cardhu_defconfig b/configs/cardhu_defconfig index 92729c3179f..2b73fa22d8a 100644 --- a/configs/cardhu_defconfig +++ b/configs/cardhu_defconfig @@ -15,6 +15,8 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x800ffffc CONFIG_SYS_PROMPT="Tegra30 (Cardhu) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2084 diff --git a/configs/cei-tk1-som_defconfig b/configs/cei-tk1-som_defconfig index 0e583194a13..7bf45bae4e5 100644 --- a/configs/cei-tk1-som_defconfig +++ b/configs/cei-tk1-som_defconfig @@ -17,6 +17,8 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x800ffffc CONFIG_SYS_PROMPT="Tegra124 (TK1-SOM) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2086 diff --git a/configs/cgtqmx8_defconfig b/configs/cgtqmx8_defconfig index 112a9860d83..d60437884c9 100644 --- a/configs/cgtqmx8_defconfig +++ b/configs/cgtqmx8_defconfig @@ -31,6 +31,8 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x13e000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 CONFIG_SYS_MMCSD_FS_BOOT_PARTITION=0 diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index 0225e108b53..862b37d0fb6 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -28,6 +28,8 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig index d5676b5ea7a..21943010f4e 100644 --- a/configs/chromebook_bob_defconfig +++ b/configs/chromebook_bob_defconfig @@ -33,6 +33,8 @@ CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_HANDOFF=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xff8effff CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 CONFIG_SPL_SPI_LOAD=y diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index 89990e51b78..a0f15f6e7b2 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -29,6 +29,8 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set diff --git a/configs/chromebook_kevin_defconfig b/configs/chromebook_kevin_defconfig index 5d95c9e68a6..7f773fcf90c 100644 --- a/configs/chromebook_kevin_defconfig +++ b/configs/chromebook_kevin_defconfig @@ -34,6 +34,8 @@ CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_HANDOFF=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xff8effff CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 CONFIG_SPL_SPI_LOAD=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index 7542d4fb21b..513e5f85e9c 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -29,6 +29,8 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig index 2aaa997ef81..7fc505ee4e3 100644 --- a/configs/chromebook_speedy_defconfig +++ b/configs/chromebook_speedy_defconfig @@ -29,6 +29,8 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set diff --git a/configs/ci20_mmc_defconfig b/configs/ci20_mmc_defconfig index e8bcc0b7f99..a1c2fa732c1 100644 --- a/configs/ci20_mmc_defconfig +++ b/configs/ci20_mmc_defconfig @@ -25,6 +25,8 @@ CONFIG_MISC_INIT_R=y CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_MAX_SIZE=0x2e00 CONFIG_SPL_BSS_MAX_SIZE=0x2000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xf4008000 # CONFIG_SPL_BANNER_PRINT is not set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1c diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig index af7fb37afcc..67b70d9523d 100644 --- a/configs/cl-som-imx7_defconfig +++ b/configs/cl-som-imx7_defconfig @@ -28,6 +28,8 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x946bb8 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80 CONFIG_SPL_I2C=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig index fc7aaba37dd..bbb475e9790 100644 --- a/configs/clearfog_defconfig +++ b/configs/clearfog_defconfig @@ -29,6 +29,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x22fd0 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_TLV_EEPROM=y diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index bb63d5f7756..d1f8c494ae4 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -30,6 +30,8 @@ CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run legacy_bootcmd" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="usb start;sf probe" CONFIG_MISC_INIT_R=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80 CONFIG_SPL_I2C=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 1873581e755..9436f9f0a38 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -35,6 +35,8 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_DMA=y CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig index 76eb9e12c29..1f616af3c52 100644 --- a/configs/colibri_t20_defconfig +++ b/configs/colibri_t20_defconfig @@ -18,6 +18,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xffffc CONFIG_SYS_PROMPT="Colibri T20 # " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=1024 diff --git a/configs/colibri_t30_defconfig b/configs/colibri_t30_defconfig index c9f8a5e65e4..b9012f02582 100644 --- a/configs/colibri_t30_defconfig +++ b/configs/colibri_t30_defconfig @@ -19,6 +19,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x800ffffc CONFIG_SYS_PROMPT="Colibri T30 # " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=1024 diff --git a/configs/colorfly_e708_q1_defconfig b/configs/colorfly_e708_q1_defconfig index 304ae18a857..f17083310a2 100644 --- a/configs/colorfly_e708_q1_defconfig +++ b/configs/colorfly_e708_q1_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_BL_EN="PA25" CONFIG_VIDEO_LCD_BL_PWM="PH13" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_AXP_DLDO2_VOLT=1800 diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig index fd8cbe577de..9b538096080 100644 --- a/configs/controlcenterdc_defconfig +++ b/configs/controlcenterdc_defconfig @@ -38,6 +38,8 @@ CONFIG_SPL_MAX_SIZE=0x27fd0 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x40031000 CONFIG_SPL_I2C=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig index 9683c662f9d..e7db00a2122 100644 --- a/configs/corvus_defconfig +++ b/configs/corvus_defconfig @@ -36,6 +36,8 @@ CONFIG_SPL_MAX_SIZE=0x3000 CONFIG_SPL_PAD_TO=0x20000 CONFIG_SPL_BSS_MAX_SIZE=0x800 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x4000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_RAW_ONLY=y CONFIG_SPL_NAND_DRIVERS=y diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index 8ddde6a80b5..a4bc7e41265 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -39,6 +39,8 @@ CONFIG_SPL_PAD_TO=0x8000 CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x8001ff00 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig index 4e3ff702144..ef180e68643 100644 --- a/configs/da850evm_nand_defconfig +++ b/configs/da850evm_nand_defconfig @@ -36,6 +36,8 @@ CONFIG_SPL_PAD_TO=0x8000 CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x8001ff00 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig index 1a0ad00a319..7811ef83db8 100644 --- a/configs/dalmore_defconfig +++ b/configs/dalmore_defconfig @@ -16,6 +16,8 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x800ffffc CONFIG_SYS_PROMPT="Tegra114 (Dalmore) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2086 diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig index cf7bd174a58..77e0bbc858a 100644 --- a/configs/db-88f6720_defconfig +++ b/configs/db-88f6720_defconfig @@ -28,6 +28,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x1ffd0 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_I2C=y diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig index fc2cd98f941..5d52c1fcc60 100644 --- a/configs/db-88f6820-amc_defconfig +++ b/configs/db-88f6820-amc_defconfig @@ -29,6 +29,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x22fd0 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=96 # CONFIG_CMD_FLASH is not set diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig index 8243a49fba7..04a07e0e812 100644 --- a/configs/db-88f6820-gp_defconfig +++ b/configs/db-88f6820-gp_defconfig @@ -28,6 +28,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x22fd0 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_I2C=y diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig index 2f5a3215d99..a1e07254537 100644 --- a/configs/db-mv784mp-gp_defconfig +++ b/configs/db-mv784mp-gp_defconfig @@ -28,6 +28,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x1bfd0 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set diff --git a/configs/deneb_defconfig b/configs/deneb_defconfig index 42f4d40d9e6..21dfc26c1e0 100644 --- a/configs/deneb_defconfig +++ b/configs/deneb_defconfig @@ -40,6 +40,8 @@ CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x13e000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 CONFIG_SPL_POWER_DOMAIN=y diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig index f447aecf8b0..5290ac5e82e 100644 --- a/configs/devkit3250_defconfig +++ b/configs/devkit3250_defconfig @@ -29,6 +29,8 @@ CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xfff8 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_RAW_ONLY=y CONFIG_SPL_NAND_DRIVERS=y diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index 8c0b9b3d456..05b9eb8cbf3 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -35,6 +35,8 @@ CONFIG_SPL_FIT=y CONFIG_BOOTDELAY=3 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x11400 CONFIG_SYS_MAXARGS=32 diff --git a/configs/difrnce_dit4350_defconfig b/configs/difrnce_dit4350_defconfig index 29d9978cb32..a3917eaf179 100644 --- a/configs/difrnce_dit4350_defconfig +++ b/configs/difrnce_dit4350_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/display5_defconfig b/configs/display5_defconfig index 2b92ed95b4b..b39b4de2c15 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -37,6 +37,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="if run check_em_pad; then run recovery;else if test ${BOOT_FROM} = FACTORY; then run factory_nfs;else run boot_mmc;fi;fi" CONFIG_MISC_INIT_R=y CONFIG_SPL_BOOTCOUNT_LIMIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_DMA=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig index 9c3965c0a6f..163737cb5db 100644 --- a/configs/display5_factory_defconfig +++ b/configs/display5_factory_defconfig @@ -34,6 +34,8 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="echo SDP Display5 recovery" CONFIG_MISC_INIT_R=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_DMA=y CONFIG_SPL_I2C=y diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig index 73907b3e389..b0288f57b0d 100644 --- a/configs/ds414_defconfig +++ b/configs/ds414_defconfig @@ -36,6 +36,8 @@ CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1bfd0 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set diff --git a/configs/dserve_dsrv9703c_defconfig b/configs/dserve_dsrv9703c_defconfig index dfc270ccc52..c737cdb4d99 100644 --- a/configs/dserve_dsrv9703c_defconfig +++ b/configs/dserve_dsrv9703c_defconfig @@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/edminiv2_defconfig b/configs/edminiv2_defconfig index ace1f768c21..dd6118bf212 100644 --- a/configs/edminiv2_defconfig +++ b/configs/edminiv2_defconfig @@ -25,6 +25,8 @@ CONFIG_RESET_PHY_R=y CONFIG_SPL_MAX_SIZE=0xfff0 CONFIG_SPL_BSS_MAX_SIZE=0x1ffff CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x20000 CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/emlid_neutis_n5_devboard_defconfig b/configs/emlid_neutis_n5_devboard_defconfig index e54f4aa7524..d9272eae168 100644 --- a/configs/emlid_neutis_n5_devboard_defconfig +++ b/configs/emlid_neutis_n5_devboard_defconfig @@ -8,5 +8,6 @@ CONFIG_DRAM_ZQ=3881977 # CONFIG_DRAM_ODT_EN is not set CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 CONFIG_SUPPORT_EMMC_BOOT=y diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig index 019e9422192..7b1138ee63f 100644 --- a/configs/evb-px30_defconfig +++ b/configs/evb-px30_defconfig @@ -35,6 +35,8 @@ CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y # CONFIG_TPL_BANNER_PRINT is not set CONFIG_SPL_ATF=y diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig index 238ef9a9e8d..753e6edc35d 100644 --- a/configs/evb-px5_defconfig +++ b/configs/evb-px5_defconfig @@ -40,6 +40,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x20000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x188000 CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index 7c91aacabd6..6587c19c36a 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -28,6 +28,8 @@ CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SPL_OPTEE_IMAGE=y diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig index 8d9ca36cdde..e871ba1b8e7 100644 --- a/configs/evb-rk3308_defconfig +++ b/configs/evb-rk3308_defconfig @@ -27,6 +27,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig index 3aa1ce733c8..f247f692a0c 100644 --- a/configs/evb-rk3328_defconfig +++ b/configs/evb-rk3328_defconfig @@ -32,6 +32,8 @@ CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SPL_ATF=y diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index 186ecd1f9d5..a2f0698525b 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -20,6 +20,8 @@ CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/evb-rk3568_defconfig b/configs/evb-rk3568_defconfig index 8d1e45391dd..6afd5d6d70f 100644 --- a/configs/evb-rk3568_defconfig +++ b/configs/evb-rk3568_defconfig @@ -30,6 +30,8 @@ CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y CONFIG_CMD_GPT=y diff --git a/configs/ficus-rk3399_defconfig b/configs/ficus-rk3399_defconfig index fac88892d66..7012c02f28e 100644 --- a/configs/ficus-rk3399_defconfig +++ b/configs/ficus-rk3399_defconfig @@ -20,6 +20,8 @@ CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x10000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xff8effff CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 CONFIG_CMD_BOOTZ=y diff --git a/configs/firefly-px30_defconfig b/configs/firefly-px30_defconfig index 4330885a306..31374c55d8c 100644 --- a/configs/firefly-px30_defconfig +++ b/configs/firefly-px30_defconfig @@ -36,6 +36,8 @@ CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y # CONFIG_TPL_BANNER_PRINT is not set CONFIG_SPL_ATF=y diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 6351ba1715f..c2b3a0e315d 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -24,6 +24,8 @@ CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_CMD_GPIO=y diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig index 2be11295243..2f7cb97aa65 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -21,6 +21,8 @@ CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/ga10h_v1_1_defconfig b/configs/ga10h_v1_1_defconfig index 440a263c191..7cdb6c56755 100644 --- a/configs/ga10h_v1_1_defconfig +++ b/configs/ga10h_v1_1_defconfig @@ -17,6 +17,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig index 8e509f699da..42d700b6cd5 100644 --- a/configs/gardena-smart-gateway-at91sam_defconfig +++ b/configs/gardena-smart-gateway-at91sam_defconfig @@ -38,6 +38,8 @@ CONFIG_SPL_MAX_SIZE=0x7000 CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x308000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_RAW_ONLY=y diff --git a/configs/ge_b1x5v2_defconfig b/configs/ge_b1x5v2_defconfig index fd1f3e37de3..5966870df2d 100644 --- a/configs/ge_b1x5v2_defconfig +++ b/configs/ge_b1x5v2_defconfig @@ -37,6 +37,8 @@ CONFIG_LOG_MAX_LEVEL=8 CONFIG_LOG_DEFAULT_LEVEL=4 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x11400 CONFIG_SPL_USB_HOST=y diff --git a/configs/giedi_defconfig b/configs/giedi_defconfig index ae05c9a7192..ec6082a92c6 100644 --- a/configs/giedi_defconfig +++ b/configs/giedi_defconfig @@ -40,6 +40,8 @@ CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x13e000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 CONFIG_SPL_POWER_DOMAIN=y diff --git a/configs/gose_defconfig b/configs/gose_defconfig index 9099f5dc988..350c4ec3f0e 100644 --- a/configs/gose_defconfig +++ b/configs/gose_defconfig @@ -34,6 +34,8 @@ CONFIG_SPL_MAX_SIZE=0x4000 CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xe6340000 CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/gt90h_v4_defconfig b/configs/gt90h_v4_defconfig index 929d93c8899..c81f0f6c5eb 100644 --- a/configs/gt90h_v4_defconfig +++ b/configs/gt90h_v4_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index f0e720463b6..ef4829c5478 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -40,6 +40,8 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_PCI_INIT_R=y CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_STACK_R=y CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_DMA=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index 53d5bddd619..e070dc88b33 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -40,6 +40,8 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_PCI_INIT_R=y CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_STACK_R=y CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_DMA=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index e0225278582..a279935c124 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -40,6 +40,8 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_PCI_INIT_R=y CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_STACK_R=y CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_DMA=y diff --git a/configs/h8_homlet_v2_defconfig b/configs/h8_homlet_v2_defconfig index 795de6f3ee9..8af0b3c3332 100644 --- a/configs/h8_homlet_v2_defconfig +++ b/configs/h8_homlet_v2_defconfig @@ -11,6 +11,7 @@ CONFIG_USB1_VBUS_PIN="PL6" CONFIG_AXP_GPIO=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO4_VOLT=3300 CONFIG_USB_EHCI_HCD=y diff --git a/configs/harmony_defconfig b/configs/harmony_defconfig index 6497d41f97c..50a210703d4 100644 --- a/configs/harmony_defconfig +++ b/configs/harmony_defconfig @@ -14,6 +14,8 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xffffc CONFIG_SYS_PROMPT="Tegra20 (Harmony) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2085 diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig index d52d07a87ef..9384aa50fb7 100644 --- a/configs/helios4_defconfig +++ b/configs/helios4_defconfig @@ -29,6 +29,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x22fd0 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_TLV_EEPROM=y diff --git a/configs/i12-tvbox_defconfig b/configs/i12-tvbox_defconfig index a336dd47f05..29cea180201 100644 --- a/configs/i12-tvbox_defconfig +++ b/configs/i12-tvbox_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=384 CONFIG_MACPWR="PH21" CONFIG_VIDEO_COMPOSITE=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/iNet_3F_defconfig b/configs/iNet_3F_defconfig index 88d48610b25..8b6936497fd 100644 --- a/configs/iNet_3F_defconfig +++ b/configs/iNet_3F_defconfig @@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/iNet_3W_defconfig b/configs/iNet_3W_defconfig index 91b7807e2ae..a05876a18f3 100644 --- a/configs/iNet_3W_defconfig +++ b/configs/iNet_3W_defconfig @@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/iNet_86VS_defconfig b/configs/iNet_86VS_defconfig index f4943012e21..3a9f30877b0 100644 --- a/configs/iNet_86VS_defconfig +++ b/configs/iNet_86VS_defconfig @@ -13,6 +13,7 @@ CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/iNet_D978_rev2_defconfig b/configs/iNet_D978_rev2_defconfig index 339e9f6d12d..664745c9f13 100644 --- a/configs/iNet_D978_rev2_defconfig +++ b/configs/iNet_D978_rev2_defconfig @@ -17,6 +17,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 # CONFIG_REQUIRE_SERIAL_CONSOLE is not set diff --git a/configs/icnova-a20-swac_defconfig b/configs/icnova-a20-swac_defconfig index 44080b99865..afe5b28e66b 100644 --- a/configs/icnova-a20-swac_defconfig +++ b/configs/icnova-a20-swac_defconfig @@ -19,6 +19,7 @@ CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo CONFIG_VIDEO_LCD_POWER="PH22" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_UNZIP=y diff --git a/configs/imx28_xea_defconfig b/configs/imx28_xea_defconfig index 8388cd631f2..f460a01e8ce 100644 --- a/configs/imx28_xea_defconfig +++ b/configs/imx28_xea_defconfig @@ -36,6 +36,8 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x20000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x0 CONFIG_SUPPORT_EMMC_BOOT_OVERRIDE_PART_CONFIG=y diff --git a/configs/imx6dl_icore_nand_defconfig b/configs/imx6dl_icore_nand_defconfig index c98a5cc735a..48e07534535 100644 --- a/configs/imx6dl_icore_nand_defconfig +++ b/configs/imx6dl_icore_nand_defconfig @@ -24,6 +24,8 @@ CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index 6f249dbe2fc..0595dccaea7 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -17,6 +17,8 @@ CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 diff --git a/configs/imx6q_bosch_acc_defconfig b/configs/imx6q_bosch_acc_defconfig index 4b75e5794e9..a052193cb76 100644 --- a/configs/imx6q_bosch_acc_defconfig +++ b/configs/imx6q_bosch_acc_defconfig @@ -34,6 +34,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run mmc_mmc_fit" CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_RAW_IMAGE_SUPPORT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xaa # CONFIG_SPL_CRC32 is not set # CONFIG_SPL_CRYPTO is not set diff --git a/configs/imx6q_icore_nand_defconfig b/configs/imx6q_icore_nand_defconfig index 278bc98cbc1..340766919d6 100644 --- a/configs/imx6q_icore_nand_defconfig +++ b/configs/imx6q_icore_nand_defconfig @@ -25,6 +25,8 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index c5ad6dcdd1f..2d8b83c9f1b 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -27,6 +27,8 @@ CONFIG_BOOTCOMMAND="run autoboot" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SPL_RAW_IMAGE_SUPPORT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x93ffb8 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_DMA=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" diff --git a/configs/imx6qdl_icore_mipi_defconfig b/configs/imx6qdl_icore_mipi_defconfig index a2f1abe1aa6..d1136ff9717 100644 --- a/configs/imx6qdl_icore_mipi_defconfig +++ b/configs/imx6qdl_icore_mipi_defconfig @@ -33,6 +33,8 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_RAW_IMAGE_SUPPORT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index 91b32e4a035..7f60a1290b7 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -36,6 +36,8 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_RAW_IMAGE_SUPPORT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index 278bc98cbc1..340766919d6 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -25,6 +25,8 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig index cfd35608cfc..f4ce0bdc33a 100644 --- a/configs/imx6qdl_icore_rqs_defconfig +++ b/configs/imx6qdl_icore_rqs_defconfig @@ -30,6 +30,8 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_RAW_IMAGE_SUPPORT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig index a84547feddd..dc517d8bdc9 100644 --- a/configs/imx6ul_geam_mmc_defconfig +++ b/configs/imx6ul_geam_mmc_defconfig @@ -28,6 +28,8 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_RAW_IMAGE_SUPPORT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="geam6ul> " diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig index 8bd4360efd2..ad7c821ebaf 100644 --- a/configs/imx6ul_geam_nand_defconfig +++ b/configs/imx6ul_geam_nand_defconfig @@ -25,6 +25,8 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig index 9262055f1da..0a451618e78 100644 --- a/configs/imx6ul_isiot_emmc_defconfig +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -28,6 +28,8 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_RAW_IMAGE_SUPPORT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="isiotmx6ul> " diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig index d1da6da311c..dd8543d5f5c 100644 --- a/configs/imx6ul_isiot_nand_defconfig +++ b/configs/imx6ul_isiot_nand_defconfig @@ -25,6 +25,8 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx7_cm_defconfig b/configs/imx7_cm_defconfig index 351d47fe552..8b05ee2f6df 100644 --- a/configs/imx7_cm_defconfig +++ b/configs/imx7_cm_defconfig @@ -26,6 +26,8 @@ CONFIG_DEFAULT_FDT_FILE="ask" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x946bb8 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/imx8mm-cl-iot-gate-optee_defconfig b/configs/imx8mm-cl-iot-gate-optee_defconfig index f2ce0a712db..64d2befc98c 100644 --- a/configs/imx8mm-cl-iot-gate-optee_defconfig +++ b/configs/imx8mm-cl-iot-gate-optee_defconfig @@ -26,6 +26,8 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x920000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig index add2687779e..2494d1a79b0 100644 --- a/configs/imx8mm-cl-iot-gate_defconfig +++ b/configs/imx8mm-cl-iot-gate_defconfig @@ -28,6 +28,8 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x920000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig index 6e3cb0601e1..5196f6f0ea2 100644 --- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig +++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig @@ -26,6 +26,8 @@ CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-ctouch2.dtb" CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x920000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_POWER=y diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig index 3a2259515e0..cf385a625b3 100644 --- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig +++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig @@ -26,6 +26,8 @@ CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-edimm2.2.dtb" CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x920000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_POWER=y diff --git a/configs/imx8mm-mx8menlo_defconfig b/configs/imx8mm-mx8menlo_defconfig index 1eb00e1a745..f104dada533 100644 --- a/configs/imx8mm-mx8menlo_defconfig +++ b/configs/imx8mm-mx8menlo_defconfig @@ -37,6 +37,8 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x920000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig index d11671f0346..3481aff6d55 100644 --- a/configs/imx8mm_beacon_defconfig +++ b/configs/imx8mm_beacon_defconfig @@ -28,6 +28,8 @@ CONFIG_DEFAULT_FDT_FILE="imx8mm-beacon-kit.dtb" CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x920000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mm_data_modul_edm_sbc_defconfig b/configs/imx8mm_data_modul_edm_sbc_defconfig index b76f4c44e31..3e141aef6c3 100644 --- a/configs/imx8mm_data_modul_edm_sbc_defconfig +++ b/configs/imx8mm_data_modul_edm_sbc_defconfig @@ -46,6 +46,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_LEGACY_IMAGE_FORMAT=y CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x920000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index 00f605804df..2d73d2454de 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -26,6 +26,8 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x920000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig index 1db032f39ec..3f8662ac715 100644 --- a/configs/imx8mm_venice_defconfig +++ b/configs/imx8mm_venice_defconfig @@ -33,6 +33,8 @@ CONFIG_PREBOOT="gsc wd-disable" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x920000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig index 905d3e502ab..bb503652362 100644 --- a/configs/imx8mn_beacon_2g_defconfig +++ b/configs/imx8mn_beacon_2g_defconfig @@ -36,6 +36,8 @@ CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x187ff0 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig index f4b61c1aa5d..95e4cc432ad 100644 --- a/configs/imx8mn_beacon_defconfig +++ b/configs/imx8mn_beacon_defconfig @@ -35,6 +35,8 @@ CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x187ff0 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mn_bsh_smm_s2_defconfig b/configs/imx8mn_bsh_smm_s2_defconfig index 2e27dd98c56..9a4609dd823 100644 --- a/configs/imx8mn_bsh_smm_s2_defconfig +++ b/configs/imx8mn_bsh_smm_s2_defconfig @@ -30,6 +30,8 @@ CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x980000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mn_bsh_smm_s2pro_defconfig b/configs/imx8mn_bsh_smm_s2pro_defconfig index 706beb9e653..66586ba96a2 100644 --- a/configs/imx8mn_bsh_smm_s2pro_defconfig +++ b/configs/imx8mn_bsh_smm_s2pro_defconfig @@ -31,6 +31,8 @@ CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x980000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig index 22255418863..16f217cd5a7 100644 --- a/configs/imx8mn_ddr4_evk_defconfig +++ b/configs/imx8mn_ddr4_evk_defconfig @@ -29,6 +29,8 @@ CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x980000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig index beb89a7523e..ead7f6d21a8 100644 --- a/configs/imx8mn_evk_defconfig +++ b/configs/imx8mn_evk_defconfig @@ -33,6 +33,8 @@ CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_LEGACY_IMAGE_FORMAT=y CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x980000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mn_var_som_defconfig b/configs/imx8mn_var_som_defconfig index c7916891727..a1f9cee1e19 100644 --- a/configs/imx8mn_var_som_defconfig +++ b/configs/imx8mn_var_som_defconfig @@ -31,6 +31,8 @@ CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x980000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig index 2ca467871bd..f2ddb98a1c0 100644 --- a/configs/imx8mn_venice_defconfig +++ b/configs/imx8mn_venice_defconfig @@ -35,6 +35,8 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOOTROM_SUPPORT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x980000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mp_dhcom_pdk2_defconfig b/configs/imx8mp_dhcom_pdk2_defconfig index 6507b9d8b19..cc815ac2fe0 100644 --- a/configs/imx8mp_dhcom_pdk2_defconfig +++ b/configs/imx8mp_dhcom_pdk2_defconfig @@ -49,6 +49,8 @@ CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x96fc00 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index 55dce14294e..1f4bf537c40 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -33,6 +33,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x960000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mp_rsb3720a1_4G_defconfig b/configs/imx8mp_rsb3720a1_4G_defconfig index 152b0bae091..e8c1bc51191 100644 --- a/configs/imx8mp_rsb3720a1_4G_defconfig +++ b/configs/imx8mp_rsb3720a1_4G_defconfig @@ -39,6 +39,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x960000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mp_rsb3720a1_6G_defconfig b/configs/imx8mp_rsb3720a1_6G_defconfig index 223767bb7d7..323f5fb3356 100644 --- a/configs/imx8mp_rsb3720a1_6G_defconfig +++ b/configs/imx8mp_rsb3720a1_6G_defconfig @@ -39,6 +39,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x960000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mp_venice_defconfig b/configs/imx8mp_venice_defconfig index c44eadae602..2485ae21ee7 100644 --- a/configs/imx8mp_venice_defconfig +++ b/configs/imx8mp_venice_defconfig @@ -35,6 +35,8 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOOTROM_SUPPORT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x960000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mq_cm_defconfig b/configs/imx8mq_cm_defconfig index a9cc11c22fe..a67c82ac3c3 100644 --- a/configs/imx8mq_cm_defconfig +++ b/configs/imx8mq_cm_defconfig @@ -30,6 +30,8 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x187ff0 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index 7cd1d3177d1..c605fa59644 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -32,6 +32,8 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x187ff0 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mq_phanbell_defconfig b/configs/imx8mq_phanbell_defconfig index 83485648a57..6ef649b1646 100644 --- a/configs/imx8mq_phanbell_defconfig +++ b/configs/imx8mq_phanbell_defconfig @@ -34,6 +34,8 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x2b000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x187ff0 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig index 0bd0dbeb6e2..5fc2e7a414e 100644 --- a/configs/imx8qm_mek_defconfig +++ b/configs/imx8qm_mek_defconfig @@ -34,6 +34,8 @@ CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x13e000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 CONFIG_SPL_POWER_DOMAIN=y diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index 5603bbf1a31..8b382156006 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -34,6 +34,8 @@ CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x13e000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 CONFIG_SPL_POWER_DOMAIN=y diff --git a/configs/imx8ulp_evk_defconfig b/configs/imx8ulp_evk_defconfig index 778766cd979..5d3c8395aee 100644 --- a/configs/imx8ulp_evk_defconfig +++ b/configs/imx8ulp_evk_defconfig @@ -31,6 +31,8 @@ CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x22050000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_WATCHDOG=y diff --git a/configs/inet1_defconfig b/configs/inet1_defconfig index 13fd425d5e2..dae6b23a936 100644 --- a/configs/inet1_defconfig +++ b/configs/inet1_defconfig @@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/inet86dz_defconfig b/configs/inet86dz_defconfig index 2b824983ac7..0382a4a0541 100644 --- a/configs/inet86dz_defconfig +++ b/configs/inet86dz_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 diff --git a/configs/inet97fv2_defconfig b/configs/inet97fv2_defconfig index 4b9946f92db..f3e374c2e34 100644 --- a/configs/inet97fv2_defconfig +++ b/configs/inet97fv2_defconfig @@ -13,6 +13,7 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/inet98v_rev2_defconfig b/configs/inet98v_rev2_defconfig index f068de4b57f..c392fc2bb87 100644 --- a/configs/inet98v_rev2_defconfig +++ b/configs/inet98v_rev2_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/inet9f_rev03_defconfig b/configs/inet9f_rev03_defconfig index 08efec27097..81a1c9940fd 100644 --- a/configs/inet9f_rev03_defconfig +++ b/configs/inet9f_rev03_defconfig @@ -13,6 +13,7 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/inet_q972_defconfig b/configs/inet_q972_defconfig index 73700b12297..a4a828c70a3 100644 --- a/configs/inet_q972_defconfig +++ b/configs/inet_q972_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_BL_EN="PA25" CONFIG_VIDEO_LCD_BL_PWM="PH13" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_USB_EHCI_HCD=y diff --git a/configs/jesurun_q5_defconfig b/configs/jesurun_q5_defconfig index d5b0da01edf..5fce5836c9c 100644 --- a/configs/jesurun_q5_defconfig +++ b/configs/jesurun_q5_defconfig @@ -8,6 +8,7 @@ CONFIG_MACPWR="PH19" CONFIG_USB0_VBUS_PIN="PB9" CONFIG_VIDEO_COMPOSITE=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig index 20fed61ec7a..e0f32a5d63f 100644 --- a/configs/jetson-tk1_defconfig +++ b/configs/jetson-tk1_defconfig @@ -16,6 +16,8 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x800ffffc CONFIG_SYS_PROMPT="Tegra124 (Jetson TK1) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2089 diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index 9c34a0ddc6a..ed6e96dac69 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -31,6 +31,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0xfff8 CONFIG_SPL_BSS_MAX_SIZE=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xc1223f4 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index 0469e4f1149..1ec8dd042e2 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -30,6 +30,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0xfff8 CONFIG_SPL_BSS_MAX_SIZE=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xc0c23f4 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index 543810905cd..2238aed03e5 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -31,6 +31,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0xfff8 CONFIG_SPL_BSS_MAX_SIZE=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xc2223f4 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index 1a68b45197f..d96b8084ee4 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -31,6 +31,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0xfff8 CONFIG_SPL_BSS_MAX_SIZE=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xc1223f4 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/khadas-edge-captain-rk3399_defconfig b/configs/khadas-edge-captain-rk3399_defconfig index 24fa9b01653..085c6b66732 100644 --- a/configs/khadas-edge-captain-rk3399_defconfig +++ b/configs/khadas-edge-captain-rk3399_defconfig @@ -20,6 +20,8 @@ CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/khadas-edge-rk3399_defconfig b/configs/khadas-edge-rk3399_defconfig index 78ac8ade588..b66301877e2 100644 --- a/configs/khadas-edge-rk3399_defconfig +++ b/configs/khadas-edge-rk3399_defconfig @@ -20,6 +20,8 @@ CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/khadas-edge-v-rk3399_defconfig b/configs/khadas-edge-v-rk3399_defconfig index 2ae99a15b52..5438d0a3226 100644 --- a/configs/khadas-edge-v-rk3399_defconfig +++ b/configs/khadas-edge-v-rk3399_defconfig @@ -20,6 +20,8 @@ CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig index 186200f0281..467b44c3e6b 100644 --- a/configs/koelsch_defconfig +++ b/configs/koelsch_defconfig @@ -34,6 +34,8 @@ CONFIG_SPL_MAX_SIZE=0x4000 CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xe6340000 CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/kontron-sl-mx6ul_defconfig b/configs/kontron-sl-mx6ul_defconfig index 1ba4d1fca84..904e953ce0f 100644 --- a/configs/kontron-sl-mx6ul_defconfig +++ b/configs/kontron-sl-mx6ul_defconfig @@ -28,6 +28,8 @@ CONFIG_BOARD_TYPES=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_LEGACY_IMAGE_FORMAT=y CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig index db69cf53c8c..cd96210c6bb 100644 --- a/configs/kontron-sl-mx8mm_defconfig +++ b/configs/kontron-sl-mx8mm_defconfig @@ -29,6 +29,8 @@ CONFIG_BOARD_TYPES=y CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91fff0 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 # CONFIG_SPL_FIT_IMAGE_TINY is not set diff --git a/configs/kontron_pitx_imx8m_defconfig b/configs/kontron_pitx_imx8m_defconfig index f8e11f581f0..4660e98e5ae 100644 --- a/configs/kontron_pitx_imx8m_defconfig +++ b/configs/kontron_pitx_imx8m_defconfig @@ -32,6 +32,8 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x187ff0 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/kontron_sl28_defconfig b/configs/kontron_sl28_defconfig index 9f4be1ac9d0..345db031489 100644 --- a/configs/kontron_sl28_defconfig +++ b/configs/kontron_sl28_defconfig @@ -40,6 +40,8 @@ CONFIG_PCI_INIT_R=y CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x18009ff0 CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x230000 diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig index 012a5c492ed..4ec988e3133 100644 --- a/configs/kp_imx6q_tpc_defconfig +++ b/configs/kp_imx6q_tpc_defconfig @@ -27,6 +27,8 @@ CONFIG_AUTOBOOT_STOP_STR="." # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SPL_RAW_IMAGE_SUPPORT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/lager_defconfig b/configs/lager_defconfig index d13b75de412..c9ec38d711f 100644 --- a/configs/lager_defconfig +++ b/configs/lager_defconfig @@ -34,6 +34,8 @@ CONFIG_SPL_MAX_SIZE=0x4000 CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xe6340000 CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/leez-rk3399_defconfig b/configs/leez-rk3399_defconfig index c8e462867e1..d524e4546c8 100644 --- a/configs/leez-rk3399_defconfig +++ b/configs/leez-rk3399_defconfig @@ -19,6 +19,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/libretech_all_h3_cc_h2_plus_defconfig b/configs/libretech_all_h3_cc_h2_plus_defconfig index d720dd5c8bd..ca995568024 100644 --- a/configs/libretech_all_h3_cc_h2_plus_defconfig +++ b/configs/libretech_all_h3_cc_h2_plus_defconfig @@ -6,6 +6,7 @@ CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/libretech_all_h3_cc_h3_defconfig b/configs/libretech_all_h3_cc_h3_defconfig index 6b9faddb901..7ca312c8fbc 100644 --- a/configs/libretech_all_h3_cc_h3_defconfig +++ b/configs/libretech_all_h3_cc_h3_defconfig @@ -6,6 +6,7 @@ CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/libretech_all_h3_cc_h5_defconfig b/configs/libretech_all_h3_cc_h5_defconfig index a20d43f0fed..524138aa2e1 100644 --- a/configs/libretech_all_h3_cc_h5_defconfig +++ b/configs/libretech_all_h3_cc_h5_defconfig @@ -6,6 +6,7 @@ CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/libretech_all_h3_it_h5_defconfig b/configs/libretech_all_h3_it_h5_defconfig index 5bc923a68f4..1b083335863 100644 --- a/configs/libretech_all_h3_it_h5_defconfig +++ b/configs/libretech_all_h3_it_h5_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=672 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 CONFIG_SPI_FLASH_XMC=y CONFIG_SPI=y diff --git a/configs/libretech_all_h5_cc_h5_defconfig b/configs/libretech_all_h5_cc_h5_defconfig index 987393d168e..e0734f96735 100644 --- a/configs/libretech_all_h5_cc_h5_defconfig +++ b/configs/libretech_all_h5_cc_h5_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=672 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 CONFIG_SPI_FLASH_XMC=y CONFIG_SUN8I_EMAC=y diff --git a/configs/licheepi_nano_defconfig b/configs/licheepi_nano_defconfig index 8502cf3e8d2..0252763c776 100644 --- a/configs/licheepi_nano_defconfig +++ b/configs/licheepi_nano_defconfig @@ -10,5 +10,6 @@ CONFIG_DRAM_CLK=156 CONFIG_DRAM_ZQ=0 # CONFIG_VIDEO_SUNXI is not set CONFIG_SPL_SPI_SUNXI=y +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 # CONFIG_SYSRESET is not set diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig index c03eecabcac..c700115aecc 100644 --- a/configs/lion-rk3368_defconfig +++ b/configs/lion-rk3368_defconfig @@ -38,6 +38,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x20000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x188000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 diff --git a/configs/liteboard_defconfig b/configs/liteboard_defconfig index 334b22ac8ab..9832654fa46 100644 --- a/configs/liteboard_defconfig +++ b/configs/liteboard_defconfig @@ -24,6 +24,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev};if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_DEFAULT_FDT_FILE="imx6ul-liteboard.dtb" CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig index 85b0c937cdb..74d5e7ce2f2 100644 --- a/configs/ls1021aiot_sdcard_defconfig +++ b/configs/ls1021aiot_sdcard_defconfig @@ -35,6 +35,8 @@ CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x1001d000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index 4ec86e736d2..57eefa68494 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -45,6 +45,8 @@ CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x1001d000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index 079b19ab5e7..a2b39eb3843 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -44,6 +44,8 @@ CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x1001d000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index a6a4be372ee..62100e44747 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -43,6 +43,8 @@ CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x1001d000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig index b97c0a0035a..85ba389ff6b 100644 --- a/configs/ls1021atsn_sdcard_defconfig +++ b/configs/ls1021atsn_sdcard_defconfig @@ -37,6 +37,8 @@ CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x1001d000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index 772737ff562..13d46e47194 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -44,6 +44,8 @@ CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x1001d000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index d04a0b6f0f8..6dab204210d 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -45,6 +45,8 @@ CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x1001d000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index 3b1e5d9df88..bdc279b646e 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -46,6 +46,8 @@ CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x1001d000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index 87696444a27..ec60f8edfdd 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -51,6 +51,8 @@ CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x20000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x1001d000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index 140ca826af9..ad8fce93589 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -52,6 +52,8 @@ CONFIG_SPL_MAX_SIZE=0x17000 CONFIG_SPL_PAD_TO=0x1d000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x1001e000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index b13156a573d..4464284f337 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -52,6 +52,8 @@ CONFIG_SPL_MAX_SIZE=0x17000 CONFIG_SPL_PAD_TO=0x1d000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x1001e000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index 33320c24bc1..5c51cd5b8c3 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -35,6 +35,8 @@ CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x20000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x1001d000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index f47c019745a..bb0f3e6cb50 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -41,6 +41,8 @@ CONFIG_SPL_PAD_TO=0x20000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x1001d000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index 40f794001d0..2042b44fe4e 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -36,6 +36,8 @@ CONFIG_SPL_MAX_SIZE=0x17000 CONFIG_SPL_PAD_TO=0x1d000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x1001e000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index 94e7b9617f2..f51d76c6757 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -42,6 +42,8 @@ CONFIG_SPL_PAD_TO=0x1d000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x1001e000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig index dba986d729f..322a352669f 100644 --- a/configs/ls1046aqds_nand_defconfig +++ b/configs/ls1046aqds_nand_defconfig @@ -52,6 +52,8 @@ CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x1001f000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index 0dfbf422516..4f4cdf1d05c 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -53,6 +53,8 @@ CONFIG_SPL_PAD_TO=0x21000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x10020000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index 52d826fb061..89d52aa33cc 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -53,6 +53,8 @@ CONFIG_SPL_PAD_TO=0x21000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x10020000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig index 6e0ce4dade0..11725e5aa0c 100644 --- a/configs/ls1046ardb_emmc_defconfig +++ b/configs/ls1046ardb_emmc_defconfig @@ -43,6 +43,8 @@ CONFIG_SPL_PAD_TO=0x21000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x10020000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig index 39e38e47978..ae7d0b32694 100644 --- a/configs/ls1046ardb_qspi_spl_defconfig +++ b/configs/ls1046ardb_qspi_spl_defconfig @@ -46,6 +46,8 @@ CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_PAD_TO=0x20000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x10020000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig index 852824eeff5..ea8588c86ae 100644 --- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -40,6 +40,8 @@ CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_PAD_TO=0x21000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x10020000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig index 85a8ec9b108..ed87dbaffd9 100644 --- a/configs/ls1046ardb_sdcard_defconfig +++ b/configs/ls1046ardb_sdcard_defconfig @@ -43,6 +43,8 @@ CONFIG_SPL_PAD_TO=0x21000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x10020000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig index ca634fd3986..8b03ff8062b 100644 --- a/configs/ls1088aqds_sdcard_ifc_defconfig +++ b/configs/ls1088aqds_sdcard_ifc_defconfig @@ -43,6 +43,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_RESET_PHY_R=y CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x18009ff0 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig index b21ce6794bd..5cd2ca27087 100644 --- a/configs/ls1088aqds_sdcard_qspi_defconfig +++ b/configs/ls1088aqds_sdcard_qspi_defconfig @@ -44,6 +44,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_RESET_PHY_R=y CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x18009ff0 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig index e8397fcd4ed..e7500e14eaf 100644 --- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig @@ -44,6 +44,8 @@ CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x18009ff0 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig index 283dcccc905..db65a7c0568 100644 --- a/configs/ls1088ardb_sdcard_qspi_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_defconfig @@ -45,6 +45,8 @@ CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x18009ff0 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index 0c57920b487..08f9536d22a 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -36,6 +36,8 @@ CONFIG_RESET_PHY_R=y CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SPL_PAD_TO=0x20000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x18009ff0 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig index 23c20203ba7..f8978da43ca 100644 --- a/configs/ls2080aqds_sdcard_defconfig +++ b/configs/ls2080aqds_sdcard_defconfig @@ -36,6 +36,8 @@ CONFIG_BOOTCOMMAND="mmc read 0x80200000 0x6800 0x800; fsl_mc apply dpl 0x8020000 CONFIG_RESET_PHY_R=y CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x18009ff0 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index e703a8cba86..7304c4d0246 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -42,6 +42,8 @@ CONFIG_RESET_PHY_R=y CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SPL_PAD_TO=0x80000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x18009ff0 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index 336ba0180e7..455f19617ac 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -34,6 +34,8 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_PAD_TO=0x8000 CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x70004000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig index 9c22966d884..457e56919d0 100644 --- a/configs/maxbcm_defconfig +++ b/configs/maxbcm_defconfig @@ -27,6 +27,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x1bfd0 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_I2C=y diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig index 3718d08b670..cef2bb0ba5b 100644 --- a/configs/mccmon6_nor_defconfig +++ b/configs/mccmon6_nor_defconfig @@ -24,6 +24,8 @@ CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig index 3228050dd20..8f3b4ecfc9d 100644 --- a/configs/mccmon6_sd_defconfig +++ b/configs/mccmon6_sd_defconfig @@ -25,6 +25,8 @@ CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/medcom-wide_defconfig b/configs/medcom-wide_defconfig index 4b2e305c107..855b88b75a6 100644 --- a/configs/medcom-wide_defconfig +++ b/configs/medcom-wide_defconfig @@ -15,6 +15,8 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xffffc CONFIG_SYS_PROMPT="Tegra20 (Medcom-Wide) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2089 diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index a7698ac1ec1..86bda86b72f 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -28,6 +28,8 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0xffb00 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x100000 CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_SYS_OS_BASE=0x2c060000 diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig index c1151d13b60..7000b89311a 100644 --- a/configs/miqi-rk3288_defconfig +++ b/configs/miqi-rk3288_defconfig @@ -24,6 +24,8 @@ CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_CMD_GPIO=y diff --git a/configs/mixtile_loftq_defconfig b/configs/mixtile_loftq_defconfig index 0cd94d7b438..11e3dfcf4ba 100644 --- a/configs/mixtile_loftq_defconfig +++ b/configs/mixtile_loftq_defconfig @@ -9,6 +9,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB1_VBUS_PIN="PH24" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/mk802_a10s_defconfig b/configs/mk802_a10s_defconfig index 1fa1f0031b0..3ce7e5f1d68 100644 --- a/configs/mk802_a10s_defconfig +++ b/configs/mk802_a10s_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=432 CONFIG_DRAM_EMR1=0 CONFIG_USB1_VBUS_PIN="PB10" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/mk802_defconfig b/configs/mk802_defconfig index 281130a43e2..0fd8d3adbd2 100644 --- a/configs/mk802_defconfig +++ b/configs/mk802_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_USB2_VBUS_PIN="PH12" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/mk802ii_defconfig b/configs/mk802ii_defconfig index 8123d900d93..942911bddba 100644 --- a/configs/mk802ii_defconfig +++ b/configs/mk802ii_defconfig @@ -4,6 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mk802ii" CONFIG_SPL=y CONFIG_MACH_SUN4I=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig index fadea658eb2..7df44fb81f1 100644 --- a/configs/mk808_defconfig +++ b/configs/mk808_defconfig @@ -36,6 +36,8 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x32000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x1008ffff CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000 CONFIG_SPL_SEPARATE_BSS=y diff --git a/configs/mt7629_rfb_defconfig b/configs/mt7629_rfb_defconfig index 3ee77f39a3d..f5e3c26d66c 100644 --- a/configs/mt7629_rfb_defconfig +++ b/configs/mt7629_rfb_defconfig @@ -28,6 +28,8 @@ CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x106000 CONFIG_SPL_STACK_R=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index 41122ade90e..016a54f7cb3 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -26,6 +26,8 @@ CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="if hdmidet; then usb start; setenv stdin serial,usbkbd; setenv stdout serial,vidconsole; setenv stderr serial,vidconsole; else setenv stdin serial; setenv stdout serial; setenv stderr serial; fi;" CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y diff --git a/configs/mx6memcal_defconfig b/configs/mx6memcal_defconfig index d555dbf7b1b..cf807d8f3db 100644 --- a/configs/mx6memcal_defconfig +++ b/configs/mx6memcal_defconfig @@ -15,6 +15,8 @@ CONFIG_SPL=y CONFIG_SYS_MEMTEST_START=0x10000000 CONFIG_SYS_MEMTEST_END=0x20000000 CONFIG_SUPPORT_RAW_INITRD=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig index 3d2e906f934..016898f9ab1 100644 --- a/configs/mx6sabreauto_defconfig +++ b/configs/mx6sabreauto_defconfig @@ -33,6 +33,8 @@ CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};if mmc rescan; then if run loa CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SPL_LEGACY_IMAGE_FORMAT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index 33d8db9dff2..072617681db 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -32,6 +32,8 @@ CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};if mmc rescan; then if run loa CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SPL_LEGACY_IMAGE_FORMAT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig index 24407c113d6..a5ccf579029 100644 --- a/configs/mx6slevk_spl_defconfig +++ b/configs/mx6slevk_spl_defconfig @@ -25,6 +25,8 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig index 065ead0a7ad..8d182478164 100644 --- a/configs/mx6ul_14x14_evk_defconfig +++ b/configs/mx6ul_14x14_evk_defconfig @@ -27,6 +27,8 @@ CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc resc # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig index 2f46b68cbe9..65c1c778599 100644 --- a/configs/mx6ul_9x9_evk_defconfig +++ b/configs/mx6ul_9x9_evk_defconfig @@ -27,6 +27,8 @@ CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc resc # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y diff --git a/configs/myir_mys_6ulx_defconfig b/configs/myir_mys_6ulx_defconfig index f5ccf669f29..fdd7d024ae8 100644 --- a/configs/myir_mys_6ulx_defconfig +++ b/configs/myir_mys_6ulx_defconfig @@ -19,6 +19,8 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_USB_HOST=y diff --git a/configs/nanopc-t4-rk3399_defconfig b/configs/nanopc-t4-rk3399_defconfig index a1d66c51b5c..6c023fbe405 100644 --- a/configs/nanopc-t4-rk3399_defconfig +++ b/configs/nanopc-t4-rk3399_defconfig @@ -20,6 +20,8 @@ CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/nanopi-m4-2gb-rk3399_defconfig b/configs/nanopi-m4-2gb-rk3399_defconfig index c3ecb994606..390cfbb60f1 100644 --- a/configs/nanopi-m4-2gb-rk3399_defconfig +++ b/configs/nanopi-m4-2gb-rk3399_defconfig @@ -20,6 +20,8 @@ CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/nanopi-m4-rk3399_defconfig b/configs/nanopi-m4-rk3399_defconfig index 608bed247c9..37d91e53912 100644 --- a/configs/nanopi-m4-rk3399_defconfig +++ b/configs/nanopi-m4-rk3399_defconfig @@ -20,6 +20,8 @@ CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/nanopi-m4b-rk3399_defconfig b/configs/nanopi-m4b-rk3399_defconfig index 125c3ee30e3..7bf1ca299d5 100644 --- a/configs/nanopi-m4b-rk3399_defconfig +++ b/configs/nanopi-m4b-rk3399_defconfig @@ -20,6 +20,8 @@ CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/nanopi-neo4-rk3399_defconfig b/configs/nanopi-neo4-rk3399_defconfig index 3d159ff488a..69174b95122 100644 --- a/configs/nanopi-neo4-rk3399_defconfig +++ b/configs/nanopi-neo4-rk3399_defconfig @@ -20,6 +20,8 @@ CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/nanopi-r2s-rk3328_defconfig b/configs/nanopi-r2s-rk3328_defconfig index 0049655be38..b1e2a6d3bfe 100644 --- a/configs/nanopi-r2s-rk3328_defconfig +++ b/configs/nanopi-r2s-rk3328_defconfig @@ -33,6 +33,8 @@ CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y diff --git a/configs/nanopi-r4s-rk3399_defconfig b/configs/nanopi-r4s-rk3399_defconfig index cd7a521d84e..ca10940e79b 100644 --- a/configs/nanopi-r4s-rk3399_defconfig +++ b/configs/nanopi-r4s-rk3399_defconfig @@ -20,6 +20,8 @@ CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/nanopi_a64_defconfig b/configs/nanopi_a64_defconfig index 042689e933c..8f3c242a7a9 100644 --- a/configs/nanopi_a64_defconfig +++ b/configs/nanopi_a64_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/nanopi_m1_defconfig b/configs/nanopi_m1_defconfig index 547c20358f2..47a6b7804e3 100644 --- a/configs/nanopi_m1_defconfig +++ b/configs/nanopi_m1_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=408 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nanopi_m1_plus_defconfig b/configs/nanopi_m1_plus_defconfig index 5ce046cd3f7..c71d721f743 100644 --- a/configs/nanopi_m1_plus_defconfig +++ b/configs/nanopi_m1_plus_defconfig @@ -8,6 +8,7 @@ CONFIG_MACPWR="PD6" CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/nanopi_neo2_defconfig b/configs/nanopi_neo2_defconfig index f994fceffd4..66df94b33b9 100644 --- a/configs/nanopi_neo2_defconfig +++ b/configs/nanopi_neo2_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881977 # CONFIG_DRAM_ODT_EN is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/nanopi_neo_air_defconfig b/configs/nanopi_neo_air_defconfig index 23c1527e9cd..b83b6a3499d 100644 --- a/configs/nanopi_neo_air_defconfig +++ b/configs/nanopi_neo_air_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=408 # CONFIG_VIDEO_DE2 is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nanopi_neo_defconfig b/configs/nanopi_neo_defconfig index e46e5b81059..f8377535e97 100644 --- a/configs/nanopi_neo_defconfig +++ b/configs/nanopi_neo_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=408 # CONFIG_VIDEO_DE2 is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/nanopi_neo_plus2_defconfig b/configs/nanopi_neo_plus2_defconfig index 8eb370ab6a4..60f26318429 100644 --- a/configs/nanopi_neo_plus2_defconfig +++ b/configs/nanopi_neo_plus2_defconfig @@ -9,6 +9,7 @@ CONFIG_DRAM_ZQ=3881977 CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/nanopi_r1s_h5_defconfig b/configs/nanopi_r1s_h5_defconfig index 9d0a4d7e500..06c564ec8cd 100644 --- a/configs/nanopi_r1s_h5_defconfig +++ b/configs/nanopi_r1s_h5_defconfig @@ -9,6 +9,7 @@ CONFIG_DRAM_ZQ=3881977 CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/novena_defconfig b/configs/novena_defconfig index 215aaa605b5..3faeaf150d5 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -31,6 +31,8 @@ CONFIG_BOOTARGS="console=ttymxc1,115200 " CONFIG_BOOTCOMMAND="run distro_bootcmd ; run net_nfs" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig index 4433b65644f..1ffddbe35e3 100644 --- a/configs/nyan-big_defconfig +++ b/configs/nyan-big_defconfig @@ -25,6 +25,8 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0xef8100 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x800ffffc CONFIG_SYS_PROMPT="Tegra124 (Nyan-big) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2087 diff --git a/configs/oceanic_5205_5inmfd_defconfig b/configs/oceanic_5205_5inmfd_defconfig index 5392e3485f5..21468c426b5 100644 --- a/configs/oceanic_5205_5inmfd_defconfig +++ b/configs/oceanic_5205_5inmfd_defconfig @@ -10,6 +10,7 @@ CONFIG_DRAM_ZQ=3881949 CONFIG_MMC0_CD_PIN="" CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_SPI=y diff --git a/configs/odroid-go2_defconfig b/configs/odroid-go2_defconfig index 2990b65347e..6925c26bc10 100644 --- a/configs/odroid-go2_defconfig +++ b/configs/odroid-go2_defconfig @@ -39,6 +39,8 @@ CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y # CONFIG_TPL_BANNER_PRINT is not set CONFIG_SPL_I2C=y diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index 8b3796dfb63..5669c355e93 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -37,6 +37,8 @@ CONFIG_SPL_PAD_TO=0x8000 CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x8001ff00 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xb5 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y diff --git a/configs/openpiton_riscv64_spl_defconfig b/configs/openpiton_riscv64_spl_defconfig index 8d2ddedb54c..e041de4b2b1 100644 --- a/configs/openpiton_riscv64_spl_defconfig +++ b/configs/openpiton_riscv64_spl_defconfig @@ -25,6 +25,8 @@ CONFIG_BOOTCOMMAND="fdt addr ${fdtcontroladdr}; fdt move ${fdtcontroladdr} ${fdt CONFIG_SPL_MAX_SIZE=0x100000 # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x83fffe80 # CONFIG_SPL_BANNER_PRINT is not set CONFIG_SPL_CPU=y CONFIG_SPL_FS_EXT4=y diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig index 8b0b4c33e14..ddf879d19eb 100644 --- a/configs/opos6uldev_defconfig +++ b/configs/opos6uldev_defconfig @@ -31,6 +31,8 @@ CONFIG_DEFAULT_FDT_FILE="imx6ul-opos6uldev.dtb" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y diff --git a/configs/orangepi-rk3399_defconfig b/configs/orangepi-rk3399_defconfig index 6a8e3332110..790936dff34 100644 --- a/configs/orangepi-rk3399_defconfig +++ b/configs/orangepi-rk3399_defconfig @@ -20,6 +20,8 @@ CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/orangepi_2_defconfig b/configs/orangepi_2_defconfig index f1e260317de..e18b8610847 100644 --- a/configs/orangepi_2_defconfig +++ b/configs/orangepi_2_defconfig @@ -7,6 +7,7 @@ CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 CONFIG_USB1_VBUS_PIN="PG13" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/orangepi_3_defconfig b/configs/orangepi_3_defconfig index 59e85bb24e8..824f017dae4 100644 --- a/configs/orangepi_3_defconfig +++ b/configs/orangepi_3_defconfig @@ -8,6 +8,7 @@ CONFIG_MMC0_CD_PIN="PF6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_BLUETOOTH_DT_DEVICE_FIXUP="brcm,bcm4345c5" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x118000 CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_SUN50I_USB3=y CONFIG_USB_XHCI_HCD=y diff --git a/configs/orangepi_lite2_defconfig b/configs/orangepi_lite2_defconfig index e7e18effd16..cfce6cb0d47 100644 --- a/configs/orangepi_lite2_defconfig +++ b/configs/orangepi_lite2_defconfig @@ -7,6 +7,7 @@ CONFIG_SUNXI_DRAM_H6_LPDDR3=y CONFIG_MMC0_CD_PIN="PF6" # CONFIG_PSCI_RESET is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x118000 CONFIG_SYS_PBSIZE=1024 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_lite_defconfig b/configs/orangepi_lite_defconfig index 4f48ef1b5f5..c7174170dbf 100644 --- a/configs/orangepi_lite_defconfig +++ b/configs/orangepi_lite_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_one_defconfig b/configs/orangepi_one_defconfig index ee9d8f397b2..112ff5e5b6a 100644 --- a/configs/orangepi_one_defconfig +++ b/configs/orangepi_one_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/orangepi_one_plus_defconfig b/configs/orangepi_one_plus_defconfig index e13a32041ae..63d3addbdd3 100644 --- a/configs/orangepi_one_plus_defconfig +++ b/configs/orangepi_one_plus_defconfig @@ -7,6 +7,7 @@ CONFIG_SUNXI_DRAM_H6_LPDDR3=y CONFIG_MMC0_CD_PIN="PF6" # CONFIG_PSCI_RESET is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x118000 CONFIG_SYS_PBSIZE=1024 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig index 6a6b81fa393..7b12bf00ff2 100644 --- a/configs/orangepi_pc2_defconfig +++ b/configs/orangepi_pc2_defconfig @@ -8,6 +8,7 @@ CONFIG_DRAM_ZQ=3881977 CONFIG_MACPWR="PD6" CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x54000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/orangepi_pc_defconfig b/configs/orangepi_pc_defconfig index 2ef2a962f41..28107ad5f7a 100644 --- a/configs/orangepi_pc_defconfig +++ b/configs/orangepi_pc_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=624 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/orangepi_pc_plus_defconfig b/configs/orangepi_pc_plus_defconfig index 8457b78a39c..30638679bc6 100644 --- a/configs/orangepi_pc_plus_defconfig +++ b/configs/orangepi_pc_plus_defconfig @@ -6,6 +6,7 @@ CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=624 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/orangepi_plus2e_defconfig b/configs/orangepi_plus2e_defconfig index f33b75d5e3d..85b25ddd167 100644 --- a/configs/orangepi_plus2e_defconfig +++ b/configs/orangepi_plus2e_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=672 CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/orangepi_plus_defconfig b/configs/orangepi_plus_defconfig index e8fda9a5f11..dff0a2fd6e9 100644 --- a/configs/orangepi_plus_defconfig +++ b/configs/orangepi_plus_defconfig @@ -9,6 +9,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB1_VBUS_PIN="PG13" CONFIG_SATAPWR="PG11" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/orangepi_prime_defconfig b/configs/orangepi_prime_defconfig index 29ef1b8553a..8c4cb57ef0f 100644 --- a/configs/orangepi_prime_defconfig +++ b/configs/orangepi_prime_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881977 # CONFIG_DRAM_ODT_EN is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/orangepi_r1_defconfig b/configs/orangepi_r1_defconfig index 6b68f77833d..e15069c048e 100644 --- a/configs/orangepi_r1_defconfig +++ b/configs/orangepi_r1_defconfig @@ -8,6 +8,7 @@ CONFIG_DRAM_CLK=624 CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_SPI_FLASH_WINBOND=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_win_defconfig b/configs/orangepi_win_defconfig index 9fce313eb9e..830cbbaaeba 100644 --- a/configs/orangepi_win_defconfig +++ b/configs/orangepi_win_defconfig @@ -7,6 +7,7 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MACPWR="PD14" CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_REALTEK=y diff --git a/configs/orangepi_zero2_defconfig b/configs/orangepi_zero2_defconfig index d9c89c88a97..62117548e2b 100644 --- a/configs/orangepi_zero2_defconfig +++ b/configs/orangepi_zero2_defconfig @@ -11,6 +11,7 @@ CONFIG_MMC0_CD_PIN="PF6" CONFIG_R_I2C_ENABLE=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_MAX_SIZE=0xbfa0 +CONFIG_SPL_STACK=0x58000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/orangepi_zero_defconfig b/configs/orangepi_zero_defconfig index e6af0fb8e7d..b5ff84aaf67 100644 --- a/configs/orangepi_zero_defconfig +++ b/configs/orangepi_zero_defconfig @@ -8,6 +8,7 @@ CONFIG_DRAM_CLK=624 CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_SPI_FLASH_WINBOND=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_zero_plus2_defconfig b/configs/orangepi_zero_plus2_defconfig index 623dd040835..79040125dcc 100644 --- a/configs/orangepi_zero_plus2_defconfig +++ b/configs/orangepi_zero_plus2_defconfig @@ -9,6 +9,7 @@ CONFIG_DRAM_ZQ=3881977 CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/orangepi_zero_plus2_h3_defconfig b/configs/orangepi_zero_plus2_h3_defconfig index ff73e84a58d..b2d4f3f8e07 100644 --- a/configs/orangepi_zero_plus2_h3_defconfig +++ b/configs/orangepi_zero_plus2_h3_defconfig @@ -8,6 +8,7 @@ CONFIG_DRAM_CLK=672 CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/orangepi_zero_plus_defconfig b/configs/orangepi_zero_plus_defconfig index e7d6b5d32ca..008384e4601 100644 --- a/configs/orangepi_zero_plus_defconfig +++ b/configs/orangepi_zero_plus_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_CLK=624 CONFIG_DRAM_ZQ=3881977 # CONFIG_DRAM_ODT_EN is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/parrot_r16_defconfig b/configs/parrot_r16_defconfig index 5922e645075..14e9b455feb 100644 --- a/configs/parrot_r16_defconfig +++ b/configs/parrot_r16_defconfig @@ -11,6 +11,7 @@ CONFIG_USB0_ID_DET="PD10" CONFIG_USB1_VBUS_PIN="PD12" CONFIG_AXP_GPIO=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_CONS_INDEX=5 diff --git a/configs/paz00_defconfig b/configs/paz00_defconfig index 08106e98111..091c9a2b484 100644 --- a/configs/paz00_defconfig +++ b/configs/paz00_defconfig @@ -14,6 +14,8 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xffffc CONFIG_SYS_PROMPT="Tegra20 (Paz00) MOD # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2087 diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig index 54bef4e062e..f6658994882 100644 --- a/configs/pcm058_defconfig +++ b/configs/pcm058_defconfig @@ -30,6 +30,8 @@ CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run mmcboot;run nandboot" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x93ffb8 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x18a CONFIG_SPL_DMA=y CONFIG_SPL_FS_EXT4=y diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig index 492451da044..8450d2fc31e 100644 --- a/configs/phycore-imx8mm_defconfig +++ b/configs/phycore-imx8mm_defconfig @@ -29,6 +29,8 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x920000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig index bc2fe25545e..8d783d30cc3 100644 --- a/configs/phycore-imx8mp_defconfig +++ b/configs/phycore-imx8mp_defconfig @@ -32,6 +32,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x960000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig index 522dd6679d7..d791e9dcf8d 100644 --- a/configs/phycore-rk3288_defconfig +++ b/configs/phycore-rk3288_defconfig @@ -25,6 +25,8 @@ CONFIG_CONSOLE_MUX=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_CMD_GPIO=y diff --git a/configs/phycore_pcl063_defconfig b/configs/phycore_pcl063_defconfig index 6dcb789609f..442dcc75ee0 100644 --- a/configs/phycore_pcl063_defconfig +++ b/configs/phycore_pcl063_defconfig @@ -18,6 +18,8 @@ CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/phycore_pcl063_ull_defconfig b/configs/phycore_pcl063_ull_defconfig index e40ca07b7c0..96ea3274705 100644 --- a/configs/phycore_pcl063_ull_defconfig +++ b/configs/phycore_pcl063_ull_defconfig @@ -18,6 +18,8 @@ CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run mmc_mmc_fit" CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/pico-dwarf-imx6ul_defconfig b/configs/pico-dwarf-imx6ul_defconfig index 15dc2098ad4..298865bb2b9 100644 --- a/configs/pico-dwarf-imx6ul_defconfig +++ b/configs/pico-dwarf-imx6ul_defconfig @@ -25,6 +25,8 @@ CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx6ul-pico-dwarf.dtb" CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y diff --git a/configs/pico-dwarf-imx7d_defconfig b/configs/pico-dwarf-imx7d_defconfig index 00067d2e46d..e1d0e3438dd 100644 --- a/configs/pico-dwarf-imx7d_defconfig +++ b/configs/pico-dwarf-imx7d_defconfig @@ -27,6 +27,8 @@ CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx7d-pico-dwarf.dtb" CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x946bb8 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pico-hobbit-imx6ul_defconfig b/configs/pico-hobbit-imx6ul_defconfig index eeb95d431db..15fe0df9c00 100644 --- a/configs/pico-hobbit-imx6ul_defconfig +++ b/configs/pico-hobbit-imx6ul_defconfig @@ -26,6 +26,8 @@ CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx6ul-pico-hobbit.dtb" CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig index 64c2ca4b189..4ccbcf90a61 100644 --- a/configs/pico-hobbit-imx7d_defconfig +++ b/configs/pico-hobbit-imx7d_defconfig @@ -27,6 +27,8 @@ CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx7d-pico-hobbit.dtb" CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x946bb8 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pico-imx6_defconfig b/configs/pico-imx6_defconfig index 09809542606..bc20d425332 100644 --- a/configs/pico-imx6_defconfig +++ b/configs/pico-imx6_defconfig @@ -27,6 +27,8 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_BOOTCOMMAND="run default_boot" CONFIG_DEFAULT_FDT_FILE="ask" CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig index 7e923d0bc02..37cbc96dc0e 100644 --- a/configs/pico-imx6ul_defconfig +++ b/configs/pico-imx6ul_defconfig @@ -26,6 +26,8 @@ CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="ask" CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y diff --git a/configs/pico-imx7d_bl33_defconfig b/configs/pico-imx7d_bl33_defconfig index d13336d0548..3d342d78186 100644 --- a/configs/pico-imx7d_bl33_defconfig +++ b/configs/pico-imx7d_bl33_defconfig @@ -28,6 +28,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x946bb8 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig index a6ee5cebfe2..df57fa13321 100644 --- a/configs/pico-imx7d_defconfig +++ b/configs/pico-imx7d_defconfig @@ -27,6 +27,8 @@ CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="ask" CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x946bb8 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pico-imx8mq_defconfig b/configs/pico-imx8mq_defconfig index b706b80874f..1a8f2015b8a 100644 --- a/configs/pico-imx8mq_defconfig +++ b/configs/pico-imx8mq_defconfig @@ -33,6 +33,8 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x187ff0 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/pico-nymph-imx7d_defconfig b/configs/pico-nymph-imx7d_defconfig index 00067d2e46d..e1d0e3438dd 100644 --- a/configs/pico-nymph-imx7d_defconfig +++ b/configs/pico-nymph-imx7d_defconfig @@ -27,6 +27,8 @@ CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx7d-pico-dwarf.dtb" CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x946bb8 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pico-pi-imx6ul_defconfig b/configs/pico-pi-imx6ul_defconfig index 2cc6d4f8bed..c3613d5745f 100644 --- a/configs/pico-pi-imx6ul_defconfig +++ b/configs/pico-pi-imx6ul_defconfig @@ -26,6 +26,8 @@ CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx6ul-pico-pi.dtb" CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig index b74b2582cb9..c799968944c 100644 --- a/configs/pico-pi-imx7d_defconfig +++ b/configs/pico-pi-imx7d_defconfig @@ -27,6 +27,8 @@ CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx7d-pico-pi.dtb" CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x946bb8 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pine64-lts_defconfig b/configs/pine64-lts_defconfig index 94c03f16a8c..c6b4f7bf143 100644 --- a/configs/pine64-lts_defconfig +++ b/configs/pine64-lts_defconfig @@ -10,6 +10,7 @@ CONFIG_MMC0_CD_PIN="" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/pine64_plus_defconfig b/configs/pine64_plus_defconfig index dc02ca10d7e..7dbe061790c 100644 --- a/configs/pine64_plus_defconfig +++ b/configs/pine64_plus_defconfig @@ -6,6 +6,7 @@ CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_PINE64_DT_SELECTION=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 CONFIG_OF_LIST="sun50i-a64-pine64 sun50i-a64-pine64-plus" CONFIG_PHY_REALTEK=y diff --git a/configs/pine_h64_defconfig b/configs/pine_h64_defconfig index 7466c3b2c5f..2cddcf58301 100644 --- a/configs/pine_h64_defconfig +++ b/configs/pine_h64_defconfig @@ -11,6 +11,7 @@ CONFIG_USB3_VBUS_PIN="PL5" CONFIG_SPL_SPI_SUNXI=y # CONFIG_PSCI_RESET is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x118000 CONFIG_SYS_PBSIZE=1024 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig index 5f763acfcef..c831830656c 100644 --- a/configs/pinebook-pro-rk3399_defconfig +++ b/configs/pinebook-pro-rk3399_defconfig @@ -25,6 +25,8 @@ CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SPL_MTD_SUPPORT=y diff --git a/configs/pinebook_defconfig b/configs/pinebook_defconfig index 1bdfcf27be0..bf070aab8b3 100644 --- a/configs/pinebook_defconfig +++ b/configs/pinebook_defconfig @@ -8,6 +8,7 @@ CONFIG_DRAM_CLK=552 CONFIG_DRAM_ZQ=3881949 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_R_I2C_ENABLE=y +CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/pinecube_defconfig b/configs/pinecube_defconfig index 1259b85361d..531cf0f83b6 100644 --- a/configs/pinecube_defconfig +++ b/configs/pinecube_defconfig @@ -8,6 +8,7 @@ CONFIG_DRAM_CLK=504 CONFIG_DRAM_ODT_EN=y CONFIG_I2C0_ENABLE=y # CONFIG_HAS_ARMV7_SECURE_BASE is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/pinephone_defconfig b/configs/pinephone_defconfig index ae60943e95a..d882c0cc880 100644 --- a/configs/pinephone_defconfig +++ b/configs/pinephone_defconfig @@ -10,6 +10,7 @@ CONFIG_DRAM_ZQ=3881949 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_PINEPHONE_DT_SELECTION=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 CONFIG_OF_LIST="sun50i-a64-pinephone-1.1 sun50i-a64-pinephone-1.2" CONFIG_LED_STATUS=y diff --git a/configs/pinetab_defconfig b/configs/pinetab_defconfig index 4ecd241b52f..f90cb0d1f81 100644 --- a/configs/pinetab_defconfig +++ b/configs/pinetab_defconfig @@ -8,4 +8,5 @@ CONFIG_DRAM_CLK=552 CONFIG_DRAM_ZQ=3881949 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 diff --git a/configs/plutux_defconfig b/configs/plutux_defconfig index 95b25162777..fe59c10b192 100644 --- a/configs/plutux_defconfig +++ b/configs/plutux_defconfig @@ -16,6 +16,8 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xffffc CONFIG_SYS_PROMPT="Tegra20 (Plutux) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2084 diff --git a/configs/polaroid_mid2407pxe03_defconfig b/configs/polaroid_mid2407pxe03_defconfig index ed8b780b01e..74ffaf1d011 100644 --- a/configs/polaroid_mid2407pxe03_defconfig +++ b/configs/polaroid_mid2407pxe03_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 diff --git a/configs/polaroid_mid2809pxe04_defconfig b/configs/polaroid_mid2809pxe04_defconfig index 5953344491c..10057ade9a5 100644 --- a/configs/polaroid_mid2809pxe04_defconfig +++ b/configs/polaroid_mid2809pxe04_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig index 35ec663b3e6..5b5039e290b 100644 --- a/configs/popmetal-rk3288_defconfig +++ b/configs/popmetal-rk3288_defconfig @@ -25,6 +25,8 @@ CONFIG_CONSOLE_MUX=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_CMD_GPIO=y diff --git a/configs/porter_defconfig b/configs/porter_defconfig index c176051cbd0..568ec18049d 100644 --- a/configs/porter_defconfig +++ b/configs/porter_defconfig @@ -34,6 +34,8 @@ CONFIG_SPL_MAX_SIZE=0x4000 CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xe6340000 CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/pov_protab2_ips9_defconfig b/configs/pov_protab2_ips9_defconfig index cf7f57574e0..523de63fc27 100644 --- a/configs/pov_protab2_ips9_defconfig +++ b/configs/pov_protab2_ips9_defconfig @@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index f7431ddf3ec..e859172c5cd 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -26,6 +26,8 @@ CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x10000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xff8effff CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 diff --git a/configs/px30-core-ctouch2-of10-px30_defconfig b/configs/px30-core-ctouch2-of10-px30_defconfig index 66d2ca7c28c..d0bada7bae7 100644 --- a/configs/px30-core-ctouch2-of10-px30_defconfig +++ b/configs/px30-core-ctouch2-of10-px30_defconfig @@ -36,6 +36,8 @@ CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y # CONFIG_TPL_BANNER_PRINT is not set CONFIG_SPL_ATF=y diff --git a/configs/px30-core-ctouch2-px30_defconfig b/configs/px30-core-ctouch2-px30_defconfig index 90fb411d551..8e4de8e8b78 100644 --- a/configs/px30-core-ctouch2-px30_defconfig +++ b/configs/px30-core-ctouch2-px30_defconfig @@ -36,6 +36,8 @@ CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y # CONFIG_TPL_BANNER_PRINT is not set CONFIG_SPL_ATF=y diff --git a/configs/px30-core-edimm2.2-px30_defconfig b/configs/px30-core-edimm2.2-px30_defconfig index cc2d5cbeacc..3a4dbb60ebf 100644 --- a/configs/px30-core-edimm2.2-px30_defconfig +++ b/configs/px30-core-edimm2.2-px30_defconfig @@ -36,6 +36,8 @@ CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y # CONFIG_TPL_BANNER_PRINT is not set CONFIG_SPL_ATF=y diff --git a/configs/q8_a13_tablet_defconfig b/configs/q8_a13_tablet_defconfig index 08be8810d8c..83981d3ac74 100644 --- a/configs/q8_a13_tablet_defconfig +++ b/configs/q8_a13_tablet_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/q8_a23_tablet_800x480_defconfig b/configs/q8_a23_tablet_800x480_defconfig index 6053587dddf..11d208a34a0 100644 --- a/configs/q8_a23_tablet_800x480_defconfig +++ b/configs/q8_a23_tablet_800x480_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 diff --git a/configs/q8_a33_tablet_1024x600_defconfig b/configs/q8_a33_tablet_1024x600_defconfig index 0870d234e86..c848e62d73c 100644 --- a/configs/q8_a33_tablet_1024x600_defconfig +++ b/configs/q8_a33_tablet_1024x600_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 diff --git a/configs/q8_a33_tablet_800x480_defconfig b/configs/q8_a33_tablet_800x480_defconfig index 3b99004fb9a..ee5654185b1 100644 --- a/configs/q8_a33_tablet_800x480_defconfig +++ b/configs/q8_a33_tablet_800x480_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 diff --git a/configs/r7-tv-dongle_defconfig b/configs/r7-tv-dongle_defconfig index a8452ba3b74..f5adbd3686c 100644 --- a/configs/r7-tv-dongle_defconfig +++ b/configs/r7-tv-dongle_defconfig @@ -6,6 +6,7 @@ CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=384 CONFIG_USB1_VBUS_PIN="PG13" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig index b42e13bb558..dfb4adf6654 100644 --- a/configs/r8a77970_eagle_defconfig +++ b/configs/r8a77970_eagle_defconfig @@ -23,6 +23,8 @@ CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77970-eagle. CONFIG_DEFAULT_FDT_FILE="r8a77970-eagle.dtb" CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_BSS_MAX_SIZE=0x1000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xe6304000 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 diff --git a/configs/r8a77980_condor_defconfig b/configs/r8a77980_condor_defconfig index f05590f7b3d..d24204d4138 100644 --- a/configs/r8a77980_condor_defconfig +++ b/configs/r8a77980_condor_defconfig @@ -24,6 +24,8 @@ CONFIG_DEFAULT_FDT_FILE="r8a77980-condor.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_BSS_MAX_SIZE=0x1000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xe6304000 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig index a2349c03dd5..33c27747219 100644 --- a/configs/r8a77990_ebisu_defconfig +++ b/configs/r8a77990_ebisu_defconfig @@ -25,6 +25,8 @@ CONFIG_DEFAULT_FDT_FILE="r8a77990-ebisu.dtb" CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_UPDATE_TFTP=y CONFIG_SPL_BSS_MAX_SIZE=0x1000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xe6304000 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig index 1fe0d2abc58..f1fd84a4bd2 100644 --- a/configs/r8a77995_draak_defconfig +++ b/configs/r8a77995_draak_defconfig @@ -24,6 +24,8 @@ CONFIG_DEFAULT_FDT_FILE="r8a77995-draak.dtb" CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_UPDATE_TFTP=y CONFIG_SPL_BSS_MAX_SIZE=0x1000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xe6304000 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 diff --git a/configs/r8a779a0_falcon_defconfig b/configs/r8a779a0_falcon_defconfig index 67e9aa3be7b..8477127e12b 100644 --- a/configs/r8a779a0_falcon_defconfig +++ b/configs/r8a779a0_falcon_defconfig @@ -26,6 +26,8 @@ CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a779a0-falcon CONFIG_DEFAULT_FDT_FILE="r8a779a0-falcon.dtb" CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_BSS_MAX_SIZE=0x1000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xe6304000 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 diff --git a/configs/rcar3_salvator-x_defconfig b/configs/rcar3_salvator-x_defconfig index ab865bcc940..ce22f8b9ecc 100644 --- a/configs/rcar3_salvator-x_defconfig +++ b/configs/rcar3_salvator-x_defconfig @@ -24,6 +24,8 @@ CONFIG_DEFAULT_FDT_FILE="r8a77950-salvator-x.dtb" CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_UPDATE_TFTP=y CONFIG_SPL_BSS_MAX_SIZE=0x1000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xe6304000 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 diff --git a/configs/rcar3_ulcb_defconfig b/configs/rcar3_ulcb_defconfig index 0b512765331..2b7c2eace4c 100644 --- a/configs/rcar3_ulcb_defconfig +++ b/configs/rcar3_ulcb_defconfig @@ -24,6 +24,8 @@ CONFIG_DEFAULT_FDT_FILE="r8a77950-ulcb.dtb" CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_UPDATE_TFTP=y CONFIG_SPL_BSS_MAX_SIZE=0x1000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xe6304000 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig index 8e74a1f087f..a14f9a409e0 100644 --- a/configs/riotboard_defconfig +++ b/configs/riotboard_defconfig @@ -28,6 +28,8 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_RAW_IMAGE_SUPPORT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_FS_LOAD_ARGS_NAME="imx6dl-riotboard.dtb" diff --git a/configs/roc-cc-rk3308_defconfig b/configs/roc-cc-rk3308_defconfig index e0464a3f2cf..a35326f9ec8 100644 --- a/configs/roc-cc-rk3308_defconfig +++ b/configs/roc-cc-rk3308_defconfig @@ -27,6 +27,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig index fdaf633f60f..1b4fc3381cc 100644 --- a/configs/roc-cc-rk3328_defconfig +++ b/configs/roc-cc-rk3328_defconfig @@ -33,6 +33,8 @@ CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig index fbcac4cbdb2..1748b7d8702 100644 --- a/configs/roc-pc-mezzanine-rk3399_defconfig +++ b/configs/roc-pc-mezzanine-rk3399_defconfig @@ -26,6 +26,8 @@ CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x20000 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index b053f7e5846..7b086a1cc1d 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -26,6 +26,8 @@ CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x20000 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig index 89566cdc757..d9d5f5e5efc 100644 --- a/configs/rock-pi-4-rk3399_defconfig +++ b/configs/rock-pi-4-rk3399_defconfig @@ -22,6 +22,8 @@ CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/rock-pi-4c-rk3399_defconfig b/configs/rock-pi-4c-rk3399_defconfig index 1820b7695ec..220b2af0088 100644 --- a/configs/rock-pi-4c-rk3399_defconfig +++ b/configs/rock-pi-4c-rk3399_defconfig @@ -22,6 +22,8 @@ CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig index e1e50396d32..e231593bd56 100644 --- a/configs/rock-pi-e-rk3328_defconfig +++ b/configs/rock-pi-e-rk3328_defconfig @@ -34,6 +34,8 @@ CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SPL_I2C=y diff --git a/configs/rock-pi-n10-rk3399pro_defconfig b/configs/rock-pi-n10-rk3399pro_defconfig index c468d7d1ab3..e283476bb9a 100644 --- a/configs/rock-pi-n10-rk3399pro_defconfig +++ b/configs/rock-pi-n10-rk3399pro_defconfig @@ -24,6 +24,8 @@ CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/rock-pi-n8-rk3288_defconfig b/configs/rock-pi-n8-rk3288_defconfig index 66258f02c80..7abb343ad69 100644 --- a/configs/rock-pi-n8-rk3288_defconfig +++ b/configs/rock-pi-n8-rk3288_defconfig @@ -24,6 +24,8 @@ CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_CMD_SPL=y diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig index ffc11625e14..c06ab641c30 100644 --- a/configs/rock2_defconfig +++ b/configs/rock2_defconfig @@ -25,6 +25,8 @@ CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_CMD_GPIO=y diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig index 7026b6f4d92..aa4cdde4872 100644 --- a/configs/rock64-rk3328_defconfig +++ b/configs/rock64-rk3328_defconfig @@ -33,6 +33,8 @@ CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig index 788adb83e2d..5e9f2cff33f 100644 --- a/configs/rock960-rk3399_defconfig +++ b/configs/rock960-rk3399_defconfig @@ -21,6 +21,8 @@ CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/rock_defconfig b/configs/rock_defconfig index dfc9257225f..e99272ef226 100644 --- a/configs/rock_defconfig +++ b/configs/rock_defconfig @@ -27,6 +27,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x7800 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x10087fff CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_RANDOM_UUID=y diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig index 8a66931edd0..fff00fba6d9 100644 --- a/configs/rockpro64-rk3399_defconfig +++ b/configs/rockpro64-rk3399_defconfig @@ -25,6 +25,8 @@ CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SPL_SPI_LOAD=y diff --git a/configs/sama5d27_giantboard_defconfig b/configs/sama5d27_giantboard_defconfig index 4dec17850bd..50f5cacbdde 100644 --- a/configs/sama5d27_giantboard_defconfig +++ b/configs/sama5d27_giantboard_defconfig @@ -40,6 +40,8 @@ CONFIG_BOOTCOMMAND="fatload mmc 0 0x22000000 at91-sama5d27_giantboard.dtb; fatlo CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x218000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig index 2d617200e9e..76af9fc8cb1 100644 --- a/configs/sama5d27_som1_ek_mmc1_defconfig +++ b/configs/sama5d27_som1_ek_mmc1_defconfig @@ -36,6 +36,8 @@ CONFIG_BOOTCOMMAND="fatload mmc 1 0x22000000 at91-sama5d27_som1_ek.dtb; fatload CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x218000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig index 5bbae1299ad..3852754ceb3 100644 --- a/configs/sama5d27_som1_ek_mmc_defconfig +++ b/configs/sama5d27_som1_ek_mmc_defconfig @@ -37,6 +37,8 @@ CONFIG_BOOTCOMMAND="fatload mmc 0 0x22000000 at91-sama5d27_som1_ek.dtb; fatload CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x218000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig index c671328e0c4..35eefb780b5 100644 --- a/configs/sama5d27_som1_ek_qspiflash_defconfig +++ b/configs/sama5d27_som1_ek_qspiflash_defconfig @@ -35,6 +35,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwai CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x218000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig index 78a6ba6f48c..6ea16c67994 100644 --- a/configs/sama5d27_wlsom1_ek_mmc_defconfig +++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig @@ -36,6 +36,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x218000 CONFIG_SPL_DISPLAY_PRINT=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_AT91_MCK_BYPASS=y diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig index b3490e940c1..394a7ab64fb 100644 --- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig +++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig @@ -36,6 +36,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x218000 CONFIG_SPL_DISPLAY_PRINT=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_DM_SPI_FLASH=y diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig index 9a44370efc7..3772626e4b9 100644 --- a/configs/sama5d2_icp_mmc_defconfig +++ b/configs/sama5d2_icp_mmc_defconfig @@ -35,6 +35,8 @@ CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x21000000 at91-sama5d2_icp.dtb; fatload mmc CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x218000 CONFIG_SPL_DISPLAY_PRINT=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_RAM_SUPPORT=y diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig index 3865c66f9d2..f80fca265ee 100644 --- a/configs/sama5d2_xplained_emmc_defconfig +++ b/configs/sama5d2_xplained_emmc_defconfig @@ -35,6 +35,8 @@ CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x22000000 at91-sama5d2_xplained.dtb; fatloa # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x218000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index 10e28fadc6e..f4a7f2c6a8d 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -37,6 +37,8 @@ CONFIG_BOOTCOMMAND="fatload mmc 1:1 0x22000000 at91-sama5d2_xplained.dtb; fatloa CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x218000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig index 7e92c29e87d..bd13e926611 100644 --- a/configs/sama5d2_xplained_qspiflash_defconfig +++ b/configs/sama5d2_xplained_qspiflash_defconfig @@ -38,6 +38,8 @@ CONFIG_BOOTCOMMAND="sf probe 1:0; sf read 0x22000000 0x180000 0x80000; sf read 0 CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x218000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index 6a81c728e71..32e2ea213dc 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -39,6 +39,8 @@ CONFIG_BOOTCOMMAND="ext4load mmc 0:1 0x22000000 /boot/at91-sama5d2_xplained.dtb; CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x218000 CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index 4f4860e8984..3ed976053a3 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -36,6 +36,8 @@ CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_ # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x318000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index 66381750ce9..6e9ba1b490d 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -33,6 +33,8 @@ CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x318000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index 741ab76b3f1..4c7a7949682 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -38,6 +38,8 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x318000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index 751f1f5904a..6d6a12c6179 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -35,6 +35,8 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x318000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index 952f65ba5b5..ab681fdda9d 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -38,6 +38,8 @@ CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x220 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x318000 CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index a11d260057d..d43e86a31fe 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -37,6 +37,8 @@ CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_ CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x218000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index 715b59b4fb9..10cfb06f433 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -34,6 +34,8 @@ CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0 CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x218000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index e42b6f7cd9d..b41c6c7d06e 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -39,6 +39,8 @@ CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x220 CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x218000 CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig index e0c10e0f240..3d5eb689484 100644 --- a/configs/sama5d4ek_mmc_defconfig +++ b/configs/sama5d4ek_mmc_defconfig @@ -38,6 +38,8 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x218000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig index dc6c3c4c580..8e5295aafe1 100644 --- a/configs/sama5d4ek_nandflash_defconfig +++ b/configs/sama5d4ek_nandflash_defconfig @@ -35,6 +35,8 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x218000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig index b73a35c8a74..13708da1654 100644 --- a/configs/sama5d4ek_spiflash_defconfig +++ b/configs/sama5d4ek_spiflash_defconfig @@ -38,6 +38,8 @@ CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x220 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x218000 CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig index fb67ce6e155..ea97dcf57a4 100644 --- a/configs/seaboard_defconfig +++ b/configs/seaboard_defconfig @@ -14,6 +14,8 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_PREBOOT=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xffffc CONFIG_SYS_PROMPT="Tegra20 (SeaBoard) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2086 diff --git a/configs/seeed_npi_imx6ull_defconfig b/configs/seeed_npi_imx6ull_defconfig index 8fb5590c1eb..860c98a4ad4 100644 --- a/configs/seeed_npi_imx6ull_defconfig +++ b/configs/seeed_npi_imx6ull_defconfig @@ -20,6 +20,8 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_USB_HOST=y diff --git a/configs/sifive_unleashed_defconfig b/configs/sifive_unleashed_defconfig index f49fd9fba52..326bca72bb5 100644 --- a/configs/sifive_unleashed_defconfig +++ b/configs/sifive_unleashed_defconfig @@ -25,6 +25,8 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x81cfe70 CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig index af8cc68cf62..989029b586e 100644 --- a/configs/sifive_unmatched_defconfig +++ b/configs/sifive_unmatched_defconfig @@ -29,6 +29,8 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x81cfe60 CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/silinux_ek874_defconfig b/configs/silinux_ek874_defconfig index e728cb22269..ce211a9a1aa 100644 --- a/configs/silinux_ek874_defconfig +++ b/configs/silinux_ek874_defconfig @@ -25,6 +25,8 @@ CONFIG_DEFAULT_FDT_FILE="r8a774c0-ek874.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_BSS_MAX_SIZE=0x1000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xe6304000 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 diff --git a/configs/silk_defconfig b/configs/silk_defconfig index 684e36f33d1..ac827ff2027 100644 --- a/configs/silk_defconfig +++ b/configs/silk_defconfig @@ -34,6 +34,8 @@ CONFIG_SPL_MAX_SIZE=0x4000 CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xe6340000 CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig index 8a11e7b12f4..95048f8c4b1 100644 --- a/configs/smartweb_defconfig +++ b/configs/smartweb_defconfig @@ -35,6 +35,8 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x1000 CONFIG_SPL_PAD_TO=0x20000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x301000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_RAW_ONLY=y CONFIG_SPL_NAND_DRIVERS=y diff --git a/configs/sniper_defconfig b/configs/sniper_defconfig index 4dbe4f1964d..2f77a39c322 100644 --- a/configs/sniper_defconfig +++ b/configs/sniper_defconfig @@ -14,6 +14,8 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_BOOTCOMMAND="setenv boot_mmc_part ${kernel_mmc_part}; if test reboot-${reboot-mode} = reboot-r; then echo recovery; setenv boot_mmc_part ${recovery_mmc_part}; fi; if test reboot-${reboot-mode} = reboot-b; then echo fastboot; fastboot 0; fi; part start mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_start; part size mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_size; mmc dev ${boot_mmc_dev}; mmc read ${kernel_addr_r} ${boot_mmc_start} ${boot_mmc_size} && bootm ${kernel_addr_r};" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SPL_MAX_SIZE=0xec00 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x4020fffc # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=2 diff --git a/configs/socfpga_agilex_atf_defconfig b/configs/socfpga_agilex_atf_defconfig index 10f3947b5db..869305fefbe 100644 --- a/configs/socfpga_agilex_atf_defconfig +++ b/configs/socfpga_agilex_atf_defconfig @@ -29,6 +29,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xffe3f000 CONFIG_SPL_CRC32=y CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig index 23e1d787435..11a4a544ac4 100644 --- a/configs/socfpga_agilex_defconfig +++ b/configs/socfpga_agilex_defconfig @@ -26,6 +26,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot" CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xffe3f000 CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000 diff --git a/configs/socfpga_agilex_vab_defconfig b/configs/socfpga_agilex_vab_defconfig index c775ecbdcca..85ec9094a53 100644 --- a/configs/socfpga_agilex_vab_defconfig +++ b/configs/socfpga_agilex_vab_defconfig @@ -30,6 +30,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xffe3f000 CONFIG_SPL_CRC32=y CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig index d326a3fb82d..8b8d7e4968e 100644 --- a/configs/socfpga_arria10_defconfig +++ b/configs/socfpga_arria10_defconfig @@ -28,6 +28,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_NO_BSS_LIMIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xffe2b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_FPGA=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index 62913f6702e..24c21090b19 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -22,6 +22,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x0 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index 7809b57ab7c..d010b54240d 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -22,6 +22,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x0 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_dbm_soc1_defconfig b/configs/socfpga_dbm_soc1_defconfig index d6b2e663989..a1574b6a5d7 100644 --- a/configs/socfpga_dbm_soc1_defconfig +++ b/configs/socfpga_dbm_soc1_defconfig @@ -25,6 +25,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x0 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_HUSH_PARSER=y diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig index 036fdcc19af..ec7355d2cc4 100644 --- a/configs/socfpga_de0_nano_soc_defconfig +++ b/configs/socfpga_de0_nano_soc_defconfig @@ -23,6 +23,8 @@ CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x0 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig index 71c9eaba7a3..b62f0299628 100644 --- a/configs/socfpga_de10_nano_defconfig +++ b/configs/socfpga_de10_nano_defconfig @@ -22,6 +22,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x0 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_de10_standard_defconfig b/configs/socfpga_de10_standard_defconfig index 9d496021d82..b8bc9da4d0e 100644 --- a/configs/socfpga_de10_standard_defconfig +++ b/configs/socfpga_de10_standard_defconfig @@ -22,6 +22,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x0 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig index b800f2762d8..749ec540b4f 100644 --- a/configs/socfpga_de1_soc_defconfig +++ b/configs/socfpga_de1_soc_defconfig @@ -23,6 +23,8 @@ CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x0 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_ASKENV=y diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig index c9a8650c91a..c3b6368f617 100644 --- a/configs/socfpga_is1_defconfig +++ b/configs/socfpga_is1_defconfig @@ -25,6 +25,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xfffffff8 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig index 4f703cf3d0b..18e125f5bdf 100644 --- a/configs/socfpga_mcvevk_defconfig +++ b/configs/socfpga_mcvevk_defconfig @@ -23,6 +23,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x0 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_n5x_atf_defconfig b/configs/socfpga_n5x_atf_defconfig index 7c7f90146d6..88763d1e5ab 100644 --- a/configs/socfpga_n5x_atf_defconfig +++ b/configs/socfpga_n5x_atf_defconfig @@ -28,6 +28,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xffe3f000 CONFIG_SPL_CRC32=y CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/socfpga_n5x_defconfig b/configs/socfpga_n5x_defconfig index 8f851e80e29..a07a338f108 100644 --- a/configs/socfpga_n5x_defconfig +++ b/configs/socfpga_n5x_defconfig @@ -23,6 +23,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot" CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xffe3f000 CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000 diff --git a/configs/socfpga_n5x_vab_defconfig b/configs/socfpga_n5x_vab_defconfig index 82a4f980b89..8efdab84e14 100644 --- a/configs/socfpga_n5x_vab_defconfig +++ b/configs/socfpga_n5x_vab_defconfig @@ -29,6 +29,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xffe3f000 CONFIG_SPL_CRC32=y CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig index d59e841f761..72cf0d1bc88 100644 --- a/configs/socfpga_secu1_defconfig +++ b/configs/socfpga_secu1_defconfig @@ -36,6 +36,8 @@ CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x0 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE is not set diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig index 999e696aa7a..2a02f1dbfaa 100644 --- a/configs/socfpga_sockit_defconfig +++ b/configs/socfpga_sockit_defconfig @@ -22,6 +22,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x0 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index 82549a80af5..3d0c48d7662 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -21,6 +21,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x0 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index cbb751e5a20..53d6b82972f 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -29,6 +29,8 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xfffffff8 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_stratix10_atf_defconfig b/configs/socfpga_stratix10_atf_defconfig index 52f99dad754..9969ac00be3 100644 --- a/configs/socfpga_stratix10_atf_defconfig +++ b/configs/socfpga_stratix10_atf_defconfig @@ -29,6 +29,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xffe3f000 CONFIG_SPL_CRC32=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000 diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index 23050c7f663..a90e404b440 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -28,6 +28,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot" CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xffe3f000 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x3C00000 CONFIG_HUSH_PARSER=y diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index 37aae07fd64..0f4aa905147 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -29,6 +29,8 @@ CONFIG_CLOCKS=y CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x0 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_CMDLINE_PS_SUPPORT=y diff --git a/configs/sopine_baseboard_defconfig b/configs/sopine_baseboard_defconfig index f2220465f39..576e86493a2 100644 --- a/configs/sopine_baseboard_defconfig +++ b/configs/sopine_baseboard_defconfig @@ -11,6 +11,7 @@ CONFIG_MMC0_CD_PIN="" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig index 5c131252a5d..fe722ce507b 100644 --- a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig @@ -19,6 +19,8 @@ CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x3db00 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x30000000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig index 688c9344d17..f47bc1b2341 100644 --- a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig @@ -19,6 +19,8 @@ CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x3db00 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x30000000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig index f6d67f3cc82..9ddd585ecf0 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig @@ -19,6 +19,8 @@ CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x3db00 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x30000000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig index 39c2f295701..86d55478f5a 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig @@ -19,6 +19,8 @@ CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x3db00 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x30000000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index b607c7256e5..be49a8e7712 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -29,6 +29,8 @@ CONFIG_SPL_LOG=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x3db00 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x30000000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 16dcc4ad56f..fa3cff00cea 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -30,6 +30,8 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x3db00 CONFIG_SPL_LEGACY_IMAGE_FORMAT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x30000000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index 9a7266229be..9f32d2c4e81 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -28,6 +28,8 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x3db00 CONFIG_SPL_LEGACY_IMAGE_FORMAT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x30000000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/stout_defconfig b/configs/stout_defconfig index 9ef96bafc99..4f0cda9c897 100644 --- a/configs/stout_defconfig +++ b/configs/stout_defconfig @@ -34,6 +34,8 @@ CONFIG_SPL_MAX_SIZE=0x4000 CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xe6340000 CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/sun8i_a23_evb_defconfig b/configs/sun8i_a23_evb_defconfig index 21ea2ba66ef..59315cdb05d 100644 --- a/configs/sun8i_a23_evb_defconfig +++ b/configs/sun8i_a23_evb_defconfig @@ -9,6 +9,7 @@ CONFIG_USB0_VBUS_PIN="axp_drivebus" CONFIG_USB0_VBUS_DET="axp_vbus_detect" CONFIG_USB1_VBUS_PIN="PH7" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_CONS_INDEX=5 CONFIG_USB_EHCI_HCD=y diff --git a/configs/sunxi_Gemei_G9_defconfig b/configs/sunxi_Gemei_G9_defconfig index 8b8a880d45e..b77c4e7a3cb 100644 --- a/configs/sunxi_Gemei_G9_defconfig +++ b/configs/sunxi_Gemei_G9_defconfig @@ -11,6 +11,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig index a9dc04cdfb9..d9e61aee3df 100644 --- a/configs/syzygy_hub_defconfig +++ b/configs/syzygy_hub_defconfig @@ -27,6 +27,8 @@ CONFIG_USE_PREBOOT=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL_STACK_R=y CONFIG_SPL_FS_LOAD_ARGS_NAME="system.dtb" CONFIG_SPL_OS_BOOT=y diff --git a/configs/tanix_tx6_defconfig b/configs/tanix_tx6_defconfig index cf34b508a73..d1f12fba9bb 100644 --- a/configs/tanix_tx6_defconfig +++ b/configs/tanix_tx6_defconfig @@ -8,4 +8,5 @@ CONFIG_DRAM_CLK=648 CONFIG_MMC0_CD_PIN="PF6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x118000 CONFIG_SYS_PBSIZE=1024 diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig index 79ceebe2db0..471feed3dfb 100644 --- a/configs/taurus_defconfig +++ b/configs/taurus_defconfig @@ -44,6 +44,8 @@ CONFIG_SPL_PAD_TO=0x20000 CONFIG_SPL_BSS_MAX_SIZE=0x600 # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x304000 CONFIG_SPL_CRC32=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_RAW_ONLY=y diff --git a/configs/tbs_a711_defconfig b/configs/tbs_a711_defconfig index a8a9b855cc3..3dd9252a742 100644 --- a/configs/tbs_a711_defconfig +++ b/configs/tbs_a711_defconfig @@ -13,6 +13,7 @@ CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT" CONFIG_USB0_ID_DET="PH11" CONFIG_AXP_GPIO=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_AXP_DCDC5_VOLT=1200 diff --git a/configs/tec-ng_defconfig b/configs/tec-ng_defconfig index e305b5bcb10..cb80b10aecf 100644 --- a/configs/tec-ng_defconfig +++ b/configs/tec-ng_defconfig @@ -16,6 +16,8 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x800ffffc CONFIG_SYS_PROMPT="Tegra30 (TEC-NG) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2084 diff --git a/configs/tec_defconfig b/configs/tec_defconfig index 9c644e68220..80fbdda5d1c 100644 --- a/configs/tec_defconfig +++ b/configs/tec_defconfig @@ -15,6 +15,8 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xffffc CONFIG_SYS_PROMPT="Tegra20 (TEC) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2081 diff --git a/configs/teres_i_defconfig b/configs/teres_i_defconfig index 12e91a58936..cd6d825715e 100644 --- a/configs/teres_i_defconfig +++ b/configs/teres_i_defconfig @@ -9,6 +9,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB1_VBUS_PIN="PL7" CONFIG_I2C0_ENABLE=y CONFIG_PREBOOT="setenv usb_pgood_delay 2000; usb start" +CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index b830d75dba6..f858d732abd 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -32,6 +32,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x1bfd0 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL_I2C=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig index 32afbebc545..ce12b79ac47 100644 --- a/configs/tinker-rk3288_defconfig +++ b/configs/tinker-rk3288_defconfig @@ -25,6 +25,8 @@ CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_I2C=y diff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig index 072012e066b..8dede27efcc 100644 --- a/configs/tinker-s-rk3288_defconfig +++ b/configs/tinker-s-rk3288_defconfig @@ -25,6 +25,8 @@ CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x300000 CONFIG_SPL_I2C=y diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig index ed6ac3b7ae8..11d6e450276 100644 --- a/configs/topic_miami_defconfig +++ b/configs/topic_miami_defconfig @@ -27,6 +27,8 @@ CONFIG_USE_PREBOOT=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig index a80ee224320..32dc5478ddd 100644 --- a/configs/topic_miamilite_defconfig +++ b/configs/topic_miamilite_defconfig @@ -27,6 +27,8 @@ CONFIG_USE_PREBOOT=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig index a402478f64c..2de1e96bdf8 100644 --- a/configs/topic_miamiplus_defconfig +++ b/configs/topic_miamiplus_defconfig @@ -27,6 +27,8 @@ CONFIG_USE_PREBOOT=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 diff --git a/configs/trimslice_defconfig b/configs/trimslice_defconfig index 7d79ea3ec53..b9d465c0e57 100644 --- a/configs/trimslice_defconfig +++ b/configs/trimslice_defconfig @@ -16,6 +16,8 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xffffc CONFIG_SYS_PROMPT="Tegra20 (TrimSlice) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2087 diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index a5087581a4e..c3ab35e9646 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -41,6 +41,8 @@ CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x22fd0 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig index e21945116c0..03875f9039d 100644 --- a/configs/udoo_defconfig +++ b/configs/udoo_defconfig @@ -22,6 +22,8 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig index fff11bb10e9..1b9b5a5b627 100644 --- a/configs/udoo_neo_defconfig +++ b/configs/udoo_neo_defconfig @@ -22,6 +22,8 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig index 10f00b53aae..ceb50835f53 100644 --- a/configs/uniphier_ld4_sld8_defconfig +++ b/configs/uniphier_ld4_sld8_defconfig @@ -21,6 +21,8 @@ CONFIG_LOGLEVEL=6 CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_PAD_TO=0x20000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x100000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_CMD_CONFIG=y diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig index 4a79b6563e8..a2ea3a98d09 100644 --- a/configs/uniphier_v7_defconfig +++ b/configs/uniphier_v7_defconfig @@ -21,6 +21,8 @@ CONFIG_LOGLEVEL=6 CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_PAD_TO=0x20000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x100000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_CMD_CONFIG=y diff --git a/configs/variscite_dart6ul_defconfig b/configs/variscite_dart6ul_defconfig index 7322b12bd17..e100185743c 100644 --- a/configs/variscite_dart6ul_defconfig +++ b/configs/variscite_dart6ul_defconfig @@ -18,6 +18,8 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run mmc_mmc_fit" +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig index 0ad69b3e678..cb5fcfbb236 100644 --- a/configs/venice2_defconfig +++ b/configs/venice2_defconfig @@ -16,6 +16,8 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x800ffffc CONFIG_SYS_PROMPT="Tegra124 (Venice2) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2086 diff --git a/configs/ventana_defconfig b/configs/ventana_defconfig index 0b1d0f728ee..f3389b0f7bc 100644 --- a/configs/ventana_defconfig +++ b/configs/ventana_defconfig @@ -14,6 +14,8 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_PREBOOT=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xffffc CONFIG_SYS_PROMPT="Tegra20 (Ventana) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2085 diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig index f25d12609c3..97afc211bf5 100644 --- a/configs/verdin-imx8mm_defconfig +++ b/configs/verdin-imx8mm_defconfig @@ -35,6 +35,8 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x920000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig index afe6bbaf429..2107047c1d7 100644 --- a/configs/verdin-imx8mp_defconfig +++ b/configs/verdin-imx8mp_defconfig @@ -45,6 +45,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x960000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig index a8c3d907d1d..0559b2864de 100644 --- a/configs/vining_2000_defconfig +++ b/configs/vining_2000_defconfig @@ -31,6 +31,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig index 99c8379ac89..27c704f8a22 100644 --- a/configs/vyasa-rk3288_defconfig +++ b/configs/vyasa-rk3288_defconfig @@ -24,6 +24,8 @@ CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_OS_BOOT=y diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index fadc8af36eb..43af07f07da 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -33,6 +33,8 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig index 2261853d016..7eb23907ebc 100644 --- a/configs/work_92105_defconfig +++ b/configs/work_92105_defconfig @@ -32,6 +32,8 @@ CONFIG_SPL_PAD_TO=0x20000 CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xfff8 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y diff --git a/configs/x530_defconfig b/configs/x530_defconfig index fa385fcb24d..ac418dad150 100644 --- a/configs/x530_defconfig +++ b/configs/x530_defconfig @@ -32,6 +32,8 @@ CONFIG_SPL_MAX_SIZE=0x22fd0 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL_WATCHDOG=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index fd8fd1ddfda..49210f86c4b 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -30,6 +30,8 @@ CONFIG_USE_PREBOOT=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL_STACK_R=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_FS_LOAD_ARGS_NAME="system.dtb" diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index 058e1643dac..fe8de7302ff 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -26,6 +26,8 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xfffffffc # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_MAXARGS=64 diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index 827dbad359b..db3df6c83ed 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -26,6 +26,8 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xfffffffc # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_MAXARGS=64 diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index 336ca289bd3..9657093c6a3 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -25,6 +25,8 @@ CONFIG_REMAKE_ELF=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xfffffffc # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 40c9c28e139..88d5fec201f 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -33,6 +33,8 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xfffffffc CONFIG_SPL_STACK_R=y CONFIG_SPL_FS_LOAD_KERNEL_NAME="atf-uboot.ub" CONFIG_SPL_FS_LOAD_ARGS_NAME="u-boot.bin" diff --git a/configs/zeropi_defconfig b/configs/zeropi_defconfig index dd0dbc96ef6..7d45440c0cc 100644 --- a/configs/zeropi_defconfig +++ b/configs/zeropi_defconfig @@ -8,6 +8,7 @@ CONFIG_MACPWR="PD6" # CONFIG_VIDEO_DE2 is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y +CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig index cb7181324e8..f63a2bbab9a 100644 --- a/configs/zynq_cse_nand_defconfig +++ b/configs/zynq_cse_nand_defconfig @@ -23,6 +23,8 @@ CONFIG_USE_PREBOOT=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 CONFIG_SPL_BSS_MAX_SIZE=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL_STACK_R=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig index da7b9d037c3..d38b8f16f2e 100644 --- a/configs/zynq_cse_nor_defconfig +++ b/configs/zynq_cse_nor_defconfig @@ -23,6 +23,8 @@ CONFIG_USE_PREBOOT=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 CONFIG_SPL_BSS_MAX_SIZE=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL_STACK_R=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 2f32f9d9a82..241bf0c922c 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -30,6 +30,8 @@ CONFIG_USE_PREBOOT=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 CONFIG_SPL_BSS_MAX_SIZE=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 diff --git a/include/configs/alt.h b/include/configs/alt.h index 081e2a93b8e..fe303fda78a 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -37,7 +37,4 @@ "bootm_size=0x10000000\0" \ "usb_pgood_delay=2000\0" -/* SPL support */ -#define CONFIG_SPL_STACK 0xe6340000 - #endif /* __ALT_H */ diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 9e43c0e7aa6..85732e3f9dc 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -37,9 +37,6 @@ #endif -/* Defines for SPL */ -#define CONFIG_SPL_STACK 0x310000 - #define CONFIG_SYS_MONITOR_LEN 0x80000 #ifdef CONFIG_SD_BOOT diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index 141540bd889..b6346ae1df2 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -52,7 +52,6 @@ #endif /* SPL */ -#define CONFIG_SPL_STACK 0x308000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index 12a349f867c..446c5e1d3f2 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -52,7 +52,6 @@ #endif /* SPL */ -#define CONFIG_SPL_STACK 0x308000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index 454dac4ad6b..b22fc6c5ddc 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -17,7 +17,6 @@ #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) -#define CONFIG_SPL_STACK 0x013E000 #define CONFIG_SPL_BSS_START_ADDR 0x00128000 #define CONFIG_SYS_SPL_MALLOC_START 0x00120000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h index 2553d9aad63..d12feda16a4 100644 --- a/include/configs/cgtqmx8.h +++ b/include/configs/cgtqmx8.h @@ -14,7 +14,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) -#define CONFIG_SPL_STACK 0x013E000 #define CONFIG_SPL_BSS_START_ADDR 0x00128000 #define CONFIG_SYS_SPL_MALLOC_START 0x00120000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ diff --git a/include/configs/ci20.h b/include/configs/ci20.h index 33de2b7864a..f0497407afc 100644 --- a/include/configs/ci20.h +++ b/include/configs/ci20.h @@ -31,7 +31,6 @@ #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* SPL */ -#define CONFIG_SPL_STACK 0xf4008000 /* only max. 2KB spare! */ #define CONFIG_SPL_BSS_START_ADDR 0xf4004000 diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h index 6cf44877601..03f7ceb2f42 100644 --- a/include/configs/clearfog.h +++ b/include/configs/clearfog.h @@ -47,8 +47,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) -#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) - #if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA) /* SPL related MMC defines */ #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h index 78b7d4f17f2..62465acc97c 100644 --- a/include/configs/controlcenterdc.h +++ b/include/configs/controlcenterdc.h @@ -39,8 +39,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) -#define CONFIG_SPL_STACK (0x40000000 + ((212 - 16) << 10)) - #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD /* SPL related MMC defines */ #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/corvus.h b/include/configs/corvus.h index 99c8cd31110..f15e15822e5 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -54,7 +54,6 @@ /* bootstrap + u-boot + env in nandflash */ /* Defines for SPL */ -#define CONFIG_SPL_STACK (SZ_16K) #define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index fd58b1a194e..209a1423c1c 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -182,7 +182,6 @@ #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ CONFIG_SYS_MALLOC_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN -#define CONFIG_SPL_STACK 0x8001ff00 #endif diff --git a/include/configs/db-88f6720.h b/include/configs/db-88f6720.h index eeaae1fdabc..e97ff21360e 100644 --- a/include/configs/db-88f6720.h +++ b/include/configs/db-88f6720.h @@ -37,6 +37,4 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) -#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) - #endif /* _CONFIG_DB_88F6720_H */ diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h index cb2050015e0..727756dbba7 100644 --- a/include/configs/db-88f6820-amc.h +++ b/include/configs/db-88f6820-amc.h @@ -44,8 +44,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) -#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) - /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index e1a97daeac8..c6ce784b4b2 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -44,8 +44,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) -#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) - #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD /* SPL related MMC defines */ #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index 2ec9afe8e84..cade78b85d3 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -56,8 +56,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) -#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) - /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ #define CONFIG_SPD_EEPROM 0x4e diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 53c67c706c3..15160db276d 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -82,18 +82,6 @@ * U-Boot Commands */ -/* - * SPL specific defines - */ -/* SPL will be executed at offset 0 */ - -/* SPL will use SRAM as stack */ -#define CONFIG_SPL_STACK 0x0000FFF8 - -/* Use the framework and generic lib */ - -/* SPL will use serial */ - /* U-Boot will be 0x60000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */ #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000 diff --git a/include/configs/ds414.h b/include/configs/ds414.h index 3eff94f116e..16d59ed014c 100644 --- a/include/configs/ds414.h +++ b/include/configs/ds414.h @@ -48,8 +48,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) -#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) - /* Default Environment */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index c0923883acf..2bc9c992319 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -15,7 +15,6 @@ * SPL */ -#define CONFIG_SPL_STACK 0x00020000 #define CONFIG_SPL_BSS_START_ADDR 0x00020000 #define CONFIG_SYS_SPL_MALLOC_START 0x00040000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x0001ffff diff --git a/include/configs/espresso7420.h b/include/configs/espresso7420.h index 9632319e126..660d1a08049 100644 --- a/include/configs/espresso7420.h +++ b/include/configs/espresso7420.h @@ -13,7 +13,6 @@ #define CONFIG_ESPRESSO7420 #define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define CONFIG_SPL_STACK CONFIG_IRAM_END /* DRAM Memory Banks */ #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ diff --git a/include/configs/gardena-smart-gateway-at91sam.h b/include/configs/gardena-smart-gateway-at91sam.h index 940b61b6dd1..380622c9c79 100644 --- a/include/configs/gardena-smart-gateway-at91sam.h +++ b/include/configs/gardena-smart-gateway-at91sam.h @@ -33,7 +33,6 @@ #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 /* SPL */ -#define CONFIG_SPL_STACK 0x308000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 diff --git a/include/configs/gose.h b/include/configs/gose.h index a0af98dd980..d1fe375a2c1 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -32,7 +32,4 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" -/* SPL support */ -#define CONFIG_SPL_STACK 0xe6340000 - #endif /* __GOSE_H */ diff --git a/include/configs/helios4.h b/include/configs/helios4.h index e90cea374b2..86d441b11b2 100644 --- a/include/configs/helios4.h +++ b/include/configs/helios4.h @@ -47,8 +47,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) -#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) - #if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA) /* SPL related MMC defines */ #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h index ad6bbd802b5..86e192fb0c8 100644 --- a/include/configs/imx6_spl.h +++ b/include/configs/imx6_spl.h @@ -21,7 +21,6 @@ * and some padding thus 'our' max size is really 0x00908000 - 0x00938000 * or 192KB */ -#define CONFIG_SPL_STACK 0x0093FFB8 /* * Pad SPL to 196KB (4KB header + 192KB max size). This allows to write the * SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a @@ -40,7 +39,6 @@ * and some padding thus 'our' max size is really 0x00908000 - 0x00918000 * or 64KB */ -#define CONFIG_SPL_STACK 0x0091FFB8 /* * Pad SPL to 68KB (4KB header + 64KB max size). This allows to write the * SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a diff --git a/include/configs/imx7_spl.h b/include/configs/imx7_spl.h index 33a6185ef94..019ed5e203a 100644 --- a/include/configs/imx7_spl.h +++ b/include/configs/imx7_spl.h @@ -26,7 +26,6 @@ * CONFIG_SPL_TEXT_BASE could be moved to 0x00911000 to gain 4KB of space * for the SPL, but 56KB should be more than enough for the SPL. */ -#define CONFIG_SPL_STACK 0x00946BB8 /* * Pad SPL to 68KB (4KB header + 56KB max size + 8KB extra padding) * The extra padding could be removed, but this value was used historically diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index 114c8c1a800..0e16d14f8b6 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -17,7 +17,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_STACK 0x920000 #define CONFIG_SPL_BSS_START_ADDR 0x910000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h index 0151e81630f..d28774cddbf 100644 --- a/include/configs/imx8mm_beacon.h +++ b/include/configs/imx8mm_beacon.h @@ -14,7 +14,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_STACK 0x920000 #define CONFIG_SPL_BSS_START_ADDR 0x910000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h index 9487fe00104..ed819e392ab 100644 --- a/include/configs/imx8mm_data_modul_edm_sbc.h +++ b/include/configs/imx8mm_data_modul_edm_sbc.h @@ -14,7 +14,6 @@ #define CONFIG_SYS_MONITOR_LEN SZ_1M -#define CONFIG_SPL_STACK 0x920000 #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_BSS_START_ADDR 0x910000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index 24345d41a9a..b6dda333176 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -16,7 +16,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_STACK 0x920000 #define CONFIG_SPL_BSS_START_ADDR 0x910000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index 505ef8beb31..ffe88f7027b 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -15,7 +15,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -# define CONFIG_SPL_STACK 0x920000 # define CONFIG_SPL_BSS_START_ADDR 0x910000 # define CONFIG_SYS_SPL_MALLOC_START 0x42200000 # define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index 560a876b2ff..eb30ed1b950 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -14,7 +14,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_STACK 0x920000 #define CONFIG_SPL_BSS_START_ADDR 0x910000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_1M diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h index 0118ca32a96..3b99ba41bda 100644 --- a/include/configs/imx8mn_beacon.h +++ b/include/configs/imx8mn_beacon.h @@ -14,7 +14,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_STACK 0x187FF0 #define CONFIG_SPL_BSS_START_ADDR 0x0095e000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K diff --git a/include/configs/imx8mn_bsh_smm_s2_common.h b/include/configs/imx8mn_bsh_smm_s2_common.h index 91418e67784..60faedb76e6 100644 --- a/include/configs/imx8mn_bsh_smm_s2_common.h +++ b/include/configs/imx8mn_bsh_smm_s2_common.h @@ -16,7 +16,6 @@ #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) -#define CONFIG_SPL_STACK 0x980000 #define CONFIG_SPL_BSS_START_ADDR 0x950000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index b828a5b6349..fac2c26146d 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -17,7 +17,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_STACK 0x980000 #define CONFIG_SPL_BSS_START_ADDR 0x950000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ diff --git a/include/configs/imx8mn_var_som.h b/include/configs/imx8mn_var_som.h index acfc2834a95..699a51c1eb4 100644 --- a/include/configs/imx8mn_var_som.h +++ b/include/configs/imx8mn_var_som.h @@ -16,7 +16,6 @@ #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) -#define CONFIG_SPL_STACK 0x980000 #define CONFIG_SPL_BSS_START_ADDR 0x950000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index 56b3fe117f2..5807da5ac4b 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -14,7 +14,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_STACK 0x980000 #define CONFIG_SPL_BSS_START_ADDR 0x950000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ diff --git a/include/configs/imx8mp_dhcom_pdk2.h b/include/configs/imx8mp_dhcom_pdk2.h index f641f4902dc..abe245748f1 100644 --- a/include/configs/imx8mp_dhcom_pdk2.h +++ b/include/configs/imx8mp_dhcom_pdk2.h @@ -15,7 +15,6 @@ #define CONFIG_SYS_MONITOR_LEN SZ_1M #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_STACK 0x96FC00 #define CONFIG_SPL_BSS_START_ADDR 0x0096FC00 #define CONFIG_SYS_SPL_MALLOC_START 0x4c000000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 kiB */ diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index f066bb00bf2..1cfd63d78c6 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -17,7 +17,6 @@ #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ -#define CONFIG_SPL_STACK 0x960000 #define CONFIG_SPL_BSS_START_ADDR 0x0098FC00 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index b9122d4667f..97f66bddbc9 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -27,7 +27,6 @@ 0x5f, 0xd3, 0x6b, 0x9b, 0xe5, 0xb9) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_STACK 0x960000 #define CONFIG_SPL_BSS_START_ADDR 0x0098FC00 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h index 1e8b1ba06e1..074f5b08fc1 100644 --- a/include/configs/imx8mp_venice.h +++ b/include/configs/imx8mp_venice.h @@ -14,7 +14,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_STACK 0x960000 #define CONFIG_SPL_BSS_START_ADDR 0x0098FC00 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index 48fa596eee6..fc4b1c5bf78 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -15,7 +15,6 @@ #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_STACK 0x187FF0 #define CONFIG_SPL_BSS_START_ADDR 0x00180000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 416c83b4902..179c5123d72 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -16,7 +16,6 @@ #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ -#define CONFIG_SPL_STACK 0x187FF0 #define CONFIG_SPL_BSS_START_ADDR 0x00180000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index 84774eed8ee..bc749538d8c 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -13,7 +13,6 @@ #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ -#define CONFIG_SPL_STACK 0x187FF0 #define CONFIG_SPL_BSS_START_ADDR 0x00180000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index 0fa5fe58155..4f3e004f388 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -15,7 +15,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) -#define CONFIG_SPL_STACK 0x013E000 #define CONFIG_SPL_BSS_START_ADDR 0x00128000 #define CONFIG_SYS_SPL_MALLOC_START 0x00120000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index fd4d2c9669f..7afc64800eb 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -13,7 +13,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) -#define CONFIG_SPL_STACK 0x013E000 #define CONFIG_SPL_BSS_START_ADDR 0x00128000 #define CONFIG_SYS_SPL_MALLOC_START 0x00120000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index 8fe54f674cd..55b1795634a 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -14,7 +14,6 @@ #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_STACK 0x22050000 #define CONFIG_SPL_BSS_START_ADDR 0x22048000 #define CONFIG_SYS_SPL_MALLOC_START 0x22040000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x8000 /* 32 KB */ diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index 3e46f9d5851..736865ad80a 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -33,6 +33,5 @@ "bootm_size=0x10000000\0" /* SPL support */ -#define CONFIG_SPL_STACK 0xe6340000 #endif /* __KOELSCH_H */ diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h index c731b04b8e7..b2c826b6f13 100644 --- a/include/configs/kontron-sl-mx8mm.h +++ b/include/configs/kontron-sl-mx8mm.h @@ -55,7 +55,6 @@ #define CONFIG_SYS_BOOTM_LEN SZ_64M #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_STACK 0x91fff0 #define CONFIG_SPL_BSS_START_ADDR 0x910000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index 5e51f4fd477..08c6b80abb9 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -17,7 +17,6 @@ 0x40, 0xd4, 0x5c, 0xca, 0x13, 0x99) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_STACK 0x187FF0 #define CONFIG_SPL_BSS_START_ADDR 0x00180000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index 129bd7ed174..52778dd02b9 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -42,7 +42,6 @@ /* SPL */ #define CONFIG_SPL_BSS_START_ADDR 0x80100000 -#define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 #define CONFIG_SYS_SPL_MALLOC_START 0x80200000 diff --git a/include/configs/lager.h b/include/configs/lager.h index 98c82a0e571..f3feaa539fc 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -34,6 +34,5 @@ "bootm_size=0x10000000\0" /* SPL support */ -#define CONFIG_SPL_STACK 0xe6340000 #endif /* __LAGER_H */ diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index e8827157256..614b399af50 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -42,8 +42,6 @@ #define SDRAM_CFG_BI 0x00000001 #ifdef CONFIG_SD_BOOT -#define CONFIG_SPL_STACK 0x1001d000 - #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \ CONFIG_SYS_MONITOR_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index d2e0f5f9362..fb50c82a653 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -11,8 +11,6 @@ #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE #ifdef CONFIG_SD_BOOT -#define CONFIG_SPL_STACK 0x1001d000 - #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \ CONFIG_SYS_MONITOR_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 @@ -21,8 +19,6 @@ #endif #ifdef CONFIG_NAND_BOOT -#define CONFIG_SPL_STACK 0x1001d000 - #define CONFIG_SYS_NAND_U_BOOT_SIZE (400 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index 35156a00b3a..3e9175f5045 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -44,8 +44,6 @@ #define CONFIG_U_BOOT_HDR_SIZE (16 << 10) #endif /* ifdef CONFIG_NXP_ESBC */ -#define CONFIG_SPL_STACK 0x1001d000 - #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \ CONFIG_SYS_MONITOR_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index afff8fc3e2c..4470d974ca9 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -46,8 +46,6 @@ #define CONFIG_U_BOOT_HDR_SIZE (16 << 10) #endif /* ifdef CONFIG_NXP_ESBC */ -#define CONFIG_SPL_STACK 0x1001d000 - #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \ CONFIG_SYS_MONITOR_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 71070839826..a09486a4170 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -46,9 +46,6 @@ /* SD boot SPL */ #ifdef CONFIG_SD_BOOT - -#define CONFIG_SPL_STACK 0x1001e000 - #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 @@ -70,7 +67,6 @@ /* NAND SPL */ #ifdef CONFIG_NAND_BOOT -#define CONFIG_SPL_STACK 0x1001d000 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_SPL_MALLOC_START 0x80200000 diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index bf808d15efa..92fcc453f16 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -46,7 +46,6 @@ /* SD boot SPL */ #ifdef CONFIG_SD_BOOT -#define CONFIG_SPL_STACK 0x10020000 #define CONFIG_SPL_BSS_START_ADDR 0x8f000000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) @@ -68,7 +67,6 @@ #if defined(CONFIG_QSPI_BOOT) && defined(CONFIG_SPL) #define CONFIG_SPL_TARGET "spl/u-boot-spl.pbl" -#define CONFIG_SPL_STACK 0x10020000 #define CONFIG_SPL_BSS_START_ADDR 0x8f000000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) @@ -78,7 +76,6 @@ /* NAND SPL */ #ifdef CONFIG_NAND_BOOT -#define CONFIG_SPL_STACK 0x1001f000 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 6ed180984e5..1b8180f6f10 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -145,7 +145,6 @@ unsigned long long get_qixis_addr(void); #ifdef CONFIG_SPL #define CONFIG_SPL_BSS_START_ADDR 0x80100000 -#define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0) #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 5d2b8ebea0d..f33e369847c 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -138,7 +138,6 @@ unsigned long long get_qixis_addr(void); " 0x580e00000 \0" #define CONFIG_SPL_BSS_START_ADDR 0x80100000 -#define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0) #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #ifdef CONFIG_NAND_BOOT diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 58d6418b02e..433952c9d72 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -109,7 +109,6 @@ * NAND SPL */ #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx" -#define CONFIG_SPL_STACK 0x70004000 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index 939046f6de8..d728c1fc11b 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -51,8 +51,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) -#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) - /* SPL related SPI defines */ /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 37bd4785492..e9c9bf9281c 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -128,9 +128,6 @@ /* BRAM size - will be generated */ #define CONFIG_SYS_INIT_RAM_SIZE 0x100000 -# define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE) - /* Just for sure that there is a space for stack */ #define CONFIG_SPL_STACK_SIZE 0x100 diff --git a/include/configs/mt7629.h b/include/configs/mt7629.h index 64263ce2e63..246836a077b 100644 --- a/include/configs/mt7629.h +++ b/include/configs/mt7629.h @@ -20,7 +20,6 @@ /* Environment */ /* Defines for SPL */ -#define CONFIG_SPL_STACK 0x106000 #define CONFIG_SPI_ADDR 0x30000000 #define CONFIG_SYS_UBOOT_BASE (CONFIG_SPI_ADDR + CONFIG_SPL_PAD_TO) diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index dbb87b9642e..6fefb1eab90 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -174,7 +174,6 @@ #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ CONFIG_SYS_MALLOC_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN -#define CONFIG_SPL_STACK 0x8001ff00 /* additions for new relocation code, must added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0xc0000000 diff --git a/include/configs/openpiton-riscv64.h b/include/configs/openpiton-riscv64.h index 006ec360ab3..e194fbaeecf 100644 --- a/include/configs/openpiton-riscv64.h +++ b/include/configs/openpiton-riscv64.h @@ -22,8 +22,6 @@ #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x0100000 -#define CONFIG_SPL_STACK (0x80000000 + 0x04000000 - \ - GENERATED_GBL_DATA_SIZE) #define CONFIG_SPL_GD_ADDR 0x85000000 #endif diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h index 0366933cea2..284891414e2 100644 --- a/include/configs/phycore_imx8mm.h +++ b/include/configs/phycore_imx8mm.h @@ -17,7 +17,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_STACK 0x920000 #define CONFIG_SPL_BSS_START_ADDR 0x910000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h index 8434156998a..99aecdad4ef 100644 --- a/include/configs/phycore_imx8mp.h +++ b/include/configs/phycore_imx8mp.h @@ -17,7 +17,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_STACK 0x960000 #define CONFIG_SPL_BSS_START_ADDR 0x98FC00 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index c8dab24f90a..10e3e23e8dc 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -13,7 +13,6 @@ #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ -#define CONFIG_SPL_STACK 0x187FF0 #define CONFIG_SPL_BSS_START_ADDR 0x00180000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index 56d2459b978..6f49568484d 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -43,7 +43,6 @@ #endif /* Defines for SPL */ -#define CONFIG_SPL_STACK 0x310000 #define CONFIG_SYS_MONITOR_LEN 0x80000 diff --git a/include/configs/porter.h b/include/configs/porter.h index d8c4ea10575..88fa65e0ffc 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -38,6 +38,5 @@ "bootm_size=0x10000000\0" /* SPL support */ -#define CONFIG_SPL_STACK 0xe6340000 #endif /* __PORTER_H */ diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h index 7b36cd765ea..1cf239f8a63 100644 --- a/include/configs/px30_common.h +++ b/include/configs/px30_common.h @@ -13,7 +13,6 @@ /* FIXME: ff020000 is pmu_mem (10k), while ff0e0000 is regular int_mem */ #define CONFIG_IRAM_BASE 0xff020000 -#define CONFIG_SPL_STACK 0x00400000 #define CONFIG_SPL_BSS_START_ADDR 0x4000000 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index 8b4c5c0f105..6cda69159b4 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -49,6 +49,5 @@ #else #define CONFIG_SPL_BSS_START_ADDR 0xe631f000 #endif -#define CONFIG_SPL_STACK 0xe6304000 #endif /* __RCAR_GEN3_COMMON_H */ diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index 0eded1838c2..2f3260e449c 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -10,8 +10,6 @@ #define CONFIG_SYS_HZ_CLOCK 24000000 -#define CONFIG_SPL_STACK 0x10081fff - #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (4 << 10) #define CONFIG_ROCKCHIP_CHIP_TAG "RK30" diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h index dd33d30e9e5..41e0d18f88c 100644 --- a/include/configs/rk3066_common.h +++ b/include/configs/rk3066_common.h @@ -11,8 +11,6 @@ #define CONFIG_IRAM_BASE 0x10080000 -#define CONFIG_SPL_STACK 0x1008FFFF - #define CONFIG_SYS_SDRAM_BASE 0x60000000 #define SDRAM_BANK_SIZE (1024UL << 20UL) #define SDRAM_MAX_SIZE CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h index 466b0e74859..c1d66845412 100644 --- a/include/configs/rk3188_common.h +++ b/include/configs/rk3188_common.h @@ -15,8 +15,6 @@ /* spl size 32kb sram - 2kb bootrom */ -#define CONFIG_SPL_STACK 0x10087fff - #define CONFIG_SYS_SDRAM_BASE 0x60000000 #define SDRAM_BANK_SIZE (2UL << 30) #define SDRAM_MAX_SIZE 0x80000000 diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index abeb6535ce3..844c154217b 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -13,8 +13,6 @@ #define CONFIG_SYS_HZ_CLOCK 24000000 -#define CONFIG_SPL_STACK 0xff718000 - #define CONFIG_IRAM_BASE 0xff700000 /* RAW SD card / eMMC locations. */ diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h index 2433ea83652..2b0b367df78 100644 --- a/include/configs/rk3308_common.h +++ b/include/configs/rk3308_common.h @@ -13,7 +13,6 @@ #define CONFIG_SYS_NS16550_MEM32 #define CONFIG_IRAM_BASE 0xfff80000 -#define CONFIG_SPL_STACK 0x00400000 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 5141c48de78..25e2c659001 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -10,7 +10,6 @@ #define CONFIG_IRAM_BASE 0xff090000 -#define CONFIG_SPL_STACK 0x00400000 #define CONFIG_SPL_BSS_START_ADDR 0x2000000 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index 77817a7e73c..1bdc8cf187b 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -17,7 +17,6 @@ #define CONFIG_IRAM_BASE 0xff8c0000 #define CONFIG_SPL_BSS_START_ADDR 0x400000 -#define CONFIG_SPL_STACK 0x00188000 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 4582d34af85..112b8639ad7 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -11,10 +11,8 @@ #define CONFIG_IRAM_BASE 0xff8c0000 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT) -#define CONFIG_SPL_STACK 0x00400000 #define CONFIG_SPL_BSS_START_ADDR 0x00400000 #else -#define CONFIG_SPL_STACK 0xff8effff /* BSS setup */ #define CONFIG_SPL_BSS_START_ADDR 0xff8e0000 #endif diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h index 2e726b00c96..c0721aa1afb 100644 --- a/include/configs/rk3568_common.h +++ b/include/configs/rk3568_common.h @@ -10,7 +10,6 @@ #define CONFIG_IRAM_BASE 0xfdcc0000 -#define CONFIG_SPL_STACK 0x00400000 #define CONFIG_SPL_BSS_START_ADDR 0x4000000 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ diff --git a/include/configs/sam9x60_curiosity.h b/include/configs/sam9x60_curiosity.h index 896697bf415..afb1e3d0f10 100644 --- a/include/configs/sam9x60_curiosity.h +++ b/include/configs/sam9x60_curiosity.h @@ -20,6 +20,4 @@ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x8000000 /* 128 MB */ -#define CONFIG_SPL_STACK 0x218000 - #endif diff --git a/include/configs/sama5d27_som1_ek.h b/include/configs/sama5d27_som1_ek.h index 2bb71e4f42f..dd5f8d8c801 100644 --- a/include/configs/sama5d27_som1_ek.h +++ b/include/configs/sama5d27_som1_ek.h @@ -15,7 +15,6 @@ #define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ /* SPL */ -#define CONFIG_SPL_STACK 0x218000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/sama5d27_wlsom1_ek.h b/include/configs/sama5d27_wlsom1_ek.h index 86f7c2bade8..728dc9fb98b 100644 --- a/include/configs/sama5d27_wlsom1_ek.h +++ b/include/configs/sama5d27_wlsom1_ek.h @@ -20,7 +20,6 @@ #define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* SPL */ -#define CONFIG_SPL_STACK 0x218000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/sama5d2_icp.h b/include/configs/sama5d2_icp.h index f7f746e9b3e..0645c21b618 100644 --- a/include/configs/sama5d2_icp.h +++ b/include/configs/sama5d2_icp.h @@ -18,8 +18,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 -#define CONFIG_SPL_STACK 0x218000 - #ifdef CONFIG_SD_BOOT /* u-boot env in sd/mmc card */ #define FAT_ENV_INTERFACE "mmc" diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h index b7cc8d05ce5..8481b0262c4 100644 --- a/include/configs/sama5d2_xplained.h +++ b/include/configs/sama5d2_xplained.h @@ -12,7 +12,6 @@ #include "at91-sama5_common.h" /* SPL */ -#define CONFIG_SPL_STACK 0x218000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index 384e8d6e613..23ffab226b1 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -27,8 +27,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x10000000 -#define CONFIG_SPL_STACK 0x318000 - /* NAND flash */ #ifdef CONFIG_CMD_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index 161914294c8..e293002f39d 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -38,8 +38,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 -#define CONFIG_SPL_STACK 0x318000 - /* SerialFlash */ /* NAND flash */ diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h index 6328450b995..825925c114a 100644 --- a/include/configs/sama5d4_xplained.h +++ b/include/configs/sama5d4_xplained.h @@ -15,8 +15,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 -#define CONFIG_SPL_STACK 0x218000 - /* NAND flash */ #ifdef CONFIG_CMD_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h index a00d2851bd0..d2466da6fcd 100644 --- a/include/configs/sama5d4ek.h +++ b/include/configs/sama5d4ek.h @@ -15,8 +15,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 -#define CONFIG_SPL_STACK 0x218000 - /* NAND flash */ #ifdef CONFIG_CMD_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/sama7g5ek.h b/include/configs/sama7g5ek.h index 97bac63ddde..78347373fca 100644 --- a/include/configs/sama7g5ek.h +++ b/include/configs/sama7g5ek.h @@ -16,6 +16,4 @@ #define CONFIG_SYS_SDRAM_BASE 0x60000000 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 -#define CONFIG_SPL_STACK 0x218000 - #endif diff --git a/include/configs/sifive-unleashed.h b/include/configs/sifive-unleashed.h index fd0bb69648a..9a460de077b 100644 --- a/include/configs/sifive-unleashed.h +++ b/include/configs/sifive-unleashed.h @@ -18,9 +18,6 @@ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 -#define CONFIG_SPL_STACK (0x08000000 + 0x001D0000 - \ - GENERATED_GBL_DATA_SIZE) - #endif #define CONFIG_SYS_SDRAM_BASE 0x80000000 diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h index aecfb0b2632..6453cc93293 100644 --- a/include/configs/sifive-unmatched.h +++ b/include/configs/sifive-unmatched.h @@ -18,9 +18,6 @@ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 -#define CONFIG_SPL_STACK (0x08000000 + 0x001D0000 - \ - GENERATED_GBL_DATA_SIZE) - #endif #define CONFIG_SYS_SDRAM_BASE 0x80000000 diff --git a/include/configs/silk.h b/include/configs/silk.h index a300ae86fc9..58613effaf4 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -38,6 +38,5 @@ "bootm_size=0x10000000\0" /* SPL support */ -#define CONFIG_SPL_STACK 0xe6340000 #endif /* __SILK_H */ diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 533129f311b..d84a2c262ef 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -114,7 +114,6 @@ /* Defines for SPL */ -#define CONFIG_SPL_STACK 0x301000 #define CONFIG_SPL_BSS_START_ADDR CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) diff --git a/include/configs/sniper.h b/include/configs/sniper.h index 01697a5c82a..923da0ef99f 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -51,7 +51,6 @@ #define CONFIG_SPL_BSS_START_ADDR 0x80000000 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 #define CONFIG_SYS_SPL_MALLOC_SIZE (1024 * 1024) -#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK /* * Serial diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index bdcb872cd06..441e3545aa4 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -35,10 +35,6 @@ #if ((CONFIG_SYS_BOOTCOUNT_ADDR > CONFIG_SYS_INIT_RAM_ADDR) && \ (CONFIG_SYS_BOOTCOUNT_ADDR < (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE))) -#define CONFIG_SPL_STACK CONFIG_SYS_BOOTCOUNT_ADDR -#else -#define CONFIG_SPL_STACK \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE) #endif /* diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index c4ba1d14f93..b73ce917609 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -144,9 +144,6 @@ unsigned int cm_get_l4_sys_free_clk_hz(void); * */ #define CONFIG_SPL_TARGET "spl/u-boot-spl-dtb.hex" -#define CONFIG_SPL_STACK (CONFIG_SYS_INIT_RAM_ADDR \ - + CONFIG_SYS_INIT_RAM_SIZE \ - - SOC64_HANDOFF_SIZE) #define CONFIG_SPL_BSS_START_ADDR (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE \ - CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE (CONFIG_SYS_MALLOC_LEN) diff --git a/include/configs/stm32mp15_common.h b/include/configs/stm32mp15_common.h index ead3b91e67a..588d4c1f31f 100644 --- a/include/configs/stm32mp15_common.h +++ b/include/configs/stm32mp15_common.h @@ -36,8 +36,6 @@ /* Restrict SPL to fit within SYSRAM */ #define STM32_SYSRAM_END (STM32_SYSRAM_BASE + STM32_SYSRAM_SIZE) -#define CONFIG_SPL_STACK (STM32_SYSRAM_BASE + \ - STM32_SYSRAM_SIZE) #endif /* #ifdef CONFIG_SPL */ /*MMC SD*/ #define CONFIG_SYS_MMC_MAX_DEVICE 3 diff --git a/include/configs/stout.h b/include/configs/stout.h index 4f7fc23dd2d..f49e88cb17c 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -42,6 +42,5 @@ "bootm_size=0x10000000\0" /* SPL support */ -#define CONFIG_SPL_STACK 0xe6340000 #endif /* __STOUT_H */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 35a2a41d228..3431366bcda 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -125,8 +125,6 @@ #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ #endif -#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK - /* Ethernet support */ #ifdef CONFIG_USB_EHCI_HCD diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 238074bff4c..d7dba72db4c 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -142,7 +142,6 @@ #endif /* #ifndef CONFIG_SPL_BUILD */ /* Defines for SPL */ -#define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + SZ_16K) #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ CONFIG_SYS_MALLOC_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h index 09737211803..fae00e88fe5 100644 --- a/include/configs/tegra114-common.h +++ b/include/configs/tegra114-common.h @@ -55,7 +55,6 @@ /* Defines for SPL */ #define CONFIG_SYS_SPL_MALLOC_START 0x80090000 -#define CONFIG_SPL_STACK 0x800ffffc /* For USB EHCI controller */ #define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h index df688dabd1a..05f6bf0b471 100644 --- a/include/configs/tegra124-common.h +++ b/include/configs/tegra124-common.h @@ -57,7 +57,6 @@ /* Defines for SPL */ #define CONFIG_SYS_SPL_MALLOC_START 0x80090000 -#define CONFIG_SPL_STACK 0x800ffffc /* For USB EHCI controller */ #define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index fac86927285..97c1f5a2453 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -56,7 +56,6 @@ /* Defines for SPL */ #define CONFIG_SYS_SPL_MALLOC_START 0x00090000 -#define CONFIG_SPL_STACK 0x000ffffc /* Align LCD to 1MB boundary */ #define CONFIG_LCD_ALIGNMENT MMU_SECTION_SIZE diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h index b878b1a9e69..7107c06b9a7 100644 --- a/include/configs/tegra30-common.h +++ b/include/configs/tegra30-common.h @@ -52,7 +52,6 @@ /* Defines for SPL */ #define CONFIG_SYS_SPL_MALLOC_START 0x80090000 -#define CONFIG_SPL_STACK 0x800ffffc /* For USB EHCI controller */ #define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h index 626261d0742..e5e21ef3bbc 100644 --- a/include/configs/theadorable.h +++ b/include/configs/theadorable.h @@ -76,8 +76,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) -#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) - /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ #define CONFIG_SYS_SDRAM_SIZE SZ_2G diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index b804bf3a716..1cc593fdea2 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -31,10 +31,6 @@ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE (32 * 1024) #define KEYSTONE_SPL_STACK_SIZE (8 * 1024) -#define CONFIG_SPL_STACK (CONFIG_SYS_SPL_MALLOC_START + \ - CONFIG_SYS_SPL_MALLOC_SIZE + \ - SPL_MALLOC_F_SIZE + \ - KEYSTONE_SPL_STACK_SIZE - 4) /* SRAM scratch space entries */ #define SRAM_SCRATCH_SPACE_ADDR 0xc0c23fc diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h index 089828fa3d1..4dc27a31a4e 100644 --- a/include/configs/turris_omnia.h +++ b/include/configs/turris_omnia.h @@ -31,8 +31,6 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) -#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) - #ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC /* SPL related MMC defines */ # ifdef CONFIG_SPL_BUILD diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index f5e096f38da..6493569888d 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -174,7 +174,6 @@ #define CONFIG_SYS_BOOTMAPSZ 0x20000000 /* only for SPL */ -#define CONFIG_SPL_STACK (0x00100000) /* subtract sizeof(struct image_header) */ #define CONFIG_SYS_UBOOT_BASE (0x130000 - 0x40) diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index ef7ef022ce1..de796917820 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -16,7 +16,6 @@ #define CONFIG_SYS_BOOTM_LEN SZ_64M #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_STACK 0x920000 #define CONFIG_SPL_BSS_START_ADDR 0x910000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index daff4ccadfc..e6eb986466c 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -15,7 +15,6 @@ #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ -#define CONFIG_SPL_STACK 0x960000 #define CONFIG_SPL_BSS_START_ADDR 0x0098fc00 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index 4df58c77beb..8d1eee2fcac 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -60,7 +60,6 @@ /* SPL will be executed at offset 0 */ /* SPL will use SRAM as stack */ -#define CONFIG_SPL_STACK 0x0000FFF8 /* Use the framework and generic lib */ /* SPL will use serial */ /* SPL will load U-Boot from NAND offset 0x40000 */ diff --git a/include/configs/x530.h b/include/configs/x530.h index 601a7ee7d4f..8b690cd9bf4 100644 --- a/include/configs/x530.h +++ b/include/configs/x530.h @@ -71,6 +71,4 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) -#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) - #endif /* _CONFIG_X530_H */ diff --git a/include/configs/xea.h b/include/configs/xea.h index 01942eaf2ba..07419f0afbb 100644 --- a/include/configs/xea.h +++ b/include/configs/xea.h @@ -15,7 +15,6 @@ #include /* SPL */ -#define CONFIG_SPL_STACK 0x20000 #define CONFIG_SYS_SPL_ARGS_ADDR 0x44000000 diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 360660fd333..b6f345b17ae 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -199,8 +199,6 @@ "dfu_bufsiz=0x1000\0" #endif -#define CONFIG_SPL_STACK 0xfffffffc - /* Just random location in OCM */ #define CONFIG_SPL_BSS_START_ADDR 0x0 diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 440e80c3803..a0e276bcc41 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -237,7 +237,6 @@ * 0xfffffe00 is used for putting wfi loop. * Set it up as limit for now. */ -#define CONFIG_SPL_STACK 0xfffffe00 /* BSS setup */ #define CONFIG_SPL_BSS_START_ADDR 0x100000 -- GitLab From 23780398b587ac8bc912971c60cd816bd1afeb12 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 26 May 2022 13:36:17 -0400 Subject: [PATCH 034/581] imx6: Update CONFIG_SPL_STACK defaults in Kconfig Update the Kconfig entry to have the correct defaults for i.MX6 platforms, and move the existing large comment from imx6_spl.h to doc/imx/common/imx6.txt so that it's not lost. Signed-off-by: Tom Rini --- common/spl/Kconfig | 4 ++- configs/apalis_imx6_defconfig | 2 -- configs/brppt2_defconfig | 2 -- configs/cm_fx6_defconfig | 2 -- configs/colibri_imx6_defconfig | 2 -- configs/dh_imx6_defconfig | 2 -- configs/display5_defconfig | 2 -- configs/display5_factory_defconfig | 2 -- configs/ge_b1x5v2_defconfig | 2 -- configs/gwventana_emmc_defconfig | 2 -- configs/gwventana_gw5904_defconfig | 2 -- configs/gwventana_nand_defconfig | 2 -- configs/imx6dl_icore_nand_defconfig | 2 -- configs/imx6dl_mamoj_defconfig | 2 -- configs/imx6q_bosch_acc_defconfig | 2 -- configs/imx6q_icore_nand_defconfig | 2 -- configs/imx6q_logic_defconfig | 2 -- configs/imx6qdl_icore_mipi_defconfig | 2 -- configs/imx6qdl_icore_mmc_defconfig | 2 -- configs/imx6qdl_icore_nand_defconfig | 2 -- configs/imx6qdl_icore_rqs_defconfig | 2 -- configs/imx6ul_geam_mmc_defconfig | 2 -- configs/imx6ul_geam_nand_defconfig | 2 -- configs/imx6ul_isiot_emmc_defconfig | 2 -- configs/imx6ul_isiot_nand_defconfig | 2 -- configs/kontron-sl-mx6ul_defconfig | 2 -- configs/kp_imx6q_tpc_defconfig | 2 -- configs/liteboard_defconfig | 2 -- configs/mccmon6_nor_defconfig | 2 -- configs/mccmon6_sd_defconfig | 2 -- configs/mx6cuboxi_defconfig | 2 -- configs/mx6memcal_defconfig | 2 -- configs/mx6sabreauto_defconfig | 2 -- configs/mx6sabresd_defconfig | 2 -- configs/mx6slevk_spl_defconfig | 2 -- configs/mx6ul_14x14_evk_defconfig | 2 -- configs/mx6ul_9x9_evk_defconfig | 2 -- configs/myir_mys_6ulx_defconfig | 2 -- configs/novena_defconfig | 2 -- configs/opos6uldev_defconfig | 2 -- configs/pcm058_defconfig | 2 -- configs/phycore_pcl063_defconfig | 2 -- configs/phycore_pcl063_ull_defconfig | 2 -- configs/pico-dwarf-imx6ul_defconfig | 2 -- configs/pico-hobbit-imx6ul_defconfig | 2 -- configs/pico-imx6_defconfig | 2 -- configs/pico-imx6ul_defconfig | 2 -- configs/pico-pi-imx6ul_defconfig | 2 -- configs/riotboard_defconfig | 2 -- configs/seeed_npi_imx6ull_defconfig | 2 -- configs/udoo_defconfig | 2 -- configs/udoo_neo_defconfig | 2 -- configs/variscite_dart6ul_defconfig | 2 -- configs/vining_2000_defconfig | 2 -- configs/wandboard_defconfig | 2 -- doc/imx/common/imx6.txt | 31 ++++++++++++++++++++++ include/configs/imx6_spl.h | 39 ---------------------------- 57 files changed, 34 insertions(+), 148 deletions(-) diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 89288797513..173c7e02024 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -360,7 +360,7 @@ config TPL_SYS_MALLOC_SIMPLE config SPL_SHARES_INIT_SP_ADDR bool "SPL and U-Boot use the same initial stack pointer location" depends on (ARM || ARCH_JZ47XX || MICROBLAZE || RISCV) && SPL_FRAMEWORK - default n if ARCH_SUNXI + default n if ARCH_SUNXI || ARCH_MX6 default y help In many cases, we can use the same initial stack pointer address for @@ -371,6 +371,8 @@ config SPL_STACK hex "Initial stack pointer location" depends on (ARM || ARCH_JZ47XX || MICROBLAZE || RISCV) && SPL_FRAMEWORK depends on !SPL_SHARES_INIT_SP_ADDR + default 0x93ffb8 if ARCH_MX6 && MX6_OCRAM_256KB + default 0x91ffb8 if ARCH_MX6 && !MX6_OCRAM_256KB help Address of the start of the stack SPL will use before SDRAM is initialized. diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index 96483af9442..11ee2f3d34a 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -36,8 +36,6 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_DMA=y CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y diff --git a/configs/brppt2_defconfig b/configs/brppt2_defconfig index af91188b69c..b9f3587bdaa 100644 --- a/configs/brppt2_defconfig +++ b/configs/brppt2_defconfig @@ -32,8 +32,6 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run b_default" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_BOARD_INIT=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_I2C=y CONFIG_SPL_DM_SPI_FLASH=y diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index d1f8c494ae4..bb63d5f7756 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -30,8 +30,6 @@ CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run legacy_bootcmd" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="usb start;sf probe" CONFIG_MISC_INIT_R=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80 CONFIG_SPL_I2C=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 9436f9f0a38..1873581e755 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -35,8 +35,6 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_DMA=y CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index 05b9eb8cbf3..8c0b9b3d456 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -35,8 +35,6 @@ CONFIG_SPL_FIT=y CONFIG_BOOTDELAY=3 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x11400 CONFIG_SYS_MAXARGS=32 diff --git a/configs/display5_defconfig b/configs/display5_defconfig index b39b4de2c15..2b92ed95b4b 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -37,8 +37,6 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="if run check_em_pad; then run recovery;else if test ${BOOT_FROM} = FACTORY; then run factory_nfs;else run boot_mmc;fi;fi" CONFIG_MISC_INIT_R=y CONFIG_SPL_BOOTCOUNT_LIMIT=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_DMA=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig index 163737cb5db..9c3965c0a6f 100644 --- a/configs/display5_factory_defconfig +++ b/configs/display5_factory_defconfig @@ -34,8 +34,6 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="echo SDP Display5 recovery" CONFIG_MISC_INIT_R=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_DMA=y CONFIG_SPL_I2C=y diff --git a/configs/ge_b1x5v2_defconfig b/configs/ge_b1x5v2_defconfig index 5966870df2d..fd1f3e37de3 100644 --- a/configs/ge_b1x5v2_defconfig +++ b/configs/ge_b1x5v2_defconfig @@ -37,8 +37,6 @@ CONFIG_LOG_MAX_LEVEL=8 CONFIG_LOG_DEFAULT_LEVEL=4 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x11400 CONFIG_SPL_USB_HOST=y diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index ef4829c5478..f0e720463b6 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -40,8 +40,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_PCI_INIT_R=y CONFIG_SPL_BOARD_INIT=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_STACK_R=y CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_DMA=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index e070dc88b33..53d5bddd619 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -40,8 +40,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_PCI_INIT_R=y CONFIG_SPL_BOARD_INIT=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_STACK_R=y CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_DMA=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index a279935c124..e0225278582 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -40,8 +40,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_PCI_INIT_R=y CONFIG_SPL_BOARD_INIT=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_STACK_R=y CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_DMA=y diff --git a/configs/imx6dl_icore_nand_defconfig b/configs/imx6dl_icore_nand_defconfig index 48e07534535..c98a5cc735a 100644 --- a/configs/imx6dl_icore_nand_defconfig +++ b/configs/imx6dl_icore_nand_defconfig @@ -24,8 +24,6 @@ CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index 0595dccaea7..6f249dbe2fc 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -17,8 +17,6 @@ CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 diff --git a/configs/imx6q_bosch_acc_defconfig b/configs/imx6q_bosch_acc_defconfig index a052193cb76..4b75e5794e9 100644 --- a/configs/imx6q_bosch_acc_defconfig +++ b/configs/imx6q_bosch_acc_defconfig @@ -34,8 +34,6 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run mmc_mmc_fit" CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_RAW_IMAGE_SUPPORT=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xaa # CONFIG_SPL_CRC32 is not set # CONFIG_SPL_CRYPTO is not set diff --git a/configs/imx6q_icore_nand_defconfig b/configs/imx6q_icore_nand_defconfig index 340766919d6..278bc98cbc1 100644 --- a/configs/imx6q_icore_nand_defconfig +++ b/configs/imx6q_icore_nand_defconfig @@ -25,8 +25,6 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index 2d8b83c9f1b..c5ad6dcdd1f 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -27,8 +27,6 @@ CONFIG_BOOTCOMMAND="run autoboot" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SPL_RAW_IMAGE_SUPPORT=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x93ffb8 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_DMA=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" diff --git a/configs/imx6qdl_icore_mipi_defconfig b/configs/imx6qdl_icore_mipi_defconfig index d1136ff9717..a2f1abe1aa6 100644 --- a/configs/imx6qdl_icore_mipi_defconfig +++ b/configs/imx6qdl_icore_mipi_defconfig @@ -33,8 +33,6 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_RAW_IMAGE_SUPPORT=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index 7f60a1290b7..91b32e4a035 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -36,8 +36,6 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_RAW_IMAGE_SUPPORT=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index 340766919d6..278bc98cbc1 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -25,8 +25,6 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig index f4ce0bdc33a..cfd35608cfc 100644 --- a/configs/imx6qdl_icore_rqs_defconfig +++ b/configs/imx6qdl_icore_rqs_defconfig @@ -30,8 +30,6 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_RAW_IMAGE_SUPPORT=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig index dc517d8bdc9..a84547feddd 100644 --- a/configs/imx6ul_geam_mmc_defconfig +++ b/configs/imx6ul_geam_mmc_defconfig @@ -28,8 +28,6 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_RAW_IMAGE_SUPPORT=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="geam6ul> " diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig index ad7c821ebaf..8bd4360efd2 100644 --- a/configs/imx6ul_geam_nand_defconfig +++ b/configs/imx6ul_geam_nand_defconfig @@ -25,8 +25,6 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig index 0a451618e78..9262055f1da 100644 --- a/configs/imx6ul_isiot_emmc_defconfig +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -28,8 +28,6 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_RAW_IMAGE_SUPPORT=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="isiotmx6ul> " diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig index dd8543d5f5c..d1da6da311c 100644 --- a/configs/imx6ul_isiot_nand_defconfig +++ b/configs/imx6ul_isiot_nand_defconfig @@ -25,8 +25,6 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/kontron-sl-mx6ul_defconfig b/configs/kontron-sl-mx6ul_defconfig index 904e953ce0f..1ba4d1fca84 100644 --- a/configs/kontron-sl-mx6ul_defconfig +++ b/configs/kontron-sl-mx6ul_defconfig @@ -28,8 +28,6 @@ CONFIG_BOARD_TYPES=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_LEGACY_IMAGE_FORMAT=y CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig index 4ec988e3133..012a5c492ed 100644 --- a/configs/kp_imx6q_tpc_defconfig +++ b/configs/kp_imx6q_tpc_defconfig @@ -27,8 +27,6 @@ CONFIG_AUTOBOOT_STOP_STR="." # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SPL_RAW_IMAGE_SUPPORT=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/liteboard_defconfig b/configs/liteboard_defconfig index 9832654fa46..334b22ac8ab 100644 --- a/configs/liteboard_defconfig +++ b/configs/liteboard_defconfig @@ -24,8 +24,6 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev};if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_DEFAULT_FDT_FILE="imx6ul-liteboard.dtb" CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig index cef2bb0ba5b..3718d08b670 100644 --- a/configs/mccmon6_nor_defconfig +++ b/configs/mccmon6_nor_defconfig @@ -24,8 +24,6 @@ CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig index 8f3b4ecfc9d..3228050dd20 100644 --- a/configs/mccmon6_sd_defconfig +++ b/configs/mccmon6_sd_defconfig @@ -25,8 +25,6 @@ CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index 016a54f7cb3..41122ade90e 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -26,8 +26,6 @@ CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="if hdmidet; then usb start; setenv stdin serial,usbkbd; setenv stdout serial,vidconsole; setenv stderr serial,vidconsole; else setenv stdin serial; setenv stdout serial; setenv stderr serial; fi;" CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y diff --git a/configs/mx6memcal_defconfig b/configs/mx6memcal_defconfig index cf807d8f3db..d555dbf7b1b 100644 --- a/configs/mx6memcal_defconfig +++ b/configs/mx6memcal_defconfig @@ -15,8 +15,6 @@ CONFIG_SPL=y CONFIG_SYS_MEMTEST_START=0x10000000 CONFIG_SYS_MEMTEST_END=0x20000000 CONFIG_SUPPORT_RAW_INITRD=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig index 016898f9ab1..3d2e906f934 100644 --- a/configs/mx6sabreauto_defconfig +++ b/configs/mx6sabreauto_defconfig @@ -33,8 +33,6 @@ CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};if mmc rescan; then if run loa CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SPL_LEGACY_IMAGE_FORMAT=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index 072617681db..33d8db9dff2 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -32,8 +32,6 @@ CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};if mmc rescan; then if run loa CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SPL_LEGACY_IMAGE_FORMAT=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig index a5ccf579029..24407c113d6 100644 --- a/configs/mx6slevk_spl_defconfig +++ b/configs/mx6slevk_spl_defconfig @@ -25,8 +25,6 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig index 8d182478164..065ead0a7ad 100644 --- a/configs/mx6ul_14x14_evk_defconfig +++ b/configs/mx6ul_14x14_evk_defconfig @@ -27,8 +27,6 @@ CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc resc # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig index 65c1c778599..2f46b68cbe9 100644 --- a/configs/mx6ul_9x9_evk_defconfig +++ b/configs/mx6ul_9x9_evk_defconfig @@ -27,8 +27,6 @@ CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc resc # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y diff --git a/configs/myir_mys_6ulx_defconfig b/configs/myir_mys_6ulx_defconfig index fdd7d024ae8..f5ccf669f29 100644 --- a/configs/myir_mys_6ulx_defconfig +++ b/configs/myir_mys_6ulx_defconfig @@ -19,8 +19,6 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_USB_HOST=y diff --git a/configs/novena_defconfig b/configs/novena_defconfig index 3faeaf150d5..215aaa605b5 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -31,8 +31,6 @@ CONFIG_BOOTARGS="console=ttymxc1,115200 " CONFIG_BOOTCOMMAND="run distro_bootcmd ; run net_nfs" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig index ddf879d19eb..8b0b4c33e14 100644 --- a/configs/opos6uldev_defconfig +++ b/configs/opos6uldev_defconfig @@ -31,8 +31,6 @@ CONFIG_DEFAULT_FDT_FILE="imx6ul-opos6uldev.dtb" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SPL_BOARD_INIT=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig index f6658994882..54bef4e062e 100644 --- a/configs/pcm058_defconfig +++ b/configs/pcm058_defconfig @@ -30,8 +30,6 @@ CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run mmcboot;run nandboot" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_BOARD_INIT=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x93ffb8 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x18a CONFIG_SPL_DMA=y CONFIG_SPL_FS_EXT4=y diff --git a/configs/phycore_pcl063_defconfig b/configs/phycore_pcl063_defconfig index 442dcc75ee0..6dcb789609f 100644 --- a/configs/phycore_pcl063_defconfig +++ b/configs/phycore_pcl063_defconfig @@ -18,8 +18,6 @@ CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/phycore_pcl063_ull_defconfig b/configs/phycore_pcl063_ull_defconfig index 96ea3274705..e40ca07b7c0 100644 --- a/configs/phycore_pcl063_ull_defconfig +++ b/configs/phycore_pcl063_ull_defconfig @@ -18,8 +18,6 @@ CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run mmc_mmc_fit" CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/pico-dwarf-imx6ul_defconfig b/configs/pico-dwarf-imx6ul_defconfig index 298865bb2b9..15dc2098ad4 100644 --- a/configs/pico-dwarf-imx6ul_defconfig +++ b/configs/pico-dwarf-imx6ul_defconfig @@ -25,8 +25,6 @@ CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx6ul-pico-dwarf.dtb" CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y diff --git a/configs/pico-hobbit-imx6ul_defconfig b/configs/pico-hobbit-imx6ul_defconfig index 15fe0df9c00..eeb95d431db 100644 --- a/configs/pico-hobbit-imx6ul_defconfig +++ b/configs/pico-hobbit-imx6ul_defconfig @@ -26,8 +26,6 @@ CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx6ul-pico-hobbit.dtb" CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y diff --git a/configs/pico-imx6_defconfig b/configs/pico-imx6_defconfig index bc20d425332..09809542606 100644 --- a/configs/pico-imx6_defconfig +++ b/configs/pico-imx6_defconfig @@ -27,8 +27,6 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_BOOTCOMMAND="run default_boot" CONFIG_DEFAULT_FDT_FILE="ask" CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig index 37cbc96dc0e..7e923d0bc02 100644 --- a/configs/pico-imx6ul_defconfig +++ b/configs/pico-imx6ul_defconfig @@ -26,8 +26,6 @@ CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="ask" CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y diff --git a/configs/pico-pi-imx6ul_defconfig b/configs/pico-pi-imx6ul_defconfig index c3613d5745f..2cc6d4f8bed 100644 --- a/configs/pico-pi-imx6ul_defconfig +++ b/configs/pico-pi-imx6ul_defconfig @@ -26,8 +26,6 @@ CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx6ul-pico-pi.dtb" CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig index a14f9a409e0..8e74a1f087f 100644 --- a/configs/riotboard_defconfig +++ b/configs/riotboard_defconfig @@ -28,8 +28,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_RAW_IMAGE_SUPPORT=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_FS_LOAD_ARGS_NAME="imx6dl-riotboard.dtb" diff --git a/configs/seeed_npi_imx6ull_defconfig b/configs/seeed_npi_imx6ull_defconfig index 860c98a4ad4..8fb5590c1eb 100644 --- a/configs/seeed_npi_imx6ull_defconfig +++ b/configs/seeed_npi_imx6ull_defconfig @@ -20,8 +20,6 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_USB_HOST=y diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig index 03875f9039d..e21945116c0 100644 --- a/configs/udoo_defconfig +++ b/configs/udoo_defconfig @@ -22,8 +22,6 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig index 1b9b5a5b627..fff11bb10e9 100644 --- a/configs/udoo_neo_defconfig +++ b/configs/udoo_neo_defconfig @@ -22,8 +22,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" diff --git a/configs/variscite_dart6ul_defconfig b/configs/variscite_dart6ul_defconfig index e100185743c..7322b12bd17 100644 --- a/configs/variscite_dart6ul_defconfig +++ b/configs/variscite_dart6ul_defconfig @@ -18,8 +18,6 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run mmc_mmc_fit" -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig index 0559b2864de..a8c3d907d1d 100644 --- a/configs/vining_2000_defconfig +++ b/configs/vining_2000_defconfig @@ -31,8 +31,6 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index 43af07f07da..fadc8af36eb 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -33,8 +33,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91ffb8 CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" diff --git a/doc/imx/common/imx6.txt b/doc/imx/common/imx6.txt index 9007cfbf587..c5554d8d6b3 100644 --- a/doc/imx/common/imx6.txt +++ b/doc/imx/common/imx6.txt @@ -162,3 +162,34 @@ icorem6qdl> nand write ${loadaddr} uboot ${filesize} NAND write: device 0 offset 0x200000, size 0x8fd26 589094 bytes written: OK icorem6qdl> + +SPL Stack size and location notes +--------------------------------- + +If we have CONFIG_MX6_OCRAM_256KB then see Figure 8.4.1 in IMX6DQ Reference +manuals: + - IMX6DQ OCRAM (IRAM) is from 0x00907000 to 0x0093FFFF + - BOOT ROM stack is at 0x0093FFB8 + - if icache/dcache is enabled (eFuse/strapping controlled) then the + IMX BOOT ROM will setup MMU table at 0x00938000, therefore we need to + fit between 0x00907000 and 0x00938000. + - Additionally the BOOT ROM loads what they consider the firmware image + which consists of a 4K header in front of us that contains the IVT, DCD + and some padding thus 'our' max size is really 0x00908000 - 0x00938000 + or 192KB + - Pad SPL to 196KB (4KB header + 192KB max size). This allows to write the + SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a + boot media (given that boot media specific offset is configured properly). +and if we don't, see Figure 8-3 in IMX6SDL Reference manuals: + - IMX6SDL OCRAM (IRAM) is from 0x00907000 to 0x0091FFFF + - BOOT ROM stack is at 0x0091FFB8 + - if icache/dcache is enabled (eFuse/strapping controlled) then the + IMX BOOT ROM will setup MMU table at 0x00918000, therefore we need to + fit between 0x00907000 and 0x00918000. + - Additionally the BOOT ROM loads what they consider the firmware image + which consists of a 4K header in front of us that contains the IVT, DCD + and some padding thus 'our' max size is really 0x00908000 - 0x00918000 + or 64KB + - Pad SPL to 68KB (4KB header + 64KB max size). This allows to write the + SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a + boot media (given that boot media specific offset is configured properly). diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h index 86e192fb0c8..daf44294a23 100644 --- a/include/configs/imx6_spl.h +++ b/include/configs/imx6_spl.h @@ -8,45 +8,6 @@ #ifdef CONFIG_SPL -#ifdef CONFIG_MX6_OCRAM_256KB -/* - * see Figure 8.4.1 in IMX6DQ Reference manuals: - * - IMX6DQ OCRAM (IRAM) is from 0x00907000 to 0x0093FFFF - * - BOOT ROM stack is at 0x0093FFB8 - * - if icache/dcache is enabled (eFuse/strapping controlled) then the - * IMX BOOT ROM will setup MMU table at 0x00938000, therefore we need to - * fit between 0x00907000 and 0x00938000. - * - Additionally the BOOT ROM loads what they consider the firmware image - * which consists of a 4K header in front of us that contains the IVT, DCD - * and some padding thus 'our' max size is really 0x00908000 - 0x00938000 - * or 192KB - */ -/* - * Pad SPL to 196KB (4KB header + 192KB max size). This allows to write the - * SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a - * boot media (given that boot media specific offset is configured properly). - */ -#else -/* - * see Figure 8-3 in IMX6SDL Reference manuals: - * - IMX6SDL OCRAM (IRAM) is from 0x00907000 to 0x0091FFFF - * - BOOT ROM stack is at 0x0091FFB8 - * - if icache/dcache is enabled (eFuse/strapping controlled) then the - * IMX BOOT ROM will setup MMU table at 0x00918000, therefore we need to - * fit between 0x00907000 and 0x00918000. - * - Additionally the BOOT ROM loads what they consider the firmware image - * which consists of a 4K header in front of us that contains the IVT, DCD - * and some padding thus 'our' max size is really 0x00908000 - 0x00918000 - * or 64KB - */ -/* - * Pad SPL to 68KB (4KB header + 64KB max size). This allows to write the - * SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a - * boot media (given that boot media specific offset is configured properly). - */ - -#endif - /* MMC support */ #if defined(CONFIG_SPL_MMC) #define CONFIG_SYS_MONITOR_LEN 409600 /* 400 KB */ -- GitLab From 8b83b53a8d5fa3c2a6ab6a979399b1c285af9bea Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 26 May 2022 13:46:32 -0400 Subject: [PATCH 035/581] imx7: Update CONFIG_SPL_STACK defaults in Kconfig Update the Kconfig entry to have the correct defaults for i.MX7 platforms, and move the existing large comment from imx7_spl.h to doc/imx/common/imx7.txt so that it's not lost. Signed-off-by: Tom Rini --- common/spl/Kconfig | 3 ++- configs/cl-som-imx7_defconfig | 2 -- configs/imx7_cm_defconfig | 2 -- configs/pico-dwarf-imx7d_defconfig | 2 -- configs/pico-hobbit-imx7d_defconfig | 2 -- configs/pico-imx7d_bl33_defconfig | 2 -- configs/pico-imx7d_defconfig | 2 -- configs/pico-nymph-imx7d_defconfig | 2 -- configs/pico-pi-imx7d_defconfig | 2 -- doc/imx/common/imx7.txt | 23 +++++++++++++++++++++++ include/configs/imx7_spl.h | 23 ----------------------- 11 files changed, 25 insertions(+), 40 deletions(-) create mode 100644 doc/imx/common/imx7.txt diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 173c7e02024..8f3985d612f 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -360,7 +360,7 @@ config TPL_SYS_MALLOC_SIMPLE config SPL_SHARES_INIT_SP_ADDR bool "SPL and U-Boot use the same initial stack pointer location" depends on (ARM || ARCH_JZ47XX || MICROBLAZE || RISCV) && SPL_FRAMEWORK - default n if ARCH_SUNXI || ARCH_MX6 + default n if ARCH_SUNXI || ARCH_MX6 || ARCH_MX7 default y help In many cases, we can use the same initial stack pointer address for @@ -371,6 +371,7 @@ config SPL_STACK hex "Initial stack pointer location" depends on (ARM || ARCH_JZ47XX || MICROBLAZE || RISCV) && SPL_FRAMEWORK depends on !SPL_SHARES_INIT_SP_ADDR + default 0x946bb8 if ARCH_MX7 default 0x93ffb8 if ARCH_MX6 && MX6_OCRAM_256KB default 0x91ffb8 if ARCH_MX6 && !MX6_OCRAM_256KB help diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig index 67b70d9523d..af7fb37afcc 100644 --- a/configs/cl-som-imx7_defconfig +++ b/configs/cl-som-imx7_defconfig @@ -28,8 +28,6 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_BOARD_INIT=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x946bb8 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80 CONFIG_SPL_I2C=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/imx7_cm_defconfig b/configs/imx7_cm_defconfig index 8b05ee2f6df..351d47fe552 100644 --- a/configs/imx7_cm_defconfig +++ b/configs/imx7_cm_defconfig @@ -26,8 +26,6 @@ CONFIG_DEFAULT_FDT_FILE="ask" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x946bb8 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pico-dwarf-imx7d_defconfig b/configs/pico-dwarf-imx7d_defconfig index e1d0e3438dd..00067d2e46d 100644 --- a/configs/pico-dwarf-imx7d_defconfig +++ b/configs/pico-dwarf-imx7d_defconfig @@ -27,8 +27,6 @@ CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx7d-pico-dwarf.dtb" CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x946bb8 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig index 4ccbcf90a61..64c2ca4b189 100644 --- a/configs/pico-hobbit-imx7d_defconfig +++ b/configs/pico-hobbit-imx7d_defconfig @@ -27,8 +27,6 @@ CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx7d-pico-hobbit.dtb" CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x946bb8 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pico-imx7d_bl33_defconfig b/configs/pico-imx7d_bl33_defconfig index 3d342d78186..d13336d0548 100644 --- a/configs/pico-imx7d_bl33_defconfig +++ b/configs/pico-imx7d_bl33_defconfig @@ -28,8 +28,6 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x946bb8 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig index df57fa13321..a6ee5cebfe2 100644 --- a/configs/pico-imx7d_defconfig +++ b/configs/pico-imx7d_defconfig @@ -27,8 +27,6 @@ CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="ask" CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x946bb8 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pico-nymph-imx7d_defconfig b/configs/pico-nymph-imx7d_defconfig index e1d0e3438dd..00067d2e46d 100644 --- a/configs/pico-nymph-imx7d_defconfig +++ b/configs/pico-nymph-imx7d_defconfig @@ -27,8 +27,6 @@ CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx7d-pico-dwarf.dtb" CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x946bb8 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig index c799968944c..b74b2582cb9 100644 --- a/configs/pico-pi-imx7d_defconfig +++ b/configs/pico-pi-imx7d_defconfig @@ -27,8 +27,6 @@ CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx7d-pico-pi.dtb" CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x946bb8 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/doc/imx/common/imx7.txt b/doc/imx/common/imx7.txt new file mode 100644 index 00000000000..b9db10341ad --- /dev/null +++ b/doc/imx/common/imx7.txt @@ -0,0 +1,23 @@ +U-Boot for Freescale i.MX7 + +SPL Stack size and location notes +--------------------------------- +See figure 6-22 in i.MX 7Dual/Solo Reference manuals: + - IMX7D/S OCRAM free area RAM (OCRAM) is from 0x00910000 to + 0x00946C00. + - Set the stack at the end of the free area section, at 0x00946BB8. + - The BOOT ROM loads what they consider the firmware image + which consists of a 4K header in front of us that contains the IVT, DCD + and some padding. However, the manual also states that the ROM uses the + OCRAM_EPCD and OCRAM_PXP areas for itself. While the SPL is free to use + this range for stack and malloc, the SPL itself must fit below 0x920000, + or the image will be truncated in at least some boot modes like USB SDP. + Thus our max size is really 0x00920000 - 0x00912000. If necessary, + CONFIG_SPL_TEXT_BASE could be moved to 0x00911000 to gain 4KB of space + for the SPL, but 56KB should be more than enough for the SPL. + - Pad SPL to 68KB (4KB header + 56KB max size + 8KB extra padding) + The extra padding could be removed, but this value was used historically + based on an incorrect CONFIG_SPL_MAX_SIZE definition. + This allows to write the SPL/U-Boot combination generated with + u-boot-with-spl.imx directly to a boot media (given that boot media specific + offset is configured properly). diff --git a/include/configs/imx7_spl.h b/include/configs/imx7_spl.h index 019ed5e203a..9fe0dbdfe97 100644 --- a/include/configs/imx7_spl.h +++ b/include/configs/imx7_spl.h @@ -11,29 +11,6 @@ #define __IMX7_SPL_CONFIG_H #ifdef CONFIG_SPL -/* - * see figure 6-22 in i.MX 7Dual/Solo Reference manuals: - * - IMX7D/S OCRAM free area RAM (OCRAM) is from 0x00910000 to - * 0x00946C00. - * - Set the stack at the end of the free area section, at 0x00946BB8. - * - The BOOT ROM loads what they consider the firmware image - * which consists of a 4K header in front of us that contains the IVT, DCD - * and some padding. However, the manual also states that the ROM uses the - * OCRAM_EPCD and OCRAM_PXP areas for itself. While the SPL is free to use - * this range for stack and malloc, the SPL itself must fit below 0x920000, - * or the image will be truncated in at least some boot modes like USB SDP. - * Thus our max size is really 0x00920000 - 0x00912000. If necessary, - * CONFIG_SPL_TEXT_BASE could be moved to 0x00911000 to gain 4KB of space - * for the SPL, but 56KB should be more than enough for the SPL. - */ -/* - * Pad SPL to 68KB (4KB header + 56KB max size + 8KB extra padding) - * The extra padding could be removed, but this value was used historically - * based on an incorrect CONFIG_SPL_MAX_SIZE definition. - * This allows to write the SPL/U-Boot combination generated with - * u-boot-with-spl.imx directly to a boot media (given that boot media specific - * offset is configured properly). - */ /* MMC support */ #if defined(CONFIG_SPL_MMC) -- GitLab From 90e1fd09101f41ea1350e41fb3c57a662df6b2b8 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 26 May 2022 14:31:57 -0400 Subject: [PATCH 036/581] Convert CONFIG_TPL_NAND_INIT to Kconfig This converts the following to Kconfig: CONFIG_TPL_NAND_INIT Signed-off-by: Tom Rini --- drivers/mtd/nand/raw/Kconfig | 4 ++++ drivers/mtd/nand/raw/Makefile | 2 +- drivers/mtd/nand/raw/fsl_ifc_spl.c | 2 +- include/configs/P1010RDB.h | 1 - include/configs/p1_p2_rdb_pc.h | 1 - 5 files changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index d75f371c951..4129a33866b 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -23,6 +23,9 @@ config TPL_SYS_NAND_SELF_INIT This option, if enabled, provides more flexible and linux-like NAND initialization process, in SPL. +config TPL_NAND_INIT + bool + config SYS_NAND_DRIVER_ECC_LAYOUT bool "Omit standard ECC layouts to save space" help @@ -165,6 +168,7 @@ config NAND_FSL_ELBC_DT config NAND_FSL_IFC bool "Support Freescale Integrated Flash Controller NAND driver" select TPL_SYS_NAND_SELF_INIT if TPL_NAND_SUPPORT + select TPL_NAND_INIT if TPL && !TPL_FRAMEWORK select SPL_SYS_NAND_SELF_INIT select SYS_NAND_SELF_INIT select FSL_IFC diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile index 6ec3581d20e..e3f6b903f75 100644 --- a/drivers/mtd/nand/raw/Makefile +++ b/drivers/mtd/nand/raw/Makefile @@ -16,7 +16,7 @@ obj-$(CONFIG_SPL_NAND_LOAD) += nand_spl_load.o obj-$(CONFIG_SPL_NAND_ECC) += nand_ecc.o obj-$(CONFIG_SPL_NAND_BASE) += nand_base.o obj-$(CONFIG_SPL_NAND_IDENT) += nand_ids.o nand_timings.o -obj-$(CONFIG_SPL_NAND_INIT) += nand.o +obj-$(CONFIG_TPL_NAND_INIT) += nand.o ifeq ($(CONFIG_SPL_ENV_SUPPORT),y) obj-$(CONFIG_ENV_IS_IN_NAND) += nand_util.o endif diff --git a/drivers/mtd/nand/raw/fsl_ifc_spl.c b/drivers/mtd/nand/raw/fsl_ifc_spl.c index b7e37416a49..4d11922a650 100644 --- a/drivers/mtd/nand/raw/fsl_ifc_spl.c +++ b/drivers/mtd/nand/raw/fsl_ifc_spl.c @@ -297,7 +297,7 @@ void nand_boot(void) uboot(); } -#ifndef CONFIG_SPL_NAND_INIT +#ifndef CONFIG_TPL_NAND_INIT void nand_init(void) { } diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 9024df1adcf..ead53556615 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -50,7 +50,6 @@ #define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 #else #ifdef CONFIG_TPL_BUILD -#define CONFIG_SPL_NAND_INIT #define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_NAND_U_BOOT_SIZE (576 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000) diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index b68082c4110..849a0b8cb64 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -93,7 +93,6 @@ #define CONFIG_SYS_MPC85XX_NO_RESETVEC #elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD -#define CONFIG_SPL_NAND_INIT #define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_NAND_U_BOOT_SIZE (832 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000) -- GitLab From 55cf860ba7d604081b11b8ddc23c79572a0ada34 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 26 May 2022 16:59:30 -0400 Subject: [PATCH 037/581] Convert CONFIG_SPL_RELOC_TEXT_BASE et al to Kconfig This converts the following to Kconfig: CONFIG_SPL_RELOC_TEXT_BASE CONFIG_SPL_RELOC_STACK CONFIG_SPL_RELOC_MALLOC_ADDR CONFIG_SPL_RELOC_MALLOC_SIZE Signed-off-by: Tom Rini --- README | 13 ----- board/freescale/p1010rdb/spl.c | 6 +- board/freescale/p1_p2_rdb_pc/spl.c | 6 +- common/spl/Kconfig | 59 +++++++++++++++++++- configs/P1010RDB-PA_36BIT_NAND_defconfig | 7 +++ configs/P1010RDB-PA_36BIT_NOR_defconfig | 1 - configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 5 ++ configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 5 ++ configs/P1010RDB-PA_NAND_defconfig | 7 +++ configs/P1010RDB-PA_NOR_defconfig | 1 - configs/P1010RDB-PA_SDCARD_defconfig | 5 ++ configs/P1010RDB-PA_SPIFLASH_defconfig | 5 ++ configs/P1010RDB-PB_36BIT_NAND_defconfig | 7 +++ configs/P1010RDB-PB_36BIT_NOR_defconfig | 1 - configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 5 ++ configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 5 ++ configs/P1010RDB-PB_NAND_defconfig | 7 +++ configs/P1010RDB-PB_NOR_defconfig | 1 - configs/P1010RDB-PB_SDCARD_defconfig | 5 ++ configs/P1010RDB-PB_SPIFLASH_defconfig | 5 ++ configs/P1020RDB-PC_36BIT_NAND_defconfig | 7 +++ configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 4 ++ configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 4 ++ configs/P1020RDB-PC_36BIT_defconfig | 1 - configs/P1020RDB-PC_NAND_defconfig | 7 +++ configs/P1020RDB-PC_SDCARD_defconfig | 4 ++ configs/P1020RDB-PC_SPIFLASH_defconfig | 4 ++ configs/P1020RDB-PC_defconfig | 1 - configs/P1020RDB-PD_NAND_defconfig | 7 +++ configs/P1020RDB-PD_SDCARD_defconfig | 4 ++ configs/P1020RDB-PD_SPIFLASH_defconfig | 4 ++ configs/P1020RDB-PD_defconfig | 1 - configs/P2020RDB-PC_36BIT_NAND_defconfig | 7 +++ configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 4 ++ configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 4 ++ configs/P2020RDB-PC_36BIT_defconfig | 1 - configs/P2020RDB-PC_NAND_defconfig | 7 +++ configs/P2020RDB-PC_SDCARD_defconfig | 4 ++ configs/P2020RDB-PC_SPIFLASH_defconfig | 4 ++ configs/P2020RDB-PC_defconfig | 1 - configs/T1024RDB_NAND_defconfig | 4 ++ configs/T1024RDB_SDCARD_defconfig | 4 ++ configs/T1024RDB_SPIFLASH_defconfig | 4 ++ configs/T1042D4RDB_NAND_defconfig | 4 ++ configs/T1042D4RDB_SDCARD_defconfig | 4 ++ configs/T1042D4RDB_SPIFLASH_defconfig | 4 ++ configs/T2080QDS_NAND_defconfig | 4 ++ configs/T2080QDS_SDCARD_defconfig | 4 ++ configs/T2080QDS_SPIFLASH_defconfig | 4 ++ configs/T2080RDB_NAND_defconfig | 4 ++ configs/T2080RDB_SDCARD_defconfig | 4 ++ configs/T2080RDB_SPIFLASH_defconfig | 4 ++ configs/T2080RDB_revD_NAND_defconfig | 4 ++ configs/T2080RDB_revD_SDCARD_defconfig | 4 ++ configs/T2080RDB_revD_SPIFLASH_defconfig | 4 ++ configs/T4240RDB_SDCARD_defconfig | 4 ++ include/configs/P1010RDB.h | 12 ---- include/configs/T102xRDB.h | 3 - include/configs/T104xRDB.h | 3 - include/configs/T208xQDS.h | 3 - include/configs/T208xRDB.h | 3 - include/configs/T4240RDB.h | 3 - include/configs/p1_p2_rdb_pc.h | 14 ----- 63 files changed, 270 insertions(+), 71 deletions(-) diff --git a/README b/README index 360d357bfbc..7b4067f8f24 100644 --- a/README +++ b/README @@ -1625,10 +1625,6 @@ The following options need to be configured: CONFIG_SPL Enable building of SPL globally. - CONFIG_SPL_RELOC_TEXT_BASE - Address to relocate to. If unspecified, this is equal to - CONFIG_SPL_TEXT_BASE (i.e. no relocation is done). - CONFIG_SPL_BSS_START_ADDR Link address for the BSS within the SPL binary. @@ -1642,15 +1638,6 @@ The following options need to be configured: consider that a completely unreadable NAND block is bad, and thus should be skipped silently. - CONFIG_SPL_RELOC_STACK - Adress of the start of the stack SPL will use after - relocation. If unspecified, this is equal to - CONFIG_SYS_SPL_MALLOC_START - Starting address of the malloc pool used in SPL. - When this option is set the full malloc is used in SPL and - it is set up by spl_init() and before that, the simple malloc() - can be used if CONFIG_SYS_MALLOC_F is defined. - CONFIG_SYS_SPL_MALLOC_SIZE The size of the malloc pool used in SPL. diff --git a/board/freescale/p1010rdb/spl.c b/board/freescale/p1010rdb/spl.c index 7eaa2047fac..a78a9143a01 100644 --- a/board/freescale/p1010rdb/spl.c +++ b/board/freescale/p1010rdb/spl.c @@ -57,7 +57,7 @@ void board_init_f(ulong bootflag) /* NOTE - code has to be copied out of NAND buffer before * other blocks can be read. */ - relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE); + relocate_code(CONFIG_VAL(RELOC_STACK), 0, CONFIG_SPL_RELOC_TEXT_BASE); } void board_init_r(gd_t *gd, ulong dest_addr) @@ -73,8 +73,8 @@ void board_init_r(gd_t *gd, ulong dest_addr) arch_cpu_init(); get_clocks(); - mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, - CONFIG_SPL_RELOC_MALLOC_SIZE); + mem_malloc_init(CONFIG_VAL(RELOC_MALLOC_ADDR), + CONFIG_VAL(RELOC_MALLOC_SIZE)); gd->flags |= GD_FLG_FULL_MALLOC_INIT; #ifndef CONFIG_SPL_NAND_BOOT diff --git a/board/freescale/p1_p2_rdb_pc/spl.c b/board/freescale/p1_p2_rdb_pc/spl.c index 22156f2824e..580972d800a 100644 --- a/board/freescale/p1_p2_rdb_pc/spl.c +++ b/board/freescale/p1_p2_rdb_pc/spl.c @@ -63,7 +63,7 @@ void board_init_f(ulong bootflag) /* NOTE - code has to be copied out of NAND buffer before * other blocks can be read. */ - relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE); + relocate_code(CONFIG_VAL(RELOC_STACK), 0, CONFIG_SPL_RELOC_TEXT_BASE); } void board_init_r(gd_t *gd, ulong dest_addr) @@ -79,8 +79,8 @@ void board_init_r(gd_t *gd, ulong dest_addr) arch_cpu_init(); get_clocks(); - mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, - CONFIG_SPL_RELOC_MALLOC_SIZE); + mem_malloc_init(CONFIG_VAL(RELOC_MALLOC_ADDR), + CONFIG_VAL(RELOC_MALLOC_SIZE)); gd->flags |= GD_FLG_FULL_MALLOC_INIT; #ifdef CONFIG_SPL_ENV_SUPPORT diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 8f3985d612f..304fd0e697c 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -219,8 +219,8 @@ config TPL_SYS_CCSR_DO_NOT_RELOCATE endmenu -menu "PowerPC SPL specific options" - depends on PPC && (SUPPORT_SPL && !SPL_FRAMEWORK) +menu "PowerPC SPL / TPL specific options" + depends on PPC && (SPL && !SPL_FRAMEWORK) config SPL_INIT_MINIMAL bool "Arch init code will be built for a very small image" @@ -231,6 +231,61 @@ config SPL_FLUSH_IMAGE config SPL_SKIP_RELOCATE bool "Skip relocating SPL" +config SPL_RELOC_TEXT_BASE + hex "Address to relocate SPL to" + default SPL_TEXT_BASE + help + If unspecified, this is equal to CONFIG_SPL_TEXT_BASE (i.e. no + relocation is done). + +config SPL_RELOC_STACK + hex "Address of the start of the stack SPL will use after relocation." + help + If unspecified, this is equal to CONFIG_SYS_SPL_MALLOC_START. Starting + address of the malloc pool used in SPL. When this option is set the full + malloc is used in SPL and it is set up by spl_init() and before that, the + simple malloc() can be used if CONFIG_SYS_MALLOC_F is defined. + +config SPL_RELOC_MALLOC + bool "SPL has malloc pool after relocation" + +config SPL_RELOC_MALLOC_ADDR + hex "Address of malloc pool in SPL" + depends on SPL_RELOC_MALLOC + +config SPL_RELOC_MALLOC_SIZE + hex "Size of malloc pool in SPL" + depends on SPL_RELOC_MALLOC + +config TPL_RELOC_TEXT_BASE + hex "Address to relocate TPL to" + depends on TPL + default TPL_TEXT_BASE + help + If unspecified, this is equal to CONFIG_TPL_TEXT_BASE (i.e. no + relocation is done). + +config TPL_RELOC_STACK + hex "Address of the start of the stack TPL will use after relocation." + depends on TPL + help + If unspecified, this is equal to CONFIG_SYS_TPL_MALLOC_START. Starting + address of the malloc pool used in TPL. When this option is set the full + malloc is used in TPL and it is set up by spl_init() and before that, the + simple malloc() can be used if CONFIG_SYS_MALLOC_F is defined. + +config TPL_RELOC_MALLOC + bool "TPL has malloc pool after relocation" + depends on TPL + +config TPL_RELOC_MALLOC_ADDR + hex "Address of malloc pool in TPL" + depends on TPL_RELOC_MALLOC + +config TPL_RELOC_MALLOC_SIZE + hex "Size of malloc pool in TPL" + depends on TPL_RELOC_MALLOC + endmenu config HANDOFF diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index f6426f0c171..22b43801a77 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -33,6 +33,13 @@ CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_RELOC_TEXT_BASE=0xd003d000 +CONFIG_SPL_RELOC_STACK=0xd003fff0 +CONFIG_TPL_RELOC_TEXT_BASE=0xd0001000 +CONFIG_TPL_RELOC_STACK=0xd0030000 +CONFIG_TPL_RELOC_MALLOC=y +CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000 +CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_MAX_SIZE=0x20000 diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index 7040c598a96..53f551eb378 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -22,7 +22,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y -CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index 57ad4b4485a..7406cb29b03 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -30,6 +30,11 @@ CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000 +CONFIG_SPL_RELOC_STACK=0xd001c000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index ce5f1fd2762..41b2f2f58b1 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -33,6 +33,11 @@ CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000 +CONFIG_SPL_RELOC_STACK=0xd001c000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index fca971bcf43..993a1f8d54a 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -32,6 +32,13 @@ CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_RELOC_TEXT_BASE=0xd003d000 +CONFIG_SPL_RELOC_STACK=0xd003fff0 +CONFIG_TPL_RELOC_TEXT_BASE=0xd0001000 +CONFIG_TPL_RELOC_STACK=0xd0030000 +CONFIG_TPL_RELOC_MALLOC=y +CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000 +CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_MAX_SIZE=0x20000 diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index d1046698d35..efdf1c99621 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -21,7 +21,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y -CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 44d3512db22..058c87d77b3 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -29,6 +29,11 @@ CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000 +CONFIG_SPL_RELOC_STACK=0xd001c000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index 5e6d0c23445..4c2d72605e2 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -32,6 +32,11 @@ CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000 +CONFIG_SPL_RELOC_STACK=0xd001c000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 39391699499..c38be8f1457 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -34,6 +34,13 @@ CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_RELOC_TEXT_BASE=0xd003d000 +CONFIG_SPL_RELOC_STACK=0xd003fff0 +CONFIG_TPL_RELOC_TEXT_BASE=0xd0001000 +CONFIG_TPL_RELOC_STACK=0xd0030000 +CONFIG_TPL_RELOC_MALLOC=y +CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000 +CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_MAX_SIZE=0x20000 diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 9692aaeaa70..146c556062d 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -23,7 +23,6 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y -CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 4e5e92d9670..9e788ab9bf3 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -31,6 +31,11 @@ CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000 +CONFIG_SPL_RELOC_STACK=0xd001c000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index f67961d8315..a762f07c489 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -34,6 +34,11 @@ CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000 +CONFIG_SPL_RELOC_STACK=0xd001c000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index da189ce8569..18ba32f2d1e 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -33,6 +33,13 @@ CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_RELOC_TEXT_BASE=0xd003d000 +CONFIG_SPL_RELOC_STACK=0xd003fff0 +CONFIG_TPL_RELOC_TEXT_BASE=0xd0001000 +CONFIG_TPL_RELOC_STACK=0xd0030000 +CONFIG_TPL_RELOC_MALLOC=y +CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000 +CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_MAX_SIZE=0x20000 diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index ca2ce61a1d4..bcf4c090dd3 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -22,7 +22,6 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y -CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index b5d097add8f..1d18f1282d1 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -30,6 +30,11 @@ CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000 +CONFIG_SPL_RELOC_STACK=0xd001c000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 62d8e77745c..1a36d6c5133 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -33,6 +33,11 @@ CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000 +CONFIG_SPL_RELOC_STACK=0xd001c000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index e9a7237a080..54cd3d2b5cc 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -34,6 +34,13 @@ CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_RELOC_TEXT_BASE=0xf8fbe000 +CONFIG_SPL_RELOC_STACK=0xf8fbfff0 +CONFIG_TPL_RELOC_TEXT_BASE=0xf8f81000 +CONFIG_TPL_RELOC_STACK=0xf8fb0000 +CONFIG_TPL_RELOC_MALLOC=y +CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000 +CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_MAX_SIZE=0x20000 diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 6c47be30b72..6a36f3ba9b2 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -32,6 +32,10 @@ CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_RELOC_STACK=0xf8f9d000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index 3b2e7ce1118..e246a2190d0 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -35,6 +35,10 @@ CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_RELOC_STACK=0xf8f9d000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index f3bbb604859..425d66891d3 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -24,7 +24,6 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y -CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index cf211c7f5d5..b49cdcb480d 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -33,6 +33,13 @@ CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_RELOC_TEXT_BASE=0xf8fbe000 +CONFIG_SPL_RELOC_STACK=0xf8fbfff0 +CONFIG_TPL_RELOC_TEXT_BASE=0xf8f81000 +CONFIG_TPL_RELOC_STACK=0xf8fb0000 +CONFIG_TPL_RELOC_MALLOC=y +CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000 +CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_MAX_SIZE=0x20000 diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 55dc19d658a..a86a406eb7c 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -31,6 +31,10 @@ CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_RELOC_STACK=0xf8f9d000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index c4391ed5424..4c9f1b4c81e 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -34,6 +34,10 @@ CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_RELOC_STACK=0xf8f9d000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 7e20aa78875..3ecdd1b6dd3 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -23,7 +23,6 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y -CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index c85ec6d2520..899d074537f 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -33,6 +33,13 @@ CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_RELOC_TEXT_BASE=0xf8fbe000 +CONFIG_SPL_RELOC_STACK=0xf8fbfff0 +CONFIG_TPL_RELOC_TEXT_BASE=0xf8f81000 +CONFIG_TPL_RELOC_STACK=0xf8fb0000 +CONFIG_TPL_RELOC_MALLOC=y +CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000 +CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_MAX_SIZE=0x20000 diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index a1bbb639257..ea91b9e95d5 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -31,6 +31,10 @@ CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_RELOC_STACK=0xf8f9d000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index e859587ccd3..9351f00e5db 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -34,6 +34,10 @@ CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_RELOC_STACK=0xf8f9d000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index 966b9de5c79..d78dc0d9ca0 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -23,7 +23,6 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y -CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index eefc72e4987..ad6c72c23c5 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -34,6 +34,13 @@ CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_RELOC_TEXT_BASE=0xf8ffe000 +CONFIG_SPL_RELOC_STACK=0xf8fffff0 +CONFIG_TPL_RELOC_TEXT_BASE=0xf8f81000 +CONFIG_TPL_RELOC_STACK=0xf8fb0000 +CONFIG_TPL_RELOC_MALLOC=y +CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000 +CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_MAX_SIZE=0x20000 diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 5ac2f8c566d..d4f82f16f58 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -32,6 +32,10 @@ CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_RELOC_STACK=0xf8f9d000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 6150b84d11b..7a198e01785 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -35,6 +35,10 @@ CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_RELOC_STACK=0xf8f9d000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index fc22e624319..258442b76cb 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -24,7 +24,6 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y -CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index dc94e25375c..f5bd7015fb5 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -33,6 +33,13 @@ CONFIG_SPL_NAND_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_RELOC_TEXT_BASE=0xf8ffe000 +CONFIG_SPL_RELOC_STACK=0xf8fffff0 +CONFIG_TPL_RELOC_TEXT_BASE=0xf8f81000 +CONFIG_TPL_RELOC_STACK=0xf8fb0000 +CONFIG_TPL_RELOC_MALLOC=y +CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000 +CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_MAX_SIZE=0x20000 diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 4f33a697cda..0e1eb82a00e 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -31,6 +31,10 @@ CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_RELOC_STACK=0xf8f9d000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index e63cd161ddb..5ffda90dd3b 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -34,6 +34,10 @@ CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_RELOC_STACK=0xf8f9d000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index dd316f540fb..fb1a239f6a2 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -23,7 +23,6 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y -CONFIG_SPL_FLUSH_IMAGE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index ae8828d7e6d..93dc0c1909f 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -39,6 +39,10 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_RELOC_STACK=0xfffd8000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0x7800 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index 8ac0e4a5dac..dddf74262e3 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -40,6 +40,10 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_RELOC_STACK=0xfffd8000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0x7800 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index ebe814f3813..d8e41241ee6 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -43,6 +43,10 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_RELOC_STACK=0xfffd8000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0x7800 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index e12bb9f1590..ccb1a3343ca 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -35,6 +35,10 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_RELOC_STACK=0xfffd8000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0x7800 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index 01a6e97afc4..4b3962c7de8 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -36,6 +36,10 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_RELOC_STACK=0xfffd8000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0x7800 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index ce334b12a99..a9668c562de 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -39,6 +39,10 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_RELOC_STACK=0xfffd8000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0x7800 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 67f84d2b809..e8b83ed127d 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -40,6 +40,10 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_RELOC_STACK=0xfffd8000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index 5cfdb5659dc..1e9b5862265 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -41,6 +41,10 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_RELOC_STACK=0xfffd8000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 99889cf6df1..2967c4e9806 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -44,6 +44,10 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_RELOC_STACK=0xfffd8000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index 0046bd38672..dd5a3dee4d8 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -38,6 +38,10 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_RELOC_STACK=0xfffd8000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index 0d09be36c85..2c35b80c0c6 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -39,6 +39,10 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_RELOC_STACK=0xfffd8000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index 5cbfc55a5a5..21e0be3a03a 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -42,6 +42,10 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_RELOC_STACK=0xfffd8000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index bc307fa59a3..d2b8df2dbc1 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -39,6 +39,10 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_RELOC_STACK=0xfffd8000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index e0456dee077..24dea1ae9af 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -40,6 +40,10 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_RELOC_STACK=0xfffd8000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index 4bef18e0f92..a5c397dc4dd 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -43,6 +43,10 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_RELOC_STACK=0xfffd8000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index f68d98c7eee..56eb03b0c02 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -37,6 +37,10 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_RELOC_STACK=0xfffd8000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index ead53556615..13f8360a5b4 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -43,8 +43,6 @@ #ifdef CONFIG_NXP_ESBC #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_RELOC_TEXT_BASE 0x00100000 -#define CONFIG_SPL_RELOC_STACK 0x00100000 #define CONFIG_SYS_NAND_U_BOOT_SIZE ((768 << 10) - 0x2000) #define CONFIG_SYS_NAND_U_BOOT_DST (0x00200000 - CONFIG_SPL_MAX_SIZE) #define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 @@ -392,10 +390,6 @@ extern unsigned long get_sdram_size(void); #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR #define CONFIG_SYS_L2_SIZE (256 << 10) #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) -#define CONFIG_SPL_RELOC_TEXT_BASE 0xD0001000 -#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024) -#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 128 * 1024) -#define CONFIG_SPL_RELOC_MALLOC_SIZE (128 << 10) #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 96 * 1024) #elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD @@ -403,18 +397,12 @@ extern unsigned long get_sdram_size(void); #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR #define CONFIG_SYS_L2_SIZE (256 << 10) #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) -#define CONFIG_SPL_RELOC_TEXT_BASE 0xD0001000 -#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 192 * 1024) -#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 208 * 1024) -#define CONFIG_SPL_RELOC_MALLOC_SIZE (48 << 10) #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 176 * 1024) #else #define CONFIG_SYS_INIT_L2_ADDR 0xD0000000 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR #define CONFIG_SYS_L2_SIZE (256 << 10) #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) -#define CONFIG_SPL_RELOC_TEXT_BASE (CONFIG_SYS_INIT_L2_END - 0x3000) -#define CONFIG_SPL_RELOC_STACK ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF) #endif #endif #endif diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 5b0cea735df..4dcd376d895 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -121,9 +121,6 @@ #define CONFIG_SYS_L3_SIZE (256 << 10) #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L3_ADDR + 32 * 1024) #define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024) -#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SPL_GD_ADDR + 12 * 1024) -#define CONFIG_SPL_RELOC_MALLOC_SIZE (30 << 10) -#define CONFIG_SPL_RELOC_STACK (CONFIG_SPL_GD_ADDR + 64 * 1024) #ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_DCSRBAR 0xf0000000 diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 29b4cc40995..07eed3bb14f 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -108,9 +108,6 @@ #define CONFIG_SYS_L3_SIZE 256 << 10 #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L3_VADDR + 32 * 1024) #define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024) -#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SPL_GD_ADDR + 12 * 1024) -#define CONFIG_SPL_RELOC_MALLOC_SIZE (30 << 10) -#define CONFIG_SPL_RELOC_STACK (CONFIG_SPL_GD_ADDR + 64 * 1024) #define CONFIG_SYS_DCSRBAR 0xf0000000 #define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 22cee32f6d7..16751e5a3fb 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -94,9 +94,6 @@ #define CONFIG_SYS_L3_SIZE (512 << 10) #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L3_ADDR + 32 * 1024) #define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024) -#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SPL_GD_ADDR + 12 * 1024) -#define CONFIG_SPL_RELOC_MALLOC_SIZE (50 << 10) -#define CONFIG_SPL_RELOC_STACK (CONFIG_SPL_GD_ADDR + 64 * 1024) #define CONFIG_SYS_DCSRBAR 0xf0000000 #define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index fafd83440ef..feec2c35991 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -89,9 +89,6 @@ #define CONFIG_SYS_L3_SIZE (512 << 10) #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L3_ADDR + 32 * 1024) #define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024) -#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SPL_GD_ADDR + 12 * 1024) -#define CONFIG_SPL_RELOC_MALLOC_SIZE (50 << 10) -#define CONFIG_SPL_RELOC_STACK (CONFIG_SPL_GD_ADDR + 64 * 1024) #define CONFIG_SYS_DCSRBAR 0xf0000000 #define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 4b5c6bcf7eb..21854139b9d 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -69,9 +69,6 @@ #define CONFIG_SYS_L3_SIZE (512 << 10) #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L3_ADDR + 32 * 1024) #define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024) -#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SPL_GD_ADDR + 12 * 1024) -#define CONFIG_SPL_RELOC_MALLOC_SIZE (50 << 10) -#define CONFIG_SPL_RELOC_STACK (CONFIG_SPL_GD_ADDR + 64 * 1024) #define CONFIG_SYS_DCSRBAR 0xf0000000 #define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 849a0b8cb64..0b866f4d5a6 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -336,31 +336,17 @@ #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) -#define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000 #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024) -#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 116 * 1024) -#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 148 * 1024) -#if defined(CONFIG_TARGET_P2020RDB) -#define CONFIG_SPL_RELOC_MALLOC_SIZE (364 << 10) -#else -#define CONFIG_SPL_RELOC_MALLOC_SIZE (108 << 10) -#endif #elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) -#define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000 -#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 192 * 1024) -#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 208 * 1024) -#define CONFIG_SPL_RELOC_MALLOC_SIZE (48 << 10) #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 176 * 1024) #else #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) -#define CONFIG_SPL_RELOC_TEXT_BASE (CONFIG_SYS_INIT_L2_END - 0x2000) -#define CONFIG_SPL_RELOC_STACK ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF) #endif /* CONFIG_TPL_BUILD */ #endif #endif -- GitLab From 6600b355c71e80c99d8edb8603dd5e3df8ed4db8 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 27 May 2022 10:19:45 -0400 Subject: [PATCH 038/581] Convert CONFIG_SPL_BSS_START_ADDR to Kconfig This converts the following to Kconfig: CONFIG_SPL_BSS_START_ADDR Signed-off-by: Tom Rini --- README | 3 --- common/spl/Kconfig | 15 +++++++++++++++ configs/ae350_rv32_spl_defconfig | 1 + configs/ae350_rv32_spl_xip_defconfig | 1 + configs/ae350_rv64_spl_defconfig | 1 + configs/ae350_rv64_spl_xip_defconfig | 1 + configs/am64x_evm_a53_defconfig | 2 ++ configs/am64x_evm_r5_defconfig | 2 ++ configs/am65x_evm_a53_defconfig | 2 ++ configs/am65x_evm_r5_defconfig | 2 ++ configs/am65x_evm_r5_usbdfu_defconfig | 2 ++ configs/am65x_evm_r5_usbmsc_defconfig | 2 ++ configs/am65x_hs_evm_a53_defconfig | 2 ++ configs/am65x_hs_evm_r5_defconfig | 2 ++ ...trazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig | 2 ++ configs/axm_defconfig | 2 ++ configs/bitmain_antminer_s9_defconfig | 2 ++ configs/cgtqmx8_defconfig | 2 ++ configs/chromebook_bob_defconfig | 2 ++ configs/chromebook_kevin_defconfig | 2 ++ configs/ci20_mmc_defconfig | 1 + configs/cl-som-imx7_defconfig | 1 + configs/clearfog_defconfig | 2 ++ configs/controlcenterdc_defconfig | 2 ++ configs/corvus_defconfig | 2 ++ configs/da850evm_defconfig | 2 ++ configs/da850evm_nand_defconfig | 2 ++ configs/db-88f6720_defconfig | 2 ++ configs/db-88f6820-amc_defconfig | 2 ++ configs/db-88f6820-gp_defconfig | 2 ++ configs/db-mv784mp-gp_defconfig | 2 ++ configs/deneb_defconfig | 2 ++ configs/devkit8000_defconfig | 1 + configs/draco_defconfig | 1 + configs/ds414_defconfig | 2 ++ configs/edminiv2_defconfig | 2 ++ configs/etamin_defconfig | 1 + configs/evb-px30_defconfig | 2 ++ configs/evb-px5_defconfig | 2 ++ configs/evb-rk3308_defconfig | 2 ++ configs/evb-rk3328_defconfig | 2 ++ configs/evb-rk3399_defconfig | 2 ++ configs/evb-rk3568_defconfig | 2 ++ configs/ficus-rk3399_defconfig | 2 ++ configs/firefly-px30_defconfig | 2 ++ configs/firefly-rk3399_defconfig | 2 ++ configs/gardena-smart-gateway-at91sam_defconfig | 2 ++ configs/gardena-smart-gateway-mt7688_defconfig | 1 + configs/giedi_defconfig | 2 ++ configs/helios4_defconfig | 2 ++ configs/imx7_cm_defconfig | 1 + configs/imx8mm-cl-iot-gate-optee_defconfig | 2 ++ configs/imx8mm-cl-iot-gate_defconfig | 2 ++ configs/imx8mm-icore-mx8mm-ctouch2_defconfig | 2 ++ configs/imx8mm-icore-mx8mm-edimm2.2_defconfig | 2 ++ configs/imx8mm-mx8menlo_defconfig | 2 ++ configs/imx8mm_beacon_defconfig | 2 ++ configs/imx8mm_data_modul_edm_sbc_defconfig | 2 ++ configs/imx8mm_evk_defconfig | 2 ++ configs/imx8mm_venice_defconfig | 2 ++ configs/imx8mn_beacon_2g_defconfig | 2 ++ configs/imx8mn_beacon_defconfig | 2 ++ configs/imx8mn_bsh_smm_s2_defconfig | 2 ++ configs/imx8mn_bsh_smm_s2pro_defconfig | 2 ++ configs/imx8mn_ddr4_evk_defconfig | 2 ++ configs/imx8mn_evk_defconfig | 2 ++ configs/imx8mn_var_som_defconfig | 2 ++ configs/imx8mn_venice_defconfig | 2 ++ configs/imx8mp_dhcom_pdk2_defconfig | 2 ++ configs/imx8mp_evk_defconfig | 2 ++ configs/imx8mp_rsb3720a1_4G_defconfig | 2 ++ configs/imx8mp_rsb3720a1_6G_defconfig | 2 ++ configs/imx8mp_venice_defconfig | 2 ++ configs/imx8mq_cm_defconfig | 2 ++ configs/imx8mq_evk_defconfig | 2 ++ configs/imx8mq_phanbell_defconfig | 2 ++ configs/imx8qm_mek_defconfig | 2 ++ configs/imx8qm_rom7720_a1_4G_defconfig | 2 ++ configs/imx8qxp_mek_defconfig | 2 ++ configs/imx8ulp_evk_defconfig | 2 ++ configs/iot2050_defconfig | 2 ++ configs/j7200_evm_a72_defconfig | 2 ++ configs/j7200_evm_r5_defconfig | 2 ++ configs/j721e_evm_a72_defconfig | 2 ++ configs/j721e_evm_r5_defconfig | 2 ++ configs/j721e_hs_evm_a72_defconfig | 2 ++ configs/j721e_hs_evm_r5_defconfig | 2 ++ configs/j721s2_evm_a72_defconfig | 2 ++ configs/j721s2_evm_r5_defconfig | 2 ++ configs/k2e_evm_defconfig | 2 ++ configs/k2g_evm_defconfig | 2 ++ configs/k2hk_evm_defconfig | 2 ++ configs/k2l_evm_defconfig | 2 ++ configs/khadas-edge-captain-rk3399_defconfig | 2 ++ configs/khadas-edge-rk3399_defconfig | 2 ++ configs/khadas-edge-v-rk3399_defconfig | 2 ++ configs/kontron-sl-mx8mm_defconfig | 2 ++ configs/kontron_pitx_imx8m_defconfig | 2 ++ configs/kontron_sl28_defconfig | 2 ++ configs/leez-rk3399_defconfig | 2 ++ configs/linkit-smart-7688_defconfig | 1 + configs/lion-rk3368_defconfig | 2 ++ configs/ls1021aiot_sdcard_defconfig | 2 ++ configs/ls1021aqds_nand_defconfig | 2 ++ configs/ls1021aqds_sdcard_ifc_defconfig | 2 ++ configs/ls1021aqds_sdcard_qspi_defconfig | 2 ++ configs/ls1021atsn_sdcard_defconfig | 2 ++ .../ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig | 2 ++ configs/ls1021atwr_sdcard_ifc_defconfig | 2 ++ configs/ls1021atwr_sdcard_qspi_defconfig | 2 ++ configs/ls1043aqds_nand_defconfig | 2 ++ configs/ls1043aqds_sdcard_ifc_defconfig | 2 ++ configs/ls1043aqds_sdcard_qspi_defconfig | 2 ++ configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 2 ++ configs/ls1043ardb_nand_defconfig | 2 ++ configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig | 2 ++ configs/ls1043ardb_sdcard_defconfig | 2 ++ configs/ls1046aqds_nand_defconfig | 2 ++ configs/ls1046aqds_sdcard_ifc_defconfig | 2 ++ configs/ls1046aqds_sdcard_qspi_defconfig | 2 ++ configs/ls1046ardb_emmc_defconfig | 2 ++ configs/ls1046ardb_qspi_spl_defconfig | 2 ++ configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig | 2 ++ configs/ls1046ardb_sdcard_defconfig | 2 ++ configs/ls1088aqds_sdcard_ifc_defconfig | 2 ++ configs/ls1088aqds_sdcard_qspi_defconfig | 2 ++ .../ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig | 2 ++ configs/ls1088ardb_sdcard_qspi_defconfig | 2 ++ configs/ls2080aqds_nand_defconfig | 2 ++ configs/ls2080aqds_sdcard_defconfig | 2 ++ configs/ls2080ardb_nand_defconfig | 2 ++ configs/maxbcm_defconfig | 2 ++ configs/mt7620_mt7530_rfb_defconfig | 1 + configs/mt7620_rfb_defconfig | 1 + configs/mt7628_rfb_defconfig | 1 + configs/nanopc-t4-rk3399_defconfig | 2 ++ configs/nanopi-m4-2gb-rk3399_defconfig | 2 ++ configs/nanopi-m4-rk3399_defconfig | 2 ++ configs/nanopi-m4b-rk3399_defconfig | 2 ++ configs/nanopi-neo4-rk3399_defconfig | 2 ++ configs/nanopi-r2s-rk3328_defconfig | 2 ++ configs/nanopi-r4s-rk3399_defconfig | 2 ++ configs/odroid-go2_defconfig | 2 ++ configs/omapl138_lcdk_defconfig | 2 ++ configs/openpiton_riscv64_spl_defconfig | 1 + configs/orangepi-rk3399_defconfig | 2 ++ configs/phycore-imx8mm_defconfig | 2 ++ configs/phycore-imx8mp_defconfig | 2 ++ configs/pico-dwarf-imx7d_defconfig | 1 + configs/pico-hobbit-imx7d_defconfig | 1 + configs/pico-imx7d_bl33_defconfig | 1 + configs/pico-imx7d_defconfig | 1 + configs/pico-imx8mq_defconfig | 2 ++ configs/pico-nymph-imx7d_defconfig | 1 + configs/pico-pi-imx7d_defconfig | 1 + configs/pinebook-pro-rk3399_defconfig | 2 ++ configs/puma-rk3399_defconfig | 2 ++ configs/px30-core-ctouch2-of10-px30_defconfig | 2 ++ configs/px30-core-ctouch2-px30_defconfig | 2 ++ configs/px30-core-edimm2.2-px30_defconfig | 2 ++ configs/pxm2_defconfig | 1 + configs/qemu-riscv32_spl_defconfig | 1 + configs/qemu-riscv64_spl_defconfig | 1 + configs/r8a77970_eagle_defconfig | 2 ++ configs/r8a77980_condor_defconfig | 2 ++ configs/r8a77990_ebisu_defconfig | 2 ++ configs/r8a77995_draak_defconfig | 2 ++ configs/r8a779a0_falcon_defconfig | 2 ++ configs/rastaban_defconfig | 1 + configs/rcar3_salvator-x_defconfig | 2 ++ configs/rcar3_ulcb_defconfig | 2 ++ configs/roc-cc-rk3308_defconfig | 2 ++ configs/roc-cc-rk3328_defconfig | 2 ++ configs/roc-pc-mezzanine-rk3399_defconfig | 2 ++ configs/roc-pc-rk3399_defconfig | 2 ++ configs/rock-pi-4-rk3399_defconfig | 2 ++ configs/rock-pi-4c-rk3399_defconfig | 2 ++ configs/rock-pi-e-rk3328_defconfig | 2 ++ configs/rock-pi-n10-rk3399pro_defconfig | 2 ++ configs/rock64-rk3328_defconfig | 2 ++ configs/rock960-rk3399_defconfig | 2 ++ configs/rockpro64-rk3399_defconfig | 2 ++ configs/rut_defconfig | 1 + configs/sama5d27_giantboard_defconfig | 2 ++ configs/sama5d27_som1_ek_mmc1_defconfig | 2 ++ configs/sama5d27_som1_ek_mmc_defconfig | 2 ++ configs/sama5d27_som1_ek_qspiflash_defconfig | 2 ++ configs/sama5d27_wlsom1_ek_mmc_defconfig | 2 ++ configs/sama5d27_wlsom1_ek_qspiflash_defconfig | 2 ++ configs/sama5d2_icp_mmc_defconfig | 2 ++ configs/sama5d2_xplained_emmc_defconfig | 2 ++ configs/sama5d2_xplained_mmc_defconfig | 2 ++ configs/sama5d2_xplained_qspiflash_defconfig | 2 ++ configs/sama5d2_xplained_spiflash_defconfig | 2 ++ configs/sama5d3_xplained_mmc_defconfig | 2 ++ configs/sama5d3_xplained_nandflash_defconfig | 2 ++ configs/sama5d3xek_mmc_defconfig | 2 ++ configs/sama5d3xek_nandflash_defconfig | 2 ++ configs/sama5d3xek_spiflash_defconfig | 2 ++ configs/sama5d4_xplained_mmc_defconfig | 2 ++ configs/sama5d4_xplained_nandflash_defconfig | 2 ++ configs/sama5d4_xplained_spiflash_defconfig | 2 ++ configs/sama5d4ek_mmc_defconfig | 2 ++ configs/sama5d4ek_nandflash_defconfig | 2 ++ configs/sama5d4ek_spiflash_defconfig | 2 ++ configs/sifive_unleashed_defconfig | 1 + configs/sifive_unmatched_defconfig | 1 + configs/silinux_ek874_defconfig | 2 ++ configs/smartweb_defconfig | 2 ++ configs/sniper_defconfig | 1 + configs/socfpga_agilex_atf_defconfig | 2 ++ configs/socfpga_agilex_defconfig | 2 ++ configs/socfpga_agilex_vab_defconfig | 2 ++ configs/socfpga_n5x_atf_defconfig | 2 ++ configs/socfpga_n5x_defconfig | 2 ++ configs/socfpga_n5x_vab_defconfig | 2 ++ configs/socfpga_stratix10_atf_defconfig | 2 ++ configs/socfpga_stratix10_defconfig | 2 ++ configs/syzygy_hub_defconfig | 2 ++ configs/taurus_defconfig | 2 ++ configs/theadorable_debug_defconfig | 2 ++ configs/thuban_defconfig | 1 + configs/topic_miami_defconfig | 2 ++ configs/topic_miamilite_defconfig | 2 ++ configs/topic_miamiplus_defconfig | 2 ++ configs/turris_omnia_defconfig | 2 ++ configs/verdin-imx8mm_defconfig | 2 ++ configs/verdin-imx8mp_defconfig | 2 ++ configs/vocore2_defconfig | 1 + configs/x530_defconfig | 2 ++ configs/xilinx_zynq_virt_defconfig | 2 ++ configs/xilinx_zynqmp_mini_emmc0_defconfig | 2 ++ configs/xilinx_zynqmp_mini_emmc1_defconfig | 2 ++ configs/xilinx_zynqmp_mini_qspi_defconfig | 2 ++ configs/xilinx_zynqmp_virt_defconfig | 2 ++ configs/zynq_cse_nand_defconfig | 2 ++ configs/zynq_cse_nor_defconfig | 2 ++ configs/zynq_cse_qspi_defconfig | 2 ++ include/configs/am64x_evm.h | 12 +----------- include/configs/am65x_evm.h | 12 +----------- include/configs/at91sam9m10g45ek.h | 1 - include/configs/at91sam9n12ek.h | 1 - include/configs/at91sam9x5ek.h | 1 - include/configs/ax25-ae350.h | 4 ---- include/configs/bur_am335x_common.h | 1 - include/configs/capricorn-common.h | 1 - include/configs/cgtqmx8.h | 1 - include/configs/ci20.h | 2 -- include/configs/clearfog.h | 2 -- include/configs/controlcenterdc.h | 2 -- include/configs/corvus.h | 2 -- include/configs/da850evm.h | 1 - include/configs/db-88f6720.h | 2 -- include/configs/db-88f6820-amc.h | 2 -- include/configs/db-88f6820-gp.h | 2 -- include/configs/db-mv784mp-gp.h | 2 -- include/configs/devkit8000.h | 2 -- include/configs/ds414.h | 2 -- include/configs/edminiv2.h | 1 - include/configs/gardena-smart-gateway-at91sam.h | 1 - include/configs/gardena-smart-gateway-mt7688.h | 1 - include/configs/helios4.h | 2 -- include/configs/imx6_spl.h | 2 -- include/configs/imx7_spl.h | 1 - include/configs/imx8mm-cl-iot-gate.h | 1 - include/configs/imx8mm_beacon.h | 1 - include/configs/imx8mm_data_modul_edm_sbc.h | 1 - include/configs/imx8mm_evk.h | 1 - include/configs/imx8mm_icore_mx8mm.h | 1 - include/configs/imx8mm_venice.h | 1 - include/configs/imx8mn_beacon.h | 1 - include/configs/imx8mn_bsh_smm_s2_common.h | 1 - include/configs/imx8mn_evk.h | 1 - include/configs/imx8mn_var_som.h | 1 - include/configs/imx8mn_venice.h | 1 - include/configs/imx8mp_dhcom_pdk2.h | 1 - include/configs/imx8mp_evk.h | 1 - include/configs/imx8mp_rsb3720.h | 1 - include/configs/imx8mp_venice.h | 1 - include/configs/imx8mq_cm.h | 1 - include/configs/imx8mq_evk.h | 1 - include/configs/imx8mq_phanbell.h | 1 - include/configs/imx8qm_mek.h | 1 - include/configs/imx8qm_rom7720.h | 2 -- include/configs/imx8qxp_mek.h | 1 - include/configs/imx8ulp_evk.h | 1 - include/configs/j721e_evm.h | 9 --------- include/configs/j721s2_evm.h | 9 --------- include/configs/kontron-sl-mx8mm.h | 1 - include/configs/kontron_pitx_imx8m.h | 1 - include/configs/kontron_sl28.h | 1 - include/configs/linkit-smart-7688.h | 1 - include/configs/ls1021aiot.h | 1 - include/configs/ls1021aqds.h | 2 -- include/configs/ls1021atsn.h | 1 - include/configs/ls1021atwr.h | 1 - include/configs/ls1043a_common.h | 2 -- include/configs/ls1046a_common.h | 3 --- include/configs/ls1088a_common.h | 1 - include/configs/ls2080a_common.h | 1 - include/configs/maxbcm.h | 7 ------- include/configs/mt7620.h | 1 - include/configs/mt7628.h | 1 - include/configs/omapl138_lcdk.h | 2 -- include/configs/openpiton-riscv64.h | 1 - include/configs/phycore_imx8mm.h | 1 - include/configs/phycore_imx8mp.h | 1 - include/configs/pico-imx8mq.h | 1 - include/configs/pm9g45.h | 1 - include/configs/px30_common.h | 1 - include/configs/qemu-riscv.h | 1 - include/configs/rcar-gen3-common.h | 7 ------- include/configs/rk3308_common.h | 2 -- include/configs/rk3328_common.h | 2 -- include/configs/rk3368_common.h | 2 -- include/configs/rk3399_common.h | 2 -- include/configs/rk3568_common.h | 2 -- include/configs/sama5d27_som1_ek.h | 1 - include/configs/sama5d27_wlsom1_ek.h | 1 - include/configs/sama5d2_icp.h | 1 - include/configs/sama5d2_xplained.h | 1 - include/configs/sama5d3_xplained.h | 1 - include/configs/sama5d3xek.h | 1 - include/configs/sama5d4_xplained.h | 1 - include/configs/sama5d4ek.h | 1 - include/configs/siemens-am33x-common.h | 2 -- include/configs/sifive-unleashed.h | 1 - include/configs/sifive-unmatched.h | 1 - include/configs/smartweb.h | 1 - include/configs/sniper.h | 1 - include/configs/socfpga_soc64_common.h | 2 -- include/configs/sunxi-common.h | 3 --- include/configs/taurus.h | 2 -- include/configs/theadorable.h | 2 -- include/configs/ti814x_evm.h | 2 -- include/configs/ti_armv7_common.h | 3 --- include/configs/ti_armv7_keystone2.h | 2 -- include/configs/turris_omnia.h | 2 -- include/configs/verdin-imx8mm.h | 1 - include/configs/verdin-imx8mp.h | 1 - include/configs/vocore2.h | 1 - include/configs/x530.h | 2 -- include/configs/xilinx_zynqmp.h | 3 --- include/configs/zynq-common.h | 3 --- include/configs/zynq_cse.h | 2 -- 345 files changed, 457 insertions(+), 201 deletions(-) diff --git a/README b/README index 7b4067f8f24..f21aae2ecf7 100644 --- a/README +++ b/README @@ -1625,9 +1625,6 @@ The following options need to be configured: CONFIG_SPL Enable building of SPL globally. - CONFIG_SPL_BSS_START_ADDR - Link address for the BSS within the SPL binary. - CONFIG_SPL_PANIC_ON_RAW_IMAGE When defined, SPL will panic() if the image it has loaded does not have a signature. diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 304fd0e697c..adcd7ca19a4 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -105,6 +105,21 @@ config SPL_PAD_TO 0, meaning to append the SPL payload without any padding, or >= CONFIG_SPL_MAX_SIZE. +config SPL_HAS_BSS_LINKER_SECTION + depends on SPL_FRAMEWORK + bool "Use a specific address for the BSS via the linker script" + default y if ARCH_SUNXI || ARCH_MX6 || ARCH_OMAP2PLUS || MIPS || RISCV + +config SPL_BSS_START_ADDR + hex "Link address for the BSS within the SPL binary" + depends on SPL_HAS_BSS_LINKER_SECTION + default 0x88200000 if (ARCH_MX6 && (MX6SX || MX6SL || MX6UL || MX6ULL)) || ARCH_MX7 + default 0x18200000 if ARCH_MX6 && !(MX6SX || MX6SL || MX6UL || MX6ULL) + default 0x80a00000 if ARCH_OMAP2PLUS + default 0x81f80000 if ARCH_SUNXI && MACH_SUNIV + default 0x4ff80000 if ARCH_SUNXI && !(MACH_SUN9I || MACH_SUNIV) + default 0x2ff80000 if ARCH_SUNXI && MACH_SUN9I + choice prompt "Enforce SPL BSS limit" depends on SPL && !PPC diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig index e01266bb8bd..cfd857c183f 100644 --- a/configs/ae350_rv32_spl_defconfig +++ b/configs/ae350_rv32_spl_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x100000 +CONFIG_SPL_BSS_START_ADDR=0x4000000 CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_IMLS=y diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig index f37fa045c59..36345fbfdc3 100644 --- a/configs/ae350_rv32_spl_xip_defconfig +++ b/configs/ae350_rv32_spl_xip_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x100000 +CONFIG_SPL_BSS_START_ADDR=0x4000000 CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_IMLS=y diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig index f62d61c7d37..eba12a8f0d4 100644 --- a/configs/ae350_rv64_spl_defconfig +++ b/configs/ae350_rv64_spl_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x100000 +CONFIG_SPL_BSS_START_ADDR=0x4000000 CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_IMLS=y diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig index f5fbba86181..6ade12b740e 100644 --- a/configs/ae350_rv64_spl_xip_defconfig +++ b/configs/ae350_rv64_spl_xip_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x100000 +CONFIG_SPL_BSS_START_ADDR=0x4000000 CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_IMLS=y diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig index 6dcdb070efa..954f0a8b2cd 100644 --- a/configs/am64x_evm_a53_defconfig +++ b/configs/am64x_evm_a53_defconfig @@ -33,6 +33,8 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run get_kern_${boot}; run get_fdt_${boot}; run run_kern" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x180000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80a00000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/am64x_evm_r5_defconfig b/configs/am64x_evm_r5_defconfig index 669e4960e1d..20e1f507cbe 100644 --- a/configs/am64x_evm_r5_defconfig +++ b/configs/am64x_evm_r5_defconfig @@ -34,6 +34,8 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x180000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x7019b800 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y CONFIG_SPL_BOARD_INIT=y diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig index af8160c48f7..d07edc22925 100644 --- a/configs/am65x_evm_a53_defconfig +++ b/configs/am65x_evm_a53_defconfig @@ -36,6 +36,8 @@ CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run init_${boot}; run boot_ CONFIG_LOGLEVEL=7 CONFIG_CONSOLE_MUX=y CONFIG_SPL_MAX_SIZE=0x58000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80a00000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index b6b007525a4..fbe3aba2555 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -34,6 +34,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x58000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x41c7effc CONFIG_SPL_BSS_MAX_SIZE=0xc00 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y CONFIG_SPL_STACK_R=y diff --git a/configs/am65x_evm_r5_usbdfu_defconfig b/configs/am65x_evm_r5_usbdfu_defconfig index aece9f2dedd..f0dfc7579fc 100644 --- a/configs/am65x_evm_r5_usbdfu_defconfig +++ b/configs/am65x_evm_r5_usbdfu_defconfig @@ -26,6 +26,8 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0x58000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x41c7effc CONFIG_SPL_BSS_MAX_SIZE=0xc00 CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y diff --git a/configs/am65x_evm_r5_usbmsc_defconfig b/configs/am65x_evm_r5_usbmsc_defconfig index 8d9b7467126..cf55bd48cdd 100644 --- a/configs/am65x_evm_r5_usbmsc_defconfig +++ b/configs/am65x_evm_r5_usbmsc_defconfig @@ -25,6 +25,8 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0x58000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x41c7effc CONFIG_SPL_BSS_MAX_SIZE=0xc00 CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y diff --git a/configs/am65x_hs_evm_a53_defconfig b/configs/am65x_hs_evm_a53_defconfig index efda16e14f5..6983c9172f0 100644 --- a/configs/am65x_hs_evm_a53_defconfig +++ b/configs/am65x_hs_evm_a53_defconfig @@ -36,6 +36,8 @@ CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run get_fit_${bo CONFIG_LOGLEVEL=7 CONFIG_CONSOLE_MUX=y CONFIG_SPL_MAX_SIZE=0x58000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80a00000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y diff --git a/configs/am65x_hs_evm_r5_defconfig b/configs/am65x_hs_evm_r5_defconfig index 39ce5276f4e..d26f07124b8 100644 --- a/configs/am65x_hs_evm_r5_defconfig +++ b/configs/am65x_hs_evm_r5_defconfig @@ -31,6 +31,8 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0x58000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x41c7effc CONFIG_SPL_BSS_MAX_SIZE=0xc00 CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y diff --git a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig index d9330d049dd..c24f94e08d8 100644 --- a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig +++ b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig @@ -29,6 +29,8 @@ CONFIG_BOOTDELAY=0 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x0 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffffc diff --git a/configs/axm_defconfig b/configs/axm_defconfig index 2a5458b5214..2f6b332cb35 100644 --- a/configs/axm_defconfig +++ b/configs/axm_defconfig @@ -37,6 +37,8 @@ CONFIG_BOOTCOMMAND="run flash_self" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x3e00 CONFIG_SPL_PAD_TO=0x20000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x3e00 CONFIG_SPL_BSS_MAX_SIZE=0x600 # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig index 02a8435fbcd..d724fe6e65d 100644 --- a/configs/bitmain_antminer_s9_defconfig +++ b/configs/bitmain_antminer_s9_defconfig @@ -28,6 +28,8 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffe00 diff --git a/configs/cgtqmx8_defconfig b/configs/cgtqmx8_defconfig index d60437884c9..1a25d498b99 100644 --- a/configs/cgtqmx8_defconfig +++ b/configs/cgtqmx8_defconfig @@ -29,6 +29,8 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x1f000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x128000 CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig index 21943010f4e..84fe5be19d5 100644 --- a/configs/chromebook_bob_defconfig +++ b/configs/chromebook_bob_defconfig @@ -30,6 +30,8 @@ CONFIG_BLOBLIST_ADDR=0x100000 CONFIG_BLOBLIST_SIZE=0x1000 CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xff8e0000 CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_HANDOFF=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set diff --git a/configs/chromebook_kevin_defconfig b/configs/chromebook_kevin_defconfig index 7f773fcf90c..669d6f570b9 100644 --- a/configs/chromebook_kevin_defconfig +++ b/configs/chromebook_kevin_defconfig @@ -31,6 +31,8 @@ CONFIG_BLOBLIST_ADDR=0x100000 CONFIG_BLOBLIST_SIZE=0x1000 CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xff8e0000 CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_HANDOFF=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set diff --git a/configs/ci20_mmc_defconfig b/configs/ci20_mmc_defconfig index a1c2fa732c1..983642dac5c 100644 --- a/configs/ci20_mmc_defconfig +++ b/configs/ci20_mmc_defconfig @@ -24,6 +24,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_MAX_SIZE=0x2e00 +CONFIG_SPL_BSS_START_ADDR=0xf4004000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xf4008000 diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig index af7fb37afcc..ff5c21f5c69 100644 --- a/configs/cl-som-imx7_defconfig +++ b/configs/cl-som-imx7_defconfig @@ -26,6 +26,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="echo SD boot attempt ...; run sdbootscript; run sdboot; echo eMMC boot attempt ...; run emmcbootscript; run emmcboot; echo USB boot attempt ...; run usbbootscript; " CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0xe000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80 diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig index bbb475e9790..bec36beb855 100644 --- a/configs/clearfog_defconfig +++ b/configs/clearfog_defconfig @@ -27,6 +27,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x22fd0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40023000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig index 9b538096080..2fc7ba475a3 100644 --- a/configs/controlcenterdc_defconfig +++ b/configs/controlcenterdc_defconfig @@ -35,6 +35,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_LATE_INIT=y CONFIG_LAST_STAGE_INIT=y CONFIG_SPL_MAX_SIZE=0x27fd0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40028000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig index e7db00a2122..859c9a31040 100644 --- a/configs/corvus_defconfig +++ b/configs/corvus_defconfig @@ -34,6 +34,8 @@ CONFIG_BOOTCOMMAND="nand read 0x70000000 0x200000 0x300000;bootm 0x70000000" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x3000 CONFIG_SPL_PAD_TO=0x20000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x3000 CONFIG_SPL_BSS_MAX_SIZE=0x800 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index a4bc7e41265..d150a00510b 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -36,6 +36,8 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_CLOCKS=y CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xc0000000 CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig index ef180e68643..f46c8809193 100644 --- a/configs/da850evm_nand_defconfig +++ b/configs/da850evm_nand_defconfig @@ -33,6 +33,8 @@ CONFIG_DEFAULT_FDT_FILE="da850-evm.dtb" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xc0000000 CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig index 77e0bbc858a..c08203e030a 100644 --- a/configs/db-88f6720_defconfig +++ b/configs/db-88f6720_defconfig @@ -26,6 +26,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x1ffd0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40020000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig index 5d52c1fcc60..fd2d5ee2ca9 100644 --- a/configs/db-88f6820-amc_defconfig +++ b/configs/db-88f6820-amc_defconfig @@ -27,6 +27,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x22fd0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40023000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig index 04a07e0e812..7d039d664a1 100644 --- a/configs/db-88f6820-gp_defconfig +++ b/configs/db-88f6820-gp_defconfig @@ -26,6 +26,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x22fd0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40023000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig index a1e07254537..4fe0d3ec24e 100644 --- a/configs/db-mv784mp-gp_defconfig +++ b/configs/db-mv784mp-gp_defconfig @@ -26,6 +26,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x1bfd0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40020000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/deneb_defconfig b/configs/deneb_defconfig index 21dfc26c1e0..2cd9adb3c13 100644 --- a/configs/deneb_defconfig +++ b/configs/deneb_defconfig @@ -37,6 +37,8 @@ CONFIG_BOOTCOMMAND="if usrbutton; then run flash_self_test; reset; fi;run flash_ CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x1f000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x128000 CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index 9bc9c0c73da..9ab5423a324 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -13,6 +13,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_BOOTCOMMAND="run autoboot" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_MAX_SIZE=0xec00 +CONFIG_SPL_BSS_START_ADDR=0x80000500 CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_SIMPLE=y diff --git a/configs/draco_defconfig b/configs/draco_defconfig index e5e1ba68550..86c130f4bc7 100644 --- a/configs/draco_defconfig +++ b/configs/draco_defconfig @@ -36,6 +36,7 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_BSS_START_ADDR=0x80000000 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig index b0288f57b0d..7af7bb4e980 100644 --- a/configs/ds414_defconfig +++ b/configs/ds414_defconfig @@ -34,6 +34,8 @@ CONFIG_BOOTCOMMAND="sf probe; sf read ${loadaddr} 0xd0000 0x2d0000; sf read ${ra CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1bfd0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40020000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/edminiv2_defconfig b/configs/edminiv2_defconfig index dd6118bf212..8434b23b47e 100644 --- a/configs/edminiv2_defconfig +++ b/configs/edminiv2_defconfig @@ -23,6 +23,8 @@ CONFIG_BOOTDELAY=3 CONFIG_ARCH_MISC_INIT=y CONFIG_RESET_PHY_R=y CONFIG_SPL_MAX_SIZE=0xfff0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000 CONFIG_SPL_BSS_MAX_SIZE=0x1ffff CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig index 1e7f36eb51c..9da7bfbb399 100644 --- a/configs/etamin_defconfig +++ b/configs/etamin_defconfig @@ -37,6 +37,7 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_BSS_START_ADDR=0x80000000 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig index 7b1138ee63f..c873f7c2883 100644 --- a/configs/evb-px30_defconfig +++ b/configs/evb-px30_defconfig @@ -32,6 +32,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x4000000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig index 753e6edc35d..82620159ab1 100644 --- a/configs/evb-px5_defconfig +++ b/configs/evb-px5_defconfig @@ -36,6 +36,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x20000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig index e871ba1b8e7..eb17b3d5e1f 100644 --- a/configs/evb-rk3308_defconfig +++ b/configs/evb-rk3308_defconfig @@ -26,6 +26,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x400000 diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig index f247f692a0c..373aaecd16f 100644 --- a/configs/evb-rk3328_defconfig +++ b/configs/evb-rk3328_defconfig @@ -29,6 +29,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-evb.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x2000000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index a2f0698525b..e3b7137c8f1 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -18,6 +18,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-evb.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/evb-rk3568_defconfig b/configs/evb-rk3568_defconfig index 6afd5d6d70f..135f48ced04 100644 --- a/configs/evb-rk3568_defconfig +++ b/configs/evb-rk3568_defconfig @@ -28,6 +28,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-evb.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x4000000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/ficus-rk3399_defconfig b/configs/ficus-rk3399_defconfig index 7012c02f28e..b2c530d3380 100644 --- a/configs/ficus-rk3399_defconfig +++ b/configs/ficus-rk3399_defconfig @@ -18,6 +18,8 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xff8e0000 CONFIG_SPL_BSS_MAX_SIZE=0x10000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/firefly-px30_defconfig b/configs/firefly-px30_defconfig index 31374c55d8c..bef490d73a4 100644 --- a/configs/firefly-px30_defconfig +++ b/configs/firefly-px30_defconfig @@ -33,6 +33,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x4000000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig index 2f7cb97aa65..036769c066a 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -19,6 +19,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig index 42d700b6cd5..ea79a2f9384 100644 --- a/configs/gardena-smart-gateway-at91sam_defconfig +++ b/configs/gardena-smart-gateway-at91sam_defconfig @@ -36,6 +36,8 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_MAX_SIZE=0x7000 CONFIG_SPL_PAD_TO=0x40000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/gardena-smart-gateway-mt7688_defconfig b/configs/gardena-smart-gateway-mt7688_defconfig index fd9dd9fbcbe..b9ee281be9f 100644 --- a/configs/gardena-smart-gateway-mt7688_defconfig +++ b/configs/gardena-smart-gateway-mt7688_defconfig @@ -38,6 +38,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_BSS_START_ADDR=0x80010000 CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y diff --git a/configs/giedi_defconfig b/configs/giedi_defconfig index ec6082a92c6..ac8ef890a33 100644 --- a/configs/giedi_defconfig +++ b/configs/giedi_defconfig @@ -37,6 +37,8 @@ CONFIG_BOOTCOMMAND="if usrbutton; then run flash_self_test; reset; fi;run flash_ CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x1f000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x128000 CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig index 9384aa50fb7..2a1db65d1bf 100644 --- a/configs/helios4_defconfig +++ b/configs/helios4_defconfig @@ -27,6 +27,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x22fd0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40023000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/imx7_cm_defconfig b/configs/imx7_cm_defconfig index 351d47fe552..1fc16f5f36e 100644 --- a/configs/imx7_cm_defconfig +++ b/configs/imx7_cm_defconfig @@ -25,6 +25,7 @@ CONFIG_BOOTCOMMAND="run boot${boot-mode}" CONFIG_DEFAULT_FDT_FILE="ask" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_SPL_MAX_SIZE=0xe000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y diff --git a/configs/imx8mm-cl-iot-gate-optee_defconfig b/configs/imx8mm-cl-iot-gate-optee_defconfig index 64d2befc98c..7cd51348baa 100644 --- a/configs/imx8mm-cl-iot-gate-optee_defconfig +++ b/configs/imx8mm-cl-iot-gate-optee_defconfig @@ -24,6 +24,8 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig index 2494d1a79b0..e630bcaf342 100644 --- a/configs/imx8mm-cl-iot-gate_defconfig +++ b/configs/imx8mm-cl-iot-gate_defconfig @@ -26,6 +26,8 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig index 5196f6f0ea2..1ac7766400b 100644 --- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig +++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig @@ -24,6 +24,8 @@ CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-ctouch2.dtb" CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig index cf385a625b3..08151f3f692 100644 --- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig +++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig @@ -24,6 +24,8 @@ CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-edimm2.2.dtb" CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/imx8mm-mx8menlo_defconfig b/configs/imx8mm-mx8menlo_defconfig index f104dada533..fa176e498fe 100644 --- a/configs/imx8mm-mx8menlo_defconfig +++ b/configs/imx8mm-mx8menlo_defconfig @@ -35,6 +35,8 @@ CONFIG_LOG=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig index 3481aff6d55..5ad7f28aa08 100644 --- a/configs/imx8mm_beacon_defconfig +++ b/configs/imx8mm_beacon_defconfig @@ -26,6 +26,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; fi;" CONFIG_DEFAULT_FDT_FILE="imx8mm-beacon-kit.dtb" CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/imx8mm_data_modul_edm_sbc_defconfig b/configs/imx8mm_data_modul_edm_sbc_defconfig index 3e141aef6c3..fbc6cecb91f 100644 --- a/configs/imx8mm_data_modul_edm_sbc_defconfig +++ b/configs/imx8mm_data_modul_edm_sbc_defconfig @@ -42,6 +42,8 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_LEGACY_IMAGE_FORMAT=y diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index 2d73d2454de..e5497ef8047 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -24,6 +24,8 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig index 3f8662ac715..fe6f8d03d4d 100644 --- a/configs/imx8mm_venice_defconfig +++ b/configs/imx8mm_venice_defconfig @@ -32,6 +32,8 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="gsc wd-disable" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x920000 diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig index bb503652362..28ce1d1f6e9 100644 --- a/configs/imx8mn_beacon_2g_defconfig +++ b/configs/imx8mn_beacon_2g_defconfig @@ -33,6 +33,8 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_DEFAULT_FDT_FILE="imx8mn-beacon-kit.dtb" CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x95e000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig index 95e4cc432ad..3495bc0f9a1 100644 --- a/configs/imx8mn_beacon_defconfig +++ b/configs/imx8mn_beacon_defconfig @@ -32,6 +32,8 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_DEFAULT_FDT_FILE="imx8mn-beacon-kit.dtb" CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x95e000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y diff --git a/configs/imx8mn_bsh_smm_s2_defconfig b/configs/imx8mn_bsh_smm_s2_defconfig index 9a4609dd823..bfe89a5379b 100644 --- a/configs/imx8mn_bsh_smm_s2_defconfig +++ b/configs/imx8mn_bsh_smm_s2_defconfig @@ -27,6 +27,8 @@ CONFIG_DEFAULT_FDT_FILE="freescale/imx8mn-bsh-smm-s2.dtb" CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x950000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y diff --git a/configs/imx8mn_bsh_smm_s2pro_defconfig b/configs/imx8mn_bsh_smm_s2pro_defconfig index 66586ba96a2..ab4c04f8059 100644 --- a/configs/imx8mn_bsh_smm_s2pro_defconfig +++ b/configs/imx8mn_bsh_smm_s2pro_defconfig @@ -28,6 +28,8 @@ CONFIG_DEFAULT_FDT_FILE="freescale/imx8mn-bsh-smm-s2pro.dtb" CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x950000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig index 16f217cd5a7..4ac98fefa85 100644 --- a/configs/imx8mn_ddr4_evk_defconfig +++ b/configs/imx8mn_ddr4_evk_defconfig @@ -26,6 +26,8 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mn-ddr4-evk.dtb" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x950000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig index ead7f6d21a8..a17b839e36b 100644 --- a/configs/imx8mn_evk_defconfig +++ b/configs/imx8mn_evk_defconfig @@ -27,6 +27,8 @@ CONFIG_DEFAULT_FDT_FILE="imx8mn-evk.dtb" CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x950000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y diff --git a/configs/imx8mn_var_som_defconfig b/configs/imx8mn_var_som_defconfig index a1f9cee1e19..10ed2527c3a 100644 --- a/configs/imx8mn_var_som_defconfig +++ b/configs/imx8mn_var_som_defconfig @@ -28,6 +28,8 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="freescale/imx8mn-var-som-symphony.dtb" CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x950000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig index f2ddb98a1c0..7479f997aae 100644 --- a/configs/imx8mn_venice_defconfig +++ b/configs/imx8mn_venice_defconfig @@ -33,6 +33,8 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="gsc wd-disable" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x950000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/imx8mp_dhcom_pdk2_defconfig b/configs/imx8mp_dhcom_pdk2_defconfig index cc815ac2fe0..5aca5feda02 100644 --- a/configs/imx8mp_dhcom_pdk2_defconfig +++ b/configs/imx8mp_dhcom_pdk2_defconfig @@ -46,6 +46,8 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x96fc00 CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index 1f4bf537c40..ebd4db2b1c4 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -29,6 +29,8 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mp-evk.dtb" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x98fc00 CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y diff --git a/configs/imx8mp_rsb3720a1_4G_defconfig b/configs/imx8mp_rsb3720a1_4G_defconfig index e8c1bc51191..a8071fdfcf6 100644 --- a/configs/imx8mp_rsb3720a1_4G_defconfig +++ b/configs/imx8mp_rsb3720a1_4G_defconfig @@ -35,6 +35,8 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x98fc00 CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y diff --git a/configs/imx8mp_rsb3720a1_6G_defconfig b/configs/imx8mp_rsb3720a1_6G_defconfig index 323f5fb3356..90800abf923 100644 --- a/configs/imx8mp_rsb3720a1_6G_defconfig +++ b/configs/imx8mp_rsb3720a1_6G_defconfig @@ -35,6 +35,8 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x98fc00 CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y diff --git a/configs/imx8mp_venice_defconfig b/configs/imx8mp_venice_defconfig index 2485ae21ee7..5367ea8489e 100644 --- a/configs/imx8mp_venice_defconfig +++ b/configs/imx8mp_venice_defconfig @@ -33,6 +33,8 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="gsc wd-disable" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x98fc00 CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/imx8mq_cm_defconfig b/configs/imx8mq_cm_defconfig index a67c82ac3c3..4c25e95ab72 100644 --- a/configs/imx8mq_cm_defconfig +++ b/configs/imx8mq_cm_defconfig @@ -28,6 +28,8 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x1f000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x180000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index c605fa59644..6d64f1e5181 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -30,6 +30,8 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x1f000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x180000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/imx8mq_phanbell_defconfig b/configs/imx8mq_phanbell_defconfig index 6ef649b1646..212ff07eee7 100644 --- a/configs/imx8mq_phanbell_defconfig +++ b/configs/imx8mq_phanbell_defconfig @@ -32,6 +32,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x2b000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x180000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig index 5fc2e7a414e..abe074de841 100644 --- a/configs/imx8qm_mek_defconfig +++ b/configs/imx8qm_mek_defconfig @@ -31,6 +31,8 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x1f000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x128000 CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/imx8qm_rom7720_a1_4G_defconfig b/configs/imx8qm_rom7720_a1_4G_defconfig index 62c1f03b7b0..5e32568ef19 100644 --- a/configs/imx8qm_rom7720_a1_4G_defconfig +++ b/configs/imx8qm_rom7720_a1_4G_defconfig @@ -28,6 +28,8 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x1f000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x128000 CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_POWER_DOMAIN=y diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index 8b382156006..eda7739acb4 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -31,6 +31,8 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x1f000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x128000 CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/imx8ulp_evk_defconfig b/configs/imx8ulp_evk_defconfig index 5d3c8395aee..c08197572a5 100644 --- a/configs/imx8ulp_evk_defconfig +++ b/configs/imx8ulp_evk_defconfig @@ -28,6 +28,8 @@ CONFIG_DEFAULT_FDT_FILE="imx8ulp-evk" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x22048000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y diff --git a/configs/iot2050_defconfig b/configs/iot2050_defconfig index 7249b2d6056..10f2cf4f814 100644 --- a/configs/iot2050_defconfig +++ b/configs/iot2050_defconfig @@ -34,6 +34,8 @@ CONFIG_SPL_SHOW_BOOT_PROGRESS=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0x58000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80a00000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig index b5efa405712..af7a30db61f 100644 --- a/configs/j7200_evm_a72_defconfig +++ b/configs/j7200_evm_a72_defconfig @@ -35,6 +35,8 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern" CONFIG_LOGLEVEL=7 CONFIG_SPL_MAX_SIZE=0xc0000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80a00000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig index a830cb912c0..4e82e092d6b 100644 --- a/configs/j7200_evm_r5_defconfig +++ b/configs/j7200_evm_r5_defconfig @@ -31,6 +31,8 @@ CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0xc0000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x41cf5bfc CONFIG_SPL_BSS_MAX_SIZE=0xa000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index 8b703d18957..202ef8825af 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -32,6 +32,8 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run init_${boot}; run main_cpsw0_qsgmii_phyinit; run boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern" CONFIG_LOGLEVEL=7 CONFIG_SPL_MAX_SIZE=0xc0000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80a00000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index 475da6f588f..6df4deac3e4 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -31,6 +31,8 @@ CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0xc0000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x41cf5bfc CONFIG_SPL_BSS_MAX_SIZE=0xa000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y diff --git a/configs/j721e_hs_evm_a72_defconfig b/configs/j721e_hs_evm_a72_defconfig index fd2c9667f69..161c2ecfb3c 100644 --- a/configs/j721e_hs_evm_a72_defconfig +++ b/configs/j721e_hs_evm_a72_defconfig @@ -33,6 +33,8 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run main_cpsw0_qsgmii_phyinit; run boot_rprocs; run get_fit_${boot}; run get_overlaystring; run run_fit" CONFIG_LOGLEVEL=7 CONFIG_SPL_MAX_SIZE=0xc0000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80a00000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/j721e_hs_evm_r5_defconfig b/configs/j721e_hs_evm_r5_defconfig index 5e253b2c858..ea1cc86a3bf 100644 --- a/configs/j721e_hs_evm_r5_defconfig +++ b/configs/j721e_hs_evm_r5_defconfig @@ -32,6 +32,8 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0xc0000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x41cf5bfc CONFIG_SPL_BSS_MAX_SIZE=0xa000 CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig index 0628e2994bd..7903addb3d1 100644 --- a/configs/j721s2_evm_a72_defconfig +++ b/configs/j721s2_evm_a72_defconfig @@ -35,6 +35,8 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run main_cpsw0_qsgmii_phyinit; run boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern" CONFIG_LOGLEVEL=7 CONFIG_SPL_MAX_SIZE=0xc0000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80a00000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig index c706ff31997..1a548e7cda9 100644 --- a/configs/j721s2_evm_r5_defconfig +++ b/configs/j721s2_evm_r5_defconfig @@ -35,6 +35,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0xc0000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x41c76000 CONFIG_SPL_BSS_MAX_SIZE=0xa000 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y CONFIG_SPL_BOARD_INIT=y diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index ed6e96dac69..e26bf3a2b47 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -30,6 +30,8 @@ CONFIG_BOOTCOMMAND="run init_${boot}; run get_mon_${boot} run_mon; run get_kern_ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0xfff8 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xc10fff8 CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xc1223f4 diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index 1ec8dd042e2..e3f023690ea 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -29,6 +29,8 @@ CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run get_mon_${bo CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0xfff8 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xc0afff8 CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xc0c23f4 diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index 2238aed03e5..f27873f558c 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -30,6 +30,8 @@ CONFIG_BOOTCOMMAND="run init_${boot}; run get_mon_${boot} run_mon; run get_kern_ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0xfff8 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xc20fff8 CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xc2223f4 diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index d96b8084ee4..b48feb2719d 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -30,6 +30,8 @@ CONFIG_BOOTCOMMAND="run init_${boot}; run get_mon_${boot} run_mon; run get_kern_ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0xfff8 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xc10fff8 CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xc1223f4 diff --git a/configs/khadas-edge-captain-rk3399_defconfig b/configs/khadas-edge-captain-rk3399_defconfig index 085c6b66732..e9618e3e207 100644 --- a/configs/khadas-edge-captain-rk3399_defconfig +++ b/configs/khadas-edge-captain-rk3399_defconfig @@ -18,6 +18,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge-captain.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/khadas-edge-rk3399_defconfig b/configs/khadas-edge-rk3399_defconfig index b66301877e2..252a02b579e 100644 --- a/configs/khadas-edge-rk3399_defconfig +++ b/configs/khadas-edge-rk3399_defconfig @@ -18,6 +18,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/khadas-edge-v-rk3399_defconfig b/configs/khadas-edge-v-rk3399_defconfig index 5438d0a3226..731fbfcab26 100644 --- a/configs/khadas-edge-v-rk3399_defconfig +++ b/configs/khadas-edge-v-rk3399_defconfig @@ -18,6 +18,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge-v.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig index cd96210c6bb..a2584c606f8 100644 --- a/configs/kontron-sl-mx8mm_defconfig +++ b/configs/kontron-sl-mx8mm_defconfig @@ -27,6 +27,8 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOARD_TYPES=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/kontron_pitx_imx8m_defconfig b/configs/kontron_pitx_imx8m_defconfig index 4660e98e5ae..e8f653bf817 100644 --- a/configs/kontron_pitx_imx8m_defconfig +++ b/configs/kontron_pitx_imx8m_defconfig @@ -31,6 +31,8 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1f000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x180000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x187ff0 diff --git a/configs/kontron_sl28_defconfig b/configs/kontron_sl28_defconfig index 345db031489..05627bb7dc7 100644 --- a/configs/kontron_sl28_defconfig +++ b/configs/kontron_sl28_defconfig @@ -38,6 +38,8 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOARD_LATE_INIT=y CONFIG_PCI_INIT_R=y CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/leez-rk3399_defconfig b/configs/leez-rk3399_defconfig index d524e4546c8..1e708ed3f90 100644 --- a/configs/leez-rk3399_defconfig +++ b/configs/leez-rk3399_defconfig @@ -18,6 +18,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-leez-p710.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x400000 diff --git a/configs/linkit-smart-7688_defconfig b/configs/linkit-smart-7688_defconfig index 3c385774c69..a129679e9d4 100644 --- a/configs/linkit-smart-7688_defconfig +++ b/configs/linkit-smart-7688_defconfig @@ -30,6 +30,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_BSS_START_ADDR=0x80010000 CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig index c700115aecc..1b148f5c0f6 100644 --- a/configs/lion-rk3368_defconfig +++ b/configs/lion-rk3368_defconfig @@ -34,6 +34,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x20000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig index 74d5e7ce2f2..4bfc5aae58b 100644 --- a/configs/ls1021aiot_sdcard_defconfig +++ b/configs/ls1021aiot_sdcard_defconfig @@ -33,6 +33,8 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index 57eefa68494..fb3447cc470 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -43,6 +43,8 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index a2b39eb3843..6e686c65e08 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -42,6 +42,8 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index 62100e44747..318f4f5dd63 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -41,6 +41,8 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig index 85ba389ff6b..35a383ce572 100644 --- a/configs/ls1021atsn_sdcard_defconfig +++ b/configs/ls1021atsn_sdcard_defconfig @@ -35,6 +35,8 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index 13d46e47194..d4d2e8b6530 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -42,6 +42,8 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index 6dab204210d..eaafb72bcea 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -43,6 +43,8 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index bdc279b646e..a82098e243b 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -44,6 +44,8 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index ec60f8edfdd..a8d392de098 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -49,6 +49,8 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x20000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index ad8fce93589..b284f62f1e3 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -50,6 +50,8 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x17000 CONFIG_SPL_PAD_TO=0x1d000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x8f000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index 4464284f337..ad0ec877f07 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -50,6 +50,8 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x17000 CONFIG_SPL_PAD_TO=0x1d000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x8f000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index 5c51cd5b8c3..0b96c451a9b 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -33,6 +33,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x20000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index bb0f3e6cb50..c19ae3bc811 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -38,6 +38,8 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x20000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index 2042b44fe4e..e18ab7aadcb 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -34,6 +34,8 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd; run sd_bootcmd; env exists secureboot && CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x17000 CONFIG_SPL_PAD_TO=0x1d000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x8f000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index f51d76c6757..3f1868e92fb 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -39,6 +39,8 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x17000 CONFIG_SPL_PAD_TO=0x1d000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x8f000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig index 322a352669f..39f52c37872 100644 --- a/configs/ls1046aqds_nand_defconfig +++ b/configs/ls1046aqds_nand_defconfig @@ -49,6 +49,8 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x17000 CONFIG_SPL_PAD_TO=0x40000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x8f000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index 4f4cdf1d05c..a9fb89fb918 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -50,6 +50,8 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_PAD_TO=0x21000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x8f000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index 89d52aa33cc..37a11070848 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -50,6 +50,8 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_PAD_TO=0x21000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x8f000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig index 11725e5aa0c..7b42e8d9ddb 100644 --- a/configs/ls1046ardb_emmc_defconfig +++ b/configs/ls1046ardb_emmc_defconfig @@ -40,6 +40,8 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_PAD_TO=0x21000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x8f000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig index ae7d0b32694..ac8cd7c2de7 100644 --- a/configs/ls1046ardb_qspi_spl_defconfig +++ b/configs/ls1046ardb_qspi_spl_defconfig @@ -44,6 +44,8 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_PAD_TO=0x20000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x8f000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig index ea8588c86ae..0679d94dc75 100644 --- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -38,6 +38,8 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd;run sd_bootcmd; env exists secureboot && CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_PAD_TO=0x21000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x8f000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig index ed87dbaffd9..17378cbddff 100644 --- a/configs/ls1046ardb_sdcard_defconfig +++ b/configs/ls1046ardb_sdcard_defconfig @@ -40,6 +40,8 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1f000 CONFIG_SPL_PAD_TO=0x21000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x8f000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig index 8b03ff8062b..0cc3d429a37 100644 --- a/configs/ls1088aqds_sdcard_ifc_defconfig +++ b/configs/ls1088aqds_sdcard_ifc_defconfig @@ -42,6 +42,8 @@ CONFIG_BOOTCOMMAND="mmcinfo;mmc read 0x80001000 0x6800 0x800; fsl_mc lazyapply d CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_RESET_PHY_R=y CONFIG_SPL_MAX_SIZE=0x16000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x18009ff0 diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig index 5cd2ca27087..89911ae3557 100644 --- a/configs/ls1088aqds_sdcard_qspi_defconfig +++ b/configs/ls1088aqds_sdcard_qspi_defconfig @@ -43,6 +43,8 @@ CONFIG_BOOTCOMMAND="mmcinfo;mmc read 0x80001000 0x6800 0x800; fsl_mc lazyapply d CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_RESET_PHY_R=y CONFIG_SPL_MAX_SIZE=0x16000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x18009ff0 diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig index e7500e14eaf..0fec4f384ae 100644 --- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig @@ -43,6 +43,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_SPL_MAX_SIZE=0x16000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x18009ff0 diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig index db65a7c0568..a3702899aac 100644 --- a/configs/ls1088ardb_sdcard_qspi_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_defconfig @@ -44,6 +44,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_SPL_MAX_SIZE=0x16000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x18009ff0 diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index 08f9536d22a..65558911f15 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -35,6 +35,8 @@ CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_l CONFIG_RESET_PHY_R=y CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SPL_PAD_TO=0x20000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x18009ff0 diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig index f8978da43ca..590eba601d7 100644 --- a/configs/ls2080aqds_sdcard_defconfig +++ b/configs/ls2080aqds_sdcard_defconfig @@ -35,6 +35,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="mmc read 0x80200000 0x6800 0x800; fsl_mc apply dpl 0x80200000 && mmc read $kernel_load $kernel_start $kernel_size && bootm $kernel_load" CONFIG_RESET_PHY_R=y CONFIG_SPL_MAX_SIZE=0x16000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x18009ff0 diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index 7304c4d0246..17fe433a54a 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -41,6 +41,8 @@ CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SPL_PAD_TO=0x80000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x18009ff0 diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig index 457e56919d0..35005fcc354 100644 --- a/configs/maxbcm_defconfig +++ b/configs/maxbcm_defconfig @@ -25,6 +25,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x1bfd0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40020000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/mt7620_mt7530_rfb_defconfig b/configs/mt7620_mt7530_rfb_defconfig index 2d45c3db1fe..9e409b60b27 100644 --- a/configs/mt7620_mt7530_rfb_defconfig +++ b/configs/mt7620_mt7530_rfb_defconfig @@ -25,6 +25,7 @@ CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_BSS_START_ADDR=0x80010000 CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y diff --git a/configs/mt7620_rfb_defconfig b/configs/mt7620_rfb_defconfig index 137d88b35a1..f3f5e3a8871 100644 --- a/configs/mt7620_rfb_defconfig +++ b/configs/mt7620_rfb_defconfig @@ -24,6 +24,7 @@ CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_BSS_START_ADDR=0x80010000 CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y diff --git a/configs/mt7628_rfb_defconfig b/configs/mt7628_rfb_defconfig index 46848736648..7690213ab80 100644 --- a/configs/mt7628_rfb_defconfig +++ b/configs/mt7628_rfb_defconfig @@ -24,6 +24,7 @@ CONFIG_FIT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_BSS_START_ADDR=0x80010000 CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y diff --git a/configs/nanopc-t4-rk3399_defconfig b/configs/nanopc-t4-rk3399_defconfig index 6c023fbe405..15ab46e5e12 100644 --- a/configs/nanopc-t4-rk3399_defconfig +++ b/configs/nanopc-t4-rk3399_defconfig @@ -18,6 +18,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopc-t4.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/nanopi-m4-2gb-rk3399_defconfig b/configs/nanopi-m4-2gb-rk3399_defconfig index 390cfbb60f1..93dafb86422 100644 --- a/configs/nanopi-m4-2gb-rk3399_defconfig +++ b/configs/nanopi-m4-2gb-rk3399_defconfig @@ -18,6 +18,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4-2gb.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/nanopi-m4-rk3399_defconfig b/configs/nanopi-m4-rk3399_defconfig index 37d91e53912..b5d9f4184d6 100644 --- a/configs/nanopi-m4-rk3399_defconfig +++ b/configs/nanopi-m4-rk3399_defconfig @@ -18,6 +18,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/nanopi-m4b-rk3399_defconfig b/configs/nanopi-m4b-rk3399_defconfig index 7bf1ca299d5..c4b51adb6e1 100644 --- a/configs/nanopi-m4b-rk3399_defconfig +++ b/configs/nanopi-m4b-rk3399_defconfig @@ -18,6 +18,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4b.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/nanopi-neo4-rk3399_defconfig b/configs/nanopi-neo4-rk3399_defconfig index 69174b95122..2bc066887fa 100644 --- a/configs/nanopi-neo4-rk3399_defconfig +++ b/configs/nanopi-neo4-rk3399_defconfig @@ -18,6 +18,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-neo4.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/nanopi-r2s-rk3328_defconfig b/configs/nanopi-r2s-rk3328_defconfig index b1e2a6d3bfe..99a99e1292b 100644 --- a/configs/nanopi-r2s-rk3328_defconfig +++ b/configs/nanopi-r2s-rk3328_defconfig @@ -30,6 +30,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x2000000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/nanopi-r4s-rk3399_defconfig b/configs/nanopi-r4s-rk3399_defconfig index ca10940e79b..917fd3fd8eb 100644 --- a/configs/nanopi-r4s-rk3399_defconfig +++ b/configs/nanopi-r4s-rk3399_defconfig @@ -18,6 +18,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-r4s.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/odroid-go2_defconfig b/configs/odroid-go2_defconfig index 6925c26bc10..dbd354f1f26 100644 --- a/configs/odroid-go2_defconfig +++ b/configs/odroid-go2_defconfig @@ -36,6 +36,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x4000000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index 5669c355e93..65ece99ea46 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -34,6 +34,8 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_CLOCKS=y CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xc0000000 CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/openpiton_riscv64_spl_defconfig b/configs/openpiton_riscv64_spl_defconfig index e041de4b2b1..54c59a3a35e 100644 --- a/configs/openpiton_riscv64_spl_defconfig +++ b/configs/openpiton_riscv64_spl_defconfig @@ -23,6 +23,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x82000000 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fdt addr ${fdtcontroladdr}; fdt move ${fdtcontroladdr} ${fdt_addr_r}; load mmc ${mmcdev}:${mmcpart} ${kernel_addr_r} ${image}; booti ${kernel_addr_r} - ${fdt_addr_r}; " CONFIG_SPL_MAX_SIZE=0x100000 +CONFIG_SPL_BSS_START_ADDR=0x82000000 # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/orangepi-rk3399_defconfig b/configs/orangepi-rk3399_defconfig index 790936dff34..e9626fb09a6 100644 --- a/configs/orangepi-rk3399_defconfig +++ b/configs/orangepi-rk3399_defconfig @@ -18,6 +18,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-orangepi.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig index 8450d2fc31e..8192cc233e9 100644 --- a/configs/phycore-imx8mm_defconfig +++ b/configs/phycore-imx8mm_defconfig @@ -27,6 +27,8 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadimage; the CONFIG_DEFAULT_FDT_FILE="oftree" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig index 8d783d30cc3..42172f31de6 100644 --- a/configs/phycore-imx8mp_defconfig +++ b/configs/phycore-imx8mp_defconfig @@ -28,6 +28,8 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadimage; the CONFIG_DEFAULT_FDT_FILE="oftree" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x98fc00 CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y diff --git a/configs/pico-dwarf-imx7d_defconfig b/configs/pico-dwarf-imx7d_defconfig index 00067d2e46d..187a269302a 100644 --- a/configs/pico-dwarf-imx7d_defconfig +++ b/configs/pico-dwarf-imx7d_defconfig @@ -26,6 +26,7 @@ CONFIG_BOARD_SIZE_LIMIT=715776 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx7d-pico-dwarf.dtb" CONFIG_SPL_MAX_SIZE=0xe000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig index 64c2ca4b189..38eb71523b3 100644 --- a/configs/pico-hobbit-imx7d_defconfig +++ b/configs/pico-hobbit-imx7d_defconfig @@ -26,6 +26,7 @@ CONFIG_BOARD_SIZE_LIMIT=715776 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx7d-pico-hobbit.dtb" CONFIG_SPL_MAX_SIZE=0xe000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y diff --git a/configs/pico-imx7d_bl33_defconfig b/configs/pico-imx7d_bl33_defconfig index d13336d0548..7f1d215e490 100644 --- a/configs/pico-imx7d_bl33_defconfig +++ b/configs/pico-imx7d_bl33_defconfig @@ -27,6 +27,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_SPL_MAX_SIZE=0xe000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig index a6ee5cebfe2..d79d3ea2ed1 100644 --- a/configs/pico-imx7d_defconfig +++ b/configs/pico-imx7d_defconfig @@ -26,6 +26,7 @@ CONFIG_BOARD_SIZE_LIMIT=715776 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="ask" CONFIG_SPL_MAX_SIZE=0xe000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y diff --git a/configs/pico-imx8mq_defconfig b/configs/pico-imx8mq_defconfig index 1a8f2015b8a..5b4f591ec4c 100644 --- a/configs/pico-imx8mq_defconfig +++ b/configs/pico-imx8mq_defconfig @@ -31,6 +31,8 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x1f000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x180000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/pico-nymph-imx7d_defconfig b/configs/pico-nymph-imx7d_defconfig index 00067d2e46d..187a269302a 100644 --- a/configs/pico-nymph-imx7d_defconfig +++ b/configs/pico-nymph-imx7d_defconfig @@ -26,6 +26,7 @@ CONFIG_BOARD_SIZE_LIMIT=715776 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx7d-pico-dwarf.dtb" CONFIG_SPL_MAX_SIZE=0xe000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig index b74b2582cb9..daf91029f3b 100644 --- a/configs/pico-pi-imx7d_defconfig +++ b/configs/pico-pi-imx7d_defconfig @@ -26,6 +26,7 @@ CONFIG_BOARD_SIZE_LIMIT=715776 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx7d-pico-pi.dtb" CONFIG_SPL_MAX_SIZE=0xe000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig index c831830656c..121182c55d7 100644 --- a/configs/pinebook-pro-rk3399_defconfig +++ b/configs/pinebook-pro-rk3399_defconfig @@ -23,6 +23,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index e859172c5cd..f902f144f28 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -24,6 +24,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xff8e0000 CONFIG_SPL_BSS_MAX_SIZE=0x10000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/px30-core-ctouch2-of10-px30_defconfig b/configs/px30-core-ctouch2-of10-px30_defconfig index d0bada7bae7..784f3c076d0 100644 --- a/configs/px30-core-ctouch2-of10-px30_defconfig +++ b/configs/px30-core-ctouch2-of10-px30_defconfig @@ -33,6 +33,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x4000000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set diff --git a/configs/px30-core-ctouch2-px30_defconfig b/configs/px30-core-ctouch2-px30_defconfig index 8e4de8e8b78..a98a1f6ec88 100644 --- a/configs/px30-core-ctouch2-px30_defconfig +++ b/configs/px30-core-ctouch2-px30_defconfig @@ -33,6 +33,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x4000000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set diff --git a/configs/px30-core-edimm2.2-px30_defconfig b/configs/px30-core-edimm2.2-px30_defconfig index 3a4dbb60ebf..f10732230af 100644 --- a/configs/px30-core-edimm2.2-px30_defconfig +++ b/configs/px30-core-edimm2.2-px30_defconfig @@ -33,6 +33,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x4000000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig index 52e7dc8da53..a36192a978b 100644 --- a/configs/pxm2_defconfig +++ b/configs/pxm2_defconfig @@ -36,6 +36,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_BSS_START_ADDR=0x80000000 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig index 73e5883e630..c836cc0c2aa 100644 --- a/configs/qemu-riscv32_spl_defconfig +++ b/configs/qemu-riscv32_spl_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_SPL_MAX_SIZE=0x100000 +CONFIG_SPL_BSS_START_ADDR=0x84000000 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_CMD_MII is not set diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig index 66d1e56c5cb..ce66a8e8df5 100644 --- a/configs/qemu-riscv64_spl_defconfig +++ b/configs/qemu-riscv64_spl_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_SPL_MAX_SIZE=0x100000 +CONFIG_SPL_BSS_START_ADDR=0x84000000 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_CMD_MII is not set diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig index dfb4adf6654..9ca3ddf27b7 100644 --- a/configs/r8a77970_eagle_defconfig +++ b/configs/r8a77970_eagle_defconfig @@ -22,6 +22,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77970-eagle.dtb; booti 0x48080000 - 0x48000000" CONFIG_DEFAULT_FDT_FILE="r8a77970-eagle.dtb" CONFIG_SYS_MALLOC_BOOTPARAMS=y +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xe631f000 CONFIG_SPL_BSS_MAX_SIZE=0x1000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xe6304000 diff --git a/configs/r8a77980_condor_defconfig b/configs/r8a77980_condor_defconfig index d24204d4138..ef59b9c7785 100644 --- a/configs/r8a77980_condor_defconfig +++ b/configs/r8a77980_condor_defconfig @@ -23,6 +23,8 @@ CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77980-condor CONFIG_DEFAULT_FDT_FILE="r8a77980-condor.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_SYS_MALLOC_BOOTPARAMS=y +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xe631f000 CONFIG_SPL_BSS_MAX_SIZE=0x1000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xe6304000 diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig index 33c27747219..e667d23d7ee 100644 --- a/configs/r8a77990_ebisu_defconfig +++ b/configs/r8a77990_ebisu_defconfig @@ -24,6 +24,8 @@ CONFIG_DEFAULT_FDT_FILE="r8a77990-ebisu.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_UPDATE_TFTP=y +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xe631f000 CONFIG_SPL_BSS_MAX_SIZE=0x1000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xe6304000 diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig index f1fd84a4bd2..afccf86461d 100644 --- a/configs/r8a77995_draak_defconfig +++ b/configs/r8a77995_draak_defconfig @@ -23,6 +23,8 @@ CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77995-draak. CONFIG_DEFAULT_FDT_FILE="r8a77995-draak.dtb" CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_UPDATE_TFTP=y +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xe631f000 CONFIG_SPL_BSS_MAX_SIZE=0x1000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xe6304000 diff --git a/configs/r8a779a0_falcon_defconfig b/configs/r8a779a0_falcon_defconfig index 8477127e12b..72c31ac3a19 100644 --- a/configs/r8a779a0_falcon_defconfig +++ b/configs/r8a779a0_falcon_defconfig @@ -25,6 +25,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a779a0-falcon.dtb; booti 0x48080000 - 0x48000000" CONFIG_DEFAULT_FDT_FILE="r8a779a0-falcon.dtb" CONFIG_SYS_MALLOC_BOOTPARAMS=y +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xe631f000 CONFIG_SPL_BSS_MAX_SIZE=0x1000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xe6304000 diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig index c7cf3847020..269416f2aa4 100644 --- a/configs/rastaban_defconfig +++ b/configs/rastaban_defconfig @@ -36,6 +36,7 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_BSS_START_ADDR=0x80000000 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/rcar3_salvator-x_defconfig b/configs/rcar3_salvator-x_defconfig index ce22f8b9ecc..d423ad7b826 100644 --- a/configs/rcar3_salvator-x_defconfig +++ b/configs/rcar3_salvator-x_defconfig @@ -23,6 +23,8 @@ CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77950-salvat CONFIG_DEFAULT_FDT_FILE="r8a77950-salvator-x.dtb" CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_UPDATE_TFTP=y +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xe633f000 CONFIG_SPL_BSS_MAX_SIZE=0x1000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xe6304000 diff --git a/configs/rcar3_ulcb_defconfig b/configs/rcar3_ulcb_defconfig index 2b7c2eace4c..341abe4f6dd 100644 --- a/configs/rcar3_ulcb_defconfig +++ b/configs/rcar3_ulcb_defconfig @@ -23,6 +23,8 @@ CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77950-ulcb.d CONFIG_DEFAULT_FDT_FILE="r8a77950-ulcb.dtb" CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_UPDATE_TFTP=y +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xe633f000 CONFIG_SPL_BSS_MAX_SIZE=0x1000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xe6304000 diff --git a/configs/roc-cc-rk3308_defconfig b/configs/roc-cc-rk3308_defconfig index a35326f9ec8..325b7cb182b 100644 --- a/configs/roc-cc-rk3308_defconfig +++ b/configs/roc-cc-rk3308_defconfig @@ -26,6 +26,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x400000 diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig index 1b4fc3381cc..866cdbc24df 100644 --- a/configs/roc-cc-rk3328_defconfig +++ b/configs/roc-cc-rk3328_defconfig @@ -30,6 +30,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x2000000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig index 1748b7d8702..f537a605e1a 100644 --- a/configs/roc-pc-mezzanine-rk3399_defconfig +++ b/configs/roc-pc-mezzanine-rk3399_defconfig @@ -24,6 +24,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-mezzanine.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index 7b086a1cc1d..a502e549fb3 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -24,6 +24,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig index d9d5f5e5efc..cf2e9fbde38 100644 --- a/configs/rock-pi-4-rk3399_defconfig +++ b/configs/rock-pi-4-rk3399_defconfig @@ -20,6 +20,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/rock-pi-4c-rk3399_defconfig b/configs/rock-pi-4c-rk3399_defconfig index 220b2af0088..fd5b25d77b4 100644 --- a/configs/rock-pi-4c-rk3399_defconfig +++ b/configs/rock-pi-4c-rk3399_defconfig @@ -20,6 +20,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig index e231593bd56..4c70e62b88e 100644 --- a/configs/rock-pi-e-rk3328_defconfig +++ b/configs/rock-pi-e-rk3328_defconfig @@ -31,6 +31,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x2000000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/rock-pi-n10-rk3399pro_defconfig b/configs/rock-pi-n10-rk3399pro_defconfig index e283476bb9a..e63a77a2537 100644 --- a/configs/rock-pi-n10-rk3399pro_defconfig +++ b/configs/rock-pi-n10-rk3399pro_defconfig @@ -22,6 +22,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig index aa4cdde4872..893f0384afb 100644 --- a/configs/rock64-rk3328_defconfig +++ b/configs/rock64-rk3328_defconfig @@ -30,6 +30,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x2000000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig index 5e9f2cff33f..78e50dbfbcb 100644 --- a/configs/rock960-rk3399_defconfig +++ b/configs/rock960-rk3399_defconfig @@ -19,6 +19,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig index fff00fba6d9..4d2a5b32e31 100644 --- a/configs/rockpro64-rk3399_defconfig +++ b/configs/rockpro64-rk3399_defconfig @@ -23,6 +23,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/rut_defconfig b/configs/rut_defconfig index 576be6c6fe4..8ef538661c1 100644 --- a/configs/rut_defconfig +++ b/configs/rut_defconfig @@ -36,6 +36,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_BSS_START_ADDR=0x80000000 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/sama5d27_giantboard_defconfig b/configs/sama5d27_giantboard_defconfig index 50f5cacbdde..d7813a533cc 100644 --- a/configs/sama5d27_giantboard_defconfig +++ b/configs/sama5d27_giantboard_defconfig @@ -39,6 +39,8 @@ CONFIG_BOOTCOMMAND="fatload mmc 0 0x22000000 at91-sama5d27_giantboard.dtb; fatlo # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig index 76af9fc8cb1..ebebc7f3210 100644 --- a/configs/sama5d27_som1_ek_mmc1_defconfig +++ b/configs/sama5d27_som1_ek_mmc1_defconfig @@ -35,6 +35,8 @@ CONFIG_BOOTCOMMAND="fatload mmc 1 0x22000000 at91-sama5d27_som1_ek.dtb; fatload # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig index 3852754ceb3..13cf4e50749 100644 --- a/configs/sama5d27_som1_ek_mmc_defconfig +++ b/configs/sama5d27_som1_ek_mmc_defconfig @@ -36,6 +36,8 @@ CONFIG_BOOTCOMMAND="fatload mmc 0 0x22000000 at91-sama5d27_som1_ek.dtb; fatload # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig index 35eefb780b5..e869f67440d 100644 --- a/configs/sama5d27_som1_ek_qspiflash_defconfig +++ b/configs/sama5d27_som1_ek_qspiflash_defconfig @@ -34,6 +34,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwai # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig index 6ea16c67994..df88f6b78d3 100644 --- a/configs/sama5d27_wlsom1_ek_mmc_defconfig +++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig @@ -35,6 +35,8 @@ CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig index 394a7ab64fb..60ed74a0300 100644 --- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig +++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig @@ -35,6 +35,8 @@ CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x220 CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig index 3772626e4b9..119f15a5d20 100644 --- a/configs/sama5d2_icp_mmc_defconfig +++ b/configs/sama5d2_icp_mmc_defconfig @@ -34,6 +34,8 @@ CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x21000000 at91-sama5d2_icp.dtb; fatload mmc # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig index f80fca265ee..1d078cb21e5 100644 --- a/configs/sama5d2_xplained_emmc_defconfig +++ b/configs/sama5d2_xplained_emmc_defconfig @@ -34,6 +34,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x22000000 at91-sama5d2_xplained.dtb; fatload mmc 0:1 0x23000000 zImage; bootz 0x23000000 - 0x22000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index f4a7f2c6a8d..0df30048900 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -36,6 +36,8 @@ CONFIG_BOOTCOMMAND="fatload mmc 1:1 0x22000000 at91-sama5d2_xplained.dtb; fatloa # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig index bd13e926611..9bb838ca893 100644 --- a/configs/sama5d2_xplained_qspiflash_defconfig +++ b/configs/sama5d2_xplained_qspiflash_defconfig @@ -37,6 +37,8 @@ CONFIG_BOOTCOMMAND="sf probe 1:0; sf read 0x22000000 0x180000 0x80000; sf read 0 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index 32e2ea213dc..323846c1bba 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -38,6 +38,8 @@ CONFIG_BOOTCOMMAND="ext4load mmc 0:1 0x22000000 /boot/at91-sama5d2_xplained.dtb; # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index 3ed976053a3..cd1e66d2557 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -35,6 +35,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_name}.dtb; fi; fatload mmc 0:1 0x21000000 ${dtb_name}; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x318000 diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index 6e9ba1b490d..7541f4fa21e 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -32,6 +32,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0x200000 0x600000;bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x318000 diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index 4c7a7949682..e4cc446fe08 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -37,6 +37,8 @@ CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x318000 diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index 6d6a12c6179..c4f3badcf84 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -34,6 +34,8 @@ CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0 CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x318000 diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index ab681fdda9d..2754920e33c 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -37,6 +37,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x22000000 0x6c000 0x394000; bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x318000 diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index d43e86a31fe..2227abc837b 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -36,6 +36,8 @@ CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_ # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x18000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index 10cfb06f433..9304ef173b4 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -33,6 +33,8 @@ CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x18000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index b41c6c7d06e..b69b32ed384 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -38,6 +38,8 @@ CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x220 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x18000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig index 3d5eb689484..e0779d07fcb 100644 --- a/configs/sama5d4ek_mmc_defconfig +++ b/configs/sama5d4ek_mmc_defconfig @@ -37,6 +37,8 @@ CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig index 8e5295aafe1..386e30ba850 100644 --- a/configs/sama5d4ek_nandflash_defconfig +++ b/configs/sama5d4ek_nandflash_defconfig @@ -34,6 +34,8 @@ CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0 CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig index 13708da1654..b0d76d2bc83 100644 --- a/configs/sama5d4ek_spiflash_defconfig +++ b/configs/sama5d4ek_spiflash_defconfig @@ -37,6 +37,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x22000000 0x6c000 0x394000; bootz 0x22000000 - 0x21000000" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 diff --git a/configs/sifive_unleashed_defconfig b/configs/sifive_unleashed_defconfig index 326bca72bb5..10c69345a41 100644 --- a/configs/sifive_unleashed_defconfig +++ b/configs/sifive_unleashed_defconfig @@ -25,6 +25,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x100000 +CONFIG_SPL_BSS_START_ADDR=0x85000000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x81cfe70 CONFIG_SPL_DM_SPI_FLASH=y diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig index 989029b586e..23f8a4fb807 100644 --- a/configs/sifive_unmatched_defconfig +++ b/configs/sifive_unmatched_defconfig @@ -29,6 +29,7 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x100000 +CONFIG_SPL_BSS_START_ADDR=0x85000000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x81cfe60 CONFIG_SPL_DM_SPI_FLASH=y diff --git a/configs/silinux_ek874_defconfig b/configs/silinux_ek874_defconfig index ce211a9a1aa..24fcfae4ef2 100644 --- a/configs/silinux_ek874_defconfig +++ b/configs/silinux_ek874_defconfig @@ -24,6 +24,8 @@ CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a774c0-ek874. CONFIG_DEFAULT_FDT_FILE="r8a774c0-ek874.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_SYS_MALLOC_BOOTPARAMS=y +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xe631f000 CONFIG_SPL_BSS_MAX_SIZE=0x1000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xe6304000 diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig index 95048f8c4b1..990bd9d3441 100644 --- a/configs/smartweb_defconfig +++ b/configs/smartweb_defconfig @@ -34,6 +34,8 @@ CONFIG_BOOTCOMMAND="run flashboot" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x1000 CONFIG_SPL_PAD_TO=0x20000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x301000 diff --git a/configs/sniper_defconfig b/configs/sniper_defconfig index 2f77a39c322..7de3081a2d9 100644 --- a/configs/sniper_defconfig +++ b/configs/sniper_defconfig @@ -14,6 +14,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_BOOTCOMMAND="setenv boot_mmc_part ${kernel_mmc_part}; if test reboot-${reboot-mode} = reboot-r; then echo recovery; setenv boot_mmc_part ${recovery_mmc_part}; fi; if test reboot-${reboot-mode} = reboot-b; then echo fastboot; fastboot 0; fi; part start mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_start; part size mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_size; mmc dev ${boot_mmc_dev}; mmc read ${kernel_addr_r} ${boot_mmc_start} ${boot_mmc_size} && bootm ${kernel_addr_r};" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SPL_MAX_SIZE=0xec00 +CONFIG_SPL_BSS_START_ADDR=0x80000000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x4020fffc # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set diff --git a/configs/socfpga_agilex_atf_defconfig b/configs/socfpga_agilex_atf_defconfig index 869305fefbe..5fdacb34d17 100644 --- a/configs/socfpga_agilex_atf_defconfig +++ b/configs/socfpga_agilex_atf_defconfig @@ -28,6 +28,8 @@ CONFIG_BOOTARGS="earlycon" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x3ff00000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xffe3f000 diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig index 11a4a544ac4..0953ea10af9 100644 --- a/configs/socfpga_agilex_defconfig +++ b/configs/socfpga_agilex_defconfig @@ -25,6 +25,8 @@ CONFIG_BOOTARGS="earlycon" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot" CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x3ff00000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xffe3f000 diff --git a/configs/socfpga_agilex_vab_defconfig b/configs/socfpga_agilex_vab_defconfig index 85ec9094a53..c0384c24e5e 100644 --- a/configs/socfpga_agilex_vab_defconfig +++ b/configs/socfpga_agilex_vab_defconfig @@ -29,6 +29,8 @@ CONFIG_BOOTARGS="earlycon" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x3ff00000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xffe3f000 diff --git a/configs/socfpga_n5x_atf_defconfig b/configs/socfpga_n5x_atf_defconfig index 88763d1e5ab..0fac9fbe840 100644 --- a/configs/socfpga_n5x_atf_defconfig +++ b/configs/socfpga_n5x_atf_defconfig @@ -27,6 +27,8 @@ CONFIG_BOOTARGS="earlycon panic=-1 earlyprintk=ttyS0,115200" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x3ff00000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xffe3f000 diff --git a/configs/socfpga_n5x_defconfig b/configs/socfpga_n5x_defconfig index a07a338f108..0904e6a6a38 100644 --- a/configs/socfpga_n5x_defconfig +++ b/configs/socfpga_n5x_defconfig @@ -22,6 +22,8 @@ CONFIG_BOOTARGS="earlycon panic=-1 earlyprintk=ttyS0,115200" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot" CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x3ff00000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xffe3f000 diff --git a/configs/socfpga_n5x_vab_defconfig b/configs/socfpga_n5x_vab_defconfig index 8efdab84e14..69811fb7223 100644 --- a/configs/socfpga_n5x_vab_defconfig +++ b/configs/socfpga_n5x_vab_defconfig @@ -28,6 +28,8 @@ CONFIG_BOOTARGS="earlycon panic=-1 earlyprintk=ttyS0,115200" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x3ff00000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xffe3f000 diff --git a/configs/socfpga_stratix10_atf_defconfig b/configs/socfpga_stratix10_atf_defconfig index 9969ac00be3..2ffc7ac7658 100644 --- a/configs/socfpga_stratix10_atf_defconfig +++ b/configs/socfpga_stratix10_atf_defconfig @@ -28,6 +28,8 @@ CONFIG_BOOTARGS="earlycon" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x3ff00000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xffe3f000 diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index a90e404b440..38d87076baa 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -27,6 +27,8 @@ CONFIG_BOOTARGS="earlycon" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot" CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x3ff00000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xffe3f000 diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig index d9e61aee3df..9bebe7046ec 100644 --- a/configs/syzygy_hub_defconfig +++ b/configs/syzygy_hub_defconfig @@ -26,6 +26,8 @@ CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_USE_PREBOOT=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffe00 diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig index 471feed3dfb..da241f1be71 100644 --- a/configs/taurus_defconfig +++ b/configs/taurus_defconfig @@ -41,6 +41,8 @@ CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x3e00 CONFIG_SPL_PAD_TO=0x20000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x3e00 CONFIG_SPL_BSS_MAX_SIZE=0x600 # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index f858d732abd..a3d6313f020 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -30,6 +30,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x1bfd0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40020000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig index ed0ee817717..2f0a1c666a9 100644 --- a/configs/thuban_defconfig +++ b/configs/thuban_defconfig @@ -36,6 +36,7 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_BSS_START_ADDR=0x80000000 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig index 11d6e450276..fba9f646122 100644 --- a/configs/topic_miami_defconfig +++ b/configs/topic_miami_defconfig @@ -26,6 +26,8 @@ CONFIG_BOOTCOMMAND="if mmcinfo; then if fatload mmc 0 0x1900000 ${bootscript}; t CONFIG_USE_PREBOOT=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffe00 diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig index 32dc5478ddd..a809bf3c4f9 100644 --- a/configs/topic_miamilite_defconfig +++ b/configs/topic_miamilite_defconfig @@ -26,6 +26,8 @@ CONFIG_BOOTCOMMAND="if mmcinfo; then if fatload mmc 0 0x1900000 ${bootscript}; t CONFIG_USE_PREBOOT=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffe00 diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig index 2de1e96bdf8..42aef8c073e 100644 --- a/configs/topic_miamiplus_defconfig +++ b/configs/topic_miamiplus_defconfig @@ -26,6 +26,8 @@ CONFIG_BOOTCOMMAND="if mmcinfo; then if fatload mmc 0 0x1900000 ${bootscript}; t CONFIG_USE_PREBOOT=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffe00 diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index c3ab35e9646..4085fac2329 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -39,6 +39,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x22fd0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40023000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig index 97afc211bf5..2433c6c83e0 100644 --- a/configs/verdin-imx8mm_defconfig +++ b/configs/verdin-imx8mm_defconfig @@ -33,6 +33,8 @@ CONFIG_LOG=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig index 2107047c1d7..06c41c7af05 100644 --- a/configs/verdin-imx8mp_defconfig +++ b/configs/verdin-imx8mp_defconfig @@ -41,6 +41,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x98fc00 CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y diff --git a/configs/vocore2_defconfig b/configs/vocore2_defconfig index d53851cb4e2..b362d549a21 100644 --- a/configs/vocore2_defconfig +++ b/configs/vocore2_defconfig @@ -32,6 +32,7 @@ CONFIG_LOGLEVEL=8 CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_MAX_SIZE=0x10000 +CONFIG_SPL_BSS_START_ADDR=0x80010000 CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y diff --git a/configs/x530_defconfig b/configs/x530_defconfig index ac418dad150..c52c9bdb066 100644 --- a/configs/x530_defconfig +++ b/configs/x530_defconfig @@ -29,6 +29,8 @@ CONFIG_SILENT_CONSOLE_UPDATE_ON_RELOC=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x22fd0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40023000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index 49210f86c4b..65e8a65fd93 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -29,6 +29,8 @@ CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_USE_PREBOOT=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffe00 diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index fe8de7302ff..131dfc03956 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -25,6 +25,8 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x0 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffffc diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index db3df6c83ed..e0e376efb76 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -25,6 +25,8 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x0 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffffc diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index 9657093c6a3..1b8665a6495 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -24,6 +24,8 @@ CONFIG_REMAKE_ELF=y # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x0 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffffc diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 88d5fec201f..74199f6bc03 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -32,6 +32,8 @@ CONFIG_PREBOOT="run scsi_init;usb start" CONFIG_BOARD_EARLY_INIT_R=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x0 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffffc diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig index f63a2bbab9a..062974a1abb 100644 --- a/configs/zynq_cse_nand_defconfig +++ b/configs/zynq_cse_nand_defconfig @@ -22,6 +22,8 @@ CONFIG_USE_PREBOOT=y # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000 CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffe00 diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig index d38b8f16f2e..cbbb051518e 100644 --- a/configs/zynq_cse_nor_defconfig +++ b/configs/zynq_cse_nor_defconfig @@ -22,6 +22,8 @@ CONFIG_USE_PREBOOT=y # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000 CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffe00 diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 241bf0c922c..51a97f4e3cf 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -29,6 +29,8 @@ CONFIG_USE_PREBOOT=y # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000 CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffe00 diff --git a/include/configs/am64x_evm.h b/include/configs/am64x_evm.h index d7ec31708a3..b8a25e95f36 100644 --- a/include/configs/am64x_evm.h +++ b/include/configs/am64x_evm.h @@ -18,17 +18,7 @@ /* DDR Configuration */ #define CONFIG_SYS_SDRAM_BASE1 0x880000000 -#if defined(CONFIG_TARGET_AM642_A53_EVM) -#else -/* - * Link BSS to be within SPL in a dedicated region located near the top of - * the MCU SRAM, this way making it available also before relocation. Note - * that we are not using the actual top of the MCU SRAM as there is a memory - * location filled in by the boot ROM that we want to read out without any - * interference from the C context. - */ -#define CONFIG_SPL_BSS_START_ADDR (TI_SRAM_SCRATCH_BOARD_EEPROM_START -\ - CONFIG_SPL_BSS_MAX_SIZE) +#if !defined(CONFIG_TARGET_AM642_A53_EVM) /* Set the stack right below the SPL BSS section */ /* Configure R5 SPL post-relocation malloc pool in DDR */ #define CONFIG_SYS_SPL_MALLOC_START 0x84000000 diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h index 7849976d6f2..06aade0b251 100644 --- a/include/configs/am65x_evm.h +++ b/include/configs/am65x_evm.h @@ -18,17 +18,7 @@ #define CONFIG_SYS_SDRAM_BASE1 0x880000000 /* SPL Loader Configuration */ -#ifdef CONFIG_TARGET_AM654_A53_EVM -#else -/* - * Link BSS to be within SPL in a dedicated region located near the top of - * the MCU SRAM, this way making it available also before relocation. Note - * that we are not using the actual top of the MCU SRAM as there is a memory - * location filled in by the boot ROM that we want to read out without any - * interference from the C context. - */ -#define CONFIG_SPL_BSS_START_ADDR (CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX -\ - CONFIG_SPL_BSS_MAX_SIZE) +#ifndef CONFIG_TARGET_AM654_A53_EVM /* Set the stack right below the SPL BSS section */ /* Configure R5 SPL post-relocation malloc pool in DDR */ #define CONFIG_SYS_SPL_MALLOC_START 0x84000000 diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 85732e3f9dc..17e2d2d7f6d 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -41,7 +41,6 @@ #ifdef CONFIG_SD_BOOT -#define CONFIG_SPL_BSS_START_ADDR 0x70000000 #define CONFIG_SYS_SPL_MALLOC_START 0x70080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index b6346ae1df2..d9b7269a1f4 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -53,7 +53,6 @@ /* SPL */ -#define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index 446c5e1d3f2..f436e8aa699 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -53,7 +53,6 @@ /* SPL */ -#define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index 7ca83a82fce..7a1b9dbd080 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -7,10 +7,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#ifdef CONFIG_SPL -#define CONFIG_SPL_BSS_START_ADDR 0x04000000 -#endif - #define RISCV_MMODE_TIMERBASE 0xe6000000 #define RISCV_MMODE_TIMER_FREQ 60000000 diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h index 6591de49c4d..0f3b53c47a6 100644 --- a/include/configs/bur_am335x_common.h +++ b/include/configs/bur_am335x_common.h @@ -68,7 +68,6 @@ * * ---------------------------------------------------------------------------- */ -#define CONFIG_SPL_BSS_START_ADDR 0x80A00000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index b22fc6c5ddc..ad28251f1d8 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -17,7 +17,6 @@ #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) -#define CONFIG_SPL_BSS_START_ADDR 0x00128000 #define CONFIG_SYS_SPL_MALLOC_START 0x00120000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ #define CONFIG_MALLOC_F_ADDR 0x00120000 diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h index d12feda16a4..2c029f42b60 100644 --- a/include/configs/cgtqmx8.h +++ b/include/configs/cgtqmx8.h @@ -14,7 +14,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) -#define CONFIG_SPL_BSS_START_ADDR 0x00128000 #define CONFIG_SYS_SPL_MALLOC_START 0x00120000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ #define CONFIG_SERIAL_LPUART_BASE 0x5a060000 diff --git a/include/configs/ci20.h b/include/configs/ci20.h index f0497407afc..bcec88415f9 100644 --- a/include/configs/ci20.h +++ b/include/configs/ci20.h @@ -32,8 +32,6 @@ /* SPL */ -#define CONFIG_SPL_BSS_START_ADDR 0xf4004000 - #define CONFIG_SPL_START_S_PATH "arch/mips/mach-jz47xx" #endif /* __CONFIG_CI20_H__ */ diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h index 03f7ceb2f42..c2aef08dbf9 100644 --- a/include/configs/clearfog.h +++ b/include/configs/clearfog.h @@ -45,8 +45,6 @@ /* Defines for SPL */ #define CONFIG_SPL_SIZE (140 << 10) -#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) - #if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA) /* SPL related MMC defines */ #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h index 62465acc97c..914d7ec83d8 100644 --- a/include/configs/controlcenterdc.h +++ b/include/configs/controlcenterdc.h @@ -37,8 +37,6 @@ /* Defines for SPL */ #define CONFIG_SPL_SIZE (160 << 10) -#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) - #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD /* SPL related MMC defines */ #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/corvus.h b/include/configs/corvus.h index f15e15822e5..864a79346b7 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -55,8 +55,6 @@ /* Defines for SPL */ -#define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE - #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 209a1423c1c..b4888192493 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -32,7 +32,6 @@ #define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */ #define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */ #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/ -#define CONFIG_SPL_BSS_START_ADDR DAVINCI_DDR_EMIF_DATA_BASE /* memtest start addr */ /* memtest will be run on 16MB */ diff --git a/include/configs/db-88f6720.h b/include/configs/db-88f6720.h index e97ff21360e..7357f9800fd 100644 --- a/include/configs/db-88f6720.h +++ b/include/configs/db-88f6720.h @@ -35,6 +35,4 @@ /* SPL */ /* Defines for SPL */ -#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) - #endif /* _CONFIG_DB_88F6720_H */ diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h index 727756dbba7..0b814f5e969 100644 --- a/include/configs/db-88f6820-amc.h +++ b/include/configs/db-88f6820-amc.h @@ -42,8 +42,6 @@ /* Defines for SPL */ #define CONFIG_SPL_SIZE (140 << 10) -#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) - /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index c6ce784b4b2..fe75666d054 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -42,8 +42,6 @@ /* Defines for SPL */ #define CONFIG_SPL_SIZE (140 << 10) -#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) - #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD /* SPL related MMC defines */ #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index cade78b85d3..808debc6f50 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -54,8 +54,6 @@ /* SPL */ /* Defines for SPL */ -#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) - /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ #define CONFIG_SPD_EEPROM 0x4e diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index 6d0f63d075d..b46f6226909 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -23,8 +23,6 @@ * other needs. */ -#define CONFIG_SPL_BSS_START_ADDR 0x80000500 /* leave space for bootargs*/ - #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ diff --git a/include/configs/ds414.h b/include/configs/ds414.h index 16d59ed014c..7fa1a4ebf02 100644 --- a/include/configs/ds414.h +++ b/include/configs/ds414.h @@ -46,8 +46,6 @@ /* SPL */ /* Defines for SPL */ -#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) - /* Default Environment */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index 2bc9c992319..1c260c7ad40 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -15,7 +15,6 @@ * SPL */ -#define CONFIG_SPL_BSS_START_ADDR 0x00020000 #define CONFIG_SYS_SPL_MALLOC_START 0x00040000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x0001ffff #define CONFIG_SYS_UBOOT_BASE 0xfff90000 diff --git a/include/configs/gardena-smart-gateway-at91sam.h b/include/configs/gardena-smart-gateway-at91sam.h index 380622c9c79..ea54d9964f0 100644 --- a/include/configs/gardena-smart-gateway-at91sam.h +++ b/include/configs/gardena-smart-gateway-at91sam.h @@ -34,7 +34,6 @@ /* SPL */ -#define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/gardena-smart-gateway-mt7688.h b/include/configs/gardena-smart-gateway-mt7688.h index c012931722e..d21a9b9383a 100644 --- a/include/configs/gardena-smart-gateway-mt7688.h +++ b/include/configs/gardena-smart-gateway-mt7688.h @@ -17,7 +17,6 @@ /* SPL */ #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SPL_BSS_START_ADDR 0x80010000 /* Dummy value */ #define CONFIG_SYS_UBOOT_BASE 0 diff --git a/include/configs/helios4.h b/include/configs/helios4.h index 86d441b11b2..90a631c3761 100644 --- a/include/configs/helios4.h +++ b/include/configs/helios4.h @@ -45,8 +45,6 @@ /* Defines for SPL */ #define CONFIG_SPL_SIZE (140 << 10) -#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) - #if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA) /* SPL related MMC defines */ #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h index daf44294a23..0b0cf9ddee6 100644 --- a/include/configs/imx6_spl.h +++ b/include/configs/imx6_spl.h @@ -20,11 +20,9 @@ #if defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL) || \ defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) -#define CONFIG_SPL_BSS_START_ADDR 0x88200000 #define CONFIG_SYS_SPL_MALLOC_START 0x88300000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ #else -#define CONFIG_SPL_BSS_START_ADDR 0x18200000 #define CONFIG_SYS_SPL_MALLOC_START 0x18300000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ #endif diff --git a/include/configs/imx7_spl.h b/include/configs/imx7_spl.h index 9fe0dbdfe97..6f7ec9ea8c8 100644 --- a/include/configs/imx7_spl.h +++ b/include/configs/imx7_spl.h @@ -17,7 +17,6 @@ #define CONFIG_SYS_MONITOR_LEN 409600 /* 400 KB */ #endif -#define CONFIG_SPL_BSS_START_ADDR 0x88200000 #define CONFIG_SYS_SPL_MALLOC_START 0x88300000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index 0e16d14f8b6..638e8cc3b42 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -17,7 +17,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_BSS_START_ADDR 0x910000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h index d28774cddbf..09788ebe241 100644 --- a/include/configs/imx8mm_beacon.h +++ b/include/configs/imx8mm_beacon.h @@ -14,7 +14,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_BSS_START_ADDR 0x910000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h index ed819e392ab..17d0f19ef21 100644 --- a/include/configs/imx8mm_data_modul_edm_sbc.h +++ b/include/configs/imx8mm_data_modul_edm_sbc.h @@ -15,7 +15,6 @@ #define CONFIG_SYS_MONITOR_LEN SZ_1M #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_BSS_START_ADDR 0x910000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M /* 16 MiB */ diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index b6dda333176..a6ae1ab8bf0 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -16,7 +16,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_BSS_START_ADDR 0x910000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index ffe88f7027b..b3ee0e20099 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -15,7 +15,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -# define CONFIG_SPL_BSS_START_ADDR 0x910000 # define CONFIG_SYS_SPL_MALLOC_START 0x42200000 # define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index eb30ed1b950..4b41f351d83 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -14,7 +14,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_BSS_START_ADDR 0x910000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_1M diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h index 3b99ba41bda..5fac4ad5e60 100644 --- a/include/configs/imx8mn_beacon.h +++ b/include/configs/imx8mn_beacon.h @@ -14,7 +14,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_BSS_START_ADDR 0x0095e000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K diff --git a/include/configs/imx8mn_bsh_smm_s2_common.h b/include/configs/imx8mn_bsh_smm_s2_common.h index 60faedb76e6..5aa5a311ca8 100644 --- a/include/configs/imx8mn_bsh_smm_s2_common.h +++ b/include/configs/imx8mn_bsh_smm_s2_common.h @@ -16,7 +16,6 @@ #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) -#define CONFIG_SPL_BSS_START_ADDR 0x950000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index fac2c26146d..8f199672ff5 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -17,7 +17,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_BSS_START_ADDR 0x950000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ diff --git a/include/configs/imx8mn_var_som.h b/include/configs/imx8mn_var_som.h index 699a51c1eb4..d9cf466b0da 100644 --- a/include/configs/imx8mn_var_som.h +++ b/include/configs/imx8mn_var_som.h @@ -16,7 +16,6 @@ #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) -#define CONFIG_SPL_BSS_START_ADDR 0x950000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index 5807da5ac4b..7a449c9f201 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -14,7 +14,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_BSS_START_ADDR 0x950000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ diff --git a/include/configs/imx8mp_dhcom_pdk2.h b/include/configs/imx8mp_dhcom_pdk2.h index abe245748f1..33b101daf99 100644 --- a/include/configs/imx8mp_dhcom_pdk2.h +++ b/include/configs/imx8mp_dhcom_pdk2.h @@ -15,7 +15,6 @@ #define CONFIG_SYS_MONITOR_LEN SZ_1M #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_BSS_START_ADDR 0x0096FC00 #define CONFIG_SYS_SPL_MALLOC_START 0x4c000000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 kiB */ diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index 1cfd63d78c6..ba059f7d68b 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -17,7 +17,6 @@ #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ -#define CONFIG_SPL_BSS_START_ADDR 0x0098FC00 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index 97f66bddbc9..f98f04b46f1 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -27,7 +27,6 @@ 0x5f, 0xd3, 0x6b, 0x9b, 0xe5, 0xb9) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_BSS_START_ADDR 0x0098FC00 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h index 074f5b08fc1..2933e4a5ded 100644 --- a/include/configs/imx8mp_venice.h +++ b/include/configs/imx8mp_venice.h @@ -14,7 +14,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_BSS_START_ADDR 0x0098FC00 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index fc4b1c5bf78..11ed33ddc8e 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -15,7 +15,6 @@ #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_BSS_START_ADDR 0x00180000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 179c5123d72..b9dbbb7d069 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -16,7 +16,6 @@ #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ -#define CONFIG_SPL_BSS_START_ADDR 0x00180000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index bc749538d8c..4507d7c54c8 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -13,7 +13,6 @@ #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ -#define CONFIG_SPL_BSS_START_ADDR 0x00180000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index 4f3e004f388..69719417854 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -15,7 +15,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) -#define CONFIG_SPL_BSS_START_ADDR 0x00128000 #define CONFIG_SYS_SPL_MALLOC_START 0x00120000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ #define CONFIG_SERIAL_LPUART_BASE 0x5a060000 diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h index 1f86b79d331..88d38a1dcbd 100644 --- a/include/configs/imx8qm_rom7720.h +++ b/include/configs/imx8qm_rom7720.h @@ -10,8 +10,6 @@ #include #include -#define CONFIG_SPL_BSS_START_ADDR 0x00128000 - #define CONFIG_SYS_BOOTMAPSZ (256 << 20) #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5B010000 diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index 7afc64800eb..0a6746c42c3 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -13,7 +13,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) -#define CONFIG_SPL_BSS_START_ADDR 0x00128000 #define CONFIG_SYS_SPL_MALLOC_START 0x00120000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ #define CONFIG_SERIAL_LPUART_BASE 0x5a060000 diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index 55b1795634a..34ebfda29f9 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -14,7 +14,6 @@ #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_BSS_START_ADDR 0x22048000 #define CONFIG_SYS_SPL_MALLOC_START 0x22040000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x8000 /* 32 KB */ diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index ba3f9de6bf6..8e7861fc912 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -24,15 +24,6 @@ /* Image load address in RAM for DFU boot*/ #else #define CONFIG_SYS_UBOOT_BASE 0x50080000 -/* - * Link BSS to be within SPL in a dedicated region located near the top of - * the MCU SRAM, this way making it available also before relocation. Note - * that we are not using the actual top of the MCU SRAM as there is a memory - * location filled in by the boot ROM that we want to read out without any - * interference from the C context. - */ -#define CONFIG_SPL_BSS_START_ADDR (CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX -\ - CONFIG_SPL_BSS_MAX_SIZE) /* Set the stack right below the SPL BSS section */ /* Configure R5 SPL post-relocation malloc pool in DDR */ #define CONFIG_SYS_SPL_MALLOC_START 0x84000000 diff --git a/include/configs/j721s2_evm.h b/include/configs/j721s2_evm.h index 3103face558..6099db1d429 100644 --- a/include/configs/j721s2_evm.h +++ b/include/configs/j721s2_evm.h @@ -25,15 +25,6 @@ /* Image load address in RAM for DFU boot*/ #else #define CONFIG_SYS_UBOOT_BASE 0x50080000 -/* - * Link BSS to be within SPL in a dedicated region located near the top of - * the MCU SRAM, this way making it available also before relocation. Note - * that we are not using the actual top of the MCU SRAM as there is a memory - * location filled in by the boot ROM that we want to read out without any - * interference from the C context. - */ -#define CONFIG_SPL_BSS_START_ADDR (0x41c80000 -\ - CONFIG_SPL_BSS_MAX_SIZE) /* Set the stack right below the SPL BSS section */ /* Configure R5 SPL post-relocation malloc pool in DDR */ #define CONFIG_SYS_SPL_MALLOC_START 0x84000000 diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h index b2c826b6f13..eb6c5e60910 100644 --- a/include/configs/kontron-sl-mx8mm.h +++ b/include/configs/kontron-sl-mx8mm.h @@ -55,7 +55,6 @@ #define CONFIG_SYS_BOOTM_LEN SZ_64M #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_BSS_START_ADDR 0x910000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index 08c6b80abb9..f86b7fd471a 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -17,7 +17,6 @@ 0x40, 0xd4, 0x5c, 0xca, 0x13, 0x99) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_BSS_START_ADDR 0x00180000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index 52778dd02b9..676e2c6ee44 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -41,7 +41,6 @@ #define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4) /* SPL */ -#define CONFIG_SPL_BSS_START_ADDR 0x80100000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 #define CONFIG_SYS_SPL_MALLOC_START 0x80200000 diff --git a/include/configs/linkit-smart-7688.h b/include/configs/linkit-smart-7688.h index 56a0c996c07..2e077dd5161 100644 --- a/include/configs/linkit-smart-7688.h +++ b/include/configs/linkit-smart-7688.h @@ -17,7 +17,6 @@ /* SPL */ #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SPL_BSS_START_ADDR 0x80010000 /* Dummy value */ #define CONFIG_SYS_UBOOT_BASE 0 diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 614b399af50..b592786fd89 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -45,7 +45,6 @@ #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \ CONFIG_SYS_MONITOR_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 -#define CONFIG_SPL_BSS_START_ADDR 0x80100000 #define CONFIG_SYS_MONITOR_LEN 0x80000 #endif diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index fb50c82a653..bddd6be30db 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -14,7 +14,6 @@ #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \ CONFIG_SYS_MONITOR_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 -#define CONFIG_SPL_BSS_START_ADDR 0x80100000 #define CONFIG_SYS_MONITOR_LEN 0xc0000 #endif @@ -25,7 +24,6 @@ #define CONFIG_SYS_SPL_MALLOC_START 0x80200000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 -#define CONFIG_SPL_BSS_START_ADDR 0x80100000 #define CONFIG_SYS_MONITOR_LEN 0x80000 #endif diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index 3e9175f5045..97c3bbeae56 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -47,7 +47,6 @@ #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \ CONFIG_SYS_MONITOR_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 -#define CONFIG_SPL_BSS_START_ADDR 0x80100000 #ifdef CONFIG_U_BOOT_HDR_SIZE /* diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 4470d974ca9..1141a9b013e 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -49,7 +49,6 @@ #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \ CONFIG_SYS_MONITOR_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 -#define CONFIG_SPL_BSS_START_ADDR 0x80100000 #ifdef CONFIG_U_BOOT_HDR_SIZE /* diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index a09486a4170..fee760f1123 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -49,7 +49,6 @@ #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 -#define CONFIG_SPL_BSS_START_ADDR 0x8f000000 #ifdef CONFIG_NXP_ESBC #define CONFIG_U_BOOT_HDR_SIZE (16 << 10) @@ -70,7 +69,6 @@ #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_SPL_MALLOC_START 0x80200000 -#define CONFIG_SPL_BSS_START_ADDR 0x80100000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 #ifdef CONFIG_NXP_ESBC diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 92fcc453f16..d283c8587a9 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -46,7 +46,6 @@ /* SD boot SPL */ #ifdef CONFIG_SD_BOOT -#define CONFIG_SPL_BSS_START_ADDR 0x8f000000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 @@ -67,7 +66,6 @@ #if defined(CONFIG_QSPI_BOOT) && defined(CONFIG_SPL) #define CONFIG_SPL_TARGET "spl/u-boot-spl.pbl" -#define CONFIG_SPL_BSS_START_ADDR 0x8f000000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 @@ -79,7 +77,6 @@ #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SPL_BSS_START_ADDR 0x8f000000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 1b8180f6f10..83dcddafcfa 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -144,7 +144,6 @@ unsigned long long get_qixis_addr(void); #endif #ifdef CONFIG_SPL -#define CONFIG_SPL_BSS_START_ADDR 0x80100000 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index f33e369847c..e32159baffc 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -137,7 +137,6 @@ unsigned long long get_qixis_addr(void); "mcinitcmd=fsl_mc start mc 0x580a00000" \ " 0x580e00000 \0" -#define CONFIG_SPL_BSS_START_ADDR 0x80100000 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #ifdef CONFIG_NAND_BOOT diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index d728c1fc11b..db84302231a 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -46,13 +46,6 @@ * L2 cache thus cannot be used. */ -/* SPL */ -/* Defines for SPL */ - -#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) - -/* SPL related SPI defines */ - /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ #define CONFIG_SYS_SDRAM_SIZE SZ_1G diff --git a/include/configs/mt7620.h b/include/configs/mt7620.h index 9ecc55cbf4d..db4d68d7507 100644 --- a/include/configs/mt7620.h +++ b/include/configs/mt7620.h @@ -19,7 +19,6 @@ /* SPL */ #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SPL_BSS_START_ADDR 0x80010000 /* Dummy value */ #define CONFIG_SYS_UBOOT_BASE 0 diff --git a/include/configs/mt7628.h b/include/configs/mt7628.h index cc02cf00854..4dcfa39350c 100644 --- a/include/configs/mt7628.h +++ b/include/configs/mt7628.h @@ -31,7 +31,6 @@ /* SPL */ #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SPL_BSS_START_ADDR 0x80010000 /* Dummy value */ #define CONFIG_SYS_UBOOT_BASE 0 diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 6fefb1eab90..e3a679efe70 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -28,8 +28,6 @@ #define PHYS_SDRAM_1_SIZE (128 << 20) /* SDRAM size 128MB */ #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/ -#define CONFIG_SPL_BSS_START_ADDR DAVINCI_DDR_EMIF_DATA_BASE - /* memtest start addr */ /* memtest will be run on 16MB */ diff --git a/include/configs/openpiton-riscv64.h b/include/configs/openpiton-riscv64.h index e194fbaeecf..d3b638e838f 100644 --- a/include/configs/openpiton-riscv64.h +++ b/include/configs/openpiton-riscv64.h @@ -18,7 +18,6 @@ #define CONFIG_SYS_BOOTM_LEN SZ_256M #ifdef CONFIG_SPL -#define CONFIG_SPL_BSS_START_ADDR 0x82000000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x0100000 diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h index 284891414e2..bf08e7a6241 100644 --- a/include/configs/phycore_imx8mm.h +++ b/include/configs/phycore_imx8mm.h @@ -17,7 +17,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_BSS_START_ADDR 0x910000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h index 99aecdad4ef..c2e370d5a8d 100644 --- a/include/configs/phycore_imx8mp.h +++ b/include/configs/phycore_imx8mp.h @@ -17,7 +17,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_BSS_START_ADDR 0x98FC00 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index 10e3e23e8dc..508909a744d 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -13,7 +13,6 @@ #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ -#define CONFIG_SPL_BSS_START_ADDR 0x00180000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index 6f49568484d..614bfad0e42 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -48,7 +48,6 @@ #ifdef CONFIG_SD_BOOT -#define CONFIG_SPL_BSS_START_ADDR 0x70000000 #define CONFIG_SYS_SPL_MALLOC_START 0x70080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h index 1cf239f8a63..96dcfb420f7 100644 --- a/include/configs/px30_common.h +++ b/include/configs/px30_common.h @@ -13,7 +13,6 @@ /* FIXME: ff020000 is pmu_mem (10k), while ff0e0000 is regular int_mem */ #define CONFIG_IRAM_BASE 0xff020000 -#define CONFIG_SPL_BSS_START_ADDR 0x4000000 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ #define GICD_BASE 0xff131000 diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h index 15e8ae922e4..9f4752a88f3 100644 --- a/include/configs/qemu-riscv.h +++ b/include/configs/qemu-riscv.h @@ -10,7 +10,6 @@ #ifdef CONFIG_SPL -#define CONFIG_SPL_BSS_START_ADDR 0x84000000 #define CONFIG_SYS_SPL_MALLOC_START 0x84100000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index 6cda69159b4..ee9fc2862e5 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -43,11 +43,4 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" -/* SPL support */ -#if defined(CONFIG_R8A7795) || defined(CONFIG_R8A7796) || defined(CONFIG_R8A77965) -#define CONFIG_SPL_BSS_START_ADDR 0xe633f000 -#else -#define CONFIG_SPL_BSS_START_ADDR 0xe631f000 -#endif - #endif /* __RCAR_GEN3_COMMON_H */ diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h index 2b0b367df78..169cf2ac9c1 100644 --- a/include/configs/rk3308_common.h +++ b/include/configs/rk3308_common.h @@ -8,8 +8,6 @@ #include "rockchip-common.h" -#define CONFIG_SPL_BSS_START_ADDR 0x00400000 - #define CONFIG_SYS_NS16550_MEM32 #define CONFIG_IRAM_BASE 0xfff80000 diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 25e2c659001..9cdc9004a91 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -10,8 +10,6 @@ #define CONFIG_IRAM_BASE 0xff090000 -#define CONFIG_SPL_BSS_START_ADDR 0x2000000 - #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ /* FAT sd card locations. */ diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index 1bdc8cf187b..ac881886824 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -16,8 +16,6 @@ #define CONFIG_IRAM_BASE 0xff8c0000 -#define CONFIG_SPL_BSS_START_ADDR 0x400000 - #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ #ifndef CONFIG_SPL_BUILD diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 112b8639ad7..3ca80c8c7c0 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -11,10 +11,8 @@ #define CONFIG_IRAM_BASE 0xff8c0000 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT) -#define CONFIG_SPL_BSS_START_ADDR 0x00400000 #else /* BSS setup */ -#define CONFIG_SPL_BSS_START_ADDR 0xff8e0000 #endif #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h index c0721aa1afb..f9c7c23cd9a 100644 --- a/include/configs/rk3568_common.h +++ b/include/configs/rk3568_common.h @@ -10,8 +10,6 @@ #define CONFIG_IRAM_BASE 0xfdcc0000 -#define CONFIG_SPL_BSS_START_ADDR 0x4000000 - #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ #define CONFIG_SYS_SDRAM_BASE 0 diff --git a/include/configs/sama5d27_som1_ek.h b/include/configs/sama5d27_som1_ek.h index dd5f8d8c801..8a39069c21f 100644 --- a/include/configs/sama5d27_som1_ek.h +++ b/include/configs/sama5d27_som1_ek.h @@ -15,7 +15,6 @@ #define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ /* SPL */ -#define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/sama5d27_wlsom1_ek.h b/include/configs/sama5d27_wlsom1_ek.h index 728dc9fb98b..14a6e0f0510 100644 --- a/include/configs/sama5d27_wlsom1_ek.h +++ b/include/configs/sama5d27_wlsom1_ek.h @@ -20,7 +20,6 @@ #define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* SPL */ -#define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/sama5d2_icp.h b/include/configs/sama5d2_icp.h index 0645c21b618..3b1e80921ee 100644 --- a/include/configs/sama5d2_icp.h +++ b/include/configs/sama5d2_icp.h @@ -27,7 +27,6 @@ #endif /* SPL */ -#define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h index 8481b0262c4..88020536c05 100644 --- a/include/configs/sama5d2_xplained.h +++ b/include/configs/sama5d2_xplained.h @@ -12,7 +12,6 @@ #include "at91-sama5_common.h" /* SPL */ -#define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index 23ffab226b1..eb8f15f310d 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -49,7 +49,6 @@ #endif /* SPL */ -#define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index e293002f39d..fe3adece810 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -61,7 +61,6 @@ #endif /* SPL */ -#define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h index 825925c114a..c589b07af48 100644 --- a/include/configs/sama5d4_xplained.h +++ b/include/configs/sama5d4_xplained.h @@ -26,7 +26,6 @@ #endif /* SPL */ -#define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h index d2466da6fcd..d5cfd2115d1 100644 --- a/include/configs/sama5d4ek.h +++ b/include/configs/sama5d4ek.h @@ -26,7 +26,6 @@ #endif /* SPL */ -#define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 8a81ae40819..4d2e927f4f0 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -52,8 +52,6 @@ /* Defines for SPL */ -#define CONFIG_SPL_BSS_START_ADDR 0x80000000 - #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 10, 11, 12, 13, 14, 15, 16, 17, \ 18, 19, 20, 21, 22, 23, 24, 25, \ diff --git a/include/configs/sifive-unleashed.h b/include/configs/sifive-unleashed.h index 9a460de077b..9734e1e75f0 100644 --- a/include/configs/sifive-unleashed.h +++ b/include/configs/sifive-unleashed.h @@ -13,7 +13,6 @@ #ifdef CONFIG_SPL -#define CONFIG_SPL_BSS_START_ADDR 0x85000000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h index 6453cc93293..be19471471c 100644 --- a/include/configs/sifive-unmatched.h +++ b/include/configs/sifive-unmatched.h @@ -13,7 +13,6 @@ #ifdef CONFIG_SPL -#define CONFIG_SPL_BSS_START_ADDR 0x85000000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index d84a2c262ef..1e5087444c5 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -114,7 +114,6 @@ /* Defines for SPL */ -#define CONFIG_SPL_BSS_START_ADDR CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN diff --git a/include/configs/sniper.h b/include/configs/sniper.h index 923da0ef99f..9f17cd6f131 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -48,7 +48,6 @@ * SPL */ -#define CONFIG_SPL_BSS_START_ADDR 0x80000000 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 #define CONFIG_SYS_SPL_MALLOC_SIZE (1024 * 1024) diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index b73ce917609..a79423740b6 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -144,8 +144,6 @@ unsigned int cm_get_l4_sys_free_clk_hz(void); * */ #define CONFIG_SPL_TARGET "spl/u-boot-spl-dtb.hex" -#define CONFIG_SPL_BSS_START_ADDR (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE \ - - CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE (CONFIG_SYS_MALLOC_LEN) #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR \ - CONFIG_SYS_SPL_MALLOC_SIZE) diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 3431366bcda..5b543fd2db1 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -49,16 +49,13 @@ #ifdef CONFIG_MACH_SUN9I #define SDRAM_OFFSET(x) 0x2##x #define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SPL_BSS_START_ADDR 0x2ff80000 #elif defined(CONFIG_MACH_SUNIV) #define SDRAM_OFFSET(x) 0x8##x #define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SPL_BSS_START_ADDR 0x81f80000 #else #define SDRAM_OFFSET(x) 0x4##x #define CONFIG_SYS_SDRAM_BASE 0x40000000 /* V3s do not have enough memory to place code at 0x4a000000 */ -#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 #endif /* diff --git a/include/configs/taurus.h b/include/configs/taurus.h index d7dba72db4c..ef856f07fdc 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -146,8 +146,6 @@ CONFIG_SYS_MALLOC_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN -#define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE - #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h index e5e21ef3bbc..c81e89eed8b 100644 --- a/include/configs/theadorable.h +++ b/include/configs/theadorable.h @@ -74,8 +74,6 @@ /* SPL */ /* Defines for SPL */ -#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) - /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ #define CONFIG_SYS_SDRAM_SIZE SZ_2G diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index 9c1f5ea7c8d..777e78859bc 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -86,8 +86,6 @@ /* Defines for SPL */ -#define CONFIG_SPL_BSS_START_ADDR 0x80000000 - #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 /* diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index 316a21524f7..7a19fc4b58a 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -113,9 +113,6 @@ * of the BSS area. We suggest that the stack be placed at 32MiB after the * start of DRAM to allow room for all of the above (handled in Kconfig). */ -#ifndef CONFIG_SPL_BSS_START_ADDR -#define CONFIG_SPL_BSS_START_ADDR 0x80a00000 -#endif #ifndef CONFIG_SYS_SPL_MALLOC_START #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 1cc593fdea2..4a6d9bfddd1 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -25,8 +25,6 @@ #endif /* SPL SPI Loader Configuration */ -#define CONFIG_SPL_BSS_START_ADDR (CONFIG_ISW_ENTRY_ADDR + \ - CONFIG_SPL_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE (32 * 1024) diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h index 4dc27a31a4e..4bbc992c9f8 100644 --- a/include/configs/turris_omnia.h +++ b/include/configs/turris_omnia.h @@ -29,8 +29,6 @@ /* Defines for SPL */ #define CONFIG_SPL_SIZE (140 << 10) -#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) - #ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC /* SPL related MMC defines */ # ifdef CONFIG_SPL_BUILD diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index de796917820..4fc7617c776 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -16,7 +16,6 @@ #define CONFIG_SYS_BOOTM_LEN SZ_64M #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_BSS_START_ADDR 0x910000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index e6eb986466c..47bb5324943 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -15,7 +15,6 @@ #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ -#define CONFIG_SPL_BSS_START_ADDR 0x0098fc00 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h index 5a215f14fdb..6a7a0832c95 100644 --- a/include/configs/vocore2.h +++ b/include/configs/vocore2.h @@ -17,7 +17,6 @@ /* SPL */ #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SPL_BSS_START_ADDR 0x80010000 /* Dummy value */ #define CONFIG_SYS_UBOOT_BASE 0 diff --git a/include/configs/x530.h b/include/configs/x530.h index 8b690cd9bf4..e66d8af802a 100644 --- a/include/configs/x530.h +++ b/include/configs/x530.h @@ -69,6 +69,4 @@ /* Defines for SPL */ #define CONFIG_SPL_SIZE (140 << 10) -#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) - #endif /* _CONFIG_X530_H */ diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index b6f345b17ae..3e766b5180f 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -199,9 +199,6 @@ "dfu_bufsiz=0x1000\0" #endif -/* Just random location in OCM */ -#define CONFIG_SPL_BSS_START_ADDR 0x0 - #if defined(CONFIG_SPL_SPI_FLASH_SUPPORT) # define CONFIG_SYS_SPI_KERNEL_OFFS 0x80000 # define CONFIG_SYS_SPI_ARGS_OFFS 0xa0000 diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index a0e276bcc41..d29d423e116 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -238,7 +238,4 @@ * Set it up as limit for now. */ -/* BSS setup */ -#define CONFIG_SPL_BSS_START_ADDR 0x100000 - #endif /* __CONFIG_ZYNQ_COMMON_H */ diff --git a/include/configs/zynq_cse.h b/include/configs/zynq_cse.h index ff9d6d15dc4..cb982c2e74f 100644 --- a/include/configs/zynq_cse.h +++ b/include/configs/zynq_cse.h @@ -18,7 +18,5 @@ #undef CONFIG_SYS_INIT_RAM_SIZE #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFDE000 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 -#undef CONFIG_SPL_BSS_START_ADDR -#define CONFIG_SPL_BSS_START_ADDR 0x20000 #endif /* __CONFIG_ZYNQ_CSE_H */ -- GitLab From 10f6e4dc3a16c21f235416f975ecf2070ceb351f Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 27 May 2022 12:48:32 -0400 Subject: [PATCH 039/581] Convert CONFIG_SYS_SPL_MALLOC_SIZE et al to Kconfig This converts the following to Kconfig: CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_SPL_MALLOC_START We introduce a default value here as well, and CONFIG_SYS_SPL_MALLOC to control if we have a malloc pool or not. Signed-off-by: Tom Rini --- README | 5 +---- common/spl/Kconfig | 17 +++++++++++++++++ common/spl/spl.c | 6 +++--- configs/am335x_baltos_defconfig | 2 ++ configs/am335x_boneblack_vboot_defconfig | 2 ++ configs/am335x_evm_defconfig | 2 ++ configs/am335x_evm_spiboot_defconfig | 2 ++ configs/am335x_guardian_defconfig | 2 ++ configs/am335x_hs_evm_defconfig | 2 ++ configs/am335x_hs_evm_uart_defconfig | 2 ++ configs/am335x_igep003x_defconfig | 2 ++ configs/am335x_pdu001_defconfig | 2 ++ configs/am335x_shc_defconfig | 2 ++ configs/am335x_shc_ict_defconfig | 2 ++ configs/am335x_shc_netboot_defconfig | 2 ++ configs/am335x_shc_sdboot_defconfig | 2 ++ configs/am335x_sl50_defconfig | 2 ++ configs/am3517_evm_defconfig | 2 ++ configs/am43xx_evm_defconfig | 2 ++ configs/am43xx_evm_rtconly_defconfig | 2 ++ configs/am43xx_evm_usbhost_boot_defconfig | 2 ++ configs/am43xx_hs_evm_defconfig | 2 ++ configs/am57xx_evm_defconfig | 2 ++ configs/am57xx_hs_evm_defconfig | 2 ++ configs/am57xx_hs_evm_usb_defconfig | 2 ++ configs/am64x_evm_a53_defconfig | 2 ++ configs/am64x_evm_r5_defconfig | 4 ++++ configs/am65x_evm_a53_defconfig | 2 ++ configs/am65x_evm_r5_defconfig | 4 ++++ configs/am65x_evm_r5_usbdfu_defconfig | 4 ++++ configs/am65x_evm_r5_usbmsc_defconfig | 4 ++++ configs/am65x_hs_evm_a53_defconfig | 2 ++ configs/am65x_hs_evm_r5_defconfig | 4 ++++ configs/apalis-tk1_defconfig | 4 ++++ configs/apalis_imx6_defconfig | 1 + configs/apalis_t30_defconfig | 4 ++++ ...azedev_cc_v1_0_ultrazedev_som_v1_0_defconfig | 4 ++++ configs/axm_defconfig | 4 ++++ configs/beaver_defconfig | 4 ++++ configs/bitmain_antminer_s9_defconfig | 2 ++ configs/brppt1_mmc_defconfig | 2 ++ configs/brppt1_nand_defconfig | 2 ++ configs/brppt1_spi_defconfig | 2 ++ configs/brppt2_defconfig | 1 + configs/brsmarc1_defconfig | 2 ++ configs/brxre1_defconfig | 2 ++ configs/cardhu_defconfig | 4 ++++ configs/cei-tk1-som_defconfig | 4 ++++ configs/cgtqmx8_defconfig | 4 ++++ configs/chiliboard_defconfig | 2 ++ configs/cl-som-imx7_defconfig | 1 + configs/cm_fx6_defconfig | 1 + configs/cm_t335_defconfig | 2 ++ configs/cm_t43_defconfig | 2 ++ configs/colibri_imx6_defconfig | 1 + configs/colibri_t20_defconfig | 4 ++++ configs/colibri_t30_defconfig | 4 ++++ configs/da850evm_defconfig | 4 ++++ configs/da850evm_nand_defconfig | 4 ++++ configs/dalmore_defconfig | 4 ++++ configs/deneb_defconfig | 4 ++++ configs/devkit8000_defconfig | 3 +++ configs/dh_imx6_defconfig | 1 + configs/display5_defconfig | 1 + configs/display5_factory_defconfig | 1 + configs/dra7xx_evm_defconfig | 2 ++ configs/dra7xx_hs_evm_defconfig | 2 ++ configs/dra7xx_hs_evm_usb_defconfig | 2 ++ configs/draco_defconfig | 3 +++ configs/edminiv2_defconfig | 4 ++++ configs/etamin_defconfig | 3 +++ configs/gardena-smart-gateway-at91sam_defconfig | 2 ++ configs/ge_b1x5v2_defconfig | 1 + configs/giedi_defconfig | 4 ++++ configs/gwventana_emmc_defconfig | 1 + configs/gwventana_gw5904_defconfig | 1 + configs/gwventana_nand_defconfig | 1 + configs/harmony_defconfig | 4 ++++ configs/igep00x0_defconfig | 2 ++ configs/imx6dl_icore_nand_defconfig | 1 + configs/imx6dl_mamoj_defconfig | 1 + configs/imx6q_bosch_acc_defconfig | 1 + configs/imx6q_icore_nand_defconfig | 1 + configs/imx6q_logic_defconfig | 1 + configs/imx6qdl_icore_mipi_defconfig | 1 + configs/imx6qdl_icore_mmc_defconfig | 1 + configs/imx6qdl_icore_nand_defconfig | 1 + configs/imx6qdl_icore_rqs_defconfig | 1 + configs/imx6ul_geam_mmc_defconfig | 1 + configs/imx6ul_geam_nand_defconfig | 1 + configs/imx6ul_isiot_emmc_defconfig | 1 + configs/imx6ul_isiot_nand_defconfig | 1 + configs/imx7_cm_defconfig | 1 + configs/imx8mm-cl-iot-gate-optee_defconfig | 4 ++++ configs/imx8mm-cl-iot-gate_defconfig | 4 ++++ configs/imx8mm-icore-mx8mm-ctouch2_defconfig | 4 ++++ configs/imx8mm-icore-mx8mm-edimm2.2_defconfig | 4 ++++ configs/imx8mm-mx8menlo_defconfig | 4 ++++ configs/imx8mm_beacon_defconfig | 4 ++++ configs/imx8mm_data_modul_edm_sbc_defconfig | 4 ++++ configs/imx8mm_evk_defconfig | 4 ++++ configs/imx8mm_venice_defconfig | 3 +++ configs/imx8mn_beacon_2g_defconfig | 4 ++++ configs/imx8mn_beacon_defconfig | 4 ++++ configs/imx8mn_bsh_smm_s2_defconfig | 4 ++++ configs/imx8mn_bsh_smm_s2pro_defconfig | 4 ++++ configs/imx8mn_ddr4_evk_defconfig | 4 ++++ configs/imx8mn_evk_defconfig | 4 ++++ configs/imx8mn_var_som_defconfig | 4 ++++ configs/imx8mn_venice_defconfig | 4 ++++ configs/imx8mp_dhcom_pdk2_defconfig | 4 ++++ configs/imx8mp_evk_defconfig | 4 ++++ configs/imx8mp_rsb3720a1_4G_defconfig | 4 ++++ configs/imx8mp_rsb3720a1_6G_defconfig | 4 ++++ configs/imx8mp_venice_defconfig | 4 ++++ configs/imx8mq_cm_defconfig | 4 ++++ configs/imx8mq_evk_defconfig | 4 ++++ configs/imx8mq_phanbell_defconfig | 4 ++++ configs/imx8qm_mek_defconfig | 4 ++++ configs/imx8qxp_mek_defconfig | 4 ++++ configs/imx8ulp_evk_defconfig | 4 ++++ configs/iot2050_defconfig | 2 ++ configs/j7200_evm_a72_defconfig | 2 ++ configs/j7200_evm_r5_defconfig | 4 ++++ configs/j721e_evm_a72_defconfig | 2 ++ configs/j721e_evm_r5_defconfig | 4 ++++ configs/j721e_hs_evm_a72_defconfig | 2 ++ configs/j721e_hs_evm_r5_defconfig | 4 ++++ configs/j721s2_evm_a72_defconfig | 2 ++ configs/j721s2_evm_r5_defconfig | 4 ++++ configs/jetson-tk1_defconfig | 4 ++++ configs/k2e_evm_defconfig | 2 ++ configs/k2g_evm_defconfig | 2 ++ configs/k2hk_evm_defconfig | 2 ++ configs/k2l_evm_defconfig | 2 ++ configs/kontron-sl-mx6ul_defconfig | 1 + configs/kontron-sl-mx8mm_defconfig | 4 ++++ configs/kontron_pitx_imx8m_defconfig | 4 ++++ configs/kontron_sl28_defconfig | 1 + configs/kp_imx6q_tpc_defconfig | 1 + configs/liteboard_defconfig | 1 + configs/ls1021aiot_sdcard_defconfig | 3 +++ configs/ls1021aqds_nand_defconfig | 3 +++ configs/ls1021aqds_sdcard_ifc_defconfig | 3 +++ configs/ls1021aqds_sdcard_qspi_defconfig | 3 +++ configs/ls1021atsn_sdcard_defconfig | 3 +++ .../ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig | 3 +++ configs/ls1021atwr_sdcard_ifc_defconfig | 3 +++ configs/ls1021atwr_sdcard_qspi_defconfig | 3 +++ configs/ls1043aqds_nand_defconfig | 3 +++ configs/ls1043aqds_sdcard_ifc_defconfig | 1 + configs/ls1043aqds_sdcard_qspi_defconfig | 1 + configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 3 +++ configs/ls1043ardb_nand_defconfig | 3 +++ configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_sdcard_defconfig | 1 + configs/ls1046aqds_nand_defconfig | 1 + configs/ls1046aqds_sdcard_ifc_defconfig | 1 + configs/ls1046aqds_sdcard_qspi_defconfig | 1 + configs/ls1046ardb_emmc_defconfig | 1 + configs/ls1046ardb_qspi_spl_defconfig | 1 + configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig | 1 + configs/ls1046ardb_sdcard_defconfig | 1 + configs/ls1088aqds_sdcard_ifc_defconfig | 1 + configs/ls1088aqds_sdcard_qspi_defconfig | 1 + ...ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1088ardb_sdcard_qspi_defconfig | 1 + configs/ls2080aqds_nand_defconfig | 1 + configs/ls2080aqds_sdcard_defconfig | 1 + configs/ls2080ardb_nand_defconfig | 1 + configs/mccmon6_nor_defconfig | 1 + configs/mccmon6_sd_defconfig | 1 + configs/medcom-wide_defconfig | 4 ++++ configs/mx6cuboxi_defconfig | 1 + configs/mx6memcal_defconfig | 1 + configs/mx6sabreauto_defconfig | 1 + configs/mx6sabresd_defconfig | 1 + configs/mx6slevk_spl_defconfig | 1 + configs/mx6ul_14x14_evk_defconfig | 1 + configs/mx6ul_9x9_evk_defconfig | 1 + configs/myir_mys_6ulx_defconfig | 1 + configs/novena_defconfig | 1 + configs/nyan-big_defconfig | 4 ++++ configs/omap35_logic_defconfig | 2 ++ configs/omap35_logic_somlv_defconfig | 2 ++ configs/omap3_beagle_defconfig | 2 ++ configs/omap3_evm_defconfig | 2 ++ configs/omap3_logic_defconfig | 2 ++ configs/omap3_logic_somlv_defconfig | 2 ++ configs/omap4_panda_defconfig | 2 ++ configs/omap4_sdp4430_defconfig | 2 ++ configs/omap5_uevm_defconfig | 2 ++ configs/omapl138_lcdk_defconfig | 4 ++++ configs/openpiton_riscv64_spl_defconfig | 1 + configs/opos6uldev_defconfig | 1 + configs/paz00_defconfig | 4 ++++ configs/pcm058_defconfig | 1 + configs/phycore-am335x-r2-regor_defconfig | 2 ++ configs/phycore-am335x-r2-wega_defconfig | 2 ++ configs/phycore-imx8mm_defconfig | 4 ++++ configs/phycore-imx8mp_defconfig | 4 ++++ configs/phycore_pcl063_defconfig | 1 + configs/phycore_pcl063_ull_defconfig | 1 + configs/pico-dwarf-imx6ul_defconfig | 1 + configs/pico-dwarf-imx7d_defconfig | 1 + configs/pico-hobbit-imx6ul_defconfig | 1 + configs/pico-hobbit-imx7d_defconfig | 1 + configs/pico-imx6_defconfig | 1 + configs/pico-imx6ul_defconfig | 1 + configs/pico-imx7d_bl33_defconfig | 1 + configs/pico-imx7d_defconfig | 1 + configs/pico-imx8mq_defconfig | 4 ++++ configs/pico-nymph-imx7d_defconfig | 1 + configs/pico-pi-imx6ul_defconfig | 1 + configs/pico-pi-imx7d_defconfig | 1 + configs/plutux_defconfig | 4 ++++ configs/pxm2_defconfig | 3 +++ configs/qemu-riscv32_spl_defconfig | 1 + configs/qemu-riscv64_spl_defconfig | 1 + configs/rastaban_defconfig | 3 +++ configs/riotboard_defconfig | 1 + configs/rut_defconfig | 3 +++ configs/sama5d27_giantboard_defconfig | 2 ++ configs/sama5d27_som1_ek_mmc1_defconfig | 2 ++ configs/sama5d27_som1_ek_mmc_defconfig | 2 ++ configs/sama5d27_som1_ek_qspiflash_defconfig | 2 ++ configs/sama5d27_wlsom1_ek_mmc_defconfig | 2 ++ configs/sama5d27_wlsom1_ek_qspiflash_defconfig | 2 ++ configs/sama5d2_icp_mmc_defconfig | 2 ++ configs/sama5d2_xplained_emmc_defconfig | 2 ++ configs/sama5d2_xplained_mmc_defconfig | 2 ++ configs/sama5d2_xplained_qspiflash_defconfig | 2 ++ configs/sama5d2_xplained_spiflash_defconfig | 2 ++ configs/sama5d3_xplained_mmc_defconfig | 2 ++ configs/sama5d3_xplained_nandflash_defconfig | 2 ++ configs/sama5d3xek_mmc_defconfig | 2 ++ configs/sama5d3xek_nandflash_defconfig | 2 ++ configs/sama5d3xek_spiflash_defconfig | 2 ++ configs/sama5d4_xplained_mmc_defconfig | 2 ++ configs/sama5d4_xplained_nandflash_defconfig | 2 ++ configs/sama5d4_xplained_spiflash_defconfig | 2 ++ configs/sama5d4ek_mmc_defconfig | 2 ++ configs/sama5d4ek_nandflash_defconfig | 2 ++ configs/sama5d4ek_spiflash_defconfig | 2 ++ configs/seaboard_defconfig | 4 ++++ configs/seeed_npi_imx6ull_defconfig | 1 + configs/sifive_unleashed_defconfig | 1 + configs/sifive_unmatched_defconfig | 1 + configs/smartweb_defconfig | 2 ++ configs/sniper_defconfig | 3 +++ configs/socfpga_agilex_atf_defconfig | 4 ++++ configs/socfpga_agilex_defconfig | 4 ++++ configs/socfpga_agilex_vab_defconfig | 4 ++++ configs/socfpga_arria10_defconfig | 4 ++++ configs/socfpga_n5x_atf_defconfig | 4 ++++ configs/socfpga_n5x_defconfig | 4 ++++ configs/socfpga_n5x_vab_defconfig | 4 ++++ configs/socfpga_stratix10_atf_defconfig | 4 ++++ configs/socfpga_stratix10_defconfig | 4 ++++ .../stm32mp15-icore-stm32mp1-ctouch2_defconfig | 4 ++++ .../stm32mp15-icore-stm32mp1-edimm2.2_defconfig | 4 ++++ ...15-microgea-stm32mp1-microdev2-of7_defconfig | 4 ++++ ...32mp15-microgea-stm32mp1-microdev2_defconfig | 4 ++++ configs/stm32mp15_basic_defconfig | 4 ++++ configs/stm32mp15_dhcom_basic_defconfig | 4 ++++ configs/stm32mp15_dhcor_basic_defconfig | 4 ++++ configs/syzygy_hub_defconfig | 2 ++ configs/taurus_defconfig | 4 ++++ configs/tec-ng_defconfig | 4 ++++ configs/tec_defconfig | 4 ++++ configs/thuban_defconfig | 3 +++ configs/ti816x_evm_defconfig | 2 ++ configs/topic_miami_defconfig | 2 ++ configs/topic_miamilite_defconfig | 2 ++ configs/topic_miamiplus_defconfig | 2 ++ configs/trimslice_defconfig | 4 ++++ configs/udoo_defconfig | 1 + configs/udoo_neo_defconfig | 1 + configs/variscite_dart6ul_defconfig | 1 + configs/venice2_defconfig | 4 ++++ configs/ventana_defconfig | 4 ++++ configs/verdin-imx8mm_defconfig | 4 ++++ configs/verdin-imx8mp_defconfig | 4 ++++ configs/vining_2000_defconfig | 1 + configs/wandboard_defconfig | 1 + configs/xilinx_zynq_virt_defconfig | 2 ++ configs/xilinx_zynqmp_mini_emmc0_defconfig | 4 ++++ configs/xilinx_zynqmp_mini_emmc1_defconfig | 4 ++++ configs/xilinx_zynqmp_mini_qspi_defconfig | 4 ++++ configs/xilinx_zynqmp_virt_defconfig | 4 ++++ configs/zynq_cse_nand_defconfig | 4 ++++ configs/zynq_cse_nor_defconfig | 4 ++++ configs/zynq_cse_qspi_defconfig | 4 ++++ include/configs/am64x_evm.h | 7 ------- include/configs/am65x_evm.h | 8 -------- include/configs/at91sam9m10g45ek.h | 4 ---- include/configs/at91sam9n12ek.h | 3 --- include/configs/at91sam9x5ek.h | 3 --- include/configs/bur_am335x_common.h | 3 --- include/configs/capricorn-common.h | 2 -- include/configs/cgtqmx8.h | 2 -- include/configs/da850evm.h | 3 --- include/configs/devkit8000.h | 3 --- include/configs/edminiv2.h | 2 -- include/configs/gardena-smart-gateway-at91sam.h | 3 --- include/configs/imx6_spl.h | 8 -------- include/configs/imx7_spl.h | 3 --- include/configs/imx8mm-cl-iot-gate.h | 3 --- include/configs/imx8mm_beacon.h | 3 --- include/configs/imx8mm_data_modul_edm_sbc.h | 3 --- include/configs/imx8mm_evk.h | 3 --- include/configs/imx8mm_icore_mx8mm.h | 3 --- include/configs/imx8mm_venice.h | 3 --- include/configs/imx8mn_beacon.h | 3 --- include/configs/imx8mn_bsh_smm_s2_common.h | 5 ----- include/configs/imx8mn_evk.h | 3 --- include/configs/imx8mn_var_som.h | 3 --- include/configs/imx8mn_venice.h | 3 --- include/configs/imx8mp_dhcom_pdk2.h | 3 --- include/configs/imx8mp_evk.h | 2 -- include/configs/imx8mp_rsb3720.h | 3 --- include/configs/imx8mp_venice.h | 3 --- include/configs/imx8mq_cm.h | 2 -- include/configs/imx8mq_evk.h | 2 -- include/configs/imx8mq_phanbell.h | 2 -- include/configs/imx8qm_mek.h | 2 -- include/configs/imx8qxp_mek.h | 2 -- include/configs/imx8ulp_evk.h | 3 --- include/configs/j721e_evm.h | 5 ----- include/configs/j721s2_evm.h | 5 ----- include/configs/kontron-sl-mx8mm.h | 2 -- include/configs/kontron_pitx_imx8m.h | 2 -- include/configs/kontron_sl28.h | 2 -- include/configs/ls1021aiot.h | 3 --- include/configs/ls1021aqds.h | 5 ----- include/configs/ls1021atsn.h | 4 ---- include/configs/ls1021atwr.h | 4 ---- include/configs/ls1043a_common.h | 6 ------ include/configs/ls1046a_common.h | 10 ---------- include/configs/ls1088a_common.h | 3 --- include/configs/ls2080a_common.h | 2 -- include/configs/omapl138_lcdk.h | 3 --- include/configs/openpiton-riscv64.h | 4 ---- include/configs/phycore_imx8mm.h | 3 --- include/configs/phycore_imx8mp.h | 3 --- include/configs/pico-imx8mq.h | 2 -- include/configs/pm9g45.h | 4 ---- include/configs/qemu-riscv.h | 7 ------- include/configs/sama5d27_som1_ek.h | 2 -- include/configs/sama5d27_wlsom1_ek.h | 2 -- include/configs/sama5d2_icp.h | 2 -- include/configs/sama5d2_xplained.h | 2 -- include/configs/sama5d3_xplained.h | 2 -- include/configs/sama5d3xek.h | 2 -- include/configs/sama5d4_xplained.h | 2 -- include/configs/sama5d4ek.h | 2 -- include/configs/siemens-am33x-common.h | 2 -- include/configs/sifive-unleashed.h | 8 -------- include/configs/sifive-unmatched.h | 8 -------- include/configs/smartweb.h | 4 ---- include/configs/sniper.h | 3 --- include/configs/socfpga_arria10_socdk.h | 1 - include/configs/socfpga_common.h | 5 ----- include/configs/socfpga_soc64_common.h | 3 --- include/configs/stm32mp15_common.h | 2 -- include/configs/taurus.h | 3 --- include/configs/tegra-common.h | 1 - include/configs/tegra114-common.h | 1 - include/configs/tegra124-common.h | 1 - include/configs/tegra20-common.h | 1 - include/configs/tegra30-common.h | 1 - include/configs/ti814x_evm.h | 2 -- include/configs/ti_armv7_common.h | 5 ----- include/configs/ti_armv7_keystone2.h | 3 --- include/configs/verdin-imx8mm.h | 3 --- include/configs/verdin-imx8mp.h | 2 -- include/configs/xilinx_zynqmp.h | 3 --- include/configs/zynq-common.h | 2 -- include/system-constants.h | 10 ++++++++++ 379 files changed, 737 insertions(+), 279 deletions(-) diff --git a/README b/README index f21aae2ecf7..452e5955023 100644 --- a/README +++ b/README @@ -1635,9 +1635,6 @@ The following options need to be configured: consider that a completely unreadable NAND block is bad, and thus should be skipped silently. - CONFIG_SYS_SPL_MALLOC_SIZE - The size of the malloc pool used in SPL. - CONFIG_SPL_DISPLAY_PRINT For ARM, enable an optional function to print more information about the running system. @@ -1782,7 +1779,7 @@ Configuration Settings: - CONFIG_SYS_MALLOC_SIMPLE Provides a simple and small malloc() and calloc() for those boards which do not use the full malloc in SPL (which is - enabled with CONFIG_SYS_SPL_MALLOC_START). + enabled with CONFIG_SYS_SPL_MALLOC). - CONFIG_SYS_NONCACHED_MEMORY: Size of non-cached memory area. This area of memory will be diff --git a/common/spl/Kconfig b/common/spl/Kconfig index adcd7ca19a4..10d9cdd0c28 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -485,6 +485,23 @@ config SPL_SEPARATE_BSS location is used. Normally we put the device tree at the end of BSS but with this option enabled, it goes at _image_binary_end. +config SYS_SPL_MALLOC + bool "Enable malloc pool in SPL" + depends on SPL_FRAMEWORK + +config HAS_CUSTOM_SPL_MALLOC_START + bool "For the SPL malloc pool, define a custom starting address" + depends on SYS_SPL_MALLOC + +config CUSTOM_SYS_SPL_MALLOC_ADDR + hex "SPL malloc addr" + depends on HAS_CUSTOM_SPL_MALLOC_START + +config SYS_SPL_MALLOC_SIZE + hex "Size of the SPL malloc pool" + depends on SYS_SPL_MALLOC + default 0x100000 + config SPL_READ_ONLY bool depends on SPL_OF_PLATDATA diff --git a/common/spl/spl.c b/common/spl/spl.c index c8c463f80bd..2a69a7c9324 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -728,9 +729,8 @@ void board_init_r(gd_t *dummy1, ulong dummy2) spl_set_bd(); -#if defined(CONFIG_SYS_SPL_MALLOC_START) - mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START, - CONFIG_SYS_SPL_MALLOC_SIZE); +#if defined(CONFIG_SYS_SPL_MALLOC) + mem_malloc_init(SYS_SPL_MALLOC_START, CONFIG_SYS_SPL_MALLOC_SIZE); gd->flags |= GD_FLG_FULL_MALLOC_INIT; #endif if (!(gd->flags & GD_FLG_SPL_INIT)) { diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig index b78316ee172..0ec44091751 100644 --- a/configs/am335x_baltos_defconfig +++ b/configs/am335x_baltos_defconfig @@ -19,6 +19,8 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run usbboot;run mmcboot;setenv mmcdev 1; setenv bootpart 1:2; run mmcboot;run nandboot;" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C=y CONFIG_SPL_MTD_SUPPORT=y diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig index 7458e9c3e2c..67c4144c35f 100644 --- a/configs/am335x_boneblack_vboot_defconfig +++ b/configs/am335x_boneblack_vboot_defconfig @@ -22,6 +22,8 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_BOOTCOMMAND="run findfdt; run init_console; run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_MUSB_NEW=y # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_NET=y diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig index 50d528fa5a2..e1c19c11d31 100644 --- a/configs/am335x_evm_defconfig +++ b/configs/am335x_evm_defconfig @@ -20,6 +20,8 @@ CONFIG_BOOTCOMMAND="run findfdt; run init_console; run finduuid; run distro_boot CONFIG_LOGLEVEL=3 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_ETH=y # CONFIG_SPL_FS_EXT4 is not set diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig index d39941c7d26..00e80a89ded 100644 --- a/configs/am335x_evm_spiboot_defconfig +++ b/configs/am335x_evm_spiboot_defconfig @@ -21,6 +21,8 @@ CONFIG_BOOTCOMMAND="run findfdt; run init_console; run finduuid; run distro_boot CONFIG_LOGLEVEL=3 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_FIT_IMAGE_TINY=y # CONFIG_SPL_FS_EXT4 is not set CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" diff --git a/configs/am335x_guardian_defconfig b/configs/am335x_guardian_defconfig index 33d37db284d..0dc4bb25be2 100644 --- a/configs/am335x_guardian_defconfig +++ b/configs/am335x_guardian_defconfig @@ -32,6 +32,8 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_ETH=y diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig index 1e7dc889730..ef0a09877c1 100644 --- a/configs/am335x_hs_evm_defconfig +++ b/configs/am335x_hs_evm_defconfig @@ -20,6 +20,8 @@ CONFIG_LOGLEVEL=3 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_MAX_SIZE=0xb0b0 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_FIT_IMAGE_TINY=y # CONFIG_SPL_ENV_SUPPORT is not set # CONFIG_SPL_FS_EXT4 is not set diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig index 2c987072f75..d7ea5a31cd1 100644 --- a/configs/am335x_hs_evm_uart_defconfig +++ b/configs/am335x_hs_evm_uart_defconfig @@ -23,6 +23,8 @@ CONFIG_LOGLEVEL=3 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_MAX_SIZE=0x9ab0 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_FIT_IMAGE_TINY=y # CONFIG_SPL_ENV_SUPPORT is not set # CONFIG_SPL_FS_EXT4 is not set diff --git a/configs/am335x_igep003x_defconfig b/configs/am335x_igep003x_defconfig index e6bc6597612..f640cc47a8f 100644 --- a/configs/am335x_igep003x_defconfig +++ b/configs/am335x_igep003x_defconfig @@ -19,6 +19,8 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt;run mmcboot;run nandboot;run netboot;" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C=y CONFIG_SPL_MTD_SUPPORT=y diff --git a/configs/am335x_pdu001_defconfig b/configs/am335x_pdu001_defconfig index ec56a065fa2..9757057b85e 100644 --- a/configs/am335x_pdu001_defconfig +++ b/configs/am335x_pdu001_defconfig @@ -24,6 +24,8 @@ CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_BOOTCOMMAND="run eval_boot_device;part uuid mmc ${mmc_boot}:${root_fs_partition} root_fs_partuuid;setenv bootargs console=${console} vt.global_cursor_default=0 root=PARTUUID=${root_fs_partuuid} rootfstype=ext4 rootwait rootdelay=1;fatload mmc ${mmc_boot} ${fdtaddr} ${fdtfile};fatload mmc ${mmc_boot} ${loadaddr} ${bootfile};bootz ${loadaddr} - ${fdtaddr}" CONFIG_BOARD_LATE_INIT=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_I2C=y # CONFIG_SPL_NAND_SUPPORT is not set diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig index 66d775f2896..9f5924e1524 100644 --- a/configs/am335x_shc_defconfig +++ b/configs/am335x_shc_defconfig @@ -32,6 +32,8 @@ CONFIG_BOOTCOMMAND="if mmc dev 1; mmc rescan; then run emmc_setup; else echo ERR CONFIG_DEFAULT_FDT_FILE="am335x-shc" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C=y # CONFIG_SPL_NAND_SUPPORT is not set diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig index 9a60c126a67..7d8a57c18eb 100644 --- a/configs/am335x_shc_ict_defconfig +++ b/configs/am335x_shc_ict_defconfig @@ -30,6 +30,8 @@ CONFIG_BOOTCOMMAND="if mmc dev 0; mmc rescan; then run sd_setup; else echo ERROR CONFIG_DEFAULT_FDT_FILE="am335x-shc" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C=y # CONFIG_SPL_NAND_SUPPORT is not set diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig index 354c8786bc3..98e437e0233 100644 --- a/configs/am335x_shc_netboot_defconfig +++ b/configs/am335x_shc_netboot_defconfig @@ -33,6 +33,8 @@ CONFIG_BOOTCOMMAND="run fusecmd; if run netboot; then echo Booting from network; CONFIG_DEFAULT_FDT_FILE="am335x-shc" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C=y diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig index a29f9d2312a..02146321503 100644 --- a/configs/am335x_shc_sdboot_defconfig +++ b/configs/am335x_shc_sdboot_defconfig @@ -33,6 +33,8 @@ CONFIG_BOOTCOMMAND="if mmc dev 0; mmc rescan; then run sd_setup; else echo ERROR CONFIG_DEFAULT_FDT_FILE="am335x-shc" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C=y # CONFIG_SPL_NAND_SUPPORT is not set diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig index c8ad4ca6114..f42148e0549 100644 --- a/configs/am335x_sl50_defconfig +++ b/configs/am335x_sl50_defconfig @@ -23,6 +23,8 @@ CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" CONFIG_AUTOBOOT_DELAY_STR="d" CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C=y diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig index dfd0af08fca..03fc4fba8f5 100644 --- a/configs/am3517_evm_defconfig +++ b/configs/am3517_evm_defconfig @@ -20,6 +20,8 @@ CONFIG_BOOTDELAY=10 CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then echo SD/MMC found on device $mmcdev; if run loadbootenv; then run importbootenv; fi; echo Checking if uenvcmd is set ...; if test -n $uenvcmd; then echo Running uenvcmd ...; run uenvcmd; fi; echo Running default loadimage ...; setenv bootfile zImage; if run loadimage; then run loadfdt; run mmcboot; fi; else run nandboot; fi" CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set # CONFIG_SPL_FS_EXT4 is not set # CONFIG_SPL_I2C is not set diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig index 96b2704dd1b..ebfb018d2de 100644 --- a/configs/am43xx_evm_defconfig +++ b/configs/am43xx_evm_defconfig @@ -18,6 +18,8 @@ CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_MISC_INIT_R is not set CONFIG_SPL_MAX_SIZE=0x439e0 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_ETH=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_MTD_SUPPORT=y diff --git a/configs/am43xx_evm_rtconly_defconfig b/configs/am43xx_evm_rtconly_defconfig index 84339babc5b..5e6975129e7 100644 --- a/configs/am43xx_evm_rtconly_defconfig +++ b/configs/am43xx_evm_rtconly_defconfig @@ -18,6 +18,8 @@ CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_MISC_INIT_R is not set CONFIG_SPL_MAX_SIZE=0x439e0 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig index 5586ca025d4..429ab732e12 100644 --- a/configs/am43xx_evm_usbhost_boot_defconfig +++ b/configs/am43xx_evm_usbhost_boot_defconfig @@ -17,6 +17,8 @@ CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_MISC_INIT_R is not set CONFIG_SPL_MAX_SIZE=0x37690 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig index cf1db1e66bb..c401d5619a9 100644 --- a/configs/am43xx_hs_evm_defconfig +++ b/configs/am43xx_hs_evm_defconfig @@ -25,6 +25,8 @@ CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_MISC_INIT_R is not set CONFIG_SPL_MAX_SIZE=0x36100 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_ETH=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_MTD_SUPPORT=y diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index acb2946fdf5..33f8415d8b1 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -30,6 +30,8 @@ CONFIG_AVB_VERIFY=y CONFIG_ANDROID_AB=y CONFIG_SPL_MAX_SIZE=0x7bc00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_DMA=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" # CONFIG_SPL_NAND_SUPPORT is not set diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index e51df5f15b2..33209177301 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -33,6 +33,8 @@ CONFIG_AVB_VERIFY=y CONFIG_ANDROID_AB=y CONFIG_SPL_MAX_SIZE=0x7a8b0 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_DMA=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" # CONFIG_SPL_NAND_SUPPORT is not set diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index c30377338b2..014a3830df7 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -36,6 +36,8 @@ CONFIG_AVB_VERIFY=y CONFIG_ANDROID_AB=y CONFIG_SPL_MAX_SIZE=0x74eb0 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_DMA=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" # CONFIG_SPL_NAND_SUPPORT is not set diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig index 954f0a8b2cd..49bfc006ddb 100644 --- a/configs/am64x_evm_a53_defconfig +++ b/configs/am64x_evm_a53_defconfig @@ -39,6 +39,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 CONFIG_SPL_DMA=y diff --git a/configs/am64x_evm_r5_defconfig b/configs/am64x_evm_r5_defconfig index 20e1f507cbe..7226af760e3 100644 --- a/configs/am64x_evm_r5_defconfig +++ b/configs/am64x_evm_r5_defconfig @@ -42,6 +42,10 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x84000000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000 CONFIG_SPL_EARLY_BSS=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig index d07edc22925..9c088e1d02e 100644 --- a/configs/am65x_evm_a53_defconfig +++ b/configs/am65x_evm_a53_defconfig @@ -41,6 +41,8 @@ CONFIG_SPL_BSS_START_ADDR=0x80a00000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 CONFIG_SPL_DMA=y diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index fbe3aba2555..2d8add2fbd5 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -40,6 +40,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0xc00 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x84000000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000 CONFIG_SPL_EARLY_BSS=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 diff --git a/configs/am65x_evm_r5_usbdfu_defconfig b/configs/am65x_evm_r5_usbdfu_defconfig index f0dfc7579fc..dbda4f74554 100644 --- a/configs/am65x_evm_r5_usbdfu_defconfig +++ b/configs/am65x_evm_r5_usbdfu_defconfig @@ -31,6 +31,10 @@ CONFIG_SPL_BSS_START_ADDR=0x41c7effc CONFIG_SPL_BSS_MAX_SIZE=0xc00 CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x84000000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000 CONFIG_SPL_EARLY_BSS=y CONFIG_SPL_DMA=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/am65x_evm_r5_usbmsc_defconfig b/configs/am65x_evm_r5_usbmsc_defconfig index cf55bd48cdd..64b7d49310d 100644 --- a/configs/am65x_evm_r5_usbmsc_defconfig +++ b/configs/am65x_evm_r5_usbmsc_defconfig @@ -30,6 +30,10 @@ CONFIG_SPL_BSS_START_ADDR=0x41c7effc CONFIG_SPL_BSS_MAX_SIZE=0xc00 CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x84000000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000 CONFIG_SPL_EARLY_BSS=y CONFIG_SPL_DMA=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/am65x_hs_evm_a53_defconfig b/configs/am65x_hs_evm_a53_defconfig index 6983c9172f0..3ce290467ab 100644 --- a/configs/am65x_hs_evm_a53_defconfig +++ b/configs/am65x_hs_evm_a53_defconfig @@ -41,6 +41,8 @@ CONFIG_SPL_BSS_START_ADDR=0x80a00000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 CONFIG_SPL_DMA=y diff --git a/configs/am65x_hs_evm_r5_defconfig b/configs/am65x_hs_evm_r5_defconfig index d26f07124b8..fc0c5432dbc 100644 --- a/configs/am65x_hs_evm_r5_defconfig +++ b/configs/am65x_hs_evm_r5_defconfig @@ -36,6 +36,10 @@ CONFIG_SPL_BSS_START_ADDR=0x41c7effc CONFIG_SPL_BSS_MAX_SIZE=0xc00 CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x84000000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000 CONFIG_SPL_EARLY_BSS=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 diff --git a/configs/apalis-tk1_defconfig b/configs/apalis-tk1_defconfig index 3c004695897..2d9c0ae18e3 100644 --- a/configs/apalis-tk1_defconfig +++ b/configs/apalis-tk1_defconfig @@ -25,6 +25,10 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x800ffffc +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80090000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x10000 CONFIG_SYS_PROMPT="Apalis TK1 # " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=1024 diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index 11ee2f3d34a..89e9971ea3c 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -36,6 +36,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_DMA=y CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y diff --git a/configs/apalis_t30_defconfig b/configs/apalis_t30_defconfig index 5b31d4c9943..2a8d3c6e0a3 100644 --- a/configs/apalis_t30_defconfig +++ b/configs/apalis_t30_defconfig @@ -21,6 +21,10 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x800ffffc +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80090000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x10000 CONFIG_SYS_PROMPT="Apalis T30 # " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=1024 diff --git a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig index c24f94e08d8..7f4c804c957 100644 --- a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig +++ b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig @@ -34,6 +34,10 @@ CONFIG_SPL_BSS_START_ADDR=0x0 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffffc +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x20000000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000 CONFIG_SPL_FS_LOAD_KERNEL_NAME="atf-uboot.ub" CONFIG_SPL_FS_LOAD_ARGS_NAME="u-boot.bin" CONFIG_SPL_OS_BOOT=y diff --git a/configs/axm_defconfig b/configs/axm_defconfig index 2f6b332cb35..b61151129fc 100644 --- a/configs/axm_defconfig +++ b/configs/axm_defconfig @@ -44,6 +44,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0x600 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x304000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x20ba0000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x460000 CONFIG_SPL_CRC32=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_RAW_ONLY=y diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig index e0e4393d390..dbaa7ac3198 100644 --- a/configs/beaver_defconfig +++ b/configs/beaver_defconfig @@ -18,6 +18,10 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x800ffffc +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80090000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x10000 CONFIG_SYS_PROMPT="Tegra30 (Beaver) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2084 diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig index d724fe6e65d..f8ab9143587 100644 --- a/configs/bitmain_antminer_s9_defconfig +++ b/configs/bitmain_antminer_s9_defconfig @@ -34,6 +34,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL_STACK_R=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x2000000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="antminer> " CONFIG_SYS_MAXARGS=32 diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig index 932cbbca9da..488167e27f1 100644 --- a/configs/brppt1_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -34,6 +34,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x500000 CONFIG_SPL_I2C=y # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_POWER=y diff --git a/configs/brppt1_nand_defconfig b/configs/brppt1_nand_defconfig index 3363f50ebb5..dce6bebd81d 100644 --- a/configs/brppt1_nand_defconfig +++ b/configs/brppt1_nand_defconfig @@ -31,6 +31,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x500000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig index 4b7f781e716..41dd24fedda 100644 --- a/configs/brppt1_spi_defconfig +++ b/configs/brppt1_spi_defconfig @@ -38,6 +38,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x500000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_I2C=y # CONFIG_SPL_NAND_SUPPORT is not set diff --git a/configs/brppt2_defconfig b/configs/brppt2_defconfig index b9f3587bdaa..db87b579eed 100644 --- a/configs/brppt2_defconfig +++ b/configs/brppt2_defconfig @@ -32,6 +32,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run b_default" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_BOARD_INIT=y +CONFIG_SYS_SPL_MALLOC=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_I2C=y CONFIG_SPL_DM_SPI_FLASH=y diff --git a/configs/brsmarc1_defconfig b/configs/brsmarc1_defconfig index 9739785c994..3134d3b4b6a 100644 --- a/configs/brsmarc1_defconfig +++ b/configs/brsmarc1_defconfig @@ -37,6 +37,8 @@ CONFIG_BOARD_TYPES=y CONFIG_ARCH_MISC_INIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x500000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_I2C=y # CONFIG_SPL_NAND_SUPPORT is not set diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig index cefc548a00a..c39389451f1 100644 --- a/configs/brxre1_defconfig +++ b/configs/brxre1_defconfig @@ -33,6 +33,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x500000 CONFIG_SPL_I2C=y # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_POWER=y diff --git a/configs/cardhu_defconfig b/configs/cardhu_defconfig index 2b73fa22d8a..bf8504fd725 100644 --- a/configs/cardhu_defconfig +++ b/configs/cardhu_defconfig @@ -17,6 +17,10 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x800ffffc +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80090000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x10000 CONFIG_SYS_PROMPT="Tegra30 (Cardhu) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2084 diff --git a/configs/cei-tk1-som_defconfig b/configs/cei-tk1-som_defconfig index 7bf45bae4e5..f55848ab2c0 100644 --- a/configs/cei-tk1-som_defconfig +++ b/configs/cei-tk1-som_defconfig @@ -19,6 +19,10 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x800ffffc +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80090000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x10000 CONFIG_SYS_PROMPT="Tegra124 (TK1-SOM) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2086 diff --git a/configs/cgtqmx8_defconfig b/configs/cgtqmx8_defconfig index 1a25d498b99..17219969f60 100644 --- a/configs/cgtqmx8_defconfig +++ b/configs/cgtqmx8_defconfig @@ -35,6 +35,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x13e000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x120000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x3000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 CONFIG_SYS_MMCSD_FS_BOOT_PARTITION=0 diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig index 3b8fdd437f3..849d751f08e 100644 --- a/configs/chiliboard_defconfig +++ b/configs/chiliboard_defconfig @@ -24,6 +24,8 @@ CONFIG_BOOTCOMMAND="run mmcboot; run nandboot; run netboot" CONFIG_DEFAULT_FDT_FILE="am335x-chiliboard.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig index ff5c21f5c69..075d8678c8a 100644 --- a/configs/cl-som-imx7_defconfig +++ b/configs/cl-som-imx7_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_BOARD_INIT=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80 CONFIG_SPL_I2C=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index bb63d5f7756..16e619b38a5 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -30,6 +30,7 @@ CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run legacy_bootcmd" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="usb start;sf probe" CONFIG_MISC_INIT_R=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80 CONFIG_SPL_I2C=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/cm_t335_defconfig b/configs/cm_t335_defconfig index 6d77e8ed1be..0c2e8a35ef8 100644 --- a/configs/cm_t335_defconfig +++ b/configs/cm_t335_defconfig @@ -19,6 +19,8 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_TIMESTAMP=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C=y CONFIG_SPL_MTD_SUPPORT=y diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig index 72c71020e0d..30afd5e7d00 100644 --- a/configs/cm_t43_defconfig +++ b/configs/cm_t43_defconfig @@ -30,6 +30,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_MISC_INIT_R is not set CONFIG_SPL_MAX_SIZE=0x37690 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x480 CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C=y diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 1873581e755..44e2ff09409 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -35,6 +35,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_DMA=y CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig index 1f616af3c52..92d9dfed30f 100644 --- a/configs/colibri_t20_defconfig +++ b/configs/colibri_t20_defconfig @@ -20,6 +20,10 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xffffc +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x90000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x10000 CONFIG_SYS_PROMPT="Colibri T20 # " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=1024 diff --git a/configs/colibri_t30_defconfig b/configs/colibri_t30_defconfig index b9012f02582..a9fe05246d6 100644 --- a/configs/colibri_t30_defconfig +++ b/configs/colibri_t30_defconfig @@ -21,6 +21,10 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x800ffffc +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80090000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x10000 CONFIG_SYS_PROMPT="Colibri T30 # " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=1024 diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index d150a00510b..de2d709a7a2 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -43,6 +43,10 @@ CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x8001ff00 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xc0f70000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x110000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig index f46c8809193..052ef307033 100644 --- a/configs/da850evm_nand_defconfig +++ b/configs/da850evm_nand_defconfig @@ -40,6 +40,10 @@ CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x8001ff00 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xc0f70000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x110000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig index 7811ef83db8..64d788f6632 100644 --- a/configs/dalmore_defconfig +++ b/configs/dalmore_defconfig @@ -18,6 +18,10 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x800ffffc +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80090000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x10000 CONFIG_SYS_PROMPT="Tegra114 (Dalmore) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2086 diff --git a/configs/deneb_defconfig b/configs/deneb_defconfig index 2cd9adb3c13..309545be531 100644 --- a/configs/deneb_defconfig +++ b/configs/deneb_defconfig @@ -44,6 +44,10 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x13e000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x120000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x3000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 CONFIG_SPL_POWER_DOMAIN=y diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index 9ab5423a324..08c053b4f15 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -14,6 +14,9 @@ CONFIG_BOOTCOMMAND="run autoboot" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_BSS_START_ADDR=0x80000500 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80208000 CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_SIMPLE=y diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index 8c0b9b3d456..a659e996b5c 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_FIT=y CONFIG_BOOTDELAY=3 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x11400 CONFIG_SYS_MAXARGS=32 diff --git a/configs/display5_defconfig b/configs/display5_defconfig index 2b92ed95b4b..6e74f68f400 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -37,6 +37,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="if run check_em_pad; then run recovery;else if test ${BOOT_FROM} = FACTORY; then run factory_nfs;else run boot_mmc;fi;fi" CONFIG_MISC_INIT_R=y CONFIG_SPL_BOOTCOUNT_LIMIT=y +CONFIG_SYS_SPL_MALLOC=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_DMA=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig index 9c3965c0a6f..eab9c7c1e86 100644 --- a/configs/display5_factory_defconfig +++ b/configs/display5_factory_defconfig @@ -34,6 +34,7 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="echo SDP Display5 recovery" CONFIG_MISC_INIT_R=y +CONFIG_SYS_SPL_MALLOC=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_DMA=y CONFIG_SPL_I2C=y diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index c1d1b5d1319..5922e86d7a6 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -30,6 +30,8 @@ CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_MISC_INIT_R is not set CONFIG_SPL_MAX_SIZE=0x7bc00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_DMA=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_NAND_DRIVERS=y diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index 25c27672250..51ffd2779c1 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -33,6 +33,8 @@ CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_MISC_INIT_R is not set CONFIG_SPL_MAX_SIZE=0x7a8b0 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_DMA=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" # CONFIG_SPL_NAND_SUPPORT is not set diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig index 3463be48c50..34dcdede923 100644 --- a/configs/dra7xx_hs_evm_usb_defconfig +++ b/configs/dra7xx_hs_evm_usb_defconfig @@ -35,6 +35,8 @@ CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_MISC_INIT_R is not set CONFIG_SPL_MAX_SIZE=0x74eb0 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_DMA=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" # CONFIG_SPL_NAND_SUPPORT is not set diff --git a/configs/draco_defconfig b/configs/draco_defconfig index 86c130f4bc7..f7bb01f3bf3 100644 --- a/configs/draco_defconfig +++ b/configs/draco_defconfig @@ -37,6 +37,9 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_BSS_START_ADDR=0x80000000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80208000 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/edminiv2_defconfig b/configs/edminiv2_defconfig index 8434b23b47e..b8906b1bb0d 100644 --- a/configs/edminiv2_defconfig +++ b/configs/edminiv2_defconfig @@ -29,6 +29,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0x1ffff CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x20000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x40000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1ffff CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig index 9da7bfbb399..294a67a7fac 100644 --- a/configs/etamin_defconfig +++ b/configs/etamin_defconfig @@ -38,6 +38,9 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_BSS_START_ADDR=0x80000000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80208000 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig index ea79a2f9384..a253b1333ed 100644 --- a/configs/gardena-smart-gateway-at91sam_defconfig +++ b/configs/gardena-smart-gateway-at91sam_defconfig @@ -42,6 +42,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x308000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_RAW_ONLY=y diff --git a/configs/ge_b1x5v2_defconfig b/configs/ge_b1x5v2_defconfig index fd1f3e37de3..ff14bd625a6 100644 --- a/configs/ge_b1x5v2_defconfig +++ b/configs/ge_b1x5v2_defconfig @@ -37,6 +37,7 @@ CONFIG_LOG_MAX_LEVEL=8 CONFIG_LOG_DEFAULT_LEVEL=4 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x11400 CONFIG_SPL_USB_HOST=y diff --git a/configs/giedi_defconfig b/configs/giedi_defconfig index ac8ef890a33..7e9a7ea7c0b 100644 --- a/configs/giedi_defconfig +++ b/configs/giedi_defconfig @@ -44,6 +44,10 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x13e000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x120000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x3000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 CONFIG_SPL_POWER_DOMAIN=y diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index f0e720463b6..ef2ee77c3dc 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -41,6 +41,7 @@ CONFIG_MISC_INIT_R=y CONFIG_PCI_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_DMA=y CONFIG_SPL_I2C=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index 53d5bddd619..a736b81ad9a 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -41,6 +41,7 @@ CONFIG_MISC_INIT_R=y CONFIG_PCI_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_DMA=y CONFIG_SPL_I2C=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index e0225278582..5372476f045 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -41,6 +41,7 @@ CONFIG_MISC_INIT_R=y CONFIG_PCI_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_DMA=y CONFIG_SPL_I2C=y diff --git a/configs/harmony_defconfig b/configs/harmony_defconfig index 50a210703d4..647b4674891 100644 --- a/configs/harmony_defconfig +++ b/configs/harmony_defconfig @@ -16,6 +16,10 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xffffc +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x90000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x10000 CONFIG_SYS_PROMPT="Tegra20 (Harmony) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2085 diff --git a/configs/igep00x0_defconfig b/configs/igep00x0_defconfig index 1cbcfdceeaf..b1162e7cdb8 100644 --- a/configs/igep00x0_defconfig +++ b/configs/igep00x0_defconfig @@ -19,6 +19,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 # CONFIG_SPL_FS_EXT4 is not set CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y diff --git a/configs/imx6dl_icore_nand_defconfig b/configs/imx6dl_icore_nand_defconfig index c98a5cc735a..71e3d39597d 100644 --- a/configs/imx6dl_icore_nand_defconfig +++ b/configs/imx6dl_icore_nand_defconfig @@ -24,6 +24,7 @@ CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index 6f249dbe2fc..7e6e3bb4a3f 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 diff --git a/configs/imx6q_bosch_acc_defconfig b/configs/imx6q_bosch_acc_defconfig index 4b75e5794e9..a2501ebc1a1 100644 --- a/configs/imx6q_bosch_acc_defconfig +++ b/configs/imx6q_bosch_acc_defconfig @@ -34,6 +34,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run mmc_mmc_fit" CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_RAW_IMAGE_SUPPORT=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xaa # CONFIG_SPL_CRC32 is not set # CONFIG_SPL_CRYPTO is not set diff --git a/configs/imx6q_icore_nand_defconfig b/configs/imx6q_icore_nand_defconfig index 278bc98cbc1..bf5f620ad88 100644 --- a/configs/imx6q_icore_nand_defconfig +++ b/configs/imx6q_icore_nand_defconfig @@ -25,6 +25,7 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index c5ad6dcdd1f..4e665ba42bf 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTCOMMAND="run autoboot" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SPL_RAW_IMAGE_SUPPORT=y +CONFIG_SYS_SPL_MALLOC=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_DMA=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" diff --git a/configs/imx6qdl_icore_mipi_defconfig b/configs/imx6qdl_icore_mipi_defconfig index a2f1abe1aa6..754537044a3 100644 --- a/configs/imx6qdl_icore_mipi_defconfig +++ b/configs/imx6qdl_icore_mipi_defconfig @@ -33,6 +33,7 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_RAW_IMAGE_SUPPORT=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index 91b32e4a035..4e9fadd699a 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -36,6 +36,7 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_RAW_IMAGE_SUPPORT=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index 278bc98cbc1..bf5f620ad88 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -25,6 +25,7 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig index cfd35608cfc..d87a47700cd 100644 --- a/configs/imx6qdl_icore_rqs_defconfig +++ b/configs/imx6qdl_icore_rqs_defconfig @@ -30,6 +30,7 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_RAW_IMAGE_SUPPORT=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig index a84547feddd..9e46b1137fc 100644 --- a/configs/imx6ul_geam_mmc_defconfig +++ b/configs/imx6ul_geam_mmc_defconfig @@ -28,6 +28,7 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_RAW_IMAGE_SUPPORT=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="geam6ul> " diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig index 8bd4360efd2..ac56f204cdb 100644 --- a/configs/imx6ul_geam_nand_defconfig +++ b/configs/imx6ul_geam_nand_defconfig @@ -25,6 +25,7 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig index 9262055f1da..7dadf80cd5a 100644 --- a/configs/imx6ul_isiot_emmc_defconfig +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -28,6 +28,7 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_RAW_IMAGE_SUPPORT=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="isiotmx6ul> " diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig index d1da6da311c..a5828ead1bd 100644 --- a/configs/imx6ul_isiot_nand_defconfig +++ b/configs/imx6ul_isiot_nand_defconfig @@ -25,6 +25,7 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run $modeboot" +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx7_cm_defconfig b/configs/imx7_cm_defconfig index 1fc16f5f36e..830e4029e50 100644 --- a/configs/imx7_cm_defconfig +++ b/configs/imx7_cm_defconfig @@ -27,6 +27,7 @@ CONFIG_DEFAULT_FDT_FILE="ask" CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_MAX_SIZE=0x100000 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/imx8mm-cl-iot-gate-optee_defconfig b/configs/imx8mm-cl-iot-gate-optee_defconfig index 7cd51348baa..57ecd7bb3b6 100644 --- a/configs/imx8mm-cl-iot-gate-optee_defconfig +++ b/configs/imx8mm-cl-iot-gate-optee_defconfig @@ -30,6 +30,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x920000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig index e630bcaf342..67f7576f996 100644 --- a/configs/imx8mm-cl-iot-gate_defconfig +++ b/configs/imx8mm-cl-iot-gate_defconfig @@ -32,6 +32,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x920000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig index 1ac7766400b..c95ff3e74fb 100644 --- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig +++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig @@ -30,6 +30,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x920000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_POWER=y diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig index 08151f3f692..62d23949969 100644 --- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig +++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig @@ -30,6 +30,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x920000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_POWER=y diff --git a/configs/imx8mm-mx8menlo_defconfig b/configs/imx8mm-mx8menlo_defconfig index fa176e498fe..ec672f8764e 100644 --- a/configs/imx8mm-mx8menlo_defconfig +++ b/configs/imx8mm-mx8menlo_defconfig @@ -41,6 +41,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x920000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig index 5ad7f28aa08..417ece1ef8c 100644 --- a/configs/imx8mm_beacon_defconfig +++ b/configs/imx8mm_beacon_defconfig @@ -32,6 +32,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x920000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mm_data_modul_edm_sbc_defconfig b/configs/imx8mm_data_modul_edm_sbc_defconfig index fbc6cecb91f..399b388460f 100644 --- a/configs/imx8mm_data_modul_edm_sbc_defconfig +++ b/configs/imx8mm_data_modul_edm_sbc_defconfig @@ -50,6 +50,10 @@ CONFIG_SPL_LEGACY_IMAGE_FORMAT=y CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x920000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index e5497ef8047..00af724bbaa 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -30,6 +30,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x920000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig index fe6f8d03d4d..190209d6325 100644 --- a/configs/imx8mm_venice_defconfig +++ b/configs/imx8mm_venice_defconfig @@ -37,6 +37,9 @@ CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x920000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig index 28ce1d1f6e9..5b9b3715b34 100644 --- a/configs/imx8mn_beacon_2g_defconfig +++ b/configs/imx8mn_beacon_2g_defconfig @@ -40,6 +40,10 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x187ff0 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig index 3495bc0f9a1..b296898d6db 100644 --- a/configs/imx8mn_beacon_defconfig +++ b/configs/imx8mn_beacon_defconfig @@ -39,6 +39,10 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x187ff0 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mn_bsh_smm_s2_defconfig b/configs/imx8mn_bsh_smm_s2_defconfig index bfe89a5379b..68c2940456d 100644 --- a/configs/imx8mn_bsh_smm_s2_defconfig +++ b/configs/imx8mn_bsh_smm_s2_defconfig @@ -34,6 +34,10 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x980000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mn_bsh_smm_s2pro_defconfig b/configs/imx8mn_bsh_smm_s2pro_defconfig index ab4c04f8059..4bc55121051 100644 --- a/configs/imx8mn_bsh_smm_s2pro_defconfig +++ b/configs/imx8mn_bsh_smm_s2pro_defconfig @@ -35,6 +35,10 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x980000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig index 4ac98fefa85..e16c1f60e67 100644 --- a/configs/imx8mn_ddr4_evk_defconfig +++ b/configs/imx8mn_ddr4_evk_defconfig @@ -33,6 +33,10 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x980000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig index a17b839e36b..56145a1b6d4 100644 --- a/configs/imx8mn_evk_defconfig +++ b/configs/imx8mn_evk_defconfig @@ -37,6 +37,10 @@ CONFIG_SPL_LEGACY_IMAGE_FORMAT=y CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x980000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mn_var_som_defconfig b/configs/imx8mn_var_som_defconfig index 10ed2527c3a..898f3f2f9f6 100644 --- a/configs/imx8mn_var_som_defconfig +++ b/configs/imx8mn_var_som_defconfig @@ -35,6 +35,10 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x980000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig index 7479f997aae..4a0bf393986 100644 --- a/configs/imx8mn_venice_defconfig +++ b/configs/imx8mn_venice_defconfig @@ -39,6 +39,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x980000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mp_dhcom_pdk2_defconfig b/configs/imx8mp_dhcom_pdk2_defconfig index 5aca5feda02..3a41767c156 100644 --- a/configs/imx8mp_dhcom_pdk2_defconfig +++ b/configs/imx8mp_dhcom_pdk2_defconfig @@ -53,6 +53,10 @@ CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x96fc00 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x4c000000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index ebd4db2b1c4..2b2a025c2b2 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -37,6 +37,10 @@ CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x960000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mp_rsb3720a1_4G_defconfig b/configs/imx8mp_rsb3720a1_4G_defconfig index a8071fdfcf6..97925196a85 100644 --- a/configs/imx8mp_rsb3720a1_4G_defconfig +++ b/configs/imx8mp_rsb3720a1_4G_defconfig @@ -43,6 +43,10 @@ CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x960000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mp_rsb3720a1_6G_defconfig b/configs/imx8mp_rsb3720a1_6G_defconfig index 90800abf923..df35dcbb762 100644 --- a/configs/imx8mp_rsb3720a1_6G_defconfig +++ b/configs/imx8mp_rsb3720a1_6G_defconfig @@ -43,6 +43,10 @@ CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x960000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mp_venice_defconfig b/configs/imx8mp_venice_defconfig index 5367ea8489e..cef5f26d0ba 100644 --- a/configs/imx8mp_venice_defconfig +++ b/configs/imx8mp_venice_defconfig @@ -39,6 +39,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x960000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mq_cm_defconfig b/configs/imx8mq_cm_defconfig index 4c25e95ab72..cd1ee4d9e70 100644 --- a/configs/imx8mq_cm_defconfig +++ b/configs/imx8mq_cm_defconfig @@ -34,6 +34,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x187ff0 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index 6d64f1e5181..4747bff6274 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -36,6 +36,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x187ff0 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8mq_phanbell_defconfig b/configs/imx8mq_phanbell_defconfig index 212ff07eee7..2c566e068fd 100644 --- a/configs/imx8mq_phanbell_defconfig +++ b/configs/imx8mq_phanbell_defconfig @@ -38,6 +38,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x187ff0 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig index abe074de841..89e289a3b9e 100644 --- a/configs/imx8qm_mek_defconfig +++ b/configs/imx8qm_mek_defconfig @@ -38,6 +38,10 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x13e000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x120000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x3000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 CONFIG_SPL_POWER_DOMAIN=y diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index eda7739acb4..5c361780267 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -38,6 +38,10 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x13e000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x120000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x3000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 CONFIG_SPL_POWER_DOMAIN=y diff --git a/configs/imx8ulp_evk_defconfig b/configs/imx8ulp_evk_defconfig index c08197572a5..d885206a472 100644 --- a/configs/imx8ulp_evk_defconfig +++ b/configs/imx8ulp_evk_defconfig @@ -35,6 +35,10 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x22050000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x22040000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x8000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_WATCHDOG=y diff --git a/configs/iot2050_defconfig b/configs/iot2050_defconfig index 10f2cf4f814..b50b5d09382 100644 --- a/configs/iot2050_defconfig +++ b/configs/iot2050_defconfig @@ -40,6 +40,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 CONFIG_SPL_DM_MAILBOX=y diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig index af7a30db61f..82842596045 100644 --- a/configs/j7200_evm_a72_defconfig +++ b/configs/j7200_evm_a72_defconfig @@ -41,6 +41,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 CONFIG_SPL_DMA=y diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig index 4e82e092d6b..a0f9f20f2f5 100644 --- a/configs/j7200_evm_r5_defconfig +++ b/configs/j7200_evm_r5_defconfig @@ -37,6 +37,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0xa000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x84000000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000 CONFIG_SPL_EARLY_BSS=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index 202ef8825af..4cb4adb25b2 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -38,6 +38,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 CONFIG_SPL_DMA=y diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index 6df4deac3e4..385e77d846d 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -37,6 +37,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0xa000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x84000000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000 CONFIG_SPL_EARLY_BSS=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 diff --git a/configs/j721e_hs_evm_a72_defconfig b/configs/j721e_hs_evm_a72_defconfig index 161c2ecfb3c..0f803b83039 100644 --- a/configs/j721e_hs_evm_a72_defconfig +++ b/configs/j721e_hs_evm_a72_defconfig @@ -39,6 +39,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_I2C=y diff --git a/configs/j721e_hs_evm_r5_defconfig b/configs/j721e_hs_evm_r5_defconfig index ea1cc86a3bf..02a66652238 100644 --- a/configs/j721e_hs_evm_r5_defconfig +++ b/configs/j721e_hs_evm_r5_defconfig @@ -37,6 +37,10 @@ CONFIG_SPL_BSS_START_ADDR=0x41cf5bfc CONFIG_SPL_BSS_MAX_SIZE=0xa000 CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x84000000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000 CONFIG_SPL_EARLY_BSS=y CONFIG_SPL_DMA=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig index 7903addb3d1..14dfb6946f6 100644 --- a/configs/j721s2_evm_a72_defconfig +++ b/configs/j721s2_evm_a72_defconfig @@ -41,6 +41,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 CONFIG_SPL_DMA=y diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig index 1a548e7cda9..fb6e69197d1 100644 --- a/configs/j721s2_evm_r5_defconfig +++ b/configs/j721s2_evm_r5_defconfig @@ -43,6 +43,10 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x84000000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000 CONFIG_SPL_EARLY_BSS=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig index e0f32a5d63f..b0c7ea3b994 100644 --- a/configs/jetson-tk1_defconfig +++ b/configs/jetson-tk1_defconfig @@ -18,6 +18,10 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x800ffffc +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80090000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x10000 CONFIG_SYS_PROMPT="Tegra124 (Jetson TK1) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2089 diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index e26bf3a2b47..9423b453c05 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -35,6 +35,8 @@ CONFIG_SPL_BSS_START_ADDR=0xc10fff8 CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xc1223f4 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x8000 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index e3f023690ea..10150f5d642 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -34,6 +34,8 @@ CONFIG_SPL_BSS_START_ADDR=0xc0afff8 CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xc0c23f4 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x8000 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index f27873f558c..2a2fb1d0717 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -35,6 +35,8 @@ CONFIG_SPL_BSS_START_ADDR=0xc20fff8 CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xc2223f4 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x8000 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index b48feb2719d..906e1042070 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -35,6 +35,8 @@ CONFIG_SPL_BSS_START_ADDR=0xc10fff8 CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xc1223f4 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x8000 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/kontron-sl-mx6ul_defconfig b/configs/kontron-sl-mx6ul_defconfig index 1ba4d1fca84..efa7a06886a 100644 --- a/configs/kontron-sl-mx6ul_defconfig +++ b/configs/kontron-sl-mx6ul_defconfig @@ -28,6 +28,7 @@ CONFIG_BOARD_TYPES=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_LEGACY_IMAGE_FORMAT=y CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig index a2584c606f8..0fceb60c612 100644 --- a/configs/kontron-sl-mx8mm_defconfig +++ b/configs/kontron-sl-mx8mm_defconfig @@ -33,6 +33,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x91fff0 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 # CONFIG_SPL_FIT_IMAGE_TINY is not set diff --git a/configs/kontron_pitx_imx8m_defconfig b/configs/kontron_pitx_imx8m_defconfig index e8f653bf817..27a89f9b1b6 100644 --- a/configs/kontron_pitx_imx8m_defconfig +++ b/configs/kontron_pitx_imx8m_defconfig @@ -36,6 +36,10 @@ CONFIG_SPL_BSS_START_ADDR=0x180000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x187ff0 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/kontron_sl28_defconfig b/configs/kontron_sl28_defconfig index 05627bb7dc7..aaabb14f91a 100644 --- a/configs/kontron_sl28_defconfig +++ b/configs/kontron_sl28_defconfig @@ -44,6 +44,7 @@ CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x18009ff0 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x230000 diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig index 012a5c492ed..8c5010d6052 100644 --- a/configs/kp_imx6q_tpc_defconfig +++ b/configs/kp_imx6q_tpc_defconfig @@ -27,6 +27,7 @@ CONFIG_AUTOBOOT_STOP_STR="." # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SPL_RAW_IMAGE_SUPPORT=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/liteboard_defconfig b/configs/liteboard_defconfig index 334b22ac8ab..24e71bb48d8 100644 --- a/configs/liteboard_defconfig +++ b/configs/liteboard_defconfig @@ -24,6 +24,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev};if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_DEFAULT_FDT_FILE="imx6ul-liteboard.dtb" CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig index 4bfc5aae58b..d34897a5080 100644 --- a/configs/ls1021aiot_sdcard_defconfig +++ b/configs/ls1021aiot_sdcard_defconfig @@ -39,6 +39,9 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x1001d000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x82080000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index fb3447cc470..cfa81baff60 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -49,6 +49,9 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x1001d000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80200000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index 6e686c65e08..164e8b01768 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -48,6 +48,9 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x1001d000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x820c0000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index 318f4f5dd63..8a6357b0b21 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -47,6 +47,9 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x1001d000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x820c0000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig index 35a383ce572..5e93f730b32 100644 --- a/configs/ls1021atsn_sdcard_defconfig +++ b/configs/ls1021atsn_sdcard_defconfig @@ -41,6 +41,9 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x1001d000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x82100000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index d4d2e8b6530..f16c156490d 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -48,6 +48,9 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x1001d000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x82104000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index eaafb72bcea..c9a265d7819 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -49,6 +49,9 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x1001d000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x82100000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index a82098e243b..e4f2b858235 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -50,6 +50,9 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x1001d000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x82100000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index a8d392de098..1fe04fe769e 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -55,6 +55,9 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x1001d000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80200000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index b284f62f1e3..21231cb416f 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -56,6 +56,7 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x1001e000 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index ad0ec877f07..79914587277 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -56,6 +56,7 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x1001e000 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index 0b96c451a9b..401bc393b23 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -39,6 +39,9 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x1001d000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80200000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index c19ae3bc811..3c5e5ce0ae8 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -45,6 +45,9 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x1001d000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80200000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index e18ab7aadcb..9d29c365c6e 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x1001e000 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index 3f1868e92fb..0c348615fa3 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -46,6 +46,7 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x1001e000 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig index 39f52c37872..d63e5a53e4f 100644 --- a/configs/ls1046aqds_nand_defconfig +++ b/configs/ls1046aqds_nand_defconfig @@ -56,6 +56,7 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x1001f000 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index a9fb89fb918..0fa3ea1c360 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -57,6 +57,7 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x10020000 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index 37a11070848..e55712fce1f 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -57,6 +57,7 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x10020000 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig index 7b42e8d9ddb..9cba997eb43 100644 --- a/configs/ls1046ardb_emmc_defconfig +++ b/configs/ls1046ardb_emmc_defconfig @@ -47,6 +47,7 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x10020000 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig index ac8cd7c2de7..c081b786a12 100644 --- a/configs/ls1046ardb_qspi_spl_defconfig +++ b/configs/ls1046ardb_qspi_spl_defconfig @@ -50,6 +50,7 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x10020000 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig index 0679d94dc75..4301d38eb77 100644 --- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -44,6 +44,7 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x10020000 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig index 17378cbddff..50efffa442f 100644 --- a/configs/ls1046ardb_sdcard_defconfig +++ b/configs/ls1046ardb_sdcard_defconfig @@ -47,6 +47,7 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x10020000 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig index 0cc3d429a37..b2e8132446d 100644 --- a/configs/ls1088aqds_sdcard_ifc_defconfig +++ b/configs/ls1088aqds_sdcard_ifc_defconfig @@ -47,6 +47,7 @@ CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x18009ff0 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig index 89911ae3557..40306d612a4 100644 --- a/configs/ls1088aqds_sdcard_qspi_defconfig +++ b/configs/ls1088aqds_sdcard_qspi_defconfig @@ -48,6 +48,7 @@ CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x18009ff0 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig index 0fec4f384ae..bc44ede08c7 100644 --- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig @@ -48,6 +48,7 @@ CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x18009ff0 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig index a3702899aac..ad0e583188b 100644 --- a/configs/ls1088ardb_sdcard_qspi_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_defconfig @@ -49,6 +49,7 @@ CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x18009ff0 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index 65558911f15..209202dc75d 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x18009ff0 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig index 590eba601d7..0f40fa60f18 100644 --- a/configs/ls2080aqds_sdcard_defconfig +++ b/configs/ls2080aqds_sdcard_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x18009ff0 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index 17fe433a54a..f36cf47cff2 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -46,6 +46,7 @@ CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x18009ff0 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig index 3718d08b670..1214163af39 100644 --- a/configs/mccmon6_nor_defconfig +++ b/configs/mccmon6_nor_defconfig @@ -24,6 +24,7 @@ CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig index 3228050dd20..6984256a1c2 100644 --- a/configs/mccmon6_sd_defconfig +++ b/configs/mccmon6_sd_defconfig @@ -25,6 +25,7 @@ CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/medcom-wide_defconfig b/configs/medcom-wide_defconfig index 855b88b75a6..dd402f286ba 100644 --- a/configs/medcom-wide_defconfig +++ b/configs/medcom-wide_defconfig @@ -17,6 +17,10 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xffffc +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x90000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x10000 CONFIG_SYS_PROMPT="Tegra20 (Medcom-Wide) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2089 diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index 41122ade90e..d68335b5b68 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="if hdmidet; then usb start; setenv stdin serial,usbkbd; setenv stdout serial,vidconsole; setenv stderr serial,vidconsole; else setenv stdin serial; setenv stdout serial; setenv stderr serial; fi;" CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y diff --git a/configs/mx6memcal_defconfig b/configs/mx6memcal_defconfig index d555dbf7b1b..a1bc95bb4a1 100644 --- a/configs/mx6memcal_defconfig +++ b/configs/mx6memcal_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL=y CONFIG_SYS_MEMTEST_START=0x10000000 CONFIG_SYS_MEMTEST_END=0x20000000 CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig index 3d2e906f934..900fbf7ca71 100644 --- a/configs/mx6sabreauto_defconfig +++ b/configs/mx6sabreauto_defconfig @@ -33,6 +33,7 @@ CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};if mmc rescan; then if run loa CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SPL_LEGACY_IMAGE_FORMAT=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index 33d8db9dff2..15dbaf848cd 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};if mmc rescan; then if run loa CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SPL_LEGACY_IMAGE_FORMAT=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig index 24407c113d6..c05c33d0df8 100644 --- a/configs/mx6slevk_spl_defconfig +++ b/configs/mx6slevk_spl_defconfig @@ -25,6 +25,7 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig index 065ead0a7ad..10f6b4f099a 100644 --- a/configs/mx6ul_14x14_evk_defconfig +++ b/configs/mx6ul_14x14_evk_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc resc # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig index 2f46b68cbe9..de77e4fed6d 100644 --- a/configs/mx6ul_9x9_evk_defconfig +++ b/configs/mx6ul_9x9_evk_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc resc # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y diff --git a/configs/myir_mys_6ulx_defconfig b/configs/myir_mys_6ulx_defconfig index f5ccf669f29..f748b4dd66b 100644 --- a/configs/myir_mys_6ulx_defconfig +++ b/configs/myir_mys_6ulx_defconfig @@ -19,6 +19,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_USB_HOST=y diff --git a/configs/novena_defconfig b/configs/novena_defconfig index 215aaa605b5..77d7afa6df8 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -31,6 +31,7 @@ CONFIG_BOOTARGS="console=ttymxc1,115200 " CONFIG_BOOTCOMMAND="run distro_bootcmd ; run net_nfs" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig index 1ffddbe35e3..489ff63595c 100644 --- a/configs/nyan-big_defconfig +++ b/configs/nyan-big_defconfig @@ -27,6 +27,10 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0xef8100 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x800ffffc +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80090000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x10000 CONFIG_SYS_PROMPT="Tegra124 (Nyan-big) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2087 diff --git a/configs/omap35_logic_defconfig b/configs/omap35_logic_defconfig index d4b24f4cbd4..e5fcba8caf1 100644 --- a/configs/omap35_logic_defconfig +++ b/configs/omap35_logic_defconfig @@ -24,6 +24,8 @@ CONFIG_DEFAULT_FDT_FILE="logicpd-torpedo-35xx-devkit.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set # CONFIG_SPL_FS_EXT4 is not set # CONFIG_SPL_I2C is not set diff --git a/configs/omap35_logic_somlv_defconfig b/configs/omap35_logic_somlv_defconfig index 778b15f05a2..45aee91b372 100644 --- a/configs/omap35_logic_somlv_defconfig +++ b/configs/omap35_logic_somlv_defconfig @@ -25,6 +25,8 @@ CONFIG_DEFAULT_FDT_FILE="logicpd-som-lv-35xx-devkit.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set # CONFIG_SPL_FS_EXT4 is not set # CONFIG_SPL_I2C is not set diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig index abd15b4d1af..54793807864 100644 --- a/configs/omap3_beagle_defconfig +++ b/configs/omap3_beagle_defconfig @@ -18,6 +18,8 @@ CONFIG_DEFAULT_FDT_FILE="omap3-beagle.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 # CONFIG_SPL_FS_EXT4 is not set CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig index d981ee5d7a8..78b7a69ea35 100644 --- a/configs/omap3_evm_defconfig +++ b/configs/omap3_evm_defconfig @@ -18,6 +18,8 @@ CONFIG_DEFAULT_FDT_FILE="omap3-evm.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 # CONFIG_SPL_FS_EXT4 is not set CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index 19a4da16101..9b2a8064449 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -23,6 +23,8 @@ CONFIG_PREBOOT="setenv preboot;saveenv;" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set # CONFIG_SPL_FS_EXT4 is not set # CONFIG_SPL_I2C is not set diff --git a/configs/omap3_logic_somlv_defconfig b/configs/omap3_logic_somlv_defconfig index 0f353bf3e09..ee36800d647 100644 --- a/configs/omap3_logic_somlv_defconfig +++ b/configs/omap3_logic_somlv_defconfig @@ -25,6 +25,8 @@ CONFIG_DEFAULT_FDT_FILE="logicpd-som-lv-37xx-devkit.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set # CONFIG_SPL_FS_EXT4 is not set # CONFIG_SPL_I2C is not set diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig index 23599cf845c..c51627dcf9c 100644 --- a/configs/omap4_panda_defconfig +++ b/configs/omap4_panda_defconfig @@ -14,6 +14,8 @@ CONFIG_DEFAULT_FDT_FILE="omap4-panda.dtb" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_MAX_SIZE=0xbc00 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 # CONFIG_SPL_FS_EXT4 is not set # CONFIG_SPL_I2C is not set # CONFIG_SPL_NAND_SUPPORT is not set diff --git a/configs/omap4_sdp4430_defconfig b/configs/omap4_sdp4430_defconfig index d43262a8745..62eb75d1f9a 100644 --- a/configs/omap4_sdp4430_defconfig +++ b/configs/omap4_sdp4430_defconfig @@ -18,6 +18,8 @@ CONFIG_DEFAULT_FDT_FILE="omap4-sdp.dtb" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_MAX_SIZE=0xbc00 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 # CONFIG_SPL_I2C is not set # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SYS_MAXARGS=64 diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig index 53ae1e65195..03b874576df 100644 --- a/configs/omap5_uevm_defconfig +++ b/configs/omap5_uevm_defconfig @@ -17,6 +17,8 @@ CONFIG_BOOTCOMMAND="if test ${dofastboot} -eq 1; then echo Boot fastboot request CONFIG_DEFAULT_FDT_FILE="omap5-uevm.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_MAX_SIZE=0x1dc00 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index 65ece99ea46..b45f6d8564e 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -41,6 +41,10 @@ CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x8001ff00 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xc0f70000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x110000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xb5 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y diff --git a/configs/openpiton_riscv64_spl_defconfig b/configs/openpiton_riscv64_spl_defconfig index 54c59a3a35e..bf0e09b73c8 100644 --- a/configs/openpiton_riscv64_spl_defconfig +++ b/configs/openpiton_riscv64_spl_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_BSS_START_ADDR=0x82000000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x83fffe80 +CONFIG_SYS_SPL_MALLOC=y # CONFIG_SPL_BANNER_PRINT is not set CONFIG_SPL_CPU=y CONFIG_SPL_FS_EXT4=y diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig index 8b0b4c33e14..1c1daf86a3b 100644 --- a/configs/opos6uldev_defconfig +++ b/configs/opos6uldev_defconfig @@ -31,6 +31,7 @@ CONFIG_DEFAULT_FDT_FILE="imx6ul-opos6uldev.dtb" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SPL_BOARD_INIT=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y diff --git a/configs/paz00_defconfig b/configs/paz00_defconfig index 091c9a2b484..0aa8a7673a3 100644 --- a/configs/paz00_defconfig +++ b/configs/paz00_defconfig @@ -16,6 +16,10 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xffffc +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x90000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x10000 CONFIG_SYS_PROMPT="Tegra20 (Paz00) MOD # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2087 diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig index 54bef4e062e..132942bf554 100644 --- a/configs/pcm058_defconfig +++ b/configs/pcm058_defconfig @@ -30,6 +30,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run mmcboot;run nandboot" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_BOARD_INIT=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x18a CONFIG_SPL_DMA=y CONFIG_SPL_FS_EXT4=y diff --git a/configs/phycore-am335x-r2-regor_defconfig b/configs/phycore-am335x-r2-regor_defconfig index 87ab811946c..27342294f79 100644 --- a/configs/phycore-am335x-r2-regor_defconfig +++ b/configs/phycore-am335x-r2-regor_defconfig @@ -24,6 +24,8 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="am335x-regor-rdk.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_I2C=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y diff --git a/configs/phycore-am335x-r2-wega_defconfig b/configs/phycore-am335x-r2-wega_defconfig index 0bd348b5f0f..95905b4ba4c 100644 --- a/configs/phycore-am335x-r2-wega_defconfig +++ b/configs/phycore-am335x-r2-wega_defconfig @@ -24,6 +24,8 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="am335x-wega-rdk.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_I2C=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig index 8192cc233e9..b8cda9f64f2 100644 --- a/configs/phycore-imx8mm_defconfig +++ b/configs/phycore-imx8mm_defconfig @@ -33,6 +33,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x920000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig index 42172f31de6..d10ab2a22c1 100644 --- a/configs/phycore-imx8mp_defconfig +++ b/configs/phycore-imx8mp_defconfig @@ -36,6 +36,10 @@ CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x960000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/phycore_pcl063_defconfig b/configs/phycore_pcl063_defconfig index 6dcb789609f..b9d2a976636 100644 --- a/configs/phycore_pcl063_defconfig +++ b/configs/phycore_pcl063_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/phycore_pcl063_ull_defconfig b/configs/phycore_pcl063_ull_defconfig index e40ca07b7c0..f172b065bfc 100644 --- a/configs/phycore_pcl063_ull_defconfig +++ b/configs/phycore_pcl063_ull_defconfig @@ -18,6 +18,7 @@ CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run mmc_mmc_fit" CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/pico-dwarf-imx6ul_defconfig b/configs/pico-dwarf-imx6ul_defconfig index 15dc2098ad4..18373600a40 100644 --- a/configs/pico-dwarf-imx6ul_defconfig +++ b/configs/pico-dwarf-imx6ul_defconfig @@ -25,6 +25,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx6ul-pico-dwarf.dtb" CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y diff --git a/configs/pico-dwarf-imx7d_defconfig b/configs/pico-dwarf-imx7d_defconfig index 187a269302a..e27b5626a3a 100644 --- a/configs/pico-dwarf-imx7d_defconfig +++ b/configs/pico-dwarf-imx7d_defconfig @@ -28,6 +28,7 @@ CONFIG_DEFAULT_FDT_FILE="imx7d-pico-dwarf.dtb" CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_MAX_SIZE=0x100000 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pico-hobbit-imx6ul_defconfig b/configs/pico-hobbit-imx6ul_defconfig index eeb95d431db..f8754092fff 100644 --- a/configs/pico-hobbit-imx6ul_defconfig +++ b/configs/pico-hobbit-imx6ul_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx6ul-pico-hobbit.dtb" CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig index 38eb71523b3..275a3a0d1f6 100644 --- a/configs/pico-hobbit-imx7d_defconfig +++ b/configs/pico-hobbit-imx7d_defconfig @@ -28,6 +28,7 @@ CONFIG_DEFAULT_FDT_FILE="imx7d-pico-hobbit.dtb" CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_MAX_SIZE=0x100000 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pico-imx6_defconfig b/configs/pico-imx6_defconfig index 09809542606..086b3ee3ab2 100644 --- a/configs/pico-imx6_defconfig +++ b/configs/pico-imx6_defconfig @@ -27,6 +27,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_BOOTCOMMAND="run default_boot" CONFIG_DEFAULT_FDT_FILE="ask" CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig index 7e923d0bc02..aeda4557436 100644 --- a/configs/pico-imx6ul_defconfig +++ b/configs/pico-imx6ul_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="ask" CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y diff --git a/configs/pico-imx7d_bl33_defconfig b/configs/pico-imx7d_bl33_defconfig index 7f1d215e490..13a7fcf1759 100644 --- a/configs/pico-imx7d_bl33_defconfig +++ b/configs/pico-imx7d_bl33_defconfig @@ -29,6 +29,7 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_MAX_SIZE=0x100000 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig index d79d3ea2ed1..3181964cdd4 100644 --- a/configs/pico-imx7d_defconfig +++ b/configs/pico-imx7d_defconfig @@ -28,6 +28,7 @@ CONFIG_DEFAULT_FDT_FILE="ask" CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_MAX_SIZE=0x100000 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pico-imx8mq_defconfig b/configs/pico-imx8mq_defconfig index 5b4f591ec4c..8e27f723142 100644 --- a/configs/pico-imx8mq_defconfig +++ b/configs/pico-imx8mq_defconfig @@ -37,6 +37,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x187ff0 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/pico-nymph-imx7d_defconfig b/configs/pico-nymph-imx7d_defconfig index 187a269302a..e27b5626a3a 100644 --- a/configs/pico-nymph-imx7d_defconfig +++ b/configs/pico-nymph-imx7d_defconfig @@ -28,6 +28,7 @@ CONFIG_DEFAULT_FDT_FILE="imx7d-pico-dwarf.dtb" CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_MAX_SIZE=0x100000 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/pico-pi-imx6ul_defconfig b/configs/pico-pi-imx6ul_defconfig index 2cc6d4f8bed..bb085678c7c 100644 --- a/configs/pico-pi-imx6ul_defconfig +++ b/configs/pico-pi-imx6ul_defconfig @@ -26,6 +26,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx6ul-pico-pi.dtb" CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig index daf91029f3b..1a052a40227 100644 --- a/configs/pico-pi-imx7d_defconfig +++ b/configs/pico-pi-imx7d_defconfig @@ -28,6 +28,7 @@ CONFIG_DEFAULT_FDT_FILE="imx7d-pico-pi.dtb" CONFIG_SPL_MAX_SIZE=0xe000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_MAX_SIZE=0x100000 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_I2C=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/plutux_defconfig b/configs/plutux_defconfig index fe59c10b192..ad1853f05e2 100644 --- a/configs/plutux_defconfig +++ b/configs/plutux_defconfig @@ -18,6 +18,10 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xffffc +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x90000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x10000 CONFIG_SYS_PROMPT="Tegra20 (Plutux) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2084 diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig index a36192a978b..8dfd51e25b8 100644 --- a/configs/pxm2_defconfig +++ b/configs/pxm2_defconfig @@ -37,6 +37,9 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_BSS_START_ADDR=0x80000000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80208000 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig index c836cc0c2aa..2bc7b9fbd0f 100644 --- a/configs/qemu-riscv32_spl_defconfig +++ b/configs/qemu-riscv32_spl_defconfig @@ -17,6 +17,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x84000000 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_CMD_MII is not set diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig index ce66a8e8df5..e39accf9400 100644 --- a/configs/qemu-riscv64_spl_defconfig +++ b/configs/qemu-riscv64_spl_defconfig @@ -17,6 +17,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x84000000 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_CMD_MII is not set diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig index 269416f2aa4..9f27592088c 100644 --- a/configs/rastaban_defconfig +++ b/configs/rastaban_defconfig @@ -37,6 +37,9 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_BSS_START_ADDR=0x80000000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80208000 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig index 8e74a1f087f..8fe264d7543 100644 --- a/configs/riotboard_defconfig +++ b/configs/riotboard_defconfig @@ -28,6 +28,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_RAW_IMAGE_SUPPORT=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_FS_LOAD_ARGS_NAME="imx6dl-riotboard.dtb" diff --git a/configs/rut_defconfig b/configs/rut_defconfig index 8ef538661c1..1b91d8b5ab8 100644 --- a/configs/rut_defconfig +++ b/configs/rut_defconfig @@ -37,6 +37,9 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_BSS_START_ADDR=0x80000000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80208000 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/sama5d27_giantboard_defconfig b/configs/sama5d27_giantboard_defconfig index d7813a533cc..4ab7831742d 100644 --- a/configs/sama5d27_giantboard_defconfig +++ b/configs/sama5d27_giantboard_defconfig @@ -44,6 +44,8 @@ CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig index ebebc7f3210..e29a8380e44 100644 --- a/configs/sama5d27_som1_ek_mmc1_defconfig +++ b/configs/sama5d27_som1_ek_mmc1_defconfig @@ -40,6 +40,8 @@ CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig index 13cf4e50749..c807387457b 100644 --- a/configs/sama5d27_som1_ek_mmc_defconfig +++ b/configs/sama5d27_som1_ek_mmc_defconfig @@ -41,6 +41,8 @@ CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig index e869f67440d..500798eee22 100644 --- a/configs/sama5d27_som1_ek_qspiflash_defconfig +++ b/configs/sama5d27_som1_ek_qspiflash_defconfig @@ -39,6 +39,8 @@ CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig index df88f6b78d3..b5d5c34d9b0 100644 --- a/configs/sama5d27_wlsom1_ek_mmc_defconfig +++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig @@ -40,6 +40,8 @@ CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SPL_DISPLAY_PRINT=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_AT91_MCK_BYPASS=y diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig index 60ed74a0300..983e5045565 100644 --- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig +++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig @@ -40,6 +40,8 @@ CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SPL_DISPLAY_PRINT=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_DM_SPI_FLASH=y diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig index 119f15a5d20..8d4698ef320 100644 --- a/configs/sama5d2_icp_mmc_defconfig +++ b/configs/sama5d2_icp_mmc_defconfig @@ -39,6 +39,8 @@ CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SPL_DISPLAY_PRINT=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_RAM_SUPPORT=y diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig index 1d078cb21e5..2891cc5a7f7 100644 --- a/configs/sama5d2_xplained_emmc_defconfig +++ b/configs/sama5d2_xplained_emmc_defconfig @@ -39,6 +39,8 @@ CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index 0df30048900..600cb0cbd8b 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -41,6 +41,8 @@ CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig index 9bb838ca893..4f9062628af 100644 --- a/configs/sama5d2_xplained_qspiflash_defconfig +++ b/configs/sama5d2_xplained_qspiflash_defconfig @@ -42,6 +42,8 @@ CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index 323846c1bba..0041294797b 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -43,6 +43,8 @@ CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index cd1e66d2557..42f6053e595 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -40,6 +40,8 @@ CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x318000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index 7541f4fa21e..b1fe27a9a03 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -37,6 +37,8 @@ CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x318000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index e4cc446fe08..39e6a4e7937 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -42,6 +42,8 @@ CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x318000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index c4f3badcf84..d4a6243cdc8 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -39,6 +39,8 @@ CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x318000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index 2754920e33c..ae47d921602 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -42,6 +42,8 @@ CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x318000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index 2227abc837b..c1623df8649 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -41,6 +41,8 @@ CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index 9304ef173b4..b1265331c8a 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -38,6 +38,8 @@ CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index b69b32ed384..ec79771ee7c 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -43,6 +43,8 @@ CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig index e0779d07fcb..b25df5c94c1 100644 --- a/configs/sama5d4ek_mmc_defconfig +++ b/configs/sama5d4ek_mmc_defconfig @@ -42,6 +42,8 @@ CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig index 386e30ba850..a3bfee316da 100644 --- a/configs/sama5d4ek_nandflash_defconfig +++ b/configs/sama5d4ek_nandflash_defconfig @@ -39,6 +39,8 @@ CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig index b0d76d2bc83..06e5bb2e032 100644 --- a/configs/sama5d4ek_spiflash_defconfig +++ b/configs/sama5d4ek_spiflash_defconfig @@ -42,6 +42,8 @@ CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x218000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig index ea97dcf57a4..f9864febcb0 100644 --- a/configs/seaboard_defconfig +++ b/configs/seaboard_defconfig @@ -16,6 +16,10 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xffffc +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x90000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x10000 CONFIG_SYS_PROMPT="Tegra20 (SeaBoard) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2086 diff --git a/configs/seeed_npi_imx6ull_defconfig b/configs/seeed_npi_imx6ull_defconfig index 8fb5590c1eb..e12a7d85060 100644 --- a/configs/seeed_npi_imx6ull_defconfig +++ b/configs/seeed_npi_imx6ull_defconfig @@ -20,6 +20,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_DMA=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_USB_HOST=y diff --git a/configs/sifive_unleashed_defconfig b/configs/sifive_unleashed_defconfig index 10c69345a41..84bc49c0f23 100644 --- a/configs/sifive_unleashed_defconfig +++ b/configs/sifive_unleashed_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x85000000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x81cfe70 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig index 23f8a4fb807..02d4e54b071 100644 --- a/configs/sifive_unmatched_defconfig +++ b/configs/sifive_unmatched_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x85000000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x81cfe60 +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig index 990bd9d3441..57c5218d4b0 100644 --- a/configs/smartweb_defconfig +++ b/configs/smartweb_defconfig @@ -39,6 +39,8 @@ CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x301000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x460000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_RAW_ONLY=y CONFIG_SPL_NAND_DRIVERS=y diff --git a/configs/sniper_defconfig b/configs/sniper_defconfig index 7de3081a2d9..e2725f4a22f 100644 --- a/configs/sniper_defconfig +++ b/configs/sniper_defconfig @@ -17,6 +17,9 @@ CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_BSS_START_ADDR=0x80000000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x4020fffc +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80208000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=2 diff --git a/configs/socfpga_agilex_atf_defconfig b/configs/socfpga_agilex_atf_defconfig index 5fdacb34d17..ebe90ce2a5b 100644 --- a/configs/socfpga_agilex_atf_defconfig +++ b/configs/socfpga_agilex_atf_defconfig @@ -33,6 +33,10 @@ CONFIG_SPL_BSS_START_ADDR=0x3ff00000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xffe3f000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x3fa00000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x500000 CONFIG_SPL_CRC32=y CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig index 0953ea10af9..ab853594631 100644 --- a/configs/socfpga_agilex_defconfig +++ b/configs/socfpga_agilex_defconfig @@ -30,6 +30,10 @@ CONFIG_SPL_BSS_START_ADDR=0x3ff00000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xffe3f000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x3fa00000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x500000 CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000 diff --git a/configs/socfpga_agilex_vab_defconfig b/configs/socfpga_agilex_vab_defconfig index c0384c24e5e..fa4beddb2dc 100644 --- a/configs/socfpga_agilex_vab_defconfig +++ b/configs/socfpga_agilex_vab_defconfig @@ -34,6 +34,10 @@ CONFIG_SPL_BSS_START_ADDR=0x3ff00000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xffe3f000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x3fa00000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x500000 CONFIG_SPL_CRC32=y CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig index 8b8d7e4968e..c98c106851f 100644 --- a/configs/socfpga_arria10_defconfig +++ b/configs/socfpga_arria10_defconfig @@ -30,6 +30,10 @@ CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xffe2b000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xffe2b000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x15000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_FPGA=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/socfpga_n5x_atf_defconfig b/configs/socfpga_n5x_atf_defconfig index 0fac9fbe840..dd0ad36b4b6 100644 --- a/configs/socfpga_n5x_atf_defconfig +++ b/configs/socfpga_n5x_atf_defconfig @@ -32,6 +32,10 @@ CONFIG_SPL_BSS_START_ADDR=0x3ff00000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xffe3f000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x3fa00000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x500000 CONFIG_SPL_CRC32=y CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/socfpga_n5x_defconfig b/configs/socfpga_n5x_defconfig index 0904e6a6a38..f0d41d1e8f5 100644 --- a/configs/socfpga_n5x_defconfig +++ b/configs/socfpga_n5x_defconfig @@ -27,6 +27,10 @@ CONFIG_SPL_BSS_START_ADDR=0x3ff00000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xffe3f000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x3fa00000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x500000 CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000 diff --git a/configs/socfpga_n5x_vab_defconfig b/configs/socfpga_n5x_vab_defconfig index 69811fb7223..f7a827f770c 100644 --- a/configs/socfpga_n5x_vab_defconfig +++ b/configs/socfpga_n5x_vab_defconfig @@ -33,6 +33,10 @@ CONFIG_SPL_BSS_START_ADDR=0x3ff00000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xffe3f000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x3fa00000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x500000 CONFIG_SPL_CRC32=y CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/socfpga_stratix10_atf_defconfig b/configs/socfpga_stratix10_atf_defconfig index 2ffc7ac7658..39ec1b2b114 100644 --- a/configs/socfpga_stratix10_atf_defconfig +++ b/configs/socfpga_stratix10_atf_defconfig @@ -33,6 +33,10 @@ CONFIG_SPL_BSS_START_ADDR=0x3ff00000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xffe3f000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x3fa00000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x500000 CONFIG_SPL_CRC32=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000 diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index 38d87076baa..fac82b88c3f 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -32,6 +32,10 @@ CONFIG_SPL_BSS_START_ADDR=0x3ff00000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xffe3f000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x3fa00000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x500000 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x3C00000 CONFIG_HUSH_PARSER=y diff --git a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig index fe722ce507b..9441b8c3b1c 100644 --- a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig @@ -21,6 +21,10 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x3db00 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x30000000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xc0300000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1d00000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig index f47bc1b2341..96162854523 100644 --- a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig @@ -21,6 +21,10 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x3db00 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x30000000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xc0300000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1d00000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig index 9ddd585ecf0..354a43cf55e 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig @@ -21,6 +21,10 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x3db00 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x30000000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xc0300000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1d00000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig index 86d55478f5a..a601477d127 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig @@ -21,6 +21,10 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x3db00 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x30000000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xc0300000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1d00000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index be49a8e7712..662754128da 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -31,6 +31,10 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x3db00 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x30000000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xc0300000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1d00000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index fa3cff00cea..38f16437aa3 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -32,6 +32,10 @@ CONFIG_SPL_MAX_FOOTPRINT=0x3db00 CONFIG_SPL_LEGACY_IMAGE_FORMAT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x30000000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xc0300000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1d00000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index 9f32d2c4e81..869afdf6c80 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -30,6 +30,10 @@ CONFIG_SPL_MAX_FOOTPRINT=0x3db00 CONFIG_SPL_LEGACY_IMAGE_FORMAT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x30000000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xc0300000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1d00000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig index 9bebe7046ec..0baf6dd886a 100644 --- a/configs/syzygy_hub_defconfig +++ b/configs/syzygy_hub_defconfig @@ -32,6 +32,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL_STACK_R=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x2000000 CONFIG_SPL_FS_LOAD_ARGS_NAME="system.dtb" CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig index da241f1be71..c0a4dcc271d 100644 --- a/configs/taurus_defconfig +++ b/configs/taurus_defconfig @@ -48,6 +48,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0x600 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x304000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x20ba0000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x460000 CONFIG_SPL_CRC32=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_RAW_ONLY=y diff --git a/configs/tec-ng_defconfig b/configs/tec-ng_defconfig index cb80b10aecf..191b2c08509 100644 --- a/configs/tec-ng_defconfig +++ b/configs/tec-ng_defconfig @@ -18,6 +18,10 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x800ffffc +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80090000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x10000 CONFIG_SYS_PROMPT="Tegra30 (TEC-NG) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2084 diff --git a/configs/tec_defconfig b/configs/tec_defconfig index 80fbdda5d1c..9fed0eaed13 100644 --- a/configs/tec_defconfig +++ b/configs/tec_defconfig @@ -17,6 +17,10 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xffffc +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x90000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x10000 CONFIG_SYS_PROMPT="Tegra20 (TEC) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2081 diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig index 2f0a1c666a9..0a6b0e88b3f 100644 --- a/configs/thuban_defconfig +++ b/configs/thuban_defconfig @@ -37,6 +37,9 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_BSS_START_ADDR=0x80000000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80208000 CONFIG_SPL_I2C=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig index 243492a9529..54c1d80e510 100644 --- a/configs/ti816x_evm_defconfig +++ b/configs/ti816x_evm_defconfig @@ -30,6 +30,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_MISC_INIT_R is not set CONFIG_SPL_MAX_SIZE=0xfff1b400 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig index fba9f646122..a11a17905cb 100644 --- a/configs/topic_miami_defconfig +++ b/configs/topic_miami_defconfig @@ -32,6 +32,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL_STACK_R=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x2000000 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SYS_PROMPT="zynq-uboot> " diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig index a809bf3c4f9..f962f37d7eb 100644 --- a/configs/topic_miamilite_defconfig +++ b/configs/topic_miamilite_defconfig @@ -32,6 +32,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL_STACK_R=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x2000000 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SYS_PROMPT="zynq-uboot> " diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig index 42aef8c073e..dc71856f720 100644 --- a/configs/topic_miamiplus_defconfig +++ b/configs/topic_miamiplus_defconfig @@ -32,6 +32,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL_STACK_R=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x2000000 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SYS_PROMPT="zynq-uboot> " diff --git a/configs/trimslice_defconfig b/configs/trimslice_defconfig index b9d465c0e57..134605d8793 100644 --- a/configs/trimslice_defconfig +++ b/configs/trimslice_defconfig @@ -18,6 +18,10 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xffffc +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x90000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x10000 CONFIG_SYS_PROMPT="Tegra20 (TrimSlice) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2087 diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig index e21945116c0..e5bacb1bb8e 100644 --- a/configs/udoo_defconfig +++ b/configs/udoo_defconfig @@ -22,6 +22,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig index fff11bb10e9..e5ba2f3d090 100644 --- a/configs/udoo_neo_defconfig +++ b/configs/udoo_neo_defconfig @@ -22,6 +22,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" diff --git a/configs/variscite_dart6ul_defconfig b/configs/variscite_dart6ul_defconfig index 7322b12bd17..f19dcbddcdf 100644 --- a/configs/variscite_dart6ul_defconfig +++ b/configs/variscite_dart6ul_defconfig @@ -18,6 +18,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run mmc_mmc_fit" +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig index cb5fcfbb236..25ee96a1ddf 100644 --- a/configs/venice2_defconfig +++ b/configs/venice2_defconfig @@ -18,6 +18,10 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x800ffffc +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80090000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x10000 CONFIG_SYS_PROMPT="Tegra124 (Venice2) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2086 diff --git a/configs/ventana_defconfig b/configs/ventana_defconfig index f3389b0f7bc..87e4d10b292 100644 --- a/configs/ventana_defconfig +++ b/configs/ventana_defconfig @@ -16,6 +16,10 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xffffc +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x90000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x10000 CONFIG_SYS_PROMPT="Tegra20 (Ventana) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2085 diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig index 2433c6c83e0..34afdc57911 100644 --- a/configs/verdin-imx8mm_defconfig +++ b/configs/verdin-imx8mm_defconfig @@ -39,6 +39,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x920000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig index 06c41c7af05..52d281e8318 100644 --- a/configs/verdin-imx8mp_defconfig +++ b/configs/verdin-imx8mp_defconfig @@ -49,6 +49,10 @@ CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x960000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig index a8c3d907d1d..3b9aa979090 100644 --- a/configs/vining_2000_defconfig +++ b/configs/vining_2000_defconfig @@ -31,6 +31,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index fadc8af36eb..595176190a7 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -33,6 +33,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index 65e8a65fd93..a5cee103cb3 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -35,6 +35,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL_STACK_R=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x2000000 CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_FS_LOAD_ARGS_NAME="system.dtb" CONFIG_SPL_FPGA=y diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index 131dfc03956..a248cbf3a37 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -30,6 +30,10 @@ CONFIG_SPL_BSS_START_ADDR=0x0 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffffc +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x20000000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_MAXARGS=64 diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index e0e376efb76..df0365ba77f 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -30,6 +30,10 @@ CONFIG_SPL_BSS_START_ADDR=0x0 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffffc +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x20000000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_MAXARGS=64 diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index 1b8665a6495..82510f19047 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -29,6 +29,10 @@ CONFIG_SPL_BSS_START_ADDR=0x0 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffffc +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x20000000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 74199f6bc03..0ac75f6572f 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -38,6 +38,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffffc CONFIG_SPL_STACK_R=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x20000000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000 CONFIG_SPL_FS_LOAD_KERNEL_NAME="atf-uboot.ub" CONFIG_SPL_FS_LOAD_ARGS_NAME="u-boot.bin" CONFIG_SPL_FPGA=y diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig index 062974a1abb..b69c8b92a48 100644 --- a/configs/zynq_cse_nand_defconfig +++ b/configs/zynq_cse_nand_defconfig @@ -28,6 +28,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL_STACK_R=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x2000000 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig index cbbb051518e..ecdbf8182e6 100644 --- a/configs/zynq_cse_nor_defconfig +++ b/configs/zynq_cse_nor_defconfig @@ -28,6 +28,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL_STACK_R=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x2000000 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 51a97f4e3cf..49dd5ad6069 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -35,6 +35,10 @@ CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL_STACK_R=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x200000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x2000000 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 # CONFIG_CMDLINE_EDITING is not set diff --git a/include/configs/am64x_evm.h b/include/configs/am64x_evm.h index b8a25e95f36..6da11b86c4b 100644 --- a/include/configs/am64x_evm.h +++ b/include/configs/am64x_evm.h @@ -18,13 +18,6 @@ /* DDR Configuration */ #define CONFIG_SYS_SDRAM_BASE1 0x880000000 -#if !defined(CONFIG_TARGET_AM642_A53_EVM) -/* Set the stack right below the SPL BSS section */ -/* Configure R5 SPL post-relocation malloc pool in DDR */ -#define CONFIG_SYS_SPL_MALLOC_START 0x84000000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M -#endif - #define PARTS_DEFAULT \ /* Linux partitions */ \ "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h index 06aade0b251..db35af98d9a 100644 --- a/include/configs/am65x_evm.h +++ b/include/configs/am65x_evm.h @@ -17,14 +17,6 @@ /* DDR Configuration */ #define CONFIG_SYS_SDRAM_BASE1 0x880000000 -/* SPL Loader Configuration */ -#ifndef CONFIG_TARGET_AM654_A53_EVM -/* Set the stack right below the SPL BSS section */ -/* Configure R5 SPL post-relocation malloc pool in DDR */ -#define CONFIG_SYS_SPL_MALLOC_START 0x84000000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M -#endif - #define CONFIG_SYS_BOOTM_LEN SZ_64M #define PARTS_DEFAULT \ diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 17e2d2d7f6d..b55d2e39255 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -40,10 +40,6 @@ #define CONFIG_SYS_MONITOR_LEN 0x80000 #ifdef CONFIG_SD_BOOT - -#define CONFIG_SYS_SPL_MALLOC_START 0x70080000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 - #elif CONFIG_NAND_BOOT #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index d9b7269a1f4..abcddc3cc9d 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -53,9 +53,6 @@ /* SPL */ -#define CONFIG_SYS_SPL_MALLOC_START 0x20080000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 - #define CONFIG_SYS_MONITOR_LEN (512 << 10) #define CONFIG_SYS_MASTER_CLOCK 132096000 diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index f436e8aa699..6857f2e3c4a 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -53,9 +53,6 @@ /* SPL */ -#define CONFIG_SYS_SPL_MALLOC_START 0x20080000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 - #define CONFIG_SYS_MONITOR_LEN (512 << 10) #define CONFIG_SYS_MASTER_CLOCK 132096000 diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h index 0f3b53c47a6..a6de28a42b2 100644 --- a/include/configs/bur_am335x_common.h +++ b/include/configs/bur_am335x_common.h @@ -68,9 +68,6 @@ * * ---------------------------------------------------------------------------- */ -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ - CONFIG_SPL_BSS_MAX_SIZE) -#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN /* General parts of the framework, required. */ diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index ad28251f1d8..933fcfcfd28 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -17,8 +17,6 @@ #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) -#define CONFIG_SYS_SPL_MALLOC_START 0x00120000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ #define CONFIG_MALLOC_F_ADDR 0x00120000 #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h index 2c029f42b60..0266d6988ce 100644 --- a/include/configs/cgtqmx8.h +++ b/include/configs/cgtqmx8.h @@ -14,8 +14,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) -#define CONFIG_SYS_SPL_MALLOC_START 0x00120000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ #define CONFIG_SERIAL_LPUART_BASE 0x5a060000 #define CONFIG_MALLOC_F_ADDR 0x00120000 diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index b4888192493..71ebca587d1 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -178,9 +178,6 @@ #ifdef CONFIG_SPL_BUILD /* defines for SPL */ -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ - CONFIG_SYS_MALLOC_LEN) -#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN #endif diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index b46f6226909..340c9d0d4a3 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -23,9 +23,6 @@ * other needs. */ -#define CONFIG_SYS_SPL_MALLOC_START 0x80208000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ - /* Physical Memory Map */ #include diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index 1c260c7ad40..1d6e6bcc434 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -15,8 +15,6 @@ * SPL */ -#define CONFIG_SYS_SPL_MALLOC_START 0x00040000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x0001ffff #define CONFIG_SYS_UBOOT_BASE 0xfff90000 #define CONFIG_SYS_UBOOT_START 0x00800000 diff --git a/include/configs/gardena-smart-gateway-at91sam.h b/include/configs/gardena-smart-gateway-at91sam.h index ea54d9964f0..c6a84a79e67 100644 --- a/include/configs/gardena-smart-gateway-at91sam.h +++ b/include/configs/gardena-smart-gateway-at91sam.h @@ -34,9 +34,6 @@ /* SPL */ -#define CONFIG_SYS_SPL_MALLOC_START 0x20080000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 - #define CONFIG_SYS_MONITOR_LEN (512 << 10) #define CONFIG_SYS_MASTER_CLOCK 132096000 diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h index 0b0cf9ddee6..488b2f1696a 100644 --- a/include/configs/imx6_spl.h +++ b/include/configs/imx6_spl.h @@ -18,14 +18,6 @@ #define CONFIG_SYS_SATA_FAT_BOOT_PARTITION 1 #endif -#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL) || \ - defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) -#define CONFIG_SYS_SPL_MALLOC_START 0x88300000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ -#else -#define CONFIG_SYS_SPL_MALLOC_START 0x18300000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ -#endif #endif #endif diff --git a/include/configs/imx7_spl.h b/include/configs/imx7_spl.h index 6f7ec9ea8c8..5900c05db1f 100644 --- a/include/configs/imx7_spl.h +++ b/include/configs/imx7_spl.h @@ -17,9 +17,6 @@ #define CONFIG_SYS_MONITOR_LEN 409600 /* 400 KB */ #endif -#define CONFIG_SYS_SPL_MALLOC_START 0x88300000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ - #endif /* CONFIG_SPL */ #endif /* __IMX7_SPL_CONFIG_H */ diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index 638e8cc3b42..297d56b427f 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -17,9 +17,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ - /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x912000 /* For RAW image gives a error info not panic */ diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h index 09788ebe241..897eac66b14 100644 --- a/include/configs/imx8mm_beacon.h +++ b/include/configs/imx8mm_beacon.h @@ -14,9 +14,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ - /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h index 17d0f19ef21..bb19aa292b8 100644 --- a/include/configs/imx8mm_data_modul_edm_sbc.h +++ b/include/configs/imx8mm_data_modul_edm_sbc.h @@ -15,9 +15,6 @@ #define CONFIG_SYS_MONITOR_LEN SZ_1M #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M /* 16 MiB */ - #define CONFIG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index a6ae1ab8bf0..983743b5093 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -16,9 +16,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ - /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index b3ee0e20099..e6642936cba 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -15,9 +15,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -# define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -# define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K - /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ # define CONFIG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index 4b41f351d83..595c1074966 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -14,9 +14,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_1M - /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h index 5fac4ad5e60..99cbc1d07c8 100644 --- a/include/configs/imx8mn_beacon.h +++ b/include/configs/imx8mn_beacon.h @@ -14,9 +14,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K - /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x184000 diff --git a/include/configs/imx8mn_bsh_smm_s2_common.h b/include/configs/imx8mn_bsh_smm_s2_common.h index 5aa5a311ca8..5bdbd37e9cb 100644 --- a/include/configs/imx8mn_bsh_smm_s2_common.h +++ b/include/configs/imx8mn_bsh_smm_s2_common.h @@ -16,11 +16,6 @@ #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K - - - #define MEM_LAYOUT_ENV_SETTINGS \ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index 8f199672ff5..73ba49b0d8f 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -17,9 +17,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ - /* For RAW image gives a error info not panic */ #define CONFIG_SPL_ABORT_ON_RAW_IMAGE diff --git a/include/configs/imx8mn_var_som.h b/include/configs/imx8mn_var_som.h index d9cf466b0da..ce679098e5c 100644 --- a/include/configs/imx8mn_var_som.h +++ b/include/configs/imx8mn_var_som.h @@ -16,9 +16,6 @@ #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 2) \ diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index 7a449c9f201..8565ba7fdb1 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -14,9 +14,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ - /* For RAW image gives a error info not panic */ #define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif diff --git a/include/configs/imx8mp_dhcom_pdk2.h b/include/configs/imx8mp_dhcom_pdk2.h index 33b101daf99..1ad90e5bdbd 100644 --- a/include/configs/imx8mp_dhcom_pdk2.h +++ b/include/configs/imx8mp_dhcom_pdk2.h @@ -15,9 +15,6 @@ #define CONFIG_SYS_MONITOR_LEN SZ_1M #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_SPL_MALLOC_START 0x4c000000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 kiB */ - /* For RAW image gives a error info not panic */ #define CONFIG_SPL_ABORT_ON_RAW_IMAGE diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index ba059f7d68b..65c1616bca7 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -17,8 +17,6 @@ #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ #define CONFIG_SPL_ABORT_ON_RAW_IMAGE diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index f98f04b46f1..efff6b95553 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -27,9 +27,6 @@ 0x5f, 0xd3, 0x6b, 0x9b, 0xe5, 0xb9) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ - #define CONFIG_MALLOC_F_ADDR 0x184000 /* malloc f used before \ * GD_FLG_FULL_MALLOC_INIT \ * set \ diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h index 2933e4a5ded..e1d33553956 100644 --- a/include/configs/imx8mp_venice.h +++ b/include/configs/imx8mp_venice.h @@ -14,9 +14,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ - /* For RAW image gives a error info not panic */ #define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index 11ed33ddc8e..a242d5e3e8e 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -15,8 +15,6 @@ #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index b9dbbb7d069..98ddb06fe33 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -16,8 +16,6 @@ #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index 4507d7c54c8..1b3c0493ebd 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -13,8 +13,6 @@ #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index 69719417854..f4d19f87312 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -15,8 +15,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) -#define CONFIG_SYS_SPL_MALLOC_START 0x00120000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ #define CONFIG_SERIAL_LPUART_BASE 0x5a060000 #define CONFIG_MALLOC_F_ADDR 0x00120000 diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index 0a6746c42c3..a6aabc7add7 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -13,8 +13,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) -#define CONFIG_SYS_SPL_MALLOC_START 0x00120000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ #define CONFIG_SERIAL_LPUART_BASE 0x5a060000 #define CONFIG_MALLOC_F_ADDR 0x00120000 diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index 34ebfda29f9..987069447d5 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -14,9 +14,6 @@ #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_SPL_MALLOC_START 0x22040000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x8000 /* 32 KB */ - #define CONFIG_MALLOC_F_ADDR 0x22040000 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index 8e7861fc912..a81496145c6 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -24,11 +24,6 @@ /* Image load address in RAM for DFU boot*/ #else #define CONFIG_SYS_UBOOT_BASE 0x50080000 -/* Set the stack right below the SPL BSS section */ -/* Configure R5 SPL post-relocation malloc pool in DDR */ -#define CONFIG_SYS_SPL_MALLOC_START 0x84000000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M -/* Image load address in RAM for DFU boot*/ #endif #define CONFIG_SYS_BOOTM_LEN SZ_64M diff --git a/include/configs/j721s2_evm.h b/include/configs/j721s2_evm.h index 6099db1d429..8e3ea670d08 100644 --- a/include/configs/j721s2_evm.h +++ b/include/configs/j721s2_evm.h @@ -25,11 +25,6 @@ /* Image load address in RAM for DFU boot*/ #else #define CONFIG_SYS_UBOOT_BASE 0x50080000 -/* Set the stack right below the SPL BSS section */ -/* Configure R5 SPL post-relocation malloc pool in DDR */ -#define CONFIG_SYS_SPL_MALLOC_START 0x84000000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M -/* Image load address in RAM for DFU boot*/ #endif #define CONFIG_SYS_BOOTM_LEN SZ_64M diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h index eb6c5e60910..95b836c5470 100644 --- a/include/configs/kontron-sl-mx8mm.h +++ b/include/configs/kontron-sl-mx8mm.h @@ -55,8 +55,6 @@ #define CONFIG_SYS_BOOTM_LEN SZ_64M #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x930000 #endif diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index f86b7fd471a..88aaa55bef5 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -17,8 +17,6 @@ 0x40, 0xd4, 0x5c, 0xca, 0x13, 0x99) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index 676e2c6ee44..6beb0bdf3ed 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -42,8 +42,6 @@ /* SPL */ -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 -#define CONFIG_SYS_SPL_MALLOC_START 0x80200000 #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) /* GUID for capsule updatable firmware image */ diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index b592786fd89..6a0ccbf836f 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -42,9 +42,6 @@ #define SDRAM_CFG_BI 0x00000001 #ifdef CONFIG_SD_BOOT -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \ - CONFIG_SYS_MONITOR_LEN) -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 #define CONFIG_SYS_MONITOR_LEN 0x80000 #endif diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index bddd6be30db..e17bdcad6d0 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -11,9 +11,6 @@ #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE #ifdef CONFIG_SD_BOOT -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \ - CONFIG_SYS_MONITOR_LEN) -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 #define CONFIG_SYS_MONITOR_LEN 0xc0000 #endif @@ -22,8 +19,6 @@ #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_SPL_MALLOC_START 0x80200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 #define CONFIG_SYS_MONITOR_LEN 0x80000 #endif diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index 97c3bbeae56..905c63d4dda 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -44,10 +44,6 @@ #define CONFIG_U_BOOT_HDR_SIZE (16 << 10) #endif /* ifdef CONFIG_NXP_ESBC */ -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \ - CONFIG_SYS_MONITOR_LEN) -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 - #ifdef CONFIG_U_BOOT_HDR_SIZE /* * HDR would be appended at end of image and copied to DDR along diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 1141a9b013e..d85a776daa1 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -46,10 +46,6 @@ #define CONFIG_U_BOOT_HDR_SIZE (16 << 10) #endif /* ifdef CONFIG_NXP_ESBC */ -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \ - CONFIG_SYS_MONITOR_LEN) -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 - #ifdef CONFIG_U_BOOT_HDR_SIZE /* * HDR would be appended at end of image and copied to DDR along diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index fee760f1123..fe9a8fd3754 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -46,10 +46,6 @@ /* SD boot SPL */ #ifdef CONFIG_SD_BOOT -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ - CONFIG_SPL_BSS_MAX_SIZE) -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 - #ifdef CONFIG_NXP_ESBC #define CONFIG_U_BOOT_HDR_SIZE (16 << 10) /* @@ -68,8 +64,6 @@ #ifdef CONFIG_NAND_BOOT #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_SPL_MALLOC_START 0x80200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 #ifdef CONFIG_NXP_ESBC #define CONFIG_U_BOOT_HDR_SIZE (16 << 10) diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index d283c8587a9..c2563b11d05 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -46,10 +46,6 @@ /* SD boot SPL */ #ifdef CONFIG_SD_BOOT -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ - CONFIG_SPL_BSS_MAX_SIZE) -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 - #ifdef CONFIG_NXP_ESBC #define CONFIG_U_BOOT_HDR_SIZE (16 << 10) /* @@ -66,9 +62,6 @@ #if defined(CONFIG_QSPI_BOOT) && defined(CONFIG_SPL) #define CONFIG_SPL_TARGET "spl/u-boot-spl.pbl" -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ - CONFIG_SPL_BSS_MAX_SIZE) -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 #define CONFIG_SYS_MONITOR_LEN 0x100000 #endif @@ -77,9 +70,6 @@ #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ - CONFIG_SPL_BSS_MAX_SIZE) -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 #define CONFIG_SYS_MONITOR_LEN 0xa0000 #endif diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 83dcddafcfa..3ef163d5eae 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -146,9 +146,6 @@ unsigned long long get_qixis_addr(void); #ifdef CONFIG_SPL #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 -#define CONFIG_SYS_SPL_MALLOC_START 0x80200000 - #ifdef CONFIG_NXP_ESBC #define CONFIG_U_BOOT_HDR_SIZE (16 << 10) /* diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index e32159baffc..3551a0ddb04 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -143,8 +143,6 @@ unsigned long long get_qixis_addr(void); #define CONFIG_SYS_NAND_U_BOOT_DST 0x80400000 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST #endif -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 -#define CONFIG_SYS_SPL_MALLOC_START 0x80200000 #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index e3a679efe70..a344a46a3e6 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -169,9 +169,6 @@ /* SD/MMC */ /* defines for SPL */ -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ - CONFIG_SYS_MALLOC_LEN) -#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN /* additions for new relocation code, must added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0xc0000000 diff --git a/include/configs/openpiton-riscv64.h b/include/configs/openpiton-riscv64.h index d3b638e838f..497f0d50d0a 100644 --- a/include/configs/openpiton-riscv64.h +++ b/include/configs/openpiton-riscv64.h @@ -18,10 +18,6 @@ #define CONFIG_SYS_BOOTM_LEN SZ_256M #ifdef CONFIG_SPL -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ - CONFIG_SPL_BSS_MAX_SIZE) -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x0100000 - #define CONFIG_SPL_GD_ADDR 0x85000000 #endif diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h index bf08e7a6241..1d01104cfe8 100644 --- a/include/configs/phycore_imx8mm.h +++ b/include/configs/phycore_imx8mm.h @@ -17,9 +17,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K - /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h index c2e370d5a8d..75ddcf465f9 100644 --- a/include/configs/phycore_imx8mp.h +++ b/include/configs/phycore_imx8mp.h @@ -17,9 +17,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K - #define CONFIG_SPL_ABORT_ON_RAW_IMAGE #define CONFIG_POWER_PCA9450 diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index 508909a744d..25ad936a06b 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -13,8 +13,6 @@ #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index 614bfad0e42..69f3d065878 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -47,10 +47,6 @@ #define CONFIG_SYS_MONITOR_LEN 0x80000 #ifdef CONFIG_SD_BOOT - -#define CONFIG_SYS_SPL_MALLOC_START 0x70080000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 - #elif CONFIG_NAND_BOOT #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h index 9f4752a88f3..f3e16e55966 100644 --- a/include/configs/qemu-riscv.h +++ b/include/configs/qemu-riscv.h @@ -8,13 +8,6 @@ #include -#ifdef CONFIG_SPL - -#define CONFIG_SYS_SPL_MALLOC_START 0x84100000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 - -#endif - #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_BOOTM_LEN SZ_64M diff --git a/include/configs/sama5d27_som1_ek.h b/include/configs/sama5d27_som1_ek.h index 8a39069c21f..0eecb561508 100644 --- a/include/configs/sama5d27_som1_ek.h +++ b/include/configs/sama5d27_som1_ek.h @@ -15,8 +15,6 @@ #define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ /* SPL */ -#define CONFIG_SYS_SPL_MALLOC_START 0x20080000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 #define CONFIG_SYS_MONITOR_LEN (512 << 10) diff --git a/include/configs/sama5d27_wlsom1_ek.h b/include/configs/sama5d27_wlsom1_ek.h index 14a6e0f0510..178a6ad4eed 100644 --- a/include/configs/sama5d27_wlsom1_ek.h +++ b/include/configs/sama5d27_wlsom1_ek.h @@ -20,8 +20,6 @@ #define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* SPL */ -#define CONFIG_SYS_SPL_MALLOC_START 0x20080000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 #define CONFIG_SYS_MONITOR_LEN (512 << 10) diff --git a/include/configs/sama5d2_icp.h b/include/configs/sama5d2_icp.h index 3b1e80921ee..b18377be66b 100644 --- a/include/configs/sama5d2_icp.h +++ b/include/configs/sama5d2_icp.h @@ -27,8 +27,6 @@ #endif /* SPL */ -#define CONFIG_SYS_SPL_MALLOC_START 0x20080000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 #define CONFIG_SYS_MONITOR_LEN (512 << 10) diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h index 88020536c05..bbd72979b56 100644 --- a/include/configs/sama5d2_xplained.h +++ b/include/configs/sama5d2_xplained.h @@ -12,8 +12,6 @@ #include "at91-sama5_common.h" /* SPL */ -#define CONFIG_SYS_SPL_MALLOC_START 0x20080000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 #define CONFIG_SYS_MONITOR_LEN (512 << 10) diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index eb8f15f310d..b4590a2ea91 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -49,8 +49,6 @@ #endif /* SPL */ -#define CONFIG_SYS_SPL_MALLOC_START 0x20080000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* size of u-boot.bin to load */ #define CONFIG_SYS_MONITOR_LEN (2 * SZ_512K) diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index fe3adece810..f61b6e0dabc 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -61,8 +61,6 @@ #endif /* SPL */ -#define CONFIG_SYS_SPL_MALLOC_START 0x20080000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 #define CONFIG_SYS_MONITOR_LEN (512 << 10) diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h index c589b07af48..d5cd45ca5c3 100644 --- a/include/configs/sama5d4_xplained.h +++ b/include/configs/sama5d4_xplained.h @@ -26,8 +26,6 @@ #endif /* SPL */ -#define CONFIG_SYS_SPL_MALLOC_START 0x20080000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 #define CONFIG_SYS_MONITOR_LEN (512 << 10) diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h index d5cfd2115d1..411ed29ab3c 100644 --- a/include/configs/sama5d4ek.h +++ b/include/configs/sama5d4ek.h @@ -26,8 +26,6 @@ #endif /* SPL */ -#define CONFIG_SYS_SPL_MALLOC_START 0x20080000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 #define CONFIG_SYS_MONITOR_LEN (512 << 10) diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 4d2e927f4f0..5dc09fa91cc 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -75,8 +75,6 @@ * header. That is 0x800FFFC0--0x80100000 should not be used for any * other needs. */ -#define CONFIG_SYS_SPL_MALLOC_START 0x80208000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* * Since SPL did pll and ddr initialization for us, diff --git a/include/configs/sifive-unleashed.h b/include/configs/sifive-unleashed.h index 9734e1e75f0..4442fc29e31 100644 --- a/include/configs/sifive-unleashed.h +++ b/include/configs/sifive-unleashed.h @@ -11,14 +11,6 @@ #include -#ifdef CONFIG_SPL - -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ - CONFIG_SPL_BSS_MAX_SIZE) -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 - -#endif - #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_BOOTM_LEN SZ_64M diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h index be19471471c..f5a341c8449 100644 --- a/include/configs/sifive-unmatched.h +++ b/include/configs/sifive-unmatched.h @@ -11,14 +11,6 @@ #include -#ifdef CONFIG_SPL - -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ - CONFIG_SPL_BSS_MAX_SIZE) -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 - -#endif - #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_BOOTM_LEN SZ_64M diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 1e5087444c5..8667052d357 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -114,10 +114,6 @@ /* Defines for SPL */ -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ - CONFIG_SPL_BSS_MAX_SIZE) -#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN - #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE diff --git a/include/configs/sniper.h b/include/configs/sniper.h index 9f17cd6f131..0187fca5f0d 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -48,9 +48,6 @@ * SPL */ -#define CONFIG_SYS_SPL_MALLOC_START 0x80208000 -#define CONFIG_SYS_SPL_MALLOC_SIZE (1024 * 1024) - /* * Serial */ diff --git a/include/configs/socfpga_arria10_socdk.h b/include/configs/socfpga_arria10_socdk.h index c20d54a3c5b..f712928d3c8 100644 --- a/include/configs/socfpga_arria10_socdk.h +++ b/include/configs/socfpga_arria10_socdk.h @@ -32,7 +32,6 @@ */ /* SPL memory allocation configuration, this is for FAT implementation */ -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00015000 /* The rest of the configuration is shared */ #include diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 441e3545aa4..6453ab79527 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -17,13 +17,8 @@ #elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) #define CONFIG_SYS_INIT_RAM_ADDR 0xFFE00000 /* SPL memory allocation configuration, this is for FAT implementation */ -#ifndef CONFIG_SYS_SPL_MALLOC_SIZE -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x10000 -#endif #define CONFIG_SYS_INIT_RAM_SIZE (SOCFPGA_PHYS_OCRAM_SIZE - \ CONFIG_SYS_SPL_MALLOC_SIZE) -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE) #endif /* diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index a79423740b6..cbc18061f42 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -144,8 +144,5 @@ unsigned int cm_get_l4_sys_free_clk_hz(void); * */ #define CONFIG_SPL_TARGET "spl/u-boot-spl-dtb.hex" -#define CONFIG_SYS_SPL_MALLOC_SIZE (CONFIG_SYS_MALLOC_LEN) -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR \ - - CONFIG_SYS_SPL_MALLOC_SIZE) #endif /* __CONFIG_SOCFPGA_SOC64_COMMON_H__ */ diff --git a/include/configs/stm32mp15_common.h b/include/configs/stm32mp15_common.h index 588d4c1f31f..ec41a8172c7 100644 --- a/include/configs/stm32mp15_common.h +++ b/include/configs/stm32mp15_common.h @@ -31,8 +31,6 @@ /* SPL support */ #ifdef CONFIG_SPL /* SPL use DDR */ -#define CONFIG_SYS_SPL_MALLOC_START 0xC0300000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x01D00000 /* Restrict SPL to fit within SYSRAM */ #define STM32_SYSRAM_END (STM32_SYSRAM_BASE + STM32_SYSRAM_SIZE) diff --git a/include/configs/taurus.h b/include/configs/taurus.h index ef856f07fdc..2f5a4fd8f4d 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -142,9 +142,6 @@ #endif /* #ifndef CONFIG_SPL_BUILD */ /* Defines for SPL */ -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ - CONFIG_SYS_MALLOC_LEN) -#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 502508d713a..159ba093f29 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -56,7 +56,6 @@ #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN /* Defines for SPL */ -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 #endif #endif /* _TEGRA_COMMON_H_ */ diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h index fae00e88fe5..74208315894 100644 --- a/include/configs/tegra114-common.h +++ b/include/configs/tegra114-common.h @@ -54,7 +54,6 @@ "ramdisk_addr_r=0x83100000\0" /* Defines for SPL */ -#define CONFIG_SYS_SPL_MALLOC_START 0x80090000 /* For USB EHCI controller */ #define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h index 05f6bf0b471..314486a1bcb 100644 --- a/include/configs/tegra124-common.h +++ b/include/configs/tegra124-common.h @@ -56,7 +56,6 @@ "ramdisk_addr_r=0x83100000\0" /* Defines for SPL */ -#define CONFIG_SYS_SPL_MALLOC_START 0x80090000 /* For USB EHCI controller */ #define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 97c1f5a2453..a2b14d8ead8 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -55,7 +55,6 @@ "ramdisk_addr_r=0x03100000\0" /* Defines for SPL */ -#define CONFIG_SYS_SPL_MALLOC_START 0x00090000 /* Align LCD to 1MB boundary */ #define CONFIG_LCD_ALIGNMENT MMU_SECTION_SIZE diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h index 7107c06b9a7..a68da5ddfc8 100644 --- a/include/configs/tegra30-common.h +++ b/include/configs/tegra30-common.h @@ -51,7 +51,6 @@ "ramdisk_addr_r=0x83100000\0" /* Defines for SPL */ -#define CONFIG_SYS_SPL_MALLOC_START 0x80090000 /* For USB EHCI controller */ #define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index 777e78859bc..97166e010f7 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -94,8 +94,6 @@ * header. That is 0x800FFFC0--0x80800000 should not be used for any * other needs. */ -#define CONFIG_SYS_SPL_MALLOC_START 0x80208000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* * Since SPL did pll and ddr initialization for us, diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index 7a19fc4b58a..0307fc38d8b 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -113,11 +113,6 @@ * of the BSS area. We suggest that the stack be placed at 32MiB after the * start of DRAM to allow room for all of the above (handled in Kconfig). */ -#ifndef CONFIG_SYS_SPL_MALLOC_START -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ - CONFIG_SPL_BSS_MAX_SIZE) -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_8M -#endif #ifdef CONFIG_SPL_OS_BOOT /* FAT */ diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 4a6d9bfddd1..060969647b2 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -25,9 +25,6 @@ #endif /* SPL SPI Loader Configuration */ -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ - CONFIG_SPL_BSS_MAX_SIZE) -#define CONFIG_SYS_SPL_MALLOC_SIZE (32 * 1024) #define KEYSTONE_SPL_STACK_SIZE (8 * 1024) /* SRAM scratch space entries */ diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 4fc7617c776..8f464dd39f0 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -16,9 +16,6 @@ #define CONFIG_SYS_BOOTM_LEN SZ_64M #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ - /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index 47bb5324943..906a20fd840 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -15,8 +15,6 @@ #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x184000 diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 3e766b5180f..713db4c4dae 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -219,9 +219,6 @@ # define CONFIG_ENV_MAX_ENTRIES 10 #endif -#define CONFIG_SYS_SPL_MALLOC_START 0x20000000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x1000000 - #ifdef CONFIG_SPL_SYS_MALLOC_SIMPLE # error "Disable CONFIG_SPL_SYS_MALLOC_SIMPLE. Full malloc needs to be used" #endif diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index d29d423e116..b2b95b710ef 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -229,8 +229,6 @@ /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */ /* On the top of OCM space */ -#define CONFIG_SYS_SPL_MALLOC_START CONFIG_SPL_STACK_R_ADDR -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000000 /* * SPL stack position - and stack goes down diff --git a/include/system-constants.h b/include/system-constants.h index de66fece957..83b41b384f3 100644 --- a/include/system-constants.h +++ b/include/system-constants.h @@ -19,4 +19,14 @@ #endif #endif +/* + * Typically, we have the SPL malloc pool at the end of the BSS area. + */ +#ifdef CONFIG_HAS_CUSTOM_SPL_MALLOC_START +#define SYS_SPL_MALLOC_START CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR +#else +#define SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ + CONFIG_SPL_BSS_MAX_SIZE) +#endif + #endif -- GitLab From c4b8bc48b69abe799496f2f62aa46f482572f5e0 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 27 May 2022 15:18:06 -0400 Subject: [PATCH 040/581] Remove CONFIG_SYS_SPL_LEN largely This is mostly unused. In the case where it is currently used, it means the same as CONFIG_SPL_PAD_TO, which is already set for the platform. Signed-off-by: Tom Rini --- include/configs/corvus.h | 2 -- include/configs/gardena-smart-gateway-at91sam.h | 2 -- include/configs/imxrt1020-evk.h | 1 - include/configs/imxrt1050-evk.h | 1 - include/configs/smartweb.h | 2 -- include/configs/stm32f746-disco.h | 3 +-- include/configs/taurus.h | 2 -- 7 files changed, 1 insertion(+), 12 deletions(-) diff --git a/include/configs/corvus.h b/include/configs/corvus.h index 864a79346b7..698da6b6dac 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -71,6 +71,4 @@ #define CONFIG_SYS_MCKR 0x1301 #define CONFIG_SYS_MCKR_CSS 0x1302 -#define CONFIG_SYS_SPL_LEN CONFIG_SPL_PAD_TO - #endif diff --git a/include/configs/gardena-smart-gateway-at91sam.h b/include/configs/gardena-smart-gateway-at91sam.h index c6a84a79e67..331e9ca8ba1 100644 --- a/include/configs/gardena-smart-gateway-at91sam.h +++ b/include/configs/gardena-smart-gateway-at91sam.h @@ -45,6 +45,4 @@ #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_SPL_LEN CONFIG_SPL_PAD_TO - #endif diff --git a/include/configs/imxrt1020-evk.h b/include/configs/imxrt1020-evk.h index ac046b82aa9..a2c004880a7 100644 --- a/include/configs/imxrt1020-evk.h +++ b/include/configs/imxrt1020-evk.h @@ -22,7 +22,6 @@ * Configuration of the external SDRAM memory */ -#define CONFIG_SYS_SPL_LEN 0x00008000 #define CONFIG_SYS_UBOOT_START 0x800023FD #endif /* __IMXRT1020_EVK_H */ diff --git a/include/configs/imxrt1050-evk.h b/include/configs/imxrt1050-evk.h index 30b2f5d1efe..e36718dc825 100644 --- a/include/configs/imxrt1050-evk.h +++ b/include/configs/imxrt1050-evk.h @@ -29,7 +29,6 @@ * Configuration of the external SDRAM memory */ -#define CONFIG_SYS_SPL_LEN 0x00008000 #define CONFIG_SYS_UBOOT_START 0x800023FD #endif /* __IMXRT1050_EVK_H */ diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 8667052d357..cde6abc6261 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -133,6 +133,4 @@ #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR) #define CONFIG_SYS_AT91_PLLB 0x10483f0e -#define CONFIG_SYS_SPL_LEN CONFIG_SPL_PAD_TO - #endif /* __CONFIG_H */ diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h index ac54c502178..80db425bb7c 100644 --- a/include/configs/stm32f746-disco.h +++ b/include/configs/stm32f746-disco.h @@ -39,10 +39,9 @@ BOOTENV #define CONFIG_SYS_MONITOR_LEN (512 * 1024) -#define CONFIG_SYS_SPL_LEN 0x00008000 #define CONFIG_SYS_UBOOT_START 0x080083FD #define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + \ - CONFIG_SYS_SPL_LEN) + CONFIG_SPL_PAD_TO) /* DT blob (fdt) address */ #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \ diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 2f5a4fd8f4d..b9285e8caba 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -162,6 +162,4 @@ #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR) #define CONFIG_SYS_AT91_PLLB 0x10193F05 -#define CONFIG_SYS_SPL_LEN CONFIG_SPL_PAD_TO - #endif -- GitLab From cfb5dd358531a19c6aef5531f183b625fbf7d16f Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 27 May 2022 15:20:11 -0400 Subject: [PATCH 041/581] etamin: Remove CONFIG_SPL_CMT defines These are presumably private to non-upstream code, remove. Signed-off-by: Tom Rini --- include/configs/etamin.h | 6 ------ 1 file changed, 6 deletions(-) diff --git a/include/configs/etamin.h b/include/configs/etamin.h index 9cf93924df9..383beee17ae 100644 --- a/include/configs/etamin.h +++ b/include/configs/etamin.h @@ -77,12 +77,6 @@ #define CONFIG_FACTORYSET -/* use both define to compile a SPL compliance test */ -/* -#define CONFIG_SPL_CMT -#define CONFIG_SPL_CMT_DEBUG -*/ - /* nedded by compliance test in read mode */ /* Define own nand partitions */ -- GitLab From 7f2c91e5d8114da994f0005696539e276172340d Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 27 May 2022 16:19:05 -0400 Subject: [PATCH 042/581] Convert CONFIG_SPL_GD_ADDR to Kconfig This converts the following to Kconfig: CONFIG_SPL_GD_ADDR Signed-off-by: Tom Rini --- board/freescale/p1010rdb/spl.c | 4 ++-- board/freescale/p1_p2_rdb_pc/spl.c | 4 ++-- common/spl/Kconfig | 8 ++++++++ configs/P1010RDB-PA_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PA_NAND_defconfig | 1 + configs/P1010RDB-PA_SDCARD_defconfig | 1 + configs/P1010RDB-PA_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_NAND_defconfig | 1 + configs/P1010RDB-PB_SDCARD_defconfig | 1 + configs/P1010RDB-PB_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_NAND_defconfig | 1 + configs/P1020RDB-PC_SDCARD_defconfig | 1 + configs/P1020RDB-PC_SPIFLASH_defconfig | 1 + configs/P1020RDB-PD_NAND_defconfig | 1 + configs/P1020RDB-PD_SDCARD_defconfig | 1 + configs/P1020RDB-PD_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_NAND_defconfig | 1 + configs/P2020RDB-PC_SDCARD_defconfig | 1 + configs/P2020RDB-PC_SPIFLASH_defconfig | 1 + configs/T1024RDB_NAND_defconfig | 1 + configs/T1024RDB_SDCARD_defconfig | 1 + configs/T1024RDB_SPIFLASH_defconfig | 1 + configs/T1042D4RDB_NAND_defconfig | 1 + configs/T1042D4RDB_SDCARD_defconfig | 1 + configs/T1042D4RDB_SPIFLASH_defconfig | 1 + configs/T2080QDS_NAND_defconfig | 1 + configs/T2080QDS_SDCARD_defconfig | 1 + configs/T2080QDS_SPIFLASH_defconfig | 1 + configs/T2080RDB_NAND_defconfig | 1 + configs/T2080RDB_SDCARD_defconfig | 1 + configs/T2080RDB_SPIFLASH_defconfig | 1 + configs/T2080RDB_revD_NAND_defconfig | 1 + configs/T2080RDB_revD_SDCARD_defconfig | 1 + configs/T2080RDB_revD_SPIFLASH_defconfig | 1 + configs/T4240RDB_SDCARD_defconfig | 1 + include/configs/P1010RDB.h | 2 -- include/configs/T102xRDB.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240RDB.h | 1 - include/configs/openpiton-riscv64.h | 4 ---- include/configs/p1_p2_rdb_pc.h | 2 -- 54 files changed, 55 insertions(+), 17 deletions(-) diff --git a/board/freescale/p1010rdb/spl.c b/board/freescale/p1010rdb/spl.c index a78a9143a01..88695002deb 100644 --- a/board/freescale/p1010rdb/spl.c +++ b/board/freescale/p1010rdb/spl.c @@ -63,11 +63,11 @@ void board_init_f(ulong bootflag) void board_init_r(gd_t *gd, ulong dest_addr) { /* Pointer is writable since we allocated a register for it */ - gd = (gd_t *)CONFIG_SPL_GD_ADDR; + gd = (gd_t *)CONFIG_VAL(GD_ADDR); struct bd_info *bd; memset(gd, 0, sizeof(gd_t)); - bd = (struct bd_info *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t)); + bd = (struct bd_info *)(CONFIG_VAL(GD_ADDR) + sizeof(gd_t)); memset(bd, 0, sizeof(struct bd_info)); gd->bd = bd; diff --git a/board/freescale/p1_p2_rdb_pc/spl.c b/board/freescale/p1_p2_rdb_pc/spl.c index 580972d800a..b60027ebd9a 100644 --- a/board/freescale/p1_p2_rdb_pc/spl.c +++ b/board/freescale/p1_p2_rdb_pc/spl.c @@ -69,11 +69,11 @@ void board_init_f(ulong bootflag) void board_init_r(gd_t *gd, ulong dest_addr) { /* Pointer is writable since we allocated a register for it */ - gd = (gd_t *)CONFIG_SPL_GD_ADDR; + gd = (gd_t *)CONFIG_VAL(GD_ADDR); struct bd_info *bd; memset(gd, 0, sizeof(gd_t)); - bd = (struct bd_info *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t)); + bd = (struct bd_info *)(CONFIG_VAL(GD_ADDR) + sizeof(gd_t)); memset(bd, 0, sizeof(struct bd_info)); gd->bd = bd; diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 10d9cdd0c28..027ac4274b6 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -246,6 +246,10 @@ config SPL_FLUSH_IMAGE config SPL_SKIP_RELOCATE bool "Skip relocating SPL" +config SPL_GD_ADDR + hex "Address to use for global data (gd) in SPL" + depends on !SPL_INIT_MINIMAL + config SPL_RELOC_TEXT_BASE hex "Address to relocate SPL to" default SPL_TEXT_BASE @@ -272,6 +276,10 @@ config SPL_RELOC_MALLOC_SIZE hex "Size of malloc pool in SPL" depends on SPL_RELOC_MALLOC +config TPL_GD_ADDR + hex "Address to use for global data (gd) in TPL" + depends on TPL + config TPL_RELOC_TEXT_BASE hex "Address to relocate TPL to" depends on TPL diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index 22b43801a77..06b4ca72b21 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_RELOC_TEXT_BASE=0xd003d000 CONFIG_SPL_RELOC_STACK=0xd003fff0 +CONFIG_TPL_GD_ADDR=0xd002c000 CONFIG_TPL_RELOC_TEXT_BASE=0xd0001000 CONFIG_TPL_RELOC_STACK=0xd0030000 CONFIG_TPL_RELOC_MALLOC=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index 7406cb29b03..b116eee6c5c 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_GD_ADDR=0xd0018000 CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000 CONFIG_SPL_RELOC_STACK=0xd001c000 CONFIG_SPL_RELOC_MALLOC=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index 41b2f2f58b1..df4caee9e72 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_GD_ADDR=0xd0018000 CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000 CONFIG_SPL_RELOC_STACK=0xd001c000 CONFIG_SPL_RELOC_MALLOC=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index 993a1f8d54a..918a107f528 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_RELOC_TEXT_BASE=0xd003d000 CONFIG_SPL_RELOC_STACK=0xd003fff0 +CONFIG_TPL_GD_ADDR=0xd002c000 CONFIG_TPL_RELOC_TEXT_BASE=0xd0001000 CONFIG_TPL_RELOC_STACK=0xd0030000 CONFIG_TPL_RELOC_MALLOC=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 058c87d77b3..41988bb1f72 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_GD_ADDR=0xd0018000 CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000 CONFIG_SPL_RELOC_STACK=0xd001c000 CONFIG_SPL_RELOC_MALLOC=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index 4c2d72605e2..b4dd81ea940 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_GD_ADDR=0xd0018000 CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000 CONFIG_SPL_RELOC_STACK=0xd001c000 CONFIG_SPL_RELOC_MALLOC=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index c38be8f1457..b69e6cf5655 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_RELOC_TEXT_BASE=0xd003d000 CONFIG_SPL_RELOC_STACK=0xd003fff0 +CONFIG_TPL_GD_ADDR=0xd002c000 CONFIG_TPL_RELOC_TEXT_BASE=0xd0001000 CONFIG_TPL_RELOC_STACK=0xd0030000 CONFIG_TPL_RELOC_MALLOC=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 9e788ab9bf3..21e4e7f0f5f 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_GD_ADDR=0xd0018000 CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000 CONFIG_SPL_RELOC_STACK=0xd001c000 CONFIG_SPL_RELOC_MALLOC=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index a762f07c489..dbbc25d319d 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_GD_ADDR=0xd0018000 CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000 CONFIG_SPL_RELOC_STACK=0xd001c000 CONFIG_SPL_RELOC_MALLOC=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 18ba32f2d1e..c4e9d590054 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_RELOC_TEXT_BASE=0xd003d000 CONFIG_SPL_RELOC_STACK=0xd003fff0 +CONFIG_TPL_GD_ADDR=0xd002c000 CONFIG_TPL_RELOC_TEXT_BASE=0xd0001000 CONFIG_TPL_RELOC_STACK=0xd0030000 CONFIG_TPL_RELOC_MALLOC=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index 1d18f1282d1..c0ea6b9635a 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_GD_ADDR=0xd0018000 CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000 CONFIG_SPL_RELOC_STACK=0xd001c000 CONFIG_SPL_RELOC_MALLOC=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 1a36d6c5133..c32ccc292b4 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_GD_ADDR=0xd0018000 CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000 CONFIG_SPL_RELOC_STACK=0xd001c000 CONFIG_SPL_RELOC_MALLOC=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 54cd3d2b5cc..3e5c0449fd8 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_RELOC_TEXT_BASE=0xf8fbe000 CONFIG_SPL_RELOC_STACK=0xf8fbfff0 +CONFIG_TPL_GD_ADDR=0xf8fac000 CONFIG_TPL_RELOC_TEXT_BASE=0xf8f81000 CONFIG_TPL_RELOC_STACK=0xf8fb0000 CONFIG_TPL_RELOC_MALLOC=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 6a36f3ba9b2..ddd041c09a5 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_GD_ADDR=0xf8f9c000 CONFIG_SPL_RELOC_STACK=0xf8f9d000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000 diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index e246a2190d0..9da02480e5e 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_GD_ADDR=0xf8f9c000 CONFIG_SPL_RELOC_STACK=0xf8f9d000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000 diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index b49cdcb480d..6a75d6f1e81 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_RELOC_TEXT_BASE=0xf8fbe000 CONFIG_SPL_RELOC_STACK=0xf8fbfff0 +CONFIG_TPL_GD_ADDR=0xf8fac000 CONFIG_TPL_RELOC_TEXT_BASE=0xf8f81000 CONFIG_TPL_RELOC_STACK=0xf8fb0000 CONFIG_TPL_RELOC_MALLOC=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index a86a406eb7c..4122d1d741e 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_GD_ADDR=0xf8f9c000 CONFIG_SPL_RELOC_STACK=0xf8f9d000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000 diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 4c9f1b4c81e..cfd42e4bf3e 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_GD_ADDR=0xf8f9c000 CONFIG_SPL_RELOC_STACK=0xf8f9d000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000 diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index 899d074537f..bd3d7a3cbb0 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_RELOC_TEXT_BASE=0xf8fbe000 CONFIG_SPL_RELOC_STACK=0xf8fbfff0 +CONFIG_TPL_GD_ADDR=0xf8fac000 CONFIG_TPL_RELOC_TEXT_BASE=0xf8f81000 CONFIG_TPL_RELOC_STACK=0xf8fb0000 CONFIG_TPL_RELOC_MALLOC=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index ea91b9e95d5..43391a99b1d 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_GD_ADDR=0xf8f9c000 CONFIG_SPL_RELOC_STACK=0xf8f9d000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000 diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index 9351f00e5db..091518592c1 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_GD_ADDR=0xf8f9c000 CONFIG_SPL_RELOC_STACK=0xf8f9d000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000 diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index ad6c72c23c5..c0f6b6d8db4 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_RELOC_TEXT_BASE=0xf8ffe000 CONFIG_SPL_RELOC_STACK=0xf8fffff0 +CONFIG_TPL_GD_ADDR=0xf8fac000 CONFIG_TPL_RELOC_TEXT_BASE=0xf8f81000 CONFIG_TPL_RELOC_STACK=0xf8fb0000 CONFIG_TPL_RELOC_MALLOC=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index d4f82f16f58..b17346fea34 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_GD_ADDR=0xf8f9c000 CONFIG_SPL_RELOC_STACK=0xf8f9d000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000 diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 7a198e01785..041179e07d3 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_GD_ADDR=0xf8f9c000 CONFIG_SPL_RELOC_STACK=0xf8f9d000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000 diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index f5bd7015fb5..f3fa869c927 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_INIT_MINIMAL=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_RELOC_TEXT_BASE=0xf8ffe000 CONFIG_SPL_RELOC_STACK=0xf8fffff0 +CONFIG_TPL_GD_ADDR=0xf8fac000 CONFIG_TPL_RELOC_TEXT_BASE=0xf8f81000 CONFIG_TPL_RELOC_STACK=0xf8fb0000 CONFIG_TPL_RELOC_MALLOC=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 0e1eb82a00e..ae4b758776c 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_GD_ADDR=0xf8f9c000 CONFIG_SPL_RELOC_STACK=0xf8f9d000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000 diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 5ffda90dd3b..338bbecbb4b 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_GD_ADDR=0xf8f9c000 CONFIG_SPL_RELOC_STACK=0xf8f9d000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000 diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index 93dc0c1909f..2eb985823ec 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_GD_ADDR=0xfffc8000 CONFIG_SPL_RELOC_STACK=0xfffd8000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index dddf74262e3..9daf7fd5ef7 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_GD_ADDR=0xfffc8000 CONFIG_SPL_RELOC_STACK=0xfffd8000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index d8e41241ee6..ee9292a4fb9 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -43,6 +43,7 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_GD_ADDR=0xfffc8000 CONFIG_SPL_RELOC_STACK=0xfffd8000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index ccb1a3343ca..91a83007ce8 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_GD_ADDR=0xfffc8000 CONFIG_SPL_RELOC_STACK=0xfffd8000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index 4b3962c7de8..32fed7a33a4 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_GD_ADDR=0xfffc8000 CONFIG_SPL_RELOC_STACK=0xfffd8000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index a9668c562de..638ed7147a7 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_GD_ADDR=0xfffc8000 CONFIG_SPL_RELOC_STACK=0xfffd8000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index e8b83ed127d..b71659a6600 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_GD_ADDR=0xfffc8000 CONFIG_SPL_RELOC_STACK=0xfffd8000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index 1e9b5862265..1b8ef0cb365 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -41,6 +41,7 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_GD_ADDR=0xfffc8000 CONFIG_SPL_RELOC_STACK=0xfffd8000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 2967c4e9806..bcef31a665f 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -44,6 +44,7 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_GD_ADDR=0xfffc8000 CONFIG_SPL_RELOC_STACK=0xfffd8000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index dd5a3dee4d8..9e8e3ea8b5a 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_GD_ADDR=0xfffc8000 CONFIG_SPL_RELOC_STACK=0xfffd8000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index 2c35b80c0c6..b6a0b857a72 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_GD_ADDR=0xfffc8000 CONFIG_SPL_RELOC_STACK=0xfffd8000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index 21e0be3a03a..b0f0d165cdd 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_GD_ADDR=0xfffc8000 CONFIG_SPL_RELOC_STACK=0xfffd8000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index d2b8df2dbc1..feba8e54b5c 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_GD_ADDR=0xfffc8000 CONFIG_SPL_RELOC_STACK=0xfffd8000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index 24dea1ae9af..0495786bc5f 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_GD_ADDR=0xfffc8000 CONFIG_SPL_RELOC_STACK=0xfffd8000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index a5c397dc4dd..bb7c711d557 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -43,6 +43,7 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_GD_ADDR=0xfffc8000 CONFIG_SPL_RELOC_STACK=0xfffd8000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index 56eb03b0c02..fb35c83f1b6 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_FSL_PBL=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_SKIP_RELOCATE=y +CONFIG_SPL_GD_ADDR=0xfffc8000 CONFIG_SPL_RELOC_STACK=0xfffd8000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000 diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 13f8360a5b4..770f3963143 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -390,14 +390,12 @@ extern unsigned long get_sdram_size(void); #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR #define CONFIG_SYS_L2_SIZE (256 << 10) #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) -#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 96 * 1024) #elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD #define CONFIG_SYS_INIT_L2_ADDR 0xD0000000 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR #define CONFIG_SYS_L2_SIZE (256 << 10) #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) -#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 176 * 1024) #else #define CONFIG_SYS_INIT_L2_ADDR 0xD0000000 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 4dcd376d895..49654711f40 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -119,7 +119,6 @@ */ #define CONFIG_SYS_INIT_L3_ADDR 0xFFFC0000 #define CONFIG_SYS_L3_SIZE (256 << 10) -#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L3_ADDR + 32 * 1024) #define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024) #ifdef CONFIG_PHYS_64BIT diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 07eed3bb14f..a56e3bfb654 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -106,7 +106,6 @@ */ #define CONFIG_SYS_INIT_L3_VADDR 0xFFFC0000 #define CONFIG_SYS_L3_SIZE 256 << 10 -#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L3_VADDR + 32 * 1024) #define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024) #define CONFIG_SYS_DCSRBAR 0xf0000000 diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 16751e5a3fb..de81f53ec2c 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -92,7 +92,6 @@ */ #define CONFIG_SYS_INIT_L3_ADDR 0xFFFC0000 #define CONFIG_SYS_L3_SIZE (512 << 10) -#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L3_ADDR + 32 * 1024) #define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024) #define CONFIG_SYS_DCSRBAR 0xf0000000 diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index feec2c35991..04562bfbbdf 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -87,7 +87,6 @@ */ #define CONFIG_SYS_INIT_L3_ADDR 0xFFFC0000 #define CONFIG_SYS_L3_SIZE (512 << 10) -#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L3_ADDR + 32 * 1024) #define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024) #define CONFIG_SYS_DCSRBAR 0xf0000000 diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 21854139b9d..2ab1b647a86 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -67,7 +67,6 @@ */ #define CONFIG_SYS_INIT_L3_ADDR 0xFFFC0000 #define CONFIG_SYS_L3_SIZE (512 << 10) -#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L3_ADDR + 32 * 1024) #define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024) #define CONFIG_SYS_DCSRBAR 0xf0000000 diff --git a/include/configs/openpiton-riscv64.h b/include/configs/openpiton-riscv64.h index 497f0d50d0a..12bd8fb99cd 100644 --- a/include/configs/openpiton-riscv64.h +++ b/include/configs/openpiton-riscv64.h @@ -17,10 +17,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_BOOTM_LEN SZ_256M -#ifdef CONFIG_SPL -#define CONFIG_SPL_GD_ADDR 0x85000000 -#endif - /* --------------------------------------------------------------------- * Board boot configuration */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 0b866f4d5a6..eb9c78bf77c 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -336,13 +336,11 @@ #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) -#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024) #elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) -#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 176 * 1024) #else #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR -- GitLab From 0bf940c235f69a55e302caab9c8cdf5c2ceed1e9 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 27 May 2022 16:34:14 -0400 Subject: [PATCH 043/581] Drop CONFIG_SPL_SPI_FLASH_MINIMAL There are no users of CONFIG_SPL_SPI_FLASH_MINIMAL only platforms defining it, drop it. Signed-off-by: Tom Rini --- include/configs/P1010RDB.h | 1 - include/configs/T102xRDB.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/p1_p2_rdb_pc.h | 1 - 6 files changed, 6 deletions(-) diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 770f3963143..19ca05342d8 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -29,7 +29,6 @@ #define CONFIG_RAMBOOT_SPIFLASH #define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc #else -#define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (512 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000) diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 49654711f40..618b8ed845a 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -35,7 +35,6 @@ #ifdef CONFIG_SPIFLASH #define CONFIG_RESET_VECTOR_ADDRESS 0x30000FFC -#define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x30000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x30000000) diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index a56e3bfb654..3f4e59fa8ab 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -39,7 +39,6 @@ #ifdef CONFIG_SPIFLASH #define CONFIG_RESET_VECTOR_ADDRESS 0x30000FFC -#define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x30000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x30000000) diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index de81f53ec2c..b4a91eacb9e 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -43,7 +43,6 @@ #ifdef CONFIG_SPIFLASH #define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC -#define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x00200000) diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 04562bfbbdf..84e5d5df38d 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -38,7 +38,6 @@ #ifdef CONFIG_SPIFLASH #define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC -#define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x00200000) diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index eb9c78bf77c..24a88cebc02 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -84,7 +84,6 @@ #define CONFIG_SYS_MMC_U_BOOT_OFFS (128 << 10) #define CONFIG_SYS_MPC85XX_NO_RESETVEC #elif defined(CONFIG_SPIFLASH) -#define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000) -- GitLab From cad7f4bab842aefa6b4ec44312ad6b50db024526 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 27 May 2022 16:56:13 -0400 Subject: [PATCH 044/581] Remove CONFIG_SPL_STACK_SIZE This is not used anywhere, drop it. Signed-off-by: Tom Rini --- include/configs/microblaze-generic.h | 3 --- 1 file changed, 3 deletions(-) diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index e9c9bf9281c..389da112b93 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -128,7 +128,4 @@ /* BRAM size - will be generated */ #define CONFIG_SYS_INIT_RAM_SIZE 0x100000 -/* Just for sure that there is a space for stack */ -#define CONFIG_SPL_STACK_SIZE 0x100 - #endif /* __CONFIG_H */ -- GitLab From a62b7f0c24803528e82d88072050deaa0fc8775b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 27 May 2022 17:13:52 -0400 Subject: [PATCH 045/581] Convert CONFIG_SPL_TARGET to Kconfig This converts the following to Kconfig: CONFIG_SPL_TARGET Signed-off-by: Tom Rini --- README | 5 ----- common/spl/Kconfig | 9 +++++++++ configs/P1010RDB-PA_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PA_NAND_defconfig | 1 + configs/P1010RDB-PA_SDCARD_defconfig | 1 + configs/P1010RDB-PA_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_NAND_defconfig | 1 + configs/P1010RDB-PB_SDCARD_defconfig | 1 + configs/P1010RDB-PB_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_NAND_defconfig | 1 + configs/P1020RDB-PC_SDCARD_defconfig | 1 + configs/P1020RDB-PC_SPIFLASH_defconfig | 1 + configs/P1020RDB-PD_NAND_defconfig | 1 + configs/P1020RDB-PD_SDCARD_defconfig | 1 + configs/P1020RDB-PD_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_NAND_defconfig | 1 + configs/P2020RDB-PC_SDCARD_defconfig | 1 + configs/P2020RDB-PC_SPIFLASH_defconfig | 1 + configs/k2e_evm_defconfig | 1 + configs/k2g_evm_defconfig | 1 + configs/k2hk_evm_defconfig | 1 + configs/k2l_evm_defconfig | 1 + configs/ls1046ardb_qspi_spl_defconfig | 1 + configs/ls1088aqds_sdcard_ifc_defconfig | 1 + configs/ls1088aqds_sdcard_qspi_defconfig | 1 + configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1088ardb_sdcard_qspi_defconfig | 1 + configs/ls2080aqds_nand_defconfig | 1 + configs/ls2080aqds_sdcard_defconfig | 1 + configs/ls2080ardb_nand_defconfig | 1 + configs/m53menlo_defconfig | 1 + configs/socfpga_agilex_atf_defconfig | 1 + configs/socfpga_agilex_defconfig | 1 + configs/socfpga_agilex_vab_defconfig | 1 + configs/socfpga_n5x_atf_defconfig | 1 + configs/socfpga_n5x_defconfig | 1 + configs/socfpga_n5x_vab_defconfig | 1 + configs/socfpga_stratix10_atf_defconfig | 1 + configs/socfpga_stratix10_defconfig | 1 + configs/stm32mp15_dhcom_basic_defconfig | 1 + configs/stm32mp15_dhcor_basic_defconfig | 1 + configs/uniphier_ld4_sld8_defconfig | 1 + configs/uniphier_v7_defconfig | 1 + include/configs/P1010RDB.h | 5 ----- include/configs/dh_imx6.h | 1 - include/configs/ge_b1x5v2.h | 1 - include/configs/ls1046a_common.h | 1 - include/configs/ls1088a_common.h | 2 -- include/configs/ls2080a_common.h | 2 -- include/configs/m53menlo.h | 1 - include/configs/p1_p2_rdb_pc.h | 5 ----- include/configs/rcar-gen2-common.h | 4 ---- include/configs/rcar-gen3-common.h | 4 ---- include/configs/socfpga_soc64_common.h | 1 - include/configs/stm32mp15_dh_dhsom.h | 2 -- include/configs/ti_armv7_keystone2.h | 1 - include/configs/uniphier.h | 2 -- 68 files changed, 61 insertions(+), 37 deletions(-) diff --git a/README b/README index 452e5955023..354913f8236 100644 --- a/README +++ b/README @@ -1679,11 +1679,6 @@ The following options need to be configured: CONFIG_SPL_RAM_DEVICE Support for running image already present in ram, in SPL binary - CONFIG_SPL_TARGET - Final target image containing SPL and payload. Some SPLs - use an arch-specific makefile fragment instead, for - example if more than one image needs to be produced. - CONFIG_SPL_FIT_PRINT Printing information about a FIT image adds quite a bit of code to SPL. So this is normally disabled in SPL. Use this diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 027ac4274b6..dfbda1befb5 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -1583,6 +1583,15 @@ config SPL_OPENSBI_LOAD_ADDR help Load address of the OpenSBI binary. +config SPL_TARGET + string "Addtional build targets for 'make'" + default "spl/u-boot-spl.srec" if RCAR_GEN2 + default "spl/u-boot-spl.scif" if RCAR_GEN3 + default "" + help + On some platforms we need to have 'make' run additional build target + rules. If required on your platform, enter it here, otherwise leave blank. + config TPL bool depends on SUPPORT_TPL diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index 06b4ca72b21..6c4142c200b 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -42,6 +42,7 @@ CONFIG_TPL_RELOC_MALLOC=y CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_TPL=y CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_TPL_DRIVERS_MISC=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index b116eee6c5c..324ad908bb0 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index df4caee9e72..2299f450a97 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index 918a107f528..5813c75f10a 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -41,6 +41,7 @@ CONFIG_TPL_RELOC_MALLOC=y CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_TPL=y CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_TPL_DRIVERS_MISC=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 41988bb1f72..a51f9acd586 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index b4dd81ea940..c2b5d7762ce 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -41,6 +41,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index b69e6cf5655..4caf43dade2 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -43,6 +43,7 @@ CONFIG_TPL_RELOC_MALLOC=y CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_TPL=y CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_TPL_DRIVERS_MISC=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 21e4e7f0f5f..50053876f8e 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index dbbc25d319d..6f0cd359abb 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -43,6 +43,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index c4e9d590054..16b52196aeb 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -42,6 +42,7 @@ CONFIG_TPL_RELOC_MALLOC=y CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_TPL=y CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_TPL_DRIVERS_MISC=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index c0ea6b9635a..6d3be4303a2 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index c32ccc292b4..a54f7eab5f2 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 3e5c0449fd8..80bfe31d79a 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -43,6 +43,7 @@ CONFIG_TPL_RELOC_MALLOC=y CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_TPL=y CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_TPL_ENV_SUPPORT=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index ddd041c09a5..2619ef0fb17 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index 9da02480e5e..e37c74bd1f1 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -43,6 +43,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 6a75d6f1e81..860636292d2 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -42,6 +42,7 @@ CONFIG_TPL_RELOC_MALLOC=y CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_TPL=y CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_TPL_ENV_SUPPORT=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 4122d1d741e..c0d78c9f486 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index cfd42e4bf3e..debd83ed93e 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index bd3d7a3cbb0..d770fc7ba7e 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -42,6 +42,7 @@ CONFIG_TPL_RELOC_MALLOC=y CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_TPL=y CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_TPL_ENV_SUPPORT=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index 43391a99b1d..db484c0d189 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index 091518592c1..d9d63076123 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index c0f6b6d8db4..ac4d4579bb7 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -43,6 +43,7 @@ CONFIG_TPL_RELOC_MALLOC=y CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_TPL=y CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_TPL_ENV_SUPPORT=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index b17346fea34..b2a5a72143d 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 041179e07d3..42e31b4e22c 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -43,6 +43,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index f3fa869c927..69ca044e5a2 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -42,6 +42,7 @@ CONFIG_TPL_RELOC_MALLOC=y CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_TPL=y CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_TPL_ENV_SUPPORT=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index ae4b758776c..621e5b035f2 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 338bbecbb4b..04b10d36c52 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index 9423b453c05..58c8c13b15a 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -45,6 +45,7 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_POWER=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 +CONFIG_SPL_TARGET="u-boot-spi.gph" CONFIG_SYS_MAXARGS=64 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index 10150f5d642..b96d1fc7c1a 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -43,6 +43,7 @@ CONFIG_SPL_NAND_BASE=y CONFIG_SPL_POWER=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 +CONFIG_SPL_TARGET="u-boot-spi.gph" CONFIG_SYS_MAXARGS=64 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index 2a2fb1d0717..cfe5978e550 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -45,6 +45,7 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_POWER=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 +CONFIG_SPL_TARGET="u-boot-spi.gph" CONFIG_SYS_MAXARGS=64 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index 906e1042070..47d5bd14ac5 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -45,6 +45,7 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_POWER=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 +CONFIG_SPL_TARGET="u-boot-spi.gph" CONFIG_SYS_MAXARGS=64 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig index c081b786a12..2f6b546a260 100644 --- a/configs/ls1046ardb_qspi_spl_defconfig +++ b/configs/ls1046ardb_qspi_spl_defconfig @@ -58,6 +58,7 @@ CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_SYS_OS_BASE=0x40980000 CONFIG_SPL_WATCHDOG=y +CONFIG_SPL_TARGET="spl/u-boot-spl.pbl" CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_SPL=y diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig index b2e8132446d..663aacf876b 100644 --- a/configs/ls1088aqds_sdcard_ifc_defconfig +++ b/configs/ls1088aqds_sdcard_ifc_defconfig @@ -53,6 +53,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig index 40306d612a4..f3e204875ef 100644 --- a/configs/ls1088aqds_sdcard_qspi_defconfig +++ b/configs/ls1088aqds_sdcard_qspi_defconfig @@ -54,6 +54,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig index bc44ede08c7..5b462a41c90 100644 --- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig @@ -54,6 +54,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig index ad0e583188b..455fce3ed79 100644 --- a/configs/ls1088ardb_sdcard_qspi_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_defconfig @@ -55,6 +55,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index 209202dc75d..dab9a7fb85a 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -45,6 +45,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig index 0f40fa60f18..3d6aa69d5f1 100644 --- a/configs/ls2080aqds_sdcard_defconfig +++ b/configs/ls2080aqds_sdcard_defconfig @@ -46,6 +46,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index f36cf47cff2..9fcc5d6647d 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -51,6 +51,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index 455f19617ac..2ccea8315c7 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x70004000 CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_TARGET="u-boot-with-nand-spl.imx" CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=1024 diff --git a/configs/socfpga_agilex_atf_defconfig b/configs/socfpga_agilex_atf_defconfig index ebe90ce2a5b..e20789a6b46 100644 --- a/configs/socfpga_agilex_atf_defconfig +++ b/configs/socfpga_agilex_atf_defconfig @@ -43,6 +43,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000 CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex" CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " CONFIG_SYS_MAXARGS=64 diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig index ab853594631..7ae2b164a02 100644 --- a/configs/socfpga_agilex_defconfig +++ b/configs/socfpga_agilex_defconfig @@ -37,6 +37,7 @@ CONFIG_SYS_SPL_MALLOC_SIZE=0x500000 CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000 +CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex" CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " CONFIG_SYS_MAXARGS=64 diff --git a/configs/socfpga_agilex_vab_defconfig b/configs/socfpga_agilex_vab_defconfig index fa4beddb2dc..539548bfcbb 100644 --- a/configs/socfpga_agilex_vab_defconfig +++ b/configs/socfpga_agilex_vab_defconfig @@ -44,6 +44,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000 CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex" CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " CONFIG_SYS_MAXARGS=64 diff --git a/configs/socfpga_n5x_atf_defconfig b/configs/socfpga_n5x_atf_defconfig index dd0ad36b4b6..77d868a74ae 100644 --- a/configs/socfpga_n5x_atf_defconfig +++ b/configs/socfpga_n5x_atf_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000 CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex" CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_N5X # " CONFIG_SYS_MAXARGS=64 diff --git a/configs/socfpga_n5x_defconfig b/configs/socfpga_n5x_defconfig index f0d41d1e8f5..92d6045c6a7 100644 --- a/configs/socfpga_n5x_defconfig +++ b/configs/socfpga_n5x_defconfig @@ -34,6 +34,7 @@ CONFIG_SYS_SPL_MALLOC_SIZE=0x500000 CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000 +CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex" CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_N5X # " CONFIG_SYS_MAXARGS=64 diff --git a/configs/socfpga_n5x_vab_defconfig b/configs/socfpga_n5x_vab_defconfig index f7a827f770c..d3a9042ef22 100644 --- a/configs/socfpga_n5x_vab_defconfig +++ b/configs/socfpga_n5x_vab_defconfig @@ -43,6 +43,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000 CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex" CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_N5X # " CONFIG_SYS_MAXARGS=64 diff --git a/configs/socfpga_stratix10_atf_defconfig b/configs/socfpga_stratix10_atf_defconfig index 39ec1b2b114..e4d8a2e049a 100644 --- a/configs/socfpga_stratix10_atf_defconfig +++ b/configs/socfpga_stratix10_atf_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000 CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex" CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # " CONFIG_SYS_MAXARGS=64 diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index fac82b88c3f..6aff07d7784 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -38,6 +38,7 @@ CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x3fa00000 CONFIG_SYS_SPL_MALLOC_SIZE=0x500000 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x3C00000 +CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex" CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # " CONFIG_SYS_MAXARGS=64 diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 38f16437aa3..72d2f6e9a7c 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -49,6 +49,7 @@ CONFIG_SPL_SPI_FLASH_MTD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y +CONFIG_SPL_TARGET="u-boot.itb" CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 # CONFIG_CMD_ELF is not set diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index 869afdf6c80..b16ad4fca2a 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -47,6 +47,7 @@ CONFIG_SPL_SPI_FLASH_MTD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y +CONFIG_SPL_TARGET="u-boot.itb" CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 # CONFIG_CMD_ELF is not set diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig index ceb50835f53..72306ab25eb 100644 --- a/configs/uniphier_ld4_sld8_defconfig +++ b/configs/uniphier_ld4_sld8_defconfig @@ -25,6 +25,7 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_STACK=0x100000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_CMD_CONFIG=y # CONFIG_CMD_XIMG is not set CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig index a2ea3a98d09..a448d1cb4be 100644 --- a/configs/uniphier_v7_defconfig +++ b/configs/uniphier_v7_defconfig @@ -25,6 +25,7 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_STACK=0x100000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_CMD_CONFIG=y # CONFIG_CMD_XIMG is not set CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 19ca05342d8..ce63e640d5c 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -16,7 +16,6 @@ #include #ifdef CONFIG_SDCARD -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SYS_MMC_U_BOOT_SIZE (512 << 10) #define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000) #define CONFIG_SYS_MMC_U_BOOT_START (0x11000000) @@ -29,7 +28,6 @@ #define CONFIG_RAMBOOT_SPIFLASH #define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc #else -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (512 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000) @@ -40,8 +38,6 @@ #ifdef CONFIG_MTD_RAW_NAND #ifdef CONFIG_NXP_ESBC -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" - #define CONFIG_SYS_NAND_U_BOOT_SIZE ((768 << 10) - 0x2000) #define CONFIG_SYS_NAND_U_BOOT_DST (0x00200000 - CONFIG_SPL_MAX_SIZE) #define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 @@ -60,7 +56,6 @@ #define CONFIG_SYS_MPC85XX_NO_RESETVEC #endif #endif -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #endif #endif diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index d177b457aa4..b495826301e 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -23,7 +23,6 @@ /* SPL */ #include "imx6_spl.h" /* common IMX6 SPL configuration */ -#define CONFIG_SPL_TARGET "u-boot-with-spl.imx" /* Miscellaneous configurable options */ diff --git a/include/configs/ge_b1x5v2.h b/include/configs/ge_b1x5v2.h index 5a5a5d687a8..252ab5e7473 100644 --- a/include/configs/ge_b1x5v2.h +++ b/include/configs/ge_b1x5v2.h @@ -13,7 +13,6 @@ #include "mx6_common.h" #include "imx6_spl.h" -#define CONFIG_SPL_TARGET "u-boot-with-spl.imx" /* PWM */ #define CONFIG_IMX6_PWM_PER_CLK 66000000 diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index c2563b11d05..8e9103562eb 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -61,7 +61,6 @@ #endif #if defined(CONFIG_QSPI_BOOT) && defined(CONFIG_SPL) -#define CONFIG_SPL_TARGET "spl/u-boot-spl.pbl" #define CONFIG_SYS_MONITOR_LEN 0x100000 #endif diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 3ef163d5eae..9a29bb6ca1e 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -144,8 +144,6 @@ unsigned long long get_qixis_addr(void); #endif #ifdef CONFIG_SPL -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" - #ifdef CONFIG_NXP_ESBC #define CONFIG_U_BOOT_HDR_SIZE (16 << 10) /* diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 3551a0ddb04..f9eb829cda2 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -137,8 +137,6 @@ unsigned long long get_qixis_addr(void); "mcinitcmd=fsl_mc start mc 0x580a00000" \ " 0x580e00000 \0" -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" - #ifdef CONFIG_NAND_BOOT #define CONFIG_SYS_NAND_U_BOOT_DST 0x80400000 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 433952c9d72..ed44f355da8 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -108,7 +108,6 @@ /* * NAND SPL */ -#define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx" #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 24a88cebc02..f74ad628fee 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -77,14 +77,12 @@ #endif #ifdef CONFIG_SDCARD -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000) #define CONFIG_SYS_MMC_U_BOOT_START (0x11000000) #define CONFIG_SYS_MMC_U_BOOT_OFFS (128 << 10) #define CONFIG_SYS_MPC85XX_NO_RESETVEC #elif defined(CONFIG_SPIFLASH) -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000) @@ -97,7 +95,6 @@ #define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000) #define CONFIG_SYS_NAND_U_BOOT_START (0x11000000) #elif defined(CONFIG_SPL_BUILD) -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0xf8f80000 #define CONFIG_SYS_NAND_U_BOOT_START 0xf8f80000 @@ -106,8 +103,6 @@ #define CONFIG_SYS_MPC85XX_NO_RESETVEC #endif #endif /* not CONFIG_TPL_BUILD */ - -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #endif #ifndef CONFIG_RESET_VECTOR_ADDRESS diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h index b4d2a5252f5..2e542116904 100644 --- a/include/configs/rcar-gen2-common.h +++ b/include/configs/rcar-gen2-common.h @@ -10,10 +10,6 @@ #include -#ifdef CONFIG_SPL -#define CONFIG_SPL_TARGET "spl/u-boot-spl.srec" -#endif - #ifndef CONFIG_PINCTRL_PFC #define CONFIG_SH_GPIO_PFC #endif diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index ee9fc2862e5..e80e45dcbd7 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -11,10 +11,6 @@ #include -#ifdef CONFIG_SPL -#define CONFIG_SPL_TARGET "spl/u-boot-spl.scif" -#endif - /* boot option */ /* Generic Interrupt Controller Definitions */ diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index cbc18061f42..b71f8bab156 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -143,6 +143,5 @@ unsigned int cm_get_l4_sys_free_clk_hz(void); * 0x8000_0000 ...... End of SDRAM_1 (assume 2GB) * */ -#define CONFIG_SPL_TARGET "spl/u-boot-spl-dtb.hex" #endif /* __CONFIG_SOCFPGA_SOC64_COMMON_H__ */ diff --git a/include/configs/stm32mp15_dh_dhsom.h b/include/configs/stm32mp15_dh_dhsom.h index bb95480eeb2..910d7ef107b 100644 --- a/include/configs/stm32mp15_dh_dhsom.h +++ b/include/configs/stm32mp15_dh_dhsom.h @@ -33,6 +33,4 @@ #include -#define CONFIG_SPL_TARGET "u-boot.itb" - #endif diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 060969647b2..7fd79953dc1 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -12,7 +12,6 @@ /* U-Boot Build Configuration */ /* SoC Configuration */ -#define CONFIG_SPL_TARGET "u-boot-spi.gph" /* Memory Configuration */ #define CONFIG_SYS_LPAE_SDRAM_BASE 0x800000000 diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 6493569888d..2bb9e59b946 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -178,6 +178,4 @@ /* subtract sizeof(struct image_header) */ #define CONFIG_SYS_UBOOT_BASE (0x130000 - 0x40) -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" - #endif /* __CONFIG_UNIPHIER_H__ */ -- GitLab From b4b9a00ed5933048d1d3c88bb63d30235f6543c5 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 27 May 2022 22:06:52 -0400 Subject: [PATCH 046/581] Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig This converts the following to Kconfig: CONFIG_SYS_SPL_ARGS_ADDR In doing so, we also consistently use this variable for SPL_OS_BOOT and not CONFIG_SYS_FDT_BASE in some cases. Signed-off-by: Tom Rini --- common/spl/Kconfig | 8 ++++++++ common/spl/spl_nor.c | 4 ++-- common/spl/spl_xip.c | 2 +- configs/am3517_evm_defconfig | 1 + ...avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig | 1 + configs/devkit8000_defconfig | 1 + configs/display5_defconfig | 1 + configs/display5_factory_defconfig | 1 + configs/gwventana_emmc_defconfig | 1 + configs/gwventana_gw5904_defconfig | 1 + configs/gwventana_nand_defconfig | 1 + configs/igep00x0_defconfig | 1 + configs/imx28_xea_defconfig | 1 + configs/imx28_xea_sb_defconfig | 1 - configs/imx6dl_mamoj_defconfig | 1 + configs/imx6q_logic_defconfig | 1 + configs/imx6qdl_icore_mipi_defconfig | 1 + configs/imx6qdl_icore_mmc_defconfig | 1 + configs/imx6qdl_icore_rqs_defconfig | 1 + configs/ls1046ardb_qspi_spl_defconfig | 1 + configs/mccmon6_nor_defconfig | 1 + configs/microblaze-generic_defconfig | 1 + configs/omap35_logic_defconfig | 1 + configs/omap35_logic_somlv_defconfig | 1 + configs/omap3_logic_defconfig | 1 + configs/omap3_logic_somlv_defconfig | 1 + configs/riotboard_defconfig | 1 + configs/stm32746g-eval_spl_defconfig | 1 + configs/stm32f746-disco_spl_defconfig | 1 + configs/stm32f769-disco_spl_defconfig | 1 + configs/syzygy_hub_defconfig | 1 + configs/vyasa-rk3288_defconfig | 1 + configs/xilinx_zynq_virt_defconfig | 1 + configs/xilinx_zynqmp_virt_defconfig | 1 + include/configs/am43xx_evm.h | 2 -- include/configs/brppt1.h | 2 -- include/configs/cm_t43.h | 1 - include/configs/devkit8000.h | 3 --- include/configs/display5.h | 1 - include/configs/embestmx6boards.h | 1 - include/configs/gw_ventana.h | 1 - include/configs/imx6-engicam.h | 2 -- include/configs/imx6_logic.h | 1 - include/configs/imx6dl-mamoj.h | 1 - include/configs/ls1043ardb.h | 1 - include/configs/ls1046ardb.h | 1 - include/configs/mccmon6.h | 1 - include/configs/microblaze-generic.h | 7 ------- include/configs/mt7629.h | 1 - include/configs/mx6sabreauto.h | 2 -- include/configs/mx6sabresd.h | 1 - include/configs/pico-imx6.h | 1 - include/configs/pico-imx6ul.h | 1 - include/configs/pico-imx7d.h | 1 - include/configs/sama5d3_xplained.h | 1 - include/configs/stm32f746-disco.h | 4 ---- include/configs/ti_am335x_common.h | 2 -- include/configs/ti_omap3_common.h | 2 -- include/configs/ti_omap4_common.h | 2 -- include/configs/ti_omap5_common.h | 3 --- include/configs/trats.h | 1 - include/configs/vyasa-rk3288.h | 1 - include/configs/xea.h | 2 -- include/configs/xilinx_zynqmp.h | 1 - include/configs/zynq-common.h | 1 - 65 files changed, 41 insertions(+), 56 deletions(-) diff --git a/common/spl/Kconfig b/common/spl/Kconfig index dfbda1befb5..71b2600df58 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -1188,6 +1188,14 @@ config SPL_OS_BOOT Enable booting directly to an OS from SPL. for more info read doc/README.falcon +config SYS_SPL_ARGS_ADDR + hex "Address in memory to load 'args' file for Falcon Mode to" + depends on SPL_OS_BOOT + default 0x88000000 if ARCH_OMAP2PLUS + help + Address in memory where the 'args' file, typically a device tree + will be loaded in to memory. + if SPL_OS_BOOT config SYS_OS_BASE hex "addr, where OS is found" diff --git a/common/spl/spl_nor.c b/common/spl/spl_nor.c index 067a2d42bbf..7986e930d28 100644 --- a/common/spl/spl_nor.c +++ b/common/spl/spl_nor.c @@ -74,8 +74,8 @@ static int spl_nor_load_image(struct spl_image_info *spl_image, (void *)(CONFIG_SYS_OS_BASE + sizeof(struct image_header)), spl_image->size); -#ifdef CONFIG_SYS_FDT_BASE - spl_image->arg = (void *)CONFIG_SYS_FDT_BASE; +#ifdef CONFIG_SYS_SPL_ARGS_ADDR + spl_image->arg = (void *)CONFIG_SYS_SPL_ARGS_ADDR; #endif return 0; diff --git a/common/spl/spl_xip.c b/common/spl/spl_xip.c index 33863fe7d45..e9a40b0ec79 100644 --- a/common/spl/spl_xip.c +++ b/common/spl/spl_xip.c @@ -14,7 +14,7 @@ static int spl_xip(struct spl_image_info *spl_image, { #if CONFIG_IS_ENABLED(OS_BOOT) if (!spl_start_uboot()) { - spl_image->arg = (void *)CONFIG_SYS_FDT_BASE; + spl_image->arg = (void *)CONFIG_SYS_SPL_ARGS_ADDR; spl_image->name = "Linux"; spl_image->os = IH_OS_LINUX; spl_image->load_addr = CONFIG_SYS_LOAD_ADDR; diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig index 03fc4fba8f5..05ee3570fc9 100644 --- a/configs/am3517_evm_defconfig +++ b/configs/am3517_evm_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_SIMPLE=y CONFIG_SPL_NAND_BASE=y CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x84000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 # CONFIG_SPL_POWER is not set diff --git a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig index 7f4c804c957..450b2830e56 100644 --- a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig +++ b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig @@ -41,6 +41,7 @@ CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000 CONFIG_SPL_FS_LOAD_KERNEL_NAME="atf-uboot.ub" CONFIG_SPL_FS_LOAD_ARGS_NAME="u-boot.bin" CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x8000000 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2073 CONFIG_CMD_MEMTEST=y diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index 08c053b4f15..dc07c146bdb 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -22,6 +22,7 @@ CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_SIMPLE=y CONFIG_SPL_NAND_BASE=y CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x80000100 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x500 CONFIG_SYS_MAXARGS=64 diff --git a/configs/display5_defconfig b/configs/display5_defconfig index 6e74f68f400..646372c10a3 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -44,6 +44,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_SAVEENV=y CONFIG_SPL_I2C=y CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x18000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x100 CONFIG_SPL_SPI_LOAD=y diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig index eab9c7c1e86..245122843bc 100644 --- a/configs/display5_factory_defconfig +++ b/configs/display5_factory_defconfig @@ -39,6 +39,7 @@ CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_DMA=y CONFIG_SPL_I2C=y CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x18000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x100 CONFIG_SPL_SPI_LOAD=y diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index ef2ee77c3dc..a96ed26292a 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -46,6 +46,7 @@ CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_DMA=y CONFIG_SPL_I2C=y CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x18000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 CONFIG_SPL_POWER=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index a736b81ad9a..85bbed23ebc 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -46,6 +46,7 @@ CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_DMA=y CONFIG_SPL_I2C=y CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x18000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 CONFIG_SPL_POWER=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index 5372476f045..200ecf4a0f9 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -47,6 +47,7 @@ CONFIG_SPL_DMA=y CONFIG_SPL_I2C=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x18000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 CONFIG_SPL_POWER=y diff --git a/configs/igep00x0_defconfig b/configs/igep00x0_defconfig index b1162e7cdb8..96f2f9df816 100644 --- a/configs/igep00x0_defconfig +++ b/configs/igep00x0_defconfig @@ -41,6 +41,7 @@ CONFIG_SPL_UBI_LOAD_KERNEL_ID=3 CONFIG_SPL_UBI_LOAD_ARGS_ID=4 CONFIG_SPL_ONENAND_SUPPORT=y CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x84000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 CONFIG_SYS_MAXARGS=64 diff --git a/configs/imx28_xea_defconfig b/configs/imx28_xea_defconfig index f460a01e8ce..37233bafad9 100644 --- a/configs/imx28_xea_defconfig +++ b/configs/imx28_xea_defconfig @@ -45,6 +45,7 @@ CONFIG_SPL_DMA=y CONFIG_SPL_MMC_TINY=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x44000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x800 CONFIG_SPL_SPI_LOAD=y diff --git a/configs/imx28_xea_sb_defconfig b/configs/imx28_xea_sb_defconfig index bad232ceec5..ad478c469bc 100644 --- a/configs/imx28_xea_sb_defconfig +++ b/configs/imx28_xea_sb_defconfig @@ -33,7 +33,6 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0 CONFIG_SUPPORT_EMMC_BOOT_OVERRIDE_PART_CONFIG=y CONFIG_SPL_DMA=y CONFIG_SPL_DM_SPI_FLASH=y -CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_SPL=y diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index 7e6e3bb4a3f..a52ce458f2b 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -19,6 +19,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x13000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index 4e665ba42bf..cc7a6f0aa09 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_I2C=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x18000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 CONFIG_SPL_USB_HOST=y diff --git a/configs/imx6qdl_icore_mipi_defconfig b/configs/imx6qdl_icore_mipi_defconfig index 754537044a3..929d31722b7 100644 --- a/configs/imx6qdl_icore_mipi_defconfig +++ b/configs/imx6qdl_icore_mipi_defconfig @@ -35,6 +35,7 @@ CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_RAW_IMAGE_SUPPORT=y CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x18000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index 4e9fadd699a..3465e1915c2 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -38,6 +38,7 @@ CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_RAW_IMAGE_SUPPORT=y CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x18000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig index d87a47700cd..b2ca3ee1b65 100644 --- a/configs/imx6qdl_icore_rqs_defconfig +++ b/configs/imx6qdl_icore_rqs_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTCOMMAND="run $modeboot" CONFIG_SPL_RAW_IMAGE_SUPPORT=y CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x18000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 CONFIG_SPL_WATCHDOG=y diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig index 2f6b546a260..799d460f2bd 100644 --- a/configs/ls1046ardb_qspi_spl_defconfig +++ b/configs/ls1046ardb_qspi_spl_defconfig @@ -56,6 +56,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x90000000 CONFIG_SYS_OS_BASE=0x40980000 CONFIG_SPL_WATCHDOG=y CONFIG_SPL_TARGET="spl/u-boot-spl.pbl" diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig index 1214163af39..80b59cbb053 100644 --- a/configs/mccmon6_nor_defconfig +++ b/configs/mccmon6_nor_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x18000000 CONFIG_SYS_OS_BASE=0x8180000 CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index 86bda86b72f..8ece12630fb 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK=0x100000 CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x2a000000 CONFIG_SYS_OS_BASE=0x2c060000 CONFIG_SYS_PROMPT="U-Boot-mONStR> " CONFIG_SYS_MAXARGS=15 diff --git a/configs/omap35_logic_defconfig b/configs/omap35_logic_defconfig index e5fcba8caf1..6efc50fdf5e 100644 --- a/configs/omap35_logic_defconfig +++ b/configs/omap35_logic_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_SIMPLE=y CONFIG_SPL_NAND_BASE=y CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x84000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 CONFIG_SYS_PROMPT="OMAP Logic # " diff --git a/configs/omap35_logic_somlv_defconfig b/configs/omap35_logic_somlv_defconfig index 45aee91b372..3ea4d7a724e 100644 --- a/configs/omap35_logic_somlv_defconfig +++ b/configs/omap35_logic_somlv_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_SIMPLE=y CONFIG_SPL_NAND_BASE=y CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x84000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 # CONFIG_SPL_POWER is not set diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index 9b2a8064449..5c7d30d66ed 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_SIMPLE=y CONFIG_SPL_NAND_BASE=y CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x84000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 CONFIG_SYS_PROMPT="OMAP Logic # " diff --git a/configs/omap3_logic_somlv_defconfig b/configs/omap3_logic_somlv_defconfig index ee36800d647..9961e005a07 100644 --- a/configs/omap3_logic_somlv_defconfig +++ b/configs/omap3_logic_somlv_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_SIMPLE=y CONFIG_SPL_NAND_BASE=y CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x84000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 # CONFIG_SPL_POWER is not set diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig index 8fe264d7543..924254cbb97 100644 --- a/configs/riotboard_defconfig +++ b/configs/riotboard_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_FS_LOAD_ARGS_NAME="imx6dl-riotboard.dtb" CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x13000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x0 CONFIG_SYS_MAXARGS=32 diff --git a/configs/stm32746g-eval_spl_defconfig b/configs/stm32746g-eval_spl_defconfig index 989bc7af301..55e44f863c1 100644 --- a/configs/stm32746g-eval_spl_defconfig +++ b/configs/stm32746g-eval_spl_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_XIP_SUPPORT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x81c0000 CONFIG_SPL_DM_RESET=y CONFIG_SYS_PROMPT="U-Boot > " CONFIG_SYS_PBSIZE=1050 diff --git a/configs/stm32f746-disco_spl_defconfig b/configs/stm32f746-disco_spl_defconfig index 3aaf7d35121..c174984b939 100644 --- a/configs/stm32f746-disco_spl_defconfig +++ b/configs/stm32f746-disco_spl_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_XIP_SUPPORT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x81c0000 CONFIG_SPL_DM_RESET=y CONFIG_SYS_PROMPT="U-Boot > " CONFIG_SYS_PBSIZE=1050 diff --git a/configs/stm32f769-disco_spl_defconfig b/configs/stm32f769-disco_spl_defconfig index 55ac1174af6..a5dc89c8027 100644 --- a/configs/stm32f769-disco_spl_defconfig +++ b/configs/stm32f769-disco_spl_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_XIP_SUPPORT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x81c0000 CONFIG_SPL_DM_RESET=y CONFIG_SYS_PROMPT="U-Boot > " CONFIG_SYS_PBSIZE=1050 diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig index 0baf6dd886a..d632cb86a25 100644 --- a/configs/syzygy_hub_defconfig +++ b/configs/syzygy_hub_defconfig @@ -36,6 +36,7 @@ CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x2000000 CONFIG_SPL_FS_LOAD_ARGS_NAME="system.dtb" CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x10000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x0 CONFIG_SYS_MAXARGS=32 diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig index 27c704f8a22..9ae73816246 100644 --- a/configs/vyasa-rk3288_defconfig +++ b/configs/vyasa-rk3288_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_SPL_ARGS_ADDR=0xffe5000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x8800 CONFIG_CMD_SPL=y diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index a5cee103cb3..92ef35c6475 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -41,6 +41,7 @@ CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_FS_LOAD_ARGS_NAME="system.dtb" CONFIG_SPL_FPGA=y CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x10000000 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 CONFIG_SYS_MAXARGS=32 diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 0ac75f6572f..7f0ed8bc225 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -46,6 +46,7 @@ CONFIG_SPL_FS_LOAD_KERNEL_NAME="atf-uboot.ub" CONFIG_SPL_FS_LOAD_ARGS_NAME="u-boot.bin" CONFIG_SPL_FPGA=y CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_SPL_ARGS_ADDR=0x8000000 CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_SPI_LOAD=y diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 5057441f750..bce035531ce 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -27,8 +27,6 @@ #define CONFIG_POWER_TPS62362 /* SPL defines. */ -#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ - (128 << 20)) /* Enabling L2 Cache */ #define CONFIG_SYS_L2_PL310 diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h index 769b3f073ac..b98d4ab68ad 100644 --- a/include/configs/brppt1.h +++ b/include/configs/brppt1.h @@ -29,8 +29,6 @@ */ #ifdef CONFIG_SPL_OS_BOOT -#define CONFIG_SYS_SPL_ARGS_ADDR 0x80F80000 - /* RAW SD card / eMMC */ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */ diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index eb015e1b20f..ec1355b8a32 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -76,7 +76,6 @@ "bootz ${loadaddr} - ${fdtaddr}\0" /* SPL defines. */ -#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + (128 << 20)) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* EEPROM */ diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index 340c9d0d4a3..2a3daea9f25 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -124,7 +124,4 @@ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x8 /* address 0x1000 */ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 8 /* 4KB */ -#undef CONFIG_SYS_SPL_ARGS_ADDR -#define CONFIG_SYS_SPL_ARGS_ADDR (PHYS_SDRAM_1 + 0x100) - #endif /* __CONFIG_H */ diff --git a/include/configs/display5.h b/include/configs/display5.h index d7fbfbd702e..420b0c9f6e4 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -10,7 +10,6 @@ #include "mx6_common.h" /* Falcon Mode */ -#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 /* Falcon Mode - MMC support */ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x3F00 diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index 21b436bdb4c..3023d0e0b25 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -53,7 +53,6 @@ #ifdef CONFIG_SPL #include "imx6_spl.h" /* RiOTboard */ -#define CONFIG_SYS_SPL_ARGS_ADDR 0x13000000 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 /* offset 69KB */ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 /* offset 69KB */ diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index cc6909774ed..2e6b9523f45 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -10,7 +10,6 @@ /* Location in NAND to read U-Boot from */ /* Falcon Mode */ -#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 /* Falcon Mode - NAND support: args@17MB kernel@18MB */ #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS (18 * SZ_1M) diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h index 2a794db4dff..4a1eae1d8b9 100644 --- a/include/configs/imx6-engicam.h +++ b/include/configs/imx6-engicam.h @@ -135,8 +135,6 @@ /* Falcon Mode */ #ifdef CONFIG_SPL_OS_BOOT -# define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 - /* MMC support: args@1MB kernel@2MB */ # define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ # define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h index a8d691586c9..324016a53b2 100644 --- a/include/configs/imx6_logic.h +++ b/include/configs/imx6_logic.h @@ -130,7 +130,6 @@ #endif /* Falcon Mode */ -#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 /* Falcon Mode - MMC support: args@1MB kernel@2MB */ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ diff --git a/include/configs/imx6dl-mamoj.h b/include/configs/imx6dl-mamoj.h index 43789323899..00c30d4d502 100644 --- a/include/configs/imx6dl-mamoj.h +++ b/include/configs/imx6dl-mamoj.h @@ -51,7 +51,6 @@ #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Falcon */ -#define CONFIG_SYS_SPL_ARGS_ADDR 0x13000000 /* MMC support: args@1MB kernel@2MB */ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 16815f4fb00..bf8738f22a7 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -20,7 +20,6 @@ #endif #ifdef CONFIG_SD_BOOT -#define CONFIG_SYS_SPL_ARGS_ADDR 0x90000000 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x500 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 30 #endif diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index ff76e694567..4ad62b43f8c 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -20,7 +20,6 @@ #if defined(CONFIG_QSPI_BOOT) #define CONFIG_SYS_UBOOT_BASE 0x40100000 -#define CONFIG_SYS_SPL_ARGS_ADDR 0x90000000 #endif #define CONFIG_SYS_NAND_BASE 0x7e800000 diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index ea7823de5a7..2bbbdfa51f8 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -12,7 +12,6 @@ #include "imx6_spl.h" #define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + 0x80000) -#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 /* * Below defines are set but NOT really used since we by diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 389da112b93..2adc1f6d86b 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -115,13 +115,6 @@ #define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE -/* for booting directly linux */ -#define CONFIG_SYS_FDT_BASE (CONFIG_SYS_TEXT_BASE + \ - 0x40000) - -#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \ - 0x1000000) - /* SP location before relocation, must use scratch RAM */ /* BRAM start */ #define CONFIG_SYS_INIT_RAM_ADDR 0x0 diff --git a/include/configs/mt7629.h b/include/configs/mt7629.h index 246836a077b..87e2251777c 100644 --- a/include/configs/mt7629.h +++ b/include/configs/mt7629.h @@ -27,7 +27,6 @@ /* SPL -> Uboot */ /* UBoot -> Kernel */ -#define CONFIG_SYS_SPL_ARGS_ADDR 0x40000000 /* DRAM */ #define CONFIG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h index 00ca50a4e64..04f8a16fde9 100644 --- a/include/configs/mx6sabreauto.h +++ b/include/configs/mx6sabreauto.h @@ -28,8 +28,6 @@ /* Falcon Mode */ #ifdef CONFIG_SPL_OS_BOOT -#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 - /* Falcon Mode - MMC support: args@1MB kernel@2MB */ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index c78ddc42568..43625402700 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -18,7 +18,6 @@ #include "mx6sabre_common.h" /* Falcon Mode */ -#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 /* Falcon Mode - MMC support: args@1MB kernel@2MB */ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h index 4910c80e325..571a233c302 100644 --- a/include/configs/pico-imx6.h +++ b/include/configs/pico-imx6.h @@ -14,7 +14,6 @@ #ifdef CONFIG_SPL_OS_BOOT /* Falcon Mode */ -#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 /* Falcon Mode - MMC support: args@1MB kernel@2MB */ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index eef14841903..3e0cedadc32 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -16,7 +16,6 @@ #ifdef CONFIG_SPL_OS_BOOT /* Falcon Mode */ -#define CONFIG_SYS_SPL_ARGS_ADDR 0x88000000 /* Falcon Mode - MMC support: args@1MB kernel@2MB */ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index 482238b4194..a293dca6421 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -14,7 +14,6 @@ #ifdef CONFIG_SPL_OS_BOOT /* Falcon Mode */ -#define CONFIG_SYS_SPL_ARGS_ADDR 0x88000000 /* Falcon Mode - MMC support: args@1MB kernel@2MB */ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index b4590a2ea91..073520bd5e5 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -57,7 +57,6 @@ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x100 /* 128 KiB */ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) /* U-Boot proper stored by default at 0x200 (256 KiB) */ -#define CONFIG_SYS_SPL_ARGS_ADDR 0x22000000 /* Falcon boot support on FAT on MMC */ diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h index 80db425bb7c..05ac900f3c3 100644 --- a/include/configs/stm32f746-disco.h +++ b/include/configs/stm32f746-disco.h @@ -43,10 +43,6 @@ #define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + \ CONFIG_SPL_PAD_TO) -/* DT blob (fdt) address */ -#define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \ - 0x1C0000) - /* For splashcreen */ #endif /* __CONFIG_H */ diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h index f8bd5558e56..5d5df6b1019 100644 --- a/include/configs/ti_am335x_common.h +++ b/include/configs/ti_am335x_common.h @@ -32,8 +32,6 @@ * supports X-MODEM loading via UART, and we leverage this and then use * Y-MODEM to load u-boot.img, when booted over UART. */ -#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ - (128 << 20)) /* Enable the watchdog inside of SPL */ diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h index 3d7cb175faa..725a5a62f52 100644 --- a/include/configs/ti_omap3_common.h +++ b/include/configs/ti_omap3_common.h @@ -55,8 +55,6 @@ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* SPL */ -#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ - (64 << 20)) #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_NAND_BASE 0x30000000 diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index b5ccfdcc6d4..5d8c45af2fa 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -113,8 +113,6 @@ * SPL is overlapped with public stack and breaking non HS devices to boot. * So moving TEXT_BASE down to non-HS limit. */ -#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ - (128 << 20)) #ifdef CONFIG_SPL_BUILD /* No need for i2c in SPL mode as we will use SRI2C for PMIC access on OMAP4 */ diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index 714a1c55c7f..f7f17d0f502 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -305,7 +305,4 @@ */ #endif -#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ - (128 << 20)) - #endif /* __CONFIG_TI_OMAP5_COMMON_H */ diff --git a/include/configs/trats.h b/include/configs/trats.h index 6ed1c79c89e..db33560f0db 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -127,7 +127,6 @@ "fdtaddr=40800000\0" \ /* Falcon mode definitions */ -#define CONFIG_SYS_SPL_ARGS_ADDR CONFIG_SYS_SDRAM_BASE + 0x100 /* GPT */ diff --git a/include/configs/vyasa-rk3288.h b/include/configs/vyasa-rk3288.h index fb76e5544ac..d0e017f4482 100644 --- a/include/configs/vyasa-rk3288.h +++ b/include/configs/vyasa-rk3288.h @@ -22,7 +22,6 @@ #ifndef CONFIG_TPL_BUILD /* Falcon Mode */ -#define CONFIG_SYS_SPL_ARGS_ADDR 0x0ffe5000 /* Falcon Mode - MMC support: args@16MB kernel@17MB */ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x8000 /* 16MB */ diff --git a/include/configs/xea.h b/include/configs/xea.h index 07419f0afbb..b82e6605f82 100644 --- a/include/configs/xea.h +++ b/include/configs/xea.h @@ -16,8 +16,6 @@ /* SPL */ -#define CONFIG_SYS_SPL_ARGS_ADDR 0x44000000 - #define CONFIG_SYS_SPI_KERNEL_OFFS SZ_1M #define CONFIG_SYS_SPI_ARGS_OFFS SZ_512K #define CONFIG_SYS_SPI_ARGS_SIZE SZ_32K diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 713db4c4dae..3331738fc4a 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -206,7 +206,6 @@ #endif /* u-boot is like dtb */ -#define CONFIG_SYS_SPL_ARGS_ADDR 0x8000000 /* ATF is my kernel image */ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index b2b95b710ef..4d8d44c25d8 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -210,7 +210,6 @@ #define CONFIG_SYS_MMC_MAX_DEVICE 1 /* Address in RAM where the parameters must be copied by SPL. */ -#define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000 /* Not using MMC raw mode - just for compilation purpose */ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 -- GitLab From 14b481751314eb331af6255d455dcfe996fa7ffb Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 28 May 2022 09:13:59 -0400 Subject: [PATCH 047/581] ax25-ae350: Move CONFIG_SYS_FDT_BASE to Kconfig The address where the device tree will be passed in to U-Boot at is now moved to the Kconfig file. If this is user configurable, it needs to be exposed rather than hidden, and should probably be renamed as well. Reviewed-by: Rick Chen Signed-off-by: Tom Rini --- board/AndesTech/ax25-ae350/Kconfig | 4 ++++ include/configs/ax25-ae350.h | 3 --- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/board/AndesTech/ax25-ae350/Kconfig b/board/AndesTech/ax25-ae350/Kconfig index 91eec35f474..36b67f0b524 100644 --- a/board/AndesTech/ax25-ae350/Kconfig +++ b/board/AndesTech/ax25-ae350/Kconfig @@ -27,6 +27,10 @@ config SPL_TEXT_BASE config SPL_OPENSBI_LOAD_ADDR default 0x01000000 +config SYS_FDT_BASE + hex + default 0x800f0000 if OF_SEPARATE + config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select RISCV_NDS diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index 7a1b9dbd080..754e9096194 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -20,9 +20,6 @@ * Miscellaneous configurable options */ -/* DT blob (fdt) address */ -#define CONFIG_SYS_FDT_BASE 0x800f0000 - /* * Physical Memory Map */ -- GitLab From c8836dbb01f2f891c407b3f9e2d3238267c0452e Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 28 May 2022 12:07:26 -0400 Subject: [PATCH 048/581] Drop CONFIG_SPL_SIZE We do not reference CONFIG_SPL_SIZE in the code, remove it. Signed-off-by: Tom Rini --- include/configs/clearfog.h | 3 --- include/configs/controlcenterdc.h | 3 --- include/configs/db-88f6820-amc.h | 3 --- include/configs/db-88f6820-gp.h | 3 --- include/configs/helios4.h | 3 --- include/configs/turris_omnia.h | 3 --- include/configs/x530.h | 5 ----- 7 files changed, 23 deletions(-) diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h index c2aef08dbf9..4aaeba3602d 100644 --- a/include/configs/clearfog.h +++ b/include/configs/clearfog.h @@ -42,9 +42,6 @@ /* SPL */ -/* Defines for SPL */ -#define CONFIG_SPL_SIZE (140 << 10) - #if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA) /* SPL related MMC defines */ #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h index 914d7ec83d8..571fdb3b07c 100644 --- a/include/configs/controlcenterdc.h +++ b/include/configs/controlcenterdc.h @@ -34,9 +34,6 @@ #define SPL_BOOT_SDIO_MMC_CARD 2 #define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH -/* Defines for SPL */ -#define CONFIG_SPL_SIZE (160 << 10) - #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD /* SPL related MMC defines */ #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h index 0b814f5e969..523a4ead025 100644 --- a/include/configs/db-88f6820-amc.h +++ b/include/configs/db-88f6820-amc.h @@ -39,9 +39,6 @@ #define SPL_BOOT_SPI_NOR_FLASH 1 #define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH -/* Defines for SPL */ -#define CONFIG_SPL_SIZE (140 << 10) - /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index fe75666d054..acc09da89d3 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -39,9 +39,6 @@ #define SPL_BOOT_SDIO_MMC_CARD 2 #define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH -/* Defines for SPL */ -#define CONFIG_SPL_SIZE (140 << 10) - #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD /* SPL related MMC defines */ #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/helios4.h b/include/configs/helios4.h index 90a631c3761..c8aa564097b 100644 --- a/include/configs/helios4.h +++ b/include/configs/helios4.h @@ -42,9 +42,6 @@ /* SPL */ -/* Defines for SPL */ -#define CONFIG_SPL_SIZE (140 << 10) - #if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA) /* SPL related MMC defines */ #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h index 4bbc992c9f8..c4671f11160 100644 --- a/include/configs/turris_omnia.h +++ b/include/configs/turris_omnia.h @@ -26,9 +26,6 @@ "fdt_high=0x10000000\0" \ "initrd_high=0x10000000\0" -/* Defines for SPL */ -#define CONFIG_SPL_SIZE (140 << 10) - #ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC /* SPL related MMC defines */ # ifdef CONFIG_SPL_BUILD diff --git a/include/configs/x530.h b/include/configs/x530.h index e66d8af802a..d8fc3c13d06 100644 --- a/include/configs/x530.h +++ b/include/configs/x530.h @@ -64,9 +64,4 @@ #define CONFIG_UBI_PART user #define CONFIG_UBIFS_VOLUME user -/* SPL */ - -/* Defines for SPL */ -#define CONFIG_SPL_SIZE (140 << 10) - #endif /* _CONFIG_X530_H */ -- GitLab From dc22afb975fc4e4d99f1f8b47318c66867cec42c Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 28 May 2022 12:40:40 -0400 Subject: [PATCH 049/581] spl: Remove CONFIG_SPL_START_S_PATH and rework the logic behind it In some cases, when we don't use CONFIG_SPL_FRAMEWORK nor are we on PowerPC using their specific SPL/TPL framework, we need to specify the start.S file to use for these typically very constrained systems. Do this within the Makefile logic, rather than introducing a string-based CONFIG option, as this would get slightly complex to do in Kconfig for a very limited number of users. Signed-off-by: Tom Rini --- arch/arm/Makefile | 4 ++-- arch/mips/Makefile | 4 +--- include/configs/ci20.h | 4 ---- include/configs/mxs.h | 5 ----- 4 files changed, 3 insertions(+), 14 deletions(-) diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 85c23bcf775..4afa8e4adf0 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -103,8 +103,8 @@ libs-y += $(machdirs) head-y := arch/arm/cpu/$(CPU)/start.o ifeq ($(CONFIG_SPL_BUILD),y) -ifneq ($(CONFIG_SPL_START_S_PATH),) -head-y := $(CONFIG_SPL_START_S_PATH:"%"=%)/start.o +ifeq ($(CONFIG_SYS_SOC)$(CONFIG_SPL_FRAMEWORK),"mxs") +head-y := arch/arm/cpu/arm926ejs/mxs/start.o endif endif diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 6502aebd296..32c436f2bcb 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -3,9 +3,7 @@ head-y := arch/mips/cpu/start.o ifeq ($(CONFIG_SPL_BUILD),y) -ifneq ($(CONFIG_SPL_START_S_PATH),) -head-y := $(CONFIG_SPL_START_S_PATH:"%"=%)/start.o -endif +head-$(CONFIG_ARCH_JZ47XX) := arch/mips/mach-jz47xx/start.o endif libs-y += arch/mips/cpu/ diff --git a/include/configs/ci20.h b/include/configs/ci20.h index bcec88415f9..01f63649053 100644 --- a/include/configs/ci20.h +++ b/include/configs/ci20.h @@ -30,8 +30,4 @@ /* Miscellaneous configuration options */ #define CONFIG_SYS_BOOTM_LEN (64 << 20) -/* SPL */ - -#define CONFIG_SPL_START_S_PATH "arch/mips/mach-jz47xx" - #endif /* __CONFIG_CI20_H__ */ diff --git a/include/configs/mxs.h b/include/configs/mxs.h index ebabc92b303..fc15ed82c6e 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -43,11 +43,6 @@ /* Startup hooks */ -/* SPL */ -#ifndef CONFIG_SPL_FRAMEWORK -#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" -#endif - /* Memory sizes */ /* OCRAM at 0x0 ; 32kB on MX23 ; 128kB on MX28 */ -- GitLab From 5fc1d581762724b03ad0be86aaa76c0005d92b1a Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 28 May 2022 16:43:53 -0400 Subject: [PATCH 050/581] Convert CONFIG_SYS_NAND_SPL_KERNEL_OFFS to Kconfig This converts the following to Kconfig: CONFIG_SYS_NAND_SPL_KERNEL_OFFS Signed-off-by: Tom Rini --- common/spl/Kconfig | 4 ++++ configs/am335x_evm_defconfig | 1 + configs/am335x_igep003x_defconfig | 1 + configs/am3517_evm_defconfig | 1 + configs/am43xx_evm_defconfig | 1 + configs/am43xx_evm_rtconly_defconfig | 1 + configs/am43xx_evm_usbhost_boot_defconfig | 1 + configs/devkit8000_defconfig | 1 + configs/dra7xx_evm_defconfig | 1 + configs/gwventana_nand_defconfig | 1 + configs/igep00x0_defconfig | 1 + configs/imx6q_logic_defconfig | 1 + configs/omap35_logic_defconfig | 1 + configs/omap35_logic_somlv_defconfig | 1 + configs/omap3_logic_defconfig | 1 + configs/omap3_logic_somlv_defconfig | 1 + include/configs/am335x_evm.h | 4 ---- include/configs/am3517_evm.h | 1 - include/configs/am43xx_evm.h | 5 ----- include/configs/brppt1.h | 4 ---- include/configs/cm_t335.h | 3 --- include/configs/devkit8000.h | 3 --- include/configs/dra7xx_evm.h | 5 ----- include/configs/gw_ventana.h | 3 --- include/configs/imx6_logic.h | 1 - include/configs/omap3_beagle.h | 3 --- include/configs/omap3_evm.h | 4 ---- include/configs/omap3_logic.h | 7 ------- include/configs/phycore_am335x_r2.h | 4 ---- include/configs/sama5d3_xplained.h | 5 ----- 30 files changed, 19 insertions(+), 52 deletions(-) diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 71b2600df58..05049c1ffd7 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -1196,6 +1196,10 @@ config SYS_SPL_ARGS_ADDR Address in memory where the 'args' file, typically a device tree will be loaded in to memory. +config SYS_NAND_SPL_KERNEL_OFFS + hex "Address in memory to load the OS file for Falcon mode to" + depends on SPL_OS_BOOT && SPL_NAND_SUPPORT + if SPL_OS_BOOT config SYS_OS_BASE hex "addr, where OS is found" diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig index e1c19c11d31..8a5beabd6d2 100644 --- a/configs/am335x_evm_defconfig +++ b/configs/am335x_evm_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_NAND_BASE=y CONFIG_SPL_NET=y CONFIG_SPL_NET_VCI_STRING="AM335x U-Boot SPL" CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x200000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 CONFIG_SPL_USB_GADGET=y diff --git a/configs/am335x_igep003x_defconfig b/configs/am335x_igep003x_defconfig index f640cc47a8f..78469d7154f 100644 --- a/configs/am335x_igep003x_defconfig +++ b/configs/am335x_igep003x_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_UBI_LOAD_MONITOR_ID=0 CONFIG_SPL_UBI_LOAD_KERNEL_ID=3 CONFIG_SPL_UBI_LOAD_ARGS_ID=4 CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x280000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 CONFIG_SPL_POWER=y diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig index 05ee3570fc9..f6baee0a2b2 100644 --- a/configs/am3517_evm_defconfig +++ b/configs/am3517_evm_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_NAND_SIMPLE=y CONFIG_SPL_NAND_BASE=y CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0x84000000 +CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x2a0000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 # CONFIG_SPL_POWER is not set diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig index ebfb018d2de..0825ea1636d 100644 --- a/configs/am43xx_evm_defconfig +++ b/configs/am43xx_evm_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_NAND_BASE=y CONFIG_SPL_NET=y CONFIG_SPL_NET_VCI_STRING="AM43xx U-Boot SPL" CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x300000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 CONFIG_SPL_USB_HOST=y diff --git a/configs/am43xx_evm_rtconly_defconfig b/configs/am43xx_evm_rtconly_defconfig index 5e6975129e7..0cdc4018cfc 100644 --- a/configs/am43xx_evm_rtconly_defconfig +++ b/configs/am43xx_evm_rtconly_defconfig @@ -26,6 +26,7 @@ CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_BASE=y CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x300000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 CONFIG_SYS_MAXARGS=64 diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig index 429ab732e12..963cb93545c 100644 --- a/configs/am43xx_evm_usbhost_boot_defconfig +++ b/configs/am43xx_evm_usbhost_boot_defconfig @@ -25,6 +25,7 @@ CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_BASE=y CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x300000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 CONFIG_SPL_USB_HOST=y diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index dc07c146bdb..f8a98531f37 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -23,6 +23,7 @@ CONFIG_SPL_NAND_SIMPLE=y CONFIG_SPL_NAND_BASE=y CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0x80000100 +CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x280000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x500 CONFIG_SYS_MAXARGS=64 diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 5922e86d7a6..fdd89e6f555 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_BASE=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x200000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 CONFIG_SPL_RAM_SUPPORT=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index 200ecf4a0f9..68ffe3e847e 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -48,6 +48,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0x18000000 +CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x1200000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 CONFIG_SPL_POWER=y diff --git a/configs/igep00x0_defconfig b/configs/igep00x0_defconfig index 96f2f9df816..3b65a22513c 100644 --- a/configs/igep00x0_defconfig +++ b/configs/igep00x0_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_UBI_LOAD_ARGS_ID=4 CONFIG_SPL_ONENAND_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0x84000000 +CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x280000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 CONFIG_SYS_MAXARGS=64 diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index cc7a6f0aa09..df4c1c1f950 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0x18000000 +CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x500000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 CONFIG_SPL_USB_HOST=y diff --git a/configs/omap35_logic_defconfig b/configs/omap35_logic_defconfig index 6efc50fdf5e..a8d789e11e9 100644 --- a/configs/omap35_logic_defconfig +++ b/configs/omap35_logic_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_NAND_SIMPLE=y CONFIG_SPL_NAND_BASE=y CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0x84000000 +CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x280000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 CONFIG_SYS_PROMPT="OMAP Logic # " diff --git a/configs/omap35_logic_somlv_defconfig b/configs/omap35_logic_somlv_defconfig index 3ea4d7a724e..5264f4bc5eb 100644 --- a/configs/omap35_logic_somlv_defconfig +++ b/configs/omap35_logic_somlv_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_NAND_SIMPLE=y CONFIG_SPL_NAND_BASE=y CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0x84000000 +CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x280000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 # CONFIG_SPL_POWER is not set diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index 5c7d30d66ed..292b4650656 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_NAND_SIMPLE=y CONFIG_SPL_NAND_BASE=y CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0x84000000 +CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x280000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 CONFIG_SYS_PROMPT="OMAP Logic # " diff --git a/configs/omap3_logic_somlv_defconfig b/configs/omap3_logic_somlv_defconfig index 9961e005a07..aee7589b9c3 100644 --- a/configs/omap3_logic_somlv_defconfig +++ b/configs/omap3_logic_somlv_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_NAND_SIMPLE=y CONFIG_SPL_NAND_BASE=y CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0x84000000 +CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x280000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 # CONFIG_SPL_POWER is not set diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 78b359dcea9..3e98e5c6653 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -193,10 +193,6 @@ #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 14 -/* NAND: SPL related configs */ -#ifdef CONFIG_SPL_OS_BOOT -#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */ -#endif #endif /* !CONFIG_MTD_RAW_NAND */ /* USB Device Firmware Update support */ diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 1848aecb390..b896f962f08 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -28,7 +28,6 @@ #define CONFIG_SYS_NAND_MAX_OOBFREE 2 #define CONFIG_SYS_NAND_MAX_ECCPOS 56 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x2a0000 /* NAND block size is 128 KiB. Synchronize these values with * corresponding Device Tree entries in Linux: * MLO(SPL) 4 * NAND_BLOCK_SIZE = 512 KiB @ 0x000000 diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index bce035531ce..665ace5b01b 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -151,11 +151,6 @@ } #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 26 -/* NAND: SPL related configs */ -/* NAND: SPL falcon mode configs */ -#ifdef CONFIG_SPL_OS_BOOT -#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00300000 /* kernel offset */ -#endif #define NANDARGS \ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h index b98d4ab68ad..240089318cc 100644 --- a/include/configs/brppt1.h +++ b/include/configs/brppt1.h @@ -33,10 +33,6 @@ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */ -/* NAND */ -#ifdef CONFIG_MTD_RAW_NAND -#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x140000 -#endif /* CONFIG_MTD_RAW_NAND */ #endif /* CONFIG_SPL_OS_BOOT */ #ifdef CONFIG_MTD_RAW_NAND diff --git a/include/configs/cm_t335.h b/include/configs/cm_t335.h index ad2e8818907..b3ccc3cac3d 100644 --- a/include/configs/cm_t335.h +++ b/include/configs/cm_t335.h @@ -86,9 +86,6 @@ #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ -#ifdef CONFIG_SPL_OS_BOOT -#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x500000 -#endif /* GPIO pin + bank to pin ID mapping */ #define GPIO_PIN(_bank, _pin) ((_bank << 5) + _pin) diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index 2a3daea9f25..d5d1c68bdaa 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -116,9 +116,6 @@ #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000 -/* SPL OS boot options */ -#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 - #undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR #undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x8 /* address 0x1000 */ diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 9f685b19879..9247720f8b6 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -84,11 +84,6 @@ 50, 51, 52, 53, 54, 55, 56, 57, } #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 14 -/* NAND: SPL related configs */ -/* NAND: SPL falcon mode configs */ -#ifdef CONFIG_SPL_OS_BOOT -#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */ -#endif #endif /* !CONFIG_MTD_RAW_NAND */ /* Parallel NOR Support */ diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 2e6b9523f45..c07e48629bb 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -11,9 +11,6 @@ /* Falcon Mode */ -/* Falcon Mode - NAND support: args@17MB kernel@18MB */ -#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS (18 * SZ_1M) - /* Falcon Mode - MMC support: args@1MB kernel@2MB */ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h index 324016a53b2..8019dfc0a71 100644 --- a/include/configs/imx6_logic.h +++ b/include/configs/imx6_logic.h @@ -119,7 +119,6 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00500000 /* USB Configs */ #ifdef CONFIG_CMD_USB diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 158773acedb..ab742798b92 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -28,9 +28,6 @@ #define CONFIG_SYS_NAND_ECCBYTES 3 #define CONFIG_SYS_ENV_SECT_SIZE SZ_128K /* NAND: SPL falcon mode configs */ -#if defined(CONFIG_SPL_OS_BOOT) -#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x2a0000 -#endif /* CONFIG_SPL_OS_BOOT */ #endif /* CONFIG_MTD_RAW_NAND */ /* Enable Multi Bus support for I2C */ diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index eeb9ef8c741..9c4e172d037 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -32,10 +32,6 @@ #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 3 #define CONFIG_SYS_ENV_SECT_SIZE SZ_128K -/* NAND: SPL falcon mode configs */ -#if defined(CONFIG_SPL_OS_BOOT) -#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x2a0000 -#endif /* CONFIG_SPL_OS_BOOT */ #endif /* CONFIG_MTD_RAW_NAND */ #define BOOTENV_DEV_LEGACY_MMC(devtypeu, devtypel, instance) \ diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 4112e5570f6..12e502cd364 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -158,11 +158,4 @@ #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ -/* Defines for SPL */ - -/* NAND: SPL falcon mode configs */ -#ifdef CONFIG_SPL_OS_BOOT -#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 -#endif - #endif /* __CONFIG_H */ diff --git a/include/configs/phycore_am335x_r2.h b/include/configs/phycore_am335x_r2.h index af6f7e14dfd..7fa911620e1 100644 --- a/include/configs/phycore_am335x_r2.h +++ b/include/configs/phycore_am335x_r2.h @@ -97,10 +97,6 @@ #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 14 -/* NAND: SPL related configs */ -#ifdef CONFIG_SPL_OS_BOOT -#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */ -#endif #endif /* !CONFIG_MTD_RAW_NAND */ /* CPU */ diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index 073520bd5e5..3bb53a0dd1b 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -58,9 +58,4 @@ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) /* U-Boot proper stored by default at 0x200 (256 KiB) */ -/* Falcon boot support on FAT on MMC */ - -/* Falcon boot support on raw NAND */ -#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x1a0000 - #endif -- GitLab From 103d1aecb0b9e48955d4cd90aa3dbc0a22a1fab9 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 28 May 2022 17:21:03 -0400 Subject: [PATCH 051/581] Convert CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR et al to Kconfig This converts the following to Kconfig: CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS Signed-off-by: Tom Rini --- README | 6 ------ common/spl/Kconfig | 14 ++++++++++++++ common/spl/spl_mmc.c | 2 +- configs/am335x_boneblack_vboot_defconfig | 2 ++ configs/am335x_evm_defconfig | 2 ++ configs/am335x_igep003x_defconfig | 2 ++ configs/am335x_shc_defconfig | 2 ++ configs/am335x_shc_ict_defconfig | 2 ++ configs/am335x_shc_netboot_defconfig | 2 ++ configs/am335x_shc_sdboot_defconfig | 2 ++ configs/am335x_sl50_defconfig | 2 ++ configs/am3517_evm_defconfig | 2 ++ configs/am43xx_evm_defconfig | 2 ++ configs/am43xx_evm_rtconly_defconfig | 2 ++ configs/am43xx_evm_usbhost_boot_defconfig | 2 ++ configs/am57xx_evm_defconfig | 2 ++ configs/devkit8000_defconfig | 2 ++ configs/display5_defconfig | 2 ++ configs/display5_factory_defconfig | 2 ++ configs/dra7xx_evm_defconfig | 2 ++ configs/gwventana_emmc_defconfig | 2 ++ configs/gwventana_gw5904_defconfig | 2 ++ configs/gwventana_nand_defconfig | 2 ++ configs/igep00x0_defconfig | 2 ++ configs/imx28_xea_defconfig | 2 ++ configs/imx6dl_mamoj_defconfig | 2 ++ configs/imx6q_logic_defconfig | 2 ++ configs/imx6qdl_icore_mipi_defconfig | 2 ++ configs/imx6qdl_icore_mmc_defconfig | 2 ++ configs/imx6qdl_icore_rqs_defconfig | 2 ++ configs/omap35_logic_defconfig | 2 ++ configs/omap35_logic_somlv_defconfig | 2 ++ configs/omap3_logic_defconfig | 2 ++ configs/omap3_logic_somlv_defconfig | 2 ++ configs/omap4_panda_defconfig | 2 ++ configs/omap5_uevm_defconfig | 2 ++ configs/vyasa-rk3288_defconfig | 2 ++ include/configs/brppt1.h | 2 -- include/configs/devkit8000.h | 5 ----- include/configs/display5.h | 3 --- include/configs/embestmx6boards.h | 3 --- include/configs/gw_ventana.h | 2 -- include/configs/imx6-engicam.h | 2 -- include/configs/imx6_logic.h | 2 -- include/configs/imx6dl-mamoj.h | 2 -- include/configs/ls1043ardb.h | 5 ----- include/configs/mccmon6.h | 2 -- include/configs/mx6sabreauto.h | 2 -- include/configs/mx6sabresd.h | 2 -- include/configs/pico-imx6.h | 2 -- include/configs/pico-imx6ul.h | 2 -- include/configs/pico-imx7d.h | 2 -- include/configs/sama5d3_xplained.h | 2 -- include/configs/ti_armv7_common.h | 2 -- include/configs/vyasa-rk3288.h | 2 -- include/configs/xea.h | 3 --- include/configs/xilinx_zynqmp.h | 4 ---- include/configs/zynq-common.h | 2 -- 58 files changed, 83 insertions(+), 60 deletions(-) diff --git a/README b/README index 354913f8236..9800359e5df 100644 --- a/README +++ b/README @@ -1639,12 +1639,6 @@ The following options need to be configured: For ARM, enable an optional function to print more information about the running system. - CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR, - CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS - Sector and number of sectors to load kernel argument - parameters from when MMC is being used in raw mode - (for falcon mode) - CONFIG_SPL_MPC83XX_WAIT_FOR_NAND Set this for NAND SPL on PPC mpc83xx targets, so that start.S waits for the rest of the SPL to load before diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 05049c1ffd7..d4f02b527d9 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -1226,6 +1226,20 @@ config SYS_MMCSD_RAW_MODE_KERNEL_SECTOR Note that the Falcon mode image can also be a FIT, if FIT support is enabled. +config SYS_MMCSD_RAW_MODE_ARGS_SECTOR + hex "Falcon mode: Sector to load 'args' from MMC" + depends on SPL_FALCON_BOOT_MMCSD + help + When Falcon mode is used with an MMC or SD media, SPL needs to know + where to look for the OS 'args', typically a device tree. The + contents are expected to begin at the raw MMC specified in this config. + Note that if using a FIT image, this and the next option can be set to + 0x0. + +config SYS_MMCSD_RAW_MODE_ARGS_SECTORS + hex "Falcon mode: Number of sectors to load for 'args' from MMC" + depends on SPL_FALCON_BOOT_MMCSD && SYS_MMCSD_RAW_MODE_ARGS_SECTOR != 0x0 + config SPL_PAYLOAD string "SPL payload" default "tpl/u-boot-with-tpl.bin" if TPL diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c index 6116a68371a..f66147477e7 100644 --- a/common/spl/spl_mmc.c +++ b/common/spl/spl_mmc.c @@ -229,7 +229,7 @@ static int mmc_load_image_raw_os(struct spl_image_info *spl_image, { int ret; -#if defined(CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR) +#if CONFIG_VAL(SYS_MMCSD_RAW_MODE_ARGS_SECTOR) unsigned long count; count = blk_dread(mmc_get_blk_desc(mmc), diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig index 67c4144c35f..b5ba2ccda5c 100644 --- a/configs/am335x_boneblack_vboot_defconfig +++ b/configs/am335x_boneblack_vboot_defconfig @@ -31,6 +31,8 @@ CONFIG_SPL_NET_VCI_STRING="AM33xx U-Boot SPL" CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x1500 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_ETHER=y CONFIG_SYS_MAXARGS=64 diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig index 8a5beabd6d2..c7dbd3c5702 100644 --- a/configs/am335x_evm_defconfig +++ b/configs/am335x_evm_defconfig @@ -37,6 +37,8 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x200000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x1500 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_ETHER=y CONFIG_SYS_MAXARGS=64 diff --git a/configs/am335x_igep003x_defconfig b/configs/am335x_igep003x_defconfig index 78469d7154f..6da31d9e7f9 100644 --- a/configs/am335x_igep003x_defconfig +++ b/configs/am335x_igep003x_defconfig @@ -43,6 +43,8 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x280000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x1500 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200 CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig index 9f5924e1524..77593e3e3dc 100644 --- a/configs/am335x_shc_defconfig +++ b/configs/am335x_shc_defconfig @@ -40,6 +40,8 @@ CONFIG_SPL_I2C=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x1500 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200 CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig index 7d8a57c18eb..97a361ce4d6 100644 --- a/configs/am335x_shc_ict_defconfig +++ b/configs/am335x_shc_ict_defconfig @@ -38,6 +38,8 @@ CONFIG_SPL_I2C=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x1500 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200 CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig index 98e437e0233..2c6fc5496eb 100644 --- a/configs/am335x_shc_netboot_defconfig +++ b/configs/am335x_shc_netboot_defconfig @@ -42,6 +42,8 @@ CONFIG_SPL_I2C=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x1500 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200 CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig index 02146321503..a154a342551 100644 --- a/configs/am335x_shc_sdboot_defconfig +++ b/configs/am335x_shc_sdboot_defconfig @@ -41,6 +41,8 @@ CONFIG_SPL_I2C=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x1500 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200 CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig index f42148e0549..1338190e9ff 100644 --- a/configs/am335x_sl50_defconfig +++ b/configs/am335x_sl50_defconfig @@ -38,6 +38,8 @@ CONFIG_SPL_NET_VCI_STRING="AM335x U-Boot SPL" CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x1500 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200 CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig index f6baee0a2b2..19e01dc41ae 100644 --- a/configs/am3517_evm_defconfig +++ b/configs/am3517_evm_defconfig @@ -35,6 +35,8 @@ CONFIG_SYS_SPL_ARGS_ADDR=0x84000000 CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x2a0000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x1500 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200 # CONFIG_SPL_POWER is not set CONFIG_SYS_PROMPT="AM3517_EVM # " CONFIG_SYS_MAXARGS=64 diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig index 0825ea1636d..35b1cdb4016 100644 --- a/configs/am43xx_evm_defconfig +++ b/configs/am43xx_evm_defconfig @@ -32,6 +32,8 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x300000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x1500 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200 CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_ETHER=y diff --git a/configs/am43xx_evm_rtconly_defconfig b/configs/am43xx_evm_rtconly_defconfig index 0cdc4018cfc..ff5fbc6676a 100644 --- a/configs/am43xx_evm_rtconly_defconfig +++ b/configs/am43xx_evm_rtconly_defconfig @@ -29,6 +29,8 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x300000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x1500 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200 CONFIG_SYS_MAXARGS=64 CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x00100000 diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig index 963cb93545c..0a4b9a99cee 100644 --- a/configs/am43xx_evm_usbhost_boot_defconfig +++ b/configs/am43xx_evm_usbhost_boot_defconfig @@ -28,6 +28,8 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x300000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x1500 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200 CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_STORAGE=y CONFIG_SPL_USB_GADGET=y diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index 33f8415d8b1..d82c66572cc 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -39,6 +39,8 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x1500 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_YMODEM_SUPPORT=y diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index f8a98531f37..4e144a9c169 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -26,6 +26,8 @@ CONFIG_SYS_SPL_ARGS_ADDR=0x80000100 CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x280000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x500 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x8 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=8 CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set CONFIG_CMD_SPL=y diff --git a/configs/display5_defconfig b/configs/display5_defconfig index 646372c10a3..f586596ee92 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -47,6 +47,8 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0x18000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x100 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x3F00 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x10 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_HUSH_PARSER=y diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig index 245122843bc..e2f35a9790c 100644 --- a/configs/display5_factory_defconfig +++ b/configs/display5_factory_defconfig @@ -42,6 +42,8 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0x18000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x100 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x3F00 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x10 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_USB_HOST=y diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index fdd89e6f555..aae84dc6ade 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -42,6 +42,8 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x200000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x1500 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200 CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index a96ed26292a..0effee6d30f 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -49,6 +49,8 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0x18000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x800 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x100 CONFIG_SPL_POWER=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Ventana > " diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index 85bbed23ebc..28e08788b65 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -49,6 +49,8 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0x18000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x800 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x100 CONFIG_SPL_POWER=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Ventana > " diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index 68ffe3e847e..f46440bf560 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -51,6 +51,8 @@ CONFIG_SYS_SPL_ARGS_ADDR=0x18000000 CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x1200000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x800 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x100 CONFIG_SPL_POWER=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Ventana > " diff --git a/configs/igep00x0_defconfig b/configs/igep00x0_defconfig index 3b65a22513c..00f0a670c2b 100644 --- a/configs/igep00x0_defconfig +++ b/configs/igep00x0_defconfig @@ -45,6 +45,8 @@ CONFIG_SYS_SPL_ARGS_ADDR=0x84000000 CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x280000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x1500 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200 CONFIG_SYS_MAXARGS=64 CONFIG_CMD_SPL=y # CONFIG_CMD_FLASH is not set diff --git a/configs/imx28_xea_defconfig b/configs/imx28_xea_defconfig index 37233bafad9..1537e8361f6 100644 --- a/configs/imx28_xea_defconfig +++ b/configs/imx28_xea_defconfig @@ -48,6 +48,8 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0x44000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x800 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x400 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x40 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_SPL_YMODEM_SUPPORT=y diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index a52ce458f2b..86692174712 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -22,6 +22,8 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0x13000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x800 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x10 CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_SPL=y diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index df4c1c1f950..1510d10dc52 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -38,6 +38,8 @@ CONFIG_SYS_SPL_ARGS_ADDR=0x18000000 CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x500000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x800 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x800 CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y diff --git a/configs/imx6qdl_icore_mipi_defconfig b/configs/imx6qdl_icore_mipi_defconfig index 929d31722b7..bddc4ff98ef 100644 --- a/configs/imx6qdl_icore_mipi_defconfig +++ b/configs/imx6qdl_icore_mipi_defconfig @@ -38,6 +38,8 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0x18000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x800 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x10 CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl-mipi> " diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index 3465e1915c2..f8194a002a1 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -41,6 +41,8 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0x18000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x800 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x10 CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl> " diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig index b2ca3ee1b65..cb2b0df98b7 100644 --- a/configs/imx6qdl_icore_rqs_defconfig +++ b/configs/imx6qdl_icore_rqs_defconfig @@ -35,6 +35,8 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0x18000000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x800 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x10 CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl-rqs> " diff --git a/configs/omap35_logic_defconfig b/configs/omap35_logic_defconfig index a8d789e11e9..c76c10ac70f 100644 --- a/configs/omap35_logic_defconfig +++ b/configs/omap35_logic_defconfig @@ -39,6 +39,8 @@ CONFIG_SYS_SPL_ARGS_ADDR=0x84000000 CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x280000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x1500 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200 CONFIG_SYS_PROMPT="OMAP Logic # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1054 diff --git a/configs/omap35_logic_somlv_defconfig b/configs/omap35_logic_somlv_defconfig index 5264f4bc5eb..2637ecf9c50 100644 --- a/configs/omap35_logic_somlv_defconfig +++ b/configs/omap35_logic_somlv_defconfig @@ -40,6 +40,8 @@ CONFIG_SYS_SPL_ARGS_ADDR=0x84000000 CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x280000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x1500 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200 # CONFIG_SPL_POWER is not set CONFIG_SYS_PROMPT="OMAP Logic # " CONFIG_SYS_MAXARGS=64 diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index 292b4650656..f55d52736ba 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -38,6 +38,8 @@ CONFIG_SYS_SPL_ARGS_ADDR=0x84000000 CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x280000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x1500 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200 CONFIG_SYS_PROMPT="OMAP Logic # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1054 diff --git a/configs/omap3_logic_somlv_defconfig b/configs/omap3_logic_somlv_defconfig index aee7589b9c3..97cdc9491d3 100644 --- a/configs/omap3_logic_somlv_defconfig +++ b/configs/omap3_logic_somlv_defconfig @@ -40,6 +40,8 @@ CONFIG_SYS_SPL_ARGS_ADDR=0x84000000 CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x280000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x1500 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200 # CONFIG_SPL_POWER is not set CONFIG_SYS_PROMPT="OMAP Logic # " CONFIG_SYS_MAXARGS=64 diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig index c51627dcf9c..bd6c2ce4cac 100644 --- a/configs/omap4_panda_defconfig +++ b/configs/omap4_panda_defconfig @@ -22,6 +22,8 @@ CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x1500 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200 CONFIG_SYS_MAXARGS=64 CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig index 03b874576df..73d742ea1d2 100644 --- a/configs/omap5_uevm_defconfig +++ b/configs/omap5_uevm_defconfig @@ -23,6 +23,8 @@ CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x1500 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200 CONFIG_SYS_MAXARGS=64 CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig index 9ae73816246..cbaf970e6ad 100644 --- a/configs/vyasa-rk3288_defconfig +++ b/configs/vyasa-rk3288_defconfig @@ -32,6 +32,8 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0xffe5000 CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x8800 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x8000 +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x10 CONFIG_CMD_SPL=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h index 240089318cc..12a4048a511 100644 --- a/include/configs/brppt1.h +++ b/include/configs/brppt1.h @@ -30,8 +30,6 @@ #ifdef CONFIG_SPL_OS_BOOT /* RAW SD card / eMMC */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */ #endif /* CONFIG_SPL_OS_BOOT */ diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index d5d1c68bdaa..4e91f8caa32 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -116,9 +116,4 @@ #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000 -#undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR -#undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x8 /* address 0x1000 */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 8 /* 4KB */ - #endif /* __CONFIG_H */ diff --git a/include/configs/display5.h b/include/configs/display5.h index 420b0c9f6e4..c23a57ee7a2 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -12,9 +12,6 @@ /* Falcon Mode */ /* Falcon Mode - MMC support */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x3F00 -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS \ - (CONFIG_CMD_SPL_WRITE_SIZE / 512) /* * display5 SPI-NOR memory layout diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index 3023d0e0b25..00996f5cb78 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -54,9 +54,6 @@ #include "imx6_spl.h" /* RiOTboard */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 /* offset 69KB */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 /* offset 69KB */ - #endif /* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt, diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index c07e48629bb..26d171daae7 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -12,8 +12,6 @@ /* Falcon Mode */ /* Falcon Mode - MMC support: args@1MB kernel@2MB */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) #include "imx6_spl.h" /* common IMX6 SPL configuration */ #include "mx6_common.h" diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h index 4a1eae1d8b9..a2d5080a10e 100644 --- a/include/configs/imx6-engicam.h +++ b/include/configs/imx6-engicam.h @@ -136,8 +136,6 @@ /* Falcon Mode */ #ifdef CONFIG_SPL_OS_BOOT /* MMC support: args@1MB kernel@2MB */ -# define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ -# define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) #endif /* Framebuffer */ diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h index 8019dfc0a71..592c62ab8ac 100644 --- a/include/configs/imx6_logic.h +++ b/include/configs/imx6_logic.h @@ -131,7 +131,5 @@ /* Falcon Mode */ /* Falcon Mode - MMC support: args@1MB kernel@2MB */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) #endif /* __IMX6LOGIC_CONFIG_H */ diff --git a/include/configs/imx6dl-mamoj.h b/include/configs/imx6dl-mamoj.h index 00c30d4d502..c4eebb5aeac 100644 --- a/include/configs/imx6dl-mamoj.h +++ b/include/configs/imx6dl-mamoj.h @@ -53,8 +53,6 @@ /* Falcon */ /* MMC support: args@1MB kernel@2MB */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) /* Miscellaneous configurable options */ diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index bf8738f22a7..edb4e64ee41 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -19,11 +19,6 @@ #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif -#ifdef CONFIG_SD_BOOT -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x500 -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 30 -#endif - /* * NOR Flash Definitions */ diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index 2bbbdfa51f8..2c862e9ddcc 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -18,8 +18,6 @@ * design force U-Boot run when we boot in development * mode from SD card (SD2) */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR (0x800) -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (0x80) #define CONFIG_MXC_UART_BASE UART1_BASE diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h index 04f8a16fde9..d120c7c7a35 100644 --- a/include/configs/mx6sabreauto.h +++ b/include/configs/mx6sabreauto.h @@ -29,8 +29,6 @@ /* Falcon Mode */ #ifdef CONFIG_SPL_OS_BOOT /* Falcon Mode - MMC support: args@1MB kernel@2MB */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) #endif #ifdef CONFIG_MTD_NOR_FLASH diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 43625402700..2f4332a4b19 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -20,8 +20,6 @@ /* Falcon Mode */ /* Falcon Mode - MMC support: args@1MB kernel@2MB */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) #define CONFIG_SYS_FSL_USDHC_NUM 3 diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h index 571a233c302..df4dc4d496c 100644 --- a/include/configs/pico-imx6.h +++ b/include/configs/pico-imx6.h @@ -16,8 +16,6 @@ /* Falcon Mode */ /* Falcon Mode - MMC support: args@1MB kernel@2MB */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) #endif #define CONFIG_MXC_UART_BASE UART1_BASE diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index 3e0cedadc32..ea30fbc4cfc 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -18,8 +18,6 @@ /* Falcon Mode */ /* Falcon Mode - MMC support: args@1MB kernel@2MB */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) #endif /* Network support */ diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index a293dca6421..5a6f2244201 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -16,8 +16,6 @@ /* Falcon Mode */ /* Falcon Mode - MMC support: args@1MB kernel@2MB */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) #endif #define CONFIG_MXC_UART_BASE UART5_IPS_BASE_ADDR diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index 3bb53a0dd1b..a10057452fe 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -54,8 +54,6 @@ #define CONFIG_SYS_MONITOR_LEN (2 * SZ_512K) /* Falcon boot support on raw MMC */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x100 /* 128 KiB */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) /* U-Boot proper stored by default at 0x200 (256 KiB) */ #endif diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index 0307fc38d8b..2d1f0372ae3 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -118,8 +118,6 @@ /* FAT */ /* RAW SD card / eMMC */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x1500 /* address 0x2A0000 */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x200 /* 256KiB */ #endif /* General parts of the framework, required. */ diff --git a/include/configs/vyasa-rk3288.h b/include/configs/vyasa-rk3288.h index d0e017f4482..e8c1013a71a 100644 --- a/include/configs/vyasa-rk3288.h +++ b/include/configs/vyasa-rk3288.h @@ -24,8 +24,6 @@ /* Falcon Mode */ /* Falcon Mode - MMC support: args@16MB kernel@17MB */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x8000 /* 16MB */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) #endif #endif diff --git a/include/configs/xea.h b/include/configs/xea.h index b82e6605f82..19ccf633c40 100644 --- a/include/configs/xea.h +++ b/include/configs/xea.h @@ -20,9 +20,6 @@ #define CONFIG_SYS_SPI_ARGS_OFFS SZ_512K #define CONFIG_SYS_SPI_ARGS_SIZE SZ_32K -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR (SZ_512K / 0x200) -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (SZ_32K / 0x200) - /* Memory configuration */ #define PHYS_SDRAM_1 0x40000000 /* Base address */ #define PHYS_SDRAM_1_SIZE 0x10000000 /* Max 256 MB RAM */ diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 3331738fc4a..bfd622bb028 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -209,10 +209,6 @@ /* ATF is my kernel image */ -/* MMC support */ -# define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 /* unused */ -# define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 /* unused */ - #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU) # define CONFIG_SPL_HASH # define CONFIG_ENV_MAX_ENTRIES 10 diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 4d8d44c25d8..6a045ec60ae 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -212,8 +212,6 @@ /* Address in RAM where the parameters must be copied by SPL. */ /* Not using MMC raw mode - just for compilation purpose */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 /* qspi mode is working fine */ #ifdef CONFIG_ZYNQ_QSPI -- GitLab From c31811848e21ebb5ad94cd827440e2d4ecbbb5a7 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 29 May 2022 09:34:42 -0400 Subject: [PATCH 052/581] riotboard, syzygy_hub: Disable SPL_FALCON_BOOT_MMCSD Looking at the git history and values used for the raw kernel/args location, it's clear these platforms only ever did Falcon Mode via filesystem images and not raw MMC/SD locations. Disable CONFIG_SPL_FALCON_BOOT_MMCSD. Signed-off-by: Tom Rini --- configs/riotboard_defconfig | 2 -- configs/syzygy_hub_defconfig | 2 -- 2 files changed, 4 deletions(-) diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig index 924254cbb97..a2ef6187f82 100644 --- a/configs/riotboard_defconfig +++ b/configs/riotboard_defconfig @@ -34,8 +34,6 @@ CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_FS_LOAD_ARGS_NAME="imx6dl-riotboard.dtb" CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0x13000000 -CONFIG_SPL_FALCON_BOOT_MMCSD=y -CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x0 CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GPIO=y diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig index d632cb86a25..31a550031da 100644 --- a/configs/syzygy_hub_defconfig +++ b/configs/syzygy_hub_defconfig @@ -37,8 +37,6 @@ CONFIG_SYS_SPL_MALLOC_SIZE=0x2000000 CONFIG_SPL_FS_LOAD_ARGS_NAME="system.dtb" CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0x10000000 -CONFIG_SPL_FALCON_BOOT_MMCSD=y -CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x0 CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=2071 CONFIG_CMD_FPGA_LOADBP=y -- GitLab From bfbd62f69114fb4a8a1685e5d95b2e5789422fd4 Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Sun, 29 May 2022 11:13:16 +1200 Subject: [PATCH 053/581] arm: mvebu: Use MVEBU_SPL_BOOT_DEVICE instead of SPL_BOOT_DEVICE Update the way KWB_CFG_SEC_BOOT_DEV is determined to use CONFIG_MVEBU_SPL_BOOT_DEVICE_{SPI,MMC} instead of CONFIG_SPL_BOOT_DEVICE. Signed-off-by: Chris Packham Reviewed-by: Stefan Roese --- arch/arm/mach-mvebu/Makefile | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile index 8bd2246325c..61eeb9c8c18 100644 --- a/arch/arm/mach-mvebu/Makefile +++ b/arch/arm/mach-mvebu/Makefile @@ -65,10 +65,12 @@ KWB_REPLACE += CSK_INDEX KWB_CFG_CSK_INDEX = $(CONFIG_SECURED_MODE_CSK_INDEX) KWB_REPLACE += SEC_BOOT_DEV -KWB_CFG_SEC_BOOT_DEV=$(patsubst "%",%, \ - $(if $(findstring BOOT_SPI_NOR_FLASH,$(CONFIG_SPL_BOOT_DEVICE)),0x34) \ - $(if $(findstring BOOT_SDIO_MMC_CARD,$(CONFIG_SPL_BOOT_DEVICE)),0x31) \ - ) +ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI),) + KWB_CFG_SEC_BOOT_DEV=0x34 +endif +ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC),) + KWB_CFG_SEC_BOOT_DEV=0x31 +endif KWB_REPLACE += SEC_FUSE_DUMP KWB_CFG_SEC_FUSE_DUMP = a38x -- GitLab From b19512f1cf28b853d308079c421e9c4c564b2242 Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Sun, 29 May 2022 11:13:17 +1200 Subject: [PATCH 054/581] Convert CONFIG_FIXED_SDHCI_ALIGNED_BUFFER to Kconfig MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit CONFIG_FIXED_SDHCI_ALIGNED_BUFFER is needed on some Marvell SoCs when booting from MMC. All existing usages of this have the same value so make this the default and have the Kconfig option depend on SPL && MVEBU_SPL_BOOT_DEVICE_MMC. Signed-off-by: Chris Packham Reviewed-by: Marek Behún Reviewed-by: Stefan Roese --- drivers/mmc/Kconfig | 13 +++++++++++++ include/configs/clearfog.h | 9 --------- include/configs/controlcenterdc.h | 7 ------- include/configs/db-88f6820-gp.h | 7 ------- include/configs/helios4.h | 9 --------- include/configs/turris_omnia.h | 7 ------- 6 files changed, 13 insertions(+), 39 deletions(-) diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 5e2921ce41a..c8f9709d2d4 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -484,6 +484,19 @@ config SPL_MMC_SDHCI_ADMA This enables support for the ADMA (Advanced DMA) defined in the SD Host Controller Standard Specification Version 3.00 in SPL. +config FIXED_SDHCI_ALIGNED_BUFFER + hex "SDRAM address for fixed buffer" + depends on SPL && MVEBU_SPL_BOOT_DEVICE_MMC + default 0x00180000 + help + On the Marvell Armada 38x when the SPL runs it located in internal + SRAM which is the L2 cache locked to memory. When the MMC buffers + are located on the stack (or bss), the SDIO controller (SDHCI) can't + write into this L2 cache memory. + + This specifies the address of a fixed buffer located in SDRAM that + will be used for all SDHCI transfers in the SPL. + config MMC_SDHCI_ASPEED bool "Aspeed SDHCI controller" depends on ARCH_ASPEED diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h index 4aaeba3602d..8497fe28eff 100644 --- a/include/configs/clearfog.h +++ b/include/configs/clearfog.h @@ -40,15 +40,6 @@ "fdt_high=0x10000000\0" \ "initrd_high=0x10000000\0" -/* SPL */ - -#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA) -/* SPL related MMC defines */ -#ifdef CONFIG_SPL_BUILD -#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */ -#endif -#endif - /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h index 571fdb3b07c..8b0d2603104 100644 --- a/include/configs/controlcenterdc.h +++ b/include/configs/controlcenterdc.h @@ -34,13 +34,6 @@ #define SPL_BOOT_SDIO_MMC_CARD 2 #define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH -#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD -/* SPL related MMC defines */ -#ifdef CONFIG_SPL_BUILD -#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */ -#endif -#endif - /* * Environment Configuration */ diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index acc09da89d3..e01dd492530 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -39,13 +39,6 @@ #define SPL_BOOT_SDIO_MMC_CARD 2 #define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH -#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD -/* SPL related MMC defines */ -#ifdef CONFIG_SPL_BUILD -#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */ -#endif -#endif - /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros diff --git a/include/configs/helios4.h b/include/configs/helios4.h index c8aa564097b..23eb0d4375d 100644 --- a/include/configs/helios4.h +++ b/include/configs/helios4.h @@ -40,15 +40,6 @@ "fdt_high=0x10000000\0" \ "initrd_high=0x10000000\0" -/* SPL */ - -#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA) -/* SPL related MMC defines */ -#ifdef CONFIG_SPL_BUILD -#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */ -#endif -#endif - /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h index c4671f11160..9013d9a6932 100644 --- a/include/configs/turris_omnia.h +++ b/include/configs/turris_omnia.h @@ -26,13 +26,6 @@ "fdt_high=0x10000000\0" \ "initrd_high=0x10000000\0" -#ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC -/* SPL related MMC defines */ -# ifdef CONFIG_SPL_BUILD -# define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */ -# endif -#endif - /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros -- GitLab From 3ff2aa6d04633c3bd57567cc0ac2ee6909a6a93d Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Sun, 29 May 2022 11:13:18 +1200 Subject: [PATCH 055/581] arm: mvebu: Remove CONFIG_SPL_BOOT_DEVICE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit CONFIG_SPL_BOOT_DEVICE was made obsolete by CONFIG_MVEBU_SPL_BOOT_DEVICE_{SPI,MMC,SATA,UART}. CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI is the default so existing users of CONFIG_SPL_BOOT_DEVICE can simply have the option removed. Signed-off-by: Chris Packham Reviewed-by: Marek Behún Reviewed-by: Stefan Roese --- include/configs/controlcenterdc.h | 12 ------------ include/configs/db-88f6820-amc.h | 13 ------------- include/configs/db-88f6820-gp.h | 12 ------------ 3 files changed, 37 deletions(-) diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h index 8b0d2603104..d1bea54b207 100644 --- a/include/configs/controlcenterdc.h +++ b/include/configs/controlcenterdc.h @@ -22,18 +22,6 @@ #define CONFIG_PCI_SCAN_SHOW #endif -/* SPL */ -/* - * Select the boot device here - * - * Currently supported are: - * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash - * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1) - */ -#define SPL_BOOT_SPI_NOR_FLASH 1 -#define SPL_BOOT_SDIO_MMC_CARD 2 -#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH - /* * Environment Configuration */ diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h index 523a4ead025..3c442018ab1 100644 --- a/include/configs/db-88f6820-amc.h +++ b/include/configs/db-88f6820-amc.h @@ -26,19 +26,6 @@ "fdt_high=0x10000000\0" \ "initrd_high=0x10000000\0" -/* SPL */ -/* - * Select the boot device here - * - * Currently supported are: - * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash - * - * MMC is not populated on this board. - * NAND support may be added in the future. - */ -#define SPL_BOOT_SPI_NOR_FLASH 1 -#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH - /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index e01dd492530..6b2edbb1e0d 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -27,18 +27,6 @@ "fdt_high=0x10000000\0" \ "initrd_high=0x10000000\0" -/* SPL */ -/* - * Select the boot device here - * - * Currently supported are: - * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash - * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1) - */ -#define SPL_BOOT_SPI_NOR_FLASH 1 -#define SPL_BOOT_SDIO_MMC_CARD 2 -#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH - /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros -- GitLab From ba787bb458b39117341c0098f5d99a9ce9f3d278 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 30 May 2022 17:01:22 -0400 Subject: [PATCH 056/581] spl: Move all VPL, TPL and PowerPC specific CONFIG options to separate files - Move all PowerPC (and some shared with Layerscape) options to common/spl/Kconfig.nxp - Move all other TPL related options to common/spl/Kconfig.tpl - Move all VPL related options to common/spl/Kconfig.vpl This makes the whole of common/spl/Kconfig slightly more readable. Signed-off-by: Tom Rini --- common/spl/Kconfig | 661 +---------------------------------------- common/spl/Kconfig.nxp | 124 ++++++++ common/spl/Kconfig.tpl | 322 ++++++++++++++++++++ common/spl/Kconfig.vpl | 201 +++++++++++++ 4 files changed, 650 insertions(+), 658 deletions(-) create mode 100644 common/spl/Kconfig.nxp create mode 100644 common/spl/Kconfig.tpl create mode 100644 common/spl/Kconfig.vpl diff --git a/common/spl/Kconfig b/common/spl/Kconfig index d4f02b527d9..25078432a7e 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -199,117 +199,7 @@ config SPL_BINMAN_SYMBOLS For this to work, you must have a U-Boot image in the binman image, so binman can update SPL with the location of it. -menu "PowerPC and LayerScape SPL Boot options" - -config SPL_NAND_BOOT - bool "Load SPL from NAND flash" - depends on PPC && (SUPPORT_SPL && !SPL_FRAMEWORK) - -config SPL_MMC_BOOT - bool "Load SPL from SD Card / eMMC" - depends on PPC && (SUPPORT_SPL && !SPL_FRAMEWORK) - -config SPL_SPI_BOOT - bool "Load SPL from SPI flash" - depends on PPC && (SUPPORT_SPL && !SPL_FRAMEWORK) - -config SPL_FSL_PBL - bool "Create SPL in Freescale PBI format" - depends on (PPC || ARCH_LS1021A || ARCH_LS1043A || ARCH_LS1046A) && \ - SUPPORT_SPL - help - Create boot binary having SPL binary in PBI format concatenated with - u-boot binary. - -config SPL_SYS_CCSR_DO_NOT_RELOCATE - bool "Ensures that CCSR is not relocated" - depends on PPC - help - If this is defined, then CONFIG_SYS_CCSRBAR_PHYS will be forced to a - value that ensures that CCSR is not relocated. - -config TPL_SYS_CCSR_DO_NOT_RELOCATE - def_bool y - depends on SPL_SYS_CCSR_DO_NOT_RELOCATE - -endmenu - -menu "PowerPC SPL / TPL specific options" - depends on PPC && (SPL && !SPL_FRAMEWORK) - -config SPL_INIT_MINIMAL - bool "Arch init code will be built for a very small image" - -config SPL_FLUSH_IMAGE - bool "Clean dcache and invalidate icache after loading the image" - -config SPL_SKIP_RELOCATE - bool "Skip relocating SPL" - -config SPL_GD_ADDR - hex "Address to use for global data (gd) in SPL" - depends on !SPL_INIT_MINIMAL - -config SPL_RELOC_TEXT_BASE - hex "Address to relocate SPL to" - default SPL_TEXT_BASE - help - If unspecified, this is equal to CONFIG_SPL_TEXT_BASE (i.e. no - relocation is done). - -config SPL_RELOC_STACK - hex "Address of the start of the stack SPL will use after relocation." - help - If unspecified, this is equal to CONFIG_SYS_SPL_MALLOC_START. Starting - address of the malloc pool used in SPL. When this option is set the full - malloc is used in SPL and it is set up by spl_init() and before that, the - simple malloc() can be used if CONFIG_SYS_MALLOC_F is defined. - -config SPL_RELOC_MALLOC - bool "SPL has malloc pool after relocation" - -config SPL_RELOC_MALLOC_ADDR - hex "Address of malloc pool in SPL" - depends on SPL_RELOC_MALLOC - -config SPL_RELOC_MALLOC_SIZE - hex "Size of malloc pool in SPL" - depends on SPL_RELOC_MALLOC - -config TPL_GD_ADDR - hex "Address to use for global data (gd) in TPL" - depends on TPL - -config TPL_RELOC_TEXT_BASE - hex "Address to relocate TPL to" - depends on TPL - default TPL_TEXT_BASE - help - If unspecified, this is equal to CONFIG_TPL_TEXT_BASE (i.e. no - relocation is done). - -config TPL_RELOC_STACK - hex "Address of the start of the stack TPL will use after relocation." - depends on TPL - help - If unspecified, this is equal to CONFIG_SYS_TPL_MALLOC_START. Starting - address of the malloc pool used in TPL. When this option is set the full - malloc is used in TPL and it is set up by spl_init() and before that, the - simple malloc() can be used if CONFIG_SYS_MALLOC_F is defined. - -config TPL_RELOC_MALLOC - bool "TPL has malloc pool after relocation" - depends on TPL - -config TPL_RELOC_MALLOC_ADDR - hex "Address of malloc pool in TPL" - depends on TPL_RELOC_MALLOC - -config TPL_RELOC_MALLOC_SIZE - hex "Size of malloc pool in TPL" - depends on TPL_RELOC_MALLOC - -endmenu +source "common/spl/Kconfig.nxp" config HANDOFF bool "Pass hand-off information from SPL to U-Boot proper" @@ -360,13 +250,6 @@ config SPL_BOARD_INIT spl_board_init() from board_init_r(). This function should be provided by the board. -config VPL_BOARD_INIT - bool "Call board-specific initialization in VPL" - help - If this option is enabled, U-Boot will call the function - spl_board_init() from board_init_r(). This function should be - provided by the board. - config SPL_BOOTROM_SUPPORT bool "Support returning to the BOOTROM" help @@ -425,16 +308,6 @@ config SPL_SYS_MALLOC_SIMPLE this will make the SPL binary smaller at the cost of more heap usage as the *_simple malloc functions do not re-use free-ed mem. -config TPL_SYS_MALLOC_SIMPLE - bool - prompt "Only use malloc_simple functions in the TPL" - depends on TPL - help - Say Y here to only use the *_simple malloc functions from - malloc_simple.c, rather then using the versions from dlmalloc.c; - this will make the TPL binary smaller at the cost of more heap - usage as the *_simple malloc functions do not re-use free-ed mem. - config SPL_SHARES_INIT_SP_ADDR bool "SPL and U-Boot use the same initial stack pointer location" depends on (ARM || ARCH_JZ47XX || MICROBLAZE || RISCV) && SPL_FRAMEWORK @@ -523,16 +396,6 @@ config SPL_READ_ONLY writeable memory) of anything it wants to modify, such as device-private data. -config TPL_SEPARATE_BSS - bool "BSS section is in a different memory region from text" - default y if SPL_SEPARATE_BSS - help - Some platforms need a large BSS region in TPL and can provide this - because RAM is already set up. In this case BSS can be moved to RAM. - This option should then be enabled so that the correct device tree - location is used. Normally we put the device tree at the end of BSS - but with this option enabled, it goes at _image_binary_end. - config SPL_BANNER_PRINT bool "Enable output of the SPL banner 'U-Boot SPL ...'" default y @@ -541,15 +404,6 @@ config SPL_BANNER_PRINT info. Disabling this option could be useful to reduce SPL boot time (e.g. approx. 6 ms faster, when output on i.MX6 with 115200 baud). -config TPL_BANNER_PRINT - bool "Enable output of the TPL banner 'U-Boot TPL ...'" - depends on TPL - default y - help - If this option is enabled, TPL will print the banner with version - info. Disabling this option could be useful to reduce TPL boot time - (e.g. approx. 6 ms faster, when output on i.MX6 with 115200 baud). - config SPL_EARLY_BSS depends on ARM && !ARM64 bool "Allows initializing BSS early before entering board_init_f" @@ -1625,314 +1479,7 @@ config TPL help If you want to build TPL as well as the normal image and SPL, say Y. -if TPL - -config TPL_SIZE_LIMIT - hex "Maximum size of TPL image" - depends on TPL - default 0x0 - help - Specifies the maximum length of the U-Boot TPL image. - If this value is zero, it is ignored. - -config TPL_BINMAN_SYMBOLS - bool "Declare binman symbols in TPL" - depends on SPL_FRAMEWORK && BINMAN - default y - help - This enables use of symbols in TPL which refer to U-Boot, enabling TPL - to obtain the location of U-Boot simply by calling spl_get_image_pos() - and spl_get_image_size(). - - For this to work, you must have a U-Boot image in the binman image, so - binman can update TPL with the location of it. - -config TPL_FRAMEWORK - bool "Support TPL based upon the common SPL framework" - default y if SPL_FRAMEWORK - help - Enable the SPL framework under common/spl/ for TPL builds. - This framework supports MMC, NAND and YMODEM and other methods - loading of U-Boot's SPL stage. If unsure, say Y. - -config TPL_HANDOFF - bool "Pass hand-off information from TPL to SPL and U-Boot proper" - depends on HANDOFF && TPL_BLOBLIST - default y - help - This option enables TPL to write handoff information. This can be - used to pass information like the size of SDRAM from TPL to U-Boot - proper. The information is also available to SPL if it is useful - there. - -config TPL_BOARD_INIT - bool "Call board-specific initialization in TPL" - help - If this option is enabled, U-Boot will call the function - spl_board_init() from board_init_r(). This function should be - provided by the board. - -config TPL_BOOTCOUNT_LIMIT - bool "Support bootcount in TPL" - depends on TPL_ENV_SUPPORT - help - If this option is enabled, the TPL will support bootcount. - For example, it may be useful to choose the device to boot. - -config TPL_LDSCRIPT - string "Linker script for the TPL stage" - depends on TPL - default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64 - default "arch/\$(ARCH)/cpu/u-boot-spl.lds" - help - The TPL stage will usually require a different linker-script - (as it runs from a different memory region) than the regular - U-Boot stage. Set this to the path of the linker-script to - be used for TPL. - - May be left empty to trigger the Makefile infrastructure to - fall back to the linker-script used for the SPL stage. - -config TPL_NEEDS_SEPARATE_STACK - bool "TPL needs a separate initial stack-pointer" - depends on TPL - help - Enable, if the TPL stage should not inherit its initial - stack-pointer from the settings for the SPL stage. - -config TPL_POWER - bool "Support power drivers" - help - Enable support for power control in TPL. This includes support - for PMICs (Power-management Integrated Circuits) and some of the - features provided by PMICs. In particular, voltage regulators can - be used to enable/disable power and vary its voltage. That can be - useful in TPL to turn on boot peripherals and adjust CPU voltage - so that the clock speed can be increased. This enables the drivers - in drivers/power, drivers/power/pmic and drivers/power/regulator - as part of an TPL build. - -config TPL_TEXT_BASE - hex "Base address for the .text section of the TPL stage" - default 0 - help - The base address for the .text section of the TPL stage. - -config TPL_MAX_SIZE - hex "Maximum size (in bytes) for the TPL stage" - default 0x2e000 if ROCKCHIP_RK3399 - default 0x8000 if ROCKCHIP_RK3288 - default 0x7000 if ROCKCHIP_RK322X || ROCKCHIP_RK3328 || ROCKCHIP_RK3368 - default 0x2800 if ROCKCHIP_PX30 - default 0x0 - help - The maximum size (in bytes) of the TPL stage. - -config TPL_PAD_TO - hex "Offset to which the TPL should be padded before appending the TPL payload" - depends on !TPL_FRAMEWORK && PPC - default TPL_MAX_SIZE - help - Image offset to which the TPL should be padded before appending the - TPL payload. By default, this is defined as CONFIG_TPL_MAX_SIZE, or 0 if - CONFIG_TPL_MAX_SIZE is undefined. CONFIG_TPL_PAD_TO must be either - 0, meaning to append the TPL payload without any padding, or >= - CONFIG_TPL_MAX_SIZE. - -config TPL_STACK - hex "Address of the initial stack-pointer for the TPL stage" - depends on TPL_NEEDS_SEPARATE_STACK - help - The address of the initial stack-pointer for the TPL stage. - Usually this will be the (aligned) top-of-stack. - -config TPL_READ_ONLY - bool - depends on TPL_OF_PLATDATA - select TPL_OF_PLATDATA_NO_BIND - select TPL_OF_PLATDATA_RT - help - Some platforms (e.g. x86 Apollo Lake) load SPL into a read-only - section of memory. This means that of-platdata must make a copy (in - writeable memory) of anything it wants to modify, such as - device-private data. - -config TPL_BOOTROM_SUPPORT - bool "Support returning to the BOOTROM (from TPL)" - help - Some platforms (e.g. the Rockchip RK3368) provide support in their - ROM for loading the next boot-stage after performing basic setup - from the TPL stage. - - Enable this option, to return to the BOOTROM through the - BOOT_DEVICE_BOOTROM (or fall-through to the next boot device in the - boot device list, if not implemented for a given board) - -config TPL_CRC32 - bool "Support CRC32 in TPL" - default y if TPL_ENV_SUPPORT || TPL_BLOBLIST - help - Enable this to support CRC32 in uImages or FIT images within SPL. - This is a 32-bit checksum value that can be used to verify images. - For FIT images, this is the least secure type of checksum, suitable - for detected accidental image corruption. For secure applications you - should consider SHA1 or SHA256. - -config TPL_DRIVERS_MISC - bool "Support misc drivers in TPL" - help - Enable miscellaneous drivers in TPL. These drivers perform various - tasks that don't fall nicely into other categories, Enable this - option to build the drivers in drivers/misc as part of an TPL - build, for those that support building in TPL (not all drivers do). - -config TPL_ENV_SUPPORT - bool "Support an environment" - help - Enable environment support in TPL. See SPL_ENV_SUPPORT for details. - -config TPL_GPIO - bool "Support GPIO in TPL" - help - Enable support for GPIOs (General-purpose Input/Output) in TPL. - GPIOs allow U-Boot to read the state of an input line (high or - low) and set the state of an output line. This can be used to - drive LEDs, control power to various system parts and read user - input. GPIOs can be useful in TPL to enable a 'sign-of-life' LED, - for example. Enable this option to build the drivers in - drivers/gpio as part of an TPL build. - -config TPL_I2C - bool "Support I2C" - help - Enable support for the I2C bus in TPL. See SPL_I2C for - details. - -config TPL_LIBCOMMON_SUPPORT - bool "Support common libraries" - help - Enable support for common U-Boot libraries within TPL. See - SPL_LIBCOMMON_SUPPORT for details. - -config TPL_LIBGENERIC_SUPPORT - bool "Support generic libraries" - help - Enable support for generic U-Boot libraries within TPL. See - SPL_LIBGENERIC_SUPPORT for details. - -config TPL_MPC8XXX_INIT_DDR - bool "Support MPC8XXX DDR init" - help - Enable support for DDR-SDRAM on the MPC8XXX family within TPL. See - SPL_MPC8XXX_INIT_DDR for details. - -config TPL_MMC - bool "Support MMC" - depends on MMC - help - Enable support for MMC within TPL. See SPL_MMC for details. - -config TPL_NAND_SUPPORT - bool "Support NAND flash" - help - Enable support for NAND in TPL. See SPL_NAND_SUPPORT for details. - -config TPL_PCI - bool "Support PCI drivers" - help - Enable support for PCI in TPL. For platforms that need PCI to boot, - or must perform some init using PCI in SPL, this provides the - necessary driver support. This enables the drivers in drivers/pci - as part of a TPL build. - -config TPL_PCH - bool "Support PCH drivers" - help - Enable support for PCH (Platform Controller Hub) devices in TPL. - These are used to set up GPIOs and the SPI peripheral early in - boot. This enables the drivers in drivers/pch as part of a TPL - build. - -config TPL_RAM_SUPPORT - bool "Support booting from RAM" - help - Enable booting of an image in RAM. The image can be preloaded or - it can be loaded by TPL directly into RAM (e.g. using USB). - -config TPL_RAM_DEVICE - bool "Support booting from preloaded image in RAM" - depends on TPL_RAM_SUPPORT - help - Enable booting of an image already loaded in RAM. The image has to - be already in memory when TPL takes over, e.g. loaded by the boot - ROM. - -config TPL_RTC - bool "Support RTC drivers" - help - Enable RTC (Real-time Clock) support in TPL. This includes support - for reading and setting the time. Some RTC devices also have some - non-volatile (battery-backed) memory which is accessible if - needed. This enables the drivers in drivers/rtc as part of an TPL - build. - -config TPL_SERIAL - bool "Support serial" - select TPL_PRINTF - select TPL_STRTO - help - Enable support for serial in TPL. See SPL_SERIAL for - details. - -config TPL_SPI_FLASH_SUPPORT - bool "Support SPI flash drivers" - help - Enable support for using SPI flash in TPL. See SPL_SPI_FLASH_SUPPORT - for details. - -config TPL_SPI_FLASH_TINY - bool "Enable low footprint TPL SPI Flash support" - depends on TPL_SPI_FLASH_SUPPORT && !SPI_FLASH_BAR - default y if SPI_FLASH - help - Enable lightweight TPL SPI Flash support that supports just reading - data/images from flash. No support to write/erase flash. Enable - this if you have TPL size limitations and don't need full-fledged - SPI flash support. - -config TPL_SPI_LOAD - bool "Support loading from SPI flash" - depends on TPL_SPI_FLASH_SUPPORT - help - Enable support for loading next stage, U-Boot or otherwise, from - SPI NOR in U-Boot TPL. - -config TPL_SPI - bool "Support SPI drivers" - help - Enable support for using SPI in TPL. See SPL_SPI for - details. - -config TPL_DM_SPI - bool "Support SPI DM drivers in TPL" - help - Enable support for SPI DM drivers in TPL. - -config TPL_DM_SPI_FLASH - bool "Support SPI DM FLASH drivers in TPL" - help - Enable support for SPI DM flash drivers in TPL. - -config TPL_YMODEM_SUPPORT - bool "Support loading using Ymodem" - depends on TPL_SERIAL - help - While loading from serial is slow it can be a useful backup when - there is no other option. The Ymodem protocol provides a reliable - means of transmitting U-Boot over a serial line for using in TPL, - with a checksum to ensure correctness. - -endif # TPL +source "common/spl/Kconfig.tpl" config VPL bool @@ -1942,209 +1489,7 @@ config VPL If you want to build VPL as well as the normal image, TPL and SPL, say Y. -if VPL - -config VPL_BANNER_PRINT - bool "Enable output of the VPL banner 'U-Boot VPL ...'" - depends on VPL - default y - help - If this option is enabled, VPL will print the banner with version - info. Disabling this option could be useful to reduce VPL boot time - (e.g. approx. 6 ms faster, when output on i.MX6 with 115200 baud). - -config VPL_BOARD_INIT - bool "Call board-specific initialization in VPL" - help - If this option is enabled, U-Boot will call the function - spl_board_init() from board_init_r(). This function should be - provided by the board. - -config VPL_CACHE - depends on CACHE - bool "Support cache drivers in VPL" - help - Enable support for cache drivers in VPL. - -config VPL_CRC32 - bool "Support CRC32 in VPL" - default y if VPL_ENV_SUPPORT || VPL_BLOBLIST - help - Enable this to support CRC32 in uImages or FIT images within VPL. - This is a 32-bit checksum value that can be used to verify images. - For FIT images, this is the least secure type of checksum, suitable - for detected accidental image corruption. For secure applications you - should consider SHA1 or SHA256. - -config VPL_DM_SPI - bool "Support SPI DM drivers in VPL" - help - Enable support for SPI DM drivers in VPL. - -config VPL_DM_SPI_FLASH - bool "Support SPI DM FLASH drivers in VPL" - help - Enable support for SPI DM flash drivers in VPL. - -config VPL_FRAMEWORK - bool "Support VPL based upon the common SPL framework" - default y - help - Enable the SPL framework under common/spl/ for VPL builds. - This framework supports MMC, NAND and YMODEM and other methods - loading of U-Boot's next stage. If unsure, say Y. - -config VPL_HANDOFF - bool "Pass hand-off information from VPL to SPL" - depends on HANDOFF && VPL_BLOBLIST - default y - help - This option enables VPL to write handoff information. This can be - used to pass information like the size of SDRAM from VPL to SPL. Also - VPL can receive information from TPL in the same place if that is - enabled. - -config VPL_LIBCOMMON_SUPPORT - bool "Support common libraries" - default y if SPL_LIBCOMMON_SUPPORT - help - Enable support for common U-Boot libraries within VPL. See - SPL_LIBCOMMON_SUPPORT for details. - -config VPL_LIBGENERIC_SUPPORT - bool "Support generic libraries" - default y if SPL_LIBGENERIC_SUPPORT - help - Enable support for generic U-Boot libraries within VPL. These - libraries include generic code to deal with device tree, hashing, - printf(), compression and the like. This option is enabled on many - boards. Enable this option to build the code in lib/ as part of a - VPL build. - -config VPL_DRIVERS_MISC - bool "Support misc drivers" - default y if TPL_DRIVERS_MISC - help - Enable miscellaneous drivers in VPL. These drivers perform various - tasks that don't fall nicely into other categories, Enable this - option to build the drivers in drivers/misc as part of a VPL - build, for those that support building in VPL (not all drivers do). - -config VPL_ENV_SUPPORT - bool "Support an environment" - help - Enable environment support in VPL. The U-Boot environment provides - a number of settings (essentially name/value pairs) which can - control many aspects of U-Boot's operation. Enabling this option will - make env_get() and env_set() available in VSPL. - -config VPL_GPIO - bool "Support GPIO in VPL" - default y if SPL_GPIO - help - Enable support for GPIOs (General-purpose Input/Output) in VPL. - GPIOs allow U-Boot to read the state of an input line (high or - low) and set the state of an output line. This can be used to - drive LEDs, control power to various system parts and read user - input. GPIOs can be useful in VPL to enable a 'sign-of-life' LED, - for example. Enable this option to build the drivers in - drivers/gpio as part of a VPL build. - -config VPL_HANDOFF - bool "Pass hand-off information from VPL to SPL and U-Boot proper" - depends on HANDOFF && VPL_BLOBLIST - default y - help - This option enables VPL to write handoff information. This can be - used to pass information like the size of SDRAM from VPL to U-Boot - proper. The information is also available to VPL if it is useful - there. - -config VPL_HASH - bool "Support hashing drivers in VPL" - depends on VPL - select SHA1 - select SHA256 - help - Enable hashing drivers in VPL. These drivers can be used to - accelerate secure boot processing in secure applications. Enable - this option to build system-specific drivers for hash acceleration - as part of a VPL build. - -config VPL_I2C_SUPPORT - bool "Support I2C in VPL" - default y if SPL_I2C_SUPPORT - help - Enable support for the I2C bus in VPL. Vee SPL_I2C_SUPPORT for - details. - -config VPL_PCH_SUPPORT - bool "Support PCH drivers" - default y if TPL_PCH_SUPPORT - help - Enable support for PCH (Platform Controller Hub) devices in VPL. - These are used to set up GPIOs and the SPI peripheral early in - boot. This enables the drivers in drivers/pch as part of a VPL - build. - -config VPL_PCI - bool "Support PCI drivers" - default y if SPL_PCI - help - Enable support for PCI in VPL. For platforms that need PCI to boot, - or must perform some init using PCI in VPL, this provides the - necessary driver support. This enables the drivers in drivers/pci - as part of a VPL build. - -config VPL_RTC - bool "Support RTC drivers" - help - Enable RTC (Real-time Clock) support in VPL. This includes support - for reading and setting the time. Some RTC devices also have some - non-volatile (battery-backed) memory which is accessible if - needed. This enables the drivers in drivers/rtc as part of a VPL - build. - -config VPL_SERIAL - bool "Support serial" - default y if TPL_SERIAL - select VPL_PRINTF - select VPL_STRTO - help - Enable support for serial in VPL. See SPL_SERIAL_SUPPORT for - details. - -config VPL_SIZE_LIMIT - hex "Maximum size of VPL image" - depends on VPL - default 0x0 - help - Specifies the maximum length of the U-Boot VPL image. - If this value is zero, it is ignored. - -config VPL_SPI - bool "Support SPI drivers" - help - Enable support for using SPI in VPL. See SPL_SPI_SUPPORT for - details. - -config VPL_SPI_FLASH_SUPPORT - bool "Support SPI flash drivers" - help - Enable support for using SPI flash in VPL, and loading U-Boot from - SPI flash. SPI flash (Serial Peripheral Bus flash) is named after - the SPI bus that is used to connect it to a system. It is a simple - but fast bidirectional 4-wire bus (clock, chip select and two data - lines). This enables the drivers in drivers/mtd/spi as part of a - VPL build. This normally requires VPL_SPI_SUPPORT. - -config VPL_TEXT_BASE - hex "VPL Text Base" - default 0x0 - help - The address in memory that VPL will be running from. - -endif # VPL +source "common/spl/Kconfig.vpl" config SPL_AT91_MCK_BYPASS bool "Use external clock signal as a source of main clock for AT91 platforms" diff --git a/common/spl/Kconfig.nxp b/common/spl/Kconfig.nxp new file mode 100644 index 00000000000..8da85539afd --- /dev/null +++ b/common/spl/Kconfig.nxp @@ -0,0 +1,124 @@ +menu "PowerPC and LayerScape SPL Boot options" + depends on (PPC && SUPPORT_SPL && !SPL_FRAMEWORK) || \ + ((ARCH_LS1021A || ARCH_LS1043A || ARCH_LS1046A) && SUPPORT_SPL) + +config SPL_NAND_BOOT + bool "Load SPL from NAND flash" + depends on PPC && (SUPPORT_SPL && !SPL_FRAMEWORK) + +config SPL_MMC_BOOT + bool "Load SPL from SD Card / eMMC" + depends on PPC && (SUPPORT_SPL && !SPL_FRAMEWORK) + +config SPL_SPI_BOOT + bool "Load SPL from SPI flash" + depends on PPC && (SUPPORT_SPL && !SPL_FRAMEWORK) + +config SPL_FSL_PBL + bool "Create SPL in Freescale PBI format" + depends on (PPC || ARCH_LS1021A || ARCH_LS1043A || ARCH_LS1046A) && \ + SUPPORT_SPL + help + Create boot binary having SPL binary in PBI format concatenated with + u-boot binary. + +config SPL_SYS_CCSR_DO_NOT_RELOCATE + bool "Ensures that CCSR is not relocated" + depends on PPC + help + If this is defined, then CONFIG_SYS_CCSRBAR_PHYS will be forced to a + value that ensures that CCSR is not relocated. + +config TPL_SYS_CCSR_DO_NOT_RELOCATE + def_bool y + depends on SPL_SYS_CCSR_DO_NOT_RELOCATE + +menu "PowerPC SPL / TPL specific options" + depends on PPC && (SPL && !SPL_FRAMEWORK) + +config SPL_INIT_MINIMAL + bool "Arch init code will be built for a very small image" + +config SPL_FLUSH_IMAGE + bool "Clean dcache and invalidate icache after loading the image" + +config SPL_SKIP_RELOCATE + bool "Skip relocating SPL" + +config SPL_GD_ADDR + hex "Address to use for global data (gd) in SPL" + depends on !SPL_INIT_MINIMAL + +config SPL_RELOC_TEXT_BASE + hex "Address to relocate SPL to" + default SPL_TEXT_BASE + help + If unspecified, this is equal to CONFIG_SPL_TEXT_BASE (i.e. no + relocation is done). + +config SPL_RELOC_STACK + hex "Address of the start of the stack SPL will use after relocation." + help + If unspecified, this is equal to CONFIG_SYS_SPL_MALLOC_START. Starting + address of the malloc pool used in SPL. When this option is set the full + malloc is used in SPL and it is set up by spl_init() and before that, the + simple malloc() can be used if CONFIG_SYS_MALLOC_F is defined. + +config SPL_RELOC_MALLOC + bool "SPL has malloc pool after relocation" + +config SPL_RELOC_MALLOC_ADDR + hex "Address of malloc pool in SPL" + depends on SPL_RELOC_MALLOC + +config SPL_RELOC_MALLOC_SIZE + hex "Size of malloc pool in SPL" + depends on SPL_RELOC_MALLOC + +config TPL_GD_ADDR + hex "Address to use for global data (gd) in TPL" + depends on TPL + +config TPL_RELOC_TEXT_BASE + hex "Address to relocate TPL to" + depends on TPL + default TPL_TEXT_BASE + help + If unspecified, this is equal to CONFIG_TPL_TEXT_BASE (i.e. no + relocation is done). + +config TPL_RELOC_STACK + hex "Address of the start of the stack TPL will use after relocation." + depends on TPL + help + If unspecified, this is equal to CONFIG_SYS_TPL_MALLOC_START. Starting + address of the malloc pool used in TPL. When this option is set the full + malloc is used in TPL and it is set up by spl_init() and before that, the + simple malloc() can be used if CONFIG_SYS_MALLOC_F is defined. + +config TPL_RELOC_MALLOC + bool "TPL has malloc pool after relocation" + depends on TPL + +config TPL_RELOC_MALLOC_ADDR + hex "Address of malloc pool in TPL" + depends on TPL_RELOC_MALLOC + +config TPL_RELOC_MALLOC_SIZE + hex "Size of malloc pool in TPL" + depends on TPL_RELOC_MALLOC + +config TPL_PAD_TO + hex "Offset to which the TPL should be padded before appending the TPL payload" + depends on TPL && !TPL_FRAMEWORK + default TPL_MAX_SIZE + help + Image offset to which the TPL should be padded before appending the + TPL payload. By default, this is defined as CONFIG_TPL_MAX_SIZE, or 0 if + CONFIG_TPL_MAX_SIZE is undefined. CONFIG_TPL_PAD_TO must be either + 0, meaning to append the TPL payload without any padding, or >= + CONFIG_TPL_MAX_SIZE. +endmenu + +endmenu + diff --git a/common/spl/Kconfig.tpl b/common/spl/Kconfig.tpl new file mode 100644 index 00000000000..9a0e719cf94 --- /dev/null +++ b/common/spl/Kconfig.tpl @@ -0,0 +1,322 @@ +menu "TPL configuration options" + depends on TPL + +config TPL_SIZE_LIMIT + hex "Maximum size of TPL image" + default 0x0 + help + Specifies the maximum length of the U-Boot TPL image. + If this value is zero, it is ignored. + +config TPL_BINMAN_SYMBOLS + bool "Declare binman symbols in TPL" + depends on SPL_FRAMEWORK && BINMAN + default y + help + This enables use of symbols in TPL which refer to U-Boot, enabling TPL + to obtain the location of U-Boot simply by calling spl_get_image_pos() + and spl_get_image_size(). + + For this to work, you must have a U-Boot image in the binman image, so + binman can update TPL with the location of it. + +config TPL_FRAMEWORK + bool "Support TPL based upon the common SPL framework" + default y if SPL_FRAMEWORK + help + Enable the SPL framework under common/spl/ for TPL builds. + This framework supports MMC, NAND and YMODEM and other methods + loading of U-Boot's SPL stage. If unsure, say Y. + +config TPL_BANNER_PRINT + bool "Enable output of the TPL banner 'U-Boot TPL ...'" + default y + help + If this option is enabled, TPL will print the banner with version + info. Disabling this option could be useful to reduce TPL boot time + (e.g. approx. 6 ms faster, when output on i.MX6 with 115200 baud). + +config TPL_HANDOFF + bool "Pass hand-off information from TPL to SPL and U-Boot proper" + depends on HANDOFF && TPL_BLOBLIST + default y + help + This option enables TPL to write handoff information. This can be + used to pass information like the size of SDRAM from TPL to U-Boot + proper. The information is also available to SPL if it is useful + there. + +config TPL_BOARD_INIT + bool "Call board-specific initialization in TPL" + help + If this option is enabled, U-Boot will call the function + spl_board_init() from board_init_r(). This function should be + provided by the board. + +config TPL_BOOTCOUNT_LIMIT + bool "Support bootcount in TPL" + depends on TPL_ENV_SUPPORT + help + If this option is enabled, the TPL will support bootcount. + For example, it may be useful to choose the device to boot. + +config TPL_SYS_MALLOC_SIMPLE + bool + prompt "Only use malloc_simple functions in the TPL" + help + Say Y here to only use the *_simple malloc functions from + malloc_simple.c, rather then using the versions from dlmalloc.c; + this will make the TPL binary smaller at the cost of more heap + usage as the *_simple malloc functions do not re-use free-ed mem. + +config TPL_SEPARATE_BSS + bool "BSS section is in a different memory region from text" + default y if SPL_SEPARATE_BSS + help + Some platforms need a large BSS region in TPL and can provide this + because RAM is already set up. In this case BSS can be moved to RAM. + This option should then be enabled so that the correct device tree + location is used. Normally we put the device tree at the end of BSS + but with this option enabled, it goes at _image_binary_end. + +config TPL_LDSCRIPT + string "Linker script for the TPL stage" + default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64 + default "arch/\$(ARCH)/cpu/u-boot-spl.lds" + help + The TPL stage will usually require a different linker-script + (as it runs from a different memory region) than the regular + U-Boot stage. Set this to the path of the linker-script to + be used for TPL. + + May be left empty to trigger the Makefile infrastructure to + fall back to the linker-script used for the SPL stage. + +config TPL_NEEDS_SEPARATE_STACK + bool "TPL needs a separate initial stack-pointer" + help + Enable, if the TPL stage should not inherit its initial + stack-pointer from the settings for the SPL stage. + +config TPL_POWER + bool "Support power drivers" + help + Enable support for power control in TPL. This includes support + for PMICs (Power-management Integrated Circuits) and some of the + features provided by PMICs. In particular, voltage regulators can + be used to enable/disable power and vary its voltage. That can be + useful in TPL to turn on boot peripherals and adjust CPU voltage + so that the clock speed can be increased. This enables the drivers + in drivers/power, drivers/power/pmic and drivers/power/regulator + as part of an TPL build. + +config TPL_TEXT_BASE + hex "Base address for the .text section of the TPL stage" + default 0 + help + The base address for the .text section of the TPL stage. + +config TPL_MAX_SIZE + hex "Maximum size (in bytes) for the TPL stage" + default 0x2e000 if ROCKCHIP_RK3399 + default 0x8000 if ROCKCHIP_RK3288 + default 0x7000 if ROCKCHIP_RK322X || ROCKCHIP_RK3328 || ROCKCHIP_RK3368 + default 0x2800 if ROCKCHIP_PX30 + default 0x0 + help + The maximum size (in bytes) of the TPL stage. + +config TPL_STACK + hex "Address of the initial stack-pointer for the TPL stage" + depends on TPL_NEEDS_SEPARATE_STACK + help + The address of the initial stack-pointer for the TPL stage. + Usually this will be the (aligned) top-of-stack. + +config TPL_READ_ONLY + bool + depends on TPL_OF_PLATDATA + select TPL_OF_PLATDATA_NO_BIND + select TPL_OF_PLATDATA_RT + help + Some platforms (e.g. x86 Apollo Lake) load SPL into a read-only + section of memory. This means that of-platdata must make a copy (in + writeable memory) of anything it wants to modify, such as + device-private data. + +config TPL_BOOTROM_SUPPORT + bool "Support returning to the BOOTROM (from TPL)" + help + Some platforms (e.g. the Rockchip RK3368) provide support in their + ROM for loading the next boot-stage after performing basic setup + from the TPL stage. + + Enable this option, to return to the BOOTROM through the + BOOT_DEVICE_BOOTROM (or fall-through to the next boot device in the + boot device list, if not implemented for a given board) + +config TPL_CRC32 + bool "Support CRC32 in TPL" + default y if TPL_ENV_SUPPORT || TPL_BLOBLIST + help + Enable this to support CRC32 in uImages or FIT images within SPL. + This is a 32-bit checksum value that can be used to verify images. + For FIT images, this is the least secure type of checksum, suitable + for detected accidental image corruption. For secure applications you + should consider SHA1 or SHA256. + +config TPL_DRIVERS_MISC + bool "Support misc drivers in TPL" + help + Enable miscellaneous drivers in TPL. These drivers perform various + tasks that don't fall nicely into other categories, Enable this + option to build the drivers in drivers/misc as part of an TPL + build, for those that support building in TPL (not all drivers do). + +config TPL_ENV_SUPPORT + bool "Support an environment" + help + Enable environment support in TPL. See SPL_ENV_SUPPORT for details. + +config TPL_GPIO + bool "Support GPIO in TPL" + help + Enable support for GPIOs (General-purpose Input/Output) in TPL. + GPIOs allow U-Boot to read the state of an input line (high or + low) and set the state of an output line. This can be used to + drive LEDs, control power to various system parts and read user + input. GPIOs can be useful in TPL to enable a 'sign-of-life' LED, + for example. Enable this option to build the drivers in + drivers/gpio as part of an TPL build. + +config TPL_I2C + bool "Support I2C" + help + Enable support for the I2C bus in TPL. See SPL_I2C for + details. + +config TPL_LIBCOMMON_SUPPORT + bool "Support common libraries" + help + Enable support for common U-Boot libraries within TPL. See + SPL_LIBCOMMON_SUPPORT for details. + +config TPL_LIBGENERIC_SUPPORT + bool "Support generic libraries" + help + Enable support for generic U-Boot libraries within TPL. See + SPL_LIBGENERIC_SUPPORT for details. + +config TPL_MPC8XXX_INIT_DDR + bool "Support MPC8XXX DDR init" + help + Enable support for DDR-SDRAM on the MPC8XXX family within TPL. See + SPL_MPC8XXX_INIT_DDR for details. + +config TPL_MMC + bool "Support MMC" + depends on MMC + help + Enable support for MMC within TPL. See SPL_MMC for details. + +config TPL_NAND_SUPPORT + bool "Support NAND flash" + help + Enable support for NAND in TPL. See SPL_NAND_SUPPORT for details. + +config TPL_PCI + bool "Support PCI drivers" + help + Enable support for PCI in TPL. For platforms that need PCI to boot, + or must perform some init using PCI in SPL, this provides the + necessary driver support. This enables the drivers in drivers/pci + as part of a TPL build. + +config TPL_PCH + bool "Support PCH drivers" + help + Enable support for PCH (Platform Controller Hub) devices in TPL. + These are used to set up GPIOs and the SPI peripheral early in + boot. This enables the drivers in drivers/pch as part of a TPL + build. + +config TPL_RAM_SUPPORT + bool "Support booting from RAM" + help + Enable booting of an image in RAM. The image can be preloaded or + it can be loaded by TPL directly into RAM (e.g. using USB). + +config TPL_RAM_DEVICE + bool "Support booting from preloaded image in RAM" + depends on TPL_RAM_SUPPORT + help + Enable booting of an image already loaded in RAM. The image has to + be already in memory when TPL takes over, e.g. loaded by the boot + ROM. + +config TPL_RTC + bool "Support RTC drivers" + help + Enable RTC (Real-time Clock) support in TPL. This includes support + for reading and setting the time. Some RTC devices also have some + non-volatile (battery-backed) memory which is accessible if + needed. This enables the drivers in drivers/rtc as part of an TPL + build. + +config TPL_SERIAL + bool "Support serial" + select TPL_PRINTF + select TPL_STRTO + help + Enable support for serial in TPL. See SPL_SERIAL for + details. + +config TPL_SPI_FLASH_SUPPORT + bool "Support SPI flash drivers" + help + Enable support for using SPI flash in TPL. See SPL_SPI_FLASH_SUPPORT + for details. + +config TPL_SPI_FLASH_TINY + bool "Enable low footprint TPL SPI Flash support" + depends on TPL_SPI_FLASH_SUPPORT && !SPI_FLASH_BAR + default y if SPI_FLASH + help + Enable lightweight TPL SPI Flash support that supports just reading + data/images from flash. No support to write/erase flash. Enable + this if you have TPL size limitations and don't need full-fledged + SPI flash support. + +config TPL_SPI_LOAD + bool "Support loading from SPI flash" + depends on TPL_SPI_FLASH_SUPPORT + help + Enable support for loading next stage, U-Boot or otherwise, from + SPI NOR in U-Boot TPL. + +config TPL_SPI + bool "Support SPI drivers" + help + Enable support for using SPI in TPL. See SPL_SPI for + details. + +config TPL_DM_SPI + bool "Support SPI DM drivers in TPL" + help + Enable support for SPI DM drivers in TPL. + +config TPL_DM_SPI_FLASH + bool "Support SPI DM FLASH drivers in TPL" + help + Enable support for SPI DM flash drivers in TPL. + +config TPL_YMODEM_SUPPORT + bool "Support loading using Ymodem" + depends on TPL_SERIAL + help + While loading from serial is slow it can be a useful backup when + there is no other option. The Ymodem protocol provides a reliable + means of transmitting U-Boot over a serial line for using in TPL, + with a checksum to ensure correctness. + +endmenu diff --git a/common/spl/Kconfig.vpl b/common/spl/Kconfig.vpl new file mode 100644 index 00000000000..ba1ea6075b9 --- /dev/null +++ b/common/spl/Kconfig.vpl @@ -0,0 +1,201 @@ +menu "VPL options" + depends on VPL + +config VPL_BANNER_PRINT + bool "Enable output of the VPL banner 'U-Boot VPL ...'" + default y + help + If this option is enabled, VPL will print the banner with version + info. Disabling this option could be useful to reduce VPL boot time + (e.g. approx. 6 ms faster, when output on i.MX6 with 115200 baud). + +config VPL_BOARD_INIT + bool "Call board-specific initialization in VPL" + help + If this option is enabled, U-Boot will call the function + spl_board_init() from board_init_r(). This function should be + provided by the board. + +config VPL_CACHE + depends on CACHE + bool "Support cache drivers in VPL" + help + Enable support for cache drivers in VPL. + +config VPL_CRC32 + bool "Support CRC32 in VPL" + default y if VPL_ENV_SUPPORT || VPL_BLOBLIST + help + Enable this to support CRC32 in uImages or FIT images within VPL. + This is a 32-bit checksum value that can be used to verify images. + For FIT images, this is the least secure type of checksum, suitable + for detected accidental image corruption. For secure applications you + should consider SHA1 or SHA256. + +config VPL_DM_SPI + bool "Support SPI DM drivers in VPL" + help + Enable support for SPI DM drivers in VPL. + +config VPL_DM_SPI_FLASH + bool "Support SPI DM FLASH drivers in VPL" + help + Enable support for SPI DM flash drivers in VPL. + +config VPL_FRAMEWORK + bool "Support VPL based upon the common SPL framework" + default y + help + Enable the SPL framework under common/spl/ for VPL builds. + This framework supports MMC, NAND and YMODEM and other methods + loading of U-Boot's next stage. If unsure, say Y. + +config VPL_HANDOFF + bool "Pass hand-off information from VPL to SPL" + depends on HANDOFF && VPL_BLOBLIST + default y + help + This option enables VPL to write handoff information. This can be + used to pass information like the size of SDRAM from VPL to SPL. Also + VPL can receive information from TPL in the same place if that is + enabled. + +config VPL_LIBCOMMON_SUPPORT + bool "Support common libraries" + default y if SPL_LIBCOMMON_SUPPORT + help + Enable support for common U-Boot libraries within VPL. See + SPL_LIBCOMMON_SUPPORT for details. + +config VPL_LIBGENERIC_SUPPORT + bool "Support generic libraries" + default y if SPL_LIBGENERIC_SUPPORT + help + Enable support for generic U-Boot libraries within VPL. These + libraries include generic code to deal with device tree, hashing, + printf(), compression and the like. This option is enabled on many + boards. Enable this option to build the code in lib/ as part of a + VPL build. + +config VPL_DRIVERS_MISC + bool "Support misc drivers" + default y if TPL_DRIVERS_MISC + help + Enable miscellaneous drivers in VPL. These drivers perform various + tasks that don't fall nicely into other categories, Enable this + option to build the drivers in drivers/misc as part of a VPL + build, for those that support building in VPL (not all drivers do). + +config VPL_ENV_SUPPORT + bool "Support an environment" + help + Enable environment support in VPL. The U-Boot environment provides + a number of settings (essentially name/value pairs) which can + control many aspects of U-Boot's operation. Enabling this option will + make env_get() and env_set() available in VSPL. + +config VPL_GPIO + bool "Support GPIO in VPL" + default y if SPL_GPIO + help + Enable support for GPIOs (General-purpose Input/Output) in VPL. + GPIOs allow U-Boot to read the state of an input line (high or + low) and set the state of an output line. This can be used to + drive LEDs, control power to various system parts and read user + input. GPIOs can be useful in VPL to enable a 'sign-of-life' LED, + for example. Enable this option to build the drivers in + drivers/gpio as part of a VPL build. + +config VPL_HANDOFF + bool "Pass hand-off information from VPL to SPL and U-Boot proper" + depends on HANDOFF && VPL_BLOBLIST + default y + help + This option enables VPL to write handoff information. This can be + used to pass information like the size of SDRAM from VPL to U-Boot + proper. The information is also available to VPL if it is useful + there. + +config VPL_HASH + bool "Support hashing drivers in VPL" + select SHA1 + select SHA256 + help + Enable hashing drivers in VPL. These drivers can be used to + accelerate secure boot processing in secure applications. Enable + this option to build system-specific drivers for hash acceleration + as part of a VPL build. + +config VPL_I2C_SUPPORT + bool "Support I2C in VPL" + default y if SPL_I2C_SUPPORT + help + Enable support for the I2C bus in VPL. Vee SPL_I2C_SUPPORT for + details. + +config VPL_PCH_SUPPORT + bool "Support PCH drivers" + default y if TPL_PCH_SUPPORT + help + Enable support for PCH (Platform Controller Hub) devices in VPL. + These are used to set up GPIOs and the SPI peripheral early in + boot. This enables the drivers in drivers/pch as part of a VPL + build. + +config VPL_PCI + bool "Support PCI drivers" + default y if SPL_PCI + help + Enable support for PCI in VPL. For platforms that need PCI to boot, + or must perform some init using PCI in VPL, this provides the + necessary driver support. This enables the drivers in drivers/pci + as part of a VPL build. + +config VPL_RTC + bool "Support RTC drivers" + help + Enable RTC (Real-time Clock) support in VPL. This includes support + for reading and setting the time. Some RTC devices also have some + non-volatile (battery-backed) memory which is accessible if + needed. This enables the drivers in drivers/rtc as part of a VPL + build. + +config VPL_SERIAL + bool "Support serial" + default y if TPL_SERIAL + select VPL_PRINTF + select VPL_STRTO + help + Enable support for serial in VPL. See SPL_SERIAL_SUPPORT for + details. + +config VPL_SIZE_LIMIT + hex "Maximum size of VPL image" + default 0x0 + help + Specifies the maximum length of the U-Boot VPL image. + If this value is zero, it is ignored. + +config VPL_SPI + bool "Support SPI drivers" + help + Enable support for using SPI in VPL. See SPL_SPI_SUPPORT for + details. + +config VPL_SPI_FLASH_SUPPORT + bool "Support SPI flash drivers" + help + Enable support for using SPI flash in VPL, and loading U-Boot from + SPI flash. SPI flash (Serial Peripheral Bus flash) is named after + the SPI bus that is used to connect it to a system. It is a simple + but fast bidirectional 4-wire bus (clock, chip select and two data + lines). This enables the drivers in drivers/mtd/spi as part of a + VPL build. This normally requires VPL_SPI_SUPPORT. + +config VPL_TEXT_BASE + hex "VPL Text Base" + default 0x0 + help + The address in memory that VPL will be running from. + +endmenu -- GitLab From ab0c5f1a59070dfd111112b6969d7b67f07974fd Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 30 May 2022 17:11:23 -0400 Subject: [PATCH 057/581] spl: Rework Kconfig to be more menu driven Make it so that all of SPL, TPL and VPL are proper menus hidden behind a gating question. Signed-off-by: Tom Rini --- common/spl/Kconfig | 54 +++++++++++++++++++--------------------------- 1 file changed, 22 insertions(+), 32 deletions(-) diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 25078432a7e..9952a9b94c1 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -1,5 +1,3 @@ -menu "SPL / TPL / VPL" - config SUPPORT_SPL bool @@ -13,15 +11,16 @@ config SPL_DFU_NO_RESET bool config SPL - bool + bool "Enable SPL" depends on SUPPORT_SPL - prompt "Enable SPL" help If you want to build SPL as well as the normal image, say Y. +menu "SPL configuration options" + depends on SPL + config SPL_FRAMEWORK bool "Support SPL based upon the common SPL framework" - depends on SPL default y help Enable the SPL framework under common/spl/. This framework @@ -39,7 +38,6 @@ config SPL_FRAMEWORK_BOARD_INIT_F config SPL_SIZE_LIMIT hex "Maximum size of SPL image" - depends on SPL default 0x11000 if ARCH_MX6 && !MX6_OCRAM_256KB default 0x31000 if ARCH_MX6 && MX6_OCRAM_256KB default 0x0 @@ -122,7 +120,7 @@ config SPL_BSS_START_ADDR choice prompt "Enforce SPL BSS limit" - depends on SPL && !PPC + depends on !PPC default SPL_BSS_LIMIT help In some platforms we only want to enforce a limit on the size of the @@ -203,7 +201,7 @@ source "common/spl/Kconfig.nxp" config HANDOFF bool "Pass hand-off information from SPL to U-Boot proper" - depends on SPL && BLOBLIST + depends on BLOBLIST help It is useful to be able to pass information from SPL to U-Boot proper to preserve state that is known in SPL and is needed in U-Boot. @@ -211,8 +209,6 @@ config HANDOFF in boot. It is available in gd->handoff. The state state is set up in SPL (or TPL if that is being used). -if SPL - config SPL_HANDOFF bool "Pass hand-off information from SPL to U-Boot proper" depends on HANDOFF && SPL_BLOBLIST @@ -300,8 +296,7 @@ config SPL_LEGACY_IMAGE_CRC_CHECK are correct, without further integrity checks. config SPL_SYS_MALLOC_SIMPLE - bool - prompt "Only use malloc_simple functions in the SPL" + bool "Only use malloc_simple functions in the SPL" help Say Y here to only use the *_simple malloc functions from malloc_simple.c, rather then using the versions from dlmalloc.c; @@ -1020,7 +1015,6 @@ config SPL_NOR_SUPPORT config SPL_XIP_SUPPORT bool "Support XIP" - depends on SPL help Enable support for execute in place of U-Boot or kernel image. There is no need to copy image from flash to ram if flash supports execute @@ -1131,7 +1125,6 @@ config SPL_POST_MEM_SUPPORT config SPL_DM_RESET bool "Support reset drivers" - depends on SPL help Enable support for reset control in SPL. That can be useful in SPL to handle IP reset in driver, as in U-Boot, @@ -1472,35 +1465,32 @@ config SPL_TARGET On some platforms we need to have 'make' run additional build target rules. If required on your platform, enter it here, otherwise leave blank. + +config SPL_AT91_MCK_BYPASS + bool "Use external clock signal as a source of main clock for AT91 platforms" + depends on ARCH_AT91 + help + Use external 8 to 24 Mhz clock signal as source of main clock instead + of an external crystal oscillator. + This option disables the internal driving on the XOUT pin. + The external source has to provide a stable clock on the XIN pin. + If this option is disabled, the SoC expects a crystal oscillator + that needs driving on both XIN and XOUT lines. +endmenu + config TPL - bool depends on SUPPORT_TPL - prompt "Enable TPL" + bool "Enable TPL" help If you want to build TPL as well as the normal image and SPL, say Y. source "common/spl/Kconfig.tpl" config VPL - bool depends on SUPPORT_SPL - prompt "Enable VPL" + bool "Enable VPL" help If you want to build VPL as well as the normal image, TPL and SPL, say Y. source "common/spl/Kconfig.vpl" - -config SPL_AT91_MCK_BYPASS - bool "Use external clock signal as a source of main clock for AT91 platforms" - depends on ARCH_AT91 - help - Use external 8 to 24 Mhz clock signal as source of main clock instead - of an external crystal oscillator. - This option disables the internal driving on the XOUT pin. - The external source has to provide a stable clock on the XIN pin. - If this option is disabled, the SoC expects a crystal oscillator - that needs driving on both XIN and XOUT lines. - -endif # SPL -endmenu -- GitLab From 4151f4f822bb075c05e3407d184dfd018723724d Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 31 May 2022 10:24:55 -0400 Subject: [PATCH 058/581] spl: Rework and tighten some dependencies - In a few places, add missing "depends on" that can be implied from the option name (i.e. SPL_DM_xxx depends on SPL_DM). - Make less use of "if SPL_xxx ... endif" clauses as most of the time this reads better as depends on. In the case of UBI however, move it all to a sub-menu. - Rework SPL_NO_CPU_SUPPORT as it's very specific to the non-SPL_FRAMEWORK implementation used on those platforms, and a tangent to how CONFIG_SPL_START_S_PATH was used. Signed-off-by: Tom Rini --- common/spl/Kconfig | 55 ++++++++++++++++++++-------------------------- 1 file changed, 24 insertions(+), 31 deletions(-) diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 9952a9b94c1..2ad2351c6eb 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -750,6 +750,7 @@ config SPL_LIBGENERIC_SUPPORT config SPL_DM_MAILBOX bool "Support Mailbox" + depends on SPL_DM help Enable support for Mailbox within SPL. This enable the inter processor communication protocols tobe used within SPL. Enable @@ -874,19 +875,9 @@ config SPL_UBI Enable support for loading payloads from UBI. See README.ubispl for more info. -if SPL_DM -config SPL_DM_SPI - bool "Support SPI DM drivers in SPL" - help - Enable support for SPI DM drivers in SPL. - -config SPL_DM_SPI_FLASH - bool "Support SPI DM FLASH drivers in SPL" - help - Enable support for SPI DM flash drivers in SPL. +menu "UBI configuration for SPL" + depends on SPL_UBI -endif -if SPL_UBI config SPL_UBI_LOAD_BY_VOLNAME bool "Support loading volumes by name" help @@ -896,58 +887,49 @@ config SPL_UBI_LOAD_BY_VOLNAME config SPL_UBI_MAX_VOL_LEBS int "Maximum number of LEBs per volume" - depends on SPL_UBI help The maximum number of logical eraseblocks which a static volume to load can contain. Used for sizing the scan data structure. config SPL_UBI_MAX_PEB_SIZE int "Maximum PEB size" - depends on SPL_UBI help The maximum physical erase block size. config SPL_UBI_MAX_PEBS int "Maximum number of PEBs" - depends on SPL_UBI help The maximum physical erase block size. If not overridden by board code, this value will be used as the actual number of PEBs. config SPL_UBI_PEB_OFFSET int "Offset to first UBI PEB" - depends on SPL_UBI help The offset in number of PEBs from the start of flash to the first PEB part of the UBI image. config SPL_UBI_VID_OFFSET int "Offset to VID header" - depends on SPL_UBI config SPL_UBI_LEB_START int "Offset to LEB in PEB" - depends on SPL_UBI help The offset in bytes to the LEB within a PEB. config SPL_UBI_INFO_ADDR hex "Address to place UBI scan info" - depends on SPL_UBI help Address for ubispl to place the scan info. Read README.ubispl to determine the required size config SPL_UBI_VOL_IDS int "Maximum volume id" - depends on SPL_UBI help The maximum volume id which can be loaded. Used for sizing the scan data structure. config SPL_UBI_LOAD_MONITOR_ID int "id of U-Boot volume" - depends on SPL_UBI help The UBI volume id from which to load U-Boot @@ -959,13 +941,13 @@ config SPL_UBI_LOAD_MONITOR_VOLNAME config SPL_UBI_LOAD_KERNEL_ID int "id of kernel volume" - depends on SPL_OS_BOOT && SPL_UBI + depends on SPL_OS_BOOT help The UBI volume id from which to load the kernel config SPL_UBI_LOAD_ARGS_ID int "id of kernel args volume" - depends on SPL_OS_BOOT && SPL_UBI + depends on SPL_OS_BOOT help The UBI volume id from which to load the device tree @@ -975,7 +957,19 @@ config UBI_SPL_SILENCE_MSG Disable messages from UBI SPL. This leaves warnings and errors enabled. -endif # if SPL_UBI +endmenu + +config SPL_DM_SPI + bool "Support SPI DM drivers in SPL" + depends on SPL_DM + help + Enable support for SPI DM drivers in SPL. + +config SPL_DM_SPI_FLASH + bool "Support SPI DM FLASH drivers in SPL" + depends on SPL_DM + help + Enable support for SPI DM flash drivers in SPL. config SPL_NET bool "Support networking" @@ -986,19 +980,19 @@ config SPL_NET the network stack uses a number of environment variables. See also SPL_ETH. -if SPL_NET config SPL_NET_VCI_STRING string "BOOTP Vendor Class Identifier string sent by SPL" + depends on SPL_NET help As defined by RFC 2132 the vendor class identifier field can be sent by the client to identify the vendor type and configuration of a client. This is often used in practice to allow for the DHCP server to specify different files to load depending on if the ROM, SPL or U-Boot itself makes the request -endif # if SPL_NET config SPL_NO_CPU_SUPPORT - bool "Drop CPU code in SPL" + def_bool y + depends on (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK help This is specific to the ARM926EJ-S CPU. It disables the standard start.S start-up code, presumably so that a replacement can be @@ -1048,16 +1042,13 @@ config SYS_NAND_SPL_KERNEL_OFFS hex "Address in memory to load the OS file for Falcon mode to" depends on SPL_OS_BOOT && SPL_NAND_SUPPORT -if SPL_OS_BOOT config SYS_OS_BASE hex "addr, where OS is found" - depends on SPL_NOR_SUPPORT + depends on SPL_OS_BOOT && SPL_NOR_SUPPORT help Specify the address, where the OS image is found, which gets booted. -endif # SPL_OS_BOOT - config SPL_FALCON_BOOT_MMCSD bool "Enable Falcon boot from MMC or SD media" depends on SPL_OS_BOOT && SPL_MMC @@ -1125,6 +1116,7 @@ config SPL_POST_MEM_SUPPORT config SPL_DM_RESET bool "Support reset drivers" + depends on SPL_DM help Enable support for reset control in SPL. That can be useful in SPL to handle IP reset in driver, as in U-Boot, @@ -1427,6 +1419,7 @@ config SPL_ATF_NO_PLATFORM_PARAM config SPL_AM33XX_ENABLE_RTC32K_OSC bool "Enable the RTC32K OSC on AM33xx based platforms" + depends on AM33XX default y if AM33XX help Enable access to the AM33xx RTC and select the external 32kHz clock -- GitLab From 41e47b420d6b122f6eb21e6e4438b334cc983eb1 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 6 Jun 2022 12:13:29 -0400 Subject: [PATCH 059/581] configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini --- configs/P1010RDB-PA_36BIT_NOR_defconfig | 4 +- configs/P1010RDB-PA_NOR_defconfig | 4 +- configs/P1010RDB-PB_36BIT_NOR_defconfig | 4 +- configs/P1010RDB-PB_NOR_defconfig | 4 +- configs/P1020RDB-PC_36BIT_defconfig | 4 +- configs/P1020RDB-PC_defconfig | 4 +- configs/P1020RDB-PD_defconfig | 4 +- configs/P2020RDB-PC_36BIT_defconfig | 4 +- configs/P2020RDB-PC_defconfig | 4 +- configs/at91sam9m10g45ek_mmc_defconfig | 1 - configs/at91sam9m10g45ek_nandflash_defconfig | 1 - configs/at91sam9n12ek_mmc_defconfig | 1 - configs/at91sam9n12ek_nandflash_defconfig | 1 - configs/at91sam9n12ek_spiflash_defconfig | 1 - configs/at91sam9x5ek_dataflash_defconfig | 1 - configs/at91sam9x5ek_mmc_defconfig | 1 - configs/at91sam9x5ek_nandflash_defconfig | 1 - configs/at91sam9x5ek_spiflash_defconfig | 1 - configs/chromebook_coral_defconfig | 2 +- configs/elgin-rv1108_defconfig | 1 - configs/evb-px30_defconfig | 2 +- configs/evb-px5_defconfig | 2 +- configs/evb-rk3128_defconfig | 1 - configs/evb-rk3328_defconfig | 2 +- configs/evb-rv1108_defconfig | 1 - configs/firefly-px30_defconfig | 2 +- configs/geekbox_defconfig | 2 - configs/k2e_hs_evm_defconfig | 1 - configs/k2g_hs_evm_defconfig | 1 - configs/k2hk_hs_evm_defconfig | 1 - configs/k2l_hs_evm_defconfig | 1 - configs/lion-rk3368_defconfig | 2 +- configs/ls2080aqds_SECURE_BOOT_defconfig | 1 - configs/ls2080aqds_defconfig | 1 - configs/ls2080aqds_qspi_defconfig | 1 - configs/ls2080ardb_SECURE_BOOT_defconfig | 1 - configs/ls2080ardb_defconfig | 1 - configs/ls2081ardb_defconfig | 1 - configs/ls2088aqds_tfa_defconfig | 1 - configs/ls2088ardb_qspi_SECURE_BOOT_defconfig | 1 - configs/ls2088ardb_qspi_defconfig | 1 - configs/ls2088ardb_tfa_SECURE_BOOT_defconfig | 1 - configs/ls2088ardb_tfa_defconfig | 1 - configs/mx23_olinuxino_defconfig | 1 - configs/mx23evk_defconfig | 1 - configs/mx28evk_auart_console_defconfig | 1 - configs/mx28evk_defconfig | 1 - configs/mx28evk_nand_defconfig | 1 - configs/mx28evk_spi_defconfig | 1 - configs/nanopi-r2s-rk3328_defconfig | 2 +- configs/odroid-go2_defconfig | 2 +- configs/pm9g45_defconfig | 1 - configs/px30-core-ctouch2-of10-px30_defconfig | 2 +- configs/px30-core-ctouch2-px30_defconfig | 2 +- configs/px30-core-edimm2.2-px30_defconfig | 2 +- configs/roc-cc-rk3328_defconfig | 2 +- configs/rock-pi-e-rk3328_defconfig | 2 +- configs/rock64-rk3328_defconfig | 2 +- configs/sama5d2_icp_qspiflash_defconfig | 1 - configs/sama5d36ek_cmp_mmc_defconfig | 1 - configs/sama5d36ek_cmp_nandflash_defconfig | 1 - configs/sama5d36ek_cmp_spiflash_defconfig | 1 - configs/sandbox_vpl_defconfig | 2 +- configs/sheep-rk3368_defconfig | 2 - configs/stm32746g-eval_defconfig | 1 - configs/stm32f746-disco_defconfig | 1 - configs/stm32f769-disco_defconfig | 1 - configs/uniphier_v8_defconfig | 2 - configs/xilinx_zynqmp_mini_defconfig | 1 - configs/xilinx_zynqmp_mini_nand_defconfig | 1 - .../xilinx_zynqmp_mini_nand_single_defconfig | 1 - scripts/config_whitelist.txt | 61 ------------------- 72 files changed, 24 insertions(+), 153 deletions(-) diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index 53f551eb378..fb74f9bd5b4 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -20,8 +20,6 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudra CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y -CONFIG_SPL_MAX_SIZE=0x18000 -CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y @@ -48,6 +46,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y @@ -89,4 +88,3 @@ CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y CONFIG_ADDR_MAP=y -CONFIG_COMMON_INIT_DDR=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index efdf1c99621..31cf6037e2f 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -19,8 +19,6 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudra CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y -CONFIG_SPL_MAX_SIZE=0x18000 -CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y @@ -47,6 +45,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y @@ -87,4 +86,3 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y -CONFIG_COMMON_INIT_DDR=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 146c556062d..d5a9287678a 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -21,8 +21,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y -CONFIG_SPL_MAX_SIZE=0x18000 -CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y @@ -49,6 +47,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y @@ -91,4 +90,3 @@ CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y CONFIG_ADDR_MAP=y -CONFIG_COMMON_INIT_DDR=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index bcf4c090dd3..9529d97bccf 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -20,8 +20,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y -CONFIG_SPL_MAX_SIZE=0x18000 -CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y @@ -48,6 +46,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y @@ -89,4 +88,3 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y -CONFIG_COMMON_INIT_DDR=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index 425d66891d3..e43c605b4e0 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -22,8 +22,6 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$con CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set -CONFIG_SPL_MAX_SIZE=0x20000 -CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 @@ -57,6 +55,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y @@ -101,4 +100,3 @@ CONFIG_USB=y CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y -CONFIG_COMMON_INIT_DDR=y diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 3ecdd1b6dd3..02580c8e0df 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -21,8 +21,6 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$con CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set -CONFIG_SPL_MAX_SIZE=0x20000 -CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 @@ -56,6 +54,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y @@ -99,4 +98,3 @@ CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y -CONFIG_COMMON_INIT_DDR=y diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index d78dc0d9ca0..473a596672f 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -21,8 +21,6 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$con CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set -CONFIG_SPL_MAX_SIZE=0x20000 -CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 @@ -59,6 +57,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y @@ -103,4 +102,3 @@ CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y -CONFIG_COMMON_INIT_DDR=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index 258442b76cb..dcf5b21ff0f 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -22,8 +22,6 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$con CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set -CONFIG_SPL_MAX_SIZE=0x20000 -CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 @@ -61,6 +59,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y @@ -106,4 +105,3 @@ CONFIG_USB=y CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y -CONFIG_COMMON_INIT_DDR=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index fb1a239f6a2..0ae8394a105 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -21,8 +21,6 @@ CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$con CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_MISC_INIT_R is not set -CONFIG_SPL_MAX_SIZE=0x20000 -CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 @@ -60,6 +58,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y @@ -104,4 +103,3 @@ CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y -CONFIG_COMMON_INIT_DDR=y diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig index 3c17b64797d..139eff56d86 100644 --- a/configs/at91sam9m10g45ek_mmc_defconfig +++ b/configs/at91sam9m10g45ek_mmc_defconfig @@ -25,7 +25,6 @@ CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x71000000 dtb; fatload mmc 0:1 0x72000000 z CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_RESET_PHY_R=y -CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_CBSIZE=256 diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig b/configs/at91sam9m10g45ek_nandflash_defconfig index ecce82447a1..fc32ebd5695 100644 --- a/configs/at91sam9m10g45ek_nandflash_defconfig +++ b/configs/at91sam9m10g45ek_nandflash_defconfig @@ -25,7 +25,6 @@ CONFIG_BOOTCOMMAND="nand read 0x70000000 0x200000 0x300000;bootm 0x70000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_RESET_PHY_R=y -CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_CBSIZE=256 diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig index 21cbfbd1f42..66fad220d2c 100644 --- a/configs/at91sam9n12ek_mmc_defconfig +++ b/configs/at91sam9n12ek_mmc_defconfig @@ -20,7 +20,6 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};fatload mmc 0:1 0x21000000 dtb;fatload mmc 0:1 0x22000000 uImage;bootm 0x22000000 - 0x21000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_SPL_MAX_SIZE=0x6000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_CBSIZE=256 diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig index beb24e23622..3697d86015d 100644 --- a/configs/at91sam9n12ek_nandflash_defconfig +++ b/configs/at91sam9n12ek_nandflash_defconfig @@ -20,7 +20,6 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_nand};nand read 0x21000000 0x180000 0x080000;nand read 0x22000000 0x200000 0x400000;bootm 0x22000000 - 0x21000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_SPL_MAX_SIZE=0x6000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_CBSIZE=256 diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig index 3ac22ffb62a..5ddd14c9d5f 100644 --- a/configs/at91sam9n12ek_spiflash_defconfig +++ b/configs/at91sam9n12ek_spiflash_defconfig @@ -22,7 +22,6 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_nand};sf probe 0; sf read 0x22000000 0x100000 0x300000; bootm 0x22000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_SPL_MAX_SIZE=0x6000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_CBSIZE=256 diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig index d31ece77feb..6bdf18099dc 100644 --- a/configs/at91sam9x5ek_dataflash_defconfig +++ b/configs/at91sam9x5ek_dataflash_defconfig @@ -27,7 +27,6 @@ CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x22000000 0x84000 0x294000; bootm 0x220 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_SPL_MAX_SIZE=0x6000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_CBSIZE=256 diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig index cfd2dcd4564..7bc958e059a 100644 --- a/configs/at91sam9x5ek_mmc_defconfig +++ b/configs/at91sam9x5ek_mmc_defconfig @@ -24,7 +24,6 @@ CONFIG_BOOTARGS="mem=128M console=ttyS0,115200 mtdparts=atmel_nand:8M(bootstrap/ # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_SPL_MAX_SIZE=0x6000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_CBSIZE=256 diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig index 508896b311d..9b5842cbd36 100644 --- a/configs/at91sam9x5ek_nandflash_defconfig +++ b/configs/at91sam9x5ek_nandflash_defconfig @@ -26,7 +26,6 @@ CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x600000; nand read 0x21000000 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_SPL_MAX_SIZE=0x6000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_CBSIZE=256 diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig index 387dc0ff0c6..347a2ecfe87 100644 --- a/configs/at91sam9x5ek_spiflash_defconfig +++ b/configs/at91sam9x5ek_spiflash_defconfig @@ -28,7 +28,6 @@ CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x22000000 0x100000 0x300000; bootm 0x22 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_SPL_MAX_SIZE=0x6000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_CBSIZE=256 diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index 298f4be7c44..a06f8e21ae0 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -43,13 +43,13 @@ CONFIG_BLOBLIST_ADDR=0x100000 CONFIG_BLOBLIST_SIZE=0x30000 CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_HANDOFF=y -CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_CPU=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_PCI=y CONFIG_SPL_POWER=y # CONFIG_SPL_SPI_FLASH_TINY is not set +CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_TPL_POWER=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=532 diff --git a/configs/elgin-rv1108_defconfig b/configs/elgin-rv1108_defconfig index ff014cccb30..84cc29ad33d 100644 --- a/configs/elgin-rv1108_defconfig +++ b/configs/elgin-rv1108_defconfig @@ -21,7 +21,6 @@ CONFIG_DEFAULT_FDT_FILE="rv1108-elgin-r1.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y -CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_CMD_GPIO=y CONFIG_RANDOM_UUID=y CONFIG_CMD_MMC=y diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig index c873f7c2883..abd56327081 100644 --- a/configs/evb-px30_defconfig +++ b/configs/evb-px30_defconfig @@ -40,9 +40,9 @@ CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y -# CONFIG_TPL_BANNER_PRINT is not set CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set +# CONFIG_TPL_BANNER_PRINT is not set CONFIG_TPL_MAX_SIZE=0x20000 # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig index 82620159ab1..fc46154dfda 100644 --- a/configs/evb-px5_defconfig +++ b/configs/evb-px5_defconfig @@ -41,13 +41,13 @@ CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x20000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -CONFIG_TPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x188000 CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_TPL=y +CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_TPL_MAX_SIZE=0x40000 CONFIG_CMD_MMC=y CONFIG_CMD_CACHE=y diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig index 94c32b55423..06e48a5eee0 100644 --- a/configs/evb-rk3128_defconfig +++ b/configs/evb-rk3128_defconfig @@ -18,7 +18,6 @@ CONFIG_FIT=y CONFIG_DEFAULT_FDT_FILE="rk3128-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig index 373aaecd16f..4d6d235cb12 100644 --- a/configs/evb-rk3328_defconfig +++ b/configs/evb-rk3328_defconfig @@ -33,13 +33,13 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x2000000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -CONFIG_TPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_TPL_MAX_SIZE=0x40000 CONFIG_TPL_DRIVERS_MISC=y CONFIG_CMD_BOOTZ=y diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig index 88194317980..b2c92ca989f 100644 --- a/configs/evb-rv1108_defconfig +++ b/configs/evb-rv1108_defconfig @@ -17,7 +17,6 @@ CONFIG_DEFAULT_FDT_FILE="rv1108-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_RANDOM_UUID=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/firefly-px30_defconfig b/configs/firefly-px30_defconfig index bef490d73a4..e7e405fc502 100644 --- a/configs/firefly-px30_defconfig +++ b/configs/firefly-px30_defconfig @@ -41,9 +41,9 @@ CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y -# CONFIG_TPL_BANNER_PRINT is not set CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set +# CONFIG_TPL_BANNER_PRINT is not set CONFIG_TPL_MAX_SIZE=0x20000 # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set diff --git a/configs/geekbox_defconfig b/configs/geekbox_defconfig index b2cade74103..2ef8b41c779 100644 --- a/configs/geekbox_defconfig +++ b/configs/geekbox_defconfig @@ -17,8 +17,6 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-geekbox.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_SPL_MAX_SIZE=0x40000 -CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/k2e_hs_evm_defconfig b/configs/k2e_hs_evm_defconfig index da4e4ca7f76..1845bec5178 100644 --- a/configs/k2e_hs_evm_defconfig +++ b/configs/k2e_hs_evm_defconfig @@ -22,7 +22,6 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run run_mon_hs; run init_${boot}; run get_fit_${boot}; bootm ${addr_fit}#${name_fdt}" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_SPL_MAX_SIZE=0xfff8 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 diff --git a/configs/k2g_hs_evm_defconfig b/configs/k2g_hs_evm_defconfig index d865c12166f..ef92bef10c7 100644 --- a/configs/k2g_hs_evm_defconfig +++ b/configs/k2g_hs_evm_defconfig @@ -21,7 +21,6 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run envboot; run run_mon_hs; run init_${boot}; run get_fit_${boot}; bootm ${addr_fit}#${name_fdt}" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_SPL_MAX_SIZE=0xfff8 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig index 4f4dbcd5e17..5caf3db2fe5 100644 --- a/configs/k2hk_hs_evm_defconfig +++ b/configs/k2hk_hs_evm_defconfig @@ -22,7 +22,6 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run run_mon_hs; run init_${boot}; run get_fit_${boot}; bootm ${addr_fit}#${name_fdt}" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_SPL_MAX_SIZE=0xfff8 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 diff --git a/configs/k2l_hs_evm_defconfig b/configs/k2l_hs_evm_defconfig index 292806ff639..5c44ca922c4 100644 --- a/configs/k2l_hs_evm_defconfig +++ b/configs/k2l_hs_evm_defconfig @@ -22,7 +22,6 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run run_mon_hs; run init_${boot}; run get_fit_${boot}; bootm ${addr_fit}#${name_fdt}" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_SPL_MAX_SIZE=0xfff8 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig index 1b148f5c0f6..294ff4238fc 100644 --- a/configs/lion-rk3368_defconfig +++ b/configs/lion-rk3368_defconfig @@ -39,7 +39,6 @@ CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x20000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -CONFIG_TPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x188000 CONFIG_SPL_STACK_R=y @@ -47,6 +46,7 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 CONFIG_SPL_ATF=y CONFIG_TPL=y +CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_TPL_MAX_SIZE=0x40000 CONFIG_TPL_DRIVERS_MISC=y CONFIG_CMD_GPIO=y diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig index 26d92f9d9b1..abc958f5dd1 100644 --- a/configs/ls2080aqds_SECURE_BOOT_defconfig +++ b/configs/ls2080aqds_SECURE_BOOT_defconfig @@ -27,7 +27,6 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load" CONFIG_RESET_PHY_R=y -CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig index f34501f5c2f..9278a6e80f7 100644 --- a/configs/ls2080aqds_defconfig +++ b/configs/ls2080aqds_defconfig @@ -28,7 +28,6 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load" CONFIG_RESET_PHY_R=y -CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig index 8d91394a02b..afa2469b1b4 100644 --- a/configs/ls2080aqds_qspi_defconfig +++ b/configs/ls2080aqds_qspi_defconfig @@ -28,7 +28,6 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load" CONFIG_RESET_PHY_R=y -CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig index 6b59320f342..cb2d56838a5 100644 --- a/configs/ls2080ardb_SECURE_BOOT_defconfig +++ b/configs/ls2080ardb_SECURE_BOOT_defconfig @@ -32,7 +32,6 @@ CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="env exists mcinitcmd && env exists secureboot && esbc_validate 0x5806C0000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x580d00000;run distro_bootcmd;run nor_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y -CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig index 30efcaedbcb..136a101179b 100644 --- a/configs/ls2080ardb_defconfig +++ b/configs/ls2080ardb_defconfig @@ -33,7 +33,6 @@ CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="env exists mcinitcmd && env exists secureboot && esbc_validate 0x5806C0000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x580d00000;run distro_bootcmd;run nor_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y -CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig index 64d638b9cff..981217c1472 100644 --- a/configs/ls2081ardb_defconfig +++ b/configs/ls2081ardb_defconfig @@ -34,7 +34,6 @@ CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x806c0000 0x6c0000 0x40000; env exists mcinitcmd && env exists secureboot && esbc_validate 0x806C0000; sf read 0x80d00000 0xd00000 0x100000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x80d00000; run distro_bootcmd;run qspi_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y -CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y diff --git a/configs/ls2088aqds_tfa_defconfig b/configs/ls2088aqds_tfa_defconfig index 3948edb77aa..c46e506213c 100644 --- a/configs/ls2088aqds_tfa_defconfig +++ b/configs/ls2088aqds_tfa_defconfig @@ -29,7 +29,6 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_RESET_PHY_R=y -CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig index c5e81748b72..0ec945fce81 100644 --- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig @@ -31,7 +31,6 @@ CONFIG_BOOTDELAY=10 CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x806c0000 0x6c0000 0x40000; env exists mcinitcmd && env exists secureboot && esbc_validate 0x806C0000; sf read 0x80d00000 0xd00000 0x100000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x80d00000; run distro_bootcmd;run qspi_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y -CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig index d88fc59211c..651bd04e0e7 100644 --- a/configs/ls2088ardb_qspi_defconfig +++ b/configs/ls2088ardb_qspi_defconfig @@ -35,7 +35,6 @@ CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x806c0000 0x6c0000 0x40000; env exists mcinitcmd && env exists secureboot && esbc_validate 0x806C0000; sf read 0x80d00000 0xd00000 0x100000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x80d00000; run distro_bootcmd;run qspi_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y -CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GREPENV=y diff --git a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig index b33754882f3..2f0ece68eb9 100644 --- a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig @@ -33,7 +33,6 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y -CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y diff --git a/configs/ls2088ardb_tfa_defconfig b/configs/ls2088ardb_tfa_defconfig index 0d912219fa8..37d32752788 100644 --- a/configs/ls2088ardb_tfa_defconfig +++ b/configs/ls2088ardb_tfa_defconfig @@ -35,7 +35,6 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y -CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IMLS=y diff --git a/configs/mx23_olinuxino_defconfig b/configs/mx23_olinuxino_defconfig index d1d983d0f03..9ff772434b7 100644 --- a/configs/mx23_olinuxino_defconfig +++ b/configs/mx23_olinuxino_defconfig @@ -22,7 +22,6 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_ARCH_MISC_INIT=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NO_BSS_LIMIT=y -CONFIG_SPL_NO_CPU_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_GPIO=y diff --git a/configs/mx23evk_defconfig b/configs/mx23evk_defconfig index fbd999236c1..56122873c4f 100644 --- a/configs/mx23evk_defconfig +++ b/configs/mx23evk_defconfig @@ -23,7 +23,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_ARCH_MISC_INIT=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NO_BSS_LIMIT=y -CONFIG_SPL_NO_CPU_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y diff --git a/configs/mx28evk_auart_console_defconfig b/configs/mx28evk_auart_console_defconfig index 28a81e476c5..b9c85d61607 100644 --- a/configs/mx28evk_auart_console_defconfig +++ b/configs/mx28evk_auart_console_defconfig @@ -20,7 +20,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_ARCH_MISC_INIT=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NO_BSS_LIMIT=y -CONFIG_SPL_NO_CPU_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig index b4e7d0d29fe..bdfad9fec62 100644 --- a/configs/mx28evk_defconfig +++ b/configs/mx28evk_defconfig @@ -24,7 +24,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_ARCH_MISC_INIT=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NO_BSS_LIMIT=y -CONFIG_SPL_NO_CPU_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y diff --git a/configs/mx28evk_nand_defconfig b/configs/mx28evk_nand_defconfig index 749c6481c2f..6b3235ca6e0 100644 --- a/configs/mx28evk_nand_defconfig +++ b/configs/mx28evk_nand_defconfig @@ -21,7 +21,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_ARCH_MISC_INIT=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NO_BSS_LIMIT=y -CONFIG_SPL_NO_CPU_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y diff --git a/configs/mx28evk_spi_defconfig b/configs/mx28evk_spi_defconfig index 35fac909317..ab8c34c8b16 100644 --- a/configs/mx28evk_spi_defconfig +++ b/configs/mx28evk_spi_defconfig @@ -19,7 +19,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_ARCH_MISC_INIT=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NO_BSS_LIMIT=y -CONFIG_SPL_NO_CPU_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_BOOTZ=y diff --git a/configs/nanopi-r2s-rk3328_defconfig b/configs/nanopi-r2s-rk3328_defconfig index 99a99e1292b..41793ca7e48 100644 --- a/configs/nanopi-r2s-rk3328_defconfig +++ b/configs/nanopi-r2s-rk3328_defconfig @@ -34,7 +34,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x2000000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -CONFIG_TPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y @@ -42,6 +41,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_TPL_MAX_SIZE=0x40000 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y diff --git a/configs/odroid-go2_defconfig b/configs/odroid-go2_defconfig index dbd354f1f26..599ff0b89bc 100644 --- a/configs/odroid-go2_defconfig +++ b/configs/odroid-go2_defconfig @@ -44,11 +44,11 @@ CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y -# CONFIG_TPL_BANNER_PRINT is not set CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set +# CONFIG_TPL_BANNER_PRINT is not set CONFIG_TPL_MAX_SIZE=0x20000 # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set diff --git a/configs/pm9g45_defconfig b/configs/pm9g45_defconfig index fbad587d383..cd2d51aba8f 100644 --- a/configs/pm9g45_defconfig +++ b/configs/pm9g45_defconfig @@ -24,7 +24,6 @@ CONFIG_BOOTCOMMAND="nand read 0x70000000 0x200000 0x300000;bootm 0x70000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_RESET_PHY_R=y -CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_CBSIZE=256 diff --git a/configs/px30-core-ctouch2-of10-px30_defconfig b/configs/px30-core-ctouch2-of10-px30_defconfig index 784f3c076d0..7a526b8c07f 100644 --- a/configs/px30-core-ctouch2-of10-px30_defconfig +++ b/configs/px30-core-ctouch2-of10-px30_defconfig @@ -41,9 +41,9 @@ CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y -# CONFIG_TPL_BANNER_PRINT is not set CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set +# CONFIG_TPL_BANNER_PRINT is not set CONFIG_TPL_MAX_SIZE=0x20000 # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set diff --git a/configs/px30-core-ctouch2-px30_defconfig b/configs/px30-core-ctouch2-px30_defconfig index a98a1f6ec88..c836c7cb957 100644 --- a/configs/px30-core-ctouch2-px30_defconfig +++ b/configs/px30-core-ctouch2-px30_defconfig @@ -41,9 +41,9 @@ CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y -# CONFIG_TPL_BANNER_PRINT is not set CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set +# CONFIG_TPL_BANNER_PRINT is not set CONFIG_TPL_MAX_SIZE=0x20000 # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set diff --git a/configs/px30-core-edimm2.2-px30_defconfig b/configs/px30-core-edimm2.2-px30_defconfig index f10732230af..33529900b00 100644 --- a/configs/px30-core-edimm2.2-px30_defconfig +++ b/configs/px30-core-edimm2.2-px30_defconfig @@ -41,9 +41,9 @@ CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y -# CONFIG_TPL_BANNER_PRINT is not set CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set +# CONFIG_TPL_BANNER_PRINT is not set CONFIG_TPL_MAX_SIZE=0x20000 # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig index 866cdbc24df..ab25abc1a03 100644 --- a/configs/roc-cc-rk3328_defconfig +++ b/configs/roc-cc-rk3328_defconfig @@ -34,7 +34,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x2000000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -CONFIG_TPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y @@ -42,6 +41,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_TPL_MAX_SIZE=0x40000 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig index 4c70e62b88e..1d51a267b93 100644 --- a/configs/rock-pi-e-rk3328_defconfig +++ b/configs/rock-pi-e-rk3328_defconfig @@ -35,7 +35,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x2000000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -CONFIG_TPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y @@ -44,6 +43,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_TPL_MAX_SIZE=0x40000 CONFIG_TPL_DRIVERS_MISC=y CONFIG_CMD_BOOTZ=y diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig index 893f0384afb..640fe558d41 100644 --- a/configs/rock64-rk3328_defconfig +++ b/configs/rock64-rk3328_defconfig @@ -34,7 +34,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x2000000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -CONFIG_TPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y @@ -42,6 +41,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_TPL_MAX_SIZE=0x40000 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y diff --git a/configs/sama5d2_icp_qspiflash_defconfig b/configs/sama5d2_icp_qspiflash_defconfig index 373f5639731..6630d4ce9f4 100644 --- a/configs/sama5d2_icp_qspiflash_defconfig +++ b/configs/sama5d2_icp_qspiflash_defconfig @@ -28,7 +28,6 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x21000000 at91-sama5d2_icp.dtb; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y -CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d36ek_cmp_mmc_defconfig b/configs/sama5d36ek_cmp_mmc_defconfig index 898b2f38538..775212c9c22 100644 --- a/configs/sama5d36ek_cmp_mmc_defconfig +++ b/configs/sama5d36ek_cmp_mmc_defconfig @@ -26,7 +26,6 @@ CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_ # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig index be4482c9f9c..1b8038898eb 100644 --- a/configs/sama5d36ek_cmp_nandflash_defconfig +++ b/configs/sama5d36ek_cmp_nandflash_defconfig @@ -26,7 +26,6 @@ CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig index 6f1cd2055ad..c73bb14c354 100644 --- a/configs/sama5d36ek_cmp_spiflash_defconfig +++ b/configs/sama5d36ek_cmp_spiflash_defconfig @@ -28,7 +28,6 @@ CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x220 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/sandbox_vpl_defconfig b/configs/sandbox_vpl_defconfig index c91ee2af71f..0d946b4ad77 100644 --- a/configs/sandbox_vpl_defconfig +++ b/configs/sandbox_vpl_defconfig @@ -36,11 +36,11 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_HANDOFF=y CONFIG_SPL_BOARD_INIT=y -CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_RTC=y CONFIG_TPL=y +CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_TPL_DRIVERS_MISC=y CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C=y diff --git a/configs/sheep-rk3368_defconfig b/configs/sheep-rk3368_defconfig index 0411f26d1be..06dacef8a7d 100644 --- a/configs/sheep-rk3368_defconfig +++ b/configs/sheep-rk3368_defconfig @@ -17,8 +17,6 @@ CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-sheep.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_SPL_MAX_SIZE=0x40000 -CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_CMD_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_REGMAP=y diff --git a/configs/stm32746g-eval_defconfig b/configs/stm32746g-eval_defconfig index e799fc552e5..8ca8929f2a4 100644 --- a/configs/stm32746g-eval_defconfig +++ b/configs/stm32746g-eval_defconfig @@ -20,7 +20,6 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_LATE_INIT=y -CONFIG_SPL_PAD_TO=0x8000 CONFIG_SYS_PROMPT="U-Boot > " CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_GPT=y diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig index fe5f82c93c9..22274f99b18 100644 --- a/configs/stm32f746-disco_defconfig +++ b/configs/stm32f746-disco_defconfig @@ -20,7 +20,6 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_LATE_INIT=y -CONFIG_SPL_PAD_TO=0x8000 CONFIG_SYS_PROMPT="U-Boot > " CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_GPT=y diff --git a/configs/stm32f769-disco_defconfig b/configs/stm32f769-disco_defconfig index e627934d025..9845eb0a10b 100644 --- a/configs/stm32f769-disco_defconfig +++ b/configs/stm32f769-disco_defconfig @@ -19,7 +19,6 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" # CONFIG_DISPLAY_CPUINFO is not set -CONFIG_SPL_PAD_TO=0x8000 CONFIG_SYS_PROMPT="U-Boot > " CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_GPT=y diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig index c0cdc121f0a..db986cf13b8 100644 --- a/configs/uniphier_v8_defconfig +++ b/configs/uniphier_v8_defconfig @@ -15,8 +15,6 @@ CONFIG_BOOTCOMMAND="run ${bootdev}script; run ${bootdev}boot" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="env exist ${bootdev}preboot && run ${bootdev}preboot" CONFIG_LOGLEVEL=6 -CONFIG_SPL_MAX_SIZE=0x10000 -CONFIG_SPL_PAD_TO=0x20000 CONFIG_CMD_CONFIG=y # CONFIG_CMD_XIMG is not set CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 diff --git a/configs/xilinx_zynqmp_mini_defconfig b/configs/xilinx_zynqmp_mini_defconfig index 1f14b0d6e97..5963dd90f72 100644 --- a/configs/xilinx_zynqmp_mini_defconfig +++ b/configs/xilinx_zynqmp_mini_defconfig @@ -20,7 +20,6 @@ CONFIG_REMAKE_ELF=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y -CONFIG_SPL_MAX_SIZE=0x40000 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig index dd426d505e5..a2405f24ef7 100644 --- a/configs/xilinx_zynqmp_mini_nand_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_defconfig @@ -21,7 +21,6 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y -CONFIG_SPL_MAX_SIZE=0x40000 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set diff --git a/configs/xilinx_zynqmp_mini_nand_single_defconfig b/configs/xilinx_zynqmp_mini_nand_single_defconfig index 1fbd94a969b..e6ebc12ed7d 100644 --- a/configs/xilinx_zynqmp_mini_nand_single_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_single_defconfig @@ -21,7 +21,6 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y -CONFIG_SPL_MAX_SIZE=0x40000 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index cecdda67819..726973b26e2 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -87,7 +87,6 @@ CONFIG_FDTFILE CONFIG_FEC_ENET_DEV CONFIG_FEC_FIXED_SPEED CONFIG_FEC_MXC_PHYADDR -CONFIG_FIXED_SDHCI_ALIGNED_BUFFER CONFIG_FLASH_BR_PRELIM CONFIG_FLASH_CFI_LEGACY CONFIG_FLASH_OR_PRELIM @@ -282,7 +281,6 @@ CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP CONFIG_HSMMC2_8BIT -CONFIG_HUSH_INIT_VAR CONFIG_HWCONFIG CONFIG_HW_ENV_SETTINGS CONFIG_I2C_ENV_EEPROM_BUS @@ -307,7 +305,6 @@ CONFIG_IPADDR CONFIG_IRAM_BASE CONFIG_IRAM_END CONFIG_IRAM_SIZE -CONFIG_IRAM_STACK CONFIG_IRAM_TOP CONFIG_KEY_REVOCATION CONFIG_KIRKWOOD_EGIGA_INIT @@ -564,43 +561,6 @@ CONFIG_SPI_FLASH_QUAD CONFIG_SPI_FLASH_SIZE CONFIG_SPI_HALF_DUPLEX CONFIG_SPI_N25Q256A_RESET -CONFIG_SPL_BOARD_LOAD_IMAGE -CONFIG_SPL_BOOTROM_SAVE -CONFIG_SPL_BOOT_DEVICE -CONFIG_SPL_BSS_MAX_SIZE -CONFIG_SPL_BSS_START_ADDR -CONFIG_SPL_CMT -CONFIG_SPL_CMT_DEBUG -CONFIG_SPL_COMMON_INIT_DDR -CONFIG_SPL_FLUSH_IMAGE -CONFIG_SPL_FS_LOAD_ARGS_NAME -CONFIG_SPL_FS_LOAD_KERNEL_NAME -CONFIG_SPL_FS_LOAD_PAYLOAD_NAME -CONFIG_SPL_GD_ADDR -CONFIG_SPL_INIT_MINIMAL -CONFIG_SPL_MAX_FOOTPRINT -CONFIG_SPL_MAX_SIZE -CONFIG_SPL_NAND_INIT -CONFIG_SPL_NAND_MINIMAL -CONFIG_SPL_NAND_RAW_ONLY -CONFIG_SPL_NAND_SOFTECC -CONFIG_SPL_PAD_TO -CONFIG_SPL_PBL_PAD -CONFIG_SPL_RELOC_MALLOC_ADDR -CONFIG_SPL_RELOC_MALLOC_SIZE -CONFIG_SPL_RELOC_STACK -CONFIG_SPL_RELOC_TEXT_BASE -CONFIG_SPL_SATA_BOOT_DEVICE -CONFIG_SPL_SIZE -CONFIG_SPL_SKIP_RELOCATE -CONFIG_SPL_SPI_FLASH_MINIMAL -CONFIG_SPL_STACK -CONFIG_SPL_STACK_ADDR -CONFIG_SPL_STACK_SIZE -CONFIG_SPL_START_S_PATH -CONFIG_SPL_TARGET -CONFIG_SRAM_BASE -CONFIG_SRAM_SIZE CONFIG_SRIO1 CONFIG_SRIO2 CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET @@ -635,7 +595,6 @@ CONFIG_SYS_AT91_SLOW_CLOCK CONFIG_SYS_AUTOLOAD CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION CONFIG_SYS_AUXCORE_BOOTDATA -CONFIG_SYS_BARGSIZE CONFIG_SYS_BAUDRATE_TABLE CONFIG_SYS_BFTIC3_BASE CONFIG_SYS_BFTIC3_SIZE @@ -655,7 +614,6 @@ CONFIG_SYS_BOOTCOUNT_BE CONFIG_SYS_BOOTCOUNT_LE CONFIG_SYS_BOOTMAPSZ CONFIG_SYS_BOOTM_LEN -CONFIG_SYS_BOOTPARAMS_LEN CONFIG_SYS_BOOT_BLOCK CONFIG_SYS_BOOT_RAMDISK_HIGH CONFIG_SYS_CACHE_ACR0 @@ -664,13 +622,10 @@ CONFIG_SYS_CACHE_ACR2 CONFIG_SYS_CACHE_DCACR CONFIG_SYS_CACHE_ICACR CONFIG_SYS_CACHE_STASHING -CONFIG_SYS_CBSIZE CONFIG_SYS_CCSRBAR CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR_PHYS_HIGH CONFIG_SYS_CCSRBAR_PHYS_LOW -CONFIG_SYS_CCSR_DO_NOT_RELOCATE -CONFIG_SYS_CFI_FLASH_STATUS_POLL CONFIG_SYS_CLK CONFIG_SYS_CLKTL_CBCDR CONFIG_SYS_CORE_SRAM @@ -874,7 +829,6 @@ CONFIG_SYS_ETHOC_BUFFER_ADDR CONFIG_SYS_ETVPE_CLK CONFIG_SYS_EXCEPTION_VECTORS_HIGH CONFIG_SYS_FAST_CLK -CONFIG_SYS_FDT_BASE CONFIG_SYS_FDT_PAD CONFIG_SYS_FECI2C CONFIG_SYS_FEC_BUF_USE_SRAM @@ -891,7 +845,6 @@ CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE_PHYS_EARLY CONFIG_SYS_FLASH_BR_PRELIM CONFIG_SYS_FLASH_CFI_NONBLOCK -CONFIG_SYS_FLASH_CFI_WIDTH CONFIG_SYS_FLASH_CHECKSUM CONFIG_SYS_FLASH_EMPTY_INFO CONFIG_SYS_FLASH_ERASE_TOUT @@ -1108,8 +1061,6 @@ CONFIG_SYS_FSL_WDOG_BE CONFIG_SYS_FSL_WRIOP1_ADDR CONFIG_SYS_FSL_WRIOP1_MDIO1 CONFIG_SYS_FSL_WRIOP1_MDIO2 -CONFIG_SYS_GBL_DATA_OFFSET -CONFIG_SYS_GBL_DATA_SIZE CONFIG_SYS_GIC400_ADDR CONFIG_SYS_GP1DIR CONFIG_SYS_GP1ODR @@ -1169,7 +1120,6 @@ CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_CTRL CONFIG_SYS_INIT_RAM_LOCK CONFIG_SYS_INIT_RAM_SIZE -CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_INTERLAKEN CONFIG_SYS_INT_FLASH_BASE @@ -1215,14 +1165,12 @@ CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET CONFIG_SYS_M41T11_BASE_YEAR CONFIG_SYS_MAIN_PWR_ON -CONFIG_SYS_MALLOC_SIMPLE CONFIG_SYS_MAMR CONFIG_SYS_MAPLE CONFIG_SYS_MAPPED_RAM_BASE CONFIG_SYS_MASTER_CLOCK CONFIG_SYS_MATRIX_EBI0CSA_VAL CONFIG_SYS_MATRIX_EBICSA_VAL -CONFIG_SYS_MAXARGS CONFIG_SYS_MAX_FLASH_SECT CONFIG_SYS_MAX_I2C_BUS CONFIG_SYS_MAX_NAND_CHIPS @@ -1245,8 +1193,6 @@ CONFIG_SYS_MEM_SIZE CONFIG_SYS_MFD CONFIG_SYS_MHZ CONFIG_SYS_MIPS_TIMER_FREQ -CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR -CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS CONFIG_SYS_MMC_CD_PIN CONFIG_SYS_MMC_CLK_OD CONFIG_SYS_MMC_MAX_BLK_COUNT @@ -1366,7 +1312,6 @@ CONFIG_SYS_NAND_PAGE_4K CONFIG_SYS_NAND_READY_PIN CONFIG_SYS_NAND_REGS_BASE CONFIG_SYS_NAND_SIZE -CONFIG_SYS_NAND_SPL_KERNEL_OFFS CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_NAND_U_BOOT_RELOC_SP CONFIG_SYS_NAND_U_BOOT_SIZE @@ -1428,7 +1373,6 @@ CONFIG_SYS_PBDAT CONFIG_SYS_PBDDR CONFIG_SYS_PBI_FLASH_BASE CONFIG_SYS_PBI_FLASH_WINDOW -CONFIG_SYS_PBSIZE CONFIG_SYS_PCCNT CONFIG_SYS_PCDAT CONFIG_SYS_PCDDR @@ -1526,7 +1470,6 @@ CONFIG_SYS_PMC_BASE_PHYS CONFIG_SYS_PME_CLK CONFIG_SYS_POST_MEMORY CONFIG_SYS_POST_MEM_REGIONS -CONFIG_SYS_PTV CONFIG_SYS_PUAPAR CONFIG_SYS_QMAN_CENA_BASE CONFIG_SYS_QMAN_CENA_SIZE @@ -1645,9 +1588,6 @@ CONFIG_SYS_SPI_FLASH_U_BOOT_START CONFIG_SYS_SPI_KERNEL_OFFS CONFIG_SYS_SPI_ST_ENABLE_WP_PIN CONFIG_SYS_SPI_U_BOOT_SIZE -CONFIG_SYS_SPL_ARGS_ADDR -CONFIG_SYS_SPL_LEN -CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_SPL_MALLOC_START CONFIG_SYS_SPR CONFIG_SYS_SRIO @@ -1743,7 +1683,6 @@ CONFIG_THOR_RESET_OFF CONFIG_THUNDERX CONFIG_TIZEN CONFIG_TMU_TIMER -CONFIG_TPL_PAD_TO CONFIG_TPM_TIS_BASE_ADDRESS CONFIG_TPS6586X_POWER CONFIG_TRATS -- GitLab From 3800b318c5303633f056bc6ab387ef01906cee57 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Sat, 7 May 2022 21:23:05 +0800 Subject: [PATCH 060/581] boot: image-pre-load: drop unused CONFIG_SYS_BOOTM_LEN CONFIG_SYS_BOOTM_LEN is not used in this file, drop it. Signed-off-by: Peng Fan Reviewed-by: Tom Rini --- boot/image-pre-load.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/boot/image-pre-load.c b/boot/image-pre-load.c index 78d89069a98..5ab9ae18746 100644 --- a/boot/image-pre-load.c +++ b/boot/image-pre-load.c @@ -23,11 +23,6 @@ DECLARE_GLOBAL_DATA_PTR; #define IMAGE_PRE_LOAD_PROP_PUBLIC_KEY "public-key" #define IMAGE_PRE_LOAD_PROP_MANDATORY "mandatory" -#ifndef CONFIG_SYS_BOOTM_LEN -/* use 8MByte as default max gunzip size */ -#define CONFIG_SYS_BOOTM_LEN 0x800000 -#endif - /* * Information in the device-tree about the signature in the header */ -- GitLab From c5ef2025579e91f132cd3cead8ebe8b4cd5dd2b6 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sat, 7 May 2022 22:39:01 +0200 Subject: [PATCH 061/581] dm: fix DM_EVENT dependencies CONFIG_DM_EVENT without CONFIG_EVENT is non-functional. Let CONFIG_DM_EVENT depend on CONFIG_EVENT. Remove superfluous stub in include/event.h. Fixes: 5b896ed5856f ("event: Add events for device probe/remove") Reported-by: Jan Kiszka Signed-off-by: Heinrich Schuchardt --- drivers/core/Kconfig | 3 +-- include/event.h | 7 +------ 2 files changed, 2 insertions(+), 8 deletions(-) diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig index 27d6578772a..9b9a7148a1a 100644 --- a/drivers/core/Kconfig +++ b/drivers/core/Kconfig @@ -89,8 +89,7 @@ config DM_DEVICE_REMOVE config DM_EVENT bool "Support events with driver model" - depends on DM - imply EVENT + depends on DM && EVENT default y if SANDBOX help This enables support for generating events related to driver model diff --git a/include/event.h b/include/event.h index 62e72a7bd31..7765f072503 100644 --- a/include/event.h +++ b/include/event.h @@ -144,7 +144,6 @@ int event_register(const char *id, enum event_t type, event_handler_t func, /** event_show_spy_list( - Show a list of event spies */ void event_show_spy_list(void); -#if CONFIG_IS_ENABLED(EVENT) /** * event_notify() - notify spies about an event * @@ -159,6 +158,7 @@ void event_show_spy_list(void); */ int event_notify(enum event_t type, void *data, int size); +#if CONFIG_IS_ENABLED(EVENT) /** * event_notify_null() - notify spies about an event * @@ -169,11 +169,6 @@ int event_notify(enum event_t type, void *data, int size); */ int event_notify_null(enum event_t type); #else -static inline int event_notify(enum event_t type, void *data, int size) -{ - return 0; -} - static inline int event_notify_null(enum event_t type) { return 0; -- GitLab From 7f0836a1105de86ef1b4ffdd608ebfe21504cb44 Mon Sep 17 00:00:00 2001 From: Ovidiu Panait Date: Sun, 8 May 2022 13:01:42 +0300 Subject: [PATCH 062/581] cmd: dm: migrate dm command to use U_BOOT_CMD_WITH_SUBCMDS() Migrate dm command to use U_BOOT_CMD_WITH_SUBCMDS() helper macro, to reduce duplicated code. We can also drop the CONFIG_NEEDS_MANUAL_RELOC exception, as the command list is updated post relocation in board_r.c initcall initr_manual_reloc_cmdtable(). Signed-off-by: Ovidiu Panait --- cmd/dm.c | 64 +++++++++++--------------------------------------------- 1 file changed, 12 insertions(+), 52 deletions(-) diff --git a/cmd/dm.c b/cmd/dm.c index 1dd19fe45b5..ca609224f55 100644 --- a/cmd/dm.c +++ b/cmd/dm.c @@ -8,12 +8,6 @@ #include #include -#include -#include -#include -#include -#include -#include #include static int do_dm_dump_all(struct cmd_tbl *cmdtp, int flag, int argc, @@ -64,55 +58,21 @@ static int do_dm_dump_static_driver_info(struct cmd_tbl *cmdtp, int flag, int ar return 0; } -static struct cmd_tbl test_commands[] = { - U_BOOT_CMD_MKENT(tree, 0, 1, do_dm_dump_all, "", ""), - U_BOOT_CMD_MKENT(uclass, 1, 1, do_dm_dump_uclass, "", ""), - U_BOOT_CMD_MKENT(devres, 1, 1, do_dm_dump_devres, "", ""), - U_BOOT_CMD_MKENT(drivers, 1, 1, do_dm_dump_drivers, "", ""), - U_BOOT_CMD_MKENT(compat, 1, 1, do_dm_dump_driver_compat, "", ""), - U_BOOT_CMD_MKENT(static, 1, 1, do_dm_dump_static_driver_info, "", ""), -}; - -static __maybe_unused void dm_reloc(void) -{ - static int relocated; - - if (!relocated) { - fixup_cmdtable(test_commands, ARRAY_SIZE(test_commands)); - relocated = 1; - } -} - -static int do_dm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -{ - struct cmd_tbl *test_cmd; - int ret; - -#ifdef CONFIG_NEEDS_MANUAL_RELOC - dm_reloc(); -#endif - - if (argc < 2) - return CMD_RET_USAGE; - test_cmd = find_cmd_tbl(argv[1], test_commands, - ARRAY_SIZE(test_commands)); - argc -= 2; - argv += 2; - if (!test_cmd || argc > test_cmd->maxargs) - return CMD_RET_USAGE; - - ret = test_cmd->cmd(test_cmd, flag, argc, argv); - - return cmd_process_error(test_cmd, ret); -} - -U_BOOT_CMD( - dm, 3, 1, do_dm, - "Driver model low level access", +#if CONFIG_IS_ENABLED(SYS_LONGHELP) +static char dm_help_text[] = "tree Dump driver model tree ('*' = activated)\n" "dm uclass Dump list of instances for each uclass\n" "dm devres Dump list of device resources for each device\n" "dm drivers Dump list of drivers with uclass and instances\n" "dm compat Dump list of drivers with compatibility strings\n" "dm static Dump list of drivers with static platform data" -); + ; +#endif + +U_BOOT_CMD_WITH_SUBCMDS(dm, "Driver model low level access", dm_help_text, + U_BOOT_SUBCMD_MKENT(tree, 1, 1, do_dm_dump_all), + U_BOOT_SUBCMD_MKENT(uclass, 1, 1, do_dm_dump_uclass), + U_BOOT_SUBCMD_MKENT(devres, 1, 1, do_dm_dump_devres), + U_BOOT_SUBCMD_MKENT(drivers, 1, 1, do_dm_dump_drivers), + U_BOOT_SUBCMD_MKENT(compat, 1, 1, do_dm_dump_driver_compat), + U_BOOT_SUBCMD_MKENT(static, 1, 1, do_dm_dump_static_driver_info)); -- GitLab From 92c1df98b3f71a142e99e31846f697dd2a544782 Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Tue, 10 May 2022 09:58:28 +1200 Subject: [PATCH 063/581] doc: regulator: Add regulator-force-boot-off binding The actual support was added in commit fec8c900c8b2 ("power: regulator: Add support for regulator-force-boot-off"), update the docs to include this. Signed-off-by: Chris Packham --- doc/device-tree-bindings/regulator/regulator.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/doc/device-tree-bindings/regulator/regulator.txt b/doc/device-tree-bindings/regulator/regulator.txt index 6c9a02120fd..ddb02b7a3c4 100644 --- a/doc/device-tree-bindings/regulator/regulator.txt +++ b/doc/device-tree-bindings/regulator/regulator.txt @@ -36,6 +36,7 @@ Optional properties: - regulator-always-on: regulator should never be disabled - regulator-boot-on: enabled by bootloader/firmware - regulator-ramp-delay: ramp delay for regulator (in uV/us) +- regulator-force-boot-off: disabled during the boot stage - regulator-init-microvolt: a init allowed Voltage value - regulator-state-(standby|mem|disk) type: object -- GitLab From 8a1ab5e81126c6ccedaa76376e7206f5c8583aa3 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 10 May 2022 12:51:47 -0400 Subject: [PATCH 064/581] misc: Correct Kconfig dependencies for a number of options We have many cases of SPL (or TPL or VPL) drivers that don't depend on SPL_MISC (and so on) but rather just MISC. Cc: Sean Anderson Signed-off-by: Tom Rini Reviewed-by: Sean Anderson --- drivers/misc/Kconfig | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 85ae7f62e91..419ddd31c0b 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -125,7 +125,7 @@ config CROS_EC config SPL_CROS_EC bool "Enable Chrome OS EC in SPL" - depends on SPL + depends on SPL_MISC help Enable access to the Chrome OS EC in SPL. This is a separate microcontroller typically available on a SPI bus on Chromebooks. It @@ -135,7 +135,7 @@ config SPL_CROS_EC config TPL_CROS_EC bool "Enable Chrome OS EC in TPL" - depends on TPL + depends on TPL_MISC help Enable access to the Chrome OS EC in TPL. This is a separate microcontroller typically available on a SPI bus on Chromebooks. It @@ -145,7 +145,7 @@ config TPL_CROS_EC config VPL_CROS_EC bool "Enable Chrome OS EC in VPL" - depends on VPL + depends on VPL_MISC help Enable access to the Chrome OS EC in VPL. This is a separate microcontroller typically available on a SPI bus on Chromebooks. It @@ -173,7 +173,7 @@ config CROS_EC_LPC config SPL_CROS_EC_LPC bool "Enable Chrome OS EC LPC driver in SPL" - depends on CROS_EC + depends on CROS_EC && SPL_MISC help Enable I2C access to the Chrome OS EC. This is used on x86 Chromebooks such as link and falco. The keyboard is provided @@ -182,7 +182,7 @@ config SPL_CROS_EC_LPC config TPL_CROS_EC_LPC bool "Enable Chrome OS EC LPC driver in TPL" - depends on CROS_EC + depends on CROS_EC && TPL_MISC help Enable I2C access to the Chrome OS EC. This is used on x86 Chromebooks such as link and falco. The keyboard is provided @@ -191,7 +191,7 @@ config TPL_CROS_EC_LPC config VPL_CROS_EC_LPC bool "Enable Chrome OS EC LPC driver in VPL" - depends on CROS_EC + depends on CROS_EC && VPL_MISC help Enable I2C access to the Chrome OS EC. This is used on x86 Chromebooks such as link and falco. The keyboard is provided @@ -284,7 +284,7 @@ config MXC_OCOTP config SPL_MXC_OCOTP bool "Enable MXC OCOTP driver in SPL" - depends on SPL && (ARCH_IMX8M || ARCH_MX6 || ARCH_MX7 || ARCH_MX7ULP || ARCH_VF610) + depends on SPL_MISC && (ARCH_IMX8M || ARCH_MX6 || ARCH_MX7 || ARCH_MX7ULP || ARCH_VF610) default y help If you say Y here, you will get support for the One Time @@ -314,7 +314,7 @@ config P2SB config SPL_P2SB bool "Intel Primary to Sideband Bridge in SPL" - depends on SPL && (X86 || SANDBOX) + depends on SPL_MISC && (X86 || SANDBOX) help The Primary to Sideband Bridge is used to access various peripherals through memory-mapped I/O in a large chunk of PCI space. The space is @@ -324,7 +324,7 @@ config SPL_P2SB config TPL_P2SB bool "Intel Primary to Sideband Bridge in TPL" - depends on TPL && (X86 || SANDBOX) + depends on TPL_MISC && (X86 || SANDBOX) help The Primary to Sideband Bridge is used to access various peripherals through memory-mapped I/O in a large chunk of PCI space. The space is @@ -343,7 +343,7 @@ config PWRSEQ config SPL_PWRSEQ bool "Enable power-sequencing drivers for SPL" - depends on PWRSEQ + depends on SPL_MISC && PWRSEQ help Power-sequencing drivers provide support for controlling power for devices. They are typically referenced by a phandle from another @@ -451,7 +451,7 @@ config I2C_EEPROM config SPL_I2C_EEPROM bool "Enable driver for generic I2C-attached EEPROMs for SPL" - depends on MISC && SPL && SPL_DM + depends on SPL_MISC help This option is an SPL-variant of the I2C_EEPROM option. See the help of I2C_EEPROM for details. @@ -504,6 +504,7 @@ config FS_LOADER config SPL_FS_LOADER bool "Enable loader driver for file system" + depends on SPL help This is file system generic loader which can be used to load the file image from the storage into target such as memory. -- GitLab From 2e2e784de0605081af7c5c9d04a014af69888c2c Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 10 May 2022 14:36:59 -0400 Subject: [PATCH 065/581] zlib: Port fix for CVE-2018-25032 to U-Boot While our copy of zlib is missing upstream commit 263b1a05b04e ("Allow deflatePrime() to insert bits in the middle of a stream.") we do have Z_FIXED support, and so the majority of the code changes in 5c44459c3b28 ("Fix a bug that can crash deflate on some input when using Z_FIXED.") apply here directly and cleanly. As this has been assigned a CVE, lets go and apply these changes. Link: https://github.com/madler/zlib/commit/5c44459c3b28a9bd3283aaceab7c615f8020c531 Reported-by: "Gan, Yau Wai" Signed-off-by: Tom Rini --- lib/zlib/deflate.c | 64 +++++++++++++++++++++++++++++++++++----------- lib/zlib/deflate.h | 25 ++++++++---------- lib/zlib/trees.c | 50 ++++++++++-------------------------- 3 files changed, 74 insertions(+), 65 deletions(-) diff --git a/lib/zlib/deflate.c b/lib/zlib/deflate.c index 63473359e45..4549f4dc12a 100644 --- a/lib/zlib/deflate.c +++ b/lib/zlib/deflate.c @@ -223,11 +223,6 @@ int ZEXPORT deflateInit2_(strm, level, method, windowBits, memLevel, strategy, int wrap = 1; static const char my_version[] = ZLIB_VERSION; - ushf *overlay; - /* We overlay pending_buf and d_buf+l_buf. This works since the average - * output size for (length,distance) codes is <= 24 bits. - */ - if (version == Z_NULL || version[0] != my_version[0] || stream_size != sizeof(z_stream)) { return Z_VERSION_ERROR; @@ -287,9 +282,47 @@ int ZEXPORT deflateInit2_(strm, level, method, windowBits, memLevel, strategy, s->lit_bufsize = 1 << (memLevel + 6); /* 16K elements by default */ - overlay = (ushf *) ZALLOC(strm, s->lit_bufsize, sizeof(ush)+2); - s->pending_buf = (uchf *) overlay; - s->pending_buf_size = (ulg)s->lit_bufsize * (sizeof(ush)+2L); + /* We overlay pending_buf and sym_buf. This works since the average size + * for length/distance pairs over any compressed block is assured to be 31 + * bits or less. + * + * Analysis: The longest fixed codes are a length code of 8 bits plus 5 + * extra bits, for lengths 131 to 257. The longest fixed distance codes are + * 5 bits plus 13 extra bits, for distances 16385 to 32768. The longest + * possible fixed-codes length/distance pair is then 31 bits total. + * + * sym_buf starts one-fourth of the way into pending_buf. So there are + * three bytes in sym_buf for every four bytes in pending_buf. Each symbol + * in sym_buf is three bytes -- two for the distance and one for the + * literal/length. As each symbol is consumed, the pointer to the next + * sym_buf value to read moves forward three bytes. From that symbol, up to + * 31 bits are written to pending_buf. The closest the written pending_buf + * bits gets to the next sym_buf symbol to read is just before the last + * code is written. At that time, 31*(n-2) bits have been written, just + * after 24*(n-2) bits have been consumed from sym_buf. sym_buf starts at + * 8*n bits into pending_buf. (Note that the symbol buffer fills when n-1 + * symbols are written.) The closest the writing gets to what is unread is + * then n+14 bits. Here n is lit_bufsize, which is 16384 by default, and + * can range from 128 to 32768. + * + * Therefore, at a minimum, there are 142 bits of space between what is + * written and what is read in the overlain buffers, so the symbols cannot + * be overwritten by the compressed data. That space is actually 139 bits, + * due to the three-bit fixed-code block header. + * + * That covers the case where either Z_FIXED is specified, forcing fixed + * codes, or when the use of fixed codes is chosen, because that choice + * results in a smaller compressed block than dynamic codes. That latter + * condition then assures that the above analysis also covers all dynamic + * blocks. A dynamic-code block will only be chosen to be emitted if it has + * fewer bits than a fixed-code block would for the same set of symbols. + * Therefore its average symbol length is assured to be less than 31. So + * the compressed data for a dynamic block also cannot overwrite the + * symbols from which it is being constructed. + */ + + s->pending_buf = (uchf *) ZALLOC(strm, s->lit_bufsize, 4); + s->pending_buf_size = (ulg)s->lit_bufsize * 4; if (s->window == Z_NULL || s->prev == Z_NULL || s->head == Z_NULL || s->pending_buf == Z_NULL) { @@ -298,8 +331,12 @@ int ZEXPORT deflateInit2_(strm, level, method, windowBits, memLevel, strategy, deflateEnd (strm); return Z_MEM_ERROR; } - s->d_buf = overlay + s->lit_bufsize/sizeof(ush); - s->l_buf = s->pending_buf + (1+sizeof(ush))*s->lit_bufsize; + s->sym_buf = s->pending_buf + s->lit_bufsize; + s->sym_end = (s->lit_bufsize - 1) * 3; + /* We avoid equality with lit_bufsize*3 because of wraparound at 64K + * on 16 bit machines and because stored blocks are restricted to + * 64K-1 bytes. + */ s->level = level; s->strategy = strategy; @@ -935,7 +972,6 @@ int ZEXPORT deflateCopy (dest, source) #else deflate_state *ds; deflate_state *ss; - ushf *overlay; if (source == Z_NULL || dest == Z_NULL || source->state == Z_NULL) { @@ -955,8 +991,7 @@ int ZEXPORT deflateCopy (dest, source) ds->window = (Bytef *) ZALLOC(dest, ds->w_size, 2*sizeof(Byte)); ds->prev = (Posf *) ZALLOC(dest, ds->w_size, sizeof(Pos)); ds->head = (Posf *) ZALLOC(dest, ds->hash_size, sizeof(Pos)); - overlay = (ushf *) ZALLOC(dest, ds->lit_bufsize, sizeof(ush)+2); - ds->pending_buf = (uchf *) overlay; + ds->pending_buf = (uchf *) ZALLOC(dest, ds->lit_bufsize, 4); if (ds->window == Z_NULL || ds->prev == Z_NULL || ds->head == Z_NULL || ds->pending_buf == Z_NULL) { @@ -970,8 +1005,7 @@ int ZEXPORT deflateCopy (dest, source) zmemcpy(ds->pending_buf, ss->pending_buf, (uInt)ds->pending_buf_size); ds->pending_out = ds->pending_buf + (ss->pending_out - ss->pending_buf); - ds->d_buf = overlay + ds->lit_bufsize/sizeof(ush); - ds->l_buf = ds->pending_buf + (1+sizeof(ush))*ds->lit_bufsize; + ds->sym_buf = ds->pending_buf + ds->lit_bufsize; ds->l_desc.dyn_tree = ds->dyn_ltree; ds->d_desc.dyn_tree = ds->dyn_dtree; diff --git a/lib/zlib/deflate.h b/lib/zlib/deflate.h index cbf0d1ea5d9..4c53b94af0b 100644 --- a/lib/zlib/deflate.h +++ b/lib/zlib/deflate.h @@ -211,7 +211,7 @@ typedef struct internal_state { /* Depth of each subtree used as tie breaker for trees of equal frequency */ - uchf *l_buf; /* buffer for literals or lengths */ + uchf *sym_buf; /* buffer for distances and literals/lengths */ uInt lit_bufsize; /* Size of match buffer for literals/lengths. There are 4 reasons for @@ -233,13 +233,8 @@ typedef struct internal_state { * - I can't count above 4 */ - uInt last_lit; /* running index in l_buf */ - - ushf *d_buf; - /* Buffer for distances. To simplify the code, d_buf and l_buf have - * the same number of elements. To use different lengths, an extra flag - * array would be necessary. - */ + uInt sym_next; /* running index in sym_buf */ + uInt sym_end; /* symbol table full when sym_next reaches this */ ulg opt_len; /* bit length of current block with optimal trees */ ulg static_len; /* bit length of current block with static trees */ @@ -318,20 +313,22 @@ void ZLIB_INTERNAL _tr_stored_block OF((deflate_state *s, charf *buf, # define _tr_tally_lit(s, c, flush) \ { uch cc = (c); \ - s->d_buf[s->last_lit] = 0; \ - s->l_buf[s->last_lit++] = cc; \ + s->sym_buf[s->sym_next++] = 0; \ + s->sym_buf[s->sym_next++] = 0; \ + s->sym_buf[s->sym_next++] = cc; \ s->dyn_ltree[cc].Freq++; \ - flush = (s->last_lit == s->lit_bufsize-1); \ + flush = (s->sym_next == s->sym_end); \ } # define _tr_tally_dist(s, distance, length, flush) \ { uch len = (length); \ ush dist = (distance); \ - s->d_buf[s->last_lit] = dist; \ - s->l_buf[s->last_lit++] = len; \ + s->sym_buf[s->sym_next++] = dist; \ + s->sym_buf[s->sym_next++] = dist >> 8; \ + s->sym_buf[s->sym_next++] = len; \ dist--; \ s->dyn_ltree[_length_code[len]+LITERALS+1].Freq++; \ s->dyn_dtree[d_code(dist)].Freq++; \ - flush = (s->last_lit == s->lit_bufsize-1); \ + flush = (s->sym_next == s->sym_end); \ } #else # define _tr_tally_lit(s, c, flush) flush = _tr_tally(s, 0, c) diff --git a/lib/zlib/trees.c b/lib/zlib/trees.c index 700c62f6d7b..970bc5dbc64 100644 --- a/lib/zlib/trees.c +++ b/lib/zlib/trees.c @@ -425,7 +425,7 @@ local void init_block(s) s->dyn_ltree[END_BLOCK].Freq = 1; s->opt_len = s->static_len = 0L; - s->last_lit = s->matches = 0; + s->sym_next = s->matches = 0; } #define SMALLEST 1 @@ -962,7 +962,7 @@ void ZLIB_INTERNAL _tr_flush_block(s, buf, stored_len, last) Tracev((stderr, "\nopt %lu(%lu) stat %lu(%lu) stored %lu lit %u ", opt_lenb, s->opt_len, static_lenb, s->static_len, stored_len, - s->last_lit)); + s->sym_next / 3)); if (static_lenb <= opt_lenb) opt_lenb = static_lenb; @@ -1029,8 +1029,9 @@ int ZLIB_INTERNAL _tr_tally (s, dist, lc) unsigned dist; /* distance of matched string */ unsigned lc; /* match length-MIN_MATCH or unmatched char (if dist==0) */ { - s->d_buf[s->last_lit] = (ush)dist; - s->l_buf[s->last_lit++] = (uch)lc; + s->sym_buf[s->sym_next++] = dist; + s->sym_buf[s->sym_next++] = dist >> 8; + s->sym_buf[s->sym_next++] = lc; if (dist == 0) { /* lc is the unmatched char */ s->dyn_ltree[lc].Freq++; @@ -1045,30 +1046,7 @@ int ZLIB_INTERNAL _tr_tally (s, dist, lc) s->dyn_ltree[_length_code[lc]+LITERALS+1].Freq++; s->dyn_dtree[d_code(dist)].Freq++; } - -#ifdef TRUNCATE_BLOCK - /* Try to guess if it is profitable to stop the current block here */ - if ((s->last_lit & 0x1fff) == 0 && s->level > 2) { - /* Compute an upper bound for the compressed length */ - ulg out_length = (ulg)s->last_lit*8L; - ulg in_length = (ulg)((long)s->strstart - s->block_start); - int dcode; - for (dcode = 0; dcode < D_CODES; dcode++) { - out_length += (ulg)s->dyn_dtree[dcode].Freq * - (5L+extra_dbits[dcode]); - } - out_length >>= 3; - Tracev((stderr,"\nlast_lit %u, in %ld, out ~%ld(%ld%%) ", - s->last_lit, in_length, out_length, - 100L - out_length*100L/in_length)); - if (s->matches < s->last_lit/2 && out_length < in_length/2) return 1; - } -#endif - return (s->last_lit == s->lit_bufsize-1); - /* We avoid equality with lit_bufsize because of wraparound at 64K - * on 16 bit machines and because stored blocks are restricted to - * 64K-1 bytes. - */ + return (s->sym_next == s->sym_end); } /* =========================================================================== @@ -1081,13 +1059,14 @@ local void compress_block(s, ltree, dtree) { unsigned dist; /* distance of matched string */ int lc; /* match length or unmatched char (if dist == 0) */ - unsigned lx = 0; /* running index in l_buf */ + unsigned sx = 0; /* running index in sym_buf */ unsigned code; /* the code to send */ int extra; /* number of extra bits to send */ - if (s->last_lit != 0) do { - dist = s->d_buf[lx]; - lc = s->l_buf[lx++]; + if (s->sym_next != 0) do { + dist = s->sym_buf[sx++] & 0xff; + dist += (unsigned)(s->sym_buf[sx++] & 0xff) << 8; + lc = s->sym_buf[sx++]; if (dist == 0) { send_code(s, lc, ltree); /* send a literal byte */ Tracecv(isgraph(lc), (stderr," '%c' ", lc)); @@ -1112,11 +1091,10 @@ local void compress_block(s, ltree, dtree) } } /* literal or match pair ? */ - /* Check that the overlay between pending_buf and d_buf+l_buf is ok: */ - Assert((uInt)(s->pending) < s->lit_bufsize + 2*lx, - "pendingBuf overflow"); + /* Check that the overlay between pending_buf and sym_buf is ok: */ + Assert(s->pending < s->lit_bufsize + sx, "pendingBuf overflow"); - } while (lx < s->last_lit); + } while (sx < s->sym_next); send_code(s, END_BLOCK, ltree); s->last_eob_len = ltree[END_BLOCK].Len; -- GitLab From 89ab1e28173b7b23504ecd39e618fc73bbfd0371 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Tue, 10 May 2022 21:43:38 +0200 Subject: [PATCH 066/581] btrfs: simplify lookup_data_extent() After returning if ret <= 0 we know that ret > 0. No need to check it. Signed-off-by: Heinrich Schuchardt Reviewed-by: Qu Wenruo Reviewed-by: Anand Jain --- fs/btrfs/inode.c | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/fs/btrfs/inode.c b/fs/btrfs/inode.c index d00b5153336..0173d30cd8a 100644 --- a/fs/btrfs/inode.c +++ b/fs/btrfs/inode.c @@ -546,15 +546,12 @@ static int lookup_data_extent(struct btrfs_root *root, struct btrfs_path *path, /* Error or we're already at the file extent */ if (ret <= 0) return ret; - if (ret > 0) { - /* Check previous file extent */ - ret = btrfs_previous_item(root, path, ino, - BTRFS_EXTENT_DATA_KEY); - if (ret < 0) - return ret; - if (ret > 0) - goto check_next; - } + /* Check previous file extent */ + ret = btrfs_previous_item(root, path, ino, BTRFS_EXTENT_DATA_KEY); + if (ret < 0) + return ret; + if (ret > 0) + goto check_next; /* Now the key.offset must be smaller than @file_offset */ btrfs_item_key_to_cpu(path->nodes[0], &key, path->slots[0]); if (key.objectid != ino || -- GitLab From 84378d5c86d1b8e7afd2132e2c8d79d8e7e1f7d9 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Tue, 10 May 2022 21:53:25 +0200 Subject: [PATCH 067/581] fs/squashfs: fix sqfs_read_sblk() Setting sblk = NULL has no effect on the caller. We want to set *sblk = NULL if an error occurrs to avoid usage after free. Signed-off-by: Heinrich Schuchardt --- fs/squashfs/sqfs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c index 547d2fd4b30..90bf32ca0ae 100644 --- a/fs/squashfs/sqfs.c +++ b/fs/squashfs/sqfs.c @@ -49,7 +49,7 @@ static int sqfs_read_sblk(struct squashfs_super_block **sblk) if (sqfs_disk_read(0, 1, *sblk) != 1) { free(*sblk); - sblk = NULL; + *sblk = NULL; return -EINVAL; } -- GitLab From b6c2b25f648102019f81ba22738879889ecc02c1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pierre-Cl=C3=A9ment=20Tosi?= Date: Wed, 11 May 2022 10:36:07 +0100 Subject: [PATCH 068/581] scripts: Introduce {quiet_,}cmd_bin2c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a make command to compile binary files as C data through bin2c with $(call,bin2c,) Note that this requires BUILD_BIN2C=y. Cc: Simon Glass Signed-off-by: Pierre-Clément Tosi --- scripts/Makefile.lib | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index 3db2550085a..c0a5bb9addc 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -567,6 +567,11 @@ cmd_xzmisc = (cat $(filter-out FORCE,$^) | \ # Additional commands for U-Boot # +# bin2c +# --------------------------------------------------------------------------- +quiet_cmd_bin2c = BIN2C $@ + cmd_bin2c = $(objtree)/scripts/bin2c $2 < $< > $@ + # mkimage # --------------------------------------------------------------------------- MKIMAGEOUTPUT ?= /dev/null -- GitLab From b4d3b338df14d3d793bcbd0c55ec3d4398596c44 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Fri, 13 May 2022 22:24:51 +0200 Subject: [PATCH 069/581] mtd: mtdpart: Change size type from fdt_addr_t to fdt_size_t MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Set correct type for 3rd argument of ofnode_get_addr_size_index_notrans() function. It expects fdt_size_t * and not fdt_addr_t *. When these two types do not have same size then U-Boot throw compile warning: drivers/mtd/mtdpart.c: In function ‘add_mtd_partitions_of’: drivers/mtd/mtdpart.c:906:57: warning: passing argument 3 of ‘ofnode_get_addr_size_index_notrans’ from incompatible pointer type [-Wincompatible-pointer-types] offset = ofnode_get_addr_size_index_notrans(child, 0, &size); ^~~~~ In file included from include/dm/device.h:13, from include/linux/mtd/mtd.h:26, from include/ubi_uboot.h:28, from drivers/mtd/mtdpart.c:27: include/dm/ofnode.h:530:25: note: expected ‘fdt_size_t *’ {aka ‘long long unsigned int *’} but argument is of type ‘fdt_addr_t *’ {aka ‘long unsigned int *’} fdt_size_t *size); ~~~~~~~~~~~~^~~~ Signed-off-by: Pali Rohár Reviewed-by: Marek Behún --- drivers/mtd/mtdpart.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c index d077897e4a7..56aa58b58bb 100644 --- a/drivers/mtd/mtdpart.c +++ b/drivers/mtd/mtdpart.c @@ -902,7 +902,8 @@ int add_mtd_partitions_of(struct mtd_info *master) ofnode_for_each_subnode(child, parts) { struct mtd_partition part = { 0 }; struct mtd_info *slave; - fdt_addr_t offset, size; + fdt_addr_t offset; + fdt_size_t size; if (!ofnode_is_available(child)) continue; -- GitLab From 12c90955a7e82687acaed3cb53d096bc669e82ca Mon Sep 17 00:00:00 2001 From: Ovidiu Panait Date: Sun, 15 May 2022 21:40:28 +0300 Subject: [PATCH 070/581] event: remove CONFIG_EVENT_DYNAMIC check in event_register() The whole event_register() function is wrapped in EVENT_DYNAMIC #ifdef checks, so the inner check is not needed: #if CONFIG_IS_ENABLED(EVENT_DYNAMIC) ... int event_register(...) { ... if (!CONFIG_IS_ENABLED(EVENT_DYNAMIC)) return -ENOSYS; } #endif Signed-off-by: Ovidiu Panait --- common/event.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/common/event.c b/common/event.c index 9d67a060a02..063647447d5 100644 --- a/common/event.c +++ b/common/event.c @@ -159,8 +159,6 @@ int event_register(const char *id, enum event_t type, event_handler_t func, void struct event_state *state = gd_event_state(); struct event_spy *spy; - if (!CONFIG_IS_ENABLED(EVENT_DYNAMIC)) - return -ENOSYS; spy = malloc(sizeof(*spy)); if (!spy) return log_msg_ret("alloc", -ENOMEM); -- GitLab From cebc8161708e357758c407eaa79a8cd66ee68fde Mon Sep 17 00:00:00 2001 From: Ovidiu Panait Date: Sun, 15 May 2022 21:40:29 +0300 Subject: [PATCH 071/581] event: fix static events for CONFIG_NEEDS_MANUAL_RELOC Static events do not currently work post-relocation for boards that enable CONFIG_NEEDS_MANUAL_RELOC. Relocate event handler pointers for all event spies to fix this. Tested on Microblaze. Signed-off-by: Ovidiu Panait --- common/board_r.c | 3 +++ common/event.c | 15 +++++++++++++++ include/event.h | 10 ++++++++++ 3 files changed, 28 insertions(+) diff --git a/common/board_r.c b/common/board_r.c index 22b5deaa8c2..4e3cf1f4ecc 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -612,6 +612,9 @@ static init_fnc_t init_sequence_r[] = { */ #endif initr_reloc_global_data, +#if CONFIG_IS_ENABLED(NEEDS_MANUAL_RELOC) && CONFIG_IS_ENABLED(EVENT) + event_manual_reloc, +#endif #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500) initr_unlock_ram_in_cache, #endif diff --git a/common/event.c b/common/event.c index 063647447d5..af1ed4121d8 100644 --- a/common/event.c +++ b/common/event.c @@ -17,6 +17,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -148,6 +149,20 @@ void event_show_spy_list(void) } } +#if CONFIG_IS_ENABLED(NEEDS_MANUAL_RELOC) +int event_manual_reloc(void) +{ + struct evspy_info *spy, *end; + + spy = ll_entry_start(struct evspy_info, evspy_info); + end = ll_entry_end(struct evspy_info, evspy_info); + for (; spy < end; spy++) + MANUAL_RELOC(spy->func); + + return 0; +} +#endif + #if CONFIG_IS_ENABLED(EVENT_DYNAMIC) static void spy_free(struct event_spy *spy) { diff --git a/include/event.h b/include/event.h index 7765f072503..c00c4fb68dc 100644 --- a/include/event.h +++ b/include/event.h @@ -144,6 +144,16 @@ int event_register(const char *id, enum event_t type, event_handler_t func, /** event_show_spy_list( - Show a list of event spies */ void event_show_spy_list(void); +/** + * event_manual_reloc() - Relocate event handler pointers + * + * Relocate event handler pointers for all static event spies. It is called + * during the generic board init sequence, after relocation. + * + * Return: 0 if OK + */ +int event_manual_reloc(void); + /** * event_notify() - notify spies about an event * -- GitLab From 5920e5c838d1b6647878e51c0b9b8c9e4eaf1928 Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Mon, 16 May 2022 16:11:07 -0400 Subject: [PATCH 072/581] mkimage: Document more misc options Document -G and the secondary image types which can be used with -R. Also reword the documentation of -s for clarity. Signed-off-by: Sean Anderson --- doc/mkimage.1 | 33 +++++++++++++++++++++++++++++++-- 1 file changed, 31 insertions(+), 2 deletions(-) diff --git a/doc/mkimage.1 b/doc/mkimage.1 index c92e1337326..878db904757 100644 --- a/doc/mkimage.1 +++ b/doc/mkimage.1 @@ -99,6 +99,30 @@ Set image name to 'image name'. .BI "\-R [" "secondary image name" "]" Some image types support a second image for additional data. For these types, use \-R to specify this second image. +.TS +allbox; +lb lbx +l l. +Image Type Secondary Image Description +pblimage Additional RCW-style header, typically used for PBI commands. +zynqimage, zynqmpimage T{ +Initialization parameters, one per line. Each parameter has the form +.sp +.ti 4 +.I address data +.sp +where +.I address +and +.I data +are hexadecimal integers. The boot ROM will write each +.I data +to +.I address +when loading the image. At most 256 parameters may be specified in this +manner. +T} +.TE .TP .BI "\-d [" "image data file" "]" @@ -110,8 +134,8 @@ Set XIP (execute in place) flag. .TP .BI "\-s" -Create an image with no data. The header will be created, but the image itself -will not contain data (such as U-Boot or any specified kernel). +Don't copy in the image data. Depending on the image type, this may create +just the header, everything but the image data, or nothing at all. .TP .BI "\-v" @@ -176,6 +200,11 @@ Specifies the directory containing keys to use for signing. This directory should contain a private key file .key for use with signing and a certificate .crt (containing the public key) for use with verification. +.TP +.BI "\-G [" "key_file" "]" +Specifies the private key file to use when signing. This option may be used +instead of \-k. + .TP .BI "\-K [" "key_destination" "]" Specifies a compiled device tree binary file (typically .dtb) to write -- GitLab From 87b0af9317cb4105f3f29cb0a4c28c7cd87ea65f Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Mon, 16 May 2022 16:11:08 -0400 Subject: [PATCH 073/581] mkimage: Support signing 'auto' FITs This adds support for signing images in auto-generated FITs. To do this, we need to add a signature node. The algorithm name property already has its own option, but we need one for the key name hint. We could have gone the -G route and added an explicit name for the public key (like what is done for the private key). However, many places assume the public key can be constructed from the key dir and hint, and I don't want to do the refactoring necessary. As a consequence of this, it is now easier to add public keys to an existing image without signing something. This could be done all along, but now you don't have to create an its just to do it. Ideally, we wouldn't create a FIT at the end. This could be done by calling fit_image_setup_sig/info.crypto->add_verify_data directly. Signed-off-by: Sean Anderson --- doc/mkimage.1 | 24 ++++++++++++++++++++++++ tools/fit_image.c | 41 ++++++++++++++++++++++++++++++++++------- tools/imagetool.h | 1 + tools/mkimage.c | 5 ++++- 4 files changed, 63 insertions(+), 8 deletions(-) diff --git a/doc/mkimage.1 b/doc/mkimage.1 index 878db904757..759dc2d12f5 100644 --- a/doc/mkimage.1 +++ b/doc/mkimage.1 @@ -218,6 +218,13 @@ CONFIG_OF_CONTROL in U-Boot. Specifies the private key file to use when signing. This option may be used instead of \-k. +.TP +.BI "\-g [" "key_name_hint" "]" +Sets the key-name-hint property when used with \-f auto. This is the +part of the key. The directory part is set by \-k. This option also indicates +that the images included in the FIT should be signed. If this option is +specified, \-o must be specified as well. + .TP .BI "\-o [" "signing algorithm" "]" Specifies the algorithm to be used for signing a FIT image. The default is @@ -278,6 +285,15 @@ skipping those for which keys cannot be found. Also add a comment. .B -c """Kernel 3.8 image for production devices""" kernel.itb .fi +.P +Add public keys to u-boot.dtb without needing a FIT to sign. This will also +create a FIT containing an images node with no data named unused.itb. +.nf +.B mkimage -f auto -d /dev/null -k /public/signing-keys -g dev \\\\ +.br +.B -o sha256,rsa2048 -K u-boot.dtb unused.itb +.fi + .P Update an existing FIT image, signing it with additional keys. Add corresponding public keys into u-boot.dtb. This will resign all images @@ -306,6 +322,14 @@ automatic mode. No .its file is required. .B -c """Kernel 4.4 image for production devices""" -d vmlinuz \\\\ .B -b /path/to/rk3288-firefly.dtb -b /path/to/rk3288-jerry.dtb kernel.itb .fi +.P +Create a FIT image containing a signed kernel, using automatic mode. No .its +file is required. +.nf +.B mkimage -f auto -A arm -O linux -T kernel -C none -a 43e00000 -e 0 \\\\ +.br +.B -d vmlinuz -k /secret/signing-keys -g dev -o sha256,rsa2048 kernel.itb +.fi .SH HOMEPAGE http://www.denx.de/wiki/U-Boot/WebHome diff --git a/tools/fit_image.c b/tools/fit_image.c index 1884a2eb0b9..979f2411ee0 100644 --- a/tools/fit_image.c +++ b/tools/fit_image.c @@ -199,15 +199,36 @@ static void get_basename(char *str, int size, const char *fname) } /** - * add_crc_node() - Add a hash node to request a CRC checksum for an image + * add_hash_node() - Add a hash or signature node * + * @params: Image parameters * @fdt: Device tree to add to (in sequential-write mode) + * + * If there is a key name hint, try to sign the images. Otherwise, just add a + * CRC. + * + * Return: 0 on success, or -1 on failure */ -static void add_crc_node(void *fdt) +static int add_hash_node(struct image_tool_params *params, void *fdt) { - fdt_begin_node(fdt, "hash-1"); - fdt_property_string(fdt, FIT_ALGO_PROP, "crc32"); + if (params->keyname) { + if (!params->algo_name) { + fprintf(stderr, + "%s: Algorithm name must be specified\n", + params->cmdname); + return -1; + } + + fdt_begin_node(fdt, "signature-1"); + fdt_property_string(fdt, FIT_ALGO_PROP, params->algo_name); + fdt_property_string(fdt, FIT_KEY_HINT, params->keyname); + } else { + fdt_begin_node(fdt, "hash-1"); + fdt_property_string(fdt, FIT_ALGO_PROP, "crc32"); + } + fdt_end_node(fdt); + return 0; } /** @@ -248,7 +269,9 @@ static int fit_write_images(struct image_tool_params *params, char *fdt) ret = fdt_property_file(params, fdt, FIT_DATA_PROP, params->datafile); if (ret) return ret; - add_crc_node(fdt); + ret = add_hash_node(params, fdt); + if (ret) + return ret; fdt_end_node(fdt); /* Now the device tree files if available */ @@ -271,7 +294,9 @@ static int fit_write_images(struct image_tool_params *params, char *fdt) genimg_get_arch_short_name(params->arch)); fdt_property_string(fdt, FIT_COMP_PROP, genimg_get_comp_short_name(IH_COMP_NONE)); - add_crc_node(fdt); + ret = add_hash_node(params, fdt); + if (ret) + return ret; fdt_end_node(fdt); } @@ -289,7 +314,9 @@ static int fit_write_images(struct image_tool_params *params, char *fdt) params->fit_ramdisk); if (ret) return ret; - add_crc_node(fdt); + ret = add_hash_node(params, fdt); + if (ret) + return ret; fdt_end_node(fdt); } diff --git a/tools/imagetool.h b/tools/imagetool.h index 05dd94d1084..ca7c2e48ba9 100644 --- a/tools/imagetool.h +++ b/tools/imagetool.h @@ -71,6 +71,7 @@ struct image_tool_params { const char *keydir; /* Directory holding private keys */ const char *keydest; /* Destination .dtb for public key */ const char *keyfile; /* Filename of private or public key */ + const char *keyname; /* Key name "hint" */ const char *comment; /* Comment to add to signature node */ /* Algorithm name to use for hashing/signing or NULL to use the one * specified in the its */ diff --git a/tools/mkimage.c b/tools/mkimage.c index 5c6a60e8513..0e1198b4113 100644 --- a/tools/mkimage.c +++ b/tools/mkimage.c @@ -119,6 +119,7 @@ static void usage(const char *msg) "Signing / verified boot options: [-k keydir] [-K dtb] [ -c ] [-p addr] [-r] [-N engine]\n" " -k => set directory containing private keys\n" " -K => write public keys to this .dtb file\n" + " -g => set key name hint\n" " -G => use this signing key (in lieu of -k)\n" " -c => add comment in signature node\n" " -F => re-sign existing FIT image\n" @@ -163,7 +164,7 @@ static void process_args(int argc, char **argv) int opt; while ((opt = getopt(argc, argv, - "a:A:b:B:c:C:d:D:e:Ef:FG:k:i:K:ln:N:p:o:O:rR:qstT:vVx")) != -1) { + "a:A:b:B:c:C:d:D:e:Ef:Fg:G:k:i:K:ln:N:p:o:O:rR:qstT:vVx")) != -1) { switch (opt) { case 'a': params.addr = strtoull(optarg, &ptr, 16); @@ -239,6 +240,8 @@ static void process_args(int argc, char **argv) params.type = IH_TYPE_FLATDT; params.fflag = 1; break; + case 'g': + params.keyname = optarg; case 'G': params.keyfile = optarg; break; -- GitLab From bc8e09811e248287d1964ec6bba60c56235a23f2 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 17 May 2022 14:37:05 +0200 Subject: [PATCH 074/581] dm: core: convert of_machine_is_compatible to livetree Replace in the function of_machine_is_compatible(), the used API fdt_node_check_compatible() by ofnode_device_is_compatible() to support a live tree. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- drivers/core/device.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/core/device.c b/drivers/core/device.c index 3ab2583df38..3199d6a1b73 100644 --- a/drivers/core/device.c +++ b/drivers/core/device.c @@ -1125,9 +1125,7 @@ bool device_is_compatible(const struct udevice *dev, const char *compat) bool of_machine_is_compatible(const char *compat) { - const void *fdt = gd->fdt_blob; - - return !fdt_node_check_compatible(fdt, 0, compat); + return ofnode_device_is_compatible(ofnode_root(), compat); } int dev_disable_by_path(const char *path) -- GitLab From fb84517d52aa24b5b8bad6abc228459a146b6ba5 Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Tue, 17 May 2022 13:55:07 -0400 Subject: [PATCH 075/581] serial: smh: Fake tstc ARM semihosting provides no provisions for determining if there is pending input. The only way to determine if there is console input is to do a read (and block until the user types something). For this reason, we always return true for tstc (since you will always get input if you try). However, this behavior can cause problems for code which expects tstc to eventually be empty. In query_console_serial, there is the following construct: /* empty input buffer */ while (tstc()) getchar(); with the current implementation, this effectively turns into an infinite loop. To avoid this, fake tstc by returning false half of the time. This is generally OK because the other common construct looks like do { if (tstc()) process(getchar()); } while (!timeout()); so it's fine if we only read a new character every other loop. This will break things like CYGACC_COMM_IF_GETC_TIMEOUT, but that could be reworked to test on the timeout instead of calling tstc again (and ymodem over semihosted serial is not that useful in the first place). Signed-off-by: Sean Anderson --- drivers/serial/serial_semihosting.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/serial/serial_semihosting.c b/drivers/serial/serial_semihosting.c index 2561414e40f..cfa1ec3148c 100644 --- a/drivers/serial/serial_semihosting.c +++ b/drivers/serial/serial_semihosting.c @@ -13,10 +13,12 @@ * struct smh_serial_priv - Semihosting serial private data * @infd: stdin file descriptor (or error) * @outfd: stdout file descriptor (or error) + * @counter: Counter used to fake pending every other call */ struct smh_serial_priv { int infd; int outfd; + unsigned counter; }; #if CONFIG_IS_ENABLED(DM_SERIAL) @@ -68,10 +70,20 @@ static ssize_t smh_serial_puts(struct udevice *dev, const char *s, size_t len) return ret; } +static int smh_serial_pending(struct udevice *dev, bool input) +{ + struct smh_serial_priv *priv = dev_get_priv(dev); + + if (input) + return priv->counter++ & 1; + return false; +} + static const struct dm_serial_ops smh_serial_ops = { .putc = smh_serial_putc, .puts = smh_serial_puts, .getc = smh_serial_getc, + .pending = smh_serial_pending, }; static int smh_serial_bind(struct udevice *dev) @@ -106,6 +118,7 @@ U_BOOT_DRVINFO(smh_serial) = { #else /* DM_SERIAL */ static int infd = -ENODEV; static int outfd = -ENODEV; +static unsigned counter = 1; static int smh_serial_start(void) { @@ -138,7 +151,7 @@ static int smh_serial_getc(void) static int smh_serial_tstc(void) { - return 1; + return counter++ & 1; } static void smh_serial_puts(const char *s) -- GitLab From 05947cb1d8d651b6b4e5f5dcbcef8e58d5ec4b44 Mon Sep 17 00:00:00 2001 From: Judy Wang Date: Tue, 3 May 2022 14:04:40 +0800 Subject: [PATCH 076/581] drivers:optee:rpmb: initialize drivers of mmc devices in UCLASS_BLK for rpmb access CONFIG_MMC only initializes drivers for devices in UCLASS_MMC, we need to initialize drivers for devices of type IF_TYPE_MMC in UCLASS_BLK as well because they are the child devices of devices in UCLASS_MMC. This is required for feature RPMB since it will access eMMC in optee-os. Signed-off-by: Judy Wang [trini: Add my SoB line and adjust Judy's name in git, having emailed off-list] Signed-off-by: Tom Rini --- drivers/tee/optee/rpmb.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/tee/optee/rpmb.c b/drivers/tee/optee/rpmb.c index 0804fc963cf..cf5e0a08e61 100644 --- a/drivers/tee/optee/rpmb.c +++ b/drivers/tee/optee/rpmb.c @@ -72,6 +72,10 @@ static struct mmc *get_mmc(struct optee_private *priv, int dev_id) debug("Cannot find RPMB device\n"); return NULL; } + if (mmc_init(mmc)) { + log(LOGC_BOARD, LOGL_ERR, "%s:MMC device %d init failed\n", __func__, dev_id); + return NULL; + } if (!(mmc->version & MMC_VERSION_MMC)) { debug("Device id %d is not an eMMC device\n", dev_id); return NULL; @@ -104,6 +108,11 @@ static u32 rpmb_get_dev_info(u16 dev_id, struct rpmb_dev_info *info) if (!mmc) return TEE_ERROR_ITEM_NOT_FOUND; + if (mmc_init(mmc)) { + log(LOGC_BOARD, LOGL_ERR, "%s:MMC device %d init failed\n", __func__, dev_id); + return TEE_ERROR_NOT_SUPPORTED; + } + if (!mmc->ext_csd) return TEE_ERROR_GENERIC; -- GitLab From 26f981f295d00351b6f0c69b5317b254b2361cc0 Mon Sep 17 00:00:00 2001 From: Rasmus Villemoes Date: Thu, 19 May 2022 11:10:43 +0200 Subject: [PATCH 077/581] fdtdec: drop needlessly convoluted CONFIG_PHANDLE_CHECK_SEQ Asking if the alias we found actually points at the device tree node we passed in (in the guise of its offset from blob) can be done simply by asking if the fdt_path_offset() of the alias' path is identical to offset. In fact, the current method suffers from the possibility of false negatives: dtc does not necessarily emit a phandle property for a node just because it is referenced in /aliases; it only emits a phandle property for a node if it is referenced in somewhere. So if both the node we passed in and the alias node we're considering don't have phandles, fdt_get_phandle() returns 0 for both. Since the proper check is so simple, there's no reason to hide that behind a config option (and if one really wanted that, it should be called something else because there's no need to involve phandle in the check). Signed-off-by: Rasmus Villemoes Acked-by: Aswath Govindraju --- configs/am65x_evm_a53_defconfig | 1 - configs/evb-ast2600_defconfig | 1 - configs/sama7g5ek_mmc1_defconfig | 1 - configs/sama7g5ek_mmc_defconfig | 1 - lib/Kconfig | 7 ------- lib/fdtdec.c | 7 ++----- 6 files changed, 2 insertions(+), 16 deletions(-) diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig index 9c088e1d02e..65e41e5b6af 100644 --- a/configs/am65x_evm_a53_defconfig +++ b/configs/am65x_evm_a53_defconfig @@ -180,4 +180,3 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0451 CONFIG_USB_GADGET_PRODUCT_NUM=0x6162 CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_OF_LIBFDT_OVERLAY=y -CONFIG_PHANDLE_CHECK_SEQ=y diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index 38d78d51924..bfd0a5f2b10 100644 --- a/configs/evb-ast2600_defconfig +++ b/configs/evb-ast2600_defconfig @@ -86,4 +86,3 @@ CONFIG_WDT=y CONFIG_SHA384=y CONFIG_HEXDUMP=y # CONFIG_EFI_LOADER is not set -CONFIG_PHANDLE_CHECK_SEQ=y diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig index 367cc48bba6..36343354945 100644 --- a/configs/sama7g5ek_mmc1_defconfig +++ b/configs/sama7g5ek_mmc1_defconfig @@ -80,4 +80,3 @@ CONFIG_TIMER=y CONFIG_MCHP_PIT64B_TIMER=y CONFIG_OF_LIBFDT_OVERLAY=y # CONFIG_EFI_LOADER_HII is not set -CONFIG_PHANDLE_CHECK_SEQ=y diff --git a/configs/sama7g5ek_mmc_defconfig b/configs/sama7g5ek_mmc_defconfig index 1de21b74a46..e12bf285845 100644 --- a/configs/sama7g5ek_mmc_defconfig +++ b/configs/sama7g5ek_mmc_defconfig @@ -80,4 +80,3 @@ CONFIG_TIMER=y CONFIG_MCHP_PIT64B_TIMER=y CONFIG_OF_LIBFDT_OVERLAY=y # CONFIG_EFI_LOADER_HII is not set -CONFIG_PHANDLE_CHECK_SEQ=y diff --git a/lib/Kconfig b/lib/Kconfig index acc0ac081a4..884569f9b15 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -958,11 +958,4 @@ config LMB_RESERVED_REGIONS Define the number of supported reserved regions in the library logical memory blocks. -config PHANDLE_CHECK_SEQ - bool "Enable phandle check while getting sequence number" - help - When there are multiple device tree nodes with same name, - enable this config option to distinguish them using - phandles in fdtdec_get_alias_seq() function. - endmenu diff --git a/lib/fdtdec.c b/lib/fdtdec.c index e20f6aad9c2..ffa78f97ca0 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -516,11 +516,8 @@ int fdtdec_get_alias_seq(const void *blob, const char *base, int offset, * Adding an extra check to distinguish DT nodes with * same name */ - if (IS_ENABLED(CONFIG_PHANDLE_CHECK_SEQ)) { - if (fdt_get_phandle(blob, offset) != - fdt_get_phandle(blob, fdt_path_offset(blob, prop))) - continue; - } + if (offset != fdt_path_offset(blob, prop)) + continue; val = trailing_strtol(name); if (val != -1) { -- GitLab From f2ebaaa9f38dddddefaf2e616a9fc489fe8b4021 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pierre-Cl=C3=A9ment=20Tosi?= Date: Thu, 19 May 2022 17:48:30 +0100 Subject: [PATCH 078/581] pci: Handle failed calloc in decode_regions() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a check for calloc() failing to allocate the requested memory. Make decode_regions() return an error code. Cc: Bin Meng Cc: Simon Glass Cc: Stefan Roese Signed-off-by: Pierre-Clément Tosi Reviewed-by: Stefan Roese --- drivers/pci/pci-uclass.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index 970ee1adf1b..2c85e78a136 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -954,7 +954,7 @@ int pci_bind_bus_devices(struct udevice *bus) return 0; } -static void decode_regions(struct pci_controller *hose, ofnode parent_node, +static int decode_regions(struct pci_controller *hose, ofnode parent_node, ofnode node) { int pci_addr_cells, addr_cells, size_cells; @@ -968,7 +968,7 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node, prop = ofnode_get_property(node, "ranges", &len); if (!prop) { debug("%s: Cannot decode regions\n", __func__); - return; + return -EINVAL; } pci_addr_cells = ofnode_read_simple_addr_cells(node); @@ -986,6 +986,8 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node, max_regions = len / cells_per_record + CONFIG_NR_DRAM_BANKS; hose->regions = (struct pci_region *) calloc(1, max_regions * sizeof(struct pci_region)); + if (!hose->regions) + return -ENOMEM; for (i = 0; i < max_regions; i++, len -= cells_per_record) { u64 pci_addr, addr, size; @@ -1053,7 +1055,7 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node, /* Add a region for our local memory */ bd = gd->bd; if (!bd) - return; + return 0; for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) { if (bd->bi_dram[i].size) { @@ -1068,7 +1070,7 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node, } } - return; + return 0; } static int pci_uclass_pre_probe(struct udevice *bus) @@ -1097,7 +1099,10 @@ static int pci_uclass_pre_probe(struct udevice *bus) /* For bridges, use the top-level PCI controller */ if (!device_is_on_pci_bus(bus)) { hose->ctlr = bus; - decode_regions(hose, dev_ofnode(bus->parent), dev_ofnode(bus)); + ret = decode_regions(hose, dev_ofnode(bus->parent), + dev_ofnode(bus)); + if (ret) + return ret; } else { struct pci_controller *parent_hose; -- GitLab From ba9aa40bb387385b8ef8b6594661a97ddcb8d04c Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Thu, 19 May 2022 18:26:05 -0400 Subject: [PATCH 079/581] bootm: Fix Linux silent console on newer kernels Linux determines its console based on several sources: 1. the console command line parameter 2. device tree (e.g. /chosen/stdout-path) 3. various other board- and arch-specific sources If the console parameter specifies a real console (e.g. ttyS0) then that is used as /dev/console. However, if it does not specify a real console (e.g. ttyDoesntExist) then *nothing* will be used as /dev/console. Reading/writing it will return ENODEV. Additionally, no other source will be used as a console source. Linux commit ab4af56ae250 ("printk/console: Allow to disable console output by using console="" or console=null") recently changed the semantics of the parameter. Previously, specifying console="" would be treated like specifying some other bad console. This commit changed things so that it added /dev/ttynull as a console (if available). However, it also allows for other console sources. If the device tree specifies a console (such as if U-Boot and Linux share a device tree), then it will be used in addition to /dev/ttynull. This can result in a non-silent console. To avoid this, explicitly set ttynull as the console. This will disable other console sources. If CONFIG_NULL_TTY is disabled, then this will have the same behavior as in the past (no output, and writing /dev/console returns ENODEV). [1] and [2] have additional background on this kernel change. [1] https://lore.kernel.org/all/20201006025935.GA597@jagdpanzerIV.localdomain/ [2] https://lore.kernel.org/all/20201111135450.11214-1-pmladek@suse.com/ Signed-off-by: Sean Anderson --- boot/bootm.c | 16 +++++++++------- test/bootm.c | 20 ++++++++++---------- 2 files changed, 19 insertions(+), 17 deletions(-) diff --git a/boot/bootm.c b/boot/bootm.c index 714406ab668..dfa65f125e5 100644 --- a/boot/bootm.c +++ b/boot/bootm.c @@ -498,7 +498,8 @@ ulong bootm_disable_interrupts(void) } #define CONSOLE_ARG "console=" -#define CONSOLE_ARG_SIZE sizeof(CONSOLE_ARG) +#define NULL_CONSOLE (CONSOLE_ARG "ttynull") +#define CONSOLE_ARG_SIZE sizeof(NULL_CONSOLE) /** * fixup_silent_linux() - Handle silencing the linux boot if required @@ -550,21 +551,22 @@ static int fixup_silent_linux(char *buf, int maxlen) char *end = strchr(start, ' '); int start_bytes; - start_bytes = start - cmdline + CONSOLE_ARG_SIZE - 1; + start_bytes = start - cmdline; strncpy(buf, cmdline, start_bytes); + strncpy(buf + start_bytes, NULL_CONSOLE, CONSOLE_ARG_SIZE); if (end) - strcpy(buf + start_bytes, end); + strcpy(buf + start_bytes + CONSOLE_ARG_SIZE - 1, end); else - buf[start_bytes] = '\0'; + buf[start_bytes + CONSOLE_ARG_SIZE] = '\0'; } else { - sprintf(buf, "%s %s", cmdline, CONSOLE_ARG); + sprintf(buf, "%s %s", cmdline, NULL_CONSOLE); } if (buf + strlen(buf) >= cmdline) return -ENOSPC; } else { - if (maxlen < sizeof(CONSOLE_ARG)) + if (maxlen < CONSOLE_ARG_SIZE) return -ENOSPC; - strcpy(buf, CONSOLE_ARG); + strcpy(buf, NULL_CONSOLE); } debug("after silent fix-up: %s\n", buf); diff --git a/test/bootm.c b/test/bootm.c index 8528982ae11..7d03e1e0c68 100644 --- a/test/bootm.c +++ b/test/bootm.c @@ -83,12 +83,12 @@ static int bootm_test_silent(struct unit_test_state *uts) ut_assertok(env_set("silent_linux", "yes")); ut_assertok(bootm_process_cmdline(buf, BUF_SIZE, BOOTM_CL_SILENT)); - ut_asserteq_str("console=", buf); + ut_asserteq_str("console=ttynull", buf); /* Empty buffer should still add the string */ *buf = '\0'; ut_assertok(bootm_process_cmdline(buf, BUF_SIZE, BOOTM_CL_SILENT)); - ut_asserteq_str("console=", buf); + ut_asserteq_str("console=ttynull", buf); /* Check nothing happens when do_silent is false */ *buf = '\0'; @@ -97,21 +97,21 @@ static int bootm_test_silent(struct unit_test_state *uts) /* Not enough space */ *buf = '\0'; - ut_asserteq(-ENOSPC, bootm_process_cmdline(buf, 8, BOOTM_CL_SILENT)); + ut_asserteq(-ENOSPC, bootm_process_cmdline(buf, 15, BOOTM_CL_SILENT)); /* Just enough space */ *buf = '\0'; - ut_assertok(bootm_process_cmdline(buf, 9, BOOTM_CL_SILENT)); + ut_assertok(bootm_process_cmdline(buf, 16, BOOTM_CL_SILENT)); /* add at end */ strcpy(buf, "something"); ut_assertok(bootm_process_cmdline(buf, BUF_SIZE, BOOTM_CL_SILENT)); - ut_asserteq_str("something console=", buf); + ut_asserteq_str("something console=ttynull", buf); /* change at start */ strcpy(buf, CONSOLE_STR " something"); ut_assertok(bootm_process_cmdline(buf, BUF_SIZE, BOOTM_CL_SILENT)); - ut_asserteq_str("console= something", buf); + ut_asserteq_str("console=ttynull something", buf); return 0; } @@ -210,12 +210,12 @@ static int bootm_test_subst_var(struct unit_test_state *uts) { env_set("bootargs", NULL); ut_assertok(bootm_process_cmdline_env(BOOTM_CL_SILENT)); - ut_asserteq_str("console=", env_get("bootargs")); + ut_asserteq_str("console=ttynull", env_get("bootargs")); ut_assertok(env_set("var", "abc")); ut_assertok(env_set("bootargs", "some${var}thing")); ut_assertok(bootm_process_cmdline_env(BOOTM_CL_SILENT)); - ut_asserteq_str("some${var}thing console=", env_get("bootargs")); + ut_asserteq_str("some${var}thing console=ttynull", env_get("bootargs")); return 0; } @@ -227,12 +227,12 @@ static int bootm_test_subst_both(struct unit_test_state *uts) ut_assertok(env_set("silent_linux", "yes")); env_set("bootargs", NULL); ut_assertok(bootm_process_cmdline_env(BOOTM_CL_ALL)); - ut_asserteq_str("console=", env_get("bootargs")); + ut_asserteq_str("console=ttynull", env_get("bootargs")); ut_assertok(env_set("bootargs", "some${var}thing " CONSOLE_STR)); ut_assertok(env_set("var", "1234567890")); ut_assertok(bootm_process_cmdline_env(BOOTM_CL_ALL)); - ut_asserteq_str("some1234567890thing console=", env_get("bootargs")); + ut_asserteq_str("some1234567890thing console=ttynull", env_get("bootargs")); return 0; } -- GitLab From e5e04eaa2f1cb4dc37a12551018a00a18cab19de Mon Sep 17 00:00:00 2001 From: Rasmus Villemoes Date: Fri, 20 May 2022 13:19:08 +0200 Subject: [PATCH 080/581] common/board_r.c: drop legacy and unused bi_enetaddr The bi_enetaddr field in struct bd_info is write-only; nothing ever reads back the value. Moreover, the value we write is more or less random, and certainly not something one can rely on: If the board has a writable environment and the mac address has been stored there, we fetch that value. But if the board doesn't, this code runs before initr_net() -> eth_initialize(), and thus before the code in eth-uclass which fetches MAC addresses from eeprom, fuses or whatnot and populates the (run-time) environment with those values. Signed-off-by: Rasmus Villemoes Reviewed-by: Tom Rini --- common/board_r.c | 15 --------------- include/asm-generic/u-boot.h | 1 - 2 files changed, 16 deletions(-) diff --git a/common/board_r.c b/common/board_r.c index 4e3cf1f4ecc..ed29069d2de 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -469,18 +469,6 @@ static int initr_malloc_bootparams(void) } #endif -#ifdef CONFIG_CMD_NET -static int initr_ethaddr(void) -{ - struct bd_info *bd = gd->bd; - - /* kept around for legacy kernels only ... ignore the next section */ - eth_env_get_enetaddr("ethaddr", bd->bi_enetaddr); - - return 0; -} -#endif /* CONFIG_CMD_NET */ - #if defined(CONFIG_LED_STATUS) static int initr_status_led(void) { @@ -759,9 +747,6 @@ static init_fnc_t init_sequence_r[] = { initr_status_led, #endif /* PPC has a udelay(20) here dating from 2002. Why? */ -#ifdef CONFIG_CMD_NET - initr_ethaddr, -#endif #if defined(CONFIG_GPIO_HOG) gpio_hog_probe_all, #endif diff --git a/include/asm-generic/u-boot.h b/include/asm-generic/u-boot.h index 1becc669aee..70303acd558 100644 --- a/include/asm-generic/u-boot.h +++ b/include/asm-generic/u-boot.h @@ -48,7 +48,6 @@ struct bd_info { #endif unsigned long bi_bootflags; /* boot / reboot flag (Unused) */ unsigned long bi_ip_addr; /* IP Address */ - unsigned char bi_enetaddr[6]; /* OLD: see README.enetaddr */ unsigned short bi_ethspeed; /* Ethernet speed in Mbps */ unsigned long bi_intfreq; /* Internal Freq, in MHz */ unsigned long bi_busfreq; /* Bus Freq, in MHz */ -- GitLab From 98303ce73d7a14b8019824e7c7912a223e4a6207 Mon Sep 17 00:00:00 2001 From: Michael Trimarchi Date: Sun, 22 May 2022 15:22:08 +0200 Subject: [PATCH 081/581] include/configs: Remove rootwait=1 to all the affected boards rootwait=1 is not a valid kernel boot parameters. According to the documenation is only rootwait rootwait [KNL] Wait (indefinitely) for root device to show up. Useful for devices that are detected asynchronously (e.g. USB and MMC devices). Fix: Unknown kernel command line parameters "rootwait=1", will be passed to user space. Signed-off-by: Michael Trimarchi Reviewed-by: Heiko Schocher --- include/configs/am335x_evm.h | 2 +- include/configs/am43xx_evm.h | 2 +- include/configs/baltos.h | 2 +- include/configs/chiliboard.h | 2 +- include/configs/etamin.h | 2 +- include/configs/imx8mn_bsh_smm_s2.h | 2 +- include/configs/siemens-am33x-common.h | 4 ++-- include/configs/ti_armv7_keystone2.h | 2 +- include/environment/ti/nand.h | 2 +- 9 files changed, 10 insertions(+), 10 deletions(-) diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 3e98e5c6653..13d11084cd4 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -34,7 +34,7 @@ "root=${nandroot} " \ "rootfstype=${nandrootfstype}\0" \ "nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,2048\0" \ - "nandrootfstype=ubifs rootwait=1\0" \ + "nandrootfstype=ubifs rootwait\0" \ "nandboot=echo Booting from nand ...; " \ "run nandargs; " \ "nand read ${fdtaddr} NAND.u-boot-spl-os; " \ diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 665ace5b01b..e0138fe1db8 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -159,7 +159,7 @@ "root=${nandroot} " \ "rootfstype=${nandrootfstype}\0" \ "nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,4096\0" \ - "nandrootfstype=ubifs rootwait=1\0" \ + "nandrootfstype=ubifs rootwait\0" \ "nandboot=echo Booting from nand ...; " \ "run nandargs; " \ "nand read ${fdtaddr} NAND.u-boot-spl-os; " \ diff --git a/include/configs/baltos.h b/include/configs/baltos.h index b881d8c03fd..7b43741fde7 100644 --- a/include/configs/baltos.h +++ b/include/configs/baltos.h @@ -37,7 +37,7 @@ "root=${nandroot} " \ "rootfstype=${nandrootfstype}\0" \ "nandroot=ubi0:rootfs rw ubi.mtd=5\0" \ - "nandrootfstype=ubifs rootwait=1\0" \ + "nandrootfstype=ubifs rootwait\0" \ "nandboot=echo Booting from nand ...; " \ "run nandargs; " \ "setenv loadaddr 0x84000000; " \ diff --git a/include/configs/chiliboard.h b/include/configs/chiliboard.h index 82acda595f0..8bad0f9ac4b 100644 --- a/include/configs/chiliboard.h +++ b/include/configs/chiliboard.h @@ -20,7 +20,7 @@ "root=${nandroot} " \ "rootfstype=${nandrootfstype}\0" \ "nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system\0" \ - "nandrootfstype=ubifs rootwait=1\0" \ + "nandrootfstype=ubifs rootwait\0" \ "nandboot=echo Booting from nand ...; " \ "run nandargs; " \ "nand read ${fdt_addr} NAND.u-boot-spl-os; " \ diff --git a/include/configs/etamin.h b/include/configs/etamin.h index 383beee17ae..654faedf33e 100644 --- a/include/configs/etamin.h +++ b/include/configs/etamin.h @@ -107,7 +107,7 @@ "nand_active_ubi_vol=rootfs_a\0" \ "rootfs_name=rootfs\0" \ "kernel_name=uImage\0"\ - "nand_root_fs_type=ubifs rootwait=1\0" \ + "nand_root_fs_type=ubifs rootwait\0" \ "nand_args=run bootargs_defaults;" \ "mtdparts default;" \ "setenv ${partitionset_active} true;" \ diff --git a/include/configs/imx8mn_bsh_smm_s2.h b/include/configs/imx8mn_bsh_smm_s2.h index 098f23b206d..f7529783692 100644 --- a/include/configs/imx8mn_bsh_smm_s2.h +++ b/include/configs/imx8mn_bsh_smm_s2.h @@ -21,7 +21,7 @@ "root=${nandroot} " \ "rootfstype=${nandrootfstype}\0" \ "nandroot=ubi0:root rw ubi.mtd=nandrootfs\0" \ - "nandrootfstype=ubifs rootwait=1\0" \ + "nandrootfstype=ubifs rootwait\0" \ "nandboot=echo Booting from nand ...; " \ "run nandargs; " \ "nand read ${fdt_addr_r} nanddtb; " \ diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 5dc09fa91cc..941e02c5c68 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -218,7 +218,7 @@ "nand_active_ubi_vol=rootfs_a\0" \ "nand_active_ubi_vol_A=rootfs_a\0" \ "nand_active_ubi_vol_B=rootfs_b\0" \ - "nand_root_fs_type=ubifs rootwait=1\0" \ + "nand_root_fs_type=ubifs rootwait\0" \ "nand_src_addr=0x280000\0" \ "nand_src_addr_A=0x280000\0" \ "nand_src_addr_B=0x780000\0" \ @@ -295,7 +295,7 @@ "nand_active_ubi_vol=rootfs_a\0" \ "rootfs_name=rootfs\0" \ "kernel_name=uImage\0"\ - "nand_root_fs_type=ubifs rootwait=1\0" \ + "nand_root_fs_type=ubifs rootwait\0" \ "nand_args=run bootargs_defaults;" \ "mtdparts default;" \ "setenv ${partitionset_active} true;" \ diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 7fd79953dc1..6952cc63719 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -165,7 +165,7 @@ "sf write ${loadaddr} 0 ${filesize}\0" \ "burn_uboot_nand=nand erase 0 0x100000; " \ "nand write ${loadaddr} 0 ${filesize}\0" \ - "args_all=setenv bootargs console=ttyS0,115200n8 rootwait=1 " \ + "args_all=setenv bootargs console=ttyS0,115200n8 rootwait " \ KERNEL_MTD_PARTS \ "args_net=setenv bootargs ${bootargs} rootfstype=nfs " \ "root=/dev/nfs rw nfsroot=${serverip}:${nfs_root}," \ diff --git a/include/environment/ti/nand.h b/include/environment/ti/nand.h index 11dcefcc41c..7d00afa2b10 100644 --- a/include/environment/ti/nand.h +++ b/include/environment/ti/nand.h @@ -14,7 +14,7 @@ "root=${nandroot} " \ "rootfstype=${nandrootfstype}\0" \ "nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,2048\0" \ - "nandrootfstype=ubifs rootwait=1\0" \ + "nandrootfstype=ubifs rootwait\0" \ "nandboot=echo Booting from nand ...; " \ "run nandargs; " \ "nand read ${fdtaddr} NAND.u-boot-spl-os; " \ -- GitLab From b257c4e9064dc4c2b86d30cec5ece368ca981225 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Mon, 23 May 2022 22:50:36 +0200 Subject: [PATCH 082/581] ubifs: Add missing dependency on GZIP MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit GZIP option can be manually de-selected when UBIFS is enabled. This cause following compile error because ubifs calls gzip functions. /tmp/ccxVrh2c.ltrans1.ltrans.o: in function `gzip_decompress.lto_priv.566': :(.text+0x768): undefined reference to `zunzip' collect2: error: ld returned 1 exit status make: *** [Makefile:1813: u-boot] Error 1 So add missing dependency on GZIP. Signed-off-by: Pali Rohár --- cmd/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/cmd/Kconfig b/cmd/Kconfig index 06ec81007ad..9a0b7203112 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -2569,6 +2569,7 @@ config CMD_UBIFS depends on CMD_UBI default y if CMD_UBI select LZO + select GZIP help UBIFS is a file system for flash devices which works on top of UBI. -- GitLab From 24272ffd505be0597703032dbdd8ffdd7ef7a1a9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pierre-Cl=C3=A9ment=20Tosi?= Date: Wed, 25 May 2022 14:38:55 +0100 Subject: [PATCH 083/581] qfw: Don't fail if setup data size is 0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Skip missing setup data (which is valid) rather than failing with an error. Cc: Bin Meng Cc: Simon Glass Reported-by: Andrew Walbran Signed-off-by: Pierre-Clément Tosi --- cmd/qfw.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/cmd/qfw.c b/cmd/qfw.c index d58615040c6..ccbc967ca9f 100644 --- a/cmd/qfw.c +++ b/cmd/qfw.c @@ -25,15 +25,17 @@ static int qemu_fwcfg_cmd_setup_kernel(void *load_addr, void *initrd_addr) qfw_read_entry(qfw_dev, FW_CFG_SETUP_SIZE, 4, &setup_size); qfw_read_entry(qfw_dev, FW_CFG_KERNEL_SIZE, 4, &kernel_size); - if (setup_size == 0 || kernel_size == 0) { + if (kernel_size == 0) { printf("warning: no kernel available\n"); return -1; } data_addr = load_addr; - qfw_read_entry(qfw_dev, FW_CFG_SETUP_DATA, - le32_to_cpu(setup_size), data_addr); - data_addr += le32_to_cpu(setup_size); + if (setup_size != 0) { + qfw_read_entry(qfw_dev, FW_CFG_SETUP_DATA, + le32_to_cpu(setup_size), data_addr); + data_addr += le32_to_cpu(setup_size); + } qfw_read_entry(qfw_dev, FW_CFG_KERNEL_DATA, le32_to_cpu(kernel_size), data_addr); -- GitLab From b62450cf229c50ad2ce819dd02a09726909cc89a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Fri, 27 May 2022 22:15:24 +0200 Subject: [PATCH 084/581] serial: Replace CONFIG_DEBUG_UART_BASE by CONFIG_VAL(DEBUG_UART_BASE) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit CONFIG_VAL(DEBUG_UART_BASE) expands to CONFIG_DEBUG_UART_BASE or CONFIG_SPL_DEBUG_UART_BASE or CONFIG_TPL_DEBUG_UART_BASE and allows boards to set different values for SPL, TPL and U-Boot Proper. For ns16550 driver this support is there since commit d293759d55cc ("serial: ns16550: Add support for SPL_DEBUG_UART_BASE"). Signed-off-by: Pali Rohár --- arch/arm/mach-uniphier/debug-uart/debug-uart.c | 4 ++-- arch/x86/cpu/apollolake/cpu_common.c | 2 +- board/eets/pdu001/board.c | 2 +- drivers/serial/altera_jtag_uart.c | 2 +- drivers/serial/altera_uart.c | 4 ++-- drivers/serial/atmel_usart.c | 4 ++-- drivers/serial/serial_ar933x.c | 4 ++-- drivers/serial/serial_arc.c | 4 ++-- drivers/serial/serial_bcm6345.c | 4 ++-- drivers/serial/serial_linflexuart.c | 4 ++-- drivers/serial/serial_meson.c | 2 +- drivers/serial/serial_msm_geni.c | 6 +++--- drivers/serial/serial_mt7620.c | 4 ++-- drivers/serial/serial_mtk.c | 4 ++-- drivers/serial/serial_mvebu_a3700.c | 4 ++-- drivers/serial/serial_mxc.c | 4 ++-- drivers/serial/serial_omap.c | 4 ++-- drivers/serial/serial_pic32.c | 4 ++-- drivers/serial/serial_pl01x.c | 4 ++-- drivers/serial/serial_s5p.c | 4 ++-- drivers/serial/serial_sifive.c | 4 ++-- drivers/serial/serial_stm32.c | 4 ++-- drivers/serial/serial_xuartlite.c | 4 ++-- drivers/serial/serial_zynq.c | 4 ++-- 24 files changed, 45 insertions(+), 45 deletions(-) diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart.c b/arch/arm/mach-uniphier/debug-uart/debug-uart.c index d116d46812d..1ba012ca45d 100644 --- a/arch/arm/mach-uniphier/debug-uart/debug-uart.c +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart.c @@ -18,7 +18,7 @@ static void _debug_uart_putc(int c) { - void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE; + void __iomem *base = (void __iomem *)CONFIG_VAL(DEBUG_UART_BASE); while (!(readl(base + UNIPHIER_UART_LSR) & UART_LSR_THRE)) ; @@ -57,7 +57,7 @@ void sg_set_iectrl(unsigned int pin) void _debug_uart_init(void) { #ifdef CONFIG_SPL_BUILD - void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE; + void __iomem *base = (void __iomem *)CONFIG_VAL(DEBUG_UART_BASE); unsigned int divisor; switch (uniphier_get_soc_id()) { diff --git a/arch/x86/cpu/apollolake/cpu_common.c b/arch/x86/cpu/apollolake/cpu_common.c index 5d7d26b140f..9a5502617bf 100644 --- a/arch/x86/cpu/apollolake/cpu_common.c +++ b/arch/x86/cpu/apollolake/cpu_common.c @@ -72,7 +72,7 @@ static void pch_uart_init(void) } #ifdef CONFIG_DEBUG_UART - apl_uart_init(PCH_DEV_UART, CONFIG_DEBUG_UART_BASE); + apl_uart_init(PCH_DEV_UART, CONFIG_VAL(DEBUG_UART_BASE)); #endif } diff --git a/board/eets/pdu001/board.c b/board/eets/pdu001/board.c index 2b483dab8e1..1054837d434 100644 --- a/board/eets/pdu001/board.c +++ b/board/eets/pdu001/board.c @@ -273,7 +273,7 @@ void board_debug_uart_init(void) setup_early_clocks(); /* done by pin controller driver if not debugging */ - enable_uart_pin_mux(CONFIG_DEBUG_UART_BASE); + enable_uart_pin_mux(CONFIG_VAL(DEBUG_UART_BASE)); } #endif diff --git a/drivers/serial/altera_jtag_uart.c b/drivers/serial/altera_jtag_uart.c index 4435fcf56b9..9e39da7dd24 100644 --- a/drivers/serial/altera_jtag_uart.c +++ b/drivers/serial/altera_jtag_uart.c @@ -134,7 +134,7 @@ static inline void _debug_uart_init(void) static inline void _debug_uart_putc(int ch) { - struct altera_jtaguart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE; + struct altera_jtaguart_regs *regs = (void *)CONFIG_VAL(DEBUG_UART_BASE); while (1) { u32 st = readl(®s->control); diff --git a/drivers/serial/altera_uart.c b/drivers/serial/altera_uart.c index b18be6e2454..35920480841 100644 --- a/drivers/serial/altera_uart.c +++ b/drivers/serial/altera_uart.c @@ -123,7 +123,7 @@ U_BOOT_DRIVER(altera_uart) = { static inline void _debug_uart_init(void) { - struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE; + struct altera_uart_regs *regs = (void *)CONFIG_VAL(DEBUG_UART_BASE); u32 div; div = (CONFIG_DEBUG_UART_CLOCK / CONFIG_BAUDRATE) - 1; @@ -132,7 +132,7 @@ static inline void _debug_uart_init(void) static inline void _debug_uart_putc(int ch) { - struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE; + struct altera_uart_regs *regs = (void *)CONFIG_VAL(DEBUG_UART_BASE); while (1) { u32 st = readl(®s->status); diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c index bd14f3e7819..1fb9ee5cc94 100644 --- a/drivers/serial/atmel_usart.c +++ b/drivers/serial/atmel_usart.c @@ -319,14 +319,14 @@ U_BOOT_DRIVER(serial_atmel) = { #ifdef CONFIG_DEBUG_UART_ATMEL static inline void _debug_uart_init(void) { - atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_DEBUG_UART_BASE; + atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_VAL(DEBUG_UART_BASE); _atmel_serial_init(usart, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE); } static inline void _debug_uart_putc(int ch) { - atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_DEBUG_UART_BASE; + atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_VAL(DEBUG_UART_BASE); while (!(readl(&usart->csr) & USART3_BIT(TXRDY))) ; diff --git a/drivers/serial/serial_ar933x.c b/drivers/serial/serial_ar933x.c index da06bef97c7..4f916349762 100644 --- a/drivers/serial/serial_ar933x.c +++ b/drivers/serial/serial_ar933x.c @@ -199,7 +199,7 @@ U_BOOT_DRIVER(serial_ar933x) = { static inline void _debug_uart_init(void) { - void __iomem *regs = (void *)CONFIG_DEBUG_UART_BASE; + void __iomem *regs = (void *)CONFIG_VAL(DEBUG_UART_BASE); u32 val, scale, step; /* @@ -227,7 +227,7 @@ static inline void _debug_uart_init(void) static inline void _debug_uart_putc(int c) { - void __iomem *regs = (void *)CONFIG_DEBUG_UART_BASE; + void __iomem *regs = (void *)CONFIG_VAL(DEBUG_UART_BASE); u32 data; do { diff --git a/drivers/serial/serial_arc.c b/drivers/serial/serial_arc.c index 8f3e4dd44f1..b2d95bdbe18 100644 --- a/drivers/serial/serial_arc.c +++ b/drivers/serial/serial_arc.c @@ -137,7 +137,7 @@ U_BOOT_DRIVER(serial_arc) = { static inline void _debug_uart_init(void) { - struct arc_serial_regs *regs = (struct arc_serial_regs *)CONFIG_DEBUG_UART_BASE; + struct arc_serial_regs *regs = (struct arc_serial_regs *)CONFIG_VAL(DEBUG_UART_BASE); int arc_console_baud = CONFIG_DEBUG_UART_CLOCK / (CONFIG_BAUDRATE * 4) - 1; writeb(arc_console_baud & 0xff, ®s->baudl); @@ -146,7 +146,7 @@ static inline void _debug_uart_init(void) static inline void _debug_uart_putc(int c) { - struct arc_serial_regs *regs = (struct arc_serial_regs *)CONFIG_DEBUG_UART_BASE; + struct arc_serial_regs *regs = (struct arc_serial_regs *)CONFIG_VAL(DEBUG_UART_BASE); while (!(readb(®s->status) & UART_TXEMPTY)) ; diff --git a/drivers/serial/serial_bcm6345.c b/drivers/serial/serial_bcm6345.c index f08e91ff3ba..2359656a239 100644 --- a/drivers/serial/serial_bcm6345.c +++ b/drivers/serial/serial_bcm6345.c @@ -269,7 +269,7 @@ U_BOOT_DRIVER(bcm6345_serial) = { #ifdef CONFIG_DEBUG_UART_BCM6345 static inline void _debug_uart_init(void) { - void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE; + void __iomem *base = (void __iomem *)CONFIG_VAL(DEBUG_UART_BASE); bcm6345_serial_init(base, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE); } @@ -285,7 +285,7 @@ static inline void wait_xfered(void __iomem *base) static inline void _debug_uart_putc(int ch) { - void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE; + void __iomem *base = (void __iomem *)CONFIG_VAL(DEBUG_UART_BASE); wait_xfered(base); writel(ch, base + UART_FIFO_REG); diff --git a/drivers/serial/serial_linflexuart.c b/drivers/serial/serial_linflexuart.c index 876a4baa9fc..b449e55a650 100644 --- a/drivers/serial/serial_linflexuart.c +++ b/drivers/serial/serial_linflexuart.c @@ -201,14 +201,14 @@ U_BOOT_DRIVER(serial_linflex) = { static inline void _debug_uart_init(void) { - struct linflex_fsl *base = (struct linflex_fsl *)CONFIG_DEBUG_UART_BASE; + struct linflex_fsl *base = (struct linflex_fsl *)CONFIG_VAL(DEBUG_UART_BASE); linflex_serial_init_internal(base); } static inline void _debug_uart_putc(int ch) { - struct linflex_fsl *base = (struct linflex_fsl *)CONFIG_DEBUG_UART_BASE; + struct linflex_fsl *base = (struct linflex_fsl *)CONFIG_VAL(DEBUG_UART_BASE); /* XXX: Is this OK? Should this use the non-DM version? */ _linflex_serial_putc(base, ch); diff --git a/drivers/serial/serial_meson.c b/drivers/serial/serial_meson.c index d69ec221e45..c5ed3ede45e 100644 --- a/drivers/serial/serial_meson.c +++ b/drivers/serial/serial_meson.c @@ -182,7 +182,7 @@ static inline void _debug_uart_init(void) static inline void _debug_uart_putc(int ch) { - struct meson_uart *regs = (struct meson_uart *)CONFIG_DEBUG_UART_BASE; + struct meson_uart *regs = (struct meson_uart *)CONFIG_VAL(DEBUG_UART_BASE); while (readl(®s->status) & AML_UART_TX_FULL) ; diff --git a/drivers/serial/serial_msm_geni.c b/drivers/serial/serial_msm_geni.c index 3e255a99dcc..3943ca43e49 100644 --- a/drivers/serial/serial_msm_geni.c +++ b/drivers/serial/serial_msm_geni.c @@ -569,7 +569,7 @@ U_BOOT_DRIVER(serial_msm_geni) = { #ifdef CONFIG_DEBUG_UART_MSM_GENI static struct msm_serial_data init_serial_data = { - .base = CONFIG_DEBUG_UART_BASE + .base = CONFIG_VAL(DEBUG_UART_BASE) }; /* Serial dumb device, to reuse driver code */ @@ -587,7 +587,7 @@ static struct udevice init_dev = { static inline void _debug_uart_init(void) { - phys_addr_t base = CONFIG_DEBUG_UART_BASE; + phys_addr_t base = CONFIG_VAL(DEBUG_UART_BASE); geni_serial_init(&init_dev); geni_serial_baud(base, CLK_DIV, CONFIG_BAUDRATE); @@ -596,7 +596,7 @@ static inline void _debug_uart_init(void) static inline void _debug_uart_putc(int ch) { - phys_addr_t base = CONFIG_DEBUG_UART_BASE; + phys_addr_t base = CONFIG_VAL(DEBUG_UART_BASE); writel(DEF_TX_WM, base + SE_GENI_TX_WATERMARK_REG); qcom_geni_serial_setup_tx(base, 1); diff --git a/drivers/serial/serial_mt7620.c b/drivers/serial/serial_mt7620.c index 76ecc2b38ce..5c5264bc962 100644 --- a/drivers/serial/serial_mt7620.c +++ b/drivers/serial/serial_mt7620.c @@ -220,7 +220,7 @@ static inline void _debug_uart_init(void) { struct mt7620_serial_plat plat; - plat.regs = (void *)CONFIG_DEBUG_UART_BASE; + plat.regs = (void *)CONFIG_VAL(DEBUG_UART_BASE); plat.clock = CONFIG_DEBUG_UART_CLOCK; writel(0, &plat.regs->ier); @@ -233,7 +233,7 @@ static inline void _debug_uart_init(void) static inline void _debug_uart_putc(int ch) { struct mt7620_serial_regs __iomem *regs = - (void *)CONFIG_DEBUG_UART_BASE; + (void *)CONFIG_VAL(DEBUG_UART_BASE); while (!(readl(®s->lsr) & UART_LSR_THRE)) ; diff --git a/drivers/serial/serial_mtk.c b/drivers/serial/serial_mtk.c index 4145d9fdb3d..a84f39b3fa2 100644 --- a/drivers/serial/serial_mtk.c +++ b/drivers/serial/serial_mtk.c @@ -426,7 +426,7 @@ static inline void _debug_uart_init(void) { struct mtk_serial_priv priv; - priv.regs = (void *) CONFIG_DEBUG_UART_BASE; + priv.regs = (void *) CONFIG_VAL(DEBUG_UART_BASE); priv.clock = CONFIG_DEBUG_UART_CLOCK; writel(0, &priv.regs->ier); @@ -439,7 +439,7 @@ static inline void _debug_uart_init(void) static inline void _debug_uart_putc(int ch) { struct mtk_serial_regs __iomem *regs = - (void *) CONFIG_DEBUG_UART_BASE; + (void *) CONFIG_VAL(DEBUG_UART_BASE); while (!(readl(®s->lsr) & UART_LSR_THRE)) ; diff --git a/drivers/serial/serial_mvebu_a3700.c b/drivers/serial/serial_mvebu_a3700.c index 3e673bde57b..0fcd7e88ace 100644 --- a/drivers/serial/serial_mvebu_a3700.c +++ b/drivers/serial/serial_mvebu_a3700.c @@ -321,7 +321,7 @@ U_BOOT_DRIVER(serial_mvebu) = { static inline void _debug_uart_init(void) { - void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE; + void __iomem *base = (void __iomem *)CONFIG_VAL(DEBUG_UART_BASE); u32 parent_rate, divider; /* reset FIFOs */ @@ -349,7 +349,7 @@ static inline void _debug_uart_init(void) static inline void _debug_uart_putc(int ch) { - void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE; + void __iomem *base = (void __iomem *)CONFIG_VAL(DEBUG_UART_BASE); while (readl(base + UART_STATUS_REG) & UART_STATUS_TXFIFO_FULL) ; diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c index e4970a169bd..70a0e5e9197 100644 --- a/drivers/serial/serial_mxc.c +++ b/drivers/serial/serial_mxc.c @@ -372,7 +372,7 @@ U_BOOT_DRIVER(serial_mxc) = { static inline void _debug_uart_init(void) { - struct mxc_uart *base = (struct mxc_uart *)CONFIG_DEBUG_UART_BASE; + struct mxc_uart *base = (struct mxc_uart *)CONFIG_VAL(DEBUG_UART_BASE); _mxc_serial_init(base, false); _mxc_serial_setbrg(base, CONFIG_DEBUG_UART_CLOCK, @@ -381,7 +381,7 @@ static inline void _debug_uart_init(void) static inline void _debug_uart_putc(int ch) { - struct mxc_uart *base = (struct mxc_uart *)CONFIG_DEBUG_UART_BASE; + struct mxc_uart *base = (struct mxc_uart *)CONFIG_VAL(DEBUG_UART_BASE); while (!(readl(&base->ts) & UTS_TXEMPTY)) WATCHDOG_RESET(); diff --git a/drivers/serial/serial_omap.c b/drivers/serial/serial_omap.c index ee938f67632..e9ff61a0bac 100644 --- a/drivers/serial/serial_omap.c +++ b/drivers/serial/serial_omap.c @@ -66,7 +66,7 @@ static inline int serial_in_shift(void *addr, int shift) static inline void _debug_uart_init(void) { - struct ns16550 *com_port = (struct ns16550 *)CONFIG_DEBUG_UART_BASE; + struct ns16550 *com_port = (struct ns16550 *)CONFIG_VAL(DEBUG_UART_BASE); int baud_divisor; baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK, @@ -85,7 +85,7 @@ static inline void _debug_uart_init(void) static inline void _debug_uart_putc(int ch) { - struct ns16550 *com_port = (struct ns16550 *)CONFIG_DEBUG_UART_BASE; + struct ns16550 *com_port = (struct ns16550 *)CONFIG_VAL(DEBUG_UART_BASE); while (!(serial_din(&com_port->lsr) & UART_LSR_THRE)) ; diff --git a/drivers/serial/serial_pic32.c b/drivers/serial/serial_pic32.c index ccdda9f0334..3c5d37ce0ab 100644 --- a/drivers/serial/serial_pic32.c +++ b/drivers/serial/serial_pic32.c @@ -187,14 +187,14 @@ U_BOOT_DRIVER(pic32_serial) = { static inline void _debug_uart_init(void) { - void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE; + void __iomem *base = (void __iomem *)CONFIG_VAL(DEBUG_UART_BASE); pic32_serial_init(base, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE); } static inline void _debug_uart_putc(int ch) { - writel(ch, CONFIG_DEBUG_UART_BASE + U_TXR); + writel(ch, CONFIG_VAL(DEBUG_UART_BASE) + U_TXR); } DEBUG_UART_FUNCS diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c index 67caa063c9a..9b0d16f1645 100644 --- a/drivers/serial/serial_pl01x.c +++ b/drivers/serial/serial_pl01x.c @@ -403,7 +403,7 @@ U_BOOT_DRIVER(serial_pl01x) = { static void _debug_uart_init(void) { #ifndef CONFIG_DEBUG_UART_SKIP_INIT - struct pl01x_regs *regs = (struct pl01x_regs *)CONFIG_DEBUG_UART_BASE; + struct pl01x_regs *regs = (struct pl01x_regs *)CONFIG_VAL(DEBUG_UART_BASE); enum pl01x_type type; if (IS_ENABLED(CONFIG_DEBUG_UART_PL011)) @@ -419,7 +419,7 @@ static void _debug_uart_init(void) static inline void _debug_uart_putc(int ch) { - struct pl01x_regs *regs = (struct pl01x_regs *)CONFIG_DEBUG_UART_BASE; + struct pl01x_regs *regs = (struct pl01x_regs *)CONFIG_VAL(DEBUG_UART_BASE); while (pl01x_putc(regs, ch) == -EAGAIN) ; diff --git a/drivers/serial/serial_s5p.c b/drivers/serial/serial_s5p.c index de420d2d945..4b3947e7f6b 100644 --- a/drivers/serial/serial_s5p.c +++ b/drivers/serial/serial_s5p.c @@ -276,7 +276,7 @@ static inline void _debug_uart_init(void) if (IS_ENABLED(CONFIG_DEBUG_UART_SKIP_INIT)) return; - struct s5p_uart *uart = (struct s5p_uart *)CONFIG_DEBUG_UART_BASE; + struct s5p_uart *uart = (struct s5p_uart *)CONFIG_VAL(DEBUG_UART_BASE); s5p_serial_init(uart); #if CONFIG_IS_ENABLED(ARCH_APPLE) @@ -288,7 +288,7 @@ static inline void _debug_uart_init(void) static inline void _debug_uart_putc(int ch) { - struct s5p_uart *uart = (struct s5p_uart *)CONFIG_DEBUG_UART_BASE; + struct s5p_uart *uart = (struct s5p_uart *)CONFIG_VAL(DEBUG_UART_BASE); #if CONFIG_IS_ENABLED(ARCH_APPLE) while (readl(&uart->ufstat) & S5L_TX_FIFO_FULL); diff --git a/drivers/serial/serial_sifive.c b/drivers/serial/serial_sifive.c index 794f9c924bc..4af1ff5060a 100644 --- a/drivers/serial/serial_sifive.c +++ b/drivers/serial/serial_sifive.c @@ -212,7 +212,7 @@ U_BOOT_DRIVER(serial_sifive) = { static inline void _debug_uart_init(void) { struct uart_sifive *regs = - (struct uart_sifive *)CONFIG_DEBUG_UART_BASE; + (struct uart_sifive *)CONFIG_VAL(DEBUG_UART_BASE); _sifive_serial_setbrg(regs, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE); @@ -222,7 +222,7 @@ static inline void _debug_uart_init(void) static inline void _debug_uart_putc(int ch) { struct uart_sifive *regs = - (struct uart_sifive *)CONFIG_DEBUG_UART_BASE; + (struct uart_sifive *)CONFIG_VAL(DEBUG_UART_BASE); while (_sifive_serial_putc(regs, ch) == -EAGAIN) WATCHDOG_RESET(); diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c index f6cb708c370..2ba92bf9c48 100644 --- a/drivers/serial/serial_stm32.c +++ b/drivers/serial/serial_stm32.c @@ -270,7 +270,7 @@ static inline struct stm32_uart_info *_debug_uart_info(void) static inline void _debug_uart_init(void) { - fdt_addr_t base = CONFIG_DEBUG_UART_BASE; + fdt_addr_t base = CONFIG_VAL(DEBUG_UART_BASE); struct stm32_uart_info *uart_info = _debug_uart_info(); _stm32_serial_init(base, uart_info); @@ -281,7 +281,7 @@ static inline void _debug_uart_init(void) static inline void _debug_uart_putc(int c) { - fdt_addr_t base = CONFIG_DEBUG_UART_BASE; + fdt_addr_t base = CONFIG_VAL(DEBUG_UART_BASE); struct stm32_uart_info *uart_info = _debug_uart_info(); while (_stm32_serial_putc(base, uart_info, c) == -EAGAIN) diff --git a/drivers/serial/serial_xuartlite.c b/drivers/serial/serial_xuartlite.c index 9780a44d09e..b6197da97cc 100644 --- a/drivers/serial/serial_xuartlite.c +++ b/drivers/serial/serial_xuartlite.c @@ -143,7 +143,7 @@ U_BOOT_DRIVER(serial_uartlite) = { static inline void _debug_uart_init(void) { - struct uartlite *regs = (struct uartlite *)CONFIG_DEBUG_UART_BASE; + struct uartlite *regs = (struct uartlite *)CONFIG_VAL(DEBUG_UART_BASE); int ret; uart_out32(®s->control, 0); @@ -159,7 +159,7 @@ static inline void _debug_uart_init(void) static inline void _debug_uart_putc(int ch) { - struct uartlite *regs = (struct uartlite *)CONFIG_DEBUG_UART_BASE; + struct uartlite *regs = (struct uartlite *)CONFIG_VAL(DEBUG_UART_BASE); while (uart_in32(®s->status) & SR_TX_FIFO_FULL) ; diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c index 6bb003dc155..83adfb5fb98 100644 --- a/drivers/serial/serial_zynq.c +++ b/drivers/serial/serial_zynq.c @@ -295,7 +295,7 @@ U_BOOT_DRIVER(serial_zynq) = { #ifdef CONFIG_DEBUG_UART_ZYNQ static inline void _debug_uart_init(void) { - struct uart_zynq *regs = (struct uart_zynq *)CONFIG_DEBUG_UART_BASE; + struct uart_zynq *regs = (struct uart_zynq *)CONFIG_VAL(DEBUG_UART_BASE); _uart_zynq_serial_init(regs); _uart_zynq_serial_setbrg(regs, CONFIG_DEBUG_UART_CLOCK, @@ -304,7 +304,7 @@ static inline void _debug_uart_init(void) static inline void _debug_uart_putc(int ch) { - struct uart_zynq *regs = (struct uart_zynq *)CONFIG_DEBUG_UART_BASE; + struct uart_zynq *regs = (struct uart_zynq *)CONFIG_VAL(DEBUG_UART_BASE); while (_uart_zynq_serial_putc(regs, ch) == -EAGAIN) WATCHDOG_RESET(); -- GitLab From 68f8bf21c72515adcdd41ac6f8dbebb29259aeb7 Mon Sep 17 00:00:00 2001 From: Andrew Scull Date: Mon, 16 May 2022 10:41:29 +0000 Subject: [PATCH 085/581] virtio_ring: Merge identical variables The variables `total_sg` and `descs_used` have the same value. Replace the few uses of `total_sg` with `descs_used` to simplify the situation. Signed-off-by: Andrew Scull Reviewed-by: Simon Glass Reviewed-by: Bin Meng --- drivers/virtio/virtio_ring.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/virtio/virtio_ring.c b/drivers/virtio/virtio_ring.c index 7f1cbc59329..a6922ce1b83 100644 --- a/drivers/virtio/virtio_ring.c +++ b/drivers/virtio/virtio_ring.c @@ -20,17 +20,16 @@ int virtqueue_add(struct virtqueue *vq, struct virtio_sg *sgs[], unsigned int out_sgs, unsigned int in_sgs) { struct vring_desc *desc; - unsigned int total_sg = out_sgs + in_sgs; - unsigned int i, n, avail, descs_used, uninitialized_var(prev); + unsigned int descs_used = out_sgs + in_sgs; + unsigned int i, n, avail, uninitialized_var(prev); int head; - WARN_ON(total_sg == 0); + WARN_ON(descs_used == 0); head = vq->free_head; desc = vq->vring.desc; i = head; - descs_used = total_sg; if (vq->num_free < descs_used) { debug("Can't add buf len %i - avail = %i\n", -- GitLab From b0952977c98affb9054aa5ba6a79291a293c8824 Mon Sep 17 00:00:00 2001 From: Andrew Scull Date: Mon, 16 May 2022 10:41:30 +0000 Subject: [PATCH 086/581] virtio_ring: Add helper to attach vring descriptor Move the logic for attaching a descriptor to its own function. Signed-off-by: Andrew Scull Reviewed-by: Simon Glass --- drivers/virtio/virtio_ring.c | 36 +++++++++++++++++------------------- 1 file changed, 17 insertions(+), 19 deletions(-) diff --git a/drivers/virtio/virtio_ring.c b/drivers/virtio/virtio_ring.c index a6922ce1b83..d3fc842f30f 100644 --- a/drivers/virtio/virtio_ring.c +++ b/drivers/virtio/virtio_ring.c @@ -16,6 +16,18 @@ #include #include +static unsigned int virtqueue_attach_desc(struct virtqueue *vq, unsigned int i, + struct virtio_sg *sg, u16 flags) +{ + struct vring_desc *desc = &vq->vring.desc[i]; + + desc->addr = cpu_to_virtio64(vq->vdev, (u64)(uintptr_t)sg->addr); + desc->len = cpu_to_virtio32(vq->vdev, sg->length); + desc->flags = cpu_to_virtio16(vq->vdev, flags); + + return virtio16_to_cpu(vq->vdev, desc->next); +} + int virtqueue_add(struct virtqueue *vq, struct virtio_sg *sgs[], unsigned int out_sgs, unsigned int in_sgs) { @@ -44,27 +56,13 @@ int virtqueue_add(struct virtqueue *vq, struct virtio_sg *sgs[], return -ENOSPC; } - for (n = 0; n < out_sgs; n++) { - struct virtio_sg *sg = sgs[n]; - - desc[i].flags = cpu_to_virtio16(vq->vdev, VRING_DESC_F_NEXT); - desc[i].addr = cpu_to_virtio64(vq->vdev, (u64)(size_t)sg->addr); - desc[i].len = cpu_to_virtio32(vq->vdev, sg->length); - - prev = i; - i = virtio16_to_cpu(vq->vdev, desc[i].next); - } - for (; n < (out_sgs + in_sgs); n++) { - struct virtio_sg *sg = sgs[n]; - - desc[i].flags = cpu_to_virtio16(vq->vdev, VRING_DESC_F_NEXT | - VRING_DESC_F_WRITE); - desc[i].addr = cpu_to_virtio64(vq->vdev, - (u64)(uintptr_t)sg->addr); - desc[i].len = cpu_to_virtio32(vq->vdev, sg->length); + for (n = 0; n < descs_used; n++) { + u16 flags = VRING_DESC_F_NEXT; + if (n >= out_sgs) + flags |= VRING_DESC_F_WRITE; prev = i; - i = virtio16_to_cpu(vq->vdev, desc[i].next); + i = virtqueue_attach_desc(vq, i, sgs[n], flags); } /* Last one doesn't continue */ desc[prev].flags &= cpu_to_virtio16(vq->vdev, ~VRING_DESC_F_NEXT); -- GitLab From 10a14536366350fdd2d14af1981d9e3d8cb3c524 Mon Sep 17 00:00:00 2001 From: Andrew Scull Date: Mon, 16 May 2022 10:41:31 +0000 Subject: [PATCH 087/581] virtio_ring: Maintain a shadow copy of descriptors The shared descriptors should only be written by the guest driver, however, the device is still able to overwrite and corrupt them. Maintain a private shadow copy of the descriptors for the driver to use for state tracking, removing the need to read from the shared descriptors. Signed-off-by: Andrew Scull Reviewed-by: Simon Glass --- drivers/virtio/virtio_ring.c | 49 ++++++++++++++++++++++++------------ include/virtio_ring.h | 10 ++++++++ 2 files changed, 43 insertions(+), 16 deletions(-) diff --git a/drivers/virtio/virtio_ring.c b/drivers/virtio/virtio_ring.c index d3fc842f30f..73671d79daf 100644 --- a/drivers/virtio/virtio_ring.c +++ b/drivers/virtio/virtio_ring.c @@ -19,13 +19,21 @@ static unsigned int virtqueue_attach_desc(struct virtqueue *vq, unsigned int i, struct virtio_sg *sg, u16 flags) { + struct vring_desc_shadow *desc_shadow = &vq->vring_desc_shadow[i]; struct vring_desc *desc = &vq->vring.desc[i]; - desc->addr = cpu_to_virtio64(vq->vdev, (u64)(uintptr_t)sg->addr); - desc->len = cpu_to_virtio32(vq->vdev, sg->length); - desc->flags = cpu_to_virtio16(vq->vdev, flags); + /* Update the shadow descriptor. */ + desc_shadow->addr = (u64)(uintptr_t)sg->addr; + desc_shadow->len = sg->length; + desc_shadow->flags = flags; - return virtio16_to_cpu(vq->vdev, desc->next); + /* Update the shared descriptor to match the shadow. */ + desc->addr = cpu_to_virtio64(vq->vdev, desc_shadow->addr); + desc->len = cpu_to_virtio32(vq->vdev, desc_shadow->len); + desc->flags = cpu_to_virtio16(vq->vdev, desc_shadow->flags); + desc->next = cpu_to_virtio16(vq->vdev, desc_shadow->next); + + return desc_shadow->next; } int virtqueue_add(struct virtqueue *vq, struct virtio_sg *sgs[], @@ -65,7 +73,8 @@ int virtqueue_add(struct virtqueue *vq, struct virtio_sg *sgs[], i = virtqueue_attach_desc(vq, i, sgs[n], flags); } /* Last one doesn't continue */ - desc[prev].flags &= cpu_to_virtio16(vq->vdev, ~VRING_DESC_F_NEXT); + vq->vring_desc_shadow[prev].flags &= ~VRING_DESC_F_NEXT; + desc[prev].flags = cpu_to_virtio16(vq->vdev, vq->vring_desc_shadow[prev].flags); /* We're using some buffers from the free list. */ vq->num_free -= descs_used; @@ -134,17 +143,16 @@ void virtqueue_kick(struct virtqueue *vq) static void detach_buf(struct virtqueue *vq, unsigned int head) { unsigned int i; - __virtio16 nextflag = cpu_to_virtio16(vq->vdev, VRING_DESC_F_NEXT); /* Put back on free list: unmap first-level descriptors and find end */ i = head; - while (vq->vring.desc[i].flags & nextflag) { - i = virtio16_to_cpu(vq->vdev, vq->vring.desc[i].next); + while (vq->vring_desc_shadow[i].flags & VRING_DESC_F_NEXT) { + i = vq->vring_desc_shadow[i].next; vq->num_free++; } - vq->vring.desc[i].next = cpu_to_virtio16(vq->vdev, vq->free_head); + vq->vring_desc_shadow[i].next = vq->free_head; vq->free_head = head; /* Plus final descriptor */ @@ -197,8 +205,7 @@ void *virtqueue_get_buf(struct virtqueue *vq, unsigned int *len) virtio_store_mb(&vring_used_event(&vq->vring), cpu_to_virtio16(vq->vdev, vq->last_used_idx)); - return (void *)(uintptr_t)virtio64_to_cpu(vq->vdev, - vq->vring.desc[i].addr); + return (void *)(uintptr_t)vq->vring_desc_shadow[i].addr; } static struct virtqueue *__vring_new_virtqueue(unsigned int index, @@ -207,6 +214,7 @@ static struct virtqueue *__vring_new_virtqueue(unsigned int index, { unsigned int i; struct virtqueue *vq; + struct vring_desc_shadow *vring_desc_shadow; struct virtio_dev_priv *uc_priv = dev_get_uclass_priv(udev); struct udevice *vdev = uc_priv->vdev; @@ -214,10 +222,17 @@ static struct virtqueue *__vring_new_virtqueue(unsigned int index, if (!vq) return NULL; + vring_desc_shadow = calloc(vring.num, sizeof(struct vring_desc_shadow)); + if (!vring_desc_shadow) { + free(vq); + return NULL; + } + vq->vdev = vdev; vq->index = index; vq->num_free = vring.num; vq->vring = vring; + vq->vring_desc_shadow = vring_desc_shadow; vq->last_used_idx = 0; vq->avail_flags_shadow = 0; vq->avail_idx_shadow = 0; @@ -235,7 +250,7 @@ static struct virtqueue *__vring_new_virtqueue(unsigned int index, /* Put everything in free lists */ vq->free_head = 0; for (i = 0; i < vring.num - 1; i++) - vq->vring.desc[i].next = cpu_to_virtio16(vdev, i + 1); + vq->vring_desc_shadow[i].next = i + 1; return vq; } @@ -288,6 +303,7 @@ struct virtqueue *vring_create_virtqueue(unsigned int index, unsigned int num, void vring_del_virtqueue(struct virtqueue *vq) { free(vq->vring.desc); + free(vq->vring_desc_shadow); list_del(&vq->list); free(vq); } @@ -333,11 +349,12 @@ void virtqueue_dump(struct virtqueue *vq) printf("\tlast_used_idx %u, avail_flags_shadow %u, avail_idx_shadow %u\n", vq->last_used_idx, vq->avail_flags_shadow, vq->avail_idx_shadow); - printf("Descriptor dump:\n"); + printf("Shadow descriptor dump:\n"); for (i = 0; i < vq->vring.num; i++) { - printf("\tdesc[%u] = { 0x%llx, len %u, flags %u, next %u }\n", - i, vq->vring.desc[i].addr, vq->vring.desc[i].len, - vq->vring.desc[i].flags, vq->vring.desc[i].next); + struct vring_desc_shadow *desc = &vq->vring_desc_shadow[i]; + + printf("\tdesc_shadow[%u] = { 0x%llx, len %u, flags %u, next %u }\n", + i, desc->addr, desc->len, desc->flags, desc->next); } printf("Avail ring dump:\n"); diff --git a/include/virtio_ring.h b/include/virtio_ring.h index 6fc0593b14b..52cbe77c0a2 100644 --- a/include/virtio_ring.h +++ b/include/virtio_ring.h @@ -55,6 +55,14 @@ struct vring_desc { __virtio16 next; }; +/* Shadow of struct vring_desc in guest byte order. */ +struct vring_desc_shadow { + u64 addr; + u32 len; + u16 flags; + u16 next; +}; + struct vring_avail { __virtio16 flags; __virtio16 idx; @@ -89,6 +97,7 @@ struct vring { * @index: the zero-based ordinal number for this queue * @num_free: number of elements we expect to be able to fit * @vring: actual memory layout for this queue + * @vring_desc_shadow: guest-only copy of descriptors * @event: host publishes avail event idx * @free_head: head of free buffer list * @num_added: number we've added since last sync @@ -102,6 +111,7 @@ struct virtqueue { unsigned int index; unsigned int num_free; struct vring vring; + struct vring_desc_shadow *vring_desc_shadow; bool event; unsigned int free_head; unsigned int num_added; -- GitLab From fbef3f53d4a1ccdcbec46c923c9d208d6cbb50aa Mon Sep 17 00:00:00 2001 From: Andrew Scull Date: Mon, 16 May 2022 10:41:32 +0000 Subject: [PATCH 088/581] virtio_ring: Check used descriptors are chain heads When the device returns used buffers, it should refer to the descriptor that is the head of the descriptor chain for that buffer. Confirm this to be the case by tracking the head of descriptor chains that have been made available to the device. Signed-off-by: Andrew Scull Reviewed-by: Simon Glass --- drivers/virtio/virtio_ring.c | 12 ++++++++++++ include/virtio_ring.h | 2 ++ 2 files changed, 14 insertions(+) diff --git a/drivers/virtio/virtio_ring.c b/drivers/virtio/virtio_ring.c index 73671d79daf..f71bab78477 100644 --- a/drivers/virtio/virtio_ring.c +++ b/drivers/virtio/virtio_ring.c @@ -82,6 +82,9 @@ int virtqueue_add(struct virtqueue *vq, struct virtio_sg *sgs[], /* Update free pointer */ vq->free_head = i; + /* Mark the descriptor as the head of a chain. */ + vq->vring_desc_shadow[head].chain_head = true; + /* * Put entry in available array (but don't update avail->idx * until they do sync). @@ -144,6 +147,9 @@ static void detach_buf(struct virtqueue *vq, unsigned int head) { unsigned int i; + /* Unmark the descriptor as the head of a chain. */ + vq->vring_desc_shadow[head].chain_head = false; + /* Put back on free list: unmap first-level descriptors and find end */ i = head; @@ -194,6 +200,12 @@ void *virtqueue_get_buf(struct virtqueue *vq, unsigned int *len) return NULL; } + if (unlikely(!vq->vring_desc_shadow[i].chain_head)) { + printf("(%s.%d): id %u is not a head\n", + vq->vdev->name, vq->index, i); + return NULL; + } + detach_buf(vq, i); vq->last_used_idx++; /* diff --git a/include/virtio_ring.h b/include/virtio_ring.h index 52cbe77c0a2..c77c212cffd 100644 --- a/include/virtio_ring.h +++ b/include/virtio_ring.h @@ -61,6 +61,8 @@ struct vring_desc_shadow { u32 len; u16 flags; u16 next; + /* Metadata about the descriptor. */ + bool chain_head; }; struct vring_avail { -- GitLab From b1fe820b63c45d6ed0c44b67b4a48e5f3ac34bf0 Mon Sep 17 00:00:00 2001 From: Andrew Scull Date: Mon, 16 May 2022 10:41:33 +0000 Subject: [PATCH 089/581] dm: test: virtio: Test the virtio ring The virtio ring is the basis of virtio communication. Test its basic functionality and its resilience against corruption from the device. Signed-off-by: Andrew Scull Reviewed-by: Simon Glass --- test/dm/virtio.c | 72 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 72 insertions(+) diff --git a/test/dm/virtio.c b/test/dm/virtio.c index 9a7e658cceb..adef10592ce 100644 --- a/test/dm/virtio.c +++ b/test/dm/virtio.c @@ -130,3 +130,75 @@ static int dm_test_virtio_remove(struct unit_test_state *uts) return 0; } DM_TEST(dm_test_virtio_remove, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); + +/* Test all of the virtio ring */ +static int dm_test_virtio_ring(struct unit_test_state *uts) +{ + struct udevice *bus, *dev; + struct virtio_dev_priv *uc_priv; + struct virtqueue *vq; + struct virtio_sg sg[2]; + struct virtio_sg *sgs[2]; + unsigned int len; + u8 buffer[2][32]; + + /* check probe success */ + ut_assertok(uclass_first_device(UCLASS_VIRTIO, &bus)); + ut_assertnonnull(bus); + + /* check the child virtio-blk device is bound */ + ut_assertok(device_find_first_child(bus, &dev)); + ut_assertnonnull(dev); + + /* + * fake the virtio device probe by filling in uc_priv->vdev + * which is used by virtio_find_vqs/virtio_del_vqs. + */ + uc_priv = dev_get_uclass_priv(bus); + ut_assertnonnull(uc_priv); + uc_priv->vdev = dev; + + /* prepare the scatter-gather buffer */ + sg[0].addr = buffer[0]; + sg[0].length = sizeof(buffer[0]); + sg[1].addr = buffer[1]; + sg[1].length = sizeof(buffer[1]); + sgs[0] = &sg[0]; + sgs[1] = &sg[1]; + + /* read a buffer and report written size from device */ + ut_assertok(virtio_find_vqs(dev, 1, &vq)); + ut_assertok(virtqueue_add(vq, sgs, 0, 1)); + vq->vring.used->idx = 1; + vq->vring.used->ring[0].id = 0; + vq->vring.used->ring[0].len = 0x53355885; + ut_asserteq_ptr(buffer, virtqueue_get_buf(vq, &len)); + ut_asserteq(0x53355885, len); + ut_assertok(virtio_del_vqs(dev)); + + /* rejects used descriptors that aren't a chain head */ + ut_assertok(virtio_find_vqs(dev, 1, &vq)); + ut_assertok(virtqueue_add(vq, sgs, 0, 2)); + vq->vring.used->idx = 1; + vq->vring.used->ring[0].id = 1; + vq->vring.used->ring[0].len = 0x53355885; + ut_assertnull(virtqueue_get_buf(vq, &len)); + ut_assertok(virtio_del_vqs(dev)); + + /* device changes to descriptor are ignored */ + ut_assertok(virtio_find_vqs(dev, 1, &vq)); + ut_assertok(virtqueue_add(vq, sgs, 0, 1)); + vq->vring.desc[0].addr = cpu_to_virtio64(dev, 0xbadbad11); + vq->vring.desc[0].len = cpu_to_virtio32(dev, 0x11badbad); + vq->vring.desc[0].flags = cpu_to_virtio16(dev, VRING_DESC_F_NEXT); + vq->vring.desc[0].next = cpu_to_virtio16(dev, U16_MAX); + vq->vring.used->idx = 1; + vq->vring.used->ring[0].id = 0; + vq->vring.used->ring[0].len = 6; + ut_asserteq_ptr(buffer, virtqueue_get_buf(vq, &len)); + ut_asserteq(6, len); + ut_assertok(virtio_del_vqs(dev)); + + return 0; +} +DM_TEST(dm_test_virtio_ring, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); -- GitLab From 1674b6c4d820a4139c406d673a3319f785503a5d Mon Sep 17 00:00:00 2001 From: Andrew Scull Date: Mon, 16 May 2022 10:41:34 +0000 Subject: [PATCH 090/581] virtio: sandbox: Fix device features bitfield The virtio sandbox transport was setting the device features value to the bit index rather than shifting a bit to the right index. Fix this using the bit manipulation macros. Signed-off-by: Andrew Scull Reviewed-by: Simon Glass --- drivers/virtio/virtio_sandbox.c | 2 +- test/dm/virtio.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/virtio/virtio_sandbox.c b/drivers/virtio/virtio_sandbox.c index aafb7beb949..a73b1234544 100644 --- a/drivers/virtio/virtio_sandbox.c +++ b/drivers/virtio/virtio_sandbox.c @@ -160,7 +160,7 @@ static int virtio_sandbox_probe(struct udevice *udev) struct virtio_dev_priv *uc_priv = dev_get_uclass_priv(udev); /* fake some information for testing */ - priv->device_features = VIRTIO_F_VERSION_1; + priv->device_features = BIT_ULL(VIRTIO_F_VERSION_1); uc_priv->device = VIRTIO_ID_BLOCK; uc_priv->vendor = ('u' << 24) | ('b' << 16) | ('o' << 8) | 't'; diff --git a/test/dm/virtio.c b/test/dm/virtio.c index adef10592ce..aa4e3d778e8 100644 --- a/test/dm/virtio.c +++ b/test/dm/virtio.c @@ -77,7 +77,7 @@ static int dm_test_virtio_all_ops(struct unit_test_state *uts) ut_assertok(virtio_get_status(dev, &status)); ut_asserteq(0, status); ut_assertok(virtio_get_features(dev, &features)); - ut_asserteq(VIRTIO_F_VERSION_1, features); + ut_asserteq_64(BIT_ULL(VIRTIO_F_VERSION_1), features); ut_assertok(virtio_set_features(dev)); ut_assertok(virtio_find_vqs(dev, nvqs, vqs)); ut_assertok(virtio_del_vqs(dev)); -- GitLab From 82c8610a44c6d4d38b90246f6893cb8e7b911e0c Mon Sep 17 00:00:00 2001 From: Andrew Scull Date: Mon, 16 May 2022 10:41:35 +0000 Subject: [PATCH 091/581] test: dm: virtio: Test notify before del_vqs The virtqueue is passed to virtio_notify() so move the virtqueue deletion to the end of the test when it's no longer needed. This wasn't causing any problems because the sandbox virtio transport driver doesn't do anything for notifications, but it could cause problems if things change and it was a bad example. Signed-off-by: Andrew Scull Reviewed-by: Simon Glass --- test/dm/virtio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test/dm/virtio.c b/test/dm/virtio.c index aa4e3d778e8..ff1dea323cf 100644 --- a/test/dm/virtio.c +++ b/test/dm/virtio.c @@ -80,8 +80,8 @@ static int dm_test_virtio_all_ops(struct unit_test_state *uts) ut_asserteq_64(BIT_ULL(VIRTIO_F_VERSION_1), features); ut_assertok(virtio_set_features(dev)); ut_assertok(virtio_find_vqs(dev, nvqs, vqs)); - ut_assertok(virtio_del_vqs(dev)); ut_assertok(virtio_notify(dev, vqs[0])); + ut_assertok(virtio_del_vqs(dev)); return 0; } -- GitLab From 8df508ff3d4cfe8a2b7a706518692e194cc7f021 Mon Sep 17 00:00:00 2001 From: Andrew Scull Date: Mon, 16 May 2022 10:41:36 +0000 Subject: [PATCH 092/581] test: dm: virtio: Split out virtio device tests Virtio tests that find a child device require the virtio device driver to be included in the build so it can probe. The sandbox virtio transport driver currently reports a virtio-blk device so make sure the corresponding driver is built before running tests that need it. Signed-off-by: Andrew Scull --- test/dm/Makefile | 5 +- test/dm/virtio.c | 171 ------------------------------------ test/dm/virtio_device.c | 186 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 190 insertions(+), 172 deletions(-) create mode 100644 test/dm/virtio_device.c diff --git a/test/dm/Makefile b/test/dm/Makefile index f0a7c97e3d1..29dd143517b 100644 --- a/test/dm/Makefile +++ b/test/dm/Makefile @@ -107,7 +107,10 @@ obj-$(CONFIG_TEE) += tee.o obj-$(CONFIG_TIMER) += timer.o obj-$(CONFIG_DM_USB) += usb.o obj-$(CONFIG_DM_VIDEO) += video.o -obj-$(CONFIG_VIRTIO_SANDBOX) += virtio.o +ifeq ($(CONFIG_VIRTIO_SANDBOX),y) +obj-y += virtio.o +obj-$(CONFIG_VIRTIO_BLK) += virtio_device.o +endif ifeq ($(CONFIG_WDT_GPIO)$(CONFIG_WDT_SANDBOX),yy) obj-y += wdt.o endif diff --git a/test/dm/virtio.c b/test/dm/virtio.c index ff1dea323cf..3e108cdc35d 100644 --- a/test/dm/virtio.c +++ b/test/dm/virtio.c @@ -7,7 +7,6 @@ #include #include #include -#include #include #include #include @@ -15,78 +14,6 @@ #include #include -/* Basic test of the virtio uclass */ -static int dm_test_virtio_base(struct unit_test_state *uts) -{ - struct udevice *bus, *dev; - u8 status; - - /* check probe success */ - ut_assertok(uclass_first_device(UCLASS_VIRTIO, &bus)); - ut_assertnonnull(bus); - - /* check the child virtio-blk device is bound */ - ut_assertok(device_find_first_child(bus, &dev)); - ut_assertnonnull(dev); - ut_assertok(strcmp(dev->name, "virtio-blk#0")); - - /* check driver status */ - ut_assertok(virtio_get_status(dev, &status)); - ut_asserteq(VIRTIO_CONFIG_S_ACKNOWLEDGE, status); - - return 0; -} -DM_TEST(dm_test_virtio_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); - -/* Test all of the virtio uclass ops */ -static int dm_test_virtio_all_ops(struct unit_test_state *uts) -{ - struct udevice *bus, *dev; - struct virtio_dev_priv *uc_priv; - uint offset = 0, len = 0, nvqs = 1; - void *buffer = NULL; - u8 status; - u32 counter; - u64 features; - struct virtqueue *vqs[2]; - - /* check probe success */ - ut_assertok(uclass_first_device(UCLASS_VIRTIO, &bus)); - ut_assertnonnull(bus); - - /* check the child virtio-blk device is bound */ - ut_assertok(device_find_first_child(bus, &dev)); - ut_assertnonnull(dev); - - /* - * fake the virtio device probe by filling in uc_priv->vdev - * which is used by virtio_find_vqs/virtio_del_vqs. - */ - uc_priv = dev_get_uclass_priv(bus); - ut_assertnonnull(uc_priv); - uc_priv->vdev = dev; - - /* test virtio_xxx APIs */ - ut_assertok(virtio_get_config(dev, offset, buffer, len)); - ut_assertok(virtio_set_config(dev, offset, buffer, len)); - ut_asserteq(-ENOSYS, virtio_generation(dev, &counter)); - ut_assertok(virtio_set_status(dev, VIRTIO_CONFIG_S_DRIVER_OK)); - ut_assertok(virtio_get_status(dev, &status)); - ut_asserteq(VIRTIO_CONFIG_S_DRIVER_OK, status); - ut_assertok(virtio_reset(dev)); - ut_assertok(virtio_get_status(dev, &status)); - ut_asserteq(0, status); - ut_assertok(virtio_get_features(dev, &features)); - ut_asserteq_64(BIT_ULL(VIRTIO_F_VERSION_1), features); - ut_assertok(virtio_set_features(dev)); - ut_assertok(virtio_find_vqs(dev, nvqs, vqs)); - ut_assertok(virtio_notify(dev, vqs[0])); - ut_assertok(virtio_del_vqs(dev)); - - return 0; -} -DM_TEST(dm_test_virtio_all_ops, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); - /* Test of the virtio driver that does not have required driver ops */ static int dm_test_virtio_missing_ops(struct unit_test_state *uts) { @@ -104,101 +31,3 @@ static int dm_test_virtio_missing_ops(struct unit_test_state *uts) return 0; } DM_TEST(dm_test_virtio_missing_ops, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); - -/* Test removal of virtio device driver */ -static int dm_test_virtio_remove(struct unit_test_state *uts) -{ - struct udevice *bus, *dev; - - /* check probe success */ - ut_assertok(uclass_first_device(UCLASS_VIRTIO, &bus)); - ut_assertnonnull(bus); - - /* check the child virtio-blk device is bound */ - ut_assertok(device_find_first_child(bus, &dev)); - ut_assertnonnull(dev); - - /* set driver status to VIRTIO_CONFIG_S_DRIVER_OK */ - ut_assertok(virtio_set_status(dev, VIRTIO_CONFIG_S_DRIVER_OK)); - - /* check the device can be successfully removed */ - dev_or_flags(dev, DM_FLAG_ACTIVATED); - ut_asserteq(-EKEYREJECTED, device_remove(bus, DM_REMOVE_ACTIVE_ALL)); - - ut_asserteq(false, device_active(dev)); - - return 0; -} -DM_TEST(dm_test_virtio_remove, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); - -/* Test all of the virtio ring */ -static int dm_test_virtio_ring(struct unit_test_state *uts) -{ - struct udevice *bus, *dev; - struct virtio_dev_priv *uc_priv; - struct virtqueue *vq; - struct virtio_sg sg[2]; - struct virtio_sg *sgs[2]; - unsigned int len; - u8 buffer[2][32]; - - /* check probe success */ - ut_assertok(uclass_first_device(UCLASS_VIRTIO, &bus)); - ut_assertnonnull(bus); - - /* check the child virtio-blk device is bound */ - ut_assertok(device_find_first_child(bus, &dev)); - ut_assertnonnull(dev); - - /* - * fake the virtio device probe by filling in uc_priv->vdev - * which is used by virtio_find_vqs/virtio_del_vqs. - */ - uc_priv = dev_get_uclass_priv(bus); - ut_assertnonnull(uc_priv); - uc_priv->vdev = dev; - - /* prepare the scatter-gather buffer */ - sg[0].addr = buffer[0]; - sg[0].length = sizeof(buffer[0]); - sg[1].addr = buffer[1]; - sg[1].length = sizeof(buffer[1]); - sgs[0] = &sg[0]; - sgs[1] = &sg[1]; - - /* read a buffer and report written size from device */ - ut_assertok(virtio_find_vqs(dev, 1, &vq)); - ut_assertok(virtqueue_add(vq, sgs, 0, 1)); - vq->vring.used->idx = 1; - vq->vring.used->ring[0].id = 0; - vq->vring.used->ring[0].len = 0x53355885; - ut_asserteq_ptr(buffer, virtqueue_get_buf(vq, &len)); - ut_asserteq(0x53355885, len); - ut_assertok(virtio_del_vqs(dev)); - - /* rejects used descriptors that aren't a chain head */ - ut_assertok(virtio_find_vqs(dev, 1, &vq)); - ut_assertok(virtqueue_add(vq, sgs, 0, 2)); - vq->vring.used->idx = 1; - vq->vring.used->ring[0].id = 1; - vq->vring.used->ring[0].len = 0x53355885; - ut_assertnull(virtqueue_get_buf(vq, &len)); - ut_assertok(virtio_del_vqs(dev)); - - /* device changes to descriptor are ignored */ - ut_assertok(virtio_find_vqs(dev, 1, &vq)); - ut_assertok(virtqueue_add(vq, sgs, 0, 1)); - vq->vring.desc[0].addr = cpu_to_virtio64(dev, 0xbadbad11); - vq->vring.desc[0].len = cpu_to_virtio32(dev, 0x11badbad); - vq->vring.desc[0].flags = cpu_to_virtio16(dev, VRING_DESC_F_NEXT); - vq->vring.desc[0].next = cpu_to_virtio16(dev, U16_MAX); - vq->vring.used->idx = 1; - vq->vring.used->ring[0].id = 0; - vq->vring.used->ring[0].len = 6; - ut_asserteq_ptr(buffer, virtqueue_get_buf(vq, &len)); - ut_asserteq(6, len); - ut_assertok(virtio_del_vqs(dev)); - - return 0; -} -DM_TEST(dm_test_virtio_ring, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); diff --git a/test/dm/virtio_device.c b/test/dm/virtio_device.c new file mode 100644 index 00000000000..46f4798fc29 --- /dev/null +++ b/test/dm/virtio_device.c @@ -0,0 +1,186 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018, Bin Meng + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Basic test of the virtio uclass */ +static int dm_test_virtio_base(struct unit_test_state *uts) +{ + struct udevice *bus, *dev; + u8 status; + + /* check probe success */ + ut_assertok(uclass_first_device(UCLASS_VIRTIO, &bus)); + ut_assertnonnull(bus); + + /* check the child virtio-blk device is bound */ + ut_assertok(device_find_first_child(bus, &dev)); + ut_assertnonnull(dev); + ut_assertok(strcmp(dev->name, "virtio-blk#0")); + + /* check driver status */ + ut_assertok(virtio_get_status(dev, &status)); + ut_asserteq(VIRTIO_CONFIG_S_ACKNOWLEDGE, status); + + return 0; +} +DM_TEST(dm_test_virtio_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); + +/* Test all of the virtio uclass ops */ +static int dm_test_virtio_all_ops(struct unit_test_state *uts) +{ + struct udevice *bus, *dev; + struct virtio_dev_priv *uc_priv; + uint offset = 0, len = 0, nvqs = 1; + void *buffer = NULL; + u8 status; + u32 counter; + u64 features; + struct virtqueue *vqs[2]; + + /* check probe success */ + ut_assertok(uclass_first_device(UCLASS_VIRTIO, &bus)); + ut_assertnonnull(bus); + + /* check the child virtio-rng device is bound */ + ut_assertok(device_find_first_child(bus, &dev)); + ut_assertnonnull(dev); + + /* + * fake the virtio device probe by filling in uc_priv->vdev + * which is used by virtio_find_vqs/virtio_del_vqs. + */ + uc_priv = dev_get_uclass_priv(bus); + ut_assertnonnull(uc_priv); + uc_priv->vdev = dev; + + /* test virtio_xxx APIs */ + ut_assertok(virtio_get_config(dev, offset, buffer, len)); + ut_assertok(virtio_set_config(dev, offset, buffer, len)); + ut_asserteq(-ENOSYS, virtio_generation(dev, &counter)); + ut_assertok(virtio_set_status(dev, VIRTIO_CONFIG_S_DRIVER_OK)); + ut_assertok(virtio_get_status(dev, &status)); + ut_asserteq(VIRTIO_CONFIG_S_DRIVER_OK, status); + ut_assertok(virtio_reset(dev)); + ut_assertok(virtio_get_status(dev, &status)); + ut_asserteq(0, status); + ut_assertok(virtio_get_features(dev, &features)); + ut_asserteq_64(BIT_ULL(VIRTIO_F_VERSION_1), features); + ut_assertok(virtio_set_features(dev)); + ut_assertok(virtio_find_vqs(dev, nvqs, vqs)); + ut_assertok(virtio_notify(dev, vqs[0])); + ut_assertok(virtio_del_vqs(dev)); + + return 0; +} +DM_TEST(dm_test_virtio_all_ops, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); + +/* Test removal of virtio device driver */ +static int dm_test_virtio_remove(struct unit_test_state *uts) +{ + struct udevice *bus, *dev; + + /* check probe success */ + ut_assertok(uclass_first_device(UCLASS_VIRTIO, &bus)); + ut_assertnonnull(bus); + + /* check the child virtio-rng device is bound */ + ut_assertok(device_find_first_child(bus, &dev)); + ut_assertnonnull(dev); + + /* set driver status to VIRTIO_CONFIG_S_DRIVER_OK */ + ut_assertok(virtio_set_status(dev, VIRTIO_CONFIG_S_DRIVER_OK)); + + /* check the device can be successfully removed */ + dev_or_flags(dev, DM_FLAG_ACTIVATED); + ut_asserteq(-EKEYREJECTED, device_remove(bus, DM_REMOVE_ACTIVE_ALL)); + + ut_asserteq(false, device_active(dev)); + + return 0; +} +DM_TEST(dm_test_virtio_remove, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); + +/* Test all of the virtio ring */ +static int dm_test_virtio_ring(struct unit_test_state *uts) +{ + struct udevice *bus, *dev; + struct virtio_dev_priv *uc_priv; + struct virtqueue *vq; + struct virtio_sg sg[2]; + struct virtio_sg *sgs[2]; + unsigned int len; + u8 buffer[2][32]; + + /* check probe success */ + ut_assertok(uclass_first_device(UCLASS_VIRTIO, &bus)); + ut_assertnonnull(bus); + + /* check the child virtio-blk device is bound */ + ut_assertok(device_find_first_child(bus, &dev)); + ut_assertnonnull(dev); + + /* + * fake the virtio device probe by filling in uc_priv->vdev + * which is used by virtio_find_vqs/virtio_del_vqs. + */ + uc_priv = dev_get_uclass_priv(bus); + ut_assertnonnull(uc_priv); + uc_priv->vdev = dev; + + /* prepare the scatter-gather buffer */ + sg[0].addr = buffer[0]; + sg[0].length = sizeof(buffer[0]); + sg[1].addr = buffer[1]; + sg[1].length = sizeof(buffer[1]); + sgs[0] = &sg[0]; + sgs[1] = &sg[1]; + + /* read a buffer and report written size from device */ + ut_assertok(virtio_find_vqs(dev, 1, &vq)); + ut_assertok(virtqueue_add(vq, sgs, 0, 1)); + vq->vring.used->idx = 1; + vq->vring.used->ring[0].id = 0; + vq->vring.used->ring[0].len = 0x53355885; + ut_asserteq_ptr(buffer, virtqueue_get_buf(vq, &len)); + ut_asserteq(0x53355885, len); + ut_assertok(virtio_del_vqs(dev)); + + /* rejects used descriptors that aren't a chain head */ + ut_assertok(virtio_find_vqs(dev, 1, &vq)); + ut_assertok(virtqueue_add(vq, sgs, 0, 2)); + vq->vring.used->idx = 1; + vq->vring.used->ring[0].id = 1; + vq->vring.used->ring[0].len = 0x53355885; + ut_assertnull(virtqueue_get_buf(vq, &len)); + ut_assertok(virtio_del_vqs(dev)); + + /* device changes to descriptor are ignored */ + ut_assertok(virtio_find_vqs(dev, 1, &vq)); + ut_assertok(virtqueue_add(vq, sgs, 0, 1)); + vq->vring.desc[0].addr = cpu_to_virtio64(dev, 0xbadbad11); + vq->vring.desc[0].len = cpu_to_virtio32(dev, 0x11badbad); + vq->vring.desc[0].flags = cpu_to_virtio16(dev, VRING_DESC_F_NEXT); + vq->vring.desc[0].next = cpu_to_virtio16(dev, U16_MAX); + vq->vring.used->idx = 1; + vq->vring.used->ring[0].id = 0; + vq->vring.used->ring[0].len = 6; + ut_asserteq_ptr(buffer, virtqueue_get_buf(vq, &len)); + ut_asserteq(6, len); + ut_assertok(virtio_del_vqs(dev)); + + return 0; +} +DM_TEST(dm_test_virtio_ring, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); -- GitLab From acd3b27a6564b94ffd2d4cf0c2726816bc1bffc3 Mon Sep 17 00:00:00 2001 From: Andrew Scull Date: Mon, 16 May 2022 10:41:37 +0000 Subject: [PATCH 093/581] virtio: sandbox: Bind RNG rather than block device The virtio-rng driver is extremely simple, making it suitable for testing more of the virtio uclass logic. Have the sandbox driver bind the virtio-rng driver rather than the virtio-blk driver so it can be used in tests. Signed-off-by: Andrew Scull Reviewed-by: Simon Glass --- drivers/virtio/virtio_sandbox.c | 2 +- test/dm/Makefile | 2 +- test/dm/virtio_device.c | 4 ++-- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/virtio/virtio_sandbox.c b/drivers/virtio/virtio_sandbox.c index a73b1234544..5484ae3a1a0 100644 --- a/drivers/virtio/virtio_sandbox.c +++ b/drivers/virtio/virtio_sandbox.c @@ -161,7 +161,7 @@ static int virtio_sandbox_probe(struct udevice *udev) /* fake some information for testing */ priv->device_features = BIT_ULL(VIRTIO_F_VERSION_1); - uc_priv->device = VIRTIO_ID_BLOCK; + uc_priv->device = VIRTIO_ID_RNG; uc_priv->vendor = ('u' << 24) | ('b' << 16) | ('o' << 8) | 't'; return 0; diff --git a/test/dm/Makefile b/test/dm/Makefile index 29dd143517b..809f0f239fa 100644 --- a/test/dm/Makefile +++ b/test/dm/Makefile @@ -109,7 +109,7 @@ obj-$(CONFIG_DM_USB) += usb.o obj-$(CONFIG_DM_VIDEO) += video.o ifeq ($(CONFIG_VIRTIO_SANDBOX),y) obj-y += virtio.o -obj-$(CONFIG_VIRTIO_BLK) += virtio_device.o +obj-$(CONFIG_VIRTIO_RNG) += virtio_device.o endif ifeq ($(CONFIG_WDT_GPIO)$(CONFIG_WDT_SANDBOX),yy) obj-y += wdt.o diff --git a/test/dm/virtio_device.c b/test/dm/virtio_device.c index 46f4798fc29..f5f23497502 100644 --- a/test/dm/virtio_device.c +++ b/test/dm/virtio_device.c @@ -25,10 +25,10 @@ static int dm_test_virtio_base(struct unit_test_state *uts) ut_assertok(uclass_first_device(UCLASS_VIRTIO, &bus)); ut_assertnonnull(bus); - /* check the child virtio-blk device is bound */ + /* check the child virtio-rng device is bound */ ut_assertok(device_find_first_child(bus, &dev)); ut_assertnonnull(dev); - ut_assertok(strcmp(dev->name, "virtio-blk#0")); + ut_asserteq_str("virtio-rng#0", dev->name); /* check driver status */ ut_assertok(virtio_get_status(dev, &status)); -- GitLab From 420b3e51f4f64ebc6ab88f751f116e634894b231 Mon Sep 17 00:00:00 2001 From: Andrew Scull Date: Mon, 16 May 2022 10:41:38 +0000 Subject: [PATCH 094/581] test: dm: virtio: Test virtio device driver probing Once the virtio-rng driver has been bound, probe it to trigger the pre and post child probe hooks of the virtio uclass driver. Check the status of the virtio device to confirm it reached the expected state. Signed-off-by: Andrew Scull Reviewed-by: Simon Glass --- test/dm/virtio_device.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/test/dm/virtio_device.c b/test/dm/virtio_device.c index f5f23497502..d0195e6bf09 100644 --- a/test/dm/virtio_device.c +++ b/test/dm/virtio_device.c @@ -34,6 +34,15 @@ static int dm_test_virtio_base(struct unit_test_state *uts) ut_assertok(virtio_get_status(dev, &status)); ut_asserteq(VIRTIO_CONFIG_S_ACKNOWLEDGE, status); + /* probe the virtio-rng driver */ + ut_assertok(device_probe(dev)); + + /* check the device was reset and the driver picked up the device */ + ut_assertok(virtio_get_status(dev, &status)); + ut_asserteq(VIRTIO_CONFIG_S_DRIVER | + VIRTIO_CONFIG_S_DRIVER_OK | + VIRTIO_CONFIG_S_FEATURES_OK, status); + return 0; } DM_TEST(dm_test_virtio_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); -- GitLab From 43937a4f5e411b3a82014fe0fa78ef4de90b11c2 Mon Sep 17 00:00:00 2001 From: Andrew Scull Date: Mon, 16 May 2022 10:41:39 +0000 Subject: [PATCH 095/581] virtio: rng: Check length before copying Check the length of data written by the device is consistent with the size of the buffers to avoid out-of-bounds memory accesses in case values aren't consistent. Signed-off-by: Andrew Scull Cc: Sughosh Ganu Reviewed-by: Simon Glass --- drivers/virtio/virtio_rng.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/virtio/virtio_rng.c b/drivers/virtio/virtio_rng.c index 9314c0a03ed..b85545c2ee5 100644 --- a/drivers/virtio/virtio_rng.c +++ b/drivers/virtio/virtio_rng.c @@ -41,6 +41,9 @@ static int virtio_rng_read(struct udevice *dev, void *data, size_t len) while (!virtqueue_get_buf(priv->rng_vq, &rsize)) ; + if (rsize > sg.length) + return -EIO; + memcpy(ptr, buf, rsize); len -= rsize; ptr += rsize; -- GitLab From d036104a02995efe416dd5ada503408ae37b56a5 Mon Sep 17 00:00:00 2001 From: Andrew Scull Date: Mon, 16 May 2022 10:41:40 +0000 Subject: [PATCH 096/581] test: dm: virtio_rng: Test virtio-rng with faked device Add a regression test for virtio-rng reading beyond the end of its buffer if the virtio device provides an invalid length. Signed-off-by: Andrew Scull Reviewed-by: Simon Glass --- test/dm/Makefile | 1 + test/dm/virtio_rng.c | 52 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 53 insertions(+) create mode 100644 test/dm/virtio_rng.c diff --git a/test/dm/Makefile b/test/dm/Makefile index 809f0f239fa..caea52f4e2a 100644 --- a/test/dm/Makefile +++ b/test/dm/Makefile @@ -110,6 +110,7 @@ obj-$(CONFIG_DM_VIDEO) += video.o ifeq ($(CONFIG_VIRTIO_SANDBOX),y) obj-y += virtio.o obj-$(CONFIG_VIRTIO_RNG) += virtio_device.o +obj-$(CONFIG_VIRTIO_RNG) += virtio_rng.o endif ifeq ($(CONFIG_WDT_GPIO)$(CONFIG_WDT_SANDBOX),yy) obj-y += wdt.o diff --git a/test/dm/virtio_rng.c b/test/dm/virtio_rng.c new file mode 100644 index 00000000000..ff5646b4e11 --- /dev/null +++ b/test/dm/virtio_rng.c @@ -0,0 +1,52 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2022 Google, Inc. + * Written by Andrew Scull + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* This is a brittle means of getting access to the virtqueue */ +struct virtio_rng_priv { + struct virtqueue *rng_vq; +}; + +/* Test the virtio-rng driver validates the used size */ +static int dm_test_virtio_rng_check_len(struct unit_test_state *uts) +{ + struct udevice *bus, *dev; + struct virtio_rng_priv *priv; + u8 buffer[16]; + + /* check probe success */ + ut_assertok(uclass_first_device(UCLASS_VIRTIO, &bus)); + ut_assertnonnull(bus); + + /* check the child virtio-rng device is bound */ + ut_assertok(device_find_first_child(bus, &dev)); + ut_assertnonnull(dev); + + /* probe the virtio-rng driver */ + ut_assertok(device_probe(dev)); + + /* simulate the device returning the buffer with too much data */ + priv = dev_get_priv(dev); + priv->rng_vq->vring.used->idx = 1; + priv->rng_vq->vring.used->ring[0].id = 0; + priv->rng_vq->vring.used->ring[0].len = U32_MAX; + + /* check the driver gracefully handles the error */ + ut_asserteq(-EIO, dm_rng_read(dev, buffer, sizeof(buffer))); + + return 0; +} +DM_TEST(dm_test_virtio_rng_check_len, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); -- GitLab From bedb182e32b38fa4078c0dc14d6822672273d96d Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Thu, 5 May 2022 13:11:30 -0400 Subject: [PATCH 097/581] sandbox: net: Add aliases for ethernet devices Commit f3dd213e15 ("net: introduce helpers to get PHY ofnode from MAC") changed the ethernet sequence assignment from uclass 36: ethernet 0 * eth@10002000 @ 05813460, seq 0 1 * eth@10003000 @ 05813550, seq 5 2 * sbe5 @ 05813640, seq 3 3 * eth@10004000 @ 05813730, seq 6 4 * dsa-test-eth @ 05813820, seq 4 5 * lan0 @ 05813a30, seq 2 6 * lan1 @ 05813b50, seq 7 to uclass 36: ethernet 0 * eth@10002000 @ 03813630, seq 0 1 * eth@10003000 @ 03813720, seq 5 2 * sbe5 @ 03813810, seq 3 3 * eth@10004000 @ 03813900, seq 6 4 phy-test-eth @ 038139f0, seq 7 5 * dsa-test-eth @ 03813ae0, seq 4 6 * lan0 @ 03813cf0, seq 2 7 * lan1 @ 03813e10, seq 8 This caused the mac address assignment to switch around. Avoid this in the future by assigning aliases for all ethernet devices. This reverts the sequence to what it was before the aformentioned commit (with phy-test-eth as seq 8). There is no ethernet1 for whatever reason. Signed-off-by: Sean Anderson --- arch/sandbox/dts/test.dts | 3 +++ test/dm/test-fdt.c | 2 +- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 8f93775ff4a..39d57f51102 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -28,6 +28,9 @@ ethernet3 = ð_3; ethernet4 = &dsa_eth0; ethernet5 = ð_5; + ethernet6 = "/eth@10004000"; + ethernet7 = &swp_1; + ethernet8 = &phy_eth0; gpio1 = &gpio_a; gpio2 = &gpio_b; gpio3 = &gpio_c; diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c index e1de066226c..f9e81747595 100644 --- a/test/dm/test-fdt.c +++ b/test/dm/test-fdt.c @@ -184,7 +184,7 @@ static int dm_test_alias_highest_id(struct unit_test_state *uts) int ret; ret = dev_read_alias_highest_id("ethernet"); - ut_asserteq(5, ret); + ut_asserteq(8, ret); ret = dev_read_alias_highest_id("gpio"); ut_asserteq(3, ret); -- GitLab From 469a968ac78dae8b3b324c9eafdfbf405cc1a076 Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Thu, 5 May 2022 13:11:31 -0400 Subject: [PATCH 098/581] sandbox: net: Add mac address for eth8 to environment The phy_eth0 interface introduced in commit f3dd213e15 ("net: introduce helpers to get PHY ofnode from MAC") uses a globally-administered address. Switch to using a locally-administered address, and add it to the sandbox environment, like the others. Signed-off-by: Sean Anderson --- board/sandbox/sandbox.env | 1 + 1 file changed, 1 insertion(+) diff --git a/board/sandbox/sandbox.env b/board/sandbox/sandbox.env index b4c04635a48..6dedc755fa8 100644 --- a/board/sandbox/sandbox.env +++ b/board/sandbox/sandbox.env @@ -11,6 +11,7 @@ eth3addr=02:00:11:22:33:45 eth4addr=02:00:11:22:33:48 eth5addr=02:00:11:22:33:46 eth6addr=02:00:11:22:33:47 +eth8addr=02:00:11:22:33:49 ipaddr=192.0.2.1 /* -- GitLab From df33fd28897b044166b7aae7e5dd5860c6f79af4 Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Thu, 5 May 2022 13:11:32 -0400 Subject: [PATCH 099/581] test: eth: Add test for ethernet addresses This adds a test to make sure that all the ethernet interfaces have their addresses read properly. At the moment everything is read from the environment, but the next few commits will add additional sources. Signed-off-by: Sean Anderson Reviewed-by: Simon Glass --- test/dm/eth.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/test/dm/eth.c b/test/dm/eth.c index e4ee6956106..5437f9ea4a0 100644 --- a/test/dm/eth.c +++ b/test/dm/eth.c @@ -147,6 +147,35 @@ static int dm_test_eth_act(struct unit_test_state *uts) } DM_TEST(dm_test_eth_act, UT_TESTF_SCAN_FDT); +/* Ensure that all addresses are loaded properly */ +static int dm_test_ethaddr(struct unit_test_state *uts) +{ + static const char *const addr[] = { + "02:00:11:22:33:44", + "02:00:11:22:33:48", /* dsa slave */ + "02:00:11:22:33:45", + "02:00:11:22:33:48", /* dsa master */ + "02:00:11:22:33:46", + "02:00:11:22:33:47", + "02:00:11:22:33:48", /* dsa slave */ + "02:00:11:22:33:49", + }; + int i; + + for (i = 0; i < ARRAY_SIZE(addr); i++) { + char addrname[10]; + + if (i) + snprintf(addrname, sizeof(addrname), "eth%daddr", i + 1); + else + strcpy(addrname, "ethaddr"); + ut_asserteq_str(addr[i], env_get(addrname)); + } + + return 0; +} +DM_TEST(dm_test_ethaddr, UT_TESTF_SCAN_FDT); + /* The asserts include a return on fail; cleanup in the caller */ static int _dm_test_eth_rotate1(struct unit_test_state *uts) { -- GitLab From 416e09b906afbbc2de4ec0072a502ac6eb54f41a Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Thu, 5 May 2022 13:11:33 -0400 Subject: [PATCH 100/581] sandbox: net: Remove fake-host-hwaddr Instead of reading a pseudo-rom mac address from the device tree, just use whatever we get from write_hwaddr. This has the effect of using the mac address from the environment (or from the device tree, if it is specified). Signed-off-by: Sean Anderson Reviewed-by: Simon Glass Acked-by: Ramon Fried --- arch/sandbox/dts/sandbox.dts | 1 - arch/sandbox/dts/sandbox64.dts | 1 - arch/sandbox/dts/test.dts | 6 ------ drivers/net/sandbox.c | 10 ++-------- 4 files changed, 2 insertions(+), 16 deletions(-) diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts index 18fde1c8c6f..21f00fcab5e 100644 --- a/arch/sandbox/dts/sandbox.dts +++ b/arch/sandbox/dts/sandbox.dts @@ -63,7 +63,6 @@ eth@10002000 { compatible = "sandbox,eth"; reg = <0x10002000 0x1000>; - fake-host-hwaddr = [00 00 66 44 22 00]; }; host-fs { diff --git a/arch/sandbox/dts/sandbox64.dts b/arch/sandbox/dts/sandbox64.dts index ec53106af9d..3eb04570891 100644 --- a/arch/sandbox/dts/sandbox64.dts +++ b/arch/sandbox/dts/sandbox64.dts @@ -58,7 +58,6 @@ eth@10002000 { compatible = "sandbox,eth"; reg = <0x0 0x10002000 0x0 0x1000>; - fake-host-hwaddr = [00 00 66 44 22 00]; }; i2c_0: i2c@0 { diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 39d57f51102..cf1abac5686 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -527,31 +527,26 @@ eth@10002000 { compatible = "sandbox,eth"; reg = <0x10002000 0x1000>; - fake-host-hwaddr = [00 00 66 44 22 00]; }; eth_5: eth@10003000 { compatible = "sandbox,eth"; reg = <0x10003000 0x1000>; - fake-host-hwaddr = [00 00 66 44 22 11]; }; eth_3: sbe5 { compatible = "sandbox,eth"; reg = <0x10005000 0x1000>; - fake-host-hwaddr = [00 00 66 44 22 33]; }; eth@10004000 { compatible = "sandbox,eth"; reg = <0x10004000 0x1000>; - fake-host-hwaddr = [00 00 66 44 22 22]; }; phy_eth0: phy-test-eth { compatible = "sandbox,eth"; reg = <0x10007000 0x1000>; - fake-host-hwaddr = [00 00 66 44 22 77]; phy-handle = <ðphy1>; phy-mode = "2500base-x"; }; @@ -559,7 +554,6 @@ dsa_eth0: dsa-test-eth { compatible = "sandbox,eth"; reg = <0x10006000 0x1000>; - fake-host-hwaddr = [00 00 66 44 22 66]; }; dsa-test { diff --git a/drivers/net/sandbox.c b/drivers/net/sandbox.c index 37459dfa0a4..13022addb6a 100644 --- a/drivers/net/sandbox.c +++ b/drivers/net/sandbox.c @@ -395,9 +395,11 @@ static void sb_eth_stop(struct udevice *dev) static int sb_eth_write_hwaddr(struct udevice *dev) { struct eth_pdata *pdata = dev_get_plat(dev); + struct eth_sandbox_priv *priv = dev_get_priv(dev); debug("eth_sandbox %s: Write HW ADDR - %pM\n", dev->name, pdata->enetaddr); + memcpy(priv->fake_host_hwaddr, pdata->enetaddr, ARP_HLEN); return 0; } @@ -419,16 +421,8 @@ static int sb_eth_of_to_plat(struct udevice *dev) { struct eth_pdata *pdata = dev_get_plat(dev); struct eth_sandbox_priv *priv = dev_get_priv(dev); - const u8 *mac; pdata->iobase = dev_read_addr(dev); - - mac = dev_read_u8_array_ptr(dev, "fake-host-hwaddr", ARP_HLEN); - if (!mac) { - printf("'fake-host-hwaddr' is missing from the DT\n"); - return -EINVAL; - } - memcpy(priv->fake_host_hwaddr, mac, ARP_HLEN); priv->disabled = false; priv->tx_handler = sb_default_handler; -- GitLab From 29186884f82111360e44c16e791c5077ad733761 Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Thu, 5 May 2022 13:11:34 -0400 Subject: [PATCH 101/581] sandbox: Remove eth2addr from environment DSA interfaces use the same mac address for each interface, unless instructed otherwise. Just set eth4addr and let eth2addr and eth7addr be set automatically. Signed-off-by: Sean Anderson Reviewed-by: Simon Glass --- board/sandbox/sandbox.env | 1 - 1 file changed, 1 deletion(-) diff --git a/board/sandbox/sandbox.env b/board/sandbox/sandbox.env index 6dedc755fa8..88ed7a96068 100644 --- a/board/sandbox/sandbox.env +++ b/board/sandbox/sandbox.env @@ -6,7 +6,6 @@ stdout=serial,vidconsole stderr=serial,vidconsole ethaddr=02:00:11:22:33:44 -eth2addr=02:00:11:22:33:48 eth3addr=02:00:11:22:33:45 eth4addr=02:00:11:22:33:48 eth5addr=02:00:11:22:33:46 -- GitLab From e844e5d9080604f1dab04f8f285c41335b6373bd Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Thu, 5 May 2022 13:11:35 -0400 Subject: [PATCH 102/581] sandbox: Move some mac addresses to device tree This prevents some conflicts when running sandbox with -D, since the "rom" mac address will be random and won't match the environment. We still need to keep addresses for eth1 and eth6 in the environment, because dm_test_eth_rotate expects to be able to disable them by removing their envaddr variables. This can likely be fixed in a future series by adding a function to cause sandbox eth_opts callback for a particular mac to fail immediately. Signed-off-by: Sean Anderson Reviewed-by: Simon Glass --- arch/sandbox/dts/test.dts | 4 ++++ board/sandbox/sandbox.env | 4 ---- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index cf1abac5686..13515dd7ecf 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -532,11 +532,13 @@ eth_5: eth@10003000 { compatible = "sandbox,eth"; reg = <0x10003000 0x1000>; + mac-address = [ 02 00 11 22 33 46 ]; }; eth_3: sbe5 { compatible = "sandbox,eth"; reg = <0x10005000 0x1000>; + mac-address = [ 02 00 11 22 33 45 ]; }; eth@10004000 { @@ -547,6 +549,7 @@ phy_eth0: phy-test-eth { compatible = "sandbox,eth"; reg = <0x10007000 0x1000>; + mac-address = [ 02 00 11 22 33 49 ]; phy-handle = <ðphy1>; phy-mode = "2500base-x"; }; @@ -554,6 +557,7 @@ dsa_eth0: dsa-test-eth { compatible = "sandbox,eth"; reg = <0x10006000 0x1000>; + mac-address = [ 02 00 11 22 33 48 ]; }; dsa-test { diff --git a/board/sandbox/sandbox.env b/board/sandbox/sandbox.env index 88ed7a96068..a2c19702d64 100644 --- a/board/sandbox/sandbox.env +++ b/board/sandbox/sandbox.env @@ -6,11 +6,7 @@ stdout=serial,vidconsole stderr=serial,vidconsole ethaddr=02:00:11:22:33:44 -eth3addr=02:00:11:22:33:45 -eth4addr=02:00:11:22:33:48 -eth5addr=02:00:11:22:33:46 eth6addr=02:00:11:22:33:47 -eth8addr=02:00:11:22:33:49 ipaddr=192.0.2.1 /* -- GitLab From 2a5af4049ccef538095bff67ce9770711db5ed58 Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Thu, 5 May 2022 13:11:36 -0400 Subject: [PATCH 103/581] net: dsa: Fix segmentation fault if master fails to probe If the DSA master fails to probe for whatever reason, then DSA devices will continue on as if nothing is wrong. This can cause incorrect behavior. In particular, on sandbox, dsa_sandbox_probe attempts to access the master's private data. This is only safe to do if the master has been probed first. Fix this by probing the master after we look it up, and bailing out if we get an error. Fixes: fc054d563b ("net: Introduce DSA class for Ethernet switches") Signed-off-by: Sean Anderson Reviewed-by: Vladimir Oltean --- net/dsa-uclass.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/net/dsa-uclass.c b/net/dsa-uclass.c index 9ff55a02fb2..3bf4351c847 100644 --- a/net/dsa-uclass.c +++ b/net/dsa-uclass.c @@ -477,8 +477,10 @@ static int dsa_pre_probe(struct udevice *dev) return -ENODEV; } - uclass_find_device_by_ofnode(UCLASS_ETH, pdata->master_node, - &priv->master_dev); + err = uclass_get_device_by_ofnode(UCLASS_ETH, pdata->master_node, + &priv->master_dev); + if (err) + return err; /* Simulate a probing event for the CPU port */ if (ops->port_probe) { -- GitLab From dda3b389201429a65746d99ad0e4e9e2bd9819b3 Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Thu, 5 May 2022 13:11:37 -0400 Subject: [PATCH 104/581] misc: i2c_eeprom: Make i2c_eeprom_write use a const buf i2c_eeprom_ops->write uses a const buf, so use one for the wrapper function as well. Signed-off-by: Sean Anderson Reviewed-by: Simon Glass --- drivers/misc/i2c_eeprom.c | 3 ++- include/i2c_eeprom.h | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/misc/i2c_eeprom.c b/drivers/misc/i2c_eeprom.c index 89a450d0f8d..4302e180acd 100644 --- a/drivers/misc/i2c_eeprom.c +++ b/drivers/misc/i2c_eeprom.c @@ -33,7 +33,8 @@ int i2c_eeprom_read(struct udevice *dev, int offset, uint8_t *buf, int size) return ops->read(dev, offset, buf, size); } -int i2c_eeprom_write(struct udevice *dev, int offset, uint8_t *buf, int size) +int i2c_eeprom_write(struct udevice *dev, int offset, const uint8_t *buf, + int size) { const struct i2c_eeprom_ops *ops = device_get_ops(dev); diff --git a/include/i2c_eeprom.h b/include/i2c_eeprom.h index 3ad565684fe..90fdb25232e 100644 --- a/include/i2c_eeprom.h +++ b/include/i2c_eeprom.h @@ -42,7 +42,8 @@ int i2c_eeprom_read(struct udevice *dev, int offset, uint8_t *buf, int size); * * Return: 0 on success, -ve on failure */ -int i2c_eeprom_write(struct udevice *dev, int offset, uint8_t *buf, int size); +int i2c_eeprom_write(struct udevice *dev, int offset, const uint8_t *buf, + int size); /* * i2c_eeprom_size() - get size of I2C EEPROM chip -- GitLab From 42f477f0ab2b179e6760f1f272b2611618082301 Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Thu, 5 May 2022 13:11:38 -0400 Subject: [PATCH 105/581] misc: i2c_eeprom: Add fallbacks Add some fallback functions for when i2c_eeprom is disabled. This allows code to reference i2c_eeprom_* functions without needing to check whether support has been compiled in. Signed-off-by: Sean Anderson --- include/i2c_eeprom.h | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/include/i2c_eeprom.h b/include/i2c_eeprom.h index 90fdb25232e..32dcb034973 100644 --- a/include/i2c_eeprom.h +++ b/include/i2c_eeprom.h @@ -6,6 +6,8 @@ #ifndef __I2C_EEPROM #define __I2C_EEPROM +struct udevice; + struct i2c_eeprom_ops { int (*read)(struct udevice *dev, int offset, uint8_t *buf, int size); int (*write)(struct udevice *dev, int offset, const uint8_t *buf, @@ -20,6 +22,7 @@ struct i2c_eeprom { unsigned long size; }; +#if CONFIG_IS_ENABLED(I2C_EEPROM) /* * i2c_eeprom_read() - read bytes from an I2C EEPROM chip * @@ -54,4 +57,25 @@ int i2c_eeprom_write(struct udevice *dev, int offset, const uint8_t *buf, */ int i2c_eeprom_size(struct udevice *dev); +#else /* !I2C_EEPROM */ + +static inline int i2c_eeprom_read(struct udevice *dev, int offset, uint8_t *buf, + int size) +{ + return -ENOSYS; +} + +static inline int i2c_eeprom_write(struct udevice *dev, int offset, + const uint8_t *buf, int size) +{ + return -ENOSYS; +} + +static inline int i2c_eeprom_size(struct udevice *dev) +{ + return -ENOSYS; +} + +#endif /* I2C_EEPROM */ + #endif -- GitLab From c8ce7ba87d1560babc9f1436035cf2b332f4f603 Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Thu, 5 May 2022 13:11:39 -0400 Subject: [PATCH 106/581] misc: Add support for nvmem cells This adds support for "nvmem cells" as seen in Linux. The nvmem device class in Linux is used for various assorted ROMs and EEPROMs. In this sense, it is similar to UCLASS_MISC, but also includes UCLASS_I2C_EEPROM, UCLASS_RTC, and UCLASS_MTD. New drivers corresponding to a Linux-style nvmem device should be implemented as one of the previously-mentioned uclasses. The nvmem API acts as a compatibility layer to adapt the (slightly different) APIs of these uclasses. It also handles the lookup of nvmem cells. While nvmem devices can be accessed directly, they are most often used by reading/writing contiguous values called "cells". Cells typically hold information like calibration, versions, or configuration (such as mac addresses). nvmem devices can specify "cells" in their device tree: qfprom: eeprom@700000 { #address-cells = <1>; #size-cells = <1>; reg = <0x00700000 0x100000>; /* ... */ tsens_calibration: calib@404 { reg = <0x404 0x10>; }; }; which can then be referenced like: tsens { /* ... */ nvmem-cells = <&tsens_calibration>; nvmem-cell-names = "calibration"; }; The tsens driver could then read the calibration value like: struct nvmem_cell cal_cell; u8 cal[16]; nvmem_cell_get_by_name(dev, "calibration", &cal_cell); nvmem_cell_read(&cal_cell, cal, sizeof(cal)); Because nvmem devices are not all of the same uclass, supported uclasses must register a nvmem_interface struct. This allows CONFIG_NVMEM to be enabled without depending on specific uclasses. At the moment, nvmem_interface is very bare-bones, and assumes that no initialization is necessary. However, this could be amended in the future. Although I2C_EEPROM and MISC are quite similar (and could likely be unified), they present different read/write function signatures. To abstract over this, NVMEM uses the same read/write signature as Linux. In particular, short read/writes are not allowed, which is allowed by MISC. The functionality implemented by nvmem cells is very similar to that provided by i2c_eeprom_partition. "fixed-partition"s for eeproms does not seem to have made its way into Linux or into any device tree other than sandbox. It is possible that with the introduction of this API it would be possible to remove it. Signed-off-by: Sean Anderson --- MAINTAINERS | 7 +++ doc/api/index.rst | 1 + doc/api/nvmem.rst | 10 +++ drivers/misc/Kconfig | 16 +++++ drivers/misc/Makefile | 1 + drivers/misc/nvmem.c | 142 ++++++++++++++++++++++++++++++++++++++++++ include/nvmem.h | 134 +++++++++++++++++++++++++++++++++++++++ 7 files changed, 311 insertions(+) create mode 100644 doc/api/nvmem.rst create mode 100644 drivers/misc/nvmem.c create mode 100644 include/nvmem.h diff --git a/MAINTAINERS b/MAINTAINERS index 28e4d382386..4ccefb7a11c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1091,6 +1091,13 @@ F: cmd/nvme.c F: include/nvme.h F: doc/develop/driver-model/nvme.rst +NVMEM +M: Sean Anderson +S: Maintained +F: doc/api/nvmem.rst +F: drivers/misc/nvmem.c +F: include/nvmem.h + NXP C45 TJA11XX PHY DRIVER M: Radu Pirea S: Maintained diff --git a/doc/api/index.rst b/doc/api/index.rst index 72fea981b72..a9338cfef9f 100644 --- a/doc/api/index.rst +++ b/doc/api/index.rst @@ -14,6 +14,7 @@ U-Boot API documentation linker_lists lmb logging + nvmem pinctrl rng sandbox diff --git a/doc/api/nvmem.rst b/doc/api/nvmem.rst new file mode 100644 index 00000000000..d9237846524 --- /dev/null +++ b/doc/api/nvmem.rst @@ -0,0 +1,10 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +NVMEM API +========= + +.. kernel-doc:: include/nvmem.h + :doc: Design + +.. kernel-doc:: include/nvmem.h + :internal: diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 419ddd31c0b..f368d52c561 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -43,6 +43,22 @@ config VPL_MISC set of generic read, write and ioctl methods may be used to access the device. +config NVMEM + bool "NVMEM support" + help + This adds support for a common interface to different types of + non-volatile memory. Consumers can use nvmem-cells properties to look + up hardware configuration data such as MAC addresses and calibration + settings. + +config SPL_NVMEM + bool "NVMEM support in SPL" + help + This adds support for a common interface to different types of + non-volatile memory. Consumers can use nvmem-cells properties to look + up hardware configuration data such as MAC addresses and calibration + settings. + config ALTERA_SYSID bool "Altera Sysid support" depends on MISC diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 7a6047f64f9..6c790308937 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -4,6 +4,7 @@ # Wolfgang Denk, DENX Software Engineering, wd@denx.de. obj-$(CONFIG_$(SPL_TPL_)MISC) += misc-uclass.o +obj-$(CONFIG_$(SPL_TPL_)NVMEM) += nvmem.o obj-$(CONFIG_$(SPL_TPL_)CROS_EC) += cros_ec.o obj-$(CONFIG_$(SPL_TPL_)CROS_EC_SANDBOX) += cros_ec_sandbox.o diff --git a/drivers/misc/nvmem.c b/drivers/misc/nvmem.c new file mode 100644 index 00000000000..5a2bd1f9f72 --- /dev/null +++ b/drivers/misc/nvmem.c @@ -0,0 +1,142 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 Sean Anderson + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +int nvmem_cell_read(struct nvmem_cell *cell, void *buf, size_t size) +{ + dev_dbg(cell->nvmem, "%s: off=%u size=%zu\n", __func__, cell->offset, size); + if (size != cell->size) + return -EINVAL; + + switch (cell->nvmem->driver->id) { + case UCLASS_I2C_EEPROM: + return i2c_eeprom_read(cell->nvmem, cell->offset, buf, size); + case UCLASS_MISC: { + int ret = misc_read(cell->nvmem, cell->offset, buf, size); + + if (ret < 0) + return ret; + if (ret != size) + return -EIO; + return 0; + } + case UCLASS_RTC: + return dm_rtc_read(cell->nvmem, cell->offset, buf, size); + default: + return -ENOSYS; + } +} + +int nvmem_cell_write(struct nvmem_cell *cell, const void *buf, size_t size) +{ + dev_dbg(cell->nvmem, "%s: off=%u size=%zu\n", __func__, cell->offset, size); + if (size != cell->size) + return -EINVAL; + + switch (cell->nvmem->driver->id) { + case UCLASS_I2C_EEPROM: + return i2c_eeprom_write(cell->nvmem, cell->offset, buf, size); + case UCLASS_MISC: { + int ret = misc_write(cell->nvmem, cell->offset, buf, size); + + if (ret < 0) + return ret; + if (ret != size) + return -EIO; + return 0; + } + case UCLASS_RTC: + return dm_rtc_write(cell->nvmem, cell->offset, buf, size); + default: + return -ENOSYS; + } +} + +/** + * nvmem_get_device() - Get an nvmem device for a cell + * @node: ofnode of the nvmem device + * @cell: Cell to look up + * + * Try to find a nvmem-compatible device by going through the nvmem interfaces. + * + * Return: + * * 0 on success + * * -ENODEV if we didn't find anything + * * A negative error if there was a problem looking up the device + */ +static int nvmem_get_device(ofnode node, struct nvmem_cell *cell) +{ + int i, ret; + enum uclass_id ids[] = { + UCLASS_I2C_EEPROM, + UCLASS_MISC, + UCLASS_RTC, + }; + + for (i = 0; i < ARRAY_SIZE(ids); i++) { + ret = uclass_get_device_by_ofnode(ids[i], node, &cell->nvmem); + if (!ret) + return 0; + if (ret != -ENODEV && ret != -EPFNOSUPPORT) + return ret; + } + + return -ENODEV; +} + +int nvmem_cell_get_by_index(struct udevice *dev, int index, + struct nvmem_cell *cell) +{ + fdt_addr_t offset; + fdt_size_t size = FDT_SIZE_T_NONE; + int ret; + struct ofnode_phandle_args args; + + dev_dbg(dev, "%s: index=%d\n", __func__, index); + + ret = dev_read_phandle_with_args(dev, "nvmem-cells", NULL, 0, index, + &args); + if (ret) + return ret; + + ret = nvmem_get_device(ofnode_get_parent(args.node), cell); + if (ret) + return ret; + + offset = ofnode_get_addr_size_index_notrans(args.node, 0, &size); + if (offset == FDT_ADDR_T_NONE || size == FDT_SIZE_T_NONE) { + dev_dbg(cell->nvmem, "missing address or size for %s\n", + ofnode_get_name(args.node)); + return -EINVAL; + } + + cell->offset = offset; + cell->size = size; + return 0; +} + +int nvmem_cell_get_by_name(struct udevice *dev, const char *name, + struct nvmem_cell *cell) +{ + int index; + + dev_dbg(dev, "%s, name=%s\n", __func__, name); + + index = dev_read_stringlist_search(dev, "nvmem-cell-names", name); + if (index < 0) + return index; + + return nvmem_cell_get_by_index(dev, index, cell); +} diff --git a/include/nvmem.h b/include/nvmem.h new file mode 100644 index 00000000000..822e698bdd4 --- /dev/null +++ b/include/nvmem.h @@ -0,0 +1,134 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2022 Sean Anderson + */ + +#ifndef NVMEM_H +#define NVMEM_H + +/** + * DOC: Design + * + * The NVMEM subsystem is a "meta-uclass" in that it abstracts over several + * different uclasses all with read/write APIs. One approach to implementing + * this could be to add a new sub-device for each nvmem-style device of + * UCLASS_NVMEM. This subsystem has taken the approach of using the existing + * access methods (i2c_eeprom_write, misc_write, etc.) directly. This has the + * advantage of not requiring an extra device/driver, saving on binary size and + * runtime memory usage. On the other hand, it is not idiomatic. Similar + * efforts should generally use a new uclass. + */ + +/** + * struct nvmem_cell - One datum within non-volatile memory + * @nvmem: The backing storage device + * @offset: The offset of the cell from the start of @nvmem + * @size: The size of the cell, in bytes + */ +struct nvmem_cell { + struct udevice *nvmem; + unsigned int offset; + size_t size; +}; + +struct udevice; + +#if CONFIG_IS_ENABLED(NVMEM) + +/** + * nvmem_cell_read() - Read the value of an nvmem cell + * @cell: The nvmem cell to read + * @buf: The buffer to read into + * @size: The size of @buf + * + * Return: + * * 0 on success + * * -EINVAL if @buf is not the same size as @cell. + * * -ENOSYS if CONFIG_NVMEM is disabled + * * A negative error if there was a problem reading the underlying storage + */ +int nvmem_cell_read(struct nvmem_cell *cell, void *buf, size_t size); + +/** + * nvmem_cell_write() - Write a value to an nvmem cell + * @cell: The nvmem cell to write + * @buf: The buffer to write from + * @size: The size of @buf + * + * Return: + * * 0 on success + * * -EINVAL if @buf is not the same size as @cell + * * -ENOSYS if @cell is read-only, or if CONFIG_NVMEM is disabled + * * A negative error if there was a problem writing the underlying storage + */ +int nvmem_cell_write(struct nvmem_cell *cell, const void *buf, size_t size); + +/** + * nvmem_cell_get_by_index() - Get an nvmem cell from a given device and index + * @dev: The device that uses the nvmem cell + * @index: The index of the cell in nvmem-cells + * @cell: The cell to initialize + * + * Look up the nvmem cell referenced by the phandle at @index in nvmem-cells in + * @dev. + * + * Return: + * * 0 on success + * * -EINVAL if the regs property is missing, empty, or undersized + * * -ENODEV if the nvmem device is missing or unimplemented + * * -ENOSYS if CONFIG_NVMEM is disabled + * * A negative error if there was a problem reading nvmem-cells or getting the + * device + */ +int nvmem_cell_get_by_index(struct udevice *dev, int index, + struct nvmem_cell *cell); + +/** + * nvmem_cell_get_by_name() - Get an nvmem cell from a given device and name + * @dev: The device that uses the nvmem cell + * @name: The name of the nvmem cell + * @cell: The cell to initialize + * + * Look up the nvmem cell referenced by @name in the nvmem-cell-names property + * of @dev. + * + * Return: + * * 0 on success + * * -EINVAL if the regs property is missing, empty, or undersized + * * -ENODEV if the nvmem device is missing or unimplemented + * * -ENODATA if @name is not in nvmem-cell-names + * * -ENOSYS if CONFIG_NVMEM is disabled + * * A negative error if there was a problem reading nvmem-cell-names, + * nvmem-cells, or getting the device + */ +int nvmem_cell_get_by_name(struct udevice *dev, const char *name, + struct nvmem_cell *cell); + +#else /* CONFIG_NVMEM */ + +static inline int nvmem_cell_read(struct nvmem_cell *cell, void *buf, int size) +{ + return -ENOSYS; +} + +static inline int nvmem_cell_write(struct nvmem_cell *cell, const void *buf, + int size) +{ + return -ENOSYS; +} + +static inline int nvmem_cell_get_by_index(struct udevice *dev, int index, + struct nvmem_cell *cell) +{ + return -ENOSYS; +} + +static inline int nvmem_cell_get_by_name(struct udevice *dev, const char *name, + struct nvmem_cell *cell) +{ + return -ENOSYS; +} + +#endif /* CONFIG_NVMEM */ + +#endif /* NVMEM_H */ -- GitLab From 185d3db7bea048bc2257c57fdc3a2edb79d7b36f Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Thu, 5 May 2022 13:11:40 -0400 Subject: [PATCH 107/581] sandbox: Enable NVMEM This enables NVMEM for all sandbox defconfigs, enabling it to be used in unit tests in the next few commits. Signed-off-by: Sean Anderson Reviewed-by: Simon Glass --- configs/sandbox64_defconfig | 1 + configs/sandbox_defconfig | 1 + configs/sandbox_flattree_defconfig | 1 + configs/sandbox_noinst_defconfig | 1 + configs/sandbox_spl_defconfig | 2 ++ 5 files changed, 6 insertions(+) diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index d7f22b39ae5..fc7e100eaaf 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -144,6 +144,7 @@ CONFIG_LED_GPIO=y CONFIG_DM_MAILBOX=y CONFIG_SANDBOX_MBOX=y CONFIG_MISC=y +CONFIG_NVMEM=y CONFIG_CROS_EC=y CONFIG_CROS_EC_I2C=y CONFIG_CROS_EC_LPC=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index c509a924e6b..d10cd289884 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -188,6 +188,7 @@ CONFIG_LED_GPIO=y CONFIG_DM_MAILBOX=y CONFIG_SANDBOX_MBOX=y CONFIG_MISC=y +CONFIG_NVMEM=y CONFIG_CROS_EC=y CONFIG_CROS_EC_I2C=y CONFIG_CROS_EC_LPC=y diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig index 80a4be47eba..6eb4e348a26 100644 --- a/configs/sandbox_flattree_defconfig +++ b/configs/sandbox_flattree_defconfig @@ -117,6 +117,7 @@ CONFIG_LED_GPIO=y CONFIG_DM_MAILBOX=y CONFIG_SANDBOX_MBOX=y CONFIG_MISC=y +CONFIG_NVMEM=y CONFIG_CROS_EC=y CONFIG_CROS_EC_I2C=y CONFIG_CROS_EC_LPC=y diff --git a/configs/sandbox_noinst_defconfig b/configs/sandbox_noinst_defconfig index c718374ed58..9ee70c29c1a 100644 --- a/configs/sandbox_noinst_defconfig +++ b/configs/sandbox_noinst_defconfig @@ -144,6 +144,7 @@ CONFIG_LED_GPIO=y CONFIG_DM_MAILBOX=y CONFIG_SANDBOX_MBOX=y CONFIG_MISC=y +CONFIG_NVMEM=y CONFIG_CROS_EC=y CONFIG_CROS_EC_I2C=y CONFIG_CROS_EC_LPC=y diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig index 45a6b81a3d2..b45f4782fd0 100644 --- a/configs/sandbox_spl_defconfig +++ b/configs/sandbox_spl_defconfig @@ -145,6 +145,8 @@ CONFIG_LED_GPIO=y CONFIG_DM_MAILBOX=y CONFIG_SANDBOX_MBOX=y CONFIG_MISC=y +CONFIG_NVMEM=y +CONFIG_SPL_NVMEM=y CONFIG_CROS_EC=y CONFIG_CROS_EC_I2C=y CONFIG_CROS_EC_LPC=y -- GitLab From 97d0f9bfdd025f0e7db8ff09238fe88d039c2a70 Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Thu, 5 May 2022 13:11:41 -0400 Subject: [PATCH 108/581] net: Add support for reading mac addresses from nvmem cells This adds support for reading mac addresses from the "mac-address" nvmem cell. If there is no (local-)mac-address property, then we will try reading from an nvmem cell. For some existing examples of this property, refer to imx8mn.dtsi and imx8mp.dtsi. Unfortunately, fuse drivers have not yet been converted to DM. Signed-off-by: Sean Anderson Reviewed-by: Simon Glass --- net/eth-uclass.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/net/eth-uclass.c b/net/eth-uclass.c index bcefc54ded8..0f6b45b002c 100644 --- a/net/eth-uclass.c +++ b/net/eth-uclass.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -507,17 +508,21 @@ static bool eth_dev_get_mac_address(struct udevice *dev, u8 mac[ARP_HLEN]) { #if CONFIG_IS_ENABLED(OF_CONTROL) const uint8_t *p; + struct nvmem_cell mac_cell; p = dev_read_u8_array_ptr(dev, "mac-address", ARP_HLEN); if (!p) p = dev_read_u8_array_ptr(dev, "local-mac-address", ARP_HLEN); - if (!p) - return false; + if (p) { + memcpy(mac, p, ARP_HLEN); + return true; + } - memcpy(mac, p, ARP_HLEN); + if (nvmem_cell_get_by_name(dev, "mac-address", &mac_cell)) + return false; - return true; + return !nvmem_cell_read(&mac_cell, mac, ARP_HLEN); #else return false; #endif -- GitLab From 472caa69e3480dc8e3fe1dd929b528a599341768 Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Thu, 5 May 2022 13:11:42 -0400 Subject: [PATCH 109/581] test: Load mac address with i2c eeprom This uses an i2c eeprom to load a mac address using the nvmem interface. Enable I2C_EEPROM for sandbox SPL since it is the only sandbox config which doesn't enable it eeprom. Signed-off-by: Sean Anderson Reviewed-by: Simon Glass --- arch/sandbox/dts/test.dts | 9 ++++++++- configs/sandbox_spl_defconfig | 1 + drivers/misc/i2c_eeprom_emul.c | 4 ++++ 3 files changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 13515dd7ecf..4d0fd474abe 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -538,7 +538,8 @@ eth_3: sbe5 { compatible = "sandbox,eth"; reg = <0x10005000 0x1000>; - mac-address = [ 02 00 11 22 33 45 ]; + nvmem-cells = <ð3_addr>; + nvmem-cell-names = "mac-address"; }; eth@10004000 { @@ -701,6 +702,8 @@ pinctrl-0 = <&pinmux_i2c0_pins>; eeprom@2c { + #address-cells = <1>; + #size-cells = <1>; reg = <0x2c>; compatible = "i2c-eeprom"; sandbox,emul = <&emul_eeprom>; @@ -712,6 +715,10 @@ reg = <10 2>; }; }; + + eth3_addr: mac-address@24 { + reg = <24 6>; + }; }; rtc_0: rtc@43 { diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig index b45f4782fd0..ec2d26d4436 100644 --- a/configs/sandbox_spl_defconfig +++ b/configs/sandbox_spl_defconfig @@ -155,6 +155,7 @@ CONFIG_CROS_EC_SPI=y CONFIG_P2SB=y CONFIG_PWRSEQ=y CONFIG_SPL_PWRSEQ=y +CONFIG_I2C_EEPROM=y CONFIG_MMC_SANDBOX=y CONFIG_SPI_FLASH_SANDBOX=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/drivers/misc/i2c_eeprom_emul.c b/drivers/misc/i2c_eeprom_emul.c index 85b127c406c..6f32087ede5 100644 --- a/drivers/misc/i2c_eeprom_emul.c +++ b/drivers/misc/i2c_eeprom_emul.c @@ -171,11 +171,15 @@ static int sandbox_i2c_eeprom_probe(struct udevice *dev) { struct sandbox_i2c_flash_plat_data *plat = dev_get_plat(dev); struct sandbox_i2c_flash *priv = dev_get_priv(dev); + /* For eth3 */ + const u8 mac[] = { 0x02, 0x00, 0x11, 0x22, 0x33, 0x45 }; priv->data = calloc(1, plat->size); if (!priv->data) return -ENOMEM; + memcpy(&priv->data[24], mac, sizeof(mac)); + return 0; } -- GitLab From d3f72878496cd4cccfe6c55defb4116f406effba Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Thu, 5 May 2022 13:11:43 -0400 Subject: [PATCH 110/581] test: Load mac address using RTC This uses the nvmem API to load a mac address from an RTC. Signed-off-by: Sean Anderson Reviewed-by: Simon Glass --- arch/sandbox/dts/test.dts | 9 ++++++++- drivers/rtc/i2c_rtc_emul.c | 10 ++++++++++ 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 4d0fd474abe..afcdda944d4 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -558,7 +558,8 @@ dsa_eth0: dsa-test-eth { compatible = "sandbox,eth"; reg = <0x10006000 0x1000>; - mac-address = [ 02 00 11 22 33 48 ]; + nvmem-cells = <ð4_addr>; + nvmem-cell-names = "mac-address"; }; dsa-test { @@ -722,9 +723,15 @@ }; rtc_0: rtc@43 { + #address-cells = <1>; + #size-cells = <1>; reg = <0x43>; compatible = "sandbox-rtc"; sandbox,emul = <&emul0>; + + eth4_addr: mac-address@40 { + reg = <0x40 6>; + }; }; rtc_1: rtc@61 { diff --git a/drivers/rtc/i2c_rtc_emul.c b/drivers/rtc/i2c_rtc_emul.c index ba418c25daf..c307d6036dd 100644 --- a/drivers/rtc/i2c_rtc_emul.c +++ b/drivers/rtc/i2c_rtc_emul.c @@ -203,6 +203,15 @@ static int sandbox_i2c_rtc_bind(struct udevice *dev) return 0; } +static int sandbox_i2c_rtc_probe(struct udevice *dev) +{ + const u8 mac[] = { 0x02, 0x00, 0x11, 0x22, 0x33, 0x48 }; + struct sandbox_i2c_rtc_plat_data *plat = dev_get_plat(dev); + + memcpy(&plat->reg[0x40], mac, sizeof(mac)); + return 0; +} + static const struct udevice_id sandbox_i2c_rtc_ids[] = { { .compatible = "sandbox,i2c-rtc-emul" }, { } @@ -213,6 +222,7 @@ U_BOOT_DRIVER(sandbox_i2c_rtc_emul) = { .id = UCLASS_I2C_EMUL, .of_match = sandbox_i2c_rtc_ids, .bind = sandbox_i2c_rtc_bind, + .probe = sandbox_i2c_rtc_probe, .priv_auto = sizeof(struct sandbox_i2c_rtc), .plat_auto = sizeof(struct sandbox_i2c_rtc_plat_data), .ops = &sandbox_i2c_rtc_emul_ops, -- GitLab From 3f51ba926bc138f54dab8d0fa0c363a3b1e71794 Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Thu, 5 May 2022 13:11:44 -0400 Subject: [PATCH 111/581] test: Load mac address using misc device This loads a mac address using a misc device using the nvmem interface. Signed-off-by: Sean Anderson --- arch/sandbox/dts/test.dts | 9 ++++++++- drivers/misc/misc_sandbox.c | 3 +++ 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index afcdda944d4..e068d0c8c56 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -532,7 +532,8 @@ eth_5: eth@10003000 { compatible = "sandbox,eth"; reg = <0x10003000 0x1000>; - mac-address = [ 02 00 11 22 33 46 ]; + nvmem-cells = <ð5_addr>; + nvmem-cell-names = "mac-address"; }; eth_3: sbe5 { @@ -913,7 +914,13 @@ }; misc-test { + #address-cells = <1>; + #size-cells = <1>; compatible = "sandbox,misc_sandbox"; + + eth5_addr: mac-address@10 { + reg = <0x10 6>; + }; }; mmc2 { diff --git a/drivers/misc/misc_sandbox.c b/drivers/misc/misc_sandbox.c index 0e4292fd0aa..31cde2dbac0 100644 --- a/drivers/misc/misc_sandbox.c +++ b/drivers/misc/misc_sandbox.c @@ -112,8 +112,11 @@ static const struct misc_ops misc_sandbox_ops = { int misc_sandbox_probe(struct udevice *dev) { struct misc_sandbox_priv *priv = dev_get_priv(dev); + /* For eth5 */ + const u8 mac[] = { 0x02, 0x00, 0x11, 0x22, 0x33, 0x46 }; priv->enabled = true; + memcpy(&priv->mem[16], mac, sizeof(mac)); return 0; } -- GitLab From 297daac43afb9c2a1d8876803ff6e4739bef1e13 Mon Sep 17 00:00:00 2001 From: Vaishnav Achath Date: Mon, 9 May 2022 11:50:09 +0530 Subject: [PATCH 112/581] arm: dts: k3-j721e-mcu-wakeup: Add HyperBus Controller node Add DT node for HyperBus Memory Controller and hbmc-mux in the FSS. hbmc-am654 driver uses syscon_get_regmap() call which fails with current compatible setting. Signed-off-by: Vaishnav Achath --- arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi index d2dceda72fe..22166c79425 100644 --- a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi @@ -170,12 +170,30 @@ }; fss: fss@47000000 { - compatible = "simple-bus"; + compatible = "syscon", "simple-mfd"; reg = <0x0 0x47000000 0x0 0x100>; #address-cells = <2>; #size-cells = <2>; ranges; + hbmc_mux: hbmc-mux { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x4 0x2>; /* HBMC select */ + }; + + hbmc: hyperbus@47034000 { + compatible = "ti,j721e-hbmc", "ti,am654-hbmc"; + reg = <0x0 0x47034000 0x0 0x100>, + <0x5 0x00000000 0x1 0x0000000>; + power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>; + #address-cells = <2>; + #size-cells = <1>; + mux-controls = <&hbmc_mux 0>; + assigned-clocks = <&k3_clks 102 0>; + assigned-clock-rates = <250000000>; + }; + ospi0: spi@47040000 { compatible = "ti,am654-ospi", "cdns,qspi-nor"; reg = <0x0 0x47040000 0x0 0x100>, -- GitLab From cbd7790a6929ef51585a5d733bba4f76f691d148 Mon Sep 17 00:00:00 2001 From: Vaishnav Achath Date: Mon, 9 May 2022 11:50:10 +0530 Subject: [PATCH 113/581] arm: dts: k3-j721e-som-p0: Add HyperFlash node J721e SoM as a 64MB HyperFlash on board. Add pinmux and DT node for the same. Signed-off-by: Vaishnav Achath --- arch/arm/dts/k3-j721e-som-p0.dtsi | 32 +++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm/dts/k3-j721e-som-p0.dtsi b/arch/arm/dts/k3-j721e-som-p0.dtsi index 2fee2906183..a7254358496 100644 --- a/arch/arm/dts/k3-j721e-som-p0.dtsi +++ b/arch/arm/dts/k3-j721e-som-p0.dtsi @@ -150,6 +150,25 @@ >; }; + mcu_fss0_hpb0_pins_default: mcu-fss0-hpb0-pins-default { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0x0, PIN_OUTPUT, 1) /* (E20) MCU_OSPI0_CLK.MCU_HYPERBUS0_CK */ + J721E_WKUP_IOPAD(0x4, PIN_OUTPUT, 1) /* (C21) MCU_OSPI0_LBCLKO.MCU_HYPERBUS0_CKn */ + J721E_WKUP_IOPAD(0x2c, PIN_OUTPUT, 1) /* (F19) MCU_OSPI0_CSn0.MCU_HYPERBUS0_CSn0 */ + J721E_WKUP_IOPAD(0x54, PIN_OUTPUT, 3) /* (E22) MCU_OSPI1_CSn1.MCU_HYPERBUS0_CSn1 */ + J721E_WKUP_IOPAD(0x30, PIN_OUTPUT, 1) /* (E19) MCU_OSPI0_CSn1.MCU_HYPERBUS0_RESETn */ + J721E_WKUP_IOPAD(0x8, PIN_INPUT, 1) /* (D21) MCU_OSPI0_DQS.MCU_HYPERBUS0_RWDS */ + J721E_WKUP_IOPAD(0xc, PIN_INPUT, 1) /* (D20) MCU_OSPI0_D0.MCU_HYPERBUS0_DQ0 */ + J721E_WKUP_IOPAD(0x10, PIN_INPUT, 1) /* (G19) MCU_OSPI0_D1.MCU_HYPERBUS0_DQ1 */ + J721E_WKUP_IOPAD(0x14, PIN_INPUT, 1) /* (G20) MCU_OSPI0_D2.MCU_HYPERBUS0_DQ2 */ + J721E_WKUP_IOPAD(0x18, PIN_INPUT, 1) /* (F20) MCU_OSPI0_D3.MCU_HYPERBUS0_DQ3 */ + J721E_WKUP_IOPAD(0x1c, PIN_INPUT, 1) /* (F21) MCU_OSPI0_D4.MCU_HYPERBUS0_DQ4 */ + J721E_WKUP_IOPAD(0x20, PIN_INPUT, 1) /* (E21) MCU_OSPI0_D5.MCU_HYPERBUS0_DQ5 */ + J721E_WKUP_IOPAD(0x24, PIN_INPUT, 1) /* (B22) MCU_OSPI0_D6.MCU_HYPERBUS0_DQ6 */ + J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1) /* (G21) MCU_OSPI0_D7.MCU_HYPERBUS0_DQ7 */ + >; + }; + mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default { pinctrl-single,pins = < J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_OSPI0_CLK */ @@ -167,6 +186,19 @@ }; }; +&hbmc { + status = "disabled"; + pinctrl-names = "default"; + pinctrl-0 = <&mcu_fss0_hpb0_pins_default>; + ranges = <0x0 0x0 0x5 0x0 0x4000000>, /* 64MB Flash on CS0 */ + <0x1 0x0 0x5 0x4000000 0x800000>; /* 8MB RAM on CS1 */ + + flash@0,0 { + compatible = "cypress,hyperflash", "cfi-flash"; + reg = <0x0 0x0 0x4000000>; + }; +}; + &ospi0 { pinctrl-names = "default"; pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; -- GitLab From 30426492d3d8b0dec878465c6e7a15a132191c66 Mon Sep 17 00:00:00 2001 From: Vaishnav Achath Date: Mon, 9 May 2022 11:50:11 +0530 Subject: [PATCH 114/581] arm: dts: k3-j721e-r5-common-proc-board: Add HyperFlash node J721e SoM as a 64MB HyperFlash on board. Add pinmux and DT node for the same. Signed-off-by: Vaishnav Achath --- .../arm/dts/k3-j721e-r5-common-proc-board.dts | 45 +++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts index a14b148e11f..ab9d6e65d8e 100644 --- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts @@ -129,6 +129,31 @@ >; }; + mcu_fss0_hpb0_pins_default: mcu-fss0-hpb0-pins-default { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0x0, PIN_OUTPUT, 1) /* (E20) MCU_OSPI0_CLK.MCU_HYPERBUS0_CK */ + J721E_WKUP_IOPAD(0x4, PIN_OUTPUT, 1) /* (C21) MCU_OSPI0_LBCLKO.MCU_HYPERBUS0_CKn */ + J721E_WKUP_IOPAD(0x2c, PIN_OUTPUT, 1) /* (F19) MCU_OSPI0_CSn0.MCU_HYPERBUS0_CSn0 */ + J721E_WKUP_IOPAD(0x54, PIN_OUTPUT, 3) /* (E22) MCU_OSPI1_CSn1.MCU_HYPERBUS0_CSn1 */ + J721E_WKUP_IOPAD(0x30, PIN_OUTPUT, 1) /* (E19) MCU_OSPI0_CSn1.MCU_HYPERBUS0_RESETn */ + J721E_WKUP_IOPAD(0x8, PIN_INPUT, 1) /* (D21) MCU_OSPI0_DQS.MCU_HYPERBUS0_RWDS */ + J721E_WKUP_IOPAD(0xc, PIN_INPUT, 1) /* (D20) MCU_OSPI0_D0.MCU_HYPERBUS0_DQ0 */ + J721E_WKUP_IOPAD(0x10, PIN_INPUT, 1) /* (G19) MCU_OSPI0_D1.MCU_HYPERBUS0_DQ1 */ + J721E_WKUP_IOPAD(0x14, PIN_INPUT, 1) /* (G20) MCU_OSPI0_D2.MCU_HYPERBUS0_DQ2 */ + J721E_WKUP_IOPAD(0x18, PIN_INPUT, 1) /* (F20) MCU_OSPI0_D3.MCU_HYPERBUS0_DQ3 */ + J721E_WKUP_IOPAD(0x1c, PIN_INPUT, 1) /* (F21) MCU_OSPI0_D4.MCU_HYPERBUS0_DQ4 */ + J721E_WKUP_IOPAD(0x20, PIN_INPUT, 1) /* (E21) MCU_OSPI0_D5.MCU_HYPERBUS0_DQ5 */ + J721E_WKUP_IOPAD(0x24, PIN_INPUT, 1) /* (B22) MCU_OSPI0_D6.MCU_HYPERBUS0_DQ6 */ + J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1) /* (G21) MCU_OSPI0_D7.MCU_HYPERBUS0_DQ7 */ + >; + }; + + wkup_gpio_pins_default: wkup-gpio-pins-default { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0xd0, PIN_INPUT, 7) /* WKUP_GPIO0_8 */ + >; + }; + mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default { pinctrl-single,pins = < J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_OSPI0_CLK */ @@ -207,6 +232,11 @@ status = "okay"; }; +&wkup_gpio0 { + pinctrl-names = "default"; + pinctrl-0 = <&wkup_gpio_pins_default>; +}; + &mcu_uart0 { /delete-property/ power-domains; /delete-property/ clocks; @@ -307,6 +337,21 @@ }; }; +&hbmc { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mcu_fss0_hpb0_pins_default>; + reg = <0x0 0x47040000 0x0 0x100>, + <0x0 0x50000000 0x0 0x8000000>; + ranges = <0x0 0x0 0x0 0x50000000 0x4000000>, /* 64MB Flash on CS0 */ + <0x1 0x0 0x0 0x54000000 0x800000>; /* 8MB flash on CS1 */ + + flash@0,0 { + compatible = "cypress,hyperflash", "cfi-flash"; + reg = <0x0 0x0 0x4000000>; + }; +}; + &ospi0 { pinctrl-names = "default"; pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; -- GitLab From fa4f5aabae81cd008070949738928f66e3de3828 Mon Sep 17 00:00:00 2001 From: Vaishnav Achath Date: Mon, 9 May 2022 11:50:12 +0530 Subject: [PATCH 115/581] arm: dts: k3-j721e-common-proc-board-u-boot: enable HyperFlash in SPL add u-boot,dm-spl pre-relocation property to enable hbmc in SPL. Signed-off-by: Vaishnav Achath --- .../k3-j721e-common-proc-board-u-boot.dtsi | 24 +++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi index 677a72d2a24..b2b81f804db 100644 --- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi @@ -192,6 +192,22 @@ u-boot,dm-spl; }; +&hbmc { + u-boot,dm-spl; + + flash@0,0 { + u-boot,dm-spl; + }; +}; + +&hbmc_mux { + u-boot,dm-spl; +}; + +&wkup_gpio0 { + u-boot,dm-spl; +}; + &ospi0 { u-boot,dm-spl; @@ -208,6 +224,14 @@ }; }; +&mcu_fss0_hpb0_pins_default { + u-boot,dm-spl; +}; + +&wkup_gpio_pins_default { + u-boot,dm-spl; +}; + &mcu_fss0_ospi1_pins_default { u-boot,dm-spl; }; -- GitLab From 8fceb0edf4dbd9359bec336f58fe6926bdaf26a0 Mon Sep 17 00:00:00 2001 From: Vaishnav Achath Date: Mon, 9 May 2022 11:50:13 +0530 Subject: [PATCH 116/581] arm: dts: k3-j721e-common-proc-board: enable hyperflash mux sel GPIO MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add wkup_gpio pinmux setting which will be used for performing the DT fixup for hbmc node according to mux selection state, on J721E EVM, hypermux sel is tied to ·WKUP_GPIO0_8. Signed-off-by: Vaishnav Achath --- arch/arm/dts/k3-j721e-common-proc-board.dts | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/dts/k3-j721e-common-proc-board.dts b/arch/arm/dts/k3-j721e-common-proc-board.dts index f3b6302a431..1b600547c06 100644 --- a/arch/arm/dts/k3-j721e-common-proc-board.dts +++ b/arch/arm/dts/k3-j721e-common-proc-board.dts @@ -213,6 +213,12 @@ >; }; + wkup_gpio_pins_default: wkup-gpio-pins-default { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0xd0, PIN_INPUT, 7) /* (C14) WKUP_GPIO0_8 */ + >; + }; + mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default { pinctrl-single,pins = < J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */ @@ -381,6 +387,11 @@ phy-names = "cdns3,usb3-phy"; }; +&wkup_gpio0 { + pinctrl-names = "default"; + pinctrl-0 = <&wkup_gpio_pins_default>; +}; + &usbss1 { pinctrl-names = "default"; pinctrl-0 = <&main_usbss1_pins_default>; -- GitLab From 09d14d7f10df48f9d3ded7a7621591a963bd1ab2 Mon Sep 17 00:00:00 2001 From: Vaishnav Achath Date: Mon, 9 May 2022 11:50:14 +0530 Subject: [PATCH 117/581] arm: k3: sysfw-loader: add hyperflash support add support for loading system firmware from hyperflash. Signed-off-by: Vaishnav Achath --- arch/arm/mach-k3/sysfw-loader.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm/mach-k3/sysfw-loader.c b/arch/arm/mach-k3/sysfw-loader.c index 5e48c36ccd5..988e7586292 100644 --- a/arch/arm/mach-k3/sysfw-loader.c +++ b/arch/arm/mach-k3/sysfw-loader.c @@ -346,6 +346,25 @@ static void k3_sysfw_spi_copy(u32 *dst, u32 *src, size_t len) } #endif +#if CONFIG_IS_ENABLED(NOR_SUPPORT) +static void *get_sysfw_hf_addr(void) +{ + struct udevice *dev; + fdt_addr_t addr; + int ret; + + ret = uclass_find_first_device(UCLASS_MTD, &dev); + if (ret) + return NULL; + + addr = dev_read_addr_index(dev, 1); + if (addr == FDT_ADDR_T_NONE) + return NULL; + + return (void *)(addr + CONFIG_K3_SYSFW_IMAGE_SPI_OFFS); +} +#endif + void k3_sysfw_loader(bool rom_loaded_sysfw, void (*config_pm_pre_callback)(void), void (*config_pm_done_callback)(void)) @@ -413,6 +432,15 @@ void k3_sysfw_loader(bool rom_loaded_sysfw, CONFIG_K3_SYSFW_IMAGE_SIZE_MAX); break; #endif +#if CONFIG_IS_ENABLED(NOR_SUPPORT) + case BOOT_DEVICE_HYPERFLASH: + sysfw_spi_base = get_sysfw_hf_addr(); + if (!sysfw_spi_base) + ret = -ENODEV; + k3_sysfw_spi_copy(sysfw_load_address, sysfw_spi_base, + CONFIG_K3_SYSFW_IMAGE_SIZE_MAX); + break; +#endif #if CONFIG_IS_ENABLED(YMODEM_SUPPORT) case BOOT_DEVICE_UART: #ifdef CONFIG_K3_EARLY_CONS -- GitLab From d45ccab483b83ab466fd48644642f058b314157c Mon Sep 17 00:00:00 2001 From: Vaishnav Achath Date: Mon, 9 May 2022 11:50:15 +0530 Subject: [PATCH 118/581] configs: j721e_evm.h: define CONFIG_SYS_FLASH_BASE Define CONFIG_SYS_FLASH_BASE to indicate start address of Flash memory Signed-off-by: Vaishnav Achath --- include/configs/j721e_evm.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index a81496145c6..c0b52558d81 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -17,6 +17,8 @@ /* DDR Configuration */ #define CONFIG_SYS_SDRAM_BASE1 0x880000000 +/* FLASH Configuration */ +#define CONFIG_SYS_FLASH_BASE 0x000000000 /* SPL Loader Configuration */ #if defined(CONFIG_TARGET_J721E_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM) -- GitLab From 66a33f41e9ba1bd257a906ede28e63aa305de83b Mon Sep 17 00:00:00 2001 From: Vaishnav Achath Date: Mon, 9 May 2022 11:50:16 +0530 Subject: [PATCH 119/581] ti: j721e: enable hyperflash spl fixup for j721e MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On j721e, its not possible to use OSPI0 and HBMC simultaneously as they are muxed within the Flash Subsystem hence disable HBMC by default and keep OSPI enabled. Bootloader will fixup DT when it detects HyperFlash mux selection instead of OSPI. Also updated detect_enable_hyperflash to use correct GPIO when checking hypermux selection state: * J7200 - hypermux sel connected to WKUP_GPIO0_6 * J721E - hypermux·sel·connected·to·WKUP_GPIO0_8 Signed-off-by: Vaishnav Achath --- board/ti/j721e/evm.c | 57 +++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 54 insertions(+), 3 deletions(-) diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c index e6ff54c065d..105461e1db6 100644 --- a/board/ti/j721e/evm.c +++ b/board/ti/j721e/evm.c @@ -109,11 +109,12 @@ int board_fit_config_name_match(const char *name) static void __maybe_unused detect_enable_hyperflash(void *blob) { struct gpio_desc desc = {0}; + char *hypermux_sel_gpio = (board_is_j721e_som()) ? "8" : "6"; - if (dm_gpio_lookup_name("6", &desc)) + if (dm_gpio_lookup_name(hypermux_sel_gpio, &desc)) return; - if (dm_gpio_request(&desc, "6")) + if (dm_gpio_request(&desc, hypermux_sel_gpio)) return; if (dm_gpio_set_dir_flags(&desc, GPIOD_IS_IN)) @@ -132,7 +133,8 @@ static void __maybe_unused detect_enable_hyperflash(void *blob) } #endif -#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TARGET_J7200_A72_EVM) +#if defined(CONFIG_SPL_BUILD) && (defined(CONFIG_TARGET_J7200_A72_EVM) || defined(CONFIG_TARGET_J7200_R5_EVM) || \ + defined(CONFIG_TARGET_J721E_A72_EVM) || defined(CONFIG_TARGET_J721E_R5_EVM)) void spl_perform_fixups(struct spl_image_info *spl_image) { detect_enable_hyperflash(spl_image->fdt_addr); @@ -490,6 +492,41 @@ int board_late_init(void) } #endif +static int __maybe_unused detect_SW3_1_state(void) +{ + if (IS_ENABLED(CONFIG_TARGET_J7200_A72_EVM) || IS_ENABLED(CONFIG_TARGET_J721E_A72_EVM)) { + struct gpio_desc desc = {0}; + int ret; + char *hypermux_sel_gpio = (board_is_j721e_som()) ? "8" : "6"; + + ret = dm_gpio_lookup_name(hypermux_sel_gpio, &desc); + if (ret) { + printf("error getting GPIO lookup name: %d\n", ret); + return ret; + } + + ret = dm_gpio_request(&desc, hypermux_sel_gpio); + if (ret) { + printf("error requesting GPIO: %d\n", ret); + goto err_free_gpio; + } + + ret = dm_gpio_set_dir_flags(&desc, GPIOD_IS_IN); + if (ret) { + printf("error setting direction flag of GPIO: %d\n", ret); + goto err_free_gpio; + } + + ret = dm_gpio_get_value(&desc); + if (ret < 0) + printf("error getting value of GPIO: %d\n", ret); + +err_free_gpio: + dm_gpio_free(desc.dev, &desc); + return ret; + } +} + void spl_board_init(void) { #if defined(CONFIG_ESM_K3) || defined(CONFIG_ESM_PMIC) @@ -522,4 +559,18 @@ void spl_board_init(void) printf("ESM PMIC init failed: %d\n", ret); } #endif + if ((IS_ENABLED(CONFIG_TARGET_J7200_A72_EVM) || IS_ENABLED(CONFIG_TARGET_J721E_A72_EVM)) && + IS_ENABLED(CONFIG_HBMC_AM654)) { + struct udevice *dev; + int ret; + + ret = detect_SW3_1_state(); + if (ret == 1) { + ret = uclass_get_device_by_driver(UCLASS_MTD, + DM_DRIVER_GET(hbmc_am654), + &dev); + if (ret) + debug("Failed to probe hyperflash\n"); + } + } } -- GitLab From d7ef2ef7c87528c359e110d7170e01a98aaecf14 Mon Sep 17 00:00:00 2001 From: Vaishnav Achath Date: Mon, 9 May 2022 11:50:17 +0530 Subject: [PATCH 120/581] configs: j721e_evm_defconfig: Add HBMC related configs Enable HBMC and HyperFlash in R5SPL, A72 SPL and A72 U-Boot Signed-off-by: Vaishnav Achath [trini: Update j721e_hs_evm_a72 as well] Signed-off-by: Tom Rini --- configs/j721e_evm_a72_defconfig | 4 ++++ configs/j721e_evm_r5_defconfig | 13 +++++++++++++ configs/j721e_hs_evm_a72_defconfig | 6 ++++++ 3 files changed, 23 insertions(+) diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index 4cb4adb25b2..1b57b5e3166 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -29,6 +29,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 # CONFIG_USE_SPL_FIT_GENERATOR is not set +CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run init_${boot}; run main_cpsw0_qsgmii_phyinit; run boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern" CONFIG_LOGLEVEL=7 CONFIG_SPL_MAX_SIZE=0xc0000 @@ -47,7 +48,9 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_I2C=y CONFIG_SPL_DM_MAILBOX=y +CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_DM_SPI_FLASH=y +CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_RAM_SUPPORT=y @@ -100,6 +103,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_CLK=y CONFIG_SPL_CLK=y diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index 385e77d846d..21ec66d7e4a 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y # CONFIG_USE_SPL_FIT_GENERATOR is not set +CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0xc0000 @@ -49,7 +50,9 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C=y CONFIG_SPL_DM_MAILBOX=y +CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_DM_SPI_FLASH=y +CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_RAM_SUPPORT=y @@ -72,6 +75,7 @@ CONFIG_CMD_REMOTEPROC=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y CONFIG_CMD_FAT=y +CONFIG_CMD_MTDPARTS=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_SPL_MULTI_DTB_FIT=y @@ -84,6 +88,8 @@ CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_CLK=y CONFIG_SPL_CLK=y @@ -112,6 +118,13 @@ CONFIG_MMC_SDHCI=y CONFIG_SPL_MMC_SDHCI_ADMA=y CONFIG_MMC_SDHCI_AM654=y CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y +CONFIG_HBMC_AM654=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/j721e_hs_evm_a72_defconfig b/configs/j721e_hs_evm_a72_defconfig index 0f803b83039..a1c8a374aea 100644 --- a/configs/j721e_hs_evm_a72_defconfig +++ b/configs/j721e_hs_evm_a72_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_K3=y CONFIG_TI_SECURE_DEVICE=y CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 @@ -10,6 +11,7 @@ CONFIG_SOC_K3_J721E=y CONFIG_TARGET_J721E_A72_EVM=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x680000 +CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-common-proc-board" CONFIG_SPL_TEXT_BASE=0x80080000 @@ -30,6 +32,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 # CONFIG_USE_SPL_FIT_GENERATOR is not set +CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run main_cpsw0_qsgmii_phyinit; run boot_rprocs; run get_fit_${boot}; run get_overlaystring; run run_fit" CONFIG_LOGLEVEL=7 CONFIG_SPL_MAX_SIZE=0xc0000 @@ -45,7 +48,9 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_I2C=y CONFIG_SPL_DM_MAILBOX=y +CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_DM_SPI_FLASH=y +CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_POWER_DOMAIN=y # CONFIG_SPL_SPI_FLASH_TINY is not set @@ -90,6 +95,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_CLK=y CONFIG_SPL_CLK=y -- GitLab From f8209d30512d2e9c994d32cccfceda3a1e065cab Mon Sep 17 00:00:00 2001 From: William Zhang Date: Mon, 9 May 2022 09:28:02 -0700 Subject: [PATCH 121/581] arm: bcmbca: introduce the bcmbca architecture and 47622 SOC This is the initial support for Broadcom's ARM-based 47622 SOC. In this change, our first SOC is an armv7 platform called 47622. The initial support includes a bare-bone implementation and dts with ARM PL011 uart. The SOC-specific code resides in arch/arm/mach-bcmbca/ and board related code is in board/broadcom/bcmba. The u-boot image can be loaded from flash or network to the entry point address in the memory and boot from there. Signed-off-by: William Zhang Signed-off-by: Kursad Oney Signed-off-by: Anand Gore Reviewed-by: Philippe Reynes --- MAINTAINERS | 11 +++ arch/arm/Kconfig | 7 ++ arch/arm/Makefile | 1 + arch/arm/dts/Makefile | 3 + arch/arm/dts/bcm47622.dtsi | 126 +++++++++++++++++++++++++ arch/arm/dts/bcm947622.dts | 30 ++++++ arch/arm/mach-bcmbca/Kconfig | 17 ++++ arch/arm/mach-bcmbca/Makefile | 6 ++ arch/arm/mach-bcmbca/bcm47622/Kconfig | 17 ++++ arch/arm/mach-bcmbca/bcm47622/Makefile | 5 + board/broadcom/bcmbca/Kconfig | 17 ++++ board/broadcom/bcmbca/Makefile | 5 + board/broadcom/bcmbca/board.c | 35 +++++++ configs/bcm947622_defconfig | 21 +++++ include/configs/bcm947622.h | 14 +++ 15 files changed, 315 insertions(+) create mode 100644 arch/arm/dts/bcm47622.dtsi create mode 100644 arch/arm/dts/bcm947622.dts create mode 100644 arch/arm/mach-bcmbca/Kconfig create mode 100644 arch/arm/mach-bcmbca/Makefile create mode 100644 arch/arm/mach-bcmbca/bcm47622/Kconfig create mode 100644 arch/arm/mach-bcmbca/bcm47622/Makefile create mode 100644 board/broadcom/bcmbca/Kconfig create mode 100644 board/broadcom/bcmbca/Makefile create mode 100644 board/broadcom/bcmbca/board.c create mode 100644 configs/bcm947622_defconfig create mode 100644 include/configs/bcm947622.h diff --git a/MAINTAINERS b/MAINTAINERS index 4ccefb7a11c..1ba36b62cc7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -206,6 +206,17 @@ F: drivers/pinctrl/broadcom/ F: configs/rpi_* T: git https://source.denx.de/u-boot/custodians/u-boot-arm.git +ARM BROADCOM BCMBCA +M: Anand Gore +M: William Zhang +M: Kursad Oney +M: Joel Peshkin +S: Maintained +F: arch/arm/mach-bcmbca/ +F: board/broadcom/bcmbca/ +F: configs/bcm947622_defconfig +F: include/configs/bcm947622.h + ARM BROADCOM BCMSTB M: Thomas Fitzsimmons S: Maintained diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9898c7d68e1..2f8c7935f86 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -718,6 +718,11 @@ config ARCH_BCMSTB This enables support for Broadcom ARM-based set-top box chipsets, including the 7445 family of chips. +config ARCH_BCMBCA + bool "Broadcom broadband chip family" + select DM + select OF_CONTROL + config TARGET_VEXPRESS_CA9X4 bool "Support vexpress_ca9x4" select CPU_V7A @@ -2187,6 +2192,8 @@ source "arch/arm/mach-at91/Kconfig" source "arch/arm/mach-bcm283x/Kconfig" +source "arch/arm/mach-bcmbca/Kconfig" + source "arch/arm/mach-bcmstb/Kconfig" source "arch/arm/mach-davinci/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 4afa8e4adf0..a342d72daac 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -59,6 +59,7 @@ machine-$(CONFIG_ARCH_APPLE) += apple machine-$(CONFIG_ARCH_ASPEED) += aspeed machine-$(CONFIG_ARCH_AT91) += at91 machine-$(CONFIG_ARCH_BCM283X) += bcm283x +machine-$(CONFIG_ARCH_BCMBCA) += bcmbca machine-$(CONFIG_ARCH_BCMSTB) += bcmstb machine-$(CONFIG_ARCH_DAVINCI) += davinci machine-$(CONFIG_ARCH_EXYNOS) += exynos diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 0a2713c06a3..d4d11fd2e12 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1154,6 +1154,9 @@ dtb-$(CONFIG_TARGET_BCMNS3) += ns3-board.dtb dtb-$(CONFIG_ARCH_BCMSTB) += bcm7xxx.dtb +dtb-$(CONFIG_BCM47622) += \ + bcm947622.dtb + dtb-$(CONFIG_ASPEED_AST2500) += ast2500-evb.dtb dtb-$(CONFIG_ASPEED_AST2600) += ast2600-evb.dtb diff --git a/arch/arm/dts/bcm47622.dtsi b/arch/arm/dts/bcm47622.dtsi new file mode 100644 index 00000000000..c016e12b737 --- /dev/null +++ b/arch/arm/dts/bcm47622.dtsi @@ -0,0 +1,126 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +#include +#include + +/ { + compatible = "brcm,bcm47622", "brcm,bcmbca"; + #address-cells = <1>; + #size-cells = <1>; + + interrupt-parent = <&gic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + CA7_0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x0>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + CA7_1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x1>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + CA7_2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x2>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + CA7_3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x3>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + L2_0: l2-cache0 { + compatible = "cache"; + }; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupts = , + , + , + ; + arm,cpu-registers-not-fw-configured; + }; + + pmu: pmu { + compatible = "arm,cortex-a7-pmu"; + interrupts = , + , + , + ; + interrupt-affinity = <&CA7_0>, <&CA7_1>, + <&CA7_2>, <&CA7_3>; + }; + + clocks: clocks { + periph_clk: periph-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + uart_clk: uart-clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clocks = <&periph_clk>; + clock-div = <4>; + clock-mult = <1>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + cpu_off = <1>; + cpu_on = <2>; + }; + + axi@81000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x81000000 0x818000>; + + gic: interrupt-controller@1000 { + compatible = "arm,cortex-a7-gic"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x1000 0x1000>, + <0x2000 0x2000>; + }; + }; + + bus@ff800000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xff800000 0x800000>; + + uart0: serial@12000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x12000 0x1000>; + interrupts = ; + clocks = <&uart_clk>, <&uart_clk>; + clock-names = "uartclk", "apb_pclk"; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/dts/bcm947622.dts b/arch/arm/dts/bcm947622.dts new file mode 100644 index 00000000000..6f083724ab8 --- /dev/null +++ b/arch/arm/dts/bcm947622.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2019 Broadcom Ltd. + */ + +/dts-v1/; + +#include "bcm47622.dtsi" + +/ { + model = "Broadcom BCM947622 Reference Board"; + compatible = "brcm,bcm947622", "brcm,bcm47622", "brcm,bcmbca"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x08000000>; + }; +}; + +&uart0 { + status = "okay"; +}; diff --git a/arch/arm/mach-bcmbca/Kconfig b/arch/arm/mach-bcmbca/Kconfig new file mode 100644 index 00000000000..2d49380f879 --- /dev/null +++ b/arch/arm/mach-bcmbca/Kconfig @@ -0,0 +1,17 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2022 Broadcom Ltd +# + +if ARCH_BCMBCA + +config BCM47622 + bool "Support for Broadcom 47622 Family" + select SYS_ARCH_TIMER + select CPU_V7A + select DM_SERIAL + select PL01X_SERIAL + +endif + +source "arch/arm/mach-bcmbca/bcm47622/Kconfig" diff --git a/arch/arm/mach-bcmbca/Makefile b/arch/arm/mach-bcmbca/Makefile new file mode 100644 index 00000000000..072d4ea7b5e --- /dev/null +++ b/arch/arm/mach-bcmbca/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2022 Broadcom Ltd +# + +obj-$(CONFIG_BCM47622) += bcm47622/ diff --git a/arch/arm/mach-bcmbca/bcm47622/Kconfig b/arch/arm/mach-bcmbca/bcm47622/Kconfig new file mode 100644 index 00000000000..bce30892e35 --- /dev/null +++ b/arch/arm/mach-bcmbca/bcm47622/Kconfig @@ -0,0 +1,17 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2022 Broadcom Ltd +# + +if BCM47622 + +config TARGET_BCM947622 + bool "Broadcom 47622 Reference Board" + depends on ARCH_BCMBCA + +config SYS_SOC + default "bcm47622" + +source "board/broadcom/bcmbca/Kconfig" + +endif diff --git a/arch/arm/mach-bcmbca/bcm47622/Makefile b/arch/arm/mach-bcmbca/bcm47622/Makefile new file mode 100644 index 00000000000..beb979af752 --- /dev/null +++ b/arch/arm/mach-bcmbca/bcm47622/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2022 Broadcom Ltd +# +obj- += dummy.o diff --git a/board/broadcom/bcmbca/Kconfig b/board/broadcom/bcmbca/Kconfig new file mode 100644 index 00000000000..63d4252da62 --- /dev/null +++ b/board/broadcom/bcmbca/Kconfig @@ -0,0 +1,17 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2022 Broadcom Ltd +# + +config SYS_BOARD + default "bcmbca" + +config SYS_VENDOR + default "broadcom" + +if TARGET_BCM947622 + +config SYS_CONFIG_NAME + default "bcm947622" + +endif diff --git a/board/broadcom/bcmbca/Makefile b/board/broadcom/bcmbca/Makefile new file mode 100644 index 00000000000..8f06c3111b9 --- /dev/null +++ b/board/broadcom/bcmbca/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2022 Broadcom Ltd + +obj-y += board.o diff --git a/board/broadcom/bcmbca/board.c b/board/broadcom/bcmbca/board.c new file mode 100644 index 00000000000..4aa1d659d5c --- /dev/null +++ b/board/broadcom/bcmbca/board.c @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2022 Broadcom Ltd. + */ + +#include +#include + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ + if (fdtdec_setup_mem_size_base() != 0) + puts("fdtdec_setup_mem_size_base() has failed\n"); + + return 0; +} + +int dram_init_banksize(void) +{ + fdtdec_setup_memory_banksize(); + return 0; +} + +int print_cpuinfo(void) +{ + return 0; +} + +void reset_cpu(ulong addr) +{ +} diff --git a/configs/bcm947622_defconfig b/configs/bcm947622_defconfig new file mode 100644 index 00000000000..af9e0c742c6 --- /dev/null +++ b/configs/bcm947622_defconfig @@ -0,0 +1,21 @@ +CONFIG_ARM=y +CONFIG_ARCH_BCMBCA=y +CONFIG_SYS_TEXT_BASE=0x01000000 +CONFIG_SYS_MALLOC_LEN=0x2000000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_BCM47622=y +CONFIG_TARGET_BCM947622=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="bcm947622" +CONFIG_IDENT_STRING=" Broadcom BCM47622" +CONFIG_SYS_LOAD_ADDR=0x01000000 +CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 +CONFIG_CMD_CACHE=y +CONFIG_OF_EMBED=y +CONFIG_CLK=y diff --git a/include/configs/bcm947622.h b/include/configs/bcm947622.h new file mode 100644 index 00000000000..3a02806878b --- /dev/null +++ b/include/configs/bcm947622.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2022 Broadcom Ltd. + */ + +#ifndef __BCM947622_H +#define __BCM947622_H + +#define CONFIG_SYS_BOOTM_LEN (32 * 1024 * 1024) + +#define CONFIG_SYS_SDRAM_BASE 0x00000000 + +#define COUNTER_FREQUENCY 50000000 +#endif -- GitLab From 161535444bd8b505d8b1ec16bb7a3389136b6555 Mon Sep 17 00:00:00 2001 From: "Derald D. Woods" Date: Sun, 15 May 2022 22:25:03 -0500 Subject: [PATCH 122/581] ARM: omap3: evm: Power on MMC when setting up PMIC This commit copies the related code changes from the BeagleBoard. Reference: - https://source.denx.de/u-boot/u-boot/-/commit/848cfe098f59c47a2542385513fb554430b874d6 Signed-off-by: Derald D. Woods --- board/ti/evm/evm.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/board/ti/evm/evm.c b/board/ti/evm/evm.c index 96434b3ba0f..39b5c706a95 100644 --- a/board/ti/evm/evm.c +++ b/board/ti/evm/evm.c @@ -159,6 +159,7 @@ void get_board_mem_timings(struct board_sdrc_timings *timings) int misc_init_r(void) { twl4030_power_init(); + twl4030_power_mmc_init(0); #if defined(CONFIG_SMC911X) setup_net_chip(); @@ -247,10 +248,3 @@ static void reset_net_chip(void) gpio_set_value(rst_gpio, 1); } #endif /* CONFIG_SMC911X */ - -#if defined(CONFIG_MMC) -void board_mmc_power_init(void) -{ - twl4030_power_mmc_init(0); -} -#endif /* CONFIG_MMC */ -- GitLab From 25d629b603bec7efa49f99e76855a7b66f3c09b5 Mon Sep 17 00:00:00 2001 From: "Derald D. Woods" Date: Sun, 15 May 2022 22:25:04 -0500 Subject: [PATCH 123/581] ARM: omap3: evm: Complete DM_I2C migration This commits enables DM_I2C and sets the default bus to 0. Signed-off-by: Derald D. Woods --- configs/omap3_evm_defconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig index 78b7a69ea35..41b197ddc82 100644 --- a/configs/omap3_evm_defconfig +++ b/configs/omap3_evm_defconfig @@ -63,8 +63,8 @@ CONFIG_SPL_OF_TRANSLATE=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x82000000 CONFIG_GPIO_HOG=y -CONFIG_SYS_I2C_LEGACY=y -CONFIG_SPL_SYS_I2C_LEGACY=y +CONFIG_DM_I2C=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_MMC_OMAP_HS=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y -- GitLab From d7116ca1d07a47901d5d8614110ad34c9e5600c3 Mon Sep 17 00:00:00 2001 From: "Derald D. Woods" Date: Sun, 15 May 2022 22:25:05 -0500 Subject: [PATCH 124/581] ARM: omap3: evm: Fix 'fitImage' booting This commit sets two additional variables in the default BOOTCOMMAND. Adding 'boot=mmc' and 'addr_fit=0x8b000000' removes the need for a special 'uEnv.txt' to be created. The 'addr_fit' variable is the key piece here. It is normally defined as 0x90000000, in the macro DEFAULT_FIT_TI_ARGS. For this OMAP34XX board, 0x8b000000 works without touching other varibles. This was tested with a 'fitImage' created using the following FIT source: ---------------------------------------------------------------------- /dts-v1/; / { description = "Simple image with single Linux kernel and FDT blob"; #address-cells = <1>; images { kernel { description = "Linux kernel: omap2plus"; data = /incbin/("./zImage"); type = "kernel"; arch = "arm"; os = "linux"; compression = "none"; load = <0x80008000>; entry = <0x80008000>; hash-1 { algo = "sha256"; }; }; fdt-omap3-evm.dtb { description = "FDT: omap3-evm.dtb"; data = /incbin/("./omap3-evm.dtb"); type = "flat_dt"; arch = "arm"; compression = "none"; load = <0x8ff00000>; hash-1 { algo = "sha256"; }; }; }; configurations { default = "conf-omap3-evm.dtb"; conf-omap3-evm.dtb { description = "Boot Linux kernel with FDT blob"; kernel = "kernel"; fdt = "fdt-omap3-evm.dtb"; }; }; }; ---------------------------------------------------------------------- Additionally, the default environment is now stored in "uboot.env" on the FAT partition of MMC '0'. Fixes: 11e2ab3f0b ("ARM: omap3: evm: Enable booting 'fitImage' with DEFAULT_FIT_TI_ARGS") Signed-off-by: Derald D. Woods --- configs/omap3_evm_defconfig | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig index 41b197ddc82..aa7a55e6a1c 100644 --- a/configs/omap3_evm_defconfig +++ b/configs/omap3_evm_defconfig @@ -12,7 +12,7 @@ CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 -CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run envboot; run distro_bootcmd" +CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then setenv boot mmc; setenv addr_fit 0x8b000000; run update_to_fit; run mmcboot; fi; run envboot; run distro_bootcmd" CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="omap3-evm.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -55,7 +55,10 @@ CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="clocks clock-names interrupt-parent" CONFIG_ENV_OVERWRITE=y -CONFIG_ENV_IS_IN_NAND=y +CONFIG_ENV_IS_IN_FAT=y +CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y -- GitLab From f49d616bea2f529b36e2d7fc892c9745eea3bce0 Mon Sep 17 00:00:00 2001 From: Jim Liu Date: Tue, 17 May 2022 16:30:32 +0800 Subject: [PATCH 125/581] pinctrl: nuvoton: Add NPCM7xx pinctrl driver Add Nuvoton BMC NPCM750 Pinmux and Pinconf support. Signed-off-by: Jim Liu --- drivers/pinctrl/Kconfig | 1 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/nuvoton/Kconfig | 7 + drivers/pinctrl/nuvoton/Makefile | 4 + drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 1607 +++++++++++++++++++++ 5 files changed, 1620 insertions(+) create mode 100644 drivers/pinctrl/nuvoton/Kconfig create mode 100644 drivers/pinctrl/nuvoton/Makefile create mode 100644 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 563d96d4f5d..d9b8287f41e 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -353,6 +353,7 @@ source "drivers/pinctrl/mscc/Kconfig" source "drivers/pinctrl/mtmips/Kconfig" source "drivers/pinctrl/mvebu/Kconfig" source "drivers/pinctrl/nexell/Kconfig" +source "drivers/pinctrl/nuvoton/Kconfig" source "drivers/pinctrl/nxp/Kconfig" source "drivers/pinctrl/renesas/Kconfig" source "drivers/pinctrl/rockchip/Kconfig" diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile index 9b4978253b9..3b167d099fc 100644 --- a/drivers/pinctrl/Makefile +++ b/drivers/pinctrl/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_ARCH_ASPEED) += aspeed/ obj-$(CONFIG_ARCH_ATH79) += ath79/ obj-$(CONFIG_PINCTRL_INTEL) += intel/ obj-$(CONFIG_ARCH_MTMIPS) += mtmips/ +obj-$(CONFIG_ARCH_NPCM) += nuvoton/ obj-$(CONFIG_ARCH_RMOBILE) += renesas/ obj-$(CONFIG_PINCTRL_SANDBOX) += pinctrl-sandbox.o obj-$(CONFIG_PINCTRL_SUNXI) += sunxi/ diff --git a/drivers/pinctrl/nuvoton/Kconfig b/drivers/pinctrl/nuvoton/Kconfig new file mode 100644 index 00000000000..07f65f7637f --- /dev/null +++ b/drivers/pinctrl/nuvoton/Kconfig @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0-only +config PINCTRL_NPCM7XX + bool "Pinctrl and GPIO driver for Nuvoton NPCM7XX" + depends on DM && PINCTRL_GENERIC && ARCH_NPCM7xx + help + Say Y here to enable pin controller and GPIO support + for Nuvoton NPCM750/730/715/705 SoCs. diff --git a/drivers/pinctrl/nuvoton/Makefile b/drivers/pinctrl/nuvoton/Makefile new file mode 100644 index 00000000000..886d00784ce --- /dev/null +++ b/drivers/pinctrl/nuvoton/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0 +# Nuvoton pinctrl support + +obj-$(CONFIG_PINCTRL_NPCM7XX) += pinctrl-npcm7xx.o diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c new file mode 100644 index 00000000000..f6e20415e2e --- /dev/null +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c @@ -0,0 +1,1607 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2020 Nuvoton Technology Corp. + * Author: Joseph Liu + * Author: Tomer Maimon + */ + +#include +#include +#include +#include +#include +#include +#include + +/* GCR registers */ +#define NPCM7XX_GCR_PDID 0x00 +#define NPCM7XX_GCR_MFSEL1 0x0C +#define NPCM7XX_GCR_MFSEL2 0x10 +#define NPCM7XX_GCR_MFSEL3 0x64 +#define NPCM7XX_GCR_MFSEL4 0xb0 +#define NPCM7XX_GCR_CPCTL 0xD0 +#define NPCM7XX_GCR_CP2BST 0xD4 +#define NPCM7XX_GCR_B2CPNT 0xD8 +#define NPCM7XX_GCR_I2CSEGSEL 0xE0 +#define NPCM7XX_GCR_I2CSEGCTL 0xE4 +#define NPCM7XX_GCR_INTCR2 0x60 +#define NPCM7XX_GCR_SRCNT 0x68 +#define NPCM7XX_GCR_RESSR 0x6C +#define NPCM7XX_GCR_FLOCKR1 0x74 +#define NPCM7XX_GCR_DSCNT 0x78 + +#define SRCNT_ESPI BIT(3) + +/* reset registers */ +#define NPCM7XX_RST_WD0RCR 0x38 +#define NPCM7XX_RST_WD1RCR 0x3C +#define NPCM7XX_RST_WD2RCR 0x40 +#define NPCM7XX_RST_SWRSTC1 0x44 +#define NPCM7XX_RST_SWRSTC2 0x48 +#define NPCM7XX_RST_SWRSTC3 0x4C +#define NPCM7XX_RST_SWRSTC4 0x50 +#define NPCM7XX_RST_CORSTC 0x5C + +#define PORST BIT(31) +#define CORST BIT(30) +#define WD0RST BIT(29) +#define WD1RST BIT(24) +#define WD2RST BIT(23) + +#define GPIOX_MODULE_RESET 16 +#define CA9C_RESET BIT(0) + +/* GPIO registers */ +#define NPCM7XX_GP_N_TLOCK1 0x00 +#define NPCM7XX_GP_N_DIN 0x04 /* Data IN */ +#define NPCM7XX_GP_N_POL 0x08 /* Polarity */ +#define NPCM7XX_GP_N_DOUT 0x0c /* Data OUT */ +#define NPCM7XX_GP_N_OE 0x10 /* Output Enable */ +#define NPCM7XX_GP_N_OTYP 0x14 +#define NPCM7XX_GP_N_MP 0x18 +#define NPCM7XX_GP_N_PU 0x1c /* Pull-up */ +#define NPCM7XX_GP_N_PD 0x20 /* Pull-down */ +#define NPCM7XX_GP_N_DBNC 0x24 /* Debounce */ +#define NPCM7XX_GP_N_EVTYP 0x28 /* Event Type */ +#define NPCM7XX_GP_N_EVBE 0x2c /* Event Both Edge */ +#define NPCM7XX_GP_N_OBL0 0x30 +#define NPCM7XX_GP_N_OBL1 0x34 +#define NPCM7XX_GP_N_OBL2 0x38 +#define NPCM7XX_GP_N_OBL3 0x3c +#define NPCM7XX_GP_N_EVEN 0x40 /* Event Enable */ +#define NPCM7XX_GP_N_EVENS 0x44 /* Event Set (enable) */ +#define NPCM7XX_GP_N_EVENC 0x48 /* Event Clear (disable) */ +#define NPCM7XX_GP_N_EVST 0x4c /* Event Status */ +#define NPCM7XX_GP_N_SPLCK 0x50 +#define NPCM7XX_GP_N_MPLCK 0x54 +#define NPCM7XX_GP_N_IEM 0x58 /* Input Enable */ +#define NPCM7XX_GP_N_OSRC 0x5c +#define NPCM7XX_GP_N_ODSC 0x60 +#define NPCM7XX_GP_N_DOS 0x68 /* Data OUT Set */ +#define NPCM7XX_GP_N_DOC 0x6c /* Data OUT Clear */ +#define NPCM7XX_GP_N_OES 0x70 /* Output Enable Set */ +#define NPCM7XX_GP_N_OEC 0x74 /* Output Enable Clear */ +#define NPCM7XX_GP_N_TLOCK2 0x7c + +#define NPCM7XX_GPIO_BANK_OFFSET 0x1000 +#define NPCM7XX_GPIO_PER_BITS 32 +#define NPCM7XX_GPIO_PER_BANK 32 +#define NPCM7XX_GPIO_BANK_NUM 8 +#define NPCM7XX_GCR_NONE 0 + +/* pinmux handing in the pinctrl driver*/ +static const int smb0_pins[] = { 115, 114 }; +static const int smb0b_pins[] = { 195, 194 }; +static const int smb0c_pins[] = { 202, 196 }; +static const int smb0d_pins[] = { 198, 199 }; +static const int smb0den_pins[] = { 197 }; + +static const int smb1_pins[] = { 117, 116 }; +static const int smb1b_pins[] = { 126, 127 }; +static const int smb1c_pins[] = { 124, 125 }; +static const int smb1d_pins[] = { 4, 5 }; + +static const int smb2_pins[] = { 119, 118 }; +static const int smb2b_pins[] = { 122, 123 }; +static const int smb2c_pins[] = { 120, 121 }; +static const int smb2d_pins[] = { 6, 7 }; + +static const int smb3_pins[] = { 30, 31 }; +static const int smb3b_pins[] = { 39, 40 }; +static const int smb3c_pins[] = { 37, 38 }; +static const int smb3d_pins[] = { 59, 60 }; + +static const int smb4_pins[] = { 28, 29 }; +static const int smb4b_pins[] = { 18, 19 }; +static const int smb4c_pins[] = { 20, 21 }; +static const int smb4d_pins[] = { 22, 23 }; +static const int smb4den_pins[] = { 17 }; + +static const int smb5_pins[] = { 26, 27 }; +static const int smb5b_pins[] = { 13, 12 }; +static const int smb5c_pins[] = { 15, 14 }; +static const int smb5d_pins[] = { 94, 93 }; +static const int ga20kbc_pins[] = { 94, 93 }; + +static const int smb6_pins[] = { 172, 171 }; +static const int smb7_pins[] = { 174, 173 }; +static const int smb8_pins[] = { 129, 128 }; +static const int smb9_pins[] = { 131, 130 }; +static const int smb10_pins[] = { 133, 132 }; +static const int smb11_pins[] = { 135, 134 }; +static const int smb12_pins[] = { 221, 220 }; +static const int smb13_pins[] = { 223, 222 }; +static const int smb14_pins[] = { 22, 23 }; +static const int smb15_pins[] = { 20, 21 }; + +static const int fanin0_pins[] = { 64 }; +static const int fanin1_pins[] = { 65 }; +static const int fanin2_pins[] = { 66 }; +static const int fanin3_pins[] = { 67 }; +static const int fanin4_pins[] = { 68 }; +static const int fanin5_pins[] = { 69 }; +static const int fanin6_pins[] = { 70 }; +static const int fanin7_pins[] = { 71 }; +static const int fanin8_pins[] = { 72 }; +static const int fanin9_pins[] = { 73 }; +static const int fanin10_pins[] = { 74 }; +static const int fanin11_pins[] = { 75 }; +static const int fanin12_pins[] = { 76 }; +static const int fanin13_pins[] = { 77 }; +static const int fanin14_pins[] = { 78 }; +static const int fanin15_pins[] = { 79 }; +static const int faninx_pins[] = { 175, 176, 177, 203 }; + +static const int pwm0_pins[] = { 80 }; +static const int pwm1_pins[] = { 81 }; +static const int pwm2_pins[] = { 82 }; +static const int pwm3_pins[] = { 83 }; +static const int pwm4_pins[] = { 144 }; +static const int pwm5_pins[] = { 145 }; +static const int pwm6_pins[] = { 146 }; +static const int pwm7_pins[] = { 147 }; + +static const int uart1_pins[] = { 43, 44, 45, 46, 47, 61, 62, 63 }; +static const int uart2_pins[] = { 48, 49, 50, 51, 52, 53, 54, 55 }; + +/* RGMII 1 pin group */ +static const int rg1_pins[] = { 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, + 106, 107 }; +/* RGMII 1 MD interface pin group */ +static const int rg1mdio_pins[] = { 108, 109 }; + +/* RGMII 2 pin group */ +static const int rg2_pins[] = { 110, 111, 112, 113, 208, 209, 210, 211, 212, + 213, 214, 215 }; +/* RGMII 2 MD interface pin group */ +static const int rg2mdio_pins[] = { 216, 217 }; + +static const int ddr_pins[] = { 110, 111, 112, 113, 208, 209, 210, 211, 212, + 213, 214, 215, 216, 217 }; +/* Serial I/O Expander 1 */ +static const int iox1_pins[] = { 0, 1, 2, 3 }; +/* Serial I/O Expander 2 */ +static const int iox2_pins[] = { 4, 5, 6, 7 }; +/* Host Serial I/O Expander 2 */ +static const int ioxh_pins[] = { 10, 11, 24, 25 }; + +static const int mmc_pins[] = { 152, 154, 156, 157, 158, 159 }; +static const int mmcwp_pins[] = { 153 }; +static const int mmccd_pins[] = { 155 }; +static const int mmcrst_pins[] = { 155 }; +static const int mmc8_pins[] = { 148, 149, 150, 151 }; + +/* RMII 1 pin groups */ +static const int r1_pins[] = { 178, 179, 180, 181, 182, 193, 201 }; +static const int r1err_pins[] = { 56 }; +static const int r1md_pins[] = { 57, 58 }; + +/* RMII 2 pin groups */ +static const int r2_pins[] = { 84, 85, 86, 87, 88, 89, 200 }; +static const int r2err_pins[] = { 90 }; +static const int r2md_pins[] = { 91, 92 }; + +static const int sd1_pins[] = { 136, 137, 138, 139, 140, 141, 142, 143 }; +static const int sd1pwr_pins[] = { 143 }; + +static const int wdog1_pins[] = { 218 }; +static const int wdog2_pins[] = { 219 }; + +/* BMC serial port 0 */ +static const int bmcuart0a_pins[] = { 41, 42 }; +static const int bmcuart0b_pins[] = { 48, 49 }; + +static const int bmcuart1_pins[] = { 43, 44, 62, 63 }; + +/* System Control Interrupt and Power Management Event pin group */ +static const int scipme_pins[] = { 169 }; +/* System Management Interrupt pin group */ +static const int sci_pins[] = { 170 }; +/* Serial Interrupt Line pin group */ +static const int serirq_pins[] = { 162 }; + +static const int clkout_pins[] = { 160 }; +static const int clkreq_pins[] = { 231 }; + +static const int jtag2_pins[] = { 43, 44, 45, 46, 47 }; +/* Graphics SPI Clock pin group */ +static const int gspi_pins[] = { 12, 13, 14, 15 }; + +static const int spix_pins[] = { 224, 225, 226, 227, 229, 230 }; +static const int spixcs1_pins[] = { 228 }; + +static const int pspi1_pins[] = { 175, 176, 177 }; +static const int pspi2_pins[] = { 17, 18, 19 }; + +static const int spi0cs1_pins[] = { 32 }; + +static const int spi3_pins[] = { 183, 184, 185, 186 }; +static const int spi3cs1_pins[] = { 187 }; +static const int spi3quad_pins[] = { 188, 189 }; +static const int spi3cs2_pins[] = { 188 }; +static const int spi3cs3_pins[] = { 189 }; + +static const int ddc_pins[] = { 204, 205, 206, 207 }; + +static const int lpc_pins[] = { 95, 161, 163, 164, 165, 166, 167 }; +static const int lpcclk_pins[] = { 168 }; +static const int espi_pins[] = { 95, 161, 163, 164, 165, 166, 167, 168 }; + +static const int lkgpo0_pins[] = { 16 }; +static const int lkgpo1_pins[] = { 8 }; +static const int lkgpo2_pins[] = { 9 }; + +static const int nprd_smi_pins[] = { 190 }; + +static const int hgpio0_pins[] = { 20 }; +static const int hgpio1_pins[] = { 21 }; +static const int hgpio2_pins[] = { 22 }; +static const int hgpio3_pins[] = { 23 }; +static const int hgpio4_pins[] = { 24 }; +static const int hgpio5_pins[] = { 25 }; +static const int hgpio6_pins[] = { 59 }; +static const int hgpio7_pins[] = { 60 }; + +/* + * pin: name, number + * group: name, npins, pins + * function: name, ngroups, groups + */ +struct npcm7xx_group { + const char *name; + const int *pins; + int npins; +}; + +#define NPCM7XX_GRPS \ + NPCM7XX_GRP(smb0), \ + NPCM7XX_GRP(smb0b), \ + NPCM7XX_GRP(smb0c), \ + NPCM7XX_GRP(smb0d), \ + NPCM7XX_GRP(smb0den), \ + NPCM7XX_GRP(smb1), \ + NPCM7XX_GRP(smb1b), \ + NPCM7XX_GRP(smb1c), \ + NPCM7XX_GRP(smb1d), \ + NPCM7XX_GRP(smb2), \ + NPCM7XX_GRP(smb2b), \ + NPCM7XX_GRP(smb2c), \ + NPCM7XX_GRP(smb2d), \ + NPCM7XX_GRP(smb3), \ + NPCM7XX_GRP(smb3b), \ + NPCM7XX_GRP(smb3c), \ + NPCM7XX_GRP(smb3d), \ + NPCM7XX_GRP(smb4), \ + NPCM7XX_GRP(smb4b), \ + NPCM7XX_GRP(smb4c), \ + NPCM7XX_GRP(smb4d), \ + NPCM7XX_GRP(smb4den), \ + NPCM7XX_GRP(smb5), \ + NPCM7XX_GRP(smb5b), \ + NPCM7XX_GRP(smb5c), \ + NPCM7XX_GRP(smb5d), \ + NPCM7XX_GRP(ga20kbc), \ + NPCM7XX_GRP(smb6), \ + NPCM7XX_GRP(smb7), \ + NPCM7XX_GRP(smb8), \ + NPCM7XX_GRP(smb9), \ + NPCM7XX_GRP(smb10), \ + NPCM7XX_GRP(smb11), \ + NPCM7XX_GRP(smb12), \ + NPCM7XX_GRP(smb13), \ + NPCM7XX_GRP(smb14), \ + NPCM7XX_GRP(smb15), \ + NPCM7XX_GRP(fanin0), \ + NPCM7XX_GRP(fanin1), \ + NPCM7XX_GRP(fanin2), \ + NPCM7XX_GRP(fanin3), \ + NPCM7XX_GRP(fanin4), \ + NPCM7XX_GRP(fanin5), \ + NPCM7XX_GRP(fanin6), \ + NPCM7XX_GRP(fanin7), \ + NPCM7XX_GRP(fanin8), \ + NPCM7XX_GRP(fanin9), \ + NPCM7XX_GRP(fanin10), \ + NPCM7XX_GRP(fanin11), \ + NPCM7XX_GRP(fanin12), \ + NPCM7XX_GRP(fanin13), \ + NPCM7XX_GRP(fanin14), \ + NPCM7XX_GRP(fanin15), \ + NPCM7XX_GRP(faninx), \ + NPCM7XX_GRP(pwm0), \ + NPCM7XX_GRP(pwm1), \ + NPCM7XX_GRP(pwm2), \ + NPCM7XX_GRP(pwm3), \ + NPCM7XX_GRP(pwm4), \ + NPCM7XX_GRP(pwm5), \ + NPCM7XX_GRP(pwm6), \ + NPCM7XX_GRP(pwm7), \ + NPCM7XX_GRP(rg1), \ + NPCM7XX_GRP(rg1mdio), \ + NPCM7XX_GRP(rg2), \ + NPCM7XX_GRP(rg2mdio), \ + NPCM7XX_GRP(ddr), \ + NPCM7XX_GRP(uart1), \ + NPCM7XX_GRP(uart2), \ + NPCM7XX_GRP(bmcuart0a), \ + NPCM7XX_GRP(bmcuart0b), \ + NPCM7XX_GRP(bmcuart1), \ + NPCM7XX_GRP(iox1), \ + NPCM7XX_GRP(iox2), \ + NPCM7XX_GRP(ioxh), \ + NPCM7XX_GRP(gspi), \ + NPCM7XX_GRP(mmc), \ + NPCM7XX_GRP(mmcwp), \ + NPCM7XX_GRP(mmccd), \ + NPCM7XX_GRP(mmcrst), \ + NPCM7XX_GRP(mmc8), \ + NPCM7XX_GRP(r1), \ + NPCM7XX_GRP(r1err), \ + NPCM7XX_GRP(r1md), \ + NPCM7XX_GRP(r2), \ + NPCM7XX_GRP(r2err), \ + NPCM7XX_GRP(r2md), \ + NPCM7XX_GRP(sd1), \ + NPCM7XX_GRP(sd1pwr), \ + NPCM7XX_GRP(wdog1), \ + NPCM7XX_GRP(wdog2), \ + NPCM7XX_GRP(scipme), \ + NPCM7XX_GRP(sci), \ + NPCM7XX_GRP(serirq), \ + NPCM7XX_GRP(jtag2), \ + NPCM7XX_GRP(spix), \ + NPCM7XX_GRP(spixcs1), \ + NPCM7XX_GRP(pspi1), \ + NPCM7XX_GRP(pspi2), \ + NPCM7XX_GRP(ddc), \ + NPCM7XX_GRP(clkreq), \ + NPCM7XX_GRP(clkout), \ + NPCM7XX_GRP(spi3), \ + NPCM7XX_GRP(spi3cs1), \ + NPCM7XX_GRP(spi3quad), \ + NPCM7XX_GRP(spi3cs2), \ + NPCM7XX_GRP(spi3cs3), \ + NPCM7XX_GRP(spi0cs1), \ + NPCM7XX_GRP(lpc), \ + NPCM7XX_GRP(lpcclk), \ + NPCM7XX_GRP(espi), \ + NPCM7XX_GRP(lkgpo0), \ + NPCM7XX_GRP(lkgpo1), \ + NPCM7XX_GRP(lkgpo2), \ + NPCM7XX_GRP(nprd_smi), \ + NPCM7XX_GRP(hgpio0), \ + NPCM7XX_GRP(hgpio1), \ + NPCM7XX_GRP(hgpio2), \ + NPCM7XX_GRP(hgpio3), \ + NPCM7XX_GRP(hgpio4), \ + NPCM7XX_GRP(hgpio5), \ + NPCM7XX_GRP(hgpio6), \ + NPCM7XX_GRP(hgpio7), \ + \ + +enum { +#define NPCM7XX_GRP(x) fn_ ## x + NPCM7XX_GRPS + /* add placeholder for none/gpio */ + NPCM7XX_GRP(none), + NPCM7XX_GRP(gpio), +#undef NPCM7XX_GRP +}; + +static struct npcm7xx_group npcm7xx_groups[] = { +#define NPCM7XX_GRP(x) { .name = #x, .pins = x ## _pins, \ + .npins = ARRAY_SIZE(x ## _pins) } + NPCM7XX_GRPS +#undef NPCM7XX_GRP +}; + +#define NPCM7XX_SFUNC(a) NPCM7XX_FUNC(a, #a) +#define NPCM7XX_FUNC(a, b...) static const char *a ## _grp[] = { b } +#define NPCM7XX_MKFUNC(nm) { .name = #nm, .ngroups = ARRAY_SIZE(nm ## _grp), \ + .groups = nm ## _grp } +struct npcm7xx_func { + const char *name; + const unsigned int ngroups; + const char *const *groups; +}; + +NPCM7XX_SFUNC(smb0); +NPCM7XX_SFUNC(smb0b); +NPCM7XX_SFUNC(smb0c); +NPCM7XX_SFUNC(smb0d); +NPCM7XX_SFUNC(smb0den); +NPCM7XX_SFUNC(smb1); +NPCM7XX_SFUNC(smb1b); +NPCM7XX_SFUNC(smb1c); +NPCM7XX_SFUNC(smb1d); +NPCM7XX_SFUNC(smb2); +NPCM7XX_SFUNC(smb2b); +NPCM7XX_SFUNC(smb2c); +NPCM7XX_SFUNC(smb2d); +NPCM7XX_SFUNC(smb3); +NPCM7XX_SFUNC(smb3b); +NPCM7XX_SFUNC(smb3c); +NPCM7XX_SFUNC(smb3d); +NPCM7XX_SFUNC(smb4); +NPCM7XX_SFUNC(smb4b); +NPCM7XX_SFUNC(smb4c); +NPCM7XX_SFUNC(smb4d); +NPCM7XX_SFUNC(smb4den); +NPCM7XX_SFUNC(smb5); +NPCM7XX_SFUNC(smb5b); +NPCM7XX_SFUNC(smb5c); +NPCM7XX_SFUNC(smb5d); +NPCM7XX_SFUNC(ga20kbc); +NPCM7XX_SFUNC(smb6); +NPCM7XX_SFUNC(smb7); +NPCM7XX_SFUNC(smb8); +NPCM7XX_SFUNC(smb9); +NPCM7XX_SFUNC(smb10); +NPCM7XX_SFUNC(smb11); +NPCM7XX_SFUNC(smb12); +NPCM7XX_SFUNC(smb13); +NPCM7XX_SFUNC(smb14); +NPCM7XX_SFUNC(smb15); +NPCM7XX_SFUNC(fanin0); +NPCM7XX_SFUNC(fanin1); +NPCM7XX_SFUNC(fanin2); +NPCM7XX_SFUNC(fanin3); +NPCM7XX_SFUNC(fanin4); +NPCM7XX_SFUNC(fanin5); +NPCM7XX_SFUNC(fanin6); +NPCM7XX_SFUNC(fanin7); +NPCM7XX_SFUNC(fanin8); +NPCM7XX_SFUNC(fanin9); +NPCM7XX_SFUNC(fanin10); +NPCM7XX_SFUNC(fanin11); +NPCM7XX_SFUNC(fanin12); +NPCM7XX_SFUNC(fanin13); +NPCM7XX_SFUNC(fanin14); +NPCM7XX_SFUNC(fanin15); +NPCM7XX_SFUNC(faninx); +NPCM7XX_SFUNC(pwm0); +NPCM7XX_SFUNC(pwm1); +NPCM7XX_SFUNC(pwm2); +NPCM7XX_SFUNC(pwm3); +NPCM7XX_SFUNC(pwm4); +NPCM7XX_SFUNC(pwm5); +NPCM7XX_SFUNC(pwm6); +NPCM7XX_SFUNC(pwm7); +NPCM7XX_SFUNC(rg1); +NPCM7XX_SFUNC(rg1mdio); +NPCM7XX_SFUNC(rg2); +NPCM7XX_SFUNC(rg2mdio); +NPCM7XX_SFUNC(ddr); +NPCM7XX_SFUNC(uart1); +NPCM7XX_SFUNC(uart2); +NPCM7XX_SFUNC(bmcuart0a); +NPCM7XX_SFUNC(bmcuart0b); +NPCM7XX_SFUNC(bmcuart1); +NPCM7XX_SFUNC(iox1); +NPCM7XX_SFUNC(iox2); +NPCM7XX_SFUNC(ioxh); +NPCM7XX_SFUNC(gspi); +NPCM7XX_SFUNC(mmc); +NPCM7XX_SFUNC(mmcwp); +NPCM7XX_SFUNC(mmccd); +NPCM7XX_SFUNC(mmcrst); +NPCM7XX_SFUNC(mmc8); +NPCM7XX_SFUNC(r1); +NPCM7XX_SFUNC(r1err); +NPCM7XX_SFUNC(r1md); +NPCM7XX_SFUNC(r2); +NPCM7XX_SFUNC(r2err); +NPCM7XX_SFUNC(r2md); +NPCM7XX_SFUNC(sd1); +NPCM7XX_SFUNC(sd1pwr); +NPCM7XX_SFUNC(wdog1); +NPCM7XX_SFUNC(wdog2); +NPCM7XX_SFUNC(scipme); +NPCM7XX_SFUNC(sci); +NPCM7XX_SFUNC(serirq); +NPCM7XX_SFUNC(jtag2); +NPCM7XX_SFUNC(spix); +NPCM7XX_SFUNC(spixcs1); +NPCM7XX_SFUNC(pspi1); +NPCM7XX_SFUNC(pspi2); +NPCM7XX_SFUNC(ddc); +NPCM7XX_SFUNC(clkreq); +NPCM7XX_SFUNC(clkout); +NPCM7XX_SFUNC(spi3); +NPCM7XX_SFUNC(spi3cs1); +NPCM7XX_SFUNC(spi3quad); +NPCM7XX_SFUNC(spi3cs2); +NPCM7XX_SFUNC(spi3cs3); +NPCM7XX_SFUNC(spi0cs1); +NPCM7XX_SFUNC(lpc); +NPCM7XX_SFUNC(lpcclk); +NPCM7XX_SFUNC(espi); +NPCM7XX_SFUNC(lkgpo0); +NPCM7XX_SFUNC(lkgpo1); +NPCM7XX_SFUNC(lkgpo2); +NPCM7XX_SFUNC(nprd_smi); +NPCM7XX_SFUNC(hgpio0); +NPCM7XX_SFUNC(hgpio1); +NPCM7XX_SFUNC(hgpio2); +NPCM7XX_SFUNC(hgpio3); +NPCM7XX_SFUNC(hgpio4); +NPCM7XX_SFUNC(hgpio5); +NPCM7XX_SFUNC(hgpio6); +NPCM7XX_SFUNC(hgpio7); + +/* Function names */ +static struct npcm7xx_func npcm7xx_funcs[] = { + NPCM7XX_MKFUNC(smb0), + NPCM7XX_MKFUNC(smb0b), + NPCM7XX_MKFUNC(smb0c), + NPCM7XX_MKFUNC(smb0d), + NPCM7XX_MKFUNC(smb0den), + NPCM7XX_MKFUNC(smb1), + NPCM7XX_MKFUNC(smb1b), + NPCM7XX_MKFUNC(smb1c), + NPCM7XX_MKFUNC(smb1d), + NPCM7XX_MKFUNC(smb2), + NPCM7XX_MKFUNC(smb2b), + NPCM7XX_MKFUNC(smb2c), + NPCM7XX_MKFUNC(smb2d), + NPCM7XX_MKFUNC(smb3), + NPCM7XX_MKFUNC(smb3b), + NPCM7XX_MKFUNC(smb3c), + NPCM7XX_MKFUNC(smb3d), + NPCM7XX_MKFUNC(smb4), + NPCM7XX_MKFUNC(smb4b), + NPCM7XX_MKFUNC(smb4c), + NPCM7XX_MKFUNC(smb4d), + NPCM7XX_MKFUNC(smb4den), + NPCM7XX_MKFUNC(smb5), + NPCM7XX_MKFUNC(smb5b), + NPCM7XX_MKFUNC(smb5c), + NPCM7XX_MKFUNC(smb5d), + NPCM7XX_MKFUNC(ga20kbc), + NPCM7XX_MKFUNC(smb6), + NPCM7XX_MKFUNC(smb7), + NPCM7XX_MKFUNC(smb8), + NPCM7XX_MKFUNC(smb9), + NPCM7XX_MKFUNC(smb10), + NPCM7XX_MKFUNC(smb11), + NPCM7XX_MKFUNC(smb12), + NPCM7XX_MKFUNC(smb13), + NPCM7XX_MKFUNC(smb14), + NPCM7XX_MKFUNC(smb15), + NPCM7XX_MKFUNC(fanin0), + NPCM7XX_MKFUNC(fanin1), + NPCM7XX_MKFUNC(fanin2), + NPCM7XX_MKFUNC(fanin3), + NPCM7XX_MKFUNC(fanin4), + NPCM7XX_MKFUNC(fanin5), + NPCM7XX_MKFUNC(fanin6), + NPCM7XX_MKFUNC(fanin7), + NPCM7XX_MKFUNC(fanin8), + NPCM7XX_MKFUNC(fanin9), + NPCM7XX_MKFUNC(fanin10), + NPCM7XX_MKFUNC(fanin11), + NPCM7XX_MKFUNC(fanin12), + NPCM7XX_MKFUNC(fanin13), + NPCM7XX_MKFUNC(fanin14), + NPCM7XX_MKFUNC(fanin15), + NPCM7XX_MKFUNC(faninx), + NPCM7XX_MKFUNC(pwm0), + NPCM7XX_MKFUNC(pwm1), + NPCM7XX_MKFUNC(pwm2), + NPCM7XX_MKFUNC(pwm3), + NPCM7XX_MKFUNC(pwm4), + NPCM7XX_MKFUNC(pwm5), + NPCM7XX_MKFUNC(pwm6), + NPCM7XX_MKFUNC(pwm7), + NPCM7XX_MKFUNC(rg1), + NPCM7XX_MKFUNC(rg1mdio), + NPCM7XX_MKFUNC(rg2), + NPCM7XX_MKFUNC(rg2mdio), + NPCM7XX_MKFUNC(ddr), + NPCM7XX_MKFUNC(uart1), + NPCM7XX_MKFUNC(uart2), + NPCM7XX_MKFUNC(bmcuart0a), + NPCM7XX_MKFUNC(bmcuart0b), + NPCM7XX_MKFUNC(bmcuart1), + NPCM7XX_MKFUNC(iox1), + NPCM7XX_MKFUNC(iox2), + NPCM7XX_MKFUNC(ioxh), + NPCM7XX_MKFUNC(gspi), + NPCM7XX_MKFUNC(mmc), + NPCM7XX_MKFUNC(mmcwp), + NPCM7XX_MKFUNC(mmccd), + NPCM7XX_MKFUNC(mmcrst), + NPCM7XX_MKFUNC(mmc8), + NPCM7XX_MKFUNC(r1), + NPCM7XX_MKFUNC(r1err), + NPCM7XX_MKFUNC(r1md), + NPCM7XX_MKFUNC(r2), + NPCM7XX_MKFUNC(r2err), + NPCM7XX_MKFUNC(r2md), + NPCM7XX_MKFUNC(sd1), + NPCM7XX_MKFUNC(sd1pwr), + NPCM7XX_MKFUNC(wdog1), + NPCM7XX_MKFUNC(wdog2), + NPCM7XX_MKFUNC(scipme), + NPCM7XX_MKFUNC(sci), + NPCM7XX_MKFUNC(serirq), + NPCM7XX_MKFUNC(jtag2), + NPCM7XX_MKFUNC(spix), + NPCM7XX_MKFUNC(spixcs1), + NPCM7XX_MKFUNC(pspi1), + NPCM7XX_MKFUNC(pspi2), + NPCM7XX_MKFUNC(ddc), + NPCM7XX_MKFUNC(clkreq), + NPCM7XX_MKFUNC(clkout), + NPCM7XX_MKFUNC(spi3), + NPCM7XX_MKFUNC(spi3cs1), + NPCM7XX_MKFUNC(spi3quad), + NPCM7XX_MKFUNC(spi3cs2), + NPCM7XX_MKFUNC(spi3cs3), + NPCM7XX_MKFUNC(spi0cs1), + NPCM7XX_MKFUNC(lpc), + NPCM7XX_MKFUNC(lpcclk), + NPCM7XX_MKFUNC(espi), + NPCM7XX_MKFUNC(lkgpo0), + NPCM7XX_MKFUNC(lkgpo1), + NPCM7XX_MKFUNC(lkgpo2), + NPCM7XX_MKFUNC(nprd_smi), + NPCM7XX_MKFUNC(hgpio0), + NPCM7XX_MKFUNC(hgpio1), + NPCM7XX_MKFUNC(hgpio2), + NPCM7XX_MKFUNC(hgpio3), + NPCM7XX_MKFUNC(hgpio4), + NPCM7XX_MKFUNC(hgpio5), + NPCM7XX_MKFUNC(hgpio6), + NPCM7XX_MKFUNC(hgpio7), +}; + +#define NPCM7XX_PINCFG(a, b, c, d, e, f, g, h, i, j, k) \ + [a] { .fn0 = fn_ ## b, .reg0 = NPCM7XX_GCR_ ## c, .bit0 = d, \ + .fn1 = fn_ ## e, .reg1 = NPCM7XX_GCR_ ## f, .bit1 = g, \ + .fn2 = fn_ ## h, .reg2 = NPCM7XX_GCR_ ## i, .bit2 = j, \ + .flag = k } + +/* Drive strength controlled by NPCM7XX_GP_N_ODSC */ +#define DRIVE_STRENGTH_LO_SHIFT 8 +#define DRIVE_STRENGTH_HI_SHIFT 12 +#define DRIVE_STRENGTH_MASK 0x0000FF00 + +#define DS(lo, hi) (((lo) << DRIVE_STRENGTH_LO_SHIFT) | \ + ((hi) << DRIVE_STRENGTH_HI_SHIFT)) +#define DSLO(x) (((x) >> DRIVE_STRENGTH_LO_SHIFT) & 0xF) +#define DSHI(x) (((x) >> DRIVE_STRENGTH_HI_SHIFT) & 0xF) + +#define GPI 0x1 /* Not GPO */ +#define GPO 0x2 /* Not GPI */ +#define SLEW 0x4 /* Has Slew Control, NPCM7XX_GP_N_OSRC */ +#define SLEWLPC 0x8 /* Has Slew Control, SRCNT.3 */ + +struct npcm7xx_pincfg { + int flag; + int fn0, reg0, bit0; + int fn1, reg1, bit1; + int fn2, reg2, bit2; +}; + +static const struct npcm7xx_pincfg pincfgs[] = { + /* PIN FUNCTION 1 FUNCTION 2 FUNCTION 3 FLAGS */ + NPCM7XX_PINCFG(0, iox1, MFSEL1, 30, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(1, iox1, MFSEL1, 30, none, NONE, 0, none, NONE, 0, DS(8, 12)), + NPCM7XX_PINCFG(2, iox1, MFSEL1, 30, none, NONE, 0, none, NONE, 0, DS(8, 12)), + NPCM7XX_PINCFG(3, iox1, MFSEL1, 30, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(4, iox2, MFSEL3, 14, smb1d, I2CSEGSEL, 7, none, NONE, 0, SLEW), + NPCM7XX_PINCFG(5, iox2, MFSEL3, 14, smb1d, I2CSEGSEL, 7, none, NONE, 0, SLEW), + NPCM7XX_PINCFG(6, iox2, MFSEL3, 14, smb2d, I2CSEGSEL, 10, none, NONE, 0, SLEW), + NPCM7XX_PINCFG(7, iox2, MFSEL3, 14, smb2d, I2CSEGSEL, 10, none, NONE, 0, SLEW), + NPCM7XX_PINCFG(8, lkgpo1, FLOCKR1, 4, none, NONE, 0, none, NONE, 0, DS(8, 12)), + NPCM7XX_PINCFG(9, lkgpo2, FLOCKR1, 8, none, NONE, 0, none, NONE, 0, DS(8, 12)), + NPCM7XX_PINCFG(10, ioxh, MFSEL3, 18, none, NONE, 0, none, NONE, 0, DS(8, 12)), + NPCM7XX_PINCFG(11, ioxh, MFSEL3, 18, none, NONE, 0, none, NONE, 0, DS(8, 12)), + NPCM7XX_PINCFG(12, gspi, MFSEL1, 24, smb5b, I2CSEGSEL, 19, none, NONE, 0, SLEW), + NPCM7XX_PINCFG(13, gspi, MFSEL1, 24, smb5b, I2CSEGSEL, 19, none, NONE, 0, SLEW), + NPCM7XX_PINCFG(14, gspi, MFSEL1, 24, smb5c, I2CSEGSEL, 20, none, NONE, 0, SLEW), + NPCM7XX_PINCFG(15, gspi, MFSEL1, 24, smb5c, I2CSEGSEL, 20, none, NONE, 0, SLEW), + NPCM7XX_PINCFG(16, lkgpo0, FLOCKR1, 0, none, NONE, 0, none, NONE, 0, DS(8, 12)), + NPCM7XX_PINCFG(17, pspi2, MFSEL3, 13, smb4den, I2CSEGSEL, 23, none, NONE, 0, DS(8, 12)), + NPCM7XX_PINCFG(18, pspi2, MFSEL3, 13, smb4b, I2CSEGSEL, 14, none, NONE, 0, DS(8, 12)), + NPCM7XX_PINCFG(19, pspi2, MFSEL3, 13, smb4b, I2CSEGSEL, 14, none, NONE, 0, DS(8, 12)), + NPCM7XX_PINCFG(20, hgpio0, MFSEL2, 24, smb15, MFSEL3, 8, smb4c, I2CSEGSEL, 15, 0), + NPCM7XX_PINCFG(21, hgpio1, MFSEL2, 25, smb15, MFSEL3, 8, smb4c, I2CSEGSEL, 15, 0), + NPCM7XX_PINCFG(22, hgpio2, MFSEL2, 26, smb14, MFSEL3, 7, smb4d, I2CSEGSEL, 16, 0), + NPCM7XX_PINCFG(23, hgpio3, MFSEL2, 27, smb14, MFSEL3, 7, smb4d, I2CSEGSEL, 16, 0), + NPCM7XX_PINCFG(24, hgpio4, MFSEL2, 28, ioxh, MFSEL3, 18, none, NONE, 0, DS(8, 12)), + NPCM7XX_PINCFG(25, hgpio5, MFSEL2, 29, ioxh, MFSEL3, 18, none, NONE, 0, DS(8, 12)), + NPCM7XX_PINCFG(26, smb5, MFSEL1, 2, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(27, smb5, MFSEL1, 2, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(28, smb4, MFSEL1, 1, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(29, smb4, MFSEL1, 1, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(30, smb3, MFSEL1, 0, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(31, smb3, MFSEL1, 0, none, NONE, 0, none, NONE, 0, 0), + + NPCM7XX_PINCFG(32, spi0cs1, MFSEL1, 3, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(33, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), + NPCM7XX_PINCFG(34, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), + NPCM7XX_PINCFG(37, smb3c, I2CSEGSEL, 12, none, NONE, 0, none, NONE, 0, SLEW), + NPCM7XX_PINCFG(38, smb3c, I2CSEGSEL, 12, none, NONE, 0, none, NONE, 0, SLEW), + NPCM7XX_PINCFG(39, smb3b, I2CSEGSEL, 11, none, NONE, 0, none, NONE, 0, SLEW), + NPCM7XX_PINCFG(40, smb3b, I2CSEGSEL, 11, none, NONE, 0, none, NONE, 0, SLEW), + NPCM7XX_PINCFG(41, bmcuart0a, MFSEL1, 9, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(42, bmcuart0a, MFSEL1, 9, none, NONE, 0, none, NONE, 0, DS(2, 4) | GPO), + NPCM7XX_PINCFG(43, uart1, MFSEL1, 10, jtag2, MFSEL4, 0, bmcuart1, MFSEL3, 24, 0), + NPCM7XX_PINCFG(44, uart1, MFSEL1, 10, jtag2, MFSEL4, 0, bmcuart1, MFSEL3, 24, 0), + NPCM7XX_PINCFG(45, uart1, MFSEL1, 10, jtag2, MFSEL4, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(46, uart1, MFSEL1, 10, jtag2, MFSEL4, 0, none, NONE, 0, DS(2, 8)), + NPCM7XX_PINCFG(47, uart1, MFSEL1, 10, jtag2, MFSEL4, 0, none, NONE, 0, DS(2, 8)), + NPCM7XX_PINCFG(48, uart2, MFSEL1, 11, bmcuart0b, MFSEL4, 1, none, NONE, 0, GPO), + NPCM7XX_PINCFG(49, uart2, MFSEL1, 11, bmcuart0b, MFSEL4, 1, none, NONE, 0, 0), + NPCM7XX_PINCFG(50, uart2, MFSEL1, 11, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(51, uart2, MFSEL1, 11, none, NONE, 0, none, NONE, 0, GPO), + NPCM7XX_PINCFG(52, uart2, MFSEL1, 11, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(53, uart2, MFSEL1, 11, none, NONE, 0, none, NONE, 0, GPO), + NPCM7XX_PINCFG(54, uart2, MFSEL1, 11, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(55, uart2, MFSEL1, 11, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(56, r1err, MFSEL1, 12, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(57, r1md, MFSEL1, 13, none, NONE, 0, none, NONE, 0, DS(2, 4)), + NPCM7XX_PINCFG(58, r1md, MFSEL1, 13, none, NONE, 0, none, NONE, 0, DS(2, 4)), + NPCM7XX_PINCFG(59, hgpio6, MFSEL2, 30, smb3d, I2CSEGSEL, 13, none, NONE, 0, 0), + NPCM7XX_PINCFG(60, hgpio7, MFSEL2, 31, smb3d, I2CSEGSEL, 13, none, NONE, 0, 0), + NPCM7XX_PINCFG(61, uart1, MFSEL1, 10, none, NONE, 0, none, NONE, 0, GPO), + NPCM7XX_PINCFG(62, uart1, MFSEL1, 10, bmcuart1, MFSEL3, 24, none, NONE, 0, GPO), + NPCM7XX_PINCFG(63, uart1, MFSEL1, 10, bmcuart1, MFSEL3, 24, none, NONE, 0, GPO), + + NPCM7XX_PINCFG(64, fanin0, MFSEL2, 0, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(65, fanin1, MFSEL2, 1, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(66, fanin2, MFSEL2, 2, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(67, fanin3, MFSEL2, 3, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(68, fanin4, MFSEL2, 4, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(69, fanin5, MFSEL2, 5, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(70, fanin6, MFSEL2, 6, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(71, fanin7, MFSEL2, 7, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(72, fanin8, MFSEL2, 8, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(73, fanin9, MFSEL2, 9, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(74, fanin10, MFSEL2, 10, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(75, fanin11, MFSEL2, 11, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(76, fanin12, MFSEL2, 12, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(77, fanin13, MFSEL2, 13, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(78, fanin14, MFSEL2, 14, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(79, fanin15, MFSEL2, 15, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(80, pwm0, MFSEL2, 16, none, NONE, 0, none, NONE, 0, DS(4, 8)), + NPCM7XX_PINCFG(81, pwm1, MFSEL2, 17, none, NONE, 0, none, NONE, 0, DS(4, 8)), + NPCM7XX_PINCFG(82, pwm2, MFSEL2, 18, none, NONE, 0, none, NONE, 0, DS(4, 8)), + NPCM7XX_PINCFG(83, pwm3, MFSEL2, 19, none, NONE, 0, none, NONE, 0, DS(4, 8)), + NPCM7XX_PINCFG(84, r2, MFSEL1, 14, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(85, r2, MFSEL1, 14, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(86, r2, MFSEL1, 14, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(87, r2, MFSEL1, 14, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(88, r2, MFSEL1, 14, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(89, r2, MFSEL1, 14, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(90, r2err, MFSEL1, 15, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(91, r2md, MFSEL1, 16, none, NONE, 0, none, NONE, 0, DS(2, 4)), + NPCM7XX_PINCFG(92, r2md, MFSEL1, 16, none, NONE, 0, none, NONE, 0, DS(2, 4)), + NPCM7XX_PINCFG(93, ga20kbc, MFSEL1, 17, smb5d, I2CSEGSEL, 21, none, NONE, 0, 0), + NPCM7XX_PINCFG(94, ga20kbc, MFSEL1, 17, smb5d, I2CSEGSEL, 21, none, NONE, 0, 0), + NPCM7XX_PINCFG(95, lpc, NONE, 0, espi, MFSEL4, 8, gpio, MFSEL1, 26, 0), + + NPCM7XX_PINCFG(96, rg1, MFSEL4, 22, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(97, rg1, MFSEL4, 22, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(98, rg1, MFSEL4, 22, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(99, rg1, MFSEL4, 22, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(100, rg1, MFSEL4, 22, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(101, rg1, MFSEL4, 22, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(102, rg1, MFSEL4, 22, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(103, rg1, MFSEL4, 22, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(104, rg1, MFSEL4, 22, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(105, rg1, MFSEL4, 22, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(106, rg1, MFSEL4, 22, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(107, rg1, MFSEL4, 22, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(108, rg1mdio, MFSEL4, 21, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(109, rg1mdio, MFSEL4, 21, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(110, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0), + NPCM7XX_PINCFG(111, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0), + NPCM7XX_PINCFG(112, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0), + NPCM7XX_PINCFG(113, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0), + NPCM7XX_PINCFG(114, smb0, MFSEL1, 6, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(115, smb0, MFSEL1, 6, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(116, smb1, MFSEL1, 7, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(117, smb1, MFSEL1, 7, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(118, smb2, MFSEL1, 8, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(119, smb2, MFSEL1, 8, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(120, smb2c, I2CSEGSEL, 9, none, NONE, 0, none, NONE, 0, SLEW), + NPCM7XX_PINCFG(121, smb2c, I2CSEGSEL, 9, none, NONE, 0, none, NONE, 0, SLEW), + NPCM7XX_PINCFG(122, smb2b, I2CSEGSEL, 8, none, NONE, 0, none, NONE, 0, SLEW), + NPCM7XX_PINCFG(123, smb2b, I2CSEGSEL, 8, none, NONE, 0, none, NONE, 0, SLEW), + NPCM7XX_PINCFG(124, smb1c, I2CSEGSEL, 6, none, NONE, 0, none, NONE, 0, SLEW), + NPCM7XX_PINCFG(125, smb1c, I2CSEGSEL, 6, none, NONE, 0, none, NONE, 0, SLEW), + NPCM7XX_PINCFG(126, smb1b, I2CSEGSEL, 5, none, NONE, 0, none, NONE, 0, SLEW), + NPCM7XX_PINCFG(127, smb1b, I2CSEGSEL, 5, none, NONE, 0, none, NONE, 0, SLEW), + + NPCM7XX_PINCFG(128, smb8, MFSEL4, 11, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(129, smb8, MFSEL4, 11, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(130, smb9, MFSEL4, 12, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(131, smb9, MFSEL4, 12, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(132, smb10, MFSEL4, 13, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(133, smb10, MFSEL4, 13, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(134, smb11, MFSEL4, 14, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(135, smb11, MFSEL4, 14, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(136, sd1, MFSEL3, 12, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(137, sd1, MFSEL3, 12, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(138, sd1, MFSEL3, 12, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(139, sd1, MFSEL3, 12, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(140, sd1, MFSEL3, 12, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(141, sd1, MFSEL3, 12, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(142, sd1, MFSEL3, 12, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(143, sd1, MFSEL3, 12, sd1pwr, MFSEL4, 5, none, NONE, 0, 0), + NPCM7XX_PINCFG(144, pwm4, MFSEL2, 20, none, NONE, 0, none, NONE, 0, DS(4, 8)), + NPCM7XX_PINCFG(145, pwm5, MFSEL2, 21, none, NONE, 0, none, NONE, 0, DS(4, 8)), + NPCM7XX_PINCFG(146, pwm6, MFSEL2, 22, none, NONE, 0, none, NONE, 0, DS(4, 8)), + NPCM7XX_PINCFG(147, pwm7, MFSEL2, 23, none, NONE, 0, none, NONE, 0, DS(4, 8)), + NPCM7XX_PINCFG(148, mmc8, MFSEL3, 11, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(149, mmc8, MFSEL3, 11, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(150, mmc8, MFSEL3, 11, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(151, mmc8, MFSEL3, 11, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(152, mmc, MFSEL3, 10, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(153, mmcwp, FLOCKR1, 24, none, NONE, 0, none, NONE, 0, 0), /* Z1/A1 */ + NPCM7XX_PINCFG(154, mmc, MFSEL3, 10, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(155, mmccd, MFSEL3, 25, mmcrst, MFSEL4, 6, none, NONE, 0, 0), /* Z1/A1 */ + NPCM7XX_PINCFG(156, mmc, MFSEL3, 10, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(157, mmc, MFSEL3, 10, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(158, mmc, MFSEL3, 10, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(159, mmc, MFSEL3, 10, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + + NPCM7XX_PINCFG(160, clkout, MFSEL1, 21, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(161, lpc, NONE, 0, espi, MFSEL4, 8, gpio, MFSEL1, 26, DS(8, 12)), + NPCM7XX_PINCFG(162, serirq, NONE, 0, gpio, MFSEL1, 31, none, NONE, 0, DS(8, 12)), + NPCM7XX_PINCFG(163, lpc, NONE, 0, espi, MFSEL4, 8, gpio, MFSEL1, 26, 0), + NPCM7XX_PINCFG(164, lpc, NONE, 0, espi, MFSEL4, 8, gpio, MFSEL1, 26, SLEWLPC), + NPCM7XX_PINCFG(165, lpc, NONE, 0, espi, MFSEL4, 8, gpio, MFSEL1, 26, SLEWLPC), + NPCM7XX_PINCFG(166, lpc, NONE, 0, espi, MFSEL4, 8, gpio, MFSEL1, 26, SLEWLPC), + NPCM7XX_PINCFG(167, lpc, NONE, 0, espi, MFSEL4, 8, gpio, MFSEL1, 26, SLEWLPC), + NPCM7XX_PINCFG(168, lpcclk, NONE, 0, espi, MFSEL4, 8, gpio, MFSEL3, 16, 0), + NPCM7XX_PINCFG(169, scipme, MFSEL3, 0, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(170, sci, MFSEL1, 22, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(171, smb6, MFSEL3, 1, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(172, smb6, MFSEL3, 1, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(173, smb7, MFSEL3, 2, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(174, smb7, MFSEL3, 2, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(175, pspi1, MFSEL3, 4, faninx, MFSEL3, 3, none, NONE, 0, DS(8, 12)), + NPCM7XX_PINCFG(176, pspi1, MFSEL3, 4, faninx, MFSEL3, 3, none, NONE, 0, DS(8, 12)), + NPCM7XX_PINCFG(177, pspi1, MFSEL3, 4, faninx, MFSEL3, 3, none, NONE, 0, DS(8, 12)), + NPCM7XX_PINCFG(178, r1, MFSEL3, 9, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(179, r1, MFSEL3, 9, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(180, r1, MFSEL3, 9, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(181, r1, MFSEL3, 9, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(182, r1, MFSEL3, 9, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(183, spi3, MFSEL4, 16, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(184, spi3, MFSEL4, 16, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW | GPO), + NPCM7XX_PINCFG(185, spi3, MFSEL4, 16, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW | GPO), + NPCM7XX_PINCFG(186, spi3, MFSEL4, 16, none, NONE, 0, none, NONE, 0, DS(8, 12)), + NPCM7XX_PINCFG(187, spi3cs1, MFSEL4, 17, none, NONE, 0, none, NONE, 0, DS(8, 12)), + NPCM7XX_PINCFG(188, spi3quad, MFSEL4, 20, spi3cs2, MFSEL4, 18, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(189, spi3quad, MFSEL4, 20, spi3cs3, MFSEL4, 19, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(190, gpio, FLOCKR1, 20, nprd_smi, NONE, 0, none, NONE, 0, DS(2, 4)), + NPCM7XX_PINCFG(191, none, NONE, 0, none, NONE, 0, none, NONE, 0, DS(8, 12)), /* XX */ + + NPCM7XX_PINCFG(192, none, NONE, 0, none, NONE, 0, none, NONE, 0, DS(8, 12)), /* XX */ + NPCM7XX_PINCFG(193, r1, MFSEL3, 9, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(194, smb0b, I2CSEGSEL, 0, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(195, smb0b, I2CSEGSEL, 0, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(196, smb0c, I2CSEGSEL, 1, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(197, smb0den, I2CSEGSEL, 22, none, NONE, 0, none, NONE, 0, SLEW), + NPCM7XX_PINCFG(198, smb0d, I2CSEGSEL, 2, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(199, smb0d, I2CSEGSEL, 2, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(200, r2, MFSEL1, 14, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(201, r1, MFSEL3, 9, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(202, smb0c, I2CSEGSEL, 1, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(203, faninx, MFSEL3, 3, none, NONE, 0, none, NONE, 0, DS(8, 12)), + NPCM7XX_PINCFG(204, ddc, NONE, 0, gpio, MFSEL3, 22, none, NONE, 0, SLEW), + NPCM7XX_PINCFG(205, ddc, NONE, 0, gpio, MFSEL3, 22, none, NONE, 0, SLEW), + NPCM7XX_PINCFG(206, ddc, NONE, 0, gpio, MFSEL3, 22, none, NONE, 0, DS(4, 8)), + NPCM7XX_PINCFG(207, ddc, NONE, 0, gpio, MFSEL3, 22, none, NONE, 0, DS(4, 8)), + NPCM7XX_PINCFG(208, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0), + NPCM7XX_PINCFG(209, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0), + NPCM7XX_PINCFG(210, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0), + NPCM7XX_PINCFG(211, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0), + NPCM7XX_PINCFG(212, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0), + NPCM7XX_PINCFG(213, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0), + NPCM7XX_PINCFG(214, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0), + NPCM7XX_PINCFG(215, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0), + NPCM7XX_PINCFG(216, rg2mdio, MFSEL4, 23, ddr, MFSEL3, 26, none, NONE, 0, 0), + NPCM7XX_PINCFG(217, rg2mdio, MFSEL4, 23, ddr, MFSEL3, 26, none, NONE, 0, 0), + NPCM7XX_PINCFG(218, wdog1, MFSEL3, 19, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(219, wdog2, MFSEL3, 20, none, NONE, 0, none, NONE, 0, DS(4, 8)), + NPCM7XX_PINCFG(220, smb12, MFSEL3, 5, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(221, smb12, MFSEL3, 5, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(222, smb13, MFSEL3, 6, none, NONE, 0, none, NONE, 0, 0), + NPCM7XX_PINCFG(223, smb13, MFSEL3, 6, none, NONE, 0, none, NONE, 0, 0), + + NPCM7XX_PINCFG(224, spix, MFSEL4, 27, none, NONE, 0, none, NONE, 0, SLEW), + NPCM7XX_PINCFG(225, spix, MFSEL4, 27, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW | GPO), + NPCM7XX_PINCFG(226, spix, MFSEL4, 27, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW | GPO), + NPCM7XX_PINCFG(227, spix, MFSEL4, 27, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(228, spixcs1, MFSEL4, 28, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(229, spix, MFSEL4, 27, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(230, spix, MFSEL4, 27, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW), + NPCM7XX_PINCFG(231, clkreq, MFSEL4, 9, none, NONE, 0, none, NONE, 0, DS(8, 12)), + NPCM7XX_PINCFG(253, none, NONE, 0, none, NONE, 0, none, NONE, 0, GPI), /* SDHC1 power */ + NPCM7XX_PINCFG(254, none, NONE, 0, none, NONE, 0, none, NONE, 0, GPI), /* SDHC2 power */ + NPCM7XX_PINCFG(255, none, NONE, 0, none, NONE, 0, none, NONE, 0, GPI), /* DACOSEL */ +}; + +#define NPCM7XX_PIN(a, b) { .number = a, .name = b } +struct npcm7xx_pin_desc { + unsigned int number; + const char *name; +}; + +/* number, name, drv_data */ +static const struct npcm7xx_pin_desc npcm7xx_pins[] = { + NPCM7XX_PIN(0, "GPIO0/IOX1DI"), + NPCM7XX_PIN(1, "GPIO1/IOX1LD"), + NPCM7XX_PIN(2, "GPIO2/IOX1CK"), + NPCM7XX_PIN(3, "GPIO3/IOX1D0"), + NPCM7XX_PIN(4, "GPIO4/IOX2DI/SMB1DSDA"), + NPCM7XX_PIN(5, "GPIO5/IOX2LD/SMB1DSCL"), + NPCM7XX_PIN(6, "GPIO6/IOX2CK/SMB2DSDA"), + NPCM7XX_PIN(7, "GPIO7/IOX2D0/SMB2DSCL"), + NPCM7XX_PIN(8, "GPIO8/LKGPO1"), + NPCM7XX_PIN(9, "GPIO9/LKGPO2"), + NPCM7XX_PIN(10, "GPIO10/IOXHLD"), + NPCM7XX_PIN(11, "GPIO11/IOXHCK"), + NPCM7XX_PIN(12, "GPIO12/GSPICK/SMB5BSCL"), + NPCM7XX_PIN(13, "GPIO13/GSPIDO/SMB5BSDA"), + NPCM7XX_PIN(14, "GPIO14/GSPIDI/SMB5CSCL"), + NPCM7XX_PIN(15, "GPIO15/GSPICS/SMB5CSDA"), + NPCM7XX_PIN(16, "GPIO16/LKGPO0"), + NPCM7XX_PIN(17, "GPIO17/PSPI2DI/SMB4DEN"), + NPCM7XX_PIN(18, "GPIO18/PSPI2D0/SMB4BSDA"), + NPCM7XX_PIN(19, "GPIO19/PSPI2CK/SMB4BSCL"), + NPCM7XX_PIN(20, "GPIO20/SMB4CSDA/SMB15SDA"), + NPCM7XX_PIN(21, "GPIO21/SMB4CSCL/SMB15SCL"), + NPCM7XX_PIN(22, "GPIO22/SMB4DSDA/SMB14SDA"), + NPCM7XX_PIN(23, "GPIO23/SMB4DSCL/SMB14SCL"), + NPCM7XX_PIN(24, "GPIO24/IOXHDO"), + NPCM7XX_PIN(25, "GPIO25/IOXHDI"), + NPCM7XX_PIN(26, "GPIO26/SMB5SDA"), + NPCM7XX_PIN(27, "GPIO27/SMB5SCL"), + NPCM7XX_PIN(28, "GPIO28/SMB4SDA"), + NPCM7XX_PIN(29, "GPIO29/SMB4SCL"), + NPCM7XX_PIN(30, "GPIO30/SMB3SDA"), + NPCM7XX_PIN(31, "GPIO31/SMB3SCL"), + + NPCM7XX_PIN(32, "GPIO32/nSPI0CS1"), + NPCM7XX_PIN(33, "SPI0D2"), + NPCM7XX_PIN(34, "SPI0D3"), + NPCM7XX_PIN(35, "NA"), + NPCM7XX_PIN(36, "NA"), + NPCM7XX_PIN(37, "GPIO37/SMB3CSDA"), + NPCM7XX_PIN(38, "GPIO38/SMB3CSCL"), + NPCM7XX_PIN(39, "GPIO39/SMB3BSDA"), + NPCM7XX_PIN(40, "GPIO40/SMB3BSCL"), + NPCM7XX_PIN(41, "GPIO41/BSPRXD"), + NPCM7XX_PIN(42, "GPO42/BSPTXD/STRAP11"), + NPCM7XX_PIN(43, "GPIO43/RXD1/JTMS2/BU1RXD"), + NPCM7XX_PIN(44, "GPIO44/nCTS1/JTDI2/BU1CTS"), + NPCM7XX_PIN(45, "GPIO45/nDCD1/JTDO2"), + NPCM7XX_PIN(46, "GPIO46/nDSR1/JTCK2"), + NPCM7XX_PIN(47, "GPIO47/nRI1/JCP_RDY2"), + NPCM7XX_PIN(48, "GPIO48/TXD2/BSPTXD"), + NPCM7XX_PIN(49, "GPIO49/RXD2/BSPRXD"), + NPCM7XX_PIN(50, "GPIO50/nCTS2"), + NPCM7XX_PIN(51, "GPO51/nRTS2/STRAP2"), + NPCM7XX_PIN(52, "GPIO52/nDCD2"), + NPCM7XX_PIN(53, "GPO53/nDTR2_BOUT2/STRAP1"), + NPCM7XX_PIN(54, "GPIO54/nDSR2"), + NPCM7XX_PIN(55, "GPIO55/nRI2"), + NPCM7XX_PIN(56, "GPIO56/R1RXERR"), + NPCM7XX_PIN(57, "GPIO57/R1MDC"), + NPCM7XX_PIN(58, "GPIO58/R1MDIO"), + NPCM7XX_PIN(59, "GPIO59/SMB3DSDA"), + NPCM7XX_PIN(60, "GPIO60/SMB3DSCL"), + NPCM7XX_PIN(61, "GPO61/nDTR1_BOUT1/STRAP6"), + NPCM7XX_PIN(62, "GPO62/nRTST1/STRAP5"), + NPCM7XX_PIN(63, "GPO63/TXD1/STRAP4"), + + NPCM7XX_PIN(64, "GPIO64/FANIN0"), + NPCM7XX_PIN(65, "GPIO65/FANIN1"), + NPCM7XX_PIN(66, "GPIO66/FANIN2"), + NPCM7XX_PIN(67, "GPIO67/FANIN3"), + NPCM7XX_PIN(68, "GPIO68/FANIN4"), + NPCM7XX_PIN(69, "GPIO69/FANIN5"), + NPCM7XX_PIN(70, "GPIO70/FANIN6"), + NPCM7XX_PIN(71, "GPIO71/FANIN7"), + NPCM7XX_PIN(72, "GPIO72/FANIN8"), + NPCM7XX_PIN(73, "GPIO73/FANIN9"), + NPCM7XX_PIN(74, "GPIO74/FANIN10"), + NPCM7XX_PIN(75, "GPIO75/FANIN11"), + NPCM7XX_PIN(76, "GPIO76/FANIN12"), + NPCM7XX_PIN(77, "GPIO77/FANIN13"), + NPCM7XX_PIN(78, "GPIO78/FANIN14"), + NPCM7XX_PIN(79, "GPIO79/FANIN15"), + NPCM7XX_PIN(80, "GPIO80/PWM0"), + NPCM7XX_PIN(81, "GPIO81/PWM1"), + NPCM7XX_PIN(82, "GPIO82/PWM2"), + NPCM7XX_PIN(83, "GPIO83/PWM3"), + NPCM7XX_PIN(84, "GPIO84/R2TXD0"), + NPCM7XX_PIN(85, "GPIO85/R2TXD1"), + NPCM7XX_PIN(86, "GPIO86/R2TXEN"), + NPCM7XX_PIN(87, "GPIO87/R2RXD0"), + NPCM7XX_PIN(88, "GPIO88/R2RXD1"), + NPCM7XX_PIN(89, "GPIO89/R2CRSDV"), + NPCM7XX_PIN(90, "GPIO90/R2RXERR"), + NPCM7XX_PIN(91, "GPIO91/R2MDC"), + NPCM7XX_PIN(92, "GPIO92/R2MDIO"), + NPCM7XX_PIN(93, "GPIO93/GA20/SMB5DSCL"), + NPCM7XX_PIN(94, "GPIO94/nKBRST/SMB5DSDA"), + NPCM7XX_PIN(95, "GPIO95/nLRESET/nESPIRST"), + + NPCM7XX_PIN(96, "GPIO96/RG1TXD0"), + NPCM7XX_PIN(97, "GPIO97/RG1TXD1"), + NPCM7XX_PIN(98, "GPIO98/RG1TXD2"), + NPCM7XX_PIN(99, "GPIO99/RG1TXD3"), + NPCM7XX_PIN(100, "GPIO100/RG1TXC"), + NPCM7XX_PIN(101, "GPIO101/RG1TXCTL"), + NPCM7XX_PIN(102, "GPIO102/RG1RXD0"), + NPCM7XX_PIN(103, "GPIO103/RG1RXD1"), + NPCM7XX_PIN(104, "GPIO104/RG1RXD2"), + NPCM7XX_PIN(105, "GPIO105/RG1RXD3"), + NPCM7XX_PIN(106, "GPIO106/RG1RXC"), + NPCM7XX_PIN(107, "GPIO107/RG1RXCTL"), + NPCM7XX_PIN(108, "GPIO108/RG1MDC"), + NPCM7XX_PIN(109, "GPIO109/RG1MDIO"), + NPCM7XX_PIN(110, "GPIO110/RG2TXD0/DDRV0"), + NPCM7XX_PIN(111, "GPIO111/RG2TXD1/DDRV1"), + NPCM7XX_PIN(112, "GPIO112/RG2TXD2/DDRV2"), + NPCM7XX_PIN(113, "GPIO113/RG2TXD3/DDRV3"), + NPCM7XX_PIN(114, "GPIO114/SMB0SCL"), + NPCM7XX_PIN(115, "GPIO115/SMB0SDA"), + NPCM7XX_PIN(116, "GPIO116/SMB1SCL"), + NPCM7XX_PIN(117, "GPIO117/SMB1SDA"), + NPCM7XX_PIN(118, "GPIO118/SMB2SCL"), + NPCM7XX_PIN(119, "GPIO119/SMB2SDA"), + NPCM7XX_PIN(120, "GPIO120/SMB2CSDA"), + NPCM7XX_PIN(121, "GPIO121/SMB2CSCL"), + NPCM7XX_PIN(122, "GPIO122/SMB2BSDA"), + NPCM7XX_PIN(123, "GPIO123/SMB2BSCL"), + NPCM7XX_PIN(124, "GPIO124/SMB1CSDA"), + NPCM7XX_PIN(125, "GPIO125/SMB1CSCL"), + NPCM7XX_PIN(126, "GPIO126/SMB1BSDA"), + NPCM7XX_PIN(127, "GPIO127/SMB1BSCL"), + + NPCM7XX_PIN(128, "GPIO128/SMB8SCL"), + NPCM7XX_PIN(129, "GPIO129/SMB8SDA"), + NPCM7XX_PIN(130, "GPIO130/SMB9SCL"), + NPCM7XX_PIN(131, "GPIO131/SMB9SDA"), + NPCM7XX_PIN(132, "GPIO132/SMB10SCL"), + NPCM7XX_PIN(133, "GPIO133/SMB10SDA"), + NPCM7XX_PIN(134, "GPIO134/SMB11SCL"), + NPCM7XX_PIN(135, "GPIO135/SMB11SDA"), + NPCM7XX_PIN(136, "GPIO136/SD1DT0"), + NPCM7XX_PIN(137, "GPIO137/SD1DT1"), + NPCM7XX_PIN(138, "GPIO138/SD1DT2"), + NPCM7XX_PIN(139, "GPIO139/SD1DT3"), + NPCM7XX_PIN(140, "GPIO140/SD1CLK"), + NPCM7XX_PIN(141, "GPIO141/SD1WP"), + NPCM7XX_PIN(142, "GPIO142/SD1CMD"), + NPCM7XX_PIN(143, "GPIO143/SD1CD/SD1PWR"), + NPCM7XX_PIN(144, "GPIO144/PWM4"), + NPCM7XX_PIN(145, "GPIO145/PWM5"), + NPCM7XX_PIN(146, "GPIO146/PWM6"), + NPCM7XX_PIN(147, "GPIO147/PWM7"), + NPCM7XX_PIN(148, "GPIO148/MMCDT4"), + NPCM7XX_PIN(149, "GPIO149/MMCDT5"), + NPCM7XX_PIN(150, "GPIO150/MMCDT6"), + NPCM7XX_PIN(151, "GPIO151/MMCDT7"), + NPCM7XX_PIN(152, "GPIO152/MMCCLK"), + NPCM7XX_PIN(153, "GPIO153/MMCWP"), + NPCM7XX_PIN(154, "GPIO154/MMCCMD"), + NPCM7XX_PIN(155, "GPIO155/nMMCCD/nMMCRST"), + NPCM7XX_PIN(156, "GPIO156/MMCDT0"), + NPCM7XX_PIN(157, "GPIO157/MMCDT1"), + NPCM7XX_PIN(158, "GPIO158/MMCDT2"), + NPCM7XX_PIN(159, "GPIO159/MMCDT3"), + + NPCM7XX_PIN(160, "GPIO160/CLKOUT/RNGOSCOUT"), + NPCM7XX_PIN(161, "GPIO161/nLFRAME/nESPICS"), + NPCM7XX_PIN(162, "GPIO162/SERIRQ"), + NPCM7XX_PIN(163, "GPIO163/LCLK/ESPICLK"), + NPCM7XX_PIN(164, "GPIO164/LAD0/ESPI_IO0"/*dscnt6*/), + NPCM7XX_PIN(165, "GPIO165/LAD1/ESPI_IO1"/*dscnt6*/), + NPCM7XX_PIN(166, "GPIO166/LAD2/ESPI_IO2"/*dscnt6*/), + NPCM7XX_PIN(167, "GPIO167/LAD3/ESPI_IO3"/*dscnt6*/), + NPCM7XX_PIN(168, "GPIO168/nCLKRUN/nESPIALERT"), + NPCM7XX_PIN(169, "GPIO169/nSCIPME"), + NPCM7XX_PIN(170, "GPIO170/nSMI"), + NPCM7XX_PIN(171, "GPIO171/SMB6SCL"), + NPCM7XX_PIN(172, "GPIO172/SMB6SDA"), + NPCM7XX_PIN(173, "GPIO173/SMB7SCL"), + NPCM7XX_PIN(174, "GPIO174/SMB7SDA"), + NPCM7XX_PIN(175, "GPIO175/PSPI1CK/FANIN19"), + NPCM7XX_PIN(176, "GPIO176/PSPI1DO/FANIN18"), + NPCM7XX_PIN(177, "GPIO177/PSPI1DI/FANIN17"), + NPCM7XX_PIN(178, "GPIO178/R1TXD0"), + NPCM7XX_PIN(179, "GPIO179/R1TXD1"), + NPCM7XX_PIN(180, "GPIO180/R1TXEN"), + NPCM7XX_PIN(181, "GPIO181/R1RXD0"), + NPCM7XX_PIN(182, "GPIO182/R1RXD1"), + NPCM7XX_PIN(183, "GPIO183/SPI3CK"), + NPCM7XX_PIN(184, "GPO184/SPI3D0/STRAP9"), + NPCM7XX_PIN(185, "GPO185/SPI3D1/STRAP10"), + NPCM7XX_PIN(186, "GPIO186/nSPI3CS0"), + NPCM7XX_PIN(187, "GPIO187/nSPI3CS1"), + NPCM7XX_PIN(188, "GPIO188/SPI3D2/nSPI3CS2"), + NPCM7XX_PIN(189, "GPIO189/SPI3D3/nSPI3CS3"), + NPCM7XX_PIN(190, "GPIO190/nPRD_SMI"), + NPCM7XX_PIN(191, "GPIO191"), + + NPCM7XX_PIN(192, "GPIO192"), + NPCM7XX_PIN(193, "GPIO193/R1CRSDV"), + NPCM7XX_PIN(194, "GPIO194/SMB0BSCL"), + NPCM7XX_PIN(195, "GPIO195/SMB0BSDA"), + NPCM7XX_PIN(196, "GPIO196/SMB0CSCL"), + NPCM7XX_PIN(197, "GPIO197/SMB0DEN"), + NPCM7XX_PIN(198, "GPIO198/SMB0DSDA"), + NPCM7XX_PIN(199, "GPIO199/SMB0DSCL"), + NPCM7XX_PIN(200, "GPIO200/R2CK"), + NPCM7XX_PIN(201, "GPIO201/R1CK"), + NPCM7XX_PIN(202, "GPIO202/SMB0CSDA"), + NPCM7XX_PIN(203, "GPIO203/FANIN16"), + NPCM7XX_PIN(204, "GPIO204/DDC2SCL"), + NPCM7XX_PIN(205, "GPIO205/DDC2SDA"), + NPCM7XX_PIN(206, "GPIO206/HSYNC2"), + NPCM7XX_PIN(207, "GPIO207/VSYNC2"), + NPCM7XX_PIN(208, "GPIO208/RG2TXC/DVCK"), + NPCM7XX_PIN(209, "GPIO209/RG2TXCTL/DDRV4"), + NPCM7XX_PIN(210, "GPIO210/RG2RXD0/DDRV5"), + NPCM7XX_PIN(211, "GPIO211/RG2RXD1/DDRV6"), + NPCM7XX_PIN(212, "GPIO212/RG2RXD2/DDRV7"), + NPCM7XX_PIN(213, "GPIO213/RG2RXD3/DDRV8"), + NPCM7XX_PIN(214, "GPIO214/RG2RXC/DDRV9"), + NPCM7XX_PIN(215, "GPIO215/RG2RXCTL/DDRV10"), + NPCM7XX_PIN(216, "GPIO216/RG2MDC/DDRV11"), + NPCM7XX_PIN(217, "GPIO217/RG2MDIO/DVHSYNC"), + NPCM7XX_PIN(218, "GPIO218/nWDO1"), + NPCM7XX_PIN(219, "GPIO219/nWDO2"), + NPCM7XX_PIN(220, "GPIO220/SMB12SCL"), + NPCM7XX_PIN(221, "GPIO221/SMB12SDA"), + NPCM7XX_PIN(222, "GPIO222/SMB13SCL"), + NPCM7XX_PIN(223, "GPIO223/SMB13SDA"), + NPCM7XX_PIN(224, "GPIO224/SPIXCK"), + NPCM7XX_PIN(225, "GPO225/SPIXD0/STRAP12"), + NPCM7XX_PIN(226, "GPO226/SPIXD1/STRAP13"), + NPCM7XX_PIN(227, "GPIO227/nSPIXCS0"), + NPCM7XX_PIN(228, "GPIO228/nSPIXCS1"), + NPCM7XX_PIN(229, "GPO229/SPIXD2/STRAP3"), + NPCM7XX_PIN(230, "GPIO230/SPIXD3"), + NPCM7XX_PIN(231, "GPIO231/nCLKREQ"), + NPCM7XX_PIN(232, "NA"), + NPCM7XX_PIN(233, "NA"), + NPCM7XX_PIN(234, "NA"), + NPCM7XX_PIN(235, "NA"), + NPCM7XX_PIN(236, "NA"), + NPCM7XX_PIN(237, "NA"), + NPCM7XX_PIN(238, "NA"), + NPCM7XX_PIN(239, "NA"), + NPCM7XX_PIN(240, "NA"), + NPCM7XX_PIN(241, "NA"), + NPCM7XX_PIN(242, "NA"), + NPCM7XX_PIN(243, "NA"), + NPCM7XX_PIN(244, "NA"), + NPCM7XX_PIN(245, "NA"), + NPCM7XX_PIN(246, "NA"), + NPCM7XX_PIN(247, "NA"), + NPCM7XX_PIN(248, "NA"), + NPCM7XX_PIN(249, "NA"), + NPCM7XX_PIN(250, "NA"), + NPCM7XX_PIN(251, "NA"), + NPCM7XX_PIN(252, "NA"), + NPCM7XX_PIN(253, "NA"), + NPCM7XX_PIN(254, "NA"), + NPCM7XX_PIN(255, "GPI255/DACOSEL"), +}; + +struct npcm7xx_pinctrl_priv { + void __iomem *gpio_base; + struct regmap *gcr_regmap; + struct regmap *rst_regmap; +}; + +static int npcm7xx_pinctrl_probe(struct udevice *dev) +{ + struct npcm7xx_pinctrl_priv *priv = dev_get_priv(dev); + + priv->gpio_base = dev_read_addr_ptr(dev); + if (!priv->gpio_base) + return -EINVAL; + + priv->gcr_regmap = syscon_regmap_lookup_by_phandle(dev, "syscon-gcr"); + if (IS_ERR(priv->gcr_regmap)) + return -EINVAL; + + priv->rst_regmap = syscon_regmap_lookup_by_phandle(dev, "syscon-rst"); + if (IS_ERR(priv->rst_regmap)) + return -EINVAL; + + return 0; +} + +/* Enable mode in pin group */ +static void npcm7xx_setfunc(struct udevice *dev, const int *pin, + int pin_number, int mode) +{ + struct npcm7xx_pinctrl_priv *priv = dev_get_priv(dev); + const struct npcm7xx_pincfg *cfg; + int i; + + for (i = 0 ; i < pin_number ; i++) { + cfg = &pincfgs[pin[i]]; + if (mode == fn_gpio || cfg->fn0 == mode || cfg->fn1 == mode || cfg->fn2 == mode) { + if (cfg->reg0) { + if (cfg->fn0 == mode) + regmap_update_bits(priv->gcr_regmap, cfg->reg0, BIT(cfg->bit0), BIT(cfg->bit0)); + else + regmap_update_bits(priv->gcr_regmap, cfg->reg0, BIT(cfg->bit0), 0); + } + if (cfg->reg1) { + if (cfg->fn1 == mode) + regmap_update_bits(priv->gcr_regmap, cfg->reg1, BIT(cfg->bit1), BIT(cfg->bit1)); + else + regmap_update_bits(priv->gcr_regmap, cfg->reg1, BIT(cfg->bit1), 0); + } + if (cfg->reg2) { + if (cfg->fn2 == mode) + regmap_update_bits(priv->gcr_regmap, cfg->reg2, BIT(cfg->bit2), BIT(cfg->bit2)); + else + regmap_update_bits(priv->gcr_regmap, cfg->reg2, BIT(cfg->bit2), 0); + } + } + } +} + +static int npcm7xx_get_pins_count(struct udevice *dev) +{ + return ARRAY_SIZE(npcm7xx_pins); +} + +static const char *npcm7xx_get_pin_name(struct udevice *dev, + unsigned int selector) +{ + return npcm7xx_pins[selector].name; +} + +static int npcm7xx_get_groups_count(struct udevice *dev) +{ + return ARRAY_SIZE(npcm7xx_groups); +} + +static const char *npcm7xx_get_group_name(struct udevice *dev, + unsigned int selector) +{ + return npcm7xx_groups[selector].name; +} + +static int npcm7xx_get_functions_count(struct udevice *dev) +{ + return ARRAY_SIZE(npcm7xx_funcs); +} + +static const char *npcm7xx_get_function_name(struct udevice *dev, + unsigned int selector) +{ + return npcm7xx_funcs[selector].name; +} + +static int npcm7xx_pinmux_set(struct udevice *dev, + unsigned int group, + unsigned int function) +{ + dev_dbg(dev, "set_mux: %d, %d[%s]\n", function, group, + npcm7xx_groups[group].name); + + npcm7xx_setfunc(dev, npcm7xx_groups[group].pins, + npcm7xx_groups[group].npins, group); + + return 0; +} + +#if CONFIG_IS_ENABLED(PINCONF) + +#define PIN_CONFIG_PERSIST_STATE (PIN_CONFIG_END + 1) +#define PIN_CONFIG_POLARITY_STATE (PIN_CONFIG_END + 2) +#define PIN_CONFIG_EVENT_CLEAR (PIN_CONFIG_END + 3) + +static const struct pinconf_param npcm7xx_conf_params[] = { + { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 }, + { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 }, + { "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 }, + { "input-enable", PIN_CONFIG_INPUT_ENABLE, 1 }, + { "output-enable", PIN_CONFIG_OUTPUT_ENABLE, 1 }, + { "output-high", PIN_CONFIG_OUTPUT, 1, }, + { "output-low", PIN_CONFIG_OUTPUT, 0, }, + { "drive-open-drain", PIN_CONFIG_DRIVE_OPEN_DRAIN, 1 }, + { "drive-push-pull", PIN_CONFIG_DRIVE_PUSH_PULL, 1 }, + { "persist-enable", PIN_CONFIG_PERSIST_STATE, 1 }, + { "persist-disable", PIN_CONFIG_PERSIST_STATE, 0 }, + { "input-debounce", PIN_CONFIG_INPUT_DEBOUNCE, 0 }, + { "active-high", PIN_CONFIG_POLARITY_STATE, 0 }, + { "active-low", PIN_CONFIG_POLARITY_STATE, 1 }, + { "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 0 }, + { "slew-rate", PIN_CONFIG_SLEW_RATE, 0}, + { "event-clear", PIN_CONFIG_EVENT_CLEAR, 0}, +}; + +static bool is_gpio_persist(struct udevice *dev, u8 bank) +{ + struct npcm7xx_pinctrl_priv *priv = dev_get_priv(dev); + u32 value, tmp; + + u8 offset = bank + GPIOX_MODULE_RESET; + u32 mask = 1 << offset; + + regmap_read(priv->gcr_regmap, NPCM7XX_GCR_RESSR, &value); + if (value == 0) { + regmap_read(priv->gcr_regmap, NPCM7XX_GCR_INTCR2, &tmp); + value = ~tmp; + } + + dev_dbg(dev, "reboot reason: 0x%x\n", value); + + if (value & CORST) + regmap_read(priv->rst_regmap, NPCM7XX_RST_CORSTC, &tmp); + else if (value & WD0RST) + regmap_read(priv->rst_regmap, NPCM7XX_RST_WD0RCR, &tmp); + else if (value & WD1RST) + regmap_read(priv->rst_regmap, NPCM7XX_RST_WD1RCR, &tmp); + else if (value & WD2RST) + regmap_read(priv->rst_regmap, NPCM7XX_RST_WD2RCR, &tmp); + else + return false; + + return !((tmp & mask) >> offset); +} + +static int npcm7xx_gpio_reset_persist(struct udevice *dev, unsigned int banknum, int enable) +{ + struct npcm7xx_pinctrl_priv *priv = dev_get_priv(dev); + u32 num = GPIOX_MODULE_RESET + banknum; + + dev_dbg(dev, "set gpio persist, bank %d, enable %d\n", banknum, enable); + + if (enable) { + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD0RCR, BIT(num) | CA9C_RESET, 0); + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD1RCR, BIT(num) | CA9C_RESET, 0); + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD2RCR, BIT(num) | CA9C_RESET, 0); + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_CORSTC, BIT(num) | CA9C_RESET, 0); + } else { + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD0RCR, BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET); + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD1RCR, BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET); + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD2RCR, BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET); + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_CORSTC, BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET); + } + + return 0; +} + +/* Set drive strength for a pin, if supported */ +static int npcm7xx_set_drive_strength(struct udevice *dev, + unsigned int pin, int nval) +{ + struct npcm7xx_pinctrl_priv *priv = dev_get_priv(dev); + int bank = pin / NPCM7XX_GPIO_PER_BANK; + int gpio = (pin % NPCM7XX_GPIO_PER_BITS); + void __iomem *base = priv->gpio_base + (NPCM7XX_GPIO_BANK_OFFSET * bank); + int v; + + v = (pincfgs[pin].flag & DRIVE_STRENGTH_MASK); + if (!nval || !v) + return -ENOTSUPP; + + if (DSLO(v) == nval) { + dev_dbg(dev, + "setting pin %d to low strength [%d]\n", pin, nval); + clrbits_le32(base + NPCM7XX_GP_N_ODSC, BIT(gpio)); + return 0; + } else if (DSHI(v) == nval) { + dev_dbg(dev, + "setting pin %d to high strength [%d]\n", pin, nval); + setbits_le32(base + NPCM7XX_GP_N_ODSC, BIT(gpio)); + return 0; + } + + return -ENOTSUPP; +} + +/* Set slew rate of pin (high/low) */ +static int npcm7xx_set_slew_rate(struct udevice *dev, unsigned int pin, + int arg) +{ + struct npcm7xx_pinctrl_priv *priv = dev_get_priv(dev); + int bank = pin / NPCM7XX_GPIO_PER_BANK; + int gpio = (pin % NPCM7XX_GPIO_PER_BITS); + void __iomem *base = priv->gpio_base + (NPCM7XX_GPIO_BANK_OFFSET * bank); + + if (pincfgs[pin].flag & SLEW) { + switch (arg) { + case 0: + dev_dbg(dev, + "setting pin %d slew rate to low\n", pin); + clrbits_le32(base + NPCM7XX_GP_N_OSRC, BIT(gpio)); + return 0; + case 1: + dev_dbg(dev, + "setting pin %d slew rate to high\n", pin); + setbits_le32(base + NPCM7XX_GP_N_OSRC, BIT(gpio)); + return 0; + default: + return -ENOTSUPP; + } + } + + /* LPC Slew rate in SRCNT register */ + if (pincfgs[pin].flag & SLEWLPC) { + switch (arg) { + case 0: + dev_dbg(dev, + "setting LPC/ESPI(%d) slew rate to low\n", pin); + regmap_update_bits(priv->gcr_regmap, NPCM7XX_GCR_SRCNT, SRCNT_ESPI, 0); + return 0; + case 1: + dev_dbg(dev, "setting LPC/ESPI(%d) slew rate to high\n", pin); + regmap_update_bits(priv->gcr_regmap, NPCM7XX_GCR_SRCNT, SRCNT_ESPI, SRCNT_ESPI); + return 0; + default: + return -ENOTSUPP; + } + } + + return -ENOTSUPP; +} + +static int npcm7xx_pinconf_set(struct udevice *dev, unsigned int pin, + unsigned int param, unsigned int arg) +{ + struct npcm7xx_pinctrl_priv *priv = dev_get_priv(dev); + int err = 0; + int bank = pin / NPCM7XX_GPIO_PER_BANK; + int gpio = (pin % NPCM7XX_GPIO_PER_BITS); + void __iomem *base = priv->gpio_base + (0x1000 * bank); + + npcm7xx_setfunc(dev, (const int *)&pin, 1, fn_gpio); + + /* To prevent unexpected IRQ trap at verctor 00 in linux kernel */ + if (param == PIN_CONFIG_EVENT_CLEAR) { + dev_dbg(dev, "set pin %d event clear\n", pin); + clrbits_le32(base + NPCM7XX_GP_N_EVEN, BIT(gpio)); + setbits_le32(base + NPCM7XX_GP_N_EVST, BIT(gpio)); + return err; + } + + // allow set persist state disable + if (param == PIN_CONFIG_PERSIST_STATE) { + npcm7xx_gpio_reset_persist(dev, bank, arg); + return err; + } + + if (is_gpio_persist(dev, bank)) + return err; + + switch (param) { + case PIN_CONFIG_BIAS_DISABLE: + dev_dbg(dev, "set pin %d bias dsiable\n", pin); + clrbits_le32(base + NPCM7XX_GP_N_PU, BIT(gpio)); + clrbits_le32(base + NPCM7XX_GP_N_PD, BIT(gpio)); + break; + case PIN_CONFIG_BIAS_PULL_DOWN: + dev_dbg(dev, "set pin %d bias pull down\n", pin); + clrbits_le32(base + NPCM7XX_GP_N_PU, BIT(gpio)); + setbits_le32(base + NPCM7XX_GP_N_PD, BIT(gpio)); + break; + case PIN_CONFIG_BIAS_PULL_UP: + dev_dbg(dev, "set pin %d bias pull up\n", pin); + setbits_le32(base + NPCM7XX_GP_N_PU, BIT(gpio)); + clrbits_le32(base + NPCM7XX_GP_N_PD, BIT(gpio)); + break; + case PIN_CONFIG_INPUT_ENABLE: + dev_dbg(dev, "set pin %d input enable\n", pin); + setbits_le32(base + NPCM7XX_GP_N_OEC, BIT(gpio)); + setbits_le32(base + NPCM7XX_GP_N_IEM, BIT(gpio)); + break; + case PIN_CONFIG_OUTPUT_ENABLE: + dev_dbg(dev, "set pin %d output enable\n", pin); + clrbits_le32(base + NPCM7XX_GP_N_IEM, BIT(gpio)); + setbits_le32(base + NPCM7XX_GP_N_OES, BIT(gpio)); + case PIN_CONFIG_OUTPUT: + dev_dbg(dev, "set pin %d output %d\n", pin, arg); + clrbits_le32(base + NPCM7XX_GP_N_IEM, BIT(gpio)); + setbits_le32(base + NPCM7XX_GP_N_OES, BIT(gpio)); + if (arg) + setbits_le32(base + NPCM7XX_GP_N_DOUT, BIT(gpio)); + else + clrbits_le32(base + NPCM7XX_GP_N_DOUT, BIT(gpio)); + break; + case PIN_CONFIG_DRIVE_PUSH_PULL: + dev_dbg(dev, "set pin %d push pull\n", pin); + clrbits_le32(base + NPCM7XX_GP_N_OTYP, BIT(gpio)); + break; + case PIN_CONFIG_DRIVE_OPEN_DRAIN: + dev_dbg(dev, "set pin %d open drain\n", pin); + setbits_le32(base + NPCM7XX_GP_N_OTYP, BIT(gpio)); + break; + case PIN_CONFIG_INPUT_DEBOUNCE: + dev_dbg(dev, "set pin %d input debounce\n", pin); + setbits_le32(base + NPCM7XX_GP_N_DBNC, BIT(gpio)); + break; + case PIN_CONFIG_POLARITY_STATE: + dev_dbg(dev, "set pin %d active %d\n", pin, arg); + if (arg) + setbits_le32(base + NPCM7XX_GP_N_POL, BIT(gpio)); + else + clrbits_le32(base + NPCM7XX_GP_N_POL, BIT(gpio)); + break; + case PIN_CONFIG_DRIVE_STRENGTH: + dev_dbg(dev, "set pin %d driver strength %d\n", pin, arg); + err = npcm7xx_set_drive_strength(dev, pin, arg); + break; + case PIN_CONFIG_SLEW_RATE: + dev_dbg(dev, "set pin %d slew rate %d\n", pin, arg); + err = npcm7xx_set_slew_rate(dev, pin, arg); + break; + default: + err = -ENOTSUPP; + } + return err; +} + +#endif + +static struct pinctrl_ops npcm7xx_pinctrl_ops = { + .set_state = pinctrl_generic_set_state, + .get_pins_count = npcm7xx_get_pins_count, + .get_pin_name = npcm7xx_get_pin_name, + .get_groups_count = npcm7xx_get_groups_count, + .get_group_name = npcm7xx_get_group_name, + .get_functions_count = npcm7xx_get_functions_count, + .get_function_name = npcm7xx_get_function_name, + .pinmux_set = npcm7xx_pinmux_set, + .pinmux_group_set = npcm7xx_pinmux_set, +#if CONFIG_IS_ENABLED(PINCONF) + .pinconf_num_params = ARRAY_SIZE(npcm7xx_conf_params), + .pinconf_params = npcm7xx_conf_params, + .pinconf_set = npcm7xx_pinconf_set, + .pinconf_group_set = npcm7xx_pinconf_set, +#endif +}; + +static const struct udevice_id npcm7xx_pinctrl_ids[] = { + { .compatible = "nuvoton,npcm750-pinctrl" }, + { } +}; + +U_BOOT_DRIVER(pinctrl_npcm7xx) = { + .name = "nuvoton_npcm7xx_pinctrl", + .id = UCLASS_PINCTRL, + .of_match = npcm7xx_pinctrl_ids, + .priv_auto = sizeof(struct npcm7xx_pinctrl_priv), + .ops = &npcm7xx_pinctrl_ops, + .probe = npcm7xx_pinctrl_probe, +}; -- GitLab From 29d382b94e6a1b0eddb3b7ae52099c9736c37a20 Mon Sep 17 00:00:00 2001 From: Masahisa Kojima Date: Tue, 17 May 2022 17:41:36 +0900 Subject: [PATCH 126/581] spi: synquacer: busy variable must be initialized before use "busy" variable is ORed without being initialized, must be zeroed before use. Signed-off-by: Masahisa Kojima Signed-off-by: Satoru Okamoto Acked-by: Jassi Brar --- drivers/spi/spi-synquacer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-synquacer.c b/drivers/spi/spi-synquacer.c index ce558c4bc07..62f85f03353 100644 --- a/drivers/spi/spi-synquacer.c +++ b/drivers/spi/spi-synquacer.c @@ -275,7 +275,7 @@ static int synquacer_spi_xfer(struct udevice *dev, unsigned int bitlen, { struct udevice *bus = dev->parent; struct synquacer_spi_priv *priv = dev_get_priv(bus); - u32 val, words, busy; + u32 val, words, busy = 0; val = readl(priv->base + FIFOCFG); val |= (1 << RX_FLUSH); -- GitLab From 88d50ed8a15fc4a0df37e2a274607827a52a2217 Mon Sep 17 00:00:00 2001 From: Masahisa Kojima Date: Tue, 17 May 2022 17:41:37 +0900 Subject: [PATCH 127/581] spi: synquacer: wait until slave is deselected synquacer_cs_set() function does not wait the chip select is deasserted when the driver sets the DMSTOP to deselect the slave. This commit checks the Slave Select Released(SRS) bit to wait until the slave is deselected. Signed-off-by: Masahisa Kojima Signed-off-by: Satoru Okamoto Acked-by: Jassi Brar --- drivers/spi/spi-synquacer.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/spi/spi-synquacer.c b/drivers/spi/spi-synquacer.c index 62f85f03353..f1422cf893e 100644 --- a/drivers/spi/spi-synquacer.c +++ b/drivers/spi/spi-synquacer.c @@ -46,7 +46,9 @@ #define RXE 0x24 #define RXC 0x28 #define TFLETE 4 +#define TSSRS 6 #define RFMTE 5 +#define RSSRS 6 #define FAULTF 0x2c #define FAULTC 0x30 @@ -170,6 +172,11 @@ static void synquacer_cs_set(struct synquacer_spi_priv *priv, bool active) priv->rx_words = 16; read_fifo(priv); } + + /* wait until slave is deselected */ + while (!(readl(priv->base + TXF) & BIT(TSSRS)) || + !(readl(priv->base + RXF) & BIT(RSSRS))) + ; } } -- GitLab From de9f2c9c2ed8ee4ffadc3909a46c17888fed619f Mon Sep 17 00:00:00 2001 From: Masahisa Kojima Date: Tue, 17 May 2022 17:41:38 +0900 Subject: [PATCH 128/581] spi: synquacer: DMSTART bit must not be set while transferring DMSTART bit must not be set while there is active transfer. This commit sets the DMSTART bit only when the transfer begins. Signed-off-by: Masahisa Kojima Signed-off-by: Satoru Okamoto Acked-by: Jassi Brar --- drivers/spi/spi-synquacer.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-synquacer.c b/drivers/spi/spi-synquacer.c index f1422cf893e..5e1b3aedc73 100644 --- a/drivers/spi/spi-synquacer.c +++ b/drivers/spi/spi-synquacer.c @@ -330,9 +330,11 @@ static int synquacer_spi_xfer(struct udevice *dev, unsigned int bitlen, writel(~0, priv->base + RXC); /* Trigger */ - val = readl(priv->base + DMSTART); - val |= BIT(TRIGGER); - writel(val, priv->base + DMSTART); + if (flags & SPI_XFER_BEGIN) { + val = readl(priv->base + DMSTART); + val |= BIT(TRIGGER); + writel(val, priv->base + DMSTART); + } while (busy & (BIT(RXBIT) | BIT(TXBIT))) { if (priv->rx_words) -- GitLab From f81aaa0b33bec4292838e75d14a0653775aea45d Mon Sep 17 00:00:00 2001 From: Masahisa Kojima Date: Tue, 17 May 2022 17:41:39 +0900 Subject: [PATCH 129/581] spi: synquacer: simplify tx completion checking There is a TX-FIFO and Shift Register empty(TFES) status bit in spi controller. This commit checks the TFES bit to wait the TX transfer completes. Signed-off-by: Masahisa Kojima Signed-off-by: Satoru Okamoto Acked-by: Jassi Brar --- drivers/spi/spi-synquacer.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/spi/spi-synquacer.c b/drivers/spi/spi-synquacer.c index 5e1b3aedc73..0cae3dfc778 100644 --- a/drivers/spi/spi-synquacer.c +++ b/drivers/spi/spi-synquacer.c @@ -45,6 +45,7 @@ #define RXF 0x20 #define RXE 0x24 #define RXC 0x28 +#define TFES 1 #define TFLETE 4 #define TSSRS 6 #define RFMTE 5 @@ -345,13 +346,10 @@ static int synquacer_spi_xfer(struct udevice *dev, unsigned int bitlen, if (priv->tx_words) { write_fifo(priv); } else { - u32 len; - - do { /* wait for shifter to empty out */ + /* wait for shifter to empty out */ + while (!(readl(priv->base + TXF) & BIT(TFES))) cpu_relax(); - len = readl(priv->base + DMSTATUS); - len = (len >> TX_DATA_SHIFT) & TX_DATA_MASK; - } while (tx_buf && len); + busy &= ~BIT(TXBIT); } } -- GitLab From 750d8470cbdd323bafc0a79df582f9057b8f50ba Mon Sep 17 00:00:00 2001 From: Aswath Govindraju Date: Wed, 18 May 2022 16:49:12 +0530 Subject: [PATCH 130/581] arm: dts: k3-am654-r5-base-board: Fix the dt properties in usb0 instance For dfu boot mode, the clocks property needs to be deleted and dr_mode needs to be set to peripheral. Therefore, add the required fixes for the same. Signed-off-by: Aswath Govindraju --- arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi | 2 +- arch/arm/dts/k3-am654-r5-base-board.dts | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi index 26567f4167f..1d0659ea8ff 100644 --- a/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi +++ b/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi @@ -198,7 +198,7 @@ &usb0 { pinctrl-names = "default"; pinctrl-0 = <&usb0_pins_default>; - dr_mode = "host"; + dr_mode = "peripheral"; u-boot,dm-spl; }; diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts b/arch/arm/dts/k3-am654-r5-base-board.dts index 24881c86f2a..455698a9363 100644 --- a/arch/arm/dts/k3-am654-r5-base-board.dts +++ b/arch/arm/dts/k3-am654-r5-base-board.dts @@ -309,6 +309,7 @@ &dwc3_0 { status = "okay"; u-boot,dm-spl; + /delete-property/ clocks; /delete-property/ power-domains; /delete-property/ assigned-clocks; /delete-property/ assigned-clock-parents; -- GitLab From 36dafd8045ebe1cfb452a87e51fa394849532a7d Mon Sep 17 00:00:00 2001 From: Aswath Govindraju Date: Wed, 18 May 2022 16:49:13 +0530 Subject: [PATCH 131/581] arm: mach-k3: am6_init: Fix the path and value's length in the fixup performed for usb boot The node name of the bus in the device tree has changed. Also, the length argument to be passed should be the length of new value. Therefore, fix the path to usb device tree node as well as the length argument passed. Signed-off-by: Aswath Govindraju --- arch/arm/mach-k3/am6_init.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-k3/am6_init.c b/arch/arm/mach-k3/am6_init.c index 86c1a349f1f..7992918adcd 100644 --- a/arch/arm/mach-k3/am6_init.c +++ b/arch/arm/mach-k3/am6_init.c @@ -127,8 +127,8 @@ static int fixup_usb_boot(void) * before the dwc3 bind takes place */ ret = fdt_find_and_setprop((void *)gd->fdt_blob, - "/interconnect@100000/dwc3@4000000/usb@10000", - "dr_mode", "host", 11, 0); + "/bus@100000/dwc3@4000000/usb@10000", + "dr_mode", "host", 5, 0); if (ret) printf("%s: fdt_find_and_setprop() failed:%d\n", __func__, ret); -- GitLab From b5d3625f27028e944922f70c4582ade437d608fc Mon Sep 17 00:00:00 2001 From: Aswath Govindraju Date: Wed, 18 May 2022 16:49:14 +0530 Subject: [PATCH 132/581] configs: am65_evm_r5_usb*_defconfig: Sync the checks for size of image and stack from generic r5 defconfig Sync the configs required for enabling checks for size of image and stack from generic r5 defconfig file. Signed-off-by: Aswath Govindraju --- configs/am65x_evm_r5_usbdfu_defconfig | 5 +++++ configs/am65x_evm_r5_usbmsc_defconfig | 5 +++++ 2 files changed, 10 insertions(+) diff --git a/configs/am65x_evm_r5_usbdfu_defconfig b/configs/am65x_evm_r5_usbdfu_defconfig index dbda4f74554..05a6a9219ea 100644 --- a/configs/am65x_evm_r5_usbdfu_defconfig +++ b/configs/am65x_evm_r5_usbdfu_defconfig @@ -16,6 +16,8 @@ CONFIG_SPL_TEXT_BASE=0x41c00000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_SIZE_LIMIT=0x7ec00 +CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x2000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y @@ -25,10 +27,13 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y +CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x58000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x41c7effc CONFIG_SPL_BSS_MAX_SIZE=0xc00 +CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SYS_SPL_MALLOC=y diff --git a/configs/am65x_evm_r5_usbmsc_defconfig b/configs/am65x_evm_r5_usbmsc_defconfig index 64b7d49310d..37e04483dbd 100644 --- a/configs/am65x_evm_r5_usbmsc_defconfig +++ b/configs/am65x_evm_r5_usbmsc_defconfig @@ -16,6 +16,8 @@ CONFIG_SPL_TEXT_BASE=0x41c00000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_SIZE_LIMIT=0x7ec00 +CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x2000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y @@ -24,10 +26,13 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c7effc CONFIG_SPL_LOAD_FIT=y CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y +CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x58000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x41c7effc CONFIG_SPL_BSS_MAX_SIZE=0xc00 +CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SYS_SPL_MALLOC=y -- GitLab From 866eab1d28b5cee39da50c9392bb5112b4865656 Mon Sep 17 00:00:00 2001 From: Jim Liu Date: Tue, 24 May 2022 16:56:57 +0800 Subject: [PATCH 133/581] rng: nuvoton: Add NPCM7xx rng driver Add Nuvoton BMC NPCM750 rng driver. Signed-off-by: Jim Liu --- drivers/rng/Kconfig | 7 ++ drivers/rng/Makefile | 1 + drivers/rng/npcm_rng.c | 156 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 164 insertions(+) create mode 100644 drivers/rng/npcm_rng.c diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig index c10f7d345bd..c0c49c34843 100644 --- a/drivers/rng/Kconfig +++ b/drivers/rng/Kconfig @@ -31,6 +31,13 @@ config RNG_MSM This driver provides support for the Random Number Generator hardware found on Qualcomm SoCs. +config RNG_NPCM + bool "Nuvoton NPCM SoCs Random Number Generator support" + depends on DM_RNG + help + Enable random number generator on NPCM SoCs. + This unit can provide 750 to 1000 random bits per second + config RNG_OPTEE bool "OP-TEE based Random Number Generator support" depends on DM_RNG && OPTEE diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile index 435b3b965ad..0ae0ed4171c 100644 --- a/drivers/rng/Makefile +++ b/drivers/rng/Makefile @@ -7,6 +7,7 @@ obj-$(CONFIG_DM_RNG) += rng-uclass.o obj-$(CONFIG_RNG_MESON) += meson-rng.o obj-$(CONFIG_RNG_SANDBOX) += sandbox_rng.o obj-$(CONFIG_RNG_MSM) += msm_rng.o +obj-$(CONFIG_RNG_NPCM) += npcm_rng.o obj-$(CONFIG_RNG_OPTEE) += optee_rng.o obj-$(CONFIG_RNG_STM32MP1) += stm32mp1_rng.o obj-$(CONFIG_RNG_ROCKCHIP) += rockchip_rng.o diff --git a/drivers/rng/npcm_rng.c b/drivers/rng/npcm_rng.c new file mode 100644 index 00000000000..70c1c032b6d --- /dev/null +++ b/drivers/rng/npcm_rng.c @@ -0,0 +1,156 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2022 Nuvoton Technology Corp. + */ + +#include +#include +#include +#include +#include +#include + +#define RNGCS_RNGE BIT(0) +#define RNGCS_DVALID BIT(1) +#define RNGCS_CLKP(range) ((0x0f & (range)) << 2) +#define RNGMODE_M1ROSEL_VAL (0x02) /* Ring Oscillator Select for Method I */ + +enum { + RNG_CLKP_80_100_MHZ = 0x00, /*default */ + RNG_CLKP_60_80_MHZ = 0x01, + RNG_CLKP_50_60_MHZ = 0x02, + RNG_CLKP_40_50_MHZ = 0x03, + RNG_CLKP_30_40_MHZ = 0x04, + RNG_CLKP_25_30_MHZ = 0x05, + RNG_CLKP_20_25_MHZ = 0x06, + RNG_CLKP_5_20_MHZ = 0x07, + RNG_CLKP_2_15_MHZ = 0x08, + RNG_CLKP_9_12_MHZ = 0x09, + RNG_CLKP_7_9_MHZ = 0x0A, + RNG_CLKP_6_7_MHZ = 0x0B, + RNG_CLKP_5_6_MHZ = 0x0C, + RNG_CLKP_4_5_MHZ = 0x0D, + RNG_CLKP_3_4_MHZ = 0x0E, + RNG_NUM_OF_CLKP +}; + +struct npcm_rng_regs { + unsigned int rngcs; + unsigned int rngd; + unsigned int rngmode; +}; + +struct npcm_rng_priv { + struct npcm_rng_regs *regs; +}; + +static struct npcm_rng_priv *rng_priv; + +void npcm_rng_init(void) +{ + struct npcm_rng_regs *regs = rng_priv->regs; + int init; + + /* check if rng enabled */ + init = readb(®s->rngcs); + if ((init & RNGCS_RNGE) == 0) { + /* init rng */ + writeb(RNGCS_CLKP(RNG_CLKP_20_25_MHZ) | RNGCS_RNGE, ®s->rngcs); + writeb(RNGMODE_M1ROSEL_VAL, ®s->rngmode); + } +} + +void npcm_rng_disable(void) +{ + struct npcm_rng_regs *regs = rng_priv->regs; + + /* disable rng */ + writeb(0, ®s->rngcs); + writeb(0, ®s->rngmode); +} + +void srand(unsigned int seed) +{ + /* no need to seed for now */ +} + +int npcm_rng_read(struct udevice *dev, void *data, size_t max) +{ + struct npcm_rng_regs *regs = rng_priv->regs; + int i; + int ret_val = 0; + char *buf = data; + + npcm_rng_init(); + + printf("NPCM HW RNG\n"); + /* Wait for RNG done (max bytes) */ + for (i = 0; i < max; i++) { + /* wait until DVALID is set */ + while ((readb(®s->rngcs) & RNGCS_DVALID) == 0) + ; + buf[i] = ((unsigned int)readb(®s->rngd) & 0x000000FF); + } + + return ret_val; +} + +unsigned int rand_r(unsigned int *seedp) +{ + struct npcm_rng_regs *regs = rng_priv->regs; + int i; + unsigned int ret_val = 0; + + npcm_rng_init(); + + /* Wait for RNG done (4 bytes) */ + for (i = 0; i < 4 ; i++) { + /* wait until DVALID is set */ + while ((readb(®s->rngcs) & RNGCS_DVALID) == 0) + ; + ret_val |= (((unsigned int)readb(®s->rngd) & 0x000000FF) << (i * 8)); + } + + return ret_val; +} + +unsigned int rand(void) +{ + return rand_r(NULL); +} + +static int npcm_rng_bind(struct udevice *dev) +{ + rng_priv = calloc(1, sizeof(struct npcm_rng_priv)); + if (!rng_priv) + return -ENOMEM; + + rng_priv->regs = dev_remap_addr_index(dev, 0); + if (!rng_priv->regs) { + printf("Cannot find rng reg address, binding failed\n"); + return -EINVAL; + } + + printf("RNG: NPCM RNG module bind OK\n"); + + return 0; +} + +static const struct udevice_id npcm_rng_ids[] = { + { .compatible = "nuvoton,npcm845-rng" }, + { .compatible = "nuvoton,npcm750-rng" }, + { } +}; + +static const struct dm_rng_ops npcm_rng_ops = { + .read = npcm_rng_read, +}; + +U_BOOT_DRIVER(npcm_rng) = { + .name = "npcm_rng", + .id = UCLASS_RNG, + .ops = &npcm_rng_ops, + .of_match = npcm_rng_ids, + .priv_auto = sizeof(struct npcm_rng_priv), + .bind = npcm_rng_bind, +}; -- GitLab From ed6d78146977ddd6d467131453f3761948d6a25b Mon Sep 17 00:00:00 2001 From: Aswath Govindraju Date: Wed, 25 May 2022 13:38:39 +0530 Subject: [PATCH 134/581] drivers: mmc: am654_sdhci: Add new compatible for AM62 SoC The phy used in the 8 bit instance has been changed to the phy used in 4 bit instance on AM62 SoC. This implies the phy configuration required for both the instances of mmc are similar. Therefore, add a new compatible for AM62 SoC using the driver data of am64 4 bit instance. Signed-off-by: Aswath Govindraju Signed-off-by: Vignesh Raghavendra Reviewed-by: Jaehoon Chung --- drivers/mmc/am654_sdhci.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c index 4305967d784..42a61343645 100644 --- a/drivers/mmc/am654_sdhci.c +++ b/drivers/mmc/am654_sdhci.c @@ -670,6 +670,10 @@ static const struct udevice_id am654_sdhci_ids[] = { .compatible = "ti,am64-sdhci-4bit", .data = (ulong)&sdhci_am64_4bit_drvdata, }, + { + .compatible = "ti,am62-sdhci", + .data = (ulong)&sdhci_am64_4bit_drvdata, + }, { } }; -- GitLab From 8a6d273343109a6851251fb51b178c543bc13741 Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Wed, 25 May 2022 13:38:40 +0530 Subject: [PATCH 135/581] dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM62 Add pinctrl macros for AM62x SoCs. These macro definitions are similar to that of previous platforms, but adding new definitions to avoid any naming confusions in the SoC dts files. checkpatch insists the following error exists: ERROR: Macros with complex values should be enclosed in parentheses However, we do not need parentheses enclosing the values for this macro as we do intend it to generate two separate values as has been done for other similar platforms. Signed-off-by: Suman Anna Signed-off-by: Vignesh Raghavendra --- include/dt-bindings/pinctrl/k3.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/dt-bindings/pinctrl/k3.h b/include/dt-bindings/pinctrl/k3.h index 63e038e36ca..a5204ab91d3 100644 --- a/include/dt-bindings/pinctrl/k3.h +++ b/include/dt-bindings/pinctrl/k3.h @@ -41,4 +41,7 @@ #define J721S2_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) #define J721S2_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) +#define AM62X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) +#define AM62X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) + #endif -- GitLab From 4298ee7e40baedc68707a9d4c96e5684e11d763b Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Wed, 25 May 2022 13:38:41 +0530 Subject: [PATCH 136/581] soc: ti: k3-socinfo: Add entry for AM62X SoC family Add support for AM62x SoC identification. Signed-off-by: Suman Anna Signed-off-by: Vignesh Raghavendra Reviewed-by: Tom Rini --- drivers/soc/soc_ti_k3.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/soc/soc_ti_k3.c b/drivers/soc/soc_ti_k3.c index 965728e8185..42344145f9f 100644 --- a/drivers/soc/soc_ti_k3.c +++ b/drivers/soc/soc_ti_k3.c @@ -15,6 +15,7 @@ #define J7200 0xbb6d #define AM64X 0xbb38 #define J721S2 0xbb75 +#define AM62X 0xbb7e #define JTAG_ID_VARIANT_SHIFT 28 #define JTAG_ID_VARIANT_MASK (0xf << 28) @@ -49,6 +50,9 @@ static const char *get_family_string(u32 idreg) case J721S2: family = "J721S2"; break; + case AM62X: + family = "AM62X"; + break; default: family = "Unknown Silicon"; }; -- GitLab From d98e860051553fa4d395a7e7da8e40d1c8e21f71 Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Wed, 25 May 2022 13:38:42 +0530 Subject: [PATCH 137/581] arm: mach-k3: Introduce the basic files to support AM62 The AM62 SoC family is the follow on AM335x built on K3 Multicore SoC architecture platform, providing ultra-low-power modes, dual display, multi-sensor edge compute, security and other BOM-saving integration. The AM62 SoC targets broad market to enable applications such as Industrial HMI, PLC/CNC/Robot control, Medical Equipment, Building Automation, Appliances and more. Some highlights of this SoC are: * Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster. Pin-to-pin compatible options for single and quad core are available. * Cortex-M4F for general-purpose or safety usage. * Dual display support, providing 24-bit RBG parallel interface and OLDI/LVDS-4 Lane x2, up to 200MHz pixel clock support for 2K display resolution. * Selectable GPUsupport, up to 8GFLOPS, providing better user experience in 3D graphic display case and Android. * PRU(Programmable Realtime Unit) support for customized programmable interfaces/IOs. * Integrated Giga-bit Ethernet switch supporting up to a total of two external ports (TSN capable). * 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3x eMMC and SD, GPMC for NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio, 1x CSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals. * Dedicated Centralized System Controller for Security, Power, and Resource Management. * Multiple low power modes support, ex: Deep sleep,Standby, MCU-only, enabling battery powered system design. AM625 is the first device of the family. Add DT bindings for the same. More details can be found in the Technical Reference Manual: https://www.ti.com/lit/pdf/spruiv7 Signed-off-by: Suman Anna Signed-off-by: Gowtham Tammana Signed-off-by: Aswath Govindraju Signed-off-by: Nishanth Menon Signed-off-by: Vignesh Raghavendra Reviewed-by: Tom Rini --- arch/arm/mach-k3/Kconfig | 9 +- arch/arm/mach-k3/Makefile | 1 + arch/arm/mach-k3/am625_init.c | 271 ++++++++++++++++++ arch/arm/mach-k3/arm64-mmu.c | 4 +- arch/arm/mach-k3/include/mach/am62_hardware.h | 75 +++++ arch/arm/mach-k3/include/mach/am62_spl.h | 48 ++++ arch/arm/mach-k3/include/mach/hardware.h | 4 + arch/arm/mach-k3/include/mach/spl.h | 5 + drivers/ram/Kconfig | 1 + 9 files changed, 415 insertions(+), 3 deletions(-) create mode 100644 arch/arm/mach-k3/am625_init.c create mode 100644 arch/arm/mach-k3/include/mach/am62_hardware.h create mode 100644 arch/arm/mach-k3/include/mach/am62_spl.h diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig index a01bf235149..0dc4f44fdd2 100644 --- a/arch/arm/mach-k3/Kconfig +++ b/arch/arm/mach-k3/Kconfig @@ -16,6 +16,9 @@ config SOC_K3_J721S2 config SOC_K3_AM642 bool "TI's K3 based AM642 SoC Family Support" +config SOC_K3_AM625 + bool "TI's K3 based AM625 SoC Family Support" + endchoice config SYS_SOC @@ -26,6 +29,7 @@ config SYS_K3_NON_SECURE_MSRAM_SIZE default 0x80000 if SOC_K3_AM6 default 0x100000 if SOC_K3_J721E || SOC_K3_J721S2 default 0x1c0000 if SOC_K3_AM642 + default 0x3c000 if SOC_K3_AM625 help Describes the total size of the MCU or OCMC MSRAM present on the SoC in use. This doesn't specify the total size of SPL as @@ -37,6 +41,7 @@ config SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE default 0x58000 if SOC_K3_AM6 default 0xc0000 if SOC_K3_J721E || SOC_K3_J721S2 default 0x180000 if SOC_K3_AM642 + default 0x38000 if SOC_K3_AM625 help Describes the maximum size of the image that ROM can download from any boot media. @@ -61,6 +66,7 @@ config SYS_K3_BOOT_PARAM_TABLE_INDEX default 0x41cffbfc if SOC_K3_J721E default 0x41cfdbfc if SOC_K3_J721S2 default 0x701bebfc if SOC_K3_AM642 + default 0x43c3f290 if SOC_K3_AM625 help Address at which ROM stores the value which determines if SPL is booted up by primary boot media or secondary boot media. @@ -129,6 +135,7 @@ config K3_SYSFW_IMAGE_MMCSD_RAW_MODE_PART config K3_SYSFW_IMAGE_SIZE_MAX int "Amount of memory dynamically allocated for loading SYSFW blob" depends on K3_LOAD_SYSFW + default 163840 if SOC_K3_AM625 default 278000 help Amount of memory (in bytes) reserved through dynamic allocation at @@ -160,7 +167,7 @@ config K3_ATF_LOAD_ADDR config K3_DM_FW bool "Separate DM firmware image" - depends on SPL && CPU_V7R && (SOC_K3_J721E || SOC_K3_J721S2) && !CLK_TI_SCI && !TI_SCI_POWER_DOMAIN + depends on SPL && CPU_V7R && (SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_AM625) && !CLK_TI_SCI && !TI_SCI_POWER_DOMAIN default y help Enabling this will indicate that the system has separate DM diff --git a/arch/arm/mach-k3/Makefile b/arch/arm/mach-k3/Makefile index c0a6a9c87d8..8459bef93bc 100644 --- a/arch/arm/mach-k3/Makefile +++ b/arch/arm/mach-k3/Makefile @@ -7,6 +7,7 @@ obj-$(CONFIG_SOC_K3_AM6) += am6_init.o obj-$(CONFIG_SOC_K3_J721E) += j721e_init.o j721e/ j7200/ obj-$(CONFIG_SOC_K3_J721S2) += j721s2_init.o j721s2/ obj-$(CONFIG_SOC_K3_AM642) += am642_init.o +obj-$(CONFIG_SOC_K3_AM625) += am625_init.o am62x/ obj-$(CONFIG_ARM64) += arm64-mmu.o obj-$(CONFIG_CPU_V7R) += r5_mpu.o lowlevel_init.o obj-$(CONFIG_TI_SECURE_DEVICE) += security.o diff --git a/arch/arm/mach-k3/am625_init.c b/arch/arm/mach-k3/am625_init.c new file mode 100644 index 00000000000..0d9525992bb --- /dev/null +++ b/arch/arm/mach-k3/am625_init.c @@ -0,0 +1,271 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * AM625: SoC specific initialization + * + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ + * Suman Anna + */ + +#include +#include +#include +#include +#include "common.h" +#include +#include +#include + +#if defined(CONFIG_SPL_BUILD) + +/* + * This uninitialized global variable would normal end up in the .bss section, + * but the .bss is cleared between writing and reading this variable, so move + * it to the .data section. + */ +u32 bootindex __section(".data"); +static struct rom_extended_boot_data bootdata __section(".data"); + +static void store_boot_info_from_rom(void) +{ + bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX); + memcpy(&bootdata, (uintptr_t *)ROM_ENTENDED_BOOT_DATA_INFO, + sizeof(struct rom_extended_boot_data)); +} + +static void ctrl_mmr_unlock(void) +{ + /* Unlock all WKUP_CTRL_MMR0 module registers */ + mmr_unlock(WKUP_CTRL_MMR0_BASE, 0); + mmr_unlock(WKUP_CTRL_MMR0_BASE, 1); + mmr_unlock(WKUP_CTRL_MMR0_BASE, 2); + mmr_unlock(WKUP_CTRL_MMR0_BASE, 3); + mmr_unlock(WKUP_CTRL_MMR0_BASE, 4); + mmr_unlock(WKUP_CTRL_MMR0_BASE, 5); + mmr_unlock(WKUP_CTRL_MMR0_BASE, 6); + mmr_unlock(WKUP_CTRL_MMR0_BASE, 7); + + /* Unlock all CTRL_MMR0 module registers */ + mmr_unlock(CTRL_MMR0_BASE, 0); + mmr_unlock(CTRL_MMR0_BASE, 1); + mmr_unlock(CTRL_MMR0_BASE, 2); + mmr_unlock(CTRL_MMR0_BASE, 4); + mmr_unlock(CTRL_MMR0_BASE, 6); + + /* Unlock all MCU_CTRL_MMR0 module registers */ + mmr_unlock(MCU_CTRL_MMR0_BASE, 0); + mmr_unlock(MCU_CTRL_MMR0_BASE, 1); + mmr_unlock(MCU_CTRL_MMR0_BASE, 2); + mmr_unlock(MCU_CTRL_MMR0_BASE, 3); + mmr_unlock(MCU_CTRL_MMR0_BASE, 4); + mmr_unlock(MCU_CTRL_MMR0_BASE, 6); + + /* Unlock PADCFG_CTRL_MMR padconf registers */ + mmr_unlock(PADCFG_MMR0_BASE, 1); + mmr_unlock(PADCFG_MMR1_BASE, 1); +} + +void board_init_f(ulong dummy) +{ + struct udevice *dev; + int ret; + +#if defined(CONFIG_CPU_V7R) + setup_k3_mpu_regions(); +#endif + + /* + * Cannot delay this further as there is a chance that + * K3_BOOT_PARAM_TABLE_INDEX can be over written by SPL MALLOC section. + */ + store_boot_info_from_rom(); + + ctrl_mmr_unlock(); + + /* Init DM early */ + spl_early_init(); + + /* + * Process pinctrl for the serial0 and serial3, aka WKUP_UART0 and + * MAIN_UART1 modules and continue regardless of the result of pinctrl. + * Do this without probing the device, but instead by searching the + * device that would request the given sequence number if probed. The + * UARTs will be used by the DM firmware and TIFS firmware images + * respectively and the firmware depend on SPL to initialize the pin + * settings. + */ + ret = uclass_find_device_by_seq(UCLASS_SERIAL, 0, &dev); + if (!ret) + pinctrl_select_state(dev, "default"); + + ret = uclass_find_device_by_seq(UCLASS_SERIAL, 3, &dev); + if (!ret) + pinctrl_select_state(dev, "default"); + + preloader_console_init(); + +#ifdef CONFIG_K3_EARLY_CONS + /* + * Allow establishing an early console as required for example when + * doing a UART-based boot. Note that this console may not "survive" + * through a SYSFW PM-init step and will need a re-init in some way + * due to changing module clock frequencies. + */ + early_console_init(); +#endif + +#if defined(CONFIG_K3_LOAD_SYSFW) + /* + * Configure and start up system controller firmware. Provide + * the U-Boot console init function to the SYSFW post-PM configuration + * callback hook, effectively switching on (or over) the console + * output. + */ + ret = is_rom_loaded_sysfw(&bootdata); + if (!ret) + panic("ROM has not loaded TIFS firmware\n"); + + k3_sysfw_loader(true, NULL, NULL); +#endif + + /* + * Force probe of clk_k3 driver here to ensure basic default clock + * configuration is always done. + */ + if (IS_ENABLED(CONFIG_SPL_CLK_K3)) { + ret = uclass_get_device_by_driver(UCLASS_CLK, + DM_DRIVER_GET(ti_clk), + &dev); + if (ret) + printf("Failed to initialize clk-k3!\n"); + } + + /* Output System Firmware version info */ + k3_sysfw_print_ver(); + +#if defined(CONFIG_K3_AM64_DDRSS) + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) + panic("DRAM init failed: %d\n", ret); +#endif +} + +u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device) +{ + u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT); + u32 bootmode_cfg = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK) >> + MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT; + + switch (boot_device) { + case BOOT_DEVICE_MMC1: + if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_FS_RAW_MASK) >> + MAIN_DEVSTAT_PRIMARY_MMC_FS_RAW_SHIFT) + return MMCSD_MODE_EMMCBOOT; + return MMCSD_MODE_FS; + + case BOOT_DEVICE_MMC2: + return MMCSD_MODE_FS; + + default: + return MMCSD_MODE_RAW; + } +} + +static u32 __get_backup_bootmedia(u32 devstat) +{ + u32 bkup_bootmode = (devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_MASK) >> + MAIN_DEVSTAT_BACKUP_BOOTMODE_SHIFT; + u32 bkup_bootmode_cfg = + (devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_MASK) >> + MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_SHIFT; + + switch (bkup_bootmode) { + case BACKUP_BOOT_DEVICE_UART: + return BOOT_DEVICE_UART; + + case BACKUP_BOOT_DEVICE_USB: + return BOOT_DEVICE_USB; + + case BACKUP_BOOT_DEVICE_ETHERNET: + return BOOT_DEVICE_ETHERNET; + + case BACKUP_BOOT_DEVICE_MMC: + if (bkup_bootmode_cfg) + return BOOT_DEVICE_MMC2; + return BOOT_DEVICE_MMC1; + + case BACKUP_BOOT_DEVICE_SPI: + return BOOT_DEVICE_SPI; + + case BACKUP_BOOT_DEVICE_I2C: + return BOOT_DEVICE_I2C; + + case BACKUP_BOOT_DEVICE_DFU: + if (bkup_bootmode_cfg & MAIN_DEVSTAT_BACKUP_USB_MODE_MASK) + return BOOT_DEVICE_USB; + return BOOT_DEVICE_DFU; + }; + + return BOOT_DEVICE_RAM; +} + +static u32 __get_primary_bootmedia(u32 devstat) +{ + u32 bootmode = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK) >> + MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT; + u32 bootmode_cfg = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK) >> + MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT; + + switch (bootmode) { + case BOOT_DEVICE_OSPI: + fallthrough; + case BOOT_DEVICE_QSPI: + fallthrough; + case BOOT_DEVICE_XSPI: + fallthrough; + case BOOT_DEVICE_SPI: + return BOOT_DEVICE_SPI; + + case BOOT_DEVICE_ETHERNET_RGMII: + fallthrough; + case BOOT_DEVICE_ETHERNET_RMII: + return BOOT_DEVICE_ETHERNET; + + case BOOT_DEVICE_EMMC: + return BOOT_DEVICE_MMC1; + + case BOOT_DEVICE_MMC: + if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK) >> + MAIN_DEVSTAT_PRIMARY_MMC_PORT_SHIFT) + return BOOT_DEVICE_MMC2; + return BOOT_DEVICE_MMC1; + + case BOOT_DEVICE_DFU: + if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_USB_MODE_MASK) >> + MAIN_DEVSTAT_PRIMARY_USB_MODE_SHIFT) + return BOOT_DEVICE_USB; + return BOOT_DEVICE_DFU; + + case BOOT_DEVICE_NOBOOT: + return BOOT_DEVICE_RAM; + } + + return bootmode; +} + +u32 spl_boot_device(void) +{ + u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT); + u32 bootmedia; + + if (bootindex == K3_PRIMARY_BOOTMODE) + bootmedia = __get_primary_bootmedia(devstat); + else + bootmedia = __get_backup_bootmedia(devstat); + + debug("am625_init: %s: devstat = 0x%x bootmedia = 0x%x bootindex = %d\n", + __func__, devstat, bootmedia, bootindex); + + return bootmedia; +} + +#endif /* CONFIG_SPL_BUILD */ diff --git a/arch/arm/mach-k3/arm64-mmu.c b/arch/arm/mach-k3/arm64-mmu.c index 527e6643188..12cb89335ad 100644 --- a/arch/arm/mach-k3/arm64-mmu.c +++ b/arch/arm/mach-k3/arm64-mmu.c @@ -222,7 +222,7 @@ struct mm_region *mem_map = j721s2_mem_map; #endif /* CONFIG_SOC_K3_J721S2 */ -#ifdef CONFIG_SOC_K3_AM642 +#if (CONFIG_IS_ENABLED(SOC_K3_AM642) || CONFIG_IS_ENABLED(SOC_K3_AM625)) /* NR_DRAM_BANKS + 32bit IO + 64bit IO + terminator */ #define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 3) @@ -261,4 +261,4 @@ struct mm_region am64_mem_map[NR_MMU_REGIONS] = { }; struct mm_region *mem_map = am64_mem_map; -#endif /* CONFIG_SOC_K3_AM642 */ +#endif /* CONFIG_SOC_K3_AM642 || CONFIG_SOC_K3_AM625 */ diff --git a/arch/arm/mach-k3/include/mach/am62_hardware.h b/arch/arm/mach-k3/include/mach/am62_hardware.h new file mode 100644 index 00000000000..cfabd20cbd7 --- /dev/null +++ b/arch/arm/mach-k3/include/mach/am62_hardware.h @@ -0,0 +1,75 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * K3: AM62 SoC definitions, structures etc. + * + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ + * Suman Anna + */ + +#ifndef __ASM_ARCH_AM62_HARDWARE_H +#define __ASM_ARCH_AM62_HARDWARE_H + +#include +#ifndef __ASSEMBLY__ +#include +#endif + +#define PADCFG_MMR0_BASE 0x04080000 +#define PADCFG_MMR1_BASE 0x000f0000 +#define CTRL_MMR0_BASE 0x00100000 +#define MCU_CTRL_MMR0_BASE 0x04500000 +#define WKUP_CTRL_MMR0_BASE 0x43000000 + +#define CTRLMMR_MAIN_DEVSTAT (WKUP_CTRL_MMR0_BASE + 0x30) +#define MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK GENMASK(6, 3) +#define MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT 3 +#define MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK GENMASK(9, 7) +#define MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT 7 +#define MAIN_DEVSTAT_BACKUP_BOOTMODE_MASK GENMASK(12, 10) +#define MAIN_DEVSTAT_BACKUP_BOOTMODE_SHIFT 10 +#define MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_MASK BIT(13) +#define MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_SHIFT 13 + +/* Primary Bootmode MMC Config macros */ +#define MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK 0x4 +#define MAIN_DEVSTAT_PRIMARY_MMC_PORT_SHIFT 2 +#define MAIN_DEVSTAT_PRIMARY_MMC_FS_RAW_MASK 0x1 +#define MAIN_DEVSTAT_PRIMARY_MMC_FS_RAW_SHIFT 0 + +/* Primary Bootmode USB Config macros */ +#define MAIN_DEVSTAT_PRIMARY_USB_MODE_SHIFT 1 +#define MAIN_DEVSTAT_PRIMARY_USB_MODE_MASK 0x02 + +/* Backup Bootmode USB Config macros */ +#define MAIN_DEVSTAT_BACKUP_USB_MODE_MASK 0x01 + +/* + * The CTRL_MMR0 memory space is divided into several equally-spaced + * partitions, so defining the partition size allows us to determine + * register addresses common to those partitions. + */ +#define CTRL_MMR0_PARTITION_SIZE 0x4000 + +/* + * CTRL_MMR0, WKUP_CTRL_MMR0, and MCU_CTRL_MMR0 lock/kick-mechanism + * shared register definitions. The same registers are also used for + * PADCFG_MMR lock/kick-mechanism. + */ +#define CTRLMMR_LOCK_KICK0 0x1008 +#define CTRLMMR_LOCK_KICK0_UNLOCK_VAL 0x68ef3490 +#define CTRLMMR_LOCK_KICK1 0x100c +#define CTRLMMR_LOCK_KICK1_UNLOCK_VAL 0xd172bc5a + +#define MCU_CTRL_LFXOSC_CTRL (MCU_CTRL_MMR0_BASE + 0x8038) +#define MCU_CTRL_LFXOSC_TRIM (MCU_CTRL_MMR0_BASE + 0x803c) +#define MCU_CTRL_LFXOSC_32K_DISABLE_VAL BIT(7) + +#define MCU_CTRL_DEVICE_CLKOUT_32K_CTRL (MCU_CTRL_MMR0_BASE + 0x8058) +#define MCU_CTRL_DEVICE_CLKOUT_LFOSC_SELECT_VAL (0x3) + +#define ROM_ENTENDED_BOOT_DATA_INFO 0x43c3f1e0 + +/* Use Last 2K as Scratch pad */ +#define TI_SRAM_SCRATCH_BOARD_EEPROM_START 0x70000000 + +#endif /* __ASM_ARCH_AM62_HARDWARE_H */ diff --git a/arch/arm/mach-k3/include/mach/am62_spl.h b/arch/arm/mach-k3/include/mach/am62_spl.h new file mode 100644 index 00000000000..2c9139d2cc0 --- /dev/null +++ b/arch/arm/mach-k3/include/mach/am62_spl.h @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ + * Suman Anna + */ + +#ifndef _ASM_ARCH_AM62_SPL_H_ +#define _ASM_ARCH_AM62_SPL_H_ + +/* Primary BootMode devices */ +#define BOOT_DEVICE_RAM 0x00 +#define BOOT_DEVICE_OSPI 0x01 +#define BOOT_DEVICE_QSPI 0x02 +#define BOOT_DEVICE_SPI 0x03 +#define BOOT_DEVICE_CPGMAC 0x04 +#define BOOT_DEVICE_ETHERNET_RGMII 0x04 +#define BOOT_DEVICE_ETHERNET_RMII 0x05 +#define BOOT_DEVICE_I2C 0x06 +#define BOOT_DEVICE_UART 0x07 +#define BOOT_DEVICE_MMC 0x08 +#define BOOT_DEVICE_EMMC 0x09 + +#define BOOT_DEVICE_USB 0x2A +#define BOOT_DEVICE_DFU 0x0A +#define BOOT_DEVICE_GPMC_NAND 0x0B +#define BOOT_DEVICE_GPMC_NOR 0x0C +#define BOOT_DEVICE_XSPI 0x0E +#define BOOT_DEVICE_NOBOOT 0x0F + +/* U-Boot used aliases */ +#define BOOT_DEVICE_ETHERNET 0x04 +#define BOOT_DEVICE_MMC2 0x08 +#define BOOT_DEVICE_MMC1 0x09 +/* Invalid */ +#define BOOT_DEVICE_MMC2_2 0x1F + +/* Backup BootMode devices */ +#define BACKUP_BOOT_DEVICE_DFU 0x01 +#define BACKUP_BOOT_DEVICE_UART 0x03 +#define BACKUP_BOOT_DEVICE_ETHERNET 0x04 +#define BACKUP_BOOT_DEVICE_MMC 0x05 +#define BACKUP_BOOT_DEVICE_SPI 0x06 +#define BACKUP_BOOT_DEVICE_I2C 0x07 +#define BACKUP_BOOT_DEVICE_USB 0x09 + +#define K3_PRIMARY_BOOTMODE 0x0 + +#endif /* _ASM_ARCH_AM62_SPL_H_ */ diff --git a/arch/arm/mach-k3/include/mach/hardware.h b/arch/arm/mach-k3/include/mach/hardware.h index 5c1265ffe94..7c6928d5da1 100644 --- a/arch/arm/mach-k3/include/mach/hardware.h +++ b/arch/arm/mach-k3/include/mach/hardware.h @@ -22,6 +22,10 @@ #include "am64_hardware.h" #endif +#ifdef CONFIG_SOC_K3_AM625 +#include "am62_hardware.h" +#endif + /* Assuming these addresses and definitions stay common across K3 devices */ #define CTRLMMR_WKUP_JTAG_ID 0x43000014 #define JTAG_ID_VARIANT_SHIFT 28 diff --git a/arch/arm/mach-k3/include/mach/spl.h b/arch/arm/mach-k3/include/mach/spl.h index 8a613985295..17996f2938b 100644 --- a/arch/arm/mach-k3/include/mach/spl.h +++ b/arch/arm/mach-k3/include/mach/spl.h @@ -21,4 +21,9 @@ #ifdef CONFIG_SOC_K3_AM642 #include "am64_spl.h" #endif + +#ifdef CONFIG_SOC_K3_AM625 +#include "am62_spl.h" +#endif + #endif /* _ASM_ARCH_SPL_H_ */ diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig index 709c916a2a1..a4f9f1aad2a 100644 --- a/drivers/ram/Kconfig +++ b/drivers/ram/Kconfig @@ -64,6 +64,7 @@ choice default K3_J721E_DDRSS if SOC_K3_J721E || SOC_K3_J721S2 default K3_AM64_DDRSS if SOC_K3_AM642 + default K3_AM64_DDRSS if SOC_K3_AM625 config K3_J721E_DDRSS bool "Enable J721E DDRSS support" -- GitLab From 4b8903a99902c22f4f60f0f873a89974d95710e7 Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Wed, 25 May 2022 13:38:43 +0530 Subject: [PATCH 138/581] arm: mach-k3: am62: Introduce autogenerated SoC data Introduce autogenerated SoC data support clk and device data for the AM62. Hook it upto to power-domain and clk frameworks of U-Boot. Signed-off-by: Dave Gerlach Signed-off-by: Suman Anna Signed-off-by: Vignesh Raghavendra --- arch/arm/mach-k3/am62x/Makefile | 6 + arch/arm/mach-k3/am62x/clk-data.c | 366 +++++++++++++++++++++++++ arch/arm/mach-k3/am62x/dev-data.c | 78 ++++++ drivers/clk/ti/clk-k3.c | 6 + drivers/power/domain/ti-power-domain.c | 6 + include/k3-clk.h | 1 + include/k3-dev.h | 1 + 7 files changed, 464 insertions(+) create mode 100644 arch/arm/mach-k3/am62x/Makefile create mode 100644 arch/arm/mach-k3/am62x/clk-data.c create mode 100644 arch/arm/mach-k3/am62x/dev-data.c diff --git a/arch/arm/mach-k3/am62x/Makefile b/arch/arm/mach-k3/am62x/Makefile new file mode 100644 index 00000000000..d6c876df66d --- /dev/null +++ b/arch/arm/mach-k3/am62x/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ + +obj-y += clk-data.o +obj-y += dev-data.o diff --git a/arch/arm/mach-k3/am62x/clk-data.c b/arch/arm/mach-k3/am62x/clk-data.c new file mode 100644 index 00000000000..c0881778fe7 --- /dev/null +++ b/arch/arm/mach-k3/am62x/clk-data.c @@ -0,0 +1,366 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * AM62X specific clock platform data + * + * This file is auto generated. Please do not hand edit and report any issues + * to Dave Gerlach . + * + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ + */ + +#include +#include "k3-clk.h" + +static const char * const gluelogic_hfosc0_clkout_parents[] = { + NULL, + NULL, + "osc_24_mhz", + "osc_25_mhz", + "osc_26_mhz", + NULL, +}; + +static const char * const main_emmcsd0_io_clklb_sel_out0_parents[] = { + "board_0_mmc0_clklb_out", + "board_0_mmc0_clk_out", +}; + +static const char * const main_emmcsd1_io_clklb_sel_out0_parents[] = { + "board_0_mmc1_clklb_out", + "board_0_mmc1_clk_out", +}; + +static const char * const main_ospi_loopback_clk_sel_out0_parents[] = { + "board_0_ospi0_dqs_out", + "board_0_ospi0_lbclko_out", +}; + +static const char * const main_usb0_refclk_sel_out0_parents[] = { + "gluelogic_hfosc0_clkout", + "postdiv4_16ff_main_0_hsdivout8_clk", +}; + +static const char * const main_usb1_refclk_sel_out0_parents[] = { + "gluelogic_hfosc0_clkout", + "postdiv4_16ff_main_0_hsdivout8_clk", +}; + +static const char * const sam62_pll_ctrl_wrap_main_0_sysclkout_clk_parents[] = { + "gluelogic_hfosc0_clkout", + "hsdiv4_16fft_main_0_hsdivout0_clk", +}; + +static const char * const sam62_pll_ctrl_wrap_mcu_0_sysclkout_clk_parents[] = { + "gluelogic_hfosc0_clkout", + "hsdiv4_16fft_mcu_0_hsdivout0_clk", +}; + +static const char * const clkout0_ctrl_out0_parents[] = { + "hsdiv4_16fft_main_2_hsdivout1_clk", + "hsdiv4_16fft_main_2_hsdivout1_clk", +}; + +static const char * const clk_32k_rc_sel_out0_parents[] = { + "gluelogic_rcosc_clk_1p0v_97p65k", + "hsdiv0_16fft_mcu_32khz_gen_0_hsdivout0_clk", + "clk_32k_rc_sel_div_clkout", + "gluelogic_lfosc0_clkout", +}; + +static const char * const main_cp_gemac_cpts_clk_sel_out0_parents[] = { + "postdiv4_16ff_main_2_hsdivout5_clk", + "postdiv4_16ff_main_0_hsdivout6_clk", + "board_0_cp_gemac_cpts0_rft_clk_out", + NULL, + "board_0_mcu_ext_refclk0_out", + "board_0_ext_refclk1_out", + "sam62_pll_ctrl_wrap_mcu_0_chip_div1_clk_clk", + "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk", +}; + +static const char * const main_emmcsd0_refclk_sel_out0_parents[] = { + "postdiv4_16ff_main_0_hsdivout5_clk", + "hsdiv4_16fft_main_2_hsdivout2_clk", +}; + +static const char * const main_emmcsd1_refclk_sel_out0_parents[] = { + "postdiv4_16ff_main_0_hsdivout5_clk", + "hsdiv4_16fft_main_2_hsdivout2_clk", +}; + +static const char * const main_gtcclk_sel_out0_parents[] = { + "postdiv4_16ff_main_2_hsdivout5_clk", + "postdiv4_16ff_main_0_hsdivout6_clk", + "board_0_cp_gemac_cpts0_rft_clk_out", + NULL, + "board_0_mcu_ext_refclk0_out", + "board_0_ext_refclk1_out", + "sam62_pll_ctrl_wrap_mcu_0_chip_div1_clk_clk", + "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk", +}; + +static const char * const main_ospi_ref_clk_sel_out0_parents[] = { + "hsdiv4_16fft_main_0_hsdivout1_clk", + "postdiv1_16fft_main_1_hsdivout5_clk", +}; + +static const char * const wkup_clkout_sel_out0_parents[] = { + "gluelogic_hfosc0_clkout", + "gluelogic_lfosc0_clkout", + "hsdiv4_16fft_main_0_hsdivout2_clk", + "hsdiv4_16fft_main_1_hsdivout2_clk", + "postdiv4_16ff_main_2_hsdivout9_clk", + "clk_32k_rc_sel_out0", + "gluelogic_rcosc_clkout", + "gluelogic_hfosc0_clkout", +}; + +static const char * const wkup_clksel_out0_parents[] = { + "hsdiv1_16fft_main_15_hsdivout0_clk", + "hsdiv4_16fft_mcu_0_hsdivout0_clk", +}; + +static const char * const main_usart0_fclk_sel_out0_parents[] = { + "usart_programmable_clock_divider_out0", + "hsdiv4_16fft_main_1_hsdivout1_clk", +}; + +static const struct clk_data clk_list[] = { + CLK_FIXED_RATE("osc_26_mhz", 26000000, 0), + CLK_FIXED_RATE("osc_25_mhz", 25000000, 0), + CLK_FIXED_RATE("osc_24_mhz", 24000000, 0), + CLK_MUX("gluelogic_hfosc0_clkout", gluelogic_hfosc0_clkout_parents, 6, 0x43000030, 0, 3, 0), + CLK_FIXED_RATE("gluelogic_rcosc_clkout", 12500000, 0), + CLK_FIXED_RATE("gluelogic_rcosc_clk_1p0v_97p65k", 97656, 0), + CLK_FIXED_RATE("board_0_cp_gemac_cpts0_rft_clk_out", 0, 0), + CLK_FIXED_RATE("board_0_ddr0_ck0_out", 0, 0), + CLK_FIXED_RATE("board_0_ext_refclk1_out", 0, 0), + CLK_FIXED_RATE("board_0_i2c0_scl_out", 0, 0), + CLK_FIXED_RATE("board_0_mcu_ext_refclk0_out", 0, 0), + CLK_FIXED_RATE("board_0_mmc0_clklb_out", 0, 0), + CLK_FIXED_RATE("board_0_mmc0_clk_out", 0, 0), + CLK_FIXED_RATE("board_0_mmc1_clklb_out", 0, 0), + CLK_FIXED_RATE("board_0_mmc1_clk_out", 0, 0), + CLK_FIXED_RATE("board_0_ospi0_dqs_out", 0, 0), + CLK_FIXED_RATE("board_0_ospi0_lbclko_out", 0, 0), + CLK_FIXED_RATE("board_0_rgmii1_rxc_out", 0, 0), + CLK_FIXED_RATE("board_0_rgmii1_txc_out", 0, 0), + CLK_FIXED_RATE("board_0_rgmii2_rxc_out", 0, 0), + CLK_FIXED_RATE("board_0_rgmii2_txc_out", 0, 0), + CLK_FIXED_RATE("board_0_rmii1_ref_clk_out", 0, 0), + CLK_FIXED_RATE("board_0_rmii2_ref_clk_out", 0, 0), + CLK_FIXED_RATE("board_0_tck_out", 0, 0), + CLK_FIXED_RATE("cpsw_3guss_main_0_mdio_mdclk_o", 0, 0), + CLK_FIXED_RATE("cpsw_3guss_main_0_rgmii1_txc_o", 0, 0), + CLK_FIXED_RATE("cpsw_3guss_main_0_rgmii2_txc_o", 0, 0), + CLK_FIXED_RATE("emmcsd4ss_main_0_emmcsdss_io_clk_o", 0, 0), + CLK_FIXED_RATE("emmcsd8ss_main_0_emmcsdss_io_clk_o", 0, 0), + CLK_FIXED_RATE("fss_ul_main_0_ospi_0_ospi_oclk_clk", 0, 0), + CLK_DIV("hsdiv0_16fft_mcu_32khz_gen_0_hsdivout0_clk", "gluelogic_hfosc0_clkout", 0x4508030, 0, 7, 0, 0), + CLK_FIXED_RATE("mshsi2c_main_0_porscl", 0, 0), + CLK_PLL("pllfracf_ssmod_16fft_main_0_foutvcop_clk", "gluelogic_hfosc0_clkout", 0x680000, 0), + CLK_DIV("pllfracf_ssmod_16fft_main_0_foutpostdiv_clk_subdiv", "pllfracf_ssmod_16fft_main_0_foutvcop_clk", 0x680038, 16, 3, 0, CLK_DIVIDER_ONE_BASED), + CLK_DIV("pllfracf_ssmod_16fft_main_0_foutpostdiv_clk", "pllfracf_ssmod_16fft_main_0_foutpostdiv_clk_subdiv", 0x680038, 24, 3, 0, CLK_DIVIDER_ONE_BASED), + CLK_PLL("pllfracf_ssmod_16fft_main_1_foutvcop_clk", "gluelogic_hfosc0_clkout", 0x681000, 0), + CLK_DIV("pllfracf_ssmod_16fft_main_1_foutpostdiv_clk_subdiv", "pllfracf_ssmod_16fft_main_1_foutvcop_clk", 0x681038, 16, 3, 0, CLK_DIVIDER_ONE_BASED), + CLK_DIV("pllfracf_ssmod_16fft_main_1_foutpostdiv_clk", "pllfracf_ssmod_16fft_main_1_foutpostdiv_clk_subdiv", 0x681038, 24, 3, 0, CLK_DIVIDER_ONE_BASED), + CLK_PLL("pllfracf_ssmod_16fft_main_12_foutvcop_clk", "gluelogic_hfosc0_clkout", 0x68c000, 0), + CLK_PLL("pllfracf_ssmod_16fft_main_15_foutvcop_clk", "gluelogic_hfosc0_clkout", 0x68f000, 0), + CLK_PLL("pllfracf_ssmod_16fft_main_2_foutvcop_clk", "gluelogic_hfosc0_clkout", 0x682000, 0), + CLK_DIV("pllfracf_ssmod_16fft_main_2_foutpostdiv_clk_subdiv", "pllfracf_ssmod_16fft_main_2_foutvcop_clk", 0x682038, 16, 3, 0, CLK_DIVIDER_ONE_BASED), + CLK_DIV("pllfracf_ssmod_16fft_main_2_foutpostdiv_clk", "pllfracf_ssmod_16fft_main_2_foutpostdiv_clk_subdiv", 0x682038, 24, 3, 0, CLK_DIVIDER_ONE_BASED), + CLK_PLL("pllfracf_ssmod_16fft_main_8_foutvcop_clk", "gluelogic_hfosc0_clkout", 0x688000, 0), + CLK_PLL("pllfracf_ssmod_16fft_mcu_0_foutvcop_clk", "gluelogic_hfosc0_clkout", 0x4040000, 0), + CLK_DIV("postdiv1_16fft_main_1_hsdivout5_clk", "pllfracf_ssmod_16fft_main_1_foutpostdiv_clk", 0x681094, 0, 7, 0, 0), + CLK_DIV("postdiv4_16ff_main_0_hsdivout5_clk", "pllfracf_ssmod_16fft_main_0_foutpostdiv_clk", 0x680094, 0, 7, 0, 0), + CLK_DIV("postdiv4_16ff_main_0_hsdivout6_clk", "pllfracf_ssmod_16fft_main_0_foutpostdiv_clk", 0x680098, 0, 7, 0, 0), + CLK_DIV("postdiv4_16ff_main_0_hsdivout8_clk", "pllfracf_ssmod_16fft_main_0_foutpostdiv_clk", 0x6800a0, 0, 7, 0, 0), + CLK_DIV("postdiv4_16ff_main_2_hsdivout5_clk", "pllfracf_ssmod_16fft_main_2_foutpostdiv_clk", 0x682094, 0, 7, 0, 0), + CLK_DIV("postdiv4_16ff_main_2_hsdivout8_clk", "pllfracf_ssmod_16fft_main_2_foutpostdiv_clk", 0x6820a0, 0, 7, 0, 0), + CLK_DIV("postdiv4_16ff_main_2_hsdivout9_clk", "pllfracf_ssmod_16fft_main_2_foutpostdiv_clk", 0x6820a4, 0, 7, 0, 0), + CLK_MUX("main_emmcsd0_io_clklb_sel_out0", main_emmcsd0_io_clklb_sel_out0_parents, 2, 0x108160, 16, 1, 0), + CLK_MUX("main_emmcsd1_io_clklb_sel_out0", main_emmcsd1_io_clklb_sel_out0_parents, 2, 0x108168, 16, 1, 0), + CLK_MUX("main_ospi_loopback_clk_sel_out0", main_ospi_loopback_clk_sel_out0_parents, 2, 0x108500, 4, 1, 0), + CLK_MUX("main_usb0_refclk_sel_out0", main_usb0_refclk_sel_out0_parents, 2, 0x43008190, 0, 1, 0), + CLK_MUX("main_usb1_refclk_sel_out0", main_usb1_refclk_sel_out0_parents, 2, 0x43008194, 0, 1, 0), + CLK_DIV("hsdiv0_16fft_main_12_hsdivout0_clk", "pllfracf_ssmod_16fft_main_12_foutvcop_clk", 0x68c080, 0, 7, 0, 0), + CLK_DIV("hsdiv0_16fft_main_8_hsdivout0_clk", "pllfracf_ssmod_16fft_main_8_foutvcop_clk", 0x688080, 0, 7, 0, 0), + CLK_DIV("hsdiv1_16fft_main_15_hsdivout0_clk", "pllfracf_ssmod_16fft_main_15_foutvcop_clk", 0x68f080, 0, 7, 0, 0), + CLK_DIV("hsdiv4_16fft_main_0_hsdivout0_clk", "pllfracf_ssmod_16fft_main_0_foutvcop_clk", 0x680080, 0, 7, 0, 0), + CLK_DIV("hsdiv4_16fft_main_0_hsdivout1_clk", "pllfracf_ssmod_16fft_main_0_foutvcop_clk", 0x680084, 0, 7, 0, 0), + CLK_DIV("hsdiv4_16fft_main_0_hsdivout2_clk", "pllfracf_ssmod_16fft_main_0_foutvcop_clk", 0x680088, 0, 7, 0, 0), + CLK_DIV("hsdiv4_16fft_main_0_hsdivout3_clk", "pllfracf_ssmod_16fft_main_0_foutvcop_clk", 0x68008c, 0, 7, 0, 0), + CLK_DIV("hsdiv4_16fft_main_0_hsdivout4_clk", "pllfracf_ssmod_16fft_main_0_foutvcop_clk", 0x680090, 0, 7, 0, 0), + CLK_DIV_DEFFREQ("hsdiv4_16fft_main_1_hsdivout0_clk", "pllfracf_ssmod_16fft_main_1_foutvcop_clk", 0x681080, 0, 7, 0, 0, 192000000), + CLK_DIV("hsdiv4_16fft_main_1_hsdivout1_clk", "pllfracf_ssmod_16fft_main_1_foutvcop_clk", 0x681084, 0, 7, 0, 0), + CLK_DIV("hsdiv4_16fft_main_1_hsdivout2_clk", "pllfracf_ssmod_16fft_main_1_foutvcop_clk", 0x681088, 0, 7, 0, 0), + CLK_DIV("hsdiv4_16fft_main_2_hsdivout1_clk", "pllfracf_ssmod_16fft_main_2_foutvcop_clk", 0x682084, 0, 7, 0, 0), + CLK_DIV("hsdiv4_16fft_main_2_hsdivout2_clk", "pllfracf_ssmod_16fft_main_2_foutvcop_clk", 0x682088, 0, 7, 0, 0), + CLK_DIV("hsdiv4_16fft_mcu_0_hsdivout0_clk", "pllfracf_ssmod_16fft_mcu_0_foutvcop_clk", 0x4040080, 0, 7, 0, 0), + CLK_MUX_PLLCTRL("sam62_pll_ctrl_wrap_main_0_sysclkout_clk", sam62_pll_ctrl_wrap_main_0_sysclkout_clk_parents, 2, 0x410000, 0), + CLK_DIV("sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk", "sam62_pll_ctrl_wrap_main_0_sysclkout_clk", 0x410118, 0, 5, 0, 0), + CLK_MUX_PLLCTRL("sam62_pll_ctrl_wrap_mcu_0_sysclkout_clk", sam62_pll_ctrl_wrap_mcu_0_sysclkout_clk_parents, 2, 0x4020000, 0), + CLK_DIV("sam62_pll_ctrl_wrap_mcu_0_chip_div1_clk_clk", "sam62_pll_ctrl_wrap_mcu_0_sysclkout_clk", 0x4020118, 0, 5, 0, 0), + CLK_MUX("clkout0_ctrl_out0", clkout0_ctrl_out0_parents, 2, 0x108010, 0, 1, 0), + CLK_MUX("clk_32k_rc_sel_out0", clk_32k_rc_sel_out0_parents, 4, 0x4508058, 0, 2, 0), + CLK_MUX("main_cp_gemac_cpts_clk_sel_out0", main_cp_gemac_cpts_clk_sel_out0_parents, 8, 0x108140, 0, 3, 0), + CLK_MUX("main_emmcsd0_refclk_sel_out0", main_emmcsd0_refclk_sel_out0_parents, 2, 0x108160, 0, 1, 0), + CLK_MUX("main_emmcsd1_refclk_sel_out0", main_emmcsd1_refclk_sel_out0_parents, 2, 0x108168, 0, 1, 0), + CLK_MUX("main_gtcclk_sel_out0", main_gtcclk_sel_out0_parents, 8, 0x43008030, 0, 3, 0), + CLK_MUX("main_ospi_ref_clk_sel_out0", main_ospi_ref_clk_sel_out0_parents, 2, 0x108500, 0, 1, 0), + CLK_DIV_DEFFREQ("usart_programmable_clock_divider_out0", "hsdiv4_16fft_main_1_hsdivout0_clk", 0x108240, 0, 2, 0, 0, 48000000), + CLK_MUX("wkup_clkout_sel_out0", wkup_clkout_sel_out0_parents, 8, 0x43008020, 0, 3, 0), + CLK_MUX("wkup_clksel_out0", wkup_clksel_out0_parents, 2, 0x43008010, 0, 1, 0), + CLK_MUX("main_usart0_fclk_sel_out0", main_usart0_fclk_sel_out0_parents, 2, 0x108280, 0, 1, 0), + CLK_DIV("hsdiv4_16fft_mcu_0_hsdivout1_clk", "pllfracf_ssmod_16fft_mcu_0_foutvcop_clk", 0x4040084, 0, 7, 0, 0), + CLK_FIXED_RATE("mshsi2c_wkup_0_porscl", 0, 0), + CLK_DIV("sam62_pll_ctrl_wrap_main_0_chip_div24_clk_clk", "sam62_pll_ctrl_wrap_main_0_sysclkout_clk", 0x41011c, 0, 5, 0, 0), + CLK_DIV("sam62_pll_ctrl_wrap_mcu_0_chip_div24_clk_clk", "sam62_pll_ctrl_wrap_mcu_0_sysclkout_clk", 0x402011c, 0, 5, 0, 0), +}; + +static const struct dev_clk soc_dev_clk_data[] = { + DEV_CLK(13, 0, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), + DEV_CLK(13, 3, "main_cp_gemac_cpts_clk_sel_out0"), + DEV_CLK(13, 4, "postdiv4_16ff_main_2_hsdivout5_clk"), + DEV_CLK(13, 5, "postdiv4_16ff_main_0_hsdivout6_clk"), + DEV_CLK(13, 6, "board_0_cp_gemac_cpts0_rft_clk_out"), + DEV_CLK(13, 8, "board_0_mcu_ext_refclk0_out"), + DEV_CLK(13, 9, "board_0_ext_refclk1_out"), + DEV_CLK(13, 10, "sam62_pll_ctrl_wrap_mcu_0_chip_div1_clk_clk"), + DEV_CLK(13, 11, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), + DEV_CLK(13, 13, "hsdiv4_16fft_main_2_hsdivout1_clk"), + DEV_CLK(13, 14, "hsdiv4_16fft_main_2_hsdivout1_clk"), + DEV_CLK(13, 15, "hsdiv4_16fft_main_2_hsdivout1_clk"), + DEV_CLK(13, 16, "hsdiv4_16fft_main_2_hsdivout1_clk"), + DEV_CLK(13, 17, "hsdiv4_16fft_main_2_hsdivout1_clk"), + DEV_CLK(13, 19, "board_0_rgmii1_rxc_out"), + DEV_CLK(13, 20, "board_0_rgmii1_txc_out"), + DEV_CLK(13, 22, "board_0_rgmii2_rxc_out"), + DEV_CLK(13, 23, "board_0_rgmii2_txc_out"), + DEV_CLK(13, 25, "hsdiv4_16fft_main_2_hsdivout1_clk"), + DEV_CLK(13, 26, "hsdiv4_16fft_main_2_hsdivout1_clk"), + DEV_CLK(13, 27, "hsdiv4_16fft_main_2_hsdivout1_clk"), + DEV_CLK(13, 28, "board_0_rmii1_ref_clk_out"), + DEV_CLK(13, 29, "board_0_rmii2_ref_clk_out"), + DEV_CLK(16, 0, "hsdiv4_16fft_main_0_hsdivout1_clk"), + DEV_CLK(16, 1, "hsdiv4_16fft_main_0_hsdivout2_clk"), + DEV_CLK(16, 2, "hsdiv4_16fft_main_0_hsdivout3_clk"), + DEV_CLK(16, 3, "hsdiv4_16fft_main_0_hsdivout4_clk"), + DEV_CLK(16, 4, "gluelogic_hfosc0_clkout"), + DEV_CLK(16, 5, "board_0_ext_refclk1_out"), + DEV_CLK(16, 6, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), + DEV_CLK(16, 7, "postdiv4_16ff_main_2_hsdivout8_clk"), + DEV_CLK(16, 8, "gluelogic_hfosc0_clkout"), + DEV_CLK(16, 9, "board_0_ext_refclk1_out"), + DEV_CLK(16, 10, "gluelogic_rcosc_clkout"), + DEV_CLK(16, 11, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), + DEV_CLK(16, 12, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), + DEV_CLK(57, 0, "main_emmcsd0_io_clklb_sel_out0"), + DEV_CLK(57, 1, "board_0_mmc0_clklb_out"), + DEV_CLK(57, 2, "board_0_mmc0_clk_out"), + DEV_CLK(57, 5, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), + DEV_CLK(57, 6, "main_emmcsd0_refclk_sel_out0"), + DEV_CLK(57, 7, "postdiv4_16ff_main_0_hsdivout5_clk"), + DEV_CLK(57, 8, "hsdiv4_16fft_main_2_hsdivout2_clk"), + DEV_CLK(58, 0, "main_emmcsd1_io_clklb_sel_out0"), + DEV_CLK(58, 1, "board_0_mmc1_clklb_out"), + DEV_CLK(58, 2, "board_0_mmc1_clk_out"), + DEV_CLK(58, 5, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), + DEV_CLK(58, 6, "main_emmcsd1_refclk_sel_out0"), + DEV_CLK(58, 7, "postdiv4_16ff_main_0_hsdivout5_clk"), + DEV_CLK(58, 8, "hsdiv4_16fft_main_2_hsdivout2_clk"), + DEV_CLK(61, 0, "main_gtcclk_sel_out0"), + DEV_CLK(61, 1, "postdiv4_16ff_main_2_hsdivout5_clk"), + DEV_CLK(61, 2, "postdiv4_16ff_main_0_hsdivout6_clk"), + DEV_CLK(61, 3, "board_0_cp_gemac_cpts0_rft_clk_out"), + DEV_CLK(61, 5, "board_0_mcu_ext_refclk0_out"), + DEV_CLK(61, 6, "board_0_ext_refclk1_out"), + DEV_CLK(61, 7, "sam62_pll_ctrl_wrap_mcu_0_chip_div1_clk_clk"), + DEV_CLK(61, 8, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), + DEV_CLK(61, 9, "wkup_clksel_out0"), + DEV_CLK(61, 10, "hsdiv1_16fft_main_15_hsdivout0_clk"), + DEV_CLK(61, 11, "hsdiv4_16fft_mcu_0_hsdivout0_clk"), + DEV_CLK(75, 0, "board_0_ospi0_dqs_out"), + DEV_CLK(75, 1, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), + DEV_CLK(75, 2, "main_ospi_loopback_clk_sel_out0"), + DEV_CLK(75, 3, "board_0_ospi0_dqs_out"), + DEV_CLK(75, 4, "board_0_ospi0_lbclko_out"), + DEV_CLK(75, 6, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), + DEV_CLK(75, 7, "main_ospi_ref_clk_sel_out0"), + DEV_CLK(75, 8, "hsdiv4_16fft_main_0_hsdivout1_clk"), + DEV_CLK(75, 9, "postdiv1_16fft_main_1_hsdivout5_clk"), + DEV_CLK(77, 0, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), + DEV_CLK(95, 0, "gluelogic_rcosc_clkout"), + DEV_CLK(95, 1, "gluelogic_hfosc0_clkout"), + DEV_CLK(95, 2, "wkup_clksel_out0"), + DEV_CLK(95, 3, "hsdiv1_16fft_main_15_hsdivout0_clk"), + DEV_CLK(95, 4, "hsdiv4_16fft_mcu_0_hsdivout0_clk"), + DEV_CLK(102, 0, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), + DEV_CLK(102, 1, "board_0_i2c0_scl_out"), + DEV_CLK(102, 2, "hsdiv4_16fft_main_1_hsdivout0_clk"), + DEV_CLK(107, 0, "wkup_clksel_out0"), + DEV_CLK(107, 1, "hsdiv1_16fft_main_15_hsdivout0_clk"), + DEV_CLK(107, 2, "hsdiv4_16fft_mcu_0_hsdivout0_clk"), + DEV_CLK(107, 3, "mshsi2c_wkup_0_porscl"), + DEV_CLK(107, 4, "hsdiv4_16fft_mcu_0_hsdivout1_clk"), + DEV_CLK(135, 0, "hsdiv0_16fft_main_8_hsdivout0_clk"), + DEV_CLK(136, 0, "hsdiv0_16fft_main_8_hsdivout0_clk"), + DEV_CLK(140, 0, "sam62_pll_ctrl_wrap_mcu_0_chip_div1_clk_clk"), + DEV_CLK(140, 1, "sam62_pll_ctrl_wrap_mcu_0_chip_div1_clk_clk"), + DEV_CLK(146, 0, "main_usart0_fclk_sel_out0"), + DEV_CLK(146, 1, "usart_programmable_clock_divider_out0"), + DEV_CLK(146, 2, "hsdiv4_16fft_main_1_hsdivout1_clk"), + DEV_CLK(146, 5, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), + DEV_CLK(157, 20, "clkout0_ctrl_out0"), + DEV_CLK(157, 21, "hsdiv4_16fft_main_2_hsdivout1_clk"), + DEV_CLK(157, 22, "hsdiv4_16fft_main_2_hsdivout1_clk"), + DEV_CLK(157, 24, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), + DEV_CLK(157, 25, "board_0_ddr0_ck0_out"), + DEV_CLK(157, 40, "mshsi2c_main_0_porscl"), + DEV_CLK(157, 77, "sam62_pll_ctrl_wrap_mcu_0_sysclkout_clk"), + DEV_CLK(157, 82, "cpsw_3guss_main_0_mdio_mdclk_o"), + DEV_CLK(157, 83, "emmcsd8ss_main_0_emmcsdss_io_clk_o"), + DEV_CLK(157, 87, "emmcsd4ss_main_0_emmcsdss_io_clk_o"), + DEV_CLK(157, 89, "emmcsd4ss_main_0_emmcsdss_io_clk_o"), + DEV_CLK(157, 129, "fss_ul_main_0_ospi_0_ospi_oclk_clk"), + DEV_CLK(157, 132, "cpsw_3guss_main_0_rgmii1_txc_o"), + DEV_CLK(157, 135, "cpsw_3guss_main_0_rgmii2_txc_o"), + DEV_CLK(157, 145, "sam62_pll_ctrl_wrap_main_0_sysclkout_clk"), + DEV_CLK(157, 158, "wkup_clkout_sel_out0"), + DEV_CLK(157, 159, "gluelogic_hfosc0_clkout"), + DEV_CLK(157, 160, "gluelogic_lfosc0_clkout"), + DEV_CLK(157, 161, "hsdiv4_16fft_main_0_hsdivout2_clk"), + DEV_CLK(157, 162, "hsdiv4_16fft_main_1_hsdivout2_clk"), + DEV_CLK(157, 163, "postdiv4_16ff_main_2_hsdivout9_clk"), + DEV_CLK(157, 164, "clk_32k_rc_sel_out0"), + DEV_CLK(157, 165, "gluelogic_rcosc_clkout"), + DEV_CLK(157, 166, "gluelogic_hfosc0_clkout"), + DEV_CLK(161, 0, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), + DEV_CLK(161, 1, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), + DEV_CLK(161, 2, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), + DEV_CLK(161, 3, "main_usb0_refclk_sel_out0"), + DEV_CLK(161, 4, "gluelogic_hfosc0_clkout"), + DEV_CLK(161, 5, "postdiv4_16ff_main_0_hsdivout8_clk"), + DEV_CLK(161, 10, "board_0_tck_out"), + DEV_CLK(162, 0, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), + DEV_CLK(162, 1, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), + DEV_CLK(162, 2, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), + DEV_CLK(162, 3, "main_usb1_refclk_sel_out0"), + DEV_CLK(162, 4, "gluelogic_hfosc0_clkout"), + DEV_CLK(162, 5, "postdiv4_16ff_main_0_hsdivout8_clk"), + DEV_CLK(162, 10, "board_0_tck_out"), + DEV_CLK(166, 3, "hsdiv0_16fft_main_8_hsdivout0_clk"), + DEV_CLK(166, 5, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), + DEV_CLK(169, 0, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), + DEV_CLK(169, 1, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), + DEV_CLK(170, 0, "hsdiv0_16fft_main_12_hsdivout0_clk"), + DEV_CLK(170, 1, "board_0_tck_out"), + DEV_CLK(170, 2, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), +}; + +const struct ti_k3_clk_platdata am62x_clk_platdata = { + .clk_list = clk_list, + .clk_list_cnt = 90, + .soc_dev_clk_data = soc_dev_clk_data, + .soc_dev_clk_data_cnt = 137, +}; diff --git a/arch/arm/mach-k3/am62x/dev-data.c b/arch/arm/mach-k3/am62x/dev-data.c new file mode 100644 index 00000000000..616d0650b9c --- /dev/null +++ b/arch/arm/mach-k3/am62x/dev-data.c @@ -0,0 +1,78 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * AM62X specific device platform data + * + * This file is auto generated. Please do not hand edit and report any issues + * to Dave Gerlach . + * + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ + */ + +#include "k3-dev.h" + +static struct ti_psc soc_psc_list[] = { + [0] = PSC(0, 0x04000000), + [1] = PSC(1, 0x00400000), +}; + +static struct ti_pd soc_pd_list[] = { + [0] = PSC_PD(0, &soc_psc_list[1], NULL), + [1] = PSC_PD(2, &soc_psc_list[1], &soc_pd_list[0]), + [2] = PSC_PD(3, &soc_psc_list[1], &soc_pd_list[0]), + [3] = PSC_PD(4, &soc_psc_list[1], &soc_pd_list[2]), + [4] = PSC_PD(5, &soc_psc_list[1], &soc_pd_list[2]), +}; + +static struct ti_lpsc soc_lpsc_list[] = { + [0] = PSC_LPSC(0, &soc_psc_list[1], &soc_pd_list[0], NULL), + [1] = PSC_LPSC(9, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[11]), + [2] = PSC_LPSC(10, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[1]), + [3] = PSC_LPSC(11, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[2]), + [4] = PSC_LPSC(12, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[8]), + [5] = PSC_LPSC(13, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[9]), + [6] = PSC_LPSC(20, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[11]), + [7] = PSC_LPSC(21, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[11]), + [8] = PSC_LPSC(23, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[11]), + [9] = PSC_LPSC(24, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[11]), + [10] = PSC_LPSC(28, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[11]), + [11] = PSC_LPSC(34, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[11]), + [12] = PSC_LPSC(41, &soc_psc_list[1], &soc_pd_list[1], &soc_lpsc_list[11]), + [13] = PSC_LPSC(42, &soc_psc_list[1], &soc_pd_list[2], &soc_lpsc_list[11]), + [14] = PSC_LPSC(45, &soc_psc_list[1], &soc_pd_list[3], &soc_lpsc_list[13]), + [15] = PSC_LPSC(46, &soc_psc_list[1], &soc_pd_list[4], &soc_lpsc_list[13]), +}; + +static struct ti_dev soc_dev_list[] = { + PSC_DEV(16, &soc_lpsc_list[0]), + PSC_DEV(77, &soc_lpsc_list[0]), + PSC_DEV(61, &soc_lpsc_list[0]), + PSC_DEV(95, &soc_lpsc_list[0]), + PSC_DEV(107, &soc_lpsc_list[0]), + PSC_DEV(170, &soc_lpsc_list[1]), + PSC_DEV(177, &soc_lpsc_list[2]), + PSC_DEV(55, &soc_lpsc_list[3]), + PSC_DEV(178, &soc_lpsc_list[4]), + PSC_DEV(179, &soc_lpsc_list[5]), + PSC_DEV(57, &soc_lpsc_list[6]), + PSC_DEV(58, &soc_lpsc_list[7]), + PSC_DEV(161, &soc_lpsc_list[8]), + PSC_DEV(162, &soc_lpsc_list[9]), + PSC_DEV(75, &soc_lpsc_list[10]), + PSC_DEV(102, &soc_lpsc_list[11]), + PSC_DEV(146, &soc_lpsc_list[11]), + PSC_DEV(13, &soc_lpsc_list[12]), + PSC_DEV(166, &soc_lpsc_list[13]), + PSC_DEV(135, &soc_lpsc_list[14]), + PSC_DEV(136, &soc_lpsc_list[15]), +}; + +const struct ti_k3_pd_platdata am62x_pd_platdata = { + .psc = soc_psc_list, + .pd = soc_pd_list, + .lpsc = soc_lpsc_list, + .devs = soc_dev_list, + .num_psc = 2, + .num_pd = 5, + .num_lpsc = 16, + .num_devs = 21, +}; diff --git a/drivers/clk/ti/clk-k3.c b/drivers/clk/ti/clk-k3.c index 74beb4d8ebd..0dd65934b36 100644 --- a/drivers/clk/ti/clk-k3.c +++ b/drivers/clk/ti/clk-k3.c @@ -73,6 +73,12 @@ static const struct soc_attr ti_k3_soc_clk_data[] = { .family = "J721S2", .data = &j721s2_clk_platdata, }, +#endif +#ifdef CONFIG_SOC_K3_AM625 + { + .family = "AM62X", + .data = &am62x_clk_platdata, + }, #endif { /* sentinel */ } }; diff --git a/drivers/power/domain/ti-power-domain.c b/drivers/power/domain/ti-power-domain.c index 292fff0dfbf..a7f64d04f5c 100644 --- a/drivers/power/domain/ti-power-domain.c +++ b/drivers/power/domain/ti-power-domain.c @@ -86,6 +86,12 @@ static const struct soc_attr ti_k3_soc_pd_data[] = { .family = "J721S2", .data = &j721s2_pd_platdata, }, +#endif +#ifdef CONFIG_SOC_K3_AM625 + { + .family = "AM62X", + .data = &am62x_pd_platdata, + }, #endif { /* sentinel */ } }; diff --git a/include/k3-clk.h b/include/k3-clk.h index 31292b59f20..371f077c447 100644 --- a/include/k3-clk.h +++ b/include/k3-clk.h @@ -174,6 +174,7 @@ struct ti_k3_clk_platdata { extern const struct ti_k3_clk_platdata j721e_clk_platdata; extern const struct ti_k3_clk_platdata j7200_clk_platdata; extern const struct ti_k3_clk_platdata j721s2_clk_platdata; +extern const struct ti_k3_clk_platdata am62x_clk_platdata; struct clk *clk_register_ti_pll(const char *name, const char *parent_name, void __iomem *reg); diff --git a/include/k3-dev.h b/include/k3-dev.h index b46b8c3aabc..87e873b9ced 100644 --- a/include/k3-dev.h +++ b/include/k3-dev.h @@ -78,6 +78,7 @@ struct ti_k3_pd_platdata { extern const struct ti_k3_pd_platdata j721e_pd_platdata; extern const struct ti_k3_pd_platdata j7200_pd_platdata; extern const struct ti_k3_pd_platdata j721s2_pd_platdata; +extern const struct ti_k3_pd_platdata am62x_pd_platdata; u8 ti_pd_state(struct ti_pd *pd); u8 lpsc_get_state(struct ti_lpsc *lpsc); -- GitLab From 720d37ff27583d10c30c6f5dcaadb0dfedde8964 Mon Sep 17 00:00:00 2001 From: Vignesh Raghavendra Date: Wed, 25 May 2022 13:38:44 +0530 Subject: [PATCH 139/581] dma: ti: Add PSIL data for AM62x DMASS Add PSIL data for AM62x SoC. Signed-off-by: Vignesh Raghavendra --- drivers/dma/ti/Makefile | 1 + drivers/dma/ti/k3-psil-am62.c | 50 +++++++++++++++++++++++++++++++++++ drivers/dma/ti/k3-psil-priv.h | 1 + drivers/dma/ti/k3-psil.c | 2 ++ 4 files changed, 54 insertions(+) create mode 100644 drivers/dma/ti/k3-psil-am62.c diff --git a/drivers/dma/ti/Makefile b/drivers/dma/ti/Makefile index 6a4f4f1365b..56f348700d4 100644 --- a/drivers/dma/ti/Makefile +++ b/drivers/dma/ti/Makefile @@ -7,3 +7,4 @@ k3-psil-data-$(CONFIG_SOC_K3_AM6) += k3-psil-am654.o k3-psil-data-$(CONFIG_SOC_K3_J721E) += k3-psil-j721e.o k3-psil-data-$(CONFIG_SOC_K3_J721S2) += k3-psil-j721s2.o k3-psil-data-$(CONFIG_SOC_K3_AM642) += k3-psil-am64.o +k3-psil-data-$(CONFIG_SOC_K3_AM625) += k3-psil-am62.o diff --git a/drivers/dma/ti/k3-psil-am62.c b/drivers/dma/ti/k3-psil-am62.c new file mode 100644 index 00000000000..9527da4cac5 --- /dev/null +++ b/drivers/dma/ti/k3-psil-am62.c @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com + */ + +#include + +#include "k3-psil-priv.h" + +#define PSIL_ETHERNET(x, ch, flow_base, flow_cnt) \ + { \ + .thread_id = x, \ + .ep_config = { \ + .ep_type = PSIL_EP_NATIVE, \ + .pkt_mode = 1, \ + .needs_epib = 1, \ + .psd_size = 16, \ + .mapped_channel_id = ch, \ + .flow_start = flow_base, \ + .flow_num = flow_cnt, \ + .default_flow_id = flow_base, \ + }, \ + } + +/* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */ +static struct psil_ep am62_src_ep_map[] = { + /* CPSW3G */ + PSIL_ETHERNET(0x4600, 19, 19, 16), +}; + +/* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */ +static struct psil_ep am62_dst_ep_map[] = { + /* CPSW3G */ + PSIL_ETHERNET(0xc600, 19, 19, 8), + PSIL_ETHERNET(0xc601, 20, 27, 8), + PSIL_ETHERNET(0xc602, 21, 35, 8), + PSIL_ETHERNET(0xc603, 22, 43, 8), + PSIL_ETHERNET(0xc604, 23, 51, 8), + PSIL_ETHERNET(0xc605, 24, 59, 8), + PSIL_ETHERNET(0xc606, 25, 67, 8), + PSIL_ETHERNET(0xc607, 26, 75, 8), +}; + +struct psil_ep_map am62_ep_map = { + .name = "am62", + .src = am62_src_ep_map, + .src_count = ARRAY_SIZE(am62_src_ep_map), + .dst = am62_dst_ep_map, + .dst_count = ARRAY_SIZE(am62_dst_ep_map), +}; diff --git a/drivers/dma/ti/k3-psil-priv.h b/drivers/dma/ti/k3-psil-priv.h index 77acaf21393..28078c6bd8d 100644 --- a/drivers/dma/ti/k3-psil-priv.h +++ b/drivers/dma/ti/k3-psil-priv.h @@ -41,5 +41,6 @@ extern struct psil_ep_map am654_ep_map; extern struct psil_ep_map j721e_ep_map; extern struct psil_ep_map j721s2_ep_map; extern struct psil_ep_map am64_ep_map; +extern struct psil_ep_map am62_ep_map; #endif /* K3_PSIL_PRIV_H_ */ diff --git a/drivers/dma/ti/k3-psil.c b/drivers/dma/ti/k3-psil.c index 8b2129d4f58..f1330bf4b03 100644 --- a/drivers/dma/ti/k3-psil.c +++ b/drivers/dma/ti/k3-psil.c @@ -24,6 +24,8 @@ struct psil_endpoint_config *psil_get_ep_config(u32 thread_id) soc_ep_map = &j721s2_ep_map; else if (IS_ENABLED(CONFIG_SOC_K3_AM642)) soc_ep_map = &am64_ep_map; + else if (IS_ENABLED(CONFIG_SOC_K3_AM625)) + soc_ep_map = &am62_ep_map; } if (thread_id & K3_PSIL_DST_THREAD_ID_OFFSET && soc_ep_map->dst) { -- GitLab From 7e9e38677326ea2bbe37ba98d596a3f89e5a86c3 Mon Sep 17 00:00:00 2001 From: Vignesh Raghavendra Date: Wed, 25 May 2022 13:38:45 +0530 Subject: [PATCH 140/581] firmware: ti_sci_static_data: add static DMA chan data Add range of DMA channels available for R5 SPL usage before DM firmware is loaded. Signed-off-by: Vignesh Raghavendra --- drivers/firmware/ti_sci_static_data.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/firmware/ti_sci_static_data.h b/drivers/firmware/ti_sci_static_data.h index e6a3b66c03f..8529ef29007 100644 --- a/drivers/firmware/ti_sci_static_data.h +++ b/drivers/firmware/ti_sci_static_data.h @@ -118,6 +118,19 @@ static struct ti_sci_resource_static_data rm_static_data[] = { }; #endif /* CONFIG_TARGET_J721S2_R5_EVM */ +#if IS_ENABLED(CONFIG_SOC_K3_AM625) +static struct ti_sci_resource_static_data rm_static_data[] = { + /* BC channels */ + { + .dev_id = 26, + .subtype = 32, + .range_start = 18, + .range_num = 2, + }, + { }, +}; +#endif /* CONFIG_SOC_K3_AM625 */ + #else static struct ti_sci_resource_static_data rm_static_data[] = { { }, -- GitLab From 1b2f4697c0d9afde132c3891b086e33e3f00fa66 Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Wed, 25 May 2022 13:38:46 +0530 Subject: [PATCH 141/581] arm: dts: Introduce base AM62 SoC dtsi files Introduce the basic AM62 SoC description dtsi files describing most peripherals as per kernel dts. Signed-off-by: Gowtham Tammana Signed-off-by: Suman Anna Signed-off-by: Vignesh Raghavendra --- arch/arm/dts/k3-am62-ddr.dtsi | 11 + arch/arm/dts/k3-am62-main.dtsi | 533 +++++++++++++++++++++++++++++++ arch/arm/dts/k3-am62-mcu.dtsi | 56 ++++ arch/arm/dts/k3-am62-wakeup.dtsi | 41 +++ arch/arm/dts/k3-am62.dtsi | 105 ++++++ arch/arm/dts/k3-am625.dtsi | 103 ++++++ 6 files changed, 849 insertions(+) create mode 100644 arch/arm/dts/k3-am62-ddr.dtsi create mode 100644 arch/arm/dts/k3-am62-main.dtsi create mode 100644 arch/arm/dts/k3-am62-mcu.dtsi create mode 100644 arch/arm/dts/k3-am62-wakeup.dtsi create mode 100644 arch/arm/dts/k3-am62.dtsi create mode 100644 arch/arm/dts/k3-am625.dtsi diff --git a/arch/arm/dts/k3-am62-ddr.dtsi b/arch/arm/dts/k3-am62-ddr.dtsi new file mode 100644 index 00000000000..0a8ced8f382 --- /dev/null +++ b/arch/arm/dts/k3-am62-ddr.dtsi @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ + */ + +#include "k3-am64-ddr.dtsi" +&memorycontroller { + power-domains = <&k3_pds 170 TI_SCI_PD_SHARED>, + <&k3_pds 55 TI_SCI_PD_SHARED>; + clocks = <&k3_clks 170 0>, <&k3_clks 16 4>; +}; diff --git a/arch/arm/dts/k3-am62-main.dtsi b/arch/arm/dts/k3-am62-main.dtsi new file mode 100644 index 00000000000..4b6ba98dd0a --- /dev/null +++ b/arch/arm/dts/k3-am62-main.dtsi @@ -0,0 +1,533 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for AM625 SoC Family Main Domain peripherals + * + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ + */ + +&cbass_main { + oc_sram: sram@70000000 { + compatible = "mmio-sram"; + reg = <0x00 0x70000000 0x00 0x10000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x00 0x70000000 0x10000>; + }; + + gic500: interrupt-controller@1800000 { + compatible = "arm,gic-v3"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */ + <0x00 0x01880000 0x00 0xc0000>, /* GICR */ + <0x00 0x01880000 0x00 0xc0000>, /* GICR */ + <0x01 0x00000000 0x00 0x2000>, /* GICC */ + <0x01 0x00010000 0x00 0x1000>, /* GICH */ + <0x01 0x00020000 0x00 0x2000>; /* GICV */ + /* + * vcpumntirq: + * virtual CPU interface maintenance interrupt + */ + interrupts = ; + + gic_its: msi-controller@1820000 { + compatible = "arm,gic-v3-its"; + reg = <0x00 0x01820000 0x00 0x10000>; + socionext,synquacer-pre-its = <0x1000000 0x400000>; + msi-controller; + #msi-cells = <1>; + }; + }; + + main_conf: syscon@100000 { + compatible = "syscon", "simple-mfd"; + reg = <0x00 0x00100000 0x00 0x20000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x00 0x00100000 0x20000>; + + phy_gmii_sel: phy@4044 { + compatible = "ti,am654-phy-gmii-sel"; + reg = <0x4044 0x8>; + #phy-cells = <1>; + }; + }; + + dmss: bus@48000000 { + compatible = "simple-mfd"; + #address-cells = <2>; + #size-cells = <2>; + dma-ranges; + ranges = <0x00 0x48000000 0x00 0x48000000 0x00 0x06400000>; + + ti,sci-dev-id = <25>; + + secure_proxy_main: mailbox@4d000000 { + compatible = "ti,am654-secure-proxy"; + #mbox-cells = <1>; + reg-names = "target_data", "rt", "scfg"; + reg = <0x00 0x4d000000 0x00 0x80000>, + <0x00 0x4a600000 0x00 0x80000>, + <0x00 0x4a400000 0x00 0x80000>; + interrupt-names = "rx_012"; + interrupts = ; + }; + + inta_main_dmss: interrupt-controller@48000000 { + compatible = "ti,sci-inta"; + reg = <0x00 0x48000000 0x00 0x100000>; + #interrupt-cells = <0>; + interrupt-controller; + interrupt-parent = <&gic500>; + msi-controller; + ti,sci = <&dmsc>; + ti,sci-dev-id = <28>; + ti,interrupt-ranges = <4 68 36>; + ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>; + }; + + main_bcdma: dma-controller@485c0100 { + compatible = "ti,am64-dmss-bcdma"; + reg = <0x00 0x485c0100 0x00 0x100>, + <0x00 0x4c000000 0x00 0x20000>, + <0x00 0x4a820000 0x00 0x20000>, + <0x00 0x4aa40000 0x00 0x20000>, + <0x00 0x4bc00000 0x00 0x100000>; + reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt"; + msi-parent = <&inta_main_dmss>; + #dma-cells = <3>; + + ti,sci = <&dmsc>; + ti,sci-dev-id = <26>; + ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */ + ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */ + ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */ + }; + + main_pktdma: dma-controller@485c0000 { + compatible = "ti,am64-dmss-pktdma"; + reg = <0x00 0x485c0000 0x00 0x100>, + <0x00 0x4a800000 0x00 0x20000>, + <0x00 0x4aa00000 0x00 0x40000>, + <0x00 0x4b800000 0x00 0x400000>; + reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt"; + msi-parent = <&inta_main_dmss>; + #dma-cells = <2>; + + ti,sci = <&dmsc>; + ti,sci-dev-id = <30>; + ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */ + <0x24>, /* CPSW_TX_CHAN */ + <0x25>, /* SAUL_TX_0_CHAN */ + <0x26>; /* SAUL_TX_1_CHAN */ + ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */ + <0x11>, /* RING_CPSW_TX_CHAN */ + <0x12>, /* RING_SAUL_TX_0_CHAN */ + <0x13>; /* RING_SAUL_TX_1_CHAN */ + ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */ + <0x2b>, /* CPSW_RX_CHAN */ + <0x2d>, /* SAUL_RX_0_CHAN */ + <0x2f>, /* SAUL_RX_1_CHAN */ + <0x31>, /* SAUL_RX_2_CHAN */ + <0x33>; /* SAUL_RX_3_CHAN */ + ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */ + <0x2c>, /* FLOW_CPSW_RX_CHAN */ + <0x2e>, /* FLOW_SAUL_RX_0/1_CHAN */ + <0x32>; /* FLOW_SAUL_RX_2/3_CHAN */ + }; + }; + + dmsc: system-controller@44043000 { + compatible = "ti,k2g-sci"; + ti,host-id = <12>; + mbox-names = "rx", "tx"; + mboxes= <&secure_proxy_main 12>, + <&secure_proxy_main 13>; + reg-names = "debug_messages"; + reg = <0x00 0x44043000 0x00 0xfe0>; + + k3_pds: power-controller { + compatible = "ti,sci-pm-domain"; + #power-domain-cells = <2>; + }; + + k3_clks: clock-controller { + compatible = "ti,k2g-sci-clk"; + #clock-cells = <2>; + }; + + k3_reset: reset-controller { + compatible = "ti,sci-reset"; + #reset-cells = <2>; + }; + }; + + main_pmx0: pinctrl@f4000 { + compatible = "pinctrl-single"; + reg = <0x00 0xf4000 0x00 0x2ac>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0xffffffff>; + }; + + main_uart0: serial@2800000 { + compatible = "ti,am64-uart", "ti,am654-uart"; + reg = <0x00 0x02800000 0x00 0x100>; + interrupts = ; + power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 146 0>; + clock-names = "fclk"; + }; + + main_uart1: serial@2810000 { + compatible = "ti,am64-uart", "ti,am654-uart"; + reg = <0x00 0x02810000 0x00 0x100>; + interrupts = ; + power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 152 0>; + clock-names = "fclk"; + }; + + main_uart2: serial@2820000 { + compatible = "ti,am64-uart", "ti,am654-uart"; + reg = <0x00 0x02820000 0x00 0x100>; + interrupts = ; + power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 153 0>; + clock-names = "fclk"; + }; + + main_uart3: serial@2830000 { + compatible = "ti,am64-uart", "ti,am654-uart"; + reg = <0x00 0x02830000 0x00 0x100>; + interrupts = ; + power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 154 0>; + clock-names = "fclk"; + }; + + main_uart4: serial@2840000 { + compatible = "ti,am64-uart", "ti,am654-uart"; + reg = <0x00 0x02840000 0x00 0x100>; + interrupts = ; + power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 155 0>; + clock-names = "fclk"; + }; + + main_uart5: serial@2850000 { + compatible = "ti,am64-uart", "ti,am654-uart"; + reg = <0x00 0x02850000 0x00 0x100>; + interrupts = ; + power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 156 0>; + clock-names = "fclk"; + }; + + main_uart6: serial@2860000 { + compatible = "ti,am64-uart", "ti,am654-uart"; + reg = <0x00 0x02860000 0x00 0x100>; + interrupts = ; + power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 158 0>; + clock-names = "fclk"; + }; + + main_i2c0: i2c@20000000 { + compatible = "ti,am64-i2c", "ti,omap4-i2c"; + reg = <0x00 0x20000000 0x00 0x100>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 102 2>; + clock-names = "fck"; + }; + + main_i2c1: i2c@20010000 { + compatible = "ti,am64-i2c", "ti,omap4-i2c"; + reg = <0x00 0x20010000 0x00 0x100>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 103 2>; + clock-names = "fck"; + }; + + main_i2c2: i2c@20020000 { + compatible = "ti,am64-i2c", "ti,omap4-i2c"; + reg = <0x00 0x20020000 0x00 0x100>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 104 2>; + clock-names = "fck"; + }; + + main_i2c3: i2c@20030000 { + compatible = "ti,am64-i2c", "ti,omap4-i2c"; + reg = <0x00 0x20030000 0x00 0x100>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 105 2>; + clock-names = "fck"; + }; + + main_spi0: spi@20100000 { + compatible = "ti,am654-mcspi", "ti,omap4-mcspi"; + reg = <0x00 0x20100000 0x00 0x400>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 172 0>; + }; + + main_spi1: spi@20110000 { + compatible = "ti,am654-mcspi","ti,omap4-mcspi"; + reg = <0x00 0x20110000 0x00 0x400>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 173 0>; + }; + + main_spi2: spi@20120000 { + compatible = "ti,am654-mcspi","ti,omap4-mcspi"; + reg = <0x00 0x20120000 0x00 0x400>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 174 0>; + }; + + main_gpio_intr: interrupt-controller@a00000 { + compatible = "ti,sci-intr"; + reg = <0x00 0x00a00000 0x00 0x800>; + ti,intr-trigger-type = <1>; + interrupt-controller; + interrupt-parent = <&gic500>; + #interrupt-cells = <1>; + ti,sci = <&dmsc>; + ti,sci-dev-id = <3>; + ti,interrupt-ranges = <0 32 16>; + }; + + main_gpio0: gpio@600000 { + compatible = "ti,am64-gpio", "ti,keystone-gpio"; + reg = <0x0 0x00600000 0x0 0x100>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&main_gpio_intr>; + interrupts = <190>, <191>, <192>, + <193>, <194>, <195>; + interrupt-controller; + #interrupt-cells = <2>; + ti,ngpio = <87>; + ti,davinci-gpio-unbanked = <0>; + power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 77 0>; + clock-names = "gpio"; + }; + + main_gpio1: gpio@601000 { + compatible = "ti,am64-gpio", "ti,keystone-gpio"; + reg = <0x0 0x00601000 0x0 0x100>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&main_gpio_intr>; + interrupts = <180>, <181>, <182>, + <183>, <184>, <185>; + interrupt-controller; + #interrupt-cells = <2>; + ti,ngpio = <88>; + ti,davinci-gpio-unbanked = <0>; + power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 78 0>; + clock-names = "gpio"; + }; + + sdhci0: mmc@fa10000 { + compatible = "ti,am62-sdhci"; + reg = <0x00 0x0fa10000 0x00 0x1000>, <0x00 0x0fa18000 0x00 0x400>; + interrupts = ; + power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 57 5>, <&k3_clks 57 6>; + clock-names = "clk_ahb", "clk_xin"; + assigned-clocks = <&k3_clks 57 6>; + assigned-clock-parents = <&k3_clks 57 8>; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + ti,trm-icp = <0x2>; + bus-width = <8>; + ti,clkbuf-sel = <0x7>; + ti,otap-del-sel-legacy = <0x0>; + ti,otap-del-sel-mmc-hs = <0x0>; + ti,otap-del-sel-ddr52 = <0x9>; + ti,otap-del-sel-hs200 = <0x6>; + }; + + sdhci1: mmc@fa00000 { + compatible = "ti,am62-sdhci"; + reg = <0x00 0x0fa00000 0x00 0x1000>, <0x00 0x0fa08000 0x00 0x400>; + interrupts = ; + power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 58 5>, <&k3_clks 58 6>; + clock-names = "clk_ahb", "clk_xin"; + ti,trm-icp = <0x2>; + ti,otap-del-sel-legacy = <0x0>; + ti,otap-del-sel-sd-hs = <0x0>; + ti,otap-del-sel-sdr12 = <0xf>; + ti,otap-del-sel-sdr25 = <0xf>; + ti,otap-del-sel-sdr50 = <0xc>; + ti,otap-del-sel-sdr104 = <0x6>; + ti,otap-del-sel-ddr50 = <0x9>; + ti,itap-del-sel-legacy = <0x0>; + ti,itap-del-sel-sd-hs = <0x0>; + ti,itap-del-sel-sdr12 = <0x0>; + ti,itap-del-sel-sdr25 = <0x0>; + ti,clkbuf-sel = <0x7>; + bus-width = <4>; + }; + + sdhci2: mmc@fa20000 { + compatible = "ti,am62-sdhci"; + reg = <0x00 0x0fa20000 0x00 0x1000>, <0x00 0x0fa28000 0x00 0x400>; + interrupts = ; + power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 184 5>, <&k3_clks 184 6>; + clock-names = "clk_ahb", "clk_xin"; + ti,trm-icp = <0x2>; + ti,otap-del-sel-legacy = <0x0>; + ti,otap-del-sel-sd-hs = <0x0>; + ti,otap-del-sel-sdr12 = <0xf>; + ti,otap-del-sel-sdr25 = <0xf>; + ti,otap-del-sel-sdr50 = <0xc>; + ti,otap-del-sel-sdr104 = <0x6>; + ti,otap-del-sel-ddr50 = <0x9>; + ti,itap-del-sel-legacy = <0x0>; + ti,itap-del-sel-sd-hs = <0x0>; + ti,itap-del-sel-sdr12 = <0x0>; + ti,itap-del-sel-sdr25 = <0x0>; + ti,clkbuf-sel = <0x7>; + }; + + fss: bus@fc00000 { + compatible = "simple-bus"; + reg = <0x00 0x0fc00000 0x00 0x70000>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ospi0: spi@fc40000 { + compatible = "ti,am654-ospi", "cdns,qspi-nor"; + reg = <0x00 0x0fc40000 0x00 0x100>, + <0x05 0x00000000 0x01 0x00000000>; + interrupts = ; + cdns,fifo-depth = <256>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x0>; + clocks = <&k3_clks 75 7>; + assigned-clocks = <&k3_clks 75 7>; + assigned-clock-parents = <&k3_clks 75 8>; + assigned-clock-rates = <166666666>; + power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + cpsw3g: ethernet@8000000 { + compatible = "ti,am642-cpsw-nuss"; + #address-cells = <2>; + #size-cells = <2>; + reg = <0x00 0x08000000 0x00 0x200000>; + reg-names = "cpsw_nuss"; + ranges = <0x00 0x00 0x00 0x08000000 0x00 0x200000>; + clocks = <&k3_clks 13 0>; + assigned-clocks = <&k3_clks 13 3>; + assigned-clock-parents = <&k3_clks 13 11>; + clock-names = "fck"; + power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>; + + dmas = <&main_pktdma 0xc600 15>, + <&main_pktdma 0xc601 15>, + <&main_pktdma 0xc602 15>, + <&main_pktdma 0xc603 15>, + <&main_pktdma 0xc604 15>, + <&main_pktdma 0xc605 15>, + <&main_pktdma 0xc606 15>, + <&main_pktdma 0xc607 15>, + <&main_pktdma 0x4600 15>; + dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", + "tx7", "rx"; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + cpsw_port1: port@1 { + reg = <1>; + ti,mac-only; + label = "port1"; + phys = <&phy_gmii_sel 1>; + mac-address = [00 00 00 00 00 00]; + ti,syscon-efuse = <&wkup_conf 0x200>; + }; + + cpsw_port2: port@2 { + reg = <2>; + ti,mac-only; + label = "port2"; + phys = <&phy_gmii_sel 2>; + mac-address = [00 00 00 00 00 00]; + }; + }; + + cpsw3g_mdio: mdio@f00 { + compatible = "ti,cpsw-mdio","ti,davinci_mdio"; + reg = <0x00 0xf00 0x00 0x100>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&k3_clks 13 0>; + clock-names = "fck"; + bus_freq = <1000000>; + }; + + cpts@3d000 { + compatible = "ti,j721e-cpts"; + reg = <0x00 0x3d000 0x00 0x400>; + clocks = <&k3_clks 13 1>; + clock-names = "cpts"; + interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "cpts"; + ti,cpts-ext-ts-inputs = <4>; + ti,cpts-periodic-outputs = <2>; + }; + }; + + hwspinlock: spinlock@2a000000 { + compatible = "ti,am64-hwspinlock"; + reg = <0x00 0x2a000000 0x00 0x1000>; + #hwlock-cells = <1>; + }; + + mailbox0_cluster0: mailbox@29000000 { + compatible = "ti,am64-mailbox"; + reg = <0x00 0x29000000 0x00 0x200>; + interrupts = , + ; + #mbox-cells = <1>; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <16>; + }; +}; diff --git a/arch/arm/dts/k3-am62-mcu.dtsi b/arch/arm/dts/k3-am62-mcu.dtsi new file mode 100644 index 00000000000..d103824c963 --- /dev/null +++ b/arch/arm/dts/k3-am62-mcu.dtsi @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for AM625 SoC Family MCU Domain peripherals + * + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ + */ + +&cbass_mcu { + mcu_pmx0: pinctrl@4084000 { + compatible = "pinctrl-single"; + reg = <0x00 0x04084000 0x00 0x88>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0xffffffff>; + }; + + mcu_uart0: serial@4a00000 { + compatible = "ti,am64-uart", "ti,am654-uart"; + reg = <0x00 0x04a00000 0x00 0x100>; + interrupts = ; + power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 149 0>; + clock-names = "fclk"; + }; + + mcu_i2c0: i2c@4900000 { + compatible = "ti,am64-i2c", "ti,omap4-i2c"; + reg = <0x00 0x04900000 0x00 0x100>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 106 2>; + clock-names = "fck"; + }; + + mcu_spi0: spi@4b00000 { + compatible = "ti,am654-mcspi", "ti,omap4-mcspi"; + reg = <0x00 0x04b00000 0x00 0x400>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 147 0>; + }; + + mcu_spi1: spi@4b10000 { + compatible = "ti,am654-mcspi","ti,omap4-mcspi"; + reg = <0x00 0x04b10000 0x00 0x400>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 148 0>; + }; +}; diff --git a/arch/arm/dts/k3-am62-wakeup.dtsi b/arch/arm/dts/k3-am62-wakeup.dtsi new file mode 100644 index 00000000000..4090134676c --- /dev/null +++ b/arch/arm/dts/k3-am62-wakeup.dtsi @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for AM625 SoC Family Wakeup Domain peripherals + * + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ + */ + +&cbass_wakeup { + wkup_conf: syscon@43000000 { + compatible = "syscon", "simple-mfd"; + reg = <0x00 0x43000000 0x00 0x20000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x00 0x43000000 0x20000>; + + chipid: chipid@14 { + compatible = "ti,am654-chipid"; + reg = <0x14 0x4>; + }; + }; + + wkup_uart0: serial@2b300000 { + compatible = "ti,am64-uart", "ti,am654-uart"; + reg = <0x00 0x2b300000 0x00 0x100>; + interrupts = ; + power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 114 0>; + clock-names = "fclk"; + }; + + wkup_i2c0: i2c@2b200000 { + compatible = "ti,am64-i2c", "ti,omap4-i2c"; + reg = <0x00 0x02b200000 0x00 0x100>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 107 4>; + clock-names = "fck"; + }; +}; diff --git a/arch/arm/dts/k3-am62.dtsi b/arch/arm/dts/k3-am62.dtsi new file mode 100644 index 00000000000..bc2997b1855 --- /dev/null +++ b/arch/arm/dts/k3-am62.dtsi @@ -0,0 +1,105 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for AM62 SoC Family + * + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ + */ + +#include +#include +#include +#include +#include + +/ { + model = "Texas Instruments K3 AM625 SoC"; + compatible = "ti,am625"; + interrupt-parent = <&gic500>; + #address-cells = <2>; + #size-cells = <2>; + + chosen { }; + + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + + psci: psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + }; + + a53_timer0: timer-cl0-cpu0 { + compatible = "arm,armv8-timer"; + interrupts = , /* cntpsirq */ + , /* cntpnsirq */ + , /* cntvirq */ + ; /* cnthpirq */ + }; + + pmu: pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = ; + }; + + cbass_main: bus@f0000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + + ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */ + <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */ + <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */ + <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */ + <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */ + <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */ + <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */ + <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */ + <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */ + <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */ + <0x00 0x20000000 0x00 0x20000000 0x00 0x0a008000>, /* Third peripheral window */ + <0x00 0x30040000 0x00 0x30040000 0x00 0x00080000>, /* PRUSS-M */ + <0x00 0x30101000 0x00 0x30101000 0x00 0x00010100>, /* CSI window */ + <0x00 0x30200000 0x00 0x30200000 0x00 0x00010000>, /* DSS */ + <0x00 0x31000000 0x00 0x31000000 0x00 0x00050000>, /* USB0 DWC3 Core window */ + <0x00 0x31100000 0x00 0x31100000 0x00 0x00050000>, /* USB1 DWC3 Core window */ + <0x00 0x43600000 0x00 0x43600000 0x00 0x00010000>, /* SA3 sproxy data */ + <0x00 0x44043000 0x00 0x44043000 0x00 0x00000fe0>, /* TI SCI DEBUG */ + <0x00 0x44860000 0x00 0x44860000 0x00 0x00040000>, /* SA3 sproxy config */ + <0x00 0x48000000 0x00 0x48000000 0x00 0x06400000>, /* DMSS */ + <0x00 0x60000000 0x00 0x60000000 0x00 0x08000000>, /* FSS0 DAT1 */ + <0x00 0x70000000 0x00 0x70000000 0x00 0x00010000>, /* OCSRAM */ + <0x01 0x00000000 0x01 0x00000000 0x00 0x00310000>, /* A53 PERIPHBASE */ + <0x05 0x00000000 0x05 0x00000000 0x01 0x00000000>, /* FSS0 DAT3 */ + + /* MCU Domain Range */ + <0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>, + + /* Wakeup Domain Range */ + <0x00 0x2b000000 0x00 0x2b000000 0x00 0x00300400>, + <0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>; + + cbass_mcu: bus@4000000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>; /* Peripheral window */ + }; + + cbass_wakeup: bus@2b000000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x00 0x2b000000 0x00 0x2b000000 0x00 0x00300400>, /* Peripheral Window */ + <0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>; + }; + }; +}; + +/* Now include the peripherals for each bus segments */ +#include "k3-am62-main.dtsi" +#include "k3-am62-mcu.dtsi" +#include "k3-am62-wakeup.dtsi" diff --git a/arch/arm/dts/k3-am625.dtsi b/arch/arm/dts/k3-am625.dtsi new file mode 100644 index 00000000000..887f31c23fe --- /dev/null +++ b/arch/arm/dts/k3-am625.dtsi @@ -0,0 +1,103 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for AM625 SoC family in Quad core configuration + * + * TRM: https://www.ti.com/lit/pdf/spruiv7 + * + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/dts-v1/; + +#include "k3-am62.dtsi" + +/ { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0: cluster0 { + core0 { + cpu = <&cpu0>; + }; + + core1 { + cpu = <&cpu1>; + }; + + core2 { + cpu = <&cpu2>; + }; + + core3 { + cpu = <&cpu3>; + }; + }; + }; + + cpu0: cpu@0 { + compatible = "arm,cortex-a53"; + reg = <0x000>; + device_type = "cpu"; + enable-method = "psci"; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; + next-level-cache = <&L2_0>; + }; + + cpu1: cpu@1 { + compatible = "arm,cortex-a53"; + reg = <0x001>; + device_type = "cpu"; + enable-method = "psci"; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; + next-level-cache = <&L2_0>; + }; + + cpu2: cpu@2 { + compatible = "arm,cortex-a53"; + reg = <0x002>; + device_type = "cpu"; + enable-method = "psci"; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; + next-level-cache = <&L2_0>; + }; + + cpu3: cpu@3 { + compatible = "arm,cortex-a53"; + reg = <0x003>; + device_type = "cpu"; + enable-method = "psci"; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; + next-level-cache = <&L2_0>; + }; + }; + + L2_0: l2-cache0 { + compatible = "cache"; + cache-level = <2>; + cache-size = <0x40000>; + cache-line-size = <64>; + cache-sets = <512>; + }; +}; -- GitLab From 900349b7ddb4dfa80378d4ab69d0c2e8cc136309 Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Wed, 25 May 2022 13:38:47 +0530 Subject: [PATCH 142/581] board: ti: Introduce the basic files to support AM62 SK board Add basic support for AM62 SK. This has 2GB DDR. Note that stack for R5 SPL is in OCRAM @ 0x7000ffff so that is away from BSS and does not step on BSS section Add only the bare minimum required to support UART and SD. Signed-off-by: Suman Anna Signed-off-by: Aswath Govindraju Signed-off-by: Nishanth Menon Signed-off-by: Vignesh Raghavendra Reviewed-by: Tom Rini --- arch/arm/mach-k3/Kconfig | 1 + board/ti/am62x/Kconfig | 59 ++++++++++++++++++++++++++++++++++++++++ board/ti/am62x/Makefile | 8 ++++++ board/ti/am62x/evm.c | 39 ++++++++++++++++++++++++++ 4 files changed, 107 insertions(+) create mode 100644 board/ti/am62x/Kconfig create mode 100644 board/ti/am62x/Makefile create mode 100644 board/ti/am62x/evm.c diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig index 0dc4f44fdd2..57f693e9a12 100644 --- a/arch/arm/mach-k3/Kconfig +++ b/arch/arm/mach-k3/Kconfig @@ -178,6 +178,7 @@ config K3_DM_FW source "board/ti/am65x/Kconfig" source "board/ti/am64x/Kconfig" +source "board/ti/am62x/Kconfig" source "board/ti/j721e/Kconfig" source "board/siemens/iot2050/Kconfig" source "board/ti/j721s2/Kconfig" diff --git a/board/ti/am62x/Kconfig b/board/ti/am62x/Kconfig new file mode 100644 index 00000000000..87fed44df17 --- /dev/null +++ b/board/ti/am62x/Kconfig @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ +# Suman Anna + +choice + prompt "TI K3 AM62x based boards" + optional + +config TARGET_AM625_A53_EVM + bool "TI K3 based AM625 EVM running on A53" + select ARM64 + select SOC_K3_AM625 + +config TARGET_AM625_R5_EVM + bool "TI K3 based AM625 EVM running on R5" + select CPU_V7R + select SYS_THUMB_BUILD + select K3_LOAD_SYSFW + select SOC_K3_AM625 + select RAM + select SPL_RAM + select K3_DDRSS + imply SYS_K3_SPL_ATF + +endchoice + +if TARGET_AM625_A53_EVM + +config SYS_BOARD + default "am62x" + +config SYS_VENDOR + default "ti" + +config SYS_CONFIG_NAME + default "am62x_evm" + +source "board/ti/common/Kconfig" + +endif + +if TARGET_AM625_R5_EVM + +config SYS_BOARD + default "am62x" + +config SYS_VENDOR + default "ti" + +config SYS_CONFIG_NAME + default "am62x_evm" + +config SPL_LDSCRIPT + default "arch/arm/mach-omap2/u-boot-spl.lds" + +source "board/ti/common/Kconfig" + +endif diff --git a/board/ti/am62x/Makefile b/board/ti/am62x/Makefile new file mode 100644 index 00000000000..f4c35edffad --- /dev/null +++ b/board/ti/am62x/Makefile @@ -0,0 +1,8 @@ +# +# Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ +# Suman Anna +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += evm.o diff --git a/board/ti/am62x/evm.c b/board/ti/am62x/evm.c new file mode 100644 index 00000000000..4dd5e64299b --- /dev/null +++ b/board/ti/am62x/evm.c @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Board specific initialization for AM62x platforms + * + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ + * Suman Anna + * + */ + +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ + gd->ram_size = 0x80000000; + + return 0; +} + +int dram_init_banksize(void) +{ + /* Bank 0 declares the memory available in the DDR low region */ + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].size = 0x80000000; + gd->ram_size = 0x80000000; + + return 0; +} -- GitLab From 3e48d37f4862079b2e92707151960ff5f2d094aa Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Wed, 25 May 2022 13:38:48 +0530 Subject: [PATCH 143/581] arm: dts: Add support for AM62-SK MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit AM62 StarterKit (SK) board is a low cost, small form factor board designed for TI’s AM625 SoC. It supports the following interfaces: * 2 GB DDR4 RAM * x2 Gigabit Ethernet interfaces capable of working in Switch and MAC mode * x1 HDMI Port with audio + x1 OLDI/LVDS Display interface for Dual Display * x1 Headphone Jack * x1 USB2.0 Hub with two Type A host and x1 USB Type-C DRP Port * x1 UHS-1 capable µSD card slot * 2.4/5 GHz WLAN + Bluetooth 4.2 through WL1837 * 512 Mbit OSPI flash * x4 UART through UART-USB bridge * XDS110 for onboard JTAG debug using USB * Temperature sensors, user push buttons and LEDs * 40-pin User Expansion Connector * 24-pin header for peripherals in MCU island (I2C, UART, SPI, IO) * 20-pin header for Programmable Realtime Unit (PRU) IO pins * 15-pin CSI header Add basic support for AM62-SK. To keep the changes to minimum. Only UART And SD are supported at the moment. This should serve as good example for adding new board support based on AM62x SoC Schematics: https://www.ti.com/lit/zip/sprr448 Signed-off-by: Nishanth Menon Signed-off-by: Aswath Govindraju Signed-off-by: Nishanth Menon Signed-off-by: Dave Gerlach Signed-off-by: Vignesh Raghavendra --- arch/arm/dts/Makefile | 3 + arch/arm/dts/k3-am625-r5-sk.dts | 140 ++ arch/arm/dts/k3-am625-sk-u-boot.dtsi | 100 + arch/arm/dts/k3-am625-sk.dts | 150 ++ arch/arm/dts/k3-am62x-sk-ddr4-1600MTs.dtsi | 2189 ++++++++++++++++++++ 5 files changed, 2582 insertions(+) create mode 100644 arch/arm/dts/k3-am625-r5-sk.dts create mode 100644 arch/arm/dts/k3-am625-sk-u-boot.dtsi create mode 100644 arch/arm/dts/k3-am625-sk.dts create mode 100644 arch/arm/dts/k3-am62x-sk-ddr4-1600MTs.dtsi diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index d4d11fd2e12..f78f66853db 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1198,6 +1198,9 @@ dtb-$(CONFIG_SOC_K3_AM642) += k3-am642-evm.dtb \ k3-am642-sk.dtb \ k3-am642-r5-sk.dtb +dtb-$(CONFIG_SOC_K3_AM625) += k3-am625-sk.dtb \ + k3-am625-r5-sk.dtb + dtb-$(CONFIG_ARCH_MEDIATEK) += \ mt7622-rfb.dtb \ mt7623a-unielec-u7623-02-emmc.dtb \ diff --git a/arch/arm/dts/k3-am625-r5-sk.dts b/arch/arm/dts/k3-am625-r5-sk.dts new file mode 100644 index 00000000000..2691af40a14 --- /dev/null +++ b/arch/arm/dts/k3-am625-r5-sk.dts @@ -0,0 +1,140 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * AM625 SK dts file for R5 SPL + * Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/ + */ + +#include "k3-am625-sk.dts" +#include "k3-am62x-sk-ddr4-1600MTs.dtsi" +#include "k3-am62-ddr.dtsi" + +#include "k3-am625-sk-u-boot.dtsi" + +/ { + aliases { + remoteproc0 = &sysctrler; + remoteproc1 = &a53_0; + serial0 = &wkup_uart0; + serial3 = &main_uart1; + }; + + chosen { + stdout-path = "serial2:115200n8"; + tick-timer = &timer1; + }; + + memory@80000000 { + device_type = "memory"; + /* 2G RAM */ + reg = <0x00000000 0x80000000 0x00000000 0x80000000>; + + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + secure_ddr: optee@9e800000 { + reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ + alignment = <0x1000>; + no-map; + }; + }; + + a53_0: a53@0 { + compatible = "ti,am654-rproc"; + reg = <0x00 0x00a90000 0x00 0x10>; + power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>, + <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>; + resets = <&k3_reset 135 0>; + clocks = <&k3_clks 61 0>; + assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>; + assigned-clock-parents = <&k3_clks 61 2>; + assigned-clock-rates = <200000000>, <1200000000>; + ti,sci = <&dmsc>; + ti,sci-proc-id = <32>; + ti,sci-host-id = <10>; + u-boot,dm-spl; + }; + + dm_tifs: dm-tifs { + compatible = "ti,j721e-dm-sci"; + ti,host-id = <36>; + ti,secure-host; + mbox-names = "rx", "tx"; + mboxes= <&secure_proxy_main 22>, + <&secure_proxy_main 23>; + u-boot,dm-spl; + }; +}; + +&dmsc { + mboxes= <&secure_proxy_main 0>, + <&secure_proxy_main 1>, + <&secure_proxy_main 0>; + mbox-names = "rx", "tx", "notify"; + ti,host-id = <35>; + ti,secure-host; +}; + +&cbass_main { + sa3_secproxy: secproxy@44880000 { + u-boot,dm-spl; + compatible = "ti,am654-secure-proxy"; + #mbox-cells = <1>; + reg-names = "rt", "scfg", "target_data"; + reg = <0x00 0x44880000 0x00 0x20000>, + <0x0 0x44860000 0x0 0x20000>, + <0x0 0x43600000 0x0 0x10000>; + }; + + sysctrler: sysctrler { + compatible = "ti,am654-system-controller"; + mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&sa3_secproxy 0>; + mbox-names = "tx", "rx", "boot_notify"; + u-boot,dm-spl; + }; +}; + +&mcu_pmx0 { + u-boot,dm-spl; + wkup_uart0_pins_default: wkup-uart0-pins-default { + pinctrl-single,pins = < + AM62X_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C6) WKUP_UART0_CTSn */ + AM62X_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (A4) WKUP_UART0_RTSn */ + AM62X_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (B4) WKUP_UART0_RXD */ + AM62X_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (C5) WKUP_UART0_TXD */ + >; + u-boot,dm-spl; + }; +}; + +&main_pmx0 { + u-boot,dm-spl; + main_uart1_pins_default: main-uart1-pins-default { + pinctrl-single,pins = < + AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19) MCASP0_AXR3.UART1_CTSn */ + AM62X_IOPAD(0x198, PIN_OUTPUT, 2) /* (A19) MCASP0_AXR2.UART1_RTSn */ + AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19) MCASP0_AFSR.UART1_RXD */ + AM62X_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (A20) MCASP0_ACLKR.UART1_TXD */ + >; + u-boot,dm-spl; + }; +}; + +/* WKUP UART0 is used for DM firmware logs */ +&wkup_uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&wkup_uart0_pins_default>; + status = "okay"; + u-boot,dm-spl; +}; + +/* Main UART1 is used for TIFS firmware logs */ +&main_uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&main_uart1_pins_default>; + status = "okay"; + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi b/arch/arm/dts/k3-am625-sk-u-boot.dtsi new file mode 100644 index 00000000000..e1971ecdfed --- /dev/null +++ b/arch/arm/dts/k3-am625-sk-u-boot.dtsi @@ -0,0 +1,100 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Common AM625 SK dts file for SPLs + * Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/ { + chosen { + stdout-path = "serial2:115200n8"; + tick-timer = &timer1; + }; + + aliases { + mmc1 = &sdhci1; + }; +}; + +&cbass_main{ + u-boot,dm-spl; + + timer1: timer@2400000 { + compatible = "ti,omap5430-timer"; + reg = <0x00 0x2400000 0x00 0x80>; + ti,timer-alwon; + clock-frequency = <25000000>; + u-boot,dm-spl; + }; +}; + +&dmss { + u-boot,dm-spl; +}; + +&secure_proxy_main { + u-boot,dm-spl; +}; + +&dmsc { + u-boot,dm-spl; +}; + +&k3_pds { + u-boot,dm-spl; +}; + +&k3_clks { + u-boot,dm-spl; +}; + +&k3_reset { + u-boot,dm-spl; +}; + +&wkup_conf { + u-boot,dm-spl; +}; + +&chipid { + u-boot,dm-spl; +}; + +&main_pmx0 { + u-boot,dm-spl; +}; + +&main_uart0 { + u-boot,dm-spl; +}; + +&main_uart0_pins_default { + u-boot,dm-spl; +}; + +&main_uart1 { + u-boot,dm-spl; +}; + +&cbass_mcu { + u-boot,dm-spl; +}; + +&cbass_wakeup { + u-boot,dm-spl; +}; + +&mcu_pmx0 { + u-boot,dm-spl; +}; + +&wkup_uart0 { + u-boot,dm-spl; +}; + +&sdhci1 { + u-boot,dm-spl; +}; + +&main_mmc1_pins_default { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/k3-am625-sk.dts b/arch/arm/dts/k3-am625-sk.dts new file mode 100644 index 00000000000..76b06ea2395 --- /dev/null +++ b/arch/arm/dts/k3-am625-sk.dts @@ -0,0 +1,150 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * AM625 SK: https://www.ti.com/lit/zip/sprr448 + * + * Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/dts-v1/; + +#include +#include +#include +#include "k3-am625.dtsi" + +/ { + compatible = "ti,am625-sk", "ti,am625"; + model = "Texas Instruments AM625 SK"; + + aliases { + serial2 = &main_uart0; + mmc1 = &sdhci1; + }; + + chosen { + stdout-path = "serial2:115200n8"; + bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000"; + }; + + memory@80000000 { + device_type = "memory"; + /* 2G RAM */ + reg = <0x00000000 0x80000000 0x00000000 0x80000000>; + + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + secure_tfa_ddr: tfa@9e780000 { + reg = <0x00 0x9e780000 0x00 0x80000>; + alignment = <0x1000>; + no-map; + }; + + secure_ddr: optee@9e800000 { + reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ + alignment = <0x1000>; + no-map; + }; + + wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x9db00000 0x00 0xc00000>; + no-map; + }; + }; +}; + +&main_pmx0 { + main_uart0_pins_default: main-uart0-pins-default { + pinctrl-single,pins = < + AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14) UART0_RXD */ + AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */ + >; + }; + + main_mmc1_pins_default: main-mmc1-pins-default { + pinctrl-single,pins = < + AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */ + AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22) MMC1_CLK */ + AM62X_IOPAD(0x230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */ + AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */ + AM62X_IOPAD(0x228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */ + AM62X_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */ + AM62X_IOPAD(0x240, PIN_INPUT, 0) /* (D17) MMC1_SDCD */ + >; + }; +}; + +&wkup_uart0 { + /* WKUP UART0 is used by DM firmware */ + status = "reserved"; +}; + +&mcu_uart0 { + status = "disabled"; +}; + +&main_uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_uart0_pins_default>; +}; + +&main_uart1 { + /* Main UART1 is used by TIFS firmware */ + status = "reserved"; +}; + +&main_uart2 { + status = "disabled"; +}; + +&main_uart3 { + status = "disabled"; +}; + +&main_uart4 { + status = "disabled"; +}; + +&main_uart5 { + status = "disabled"; +}; + +&main_uart6 { + status = "disabled"; +}; + +&mcu_i2c0 { + status = "disabled"; +}; + +&wkup_i2c0 { + status = "disabled"; +}; + +&main_i2c0 { + status = "disabled"; +}; + +&main_i2c1 { + status = "disabled"; +}; + +&main_i2c2 { + status = "disabled"; +}; + +&main_i2c3 { + status = "disabled"; +}; + +&sdhci1 { + pinctrl-names = "default"; + pinctrl-0 = <&main_mmc1_pins_default>; + ti,driver-strength-ohm = <50>; + disable-wp; +}; diff --git a/arch/arm/dts/k3-am62x-sk-ddr4-1600MTs.dtsi b/arch/arm/dts/k3-am62x-sk-ddr4-1600MTs.dtsi new file mode 100644 index 00000000000..d92e3ce048b --- /dev/null +++ b/arch/arm/dts/k3-am62x-sk-ddr4-1600MTs.dtsi @@ -0,0 +1,2189 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * This file was generated with the + * AM62x SysConfig DDR Subsystem Register Configuration Tool v0.08.60 + * Wed Mar 16 2022 17:41:20 GMT-0500 (Central Daylight Time) + * DDR Type: DDR4 + * Frequency = 800MHz (1600MTs) + * Density: 16Gb + * Number of Ranks: 1 + */ + +#define DDRSS_PLL_FHS_CNT 6 +#define DDRSS_PLL_FREQUENCY_1 400000000 +#define DDRSS_PLL_FREQUENCY_2 400000000 + +#define DDRSS_CTL_0_DATA 0x00000A00 +#define DDRSS_CTL_1_DATA 0x00000000 +#define DDRSS_CTL_2_DATA 0x00000000 +#define DDRSS_CTL_3_DATA 0x00000000 +#define DDRSS_CTL_4_DATA 0x00000000 +#define DDRSS_CTL_5_DATA 0x00000000 +#define DDRSS_CTL_6_DATA 0x00000000 +#define DDRSS_CTL_7_DATA 0x000890B8 +#define DDRSS_CTL_8_DATA 0x00000000 +#define DDRSS_CTL_9_DATA 0x00000000 +#define DDRSS_CTL_10_DATA 0x00000000 +#define DDRSS_CTL_11_DATA 0x000890B8 +#define DDRSS_CTL_12_DATA 0x00000000 +#define DDRSS_CTL_13_DATA 0x00000000 +#define DDRSS_CTL_14_DATA 0x00000000 +#define DDRSS_CTL_15_DATA 0x000890B8 +#define DDRSS_CTL_16_DATA 0x00000000 +#define DDRSS_CTL_17_DATA 0x00000000 +#define DDRSS_CTL_18_DATA 0x00000000 +#define DDRSS_CTL_19_DATA 0x01010100 +#define DDRSS_CTL_20_DATA 0x01000100 +#define DDRSS_CTL_21_DATA 0x01000110 +#define DDRSS_CTL_22_DATA 0x02010002 +#define DDRSS_CTL_23_DATA 0x00027100 +#define DDRSS_CTL_24_DATA 0x00061A80 +#define DDRSS_CTL_25_DATA 0x02550255 +#define DDRSS_CTL_26_DATA 0x00000255 +#define DDRSS_CTL_27_DATA 0x00000000 +#define DDRSS_CTL_28_DATA 0x00000000 +#define DDRSS_CTL_29_DATA 0x00000000 +#define DDRSS_CTL_30_DATA 0x00000000 +#define DDRSS_CTL_31_DATA 0x00000000 +#define DDRSS_CTL_32_DATA 0x00000000 +#define DDRSS_CTL_33_DATA 0x00000000 +#define DDRSS_CTL_34_DATA 0x00000000 +#define DDRSS_CTL_35_DATA 0x00000000 +#define DDRSS_CTL_36_DATA 0x00000000 +#define DDRSS_CTL_37_DATA 0x00000000 +#define DDRSS_CTL_38_DATA 0x0400091C +#define DDRSS_CTL_39_DATA 0x1C1C1C1C +#define DDRSS_CTL_40_DATA 0x0400091C +#define DDRSS_CTL_41_DATA 0x1C1C1C1C +#define DDRSS_CTL_42_DATA 0x0400091C +#define DDRSS_CTL_43_DATA 0x1C1C1C1C +#define DDRSS_CTL_44_DATA 0x05050404 +#define DDRSS_CTL_45_DATA 0x00002706 +#define DDRSS_CTL_46_DATA 0x0602001D +#define DDRSS_CTL_47_DATA 0x05001D0B +#define DDRSS_CTL_48_DATA 0x00270605 +#define DDRSS_CTL_49_DATA 0x0602001D +#define DDRSS_CTL_50_DATA 0x05001D0B +#define DDRSS_CTL_51_DATA 0x00270605 +#define DDRSS_CTL_52_DATA 0x0602001D +#define DDRSS_CTL_53_DATA 0x07001D0B +#define DDRSS_CTL_54_DATA 0x00180807 +#define DDRSS_CTL_55_DATA 0x0400DB60 +#define DDRSS_CTL_56_DATA 0x07070009 +#define DDRSS_CTL_57_DATA 0x00001808 +#define DDRSS_CTL_58_DATA 0x0400DB60 +#define DDRSS_CTL_59_DATA 0x07070009 +#define DDRSS_CTL_60_DATA 0x00001808 +#define DDRSS_CTL_61_DATA 0x0400DB60 +#define DDRSS_CTL_62_DATA 0x03000009 +#define DDRSS_CTL_63_DATA 0x0D0C0002 +#define DDRSS_CTL_64_DATA 0x0D0C0D0C +#define DDRSS_CTL_65_DATA 0x01010000 +#define DDRSS_CTL_66_DATA 0x03191919 +#define DDRSS_CTL_67_DATA 0x0B0B0B0B +#define DDRSS_CTL_68_DATA 0x00000B0B +#define DDRSS_CTL_69_DATA 0x00000101 +#define DDRSS_CTL_70_DATA 0x00000000 +#define DDRSS_CTL_71_DATA 0x01000000 +#define DDRSS_CTL_72_DATA 0x01180803 +#define DDRSS_CTL_73_DATA 0x00001860 +#define DDRSS_CTL_74_DATA 0x00000118 +#define DDRSS_CTL_75_DATA 0x00001860 +#define DDRSS_CTL_76_DATA 0x00000118 +#define DDRSS_CTL_77_DATA 0x00001860 +#define DDRSS_CTL_78_DATA 0x00000005 +#define DDRSS_CTL_79_DATA 0x00000000 +#define DDRSS_CTL_80_DATA 0x00000000 +#define DDRSS_CTL_81_DATA 0x00000000 +#define DDRSS_CTL_82_DATA 0x00000000 +#define DDRSS_CTL_83_DATA 0x00000000 +#define DDRSS_CTL_84_DATA 0x00000000 +#define DDRSS_CTL_85_DATA 0x00000000 +#define DDRSS_CTL_86_DATA 0x00000000 +#define DDRSS_CTL_87_DATA 0x00090009 +#define DDRSS_CTL_88_DATA 0x00000009 +#define DDRSS_CTL_89_DATA 0x00000000 +#define DDRSS_CTL_90_DATA 0x00000000 +#define DDRSS_CTL_91_DATA 0x00000000 +#define DDRSS_CTL_92_DATA 0x00000000 +#define DDRSS_CTL_93_DATA 0x00000000 +#define DDRSS_CTL_94_DATA 0x00010001 +#define DDRSS_CTL_95_DATA 0x00025501 +#define DDRSS_CTL_96_DATA 0x02550120 +#define DDRSS_CTL_97_DATA 0x02550120 +#define DDRSS_CTL_98_DATA 0x01200120 +#define DDRSS_CTL_99_DATA 0x01200120 +#define DDRSS_CTL_100_DATA 0x00000000 +#define DDRSS_CTL_101_DATA 0x00000000 +#define DDRSS_CTL_102_DATA 0x00000000 +#define DDRSS_CTL_103_DATA 0x00000000 +#define DDRSS_CTL_104_DATA 0x00000000 +#define DDRSS_CTL_105_DATA 0x00000000 +#define DDRSS_CTL_106_DATA 0x03010000 +#define DDRSS_CTL_107_DATA 0x00010000 +#define DDRSS_CTL_108_DATA 0x00000000 +#define DDRSS_CTL_109_DATA 0x01000000 +#define DDRSS_CTL_110_DATA 0x80104002 +#define DDRSS_CTL_111_DATA 0x00040003 +#define DDRSS_CTL_112_DATA 0x00040005 +#define DDRSS_CTL_113_DATA 0x00030000 +#define DDRSS_CTL_114_DATA 0x00050004 +#define DDRSS_CTL_115_DATA 0x00000004 +#define DDRSS_CTL_116_DATA 0x00040003 +#define DDRSS_CTL_117_DATA 0x00040005 +#define DDRSS_CTL_118_DATA 0x00000000 +#define DDRSS_CTL_119_DATA 0x00061800 +#define DDRSS_CTL_120_DATA 0x00061800 +#define DDRSS_CTL_121_DATA 0x00061800 +#define DDRSS_CTL_122_DATA 0x00061800 +#define DDRSS_CTL_123_DATA 0x00061800 +#define DDRSS_CTL_124_DATA 0x00000000 +#define DDRSS_CTL_125_DATA 0x0000AAA0 +#define DDRSS_CTL_126_DATA 0x00061800 +#define DDRSS_CTL_127_DATA 0x00061800 +#define DDRSS_CTL_128_DATA 0x00061800 +#define DDRSS_CTL_129_DATA 0x00061800 +#define DDRSS_CTL_130_DATA 0x00061800 +#define DDRSS_CTL_131_DATA 0x00000000 +#define DDRSS_CTL_132_DATA 0x0000AAA0 +#define DDRSS_CTL_133_DATA 0x00061800 +#define DDRSS_CTL_134_DATA 0x00061800 +#define DDRSS_CTL_135_DATA 0x00061800 +#define DDRSS_CTL_136_DATA 0x00061800 +#define DDRSS_CTL_137_DATA 0x00061800 +#define DDRSS_CTL_138_DATA 0x00000000 +#define DDRSS_CTL_139_DATA 0x0000AAA0 +#define DDRSS_CTL_140_DATA 0x00000000 +#define DDRSS_CTL_141_DATA 0x00000000 +#define DDRSS_CTL_142_DATA 0x00000000 +#define DDRSS_CTL_143_DATA 0x00000000 +#define DDRSS_CTL_144_DATA 0x00000000 +#define DDRSS_CTL_145_DATA 0x00000000 +#define DDRSS_CTL_146_DATA 0x00000000 +#define DDRSS_CTL_147_DATA 0x00000000 +#define DDRSS_CTL_148_DATA 0x00000000 +#define DDRSS_CTL_149_DATA 0x00000000 +#define DDRSS_CTL_150_DATA 0x00000000 +#define DDRSS_CTL_151_DATA 0x00000000 +#define DDRSS_CTL_152_DATA 0x00000000 +#define DDRSS_CTL_153_DATA 0x00000000 +#define DDRSS_CTL_154_DATA 0x00000000 +#define DDRSS_CTL_155_DATA 0x00000000 +#define DDRSS_CTL_156_DATA 0x080C0000 +#define DDRSS_CTL_157_DATA 0x080C080C +#define DDRSS_CTL_158_DATA 0x08000000 +#define DDRSS_CTL_159_DATA 0x00000808 +#define DDRSS_CTL_160_DATA 0x000E0000 +#define DDRSS_CTL_161_DATA 0x00080808 +#define DDRSS_CTL_162_DATA 0x0E000000 +#define DDRSS_CTL_163_DATA 0x08080800 +#define DDRSS_CTL_164_DATA 0x00000000 +#define DDRSS_CTL_165_DATA 0x0000080E +#define DDRSS_CTL_166_DATA 0x00040003 +#define DDRSS_CTL_167_DATA 0x00000007 +#define DDRSS_CTL_168_DATA 0x00000000 +#define DDRSS_CTL_169_DATA 0x00000000 +#define DDRSS_CTL_170_DATA 0x00000000 +#define DDRSS_CTL_171_DATA 0x00000000 +#define DDRSS_CTL_172_DATA 0x00000000 +#define DDRSS_CTL_173_DATA 0x00000000 +#define DDRSS_CTL_174_DATA 0x01000000 +#define DDRSS_CTL_175_DATA 0x00000000 +#define DDRSS_CTL_176_DATA 0x00001500 +#define DDRSS_CTL_177_DATA 0x0000100E +#define DDRSS_CTL_178_DATA 0x00000000 +#define DDRSS_CTL_179_DATA 0x00000000 +#define DDRSS_CTL_180_DATA 0x00000001 +#define DDRSS_CTL_181_DATA 0x00000002 +#define DDRSS_CTL_182_DATA 0x00000C00 +#define DDRSS_CTL_183_DATA 0x00001000 +#define DDRSS_CTL_184_DATA 0x00000C00 +#define DDRSS_CTL_185_DATA 0x00001000 +#define DDRSS_CTL_186_DATA 0x00000C00 +#define DDRSS_CTL_187_DATA 0x00001000 +#define DDRSS_CTL_188_DATA 0x00000000 +#define DDRSS_CTL_189_DATA 0x00000000 +#define DDRSS_CTL_190_DATA 0x00000000 +#define DDRSS_CTL_191_DATA 0x00000000 +#define DDRSS_CTL_192_DATA 0x00000000 +#define DDRSS_CTL_193_DATA 0x00000000 +#define DDRSS_CTL_194_DATA 0x00000000 +#define DDRSS_CTL_195_DATA 0x00000000 +#define DDRSS_CTL_196_DATA 0x00000000 +#define DDRSS_CTL_197_DATA 0x00000000 +#define DDRSS_CTL_198_DATA 0x00000000 +#define DDRSS_CTL_199_DATA 0x00000000 +#define DDRSS_CTL_200_DATA 0x00000000 +#define DDRSS_CTL_201_DATA 0x00000000 +#define DDRSS_CTL_202_DATA 0x00000000 +#define DDRSS_CTL_203_DATA 0x00000000 +#define DDRSS_CTL_204_DATA 0x00042400 +#define DDRSS_CTL_205_DATA 0x00000301 +#define DDRSS_CTL_206_DATA 0x00000000 +#define DDRSS_CTL_207_DATA 0x00000424 +#define DDRSS_CTL_208_DATA 0x00000301 +#define DDRSS_CTL_209_DATA 0x00000000 +#define DDRSS_CTL_210_DATA 0x00000424 +#define DDRSS_CTL_211_DATA 0x00000301 +#define DDRSS_CTL_212_DATA 0x00000000 +#define DDRSS_CTL_213_DATA 0x00000424 +#define DDRSS_CTL_214_DATA 0x00000301 +#define DDRSS_CTL_215_DATA 0x00000000 +#define DDRSS_CTL_216_DATA 0x00000424 +#define DDRSS_CTL_217_DATA 0x00000301 +#define DDRSS_CTL_218_DATA 0x00000000 +#define DDRSS_CTL_219_DATA 0x00000424 +#define DDRSS_CTL_220_DATA 0x00000301 +#define DDRSS_CTL_221_DATA 0x00000000 +#define DDRSS_CTL_222_DATA 0x00000000 +#define DDRSS_CTL_223_DATA 0x00000000 +#define DDRSS_CTL_224_DATA 0x00000000 +#define DDRSS_CTL_225_DATA 0x00000000 +#define DDRSS_CTL_226_DATA 0x00000000 +#define DDRSS_CTL_227_DATA 0x00000000 +#define DDRSS_CTL_228_DATA 0x00000000 +#define DDRSS_CTL_229_DATA 0x00000000 +#define DDRSS_CTL_230_DATA 0x00000000 +#define DDRSS_CTL_231_DATA 0x00000000 +#define DDRSS_CTL_232_DATA 0x00000000 +#define DDRSS_CTL_233_DATA 0x00000000 +#define DDRSS_CTL_234_DATA 0x00000000 +#define DDRSS_CTL_235_DATA 0x00000000 +#define DDRSS_CTL_236_DATA 0x00001401 +#define DDRSS_CTL_237_DATA 0x00001401 +#define DDRSS_CTL_238_DATA 0x00001401 +#define DDRSS_CTL_239_DATA 0x00001401 +#define DDRSS_CTL_240_DATA 0x00001401 +#define DDRSS_CTL_241_DATA 0x00001401 +#define DDRSS_CTL_242_DATA 0x00000493 +#define DDRSS_CTL_243_DATA 0x00000493 +#define DDRSS_CTL_244_DATA 0x00000493 +#define DDRSS_CTL_245_DATA 0x00000493 +#define DDRSS_CTL_246_DATA 0x00000493 +#define DDRSS_CTL_247_DATA 0x00000493 +#define DDRSS_CTL_248_DATA 0x00000000 +#define DDRSS_CTL_249_DATA 0x00000000 +#define DDRSS_CTL_250_DATA 0x00000000 +#define DDRSS_CTL_251_DATA 0x00000000 +#define DDRSS_CTL_252_DATA 0x00000000 +#define DDRSS_CTL_253_DATA 0x00000000 +#define DDRSS_CTL_254_DATA 0x00000000 +#define DDRSS_CTL_255_DATA 0x00000000 +#define DDRSS_CTL_256_DATA 0x00000000 +#define DDRSS_CTL_257_DATA 0x00000000 +#define DDRSS_CTL_258_DATA 0x00000000 +#define DDRSS_CTL_259_DATA 0x00000000 +#define DDRSS_CTL_260_DATA 0x00000000 +#define DDRSS_CTL_261_DATA 0x00000000 +#define DDRSS_CTL_262_DATA 0x00000000 +#define DDRSS_CTL_263_DATA 0x00000000 +#define DDRSS_CTL_264_DATA 0x00000000 +#define DDRSS_CTL_265_DATA 0x00000000 +#define DDRSS_CTL_266_DATA 0x00000000 +#define DDRSS_CTL_267_DATA 0x00000000 +#define DDRSS_CTL_268_DATA 0x00000000 +#define DDRSS_CTL_269_DATA 0x00000000 +#define DDRSS_CTL_270_DATA 0x00000000 +#define DDRSS_CTL_271_DATA 0x00000000 +#define DDRSS_CTL_272_DATA 0x00000000 +#define DDRSS_CTL_273_DATA 0x00000000 +#define DDRSS_CTL_274_DATA 0x00000000 +#define DDRSS_CTL_275_DATA 0x00000000 +#define DDRSS_CTL_276_DATA 0x00000000 +#define DDRSS_CTL_277_DATA 0x00010000 +#define DDRSS_CTL_278_DATA 0x00000000 +#define DDRSS_CTL_279_DATA 0x00000000 +#define DDRSS_CTL_280_DATA 0x00000000 +#define DDRSS_CTL_281_DATA 0x00000101 +#define DDRSS_CTL_282_DATA 0x00000000 +#define DDRSS_CTL_283_DATA 0x00000000 +#define DDRSS_CTL_284_DATA 0x00000000 +#define DDRSS_CTL_285_DATA 0x00000000 +#define DDRSS_CTL_286_DATA 0x00000000 +#define DDRSS_CTL_287_DATA 0x00000000 +#define DDRSS_CTL_288_DATA 0x00000000 +#define DDRSS_CTL_289_DATA 0x00000000 +#define DDRSS_CTL_290_DATA 0x0C181511 +#define DDRSS_CTL_291_DATA 0x00000304 +#define DDRSS_CTL_292_DATA 0x00000000 +#define DDRSS_CTL_293_DATA 0x00000000 +#define DDRSS_CTL_294_DATA 0x00000000 +#define DDRSS_CTL_295_DATA 0x00000000 +#define DDRSS_CTL_296_DATA 0x00000000 +#define DDRSS_CTL_297_DATA 0x00000000 +#define DDRSS_CTL_298_DATA 0x00000000 +#define DDRSS_CTL_299_DATA 0x00000000 +#define DDRSS_CTL_300_DATA 0x00000000 +#define DDRSS_CTL_301_DATA 0x00000000 +#define DDRSS_CTL_302_DATA 0x00000000 +#define DDRSS_CTL_303_DATA 0x00000000 +#define DDRSS_CTL_304_DATA 0x00000000 +#define DDRSS_CTL_305_DATA 0x00040000 +#define DDRSS_CTL_306_DATA 0x00800200 +#define DDRSS_CTL_307_DATA 0x00000000 +#define DDRSS_CTL_308_DATA 0x02000400 +#define DDRSS_CTL_309_DATA 0x00000080 +#define DDRSS_CTL_310_DATA 0x00040000 +#define DDRSS_CTL_311_DATA 0x00800200 +#define DDRSS_CTL_312_DATA 0x00000000 +#define DDRSS_CTL_313_DATA 0x00000000 +#define DDRSS_CTL_314_DATA 0x00000000 +#define DDRSS_CTL_315_DATA 0x00000100 +#define DDRSS_CTL_316_DATA 0x01010000 +#define DDRSS_CTL_317_DATA 0x00000000 +#define DDRSS_CTL_318_DATA 0x3FFF0000 +#define DDRSS_CTL_319_DATA 0x000FFF00 +#define DDRSS_CTL_320_DATA 0xFFFFFFFF +#define DDRSS_CTL_321_DATA 0x000FFF00 +#define DDRSS_CTL_322_DATA 0x0A000000 +#define DDRSS_CTL_323_DATA 0x0001FFFF +#define DDRSS_CTL_324_DATA 0x01010101 +#define DDRSS_CTL_325_DATA 0x01010101 +#define DDRSS_CTL_326_DATA 0x00000118 +#define DDRSS_CTL_327_DATA 0x00000C01 +#define DDRSS_CTL_328_DATA 0x00000000 +#define DDRSS_CTL_329_DATA 0x00000000 +#define DDRSS_CTL_330_DATA 0x00000000 +#define DDRSS_CTL_331_DATA 0x01000000 +#define DDRSS_CTL_332_DATA 0x00000100 +#define DDRSS_CTL_333_DATA 0x00010000 +#define DDRSS_CTL_334_DATA 0x00000000 +#define DDRSS_CTL_335_DATA 0x00000000 +#define DDRSS_CTL_336_DATA 0x00000000 +#define DDRSS_CTL_337_DATA 0x00000000 +#define DDRSS_CTL_338_DATA 0x00000000 +#define DDRSS_CTL_339_DATA 0x00000000 +#define DDRSS_CTL_340_DATA 0x00000000 +#define DDRSS_CTL_341_DATA 0x00000000 +#define DDRSS_CTL_342_DATA 0x00000000 +#define DDRSS_CTL_343_DATA 0x00000000 +#define DDRSS_CTL_344_DATA 0x00000000 +#define DDRSS_CTL_345_DATA 0x00000000 +#define DDRSS_CTL_346_DATA 0x00000000 +#define DDRSS_CTL_347_DATA 0x00000000 +#define DDRSS_CTL_348_DATA 0x00000000 +#define DDRSS_CTL_349_DATA 0x00000000 +#define DDRSS_CTL_350_DATA 0x00000000 +#define DDRSS_CTL_351_DATA 0x00000000 +#define DDRSS_CTL_352_DATA 0x00000000 +#define DDRSS_CTL_353_DATA 0x00000000 +#define DDRSS_CTL_354_DATA 0x00000000 +#define DDRSS_CTL_355_DATA 0x00000000 +#define DDRSS_CTL_356_DATA 0x00000000 +#define DDRSS_CTL_357_DATA 0x00000000 +#define DDRSS_CTL_358_DATA 0x00000000 +#define DDRSS_CTL_359_DATA 0x00000000 +#define DDRSS_CTL_360_DATA 0x00000000 +#define DDRSS_CTL_361_DATA 0x00000000 +#define DDRSS_CTL_362_DATA 0x00000000 +#define DDRSS_CTL_363_DATA 0x00000000 +#define DDRSS_CTL_364_DATA 0x00000000 +#define DDRSS_CTL_365_DATA 0x00000000 +#define DDRSS_CTL_366_DATA 0x00000000 +#define DDRSS_CTL_367_DATA 0x00000000 +#define DDRSS_CTL_368_DATA 0x00000000 +#define DDRSS_CTL_369_DATA 0x00000000 +#define DDRSS_CTL_370_DATA 0x0C000000 +#define DDRSS_CTL_371_DATA 0x060C0606 +#define DDRSS_CTL_372_DATA 0x06060C06 +#define DDRSS_CTL_373_DATA 0x00010101 +#define DDRSS_CTL_374_DATA 0x02000000 +#define DDRSS_CTL_375_DATA 0x05020101 +#define DDRSS_CTL_376_DATA 0x00000505 +#define DDRSS_CTL_377_DATA 0x02020200 +#define DDRSS_CTL_378_DATA 0x02020202 +#define DDRSS_CTL_379_DATA 0x02020202 +#define DDRSS_CTL_380_DATA 0x02020202 +#define DDRSS_CTL_381_DATA 0x00000000 +#define DDRSS_CTL_382_DATA 0x00000000 +#define DDRSS_CTL_383_DATA 0x04000100 +#define DDRSS_CTL_384_DATA 0x1E000004 +#define DDRSS_CTL_385_DATA 0x000030C0 +#define DDRSS_CTL_386_DATA 0x00000200 +#define DDRSS_CTL_387_DATA 0x00000200 +#define DDRSS_CTL_388_DATA 0x00000200 +#define DDRSS_CTL_389_DATA 0x00000200 +#define DDRSS_CTL_390_DATA 0x0000DB60 +#define DDRSS_CTL_391_DATA 0x0001E780 +#define DDRSS_CTL_392_DATA 0x0C0D0302 +#define DDRSS_CTL_393_DATA 0x001E090A +#define DDRSS_CTL_394_DATA 0x000030C0 +#define DDRSS_CTL_395_DATA 0x00000200 +#define DDRSS_CTL_396_DATA 0x00000200 +#define DDRSS_CTL_397_DATA 0x00000200 +#define DDRSS_CTL_398_DATA 0x00000200 +#define DDRSS_CTL_399_DATA 0x0000DB60 +#define DDRSS_CTL_400_DATA 0x0001E780 +#define DDRSS_CTL_401_DATA 0x0C0D0302 +#define DDRSS_CTL_402_DATA 0x001E090A +#define DDRSS_CTL_403_DATA 0x000030C0 +#define DDRSS_CTL_404_DATA 0x00000200 +#define DDRSS_CTL_405_DATA 0x00000200 +#define DDRSS_CTL_406_DATA 0x00000200 +#define DDRSS_CTL_407_DATA 0x00000200 +#define DDRSS_CTL_408_DATA 0x0000DB60 +#define DDRSS_CTL_409_DATA 0x0001E780 +#define DDRSS_CTL_410_DATA 0x0C0D0302 +#define DDRSS_CTL_411_DATA 0x0000090A +#define DDRSS_CTL_412_DATA 0x00000000 +#define DDRSS_CTL_413_DATA 0x0302000A +#define DDRSS_CTL_414_DATA 0x01000500 +#define DDRSS_CTL_415_DATA 0x01010001 +#define DDRSS_CTL_416_DATA 0x00010001 +#define DDRSS_CTL_417_DATA 0x01010001 +#define DDRSS_CTL_418_DATA 0x02010000 +#define DDRSS_CTL_419_DATA 0x00000200 +#define DDRSS_CTL_420_DATA 0x02000201 +#define DDRSS_CTL_421_DATA 0x00000000 +#define DDRSS_CTL_422_DATA 0x00202020 +#define DDRSS_PI_0_DATA 0x00000A00 +#define DDRSS_PI_1_DATA 0x00000000 +#define DDRSS_PI_2_DATA 0x00000000 +#define DDRSS_PI_3_DATA 0x01000000 +#define DDRSS_PI_4_DATA 0x00000001 +#define DDRSS_PI_5_DATA 0x00010064 +#define DDRSS_PI_6_DATA 0x00000000 +#define DDRSS_PI_7_DATA 0x00000000 +#define DDRSS_PI_8_DATA 0x00000000 +#define DDRSS_PI_9_DATA 0x00000000 +#define DDRSS_PI_10_DATA 0x00000000 +#define DDRSS_PI_11_DATA 0x00000000 +#define DDRSS_PI_12_DATA 0x00000000 +#define DDRSS_PI_13_DATA 0x00010001 +#define DDRSS_PI_14_DATA 0x00000000 +#define DDRSS_PI_15_DATA 0x00010001 +#define DDRSS_PI_16_DATA 0x00000005 +#define DDRSS_PI_17_DATA 0x00000000 +#define DDRSS_PI_18_DATA 0x00000000 +#define DDRSS_PI_19_DATA 0x00000000 +#define DDRSS_PI_20_DATA 0x00000000 +#define DDRSS_PI_21_DATA 0x00000000 +#define DDRSS_PI_22_DATA 0x00000000 +#define DDRSS_PI_23_DATA 0x00000000 +#define DDRSS_PI_24_DATA 0x280D0001 +#define DDRSS_PI_25_DATA 0x00000000 +#define DDRSS_PI_26_DATA 0x00010000 +#define DDRSS_PI_27_DATA 0x00003200 +#define DDRSS_PI_28_DATA 0x00000000 +#define DDRSS_PI_29_DATA 0x00000000 +#define DDRSS_PI_30_DATA 0x00060602 +#define DDRSS_PI_31_DATA 0x00000000 +#define DDRSS_PI_32_DATA 0x00000000 +#define DDRSS_PI_33_DATA 0x00000000 +#define DDRSS_PI_34_DATA 0x00000001 +#define DDRSS_PI_35_DATA 0x00000055 +#define DDRSS_PI_36_DATA 0x000000AA +#define DDRSS_PI_37_DATA 0x000000AD +#define DDRSS_PI_38_DATA 0x00000052 +#define DDRSS_PI_39_DATA 0x0000006A +#define DDRSS_PI_40_DATA 0x00000095 +#define DDRSS_PI_41_DATA 0x00000095 +#define DDRSS_PI_42_DATA 0x000000AD +#define DDRSS_PI_43_DATA 0x00000000 +#define DDRSS_PI_44_DATA 0x00000000 +#define DDRSS_PI_45_DATA 0x00010100 +#define DDRSS_PI_46_DATA 0x00000014 +#define DDRSS_PI_47_DATA 0x000007D0 +#define DDRSS_PI_48_DATA 0x00000300 +#define DDRSS_PI_49_DATA 0x00000000 +#define DDRSS_PI_50_DATA 0x00000000 +#define DDRSS_PI_51_DATA 0x01000000 +#define DDRSS_PI_52_DATA 0x00010101 +#define DDRSS_PI_53_DATA 0x01000000 +#define DDRSS_PI_54_DATA 0x00000000 +#define DDRSS_PI_55_DATA 0x00010000 +#define DDRSS_PI_56_DATA 0x00000000 +#define DDRSS_PI_57_DATA 0x00000000 +#define DDRSS_PI_58_DATA 0x00000000 +#define DDRSS_PI_59_DATA 0x00000000 +#define DDRSS_PI_60_DATA 0x00001400 +#define DDRSS_PI_61_DATA 0x00000000 +#define DDRSS_PI_62_DATA 0x01000000 +#define DDRSS_PI_63_DATA 0x00000404 +#define DDRSS_PI_64_DATA 0x00000001 +#define DDRSS_PI_65_DATA 0x0001010E +#define DDRSS_PI_66_DATA 0x02040100 +#define DDRSS_PI_67_DATA 0x00010000 +#define DDRSS_PI_68_DATA 0x00000034 +#define DDRSS_PI_69_DATA 0x00000000 +#define DDRSS_PI_70_DATA 0x00000000 +#define DDRSS_PI_71_DATA 0x00000000 +#define DDRSS_PI_72_DATA 0x00000000 +#define DDRSS_PI_73_DATA 0x00000000 +#define DDRSS_PI_74_DATA 0x00000000 +#define DDRSS_PI_75_DATA 0x00000005 +#define DDRSS_PI_76_DATA 0x01000000 +#define DDRSS_PI_77_DATA 0x04000100 +#define DDRSS_PI_78_DATA 0x00020000 +#define DDRSS_PI_79_DATA 0x00010002 +#define DDRSS_PI_80_DATA 0x00000001 +#define DDRSS_PI_81_DATA 0x00020001 +#define DDRSS_PI_82_DATA 0x00020002 +#define DDRSS_PI_83_DATA 0x00000000 +#define DDRSS_PI_84_DATA 0x00000000 +#define DDRSS_PI_85_DATA 0x00000000 +#define DDRSS_PI_86_DATA 0x00000000 +#define DDRSS_PI_87_DATA 0x00000000 +#define DDRSS_PI_88_DATA 0x00000000 +#define DDRSS_PI_89_DATA 0x00000000 +#define DDRSS_PI_90_DATA 0x00000000 +#define DDRSS_PI_91_DATA 0x00000300 +#define DDRSS_PI_92_DATA 0x0A090B0C +#define DDRSS_PI_93_DATA 0x04060708 +#define DDRSS_PI_94_DATA 0x01000005 +#define DDRSS_PI_95_DATA 0x00000800 +#define DDRSS_PI_96_DATA 0x00000000 +#define DDRSS_PI_97_DATA 0x00010008 +#define DDRSS_PI_98_DATA 0x00000000 +#define DDRSS_PI_99_DATA 0x0000AA00 +#define DDRSS_PI_100_DATA 0x00000000 +#define DDRSS_PI_101_DATA 0x00010000 +#define DDRSS_PI_102_DATA 0x00000000 +#define DDRSS_PI_103_DATA 0x00000000 +#define DDRSS_PI_104_DATA 0x00000000 +#define DDRSS_PI_105_DATA 0x00000000 +#define DDRSS_PI_106_DATA 0x00000000 +#define DDRSS_PI_107_DATA 0x00000000 +#define DDRSS_PI_108_DATA 0x00000000 +#define DDRSS_PI_109_DATA 0x00000000 +#define DDRSS_PI_110_DATA 0x00000000 +#define DDRSS_PI_111_DATA 0x00000000 +#define DDRSS_PI_112_DATA 0x00000000 +#define DDRSS_PI_113_DATA 0x00000000 +#define DDRSS_PI_114_DATA 0x00000000 +#define DDRSS_PI_115_DATA 0x00000000 +#define DDRSS_PI_116_DATA 0x00000000 +#define DDRSS_PI_117_DATA 0x00000000 +#define DDRSS_PI_118_DATA 0x00000000 +#define DDRSS_PI_119_DATA 0x00000000 +#define DDRSS_PI_120_DATA 0x00000000 +#define DDRSS_PI_121_DATA 0x00000000 +#define DDRSS_PI_122_DATA 0x00000000 +#define DDRSS_PI_123_DATA 0x00000000 +#define DDRSS_PI_124_DATA 0x00000008 +#define DDRSS_PI_125_DATA 0x00000000 +#define DDRSS_PI_126_DATA 0x00000000 +#define DDRSS_PI_127_DATA 0x00000000 +#define DDRSS_PI_128_DATA 0x00000000 +#define DDRSS_PI_129_DATA 0x00000000 +#define DDRSS_PI_130_DATA 0x00000000 +#define DDRSS_PI_131_DATA 0x00000000 +#define DDRSS_PI_132_DATA 0x00000000 +#define DDRSS_PI_133_DATA 0x00010100 +#define DDRSS_PI_134_DATA 0x00000000 +#define DDRSS_PI_135_DATA 0x00000000 +#define DDRSS_PI_136_DATA 0x00027100 +#define DDRSS_PI_137_DATA 0x00061A80 +#define DDRSS_PI_138_DATA 0x00000100 +#define DDRSS_PI_139_DATA 0x00000000 +#define DDRSS_PI_140_DATA 0x00000000 +#define DDRSS_PI_141_DATA 0x00000000 +#define DDRSS_PI_142_DATA 0x00000000 +#define DDRSS_PI_143_DATA 0x00000000 +#define DDRSS_PI_144_DATA 0x01000000 +#define DDRSS_PI_145_DATA 0x00010003 +#define DDRSS_PI_146_DATA 0x02000101 +#define DDRSS_PI_147_DATA 0x01030001 +#define DDRSS_PI_148_DATA 0x00010400 +#define DDRSS_PI_149_DATA 0x06000105 +#define DDRSS_PI_150_DATA 0x01070001 +#define DDRSS_PI_151_DATA 0x00000000 +#define DDRSS_PI_152_DATA 0x00000000 +#define DDRSS_PI_153_DATA 0x00000000 +#define DDRSS_PI_154_DATA 0x00010000 +#define DDRSS_PI_155_DATA 0x00000000 +#define DDRSS_PI_156_DATA 0x00000000 +#define DDRSS_PI_157_DATA 0x00000000 +#define DDRSS_PI_158_DATA 0x00000000 +#define DDRSS_PI_159_DATA 0x00010000 +#define DDRSS_PI_160_DATA 0x00000004 +#define DDRSS_PI_161_DATA 0x00000000 +#define DDRSS_PI_162_DATA 0x00000000 +#define DDRSS_PI_163_DATA 0x00000000 +#define DDRSS_PI_164_DATA 0x00007800 +#define DDRSS_PI_165_DATA 0x00780078 +#define DDRSS_PI_166_DATA 0x00141414 +#define DDRSS_PI_167_DATA 0x0000003A +#define DDRSS_PI_168_DATA 0x0000003A +#define DDRSS_PI_169_DATA 0x0004003A +#define DDRSS_PI_170_DATA 0x04000400 +#define DDRSS_PI_171_DATA 0xC8040009 +#define DDRSS_PI_172_DATA 0x0400091C +#define DDRSS_PI_173_DATA 0x00091CC8 +#define DDRSS_PI_174_DATA 0x001CC804 +#define DDRSS_PI_175_DATA 0x00000118 +#define DDRSS_PI_176_DATA 0x00001860 +#define DDRSS_PI_177_DATA 0x00000118 +#define DDRSS_PI_178_DATA 0x00001860 +#define DDRSS_PI_179_DATA 0x00000118 +#define DDRSS_PI_180_DATA 0x04001860 +#define DDRSS_PI_181_DATA 0x01010404 +#define DDRSS_PI_182_DATA 0x00001901 +#define DDRSS_PI_183_DATA 0x00190019 +#define DDRSS_PI_184_DATA 0x010C010C +#define DDRSS_PI_185_DATA 0x0000010C +#define DDRSS_PI_186_DATA 0x00000000 +#define DDRSS_PI_187_DATA 0x05000000 +#define DDRSS_PI_188_DATA 0x01010505 +#define DDRSS_PI_189_DATA 0x01010101 +#define DDRSS_PI_190_DATA 0x00181818 +#define DDRSS_PI_191_DATA 0x00000000 +#define DDRSS_PI_192_DATA 0x00000000 +#define DDRSS_PI_193_DATA 0x0D000000 +#define DDRSS_PI_194_DATA 0x0A0A0D0D +#define DDRSS_PI_195_DATA 0x0303030A +#define DDRSS_PI_196_DATA 0x00000000 +#define DDRSS_PI_197_DATA 0x00000000 +#define DDRSS_PI_198_DATA 0x00000000 +#define DDRSS_PI_199_DATA 0x00000000 +#define DDRSS_PI_200_DATA 0x00000000 +#define DDRSS_PI_201_DATA 0x00000000 +#define DDRSS_PI_202_DATA 0x00000000 +#define DDRSS_PI_203_DATA 0x00000000 +#define DDRSS_PI_204_DATA 0x00000000 +#define DDRSS_PI_205_DATA 0x00000000 +#define DDRSS_PI_206_DATA 0x00000000 +#define DDRSS_PI_207_DATA 0x00000000 +#define DDRSS_PI_208_DATA 0x00000000 +#define DDRSS_PI_209_DATA 0x0D090000 +#define DDRSS_PI_210_DATA 0x0D09000D +#define DDRSS_PI_211_DATA 0x0D09000D +#define DDRSS_PI_212_DATA 0x0000000D +#define DDRSS_PI_213_DATA 0x00000000 +#define DDRSS_PI_214_DATA 0x00000000 +#define DDRSS_PI_215_DATA 0x00000000 +#define DDRSS_PI_216_DATA 0x00000000 +#define DDRSS_PI_217_DATA 0x16000000 +#define DDRSS_PI_218_DATA 0x001600C8 +#define DDRSS_PI_219_DATA 0x001600C8 +#define DDRSS_PI_220_DATA 0x010100C8 +#define DDRSS_PI_221_DATA 0x00001B01 +#define DDRSS_PI_222_DATA 0x1F0F0053 +#define DDRSS_PI_223_DATA 0x05000001 +#define DDRSS_PI_224_DATA 0x001B0A0D +#define DDRSS_PI_225_DATA 0x1F0F0053 +#define DDRSS_PI_226_DATA 0x05000001 +#define DDRSS_PI_227_DATA 0x001B0A0D +#define DDRSS_PI_228_DATA 0x1F0F0053 +#define DDRSS_PI_229_DATA 0x05000001 +#define DDRSS_PI_230_DATA 0x00010A0D +#define DDRSS_PI_231_DATA 0x0C0B0700 +#define DDRSS_PI_232_DATA 0x000D0605 +#define DDRSS_PI_233_DATA 0x0000C570 +#define DDRSS_PI_234_DATA 0x0000001D +#define DDRSS_PI_235_DATA 0x180A0800 +#define DDRSS_PI_236_DATA 0x0B071C1C +#define DDRSS_PI_237_DATA 0x0D06050C +#define DDRSS_PI_238_DATA 0x0000C570 +#define DDRSS_PI_239_DATA 0x0000001D +#define DDRSS_PI_240_DATA 0x180A0800 +#define DDRSS_PI_241_DATA 0x0B071C1C +#define DDRSS_PI_242_DATA 0x0D06050C +#define DDRSS_PI_243_DATA 0x0000C570 +#define DDRSS_PI_244_DATA 0x0000001D +#define DDRSS_PI_245_DATA 0x180A0800 +#define DDRSS_PI_246_DATA 0x00001C1C +#define DDRSS_PI_247_DATA 0x000030C0 +#define DDRSS_PI_248_DATA 0x0001E780 +#define DDRSS_PI_249_DATA 0x000030C0 +#define DDRSS_PI_250_DATA 0x0001E780 +#define DDRSS_PI_251_DATA 0x000030C0 +#define DDRSS_PI_252_DATA 0x0001E780 +#define DDRSS_PI_253_DATA 0x02550255 +#define DDRSS_PI_254_DATA 0x03030255 +#define DDRSS_PI_255_DATA 0x00025503 +#define DDRSS_PI_256_DATA 0x02550255 +#define DDRSS_PI_257_DATA 0x0C080C08 +#define DDRSS_PI_258_DATA 0x00000C08 +#define DDRSS_PI_259_DATA 0x000890B8 +#define DDRSS_PI_260_DATA 0x00000000 +#define DDRSS_PI_261_DATA 0x00000000 +#define DDRSS_PI_262_DATA 0x00000000 +#define DDRSS_PI_263_DATA 0x00000120 +#define DDRSS_PI_264_DATA 0x000890B8 +#define DDRSS_PI_265_DATA 0x00000000 +#define DDRSS_PI_266_DATA 0x00000000 +#define DDRSS_PI_267_DATA 0x00000000 +#define DDRSS_PI_268_DATA 0x00000120 +#define DDRSS_PI_269_DATA 0x000890B8 +#define DDRSS_PI_270_DATA 0x00000000 +#define DDRSS_PI_271_DATA 0x00000000 +#define DDRSS_PI_272_DATA 0x00000000 +#define DDRSS_PI_273_DATA 0x02000120 +#define DDRSS_PI_274_DATA 0x00000080 +#define DDRSS_PI_275_DATA 0x00020000 +#define DDRSS_PI_276_DATA 0x00000080 +#define DDRSS_PI_277_DATA 0x00020000 +#define DDRSS_PI_278_DATA 0x00000080 +#define DDRSS_PI_279_DATA 0x00000000 +#define DDRSS_PI_280_DATA 0x00000000 +#define DDRSS_PI_281_DATA 0x00040404 +#define DDRSS_PI_282_DATA 0x00000000 +#define DDRSS_PI_283_DATA 0x02010102 +#define DDRSS_PI_284_DATA 0x67676767 +#define DDRSS_PI_285_DATA 0x00000202 +#define DDRSS_PI_286_DATA 0x00000000 +#define DDRSS_PI_287_DATA 0x00000000 +#define DDRSS_PI_288_DATA 0x00000000 +#define DDRSS_PI_289_DATA 0x00000000 +#define DDRSS_PI_290_DATA 0x00000000 +#define DDRSS_PI_291_DATA 0x0D100F00 +#define DDRSS_PI_292_DATA 0x0003020E +#define DDRSS_PI_293_DATA 0x00000001 +#define DDRSS_PI_294_DATA 0x01000000 +#define DDRSS_PI_295_DATA 0x00020201 +#define DDRSS_PI_296_DATA 0x00000000 +#define DDRSS_PI_297_DATA 0x00000424 +#define DDRSS_PI_298_DATA 0x00000301 +#define DDRSS_PI_299_DATA 0x00000000 +#define DDRSS_PI_300_DATA 0x00000000 +#define DDRSS_PI_301_DATA 0x00000000 +#define DDRSS_PI_302_DATA 0x00001401 +#define DDRSS_PI_303_DATA 0x00000493 +#define DDRSS_PI_304_DATA 0x00000000 +#define DDRSS_PI_305_DATA 0x00000424 +#define DDRSS_PI_306_DATA 0x00000301 +#define DDRSS_PI_307_DATA 0x00000000 +#define DDRSS_PI_308_DATA 0x00000000 +#define DDRSS_PI_309_DATA 0x00000000 +#define DDRSS_PI_310_DATA 0x00001401 +#define DDRSS_PI_311_DATA 0x00000493 +#define DDRSS_PI_312_DATA 0x00000000 +#define DDRSS_PI_313_DATA 0x00000424 +#define DDRSS_PI_314_DATA 0x00000301 +#define DDRSS_PI_315_DATA 0x00000000 +#define DDRSS_PI_316_DATA 0x00000000 +#define DDRSS_PI_317_DATA 0x00000000 +#define DDRSS_PI_318_DATA 0x00001401 +#define DDRSS_PI_319_DATA 0x00000493 +#define DDRSS_PI_320_DATA 0x00000000 +#define DDRSS_PI_321_DATA 0x00000424 +#define DDRSS_PI_322_DATA 0x00000301 +#define DDRSS_PI_323_DATA 0x00000000 +#define DDRSS_PI_324_DATA 0x00000000 +#define DDRSS_PI_325_DATA 0x00000000 +#define DDRSS_PI_326_DATA 0x00001401 +#define DDRSS_PI_327_DATA 0x00000493 +#define DDRSS_PI_328_DATA 0x00000000 +#define DDRSS_PI_329_DATA 0x00000424 +#define DDRSS_PI_330_DATA 0x00000301 +#define DDRSS_PI_331_DATA 0x00000000 +#define DDRSS_PI_332_DATA 0x00000000 +#define DDRSS_PI_333_DATA 0x00000000 +#define DDRSS_PI_334_DATA 0x00001401 +#define DDRSS_PI_335_DATA 0x00000493 +#define DDRSS_PI_336_DATA 0x00000000 +#define DDRSS_PI_337_DATA 0x00000424 +#define DDRSS_PI_338_DATA 0x00000301 +#define DDRSS_PI_339_DATA 0x00000000 +#define DDRSS_PI_340_DATA 0x00000000 +#define DDRSS_PI_341_DATA 0x00000000 +#define DDRSS_PI_342_DATA 0x00001401 +#define DDRSS_PI_343_DATA 0x00000493 +#define DDRSS_PI_344_DATA 0x00000000 +#define DDRSS_PHY_0_DATA 0x04C00000 +#define DDRSS_PHY_1_DATA 0x00000000 +#define DDRSS_PHY_2_DATA 0x00000200 +#define DDRSS_PHY_3_DATA 0x00000000 +#define DDRSS_PHY_4_DATA 0x00000000 +#define DDRSS_PHY_5_DATA 0x00000000 +#define DDRSS_PHY_6_DATA 0x00000000 +#define DDRSS_PHY_7_DATA 0x00000000 +#define DDRSS_PHY_8_DATA 0x00000001 +#define DDRSS_PHY_9_DATA 0x00000000 +#define DDRSS_PHY_10_DATA 0x00000000 +#define DDRSS_PHY_11_DATA 0x010101FF +#define DDRSS_PHY_12_DATA 0x00010000 +#define DDRSS_PHY_13_DATA 0x00C00004 +#define DDRSS_PHY_14_DATA 0x00CC0008 +#define DDRSS_PHY_15_DATA 0x00660201 +#define DDRSS_PHY_16_DATA 0x00000000 +#define DDRSS_PHY_17_DATA 0x00000000 +#define DDRSS_PHY_18_DATA 0x00000000 +#define DDRSS_PHY_19_DATA 0x0000AAAA +#define DDRSS_PHY_20_DATA 0x00005555 +#define DDRSS_PHY_21_DATA 0x0000B5B5 +#define DDRSS_PHY_22_DATA 0x00004A4A +#define DDRSS_PHY_23_DATA 0x00005656 +#define DDRSS_PHY_24_DATA 0x0000A9A9 +#define DDRSS_PHY_25_DATA 0x0000B7B7 +#define DDRSS_PHY_26_DATA 0x00004848 +#define DDRSS_PHY_27_DATA 0x00000000 +#define DDRSS_PHY_28_DATA 0x00000000 +#define DDRSS_PHY_29_DATA 0x08000000 +#define DDRSS_PHY_30_DATA 0x0F000008 +#define DDRSS_PHY_31_DATA 0x00000F0F +#define DDRSS_PHY_32_DATA 0x00E4E400 +#define DDRSS_PHY_33_DATA 0x00070820 +#define DDRSS_PHY_34_DATA 0x000C0020 +#define DDRSS_PHY_35_DATA 0x00062000 +#define DDRSS_PHY_36_DATA 0x00000000 +#define DDRSS_PHY_37_DATA 0x55555555 +#define DDRSS_PHY_38_DATA 0xAAAAAAAA +#define DDRSS_PHY_39_DATA 0x55555555 +#define DDRSS_PHY_40_DATA 0xAAAAAAAA +#define DDRSS_PHY_41_DATA 0x00005555 +#define DDRSS_PHY_42_DATA 0x01000100 +#define DDRSS_PHY_43_DATA 0x00800180 +#define DDRSS_PHY_44_DATA 0x00000000 +#define DDRSS_PHY_45_DATA 0x00000000 +#define DDRSS_PHY_46_DATA 0x00000000 +#define DDRSS_PHY_47_DATA 0x00000000 +#define DDRSS_PHY_48_DATA 0x00000000 +#define DDRSS_PHY_49_DATA 0x00000000 +#define DDRSS_PHY_50_DATA 0x00000000 +#define DDRSS_PHY_51_DATA 0x00000000 +#define DDRSS_PHY_52_DATA 0x00000000 +#define DDRSS_PHY_53_DATA 0x00000000 +#define DDRSS_PHY_54_DATA 0x00000000 +#define DDRSS_PHY_55_DATA 0x00000000 +#define DDRSS_PHY_56_DATA 0x00000000 +#define DDRSS_PHY_57_DATA 0x00000000 +#define DDRSS_PHY_58_DATA 0x00000000 +#define DDRSS_PHY_59_DATA 0x00000000 +#define DDRSS_PHY_60_DATA 0x00000000 +#define DDRSS_PHY_61_DATA 0x00000000 +#define DDRSS_PHY_62_DATA 0x00000000 +#define DDRSS_PHY_63_DATA 0x00000000 +#define DDRSS_PHY_64_DATA 0x00000000 +#define DDRSS_PHY_65_DATA 0x00000004 +#define DDRSS_PHY_66_DATA 0x00000000 +#define DDRSS_PHY_67_DATA 0x00000000 +#define DDRSS_PHY_68_DATA 0x00000000 +#define DDRSS_PHY_69_DATA 0x00000000 +#define DDRSS_PHY_70_DATA 0x00000000 +#define DDRSS_PHY_71_DATA 0x00000000 +#define DDRSS_PHY_72_DATA 0x041F07FF +#define DDRSS_PHY_73_DATA 0x00000000 +#define DDRSS_PHY_74_DATA 0x01CCB001 +#define DDRSS_PHY_75_DATA 0x2000CCB0 +#define DDRSS_PHY_76_DATA 0x20000140 +#define DDRSS_PHY_77_DATA 0x07FF0200 +#define DDRSS_PHY_78_DATA 0x0000DD01 +#define DDRSS_PHY_79_DATA 0x10100303 +#define DDRSS_PHY_80_DATA 0x10101010 +#define DDRSS_PHY_81_DATA 0x10101010 +#define DDRSS_PHY_82_DATA 0x00021010 +#define DDRSS_PHY_83_DATA 0x00100010 +#define DDRSS_PHY_84_DATA 0x00100010 +#define DDRSS_PHY_85_DATA 0x00100010 +#define DDRSS_PHY_86_DATA 0x00100010 +#define DDRSS_PHY_87_DATA 0x02020010 +#define DDRSS_PHY_88_DATA 0x51515041 +#define DDRSS_PHY_89_DATA 0x31804000 +#define DDRSS_PHY_90_DATA 0x04BF0340 +#define DDRSS_PHY_91_DATA 0x01008080 +#define DDRSS_PHY_92_DATA 0x04050001 +#define DDRSS_PHY_93_DATA 0x00000504 +#define DDRSS_PHY_94_DATA 0x42100010 +#define DDRSS_PHY_95_DATA 0x010C053E +#define DDRSS_PHY_96_DATA 0x000F0C14 +#define DDRSS_PHY_97_DATA 0x01000140 +#define DDRSS_PHY_98_DATA 0x007A0120 +#define DDRSS_PHY_99_DATA 0x00000C00 +#define DDRSS_PHY_100_DATA 0x000001CC +#define DDRSS_PHY_101_DATA 0x20100200 +#define DDRSS_PHY_102_DATA 0x00000005 +#define DDRSS_PHY_103_DATA 0x76543210 +#define DDRSS_PHY_104_DATA 0x00000008 +#define DDRSS_PHY_105_DATA 0x02800280 +#define DDRSS_PHY_106_DATA 0x02800280 +#define DDRSS_PHY_107_DATA 0x02800280 +#define DDRSS_PHY_108_DATA 0x02800280 +#define DDRSS_PHY_109_DATA 0x00000280 +#define DDRSS_PHY_110_DATA 0x00008000 +#define DDRSS_PHY_111_DATA 0x00800080 +#define DDRSS_PHY_112_DATA 0x00800080 +#define DDRSS_PHY_113_DATA 0x00800080 +#define DDRSS_PHY_114_DATA 0x00800080 +#define DDRSS_PHY_115_DATA 0x00800080 +#define DDRSS_PHY_116_DATA 0x00800080 +#define DDRSS_PHY_117_DATA 0x00800080 +#define DDRSS_PHY_118_DATA 0x00800080 +#define DDRSS_PHY_119_DATA 0x01000080 +#define DDRSS_PHY_120_DATA 0x01A00000 +#define DDRSS_PHY_121_DATA 0x00000000 +#define DDRSS_PHY_122_DATA 0x00000000 +#define DDRSS_PHY_123_DATA 0x00080200 +#define DDRSS_PHY_124_DATA 0x00000000 +#define DDRSS_PHY_125_DATA 0x00000000 +#define DDRSS_PHY_126_DATA 0x00000000 +#define DDRSS_PHY_127_DATA 0x00000000 +#define DDRSS_PHY_128_DATA 0x00000000 +#define DDRSS_PHY_129_DATA 0x00000000 +#define DDRSS_PHY_130_DATA 0x00000000 +#define DDRSS_PHY_131_DATA 0x00000000 +#define DDRSS_PHY_132_DATA 0x00000000 +#define DDRSS_PHY_133_DATA 0x00000000 +#define DDRSS_PHY_134_DATA 0x00000000 +#define DDRSS_PHY_135_DATA 0x00000000 +#define DDRSS_PHY_136_DATA 0x00000000 +#define DDRSS_PHY_137_DATA 0x00000000 +#define DDRSS_PHY_138_DATA 0x00000000 +#define DDRSS_PHY_139_DATA 0x00000000 +#define DDRSS_PHY_140_DATA 0x00000000 +#define DDRSS_PHY_141_DATA 0x00000000 +#define DDRSS_PHY_142_DATA 0x00000000 +#define DDRSS_PHY_143_DATA 0x00000000 +#define DDRSS_PHY_144_DATA 0x00000000 +#define DDRSS_PHY_145_DATA 0x00000000 +#define DDRSS_PHY_146_DATA 0x00000000 +#define DDRSS_PHY_147_DATA 0x00000000 +#define DDRSS_PHY_148_DATA 0x00000000 +#define DDRSS_PHY_149_DATA 0x00000000 +#define DDRSS_PHY_150_DATA 0x00000000 +#define DDRSS_PHY_151_DATA 0x00000000 +#define DDRSS_PHY_152_DATA 0x00000000 +#define DDRSS_PHY_153_DATA 0x00000000 +#define DDRSS_PHY_154_DATA 0x00000000 +#define DDRSS_PHY_155_DATA 0x00000000 +#define DDRSS_PHY_156_DATA 0x00000000 +#define DDRSS_PHY_157_DATA 0x00000000 +#define DDRSS_PHY_158_DATA 0x00000000 +#define DDRSS_PHY_159_DATA 0x00000000 +#define DDRSS_PHY_160_DATA 0x00000000 +#define DDRSS_PHY_161_DATA 0x00000000 +#define DDRSS_PHY_162_DATA 0x00000000 +#define DDRSS_PHY_163_DATA 0x00000000 +#define DDRSS_PHY_164_DATA 0x00000000 +#define DDRSS_PHY_165_DATA 0x00000000 +#define DDRSS_PHY_166_DATA 0x00000000 +#define DDRSS_PHY_167_DATA 0x00000000 +#define DDRSS_PHY_168_DATA 0x00000000 +#define DDRSS_PHY_169_DATA 0x00000000 +#define DDRSS_PHY_170_DATA 0x00000000 +#define DDRSS_PHY_171_DATA 0x00000000 +#define DDRSS_PHY_172_DATA 0x00000000 +#define DDRSS_PHY_173_DATA 0x00000000 +#define DDRSS_PHY_174_DATA 0x00000000 +#define DDRSS_PHY_175_DATA 0x00000000 +#define DDRSS_PHY_176_DATA 0x00000000 +#define DDRSS_PHY_177_DATA 0x00000000 +#define DDRSS_PHY_178_DATA 0x00000000 +#define DDRSS_PHY_179_DATA 0x00000000 +#define DDRSS_PHY_180_DATA 0x00000000 +#define DDRSS_PHY_181_DATA 0x00000000 +#define DDRSS_PHY_182_DATA 0x00000000 +#define DDRSS_PHY_183_DATA 0x00000000 +#define DDRSS_PHY_184_DATA 0x00000000 +#define DDRSS_PHY_185_DATA 0x00000000 +#define DDRSS_PHY_186_DATA 0x00000000 +#define DDRSS_PHY_187_DATA 0x00000000 +#define DDRSS_PHY_188_DATA 0x00000000 +#define DDRSS_PHY_189_DATA 0x00000000 +#define DDRSS_PHY_190_DATA 0x00000000 +#define DDRSS_PHY_191_DATA 0x00000000 +#define DDRSS_PHY_192_DATA 0x00000000 +#define DDRSS_PHY_193_DATA 0x00000000 +#define DDRSS_PHY_194_DATA 0x00000000 +#define DDRSS_PHY_195_DATA 0x00000000 +#define DDRSS_PHY_196_DATA 0x00000000 +#define DDRSS_PHY_197_DATA 0x00000000 +#define DDRSS_PHY_198_DATA 0x00000000 +#define DDRSS_PHY_199_DATA 0x00000000 +#define DDRSS_PHY_200_DATA 0x00000000 +#define DDRSS_PHY_201_DATA 0x00000000 +#define DDRSS_PHY_202_DATA 0x00000000 +#define DDRSS_PHY_203_DATA 0x00000000 +#define DDRSS_PHY_204_DATA 0x00000000 +#define DDRSS_PHY_205_DATA 0x00000000 +#define DDRSS_PHY_206_DATA 0x00000000 +#define DDRSS_PHY_207_DATA 0x00000000 +#define DDRSS_PHY_208_DATA 0x00000000 +#define DDRSS_PHY_209_DATA 0x00000000 +#define DDRSS_PHY_210_DATA 0x00000000 +#define DDRSS_PHY_211_DATA 0x00000000 +#define DDRSS_PHY_212_DATA 0x00000000 +#define DDRSS_PHY_213_DATA 0x00000000 +#define DDRSS_PHY_214_DATA 0x00000000 +#define DDRSS_PHY_215_DATA 0x00000000 +#define DDRSS_PHY_216_DATA 0x00000000 +#define DDRSS_PHY_217_DATA 0x00000000 +#define DDRSS_PHY_218_DATA 0x00000000 +#define DDRSS_PHY_219_DATA 0x00000000 +#define DDRSS_PHY_220_DATA 0x00000000 +#define DDRSS_PHY_221_DATA 0x00000000 +#define DDRSS_PHY_222_DATA 0x00000000 +#define DDRSS_PHY_223_DATA 0x00000000 +#define DDRSS_PHY_224_DATA 0x00000000 +#define DDRSS_PHY_225_DATA 0x00000000 +#define DDRSS_PHY_226_DATA 0x00000000 +#define DDRSS_PHY_227_DATA 0x00000000 +#define DDRSS_PHY_228_DATA 0x00000000 +#define DDRSS_PHY_229_DATA 0x00000000 +#define DDRSS_PHY_230_DATA 0x00000000 +#define DDRSS_PHY_231_DATA 0x00000000 +#define DDRSS_PHY_232_DATA 0x00000000 +#define DDRSS_PHY_233_DATA 0x00000000 +#define DDRSS_PHY_234_DATA 0x00000000 +#define DDRSS_PHY_235_DATA 0x00000000 +#define DDRSS_PHY_236_DATA 0x00000000 +#define DDRSS_PHY_237_DATA 0x00000000 +#define DDRSS_PHY_238_DATA 0x00000000 +#define DDRSS_PHY_239_DATA 0x00000000 +#define DDRSS_PHY_240_DATA 0x00000000 +#define DDRSS_PHY_241_DATA 0x00000000 +#define DDRSS_PHY_242_DATA 0x00000000 +#define DDRSS_PHY_243_DATA 0x00000000 +#define DDRSS_PHY_244_DATA 0x00000000 +#define DDRSS_PHY_245_DATA 0x00000000 +#define DDRSS_PHY_246_DATA 0x00000000 +#define DDRSS_PHY_247_DATA 0x00000000 +#define DDRSS_PHY_248_DATA 0x00000000 +#define DDRSS_PHY_249_DATA 0x00000000 +#define DDRSS_PHY_250_DATA 0x00000000 +#define DDRSS_PHY_251_DATA 0x00000000 +#define DDRSS_PHY_252_DATA 0x00000000 +#define DDRSS_PHY_253_DATA 0x00000000 +#define DDRSS_PHY_254_DATA 0x00000000 +#define DDRSS_PHY_255_DATA 0x00000000 +#define DDRSS_PHY_256_DATA 0x04C00000 +#define DDRSS_PHY_257_DATA 0x00000000 +#define DDRSS_PHY_258_DATA 0x00000200 +#define DDRSS_PHY_259_DATA 0x00000000 +#define DDRSS_PHY_260_DATA 0x00000000 +#define DDRSS_PHY_261_DATA 0x00000000 +#define DDRSS_PHY_262_DATA 0x00000000 +#define DDRSS_PHY_263_DATA 0x00000000 +#define DDRSS_PHY_264_DATA 0x00000001 +#define DDRSS_PHY_265_DATA 0x00000000 +#define DDRSS_PHY_266_DATA 0x00000000 +#define DDRSS_PHY_267_DATA 0x010101FF +#define DDRSS_PHY_268_DATA 0x00010000 +#define DDRSS_PHY_269_DATA 0x00C00004 +#define DDRSS_PHY_270_DATA 0x00CC0008 +#define DDRSS_PHY_271_DATA 0x00660201 +#define DDRSS_PHY_272_DATA 0x00000000 +#define DDRSS_PHY_273_DATA 0x00000000 +#define DDRSS_PHY_274_DATA 0x00000000 +#define DDRSS_PHY_275_DATA 0x0000AAAA +#define DDRSS_PHY_276_DATA 0x00005555 +#define DDRSS_PHY_277_DATA 0x0000B5B5 +#define DDRSS_PHY_278_DATA 0x00004A4A +#define DDRSS_PHY_279_DATA 0x00005656 +#define DDRSS_PHY_280_DATA 0x0000A9A9 +#define DDRSS_PHY_281_DATA 0x0000B7B7 +#define DDRSS_PHY_282_DATA 0x00004848 +#define DDRSS_PHY_283_DATA 0x00000000 +#define DDRSS_PHY_284_DATA 0x00000000 +#define DDRSS_PHY_285_DATA 0x08000000 +#define DDRSS_PHY_286_DATA 0x0F000008 +#define DDRSS_PHY_287_DATA 0x00000F0F +#define DDRSS_PHY_288_DATA 0x00E4E400 +#define DDRSS_PHY_289_DATA 0x00070820 +#define DDRSS_PHY_290_DATA 0x000C0020 +#define DDRSS_PHY_291_DATA 0x00062000 +#define DDRSS_PHY_292_DATA 0x00000000 +#define DDRSS_PHY_293_DATA 0x55555555 +#define DDRSS_PHY_294_DATA 0xAAAAAAAA +#define DDRSS_PHY_295_DATA 0x55555555 +#define DDRSS_PHY_296_DATA 0xAAAAAAAA +#define DDRSS_PHY_297_DATA 0x00005555 +#define DDRSS_PHY_298_DATA 0x01000100 +#define DDRSS_PHY_299_DATA 0x00800180 +#define DDRSS_PHY_300_DATA 0x00000000 +#define DDRSS_PHY_301_DATA 0x00000000 +#define DDRSS_PHY_302_DATA 0x00000000 +#define DDRSS_PHY_303_DATA 0x00000000 +#define DDRSS_PHY_304_DATA 0x00000000 +#define DDRSS_PHY_305_DATA 0x00000000 +#define DDRSS_PHY_306_DATA 0x00000000 +#define DDRSS_PHY_307_DATA 0x00000000 +#define DDRSS_PHY_308_DATA 0x00000000 +#define DDRSS_PHY_309_DATA 0x00000000 +#define DDRSS_PHY_310_DATA 0x00000000 +#define DDRSS_PHY_311_DATA 0x00000000 +#define DDRSS_PHY_312_DATA 0x00000000 +#define DDRSS_PHY_313_DATA 0x00000000 +#define DDRSS_PHY_314_DATA 0x00000000 +#define DDRSS_PHY_315_DATA 0x00000000 +#define DDRSS_PHY_316_DATA 0x00000000 +#define DDRSS_PHY_317_DATA 0x00000000 +#define DDRSS_PHY_318_DATA 0x00000000 +#define DDRSS_PHY_319_DATA 0x00000000 +#define DDRSS_PHY_320_DATA 0x00000000 +#define DDRSS_PHY_321_DATA 0x00000004 +#define DDRSS_PHY_322_DATA 0x00000000 +#define DDRSS_PHY_323_DATA 0x00000000 +#define DDRSS_PHY_324_DATA 0x00000000 +#define DDRSS_PHY_325_DATA 0x00000000 +#define DDRSS_PHY_326_DATA 0x00000000 +#define DDRSS_PHY_327_DATA 0x00000000 +#define DDRSS_PHY_328_DATA 0x041F07FF +#define DDRSS_PHY_329_DATA 0x00000000 +#define DDRSS_PHY_330_DATA 0x01CCB001 +#define DDRSS_PHY_331_DATA 0x2000CCB0 +#define DDRSS_PHY_332_DATA 0x20000140 +#define DDRSS_PHY_333_DATA 0x07FF0200 +#define DDRSS_PHY_334_DATA 0x0000DD01 +#define DDRSS_PHY_335_DATA 0x10100303 +#define DDRSS_PHY_336_DATA 0x10101010 +#define DDRSS_PHY_337_DATA 0x10101010 +#define DDRSS_PHY_338_DATA 0x00021010 +#define DDRSS_PHY_339_DATA 0x00100010 +#define DDRSS_PHY_340_DATA 0x00100010 +#define DDRSS_PHY_341_DATA 0x00100010 +#define DDRSS_PHY_342_DATA 0x00100010 +#define DDRSS_PHY_343_DATA 0x02020010 +#define DDRSS_PHY_344_DATA 0x51515041 +#define DDRSS_PHY_345_DATA 0x31804000 +#define DDRSS_PHY_346_DATA 0x04BF0340 +#define DDRSS_PHY_347_DATA 0x01008080 +#define DDRSS_PHY_348_DATA 0x04050001 +#define DDRSS_PHY_349_DATA 0x00000504 +#define DDRSS_PHY_350_DATA 0x42100010 +#define DDRSS_PHY_351_DATA 0x010C053E +#define DDRSS_PHY_352_DATA 0x000F0C14 +#define DDRSS_PHY_353_DATA 0x01000140 +#define DDRSS_PHY_354_DATA 0x007A0120 +#define DDRSS_PHY_355_DATA 0x00000C00 +#define DDRSS_PHY_356_DATA 0x000001CC +#define DDRSS_PHY_357_DATA 0x20100200 +#define DDRSS_PHY_358_DATA 0x00000005 +#define DDRSS_PHY_359_DATA 0x76543210 +#define DDRSS_PHY_360_DATA 0x00000008 +#define DDRSS_PHY_361_DATA 0x02800280 +#define DDRSS_PHY_362_DATA 0x02800280 +#define DDRSS_PHY_363_DATA 0x02800280 +#define DDRSS_PHY_364_DATA 0x02800280 +#define DDRSS_PHY_365_DATA 0x00000280 +#define DDRSS_PHY_366_DATA 0x00008000 +#define DDRSS_PHY_367_DATA 0x00800080 +#define DDRSS_PHY_368_DATA 0x00800080 +#define DDRSS_PHY_369_DATA 0x00800080 +#define DDRSS_PHY_370_DATA 0x00800080 +#define DDRSS_PHY_371_DATA 0x00800080 +#define DDRSS_PHY_372_DATA 0x00800080 +#define DDRSS_PHY_373_DATA 0x00800080 +#define DDRSS_PHY_374_DATA 0x00800080 +#define DDRSS_PHY_375_DATA 0x01000080 +#define DDRSS_PHY_376_DATA 0x01A00000 +#define DDRSS_PHY_377_DATA 0x00000000 +#define DDRSS_PHY_378_DATA 0x00000000 +#define DDRSS_PHY_379_DATA 0x00080200 +#define DDRSS_PHY_380_DATA 0x00000000 +#define DDRSS_PHY_381_DATA 0x00000000 +#define DDRSS_PHY_382_DATA 0x00000000 +#define DDRSS_PHY_383_DATA 0x00000000 +#define DDRSS_PHY_384_DATA 0x00000000 +#define DDRSS_PHY_385_DATA 0x00000000 +#define DDRSS_PHY_386_DATA 0x00000000 +#define DDRSS_PHY_387_DATA 0x00000000 +#define DDRSS_PHY_388_DATA 0x00000000 +#define DDRSS_PHY_389_DATA 0x00000000 +#define DDRSS_PHY_390_DATA 0x00000000 +#define DDRSS_PHY_391_DATA 0x00000000 +#define DDRSS_PHY_392_DATA 0x00000000 +#define DDRSS_PHY_393_DATA 0x00000000 +#define DDRSS_PHY_394_DATA 0x00000000 +#define DDRSS_PHY_395_DATA 0x00000000 +#define DDRSS_PHY_396_DATA 0x00000000 +#define DDRSS_PHY_397_DATA 0x00000000 +#define DDRSS_PHY_398_DATA 0x00000000 +#define DDRSS_PHY_399_DATA 0x00000000 +#define DDRSS_PHY_400_DATA 0x00000000 +#define DDRSS_PHY_401_DATA 0x00000000 +#define DDRSS_PHY_402_DATA 0x00000000 +#define DDRSS_PHY_403_DATA 0x00000000 +#define DDRSS_PHY_404_DATA 0x00000000 +#define DDRSS_PHY_405_DATA 0x00000000 +#define DDRSS_PHY_406_DATA 0x00000000 +#define DDRSS_PHY_407_DATA 0x00000000 +#define DDRSS_PHY_408_DATA 0x00000000 +#define DDRSS_PHY_409_DATA 0x00000000 +#define DDRSS_PHY_410_DATA 0x00000000 +#define DDRSS_PHY_411_DATA 0x00000000 +#define DDRSS_PHY_412_DATA 0x00000000 +#define DDRSS_PHY_413_DATA 0x00000000 +#define DDRSS_PHY_414_DATA 0x00000000 +#define DDRSS_PHY_415_DATA 0x00000000 +#define DDRSS_PHY_416_DATA 0x00000000 +#define DDRSS_PHY_417_DATA 0x00000000 +#define DDRSS_PHY_418_DATA 0x00000000 +#define DDRSS_PHY_419_DATA 0x00000000 +#define DDRSS_PHY_420_DATA 0x00000000 +#define DDRSS_PHY_421_DATA 0x00000000 +#define DDRSS_PHY_422_DATA 0x00000000 +#define DDRSS_PHY_423_DATA 0x00000000 +#define DDRSS_PHY_424_DATA 0x00000000 +#define DDRSS_PHY_425_DATA 0x00000000 +#define DDRSS_PHY_426_DATA 0x00000000 +#define DDRSS_PHY_427_DATA 0x00000000 +#define DDRSS_PHY_428_DATA 0x00000000 +#define DDRSS_PHY_429_DATA 0x00000000 +#define DDRSS_PHY_430_DATA 0x00000000 +#define DDRSS_PHY_431_DATA 0x00000000 +#define DDRSS_PHY_432_DATA 0x00000000 +#define DDRSS_PHY_433_DATA 0x00000000 +#define DDRSS_PHY_434_DATA 0x00000000 +#define DDRSS_PHY_435_DATA 0x00000000 +#define DDRSS_PHY_436_DATA 0x00000000 +#define DDRSS_PHY_437_DATA 0x00000000 +#define DDRSS_PHY_438_DATA 0x00000000 +#define DDRSS_PHY_439_DATA 0x00000000 +#define DDRSS_PHY_440_DATA 0x00000000 +#define DDRSS_PHY_441_DATA 0x00000000 +#define DDRSS_PHY_442_DATA 0x00000000 +#define DDRSS_PHY_443_DATA 0x00000000 +#define DDRSS_PHY_444_DATA 0x00000000 +#define DDRSS_PHY_445_DATA 0x00000000 +#define DDRSS_PHY_446_DATA 0x00000000 +#define DDRSS_PHY_447_DATA 0x00000000 +#define DDRSS_PHY_448_DATA 0x00000000 +#define DDRSS_PHY_449_DATA 0x00000000 +#define DDRSS_PHY_450_DATA 0x00000000 +#define DDRSS_PHY_451_DATA 0x00000000 +#define DDRSS_PHY_452_DATA 0x00000000 +#define DDRSS_PHY_453_DATA 0x00000000 +#define DDRSS_PHY_454_DATA 0x00000000 +#define DDRSS_PHY_455_DATA 0x00000000 +#define DDRSS_PHY_456_DATA 0x00000000 +#define DDRSS_PHY_457_DATA 0x00000000 +#define DDRSS_PHY_458_DATA 0x00000000 +#define DDRSS_PHY_459_DATA 0x00000000 +#define DDRSS_PHY_460_DATA 0x00000000 +#define DDRSS_PHY_461_DATA 0x00000000 +#define DDRSS_PHY_462_DATA 0x00000000 +#define DDRSS_PHY_463_DATA 0x00000000 +#define DDRSS_PHY_464_DATA 0x00000000 +#define DDRSS_PHY_465_DATA 0x00000000 +#define DDRSS_PHY_466_DATA 0x00000000 +#define DDRSS_PHY_467_DATA 0x00000000 +#define DDRSS_PHY_468_DATA 0x00000000 +#define DDRSS_PHY_469_DATA 0x00000000 +#define DDRSS_PHY_470_DATA 0x00000000 +#define DDRSS_PHY_471_DATA 0x00000000 +#define DDRSS_PHY_472_DATA 0x00000000 +#define DDRSS_PHY_473_DATA 0x00000000 +#define DDRSS_PHY_474_DATA 0x00000000 +#define DDRSS_PHY_475_DATA 0x00000000 +#define DDRSS_PHY_476_DATA 0x00000000 +#define DDRSS_PHY_477_DATA 0x00000000 +#define DDRSS_PHY_478_DATA 0x00000000 +#define DDRSS_PHY_479_DATA 0x00000000 +#define DDRSS_PHY_480_DATA 0x00000000 +#define DDRSS_PHY_481_DATA 0x00000000 +#define DDRSS_PHY_482_DATA 0x00000000 +#define DDRSS_PHY_483_DATA 0x00000000 +#define DDRSS_PHY_484_DATA 0x00000000 +#define DDRSS_PHY_485_DATA 0x00000000 +#define DDRSS_PHY_486_DATA 0x00000000 +#define DDRSS_PHY_487_DATA 0x00000000 +#define DDRSS_PHY_488_DATA 0x00000000 +#define DDRSS_PHY_489_DATA 0x00000000 +#define DDRSS_PHY_490_DATA 0x00000000 +#define DDRSS_PHY_491_DATA 0x00000000 +#define DDRSS_PHY_492_DATA 0x00000000 +#define DDRSS_PHY_493_DATA 0x00000000 +#define DDRSS_PHY_494_DATA 0x00000000 +#define DDRSS_PHY_495_DATA 0x00000000 +#define DDRSS_PHY_496_DATA 0x00000000 +#define DDRSS_PHY_497_DATA 0x00000000 +#define DDRSS_PHY_498_DATA 0x00000000 +#define DDRSS_PHY_499_DATA 0x00000000 +#define DDRSS_PHY_500_DATA 0x00000000 +#define DDRSS_PHY_501_DATA 0x00000000 +#define DDRSS_PHY_502_DATA 0x00000000 +#define DDRSS_PHY_503_DATA 0x00000000 +#define DDRSS_PHY_504_DATA 0x00000000 +#define DDRSS_PHY_505_DATA 0x00000000 +#define DDRSS_PHY_506_DATA 0x00000000 +#define DDRSS_PHY_507_DATA 0x00000000 +#define DDRSS_PHY_508_DATA 0x00000000 +#define DDRSS_PHY_509_DATA 0x00000000 +#define DDRSS_PHY_510_DATA 0x00000000 +#define DDRSS_PHY_511_DATA 0x00000000 +#define DDRSS_PHY_512_DATA 0x00000100 +#define DDRSS_PHY_513_DATA 0x00000000 +#define DDRSS_PHY_514_DATA 0x00000000 +#define DDRSS_PHY_515_DATA 0x00000000 +#define DDRSS_PHY_516_DATA 0x00000000 +#define DDRSS_PHY_517_DATA 0x00000100 +#define DDRSS_PHY_518_DATA 0x00000000 +#define DDRSS_PHY_519_DATA 0x00000000 +#define DDRSS_PHY_520_DATA 0x00000000 +#define DDRSS_PHY_521_DATA 0x00000000 +#define DDRSS_PHY_522_DATA 0x00000000 +#define DDRSS_PHY_523_DATA 0x00000000 +#define DDRSS_PHY_524_DATA 0x00000000 +#define DDRSS_PHY_525_DATA 0x00DCBA98 +#define DDRSS_PHY_526_DATA 0x00000000 +#define DDRSS_PHY_527_DATA 0x00000000 +#define DDRSS_PHY_528_DATA 0x00000000 +#define DDRSS_PHY_529_DATA 0x00000000 +#define DDRSS_PHY_530_DATA 0x00000000 +#define DDRSS_PHY_531_DATA 0x00000000 +#define DDRSS_PHY_532_DATA 0x00000000 +#define DDRSS_PHY_533_DATA 0x00000000 +#define DDRSS_PHY_534_DATA 0x00000000 +#define DDRSS_PHY_535_DATA 0x00000000 +#define DDRSS_PHY_536_DATA 0x00000000 +#define DDRSS_PHY_537_DATA 0x00000000 +#define DDRSS_PHY_538_DATA 0x00000000 +#define DDRSS_PHY_539_DATA 0x00000000 +#define DDRSS_PHY_540_DATA 0x0A418820 +#define DDRSS_PHY_541_DATA 0x103F0000 +#define DDRSS_PHY_542_DATA 0x000F0100 +#define DDRSS_PHY_543_DATA 0x0000000F +#define DDRSS_PHY_544_DATA 0x020002CC +#define DDRSS_PHY_545_DATA 0x00030000 +#define DDRSS_PHY_546_DATA 0x00000300 +#define DDRSS_PHY_547_DATA 0x00000300 +#define DDRSS_PHY_548_DATA 0x00000300 +#define DDRSS_PHY_549_DATA 0x00000300 +#define DDRSS_PHY_550_DATA 0x00000300 +#define DDRSS_PHY_551_DATA 0x42080010 +#define DDRSS_PHY_552_DATA 0x0000003E +#define DDRSS_PHY_553_DATA 0x00000000 +#define DDRSS_PHY_554_DATA 0x00000000 +#define DDRSS_PHY_555_DATA 0x00000000 +#define DDRSS_PHY_556_DATA 0x00000000 +#define DDRSS_PHY_557_DATA 0x00000000 +#define DDRSS_PHY_558_DATA 0x00000000 +#define DDRSS_PHY_559_DATA 0x00000000 +#define DDRSS_PHY_560_DATA 0x00000000 +#define DDRSS_PHY_561_DATA 0x00000000 +#define DDRSS_PHY_562_DATA 0x00000000 +#define DDRSS_PHY_563_DATA 0x00000000 +#define DDRSS_PHY_564_DATA 0x00000000 +#define DDRSS_PHY_565_DATA 0x00000000 +#define DDRSS_PHY_566_DATA 0x00000000 +#define DDRSS_PHY_567_DATA 0x00000000 +#define DDRSS_PHY_568_DATA 0x00000000 +#define DDRSS_PHY_569_DATA 0x00000000 +#define DDRSS_PHY_570_DATA 0x00000000 +#define DDRSS_PHY_571_DATA 0x00000000 +#define DDRSS_PHY_572_DATA 0x00000000 +#define DDRSS_PHY_573_DATA 0x00000000 +#define DDRSS_PHY_574_DATA 0x00000000 +#define DDRSS_PHY_575_DATA 0x00000000 +#define DDRSS_PHY_576_DATA 0x00000000 +#define DDRSS_PHY_577_DATA 0x00000000 +#define DDRSS_PHY_578_DATA 0x00000000 +#define DDRSS_PHY_579_DATA 0x00000000 +#define DDRSS_PHY_580_DATA 0x00000000 +#define DDRSS_PHY_581_DATA 0x00000000 +#define DDRSS_PHY_582_DATA 0x00000000 +#define DDRSS_PHY_583_DATA 0x00000000 +#define DDRSS_PHY_584_DATA 0x00000000 +#define DDRSS_PHY_585_DATA 0x00000000 +#define DDRSS_PHY_586_DATA 0x00000000 +#define DDRSS_PHY_587_DATA 0x00000000 +#define DDRSS_PHY_588_DATA 0x00000000 +#define DDRSS_PHY_589_DATA 0x00000000 +#define DDRSS_PHY_590_DATA 0x00000000 +#define DDRSS_PHY_591_DATA 0x00000000 +#define DDRSS_PHY_592_DATA 0x00000000 +#define DDRSS_PHY_593_DATA 0x00000000 +#define DDRSS_PHY_594_DATA 0x00000000 +#define DDRSS_PHY_595_DATA 0x00000000 +#define DDRSS_PHY_596_DATA 0x00000000 +#define DDRSS_PHY_597_DATA 0x00000000 +#define DDRSS_PHY_598_DATA 0x00000000 +#define DDRSS_PHY_599_DATA 0x00000000 +#define DDRSS_PHY_600_DATA 0x00000000 +#define DDRSS_PHY_601_DATA 0x00000000 +#define DDRSS_PHY_602_DATA 0x00000000 +#define DDRSS_PHY_603_DATA 0x00000000 +#define DDRSS_PHY_604_DATA 0x00000000 +#define DDRSS_PHY_605_DATA 0x00000000 +#define DDRSS_PHY_606_DATA 0x00000000 +#define DDRSS_PHY_607_DATA 0x00000000 +#define DDRSS_PHY_608_DATA 0x00000000 +#define DDRSS_PHY_609_DATA 0x00000000 +#define DDRSS_PHY_610_DATA 0x00000000 +#define DDRSS_PHY_611_DATA 0x00000000 +#define DDRSS_PHY_612_DATA 0x00000000 +#define DDRSS_PHY_613_DATA 0x00000000 +#define DDRSS_PHY_614_DATA 0x00000000 +#define DDRSS_PHY_615_DATA 0x00000000 +#define DDRSS_PHY_616_DATA 0x00000000 +#define DDRSS_PHY_617_DATA 0x00000000 +#define DDRSS_PHY_618_DATA 0x00000000 +#define DDRSS_PHY_619_DATA 0x00000000 +#define DDRSS_PHY_620_DATA 0x00000000 +#define DDRSS_PHY_621_DATA 0x00000000 +#define DDRSS_PHY_622_DATA 0x00000000 +#define DDRSS_PHY_623_DATA 0x00000000 +#define DDRSS_PHY_624_DATA 0x00000000 +#define DDRSS_PHY_625_DATA 0x00000000 +#define DDRSS_PHY_626_DATA 0x00000000 +#define DDRSS_PHY_627_DATA 0x00000000 +#define DDRSS_PHY_628_DATA 0x00000000 +#define DDRSS_PHY_629_DATA 0x00000000 +#define DDRSS_PHY_630_DATA 0x00000000 +#define DDRSS_PHY_631_DATA 0x00000000 +#define DDRSS_PHY_632_DATA 0x00000000 +#define DDRSS_PHY_633_DATA 0x00000000 +#define DDRSS_PHY_634_DATA 0x00000000 +#define DDRSS_PHY_635_DATA 0x00000000 +#define DDRSS_PHY_636_DATA 0x00000000 +#define DDRSS_PHY_637_DATA 0x00000000 +#define DDRSS_PHY_638_DATA 0x00000000 +#define DDRSS_PHY_639_DATA 0x00000000 +#define DDRSS_PHY_640_DATA 0x00000000 +#define DDRSS_PHY_641_DATA 0x00000000 +#define DDRSS_PHY_642_DATA 0x00000000 +#define DDRSS_PHY_643_DATA 0x00000000 +#define DDRSS_PHY_644_DATA 0x00000000 +#define DDRSS_PHY_645_DATA 0x00000000 +#define DDRSS_PHY_646_DATA 0x00000000 +#define DDRSS_PHY_647_DATA 0x00000000 +#define DDRSS_PHY_648_DATA 0x00000000 +#define DDRSS_PHY_649_DATA 0x00000000 +#define DDRSS_PHY_650_DATA 0x00000000 +#define DDRSS_PHY_651_DATA 0x00000000 +#define DDRSS_PHY_652_DATA 0x00000000 +#define DDRSS_PHY_653_DATA 0x00000000 +#define DDRSS_PHY_654_DATA 0x00000000 +#define DDRSS_PHY_655_DATA 0x00000000 +#define DDRSS_PHY_656_DATA 0x00000000 +#define DDRSS_PHY_657_DATA 0x00000000 +#define DDRSS_PHY_658_DATA 0x00000000 +#define DDRSS_PHY_659_DATA 0x00000000 +#define DDRSS_PHY_660_DATA 0x00000000 +#define DDRSS_PHY_661_DATA 0x00000000 +#define DDRSS_PHY_662_DATA 0x00000000 +#define DDRSS_PHY_663_DATA 0x00000000 +#define DDRSS_PHY_664_DATA 0x00000000 +#define DDRSS_PHY_665_DATA 0x00000000 +#define DDRSS_PHY_666_DATA 0x00000000 +#define DDRSS_PHY_667_DATA 0x00000000 +#define DDRSS_PHY_668_DATA 0x00000000 +#define DDRSS_PHY_669_DATA 0x00000000 +#define DDRSS_PHY_670_DATA 0x00000000 +#define DDRSS_PHY_671_DATA 0x00000000 +#define DDRSS_PHY_672_DATA 0x00000000 +#define DDRSS_PHY_673_DATA 0x00000000 +#define DDRSS_PHY_674_DATA 0x00000000 +#define DDRSS_PHY_675_DATA 0x00000000 +#define DDRSS_PHY_676_DATA 0x00000000 +#define DDRSS_PHY_677_DATA 0x00000000 +#define DDRSS_PHY_678_DATA 0x00000000 +#define DDRSS_PHY_679_DATA 0x00000000 +#define DDRSS_PHY_680_DATA 0x00000000 +#define DDRSS_PHY_681_DATA 0x00000000 +#define DDRSS_PHY_682_DATA 0x00000000 +#define DDRSS_PHY_683_DATA 0x00000000 +#define DDRSS_PHY_684_DATA 0x00000000 +#define DDRSS_PHY_685_DATA 0x00000000 +#define DDRSS_PHY_686_DATA 0x00000000 +#define DDRSS_PHY_687_DATA 0x00000000 +#define DDRSS_PHY_688_DATA 0x00000000 +#define DDRSS_PHY_689_DATA 0x00000000 +#define DDRSS_PHY_690_DATA 0x00000000 +#define DDRSS_PHY_691_DATA 0x00000000 +#define DDRSS_PHY_692_DATA 0x00000000 +#define DDRSS_PHY_693_DATA 0x00000000 +#define DDRSS_PHY_694_DATA 0x00000000 +#define DDRSS_PHY_695_DATA 0x00000000 +#define DDRSS_PHY_696_DATA 0x00000000 +#define DDRSS_PHY_697_DATA 0x00000000 +#define DDRSS_PHY_698_DATA 0x00000000 +#define DDRSS_PHY_699_DATA 0x00000000 +#define DDRSS_PHY_700_DATA 0x00000000 +#define DDRSS_PHY_701_DATA 0x00000000 +#define DDRSS_PHY_702_DATA 0x00000000 +#define DDRSS_PHY_703_DATA 0x00000000 +#define DDRSS_PHY_704_DATA 0x00000000 +#define DDRSS_PHY_705_DATA 0x00000000 +#define DDRSS_PHY_706_DATA 0x00000000 +#define DDRSS_PHY_707_DATA 0x00000000 +#define DDRSS_PHY_708_DATA 0x00000000 +#define DDRSS_PHY_709_DATA 0x00000000 +#define DDRSS_PHY_710_DATA 0x00000000 +#define DDRSS_PHY_711_DATA 0x00000000 +#define DDRSS_PHY_712_DATA 0x00000000 +#define DDRSS_PHY_713_DATA 0x00000000 +#define DDRSS_PHY_714_DATA 0x00000000 +#define DDRSS_PHY_715_DATA 0x00000000 +#define DDRSS_PHY_716_DATA 0x00000000 +#define DDRSS_PHY_717_DATA 0x00000000 +#define DDRSS_PHY_718_DATA 0x00000000 +#define DDRSS_PHY_719_DATA 0x00000000 +#define DDRSS_PHY_720_DATA 0x00000000 +#define DDRSS_PHY_721_DATA 0x00000000 +#define DDRSS_PHY_722_DATA 0x00000000 +#define DDRSS_PHY_723_DATA 0x00000000 +#define DDRSS_PHY_724_DATA 0x00000000 +#define DDRSS_PHY_725_DATA 0x00000000 +#define DDRSS_PHY_726_DATA 0x00000000 +#define DDRSS_PHY_727_DATA 0x00000000 +#define DDRSS_PHY_728_DATA 0x00000000 +#define DDRSS_PHY_729_DATA 0x00000000 +#define DDRSS_PHY_730_DATA 0x00000000 +#define DDRSS_PHY_731_DATA 0x00000000 +#define DDRSS_PHY_732_DATA 0x00000000 +#define DDRSS_PHY_733_DATA 0x00000000 +#define DDRSS_PHY_734_DATA 0x00000000 +#define DDRSS_PHY_735_DATA 0x00000000 +#define DDRSS_PHY_736_DATA 0x00000000 +#define DDRSS_PHY_737_DATA 0x00000000 +#define DDRSS_PHY_738_DATA 0x00000000 +#define DDRSS_PHY_739_DATA 0x00000000 +#define DDRSS_PHY_740_DATA 0x00000000 +#define DDRSS_PHY_741_DATA 0x00000000 +#define DDRSS_PHY_742_DATA 0x00000000 +#define DDRSS_PHY_743_DATA 0x00000000 +#define DDRSS_PHY_744_DATA 0x00000000 +#define DDRSS_PHY_745_DATA 0x00000000 +#define DDRSS_PHY_746_DATA 0x00000000 +#define DDRSS_PHY_747_DATA 0x00000000 +#define DDRSS_PHY_748_DATA 0x00000000 +#define DDRSS_PHY_749_DATA 0x00000000 +#define DDRSS_PHY_750_DATA 0x00000000 +#define DDRSS_PHY_751_DATA 0x00000000 +#define DDRSS_PHY_752_DATA 0x00000000 +#define DDRSS_PHY_753_DATA 0x00000000 +#define DDRSS_PHY_754_DATA 0x00000000 +#define DDRSS_PHY_755_DATA 0x00000000 +#define DDRSS_PHY_756_DATA 0x00000000 +#define DDRSS_PHY_757_DATA 0x00000000 +#define DDRSS_PHY_758_DATA 0x00000000 +#define DDRSS_PHY_759_DATA 0x00000000 +#define DDRSS_PHY_760_DATA 0x00000000 +#define DDRSS_PHY_761_DATA 0x00000000 +#define DDRSS_PHY_762_DATA 0x00000000 +#define DDRSS_PHY_763_DATA 0x00000000 +#define DDRSS_PHY_764_DATA 0x00000000 +#define DDRSS_PHY_765_DATA 0x00000000 +#define DDRSS_PHY_766_DATA 0x00000000 +#define DDRSS_PHY_767_DATA 0x00000000 +#define DDRSS_PHY_768_DATA 0x00000100 +#define DDRSS_PHY_769_DATA 0x00000000 +#define DDRSS_PHY_770_DATA 0x00000000 +#define DDRSS_PHY_771_DATA 0x00000000 +#define DDRSS_PHY_772_DATA 0x00000000 +#define DDRSS_PHY_773_DATA 0x00000100 +#define DDRSS_PHY_774_DATA 0x00000000 +#define DDRSS_PHY_775_DATA 0x00000000 +#define DDRSS_PHY_776_DATA 0x00000000 +#define DDRSS_PHY_777_DATA 0x00000000 +#define DDRSS_PHY_778_DATA 0x00000000 +#define DDRSS_PHY_779_DATA 0x00000000 +#define DDRSS_PHY_780_DATA 0x00000000 +#define DDRSS_PHY_781_DATA 0x00DCBA98 +#define DDRSS_PHY_782_DATA 0x00000000 +#define DDRSS_PHY_783_DATA 0x00000000 +#define DDRSS_PHY_784_DATA 0x00000000 +#define DDRSS_PHY_785_DATA 0x00000000 +#define DDRSS_PHY_786_DATA 0x00000000 +#define DDRSS_PHY_787_DATA 0x00000000 +#define DDRSS_PHY_788_DATA 0x00000000 +#define DDRSS_PHY_789_DATA 0x00000000 +#define DDRSS_PHY_790_DATA 0x00000000 +#define DDRSS_PHY_791_DATA 0x00000000 +#define DDRSS_PHY_792_DATA 0x00000000 +#define DDRSS_PHY_793_DATA 0x00000000 +#define DDRSS_PHY_794_DATA 0x00000000 +#define DDRSS_PHY_795_DATA 0x00000000 +#define DDRSS_PHY_796_DATA 0x16A4A0E6 +#define DDRSS_PHY_797_DATA 0x103F0000 +#define DDRSS_PHY_798_DATA 0x000F0000 +#define DDRSS_PHY_799_DATA 0x0000000F +#define DDRSS_PHY_800_DATA 0x020002CC +#define DDRSS_PHY_801_DATA 0x00030000 +#define DDRSS_PHY_802_DATA 0x00000300 +#define DDRSS_PHY_803_DATA 0x00000300 +#define DDRSS_PHY_804_DATA 0x00000300 +#define DDRSS_PHY_805_DATA 0x00000300 +#define DDRSS_PHY_806_DATA 0x00000300 +#define DDRSS_PHY_807_DATA 0x42080010 +#define DDRSS_PHY_808_DATA 0x0000003E +#define DDRSS_PHY_809_DATA 0x00000000 +#define DDRSS_PHY_810_DATA 0x00000000 +#define DDRSS_PHY_811_DATA 0x00000000 +#define DDRSS_PHY_812_DATA 0x00000000 +#define DDRSS_PHY_813_DATA 0x00000000 +#define DDRSS_PHY_814_DATA 0x00000000 +#define DDRSS_PHY_815_DATA 0x00000000 +#define DDRSS_PHY_816_DATA 0x00000000 +#define DDRSS_PHY_817_DATA 0x00000000 +#define DDRSS_PHY_818_DATA 0x00000000 +#define DDRSS_PHY_819_DATA 0x00000000 +#define DDRSS_PHY_820_DATA 0x00000000 +#define DDRSS_PHY_821_DATA 0x00000000 +#define DDRSS_PHY_822_DATA 0x00000000 +#define DDRSS_PHY_823_DATA 0x00000000 +#define DDRSS_PHY_824_DATA 0x00000000 +#define DDRSS_PHY_825_DATA 0x00000000 +#define DDRSS_PHY_826_DATA 0x00000000 +#define DDRSS_PHY_827_DATA 0x00000000 +#define DDRSS_PHY_828_DATA 0x00000000 +#define DDRSS_PHY_829_DATA 0x00000000 +#define DDRSS_PHY_830_DATA 0x00000000 +#define DDRSS_PHY_831_DATA 0x00000000 +#define DDRSS_PHY_832_DATA 0x00000000 +#define DDRSS_PHY_833_DATA 0x00000000 +#define DDRSS_PHY_834_DATA 0x00000000 +#define DDRSS_PHY_835_DATA 0x00000000 +#define DDRSS_PHY_836_DATA 0x00000000 +#define DDRSS_PHY_837_DATA 0x00000000 +#define DDRSS_PHY_838_DATA 0x00000000 +#define DDRSS_PHY_839_DATA 0x00000000 +#define DDRSS_PHY_840_DATA 0x00000000 +#define DDRSS_PHY_841_DATA 0x00000000 +#define DDRSS_PHY_842_DATA 0x00000000 +#define DDRSS_PHY_843_DATA 0x00000000 +#define DDRSS_PHY_844_DATA 0x00000000 +#define DDRSS_PHY_845_DATA 0x00000000 +#define DDRSS_PHY_846_DATA 0x00000000 +#define DDRSS_PHY_847_DATA 0x00000000 +#define DDRSS_PHY_848_DATA 0x00000000 +#define DDRSS_PHY_849_DATA 0x00000000 +#define DDRSS_PHY_850_DATA 0x00000000 +#define DDRSS_PHY_851_DATA 0x00000000 +#define DDRSS_PHY_852_DATA 0x00000000 +#define DDRSS_PHY_853_DATA 0x00000000 +#define DDRSS_PHY_854_DATA 0x00000000 +#define DDRSS_PHY_855_DATA 0x00000000 +#define DDRSS_PHY_856_DATA 0x00000000 +#define DDRSS_PHY_857_DATA 0x00000000 +#define DDRSS_PHY_858_DATA 0x00000000 +#define DDRSS_PHY_859_DATA 0x00000000 +#define DDRSS_PHY_860_DATA 0x00000000 +#define DDRSS_PHY_861_DATA 0x00000000 +#define DDRSS_PHY_862_DATA 0x00000000 +#define DDRSS_PHY_863_DATA 0x00000000 +#define DDRSS_PHY_864_DATA 0x00000000 +#define DDRSS_PHY_865_DATA 0x00000000 +#define DDRSS_PHY_866_DATA 0x00000000 +#define DDRSS_PHY_867_DATA 0x00000000 +#define DDRSS_PHY_868_DATA 0x00000000 +#define DDRSS_PHY_869_DATA 0x00000000 +#define DDRSS_PHY_870_DATA 0x00000000 +#define DDRSS_PHY_871_DATA 0x00000000 +#define DDRSS_PHY_872_DATA 0x00000000 +#define DDRSS_PHY_873_DATA 0x00000000 +#define DDRSS_PHY_874_DATA 0x00000000 +#define DDRSS_PHY_875_DATA 0x00000000 +#define DDRSS_PHY_876_DATA 0x00000000 +#define DDRSS_PHY_877_DATA 0x00000000 +#define DDRSS_PHY_878_DATA 0x00000000 +#define DDRSS_PHY_879_DATA 0x00000000 +#define DDRSS_PHY_880_DATA 0x00000000 +#define DDRSS_PHY_881_DATA 0x00000000 +#define DDRSS_PHY_882_DATA 0x00000000 +#define DDRSS_PHY_883_DATA 0x00000000 +#define DDRSS_PHY_884_DATA 0x00000000 +#define DDRSS_PHY_885_DATA 0x00000000 +#define DDRSS_PHY_886_DATA 0x00000000 +#define DDRSS_PHY_887_DATA 0x00000000 +#define DDRSS_PHY_888_DATA 0x00000000 +#define DDRSS_PHY_889_DATA 0x00000000 +#define DDRSS_PHY_890_DATA 0x00000000 +#define DDRSS_PHY_891_DATA 0x00000000 +#define DDRSS_PHY_892_DATA 0x00000000 +#define DDRSS_PHY_893_DATA 0x00000000 +#define DDRSS_PHY_894_DATA 0x00000000 +#define DDRSS_PHY_895_DATA 0x00000000 +#define DDRSS_PHY_896_DATA 0x00000000 +#define DDRSS_PHY_897_DATA 0x00000000 +#define DDRSS_PHY_898_DATA 0x00000000 +#define DDRSS_PHY_899_DATA 0x00000000 +#define DDRSS_PHY_900_DATA 0x00000000 +#define DDRSS_PHY_901_DATA 0x00000000 +#define DDRSS_PHY_902_DATA 0x00000000 +#define DDRSS_PHY_903_DATA 0x00000000 +#define DDRSS_PHY_904_DATA 0x00000000 +#define DDRSS_PHY_905_DATA 0x00000000 +#define DDRSS_PHY_906_DATA 0x00000000 +#define DDRSS_PHY_907_DATA 0x00000000 +#define DDRSS_PHY_908_DATA 0x00000000 +#define DDRSS_PHY_909_DATA 0x00000000 +#define DDRSS_PHY_910_DATA 0x00000000 +#define DDRSS_PHY_911_DATA 0x00000000 +#define DDRSS_PHY_912_DATA 0x00000000 +#define DDRSS_PHY_913_DATA 0x00000000 +#define DDRSS_PHY_914_DATA 0x00000000 +#define DDRSS_PHY_915_DATA 0x00000000 +#define DDRSS_PHY_916_DATA 0x00000000 +#define DDRSS_PHY_917_DATA 0x00000000 +#define DDRSS_PHY_918_DATA 0x00000000 +#define DDRSS_PHY_919_DATA 0x00000000 +#define DDRSS_PHY_920_DATA 0x00000000 +#define DDRSS_PHY_921_DATA 0x00000000 +#define DDRSS_PHY_922_DATA 0x00000000 +#define DDRSS_PHY_923_DATA 0x00000000 +#define DDRSS_PHY_924_DATA 0x00000000 +#define DDRSS_PHY_925_DATA 0x00000000 +#define DDRSS_PHY_926_DATA 0x00000000 +#define DDRSS_PHY_927_DATA 0x00000000 +#define DDRSS_PHY_928_DATA 0x00000000 +#define DDRSS_PHY_929_DATA 0x00000000 +#define DDRSS_PHY_930_DATA 0x00000000 +#define DDRSS_PHY_931_DATA 0x00000000 +#define DDRSS_PHY_932_DATA 0x00000000 +#define DDRSS_PHY_933_DATA 0x00000000 +#define DDRSS_PHY_934_DATA 0x00000000 +#define DDRSS_PHY_935_DATA 0x00000000 +#define DDRSS_PHY_936_DATA 0x00000000 +#define DDRSS_PHY_937_DATA 0x00000000 +#define DDRSS_PHY_938_DATA 0x00000000 +#define DDRSS_PHY_939_DATA 0x00000000 +#define DDRSS_PHY_940_DATA 0x00000000 +#define DDRSS_PHY_941_DATA 0x00000000 +#define DDRSS_PHY_942_DATA 0x00000000 +#define DDRSS_PHY_943_DATA 0x00000000 +#define DDRSS_PHY_944_DATA 0x00000000 +#define DDRSS_PHY_945_DATA 0x00000000 +#define DDRSS_PHY_946_DATA 0x00000000 +#define DDRSS_PHY_947_DATA 0x00000000 +#define DDRSS_PHY_948_DATA 0x00000000 +#define DDRSS_PHY_949_DATA 0x00000000 +#define DDRSS_PHY_950_DATA 0x00000000 +#define DDRSS_PHY_951_DATA 0x00000000 +#define DDRSS_PHY_952_DATA 0x00000000 +#define DDRSS_PHY_953_DATA 0x00000000 +#define DDRSS_PHY_954_DATA 0x00000000 +#define DDRSS_PHY_955_DATA 0x00000000 +#define DDRSS_PHY_956_DATA 0x00000000 +#define DDRSS_PHY_957_DATA 0x00000000 +#define DDRSS_PHY_958_DATA 0x00000000 +#define DDRSS_PHY_959_DATA 0x00000000 +#define DDRSS_PHY_960_DATA 0x00000000 +#define DDRSS_PHY_961_DATA 0x00000000 +#define DDRSS_PHY_962_DATA 0x00000000 +#define DDRSS_PHY_963_DATA 0x00000000 +#define DDRSS_PHY_964_DATA 0x00000000 +#define DDRSS_PHY_965_DATA 0x00000000 +#define DDRSS_PHY_966_DATA 0x00000000 +#define DDRSS_PHY_967_DATA 0x00000000 +#define DDRSS_PHY_968_DATA 0x00000000 +#define DDRSS_PHY_969_DATA 0x00000000 +#define DDRSS_PHY_970_DATA 0x00000000 +#define DDRSS_PHY_971_DATA 0x00000000 +#define DDRSS_PHY_972_DATA 0x00000000 +#define DDRSS_PHY_973_DATA 0x00000000 +#define DDRSS_PHY_974_DATA 0x00000000 +#define DDRSS_PHY_975_DATA 0x00000000 +#define DDRSS_PHY_976_DATA 0x00000000 +#define DDRSS_PHY_977_DATA 0x00000000 +#define DDRSS_PHY_978_DATA 0x00000000 +#define DDRSS_PHY_979_DATA 0x00000000 +#define DDRSS_PHY_980_DATA 0x00000000 +#define DDRSS_PHY_981_DATA 0x00000000 +#define DDRSS_PHY_982_DATA 0x00000000 +#define DDRSS_PHY_983_DATA 0x00000000 +#define DDRSS_PHY_984_DATA 0x00000000 +#define DDRSS_PHY_985_DATA 0x00000000 +#define DDRSS_PHY_986_DATA 0x00000000 +#define DDRSS_PHY_987_DATA 0x00000000 +#define DDRSS_PHY_988_DATA 0x00000000 +#define DDRSS_PHY_989_DATA 0x00000000 +#define DDRSS_PHY_990_DATA 0x00000000 +#define DDRSS_PHY_991_DATA 0x00000000 +#define DDRSS_PHY_992_DATA 0x00000000 +#define DDRSS_PHY_993_DATA 0x00000000 +#define DDRSS_PHY_994_DATA 0x00000000 +#define DDRSS_PHY_995_DATA 0x00000000 +#define DDRSS_PHY_996_DATA 0x00000000 +#define DDRSS_PHY_997_DATA 0x00000000 +#define DDRSS_PHY_998_DATA 0x00000000 +#define DDRSS_PHY_999_DATA 0x00000000 +#define DDRSS_PHY_1000_DATA 0x00000000 +#define DDRSS_PHY_1001_DATA 0x00000000 +#define DDRSS_PHY_1002_DATA 0x00000000 +#define DDRSS_PHY_1003_DATA 0x00000000 +#define DDRSS_PHY_1004_DATA 0x00000000 +#define DDRSS_PHY_1005_DATA 0x00000000 +#define DDRSS_PHY_1006_DATA 0x00000000 +#define DDRSS_PHY_1007_DATA 0x00000000 +#define DDRSS_PHY_1008_DATA 0x00000000 +#define DDRSS_PHY_1009_DATA 0x00000000 +#define DDRSS_PHY_1010_DATA 0x00000000 +#define DDRSS_PHY_1011_DATA 0x00000000 +#define DDRSS_PHY_1012_DATA 0x00000000 +#define DDRSS_PHY_1013_DATA 0x00000000 +#define DDRSS_PHY_1014_DATA 0x00000000 +#define DDRSS_PHY_1015_DATA 0x00000000 +#define DDRSS_PHY_1016_DATA 0x00000000 +#define DDRSS_PHY_1017_DATA 0x00000000 +#define DDRSS_PHY_1018_DATA 0x00000000 +#define DDRSS_PHY_1019_DATA 0x00000000 +#define DDRSS_PHY_1020_DATA 0x00000000 +#define DDRSS_PHY_1021_DATA 0x00000000 +#define DDRSS_PHY_1022_DATA 0x00000000 +#define DDRSS_PHY_1023_DATA 0x00000000 +#define DDRSS_PHY_1024_DATA 0x00000100 +#define DDRSS_PHY_1025_DATA 0x00000000 +#define DDRSS_PHY_1026_DATA 0x00000000 +#define DDRSS_PHY_1027_DATA 0x00000000 +#define DDRSS_PHY_1028_DATA 0x00000000 +#define DDRSS_PHY_1029_DATA 0x00000100 +#define DDRSS_PHY_1030_DATA 0x00000000 +#define DDRSS_PHY_1031_DATA 0x00000000 +#define DDRSS_PHY_1032_DATA 0x00000000 +#define DDRSS_PHY_1033_DATA 0x00000000 +#define DDRSS_PHY_1034_DATA 0x00000000 +#define DDRSS_PHY_1035_DATA 0x00000000 +#define DDRSS_PHY_1036_DATA 0x00000000 +#define DDRSS_PHY_1037_DATA 0x00DCBA98 +#define DDRSS_PHY_1038_DATA 0x00000000 +#define DDRSS_PHY_1039_DATA 0x00000000 +#define DDRSS_PHY_1040_DATA 0x00000000 +#define DDRSS_PHY_1041_DATA 0x00000000 +#define DDRSS_PHY_1042_DATA 0x00000000 +#define DDRSS_PHY_1043_DATA 0x00000000 +#define DDRSS_PHY_1044_DATA 0x00000000 +#define DDRSS_PHY_1045_DATA 0x00000000 +#define DDRSS_PHY_1046_DATA 0x00000000 +#define DDRSS_PHY_1047_DATA 0x00000000 +#define DDRSS_PHY_1048_DATA 0x00000000 +#define DDRSS_PHY_1049_DATA 0x00000000 +#define DDRSS_PHY_1050_DATA 0x00000000 +#define DDRSS_PHY_1051_DATA 0x00000000 +#define DDRSS_PHY_1052_DATA 0x2307B9AC +#define DDRSS_PHY_1053_DATA 0x10030000 +#define DDRSS_PHY_1054_DATA 0x000F0000 +#define DDRSS_PHY_1055_DATA 0x0000000F +#define DDRSS_PHY_1056_DATA 0x020002CC +#define DDRSS_PHY_1057_DATA 0x00030000 +#define DDRSS_PHY_1058_DATA 0x00000300 +#define DDRSS_PHY_1059_DATA 0x00000300 +#define DDRSS_PHY_1060_DATA 0x00000300 +#define DDRSS_PHY_1061_DATA 0x00000300 +#define DDRSS_PHY_1062_DATA 0x00000300 +#define DDRSS_PHY_1063_DATA 0x42080010 +#define DDRSS_PHY_1064_DATA 0x0000003E +#define DDRSS_PHY_1065_DATA 0x00000000 +#define DDRSS_PHY_1066_DATA 0x00000000 +#define DDRSS_PHY_1067_DATA 0x00000000 +#define DDRSS_PHY_1068_DATA 0x00000000 +#define DDRSS_PHY_1069_DATA 0x00000000 +#define DDRSS_PHY_1070_DATA 0x00000000 +#define DDRSS_PHY_1071_DATA 0x00000000 +#define DDRSS_PHY_1072_DATA 0x00000000 +#define DDRSS_PHY_1073_DATA 0x00000000 +#define DDRSS_PHY_1074_DATA 0x00000000 +#define DDRSS_PHY_1075_DATA 0x00000000 +#define DDRSS_PHY_1076_DATA 0x00000000 +#define DDRSS_PHY_1077_DATA 0x00000000 +#define DDRSS_PHY_1078_DATA 0x00000000 +#define DDRSS_PHY_1079_DATA 0x00000000 +#define DDRSS_PHY_1080_DATA 0x00000000 +#define DDRSS_PHY_1081_DATA 0x00000000 +#define DDRSS_PHY_1082_DATA 0x00000000 +#define DDRSS_PHY_1083_DATA 0x00000000 +#define DDRSS_PHY_1084_DATA 0x00000000 +#define DDRSS_PHY_1085_DATA 0x00000000 +#define DDRSS_PHY_1086_DATA 0x00000000 +#define DDRSS_PHY_1087_DATA 0x00000000 +#define DDRSS_PHY_1088_DATA 0x00000000 +#define DDRSS_PHY_1089_DATA 0x00000000 +#define DDRSS_PHY_1090_DATA 0x00000000 +#define DDRSS_PHY_1091_DATA 0x00000000 +#define DDRSS_PHY_1092_DATA 0x00000000 +#define DDRSS_PHY_1093_DATA 0x00000000 +#define DDRSS_PHY_1094_DATA 0x00000000 +#define DDRSS_PHY_1095_DATA 0x00000000 +#define DDRSS_PHY_1096_DATA 0x00000000 +#define DDRSS_PHY_1097_DATA 0x00000000 +#define DDRSS_PHY_1098_DATA 0x00000000 +#define DDRSS_PHY_1099_DATA 0x00000000 +#define DDRSS_PHY_1100_DATA 0x00000000 +#define DDRSS_PHY_1101_DATA 0x00000000 +#define DDRSS_PHY_1102_DATA 0x00000000 +#define DDRSS_PHY_1103_DATA 0x00000000 +#define DDRSS_PHY_1104_DATA 0x00000000 +#define DDRSS_PHY_1105_DATA 0x00000000 +#define DDRSS_PHY_1106_DATA 0x00000000 +#define DDRSS_PHY_1107_DATA 0x00000000 +#define DDRSS_PHY_1108_DATA 0x00000000 +#define DDRSS_PHY_1109_DATA 0x00000000 +#define DDRSS_PHY_1110_DATA 0x00000000 +#define DDRSS_PHY_1111_DATA 0x00000000 +#define DDRSS_PHY_1112_DATA 0x00000000 +#define DDRSS_PHY_1113_DATA 0x00000000 +#define DDRSS_PHY_1114_DATA 0x00000000 +#define DDRSS_PHY_1115_DATA 0x00000000 +#define DDRSS_PHY_1116_DATA 0x00000000 +#define DDRSS_PHY_1117_DATA 0x00000000 +#define DDRSS_PHY_1118_DATA 0x00000000 +#define DDRSS_PHY_1119_DATA 0x00000000 +#define DDRSS_PHY_1120_DATA 0x00000000 +#define DDRSS_PHY_1121_DATA 0x00000000 +#define DDRSS_PHY_1122_DATA 0x00000000 +#define DDRSS_PHY_1123_DATA 0x00000000 +#define DDRSS_PHY_1124_DATA 0x00000000 +#define DDRSS_PHY_1125_DATA 0x00000000 +#define DDRSS_PHY_1126_DATA 0x00000000 +#define DDRSS_PHY_1127_DATA 0x00000000 +#define DDRSS_PHY_1128_DATA 0x00000000 +#define DDRSS_PHY_1129_DATA 0x00000000 +#define DDRSS_PHY_1130_DATA 0x00000000 +#define DDRSS_PHY_1131_DATA 0x00000000 +#define DDRSS_PHY_1132_DATA 0x00000000 +#define DDRSS_PHY_1133_DATA 0x00000000 +#define DDRSS_PHY_1134_DATA 0x00000000 +#define DDRSS_PHY_1135_DATA 0x00000000 +#define DDRSS_PHY_1136_DATA 0x00000000 +#define DDRSS_PHY_1137_DATA 0x00000000 +#define DDRSS_PHY_1138_DATA 0x00000000 +#define DDRSS_PHY_1139_DATA 0x00000000 +#define DDRSS_PHY_1140_DATA 0x00000000 +#define DDRSS_PHY_1141_DATA 0x00000000 +#define DDRSS_PHY_1142_DATA 0x00000000 +#define DDRSS_PHY_1143_DATA 0x00000000 +#define DDRSS_PHY_1144_DATA 0x00000000 +#define DDRSS_PHY_1145_DATA 0x00000000 +#define DDRSS_PHY_1146_DATA 0x00000000 +#define DDRSS_PHY_1147_DATA 0x00000000 +#define DDRSS_PHY_1148_DATA 0x00000000 +#define DDRSS_PHY_1149_DATA 0x00000000 +#define DDRSS_PHY_1150_DATA 0x00000000 +#define DDRSS_PHY_1151_DATA 0x00000000 +#define DDRSS_PHY_1152_DATA 0x00000000 +#define DDRSS_PHY_1153_DATA 0x00000000 +#define DDRSS_PHY_1154_DATA 0x00000000 +#define DDRSS_PHY_1155_DATA 0x00000000 +#define DDRSS_PHY_1156_DATA 0x00000000 +#define DDRSS_PHY_1157_DATA 0x00000000 +#define DDRSS_PHY_1158_DATA 0x00000000 +#define DDRSS_PHY_1159_DATA 0x00000000 +#define DDRSS_PHY_1160_DATA 0x00000000 +#define DDRSS_PHY_1161_DATA 0x00000000 +#define DDRSS_PHY_1162_DATA 0x00000000 +#define DDRSS_PHY_1163_DATA 0x00000000 +#define DDRSS_PHY_1164_DATA 0x00000000 +#define DDRSS_PHY_1165_DATA 0x00000000 +#define DDRSS_PHY_1166_DATA 0x00000000 +#define DDRSS_PHY_1167_DATA 0x00000000 +#define DDRSS_PHY_1168_DATA 0x00000000 +#define DDRSS_PHY_1169_DATA 0x00000000 +#define DDRSS_PHY_1170_DATA 0x00000000 +#define DDRSS_PHY_1171_DATA 0x00000000 +#define DDRSS_PHY_1172_DATA 0x00000000 +#define DDRSS_PHY_1173_DATA 0x00000000 +#define DDRSS_PHY_1174_DATA 0x00000000 +#define DDRSS_PHY_1175_DATA 0x00000000 +#define DDRSS_PHY_1176_DATA 0x00000000 +#define DDRSS_PHY_1177_DATA 0x00000000 +#define DDRSS_PHY_1178_DATA 0x00000000 +#define DDRSS_PHY_1179_DATA 0x00000000 +#define DDRSS_PHY_1180_DATA 0x00000000 +#define DDRSS_PHY_1181_DATA 0x00000000 +#define DDRSS_PHY_1182_DATA 0x00000000 +#define DDRSS_PHY_1183_DATA 0x00000000 +#define DDRSS_PHY_1184_DATA 0x00000000 +#define DDRSS_PHY_1185_DATA 0x00000000 +#define DDRSS_PHY_1186_DATA 0x00000000 +#define DDRSS_PHY_1187_DATA 0x00000000 +#define DDRSS_PHY_1188_DATA 0x00000000 +#define DDRSS_PHY_1189_DATA 0x00000000 +#define DDRSS_PHY_1190_DATA 0x00000000 +#define DDRSS_PHY_1191_DATA 0x00000000 +#define DDRSS_PHY_1192_DATA 0x00000000 +#define DDRSS_PHY_1193_DATA 0x00000000 +#define DDRSS_PHY_1194_DATA 0x00000000 +#define DDRSS_PHY_1195_DATA 0x00000000 +#define DDRSS_PHY_1196_DATA 0x00000000 +#define DDRSS_PHY_1197_DATA 0x00000000 +#define DDRSS_PHY_1198_DATA 0x00000000 +#define DDRSS_PHY_1199_DATA 0x00000000 +#define DDRSS_PHY_1200_DATA 0x00000000 +#define DDRSS_PHY_1201_DATA 0x00000000 +#define DDRSS_PHY_1202_DATA 0x00000000 +#define DDRSS_PHY_1203_DATA 0x00000000 +#define DDRSS_PHY_1204_DATA 0x00000000 +#define DDRSS_PHY_1205_DATA 0x00000000 +#define DDRSS_PHY_1206_DATA 0x00000000 +#define DDRSS_PHY_1207_DATA 0x00000000 +#define DDRSS_PHY_1208_DATA 0x00000000 +#define DDRSS_PHY_1209_DATA 0x00000000 +#define DDRSS_PHY_1210_DATA 0x00000000 +#define DDRSS_PHY_1211_DATA 0x00000000 +#define DDRSS_PHY_1212_DATA 0x00000000 +#define DDRSS_PHY_1213_DATA 0x00000000 +#define DDRSS_PHY_1214_DATA 0x00000000 +#define DDRSS_PHY_1215_DATA 0x00000000 +#define DDRSS_PHY_1216_DATA 0x00000000 +#define DDRSS_PHY_1217_DATA 0x00000000 +#define DDRSS_PHY_1218_DATA 0x00000000 +#define DDRSS_PHY_1219_DATA 0x00000000 +#define DDRSS_PHY_1220_DATA 0x00000000 +#define DDRSS_PHY_1221_DATA 0x00000000 +#define DDRSS_PHY_1222_DATA 0x00000000 +#define DDRSS_PHY_1223_DATA 0x00000000 +#define DDRSS_PHY_1224_DATA 0x00000000 +#define DDRSS_PHY_1225_DATA 0x00000000 +#define DDRSS_PHY_1226_DATA 0x00000000 +#define DDRSS_PHY_1227_DATA 0x00000000 +#define DDRSS_PHY_1228_DATA 0x00000000 +#define DDRSS_PHY_1229_DATA 0x00000000 +#define DDRSS_PHY_1230_DATA 0x00000000 +#define DDRSS_PHY_1231_DATA 0x00000000 +#define DDRSS_PHY_1232_DATA 0x00000000 +#define DDRSS_PHY_1233_DATA 0x00000000 +#define DDRSS_PHY_1234_DATA 0x00000000 +#define DDRSS_PHY_1235_DATA 0x00000000 +#define DDRSS_PHY_1236_DATA 0x00000000 +#define DDRSS_PHY_1237_DATA 0x00000000 +#define DDRSS_PHY_1238_DATA 0x00000000 +#define DDRSS_PHY_1239_DATA 0x00000000 +#define DDRSS_PHY_1240_DATA 0x00000000 +#define DDRSS_PHY_1241_DATA 0x00000000 +#define DDRSS_PHY_1242_DATA 0x00000000 +#define DDRSS_PHY_1243_DATA 0x00000000 +#define DDRSS_PHY_1244_DATA 0x00000000 +#define DDRSS_PHY_1245_DATA 0x00000000 +#define DDRSS_PHY_1246_DATA 0x00000000 +#define DDRSS_PHY_1247_DATA 0x00000000 +#define DDRSS_PHY_1248_DATA 0x00000000 +#define DDRSS_PHY_1249_DATA 0x00000000 +#define DDRSS_PHY_1250_DATA 0x00000000 +#define DDRSS_PHY_1251_DATA 0x00000000 +#define DDRSS_PHY_1252_DATA 0x00000000 +#define DDRSS_PHY_1253_DATA 0x00000000 +#define DDRSS_PHY_1254_DATA 0x00000000 +#define DDRSS_PHY_1255_DATA 0x00000000 +#define DDRSS_PHY_1256_DATA 0x00000000 +#define DDRSS_PHY_1257_DATA 0x00000000 +#define DDRSS_PHY_1258_DATA 0x00000000 +#define DDRSS_PHY_1259_DATA 0x00000000 +#define DDRSS_PHY_1260_DATA 0x00000000 +#define DDRSS_PHY_1261_DATA 0x00000000 +#define DDRSS_PHY_1262_DATA 0x00000000 +#define DDRSS_PHY_1263_DATA 0x00000000 +#define DDRSS_PHY_1264_DATA 0x00000000 +#define DDRSS_PHY_1265_DATA 0x00000000 +#define DDRSS_PHY_1266_DATA 0x00000000 +#define DDRSS_PHY_1267_DATA 0x00000000 +#define DDRSS_PHY_1268_DATA 0x00000000 +#define DDRSS_PHY_1269_DATA 0x00000000 +#define DDRSS_PHY_1270_DATA 0x00000000 +#define DDRSS_PHY_1271_DATA 0x00000000 +#define DDRSS_PHY_1272_DATA 0x00000000 +#define DDRSS_PHY_1273_DATA 0x00000000 +#define DDRSS_PHY_1274_DATA 0x00000000 +#define DDRSS_PHY_1275_DATA 0x00000000 +#define DDRSS_PHY_1276_DATA 0x00000000 +#define DDRSS_PHY_1277_DATA 0x00000000 +#define DDRSS_PHY_1278_DATA 0x00000000 +#define DDRSS_PHY_1279_DATA 0x00000000 +#define DDRSS_PHY_1280_DATA 0x00000000 +#define DDRSS_PHY_1281_DATA 0x00000100 +#define DDRSS_PHY_1282_DATA 0x00000000 +#define DDRSS_PHY_1283_DATA 0x00000000 +#define DDRSS_PHY_1284_DATA 0x00000000 +#define DDRSS_PHY_1285_DATA 0x00000000 +#define DDRSS_PHY_1286_DATA 0x00050000 +#define DDRSS_PHY_1287_DATA 0x04000100 +#define DDRSS_PHY_1288_DATA 0x00000055 +#define DDRSS_PHY_1289_DATA 0x00000000 +#define DDRSS_PHY_1290_DATA 0x00000000 +#define DDRSS_PHY_1291_DATA 0x00000000 +#define DDRSS_PHY_1292_DATA 0x00000000 +#define DDRSS_PHY_1293_DATA 0x01002000 +#define DDRSS_PHY_1294_DATA 0x00004001 +#define DDRSS_PHY_1295_DATA 0x00020028 +#define DDRSS_PHY_1296_DATA 0x00010100 +#define DDRSS_PHY_1297_DATA 0x00000001 +#define DDRSS_PHY_1298_DATA 0x00000000 +#define DDRSS_PHY_1299_DATA 0x0F0F0E06 +#define DDRSS_PHY_1300_DATA 0x00010101 +#define DDRSS_PHY_1301_DATA 0x010F0004 +#define DDRSS_PHY_1302_DATA 0x00000000 +#define DDRSS_PHY_1303_DATA 0x00000000 +#define DDRSS_PHY_1304_DATA 0x00000064 +#define DDRSS_PHY_1305_DATA 0x00000000 +#define DDRSS_PHY_1306_DATA 0x00000000 +#define DDRSS_PHY_1307_DATA 0x01020103 +#define DDRSS_PHY_1308_DATA 0x0F020102 +#define DDRSS_PHY_1309_DATA 0x03030303 +#define DDRSS_PHY_1310_DATA 0x03030303 +#define DDRSS_PHY_1311_DATA 0x00040000 +#define DDRSS_PHY_1312_DATA 0x00005201 +#define DDRSS_PHY_1313_DATA 0x00000000 +#define DDRSS_PHY_1314_DATA 0x00000000 +#define DDRSS_PHY_1315_DATA 0x00000000 +#define DDRSS_PHY_1316_DATA 0x00000000 +#define DDRSS_PHY_1317_DATA 0x00000000 +#define DDRSS_PHY_1318_DATA 0x00000000 +#define DDRSS_PHY_1319_DATA 0x07070001 +#define DDRSS_PHY_1320_DATA 0x00005400 +#define DDRSS_PHY_1321_DATA 0x000040A2 +#define DDRSS_PHY_1322_DATA 0x00024410 +#define DDRSS_PHY_1323_DATA 0x00004410 +#define DDRSS_PHY_1324_DATA 0x00004410 +#define DDRSS_PHY_1325_DATA 0x00004410 +#define DDRSS_PHY_1326_DATA 0x00004410 +#define DDRSS_PHY_1327_DATA 0x00004410 +#define DDRSS_PHY_1328_DATA 0x00004410 +#define DDRSS_PHY_1329_DATA 0x00004410 +#define DDRSS_PHY_1330_DATA 0x00004410 +#define DDRSS_PHY_1331_DATA 0x00004410 +#define DDRSS_PHY_1332_DATA 0x00000000 +#define DDRSS_PHY_1333_DATA 0x00000046 +#define DDRSS_PHY_1334_DATA 0x00000400 +#define DDRSS_PHY_1335_DATA 0x00000008 +#define DDRSS_PHY_1336_DATA 0x00000000 +#define DDRSS_PHY_1337_DATA 0x00000000 +#define DDRSS_PHY_1338_DATA 0x00000000 +#define DDRSS_PHY_1339_DATA 0x00000000 +#define DDRSS_PHY_1340_DATA 0x00000000 +#define DDRSS_PHY_1341_DATA 0x03000000 +#define DDRSS_PHY_1342_DATA 0x00000000 +#define DDRSS_PHY_1343_DATA 0x00000000 +#define DDRSS_PHY_1344_DATA 0x00000000 +#define DDRSS_PHY_1345_DATA 0x04102006 +#define DDRSS_PHY_1346_DATA 0x00041020 +#define DDRSS_PHY_1347_DATA 0x01C98C98 +#define DDRSS_PHY_1348_DATA 0x3F400000 +#define DDRSS_PHY_1349_DATA 0x3F3F1F3F +#define DDRSS_PHY_1350_DATA 0x0000001F +#define DDRSS_PHY_1351_DATA 0x00000000 +#define DDRSS_PHY_1352_DATA 0x00000000 +#define DDRSS_PHY_1353_DATA 0x00000000 +#define DDRSS_PHY_1354_DATA 0x00000001 +#define DDRSS_PHY_1355_DATA 0x00000000 +#define DDRSS_PHY_1356_DATA 0x00000000 +#define DDRSS_PHY_1357_DATA 0x00000000 +#define DDRSS_PHY_1358_DATA 0x00000000 +#define DDRSS_PHY_1359_DATA 0x76543210 +#define DDRSS_PHY_1360_DATA 0x00000098 +#define DDRSS_PHY_1361_DATA 0x00000000 +#define DDRSS_PHY_1362_DATA 0x00000000 +#define DDRSS_PHY_1363_DATA 0x00000000 +#define DDRSS_PHY_1364_DATA 0x00040700 +#define DDRSS_PHY_1365_DATA 0x00000000 +#define DDRSS_PHY_1366_DATA 0x00000000 +#define DDRSS_PHY_1367_DATA 0x00000000 +#define DDRSS_PHY_1368_DATA 0x00000002 +#define DDRSS_PHY_1369_DATA 0x00000100 +#define DDRSS_PHY_1370_DATA 0x00000000 +#define DDRSS_PHY_1371_DATA 0x0001F7C0 +#define DDRSS_PHY_1372_DATA 0x00020002 +#define DDRSS_PHY_1373_DATA 0x00000000 +#define DDRSS_PHY_1374_DATA 0x00001142 +#define DDRSS_PHY_1375_DATA 0x03020400 +#define DDRSS_PHY_1376_DATA 0x00000080 +#define DDRSS_PHY_1377_DATA 0x03900390 +#define DDRSS_PHY_1378_DATA 0x03900390 +#define DDRSS_PHY_1379_DATA 0x03900390 +#define DDRSS_PHY_1380_DATA 0x03900390 +#define DDRSS_PHY_1381_DATA 0x03900390 +#define DDRSS_PHY_1382_DATA 0x03900390 +#define DDRSS_PHY_1383_DATA 0x00000300 +#define DDRSS_PHY_1384_DATA 0x00000300 +#define DDRSS_PHY_1385_DATA 0x00000300 +#define DDRSS_PHY_1386_DATA 0x00000300 +#define DDRSS_PHY_1387_DATA 0x31823FC7 +#define DDRSS_PHY_1388_DATA 0x00000000 +#define DDRSS_PHY_1389_DATA 0x0C000D3F +#define DDRSS_PHY_1390_DATA 0x30000D3F +#define DDRSS_PHY_1391_DATA 0x300D3F11 +#define DDRSS_PHY_1392_DATA 0x01990000 +#define DDRSS_PHY_1393_DATA 0x000D3FCC +#define DDRSS_PHY_1394_DATA 0x00000C11 +#define DDRSS_PHY_1395_DATA 0x300D3F11 +#define DDRSS_PHY_1396_DATA 0x01990000 +#define DDRSS_PHY_1397_DATA 0x300C3F11 +#define DDRSS_PHY_1398_DATA 0x01990000 +#define DDRSS_PHY_1399_DATA 0x300C3F11 +#define DDRSS_PHY_1400_DATA 0x01990000 +#define DDRSS_PHY_1401_DATA 0x300D3F11 +#define DDRSS_PHY_1402_DATA 0x01990000 +#define DDRSS_PHY_1403_DATA 0x300D3F11 +#define DDRSS_PHY_1404_DATA 0x01990000 +#define DDRSS_PHY_1405_DATA 0x20040004 -- GitLab From 2d257d9279e3489d53464f3dbf55a02fda8911ce Mon Sep 17 00:00:00 2001 From: Vignesh Raghavendra Date: Wed, 25 May 2022 13:38:49 +0530 Subject: [PATCH 144/581] configs: Add configs for AM62x SK Add am62x_evm_r5_defconfig for R5 SPL and am62x_evm_a53_defconfig for A53 SPL and U-Boot support. To keep the changes to minimum. Only UART And SD boot related configs are included. This should serve as good starting point for new board bringup with AM62x. Signed-off-by: Aswath Govindraju Signed-off-by: Vignesh Raghavendra [trini: Migrate a number of CONFIG symbols, have re-tested] Tested-by: Georgi Vlaev Signed-off-by: Tom Rini --- board/ti/am62x/MAINTAINERS | 8 +++ configs/am62x_evm_a53_defconfig | 76 +++++++++++++++++++++++++ configs/am62x_evm_r5_defconfig | 98 +++++++++++++++++++++++++++++++++ include/configs/am62x_evm.h | 67 ++++++++++++++++++++++ 4 files changed, 249 insertions(+) create mode 100644 board/ti/am62x/MAINTAINERS create mode 100644 configs/am62x_evm_a53_defconfig create mode 100644 configs/am62x_evm_r5_defconfig create mode 100644 include/configs/am62x_evm.h diff --git a/board/ti/am62x/MAINTAINERS b/board/ti/am62x/MAINTAINERS new file mode 100644 index 00000000000..105e741995e --- /dev/null +++ b/board/ti/am62x/MAINTAINERS @@ -0,0 +1,8 @@ +AM62x BOARD +M: Dave Gerlach +M: Tom Rini +S: Maintained +F: board/ti/am62x/ +F: include/configs/am62x_evm.h +F: configs/am62x_evm_r5_defconfig +F: configs/am62x_evm_a53_defconfig diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig new file mode 100644 index 00000000000..7ebf3665214 --- /dev/null +++ b/configs/am62x_evm_a53_defconfig @@ -0,0 +1,76 @@ +CONFIG_ARM=y +CONFIG_ARCH_K3=y +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_SOC_K3_AM625=y +CONFIG_K3_ATF_LOAD_ADDR=0x9e780000 +CONFIG_TARGET_AM625_A53_EVM=y +CONFIG_DEFAULT_DEVICE_TREE="k3-am625-sk" +CONFIG_SPL_TEXT_BASE=0x80080000 +CONFIG_SPL_MMC=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_FS_FAT=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 +CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern" +CONFIG_SPL_MAX_SIZE=0x58000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80a00000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_STACK_R=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" +CONFIG_SPL_DM_MAILBOX=y +CONFIG_SPL_POWER_DOMAIN=y +CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_CMD_MMC=y +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_MULTI_DTB_FIT=y +CONFIG_SPL_MULTI_DTB_FIT=y +CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM=y +CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_OF_TRANSLATE=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_CLK_TI_SCI=y +CONFIG_TI_SCI_PROTOCOL=y +CONFIG_DM_MAILBOX=y +CONFIG_K3_SEC_PROXY=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ADMA=y +CONFIG_SPL_MMC_SDHCI_ADMA=y +CONFIG_MMC_SDHCI_AM654=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_PINCTRL_SINGLE=y +CONFIG_POWER_DOMAIN=y +CONFIG_TI_SCI_POWER_DOMAIN=y +CONFIG_K3_SYSTEM_CONTROLLER=y +CONFIG_REMOTEPROC_TI_K3_ARM64=y +CONFIG_DM_RESET=y +CONFIG_RESET_TI_SCI=y +CONFIG_DM_SERIAL=y +CONFIG_SOC_DEVICE=y +CONFIG_SOC_DEVICE_TI_K3=y +CONFIG_SOC_TI=y +CONFIG_SYSRESET=y +CONFIG_SPL_SYSRESET=y +CONFIG_SYSRESET_TI_SCI=y +CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/am62x_evm_r5_defconfig b/configs/am62x_evm_r5_defconfig new file mode 100644 index 00000000000..2e340cd6f41 --- /dev/null +++ b/configs/am62x_evm_r5_defconfig @@ -0,0 +1,98 @@ +CONFIG_ARM=y +CONFIG_ARCH_K3=y +CONFIG_SYS_MALLOC_F_LEN=0x9000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SOC_K3_AM625=y +CONFIG_TARGET_AM625_R5_EVM=y +CONFIG_DM_GPIO=y +CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-am625-r5-sk" +CONFIG_SPL_TEXT_BASE=0x43c00000 +CONFIG_SPL_MMC=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_SIZE_LIMIT=0x40000 +CONFIG_SPL_FS_FAT=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7000ffff +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 +CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_MAX_SIZE=0x58000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x43c37800 +CONFIG_SPL_BSS_MAX_SIZE=0x5000 +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x84000000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000 +CONFIG_SPL_EARLY_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 +CONFIG_SPL_DM_MAILBOX=y +CONFIG_SPL_DM_RESET=y +CONFIG_SPL_POWER_DOMAIN=y +CONFIG_SPL_RAM_SUPPORT=y +CONFIG_SPL_RAM_DEVICE=y +CONFIG_SPL_REMOTEPROC=y +CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_ASKENV=y +CONFIG_CMD_DFU=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_REMOTEPROC=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TIME=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_SPL_MULTI_DTB_FIT=y +CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_DM=y +CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_OF_TRANSLATE=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_SPL_CLK_CCF=y +CONFIG_SPL_CLK_K3_PLL=y +CONFIG_SPL_CLK_K3=y +CONFIG_TI_SCI_PROTOCOL=y +CONFIG_DA8XX_GPIO=y +CONFIG_DM_MAILBOX=y +CONFIG_K3_SEC_PROXY=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ADMA=y +CONFIG_SPL_MMC_SDHCI_ADMA=y +CONFIG_MMC_SDHCI_AM654=y +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_GENERIC is not set +CONFIG_SPL_PINCTRL=y +# CONFIG_SPL_PINCTRL_GENERIC is not set +CONFIG_PINCTRL_SINGLE=y +CONFIG_POWER_DOMAIN=y +CONFIG_TI_POWER_DOMAIN=y +CONFIG_K3_SYSTEM_CONTROLLER=y +CONFIG_REMOTEPROC_TI_K3_ARM64=y +CONFIG_DM_RESET=y +CONFIG_RESET_TI_SCI=y +CONFIG_SPECIFY_CONSOLE_INDEX=y +CONFIG_DM_SERIAL=y +CONFIG_SOC_DEVICE=y +CONFIG_SOC_DEVICE_TI_K3=y +CONFIG_SOC_TI=y +CONFIG_TIMER=y +CONFIG_SPL_TIMER=y +CONFIG_OMAP_TIMER=y +CONFIG_LIB_RATIONAL=y +CONFIG_SPL_LIB_RATIONAL=y diff --git a/include/configs/am62x_evm.h b/include/configs/am62x_evm.h new file mode 100644 index 00000000000..78201adc07f --- /dev/null +++ b/include/configs/am62x_evm.h @@ -0,0 +1,67 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration header file for K3 AM625 SoC family + * + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ + * Suman Anna + */ + +#ifndef __CONFIG_AM625_EVM_H +#define __CONFIG_AM625_EVM_H + +#include +#include + +/* DDR Configuration */ +#define CONFIG_SYS_SDRAM_BASE1 0x880000000 + +#define PARTS_DEFAULT \ + /* Linux partitions */ \ + "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" + +/* U-Boot general configuration */ +#define EXTRA_ENV_AM625_BOARD_SETTINGS \ + "default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ + "findfdt=" \ + "setenv name_fdt ${default_device_tree};" \ + "setenv fdtfile ${name_fdt}\0" \ + "name_kern=Image\0" \ + "console=ttyS2,115200n8\0" \ + "args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x02800000 " \ + "${mtdparts}\0" \ + "run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0" + +/* U-Boot MMC-specific configuration */ +#define EXTRA_ENV_AM625_BOARD_SETTINGS_MMC \ + "boot=mmc\0" \ + "mmcdev=1\0" \ + "bootpart=1:2\0" \ + "bootdir=/boot\0" \ + "rd_spec=-\0" \ + "init_mmc=run args_all args_mmc\0" \ + "get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0" \ + "get_overlay_mmc=" \ + "fdt address ${fdtaddr};" \ + "fdt resize 0x100000;" \ + "for overlay in $name_overlays;" \ + "do;" \ + "load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} && " \ + "fdt apply ${dtboaddr};" \ + "done;\0" \ + "get_kern_mmc=load mmc ${bootpart} ${loadaddr} " \ + "${bootdir}/${name_kern}\0" \ + "get_fit_mmc=load mmc ${bootpart} ${addr_fit} " \ + "${bootdir}/${name_fit}\0" \ + "partitions=" PARTS_DEFAULT + +/* Incorporate settings into the U-Boot environment */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + DEFAULT_LINUX_BOOT_ENV \ + DEFAULT_MMC_TI_ARGS \ + EXTRA_ENV_AM625_BOARD_SETTINGS \ + EXTRA_ENV_AM625_BOARD_SETTINGS_MMC + +/* Now for the remaining common defines */ +#include + +#endif /* __CONFIG_AM625_EVM_H */ -- GitLab From e16aac3b730e10420d54cfa64f658fe7ef0397c6 Mon Sep 17 00:00:00 2001 From: Vignesh Raghavendra Date: Wed, 25 May 2022 13:38:50 +0530 Subject: [PATCH 145/581] doc: ti: Add readme for AM62x SK Add info of boot flow and build steps for AM62x SK. Signed-off-by: Vignesh Raghavendra Reviewed-by: Bryan Brattlof --- doc/board/ti/am62x_sk.rst | 231 ++++++++++++++++++++++++++++++++++++++ doc/board/ti/index.rst | 1 + 2 files changed, 232 insertions(+) create mode 100644 doc/board/ti/am62x_sk.rst diff --git a/doc/board/ti/am62x_sk.rst b/doc/board/ti/am62x_sk.rst new file mode 100644 index 00000000000..4e68c2018a5 --- /dev/null +++ b/doc/board/ti/am62x_sk.rst @@ -0,0 +1,231 @@ +.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +.. sectionauthor:: Vignesh Raghavendra + +Texas Instruments AM62 Platforms +================================ + +Introduction: +------------- +The AM62 SoC family is the follow on AM335x built on the K3 Multicore +SoC architecture platform, providing ultra-low-power modes, dual +display, multi-sensor edge compute, security and other BOM-saving +integrations. The AM62 SoC targets a broad market to enable +applications such as Industrial HMI, PLC/CNC/Robot control, Medical +Equipment, Building Automation, Appliances and more. + +Some highlights of this SoC are: + +* Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster. + Pin-to-pin compatible options for single and quad core are available. +* Cortex-M4F for general-purpose or safety usage. +* Dual display support, providing 24-bit RBG parallel interface and + OLDI/LVDS-4 Lane x2, up to 200MHz pixel clock support for 2K display + resolution. +* Selectable GPU support, up to 8GFLOPS, providing better user experience + in 3D graphic display case and Android. +* PRU(Programmable Realtime Unit) support for customized programmable + interfaces/IOs. +* Integrated Giga-bit Ethernet switch supporting up to a total of two + external ports (TSN capable). +* 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3x eMMC and SD, GPMC for + NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio, + 1x CSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals. +* Dedicated Centralized System Controller for Security, Power, and + Resource Management. +* Multiple low power modes support, ex: Deep sleep, Standby, MCU-only, + enabling battery powered system design. + +More details can be found in the Technical Reference Manual: +https://www.ti.com/lit/pdf/spruiv7 + +Boot Flow: +---------- +Below is the pictorial representation of boot flow: + +.. code-block:: text + + +------------------------------------------------------------------------+ + | TIFS | Main R5 | A53 | + +------------------------------------------------------------------------+ + | +--------+ | | | + | | Reset | | | | + | +--------+ | | | + | : | | | + | +--------+ | +-----------+ | | + | | *ROM* |----------|-->| Reset rls | | | + | +--------+ | +-----------+ | | + | | | | : | | + | | ROM | | : | | + | |services| | : | | + | | | | +-------------+ | | + | | | | | *R5 ROM* | | | + | | | | +-------------+ | | + | | |<---------|---|Load and auth| | | + | | | | | tiboot3.bin | | | + | +--------+ | +-------------+ | | + | | |<---------|---| Load sysfw | | | + | | | | | part to TIFS| | | + | | | | | core | | | + | | | | +-------------+ | | + | | | | : | | + | | | | : | | + | | | | : | | + | | | | +-------------+ | | + | | | | | *R5 SPL* | | | + | | | | +-------------+ | | + | | | | | DDR | | | + | | | | | config | | | + | | | | +-------------+ | | + | | | | | Load | | | + | | | | | tispl.bin | | | + | | | | +-------------+ | | + | | | | | Load R5 | | | + | | | | | firmware | | | + | | | | +-------------+ | | + | | |<---------|---| Start A53 | | | + | | | | | and jump to | | | + | | | | | DM fw image | | | + | | | | +-------------+ | | + | | | | | +-----------+ | + | | |----------|-----------------------|---->| Reset rls | | + | | | | | +-----------+ | + | | TIFS | | | : | + | |Services| | | +-----------+ | + | | |<---------|-----------------------|---->|*ATF/OPTEE*| | + | | | | | +-----------+ | + | | | | | : | + | | | | | +-----------+ | + | | |<---------|-----------------------|---->| *A53 SPL* | | + | | | | | +-----------+ | + | | | | | | Load | | + | | | | | | u-boot.img| | + | | | | | +-----------+ | + | | | | | : | + | | | | | +-----------+ | + | | |<---------|-----------------------|---->| *U-Boot* | | + | | | | | +-----------+ | + | | | | | | prompt | | + | | |----------|-----------------------|-----+-----------+-----| + | +--------+ | | | + | | | | + +------------------------------------------------------------------------+ + +- Here TIFS acts as master and provides all the critical services. R5/A53 + requests TIFS to get these services done as shown in the above diagram. + +Sources: +-------- +1. SYSFW: + Tree: git://git.ti.com/k3-image-gen/k3-image-gen.git + Branch: master + +2. ATF: + Tree: https://github.com/ARM-software/arm-trusted-firmware.git + Branch: master + +3. OPTEE: + Tree: https://github.com/OP-TEE/optee_os.git + Branch: master + +4. U-Boot: + Tree: https://source.denx.de/u-boot/u-boot + Branch: master + +5. TI Linux Firmware: + Tree: git://git.ti.com/processor-firmware/ti-linux-firmware.git + Branch: ti-linux-firmware + +Build procedure: +---------------- +1. ATF: + +.. code-block:: text + + $ make CROSS_COMPILE=aarch64-none-linux-gnu- ARCH=aarch64 PLAT=k3 TARGET_BOARD=lite SPD=opteed + +2. OPTEE: + +.. code-block:: text + + $ make PLATFORM=k3 CFG_ARM64_core=y CROSS_COMPILE=arm-none-linux-gnueabihf- CROSS_COMPILE64=aarch64-none-linux-gnu- + +3. U-Boot: + +* 3.1 R5: + +.. code-block:: text + + $ make ARCH=arm CROSS_COMPILE=arm-none-linux-gnueabihf- am62x_evm_r5_defconfig O=/tmp/r5 + $ make ARCH=arm CROSS_COMPILE=arm-none-linux-gnueabihf- O=/tmp/r5 + $ cd + $ make ARCH=arm CROSS_COMPILE=arm-none-linux-gnueabihf- SOC=am62x SBL=/tmp/r5/spl/u-boot-spl.bin SYSFW_PATH=/ti-sysfw/ti-fs-firmware-am62x-gp.bin + +Use the tiboot3.bin generated from last command + +* 3.2 A53: + +.. code-block:: text + + $ make ARCH=arm CROSS_COMPILE=aarch64-none-linux-gnu- am62x_evm_a53_defconfig O=/tmp/a53 + $ make ARCH=arm CROSS_COMPILE=aarch64-none-linux-gnu- ATF=/build/k3/lite/release/bl31.bin TEE=/out/arm-plat-k3/core/tee-pager_v2.bin DM=/ti-dm/am62xx/ipc_echo_testb_mcu1_0_release_strip.xer5f O=/tmp/a53 + +Target Images +-------------- +Copy the below images to an SD card and boot: + - tiboot3.bin from step 3.1 + - tispl.bin, u-boot.img from 3.2 + +Image formats: +-------------- + +- tiboot3.bin: + +.. code-block:: text + + +-----------------------+ + | X.509 | + | Certificate | + | +-------------------+ | + | | | | + | | R5 | | + | | u-boot-spl.bin | | + | | | | + | +-------------------+ | + | | | | + | |TIFS with board cfg| | + | | | | + | +-------------------+ | + | | | | + | | | | + | | FIT header | | + | | +---------------+ | | + | | | | | | + | | | DTB 1...N | | | + | | +---------------+ | | + | +-------------------+ | + +-----------------------+ + +- tispl.bin + +.. code-block:: text + + +-----------------------+ + | | + | FIT HEADER | + | +-------------------+ | + | | | | + | | A53 ATF | | + | +-------------------+ | + | | | | + | | A53 OPTEE | | + | +-------------------+ | + | | | | + | | R5 DM FW | | + | +-------------------+ | + | | | | + | | A53 SPL | | + | +-------------------+ | + | | | | + | | SPL DTB 1...N | | + | +-------------------+ | + +-----------------------+ diff --git a/doc/board/ti/index.rst b/doc/board/ti/index.rst index 014a097178a..250d9242e82 100644 --- a/doc/board/ti/index.rst +++ b/doc/board/ti/index.rst @@ -8,3 +8,4 @@ Texas Instruments am335x_evm j721e_evm + am62x_sk -- GitLab From 0e1b54247d7e3e69e0af5c4dc7a3b26acf9e8451 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Sat, 11 Jun 2022 20:20:54 +0800 Subject: [PATCH 146/581] imx: drop CONFIG_MXC_UART_BASE Since these boards has CONFIG_DM_SERIAL and/or CONFIG_SPL_DM_SERIAL, the legacy macro no need to be defined. Reviewed-by: Heiko Schocher Reviewed-by: Fabio Estevam Signed-off-by: Peng Fan Acked-by: Soeren Moch Acked-by: Tim Harvey --- include/configs/aristainetos2.h | 2 -- include/configs/imx8mm_evk.h | 2 -- include/configs/imx8mm_venice.h | 3 --- include/configs/imx8mn_bsh_smm_s2_common.h | 4 ---- include/configs/imx8mn_evk.h | 2 -- include/configs/imx8mn_venice.h | 3 --- include/configs/imx8mp_evk.h | 2 -- include/configs/imx8mp_venice.h | 3 --- include/configs/mx7dsabresd.h | 1 - include/configs/somlabs_visionsom_6ull.h | 1 - include/configs/tbs2910.h | 3 --- include/configs/verdin-imx8mm.h | 3 --- include/configs/verdin-imx8mp.h | 3 --- 13 files changed, 32 deletions(-) diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index 026775de7c5..de4f4407abb 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -14,10 +14,8 @@ #define CONFIG_HOSTNAME "aristainetos2" #if (CONFIG_SYS_BOARD_VERSION == 5) -#define CONFIG_MXC_UART_BASE UART2_BASE #define CONSOLE_DEV "ttymxc1" #elif (CONFIG_SYS_BOARD_VERSION == 6) -#define CONFIG_MXC_UART_BASE UART1_BASE #define CONSOLE_DEV "ttymxc0" #endif diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index 983743b5093..6da09deba85 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -57,8 +57,6 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ -#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) - #define CONFIG_FEC_MXC_PHYADDR 0 #endif diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index 595c1074966..7a2ef8f533b 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -90,9 +90,6 @@ #define PHYS_SDRAM_SIZE SZ_4G #define CONFIG_SYS_BOOTM_LEN SZ_256M -/* UART */ -#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) - /* FEC */ #define CONFIG_FEC_MXC_PHYADDR 0 #define FEC_QUIRK_ENET_MAC diff --git a/include/configs/imx8mn_bsh_smm_s2_common.h b/include/configs/imx8mn_bsh_smm_s2_common.h index 5bdbd37e9cb..63f7da740ef 100644 --- a/include/configs/imx8mn_bsh_smm_s2_common.h +++ b/include/configs/imx8mn_bsh_smm_s2_common.h @@ -32,8 +32,4 @@ #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 -#define CONFIG_MXC_UART_BASE UART4_BASE_ADDR - -/* I2C */ - #endif /* __IMX8MN_BSH_SMM_S2_COMMON_H */ diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index 73ba49b0d8f..506d1ffd5a6 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -64,6 +64,4 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ -#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) - #endif diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index 8565ba7fdb1..8c45c8462c2 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -86,9 +86,6 @@ #define PHYS_SDRAM_SIZE SZ_4G #define CONFIG_SYS_BOOTM_LEN SZ_256M -/* UART */ -#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) - /* FEC */ #define CONFIG_FEC_MXC_PHYADDR 0 #define FEC_QUIRK_ENET_MAC diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index 65c1616bca7..465e1cb4a7e 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -69,6 +69,4 @@ #define PHYS_SDRAM_2 0x100000000 #define PHYS_SDRAM_2_SIZE 0xC0000000 /* 3 GB */ -#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) - #endif diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h index e1d33553956..d9baffb3a24 100644 --- a/include/configs/imx8mp_venice.h +++ b/include/configs/imx8mp_venice.h @@ -86,9 +86,6 @@ #define PHYS_SDRAM_SIZE SZ_4G #define CONFIG_SYS_BOOTM_LEN SZ_256M -/* UART */ -#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR - /* FEC */ #define FEC_QUIRK_ENET_MAC diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index 36cef252ea2..a6b8c275fe7 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -12,7 +12,6 @@ #define PHYS_SDRAM_SIZE SZ_1G -#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR #ifdef CONFIG_IMX_BOOTAUX /* Set to QSPI1 A flash at default */ diff --git a/include/configs/somlabs_visionsom_6ull.h b/include/configs/somlabs_visionsom_6ull.h index 98966cfeb91..f1886cb2145 100644 --- a/include/configs/somlabs_visionsom_6ull.h +++ b/include/configs/somlabs_visionsom_6ull.h @@ -16,7 +16,6 @@ /* SPL options */ #include "imx6_spl.h" -#define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configs */ #ifdef CONFIG_FSL_USDHC diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index 1ebe28b7c1b..c355083519f 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -20,9 +20,6 @@ #define CONFIG_SYS_BOOTMAPSZ 0x10000000 -/* Serial console */ -#define CONFIG_MXC_UART_BASE UART1_BASE /* select UART1/UART2 */ - /* Framebuffer */ #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 8f464dd39f0..4fb0d69f579 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -72,9 +72,6 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */ -/* UART */ -#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) - /* ENET */ #define CONFIG_FEC_MXC_PHYADDR 7 diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index 906a20fd840..704a0538a9c 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -89,7 +89,4 @@ #define PHYS_SDRAM_2 0x100000000 #define PHYS_SDRAM_2_SIZE (SZ_4G + SZ_1G) -/* UART */ -#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3) - #endif /* __VERDIN_IMX8MP_H */ -- GitLab From d35130fef8a1c6a43a76fdcc5100d5d794084e93 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Sat, 11 Jun 2022 20:20:55 +0800 Subject: [PATCH 147/581] imx: imx8m[m/n]_beacon: Enable SPL_DM_SERIAL Enable CONFIG_SPL_DM_SERIAL. uart2 and its pinmux was already marked with u-boot,dm-spl. Move preloader_console_init after spl_init to make sure driver model work. Signed-off-by: Peng Fan Tested-by: Adam Ford #imx8mm_beacon Reviewed-by: Fabio Estevam Tested-by: Adam Ford #imx8mn_beacon --- board/beacon/imx8mm/spl.c | 12 ++---------- board/beacon/imx8mn/spl.c | 11 ++--------- configs/imx8mm_beacon_defconfig | 1 - configs/imx8mn_beacon_2g_defconfig | 1 - configs/imx8mn_beacon_defconfig | 1 - include/configs/imx8mm_beacon.h | 2 -- include/configs/imx8mn_beacon.h | 2 -- 7 files changed, 4 insertions(+), 26 deletions(-) diff --git a/board/beacon/imx8mm/spl.c b/board/beacon/imx8mm/spl.c index 12266b22a42..f92b4c3ed0a 100644 --- a/board/beacon/imx8mm/spl.c +++ b/board/beacon/imx8mm/spl.c @@ -59,14 +59,8 @@ int board_fit_config_name_match(const char *name) } #endif -#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1) #define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) -static iomux_v3_cfg_t const uart_pads[] = { - IMX8MM_PAD_UART2_RXD_UART2_RX | MUX_PAD_CTRL(UART_PAD_CTRL), - IMX8MM_PAD_UART2_TXD_UART2_TX | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - static iomux_v3_cfg_t const wdog_pads[] = { IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), }; @@ -79,8 +73,6 @@ int board_early_init_f(void) set_wdog_reset(wdog); - imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); - return 0; } @@ -128,8 +120,6 @@ void board_init_f(ulong dummy) timer_init(); - preloader_console_init(); - /* Clear the BSS. */ memset(__bss_start, 0, __bss_end - __bss_start); @@ -139,6 +129,8 @@ void board_init_f(ulong dummy) hang(); } + preloader_console_init(); + ret = uclass_get_device_by_name(UCLASS_CLK, "clock-controller@30380000", &dev); diff --git a/board/beacon/imx8mn/spl.c b/board/beacon/imx8mn/spl.c index bb51be01c52..4563446db19 100644 --- a/board/beacon/imx8mn/spl.c +++ b/board/beacon/imx8mn/spl.c @@ -68,7 +68,6 @@ int board_fit_config_name_match(const char *name) } #endif -#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1) #define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) #define PWM1_PAD_CTRL (PAD_CTL_FSEL2 | PAD_CTL_DSE6) @@ -76,11 +75,6 @@ static iomux_v3_cfg_t const pwm_pads[] = { IMX8MN_PAD_GPIO1_IO01__PWM1_OUT | MUX_PAD_CTRL(PWM1_PAD_CTRL), }; -static iomux_v3_cfg_t const uart_pads[] = { - IMX8MN_PAD_UART2_RXD__UART2_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), - IMX8MN_PAD_UART2_TXD__UART2_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - static iomux_v3_cfg_t const wdog_pads[] = { IMX8MN_PAD_GPIO1_IO02__WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), }; @@ -95,7 +89,6 @@ int board_early_init_f(void) imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); set_wdog_reset(wdog); - imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); init_uart_clk(1); return 0; @@ -114,14 +107,14 @@ void board_init_f(ulong dummy) timer_init(); - preloader_console_init(); - ret = spl_init(); if (ret) { debug("spl_init() failed: %d\n", ret); hang(); } + preloader_console_init(); + enable_tzc380(); /* DDR initialization */ diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig index 417ece1ef8c..e1acf7e8810 100644 --- a/configs/imx8mm_beacon_defconfig +++ b/configs/imx8mm_beacon_defconfig @@ -125,7 +125,6 @@ CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_CONS_INDEX=2 CONFIG_DM_SERIAL=y -# CONFIG_SPL_DM_SERIAL is not set CONFIG_MXC_UART=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig index 5b9b3715b34..cadef45028d 100644 --- a/configs/imx8mn_beacon_2g_defconfig +++ b/configs/imx8mn_beacon_2g_defconfig @@ -127,7 +127,6 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_RESET=y CONFIG_DM_SERIAL=y -# CONFIG_SPL_DM_SERIAL is not set CONFIG_MXC_UART=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig index b296898d6db..357109e32e5 100644 --- a/configs/imx8mn_beacon_defconfig +++ b/configs/imx8mn_beacon_defconfig @@ -131,7 +131,6 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_RESET=y CONFIG_DM_SERIAL=y -# CONFIG_SPL_DM_SERIAL is not set CONFIG_MXC_UART=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h index 897eac66b14..899d2ec34f9 100644 --- a/include/configs/imx8mm_beacon.h +++ b/include/configs/imx8mm_beacon.h @@ -80,6 +80,4 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ -#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) - #endif diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h index 99cbc1d07c8..cadad050d07 100644 --- a/include/configs/imx8mn_beacon.h +++ b/include/configs/imx8mn_beacon.h @@ -96,6 +96,4 @@ #define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */ #endif -#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) - #endif -- GitLab From 37750505b90ab762e9305d8e49fa4a7c6a24954d Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Sat, 11 Jun 2022 20:20:56 +0800 Subject: [PATCH 148/581] imx: imx8mm-cl-iot-gate: Enable DM_SERIAL Enable CONFIG_DM_SERIAL. uart3 and its pinmux was already marked with u-boot,dm-spl. Move preloader_console_init after spl_early_init to make sure driver model work. Signed-off-by: Peng Fan Reviewed-by: Fabio Estevam --- board/compulab/imx8mm-cl-iot-gate/spl.c | 12 ++---------- configs/imx8mm-cl-iot-gate-optee_defconfig | 1 + configs/imx8mm-cl-iot-gate_defconfig | 1 + include/configs/imx8mm-cl-iot-gate.h | 2 -- 4 files changed, 4 insertions(+), 12 deletions(-) diff --git a/board/compulab/imx8mm-cl-iot-gate/spl.c b/board/compulab/imx8mm-cl-iot-gate/spl.c index 2dc62d6682e..f183704c9d2 100644 --- a/board/compulab/imx8mm-cl-iot-gate/spl.c +++ b/board/compulab/imx8mm-cl-iot-gate/spl.c @@ -83,14 +83,8 @@ int board_fit_config_name_match(const char *name) } #endif -#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1) #define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) -static iomux_v3_cfg_t const uart_pads[] = { - IMX8MM_PAD_UART3_RXD_UART3_RX | MUX_PAD_CTRL(UART_PAD_CTRL), - IMX8MM_PAD_UART3_TXD_UART3_TX | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - static iomux_v3_cfg_t const wdog_pads[] = { IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), }; @@ -103,8 +97,6 @@ int board_early_init_f(void) set_wdog_reset(wdog); - imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); - return 0; } @@ -155,8 +147,6 @@ void board_init_f(ulong dummy) timer_init(); - preloader_console_init(); - /* Clear the BSS. */ memset(__bss_start, 0, __bss_end - __bss_start); @@ -166,6 +156,8 @@ void board_init_f(ulong dummy) hang(); } + preloader_console_init(); + ret = uclass_get_device_by_name(UCLASS_CLK, "clock-controller@30380000", &dev); diff --git a/configs/imx8mm-cl-iot-gate-optee_defconfig b/configs/imx8mm-cl-iot-gate-optee_defconfig index 57ecd7bb3b6..80055912096 100644 --- a/configs/imx8mm-cl-iot-gate-optee_defconfig +++ b/configs/imx8mm-cl-iot-gate-optee_defconfig @@ -121,6 +121,7 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_RTC=y CONFIG_RTC_ABX80X=y +CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig index 67f7576f996..dae7ddc20e0 100644 --- a/configs/imx8mm-cl-iot-gate_defconfig +++ b/configs/imx8mm-cl-iot-gate_defconfig @@ -124,6 +124,7 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_RTC=y CONFIG_RTC_ABX80X=y +CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index 297d56b427f..fc738ed410e 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -134,8 +134,6 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ -#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3) - /* USDHC */ #define CONFIG_SYS_FSL_USDHC_NUM 2 -- GitLab From 4ebb9a589852841c65ae68e2f3f3d160df40d55e Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Sat, 11 Jun 2022 20:20:57 +0800 Subject: [PATCH 149/581] imx: imx8mm_icore: Enable SPL_DM_SERIAL Enable CONFIG_SPL_DM_SERIAL. uart2 and its pinmux was already marked with u-boot,dm-spl. Move preloader_console_init after spl_early_init to make sure driver model work. Signed-off-by: Peng Fan Reviewed-by: Fabio Estevam --- board/engicam/imx8mm/spl.c | 14 +++----------- configs/imx8mm-icore-mx8mm-ctouch2_defconfig | 1 - configs/imx8mm-icore-mx8mm-edimm2.2_defconfig | 1 - include/configs/imx8mm_icore_mx8mm.h | 3 --- 4 files changed, 3 insertions(+), 16 deletions(-) diff --git a/board/engicam/imx8mm/spl.c b/board/engicam/imx8mm/spl.c index f9be769ec59..f75f2dc634c 100644 --- a/board/engicam/imx8mm/spl.c +++ b/board/engicam/imx8mm/spl.c @@ -54,19 +54,11 @@ int board_fit_config_name_match(const char *name) } #endif -#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1) #define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) -static iomux_v3_cfg_t const uart_pads[] = { - IMX8MM_PAD_UART2_RXD_UART2_RX | MUX_PAD_CTRL(UART_PAD_CTRL), - IMX8MM_PAD_UART2_TXD_UART2_TX | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - int board_early_init_f(void) { - imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); - - return 0; + return 0; } void board_init_f(ulong dummy) @@ -81,8 +73,6 @@ void board_init_f(ulong dummy) timer_init(); - preloader_console_init(); - /* Clear the BSS. */ memset(__bss_start, 0, __bss_end - __bss_start); @@ -92,6 +82,8 @@ void board_init_f(ulong dummy) hang(); } + preloader_console_init(); + enable_tzc380(); /* DDR initialization */ diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig index c95ff3e74fb..b831adb1121 100644 --- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig +++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig @@ -87,7 +87,6 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_CONS_INDEX=2 CONFIG_DM_SERIAL=y -# CONFIG_SPL_DM_SERIAL is not set CONFIG_MXC_UART=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig index 62d23949969..614bacbfbf2 100644 --- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig +++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig @@ -87,7 +87,6 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_CONS_INDEX=2 CONFIG_DM_SERIAL=y -# CONFIG_SPL_DM_SERIAL is not set CONFIG_MXC_UART=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index e6642936cba..a3db85004e2 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -54,9 +54,6 @@ #define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */ #define CONFIG_SYS_BOOTM_LEN SZ_256M -/* UART */ -#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) - /* USDHC */ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -- GitLab From 64d118b27f96aed81c2922e20d2b5db9e32a465f Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Sat, 11 Jun 2022 20:20:58 +0800 Subject: [PATCH 150/581] imx: imx8m[m/p]_phycore: Enable DM_SERIAL Enable CONFIG_DM_SERIAL. uart and its pinmux was already marked with u-boot,dm-spl. Move preloader_console_init after spl_early_init to make sure driver model work. Signed-off-by: Peng Fan Tested-by: Teresa Remmet Reviewed-by: Fabio Estevam --- board/phytec/phycore_imx8mm/spl.c | 12 ++---------- board/phytec/phycore_imx8mp/spl.c | 8 -------- configs/phycore-imx8mm_defconfig | 1 + configs/phycore-imx8mp_defconfig | 1 + include/configs/phycore_imx8mm.h | 3 --- include/configs/phycore_imx8mp.h | 3 --- 6 files changed, 4 insertions(+), 24 deletions(-) diff --git a/board/phytec/phycore_imx8mm/spl.c b/board/phytec/phycore_imx8mm/spl.c index d54145ef995..7f24a3affc8 100644 --- a/board/phytec/phycore_imx8mm/spl.c +++ b/board/phytec/phycore_imx8mm/spl.c @@ -57,14 +57,8 @@ int board_fit_config_name_match(const char *name) return 0; } -#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1) #define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE) -static iomux_v3_cfg_t const uart_pads[] = { - IMX8MM_PAD_UART3_RXD_UART3_RX | MUX_PAD_CTRL(UART_PAD_CTRL), - IMX8MM_PAD_UART3_TXD_UART3_TX | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - static iomux_v3_cfg_t const wdog_pads[] = { IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), }; @@ -77,8 +71,6 @@ int board_early_init_f(void) set_wdog_reset(wdog); - imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); - return 0; } @@ -92,8 +84,6 @@ void board_init_f(ulong dummy) board_early_init_f(); - preloader_console_init(); - /* Clear the BSS. */ memset(__bss_start, 0, __bss_end - __bss_start); @@ -103,6 +93,8 @@ void board_init_f(ulong dummy) hang(); } + preloader_console_init(); + enable_tzc380(); /* DDR initialization */ diff --git a/board/phytec/phycore_imx8mp/spl.c b/board/phytec/phycore_imx8mp/spl.c index 19c486e5517..38a581bef57 100644 --- a/board/phytec/phycore_imx8mp/spl.c +++ b/board/phytec/phycore_imx8mp/spl.c @@ -89,14 +89,8 @@ int board_fit_config_name_match(const char *name) return 0; } -#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1) #define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) -static iomux_v3_cfg_t const uart_pads[] = { - MX8MP_PAD_UART1_RXD__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), - MX8MP_PAD_UART1_TXD__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - static iomux_v3_cfg_t const wdog_pads[] = { MX8MP_PAD_GPIO1_IO02__WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), }; @@ -109,8 +103,6 @@ int board_early_init_f(void) set_wdog_reset(wdog); - imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); - return 0; } diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig index b8cda9f64f2..0316d45caeb 100644 --- a/configs/phycore-imx8mm_defconfig +++ b/configs/phycore-imx8mm_defconfig @@ -120,6 +120,7 @@ CONFIG_PINCTRL_IMX8M=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig index d10ab2a22c1..2c53a5ff8c6 100644 --- a/configs/phycore-imx8mp_defconfig +++ b/configs/phycore-imx8mp_defconfig @@ -111,6 +111,7 @@ CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_SPL_POWER_I2C=y +CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h index 1d01104cfe8..a14a076172c 100644 --- a/include/configs/phycore_imx8mm.h +++ b/include/configs/phycore_imx8mm.h @@ -72,7 +72,4 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */ -/* UART */ -#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3) - #endif /* __PHYCORE_IMX8MM_H */ diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h index 75ddcf465f9..9c7331a4167 100644 --- a/include/configs/phycore_imx8mp.h +++ b/include/configs/phycore_imx8mp.h @@ -72,7 +72,4 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 -/* UART */ -#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) - #endif /* __PHYCORE_IMX8MP_H */ -- GitLab From bb9e14cfd0e8adc3e8a5a5d112cd7a4ca5c39472 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Sat, 11 Jun 2022 20:20:59 +0800 Subject: [PATCH 151/581] imx: imx8mn_var_som: enable DM_SERIAL Enable CONFIG_DM_SERIAL. uart and its pinmux was already marked with u-boot,dm-spl. Move preloader_console_init after spl_init to make sure driver model work. Signed-off-by: Peng Fan Reviewed-by: Ariel D'Alessandro Reviewed-by: Fabio Estevam --- board/variscite/imx8mn_var_som/spl.c | 11 ++--------- configs/imx8mn_var_som_defconfig | 1 + include/configs/imx8mn_var_som.h | 2 -- 3 files changed, 3 insertions(+), 11 deletions(-) diff --git a/board/variscite/imx8mn_var_som/spl.c b/board/variscite/imx8mn_var_som/spl.c index 32703c5f0b3..1a8b64fc0a9 100644 --- a/board/variscite/imx8mn_var_som/spl.c +++ b/board/variscite/imx8mn_var_som/spl.c @@ -40,14 +40,8 @@ void spl_board_init(void) puts("Failed to find clock node. Check device tree\n"); } -#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1) #define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) -static const iomux_v3_cfg_t uart_pads[] = { - IMX8MN_PAD_UART4_RXD__UART4_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), - IMX8MN_PAD_UART4_TXD__UART4_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - static const iomux_v3_cfg_t wdog_pads[] = { IMX8MN_PAD_GPIO1_IO02__WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), }; @@ -59,7 +53,6 @@ int board_early_init_f(void) imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); set_wdog_reset(wdog); - imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); init_uart_clk(3); return 0; @@ -78,14 +71,14 @@ void board_init_f(ulong dummy) timer_init(); - preloader_console_init(); - ret = spl_init(); if (ret) { debug("spl_init() failed: %d\n", ret); hang(); } + preloader_console_init(); + /* DDR initialization */ spl_dram_init(); diff --git a/configs/imx8mn_var_som_defconfig b/configs/imx8mn_var_som_defconfig index 898f3f2f9f6..889bcf7dc58 100644 --- a/configs/imx8mn_var_som_defconfig +++ b/configs/imx8mn_var_som_defconfig @@ -96,6 +96,7 @@ CONFIG_SPL_DM_PMIC_BD71837=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_SYSRESET=y CONFIG_SYSRESET_PSCI=y diff --git a/include/configs/imx8mn_var_som.h b/include/configs/imx8mn_var_som.h index ce679098e5c..ccf83128f28 100644 --- a/include/configs/imx8mn_var_som.h +++ b/include/configs/imx8mn_var_som.h @@ -53,8 +53,6 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE SZ_1G /* 1GB DDR */ -#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(4) - /* USDHC */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -- GitLab From 0a16da8079a86a566c62bfb4ec2d12bd9d6cb306 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Sat, 11 Jun 2022 20:21:00 +0800 Subject: [PATCH 152/581] imx: kontron-sl-mx8mm: enable DM_SERIAL Enable CONFIG_DM_SERIAL. uart and its pinmux was already marked with u-boot,dm-spl. Move preloader_console_init after spl_init to make sure driver model work. Signed-off-by: Peng Fan Acked-by: Frieder Schrempf Reviewed-by: Fabio Estevam Tested-by: Frieder Schrempf --- board/kontron/sl-mx8mm/spl.c | 12 ++---------- configs/kontron-sl-mx8mm_defconfig | 1 + include/configs/kontron-sl-mx8mm.h | 1 - 3 files changed, 3 insertions(+), 11 deletions(-) diff --git a/board/kontron/sl-mx8mm/spl.c b/board/kontron/sl-mx8mm/spl.c index 4ef03c8c172..a58a75dc958 100644 --- a/board/kontron/sl-mx8mm/spl.c +++ b/board/kontron/sl-mx8mm/spl.c @@ -32,7 +32,6 @@ enum { #define GPIO_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) #define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE) -#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1) #define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) #define TOUCH_RESET_GPIO IMX_GPIO_NR(3, 23) @@ -51,11 +50,6 @@ static iomux_v3_cfg_t const touch_gpio[] = { IMX8MM_PAD_SAI5_RXD2_GPIO3_IO23 | MUX_PAD_CTRL(GPIO_PAD_CTRL) }; -static iomux_v3_cfg_t const uart_pads[] = { - IMX8MM_PAD_UART3_RXD_UART3_RX | MUX_PAD_CTRL(UART_PAD_CTRL), - IMX8MM_PAD_UART3_TXD_UART3_TX | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - static iomux_v3_cfg_t const wdog_pads[] = { IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), }; @@ -230,8 +224,6 @@ int board_early_init_f(void) set_wdog_reset(wdog); - imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); - return 0; } @@ -273,8 +265,6 @@ void board_init_f(ulong dummy) timer_init(); - preloader_console_init(); - /* Clear the BSS. */ memset(__bss_start, 0, __bss_end - __bss_start); @@ -284,6 +274,8 @@ void board_init_f(ulong dummy) hang(); } + preloader_console_init(); + enable_tzc380(); /* PMIC initialization */ diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig index 0fceb60c612..d508bcbd61e 100644 --- a/configs/kontron-sl-mx8mm_defconfig +++ b/configs/kontron-sl-mx8mm_defconfig @@ -114,6 +114,7 @@ CONFIG_DM_REGULATOR=y CONFIG_DM_RTC=y CONFIG_RTC_RV8803=y CONFIG_CONS_INDEX=2 +CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h index 95b836c5470..c4be62c3721 100644 --- a/include/configs/kontron-sl-mx8mm.h +++ b/include/configs/kontron-sl-mx8mm.h @@ -23,7 +23,6 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 /* Board and environment settings */ -#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3) #define CONFIG_HOSTNAME "kontron-mx8mm" #ifdef CONFIG_USB_EHCI_HCD -- GitLab From ca3369df71d8ff03054965a00968e9ddee607389 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Sat, 11 Jun 2022 20:21:01 +0800 Subject: [PATCH 153/581] configs: drop CONFIG_SPL_ABORT_ON_RAW_IMAGE CONFIG_SPL_RAW_IMAGE_SUPPORT default y has been used to replace CONFIG_SPL_ABORT_ON_RAW_IMAGE for quite some time, so drop CONFIG_SPL_ABORT_ON_RAW_IMAGE. Signed-off-by: Peng Fan --- include/configs/capricorn-common.h | 1 - include/configs/cgtqmx8.h | 1 - include/configs/imx8mm-cl-iot-gate.h | 1 - include/configs/imx8mm_beacon.h | 1 - include/configs/imx8mm_data_modul_edm_sbc.h | 1 - include/configs/imx8mm_evk.h | 1 - include/configs/imx8mm_icore_mx8mm.h | 1 - include/configs/imx8mm_venice.h | 1 - include/configs/imx8mn_beacon.h | 1 - include/configs/imx8mn_evk.h | 1 - include/configs/imx8mn_venice.h | 1 - include/configs/imx8mp_evk.h | 1 - include/configs/imx8mp_rsb3720.h | 1 - include/configs/imx8mp_venice.h | 1 - include/configs/imx8mq_cm.h | 1 - include/configs/imx8mq_evk.h | 1 - include/configs/imx8mq_phanbell.h | 1 - include/configs/imx8qm_mek.h | 1 - include/configs/imx8qxp_mek.h | 1 - include/configs/imx8ulp_evk.h | 1 - include/configs/kontron_pitx_imx8m.h | 1 - include/configs/phycore_imx8mm.h | 1 - include/configs/phycore_imx8mp.h | 1 - include/configs/pico-imx8mq.h | 1 - include/configs/verdin-imx8mm.h | 1 - include/configs/verdin-imx8mp.h | 1 - 26 files changed, 26 deletions(-) diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index 933fcfcfd28..0bbfe0c2174 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -20,7 +20,6 @@ #define CONFIG_MALLOC_F_ADDR 0x00120000 #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif /* CONFIG_SPL_BUILD */ diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h index 0266d6988ce..a8ff0a1317d 100644 --- a/include/configs/cgtqmx8.h +++ b/include/configs/cgtqmx8.h @@ -19,7 +19,6 @@ #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif /* Flat Device Tree Definitions */ diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index fc738ed410e..7135a83e042 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -20,7 +20,6 @@ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x912000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h index 899d2ec34f9..79ed3971225 100644 --- a/include/configs/imx8mm_beacon.h +++ b/include/configs/imx8mm_beacon.h @@ -17,7 +17,6 @@ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h index bb19aa292b8..282b295497c 100644 --- a/include/configs/imx8mm_data_modul_edm_sbc.h +++ b/include/configs/imx8mm_data_modul_edm_sbc.h @@ -18,7 +18,6 @@ #define CONFIG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index 6da09deba85..e4b2544410b 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -19,7 +19,6 @@ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index a3db85004e2..dfe6966c462 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -18,7 +18,6 @@ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ # define CONFIG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ -# define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif /* CONFIG_SPL_BUILD */ #ifndef CONFIG_SPL_BUILD diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index 7a2ef8f533b..8a6cc69b5eb 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -17,7 +17,6 @@ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h index cadad050d07..6faecbde776 100644 --- a/include/configs/imx8mn_beacon.h +++ b/include/configs/imx8mn_beacon.h @@ -18,7 +18,6 @@ #define CONFIG_MALLOC_F_ADDR 0x184000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif /* CONFIG_SPL_BUILD */ diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index 506d1ffd5a6..1396ae1422e 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -18,7 +18,6 @@ #ifdef CONFIG_SPL_BUILD /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index 8c45c8462c2..8ef55aa6eba 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -15,7 +15,6 @@ #ifdef CONFIG_SPL_BUILD /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif #define MEM_LAYOUT_ENV_SETTINGS \ diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index 465e1cb4a7e..618010db9fb 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -18,7 +18,6 @@ #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #define CONFIG_POWER_PCA9450 diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index efff6b95553..1d4c057ccc0 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -32,7 +32,6 @@ * set \ */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #if defined(CONFIG_NAND_BOOT) #define CONFIG_SPL_NAND_MXS diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h index d9baffb3a24..fce87b1657d 100644 --- a/include/configs/imx8mp_venice.h +++ b/include/configs/imx8mp_venice.h @@ -15,7 +15,6 @@ #ifdef CONFIG_SPL_BUILD /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif #define MEM_LAYOUT_ENV_SETTINGS \ diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index a242d5e3e8e..a5d6adfaa4c 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -20,7 +20,6 @@ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x182000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 98ddb06fe33..182f45bb74d 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -21,7 +21,6 @@ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x182000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #define CONFIG_POWER_PFUZE100 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index 1b3c0493ebd..97bd5044501 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -18,7 +18,6 @@ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x182000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif /* ENET Config */ diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index f4d19f87312..b59502e5895 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -20,7 +20,6 @@ #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif #ifdef CONFIG_AHAB_BOOT diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index a6aabc7add7..511f6c8d9bb 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -18,7 +18,6 @@ #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif #ifdef CONFIG_AHAB_BOOT diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index 987069447d5..f9080216f1f 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -16,7 +16,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_MALLOC_F_ADDR 0x22040000 -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ #endif diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index 88aaa55bef5..bf336b99d6a 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -22,7 +22,6 @@ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x182000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #define CONFIG_POWER_PFUZE100 diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h index a14a076172c..f8c3e1f10db 100644 --- a/include/configs/phycore_imx8mm.h +++ b/include/configs/phycore_imx8mm.h @@ -20,7 +20,6 @@ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h index 9c7331a4167..dd0b108a89f 100644 --- a/include/configs/phycore_imx8mp.h +++ b/include/configs/phycore_imx8mp.h @@ -17,7 +17,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #define CONFIG_POWER_PCA9450 diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index 25ad936a06b..a587570ea17 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -18,7 +18,6 @@ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x182000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif /* ENET Config */ diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 4fb0d69f579..afc507b32a3 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -19,7 +19,6 @@ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif #define MEM_LAYOUT_ENV_SETTINGS \ diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index 704a0538a9c..97f537e8e06 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -19,7 +19,6 @@ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x184000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #define CONFIG_POWER_PCA9450 -- GitLab From ee106eda7e93670214f4cf654fbc2b79ef22851d Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Sat, 11 Jun 2022 20:21:02 +0800 Subject: [PATCH 154/581] imx: imx8mm_beacon: enable pinctrl_wdog in SPL Mark pinctrl_wdog as u-boot,dm-spl to clean up board code, The set_wdog_reset() function is not necessary as this is handled by the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property being set. Signed-off-by: Peng Fan --- arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi | 4 ++++ board/beacon/imx8mm/spl.c | 19 ------------------- 2 files changed, 4 insertions(+), 19 deletions(-) diff --git a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi index e33e10ac129..c94b4ffa4c3 100644 --- a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi @@ -73,6 +73,10 @@ u-boot,dm-spl; }; +&pinctrl_wdog { + u-boot,dm-spl; +}; + &uart2 { u-boot,dm-spl; }; diff --git a/board/beacon/imx8mm/spl.c b/board/beacon/imx8mm/spl.c index f92b4c3ed0a..a93cc938784 100644 --- a/board/beacon/imx8mm/spl.c +++ b/board/beacon/imx8mm/spl.c @@ -59,23 +59,6 @@ int board_fit_config_name_match(const char *name) } #endif -#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) - -static iomux_v3_cfg_t const wdog_pads[] = { - IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), -}; - -int board_early_init_f(void) -{ - struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; - - imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); - - set_wdog_reset(wdog); - - return 0; -} - static int power_init_board(void) { struct udevice *dev; @@ -116,8 +99,6 @@ void board_init_f(ulong dummy) init_uart_clk(1); - board_early_init_f(); - timer_init(); /* Clear the BSS. */ -- GitLab From 2d7f40cad589bb2b457f2e6a4f704f4a4967c61b Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Sat, 11 Jun 2022 20:21:03 +0800 Subject: [PATCH 155/581] imx: imx8mm-cl-iot-gate: enable pinctrl_wdog in SPL Mark pinctrl_wdog as u-boot,dm-spl to clean up board code, The set_wdog_reset() function is not necessary as this is handled by the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property being set. Signed-off-by: Peng Fan --- arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi | 4 ++++ board/compulab/imx8mm-cl-iot-gate/spl.c | 19 ------------------- 2 files changed, 4 insertions(+), 19 deletions(-) diff --git a/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi b/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi index 433b02cceee..a7044b63699 100644 --- a/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi @@ -84,6 +84,10 @@ u-boot,dm-spl; }; +&pinctrl_wdog { + u-boot,dm-spl; +}; + &uart3 { u-boot,dm-spl; }; diff --git a/board/compulab/imx8mm-cl-iot-gate/spl.c b/board/compulab/imx8mm-cl-iot-gate/spl.c index f183704c9d2..d2d20269ba0 100644 --- a/board/compulab/imx8mm-cl-iot-gate/spl.c +++ b/board/compulab/imx8mm-cl-iot-gate/spl.c @@ -83,23 +83,6 @@ int board_fit_config_name_match(const char *name) } #endif -#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) - -static iomux_v3_cfg_t const wdog_pads[] = { - IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), -}; - -int board_early_init_f(void) -{ - struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; - - imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); - - set_wdog_reset(wdog); - - return 0; -} - static int power_init_board(void) { struct udevice *dev; @@ -141,8 +124,6 @@ void board_init_f(ulong dummy) arch_cpu_init(); - board_early_init_f(); - init_uart_clk(2); timer_init(); -- GitLab From 333a6fa12f23bce206ccc9b06b00458f26486e26 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Sat, 11 Jun 2022 20:21:04 +0800 Subject: [PATCH 156/581] imx: engicam-imx8mm: drop unused macro Drop unused WDOG macro Signed-off-by: Peng Fan Reviewed-by: Michael Trimarchi --- board/engicam/imx8mm/spl.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/board/engicam/imx8mm/spl.c b/board/engicam/imx8mm/spl.c index f75f2dc634c..1846134a492 100644 --- a/board/engicam/imx8mm/spl.c +++ b/board/engicam/imx8mm/spl.c @@ -54,8 +54,6 @@ int board_fit_config_name_match(const char *name) } #endif -#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) - int board_early_init_f(void) { return 0; -- GitLab From 6692cd967dbf343eb033153431f3d9290ce2d80f Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Sat, 11 Jun 2022 20:21:05 +0800 Subject: [PATCH 157/581] imx: imx8mm/n/p-venice: enable pinctrl_wdog in SPL Mark pinctrl_wdog as u-boot,dm-spl to clean up board code, The set_wdog_reset() function is not necessary as this is handled by the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property being set. Signed-off-by: Peng Fan --- arch/arm/dts/imx8mm-venice-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mn-venice-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mp-venice-u-boot.dtsi | 4 ++++ board/gateworks/venice/spl.c | 29 -------------------------- 4 files changed, 12 insertions(+), 29 deletions(-) diff --git a/arch/arm/dts/imx8mm-venice-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-u-boot.dtsi index c61c6de935f..68978a0413e 100644 --- a/arch/arm/dts/imx8mm-venice-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-venice-u-boot.dtsi @@ -72,3 +72,7 @@ &wdog1 { u-boot,dm-spl; }; + +&pinctrl_wdog { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/imx8mn-venice-u-boot.dtsi b/arch/arm/dts/imx8mn-venice-u-boot.dtsi index 4f23da35676..35819553879 100644 --- a/arch/arm/dts/imx8mn-venice-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-venice-u-boot.dtsi @@ -110,6 +110,10 @@ u-boot,dm-spl; }; +&pinctrl_wdog { + u-boot,dm-spl; +}; + &binman { u-boot-spl-ddr { align = <4>; diff --git a/arch/arm/dts/imx8mp-venice-u-boot.dtsi b/arch/arm/dts/imx8mp-venice-u-boot.dtsi index 37f3edc9817..96b9fa89cf4 100644 --- a/arch/arm/dts/imx8mp-venice-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-venice-u-boot.dtsi @@ -72,3 +72,7 @@ &wdog1 { u-boot,dm-spl; }; + +&pinctrl_wdog { + u-boot,dm-spl; +}; diff --git a/board/gateworks/venice/spl.c b/board/gateworks/venice/spl.c index 6e6ce015f28..4c0feb4381c 100644 --- a/board/gateworks/venice/spl.c +++ b/board/gateworks/venice/spl.c @@ -87,33 +87,6 @@ static void spl_dram_init(int size) ddr_init(dram_timing); } -#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) - -#ifdef CONFIG_IMX8MM -static iomux_v3_cfg_t const wdog_pads[] = { - IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), -}; -#elif CONFIG_IMX8MN -static const iomux_v3_cfg_t wdog_pads[] = { - IMX8MN_PAD_GPIO1_IO02__WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), -}; -#elif CONFIG_IMX8MP -static const iomux_v3_cfg_t wdog_pads[] = { - MX8MP_PAD_GPIO1_IO02__WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), -}; -#endif - -int board_early_init_f(void) -{ - struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; - - imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); - - set_wdog_reset(wdog); - - return 0; -} - /* * Model specific PMIC adjustments necessary prior to DRAM init * @@ -253,8 +226,6 @@ void board_init_f(ulong dummy) init_uart_clk(1); - board_early_init_f(); - timer_init(); /* Clear the BSS. */ -- GitLab From cbda080ae95c029a40a8d6a3641451900dffed9e Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Sat, 11 Jun 2022 20:21:06 +0800 Subject: [PATCH 158/581] imx: imx8mn-beacon: enable pinctrl_wdog in SPL Mark pinctrl_wdog as u-boot,dm-spl to clean up board code, The set_wdog_reset() function is not necessary as this is handled by the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property being set. Signed-off-by: Peng Fan --- arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi | 4 ++++ board/beacon/imx8mn/spl.c | 10 ---------- 2 files changed, 4 insertions(+), 10 deletions(-) diff --git a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi index 69fd69c8d02..eb1dd8debba 100644 --- a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi @@ -132,6 +132,10 @@ u-boot,dm-spl; }; +&pinctrl_wdog { + u-boot,dm-spl; +}; + &binman { u-boot-spl-ddr { filename = "u-boot-spl-ddr.bin"; diff --git a/board/beacon/imx8mn/spl.c b/board/beacon/imx8mn/spl.c index 4563446db19..029f71bc995 100644 --- a/board/beacon/imx8mn/spl.c +++ b/board/beacon/imx8mn/spl.c @@ -68,27 +68,17 @@ int board_fit_config_name_match(const char *name) } #endif -#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) #define PWM1_PAD_CTRL (PAD_CTL_FSEL2 | PAD_CTL_DSE6) static iomux_v3_cfg_t const pwm_pads[] = { IMX8MN_PAD_GPIO1_IO01__PWM1_OUT | MUX_PAD_CTRL(PWM1_PAD_CTRL), }; -static iomux_v3_cfg_t const wdog_pads[] = { - IMX8MN_PAD_GPIO1_IO02__WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), -}; - int board_early_init_f(void) { - struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; - /* Claiming pwm pins prevents LCD flicker during startup*/ imx_iomux_v3_setup_multiple_pads(pwm_pads, ARRAY_SIZE(pwm_pads)); - imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); - set_wdog_reset(wdog); - init_uart_clk(1); return 0; -- GitLab From ae75489c48132efc6c9ece91773a0cd1c7a59e15 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Sat, 11 Jun 2022 20:21:07 +0800 Subject: [PATCH 159/581] imx: imx8mn_var_som: clean up board watchdog code pinctrl_wdog already marked u-boot,dm-spl, so clean up board code. The set_wdog_reset() function is not necessary as this is handled by the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property being set. Signed-off-by: Peng Fan Tested-by: Ariel D'Alessandro --- board/variscite/imx8mn_var_som/spl.c | 11 ----------- 1 file changed, 11 deletions(-) diff --git a/board/variscite/imx8mn_var_som/spl.c b/board/variscite/imx8mn_var_som/spl.c index 1a8b64fc0a9..41e70505774 100644 --- a/board/variscite/imx8mn_var_som/spl.c +++ b/board/variscite/imx8mn_var_som/spl.c @@ -40,19 +40,8 @@ void spl_board_init(void) puts("Failed to find clock node. Check device tree\n"); } -#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) - -static const iomux_v3_cfg_t wdog_pads[] = { - IMX8MN_PAD_GPIO1_IO02__WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), -}; - int board_early_init_f(void) { - struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; - - imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); - set_wdog_reset(wdog); - init_uart_clk(3); return 0; -- GitLab From 722e2b9a2b154cd05495b19b799ab784bfb3ab53 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Sat, 11 Jun 2022 20:21:08 +0800 Subject: [PATCH 160/581] imx: imx8mp_rsb7320a1: enable wdog driver model in SPL Mark wdog1/pinctrl_wdog as u-boot,dm-spl to clean up board code, The set_wdog_reset() function is not necessary as this is handled by the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property being set. Signed-off-by: Peng Fan --- arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi | 8 ++++++++ board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c | 12 ------------ 2 files changed, 8 insertions(+), 12 deletions(-) diff --git a/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi b/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi index 2848b24f655..4419967ee42 100644 --- a/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi @@ -89,6 +89,14 @@ u-boot,dm-spl; }; +&wdog1 { + u-boot,dm-spl; +}; + +&pinctrl_wdog { + u-boot,dm-spl; +}; + &pinctrl_i2c1 { u-boot,dm-spl; }; diff --git a/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c b/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c index f129ebd429b..0a1b2c94161 100644 --- a/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c +++ b/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c @@ -28,12 +28,6 @@ DECLARE_GLOBAL_DATA_PTR; -#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) - -static const iomux_v3_cfg_t wdog_pads[] = { - MX8MP_PAD_GPIO1_IO02__WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), -}; - #ifdef CONFIG_NAND_MXS static void setup_gpmi_nand(void) { @@ -69,12 +63,6 @@ u8 num_image_type_guids = ARRAY_SIZE(fw_images); int board_early_init_f(void) { - struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; - - imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); - - set_wdog_reset(wdog); - init_uart_clk(2); return 0; -- GitLab From 4152ea24f2f2aabcbcfd584c474fb9bb19243bbe Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Sat, 11 Jun 2022 20:21:09 +0800 Subject: [PATCH 161/581] imx: imx8mn-kontron-n801x: enable pinctrl_wdog in SPL Mark pinctrl_wdog as u-boot,dm-spl to clean up board code, The set_wdog_reset() function is not necessary as this is handled by the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property being set. Signed-off-by: Peng Fan Reviewed-by: Frieder Schrempf Tested-by: Frieder Schrempf --- arch/arm/dts/imx8mm-kontron-n801x-u-boot.dtsi | 4 ++++ board/kontron/sl-mx8mm/spl.c | 18 ------------------ 2 files changed, 4 insertions(+), 18 deletions(-) diff --git a/arch/arm/dts/imx8mm-kontron-n801x-u-boot.dtsi b/arch/arm/dts/imx8mm-kontron-n801x-u-boot.dtsi index 22d18e6f1cf..6882513f161 100644 --- a/arch/arm/dts/imx8mm-kontron-n801x-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-kontron-n801x-u-boot.dtsi @@ -126,3 +126,7 @@ &wdog1 { u-boot,dm-spl; }; + +&pinctrl_wdog { + u-boot,dm-spl; +}; diff --git a/board/kontron/sl-mx8mm/spl.c b/board/kontron/sl-mx8mm/spl.c index a58a75dc958..63361f1d2ab 100644 --- a/board/kontron/sl-mx8mm/spl.c +++ b/board/kontron/sl-mx8mm/spl.c @@ -32,7 +32,6 @@ enum { #define GPIO_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) #define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE) -#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) #define TOUCH_RESET_GPIO IMX_GPIO_NR(3, 23) @@ -50,10 +49,6 @@ static iomux_v3_cfg_t const touch_gpio[] = { IMX8MM_PAD_SAI5_RXD2_GPIO3_IO23 | MUX_PAD_CTRL(GPIO_PAD_CTRL) }; -static iomux_v3_cfg_t const wdog_pads[] = { - IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), -}; - int spl_board_boot_device(enum boot_device boot_dev_spl) { switch (boot_dev_spl) { @@ -216,17 +211,6 @@ void spl_board_init(void) printf("Failed to find clock node. Check device tree\n"); } -int board_early_init_f(void) -{ - struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; - - imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); - - set_wdog_reset(wdog); - - return 0; -} - static int power_init_board(void) { struct udevice *dev; @@ -261,8 +245,6 @@ void board_init_f(ulong dummy) init_uart_clk(2); - board_early_init_f(); - timer_init(); /* Clear the BSS. */ -- GitLab From e8780d2380ac51c824c3bb3b1e07aee37babda9e Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Sat, 11 Jun 2022 20:21:10 +0800 Subject: [PATCH 162/581] imx: phycore_imx8mm/p: clean up board watchdog code pinctrl_wdog already marked u-boot,dm-spl, so clean up board code. The set_wdog_reset() function is not necessary as this is handled by the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property being set. Signed-off-by: Peng Fan Tested-by: Teresa Remmet --- board/phytec/phycore_imx8mm/spl.c | 19 ------------------- board/phytec/phycore_imx8mp/spl.c | 19 ------------------- 2 files changed, 38 deletions(-) diff --git a/board/phytec/phycore_imx8mm/spl.c b/board/phytec/phycore_imx8mm/spl.c index 7f24a3affc8..d87ab6d4497 100644 --- a/board/phytec/phycore_imx8mm/spl.c +++ b/board/phytec/phycore_imx8mm/spl.c @@ -57,23 +57,6 @@ int board_fit_config_name_match(const char *name) return 0; } -#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE) - -static iomux_v3_cfg_t const wdog_pads[] = { - IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), -}; - -int board_early_init_f(void) -{ - struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; - - imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); - - set_wdog_reset(wdog); - - return 0; -} - void board_init_f(ulong dummy) { int ret; @@ -82,8 +65,6 @@ void board_init_f(ulong dummy) init_uart_clk(2); - board_early_init_f(); - /* Clear the BSS. */ memset(__bss_start, 0, __bss_end - __bss_start); diff --git a/board/phytec/phycore_imx8mp/spl.c b/board/phytec/phycore_imx8mp/spl.c index 38a581bef57..faed6fc3b76 100644 --- a/board/phytec/phycore_imx8mp/spl.c +++ b/board/phytec/phycore_imx8mp/spl.c @@ -89,23 +89,6 @@ int board_fit_config_name_match(const char *name) return 0; } -#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) - -static iomux_v3_cfg_t const wdog_pads[] = { - MX8MP_PAD_GPIO1_IO02__WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), -}; - -int board_early_init_f(void) -{ - struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; - - imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); - - set_wdog_reset(wdog); - - return 0; -} - void board_init_f(ulong dummy) { int ret; @@ -114,8 +97,6 @@ void board_init_f(ulong dummy) init_uart_clk(0); - board_early_init_f(); - ret = spl_early_init(); if (ret) { debug("spl_early_init() failed: %d\n", ret); -- GitLab From a82abb15a8e8fe2e858a495969612493a65cf2ec Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 20 May 2022 18:24:39 +0200 Subject: [PATCH 163/581] ARM: dts: stm32: add STM32MP13 SoCs support Add initial support of STM32MP13 family based on v5.18-rc2 Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- arch/arm/dts/stm32mp13-pinctrl.dtsi | 123 ++++++++++ arch/arm/dts/stm32mp131.dtsi | 358 ++++++++++++++++++++++++++++ arch/arm/dts/stm32mp133.dtsi | 37 +++ arch/arm/dts/stm32mp135.dtsi | 12 + arch/arm/dts/stm32mp135f-dk.dts | 57 +++++ arch/arm/dts/stm32mp13xc.dtsi | 17 ++ arch/arm/dts/stm32mp13xf.dtsi | 17 ++ board/st/stm32mp1/MAINTAINERS | 1 + 8 files changed, 622 insertions(+) create mode 100644 arch/arm/dts/stm32mp13-pinctrl.dtsi create mode 100644 arch/arm/dts/stm32mp131.dtsi create mode 100644 arch/arm/dts/stm32mp133.dtsi create mode 100644 arch/arm/dts/stm32mp135.dtsi create mode 100644 arch/arm/dts/stm32mp135f-dk.dts create mode 100644 arch/arm/dts/stm32mp13xc.dtsi create mode 100644 arch/arm/dts/stm32mp13xf.dtsi diff --git a/arch/arm/dts/stm32mp13-pinctrl.dtsi b/arch/arm/dts/stm32mp13-pinctrl.dtsi new file mode 100644 index 00000000000..d2472cd8f1d --- /dev/null +++ b/arch/arm/dts/stm32mp13-pinctrl.dtsi @@ -0,0 +1,123 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) STMicroelectronics 2021 - All Rights Reserved + * Author: Alexandre Torgue + */ +#include + +&pinctrl { + sdmmc1_b4_pins_a: sdmmc1-b4-0 { + pins { + pinmux = , /* SDMMC1_D0 */ + , /* SDMMC1_D1 */ + , /* SDMMC1_D2 */ + , /* SDMMC1_D3 */ + ; /* SDMMC1_CMD */ + slew-rate = <1>; + drive-push-pull; + bias-disable; + }; + }; + + sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 { + pins1 { + pinmux = , /* SDMMC1_D0 */ + , /* SDMMC1_D1 */ + , /* SDMMC1_D2 */ + ; /* SDMMC1_D3 */ + slew-rate = <1>; + drive-push-pull; + bias-disable; + }; + pins2 { + pinmux = ; /* SDMMC1_CMD */ + slew-rate = <1>; + drive-open-drain; + bias-disable; + }; + }; + + sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 { + pins { + pinmux = , /* SDMMC1_D0 */ + , /* SDMMC1_D1 */ + , /* SDMMC1_D2 */ + , /* SDMMC1_D3 */ + , /* SDMMC1_CK */ + ; /* SDMMC1_CMD */ + }; + }; + + sdmmc1_clk_pins_a: sdmmc1-clk-0 { + pins { + pinmux = ; /* SDMMC1_CK */ + slew-rate = <1>; + drive-push-pull; + bias-disable; + }; + }; + + sdmmc2_b4_pins_a: sdmmc2-b4-0 { + pins { + pinmux = , /* SDMMC2_D0 */ + , /* SDMMC2_D1 */ + , /* SDMMC2_D2 */ + , /* SDMMC2_D3 */ + ; /* SDMMC2_CMD */ + slew-rate = <1>; + drive-push-pull; + bias-pull-up; + }; + }; + + sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 { + pins1 { + pinmux = , /* SDMMC2_D0 */ + , /* SDMMC2_D1 */ + , /* SDMMC2_D2 */ + ; /* SDMMC2_D3 */ + slew-rate = <1>; + drive-push-pull; + bias-pull-up; + }; + pins2 { + pinmux = ; /* SDMMC2_CMD */ + slew-rate = <1>; + drive-open-drain; + bias-pull-up; + }; + }; + + sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 { + pins { + pinmux = , /* SDMMC2_D0 */ + , /* SDMMC2_D1 */ + , /* SDMMC2_D2 */ + , /* SDMMC2_D3 */ + , /* SDMMC2_CK */ + ; /* SDMMC2_CMD */ + }; + }; + + sdmmc2_clk_pins_a: sdmmc2-clk-0 { + pins { + pinmux = ; /* SDMMC2_CK */ + slew-rate = <1>; + drive-push-pull; + bias-pull-up; + }; + }; + + uart4_pins_a: uart4-0 { + pins1 { + pinmux = ; /* UART4_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = ; /* UART4_RX */ + bias-disable; + }; + }; +}; diff --git a/arch/arm/dts/stm32mp131.dtsi b/arch/arm/dts/stm32mp131.dtsi new file mode 100644 index 00000000000..950e172e455 --- /dev/null +++ b/arch/arm/dts/stm32mp131.dtsi @@ -0,0 +1,358 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) STMicroelectronics 2021 - All Rights Reserved + * Author: Alexandre Torgue for STMicroelectronics. + */ +#include + +/ { + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0>; + }; + }; + + arm-pmu { + compatible = "arm,cortex-a7-pmu"; + interrupts = ; + interrupt-affinity = <&cpu0>; + interrupt-parent = <&intc>; + }; + + clocks { + clk_axi: clk-axi { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <266500000>; + }; + + clk_hse: clk-hse { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + }; + + clk_hsi: clk-hsi { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <64000000>; + }; + + clk_lsi: clk-lsi { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32000>; + }; + + clk_pclk3: clk-pclk3 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <104438965>; + }; + + clk_pclk4: clk-pclk4 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <133250000>; + }; + + clk_pll4_p: clk-pll4_p { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <50000000>; + }; + + clk_pll4_r: clk-pll4_r { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <99000000>; + }; + }; + + intc: interrupt-controller@a0021000 { + compatible = "arm,cortex-a7-gic"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0xa0021000 0x1000>, + <0xa0022000 0x2000>; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupts = , + , + , + ; + interrupt-parent = <&intc>; + always-on; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + ranges; + + uart4: serial@40010000 { + compatible = "st,stm32h7-uart"; + reg = <0x40010000 0x400>; + interrupts = ; + clocks = <&clk_hsi>; + status = "disabled"; + }; + + dma1: dma-controller@48000000 { + compatible = "st,stm32-dma"; + reg = <0x48000000 0x400>; + interrupts = , + , + , + , + , + , + , + ; + clocks = <&clk_pclk4>; + #dma-cells = <4>; + st,mem2mem; + dma-requests = <8>; + }; + + dma2: dma-controller@48001000 { + compatible = "st,stm32-dma"; + reg = <0x48001000 0x400>; + interrupts = , + , + , + , + , + , + , + ; + clocks = <&clk_pclk4>; + #dma-cells = <4>; + st,mem2mem; + dma-requests = <8>; + }; + + dmamux1: dma-router@48002000 { + compatible = "st,stm32h7-dmamux"; + reg = <0x48002000 0x40>; + clocks = <&clk_pclk4>; + #dma-cells = <3>; + dma-masters = <&dma1 &dma2>; + dma-requests = <128>; + dma-channels = <16>; + }; + + exti: interrupt-controller@5000d000 { + compatible = "st,stm32mp13-exti", "syscon"; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x5000d000 0x400>; + }; + + syscfg: syscon@50020000 { + compatible = "st,stm32mp157-syscfg", "syscon"; + reg = <0x50020000 0x400>; + clocks = <&clk_pclk3>; + }; + + mdma: dma-controller@58000000 { + compatible = "st,stm32h7-mdma"; + reg = <0x58000000 0x1000>; + interrupts = ; + clocks = <&clk_pclk4>; + #dma-cells = <5>; + dma-channels = <32>; + dma-requests = <48>; + }; + + sdmmc1: mmc@58005000 { + compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x20253180>; + reg = <0x58005000 0x1000>, <0x58006000 0x1000>; + interrupts = ; + interrupt-names = "cmd_irq"; + clocks = <&clk_pll4_p>; + clock-names = "apb_pclk"; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <130000000>; + status = "disabled"; + }; + + sdmmc2: mmc@58007000 { + compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x20253180>; + reg = <0x58007000 0x1000>, <0x58008000 0x1000>; + interrupts = ; + interrupt-names = "cmd_irq"; + clocks = <&clk_pll4_p>; + clock-names = "apb_pclk"; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <130000000>; + status = "disabled"; + }; + + iwdg2: watchdog@5a002000 { + compatible = "st,stm32mp1-iwdg"; + reg = <0x5a002000 0x400>; + clocks = <&clk_pclk4>, <&clk_lsi>; + clock-names = "pclk", "lsi"; + status = "disabled"; + }; + + bsec: efuse@5c005000 { + compatible = "st,stm32mp13-bsec"; + reg = <0x5c005000 0x400>; + #address-cells = <1>; + #size-cells = <1>; + + part_number_otp: part_number_otp@4 { + reg = <0x4 0x2>; + }; + ts_cal1: calib@5c { + reg = <0x5c 0x2>; + }; + ts_cal2: calib@5e { + reg = <0x5e 0x2>; + }; + }; + + /* + * Break node order to solve dependency probe issue between + * pinctrl and exti. + */ + pinctrl: pin-controller@50002000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,stm32mp135-pinctrl"; + ranges = <0 0x50002000 0x8400>; + pins-are-numbered; + + gpioa: gpio@50002000 { + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x0 0x400>; + clocks = <&clk_pclk4>; + st,bank-name = "GPIOA"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 0 16>; + }; + + gpiob: gpio@50003000 { + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x1000 0x400>; + clocks = <&clk_pclk4>; + st,bank-name = "GPIOB"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 16 16>; + }; + + gpioc: gpio@50004000 { + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x2000 0x400>; + clocks = <&clk_pclk4>; + st,bank-name = "GPIOC"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 32 16>; + }; + + gpiod: gpio@50005000 { + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x3000 0x400>; + clocks = <&clk_pclk4>; + st,bank-name = "GPIOD"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 48 16>; + }; + + gpioe: gpio@50006000 { + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x4000 0x400>; + clocks = <&clk_pclk4>; + st,bank-name = "GPIOE"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 64 16>; + }; + + gpiof: gpio@50007000 { + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x5000 0x400>; + clocks = <&clk_pclk4>; + st,bank-name = "GPIOF"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 80 16>; + }; + + gpiog: gpio@50008000 { + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x6000 0x400>; + clocks = <&clk_pclk4>; + st,bank-name = "GPIOG"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 96 16>; + }; + + gpioh: gpio@50009000 { + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x7000 0x400>; + clocks = <&clk_pclk4>; + st,bank-name = "GPIOH"; + ngpios = <15>; + gpio-ranges = <&pinctrl 0 112 15>; + }; + + gpioi: gpio@5000a000 { + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x8000 0x400>; + clocks = <&clk_pclk4>; + st,bank-name = "GPIOI"; + ngpios = <8>; + gpio-ranges = <&pinctrl 0 128 8>; + }; + }; + }; +}; diff --git a/arch/arm/dts/stm32mp133.dtsi b/arch/arm/dts/stm32mp133.dtsi new file mode 100644 index 00000000000..0fb1386257c --- /dev/null +++ b/arch/arm/dts/stm32mp133.dtsi @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) STMicroelectronics 2021 - All Rights Reserved + * Author: Alexandre Torgue for STMicroelectronics. + */ + +#include "stm32mp131.dtsi" + +/ { + soc { + m_can1: can@4400e000 { + compatible = "bosch,m_can"; + reg = <0x4400e000 0x400>, <0x44011000 0x1400>; + reg-names = "m_can", "message_ram"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + clocks = <&clk_hse>, <&clk_pll4_r>; + clock-names = "hclk", "cclk"; + bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>; + status = "disabled"; + }; + + m_can2: can@4400f000 { + compatible = "bosch,m_can"; + reg = <0x4400f000 0x400>, <0x44011000 0x2800>; + reg-names = "m_can", "message_ram"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + clocks = <&clk_hse>, <&clk_pll4_r>; + clock-names = "hclk", "cclk"; + bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/dts/stm32mp135.dtsi b/arch/arm/dts/stm32mp135.dtsi new file mode 100644 index 00000000000..abf2acd37b4 --- /dev/null +++ b/arch/arm/dts/stm32mp135.dtsi @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) STMicroelectronics 2021 - All Rights Reserved + * Author: Alexandre Torgue for STMicroelectronics. + */ + +#include "stm32mp133.dtsi" + +/ { + soc { + }; +}; diff --git a/arch/arm/dts/stm32mp135f-dk.dts b/arch/arm/dts/stm32mp135f-dk.dts new file mode 100644 index 00000000000..ee100d108ea --- /dev/null +++ b/arch/arm/dts/stm32mp135f-dk.dts @@ -0,0 +1,57 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) STMicroelectronics 2021 - All Rights Reserved + * Author: Alexandre Torgue for STMicroelectronics. + */ + +/dts-v1/; + +#include "stm32mp135.dtsi" +#include "stm32mp13xf.dtsi" +#include "stm32mp13-pinctrl.dtsi" + +/ { + model = "STMicroelectronics STM32MP135F-DK Discovery Board"; + compatible = "st,stm32mp135f-dk", "st,stm32mp135"; + + aliases { + serial0 = &uart4; + }; + + memory@c0000000 { + device_type = "memory"; + reg = <0xc0000000 0x20000000>; + }; + + vdd_sd: vdd-sd { + compatible = "regulator-fixed"; + regulator-name = "vdd_sd"; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <2900000>; + regulator-always-on; + }; +}; + +&iwdg2 { + timeout-sec = <32>; + status = "okay"; +}; + +&sdmmc1 { + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>; + pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_clk_pins_a>; + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; + broken-cd; + disable-wp; + st,neg-edge; + bus-width = <4>; + vmmc-supply = <&vdd_sd>; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pins_a>; + status = "okay"; +}; diff --git a/arch/arm/dts/stm32mp13xc.dtsi b/arch/arm/dts/stm32mp13xc.dtsi new file mode 100644 index 00000000000..fa6889e3059 --- /dev/null +++ b/arch/arm/dts/stm32mp13xc.dtsi @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) STMicroelectronics 2021 - All Rights Reserved + * Author: Alexandre Torgue for STMicroelectronics. + */ + +/ { + soc { + cryp: crypto@54002000 { + compatible = "st,stm32mp1-cryp"; + reg = <0x54002000 0x400>; + interrupts = ; + clocks = <&clk_axi>; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/dts/stm32mp13xf.dtsi b/arch/arm/dts/stm32mp13xf.dtsi new file mode 100644 index 00000000000..fa6889e3059 --- /dev/null +++ b/arch/arm/dts/stm32mp13xf.dtsi @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) STMicroelectronics 2021 - All Rights Reserved + * Author: Alexandre Torgue for STMicroelectronics. + */ + +/ { + soc { + cryp: crypto@54002000 { + compatible = "st,stm32mp1-cryp"; + reg = <0x54002000 0x400>; + interrupts = ; + clocks = <&clk_axi>; + status = "disabled"; + }; + }; +}; diff --git a/board/st/stm32mp1/MAINTAINERS b/board/st/stm32mp1/MAINTAINERS index 64511952698..d57a49820ea 100644 --- a/board/st/stm32mp1/MAINTAINERS +++ b/board/st/stm32mp1/MAINTAINERS @@ -3,6 +3,7 @@ M: Patrick Delaunay L: uboot-stm32@st-md-mailman.stormreply.com (moderated for non-subscribers) T: git https://source.denx.de/u-boot/custodians/u-boot-stm.git S: Maintained +F: arch/arm/dts/stm32mp13* F: arch/arm/dts/stm32mp15* F: board/st/stm32mp1/ F: configs/stm32mp15_defconfig -- GitLab From 2ff0866b45e8069753b8f962e5018ddcdfd7b966 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 20 May 2022 18:24:40 +0200 Subject: [PATCH 164/581] configs: stm32mp1: move SUPPORT_SPL in STM32MP15x The SPL is only supported by STM32MP15x not by all the SOC with STM32MP arch. Only TFABOOT is supported in next products. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard Signed-off-by: Patrick Delaunay --- arch/arm/Kconfig | 1 - arch/arm/mach-stm32mp/Kconfig | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 2f8c7935f86..e0488fd641a 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1956,7 +1956,6 @@ config ARCH_STM32MP select OF_SYSTEM_SETUP select PINCTRL select REGMAP - select SUPPORT_SPL select SYSCON select SYSRESET select SYS_THUMB_BUILD diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index e48f98ba294..be0d74b4acb 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -46,6 +46,7 @@ config STM32MP15x select STM32_RCC select STM32_RESET select STM32_SERIAL + select SUPPORT_SPL select SYS_ARCH_TIMER imply CMD_NVEDIT_INFO help -- GitLab From 3865a7ec9523122c4932d8e8d4b406d60884e8ae Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 20 May 2022 18:24:41 +0200 Subject: [PATCH 165/581] arm: stm32mp: move the get_otp helper function in bsec As the get_otp() helper function in bsec are common for all STM32MP family, move this function in bsec driver Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- arch/arm/mach-stm32mp/bsec.c | 17 +++++++++++++++++ arch/arm/mach-stm32mp/cpu.c | 17 ----------------- arch/arm/mach-stm32mp/include/mach/sys_proto.h | 3 +++ 3 files changed, 20 insertions(+), 17 deletions(-) diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c index 506caa0a31b..c00130b08b3 100644 --- a/arch/arm/mach-stm32mp/bsec.c +++ b/arch/arm/mach-stm32mp/bsec.c @@ -632,3 +632,20 @@ bool bsec_dbgswenable(void) return false; } + +u32 get_otp(int index, int shift, int mask) +{ + int ret; + struct udevice *dev; + u32 otp = 0; + + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_DRIVER_GET(stm32mp_bsec), + &dev); + + if (!ret) + ret = misc_read(dev, STM32_BSEC_SHADOW(index), + &otp, sizeof(otp)); + + return (otp >> shift) & mask; +} diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index 0ad5f307dba..6f44c75515b 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -349,23 +349,6 @@ u32 get_cpu_rev(void) return (read_idc() & DBGMCU_IDC_REV_ID_MASK) >> DBGMCU_IDC_REV_ID_SHIFT; } -static u32 get_otp(int index, int shift, int mask) -{ - int ret; - struct udevice *dev; - u32 otp = 0; - - ret = uclass_get_device_by_driver(UCLASS_MISC, - DM_DRIVER_GET(stm32mp_bsec), - &dev); - - if (!ret) - ret = misc_read(dev, STM32_BSEC_SHADOW(index), - &otp, sizeof(otp)); - - return (otp >> shift) & mask; -} - /* Get Device Part Number (RPN) from OTP */ static u32 get_cpu_rpn(void) { diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h b/arch/arm/mach-stm32mp/include/mach/sys_proto.h index b91f98eb451..dc98f0c5a41 100644 --- a/arch/arm/mach-stm32mp/include/mach/sys_proto.h +++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h @@ -52,3 +52,6 @@ int setup_mac_address(void); /* board power management : configure vddcore according OPP */ void board_vddcore_init(u32 voltage_mv); + +/* helper function: read data from OTP */ +u32 get_otp(int index, int shift, int mask); -- GitLab From 6df271a70f61fd0210af783b63b8ddba3090fd09 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 20 May 2022 18:24:42 +0200 Subject: [PATCH 166/581] arm: stm32mp: move code for STM32MP15x Move code and defines only needed for CONFIG_STM32MP15x in stm32mp15x.c when low level init without TFABOOT is supported. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- arch/arm/mach-stm32mp/Makefile | 2 + arch/arm/mach-stm32mp/cpu.c | 331 +---------------- arch/arm/mach-stm32mp/fdt.c | 8 +- .../arm/mach-stm32mp/include/mach/sys_proto.h | 14 +- arch/arm/mach-stm32mp/spl.c | 1 + arch/arm/mach-stm32mp/stm32mp15x.c | 345 ++++++++++++++++++ 6 files changed, 377 insertions(+), 324 deletions(-) create mode 100644 arch/arm/mach-stm32mp/stm32mp15x.c diff --git a/arch/arm/mach-stm32mp/Makefile b/arch/arm/mach-stm32mp/Makefile index 391b47cf13f..d362104fee4 100644 --- a/arch/arm/mach-stm32mp/Makefile +++ b/arch/arm/mach-stm32mp/Makefile @@ -8,6 +8,8 @@ obj-y += dram_init.o obj-y += syscon.o obj-y += bsec.o +obj-$(CONFIG_STM32MP15x) += stm32mp15x.o + ifdef CONFIG_SPL_BUILD obj-y += spl.o obj-y += tzc400.o diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index 6f44c75515b..b808964d3e4 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -16,7 +16,6 @@ #include #include #include -#include #include #include #include @@ -24,67 +23,6 @@ #include #include -/* RCC register */ -#define RCC_TZCR (STM32_RCC_BASE + 0x00) -#define RCC_DBGCFGR (STM32_RCC_BASE + 0x080C) -#define RCC_BDCR (STM32_RCC_BASE + 0x0140) -#define RCC_MP_APB5ENSETR (STM32_RCC_BASE + 0x0208) -#define RCC_MP_AHB5ENSETR (STM32_RCC_BASE + 0x0210) -#define RCC_BDCR_VSWRST BIT(31) -#define RCC_BDCR_RTCSRC GENMASK(17, 16) -#define RCC_DBGCFGR_DBGCKEN BIT(8) - -/* Security register */ -#define ETZPC_TZMA1_SIZE (STM32_ETZPC_BASE + 0x04) -#define ETZPC_DECPROT0 (STM32_ETZPC_BASE + 0x10) - -#define TZC_GATE_KEEPER (STM32_TZC_BASE + 0x008) -#define TZC_REGION_ATTRIBUTE0 (STM32_TZC_BASE + 0x110) -#define TZC_REGION_ID_ACCESS0 (STM32_TZC_BASE + 0x114) - -#define TAMP_CR1 (STM32_TAMP_BASE + 0x00) - -#define PWR_CR1 (STM32_PWR_BASE + 0x00) -#define PWR_MCUCR (STM32_PWR_BASE + 0x14) -#define PWR_CR1_DBP BIT(8) -#define PWR_MCUCR_SBF BIT(6) - -/* DBGMCU register */ -#define DBGMCU_IDC (STM32_DBGMCU_BASE + 0x00) -#define DBGMCU_APB4FZ1 (STM32_DBGMCU_BASE + 0x2C) -#define DBGMCU_APB4FZ1_IWDG2 BIT(2) -#define DBGMCU_IDC_DEV_ID_MASK GENMASK(11, 0) -#define DBGMCU_IDC_DEV_ID_SHIFT 0 -#define DBGMCU_IDC_REV_ID_MASK GENMASK(31, 16) -#define DBGMCU_IDC_REV_ID_SHIFT 16 - -/* GPIOZ registers */ -#define GPIOZ_SECCFGR 0x54004030 - -/* boot interface from Bootrom - * - boot instance = bit 31:16 - * - boot device = bit 15:0 - */ -#define BOOTROM_PARAM_ADDR 0x2FFC0078 -#define BOOTROM_MODE_MASK GENMASK(15, 0) -#define BOOTROM_MODE_SHIFT 0 -#define BOOTROM_INSTANCE_MASK GENMASK(31, 16) -#define BOOTROM_INSTANCE_SHIFT 16 - -/* Device Part Number (RPN) = OTP_DATA1 lower 8 bits */ -#define RPN_SHIFT 0 -#define RPN_MASK GENMASK(7, 0) - -/* Package = bit 27:29 of OTP16 - * - 100: LBGA448 (FFI) => AA = LFBGA 18x18mm 448 balls p. 0.8mm - * - 011: LBGA354 (LCI) => AB = LFBGA 16x16mm 359 balls p. 0.8mm - * - 010: TFBGA361 (FFC) => AC = TFBGA 12x12mm 361 balls p. 0.5mm - * - 001: TFBGA257 (LCC) => AD = TFBGA 10x10mm 257 balls p. 0.5mm - * - others: Reserved - */ -#define PKG_SHIFT 27 -#define PKG_MASK GENMASK(2, 0) - /* * early TLB into the .data section so that it not get cleared * with 16kB allignment (see TTBR0_BASE_ADDR_MASK) @@ -93,121 +31,6 @@ u8 early_tlb[PGTABLE_SIZE] __section(".data") __aligned(0x4000); struct lmb lmb; -static void security_init(void) -{ - /* Disable the backup domain write protection */ - /* the protection is enable at each reset by hardware */ - /* And must be disable by software */ - setbits_le32(PWR_CR1, PWR_CR1_DBP); - - while (!(readl(PWR_CR1) & PWR_CR1_DBP)) - ; - - /* If RTC clock isn't enable so this is a cold boot then we need - * to reset the backup domain - */ - if (!(readl(RCC_BDCR) & RCC_BDCR_RTCSRC)) { - setbits_le32(RCC_BDCR, RCC_BDCR_VSWRST); - while (!(readl(RCC_BDCR) & RCC_BDCR_VSWRST)) - ; - clrbits_le32(RCC_BDCR, RCC_BDCR_VSWRST); - } - - /* allow non secure access in Write/Read for all peripheral */ - writel(GENMASK(25, 0), ETZPC_DECPROT0); - - /* Open SYSRAM for no secure access */ - writel(0x0, ETZPC_TZMA1_SIZE); - - /* enable TZC1 TZC2 clock */ - writel(BIT(11) | BIT(12), RCC_MP_APB5ENSETR); - - /* Region 0 set to no access by default */ - /* bit 0 / 16 => nsaid0 read/write Enable - * bit 1 / 17 => nsaid1 read/write Enable - * ... - * bit 15 / 31 => nsaid15 read/write Enable - */ - writel(0xFFFFFFFF, TZC_REGION_ID_ACCESS0); - /* bit 30 / 31 => Secure Global Enable : write/read */ - /* bit 0 / 1 => Region Enable for filter 0/1 */ - writel(BIT(0) | BIT(1) | BIT(30) | BIT(31), TZC_REGION_ATTRIBUTE0); - - /* Enable Filter 0 and 1 */ - setbits_le32(TZC_GATE_KEEPER, BIT(0) | BIT(1)); - - /* RCC trust zone deactivated */ - writel(0x0, RCC_TZCR); - - /* TAMP: deactivate the internal tamper - * Bit 23 ITAMP8E: monotonic counter overflow - * Bit 20 ITAMP5E: RTC calendar overflow - * Bit 19 ITAMP4E: HSE monitoring - * Bit 18 ITAMP3E: LSE monitoring - * Bit 16 ITAMP1E: RTC power domain supply monitoring - */ - writel(0x0, TAMP_CR1); - - /* GPIOZ: deactivate the security */ - writel(BIT(0), RCC_MP_AHB5ENSETR); - writel(0x0, GPIOZ_SECCFGR); -} - -/* - * Debug init - */ -static void dbgmcu_init(void) -{ - /* - * Freeze IWDG2 if Cortex-A7 is in debug mode - * done in TF-A for TRUSTED boot and - * DBGMCU access is controlled by BSEC_DENABLE.DBGSWENABLE - */ - if (bsec_dbgswenable()) { - setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN); - setbits_le32(DBGMCU_APB4FZ1, DBGMCU_APB4FZ1_IWDG2); - } -} - -void spl_board_init(void) -{ - struct udevice *dev; - int ret; - - dbgmcu_init(); - - /* force probe of BSEC driver to shadow the upper OTP */ - ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(stm32mp_bsec), &dev); - if (ret) - log_warning("BSEC probe failed: %d\n", ret); -} - -/* get bootmode from ROM code boot context: saved in TAMP register */ -static void update_bootmode(void) -{ - u32 boot_mode; - u32 bootrom_itf = readl(BOOTROM_PARAM_ADDR); - u32 bootrom_device, bootrom_instance; - - /* enable TAMP clock = RTCAPBEN */ - writel(BIT(8), RCC_MP_APB5ENSETR); - - /* read bootrom context */ - bootrom_device = - (bootrom_itf & BOOTROM_MODE_MASK) >> BOOTROM_MODE_SHIFT; - bootrom_instance = - (bootrom_itf & BOOTROM_INSTANCE_MASK) >> BOOTROM_INSTANCE_SHIFT; - boot_mode = - ((bootrom_device << BOOT_TYPE_SHIFT) & BOOT_TYPE_MASK) | - ((bootrom_instance << BOOT_INSTANCE_SHIFT) & - BOOT_INSTANCE_MASK); - - /* save the boot mode in TAMP backup register */ - clrsetbits_le32(TAMP_BOOT_CONTEXT, - TAMP_BOOT_MODE_MASK, - boot_mode << TAMP_BOOT_MODE_SHIFT); -} - u32 get_bootmode(void) { /* read bootmode from TAMP backup register */ @@ -277,25 +100,24 @@ static void early_enable_caches(void) */ int arch_cpu_init(void) { - u32 boot_mode; - early_enable_caches(); /* early armv7 timer init: needed for polling */ timer_init(); - if (IS_ENABLED(CONFIG_SPL_BUILD)) { - security_init(); - update_bootmode(); - } -/* reset copro state in SPL, when used, or in U-Boot */ - if (!IS_ENABLED(CONFIG_SPL) || IS_ENABLED(CONFIG_SPL_BUILD)) { - /* Reset Coprocessor state unless it wakes up from Standby power mode */ - if (!(readl(PWR_MCUCR) & PWR_MCUCR_SBF)) { - writel(TAMP_COPRO_STATE_OFF, TAMP_COPRO_STATE); - writel(0, TAMP_COPRO_RSC_TBL_ADDRESS); - } - } + return 0; +} + +/* weak function for SOC specific initialization */ +__weak void stm32mp_cpu_init(void) +{ +} + +int mach_cpu_init(void) +{ + u32 boot_mode; + + stm32mp_cpu_init(); boot_mode = get_bootmode(); @@ -324,122 +146,6 @@ void enable_caches(void) dcache_enable(); } -static u32 read_idc(void) -{ - /* DBGMCU access is controlled by BSEC_DENABLE.DBGSWENABLE */ - if (bsec_dbgswenable()) { - setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN); - - return readl(DBGMCU_IDC); - } - - if (CONFIG_IS_ENABLED(STM32MP15x)) - return CPU_DEV_STM32MP15; /* STM32MP15x and unknown revision */ - else - return 0x0; -} - -u32 get_cpu_dev(void) -{ - return (read_idc() & DBGMCU_IDC_DEV_ID_MASK) >> DBGMCU_IDC_DEV_ID_SHIFT; -} - -u32 get_cpu_rev(void) -{ - return (read_idc() & DBGMCU_IDC_REV_ID_MASK) >> DBGMCU_IDC_REV_ID_SHIFT; -} - -/* Get Device Part Number (RPN) from OTP */ -static u32 get_cpu_rpn(void) -{ - return get_otp(BSEC_OTP_RPN, RPN_SHIFT, RPN_MASK); -} - -u32 get_cpu_type(void) -{ - return (get_cpu_dev() << 16) | get_cpu_rpn(); -} - -/* Get Package options from OTP */ -u32 get_cpu_package(void) -{ - return get_otp(BSEC_OTP_PKG, PKG_SHIFT, PKG_MASK); -} - -static const char * const soc_type[] = { - "????", - "151C", "151A", "151F", "151D", - "153C", "153A", "153F", "153D", - "157C", "157A", "157F", "157D" -}; - -static const char * const soc_pkg[] = { "??", "AD", "AC", "AB", "AA" }; -static const char * const soc_rev[] = { "?", "A", "B", "Z" }; - -static void get_cpu_string_offsets(unsigned int *type, unsigned int *pkg, - unsigned int *rev) -{ - u32 cpu_type = get_cpu_type(); - u32 ct = cpu_type & ~(BIT(7) | BIT(0)); - u32 cm = ((cpu_type & BIT(7)) >> 6) | (cpu_type & BIT(0)); - u32 cp = get_cpu_package(); - - /* Bits 0 and 7 are the ACDF, 00:C 01:A 10:F 11:D */ - switch (ct) { - case CPU_STM32MP151Cxx: - *type = cm + 1; - break; - case CPU_STM32MP153Cxx: - *type = cm + 5; - break; - case CPU_STM32MP157Cxx: - *type = cm + 9; - break; - default: - *type = 0; - break; - } - - /* Package */ - switch (cp) { - case PKG_AA_LBGA448: - case PKG_AB_LBGA354: - case PKG_AC_TFBGA361: - case PKG_AD_TFBGA257: - *pkg = cp; - break; - default: - *pkg = 0; - break; - } - - /* Revision */ - switch (get_cpu_rev()) { - case CPU_REV1: - *rev = 1; - break; - case CPU_REV2: - *rev = 2; - break; - case CPU_REV2_1: - *rev = 3; - break; - default: - *rev = 0; - break; - } -} - -void get_soc_name(char name[SOC_NAME_SIZE]) -{ - unsigned int type, pkg, rev; - - get_cpu_string_offsets(&type, &pkg, &rev); - - snprintf(name, SOC_NAME_SIZE, "STM32MP%s%s Rev.%s", - soc_type[type], soc_pkg[pkg], soc_rev[rev]); -} - /* used when CONFIG_DISPLAY_CPUINFO is activated */ int print_cpuinfo(void) { @@ -645,15 +351,8 @@ static int setup_serial_number(void) return 0; } -static void setup_soc_type_pkg_rev(void) +__weak void stm32mp_misc_init(void) { - unsigned int type, pkg, rev; - - get_cpu_string_offsets(&type, &pkg, &rev); - - env_set("soc_type", soc_type[type]); - env_set("soc_pkg", soc_pkg[pkg]); - env_set("soc_rev", soc_rev[rev]); } int arch_misc_init(void) @@ -661,7 +360,7 @@ int arch_misc_init(void) setup_boot_mode(); setup_mac_address(); setup_serial_number(); - setup_soc_type_pkg_rev(); + stm32mp_misc_init(); return 0; } diff --git a/arch/arm/mach-stm32mp/fdt.c b/arch/arm/mach-stm32mp/fdt.c index b1a4b765663..7412f0e0299 100644 --- a/arch/arm/mach-stm32mp/fdt.c +++ b/arch/arm/mach-stm32mp/fdt.c @@ -312,16 +312,16 @@ int ft_system_setup(void *blob, struct bd_info *bd) } switch (get_cpu_package()) { - case PKG_AA_LBGA448: + case STM32MP15_PKG_AA_LBGA448: pkg = STM32MP_PKG_AA; break; - case PKG_AB_LBGA354: + case STM32MP15_PKG_AB_LBGA354: pkg = STM32MP_PKG_AB; break; - case PKG_AC_TFBGA361: + case STM32MP15_PKG_AC_TFBGA361: pkg = STM32MP_PKG_AC; break; - case PKG_AD_TFBGA257: + case STM32MP15_PKG_AD_TFBGA257: pkg = STM32MP_PKG_AD; break; default: diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h b/arch/arm/mach-stm32mp/include/mach/sys_proto.h index dc98f0c5a41..8b61135aeba 100644 --- a/arch/arm/mach-stm32mp/include/mach/sys_proto.h +++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h @@ -36,10 +36,12 @@ u32 get_cpu_rev(void); /* Get Package options from OTP */ u32 get_cpu_package(void); -#define PKG_AA_LBGA448 4 -#define PKG_AB_LBGA354 3 -#define PKG_AC_TFBGA361 2 -#define PKG_AD_TFBGA257 1 +/* package used for STM32MP15x */ +#define STM32MP15_PKG_AA_LBGA448 4 +#define STM32MP15_PKG_AB_LBGA354 3 +#define STM32MP15_PKG_AC_TFBGA361 2 +#define STM32MP15_PKG_AD_TFBGA257 1 +#define STM32MP15_PKG_UNKNOWN 0 /* Get SOC name */ #define SOC_NAME_SIZE 20 @@ -53,5 +55,9 @@ int setup_mac_address(void); /* board power management : configure vddcore according OPP */ void board_vddcore_init(u32 voltage_mv); +/* weak function */ +void stm32mp_cpu_init(void); +void stm32mp_misc_init(void); + /* helper function: read data from OTP */ u32 get_otp(int index, int shift, int mask); diff --git a/arch/arm/mach-stm32mp/spl.c b/arch/arm/mach-stm32mp/spl.c index 78fa9d7edd2..19d9fe04e08 100644 --- a/arch/arm/mach-stm32mp/spl.c +++ b/arch/arm/mach-stm32mp/spl.c @@ -190,6 +190,7 @@ void board_init_f(ulong dummy) int ret; arch_cpu_init(); + mach_cpu_init(); ret = spl_early_init(); if (ret) { diff --git a/arch/arm/mach-stm32mp/stm32mp15x.c b/arch/arm/mach-stm32mp/stm32mp15x.c new file mode 100644 index 00000000000..800fad2f436 --- /dev/null +++ b/arch/arm/mach-stm32mp/stm32mp15x.c @@ -0,0 +1,345 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause +/* + * Copyright (C) 2021, STMicroelectronics - All Rights Reserved + */ + +#define LOG_CATEGORY LOGC_ARCH + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* RCC register */ +#define RCC_TZCR (STM32_RCC_BASE + 0x00) +#define RCC_BDCR (STM32_RCC_BASE + 0x0140) +#define RCC_MP_APB5ENSETR (STM32_RCC_BASE + 0x0208) +#define RCC_MP_AHB5ENSETR (STM32_RCC_BASE + 0x0210) +#define RCC_DBGCFGR (STM32_RCC_BASE + 0x080C) + +#define RCC_BDCR_VSWRST BIT(31) +#define RCC_BDCR_RTCSRC GENMASK(17, 16) + +#define RCC_DBGCFGR_DBGCKEN BIT(8) + +/* DBGMCU register */ +#define DBGMCU_IDC (STM32_DBGMCU_BASE + 0x00) +#define DBGMCU_APB4FZ1 (STM32_DBGMCU_BASE + 0x2C) +#define DBGMCU_APB4FZ1_IWDG2 BIT(2) + +/* Security register */ +#define ETZPC_TZMA1_SIZE (STM32_ETZPC_BASE + 0x04) +#define ETZPC_DECPROT0 (STM32_ETZPC_BASE + 0x10) + +#define TZC_GATE_KEEPER (STM32_TZC_BASE + 0x008) +#define TZC_REGION_ATTRIBUTE0 (STM32_TZC_BASE + 0x110) +#define TZC_REGION_ID_ACCESS0 (STM32_TZC_BASE + 0x114) + +#define TAMP_CR1 (STM32_TAMP_BASE + 0x00) + +#define PWR_CR1 (STM32_PWR_BASE + 0x00) +#define PWR_MCUCR (STM32_PWR_BASE + 0x14) +#define PWR_CR1_DBP BIT(8) +#define PWR_MCUCR_SBF BIT(6) + +/* GPIOZ registers */ +#define GPIOZ_SECCFGR 0x54004030 + +/* DBGMCU register */ +#define DBGMCU_IDC (STM32_DBGMCU_BASE + 0x00) +#define DBGMCU_IDC_DEV_ID_MASK GENMASK(11, 0) +#define DBGMCU_IDC_DEV_ID_SHIFT 0 +#define DBGMCU_IDC_REV_ID_MASK GENMASK(31, 16) +#define DBGMCU_IDC_REV_ID_SHIFT 16 + +/* boot interface from Bootrom + * - boot instance = bit 31:16 + * - boot device = bit 15:0 + */ +#define BOOTROM_PARAM_ADDR 0x2FFC0078 +#define BOOTROM_MODE_MASK GENMASK(15, 0) +#define BOOTROM_MODE_SHIFT 0 +#define BOOTROM_INSTANCE_MASK GENMASK(31, 16) +#define BOOTROM_INSTANCE_SHIFT 16 + +/* Device Part Number (RPN) = OTP_DATA1 lower 8 bits */ +#define RPN_SHIFT 0 +#define RPN_MASK GENMASK(7, 0) + +/* Package = bit 27:29 of OTP16 => STM32MP15_PKG defines + * - 100: LBGA448 (FFI) => AA = LFBGA 18x18mm 448 balls p. 0.8mm + * - 011: LBGA354 (LCI) => AB = LFBGA 16x16mm 359 balls p. 0.8mm + * - 010: TFBGA361 (FFC) => AC = TFBGA 12x12mm 361 balls p. 0.5mm + * - 001: TFBGA257 (LCC) => AD = TFBGA 10x10mm 257 balls p. 0.5mm + * - others: Reserved + */ +#define PKG_SHIFT 27 +#define PKG_MASK GENMASK(2, 0) + +static void security_init(void) +{ + /* Disable the backup domain write protection */ + /* the protection is enable at each reset by hardware */ + /* And must be disable by software */ + setbits_le32(PWR_CR1, PWR_CR1_DBP); + + while (!(readl(PWR_CR1) & PWR_CR1_DBP)) + ; + + /* If RTC clock isn't enable so this is a cold boot then we need + * to reset the backup domain + */ + if (!(readl(RCC_BDCR) & RCC_BDCR_RTCSRC)) { + setbits_le32(RCC_BDCR, RCC_BDCR_VSWRST); + while (!(readl(RCC_BDCR) & RCC_BDCR_VSWRST)) + ; + clrbits_le32(RCC_BDCR, RCC_BDCR_VSWRST); + } + + /* allow non secure access in Write/Read for all peripheral */ + writel(GENMASK(25, 0), ETZPC_DECPROT0); + + /* Open SYSRAM for no secure access */ + writel(0x0, ETZPC_TZMA1_SIZE); + + /* enable TZC1 TZC2 clock */ + writel(BIT(11) | BIT(12), RCC_MP_APB5ENSETR); + + /* Region 0 set to no access by default */ + /* bit 0 / 16 => nsaid0 read/write Enable + * bit 1 / 17 => nsaid1 read/write Enable + * ... + * bit 15 / 31 => nsaid15 read/write Enable + */ + writel(0xFFFFFFFF, TZC_REGION_ID_ACCESS0); + /* bit 30 / 31 => Secure Global Enable : write/read */ + /* bit 0 / 1 => Region Enable for filter 0/1 */ + writel(BIT(0) | BIT(1) | BIT(30) | BIT(31), TZC_REGION_ATTRIBUTE0); + + /* Enable Filter 0 and 1 */ + setbits_le32(TZC_GATE_KEEPER, BIT(0) | BIT(1)); + + /* RCC trust zone deactivated */ + writel(0x0, RCC_TZCR); + + /* TAMP: deactivate the internal tamper + * Bit 23 ITAMP8E: monotonic counter overflow + * Bit 20 ITAMP5E: RTC calendar overflow + * Bit 19 ITAMP4E: HSE monitoring + * Bit 18 ITAMP3E: LSE monitoring + * Bit 16 ITAMP1E: RTC power domain supply monitoring + */ + writel(0x0, TAMP_CR1); + + /* GPIOZ: deactivate the security */ + writel(BIT(0), RCC_MP_AHB5ENSETR); + writel(0x0, GPIOZ_SECCFGR); +} + +/* + * Debug init + */ +void dbgmcu_init(void) +{ + /* + * Freeze IWDG2 if Cortex-A7 is in debug mode + * done in TF-A for TRUSTED boot and + * DBGMCU access is controlled by BSEC_DENABLE.DBGSWENABLE + */ + if (bsec_dbgswenable()) { + setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN); + setbits_le32(DBGMCU_APB4FZ1, DBGMCU_APB4FZ1_IWDG2); + } +} + +void spl_board_init(void) +{ + struct udevice *dev; + int ret; + + dbgmcu_init(); + + /* force probe of BSEC driver to shadow the upper OTP */ + ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(stm32mp_bsec), &dev); + if (ret) + log_warning("BSEC probe failed: %d\n", ret); +} + +/* get bootmode from ROM code boot context: saved in TAMP register */ +static void update_bootmode(void) +{ + u32 boot_mode; + u32 bootrom_itf = readl(BOOTROM_PARAM_ADDR); + u32 bootrom_device, bootrom_instance; + + /* enable TAMP clock = RTCAPBEN */ + writel(BIT(8), RCC_MP_APB5ENSETR); + + /* read bootrom context */ + bootrom_device = + (bootrom_itf & BOOTROM_MODE_MASK) >> BOOTROM_MODE_SHIFT; + bootrom_instance = + (bootrom_itf & BOOTROM_INSTANCE_MASK) >> BOOTROM_INSTANCE_SHIFT; + boot_mode = + ((bootrom_device << BOOT_TYPE_SHIFT) & BOOT_TYPE_MASK) | + ((bootrom_instance << BOOT_INSTANCE_SHIFT) & + BOOT_INSTANCE_MASK); + + /* save the boot mode in TAMP backup register */ + clrsetbits_le32(TAMP_BOOT_CONTEXT, + TAMP_BOOT_MODE_MASK, + boot_mode << TAMP_BOOT_MODE_SHIFT); +} + +/* weak function: STM32MP15x mach init for boot without TFA */ +void stm32mp_cpu_init(void) +{ + if (IS_ENABLED(CONFIG_SPL_BUILD)) { + security_init(); + update_bootmode(); + } + + /* reset copro state in SPL, when used, or in U-Boot */ + if (!IS_ENABLED(CONFIG_SPL) || IS_ENABLED(CONFIG_SPL_BUILD)) { + /* Reset Coprocessor state unless it wakes up from Standby power mode */ + if (!(readl(PWR_MCUCR) & PWR_MCUCR_SBF)) { + writel(TAMP_COPRO_STATE_OFF, TAMP_COPRO_STATE); + writel(0, TAMP_COPRO_RSC_TBL_ADDRESS); + } + } +} + +static u32 read_idc(void) +{ + /* DBGMCU access is controlled by BSEC_DENABLE.DBGSWENABLE */ + if (bsec_dbgswenable()) { + setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN); + + return readl(DBGMCU_IDC); + } + + return CPU_DEV_STM32MP15; /* STM32MP15x and unknown revision */ +} + +u32 get_cpu_dev(void) +{ + return (read_idc() & DBGMCU_IDC_DEV_ID_MASK) >> DBGMCU_IDC_DEV_ID_SHIFT; +} + +u32 get_cpu_rev(void) +{ + return (read_idc() & DBGMCU_IDC_REV_ID_MASK) >> DBGMCU_IDC_REV_ID_SHIFT; +} + +/* Get Device Part Number (RPN) from OTP */ +static u32 get_cpu_rpn(void) +{ + return get_otp(BSEC_OTP_RPN, RPN_SHIFT, RPN_MASK); +} + +u32 get_cpu_type(void) +{ + return (get_cpu_dev() << 16) | get_cpu_rpn(); +} + +/* Get Package options from OTP */ +u32 get_cpu_package(void) +{ + return get_otp(BSEC_OTP_PKG, PKG_SHIFT, PKG_MASK); +} + +static const char * const soc_type[] = { + "????", + "151C", "151A", "151F", "151D", + "153C", "153A", "153F", "153D", + "157C", "157A", "157F", "157D" +}; + +static const char * const soc_pkg[] = { "??", "AD", "AC", "AB", "AA" }; +static const char * const soc_rev[] = { "?", "A", "B", "Z" }; + +static void get_cpu_string_offsets(unsigned int *type, unsigned int *pkg, + unsigned int *rev) +{ + u32 cpu_type = get_cpu_type(); + u32 ct = cpu_type & ~(BIT(7) | BIT(0)); + u32 cm = ((cpu_type & BIT(7)) >> 6) | (cpu_type & BIT(0)); + u32 cp = get_cpu_package(); + + /* Bits 0 and 7 are the ACDF, 00:C 01:A 10:F 11:D */ + switch (ct) { + case CPU_STM32MP151Cxx: + *type = cm + 1; + break; + case CPU_STM32MP153Cxx: + *type = cm + 5; + break; + case CPU_STM32MP157Cxx: + *type = cm + 9; + break; + default: + *type = 0; + break; + } + + /* Package */ + switch (cp) { + case STM32MP15_PKG_AA_LBGA448: + case STM32MP15_PKG_AB_LBGA354: + case STM32MP15_PKG_AC_TFBGA361: + case STM32MP15_PKG_AD_TFBGA257: + *pkg = cp; + break; + default: + *pkg = 0; + break; + } + + /* Revision */ + switch (get_cpu_rev()) { + case CPU_REV1: + *rev = 1; + break; + case CPU_REV2: + *rev = 2; + break; + case CPU_REV2_1: + *rev = 3; + break; + default: + *rev = 0; + break; + } +} + +void get_soc_name(char name[SOC_NAME_SIZE]) +{ + unsigned int type, pkg, rev; + + get_cpu_string_offsets(&type, &pkg, &rev); + + snprintf(name, SOC_NAME_SIZE, "STM32MP%s%s Rev.%s", + soc_type[type], soc_pkg[pkg], soc_rev[rev]); +} + +static void setup_soc_type_pkg_rev(void) +{ + unsigned int type, pkg, rev; + + get_cpu_string_offsets(&type, &pkg, &rev); + + env_set("soc_type", soc_type[type]); + env_set("soc_pkg", soc_pkg[pkg]); + env_set("soc_rev", soc_rev[rev]); +} + +/* weak function called in arch_misc_init */ +void stm32mp_misc_init(void) +{ + setup_soc_type_pkg_rev(); +} -- GitLab From 647d319cc9bd001867ec7ff4888462f04063b601 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 20 May 2022 18:24:43 +0200 Subject: [PATCH 167/581] arm: stm32mp: add choice for STM32MP SOC family Add mandatory choice for SOC support in ARCH_STM32MP. This patch is a preliminary step for new SOC introduction in STM32MP family. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- arch/arm/mach-stm32mp/Kconfig | 23 +++++++++++++---------- configs/stm32mp15_basic_defconfig | 4 ++-- configs/stm32mp15_defconfig | 4 ++-- configs/stm32mp15_trusted_defconfig | 4 ++-- 4 files changed, 19 insertions(+), 16 deletions(-) diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index be0d74b4acb..446d3258c94 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -33,6 +33,10 @@ config SYS_MALLOC_LEN config ENV_SIZE default 0x2000 +choice + prompt "Select STMicroelectronics STM32MPxxx Soc" + default STM32MP15x + config STM32MP15x bool "Support STMicroelectronics STM32MP15x Soc" select ARCH_SUPPORT_PSCI @@ -54,11 +58,13 @@ config STM32MP15x STM32MP157, STM32MP153 or STM32MP151 STMicroelectronics MPU with core ARMv7 dual core A7 for STM32MP157/3, monocore for STM32MP151 - target all the STMicroelectronics board with SOC STM32MP1 family +endchoice + +if STM32MP15x config STM32MP15x_STM32IMAGE bool "Support STM32 image for generated U-Boot image" - depends on STM32MP15x && TFABOOT + depends on TFABOOT help Support of STM32 image generation for SOC STM32MP15x for TF-A boot when FIP container is not used @@ -69,7 +75,6 @@ choice config TARGET_ST_STM32MP15x bool "STMicroelectronics STM32MP15x boards" - select STM32MP15x imply BOOTSTAGE imply CMD_BOOTSTAGE imply CMD_CLS if CMD_BMP @@ -84,7 +89,6 @@ config TARGET_ST_STM32MP15x config TARGET_MICROGEA_STM32MP1 bool "Engicam MicroGEA STM32MP1 SOM" - select STM32MP15x imply BOOTSTAGE imply CMD_BOOTSTAGE imply CMD_CLS if CMD_BMP @@ -109,7 +113,6 @@ config TARGET_MICROGEA_STM32MP1 config TARGET_ICORE_STM32MP1 bool "Engicam i.Core STM32MP1 SOM" - select STM32MP15x imply BOOTSTAGE imply CMD_BOOTSTAGE imply CMD_CLS if CMD_BMP @@ -131,12 +134,16 @@ config TARGET_ICORE_STM32MP1 config TARGET_DH_STM32MP1_PDK2 bool "DH STM32MP1 PDK2" - select STM32MP15x help Target the DH PDK2 development kit with STM32MP15x SoM. endchoice +source "board/st/stm32mp1/Kconfig" +source "board/dhelectronics/dh_stm32mp1/Kconfig" +source "board/engicam/stm32mp1/Kconfig" +endif + config SYS_TEXT_BASE default 0xC0100000 @@ -221,8 +228,4 @@ config DEBUG_UART_CLOCK endif source "arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig" -source "board/dhelectronics/dh_stm32mp1/Kconfig" -source "board/engicam/stm32mp1/Kconfig" -source "board/st/stm32mp1/Kconfig" - endif diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 662754128da..240ec239cef 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -9,10 +9,10 @@ CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SPL_MMC=y CONFIG_SPL=y CONFIG_TARGET_ST_STM32MP15x=y +CONFIG_TYPEC_STUSB160X=y +CONFIG_ENV_OFFSET_REDUND=0x2C0000 CONFIG_CMD_STM32KEY=y CONFIG_CMD_STM32PROG=y -CONFIG_ENV_OFFSET_REDUND=0x2C0000 -CONFIG_TYPEC_STUSB160X=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y # CONFIG_ARMV7_VIRT is not set diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index a6398c75278..f8f9806639a 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -6,11 +6,11 @@ CONFIG_ENV_OFFSET=0x480000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_TARGET_ST_STM32MP15x=y +CONFIG_TYPEC_STUSB160X=y +CONFIG_ENV_OFFSET_REDUND=0x4C0000 CONFIG_DDR_CACHEABLE_SIZE=0x10000000 CONFIG_CMD_STM32KEY=y CONFIG_CMD_STM32PROG=y -CONFIG_ENV_OFFSET_REDUND=0x4C0000 -CONFIG_TYPEC_STUSB160X=y # CONFIG_ARMV7_NONSEC is not set CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_SYS_MEMTEST_START=0xc0000000 diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index 626398b9e86..abbec51f378 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -7,11 +7,11 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_STM32MP15x_STM32IMAGE=y CONFIG_TARGET_ST_STM32MP15x=y +CONFIG_TYPEC_STUSB160X=y +CONFIG_ENV_OFFSET_REDUND=0x2C0000 CONFIG_DDR_CACHEABLE_SIZE=0x10000000 CONFIG_CMD_STM32KEY=y CONFIG_CMD_STM32PROG=y -CONFIG_ENV_OFFSET_REDUND=0x2C0000 -CONFIG_TYPEC_STUSB160X=y # CONFIG_ARMV7_NONSEC is not set CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_SYS_MEMTEST_START=0xc0000000 -- GitLab From d8b78fd632743066bcf8bb17e08cc89ccea95019 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 20 May 2022 18:24:44 +0200 Subject: [PATCH 168/581] arm: stm32mp: add sub config Kconfig.15x Add sub Kconfig for each SOC in the STM32 CPU family. It is a preliminary step to introduce a new SOC in the STM32MP family. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- arch/arm/mach-stm32mp/Kconfig | 119 +--------------------------- arch/arm/mach-stm32mp/Kconfig.15x | 119 ++++++++++++++++++++++++++++ configs/stm32mp15_basic_defconfig | 2 +- configs/stm32mp15_defconfig | 4 +- configs/stm32mp15_trusted_defconfig | 4 +- 5 files changed, 125 insertions(+), 123 deletions(-) create mode 100644 arch/arm/mach-stm32mp/Kconfig.15x diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index 446d3258c94..3b4936c3264 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -60,93 +60,6 @@ config STM32MP15x dual core A7 for STM32MP157/3, monocore for STM32MP151 endchoice -if STM32MP15x - -config STM32MP15x_STM32IMAGE - bool "Support STM32 image for generated U-Boot image" - depends on TFABOOT - help - Support of STM32 image generation for SOC STM32MP15x - for TF-A boot when FIP container is not used - -choice - prompt "STM32MP15x board select" - optional - -config TARGET_ST_STM32MP15x - bool "STMicroelectronics STM32MP15x boards" - imply BOOTSTAGE - imply CMD_BOOTSTAGE - imply CMD_CLS if CMD_BMP - imply DISABLE_CONSOLE - imply PRE_CONSOLE_BUFFER - imply SILENT_CONSOLE - help - target the STMicroelectronics board with SOC STM32MP15x - managed by board/st/stm32mp1: - Evalulation board (EV1) or Discovery board (DK1 and DK2). - The difference between board are managed with devicetree - -config TARGET_MICROGEA_STM32MP1 - bool "Engicam MicroGEA STM32MP1 SOM" - imply BOOTSTAGE - imply CMD_BOOTSTAGE - imply CMD_CLS if CMD_BMP - imply DISABLE_CONSOLE - imply PRE_CONSOLE_BUFFER - imply SILENT_CONSOLE - help - MicroGEA STM32MP1 is a STM32MP157A based Micro SOM. - - MicroGEA STM32MP1 MicroDev 2.0: - * MicroDev 2.0 is a general purpose miniature carrier board with CAN, - LTE and LVDS panel interfaces. - * MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board - for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board. - - MicroGEA STM32MP1 MicroDev 2.0 7" OF: - * 7" OF is a capacitive touch 7" Open Frame panel solutions with LVDS - panel and toucscreen. - * MicroGEA STM32MP1 needs to mount on top of MicroDev 2.0 board with - pluged 7" OF for creating complete MicroGEA STM32MP1 MicroDev 2.0 7" - Open Frame Solution board. - -config TARGET_ICORE_STM32MP1 - bool "Engicam i.Core STM32MP1 SOM" - imply BOOTSTAGE - imply CMD_BOOTSTAGE - imply CMD_CLS if CMD_BMP - imply DISABLE_CONSOLE - imply PRE_CONSOLE_BUFFER - imply SILENT_CONSOLE - help - i.Core STM32MP1 is an EDIMM SOM based on STM32MP157A. - - i.Core STM32MP1 EDIMM2.2: - * EDIMM2.2 is a Form Factor Capacitive Evaluation Board. - * i.Core STM32MP1 needs to mount on top of EDIMM2.2 for - creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit. - - i.Core STM32MP1 C.TOUCH 2.0 - * C.TOUCH 2.0 is a general purpose Carrier board. - * i.Core STM32MP1 needs to mount on top of this Carrier board - for creating complete i.Core STM32MP1 C.TOUCH 2.0 board. - -config TARGET_DH_STM32MP1_PDK2 - bool "DH STM32MP1 PDK2" - help - Target the DH PDK2 development kit with STM32MP15x SoM. - -endchoice - -source "board/st/stm32mp1/Kconfig" -source "board/dhelectronics/dh_stm32mp1/Kconfig" -source "board/engicam/stm32mp1/Kconfig" -endif - -config SYS_TEXT_BASE - default 0xC0100000 - config NR_DRAM_BANKS default 1 @@ -195,37 +108,7 @@ config CMD_STM32KEY This command is used to evaluate the secure boot on stm32mp SOC, it is deactivated by default in real products. -config PRE_CON_BUF_ADDR - default 0xC02FF000 - -config PRE_CON_BUF_SZ - default 4096 - -config BOOTSTAGE_STASH_ADDR - default 0xC3000000 - -if BOOTCOUNT_GENERIC -config SYS_BOOTCOUNT_SINGLEWORD - default y - -# TAMP_BOOTCOUNT = TAMP_BACKUP_REGISTER(21) -config SYS_BOOTCOUNT_ADDR - default 0x5C00A154 -endif - -if DEBUG_UART - -config DEBUG_UART_BOARD_INIT - default y - -# debug on UART4 by default -config DEBUG_UART_BASE - default 0x40010000 - -# clock source is HSI on reset -config DEBUG_UART_CLOCK - default 64000000 -endif +source "arch/arm/mach-stm32mp/Kconfig.15x" source "arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig" endif diff --git a/arch/arm/mach-stm32mp/Kconfig.15x b/arch/arm/mach-stm32mp/Kconfig.15x new file mode 100644 index 00000000000..19f161cf5c1 --- /dev/null +++ b/arch/arm/mach-stm32mp/Kconfig.15x @@ -0,0 +1,119 @@ +if STM32MP15x + +config STM32MP15x_STM32IMAGE + bool "Support STM32 image for generated U-Boot image" + depends on TFABOOT + help + Support of STM32 image generation for SOC STM32MP15x + for TF-A boot when FIP container is not used + +choice + prompt "STM32MP15x board select" + optional + +config TARGET_ST_STM32MP15x + bool "STMicroelectronics STM32MP15x boards" + imply BOOTSTAGE + imply CMD_BOOTSTAGE + imply CMD_CLS if CMD_BMP + imply DISABLE_CONSOLE + imply PRE_CONSOLE_BUFFER + imply SILENT_CONSOLE + help + target the STMicroelectronics board with SOC STM32MP15x + managed by board/st/stm32mp1: + Evalulation board (EV1) or Discovery board (DK1 and DK2). + The difference between board are managed with devicetree + +config TARGET_DH_STM32MP1_PDK2 + bool "DH STM32MP1 PDK2" + help + Target the DH PDK2 development kit with STM32MP15x SoM. + +config TARGET_MICROGEA_STM32MP1 + bool "Engicam MicroGEA STM32MP1 SOM" + imply BOOTSTAGE + imply CMD_BOOTSTAGE + imply CMD_CLS if CMD_BMP + imply DISABLE_CONSOLE + imply PRE_CONSOLE_BUFFER + imply SILENT_CONSOLE + help + MicroGEA STM32MP1 is a STM32MP157A based Micro SOM. + + MicroGEA STM32MP1 MicroDev 2.0: + * MicroDev 2.0 is a general purpose miniature carrier board with CAN, + LTE and LVDS panel interfaces. + * MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board + for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board. + + MicroGEA STM32MP1 MicroDev 2.0 7" OF: + * 7" OF is a capacitive touch 7" Open Frame panel solutions with LVDS + panel and toucscreen. + * MicroGEA STM32MP1 needs to mount on top of MicroDev 2.0 board with + pluged 7" OF for creating complete MicroGEA STM32MP1 MicroDev 2.0 7" + Open Frame Solution board. + +config TARGET_ICORE_STM32MP1 + bool "Engicam i.Core STM32MP1 SOM" + imply BOOTSTAGE + imply CMD_BOOTSTAGE + imply CMD_CLS if CMD_BMP + imply DISABLE_CONSOLE + imply PRE_CONSOLE_BUFFER + imply SILENT_CONSOLE + help + i.Core STM32MP1 is an EDIMM SOM based on STM32MP157A. + + i.Core STM32MP1 EDIMM2.2: + * EDIMM2.2 is a Form Factor Capacitive Evaluation Board. + * i.Core STM32MP1 needs to mount on top of EDIMM2.2 for + creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit. + + i.Core STM32MP1 C.TOUCH 2.0 + * C.TOUCH 2.0 is a general purpose Carrier board. + * i.Core STM32MP1 needs to mount on top of this Carrier board + for creating complete i.Core STM32MP1 C.TOUCH 2.0 board. + +endchoice + +config SYS_TEXT_BASE + default 0xC0100000 + +config PRE_CON_BUF_ADDR + default 0xC02FF000 + +config PRE_CON_BUF_SZ + default 4096 + +config BOOTSTAGE_STASH_ADDR + default 0xC3000000 + +if BOOTCOUNT_GENERIC +config SYS_BOOTCOUNT_SINGLEWORD + default y + +# TAMP_BOOTCOUNT = TAMP_BACKUP_REGISTER(21) +config SYS_BOOTCOUNT_ADDR + default 0x5C00A154 +endif + +if DEBUG_UART + +config DEBUG_UART_BOARD_INIT + default y + +# debug on UART4 by default +config DEBUG_UART_BASE + default 0x40010000 + +# clock source is HSI on reset +config DEBUG_UART_CLOCK + default 64000000 +endif + +source "board/st/stm32mp1/Kconfig" +source "board/dhelectronics/dh_stm32mp1/Kconfig" +source "board/engicam/stm32mp1/Kconfig" + +endif diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 240ec239cef..a08bcdeb4bc 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -8,10 +8,10 @@ CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SPL_MMC=y CONFIG_SPL=y +CONFIG_CMD_STM32KEY=y CONFIG_TARGET_ST_STM32MP15x=y CONFIG_TYPEC_STUSB160X=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 -CONFIG_CMD_STM32KEY=y CONFIG_CMD_STM32PROG=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index f8f9806639a..70aff8f8471 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -5,11 +5,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_ENV_OFFSET=0x480000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" +CONFIG_DDR_CACHEABLE_SIZE=0x10000000 +CONFIG_CMD_STM32KEY=y CONFIG_TARGET_ST_STM32MP15x=y CONFIG_TYPEC_STUSB160X=y CONFIG_ENV_OFFSET_REDUND=0x4C0000 -CONFIG_DDR_CACHEABLE_SIZE=0x10000000 -CONFIG_CMD_STM32KEY=y CONFIG_CMD_STM32PROG=y # CONFIG_ARMV7_NONSEC is not set CONFIG_SYS_LOAD_ADDR=0xc2000000 diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index abbec51f378..21ddf9d38d6 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -5,12 +5,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_ENV_OFFSET=0x280000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" +CONFIG_DDR_CACHEABLE_SIZE=0x10000000 +CONFIG_CMD_STM32KEY=y CONFIG_STM32MP15x_STM32IMAGE=y CONFIG_TARGET_ST_STM32MP15x=y CONFIG_TYPEC_STUSB160X=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 -CONFIG_DDR_CACHEABLE_SIZE=0x10000000 -CONFIG_CMD_STM32KEY=y CONFIG_CMD_STM32PROG=y # CONFIG_ARMV7_NONSEC is not set CONFIG_SYS_LOAD_ADDR=0xc2000000 -- GitLab From 741090c5107c798ce3b8cd8e62edaf4727e93c6f Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 20 May 2022 18:24:45 +0200 Subject: [PATCH 169/581] arm: stm32mp: add CONFIG_STM32MP15_PWR Add config CONFIG_STM32MP15_PWR to handle the access to regulators managed by the PWR driver defined in pwr_regulator.c This driver is only used in U-Boot by STM32MP15x family. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- arch/arm/mach-stm32mp/Kconfig.15x | 16 ++++++++++++++++ arch/arm/mach-stm32mp/Makefile | 2 +- 2 files changed, 17 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-stm32mp/Kconfig.15x b/arch/arm/mach-stm32mp/Kconfig.15x index 19f161cf5c1..d516270292a 100644 --- a/arch/arm/mach-stm32mp/Kconfig.15x +++ b/arch/arm/mach-stm32mp/Kconfig.15x @@ -77,6 +77,22 @@ config TARGET_ICORE_STM32MP1 endchoice +config STM32MP15_PWR + bool "Enable driver for STM32MP15x PWR" + depends on DM_REGULATOR && DM_PMIC + default y + help + This config enables implementation of driver-model pmic and + regulator uclass features for access to STM32MP15x PWR. + +config SPL_STM32MP15_PWR + bool "Enable driver for STM32MP15x PWR in SPL" + depends on SPL && SPL_DM_REGULATOR && SPL_DM_PMIC + default y + help + This config enables implementation of driver-model pmic and + regulator uclass features for access to STM32MP15x PWR in SPL. + config SYS_TEXT_BASE default 0xC0100000 diff --git a/arch/arm/mach-stm32mp/Makefile b/arch/arm/mach-stm32mp/Makefile index d362104fee4..0ffec6e02fa 100644 --- a/arch/arm/mach-stm32mp/Makefile +++ b/arch/arm/mach-stm32mp/Makefile @@ -21,5 +21,5 @@ obj-$(CONFIG_ARMV7_PSCI) += psci.o obj-$(CONFIG_TFABOOT) += boot_params.o endif -obj-$(CONFIG_$(SPL_)DM_REGULATOR) += pwr_regulator.o +obj-$(CONFIG_$(SPL_)STM32MP15_PWR) += pwr_regulator.o obj-$(CONFIG_OF_SYSTEM_SETUP) += fdt.o -- GitLab From 960debbe3c55b111f95a60fa69f47c233a960666 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 20 May 2022 18:24:46 +0200 Subject: [PATCH 170/581] arm: stm32mp: add support of STM32MP13x Introduce the code in mach-stm32mp and the configuration file stm32mp13_defconfig for the new STM32MP family. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- arch/arm/mach-stm32mp/Kconfig | 21 +++- arch/arm/mach-stm32mp/Kconfig.13x | 57 +++++++++ arch/arm/mach-stm32mp/Makefile | 1 + arch/arm/mach-stm32mp/cpu.c | 3 + arch/arm/mach-stm32mp/fdt.c | 3 + arch/arm/mach-stm32mp/include/mach/stm32.h | 26 ++++ .../arm/mach-stm32mp/include/mach/sys_proto.h | 16 ++- arch/arm/mach-stm32mp/stm32mp13x.c | 115 ++++++++++++++++++ board/st/stm32mp1/Kconfig | 15 +++ board/st/stm32mp1/MAINTAINERS | 2 + configs/stm32mp15_basic_defconfig | 2 +- configs/stm32mp15_defconfig | 2 +- configs/stm32mp15_trusted_defconfig | 2 +- include/configs/stm32mp13_common.h | 100 +++++++++++++++ include/configs/stm32mp13_st_common.h | 17 +++ include/configs/stm32mp15_common.h | 2 +- 16 files changed, 378 insertions(+), 6 deletions(-) create mode 100644 arch/arm/mach-stm32mp/Kconfig.13x create mode 100644 arch/arm/mach-stm32mp/stm32mp13x.c create mode 100644 include/configs/stm32mp13_common.h create mode 100644 include/configs/stm32mp13_st_common.h diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index 3b4936c3264..db47baba6d1 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -37,6 +37,24 @@ choice prompt "Select STMicroelectronics STM32MPxxx Soc" default STM32MP15x +config STM32MP13x + bool "Support STMicroelectronics STM32MP13x Soc" + select ARM_SMCCC + select CPU_V7A + select CPU_V7_HAS_NONSEC + select CPU_V7_HAS_VIRT + select OF_BOARD + select OF_BOARD_SETUP + select PINCTRL_STM32 + select STM32_RCC + select STM32_RESET + select STM32_SERIAL + select SYS_ARCH_TIMER + imply CMD_NVEDIT_INFO + help + support of STMicroelectronics SOC STM32MP13x family + STMicroelectronics MPU with core ARMv7 + config STM32MP15x bool "Support STMicroelectronics STM32MP15x Soc" select ARCH_SUPPORT_PSCI @@ -85,7 +103,7 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2 config STM32_ETZPC bool "STM32 Extended TrustZone Protection" - depends on STM32MP15x + depends on STM32MP15x || STM32MP13x default y imply BOOTP_SERVERIP help @@ -108,6 +126,7 @@ config CMD_STM32KEY This command is used to evaluate the secure boot on stm32mp SOC, it is deactivated by default in real products. +source "arch/arm/mach-stm32mp/Kconfig.13x" source "arch/arm/mach-stm32mp/Kconfig.15x" source "arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig" diff --git a/arch/arm/mach-stm32mp/Kconfig.13x b/arch/arm/mach-stm32mp/Kconfig.13x new file mode 100644 index 00000000000..5fc000986e1 --- /dev/null +++ b/arch/arm/mach-stm32mp/Kconfig.13x @@ -0,0 +1,57 @@ +if STM32MP13x + +choice + prompt "STM32MP13x board select" + optional + +config TARGET_ST_STM32MP13x + bool "STMicroelectronics STM32MP13x boards" + imply BOOTSTAGE + imply CMD_BOOTSTAGE + imply CMD_CLS if CMD_BMP + imply DISABLE_CONSOLE + imply PRE_CONSOLE_BUFFER + imply SILENT_CONSOLE + help + target the STMicroelectronics board with SOC STM32MP13x + managed by board/st/stm32mp1. + The difference between board are managed with devicetree + +endchoice + +config SYS_TEXT_BASE + default 0xC0000000 + +config PRE_CON_BUF_ADDR + default 0xC0800000 + +config PRE_CON_BUF_SZ + default 4096 + +config BOOTSTAGE_STASH_ADDR + default 0xC3000000 + +if BOOTCOUNT_GENERIC +config SYS_BOOTCOUNT_SINGLEWORD + default y + +# TAMP_BOOTCOUNT = TAMP_BACKUP_REGISTER(31) +config SYS_BOOTCOUNT_ADDR + default 0x5C00A17C +endif + +if DEBUG_UART + +# debug on UART4 by default +config DEBUG_UART_BASE + default 0x40010000 + +# clock source is HSI on reset +config DEBUG_UART_CLOCK + default 48000000 if STM32_FPGA + default 64000000 +endif + +source "board/st/stm32mp1/Kconfig" + +endif diff --git a/arch/arm/mach-stm32mp/Makefile b/arch/arm/mach-stm32mp/Makefile index 0ffec6e02fa..1db9057e049 100644 --- a/arch/arm/mach-stm32mp/Makefile +++ b/arch/arm/mach-stm32mp/Makefile @@ -8,6 +8,7 @@ obj-y += dram_init.o obj-y += syscon.o obj-y += bsec.o +obj-$(CONFIG_STM32MP13x) += stm32mp13x.o obj-$(CONFIG_STM32MP15x) += stm32mp15x.o ifdef CONFIG_SPL_BUILD diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index b808964d3e4..240960ada49 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -52,8 +52,11 @@ void dram_bank_mmu_setup(int bank) enum dcache_option option; if (IS_ENABLED(CONFIG_SPL_BUILD)) { +/* STM32_SYSRAM_BASE exist only when SPL is supported */ +#ifdef CONFIG_SPL start = ALIGN_DOWN(STM32_SYSRAM_BASE, MMU_SECTION_SIZE); size = ALIGN(STM32_SYSRAM_SIZE, MMU_SECTION_SIZE); +#endif } else if (gd->flags & GD_FLG_RELOC) { /* bd->bi_dram is available only after relocation */ start = bd->bi_dram[bank].start; diff --git a/arch/arm/mach-stm32mp/fdt.c b/arch/arm/mach-stm32mp/fdt.c index 7412f0e0299..687543e712b 100644 --- a/arch/arm/mach-stm32mp/fdt.c +++ b/arch/arm/mach-stm32mp/fdt.c @@ -259,6 +259,9 @@ int ft_system_setup(void *blob, struct bd_info *bd) u32 pkg, cpu; char name[SOC_NAME_SIZE]; + if (IS_ENABLED(CONFIG_STM32MP13x)) + return 0; + soc = fdt_path_offset(blob, "/soc"); /* when absent, nothing to do */ if (soc == -FDT_ERR_NOTFOUND) diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h b/arch/arm/mach-stm32mp/include/mach/stm32.h index 47e88fc3dcd..cdb58fd40ec 100644 --- a/arch/arm/mach-stm32mp/include/mach/stm32.h +++ b/arch/arm/mach-stm32mp/include/mach/stm32.h @@ -17,7 +17,9 @@ #define STM32_RCC_BASE 0x50000000 #define STM32_PWR_BASE 0x50001000 #define STM32_SYSCFG_BASE 0x50020000 +#ifdef CONFIG_STM32MP15x #define STM32_DBGMCU_BASE 0x50081000 +#endif #define STM32_FMC2_BASE 0x58002000 #define STM32_DDRCTRL_BASE 0x5A003000 #define STM32_DDRPHYC_BASE 0x5A004000 @@ -26,8 +28,14 @@ #define STM32_STGEN_BASE 0x5C008000 #define STM32_TAMP_BASE 0x5C00A000 +#ifdef CONFIG_STM32MP15x #define STM32_USART1_BASE 0x5C000000 #define STM32_USART2_BASE 0x4000E000 +#endif +#ifdef CONFIG_STM32MP13x +#define STM32_USART1_BASE 0x4c000000 +#define STM32_USART2_BASE 0x4c001000 +#endif #define STM32_USART3_BASE 0x4000F000 #define STM32_UART4_BASE 0x40010000 #define STM32_UART5_BASE 0x40011000 @@ -39,8 +47,10 @@ #define STM32_SDMMC2_BASE 0x58007000 #define STM32_SDMMC3_BASE 0x48004000 +#ifdef CONFIG_STM32MP15x #define STM32_SYSRAM_BASE 0x2FFC0000 #define STM32_SYSRAM_SIZE SZ_256K +#endif #define STM32_DDR_BASE 0xC0000000 #define STM32_DDR_SIZE SZ_1G @@ -98,6 +108,8 @@ enum boot_device { /* TAMP registers */ #define TAMP_BACKUP_REGISTER(x) (STM32_TAMP_BASE + 0x100 + 4 * x) + +#ifdef CONFIG_STM32MP15x #define TAMP_BACKUP_MAGIC_NUMBER TAMP_BACKUP_REGISTER(4) #define TAMP_BACKUP_BRANCH_ADDRESS TAMP_BACKUP_REGISTER(5) #define TAMP_COPRO_RSC_TBL_ADDRESS TAMP_BACKUP_REGISTER(17) @@ -111,6 +123,12 @@ enum boot_device { #define TAMP_COPRO_STATE_CSTOP 3 #define TAMP_COPRO_STATE_STANDBY 4 #define TAMP_COPRO_STATE_CRASH 5 +#endif + +#ifdef CONFIG_STM32MP13x +#define TAMP_BOOTCOUNT TAMP_BACKUP_REGISTER(31) +#define TAMP_BOOT_CONTEXT TAMP_BACKUP_REGISTER(30) +#endif #define TAMP_BOOT_MODE_MASK GENMASK(15, 8) #define TAMP_BOOT_MODE_SHIFT 8 @@ -138,11 +156,19 @@ enum forced_boot_mode { #define STM32_BSEC_LOCK(id) (STM32_BSEC_LOCK_OFFSET + (id) * 4) /* BSEC OTP index */ +#ifdef CONFIG_STM32MP15x #define BSEC_OTP_RPN 1 #define BSEC_OTP_SERIAL 13 #define BSEC_OTP_PKG 16 #define BSEC_OTP_MAC 57 #define BSEC_OTP_BOARD 59 +#endif +#ifdef CONFIG_STM32MP13x +#define BSEC_OTP_RPN 1 +#define BSEC_OTP_SERIAL 13 +#define BSEC_OTP_MAC 57 +#define BSEC_OTP_BOARD 60 +#endif #endif /* __ASSEMBLY__ */ #endif /* _MACH_STM32_H_ */ diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h b/arch/arm/mach-stm32mp/include/mach/sys_proto.h index 8b61135aeba..829b3feebf7 100644 --- a/arch/arm/mach-stm32mp/include/mach/sys_proto.h +++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h @@ -3,7 +3,7 @@ * Copyright (C) 2015-2017, STMicroelectronics - All Rights Reserved */ -/* ID = Device Version (bit31:16) + Device Part Number (RPN) (bit7:0) */ +/* ID = Device Version (bit31:16) + Device Part Number (RPN) (bit15:0) */ #define CPU_STM32MP157Cxx 0x05000000 #define CPU_STM32MP157Axx 0x05000001 #define CPU_STM32MP153Cxx 0x05000024 @@ -17,10 +17,24 @@ #define CPU_STM32MP151Fxx 0x050000AE #define CPU_STM32MP151Dxx 0x050000AF +#define CPU_STM32MP135Cxx 0x05010000 +#define CPU_STM32MP135Axx 0x05010001 +#define CPU_STM32MP133Cxx 0x050100C0 +#define CPU_STM32MP133Axx 0x050100C1 +#define CPU_STM32MP131Cxx 0x050106C8 +#define CPU_STM32MP131Axx 0x050106C9 +#define CPU_STM32MP135Fxx 0x05010800 +#define CPU_STM32MP135Dxx 0x05010801 +#define CPU_STM32MP133Fxx 0x050108C0 +#define CPU_STM32MP133Dxx 0x050108C1 +#define CPU_STM32MP131Fxx 0x05010EC8 +#define CPU_STM32MP131Dxx 0x05010EC9 + /* return CPU_STMP32MP...Xxx constants */ u32 get_cpu_type(void); #define CPU_DEV_STM32MP15 0x500 +#define CPU_DEV_STM32MP13 0x501 /* return CPU_DEV constants */ u32 get_cpu_dev(void); diff --git a/arch/arm/mach-stm32mp/stm32mp13x.c b/arch/arm/mach-stm32mp/stm32mp13x.c new file mode 100644 index 00000000000..d5e3a787c25 --- /dev/null +++ b/arch/arm/mach-stm32mp/stm32mp13x.c @@ -0,0 +1,115 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause +/* + * Copyright (C) 2022, STMicroelectronics - All Rights Reserved + */ + +#define LOG_CATEGORY LOGC_ARCH + +#include +#include +#include +#include +#include +#include + +/* SYSCFG register */ +#define SYSCFG_IDC_OFFSET 0x380 +#define SYSCFG_IDC_DEV_ID_MASK GENMASK(11, 0) +#define SYSCFG_IDC_DEV_ID_SHIFT 0 +#define SYSCFG_IDC_REV_ID_MASK GENMASK(31, 16) +#define SYSCFG_IDC_REV_ID_SHIFT 16 + +/* Device Part Number (RPN) = OTP_DATA1 lower 11 bits */ +#define RPN_SHIFT 0 +#define RPN_MASK GENMASK(11, 0) + +static u32 read_idc(void) +{ + void *syscfg = syscon_get_first_range(STM32MP_SYSCON_SYSCFG); + + return readl(syscfg + SYSCFG_IDC_OFFSET); +} + +u32 get_cpu_dev(void) +{ + return (read_idc() & SYSCFG_IDC_DEV_ID_MASK) >> SYSCFG_IDC_DEV_ID_SHIFT; +} + +u32 get_cpu_rev(void) +{ + return (read_idc() & SYSCFG_IDC_REV_ID_MASK) >> SYSCFG_IDC_REV_ID_SHIFT; +} + +/* Get Device Part Number (RPN) from OTP */ +static u32 get_cpu_rpn(void) +{ + return get_otp(BSEC_OTP_RPN, RPN_SHIFT, RPN_MASK); +} + +u32 get_cpu_type(void) +{ + return (get_cpu_dev() << 16) | get_cpu_rpn(); +} + +void get_soc_name(char name[SOC_NAME_SIZE]) +{ + char *cpu_s, *cpu_r; + + /* MPUs Part Numbers */ + switch (get_cpu_type()) { + case CPU_STM32MP135Fxx: + cpu_s = "135F"; + break; + case CPU_STM32MP135Dxx: + cpu_s = "135D"; + break; + case CPU_STM32MP135Cxx: + cpu_s = "135C"; + break; + case CPU_STM32MP135Axx: + cpu_s = "135A"; + break; + case CPU_STM32MP133Fxx: + cpu_s = "133F"; + break; + case CPU_STM32MP133Dxx: + cpu_s = "133D"; + break; + case CPU_STM32MP133Cxx: + cpu_s = "133C"; + break; + case CPU_STM32MP133Axx: + cpu_s = "133A"; + break; + case CPU_STM32MP131Fxx: + cpu_s = "131F"; + break; + case CPU_STM32MP131Dxx: + cpu_s = "131D"; + break; + case CPU_STM32MP131Cxx: + cpu_s = "131C"; + break; + case CPU_STM32MP131Axx: + cpu_s = "131A"; + break; + default: + cpu_s = "????"; + break; + } + + /* REVISION */ + switch (get_cpu_rev()) { + case CPU_REV1: + cpu_r = "A"; + break; + case CPU_REV1_1: + cpu_r = "Z"; + break; + default: + cpu_r = "?"; + break; + } + + snprintf(name, SOC_NAME_SIZE, "STM32MP%s Rev.%s", cpu_s, cpu_r); +} diff --git a/board/st/stm32mp1/Kconfig b/board/st/stm32mp1/Kconfig index 89e97aec2b6..6ab8f80fa45 100644 --- a/board/st/stm32mp1/Kconfig +++ b/board/st/stm32mp1/Kconfig @@ -11,3 +11,18 @@ config SYS_CONFIG_NAME source "board/st/common/Kconfig" endif + +if TARGET_ST_STM32MP13x + +config SYS_BOARD + default "stm32mp1" + +config SYS_VENDOR + default "st" + +config SYS_CONFIG_NAME + default "stm32mp13_st_common" + +source "board/st/common/Kconfig" + +endif diff --git a/board/st/stm32mp1/MAINTAINERS b/board/st/stm32mp1/MAINTAINERS index d57a49820ea..c9252e90f43 100644 --- a/board/st/stm32mp1/MAINTAINERS +++ b/board/st/stm32mp1/MAINTAINERS @@ -9,5 +9,7 @@ F: board/st/stm32mp1/ F: configs/stm32mp15_defconfig F: configs/stm32mp15_basic_defconfig F: configs/stm32mp15_trusted_defconfig +F: include/configs/stm32mp13_common.h +F: include/configs/stm32mp13_st_common.h F: include/configs/stm32mp15_common.h F: include/configs/stm32mp15_st_common.h diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index a08bcdeb4bc..8ae668ca238 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -9,8 +9,8 @@ CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SPL_MMC=y CONFIG_SPL=y CONFIG_CMD_STM32KEY=y -CONFIG_TARGET_ST_STM32MP15x=y CONFIG_TYPEC_STUSB160X=y +CONFIG_TARGET_ST_STM32MP15x=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 CONFIG_CMD_STM32PROG=y CONFIG_SPL_SPI_FLASH_SUPPORT=y diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index 70aff8f8471..8c41f80ee17 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -7,8 +7,8 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_DDR_CACHEABLE_SIZE=0x10000000 CONFIG_CMD_STM32KEY=y -CONFIG_TARGET_ST_STM32MP15x=y CONFIG_TYPEC_STUSB160X=y +CONFIG_TARGET_ST_STM32MP15x=y CONFIG_ENV_OFFSET_REDUND=0x4C0000 CONFIG_CMD_STM32PROG=y # CONFIG_ARMV7_NONSEC is not set diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index 21ddf9d38d6..ebb51289c8a 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -7,9 +7,9 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_DDR_CACHEABLE_SIZE=0x10000000 CONFIG_CMD_STM32KEY=y +CONFIG_TYPEC_STUSB160X=y CONFIG_STM32MP15x_STM32IMAGE=y CONFIG_TARGET_ST_STM32MP15x=y -CONFIG_TYPEC_STUSB160X=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 CONFIG_CMD_STM32PROG=y # CONFIG_ARMV7_NONSEC is not set diff --git a/include/configs/stm32mp13_common.h b/include/configs/stm32mp13_common.h new file mode 100644 index 00000000000..beb56fcb5af --- /dev/null +++ b/include/configs/stm32mp13_common.h @@ -0,0 +1,100 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause */ +/* + * Copyright (C) 2022, STMicroelectronics - All Rights Reserved + * + * Configuration settings for the STM32MP13x CPU + */ + +#ifndef __CONFIG_STM32MP13_COMMMON_H +#define __CONFIG_STM32MP13_COMMMON_H +#include +#include + +/* + * Configuration of the external SRAM memory used by U-Boot + */ +#define CONFIG_SYS_SDRAM_BASE STM32_DDR_BASE + +/* + * For booting Linux, use the first 256 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CONFIG_SYS_BOOTMAPSZ SZ_256M + +/* Extend size of kernel image for uncompression */ +#define CONFIG_SYS_BOOTM_LEN SZ_32M + +/*MMC SD*/ +#define CONFIG_SYS_MMC_MAX_DEVICE 2 + +/* NAND support */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 + +/*****************************************************************************/ +#ifdef CONFIG_DISTRO_DEFAULTS +/*****************************************************************************/ + +#ifdef CONFIG_CMD_MMC +#define BOOT_TARGET_MMC0(func) func(MMC, mmc, 0) +#define BOOT_TARGET_MMC1(func) func(MMC, mmc, 1) +#else +#define BOOT_TARGET_MMC0(func) +#define BOOT_TARGET_MMC1(func) +#endif + +#define BOOT_TARGET_DEVICES(func) \ + BOOT_TARGET_MMC1(func) \ + BOOT_TARGET_MMC0(func) + +/* + * default bootcmd for stm32mp13: + * for mmc boot (eMMC, SD card), distro boot on the same mmc device + */ +#define STM32MP_BOOTCMD "bootcmd_stm32mp=" \ + "echo \"Boot over ${boot_device}${boot_instance}!\";" \ + "run env_check;" \ + "if test ${boot_device} = mmc;" \ + "then env set boot_targets \"mmc${boot_instance}\"; fi;" \ + "run distro_bootcmd;" \ + "fi;\0" + +#define STM32MP_EXTRA \ + "env_check=if env info -p -d -q; then env save; fi\0" \ + "boot_net_usb_start=true\0" + +#ifndef STM32MP_BOARD_EXTRA_ENV +#define STM32MP_BOARD_EXTRA_ENV +#endif + +#include + +/* + * memory layout for 32M uncompressed/compressed kernel, + * 1M fdt, 1M script, 1M pxe and 1M for overlay + * and the ramdisk at the end. + */ +#define __KERNEL_ADDR_R __stringify(0xc2000000) +#define __FDT_ADDR_R __stringify(0xc4000000) +#define __SCRIPT_ADDR_R __stringify(0xc4100000) +#define __PXEFILE_ADDR_R __stringify(0xc4200000) +#define __FDTOVERLAY_ADDR_R __stringify(0xc4300000) +#define __RAMDISK_ADDR_R __stringify(0xc4400000) + +#define STM32MP_MEM_LAYOUT \ + "kernel_addr_r=" __KERNEL_ADDR_R "\0" \ + "fdt_addr_r=" __FDT_ADDR_R "\0" \ + "scriptaddr=" __SCRIPT_ADDR_R "\0" \ + "pxefile_addr_r=" __PXEFILE_ADDR_R "\0" \ + "fdtoverlay_addr_r=" __FDTOVERLAY_ADDR_R "\0" \ + "ramdisk_addr_r=" __RAMDISK_ADDR_R "\0" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + STM32MP_MEM_LAYOUT \ + STM32MP_BOOTCMD \ + BOOTENV \ + STM32MP_EXTRA \ + STM32MP_BOARD_EXTRA_ENV + +#endif /* ifdef CONFIG_DISTRO_DEFAULTS*/ + +#endif /* __CONFIG_STM32MP13_COMMMON_H */ diff --git a/include/configs/stm32mp13_st_common.h b/include/configs/stm32mp13_st_common.h new file mode 100644 index 00000000000..ec64b12f7ab --- /dev/null +++ b/include/configs/stm32mp13_st_common.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause */ +/* + * Copyright (C) 2022, STMicroelectronics - All Rights Reserved + * + * Configuration settings for the STMicroelectronics STM32MP13x boards + */ + +#ifndef __CONFIG_STM32MP13_ST_COMMON_H__ +#define __CONFIG_STM32MP13_ST_COMMON_H__ + +#define STM32MP_BOARD_EXTRA_ENV \ + "usb_pgood_delay=1000\0" \ + "console=ttySTM0\0" + +#include + +#endif diff --git a/include/configs/stm32mp15_common.h b/include/configs/stm32mp15_common.h index ec41a8172c7..08a72483bfc 100644 --- a/include/configs/stm32mp15_common.h +++ b/include/configs/stm32mp15_common.h @@ -90,7 +90,7 @@ BOOT_TARGET_PXE(func) /* - * default bootcmd for stm32mp1: + * default bootcmd for stm32mp15: * for serial/usb: execute the stm32prog command * for mmc boot (eMMC, SD card), distro boot on the same mmc device * for nand or spi-nand boot, distro boot with ubifs on UBI partition -- GitLab From 46f9eb5dcca7789b87465759b8b3c55326adaa8d Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 20 May 2022 18:24:47 +0200 Subject: [PATCH 171/581] arm: stm32mp: support 2 MAC address for STM32MP13 Add support of several MAC address in OTP (3 32bits OTP word for 2 MAC address) for SOCs in STM32MP13x family: STM32MP133 and STM32MP135. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- arch/arm/mach-stm32mp/cpu.c | 41 ++++++++++++------- .../arm/mach-stm32mp/include/mach/sys_proto.h | 1 + arch/arm/mach-stm32mp/stm32mp13x.c | 20 +++++++++ arch/arm/mach-stm32mp/stm32mp15x.c | 5 +++ 4 files changed, 52 insertions(+), 15 deletions(-) diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index 240960ada49..855fc755fe0 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -290,16 +290,18 @@ __weak int setup_mac_address(void) { int ret; int i; - u32 otp[2]; + u32 otp[3]; uchar enetaddr[6]; struct udevice *dev; + int nb_eth, nb_otp, index; if (!IS_ENABLED(CONFIG_NET)) return 0; - /* MAC already in environment */ - if (eth_env_get_enetaddr("ethaddr", enetaddr)) - return 0; + nb_eth = get_eth_nb(); + + /* 6 bytes for each MAC addr and 4 bytes for each OTP */ + nb_otp = DIV_ROUND_UP(6 * nb_eth, 4); ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(stm32mp_bsec), @@ -307,22 +309,31 @@ __weak int setup_mac_address(void) if (ret) return ret; - ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_MAC), - otp, sizeof(otp)); + ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_MAC), otp, 4 * nb_otp); if (ret < 0) return ret; - for (i = 0; i < 6; i++) - enetaddr[i] = ((uint8_t *)&otp)[i]; + for (index = 0; index < nb_eth; index++) { + /* MAC already in environment */ + if (eth_env_get_enetaddr_by_index("eth", index, enetaddr)) + continue; + + for (i = 0; i < 6; i++) + enetaddr[i] = ((uint8_t *)&otp)[i + 6 * index]; - if (!is_valid_ethaddr(enetaddr)) { - log_err("invalid MAC address in OTP %pM\n", enetaddr); - return -EINVAL; + if (!is_valid_ethaddr(enetaddr)) { + log_err("invalid MAC address %d in OTP %pM\n", + index, enetaddr); + return -EINVAL; + } + log_debug("OTP MAC address %d = %pM\n", index, enetaddr); + ret = eth_env_set_enetaddr_by_index("eth", index, enetaddr); + if (ret) { + log_err("Failed to set mac address %pM from OTP: %d\n", + enetaddr, ret); + return ret; + } } - log_debug("OTP MAC address = %pM\n", enetaddr); - ret = eth_env_set_enetaddr("ethaddr", enetaddr); - if (ret) - log_err("Failed to set mac address %pM from OTP: %d\n", enetaddr, ret); return 0; } diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h b/arch/arm/mach-stm32mp/include/mach/sys_proto.h index 829b3feebf7..4b564e86dc5 100644 --- a/arch/arm/mach-stm32mp/include/mach/sys_proto.h +++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h @@ -64,6 +64,7 @@ void get_soc_name(char name[SOC_NAME_SIZE]); /* return boot mode */ u32 get_bootmode(void); +int get_eth_nb(void); int setup_mac_address(void); /* board power management : configure vddcore according OPP */ diff --git a/arch/arm/mach-stm32mp/stm32mp13x.c b/arch/arm/mach-stm32mp/stm32mp13x.c index d5e3a787c25..bd3f24c349a 100644 --- a/arch/arm/mach-stm32mp/stm32mp13x.c +++ b/arch/arm/mach-stm32mp/stm32mp13x.c @@ -51,6 +51,26 @@ u32 get_cpu_type(void) return (get_cpu_dev() << 16) | get_cpu_rpn(); } +int get_eth_nb(void) +{ + int nb_eth = 2; + + switch (get_cpu_type()) { + case CPU_STM32MP131Dxx: + fallthrough; + case CPU_STM32MP131Cxx: + fallthrough; + case CPU_STM32MP131Axx: + nb_eth = 1; + break; + default: + nb_eth = 2; + break; + } + + return nb_eth; +} + void get_soc_name(char name[SOC_NAME_SIZE]) { char *cpu_s, *cpu_r; diff --git a/arch/arm/mach-stm32mp/stm32mp15x.c b/arch/arm/mach-stm32mp/stm32mp15x.c index 800fad2f436..a093e6163e6 100644 --- a/arch/arm/mach-stm32mp/stm32mp15x.c +++ b/arch/arm/mach-stm32mp/stm32mp15x.c @@ -247,6 +247,11 @@ u32 get_cpu_type(void) return (get_cpu_dev() << 16) | get_cpu_rpn(); } +int get_eth_nb(void) +{ + return 1; +} + /* Get Package options from OTP */ u32 get_cpu_package(void) { -- GitLab From cf1d0fd4c1000017a899e546361422d3a1c3f6d9 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 20 May 2022 18:24:48 +0200 Subject: [PATCH 172/581] pinctrl: stm32: add support of STM32MP135 Add support for "st,stm32mp135-pinctrl" for STM32MP13x Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- drivers/pinctrl/pinctrl_stm32.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c index 56a20e8bd25..990cd19286f 100644 --- a/drivers/pinctrl/pinctrl_stm32.c +++ b/drivers/pinctrl/pinctrl_stm32.c @@ -488,6 +488,7 @@ static const struct udevice_id stm32_pinctrl_ids[] = { { .compatible = "st,stm32h743-pinctrl" }, { .compatible = "st,stm32mp157-pinctrl" }, { .compatible = "st,stm32mp157-z-pinctrl" }, + { .compatible = "st,stm32mp135-pinctrl" }, { } }; -- GitLab From ae3e2c2bf775e935eb08fcc8fee236b1633c6fd0 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 20 May 2022 18:24:49 +0200 Subject: [PATCH 173/581] board: stm32pm1: add stm32mp13 board support Add stm32mp15x prefix to all STM32MP15x board specific functions, this patch is a preliminary step for STM32MP13x support. This patch also adds the RCC probe to avoid circular access with usbphyc probe as clk provider. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- board/st/stm32mp1/stm32mp1.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index 07b1a63db7d..3ff5e505ec6 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -554,8 +554,7 @@ static void sysconf_init(void) clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL); } -/* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */ -static int dk2_i2c1_fix(void) +static int board_stm32mp15x_dk2_init(void) { ofnode node; struct gpio_desc hdmi, audio; @@ -564,6 +563,7 @@ static int dk2_i2c1_fix(void) if (!IS_ENABLED(CONFIG_DM_REGULATOR)) return -ENODEV; + /* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */ node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39"); if (!ofnode_valid(node)) { log_debug("no hdmi-transmitter@39 ?\n"); @@ -611,7 +611,7 @@ error: return ret; } -static bool board_is_dk2(void) +static bool board_is_stm32mp15x_dk2(void) { if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) && of_machine_is_compatible("st,stm32mp157c-dk2")) @@ -620,7 +620,7 @@ static bool board_is_dk2(void) return false; } -static bool board_is_ev1(void) +static bool board_is_stm32mp15x_ev1(void) { if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) && (of_machine_is_compatible("st,stm32mp157a-ev1") || @@ -644,7 +644,7 @@ U_BOOT_DRIVER(goodix) = { .of_match = goodix_ids, }; -static void board_ev1_init(void) +static void board_stm32mp15x_ev1_init(void) { struct udevice *dev; @@ -657,11 +657,11 @@ int board_init(void) { board_key_check(); - if (board_is_ev1()) - board_ev1_init(); + if (board_is_stm32mp15x_ev1()) + board_stm32mp15x_ev1_init(); - if (board_is_dk2()) - dk2_i2c1_fix(); + if (board_is_stm32mp15x_dk2()) + board_stm32mp15x_dk2_init(); if (IS_ENABLED(CONFIG_DM_REGULATOR)) regulators_enable_boot_on(_DEBUG); -- GitLab From a46dce2817f574ee1186cc82a19ca9a99869b349 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 20 May 2022 18:24:50 +0200 Subject: [PATCH 174/581] ram: stm32mp1: add support of STM32MP13x Add support for new compatible "st,stm32mp13-ddr" to manage the DDR sub system (Controller and PHY) in STM32MP13x SOC: - only one AXI port - support of 16 port output (MEMC_DRAM_DATA_WIDTH = 2) The STM32MP15x SOC have 2 AXI ports and 32 bits support. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- .../memory-controllers/st,stm32mp1-ddr.txt | 49 +++++++++++++++---- drivers/ram/stm32mp1/stm32mp1_ram.c | 28 +++++++---- 2 files changed, 57 insertions(+), 20 deletions(-) diff --git a/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt b/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt index 926e3e83b3f..e6ea8d0ef54 100644 --- a/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt +++ b/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt @@ -3,7 +3,8 @@ ST,stm32mp1 DDR3/LPDDR2/LPDDR3 Controller (DDRCTRL and DDRPHYC) -------------------- Required properties: -------------------- -- compatible : Should be "st,stm32mp1-ddr" +- compatible : Should be "st,stm32mp1-ddr" for STM32MP15x + Should be "st,stm32mp13-ddr" for STM32MP13x - reg : controleur (DDRCTRL) and phy (DDRPHYC) base address - clocks : controller clocks handle - clock-names : associated controller clock names @@ -13,6 +14,8 @@ Required properties: the next attributes are DDR parameters, they are generated by DDR tools included in STM32 Cube tool +They are required only in SPL, when TFABOOT is not activated. + info attributes: ---------------- - st,mem-name : name for DDR configuration, simple string for information @@ -24,7 +27,7 @@ controlleur attributes: ----------------------- - st,ctl-reg : controleur values depending of the DDR type (DDR3/LPDDR2/LPDDR3) - for STM32MP15x: 25 values are requested in this order + for STM32MP15x and STM32MP13x: 25 values are requested in this order MSTR MRCTRL0 MRCTRL1 @@ -53,7 +56,7 @@ controlleur attributes: - st,ctl-timing : controleur values depending of frequency and timing parameter of DDR - for STM32MP15x: 12 values are requested in this order + for STM32MP15x and STM32MP13x: 12 values are requested in this order RFSHTMG DRAMTMG0 DRAMTMG1 @@ -68,7 +71,7 @@ controlleur attributes: ODTCFG - st,ctl-map : controleur values depending of address mapping - for STM32MP15x: 9 values are requested in this order + for STM32MP15x and STM32MP13x: 9 values are requested in this order ADDRMAP1 ADDRMAP2 ADDRMAP3 @@ -99,6 +102,19 @@ controlleur attributes: PCFGWQOS0_1 PCFGWQOS1_1 + for STM32MP13x: 11 values are requested in this order + SCHED + SCHED1 + PERFHPR1 + PERFLPR1 + PERFWR1 + PCFGR_0 + PCFGW_0 + PCFGQOS0_0 + PCFGQOS1_0 + PCFGWQOS0_0 + PCFGWQOS1_0 + phyc attributes: ---------------- - st,phy-reg : phy values depending of the DDR type (DDR3/LPDDR2/LPDDR3) @@ -115,8 +131,19 @@ phyc attributes: DX2GCR DX3GCR + for STM32MP13x: 9 values are requested in this order + PGCR + ACIOCR + DXCCR + DSGCR + DCR + ODTCR + ZQ0CR1 + DX0GCR + DX1GCR + - st,phy-timing : phy values depending of frequency and timing parameter of DDR - for STM32MP15x: 10 values are requested in this order + for STM32MP15x and STM32MP13x: 10 values are requested in this order PTR0 PTR1 PTR2 @@ -128,16 +155,18 @@ phyc attributes: MR2 MR3 + for STM32MP13x: 6 values are requested in this order + DX0DLLCR + DX0DQTR + DX0DQSTR + DX1DLLCR + DX1DQTR + DX1DQSTR Example: / { soc { - u-boot,dm-spl; - ddr: ddr@0x5A003000{ - u-boot,dm-spl; - u-boot,dm-pre-reloc; - compatible = "st,stm32mp1-ddr"; reg = <0x5A003000 0x550 diff --git a/drivers/ram/stm32mp1/stm32mp1_ram.c b/drivers/ram/stm32mp1/stm32mp1_ram.c index 49b1262461b..a6c19af9722 100644 --- a/drivers/ram/stm32mp1/stm32mp1_ram.c +++ b/drivers/ram/stm32mp1/stm32mp1_ram.c @@ -230,29 +230,29 @@ static u8 get_nb_col(struct stm32mp1_ddrctl *ctl, u8 data_bus_width) reg = readl(&ctl->addrmap3); /* addrmap3.addrmap_col_b6 */ - val = (reg & GENMASK(3, 0)) >> 0; + val = (reg & GENMASK(4, 0)) >> 0; if (val <= 7) bits++; /* addrmap3.addrmap_col_b7 */ - val = (reg & GENMASK(11, 8)) >> 8; + val = (reg & GENMASK(12, 8)) >> 8; if (val <= 7) bits++; /* addrmap3.addrmap_col_b8 */ - val = (reg & GENMASK(19, 16)) >> 16; + val = (reg & GENMASK(20, 16)) >> 16; if (val <= 7) bits++; /* addrmap3.addrmap_col_b9 */ - val = (reg & GENMASK(27, 24)) >> 24; + val = (reg & GENMASK(28, 24)) >> 24; if (val <= 7) bits++; reg = readl(&ctl->addrmap4); /* addrmap4.addrmap_col_b10 */ - val = (reg & GENMASK(3, 0)) >> 0; + val = (reg & GENMASK(4, 0)) >> 0; if (val <= 7) bits++; /* addrmap4.addrmap_col_b11 */ - val = (reg & GENMASK(11, 8)) >> 8; + val = (reg & GENMASK(12, 8)) >> 8; if (val <= 7) bits++; @@ -296,21 +296,24 @@ static u8 get_nb_row(struct stm32mp1_ddrctl *ctl) reg = readl(&ctl->addrmap6); /* addrmap6.addrmap_row_b12 */ val = (reg & GENMASK(3, 0)) >> 0; - if (val <= 7) + if (val <= 11) bits++; /* addrmap6.addrmap_row_b13 */ val = (reg & GENMASK(11, 8)) >> 8; - if (val <= 7) + if (val <= 11) bits++; /* addrmap6.addrmap_row_b14 */ val = (reg & GENMASK(19, 16)) >> 16; - if (val <= 7) + if (val <= 11) bits++; /* addrmap6.addrmap_row_b15 */ val = (reg & GENMASK(27, 24)) >> 24; - if (val <= 7) + if (val <= 11) bits++; + if (reg & BIT(31)) + printf("warning: LPDDR3_6GB_12GB is not supported\n"); + return bits; } @@ -392,12 +395,17 @@ static struct ram_ops stm32mp1_ddr_ops = { .get_info = stm32mp1_ddr_get_info, }; +static const struct stm32mp1_ddr_cfg stm32mp13x_ddr_cfg = { + .nb_bytes = 2, +}; + static const struct stm32mp1_ddr_cfg stm32mp15x_ddr_cfg = { .nb_bytes = 4, }; static const struct udevice_id stm32mp1_ddr_ids[] = { { .compatible = "st,stm32mp1-ddr", .data = (ulong)&stm32mp15x_ddr_cfg}, + { .compatible = "st,stm32mp13-ddr", .data = (ulong)&stm32mp13x_ddr_cfg}, { } }; -- GitLab From 79bdcd882e6d49e81d1c4a2a09d1142431508661 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 20 May 2022 18:24:51 +0200 Subject: [PATCH 175/581] mmc: stm32_sdmmc2: make reset property optional Although not recommended, the reset property could be made optional. This way the driver will probe even if no reset property is provided in an sdmmc node in DT. This reset is already optional in Linux. Signed-off-by: Yann Gautier Reviewed-by: Jaehoon Chung Reviewed-by: Patrice Chotard Signed-off-by: Patrick Delaunay --- drivers/mmc/stm32_sdmmc2.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c index 44bfc911af2..81b07609a91 100644 --- a/drivers/mmc/stm32_sdmmc2.c +++ b/drivers/mmc/stm32_sdmmc2.c @@ -514,10 +514,12 @@ retry_cmd: */ static void stm32_sdmmc2_reset(struct stm32_sdmmc2_priv *priv) { - /* Reset */ - reset_assert(&priv->reset_ctl); - udelay(2); - reset_deassert(&priv->reset_ctl); + if (reset_valid(&priv->reset_ctl)) { + /* Reset */ + reset_assert(&priv->reset_ctl); + udelay(2); + reset_deassert(&priv->reset_ctl); + } /* init the needed SDMMC register after reset */ writel(priv->pwr_reg_msk, priv->base + SDMMC_POWER); @@ -735,7 +737,7 @@ static int stm32_sdmmc2_probe(struct udevice *dev) ret = reset_get_by_index(dev, 0, &priv->reset_ctl); if (ret) - goto clk_disable; + dev_dbg(dev, "No reset provided\n"); gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio, GPIOD_IS_IN); @@ -755,8 +757,6 @@ static int stm32_sdmmc2_probe(struct udevice *dev) stm32_sdmmc2_reset(priv); return 0; -clk_disable: - clk_disable(&priv->clk); clk_free: clk_free(&priv->clk); -- GitLab From 44abcf6060db33e1f567dead02df92fecc01f299 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 20 May 2022 18:24:52 +0200 Subject: [PATCH 176/581] arm: dts: stm32mp: add stm32mp13 device tree for U-Boot Compile the device tree of STM32MP13x boards and add the needed U-Boot add-on. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- arch/arm/dts/Makefile | 3 + arch/arm/dts/stm32mp13-u-boot.dtsi | 91 +++++++++++++++++++++++++ arch/arm/dts/stm32mp135f-dk-u-boot.dtsi | 30 ++++++++ 3 files changed, 124 insertions(+) create mode 100644 arch/arm/dts/stm32mp13-u-boot.dtsi create mode 100644 arch/arm/dts/stm32mp135f-dk-u-boot.dtsi diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index f78f66853db..cae008515d5 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1162,6 +1162,9 @@ dtb-$(CONFIG_ASPEED_AST2600) += ast2600-evb.dtb dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb +dtb-$(CONFIG_STM32MP13x) += \ + stm32mp135f-dk.dtb + dtb-$(CONFIG_STM32MP15x) += \ stm32mp157a-dk1.dtb \ stm32mp157a-icore-stm32mp1-ctouch2.dtb \ diff --git a/arch/arm/dts/stm32mp13-u-boot.dtsi b/arch/arm/dts/stm32mp13-u-boot.dtsi new file mode 100644 index 00000000000..1b5b3586905 --- /dev/null +++ b/arch/arm/dts/stm32mp13-u-boot.dtsi @@ -0,0 +1,91 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause +/* + * Copyright (C) 2022, STMicroelectronics - All Rights Reserved + */ + +/ { + aliases { + gpio0 = &gpioa; + gpio1 = &gpiob; + gpio2 = &gpioc; + gpio3 = &gpiod; + gpio4 = &gpioe; + gpio5 = &gpiof; + gpio6 = &gpiog; + gpio7 = &gpioh; + gpio8 = &gpioi; + pinctrl0 = &pinctrl; + }; + + /* need PSCI for sysreset during board_f */ + psci { + u-boot,dm-pre-proper; + }; + + soc { + u-boot,dm-pre-reloc; + + ddr: ddr@5a003000 { + u-boot,dm-pre-reloc; + + compatible = "st,stm32mp13-ddr"; + + reg = <0x5A003000 0x550 + 0x5A004000 0x234>; + + status = "okay"; + }; + }; +}; + +&bsec { + u-boot,dm-pre-reloc; +}; + +&gpioa { + u-boot,dm-pre-reloc; +}; + +&gpiob { + u-boot,dm-pre-reloc; +}; + +&gpioc { + u-boot,dm-pre-reloc; +}; + +&gpiod { + u-boot,dm-pre-reloc; +}; + +&gpioe { + u-boot,dm-pre-reloc; +}; + +&gpiof { + u-boot,dm-pre-reloc; +}; + +&gpiog { + u-boot,dm-pre-reloc; +}; + +&gpioh { + u-boot,dm-pre-reloc; +}; + +&gpioi { + u-boot,dm-pre-reloc; +}; + +&iwdg2 { + u-boot,dm-pre-reloc; +}; + +&pinctrl { + u-boot,dm-pre-reloc; +}; + +&syscfg { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi b/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi new file mode 100644 index 00000000000..dfe5bbb2e34 --- /dev/null +++ b/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause +/* + * Copyright (C) 2022, STMicroelectronics - All Rights Reserved + */ + +#include "stm32mp13-u-boot.dtsi" + +/ { + aliases { + mmc0 = &sdmmc1; + }; + + config { + u-boot,mmc-env-partition = "u-boot-env"; + }; +}; + +&uart4 { + u-boot,dm-pre-reloc; +}; + +&uart4_pins_a { + u-boot,dm-pre-reloc; + pins1 { + u-boot,dm-pre-reloc; + }; + pins2 { + u-boot,dm-pre-reloc; + }; +}; -- GitLab From 11517ccc8c52424cafcf25de38a91ea06fc430e6 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 20 May 2022 18:24:53 +0200 Subject: [PATCH 177/581] configs: add stm32mp13 defconfig Add a initial config for STM32M13x SOC family, using the stm32mp135f-dk device tree. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- board/st/stm32mp1/MAINTAINERS | 1 + configs/stm32mp13_defconfig | 55 +++++++++++++++++++++++++++++++++++ 2 files changed, 56 insertions(+) create mode 100644 configs/stm32mp13_defconfig diff --git a/board/st/stm32mp1/MAINTAINERS b/board/st/stm32mp1/MAINTAINERS index c9252e90f43..d5a09cdc39f 100644 --- a/board/st/stm32mp1/MAINTAINERS +++ b/board/st/stm32mp1/MAINTAINERS @@ -6,6 +6,7 @@ S: Maintained F: arch/arm/dts/stm32mp13* F: arch/arm/dts/stm32mp15* F: board/st/stm32mp1/ +F: configs/stm32mp13_defconfig F: configs/stm32mp15_defconfig F: configs/stm32mp15_basic_defconfig F: configs/stm32mp15_trusted_defconfig diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig new file mode 100644 index 00000000000..b5dcec78f51 --- /dev/null +++ b/configs/stm32mp13_defconfig @@ -0,0 +1,55 @@ +CONFIG_ARM=y +CONFIG_ARCH_STM32MP=y +CONFIG_TFABOOT=y +CONFIG_SYS_MALLOC_F_LEN=0x180000 +CONFIG_ENV_OFFSET=0x900000 +CONFIG_DEFAULT_DEVICE_TREE="stm32mp135f-dk" +CONFIG_STM32MP13x=y +CONFIG_DDR_CACHEABLE_SIZE=0x10000000 +CONFIG_TARGET_ST_STM32MP13x=y +CONFIG_ENV_OFFSET_REDUND=0x940000 +# CONFIG_ARMV7_NONSEC is not set +CONFIG_SYS_LOAD_ADDR=0xc2000000 +CONFIG_SYS_MEMTEST_START=0xc0000000 +CONFIG_SYS_MEMTEST_END=0xc4000000 +CONFIG_DISTRO_DEFAULTS=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0400000 +CONFIG_FIT=y +CONFIG_BOOTDELAY=1 +CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" +CONFIG_SYS_PROMPT="STM32MP> " +CONFIG_CMD_ADTIMG=y +CONFIG_CMD_ERASEENV=y +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_CLK=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MMC=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_LOG=y +CONFIG_OF_LIVE=y +CONFIG_ENV_IS_NOWHERE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_DEV=-1 +CONFIG_CLK_SCMI=y +CONFIG_STM32_SDMMC2=y +CONFIG_DM_ETH=y +CONFIG_PINCONF=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_REGULATOR_SCMI=y +CONFIG_RESET_SCMI=y +CONFIG_SERIAL_RX_BUFFER=y +CONFIG_SYSRESET_PSCI=y +CONFIG_TEE=y +CONFIG_OPTEE=y +# CONFIG_OPTEE_TA_AVB is not set +CONFIG_ERRNO_STR=y +# CONFIG_LMB_USE_MAX_REGIONS is not set +CONFIG_LMB_MEMORY_REGIONS=2 +CONFIG_LMB_RESERVED_REGIONS=16 -- GitLab From b94b275b0aeb99f677447536d0588ad28371e7f2 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 20 May 2022 18:24:54 +0200 Subject: [PATCH 178/581] doc: st: stm32mp1: add STM32MP13x support Add in U-Boot documentation the quick instruction to setup the STMicroelectronics STM32MP13x boards. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- doc/board/st/stm32mp1.rst | 183 ++++++++++++++++++++++++++------------ 1 file changed, 126 insertions(+), 57 deletions(-) diff --git a/doc/board/st/stm32mp1.rst b/doc/board/st/stm32mp1.rst index 0c5d3a90f04..00f9b454421 100644 --- a/doc/board/st/stm32mp1.rst +++ b/doc/board/st/stm32mp1.rst @@ -1,41 +1,31 @@ .. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause .. sectionauthor:: Patrick Delaunay -STM32MP15x boards +STM32MP1xx boards ================= -This is a quick instruction for setup STM32MP15x boards. +This is a quick instruction for setup STMicroelectronics STM32MP1xx boards. -Futher information can be found in STMicrolectronics STM32 WIKI_. +Further information can be found in STMicroelectronics STM32 WIKI_. Supported devices ----------------- -U-Boot supports STMP32MP15x SoCs: +U-Boot supports all the STMicroelectronics MPU with the associated boards - - STM32MP157 - - STM32MP153 - - STM32MP151 + - STMP32MP15x SoCs: -The STM32MP15x is a Cortex-A MPU aimed at various applications. + - STM32MP157 + - STM32MP153 + - STM32MP151 -It features: - - - Dual core Cortex-A7 application core (Single on STM32MP151) - - 2D/3D image composition with GPU (only on STM32MP157) - - Standard memories interface support - - Standard connectivity, widely inherited from the STM32 MCU family - - Comprehensive security support + - STMP32MP13x SoCs: -Each line comes with a security option (cryptography & secure boot) and -a Cortex-A frequency option: - - - A : Cortex-A7 @ 650 MHz - - C : Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz - - D : Cortex-A7 @ 800 MHz - - F : Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz + - STM32MP135 + - STM32MP133 + - STM32MP131 -Everything is supported in Linux but U-Boot is limited to: +Everything is supported in Linux but U-Boot is limited to the boot device: 1. UART 2. SD card/MMC controller (SDMMC) @@ -49,7 +39,35 @@ And the necessary drivers 1. I2C 2. STPMIC1 (PMIC and regulator) 3. Clock, Reset, Sysreset - 4. Fuse + 4. Fuse (BSEC) + 5. OP-TEE + 6. ETH + 7. USB host + 8. WATCHDOG + 9. RNG + 10. RTC + +STM32MP15x +`````````` + +The STM32MP15x is a Cortex-A7 MPU aimed at various applications. + +It features: + + - Dual core Cortex-A7 application core (Single on STM32MP151) + - 2D/3D image composition with GPU (only on STM32MP157) + - Standard memories interface support + - Standard connectivity, widely inherited from the STM32 MCU family + - Comprehensive security support + - Cortex M4 coprocessor + +Each line comes with a security option (cryptography & secure boot) and +a Cortex-A frequency option: + + - A : Cortex-A7 @ 650 MHz + - C : Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz + - D : Cortex-A7 @ 800 MHz + - F : Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz Currently the following boards are supported: @@ -59,6 +77,16 @@ Currently the following boards are supported: + stm32mp157c-ev1.dts + stm32mp15xx-dhcor-avenger96.dts +STM32MP13x +`````````` + +The STM32MP13x is a single Cortex-A7 MPU aimed at various applications. + +Currently the following boards are supported: + + + stm32mp135f-dk.dts + + Boot Sequences -------------- @@ -71,12 +99,22 @@ Boot Sequences + +------------------------+-------------------------+--------------+ | | embedded RAM | DDR | +----------+------------------------+-------------------------+--------------+ +| TrustZone| secure monitor | ++----------+------------------------+-------------------------+--------------+ + +The trusted boot chain is recommended with: + +- FSBL = **TF-A BL2** +- Secure monitor = **OP-TEE** +- SSBL = **U-Boot** + +It is the only supported boot chain for STM32MP13x family. The **Trusted** boot chain with TF-A_ ````````````````````````````````````` defconfig_file : - + **stm32mp15_defconfig** (for TF-A_ with FIP support) + + **stm32mp15_defconfig** and **stm32mp13_defconfig** (for TF-A_ with FIP support) + **stm32mp15_trusted_defconfig** (for TF-A_ without FIP support) +-------------+--------------------------+------------+-------+ @@ -98,8 +136,8 @@ TF-A_ (BL2) initialize the DDR and loads the next stage binaries from a FIP file the secure monitor to access to secure resources. + HW_CONFIG: The hardware configuration file = the U-Boot device tree -The **Basic** boot chain with SPL -````````````````````````````````` +The **Basic** boot chain with SPL (for STM32MP15x) +`````````````````````````````````````````````````` defconfig_file : + **stm32mp15_basic_defconfig** @@ -117,16 +155,19 @@ SPL has limited security initialization. U-Boot is running in secure mode and provide a secure monitor to the kernel with only PSCI support (Power State Coordination Interface defined by ARM). -All the STM32MP15x boards supported by U-Boot use the same generic board -stm32mp1 which support all the bootable devices. +.. warning:: This alternate **basic** boot chain with SPL is not supported/promoted by STMicroelectronics to make product. + +Device Tree +----------- -Each board is configured only with the associated device tree. +All the STM32MP15x and STM32MP13x boards supported by U-Boot use the same generic board +stm32mp1 which supports all the bootable devices. -Device Tree Selection ---------------------- +Each STMicroelectronics board is only configured with the associated device tree. -You need to select the appropriate device tree for your board, -the supported device trees for STM32MP15x are: +STM32MP15x device Tree Selection +```````````````````````````````` +The supported device trees for STM32MP15x (stm32mp15_trusted_defconfig and stm32mp15_basic_defconfig) are: + ev1: eval board with pmic stpmic1 (ev1 = mother board + daughter ed1) @@ -148,6 +189,15 @@ the supported device trees for STM32MP15x are: + stm32mp15xx-dhcor-avenger96 +STM32MP13x device Tree Selection +```````````````````````````````` +The supported device trees for STM32MP13x (stm32mp13_defconfig) are: + ++ dk: Discovery board + + + stm32mp135f-dk + + Build Procedure --------------- @@ -170,6 +220,7 @@ Build Procedure for example: use one output directory for each configuration:: + # export KBUILD_OUTPUT=stm32mp13 # export KBUILD_OUTPUT=stm32mp15 # export KBUILD_OUTPUT=stm32mp15_trusted # export KBUILD_OUTPUT=stm32mp15_basic @@ -184,9 +235,10 @@ Build Procedure with : - - For **trusted** boot mode : **stm32mp15_defconfig** or - stm32mp15_trusted_defconfig - - For basic boot mode: stm32mp15_basic_defconfig + - For **trusted** boot mode : + - For STM32MP13x: **stm32mp13_defconfig** + - For STM32MP15x: **stm32mp15_defconfig** or stm32mp15_trusted_defconfig + - For STM32MP15x basic boot mode: stm32mp15_basic_defconfig 5. Configure the device-tree and build the U-Boot image:: @@ -194,37 +246,42 @@ Build Procedure Examples: - a) trusted boot with FIP on ev1:: + a) trusted boot with FIP on STM32MP15x ev1:: # export KBUILD_OUTPUT=stm32mp15 # make stm32mp15_defconfig # make DEVICE_TREE=stm32mp157c-ev1 all - b) trusted boot without FIP on dk2:: + b) trusted boot on STM32MP13x discovery board:: - # export KBUILD_OUTPUT=stm32mp15_trusted - # make stm32mp15_trusted_defconfig - # make DEVICE_TREE=stm32mp157c-dk2 all + # export KBUILD_OUTPUT=stm32mp13 + # make stm32mp13_defconfig + # make DEVICE_TREE=stm32mp135f-dk all - c) basic boot on ev1:: + DEVICE_TEE selection is optional as stm32mp135f-dk is the default board of the defconfig:: + + # make stm32mp13_defconfig + # make all + + c) basic boot on STM32MP15x ev1:: # export KBUILD_OUTPUT=stm32mp15_basic # make stm32mp15_basic_defconfig # make DEVICE_TREE=stm32mp157c-ev1 all - d) basic boot on ed1:: + d) basic boot on STM32MP15x ed1:: # export KBUILD_OUTPUT=stm32mp15_basic # make stm32mp15_basic_defconfig # make DEVICE_TREE=stm32mp157c-ed1 all - e) basic boot on dk1:: + e) basic boot on STM32MP15x dk1:: # export KBUILD_OUTPUT=stm32mp15_basic # make stm32mp15_basic_defconfig # make DEVICE_TREE=stm32mp157a-dk1 all - f) basic boot on avenger96:: + f) basic boot on STM32MP15x avenger96:: # export KBUILD_OUTPUT=stm32mp15_basic # make stm32mp15_basic_defconfig @@ -235,6 +292,7 @@ Build Procedure So in the output directory (selected by KBUILD_OUTPUT), you can found the needed U-Boot files: + - stm32mp13_defconfig = **u-boot-nodtb.bin** and **u-boot.dtb** - stm32mp15_defconfig = **u-boot-nodtb.bin** and **u-boot.dtb** - stm32mp15_trusted_defconfig = u-boot.stm32 @@ -325,9 +383,9 @@ the boot pin values = BOOT0, BOOT1, BOOT2 | SPI-NAND | 1 | 1 | 1 | +-------------+---------+---------+---------+ -- on the **daugther board ed1 = MB1263** with the switch SW1 -- on **Avenger96** with switch S3 (NOR and SPI-NAND are not applicable) -- on board **DK1/DK2** with the switch SW1 = BOOT0, BOOT2 +- on the STM32MP15x **daughter board ed1 = MB1263** with the switch SW1 +- on STM32MP15x **Avenger96** with switch S3 (NOR and SPI-NAND are not applicable) +- on board STM32MP15x **DK1/DK2** with the switch SW1 = BOOT0, BOOT2 with only 2 pins available (BOOT1 is forced to 0 and NOR not supported), the possible value becomes: @@ -355,7 +413,7 @@ The communication between HOST and board is based on Prepare an SD card ------------------ -The minimal requirements for STMP32MP15x boot up to U-Boot are: +The minimal requirements for STMP32MP15x and STM32MP13x boot up to U-Boot are: - GPT partitioning (with gdisk or with sgdisk) - 2 fsbl partitions, named "fsbl1" and "fsbl2", size at least 256KiB @@ -511,14 +569,25 @@ MAC Address Please read doc/README.enetaddr for the implementation guidelines for mac id usage. Basically, environment has precedence over board specific storage. -For STMicroelectonics board, it is retrieved in STM32MP15x OTP : +For STMicroelectronics board, it is retrieved in: + + - STM32MP15x OTP: - - OTP_57[31:0] = MAC_ADDR[31:0] - - OTP_58[15:0] = MAC_ADDR[47:32] + - OTP_57[31:0] = MAC_ADDR[31:0] + - OTP_58[15:0] = MAC_ADDR[47:32] -To program a MAC address on virgin OTP words above, you can use the fuse command + - STM32MP13x OTP: + + - OTP_57[31:0] = MAC_ADDR0[31:0] + - OTP_58[15:0] = MAC_ADDR0[47:32] + - OTP_58[31:16] = MAC_ADDR1[15:0] + - OTP_59[31:0] = MAC_ADDR1[47:16] + +To program a MAC address on virgin STM32MP15x OTP words above, you can use the fuse command on bank 0 to access to internal OTP and lock them: +In the next example we are using the 2 OTPs used on STM32MP15x. + Prerequisite: check if a MAC address isn't yet programmed in OTP 1) check OTP: their value must be equal to 0:: @@ -571,8 +640,8 @@ Example to set mac address "12:34:56:78:9a:bc" OTP are protected. It is already done for the board provided by STMicroelectronics. -Coprocessor firmware --------------------- +Coprocessor firmware on STM32MP15x +---------------------------------- U-Boot can boot the coprocessor before the kernel (coprocessor early boot). @@ -678,7 +747,7 @@ All the supported device are exported for dfu-util tool:: You can update the boot device: -- SD card (mmc0) :: +- SD card (mmc0):: $> dfu-util -d 0483:5720 -a 3 -D tf-a-stm32mp157c-ev1.stm32 $> dfu-util -d 0483:5720 -a 4 -D tf-a-stm32mp157c-ev1.stm32 -- GitLab From ca9c9e7e920a46f5fbe5f02d2cc3ed0bf6ea5e4e Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Mon, 9 May 2022 17:13:21 +0200 Subject: [PATCH 179/581] stm32mp: fdt: update etzpc for STM32MP15x Introduce STM32MP15 function and defines to prepare the STM32MP13 introduction. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard Change-Id: I909b205e73dcf207e0216aae5905c3c52472020e --- arch/arm/mach-stm32mp/fdt.c | 129 +++++++++++++++++++----------------- 1 file changed, 70 insertions(+), 59 deletions(-) diff --git a/arch/arm/mach-stm32mp/fdt.c b/arch/arm/mach-stm32mp/fdt.c index 687543e712b..94c85fedcd4 100644 --- a/arch/arm/mach-stm32mp/fdt.c +++ b/arch/arm/mach-stm32mp/fdt.c @@ -28,13 +28,13 @@ #define ETZPC_RESERVED 0xffffffff -#define STM32_FDCAN_BASE 0x4400e000 -#define STM32_CRYP2_BASE 0x4c005000 -#define STM32_CRYP1_BASE 0x54001000 -#define STM32_GPU_BASE 0x59000000 -#define STM32_DSI_BASE 0x5a000000 +#define STM32MP15_FDCAN_BASE 0x4400e000 +#define STM32MP15_CRYP2_BASE 0x4c005000 +#define STM32MP15_CRYP1_BASE 0x54001000 +#define STM32MP15_GPU_BASE 0x59000000 +#define STM32MP15_DSI_BASE 0x5a000000 -static const u32 stm32mp1_ip_addr[] = { +static const u32 stm32mp15_ip_addr[] = { 0x5c008000, /* 00 stgenc */ 0x54000000, /* 01 bkpsram */ 0x5c003000, /* 02 iwdg1 */ @@ -44,7 +44,7 @@ static const u32 stm32mp1_ip_addr[] = { ETZPC_RESERVED, /* 06 reserved */ 0x54003000, /* 07 rng1 */ 0x54002000, /* 08 hash1 */ - STM32_CRYP1_BASE, /* 09 cryp1 */ + STM32MP15_CRYP1_BASE, /* 09 cryp1 */ 0x5a003000, /* 0A ddrctrl */ 0x5a004000, /* 0B ddrphyc */ 0x5c009000, /* 0C i2c6 */ @@ -97,7 +97,7 @@ static const u32 stm32mp1_ip_addr[] = { 0x4400b000, /* 3B sai2 */ 0x4400c000, /* 3C sai3 */ 0x4400d000, /* 3D dfsdm */ - STM32_FDCAN_BASE, /* 3E tt_fdcan */ + STM32MP15_FDCAN_BASE, /* 3E tt_fdcan */ ETZPC_RESERVED, /* 3F reserved */ 0x50021000, /* 40 lptim2 */ 0x50022000, /* 41 lptim3 */ @@ -110,7 +110,7 @@ static const u32 stm32mp1_ip_addr[] = { 0x48003000, /* 48 adc */ 0x4c002000, /* 49 hash2 */ 0x4c003000, /* 4A rng2 */ - STM32_CRYP2_BASE, /* 4B cryp2 */ + STM32MP15_CRYP2_BASE, /* 4B cryp2 */ ETZPC_RESERVED, /* 4C reserved */ ETZPC_RESERVED, /* 4D reserved */ ETZPC_RESERVED, /* 4E reserved */ @@ -163,8 +163,13 @@ static int stm32_fdt_fixup_etzpc(void *fdt, int soc_node) int offset, shift; u32 addr, status, decprot[ETZPC_DECPROT_NB]; - array = stm32mp1_ip_addr; - array_size = ARRAY_SIZE(stm32mp1_ip_addr); + if (IS_ENABLED(CONFIG_STM32MP13x)) + return 0; + + if (IS_ENABLED(CONFIG_STM32MP15x)) { + array = stm32mp15_ip_addr; + array_size = ARRAY_SIZE(stm32mp15_ip_addr); + } for (i = 0; i < ETZPC_DECPROT_NB; i++) decprot[i] = readl(ETZPC_DECPROT(i)); @@ -248,36 +253,9 @@ static void stm32_fdt_disable_optee(void *blob) } } -/* - * This function is called right before the kernel is booted. "blob" is the - * device tree that will be passed to the kernel. - */ -int ft_system_setup(void *blob, struct bd_info *bd) +static void stm32mp15_fdt_fixup(void *blob, int soc, u32 cpu, char *name) { - int ret = 0; - int soc; - u32 pkg, cpu; - char name[SOC_NAME_SIZE]; - - if (IS_ENABLED(CONFIG_STM32MP13x)) - return 0; - - soc = fdt_path_offset(blob, "/soc"); - /* when absent, nothing to do */ - if (soc == -FDT_ERR_NOTFOUND) - return 0; - if (soc < 0) - return soc; - - if (CONFIG_IS_ENABLED(STM32_ETZPC)) { - ret = stm32_fdt_fixup_etzpc(blob, soc); - if (ret) - return ret; - } - - /* MPUs Part Numbers and name*/ - cpu = get_cpu_type(); - get_soc_name(name); + u32 pkg; switch (cpu) { case CPU_STM32MP151Fxx: @@ -287,19 +265,18 @@ int ft_system_setup(void *blob, struct bd_info *bd) stm32_fdt_fixup_cpu(blob, name); /* after cpu delete we can't trust the soc offsets anymore */ soc = fdt_path_offset(blob, "/soc"); - stm32_fdt_disable(blob, soc, STM32_FDCAN_BASE, "can", name); - /* fall through */ + stm32_fdt_disable(blob, soc, STM32MP15_FDCAN_BASE, "can", name); + fallthrough; case CPU_STM32MP153Fxx: case CPU_STM32MP153Dxx: case CPU_STM32MP153Cxx: case CPU_STM32MP153Axx: - stm32_fdt_disable(blob, soc, STM32_GPU_BASE, "gpu", name); - stm32_fdt_disable(blob, soc, STM32_DSI_BASE, "dsi", name); + stm32_fdt_disable(blob, soc, STM32MP15_GPU_BASE, "gpu", name); + stm32_fdt_disable(blob, soc, STM32MP15_DSI_BASE, "dsi", name); break; default: break; } - switch (cpu) { case CPU_STM32MP157Dxx: case CPU_STM32MP157Axx: @@ -307,13 +284,14 @@ int ft_system_setup(void *blob, struct bd_info *bd) case CPU_STM32MP153Axx: case CPU_STM32MP151Dxx: case CPU_STM32MP151Axx: - stm32_fdt_disable(blob, soc, STM32_CRYP1_BASE, "cryp", name); - stm32_fdt_disable(blob, soc, STM32_CRYP2_BASE, "cryp", name); + stm32_fdt_disable(blob, soc, STM32MP15_CRYP1_BASE, "cryp", + name); + stm32_fdt_disable(blob, soc, STM32MP15_CRYP2_BASE, "cryp", + name); break; default: break; } - switch (get_cpu_package()) { case STM32MP15_PKG_AA_LBGA448: pkg = STM32MP_PKG_AA; @@ -337,18 +315,51 @@ int ft_system_setup(void *blob, struct bd_info *bd) do_fixup_by_compat_u32(blob, "st,stm32mp157-z-pinctrl", "st,package", pkg, false); } +} + +/* + * This function is called right before the kernel is booted. "blob" is the + * device tree that will be passed to the kernel. + */ +int ft_system_setup(void *blob, struct bd_info *bd) +{ + int ret = 0; + int soc; + u32 cpu; + char name[SOC_NAME_SIZE]; - /* - * TEMP: remove OP-TEE nodes in kernel device tree - * copied from U-Boot device tree by optee_copy_fdt_nodes - * when OP-TEE is not detected (probe failed) - * these OP-TEE nodes are present in -u-boot.dtsi - * under CONFIG_STM32MP15x_STM32IMAGE only for compatibility - * when FIP is not used by TF-A - */ - if (CONFIG_IS_ENABLED(STM32MP15x_STM32IMAGE) && - !tee_find_device(NULL, NULL, NULL, NULL)) - stm32_fdt_disable_optee(blob); + soc = fdt_path_offset(blob, "/soc"); + /* when absent, nothing to do */ + if (soc == -FDT_ERR_NOTFOUND) + return 0; + if (soc < 0) + return soc; + + if (CONFIG_IS_ENABLED(STM32_ETZPC)) { + ret = stm32_fdt_fixup_etzpc(blob, soc); + if (ret) + return ret; + } + + /* MPUs Part Numbers and name*/ + cpu = get_cpu_type(); + get_soc_name(name); + + if (IS_ENABLED(CONFIG_STM32MP15x)) { + stm32mp15_fdt_fixup(blob, soc, cpu, name); + + /* + * TEMP: remove OP-TEE nodes in kernel device tree + * copied from U-Boot device tree by optee_copy_fdt_nodes + * when OP-TEE is not detected (probe failed) + * these OP-TEE nodes are present in -u-boot.dtsi + * under CONFIG_STM32MP15x_STM32IMAGE only for compatibility + * when FIP is not used by TF-A + */ + if (CONFIG_IS_ENABLED(STM32MP15x_STM32IMAGE) && + !tee_find_device(NULL, NULL, NULL, NULL)) + stm32_fdt_disable_optee(blob); + } return ret; } -- GitLab From df68a30979034f89a59aba2704dc35cf2eefe843 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Mon, 9 May 2022 17:13:22 +0200 Subject: [PATCH 180/581] stm32mp: fdt: update etzpc for STM32MP13x Add support of STM32MP13x the ETZPC part of fdt.c Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard Change-Id: If2777fbf66b8525a2a447056780aaa04e6b0a9a0 --- arch/arm/mach-stm32mp/fdt.c | 153 +++++++++++++++++++++++++++++++++++- 1 file changed, 151 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-stm32mp/fdt.c b/arch/arm/mach-stm32mp/fdt.c index 94c85fedcd4..3b4c05d7451 100644 --- a/arch/arm/mach-stm32mp/fdt.c +++ b/arch/arm/mach-stm32mp/fdt.c @@ -28,12 +28,119 @@ #define ETZPC_RESERVED 0xffffffff +#define STM32MP13_FDCAN_BASE 0x4400F000 +#define STM32MP13_ADC1_BASE 0x48003000 +#define STM32MP13_TSC_BASE 0x5000B000 +#define STM32MP13_CRYP_BASE 0x54002000 +#define STM32MP13_ETH2_BASE 0x5800E000 +#define STM32MP13_DCMIPP_BASE 0x5A000000 +#define STM32MP13_LTDC_BASE 0x5A010000 + #define STM32MP15_FDCAN_BASE 0x4400e000 #define STM32MP15_CRYP2_BASE 0x4c005000 #define STM32MP15_CRYP1_BASE 0x54001000 #define STM32MP15_GPU_BASE 0x59000000 #define STM32MP15_DSI_BASE 0x5a000000 +static const u32 stm32mp13_ip_addr[] = { + 0x50025000, /* 0 VREFBUF APB3 */ + 0x50021000, /* 1 LPTIM2 APB3 */ + 0x50022000, /* 2 LPTIM3 APB3 */ + STM32MP13_LTDC_BASE, /* 3 LTDC APB4 */ + STM32MP13_DCMIPP_BASE, /* 4 DCMIPP APB4 */ + 0x5A006000, /* 5 USBPHYCTRL APB4 */ + 0x5A003000, /* 6 DDRCTRLPHY APB4 */ + ETZPC_RESERVED, /* 7 Reserved*/ + ETZPC_RESERVED, /* 8 Reserved*/ + ETZPC_RESERVED, /* 9 Reserved*/ + 0x5C006000, /* 10 TZC APB5 */ + 0x58001000, /* 11 MCE APB5 */ + 0x5C000000, /* 12 IWDG1 APB5 */ + 0x5C008000, /* 13 STGENC APB5 */ + ETZPC_RESERVED, /* 14 Reserved*/ + ETZPC_RESERVED, /* 15 Reserved*/ + 0x4C000000, /* 16 USART1 APB6 */ + 0x4C001000, /* 17 USART2 APB6 */ + 0x4C002000, /* 18 SPI4 APB6 */ + 0x4C003000, /* 19 SPI5 APB6 */ + 0x4C004000, /* 20 I2C3 APB6 */ + 0x4C005000, /* 21 I2C4 APB6 */ + 0x4C006000, /* 22 I2C5 APB6 */ + 0x4C007000, /* 23 TIM12 APB6 */ + 0x4C008000, /* 24 TIM13 APB6 */ + 0x4C009000, /* 25 TIM14 APB6 */ + 0x4C00A000, /* 26 TIM15 APB6 */ + 0x4C00B000, /* 27 TIM16 APB6 */ + 0x4C00C000, /* 28 TIM17 APB6 */ + ETZPC_RESERVED, /* 29 Reserved*/ + ETZPC_RESERVED, /* 30 Reserved*/ + ETZPC_RESERVED, /* 31 Reserved*/ + STM32MP13_ADC1_BASE, /* 32 ADC1 AHB2 */ + 0x48004000, /* 33 ADC2 AHB2 */ + 0x49000000, /* 34 OTG AHB2 */ + ETZPC_RESERVED, /* 35 Reserved*/ + ETZPC_RESERVED, /* 36 Reserved*/ + STM32MP13_TSC_BASE, /* 37 TSC AHB4 */ + ETZPC_RESERVED, /* 38 Reserved*/ + ETZPC_RESERVED, /* 39 Reserved*/ + 0x54004000, /* 40 RNG AHB5 */ + 0x54003000, /* 41 HASH AHB5 */ + STM32MP13_CRYP_BASE, /* 42 CRYPT AHB5 */ + 0x54005000, /* 43 SAES AHB5 */ + 0x54006000, /* 44 PKA AHB5 */ + 0x54000000, /* 45 BKPSRAM AHB5 */ + ETZPC_RESERVED, /* 46 Reserved*/ + ETZPC_RESERVED, /* 47 Reserved*/ + 0x5800A000, /* 48 ETH1 AHB6 */ + STM32MP13_ETH2_BASE, /* 49 ETH2 AHB6 */ + 0x58005000, /* 50 SDMMC1 AHB6 */ + 0x58007000, /* 51 SDMMC2 AHB6 */ + ETZPC_RESERVED, /* 52 Reserved*/ + ETZPC_RESERVED, /* 53 Reserved*/ + 0x58002000, /* 54 FMC AHB6 */ + 0x58003000, /* 55 QSPI AHB6 */ + ETZPC_RESERVED, /* 56 Reserved*/ + ETZPC_RESERVED, /* 57 Reserved*/ + ETZPC_RESERVED, /* 58 Reserved*/ + ETZPC_RESERVED, /* 59 Reserved*/ + 0x30000000, /* 60 SRAM1 MLAHB */ + 0x30004000, /* 61 SRAM2 MLAHB */ + 0x30006000, /* 62 SRAM3 MLAHB */ + ETZPC_RESERVED, /* 63 Reserved*/ + ETZPC_RESERVED, /* 64 Reserved*/ + ETZPC_RESERVED, /* 65 Reserved*/ + ETZPC_RESERVED, /* 66 Reserved*/ + ETZPC_RESERVED, /* 67 Reserved*/ + ETZPC_RESERVED, /* 68 Reserved*/ + ETZPC_RESERVED, /* 69 Reserved*/ + ETZPC_RESERVED, /* 70 Reserved*/ + ETZPC_RESERVED, /* 71 Reserved*/ + ETZPC_RESERVED, /* 72 Reserved*/ + ETZPC_RESERVED, /* 73 Reserved*/ + ETZPC_RESERVED, /* 74 Reserved*/ + ETZPC_RESERVED, /* 75 Reserved*/ + ETZPC_RESERVED, /* 76 Reserved*/ + ETZPC_RESERVED, /* 77 Reserved*/ + ETZPC_RESERVED, /* 78 Reserved*/ + ETZPC_RESERVED, /* 79 Reserved*/ + ETZPC_RESERVED, /* 80 Reserved*/ + ETZPC_RESERVED, /* 81 Reserved*/ + ETZPC_RESERVED, /* 82 Reserved*/ + ETZPC_RESERVED, /* 83 Reserved*/ + ETZPC_RESERVED, /* 84 Reserved*/ + ETZPC_RESERVED, /* 85 Reserved*/ + ETZPC_RESERVED, /* 86 Reserved*/ + ETZPC_RESERVED, /* 87 Reserved*/ + ETZPC_RESERVED, /* 88 Reserved*/ + ETZPC_RESERVED, /* 89 Reserved*/ + ETZPC_RESERVED, /* 90 Reserved*/ + ETZPC_RESERVED, /* 91 Reserved*/ + ETZPC_RESERVED, /* 92 Reserved*/ + ETZPC_RESERVED, /* 93 Reserved*/ + ETZPC_RESERVED, /* 94 Reserved*/ + ETZPC_RESERVED, /* 95 Reserved*/ +}; + static const u32 stm32mp15_ip_addr[] = { 0x5c008000, /* 00 stgenc */ 0x54000000, /* 01 bkpsram */ @@ -163,8 +270,10 @@ static int stm32_fdt_fixup_etzpc(void *fdt, int soc_node) int offset, shift; u32 addr, status, decprot[ETZPC_DECPROT_NB]; - if (IS_ENABLED(CONFIG_STM32MP13x)) - return 0; + if (IS_ENABLED(CONFIG_STM32MP13x)) { + array = stm32mp13_ip_addr; + array_size = ARRAY_SIZE(stm32mp13_ip_addr); + } if (IS_ENABLED(CONFIG_STM32MP15x)) { array = stm32mp15_ip_addr; @@ -253,6 +362,43 @@ static void stm32_fdt_disable_optee(void *blob) } } +static void stm32mp13_fdt_fixup(void *blob, int soc, u32 cpu, char *name) +{ + switch (cpu) { + case CPU_STM32MP131Fxx: + case CPU_STM32MP131Dxx: + case CPU_STM32MP131Cxx: + case CPU_STM32MP131Axx: + stm32_fdt_disable(blob, soc, STM32MP13_FDCAN_BASE, "can", name); + stm32_fdt_disable(blob, soc, STM32MP13_ADC1_BASE, "adc", name); + fallthrough; + case CPU_STM32MP133Fxx: + case CPU_STM32MP133Dxx: + case CPU_STM32MP133Cxx: + case CPU_STM32MP133Axx: + stm32_fdt_disable(blob, soc, STM32MP13_LTDC_BASE, "ltdc", name); + stm32_fdt_disable(blob, soc, STM32MP13_DCMIPP_BASE, "dcmipp", + name); + stm32_fdt_disable(blob, soc, STM32MP13_TSC_BASE, "tsc", name); + break; + default: + break; + } + + switch (cpu) { + case CPU_STM32MP135Dxx: + case CPU_STM32MP135Axx: + case CPU_STM32MP133Dxx: + case CPU_STM32MP133Axx: + case CPU_STM32MP131Dxx: + case CPU_STM32MP131Axx: + stm32_fdt_disable(blob, soc, STM32MP13_CRYP_BASE, "cryp", name); + break; + default: + break; + } +} + static void stm32mp15_fdt_fixup(void *blob, int soc, u32 cpu, char *name) { u32 pkg; @@ -345,6 +491,9 @@ int ft_system_setup(void *blob, struct bd_info *bd) cpu = get_cpu_type(); get_soc_name(name); + if (IS_ENABLED(CONFIG_STM32MP13x)) + stm32mp13_fdt_fixup(blob, soc, cpu, name); + if (IS_ENABLED(CONFIG_STM32MP15x)) { stm32mp15_fdt_fixup(blob, soc, cpu, name); -- GitLab From b99293338ecd128ab86c6af9d9555dff59978016 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Thu, 19 May 2022 17:56:45 +0200 Subject: [PATCH 181/581] clk: Add directory for STM32 clock drivers Add a directory in drivers/clk to regroup the clock drivers for all STM32 Soc with CONFIG_ARCH_STM32 (MCUs with cortex M) or CONFIG_ARCH_STM32MP (MPUs with cortex A). Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard Reviewed-by: Grzegorz Szymaszek Acked-by: Sean Anderson Change-Id: I955af307963f732167396f0157a30cf2fc91f150 --- MAINTAINERS | 2 +- drivers/clk/Kconfig | 17 +------------- drivers/clk/Makefile | 5 ++-- drivers/clk/stm32/Kconfig | 23 +++++++++++++++++++ drivers/clk/stm32/Makefile | 7 ++++++ .../clk/{clk_stm32f.c => stm32/clk-stm32f.c} | 0 .../{clk_stm32h7.c => stm32/clk-stm32h7.c} | 0 .../{clk_stm32mp1.c => stm32/clk-stm32mp1.c} | 0 8 files changed, 34 insertions(+), 20 deletions(-) create mode 100644 drivers/clk/stm32/Kconfig create mode 100644 drivers/clk/stm32/Makefile rename drivers/clk/{clk_stm32f.c => stm32/clk-stm32f.c} (100%) rename drivers/clk/{clk_stm32h7.c => stm32/clk-stm32h7.c} (100%) rename drivers/clk/{clk_stm32mp1.c => stm32/clk-stm32mp1.c} (100%) diff --git a/MAINTAINERS b/MAINTAINERS index 1ba36b62cc7..ff59962c60b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -491,7 +491,7 @@ S: Maintained F: arch/arm/mach-stm32mp/ F: doc/board/st/ F: drivers/adc/stm32-adc* -F: drivers/clk/clk_stm32mp1.c +F: drivers/clk/stm32/ F: drivers/gpio/stm32_gpio.c F: drivers/hwspinlock/stm32_hwspinlock.c F: drivers/i2c/stm32f7_i2c.c diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index a62b81a1232..fd9e1a80c6a 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -166,22 +166,6 @@ config CLK_SCMI by a SCMI agent based on SCMI clock protocol communication with a SCMI server. -config CLK_STM32F - bool "Enable clock driver support for STM32F family" - depends on CLK && (STM32F7 || STM32F4) - default y - help - This clock driver adds support for RCC clock management - for STM32F4 and STM32F7 SoCs. - -config CLK_STM32MP1 - bool "Enable RCC clock driver for STM32MP1" - depends on ARCH_STM32MP && CLK - default y - help - Enable the STM32 clock (RCC) driver. Enable support for - manipulating STM32MP1's on-SoC clocks. - config CLK_HSDK bool "Enable cgu clock driver for HSDK boards" depends on CLK && TARGET_HSDK @@ -251,6 +235,7 @@ source "drivers/clk/owl/Kconfig" source "drivers/clk/renesas/Kconfig" source "drivers/clk/sunxi/Kconfig" source "drivers/clk/sifive/Kconfig" +source "drivers/clk/stm32/Kconfig" source "drivers/clk/tegra/Kconfig" source "drivers/clk/ti/Kconfig" source "drivers/clk/uniphier/Kconfig" diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index f5b553172c2..c274cda77c6 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -23,6 +23,8 @@ obj-$(CONFIG_ARCH_MTMIPS) += mtmips/ obj-$(CONFIG_ARCH_NPCM) += nuvoton/ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ obj-$(CONFIG_ARCH_SOCFPGA) += altera/ +obj-$(CONFIG_ARCH_STM32) += stm32/ +obj-$(CONFIG_ARCH_STM32MP) += stm32/ obj-$(CONFIG_ARCH_SUNXI) += sunxi/ obj-$(CONFIG_CLK_AT91) += at91/ obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o @@ -39,8 +41,6 @@ obj-$(CONFIG_CLK_OWL) += owl/ obj-$(CONFIG_CLK_RENESAS) += renesas/ obj-$(CONFIG_CLK_SCMI) += clk_scmi.o obj-$(CONFIG_CLK_SIFIVE) += sifive/ -obj-$(CONFIG_CLK_STM32F) += clk_stm32f.o -obj-$(CONFIG_CLK_STM32MP1) += clk_stm32mp1.o obj-$(CONFIG_CLK_UNIPHIER) += uniphier/ obj-$(CONFIG_CLK_VERSACLOCK) += clk_versaclock.o obj-$(CONFIG_CLK_VERSAL) += clk_versal.o @@ -53,4 +53,3 @@ obj-$(CONFIG_MACH_PIC32) += clk_pic32.o obj-$(CONFIG_SANDBOX_CLK_CCF) += clk_sandbox_ccf.o obj-$(CONFIG_SANDBOX) += clk_sandbox.o obj-$(CONFIG_SANDBOX) += clk_sandbox_test.o -obj-$(CONFIG_STM32H7) += clk_stm32h7.o diff --git a/drivers/clk/stm32/Kconfig b/drivers/clk/stm32/Kconfig new file mode 100644 index 00000000000..eac3fc1e9df --- /dev/null +++ b/drivers/clk/stm32/Kconfig @@ -0,0 +1,23 @@ +config CLK_STM32F + bool "Enable clock driver support for STM32F family" + depends on CLK && (STM32F7 || STM32F4) + default y + help + This clock driver adds support for RCC clock management + for STM32F4 and STM32F7 SoCs. + +config CLK_STM32H7 + bool "Enable clock driver support for STM32H7 family" + depends on CLK && STM32H7 + default y + help + This clock driver adds support for RCC clock management + for STM32H7 SoCs. + +config CLK_STM32MP1 + bool "Enable RCC clock driver for STM32MP15" + depends on ARCH_STM32MP && CLK + default y if STM32MP15x + help + Enable the STM32 clock (RCC) driver. Enable support for + manipulating STM32MP15's on-SoC clocks. diff --git a/drivers/clk/stm32/Makefile b/drivers/clk/stm32/Makefile new file mode 100644 index 00000000000..f66f2954033 --- /dev/null +++ b/drivers/clk/stm32/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# Copyright (C) 2022, STMicroelectronics - All Rights Reserved + +obj-$(CONFIG_CLK_STM32F) += clk-stm32f.o +obj-$(CONFIG_CLK_STM32H7) += clk-stm32h7.o +obj-$(CONFIG_CLK_STM32MP1) += clk-stm32mp1.o diff --git a/drivers/clk/clk_stm32f.c b/drivers/clk/stm32/clk-stm32f.c similarity index 100% rename from drivers/clk/clk_stm32f.c rename to drivers/clk/stm32/clk-stm32f.c diff --git a/drivers/clk/clk_stm32h7.c b/drivers/clk/stm32/clk-stm32h7.c similarity index 100% rename from drivers/clk/clk_stm32h7.c rename to drivers/clk/stm32/clk-stm32h7.c diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/stm32/clk-stm32mp1.c similarity index 100% rename from drivers/clk/clk_stm32mp1.c rename to drivers/clk/stm32/clk-stm32mp1.c -- GitLab From f8a0f4a8304a1b9b94d42831633da73e8077f0e0 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Thu, 19 May 2022 17:56:46 +0200 Subject: [PATCH 182/581] misc: stm32mp13: introduce STM32MP13 RCC driver Add the MISC RCC driver for STM32MP13, and bind it to the RCC reset driver, required for initial support. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard Acked-by: Sean Anderson Change-Id: Ida11c15462caf140f87b1e3239efa2b8a689acb9 --- drivers/misc/stm32_rcc.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/misc/stm32_rcc.c b/drivers/misc/stm32_rcc.c index f14d6e26d9c..b816503bfa2 100644 --- a/drivers/misc/stm32_rcc.c +++ b/drivers/misc/stm32_rcc.c @@ -39,6 +39,11 @@ struct stm32_rcc_clk stm32_rcc_clk_mp1 = { .soc = STM32MP1, }; +struct stm32_rcc_clk stm32_rcc_clk_mp13 = { + .drv_name = "stm32mp13_clk", + .soc = STM32MP1, +}; + static int stm32_rcc_bind(struct udevice *dev) { struct udevice *child; @@ -79,6 +84,7 @@ static const struct udevice_id stm32_rcc_ids[] = { {.compatible = "st,stm32f746-rcc", .data = (ulong)&stm32_rcc_clk_f7 }, {.compatible = "st,stm32h743-rcc", .data = (ulong)&stm32_rcc_clk_h7 }, {.compatible = "st,stm32mp1-rcc", .data = (ulong)&stm32_rcc_clk_mp1 }, + {.compatible = "st,stm32mp13-rcc", .data = (ulong)&stm32_rcc_clk_mp13 }, { } }; -- GitLab From 6350633ed992275c30e608a9a6a509a8801fc700 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Thu, 19 May 2022 09:07:29 +0200 Subject: [PATCH 183/581] board: stm32mp1: convert to livetree Replace gd->fdt_blob access with fdt_getprop() function to the function ofnode_get_property() to support a live tree. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- board/st/stm32mp1/stm32mp1.c | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index 3ff5e505ec6..9496890d164 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -82,11 +82,6 @@ #define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21) #define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23) -/* - * Get a global data pointer - */ -DECLARE_GLOBAL_DATA_PTR; - #define USB_LOW_THRESHOLD_UV 200000 #define USB_WARNING_LOW_THRESHOLD_UV 660000 #define USB_START_LOW_THRESHOLD_UV 1230000 @@ -116,8 +111,8 @@ int checkboard(void) mode = "basic"; } - fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible", - &fdt_compat_len); + fdt_compat = ofnode_get_property(ofnode_root(), "compatible", + &fdt_compat_len); log_info("Board: stm32mp1 in %s mode (%s)\n", mode, fdt_compat && fdt_compat_len ? fdt_compat : ""); @@ -690,8 +685,8 @@ int board_late_init(void) int buf_len; if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) { - fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible", - &fdt_compat_len); + fdt_compat = ofnode_get_property(ofnode_root(), "compatible", + &fdt_compat_len); if (fdt_compat && fdt_compat_len) { if (strncmp(fdt_compat, "st,", 3) != 0) { env_set("board_name", fdt_compat); -- GitLab From 655100d706b963e4793cfe0d00e584e991d78127 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Thu, 19 May 2022 09:07:30 +0200 Subject: [PATCH 184/581] board: engicam: stm32mp1: convert to livetree Replace gd->fdt_blob access with fdt_getprop() function to the function ofnode_get_property() to support a live tree. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- board/engicam/stm32mp1/stm32mp1.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/board/engicam/stm32mp1/stm32mp1.c b/board/engicam/stm32mp1/stm32mp1.c index 20d8603c78c..0a3e580f5b4 100644 --- a/board/engicam/stm32mp1/stm32mp1.c +++ b/board/engicam/stm32mp1/stm32mp1.c @@ -14,8 +14,6 @@ #include #include -DECLARE_GLOBAL_DATA_PTR; - int checkboard(void) { char *mode; @@ -28,8 +26,8 @@ int checkboard(void) mode = "basic"; printf("Board: stm32mp1 in %s mode", mode); - fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible", - &fdt_compat_len); + fdt_compat = ofnode_get_property(ofnode_root(), "compatible", + &fdt_compat_len); if (fdt_compat && fdt_compat_len) printf(" (%s)", fdt_compat); puts("\n"); -- GitLab From 5a605b7c8615208c45384eb8692dc8825b007ae1 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Mon, 6 Jun 2022 16:04:15 +0200 Subject: [PATCH 185/581] board: dhelectronics: stm32mp1: convert to livetree Replace call to fdt_*() functions and access to gd->fdt_blob with call to ofnode_*() functions to support a live tree. Tested-by: Marek Vasut Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- board/dhelectronics/dh_stm32mp1/board.c | 38 +++++++++++-------------- 1 file changed, 16 insertions(+), 22 deletions(-) diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c index d407f0bf592..7a4c08cb7fd 100644 --- a/board/dhelectronics/dh_stm32mp1/board.c +++ b/board/dhelectronics/dh_stm32mp1/board.c @@ -9,7 +9,6 @@ #include #include #include -#include #include #include #include @@ -78,11 +77,6 @@ #define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21) #define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23) -/* - * Get a global data pointer - */ -DECLARE_GLOBAL_DATA_PTR; - #define KS_CCR 0x08 #define KS_CCR_EEPROM BIT(9) #define KS_BE0 BIT(12) @@ -96,14 +90,15 @@ int setup_mac_address(void) bool skip_eth0 = false; bool skip_eth1 = false; struct udevice *dev; - int off, ret; + int ret; + ofnode node; ret = eth_env_get_enetaddr("ethaddr", enetaddr); if (ret) /* ethaddr is already set */ skip_eth0 = true; - off = fdt_path_offset(gd->fdt_blob, "ethernet1"); - if (off < 0) { + node = ofnode_path("ethernet1"); + if (!ofnode_valid(node)) { /* ethernet1 is not present in the system */ skip_eth1 = true; goto out_set_ethaddr; @@ -116,7 +111,7 @@ int setup_mac_address(void) goto out_set_ethaddr; } - ret = fdt_node_check_compatible(gd->fdt_blob, off, "micrel,ks8851-mll"); + ret = ofnode_device_is_compatible(node, "micrel,ks8851-mll"); if (ret) goto out_set_ethaddr; @@ -127,7 +122,7 @@ int setup_mac_address(void) * MAC address. */ u32 reg, cider, ccr; - reg = fdt_get_base_address(gd->fdt_blob, off); + reg = ofnode_get_addr(node); if (!reg) goto out_set_ethaddr; @@ -149,13 +144,13 @@ out_set_ethaddr: if (skip_eth0 && skip_eth1) return 0; - off = fdt_path_offset(gd->fdt_blob, "eeprom0"); - if (off < 0) { + node = ofnode_path("eeprom0"); + if (!ofnode_valid(node)) { printf("%s: No eeprom0 path offset\n", __func__); - return off; + return -ENOENT; } - ret = uclass_get_device_by_of_offset(UCLASS_I2C_EEPROM, off, &dev); + ret = uclass_get_device_by_ofnode(UCLASS_I2C_EEPROM, node, &dev); if (ret) { printf("Cannot find EEPROM!\n"); return ret; @@ -191,8 +186,8 @@ int checkboard(void) mode = "basic"; printf("Board: stm32mp1 in %s mode", mode); - fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible", - &fdt_compat_len); + fdt_compat = ofnode_get_property(ofnode_root(), "compatible", + &fdt_compat_len); if (fdt_compat && fdt_compat_len) printf(" (%s)", fdt_compat); puts("\n"); @@ -289,7 +284,7 @@ int board_fit_config_name_match(const char *name) const char *compat; char test[128]; - compat = fdt_getprop(gd->fdt_blob, 0, "compatible", NULL); + compat = ofnode_get_property(ofnode_root(), "compatible", NULL); snprintf(test, sizeof(test), "%s_somrev%d_boardrev%d", compat, somcode, brdcode); @@ -604,14 +599,13 @@ static void board_init_fmc2(void) #define STPMIC_NVM_BUCKS_VOUT_SHR_BUCK_OFFSET(n) ((((n) - 1) & 3) * 2) static int board_get_regulator_buck3_nvm_uv_av96(int *uv) { - const void *fdt = gd->fdt_blob; struct udevice *dev; u8 bucks_vout = 0; const char *prop; int len, ret; /* Check whether this is Avenger96 board. */ - prop = fdt_getprop(fdt, 0, "compatible", &len); + prop = ofnode_get_property(ofnode_root(), "compatible", &len); if (!prop || !len) return -ENODEV; @@ -701,8 +695,8 @@ int board_late_init(void) const void *fdt_compat; int fdt_compat_len; - fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible", - &fdt_compat_len); + fdt_compat = ofnode_get_property(ofnode_root(), "compatible", + &fdt_compat_len); if (fdt_compat && fdt_compat_len) { if (strncmp(fdt_compat, "st,", 3) != 0) env_set("board_name", fdt_compat); -- GitLab From 89c30ae96318feb1d1e7778059acfdbe41cac10b Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Mon, 6 Jun 2022 16:04:16 +0200 Subject: [PATCH 186/581] ARM: stm32: activate OF_LIVE for DHSOM Activate the live DT with CONFIG_OF_LIVE to reduce the DT parsing time. Tested-by: Marek Vasut Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- configs/stm32mp15_dhcom_basic_defconfig | 1 + configs/stm32mp15_dhcor_basic_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 72d2f6e9a7c..fc23400264c 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -84,6 +84,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=nor0:256k(fsbl1),256k(fsbl2),1408k(uboot),64k( # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_ISO_PARTITION is not set # CONFIG_SPL_PARTITION_UUIDS is not set +CONFIG_OF_LIVE=y CONFIG_OF_LIST="stm32mp15xx-dhcom-pdk2 stm32mp15xx-dhcom-drc02 stm32mp15xx-dhcom-picoitx" CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-names interrupts-extended interrupt-controller \\\#interrupt-cells interrupt-parent dmas dma-names assigned-clocks assigned-clock-rates assigned-clock-parents hwlocks" CONFIG_ENV_IS_IN_SPI_FLASH=y diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index b16ad4fca2a..e08510179e6 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -82,6 +82,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=nor0:256k(fsbl1),256k(fsbl2),1408k(uboot),64k( # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_ISO_PARTITION is not set # CONFIG_SPL_PARTITION_UUIDS is not set +CONFIG_OF_LIVE=y CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-names interrupts-extended interrupt-controller \\\#interrupt-cells interrupt-parent dmas dma-names assigned-clocks assigned-clock-rates assigned-clock-parents hwlocks" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -- GitLab From 7171d9929640fad7d0176f6fbb16263e2d8d1559 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Wed, 1 Jun 2022 18:33:40 +0200 Subject: [PATCH 187/581] stm32mp: stpmic1: remove the debug unit request by debugger Depending on backup register value, U-Boot SPL maintains the debug unit powered-on for debugging purpose; only BUCK1 is required for powering the debug unit, so revert the setting for all the other power lanes, except BUCK3 that has to be always on. To be functional this patch requires a modification in the debugger ,openocd for example, to update the STM32MP15 backup register when it is required to debug SPL after reset. After deeper analysis this behavior will be never supported in tools so the associated code, will be never used and the associated code can be removed. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- arch/arm/mach-stm32mp/include/mach/stm32.h | 1 - board/st/common/stpmic1.c | 14 -------------- include/power/stpmic1.h | 3 --- 3 files changed, 18 deletions(-) diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h b/arch/arm/mach-stm32mp/include/mach/stm32.h index cdb58fd40ec..c70375a723c 100644 --- a/arch/arm/mach-stm32mp/include/mach/stm32.h +++ b/arch/arm/mach-stm32mp/include/mach/stm32.h @@ -135,7 +135,6 @@ enum boot_device { #define TAMP_BOOT_DEVICE_MASK GENMASK(7, 4) #define TAMP_BOOT_INSTANCE_MASK GENMASK(3, 0) #define TAMP_BOOT_FORCED_MASK GENMASK(7, 0) -#define TAMP_BOOT_DEBUG_ON BIT(16) enum forced_boot_mode { BOOT_NORMAL = 0x00, diff --git a/board/st/common/stpmic1.c b/board/st/common/stpmic1.c index 5fb1be2fd3d..d52dce4f657 100644 --- a/board/st/common/stpmic1.c +++ b/board/st/common/stpmic1.c @@ -202,18 +202,4 @@ void stpmic1_init(u32 voltage_mv) STPMIC1_BUCKS_MRST_CR, STPMIC1_MRST_BUCK(STPMIC1_BUCK3), STPMIC1_MRST_BUCK(STPMIC1_BUCK3)); - - /* Check if debug is enabled to program PMIC according to the bit */ - if (readl(TAMP_BOOT_CONTEXT) & TAMP_BOOT_DEBUG_ON) { - log_info("Keep debug unit ON\n"); - - pmic_clrsetbits(dev, STPMIC1_BUCKS_MRST_CR, - STPMIC1_MRST_BUCK_DEBUG, - STPMIC1_MRST_BUCK_DEBUG); - - if (STPMIC1_MRST_LDO_DEBUG) - pmic_clrsetbits(dev, STPMIC1_LDOS_MRST_CR, - STPMIC1_MRST_LDO_DEBUG, - STPMIC1_MRST_LDO_DEBUG); - } } diff --git a/include/power/stpmic1.h b/include/power/stpmic1.h index d3567df326c..201b1df762e 100644 --- a/include/power/stpmic1.h +++ b/include/power/stpmic1.h @@ -23,12 +23,9 @@ /* BUCKS_MRST_CR */ #define STPMIC1_MRST_BUCK(buck) BIT(buck) -#define STPMIC1_MRST_BUCK_DEBUG (STPMIC1_MRST_BUCK(STPMIC1_BUCK1) | \ - STPMIC1_MRST_BUCK(STPMIC1_BUCK3)) /* LDOS_MRST_CR */ #define STPMIC1_MRST_LDO(ldo) BIT(ldo) -#define STPMIC1_MRST_LDO_DEBUG 0 /* BUCKx_MAIN_CR (x=1...4) */ #define STPMIC1_BUCK_ENA BIT(0) -- GitLab From 5c9ea94da930f049eb25b007dd326a21dc427235 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Wed, 15 Jun 2022 19:41:48 +0200 Subject: [PATCH 188/581] configs: stm32mp: cleanup the stm32mp15 file Remove STM32_SYSRAM_END and clean the comments in stm32mp15_common.h file after moving some CONFIG to Kconfig: CONFIG_SYS_CBSIZE, CONFIG_SPL_MAX_FOOTPRINT, CONFIG_SYS_SPL_MALLOC_START and CONFIG_SYS_SPL_MALLOC_SIZE. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- include/configs/stm32mp15_common.h | 11 ----------- 1 file changed, 11 deletions(-) diff --git a/include/configs/stm32mp15_common.h b/include/configs/stm32mp15_common.h index 08a72483bfc..fc636beb3fc 100644 --- a/include/configs/stm32mp15_common.h +++ b/include/configs/stm32mp15_common.h @@ -15,10 +15,6 @@ */ #define CONFIG_SYS_SDRAM_BASE STM32_DDR_BASE -/* - * Console I/O buffer size - */ - /* * For booting Linux, use the first 256 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. @@ -28,13 +24,6 @@ /* Extend size of kernel image for uncompression */ #define CONFIG_SYS_BOOTM_LEN SZ_32M -/* SPL support */ -#ifdef CONFIG_SPL -/* SPL use DDR */ - -/* Restrict SPL to fit within SYSRAM */ -#define STM32_SYSRAM_END (STM32_SYSRAM_BASE + STM32_SYSRAM_SIZE) -#endif /* #ifdef CONFIG_SPL */ /*MMC SD*/ #define CONFIG_SYS_MMC_MAX_DEVICE 3 -- GitLab From eae488b77906692627622abc61f5b7160b6eb2a4 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 20 May 2022 18:38:10 +0200 Subject: [PATCH 189/581] stm32mp1: fix reference for STMicroelectronics Replace reference to the correct name STMicroelectronics Signed-off-by: Patrick Delaunay Reviewed-by: Heiko Schocher Reviewed-by: Patrice Chotard --- arch/arm/Kconfig | 2 +- arch/arm/cpu/armv7/stv0991/lowlevel.S | 2 +- arch/arm/mach-sti/Kconfig | 2 +- drivers/i2c/designware_i2c.c | 2 +- drivers/i2c/designware_i2c.h | 2 +- drivers/i2c/designware_i2c_pci.c | 2 +- drivers/mtd/nand/raw/fsmc_nand.c | 4 ++-- drivers/mtd/spi/spi-nor-ids.c | 2 +- drivers/net/designware.c | 2 +- drivers/net/designware.h | 2 +- drivers/pinctrl/Kconfig | 2 +- drivers/spi/pl022_spi.c | 2 +- drivers/usb/gadget/designware_udc.c | 2 +- include/configs/stm32mp15_st_common.h | 2 +- include/elf.h | 4 ++-- include/linux/mtd/fsmc_nand.h | 2 +- include/usb/designware_udc.h | 2 +- 17 files changed, 19 insertions(+), 19 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index e0488fd641a..c618aad8018 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1928,7 +1928,7 @@ config ARCH_STM32 imply CMD_DM config ARCH_STI - bool "Support STMicrolectronics SoCs" + bool "Support STMicroelectronics SoCs" select BLK select CPU_V7A select DM diff --git a/arch/arm/cpu/armv7/stv0991/lowlevel.S b/arch/arm/cpu/armv7/stv0991/lowlevel.S index 218ac70f328..5733eaa15c0 100644 --- a/arch/arm/cpu/armv7/stv0991/lowlevel.S +++ b/arch/arm/cpu/armv7/stv0991/lowlevel.S @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * (C) Copyright 2014 stmicroelectronics + * (C) Copyright 2014 STMicroelectronics */ #include diff --git a/arch/arm/mach-sti/Kconfig b/arch/arm/mach-sti/Kconfig index f9a583af8d8..d9e264024c8 100644 --- a/arch/arm/mach-sti/Kconfig +++ b/arch/arm/mach-sti/Kconfig @@ -9,7 +9,7 @@ choice config TARGET_STIH410_B2260 bool "96Boards STiH410-B2260" help - Support for 96Board STiH410-B2260 based on STMicrolectronics + Support for 96Board STiH410-B2260 based on STMicroelectronics STiH410 soc. This board complies with 96Board Open Platform Specifications. Features: - 1GB DDR diff --git a/drivers/i2c/designware_i2c.c b/drivers/i2c/designware_i2c.c index 1aae6b64bac..e54de42abc3 100644 --- a/drivers/i2c/designware_i2c.c +++ b/drivers/i2c/designware_i2c.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2009 - * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. + * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com. */ #include diff --git a/drivers/i2c/designware_i2c.h b/drivers/i2c/designware_i2c.h index a9c50c90ace..049976e8a23 100644 --- a/drivers/i2c/designware_i2c.h +++ b/drivers/i2c/designware_i2c.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * (C) Copyright 2009 - * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. + * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com. */ #ifndef __DW_I2C_H_ diff --git a/drivers/i2c/designware_i2c_pci.c b/drivers/i2c/designware_i2c_pci.c index 1572c2c6bce..46c2545f214 100644 --- a/drivers/i2c/designware_i2c_pci.c +++ b/drivers/i2c/designware_i2c_pci.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2009 - * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. + * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com. * Copyright 2019 Google Inc */ diff --git a/drivers/mtd/nand/raw/fsmc_nand.c b/drivers/mtd/nand/raw/fsmc_nand.c index 5d197ce0c51..a92c6252a5d 100644 --- a/drivers/mtd/nand/raw/fsmc_nand.c +++ b/drivers/mtd/nand/raw/fsmc_nand.c @@ -1,10 +1,10 @@ // SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2010 - * Vipin Kumar, ST Microelectronics, vipin.kumar@st.com. + * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com. * * (C) Copyright 2012 - * Amit Virdi, ST Microelectronics, amit.virdi@st.com. + * Amit Virdi, STMicroelectronics, amit.virdi@st.com. */ #include diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 7050ddc3971..20cd4d7fc9e 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -280,7 +280,7 @@ const struct flash_info spi_nor_ids[] = { { INFO("sst26wf064", 0xbf2643, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_HAS_SST26LOCK) }, #endif #ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */ - /* ST Microelectronics -- newer production may have feature updates */ + /* STMicroelectronics -- newer production may have feature updates */ { INFO("m25p10", 0x202011, 0, 32 * 1024, 4, 0) }, { INFO("m25p20", 0x202012, 0, 64 * 1024, 4, 0) }, { INFO("m25p40", 0x202013, 0, 64 * 1024, 8, 0) }, diff --git a/drivers/net/designware.c b/drivers/net/designware.c index 1584b9eac17..0e63f70934c 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2010 - * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. + * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com. */ /* diff --git a/drivers/net/designware.h b/drivers/net/designware.h index a82afb99cab..ddc3d4f1506 100644 --- a/drivers/net/designware.h +++ b/drivers/net/designware.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * (C) Copyright 2010 - * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. + * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com. */ #ifndef _DW_ETH_H diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index d9b8287f41e..b6ef2acced2 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -272,7 +272,7 @@ config PINCTRL_STI depends on DM && ARCH_STI default y help - Support pin multiplexing control on STMicrolectronics STi SoCs. + Support pin multiplexing control on STMicroelectronics STi SoCs. The driver is controlled by a device tree node which contains both the GPIO definitions and pin control functions for each available diff --git a/drivers/spi/pl022_spi.c b/drivers/spi/pl022_spi.c index ea1691438be..828eab3d342 100644 --- a/drivers/spi/pl022_spi.c +++ b/drivers/spi/pl022_spi.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2012 - * Armando Visconti, ST Microelectronics, armando.visconti@st.com. + * Armando Visconti, STMicroelectronics, armando.visconti@st.com. * * (C) Copyright 2018 * Quentin Schulz, Bootlin, quentin.schulz@bootlin.com diff --git a/drivers/usb/gadget/designware_udc.c b/drivers/usb/gadget/designware_udc.c index 7fc5d27d436..41a6e8cb7d3 100644 --- a/drivers/usb/gadget/designware_udc.c +++ b/drivers/usb/gadget/designware_udc.c @@ -4,7 +4,7 @@ * TI OMAP1510 USB bus interface driver * * (C) Copyright 2009 - * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. + * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com. */ #include diff --git a/include/configs/stm32mp15_st_common.h b/include/configs/stm32mp15_st_common.h index 3c0ffb8f56f..37b216e6e9f 100644 --- a/include/configs/stm32mp15_st_common.h +++ b/include/configs/stm32mp15_st_common.h @@ -2,7 +2,7 @@ /* * Copyright (C) 2021, STMicroelectronics - All Rights Reserved * - * Configuration settings for the STMicroelectonics STM32MP15x boards + * Configuration settings for the STMicroelectronics STM32MP15x boards */ #ifndef __CONFIG_STM32MP15_ST_COMMON_H__ diff --git a/include/elf.h b/include/elf.h index b04e746d617..aeda159f0c0 100644 --- a/include/elf.h +++ b/include/elf.h @@ -188,14 +188,14 @@ typedef struct { #define EM_NDR1 57 /* Denso NDR1 microprocessor */ #define EM_STARCORE 58 /* Motorola Start*Core processor */ #define EM_ME16 59 /* Toyota ME16 processor */ -#define EM_ST100 60 /* STMicroelectronic ST100 processor */ +#define EM_ST100 60 /* STMicroelectronics ST100 processor */ #define EM_TINYJ 61 /* Advanced Logic Corp. Tinyj emb.fam*/ #define EM_X86_64 62 /* AMD x86-64 */ #define EM_PDSP 63 /* Sony DSP Processor */ /* RESERVED 64,65 for future use */ #define EM_FX66 66 /* Siemens FX66 microcontroller */ #define EM_ST9PLUS 67 /* STMicroelectronics ST9+ 8/16 mc */ -#define EM_ST7 68 /* STmicroelectronics ST7 8 bit mc */ +#define EM_ST7 68 /* STMicroelectronics ST7 8 bit mc */ #define EM_68HC16 69 /* Motorola MC68HC16 microcontroller */ #define EM_68HC11 70 /* Motorola MC68HC11 microcontroller */ #define EM_68HC08 71 /* Motorola MC68HC08 microcontroller */ diff --git a/include/linux/mtd/fsmc_nand.h b/include/linux/mtd/fsmc_nand.h index 6079f9e260d..1d8a067f17e 100644 --- a/include/linux/mtd/fsmc_nand.h +++ b/include/linux/mtd/fsmc_nand.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * (C) Copyright 2010 - * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. + * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com. */ #ifndef __FSMC_NAND_H__ diff --git a/include/usb/designware_udc.h b/include/usb/designware_udc.h index f874e5c35cc..f716f07dd04 100644 --- a/include/usb/designware_udc.h +++ b/include/usb/designware_udc.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * (C) Copyright 2009 - * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. + * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com. */ #ifndef __DW_UDC_H -- GitLab From 2645bc0e12f831377884433a11f1607106edb0e7 Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Fri, 22 Apr 2022 14:34:18 -0400 Subject: [PATCH 190/581] arm: layerscape: Add sfp driver This adds a driver for the Security Fuse Processor (SFP) present on LS1012A, LS1021A, LS1043A, and LS1046A processors. It holds the Super-Root Key (SRK), One-Time-Programmable Master Key (OTPMK), and other "security" related fuses. Similar devices (sharing the same name) are present on other processors, but for the moment this just supports the LS2 variants. The mirror registers are loaded during power-on reset. All mirror registers must be programmed or read at once. Because of this, `fuse prog` will program all fuses, even though only one might be specified. To prevent accidentally burning through all your fuse programming cycles with something like `fuse prog 0 0 A B C D`, we limit ourselves to one programming cycle per reset. Fuses are numbered based on their address. The fuse at 0x1e80200 is 0, the fuse at 0x1e80204 is 1, etc. The TA_PROG_SFP supply must be enabled when programming fuses, but must be disabled when reading them. Typically this supply is enabled by inserting a jumper or by setting a register in the board's FPGA. I've also added support for using a regulator. This could be helpful for automatically issuing the FPGA write, or for toggling a GPIO controlling the supply. I suggest using the following procedure for programming: 1. Override the fuses you wish to program => fuse override 0 2 A B C D 2. Inspect the values and ensure that they are what you expect => fuse sense 0 2 4 3. Enable TA_PROG_SFP 4. Issue a program command using OSPR0 as a dummy. Since it contains the write-protect bit you will usually want to write it last anyway. => fuse prog 0 0 0 5. Disable TA_PROG_SFP 6. Read back the fuses and ensure they are correct => fuse read 0 2 4 Signed-off-by: Sean Anderson --- MAINTAINERS | 5 + drivers/misc/Kconfig | 14 ++ drivers/misc/Makefile | 1 + drivers/misc/ls2_sfp.c | 350 +++++++++++++++++++++++++++++++++++++++++ 4 files changed, 370 insertions(+) create mode 100644 drivers/misc/ls2_sfp.c diff --git a/MAINTAINERS b/MAINTAINERS index 1ba36b62cc7..5912980614d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -293,6 +293,11 @@ F: drivers/spi/spi-qup.c F: drivers/net/mdio-ipq4019.c F: drivers/rng/msm_rng.c +ARM LAYERSCAPE SFP +M: Sean Anderson +S: Maintained +F: drivers/misc/ls2_sfp.c + ARM MARVELL KIRKWOOD ARMADA-XP ARMADA-38X ARMADA-37XX ARMADA-7K/8K M: Stefan Roese S: Maintained diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index f368d52c561..31b10f989c1 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -289,6 +289,20 @@ config JZ4780_EFUSE help This selects support for the eFUSE on Ingenic JZ4780 SoCs. +config LS2_SFP + bool "Layerscape Security Fuse Processor" + depends on FSL_LSCH2 || ARCH_LS1021A + depends on MISC + imply DM_REGULATOR + help + This adds support for the Security Fuse Processor found on Layerscape + SoCs. It contains various fuses related to secure boot, including the + Super Root Key hash, One-Time-Programmable Master Key, Debug + Challenge/Response values, and others. Fuses are numbered according + to their four-byte offset from the start of the bank. + + If you don't need to read/program fuses, say 'n'. + config MXC_OCOTP bool "Enable MXC OCOTP Driver" depends on ARCH_IMX8M || ARCH_MX6 || ARCH_MX7 || ARCH_MX7ULP || ARCH_VF610 diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 6c790308937..7d15e9f1f62 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -52,6 +52,7 @@ obj-$(CONFIG_IMX8ULP) += imx8ulp/ obj-$(CONFIG_LED_STATUS) += status_led.o obj-$(CONFIG_LED_STATUS_GPIO) += gpio_led.o obj-$(CONFIG_MPC83XX_SERDES) += mpc83xx_serdes.o +obj-$(CONFIG_$(SPL_TPL_)LS2_SFP) += ls2_sfp.o obj-$(CONFIG_$(SPL_)MXC_OCOTP) += mxc_ocotp.o obj-$(CONFIG_MXS_OCOTP) += mxs_ocotp.o obj-$(CONFIG_NUVOTON_NCT6102D) += nuvoton_nct6102d.o diff --git a/drivers/misc/ls2_sfp.c b/drivers/misc/ls2_sfp.c new file mode 100644 index 00000000000..dd104962c28 --- /dev/null +++ b/drivers/misc/ls2_sfp.c @@ -0,0 +1,350 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 Sean Anderson + * + * This driver supports the Security Fuse Processor device found on some + * Layerscape processors. At the moment, we only support a few processors. + * This driver was written with reference to the Layerscape SDK User + * Guide [1] and the ATF SFP driver [2]. + * + * [1] https://docs.nxp.com/bundle/GUID-487B2E69-BB19-42CB-AC38-7EF18C0FE3AE/page/GUID-27FC40AD-3321-4A82-B29E-7BB49EE94F23.html + * [2] https://source.codeaurora.org/external/qoriq/qoriq-components/atf/tree/drivers/nxp/sfp?h=github.com/master + */ + +#define LOG_CATEGORY UCLASS_MISC +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define SFP_INGR 0x20 +#define SFP_SVHESR 0x24 +#define SFP_SFPCR 0x28 + +#define SFP_START 0x200 +#define SFP_END 0x284 +#define SFP_SIZE (SFP_END - SFP_START + 4) + +#define SFP_INGR_ERR BIT(8) +#define SFP_INGR_INST GENMASK(7, 0) + +#define SFP_INGR_READFB 0x01 +#define SFP_INGR_PROGFB 0x02 + +#define SFP_SFPCR_PPW GENMASK(15, 0) + +enum ls2_sfp_ioctl { + LS2_SFP_IOCTL_READ, + LS2_SFP_IOCTL_PROG, +}; + +/** + * struct ls2_sfp_priv - private data for LS2 SFP + * @base: Base address of SFP + * @supply: The (optional) supply for TA_PROG_SFP + * @programmed: Whether we've already programmed the fuses since the last + * reset. The SFP has a *very* limited amount of programming + * cycles (two to six, depending on the model), so we try and + * prevent accidentally performing additional programming + * cycles. + * @dirty: Whether the mirror registers have been written to (overridden) + * since we've last read the fuses (either as part of the reset + * process or using a READFB instruction). There is a much larger, + * but still finite, limit on the number of SFP read cycles (around + * 300,000), so we try and minimize reads as well. + */ +struct ls2_sfp_priv { + void __iomem *base; + struct udevice *supply; + bool programmed, dirty; +}; + +static u32 ls2_sfp_readl(struct ls2_sfp_priv *priv, ulong off) +{ + u32 val = be32_to_cpu(readl(priv->base + off)); + + log_debug("%08x = readl(%p)\n", val, priv->base + off); + return val; +} + +static void ls2_sfp_writel(struct ls2_sfp_priv *priv, ulong val, ulong off) +{ + log_debug("writel(%08lx, %p)\n", val, priv->base + off); + writel(cpu_to_be32(val), priv->base + off); +} + +static bool ls2_sfp_validate(struct udevice *dev, int offset, int size) +{ + if (offset < 0 || size < 0) { + dev_notice(dev, "size and offset must be positive\n"); + return false; + } + + if (offset & 3 || size & 3) { + dev_notice(dev, "size and offset must be multiples of 4\n"); + return false; + } + + if (offset + size > SFP_SIZE) { + dev_notice(dev, "size + offset must be <= %#x\n", SFP_SIZE); + return false; + } + + return true; +} + +static int ls2_sfp_read(struct udevice *dev, int offset, void *buf_bytes, + int size) +{ + int i; + struct ls2_sfp_priv *priv = dev_get_priv(dev); + u32 *buf = buf_bytes; + + if (!ls2_sfp_validate(dev, offset, size)) + return -EINVAL; + + for (i = 0; i < size; i += 4) + buf[i >> 2] = ls2_sfp_readl(priv, SFP_START + offset + i); + + return size; +} + +static int ls2_sfp_write(struct udevice *dev, int offset, + const void *buf_bytes, int size) +{ + int i; + struct ls2_sfp_priv *priv = dev_get_priv(dev); + const u32 *buf = buf_bytes; + + if (!ls2_sfp_validate(dev, offset, size)) + return -EINVAL; + + for (i = 0; i < size; i += 4) + ls2_sfp_writel(priv, buf[i >> 2], SFP_START + offset + i); + + priv->dirty = true; + return size; +} + +static int ls2_sfp_check_secret(struct udevice *dev) +{ + struct ls2_sfp_priv *priv = dev_get_priv(dev); + u32 svhesr = ls2_sfp_readl(priv, SFP_SVHESR); + + if (svhesr) { + dev_warn(dev, "secret value hamming error not zero: %08x\n", + svhesr); + return -EIO; + } + return 0; +} + +static int ls2_sfp_transaction(struct ls2_sfp_priv *priv, ulong inst) +{ + u32 ingr; + + ls2_sfp_writel(priv, inst, SFP_INGR); + + do { + ingr = ls2_sfp_readl(priv, SFP_INGR); + } while (FIELD_GET(SFP_INGR_INST, ingr)); + + return FIELD_GET(SFP_INGR_ERR, ingr) ? -EIO : 0; +} + +static int ls2_sfp_ioctl(struct udevice *dev, unsigned long request, void *buf) +{ + int ret; + struct ls2_sfp_priv *priv = dev_get_priv(dev); + + switch (request) { + case LS2_SFP_IOCTL_READ: + if (!priv->dirty) { + dev_dbg(dev, "ignoring read request, since fuses are not dirty\n"); + return 0; + } + + ret = ls2_sfp_transaction(priv, SFP_INGR_READFB); + if (ret) { + dev_err(dev, "error reading fuses\n"); + return ret; + } + + ls2_sfp_check_secret(dev); + priv->dirty = false; + return 0; + case LS2_SFP_IOCTL_PROG: + if (priv->programmed) { + dev_warn(dev, "fuses already programmed\n"); + return -EPERM; + } + + ret = ls2_sfp_check_secret(dev); + if (ret) + return ret; + + if (priv->supply) { + ret = regulator_set_enable(priv->supply, true); + if (ret) + return ret; + } + + ret = ls2_sfp_transaction(priv, SFP_INGR_PROGFB); + priv->programmed = true; + if (priv->supply) + regulator_set_enable(priv->supply, false); + + if (ret) + dev_err(dev, "error programming fuses\n"); + return ret; + default: + dev_dbg(dev, "unknown ioctl %lu\n", request); + return -EINVAL; + } +} + +static const struct misc_ops ls2_sfp_ops = { + .read = ls2_sfp_read, + .write = ls2_sfp_write, + .ioctl = ls2_sfp_ioctl, +}; + +static int ls2_sfp_probe(struct udevice *dev) +{ + int ret; + struct clk clk; + struct ls2_sfp_priv *priv = dev_get_priv(dev); + ulong rate; + + priv->base = dev_read_addr_ptr(dev); + if (!priv->base) { + dev_dbg(dev, "could not read register base\n"); + return -EINVAL; + } + + ret = device_get_supply_regulator(dev, "ta-sfp-prog", &priv->supply); + if (ret && ret != -ENODEV && ret != -ENOSYS) { + dev_dbg(dev, "problem getting supply (err %d)\n", ret); + return ret; + } + + ret = clk_get_by_name(dev, "sfp", &clk); + if (ret == -ENOSYS) { + rate = gd->bus_clk / 4; + } else if (ret) { + dev_dbg(dev, "could not get clock (err %d)\n", ret); + return ret; + } else { + ret = clk_enable(&clk); + if (ret) { + dev_dbg(dev, "could not enable clock (err %d)\n", ret); + return ret; + } + + rate = clk_get_rate(&clk); + clk_free(&clk); + if (!rate || IS_ERR_VALUE(rate)) { + ret = rate ? rate : -ENOENT; + dev_dbg(dev, "could not get clock rate (err %d)\n", + ret); + return ret; + } + } + + /* sfp clock in MHz * 12 */ + ls2_sfp_writel(priv, FIELD_PREP(SFP_SFPCR_PPW, rate * 12 / 1000000), + SFP_SFPCR); + + ls2_sfp_check_secret(dev); + return 0; +} + +static const struct udevice_id ls2_sfp_ids[] = { + { .compatible = "fsl,ls1021a-sfp" }, + { } +}; + +U_BOOT_DRIVER(ls2_sfp) = { + .name = "ls2_sfp", + .id = UCLASS_MISC, + .of_match = ls2_sfp_ids, + .probe = ls2_sfp_probe, + .ops = &ls2_sfp_ops, + .priv_auto = sizeof(struct ls2_sfp_priv), +}; + +static int ls2_sfp_device(struct udevice **dev) +{ + int ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_DRIVER_GET(ls2_sfp), dev); + + if (ret) + log_debug("device not found (err %d)\n", ret); + return ret; +} + +int fuse_read(u32 bank, u32 word, u32 *val) +{ + int ret; + struct udevice *dev; + + ret = ls2_sfp_device(&dev); + if (ret) + return ret; + + ret = misc_ioctl(dev, LS2_SFP_IOCTL_READ, NULL); + if (ret) + return ret; + + ret = misc_read(dev, word << 2, val, sizeof(*val)); + return ret < 0 ? ret : 0; +} + +int fuse_sense(u32 bank, u32 word, u32 *val) +{ + int ret; + struct udevice *dev; + + ret = ls2_sfp_device(&dev); + if (ret) + return ret; + + ret = misc_read(dev, word << 2, val, sizeof(*val)); + return ret < 0 ? ret : 0; +} + +int fuse_prog(u32 bank, u32 word, u32 val) +{ + int ret; + struct udevice *dev; + + ret = ls2_sfp_device(&dev); + if (ret) + return ret; + + ret = misc_write(dev, word << 2, &val, sizeof(val)); + if (ret < 0) + return ret; + + return misc_ioctl(dev, LS2_SFP_IOCTL_PROG, NULL); +} + +int fuse_override(u32 bank, u32 word, u32 val) +{ + int ret; + struct udevice *dev; + + ret = ls2_sfp_device(&dev); + if (ret) + return ret; + + ret = misc_write(dev, word << 2, &val, sizeof(val)); + return ret < 0 ? ret : 0; +} -- GitLab From f99068a8b11f0ba33b5802754d8de183f3ca2b1d Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Fri, 22 Apr 2022 14:34:19 -0400 Subject: [PATCH 191/581] ARM: dts: ls1021a: update the clockgen node QorIQ platforms now use different clock bindings. Although we don't use the device tree for clocks on this platform, it is helpful to sync it because then the bindings will more closely match Linux. Additionally, it allows for using more clock fractions (such as platform/4). This corresponds to Linux commit b6f5e7019391 ("ARM: dts: ls1021a: update the clockgen node"). Signed-off-by: Sean Anderson --- arch/arm/dts/ls1021a.dtsi | 80 ++++++++++++++------------------------- 1 file changed, 28 insertions(+), 52 deletions(-) diff --git a/arch/arm/dts/ls1021a.dtsi b/arch/arm/dts/ls1021a.dtsi index be330c130f5..063655f7ac6 100644 --- a/arch/arm/dts/ls1021a.dtsi +++ b/arch/arm/dts/ls1021a.dtsi @@ -31,17 +31,24 @@ compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <0xf00>; - clocks = <&cluster1_clk>; + clocks = <&clockgen 1 0>; }; cpu@f01 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <0xf01>; - clocks = <&cluster1_clk>; + clocks = <&clockgen 1 0>; }; }; + sysclk: sysclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + clock-output-names = "sysclk"; + }; + timer { compatible = "arm,armv7-timer"; interrupts = , @@ -185,41 +192,10 @@ }; clockgen: clocking@1ee1000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x1ee1000 0x10000>; - - sysclk: sysclk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-output-names = "sysclk"; - }; - - cga_pll1: pll@800 { - compatible = "fsl,qoriq-core-pll-2.0"; - #clock-cells = <1>; - reg = <0x800 0x10>; - clocks = <&sysclk>; - clock-output-names = "cga-pll1", "cga-pll1-div2", - "cga-pll1-div4"; - }; - - platform_clk: pll@c00 { - compatible = "fsl,qoriq-core-pll-2.0"; - #clock-cells = <1>; - reg = <0xc00 0x10>; - clocks = <&sysclk>; - clock-output-names = "platform-clk", "platform-clk-div2"; - }; - - cluster1_clk: clk0c0@0 { - compatible = "fsl,qoriq-core-mux-2.0"; - #clock-cells = <0>; - reg = <0x0 0x10>; - clock-names = "pll1cga", "pll1cga-div2", "pll1cga-div4"; - clocks = <&cga_pll1 0>, <&cga_pll1 1>, <&cga_pll1 2>; - clock-output-names = "cluster1-clk"; - }; + compatible = "fsl,ls1021a-clockgen"; + reg = <0x0 0x1ee1000 0x0 0x1000>; + #clock-cells = <2>; + clocks = <&sysclk>; }; dspi0: dspi@2100000 { @@ -229,7 +205,7 @@ reg = <0x2100000 0x10000>; interrupts = ; clock-names = "dspi"; - clocks = <&platform_clk 1>; + clocks = <&clockgen 4 1>; spi-num-chipselects = <6>; big-endian; status = "disabled"; @@ -242,7 +218,7 @@ reg = <0x2110000 0x10000>; interrupts = ; clock-names = "dspi"; - clocks = <&platform_clk 1>; + clocks = <&clockgen 4 1>; spi-num-chipselects = <6>; big-endian; status = "disabled"; @@ -265,7 +241,7 @@ reg = <0x2180000 0x10000>; interrupts = ; clock-names = "i2c"; - clocks = <&platform_clk 1>; + clocks = <&clockgen 4 1>; status = "disabled"; }; @@ -276,7 +252,7 @@ reg = <0x2190000 0x10000>; interrupts = ; clock-names = "i2c"; - clocks = <&platform_clk 1>; + clocks = <&clockgen 4 1>; status = "disabled"; }; @@ -287,7 +263,7 @@ reg = <0x21a0000 0x10000>; interrupts = ; clock-names = "i2c"; - clocks = <&platform_clk 1>; + clocks = <&clockgen 4 1>; status = "disabled"; }; @@ -336,7 +312,7 @@ compatible = "fsl,ls1021a-lpuart"; reg = <0x2960000 0x1000>; interrupts = ; - clocks = <&platform_clk 1>; + clocks = <&clockgen 4 1>; clock-names = "ipg"; status = "disabled"; }; @@ -345,7 +321,7 @@ compatible = "fsl,ls1021a-lpuart"; reg = <0x2970000 0x1000>; interrupts = ; - clocks = <&platform_clk 1>; + clocks = <&clockgen 4 1>; clock-names = "ipg"; status = "disabled"; }; @@ -354,7 +330,7 @@ compatible = "fsl,ls1021a-lpuart"; reg = <0x2980000 0x1000>; interrupts = ; - clocks = <&platform_clk 1>; + clocks = <&clockgen 4 1>; clock-names = "ipg"; status = "disabled"; }; @@ -363,7 +339,7 @@ compatible = "fsl,ls1021a-lpuart"; reg = <0x2990000 0x1000>; interrupts = ; - clocks = <&platform_clk 1>; + clocks = <&clockgen 4 1>; clock-names = "ipg"; status = "disabled"; }; @@ -372,7 +348,7 @@ compatible = "fsl,ls1021a-lpuart"; reg = <0x29a0000 0x1000>; interrupts = ; - clocks = <&platform_clk 1>; + clocks = <&clockgen 4 1>; clock-names = "ipg"; status = "disabled"; }; @@ -381,7 +357,7 @@ compatible = "fsl,imx21-wdt"; reg = <0x2ad0000 0x10000>; interrupts = ; - clocks = <&platform_clk 1>; + clocks = <&clockgen 4 1>; clock-names = "wdog-en"; big-endian; }; @@ -390,7 +366,7 @@ compatible = "fsl,vf610-sai"; reg = <0x2b50000 0x10000>; interrupts = ; - clocks = <&platform_clk 1>; + clocks = <&clockgen 4 1>; clock-names = "sai"; dma-names = "tx", "rx"; dmas = <&edma0 1 47>, @@ -403,7 +379,7 @@ compatible = "fsl,vf610-sai"; reg = <0x2b60000 0x10000>; interrupts = ; - clocks = <&platform_clk 1>; + clocks = <&clockgen 4 1>; clock-names = "sai"; dma-names = "tx", "rx"; dmas = <&edma0 1 45>, @@ -424,8 +400,8 @@ dma-channels = <32>; big-endian; clock-names = "dmamux0", "dmamux1"; - clocks = <&platform_clk 1>, - <&platform_clk 1>; + clocks = <&clockgen 4 1>, + <&clockgen 4 1>; }; enet0: ethernet@2d10000 { -- GitLab From 7041601141447105249fdb71166a7abaee6fa378 Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Fri, 22 Apr 2022 14:34:20 -0400 Subject: [PATCH 192/581] arch: layerscape: Add SFP binding This adds an SFP binding for the processors it is present on. I have only tested this for the LS1046A. Signed-off-by: Sean Anderson --- arch/arm/dts/fsl-ls1012a.dtsi | 7 +++++++ arch/arm/dts/fsl-ls1043a.dtsi | 7 +++++++ arch/arm/dts/fsl-ls1046a.dtsi | 7 +++++++ arch/arm/dts/ls1021a.dtsi | 7 +++++++ 4 files changed, 28 insertions(+) diff --git a/arch/arm/dts/fsl-ls1012a.dtsi b/arch/arm/dts/fsl-ls1012a.dtsi index 1cdcc99c1ee..796d72fc9ed 100644 --- a/arch/arm/dts/fsl-ls1012a.dtsi +++ b/arch/arm/dts/fsl-ls1012a.dtsi @@ -34,6 +34,13 @@ #size-cells = <2>; ranges; + sfp: efuse@1e80000 { + compatible = "fsl,ls1021a-sfp"; + reg = <0x0 0x1e80000 0x0 0x1000>; + clocks = <&clockgen 4 3>; + clock-names = "sfp"; + }; + clockgen: clocking@1ee1000 { compatible = "fsl,ls1012a-clockgen"; reg = <0x0 0x1ee1000 0x0 0x1000>; diff --git a/arch/arm/dts/fsl-ls1043a.dtsi b/arch/arm/dts/fsl-ls1043a.dtsi index 72877d2ff58..4960973a603 100644 --- a/arch/arm/dts/fsl-ls1043a.dtsi +++ b/arch/arm/dts/fsl-ls1043a.dtsi @@ -38,6 +38,13 @@ #size-cells = <2>; ranges; + sfp: efuse@1e80000 { + compatible = "fsl,ls1021a-sfp"; + reg = <0x0 0x1e80000 0x0 0x1000>; + clocks = <&clockgen 4 3>; + clock-names = "sfp"; + }; + clockgen: clocking@1ee1000 { compatible = "fsl,ls1043a-clockgen"; reg = <0x0 0x1ee1000 0x0 0x1000>; diff --git a/arch/arm/dts/fsl-ls1046a.dtsi b/arch/arm/dts/fsl-ls1046a.dtsi index c655e002aa0..060dc399c2f 100644 --- a/arch/arm/dts/fsl-ls1046a.dtsi +++ b/arch/arm/dts/fsl-ls1046a.dtsi @@ -38,6 +38,13 @@ #size-cells = <2>; ranges; + sfp: efuse@1e80000 { + compatible = "fsl,ls1021a-sfp"; + reg = <0x0 0x1e80000 0x0 0x1000>; + clocks = <&clockgen 4 3>; + clock-names = "sfp"; + }; + clockgen: clocking@1ee1000 { compatible = "fsl,ls1046a-clockgen"; reg = <0x0 0x1ee1000 0x0 0x1000>; diff --git a/arch/arm/dts/ls1021a.dtsi b/arch/arm/dts/ls1021a.dtsi index 063655f7ac6..4f65ee765e3 100644 --- a/arch/arm/dts/ls1021a.dtsi +++ b/arch/arm/dts/ls1021a.dtsi @@ -89,6 +89,13 @@ interrupts = ; }; + sfp: efuse@1e80000 { + compatible = "fsl,ls1021a-sfp"; + reg = <0x0 0x1e80000 0x0 0x10000>; + clocks = <&clockgen 4 3>; + clock-names = "sfp"; + }; + dcfg: dcfg@1ee0000 { compatible = "fsl,ls1021a-dcfg", "syscon"; reg = <0x1ee0000 0x10000>; -- GitLab From bcb3dae32517a384138a953521436b37512fdd1c Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Tue, 26 Apr 2022 14:31:49 -0400 Subject: [PATCH 193/581] ARM: layerscape: Use ARCH_LS104?A insead of TARGET_LS104?ARDB These frequency calculations depend on the RCW format, which is not dependent on any particular board. Switch to using ARCH symbols instead of TARGET. This whole function could probably use less ifdefs, but for now just do a minimal conversion. Fixes: 24cb6f2295 ("fsl-layerscape: Add fsl_esdhc peripheral clock support") Signed-off-by: Sean Anderson --- arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c index 570105a75ed..840e6d412b3 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c @@ -29,8 +29,8 @@ void get_sys_info(struct sys_info *sys_info) * mux 2 clock for LS1043A/LS1046A. */ #if defined(CONFIG_SYS_DPAA_FMAN) || \ - defined(CONFIG_TARGET_LS1046ARDB) || \ - defined(CONFIG_TARGET_LS1043ARDB) + defined(CONFIG_ARCH_LS1046A) || \ + defined(CONFIG_ARCH_LS1043A) u32 rcw_tmp; #endif struct ccsr_clk *clk = (void *)(CONFIG_SYS_FSL_CLK_ADDR); @@ -129,13 +129,13 @@ void get_sys_info(struct sys_info *sys_info) #define HWA_CGA_M2_CLK_SEL 0x00000007 #define HWA_CGA_M2_CLK_SHIFT 0 -#if defined(CONFIG_TARGET_LS1046ARDB) || defined(CONFIG_TARGET_LS1043ARDB) +#if defined(CONFIG_ARCH_LS1046A) || defined(CONFIG_ARCH_LS1043A) rcw_tmp = in_be32(&gur->rcwsr[15]); switch ((rcw_tmp & HWA_CGA_M2_CLK_SEL) >> HWA_CGA_M2_CLK_SHIFT) { case 1: sys_info->freq_cga_m2 = freq_c_pll[1]; break; -#if defined(CONFIG_TARGET_LS1046ARDB) +#if defined(CONFIG_ARCH_LS1046A) case 2: sys_info->freq_cga_m2 = freq_c_pll[1] / 2; break; @@ -143,7 +143,7 @@ void get_sys_info(struct sys_info *sys_info) case 3: sys_info->freq_cga_m2 = freq_c_pll[1] / 3; break; -#if defined(CONFIG_TARGET_LS1046ARDB) +#if defined(CONFIG_ARCH_LS1046A) case 6: sys_info->freq_cga_m2 = freq_c_pll[0] / 2; break; -- GitLab From 1cb0f98f910d10370e3ae11a9c37860a97ac0706 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Wed, 27 Apr 2022 16:04:58 +0200 Subject: [PATCH 194/581] powerpc: dts: p2020: Define MPIC nodes MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Copy definition of MPIC nodes from upstream Linux kernel P2020 dts files. Signed-off-by: Pali Rohár --- arch/powerpc/dts/p2020-post.dtsi | 3 + arch/powerpc/dts/pq3-mpic-timer-B.dtsi | 42 ++++++++++++++ arch/powerpc/dts/pq3-mpic.dtsi | 79 ++++++++++++++++++++++++++ 3 files changed, 124 insertions(+) create mode 100644 arch/powerpc/dts/pq3-mpic-timer-B.dtsi create mode 100644 arch/powerpc/dts/pq3-mpic.dtsi diff --git a/arch/powerpc/dts/p2020-post.dtsi b/arch/powerpc/dts/p2020-post.dtsi index 1c3f78798ef..dd878bf555f 100644 --- a/arch/powerpc/dts/p2020-post.dtsi +++ b/arch/powerpc/dts/p2020-post.dtsi @@ -73,6 +73,9 @@ /include/ "pq3-etsec1-1.dtsi" /include/ "pq3-etsec1-2.dtsi" + +/include/ "pq3-mpic.dtsi" +/include/ "pq3-mpic-timer-B.dtsi" }; /* PCIe controller base address 0x8000 */ diff --git a/arch/powerpc/dts/pq3-mpic-timer-B.dtsi b/arch/powerpc/dts/pq3-mpic-timer-B.dtsi new file mode 100644 index 00000000000..8734cffae1a --- /dev/null +++ b/arch/powerpc/dts/pq3-mpic-timer-B.dtsi @@ -0,0 +1,42 @@ +/* + * PQ3 MPIC Timer (Group B) device tree stub [ controller @ offset 0x42100 ] + * + * Copyright 2011 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +timer@42100 { + compatible = "fsl,mpic-global-timer"; + reg = <0x42100 0x100 0x42300 4>; + interrupts = <4 0 3 0 + 5 0 3 0 + 6 0 3 0 + 7 0 3 0>; +}; diff --git a/arch/powerpc/dts/pq3-mpic.dtsi b/arch/powerpc/dts/pq3-mpic.dtsi new file mode 100644 index 00000000000..71c30eb1005 --- /dev/null +++ b/arch/powerpc/dts/pq3-mpic.dtsi @@ -0,0 +1,79 @@ +/* + * PQ3 MPIC device tree stub [ controller @ offset 0x40000 ] + * + * Copyright 2011 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +mpic: pic@40000 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <4>; + reg = <0x40000 0x40000>; + compatible = "fsl,mpic"; + device_type = "open-pic"; + big-endian; + single-cpu-affinity; + last-interrupt-source = <255>; +}; + +timer@41100 { + compatible = "fsl,mpic-global-timer"; + reg = <0x41100 0x100 0x41300 4>; + interrupts = <0 0 3 0 + 1 0 3 0 + 2 0 3 0 + 3 0 3 0>; +}; + +message@41400 { + compatible = "fsl,mpic-v3.1-msgr"; + reg = <0x41400 0x200>; + interrupts = < + 0xb0 2 0 0 + 0xb1 2 0 0 + 0xb2 2 0 0 + 0xb3 2 0 0>; +}; + +msi@41600 { + compatible = "fsl,mpic-msi"; + reg = <0x41600 0x80>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xe0 0 0 0 + 0xe1 0 0 0 + 0xe2 0 0 0 + 0xe3 0 0 0 + 0xe4 0 0 0 + 0xe5 0 0 0 + 0xe6 0 0 0 + 0xe7 0 0 0>; +}; -- GitLab From 99f17774b7555de960106c41c97de168d6255246 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Wed, 27 Apr 2022 16:04:59 +0200 Subject: [PATCH 195/581] powerpc: dts: p2020: Define crypto node MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Copy definition of crypto node from upstream Linux kernel P2020 dts files. Signed-off-by: Pali Rohár --- arch/powerpc/dts/p2020-post.dtsi | 1 + arch/powerpc/dts/pq3-sec3.1-0.dtsi | 45 ++++++++++++++++++++++++++++++ 2 files changed, 46 insertions(+) create mode 100644 arch/powerpc/dts/pq3-sec3.1-0.dtsi diff --git a/arch/powerpc/dts/p2020-post.dtsi b/arch/powerpc/dts/p2020-post.dtsi index dd878bf555f..e0f1f999ac6 100644 --- a/arch/powerpc/dts/p2020-post.dtsi +++ b/arch/powerpc/dts/p2020-post.dtsi @@ -74,6 +74,7 @@ /include/ "pq3-etsec1-1.dtsi" /include/ "pq3-etsec1-2.dtsi" +/include/ "pq3-sec3.1-0.dtsi" /include/ "pq3-mpic.dtsi" /include/ "pq3-mpic-timer-B.dtsi" }; diff --git a/arch/powerpc/dts/pq3-sec3.1-0.dtsi b/arch/powerpc/dts/pq3-sec3.1-0.dtsi new file mode 100644 index 00000000000..8f0a5669bee --- /dev/null +++ b/arch/powerpc/dts/pq3-sec3.1-0.dtsi @@ -0,0 +1,45 @@ +/* + * PQ3 Sec/Crypto 3.1 device tree stub [ controller @ offset 0x30000 ] + * + * Copyright 2011 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +crypto@30000 { + compatible = "fsl,sec3.1", "fsl,sec3.0", + "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1", + "fsl,sec2.0"; + reg = <0x30000 0x10000>; + interrupts = <45 2 0 0 58 2 0 0>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0xbfe>; + fsl,descriptor-types-mask = <0x3ab0ebf>; +}; -- GitLab From f0bb612d5b1cdca94e086373fcd38d52451d8971 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Wed, 27 Apr 2022 16:05:00 +0200 Subject: [PATCH 196/581] powerpc: dts: p2020: Define DMA nodes MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Copy definition of DMA nodes from upstream Linux kernel P2020 dts files. Signed-off-by: Pali Rohár --- arch/powerpc/dts/p2020-post.dtsi | 3 ++ arch/powerpc/dts/pq3-dma-0.dtsi | 66 ++++++++++++++++++++++++++++++++ arch/powerpc/dts/pq3-dma-1.dtsi | 66 ++++++++++++++++++++++++++++++++ 3 files changed, 135 insertions(+) create mode 100644 arch/powerpc/dts/pq3-dma-0.dtsi create mode 100644 arch/powerpc/dts/pq3-dma-1.dtsi diff --git a/arch/powerpc/dts/p2020-post.dtsi b/arch/powerpc/dts/p2020-post.dtsi index e0f1f999ac6..d6bad4118c2 100644 --- a/arch/powerpc/dts/p2020-post.dtsi +++ b/arch/powerpc/dts/p2020-post.dtsi @@ -64,6 +64,9 @@ interrupts = <16 2 0 0>; }; +/include/ "pq3-dma-0.dtsi" +/include/ "pq3-dma-1.dtsi" + /include/ "pq3-etsec1-0.dtsi" /include/ "pq3-etsec1-timer-0.dtsi" diff --git a/arch/powerpc/dts/pq3-dma-0.dtsi b/arch/powerpc/dts/pq3-dma-0.dtsi new file mode 100644 index 00000000000..b5b37ad30e7 --- /dev/null +++ b/arch/powerpc/dts/pq3-dma-0.dtsi @@ -0,0 +1,66 @@ +/* + * PQ3 DMA device tree stub [ controller @ offset 0x21000 ] + * + * Copyright 2011 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupts = <20 2 0 0>; + }; + dma-channel@80 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupts = <21 2 0 0>; + }; + dma-channel@100 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupts = <22 2 0 0>; + }; + dma-channel@180 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupts = <23 2 0 0>; + }; +}; diff --git a/arch/powerpc/dts/pq3-dma-1.dtsi b/arch/powerpc/dts/pq3-dma-1.dtsi new file mode 100644 index 00000000000..28cb8a55d80 --- /dev/null +++ b/arch/powerpc/dts/pq3-dma-1.dtsi @@ -0,0 +1,66 @@ +/* + * PQ3 DMA device tree stub [ controller @ offset 0xc300 ] + * + * Copyright 2011 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +dma@c300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,eloplus-dma"; + reg = <0xc300 0x4>; + ranges = <0x0 0xc100 0x200>; + cell-index = <1>; + dma-channel@0 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupts = <76 2 0 0>; + }; + dma-channel@80 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupts = <77 2 0 0>; + }; + dma-channel@100 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupts = <78 2 0 0>; + }; + dma-channel@180 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupts = <79 2 0 0>; + }; +}; -- GitLab From 26f6f7188bf03dbf9499ef626253cf3b2c1bd3de Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Wed, 27 Apr 2022 16:05:01 +0200 Subject: [PATCH 197/581] powerpc: dts: p2020: Define ecm, memory and guts nodes MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Copy definition of these nodes from upstream Linux kernel P2020 dts files. Signed-off-by: Pali Rohár --- arch/powerpc/dts/p2020-post.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/powerpc/dts/p2020-post.dtsi b/arch/powerpc/dts/p2020-post.dtsi index d6bad4118c2..d281bed5afd 100644 --- a/arch/powerpc/dts/p2020-post.dtsi +++ b/arch/powerpc/dts/p2020-post.dtsi @@ -56,6 +56,24 @@ /include/ "pq3-duart-0.dtsi" /include/ "pq3-gpio-0.dtsi" + ecm-law@0 { + compatible = "fsl,ecm-law"; + reg = <0x0 0x1000>; + fsl,num-laws = <12>; + }; + + ecm@1000 { + compatible = "fsl,p2020-ecm", "fsl,ecm"; + reg = <0x1000 0x1000>; + interrupts = <17 2 0 0>; + }; + + memory-controller@2000 { + compatible = "fsl,p2020-memory-controller"; + reg = <0x2000 0x1000>; + interrupts = <18 2 0 0>; + }; + L2: l2-cache-controller@20000 { compatible = "fsl,p2020-l2-cache-controller"; reg = <0x20000 0x1000>; @@ -80,6 +98,12 @@ /include/ "pq3-sec3.1-0.dtsi" /include/ "pq3-mpic.dtsi" /include/ "pq3-mpic-timer-B.dtsi" + + global-utilities@e0000 { + compatible = "fsl,p2020-guts"; + reg = <0xe0000 0x1000>; + fsl,has-rstcr; + }; }; /* PCIe controller base address 0x8000 */ -- GitLab From 549bb6b2376b81f30b9492afeff5d6cdf7523eeb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Thu, 28 Apr 2022 13:31:43 +0200 Subject: [PATCH 198/581] powerpc: mpc85xx: Fix compilation with CONFIG_WDT MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When CONFIG_WDT is enabled then non-DM watchdog code cannot be used due to conflicting functions like watchdog_reset(). So disable compilation of mpc85xx watchdog_reset() function when CONFIG_WDT is enabled. Signed-off-by: Pali Rohár --- arch/powerpc/cpu/mpc85xx/cpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c index a82516a75bd..ba9736ebef4 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu.c +++ b/arch/powerpc/cpu/mpc85xx/cpu.c @@ -344,6 +344,7 @@ __weak unsigned long get_tbclk(void) } +#ifndef CONFIG_WDT #if defined(CONFIG_WATCHDOG) #define WATCHDOG_MASK (TCR_WP(63) | TCR_WRC(3) | TCR_WIE) void @@ -372,6 +373,7 @@ watchdog_reset(void) enable_interrupts(); } #endif /* CONFIG_WATCHDOG */ +#endif /* * Initializes on-chip MMC controllers. -- GitLab From ae0e7ee88658bf9226a29453664e7b5c26d2c0a0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Sun, 1 May 2022 14:20:48 +0200 Subject: [PATCH 199/581] board: freescale: p1_p2_rdb_pc: Enable TDM function only for P1010 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit TDM function is supported only on P1010. P2020 does not have PMUXCR_TDM_ENA register, so do not enable it. Signed-off-by: Pali Rohár --- board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c index 6665aa4ba94..fc676eb31fe 100644 --- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c +++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c @@ -154,7 +154,9 @@ int board_early_init_f(void) clrbits_be32(&gur->sdhcdcr, SDHCDCR_CD_INV); clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA); +#if defined(CONFIG_TARGET_P1020RDB_PD) || defined(CONFIG_TARGET_P1020RDB_PC) setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_TDM_ENA); +#endif board_gpio_init(); board_cpld_init(); -- GitLab From 20fb58fc5a1c83ee0085b2e9f7ecda8b761a5592 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Sun, 1 May 2022 14:23:14 +0200 Subject: [PATCH 200/581] board: freescale: p1_p2_rdb_pc: Implement board_reset() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Do board reset via CPLD's system reset register. Signed-off-by: Pali Rohár --- board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c index fc676eb31fe..947bbc9a5ab 100644 --- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c +++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c @@ -83,6 +83,12 @@ struct cpld_data { #define CPLD_FXS_LED 0x0F #define CPLD_SYS_RST 0x00 +void board_reset(void) +{ + struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE); + out_8(&cpld_data->system_rst, 1); +} + void board_cpld_init(void) { struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE); -- GitLab From 02c8fbdb8d41cfa81e2df990da8151ea93bb2f7e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Sun, 1 May 2022 17:45:58 +0200 Subject: [PATCH 201/581] powerpc: fsl_law: Add definition for first PCIe target interface MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Header file asm/fsl_law.h already provides correct definition for second and third PCIe controller (LAW_TRGT_IF_PCIE_2 and LAW_TRGT_IF_PCIE_3). But is missing definition for the first PCIe controller (LAW_TRGT_IF_PCIE_1). Note that existing definition for LAW_TRGT_IF_PCIE_2 and LAW_TRGT_IF_PCIE_3 are slightly complicated, but are really correct for P2020 platform. Signed-off-by: Pali Rohár --- arch/powerpc/include/asm/fsl_law.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/powerpc/include/asm/fsl_law.h b/arch/powerpc/include/asm/fsl_law.h index 39fbc04e474..9e2f2d5370d 100644 --- a/arch/powerpc/include/asm/fsl_law.h +++ b/arch/powerpc/include/asm/fsl_law.h @@ -78,6 +78,7 @@ enum law_trgt_if { enum law_trgt_if { LAW_TRGT_IF_PCI = 0x00, LAW_TRGT_IF_PCI_2 = 0x01, + LAW_TRGT_IF_PCIE_1 = 0x02, #if defined(CONFIG_ARCH_BSC9131) || defined(CONFIG_ARCH_BSC9132) LAW_TRGT_IF_OCN_DSP = 0x03, #else -- GitLab From 6b6c377feb4805f56bfd8de42143b75fc4a186af Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Sun, 1 May 2022 19:17:35 +0200 Subject: [PATCH 202/581] powerpc: mmu: Fix FSL_BOOKE_MAS2() macro MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Effective page number mask for MAS2 register is stored in macro MAS2_EPN. Fixes: 2146cf56821c ("Reworked FSL Book-E TLB macros to be more readable") Signed-off-by: Pali Rohár --- arch/powerpc/include/asm/mmu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h index 2e6255f0d60..b0aafdcdae1 100644 --- a/arch/powerpc/include/asm/mmu.h +++ b/arch/powerpc/include/asm/mmu.h @@ -447,7 +447,7 @@ extern void print_bats(void); (((ts) << 12) & MAS1_TS) |\ (MAS1_TSIZE(tsize))) #define FSL_BOOKE_MAS2(epn, wimge) \ - (((epn) & MAS3_RPN) | (wimge)) + (((epn) & MAS2_EPN) | (wimge)) #define FSL_BOOKE_MAS3(rpn, user, perms) \ (((rpn) & MAS3_RPN) | (user) | (perms)) #define FSL_BOOKE_MAS7(rpn) \ -- GitLab From 26153d0b054874c8ed2f5ef98231e4397175f8bd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Mon, 2 May 2022 18:28:08 +0200 Subject: [PATCH 203/581] mtd: rawnand: fsl_elbc: Fix DM support in DTS code path MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit For proper DM support it is required to fill also mtd->dev member. Otherwise DM would not see nand device at all. Signed-off-by: Pali Rohár --- drivers/mtd/nand/raw/fsl_elbc_nand.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/nand/raw/fsl_elbc_nand.c b/drivers/mtd/nand/raw/fsl_elbc_nand.c index e734139b5ea..b0e3eb607ed 100644 --- a/drivers/mtd/nand/raw/fsl_elbc_nand.c +++ b/drivers/mtd/nand/raw/fsl_elbc_nand.c @@ -668,7 +668,7 @@ static void fsl_elbc_ctrl_init(void) elbc_ctrl->addr = NULL; } -static int fsl_elbc_chip_init(int devnum, u8 *addr, ofnode flash_node) +static int fsl_elbc_chip_init(int devnum, u8 *addr, struct udevice *dev) { struct mtd_info *mtd; struct nand_chip *nand; @@ -716,7 +716,8 @@ static int fsl_elbc_chip_init(int devnum, u8 *addr, ofnode flash_node) elbc_ctrl->chips[priv->bank] = priv; /* fill in nand_chip structure */ - nand->flash_node = flash_node; + mtd->dev = dev; + nand->flash_node = dev ? dev_ofnode(dev) : ofnode_null(); /* set up function call table */ nand->read_byte = fsl_elbc_read_byte; @@ -827,14 +828,14 @@ void board_nand_init(void) int i; for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) - fsl_elbc_chip_init(i, (u8 *)base_address[i], ofnode_null()); + fsl_elbc_chip_init(i, (u8 *)base_address[i], NULL); } #else static int fsl_elbc_nand_probe(struct udevice *dev) { - return fsl_elbc_chip_init(0, (void *)dev_read_addr(dev), dev_ofnode(dev)); + return fsl_elbc_chip_init(0, (void *)dev_read_addr(dev), dev); } static const struct udevice_id fsl_elbc_nand_dt_ids[] = { -- GitLab From 39f42fe20a8239c6a878f7fac03e758b2117009e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Mon, 2 May 2022 18:29:25 +0200 Subject: [PATCH 204/581] powerpc: mpc85xx: Set default SYS_IMMR value for P1/P2 CPUs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This reduce usage of per-board custom settings. Signed-off-by: Pali Rohár --- arch/Kconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/Kconfig b/arch/Kconfig index 12de8a11650..b396263e3b0 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -371,6 +371,9 @@ config SYS_IMMR default 0xF0000000 if ARCH_MPC8313 default 0xE0000000 if MPC83xx && !ARCH_MPC8313 default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3 + default 0xFFE00000 if ARCH_P1010 || ARCH_P1011 || ARCH_P1020 || \ + ARCH_P1021 || ARCH_P1024 || ARCH_P1025 || \ + ARCH_P2020 default SYS_CCSRBAR_DEFAULT help Address for the Internal Memory-Mapped Registers (IMMR) window used -- GitLab From d49480637681c0939f7d86b41318e3cc45795036 Mon Sep 17 00:00:00 2001 From: Alison Wang Date: Tue, 10 May 2022 18:29:10 +0800 Subject: [PATCH 205/581] ls1028a: hdp: Add config support for HDP firmware loading This patch adds config support for HDP firmware loading on LS1028A. Signed-off-by: Oliver Brown Signed-off-by: Alison Wang Signed-off-by: Ye Li Signed-off-by: Yangbo Lu --- board/freescale/ls1028a/ls1028a.c | 7 ++++++- configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 2 ++ configs/ls1028aqds_tfa_defconfig | 2 ++ configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 2 ++ configs/ls1028ardb_tfa_defconfig | 2 ++ 5 files changed, 14 insertions(+), 1 deletion(-) diff --git a/board/freescale/ls1028a/ls1028a.c b/board/freescale/ls1028a/ls1028a.c index 71a086ef675..1a7806fad77 100644 --- a/board/freescale/ls1028a/ls1028a.c +++ b/board/freescale/ls1028a/ls1028a.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2019, 2021 NXP + * Copyright 2019-2022 NXP */ #include @@ -328,3 +328,8 @@ int checkboard(void) return 0; } #endif + +void *video_hw_init(void) +{ + return NULL; +} diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig index 7b8f71cfb55..1badfb513a8 100644 --- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig @@ -100,3 +100,5 @@ CONFIG_WDT_SP805=y CONFIG_RSA=y CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_VIDEO=y +CONFIG_VIDEO_LS_HDP_LOAD=y diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig index 8c1655341e5..9439bda71ea 100644 --- a/configs/ls1028aqds_tfa_defconfig +++ b/configs/ls1028aqds_tfa_defconfig @@ -105,3 +105,5 @@ CONFIG_WDT=y CONFIG_WDT_SP805=y CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_VIDEO=y +CONFIG_VIDEO_LS_HDP_LOAD=y diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig index 15777f93b60..8e15ee5b7d4 100644 --- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig @@ -94,3 +94,5 @@ CONFIG_WDT_SP805=y CONFIG_RSA=y CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_VIDEO=y +CONFIG_VIDEO_LS_HDP_LOAD=y diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig index ec4f253e9f0..51fec79b3b6 100644 --- a/configs/ls1028ardb_tfa_defconfig +++ b/configs/ls1028ardb_tfa_defconfig @@ -103,3 +103,5 @@ CONFIG_WDT=y CONFIG_WDT_SP805=y CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_VIDEO=y +CONFIG_VIDEO_LS_HDP_LOAD=y -- GitLab From a29eb319a3f8ccfb657053b2941581fa1933974e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Wed, 11 May 2022 20:27:12 +0200 Subject: [PATCH 206/581] mmc: fsl_esdhc: Set fallback mode to 1-bit MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit 8-bit mode is not supported by SD cards and on P2020 are four SDHC pins shared with SPI (so if P2020 board have also SPI then only 4-bit SDHC mode is provided). So 8-bit SDHC mode is really bad default. When max bus width is not provided then set mode to 1-bit. This mode is supported by all cards, so it is the best option for fallback mode. Also P2020 bootrom sets mode to 1-bit when booting from SD/MMC card. Signed-off-by: Pali Rohár Reviewed-by: Jaehoon Chung --- drivers/mmc/fsl_esdhc.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index fdf2cc290e0..6c6d03d4500 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -946,9 +946,8 @@ int fsl_esdhc_initialize(struct bd_info *bis, struct fsl_esdhc_cfg *cfg) } else if (cfg->max_bus_width == 1) { mmc_cfg->host_caps |= MMC_MODE_1BIT; } else { - mmc_cfg->host_caps |= MMC_MODE_1BIT | MMC_MODE_4BIT | - MMC_MODE_8BIT; - printf("No max bus width provided. Assume 8-bit supported.\n"); + mmc_cfg->host_caps |= MMC_MODE_1BIT; + printf("No max bus width provided. Fallback to 1-bit mode.\n"); } if (IS_ENABLED(CONFIG_ESDHC_DETECT_8_BIT_QUIRK)) -- GitLab From 8f3f8ba945f7e6b4225b2a5f171a64f7679bc8ba Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Wed, 11 May 2022 20:27:13 +0200 Subject: [PATCH 207/581] mmc: fsl_esdhc: Add new config option for default fallback mode MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Currently default fallback SDHC mode is 1-bit. Add new config option CONFIG_SYS_FSL_ESDHC_DEFAULT_BUS_WIDTH to allow specifying default fallback mode. This is useful e.g. for SPL builds which loads other parts from SD card during boot process. Signed-off-by: Pali Rohár Reviewed-by: Jaehoon Chung --- drivers/mmc/Kconfig | 5 +++++ drivers/mmc/fsl_esdhc.c | 1 + 2 files changed, 6 insertions(+) diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index c8f9709d2d4..5a87db6be08 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -839,6 +839,11 @@ config FSL_ESDHC_VS33_NOT_SUPPORT For eSDHC, power supply is through peripheral circuit. 3.3V support is common. Select this if 3.3V power supply not supported. +config SYS_FSL_ESDHC_DEFAULT_BUS_WIDTH + int + depends on FSL_ESDHC + default 1 + config FSL_ESDHC_IMX bool "Freescale/NXP i.MX eSDHC controller support" help diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 6c6d03d4500..4e7bfdfaa7e 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -971,6 +971,7 @@ int fsl_esdhc_mmc_init(struct bd_info *bis) cfg = calloc(sizeof(struct fsl_esdhc_cfg), 1); cfg->esdhc_base = CONFIG_SYS_FSL_ESDHC_ADDR; + cfg->max_bus_width = CONFIG_SYS_FSL_ESDHC_DEFAULT_BUS_WIDTH; /* Prefer peripheral clock which provides higher frequency. */ if (gd->arch.sdhc_per_clk) cfg->sdhc_clk = gd->arch.sdhc_per_clk; -- GitLab From 3acf0be4e6f78feec53df9ab897bf0b26c6fe7c3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Tue, 24 May 2022 13:24:59 +0200 Subject: [PATCH 208/581] powerpc: dts: p2020: Define PMC node MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Copy definition of PMC node from upstream Linux kernel P2020 dts files. Signed-off-by: Pali Rohár --- arch/powerpc/dts/p2020-post.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/powerpc/dts/p2020-post.dtsi b/arch/powerpc/dts/p2020-post.dtsi index d281bed5afd..0d0cd2273cd 100644 --- a/arch/powerpc/dts/p2020-post.dtsi +++ b/arch/powerpc/dts/p2020-post.dtsi @@ -104,6 +104,11 @@ reg = <0xe0000 0x1000>; fsl,has-rstcr; }; + + pmc: power@e0070 { + compatible = "fsl,mpc8548-pmc"; + reg = <0xe0070 0x20>; + }; }; /* PCIe controller base address 0x8000 */ -- GitLab From 676f682bad2ed93a20fcf35dd5af5163d11c126f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Thu, 26 May 2022 10:52:27 +0200 Subject: [PATCH 209/581] board: freescale: p1_p2_rdb_pc: Move boot reset macros to p1_p2_bootsrc.h MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Code for changing boot source is platform generic and can be used by any P1* and P2* compatible RDB board. Not only by boards which use config header file p1_p2_rdb_pc.h. So move this code from p1_p2_rdb_pc.h to p1_p2_bootsrc.h and cleanup macros for generating boot source env variables in CONFIG_EXTRA_ENV_SETTINGS. This allows to use code for resetting board and rebooting to other boot source also by other boards in future. Signed-off-by: Pali Rohár --- include/configs/p1_p2_bootsrc.h | 59 +++++++++++++++++++++++++++++++++ include/configs/p1_p2_rdb_pc.h | 41 +++++------------------ 2 files changed, 68 insertions(+), 32 deletions(-) create mode 100644 include/configs/p1_p2_bootsrc.h diff --git a/include/configs/p1_p2_bootsrc.h b/include/configs/p1_p2_bootsrc.h new file mode 100644 index 00000000000..13e4fdb4fdf --- /dev/null +++ b/include/configs/p1_p2_bootsrc.h @@ -0,0 +1,59 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2010-2011 Freescale Semiconductor, Inc. + * Copyright 2020 NXP + * Copyright 2022 Pali Rohár + */ + +#include + +#if !defined(CONFIG_SYS_SPD_BUS_NUM) || !defined(CONFIG_SYS_I2C_PCA9557_ADDR) +#error "CONFIG_SYS_SPD_BUS_NUM and CONFIG_SYS_I2C_PCA9557_ADDR are required" +#endif + +#define __BOOTSRC_CMD(src, msk) i2c dev CONFIG_SYS_SPD_BUS_NUM; i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 1 src 1; i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 3 msk 1 + +#define __VAR_CMD(var, cmd) __stringify(var=cmd\0) +#define __VAR_CMD_RST(var, cmd) __VAR_CMD(var, cmd; reset) + +#ifdef __SW_NOR_BANK_LO +#define MAP_NOR_LO_CMD(var, ...) __VAR_CMD(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_NOR_BANK_LO, __SW_NOR_BANK_MASK)) +#else +#define MAP_NOR_LO_CMD(var, ...) "" +#endif + +#ifdef __SW_NOR_BANK_UP +#define MAP_NOR_UP_CMD(var, ...) __VAR_CMD(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_NOR_BANK_UP, __SW_NOR_BANK_MASK)) +#else +#define MAP_NOR_UP_CMD(var, ...) "" +#endif + +#ifdef __SW_BOOT_NOR +#define RST_NOR_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_NOR, __SW_BOOT_MASK)) +#else +#define RST_NOR_CMD(var, ...) "" +#endif + +#ifdef __SW_BOOT_SPI +#define RST_SPI_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_SPI, __SW_BOOT_MASK)) +#else +#define RST_SPI_CMD(var, ...) "" +#endif + +#ifdef __SW_BOOT_SD +#define RST_SD_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_SD, __SW_BOOT_MASK)) +#else +#define RST_SD_CMD(var, ...) "" +#endif + +#ifdef __SW_BOOT_NAND +#define RST_NAND_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_NAND, __SW_BOOT_MASK)) +#else +#define RST_NAND_CMD(var, ...) "" +#endif + +#ifdef __SW_BOOT_PCIE +#define RST_PCIE_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_PCIE, __SW_BOOT_MASK)) +#else +#define RST_PCIE_CMD(var, ...) "" +#endif diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index f74ad628fee..56a16502dcc 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -491,31 +491,7 @@ #define CONFIG_ROOTPATH "/opt/nfsroot" #define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ -#ifdef __SW_BOOT_NOR -#define __NOR_RST_CMD \ -norboot=i2c dev CONFIG_SYS_SPD_BUS_NUM; i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 1 __SW_BOOT_NOR 1; \ -i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 3 __SW_BOOT_MASK 1; reset -#endif -#ifdef __SW_BOOT_SPI -#define __SPI_RST_CMD \ -spiboot=i2c dev CONFIG_SYS_SPD_BUS_NUM; i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 1 __SW_BOOT_SPI 1; \ -i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 3 __SW_BOOT_MASK 1; reset -#endif -#ifdef __SW_BOOT_SD -#define __SD_RST_CMD \ -sdboot=i2c dev CONFIG_SYS_SPD_BUS_NUM; i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 1 __SW_BOOT_SD 1; \ -i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 3 __SW_BOOT_MASK 1; reset -#endif -#ifdef __SW_BOOT_NAND -#define __NAND_RST_CMD \ -nandboot=i2c dev CONFIG_SYS_SPD_BUS_NUM; i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 1 __SW_BOOT_NAND 1; \ -i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 3 __SW_BOOT_MASK 1; reset -#endif -#ifdef __SW_BOOT_PCIE -#define __PCIE_RST_CMD \ -pciboot=i2c dev CONFIG_SYS_SPD_BUS_NUM; i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 1 __SW_BOOT_PCIE 1; \ -i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 3 __SW_BOOT_MASK 1; reset -#endif +#include "p1_p2_bootsrc.h" #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ @@ -542,13 +518,14 @@ i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 3 __SW_BOOT_MASK 1; reset "nandfdtaddr=80000\0" \ "ramdisk_size=120000\0" \ __VSCFW_ADDR \ -"map_lowernorbank=i2c dev "__stringify(CONFIG_SYS_SPD_BUS_NUM)"; i2c mw "__stringify(CONFIG_SYS_I2C_PCA9557_ADDR)" 1 "__stringify(__SW_NOR_BANK_LO)" 1; i2c mw "__stringify(CONFIG_SYS_I2C_PCA9557_ADDR)" 3 "__stringify(__SW_NOR_BANK_MASK)" 1\0" \ -"map_uppernorbank=i2c dev "__stringify(CONFIG_SYS_SPD_BUS_NUM)"; i2c mw "__stringify(CONFIG_SYS_I2C_PCA9557_ADDR)" 1 "__stringify(__SW_NOR_BANK_UP)" 1; i2c mw "__stringify(CONFIG_SYS_I2C_PCA9557_ADDR)" 3 "__stringify(__SW_NOR_BANK_MASK)" 1\0" \ -__stringify(__NOR_RST_CMD)"\0" \ -__stringify(__SPI_RST_CMD)"\0" \ -__stringify(__SD_RST_CMD)"\0" \ -__stringify(__NAND_RST_CMD)"\0" \ -__stringify(__PCIE_RST_CMD)"\0" +MAP_NOR_LO_CMD(map_lowernorbank) \ +MAP_NOR_UP_CMD(map_uppernorbank) \ +RST_NOR_CMD(norboot) \ +RST_SPI_CMD(spiboot) \ +RST_SD_CMD(sdboot) \ +RST_NAND_CMD(nandboot) \ +RST_PCIE_CMD(pciboot) \ +"" #define CONFIG_USB_FAT_BOOT \ "setenv bootargs root=/dev/ram rw " \ -- GitLab From 66b2dd9ac3de47376f0ceae22c586a9d725fe071 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Thu, 26 May 2022 14:36:03 +0200 Subject: [PATCH 210/581] powerpc: bootm: Fix sizes in memory adjusting warning MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Old size is stored in size variable and new size is in bootm_size variable. Signed-off-by: Pali Rohár --- arch/powerpc/lib/bootm.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c index 3b43066bb4f..d365705856d 100644 --- a/arch/powerpc/lib/bootm.c +++ b/arch/powerpc/lib/bootm.c @@ -137,7 +137,8 @@ void arch_lmb_reserve(struct lmb *lmb) if (size < bootm_size) { ulong base = bootmap_base + size; - printf("WARNING: adjusting available memory to %lx\n", size); + printf("WARNING: adjusting available memory from 0x%lx to 0x%llx\n", + size, (unsigned long long)bootm_size); lmb_reserve(lmb, base, bootm_size - size); } -- GitLab From 2a9cf320afb051f40a4bbb98aa9a6b1a94332d27 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 30 May 2022 23:02:05 +0200 Subject: [PATCH 211/581] armv8: layerscape: add missing RCW source defines A board might need to get the source of the RCW word, which is also the boot source in most cases. These defines are taken from the LS1028A and I expect they are the same across the SoCs with the same chassis, after all, there was already a reset source for NOR flash. Signed-off-by: Michael Walle --- arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index 863618a5f3d..304cd7980a6 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -230,6 +230,10 @@ #define DCFG_BASE 0x01e00000 #define DCFG_PORSR1 0x000 #define DCFG_PORSR1_RCW_SRC 0xff800000 +#define DCFG_PORSR1_RCW_SRC_SDHC1 0x04000000 +#define DCFG_PORSR1_RCW_SRC_SDHC2 0x04800000 +#define DCFG_PORSR1_RCW_SRC_I2C 0x05000000 +#define DCFG_PORSR1_RCW_SRC_FSPI_NOR 0x07800000 #define DCFG_PORSR1_RCW_SRC_NOR 0x12f00000 #define DCFG_RCWSR12 0x12c #define DCFG_RCWSR12_SDHC_SHIFT 24 -- GitLab From 6bdda4b2003fadbcbcc28a1d395ec1f6f6557539 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 30 May 2022 23:02:07 +0200 Subject: [PATCH 212/581] board: sl28: set CPO value With a 8GiB memory board, it seems that the "very unlikely event" of a DDR initialization with non-optimal values are not really that unlikely. It happens in about every other reboot. As described in erratum A-009942, preset the DEBUG_28 register with an optimal value. The value iself depends on the memory configuration of the board, but the used value seems to work well for all variants. Signed-off-by: Michael Walle --- board/kontron/sl28/ddr.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/board/kontron/sl28/ddr.c b/board/kontron/sl28/ddr.c index 41426996ab9..d75b23e54c6 100644 --- a/board/kontron/sl28/ddr.c +++ b/board/kontron/sl28/ddr.c @@ -54,6 +54,9 @@ static fsl_ddr_cfg_regs_t __maybe_unused ddr_cfg_regs = { .ddr_cdr1 = 0x80040000, .ddr_cdr2 = 0x0000bc01, + + /* Erratum A-009942, set optimal CPO value */ + .debug[28] = 0x00700040, }; int fsl_initdram(void) -- GitLab From 7fd5ca15019577418cdc058049fd9f814696014d Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 30 May 2022 23:02:08 +0200 Subject: [PATCH 213/581] board: sl28: remove unneeded ddr config parameter config_2 doesn't need to be set to zero because that is already the default value. Signed-off-by: Michael Walle --- board/kontron/sl28/ddr.c | 1 - 1 file changed, 1 deletion(-) diff --git a/board/kontron/sl28/ddr.c b/board/kontron/sl28/ddr.c index d75b23e54c6..ed799c6e345 100644 --- a/board/kontron/sl28/ddr.c +++ b/board/kontron/sl28/ddr.c @@ -69,7 +69,6 @@ int fsl_initdram(void) dram_size = 0x80000000; ddr_cfg_regs.cs[1].bnds = 0; ddr_cfg_regs.cs[1].config = 0; - ddr_cfg_regs.cs[1].config_2 = 0; break; case GPPORCR1_MEM_4GB_CS0_1: dram_size = 0x100000000ULL; -- GitLab From 1029249b0065b32ae74e3fa7cd7d0f27d1b80efd Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 30 May 2022 23:02:09 +0200 Subject: [PATCH 214/581] board: sl28: support 8 GiB memory The board supports up to 8 GiB memory. The memory is soldered on the board but the configuration is equivalent to a dual chip select, dual rank DIMM module. Signed-off-by: Michael Walle --- board/kontron/sl28/ddr.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/board/kontron/sl28/ddr.c b/board/kontron/sl28/ddr.c index ed799c6e345..315d9f99c71 100644 --- a/board/kontron/sl28/ddr.c +++ b/board/kontron/sl28/ddr.c @@ -73,6 +73,13 @@ int fsl_initdram(void) case GPPORCR1_MEM_4GB_CS0_1: dram_size = 0x100000000ULL; break; + case GPPORCR1_MEM_8GB_CS0_1: + dram_size = 0x200000000ULL; + ddr_cfg_regs.cs[0].bnds = 0x000000ff; + ddr_cfg_regs.cs[0].config = 0x80044403; + ddr_cfg_regs.cs[1].bnds = 0x010001ff; + ddr_cfg_regs.cs[1].config = 0x80044403; + break; case GPPORCR1_MEM_512MB_CS0: dram_size = 0x20000000; fallthrough; /* for now */ @@ -82,7 +89,6 @@ int fsl_initdram(void) case GPPORCR1_MEM_4GB_CS0_2: dram_size = 0x100000000ULL; fallthrough; /* for now */ - case GPPORCR1_MEM_8GB_CS0_1: case GPPORCR1_MEM_8GB_CS0_1_2_3: dram_size = 0x200000000ULL; fallthrough; /* for now */ -- GitLab From 7bc683afda5ede82cfcace77cecab1891d6d93ff Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 30 May 2022 23:02:10 +0200 Subject: [PATCH 215/581] board: sl28: rename include guard macro Avoid name clashes with an include file on board level. Signed-off-by: Michael Walle --- include/configs/kontron_sl28.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index 6beb0bdf3ed..2373abf3e31 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ -#ifndef __SL28_H -#define __SL28_H +#ifndef __SL28_CONFIG_H +#define __SL28_CONFIG_H #include #include @@ -80,4 +80,4 @@ ENV_MEM_LAYOUT_SETTINGS \ BOOTENV -#endif /* __SL28_H */ +#endif /* __SL28_CONFIG_H */ -- GitLab From 78533a1ce87786d2ba9be70e657b09cded1267e1 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 20 Jun 2022 08:13:12 -0400 Subject: [PATCH 216/581] configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini --- configs/P1010RDB-PA_36BIT_NAND_defconfig | 1 - configs/P1010RDB-PA_36BIT_NOR_defconfig | 1 - configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 1 - configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 1 - configs/P1010RDB-PA_NAND_defconfig | 1 - configs/P1010RDB-PA_NOR_defconfig | 1 - configs/P1010RDB-PA_SDCARD_defconfig | 1 - configs/P1010RDB-PA_SPIFLASH_defconfig | 1 - configs/P1010RDB-PB_36BIT_NAND_defconfig | 1 - configs/P1010RDB-PB_36BIT_NOR_defconfig | 1 - configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 1 - configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 1 - configs/P1010RDB-PB_NAND_defconfig | 1 - configs/P1010RDB-PB_NOR_defconfig | 1 - configs/P1010RDB-PB_SDCARD_defconfig | 1 - configs/P1010RDB-PB_SPIFLASH_defconfig | 1 - configs/P1020RDB-PC_36BIT_NAND_defconfig | 1 - configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 1 - configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 1 - configs/P1020RDB-PC_36BIT_defconfig | 1 - configs/P1020RDB-PC_NAND_defconfig | 1 - configs/P1020RDB-PC_SDCARD_defconfig | 1 - configs/P1020RDB-PC_SPIFLASH_defconfig | 1 - configs/P1020RDB-PC_defconfig | 1 - configs/P1020RDB-PD_NAND_defconfig | 1 - configs/P1020RDB-PD_SDCARD_defconfig | 1 - configs/P1020RDB-PD_SPIFLASH_defconfig | 1 - configs/P1020RDB-PD_defconfig | 1 - configs/P2020RDB-PC_36BIT_NAND_defconfig | 1 - configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 1 - configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 1 - configs/P2020RDB-PC_36BIT_defconfig | 1 - configs/P2020RDB-PC_NAND_defconfig | 1 - configs/P2020RDB-PC_SDCARD_defconfig | 1 - configs/P2020RDB-PC_SPIFLASH_defconfig | 1 - configs/P2020RDB-PC_defconfig | 1 - configs/ap121_defconfig | 2 +- configs/ap143_defconfig | 2 +- configs/ap152_defconfig | 2 +- configs/at91sam9260ek_dataflash_cs0_defconfig | 2 +- configs/at91sam9260ek_dataflash_cs1_defconfig | 2 +- configs/at91sam9260ek_nandflash_defconfig | 2 +- configs/at91sam9261ek_dataflash_cs0_defconfig | 2 +- configs/at91sam9261ek_dataflash_cs3_defconfig | 2 +- configs/at91sam9261ek_nandflash_defconfig | 2 +- configs/at91sam9263ek_dataflash_cs0_defconfig | 2 +- configs/at91sam9263ek_dataflash_defconfig | 2 +- configs/at91sam9263ek_nandflash_defconfig | 2 +- configs/at91sam9263ek_norflash_boot_defconfig | 2 +- configs/at91sam9263ek_norflash_defconfig | 2 +- configs/at91sam9g10ek_dataflash_cs0_defconfig | 2 +- configs/at91sam9g10ek_dataflash_cs3_defconfig | 2 +- configs/at91sam9g10ek_nandflash_defconfig | 2 +- configs/at91sam9g20ek_2mmc_defconfig | 2 +- configs/at91sam9g20ek_2mmc_nandflash_defconfig | 2 +- configs/at91sam9g20ek_dataflash_cs0_defconfig | 2 +- configs/at91sam9g20ek_dataflash_cs1_defconfig | 2 +- configs/at91sam9g20ek_nandflash_defconfig | 2 +- configs/at91sam9m10g45ek_mmc_defconfig | 2 +- configs/at91sam9m10g45ek_nandflash_defconfig | 2 +- configs/at91sam9n12ek_mmc_defconfig | 2 +- configs/at91sam9n12ek_nandflash_defconfig | 2 +- configs/at91sam9n12ek_spiflash_defconfig | 2 +- configs/at91sam9rlek_dataflash_defconfig | 2 +- configs/at91sam9rlek_mmc_defconfig | 2 +- configs/at91sam9rlek_nandflash_defconfig | 2 +- configs/at91sam9x5ek_dataflash_defconfig | 2 +- configs/at91sam9x5ek_mmc_defconfig | 2 +- configs/at91sam9x5ek_nandflash_defconfig | 2 +- configs/at91sam9x5ek_spiflash_defconfig | 2 +- configs/at91sam9xeek_dataflash_cs0_defconfig | 2 +- configs/at91sam9xeek_dataflash_cs1_defconfig | 2 +- configs/at91sam9xeek_nandflash_defconfig | 2 +- configs/chromebook_coral_defconfig | 2 +- configs/chromebook_link64_defconfig | 2 +- configs/chromebook_link_defconfig | 2 +- configs/chromebook_samus_defconfig | 2 +- configs/chromebook_samus_tpl_defconfig | 2 +- configs/elgin-rv1108_defconfig | 2 +- configs/evb-rk3128_defconfig | 2 +- configs/evb-rv1108_defconfig | 2 +- configs/gardena-smart-gateway-at91sam_defconfig | 2 +- configs/imx8mm-icore-mx8mm-ctouch2_defconfig | 1 - configs/imx8mm-icore-mx8mm-edimm2.2_defconfig | 1 - configs/imx8mm_beacon_defconfig | 1 - configs/kontron-sl-mx8mm_defconfig | 1 - configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 3 +-- configs/ls1028aqds_tfa_defconfig | 3 +-- configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 3 +-- configs/ls1028ardb_tfa_defconfig | 3 +-- configs/mscc_jr2_defconfig | 2 +- configs/mscc_luton_defconfig | 2 +- configs/mscc_ocelot_defconfig | 2 +- configs/sam9x60_curiosity_mmc_defconfig | 2 +- configs/sam9x60ek_mmc_defconfig | 2 +- configs/sam9x60ek_nandflash_defconfig | 2 +- configs/sam9x60ek_qspiflash_defconfig | 2 +- configs/sama5d27_giantboard_defconfig | 2 +- configs/sama5d27_som1_ek_mmc1_defconfig | 2 +- configs/sama5d27_som1_ek_mmc_defconfig | 2 +- configs/sama5d27_som1_ek_qspiflash_defconfig | 2 +- configs/sama5d27_wlsom1_ek_mmc_defconfig | 2 +- configs/sama5d27_wlsom1_ek_qspiflash_defconfig | 2 +- configs/sama5d2_icp_mmc_defconfig | 2 +- configs/sama5d2_icp_qspiflash_defconfig | 2 +- configs/sama5d2_ptc_ek_mmc_defconfig | 2 +- configs/sama5d2_ptc_ek_nandflash_defconfig | 2 +- configs/sama5d2_xplained_emmc_defconfig | 2 +- configs/sama5d2_xplained_mmc_defconfig | 2 +- configs/sama5d2_xplained_qspiflash_defconfig | 2 +- configs/sama5d2_xplained_spiflash_defconfig | 2 +- configs/sama5d36ek_cmp_mmc_defconfig | 2 +- configs/sama5d36ek_cmp_nandflash_defconfig | 2 +- configs/sama5d36ek_cmp_spiflash_defconfig | 2 +- configs/sama5d3_xplained_mmc_defconfig | 2 +- configs/sama5d3_xplained_nandflash_defconfig | 2 +- configs/sama5d3xek_mmc_defconfig | 2 +- configs/sama5d3xek_nandflash_defconfig | 2 +- configs/sama5d3xek_spiflash_defconfig | 2 +- configs/sama5d4_xplained_mmc_defconfig | 2 +- configs/sama5d4_xplained_nandflash_defconfig | 2 +- configs/sama5d4_xplained_spiflash_defconfig | 2 +- configs/sama5d4ek_mmc_defconfig | 2 +- configs/sama5d4ek_nandflash_defconfig | 2 +- configs/sama5d4ek_spiflash_defconfig | 2 +- configs/sama7g5ek_mmc1_defconfig | 2 +- configs/sama7g5ek_mmc_defconfig | 2 +- configs/sandbox64_defconfig | 1 - configs/sandbox_defconfig | 1 - configs/sandbox_flattree_defconfig | 1 - 130 files changed, 87 insertions(+), 134 deletions(-) diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index 6c4142c200b..cec563e0f92 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x4000 diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index fb74f9bd5b4..f4209305c1c 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x2000 diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index 324ad908bb0..8dd667ff482 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index 2299f450a97..16bb174e988 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index 5813c75f10a..15c7e993b97 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x4000 diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index 31cf6037e2f..bea23e2d905 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x2000 diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index a51f9acd586..e0d967f8cc1 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index c2b5d7762ce..92587aa03b6 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 4caf43dade2..8e0c4ed3589 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x4000 diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index d5a9287678a..3d5e6dd4eaf 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x2000 diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 50053876f8e..0b99fb33ed8 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index 6f0cd359abb..8a6c44d4898 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 16b52196aeb..6b249dc7eea 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x4000 diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index 9529d97bccf..ec11f8b53dd 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x2000 diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index 6d3be4303a2..7b9aec18829 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index a54f7eab5f2..13c836d1060 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 80bfe31d79a..18d9da85357 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x4000 diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 2619ef0fb17..b88ca9404d8 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index e37c74bd1f1..10fecbbbf14 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index e43c605b4e0..d9f402dbaf1 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x2000 diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 860636292d2..25d5a5b25c9 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x4000 diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index c0d78c9f486..ca71a909049 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index debd83ed93e..71994c4b7de 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 02580c8e0df..854def10770 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x2000 diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index d770fc7ba7e..1c5bb4d5e05 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x20000 diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index db484c0d189..3b86e8ff435 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index d9d63076123..b8a46f379fc 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index 473a596672f..a998a6f9610 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x2000 diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index ac4d4579bb7..bb12b477d38 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x4000 diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index b2a5a72143d..7a60b990fcb 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 42e31b4e22c..9ae632b7cb1 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index dcf5b21ff0f..9b3b77f7291 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x2000 diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 69ca044e5a2..b341a2aed62 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x4000 diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 621e5b035f2..1727584636c 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 04b10d36c52..35a726ec60f 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index 0ae8394a105..5f8ba378e70 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -1,5 +1,4 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x2000 diff --git a/configs/ap121_defconfig b/configs/ap121_defconfig index b78437e9232..e522a3f4c01 100644 --- a/configs/ap121_defconfig +++ b/configs/ap121_defconfig @@ -5,9 +5,9 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="ap121" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xb8020000 CONFIG_DEBUG_UART_CLOCK=25000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_ARCH_ATH79=y CONFIG_DEBUG_UART=y diff --git a/configs/ap143_defconfig b/configs/ap143_defconfig index f16724e4c05..4bdcea30602 100644 --- a/configs/ap143_defconfig +++ b/configs/ap143_defconfig @@ -6,9 +6,9 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="ap143" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xb8020000 CONFIG_DEBUG_UART_CLOCK=25000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_ARCH_ATH79=y CONFIG_TARGET_AP143=y diff --git a/configs/ap152_defconfig b/configs/ap152_defconfig index 2036cde385e..adcc6c54a8f 100644 --- a/configs/ap152_defconfig +++ b/configs/ap152_defconfig @@ -6,9 +6,9 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="ap152" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xb8020000 CONFIG_DEBUG_UART_CLOCK=25000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_ARCH_ATH79=y CONFIG_TARGET_AP152=y diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig index 5d49332a35b..9947d1d4c67 100644 --- a/configs/at91sam9260ek_dataflash_cs0_defconfig +++ b/configs/at91sam9260ek_dataflash_cs0_defconfig @@ -13,9 +13,9 @@ CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig index 0ad24a2d5dd..8e54f1b1335 100644 --- a/configs/at91sam9260ek_dataflash_cs1_defconfig +++ b/configs/at91sam9260ek_dataflash_cs1_defconfig @@ -13,9 +13,9 @@ CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9260ek_nandflash_defconfig b/configs/at91sam9260ek_nandflash_defconfig index 926708d2168..1badceeb2c1 100644 --- a/configs/at91sam9260ek_nandflash_defconfig +++ b/configs/at91sam9260ek_nandflash_defconfig @@ -10,9 +10,9 @@ CONFIG_AT91SAM9260EK=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig index 56f57024df4..8b2f27a406e 100644 --- a/configs/at91sam9261ek_dataflash_cs0_defconfig +++ b/configs/at91sam9261ek_dataflash_cs0_defconfig @@ -12,9 +12,9 @@ CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig index 18734958952..e5350cfd6fe 100644 --- a/configs/at91sam9261ek_dataflash_cs3_defconfig +++ b/configs/at91sam9261ek_dataflash_cs3_defconfig @@ -12,9 +12,9 @@ CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig index 7f6fc42df4d..3557c4e57a6 100644 --- a/configs/at91sam9261ek_nandflash_defconfig +++ b/configs/at91sam9261ek_nandflash_defconfig @@ -9,9 +9,9 @@ CONFIG_AT91SAM9261EK=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig index 55686f7128f..aa69b0f97a0 100644 --- a/configs/at91sam9263ek_dataflash_cs0_defconfig +++ b/configs/at91sam9263ek_dataflash_cs0_defconfig @@ -12,9 +12,9 @@ CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig index 55686f7128f..aa69b0f97a0 100644 --- a/configs/at91sam9263ek_dataflash_defconfig +++ b/configs/at91sam9263ek_dataflash_defconfig @@ -12,9 +12,9 @@ CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9263ek_nandflash_defconfig b/configs/at91sam9263ek_nandflash_defconfig index 8c31f70073f..f88ea5cc3dc 100644 --- a/configs/at91sam9263ek_nandflash_defconfig +++ b/configs/at91sam9263ek_nandflash_defconfig @@ -9,9 +9,9 @@ CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y diff --git a/configs/at91sam9263ek_norflash_boot_defconfig b/configs/at91sam9263ek_norflash_boot_defconfig index 60380e25ab8..b93eeaa2143 100644 --- a/configs/at91sam9263ek_norflash_boot_defconfig +++ b/configs/at91sam9263ek_norflash_boot_defconfig @@ -11,9 +11,9 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_ENV_ADDR=0x107E0000 CONFIG_DEBUG_UART=y diff --git a/configs/at91sam9263ek_norflash_defconfig b/configs/at91sam9263ek_norflash_defconfig index 439c4e11c96..eb2e13ccc09 100644 --- a/configs/at91sam9263ek_norflash_defconfig +++ b/configs/at91sam9263ek_norflash_defconfig @@ -12,9 +12,9 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_ENV_ADDR=0x107E0000 CONFIG_DEBUG_UART=y diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig index 252a34f7ce8..818e630ea2c 100644 --- a/configs/at91sam9g10ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig @@ -12,9 +12,9 @@ CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig index b1450af8932..118d778d4cf 100644 --- a/configs/at91sam9g10ek_dataflash_cs3_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig @@ -12,9 +12,9 @@ CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9g10ek_nandflash_defconfig b/configs/at91sam9g10ek_nandflash_defconfig index 38be58fa89e..bf667606a2a 100644 --- a/configs/at91sam9g10ek_nandflash_defconfig +++ b/configs/at91sam9g10ek_nandflash_defconfig @@ -9,9 +9,9 @@ CONFIG_AT91SAM9G10=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y diff --git a/configs/at91sam9g20ek_2mmc_defconfig b/configs/at91sam9g20ek_2mmc_defconfig index 90bd1517297..d175575f791 100644 --- a/configs/at91sam9g20ek_2mmc_defconfig +++ b/configs/at91sam9g20ek_2mmc_defconfig @@ -13,9 +13,9 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek_2mmc" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_SD_BOOT=y diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig b/configs/at91sam9g20ek_2mmc_nandflash_defconfig index 51586d801ce..2ea5bbd0340 100644 --- a/configs/at91sam9g20ek_2mmc_nandflash_defconfig +++ b/configs/at91sam9g20ek_2mmc_nandflash_defconfig @@ -11,9 +11,9 @@ CONFIG_AT91SAM9G20EK_2MMC=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek_2mmc" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig index f0813e0ae93..304ee157bb7 100644 --- a/configs/at91sam9g20ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig @@ -13,9 +13,9 @@ CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig index 96975a3e126..a93ae955a57 100644 --- a/configs/at91sam9g20ek_dataflash_cs1_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig @@ -13,9 +13,9 @@ CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9g20ek_nandflash_defconfig b/configs/at91sam9g20ek_nandflash_defconfig index af7fe326aba..4c51e7a3355 100644 --- a/configs/at91sam9g20ek_nandflash_defconfig +++ b/configs/at91sam9g20ek_nandflash_defconfig @@ -10,9 +10,9 @@ CONFIG_AT91SAM9260EK=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig index 139eff56d86..18693919507 100644 --- a/configs/at91sam9m10g45ek_mmc_defconfig +++ b/configs/at91sam9m10g45ek_mmc_defconfig @@ -9,9 +9,9 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig b/configs/at91sam9m10g45ek_nandflash_defconfig index fc32ebd5695..46938e5362b 100644 --- a/configs/at91sam9m10g45ek_nandflash_defconfig +++ b/configs/at91sam9m10g45ek_nandflash_defconfig @@ -8,9 +8,9 @@ CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig index 66fad220d2c..95f62e84e43 100644 --- a/configs/at91sam9n12ek_mmc_defconfig +++ b/configs/at91sam9n12ek_mmc_defconfig @@ -7,9 +7,9 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig index 3697d86015d..18ec990fe3b 100644 --- a/configs/at91sam9n12ek_nandflash_defconfig +++ b/configs/at91sam9n12ek_nandflash_defconfig @@ -6,9 +6,9 @@ CONFIG_TARGET_AT91SAM9N12EK=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig index 5ddd14c9d5f..a85afbcc9ee 100644 --- a/configs/at91sam9n12ek_spiflash_defconfig +++ b/configs/at91sam9n12ek_spiflash_defconfig @@ -9,9 +9,9 @@ CONFIG_ENV_OFFSET=0x5000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y diff --git a/configs/at91sam9rlek_dataflash_defconfig b/configs/at91sam9rlek_dataflash_defconfig index a06e2625b9d..20093a80986 100644 --- a/configs/at91sam9rlek_dataflash_defconfig +++ b/configs/at91sam9rlek_dataflash_defconfig @@ -12,9 +12,9 @@ CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9rlek_mmc_defconfig b/configs/at91sam9rlek_mmc_defconfig index ef74c6b349e..ea790941e3e 100644 --- a/configs/at91sam9rlek_mmc_defconfig +++ b/configs/at91sam9rlek_mmc_defconfig @@ -10,9 +10,9 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_SD_BOOT=y diff --git a/configs/at91sam9rlek_nandflash_defconfig b/configs/at91sam9rlek_nandflash_defconfig index d8f490f16bf..18c630ed34e 100644 --- a/configs/at91sam9rlek_nandflash_defconfig +++ b/configs/at91sam9rlek_nandflash_defconfig @@ -9,9 +9,9 @@ CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig index 6bdf18099dc..6e36b60ce05 100644 --- a/configs/at91sam9x5ek_dataflash_defconfig +++ b/configs/at91sam9x5ek_dataflash_defconfig @@ -11,9 +11,9 @@ CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig index 7bc958e059a..eee25d25b75 100644 --- a/configs/at91sam9x5ek_mmc_defconfig +++ b/configs/at91sam9x5ek_mmc_defconfig @@ -9,9 +9,9 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig index 9b5842cbd36..a32eb130f1b 100644 --- a/configs/at91sam9x5ek_nandflash_defconfig +++ b/configs/at91sam9x5ek_nandflash_defconfig @@ -8,9 +8,9 @@ CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig index 347a2ecfe87..f4917297961 100644 --- a/configs/at91sam9x5ek_spiflash_defconfig +++ b/configs/at91sam9x5ek_spiflash_defconfig @@ -11,9 +11,9 @@ CONFIG_ENV_OFFSET=0x5000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig index 5d49332a35b..9947d1d4c67 100644 --- a/configs/at91sam9xeek_dataflash_cs0_defconfig +++ b/configs/at91sam9xeek_dataflash_cs0_defconfig @@ -13,9 +13,9 @@ CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig index 0ad24a2d5dd..8e54f1b1335 100644 --- a/configs/at91sam9xeek_dataflash_cs1_defconfig +++ b/configs/at91sam9xeek_dataflash_cs1_defconfig @@ -13,9 +13,9 @@ CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9xeek_nandflash_defconfig b/configs/at91sam9xeek_nandflash_defconfig index 926708d2168..1badceeb2c1 100644 --- a/configs/at91sam9xeek_nandflash_defconfig +++ b/configs/at91sam9xeek_nandflash_defconfig @@ -10,9 +10,9 @@ CONFIG_AT91SAM9260EK=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index a06f8e21ae0..693f119b791 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -9,9 +9,9 @@ CONFIG_SPL_TEXT_BASE=0xfef10000 CONFIG_TPL_TEXT_BASE=0xffff8000 CONFIG_SPL_SYS_MALLOC_F_LEN=0xf000 CONFIG_BOOTSTAGE_STASH_ADDR=0xfef00000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xde000000 CONFIG_DEBUG_UART_CLOCK=1843200 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_VENDOR_GOOGLE=y CONFIG_TARGET_CHROMEBOOK_CORAL=y CONFIG_DEBUG_UART=y diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig index 28206ee8cec..f735f84d541 100644 --- a/configs/chromebook_link64_defconfig +++ b/configs/chromebook_link64_defconfig @@ -7,9 +7,9 @@ CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="chromebook_link" CONFIG_SPL_TEXT_BASE=0xfffd0000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_X86_RUN_64BIT=y CONFIG_VENDOR_GOOGLE=y CONFIG_TARGET_CHROMEBOOK_LINK64=y diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig index 46ac5d5272e..1bcf9ce61b2 100644 --- a/configs/chromebook_link_defconfig +++ b/configs/chromebook_link_defconfig @@ -6,9 +6,9 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="chromebook_link" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_VENDOR_GOOGLE=y CONFIG_TARGET_CHROMEBOOK_LINK=y CONFIG_DEBUG_UART=y diff --git a/configs/chromebook_samus_defconfig b/configs/chromebook_samus_defconfig index e6d37307b09..8ee114d0a09 100644 --- a/configs/chromebook_samus_defconfig +++ b/configs/chromebook_samus_defconfig @@ -6,9 +6,9 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="chromebook_samus" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_VENDOR_GOOGLE=y CONFIG_TARGET_CHROMEBOOK_SAMUS=y CONFIG_DEBUG_UART=y diff --git a/configs/chromebook_samus_tpl_defconfig b/configs/chromebook_samus_tpl_defconfig index 5ad17d217b1..13aa3e2e63f 100644 --- a/configs/chromebook_samus_tpl_defconfig +++ b/configs/chromebook_samus_tpl_defconfig @@ -9,9 +9,9 @@ CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="chromebook_samus" CONFIG_SPL_TEXT_BASE=0xffe70000 CONFIG_TPL_TEXT_BASE=0xfffd8000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_VENDOR_GOOGLE=y CONFIG_TARGET_CHROMEBOOK_SAMUS_TPL=y CONFIG_DEBUG_UART=y diff --git a/configs/elgin-rv1108_defconfig b/configs/elgin-rv1108_defconfig index 84cc29ad33d..2f595be1c24 100644 --- a/configs/elgin-rv1108_defconfig +++ b/configs/elgin-rv1108_defconfig @@ -8,9 +8,9 @@ CONFIG_DEFAULT_DEVICE_TREE="rv1108-elgin-r1" CONFIG_ROCKCHIP_RV1108=y CONFIG_ROCKCHIP_BOOT_MODE_REG=0 CONFIG_TARGET_ELGIN_RV1108=y -# CONFIG_DEBUG_UART_BOARD_INIT is not set CONFIG_DEBUG_UART_BASE=0x10210000 CONFIG_DEBUG_UART_CLOCK=24000000 +# CONFIG_DEBUG_UART_BOARD_INIT is not set CONFIG_SYS_LOAD_ADDR=0x62000000 CONFIG_DEBUG_UART=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig index 06e48a5eee0..e0fb3f62b45 100644 --- a/configs/evb-rk3128_defconfig +++ b/configs/evb-rk3128_defconfig @@ -7,9 +7,9 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_OFFSET=0x0 CONFIG_DEFAULT_DEVICE_TREE="rk3128-evb" CONFIG_ROCKCHIP_RK3128=y -# CONFIG_DEBUG_UART_BOARD_INIT is not set CONFIG_DEBUG_UART_BASE=0x20068000 CONFIG_DEBUG_UART_CLOCK=24000000 +# CONFIG_DEBUG_UART_BOARD_INIT is not set CONFIG_SYS_LOAD_ADDR=0x60800800 CONFIG_DEBUG_UART=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig index b2c92ca989f..dbca68fcf30 100644 --- a/configs/evb-rv1108_defconfig +++ b/configs/evb-rv1108_defconfig @@ -5,9 +5,9 @@ CONFIG_SYS_TEXT_BASE=0x60000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb" CONFIG_ROCKCHIP_RV1108=y -# CONFIG_DEBUG_UART_BOARD_INIT is not set CONFIG_DEBUG_UART_BASE=0x10210000 CONFIG_DEBUG_UART_CLOCK=24000000 +# CONFIG_DEBUG_UART_BOARD_INIT is not set CONFIG_SYS_LOAD_ADDR=0x62000000 CONFIG_DEBUG_UART=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig index a253b1333ed..eb7af8db36d 100644 --- a/configs/gardena-smart-gateway-at91sam_defconfig +++ b/configs/gardena-smart-gateway-at91sam_defconfig @@ -18,9 +18,9 @@ CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SPL_SERIAL=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000 CONFIG_SPL=y -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig index b831adb1121..69ebc6fa325 100644 --- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig +++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig @@ -85,7 +85,6 @@ CONFIG_DM_REGULATOR=y CONFIG_SPL_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y -CONFIG_CONS_INDEX=2 CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_SYSRESET=y diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig index 614bacbfbf2..a3c142feb28 100644 --- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig +++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig @@ -85,7 +85,6 @@ CONFIG_DM_REGULATOR=y CONFIG_SPL_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y -CONFIG_CONS_INDEX=2 CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_SYSRESET=y diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig index e1acf7e8810..bf2b6486347 100644 --- a/configs/imx8mm_beacon_defconfig +++ b/configs/imx8mm_beacon_defconfig @@ -123,7 +123,6 @@ CONFIG_SPL_DM_REGULATOR_BD71837=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y -CONFIG_CONS_INDEX=2 CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_SPI=y diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig index d508bcbd61e..17658d5334d 100644 --- a/configs/kontron-sl-mx8mm_defconfig +++ b/configs/kontron-sl-mx8mm_defconfig @@ -113,7 +113,6 @@ CONFIG_SPL_DM_PMIC_PCA9450=y CONFIG_DM_REGULATOR=y CONFIG_DM_RTC=y CONFIG_RTC_RV8803=y -CONFIG_CONS_INDEX=2 CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_SPI=y diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig index 1badfb513a8..0d32be18e20 100644 --- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig @@ -95,10 +95,9 @@ CONFIG_NXP_FSPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_VIDEO=y CONFIG_WDT=y CONFIG_WDT_SP805=y CONFIG_RSA=y CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_VIDEO=y -CONFIG_VIDEO_LS_HDP_LOAD=y diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig index 9439bda71ea..00a5ead5656 100644 --- a/configs/ls1028aqds_tfa_defconfig +++ b/configs/ls1028aqds_tfa_defconfig @@ -101,9 +101,8 @@ CONFIG_NXP_FSPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_VIDEO=y CONFIG_WDT=y CONFIG_WDT_SP805=y CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_VIDEO=y -CONFIG_VIDEO_LS_HDP_LOAD=y diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig index 8e15ee5b7d4..933084013ba 100644 --- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig @@ -89,10 +89,9 @@ CONFIG_NXP_FSPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_VIDEO=y CONFIG_WDT=y CONFIG_WDT_SP805=y CONFIG_RSA=y CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_VIDEO=y -CONFIG_VIDEO_LS_HDP_LOAD=y diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig index 51fec79b3b6..bc5987cc5d2 100644 --- a/configs/ls1028ardb_tfa_defconfig +++ b/configs/ls1028ardb_tfa_defconfig @@ -99,9 +99,8 @@ CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX88179=y CONFIG_USB_ETHER_RTL8152=y +CONFIG_VIDEO=y CONFIG_WDT=y CONFIG_WDT_SP805=y CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_VIDEO=y -CONFIG_VIDEO_LS_HDP_LOAD=y diff --git a/configs/mscc_jr2_defconfig b/configs/mscc_jr2_defconfig index e48d4a8d8fe..04e15c61487 100644 --- a/configs/mscc_jr2_defconfig +++ b/configs/mscc_jr2_defconfig @@ -6,9 +6,9 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="jr2_pcb110" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x70100000 CONFIG_DEBUG_UART_CLOCK=250000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_ENV_OFFSET_REDUND=0x140000 CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_ARCH_MSCC=y diff --git a/configs/mscc_luton_defconfig b/configs/mscc_luton_defconfig index 1a2db895d02..b144dd4354c 100644 --- a/configs/mscc_luton_defconfig +++ b/configs/mscc_luton_defconfig @@ -6,9 +6,9 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="luton_pcb091" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x70100000 CONFIG_DEBUG_UART_CLOCK=208333333 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_ENV_OFFSET_REDUND=0x140000 CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_ARCH_MSCC=y diff --git a/configs/mscc_ocelot_defconfig b/configs/mscc_ocelot_defconfig index d05a26df31d..e088f3ca04a 100644 --- a/configs/mscc_ocelot_defconfig +++ b/configs/mscc_ocelot_defconfig @@ -6,9 +6,9 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ocelot_pcb123" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x70100000 CONFIG_DEBUG_UART_CLOCK=250000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_ENV_OFFSET_REDUND=0x140000 CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_ARCH_MSCC=y diff --git a/configs/sam9x60_curiosity_mmc_defconfig b/configs/sam9x60_curiosity_mmc_defconfig index 592667160b6..5a58d8486ff 100644 --- a/configs/sam9x60_curiosity_mmc_defconfig +++ b/configs/sam9x60_curiosity_mmc_defconfig @@ -10,9 +10,9 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sam9x60_curiosity" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=200000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y diff --git a/configs/sam9x60ek_mmc_defconfig b/configs/sam9x60ek_mmc_defconfig index 9ac46f6a6a0..9c9166c16c9 100644 --- a/configs/sam9x60ek_mmc_defconfig +++ b/configs/sam9x60ek_mmc_defconfig @@ -10,9 +10,9 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=200000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y diff --git a/configs/sam9x60ek_nandflash_defconfig b/configs/sam9x60ek_nandflash_defconfig index ec005a3d6d3..f07725de36c 100644 --- a/configs/sam9x60ek_nandflash_defconfig +++ b/configs/sam9x60ek_nandflash_defconfig @@ -9,9 +9,9 @@ CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=8 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=200000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y diff --git a/configs/sam9x60ek_qspiflash_defconfig b/configs/sam9x60ek_qspiflash_defconfig index 7898d5597ff..fc4108cdc47 100644 --- a/configs/sam9x60ek_qspiflash_defconfig +++ b/configs/sam9x60ek_qspiflash_defconfig @@ -10,9 +10,9 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=200000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y diff --git a/configs/sama5d27_giantboard_defconfig b/configs/sama5d27_giantboard_defconfig index 4ab7831742d..df5be2357ec 100644 --- a/configs/sama5d27_giantboard_defconfig +++ b/configs/sama5d27_giantboard_defconfig @@ -16,9 +16,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=82000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig index e29a8380e44..d15bd6b0804 100644 --- a/configs/sama5d27_som1_ek_mmc1_defconfig +++ b/configs/sama5d27_som1_ek_mmc1_defconfig @@ -15,9 +15,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=82000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig index c807387457b..c8a1271bef0 100644 --- a/configs/sama5d27_som1_ek_mmc_defconfig +++ b/configs/sama5d27_som1_ek_mmc_defconfig @@ -16,9 +16,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=82000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig index 500798eee22..f10973c9d6d 100644 --- a/configs/sama5d27_som1_ek_qspiflash_defconfig +++ b/configs/sama5d27_som1_ek_qspiflash_defconfig @@ -16,9 +16,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=82000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig index b5d5c34d9b0..fae4f77387c 100644 --- a/configs/sama5d27_wlsom1_ek_mmc_defconfig +++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig @@ -14,9 +14,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xf801c000 CONFIG_DEBUG_UART_CLOCK=82000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig index 983e5045565..5dac554b9ce 100644 --- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig +++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig @@ -14,9 +14,9 @@ CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xf801c000 CONFIG_DEBUG_UART_CLOCK=82000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x22000000 diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig index 8d4698ef320..688fa00d23a 100644 --- a/configs/sama5d2_icp_mmc_defconfig +++ b/configs/sama5d2_icp_mmc_defconfig @@ -14,9 +14,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xf801c000 CONFIG_DEBUG_UART_CLOCK=83000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 diff --git a/configs/sama5d2_icp_qspiflash_defconfig b/configs/sama5d2_icp_qspiflash_defconfig index 6630d4ce9f4..27bd05f9601 100644 --- a/configs/sama5d2_icp_qspiflash_defconfig +++ b/configs/sama5d2_icp_qspiflash_defconfig @@ -6,9 +6,9 @@ CONFIG_TARGET_SAMA5D2_ICP=y CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_icp" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xf801c000 CONFIG_DEBUG_UART_CLOCK=83000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_SYS_MEMTEST_START=0x20000000 diff --git a/configs/sama5d2_ptc_ek_mmc_defconfig b/configs/sama5d2_ptc_ek_mmc_defconfig index c2aa7f0cc7d..d7c85445db3 100644 --- a/configs/sama5d2_ptc_ek_mmc_defconfig +++ b/configs/sama5d2_ptc_ek_mmc_defconfig @@ -8,9 +8,9 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_ptc_ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xf801c000 CONFIG_DEBUG_UART_CLOCK=82000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y diff --git a/configs/sama5d2_ptc_ek_nandflash_defconfig b/configs/sama5d2_ptc_ek_nandflash_defconfig index b5dc6ccd589..9f72648283b 100644 --- a/configs/sama5d2_ptc_ek_nandflash_defconfig +++ b/configs/sama5d2_ptc_ek_nandflash_defconfig @@ -7,9 +7,9 @@ CONFIG_TARGET_SAMA5D2_PTC_EK=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_ptc_ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xf801c000 CONFIG_DEBUG_UART_CLOCK=82000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig index 2891cc5a7f7..0c8a90d62dd 100644 --- a/configs/sama5d2_xplained_emmc_defconfig +++ b/configs/sama5d2_xplained_emmc_defconfig @@ -15,9 +15,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=83000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index 600cb0cbd8b..e6722e2133e 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -16,9 +16,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=83000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig index 4f9062628af..b7e93d1846c 100644 --- a/configs/sama5d2_xplained_qspiflash_defconfig +++ b/configs/sama5d2_xplained_qspiflash_defconfig @@ -16,9 +16,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=83000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index 0041294797b..2ebe8d96499 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -18,9 +18,9 @@ CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=83000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x22000000 diff --git a/configs/sama5d36ek_cmp_mmc_defconfig b/configs/sama5d36ek_cmp_mmc_defconfig index 775212c9c22..e5794f37013 100644 --- a/configs/sama5d36ek_cmp_mmc_defconfig +++ b/configs/sama5d36ek_cmp_mmc_defconfig @@ -8,9 +8,9 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y diff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig index 1b8038898eb..0139ebefe2f 100644 --- a/configs/sama5d36ek_cmp_nandflash_defconfig +++ b/configs/sama5d36ek_cmp_nandflash_defconfig @@ -7,9 +7,9 @@ CONFIG_TARGET_SAMA5D3XEK=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y diff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig index c73bb14c354..8541deeb2c8 100644 --- a/configs/sama5d36ek_cmp_spiflash_defconfig +++ b/configs/sama5d36ek_cmp_spiflash_defconfig @@ -10,9 +10,9 @@ CONFIG_ENV_OFFSET=0x6000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index 42f6053e595..84832605123 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -16,9 +16,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index b1fe27a9a03..f12c5d79172 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -14,9 +14,9 @@ CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index 39e6a4e7937..40a8c028c2d 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -16,9 +16,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index d4a6243cdc8..772511543db 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -14,9 +14,9 @@ CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index ae47d921602..4e85807432e 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -18,9 +18,9 @@ CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x22000000 diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index c1623df8649..84c53ce6530 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -16,9 +16,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index b1265331c8a..6481be4bb96 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -14,9 +14,9 @@ CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index ec79771ee7c..131982d1dff 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -18,9 +18,9 @@ CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x22000000 diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig index b25df5c94c1..e1c0582054f 100644 --- a/configs/sama5d4ek_mmc_defconfig +++ b/configs/sama5d4ek_mmc_defconfig @@ -16,9 +16,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=88000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig index a3bfee316da..8e934ff44bb 100644 --- a/configs/sama5d4ek_nandflash_defconfig +++ b/configs/sama5d4ek_nandflash_defconfig @@ -14,9 +14,9 @@ CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=88000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig index 06e5bb2e032..c3fbaccc111 100644 --- a/configs/sama5d4ek_spiflash_defconfig +++ b/configs/sama5d4ek_spiflash_defconfig @@ -18,9 +18,9 @@ CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=88000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x22000000 diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig index 36343354945..20ca98821a0 100644 --- a/configs/sama7g5ek_mmc1_defconfig +++ b/configs/sama7g5ek_mmc1_defconfig @@ -7,9 +7,9 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama7g5ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xe1824200 CONFIG_DEBUG_UART_CLOCK=200000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x62000000 CONFIG_DEBUG_UART=y CONFIG_SYS_MEMTEST_START=0x60000000 diff --git a/configs/sama7g5ek_mmc_defconfig b/configs/sama7g5ek_mmc_defconfig index e12bf285845..c9f62a8ebe5 100644 --- a/configs/sama7g5ek_mmc_defconfig +++ b/configs/sama7g5ek_mmc_defconfig @@ -7,9 +7,9 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama7g5ek" -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xe1824200 CONFIG_DEBUG_UART_CLOCK=200000000 +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x62000000 CONFIG_DEBUG_UART=y CONFIG_SYS_MEMTEST_START=0x60000000 diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index fc7e100eaaf..9d72e39bc20 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -152,7 +152,6 @@ CONFIG_CROS_EC_SANDBOX=y CONFIG_CROS_EC_SPI=y CONFIG_P2SB=y CONFIG_PWRSEQ=y -CONFIG_SPL_PWRSEQ=y CONFIG_I2C_EEPROM=y CONFIG_MMC_SANDBOX=y CONFIG_MTD=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index d10cd289884..be40562cc3f 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -196,7 +196,6 @@ CONFIG_CROS_EC_SANDBOX=y CONFIG_CROS_EC_SPI=y CONFIG_P2SB=y CONFIG_PWRSEQ=y -CONFIG_SPL_PWRSEQ=y CONFIG_I2C_EEPROM=y CONFIG_MMC_PCI=y CONFIG_MMC_SANDBOX=y diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig index 6eb4e348a26..2c909ead4b1 100644 --- a/configs/sandbox_flattree_defconfig +++ b/configs/sandbox_flattree_defconfig @@ -125,7 +125,6 @@ CONFIG_CROS_EC_SANDBOX=y CONFIG_CROS_EC_SPI=y CONFIG_P2SB=y CONFIG_PWRSEQ=y -CONFIG_SPL_PWRSEQ=y CONFIG_I2C_EEPROM=y CONFIG_MMC_SANDBOX=y CONFIG_SPI_FLASH_SANDBOX=y -- GitLab From 49df685d32593fa5b28ab56d7283220c77098ce6 Mon Sep 17 00:00:00 2001 From: Anthoine Bourgeois Date: Thu, 2 Jun 2022 22:27:06 +0200 Subject: [PATCH 217/581] ARM: dts: omap3-devkit8000: Add support for Devkit8000 This commit adds OMAP3 BeagleBoard devicetree files from Linux v5.16.0. This commit fixes CONFIG_DM_MMC warning. v3: patch clean-up Signed-off-by: Anthoine Bourgeois --- arch/arm/dts/Makefile | 2 + arch/arm/dts/omap3-devkit8000-u-boot.dtsi | 14 + arch/arm/dts/omap3-devkit8000.dts | 349 ++++++++++++++++++++++ configs/devkit8000_defconfig | 21 +- include/configs/devkit8000.h | 16 +- 5 files changed, 385 insertions(+), 17 deletions(-) create mode 100644 arch/arm/dts/omap3-devkit8000-u-boot.dtsi create mode 100644 arch/arm/dts/omap3-devkit8000.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 85346c5e84f..2fa39571624 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1069,6 +1069,8 @@ dtb-$(CONFIG_TARGET_OMAP3_BEAGLE) += \ omap3-beagle-xm.dtb \ omap3-beagle.dtb +dtb-$(CONFIG_TARGET_DEVKIT8000) += omap3-devkit8000.dtb + dtb-$(CONFIG_TARGET_OMAP3_IGEP00X0) += \ omap3-igep0020.dtb diff --git a/arch/arm/dts/omap3-devkit8000-u-boot.dtsi b/arch/arm/dts/omap3-devkit8000-u-boot.dtsi new file mode 100644 index 00000000000..2c03701c896 --- /dev/null +++ b/arch/arm/dts/omap3-devkit8000-u-boot.dtsi @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * U-Boot additions + * + * (C) Copyright 2017 Derald D. Woods + */ + +#include "omap3-u-boot.dtsi" + +/ { + chosen { + stdout-path = &uart3; + }; +}; diff --git a/arch/arm/dts/omap3-devkit8000.dts b/arch/arm/dts/omap3-devkit8000.dts new file mode 100644 index 00000000000..eee3ba073b1 --- /dev/null +++ b/arch/arm/dts/omap3-devkit8000.dts @@ -0,0 +1,349 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Author: Anthoine Bourgeois + */ +/dts-v1/; + +#include "omap34xx.dtsi" +/ { + model = "TimLL OMAP3 Devkit8000"; + compatible = "timll,omap3-devkit8000", "ti,omap3430", "ti,omap3"; + + aliases { + display1 = &dvi0; + display2 = &tv0; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x10000000>; /* 256 MB */ + }; + + leds { + compatible = "gpio-leds"; + + heartbeat { + label = "devkit8000::led1"; + gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>; /* 186 -> LED1 */ + default-state = "on"; + linux,default-trigger = "heartbeat"; + }; + + mmc { + label = "devkit8000::led2"; + gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 -> LED2 */ + default-state = "on"; + linux,default-trigger = "none"; + }; + + usr { + label = "devkit8000::led3"; + gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>; /* 164 -> LED3 */ + default-state = "on"; + linux,default-trigger = "usr"; + }; + + pmu_stat { + label = "devkit8000::pmu_stat"; + gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */ + }; + }; + + sound { + compatible = "ti,omap-twl4030"; + ti,model = "devkit8000"; + + ti,mcbsp = <&mcbsp2>; + ti,audio-routing = + "Ext Spk", "PREDRIVEL", + "Ext Spk", "PREDRIVER", + "MAINMIC", "Main Mic", + "Main Mic", "Mic Bias 1"; + }; + + tfp410: encoder0 { + compatible = "ti,tfp410"; + powerdown-gpios = <&twl_gpio 7 GPIO_ACTIVE_LOW>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + tfp410_in: endpoint { + remote-endpoint = <&dpi_dvi_out>; + }; + }; + + port@1 { + reg = <1>; + + tfp410_out: endpoint { + remote-endpoint = <&dvi_connector_in>; + }; + }; + }; + }; + + dvi0: connector0 { + compatible = "dvi-connector"; + label = "dvi"; + + digital; + + ddc-i2c-bus = <&i2c2>; + + port { + dvi_connector_in: endpoint { + remote-endpoint = <&tfp410_out>; + }; + }; + }; + + tv0: connector1 { + compatible = "svideo-connector"; + label = "tv"; + + port { + tv_connector_in: endpoint { + remote-endpoint = <&venc_out>; + }; + }; + }; +}; + +&i2c1 { + clock-frequency = <2600000>; + + twl: twl@48 { + reg = <0x48>; + interrupts = <7>; /* SYS_NIRQ cascaded to intc */ + + twl_audio: audio { + compatible = "ti,twl4030-audio"; + codec { + }; + }; + }; +}; + +&i2c2 { + clock-frequency = <400000>; +}; + +&i2c3 { + status = "disabled"; +}; + +#include "twl4030.dtsi" +#include "twl4030_omap3.dtsi" + +&mmc1 { + vmmc-supply = <&vmmc1>; + vqmmc-supply = <&vsim>; + bus-width = <8>; +}; + +&mmc2 { + status = "disabled"; +}; + +&mmc3 { + status = "disabled"; +}; + +&twl_gpio { + ti,use-leds; + /* + * pulldowns: + * BIT(1), BIT(2), BIT(6), BIT(7), BIT(8), BIT(13) + * BIT(15), BIT(16), BIT(17) + */ + ti,pulldowns = <0x03a1c6>; +}; + +&wdt2 { + status = "disabled"; +}; + +&mcbsp2 { + status = "okay"; +}; + +&gpmc { + ranges = <0 0 0x30000000 0x1000000 /* CS0: 16MB for NAND */ + 6 0 0x2c000000 0x1000000>; /* CS6: 16MB for DM9000 */ + + nand@0,0 { + compatible = "ti,omap2-nand"; + reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ + interrupt-parent = <&gpmc>; + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ + <1 IRQ_TYPE_NONE>; /* termcount */ + nand-bus-width = <16>; + gpmc,device-width = <2>; + ti,nand-ecc-opt = "sw"; + + gpmc,sync-clk-ps = <0>; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <44>; + gpmc,cs-wr-off-ns = <44>; + gpmc,adv-on-ns = <6>; + gpmc,adv-rd-off-ns = <34>; + gpmc,adv-wr-off-ns = <44>; + gpmc,we-off-ns = <40>; + gpmc,oe-off-ns = <54>; + gpmc,access-ns = <64>; + gpmc,rd-cycle-ns = <82>; + gpmc,wr-cycle-ns = <82>; + gpmc,wr-access-ns = <40>; + gpmc,wr-data-mux-bus-ns = <0>; + + #address-cells = <1>; + #size-cells = <1>; + + x-loader@0 { + label = "X-Loader"; + reg = <0 0x80000>; + }; + + bootloaders@80000 { + label = "U-Boot"; + reg = <0x80000 0x1e0000>; + }; + + bootloaders_env@260000 { + label = "U-Boot Env"; + reg = <0x260000 0x20000>; + }; + + kernel@280000 { + label = "Kernel"; + reg = <0x280000 0x400000>; + }; + + filesystem@680000 { + label = "File System"; + reg = <0x680000 0xf980000>; + }; + }; + + ethernet@6,0 { + compatible = "davicom,dm9000"; + reg = <6 0x000 2 + 6 0x400 2>; /* CS6, offset 0 and 0x400, IO size 2 */ + bank-width = <2>; + interrupt-parent = <&gpio1>; + interrupts = <25 IRQ_TYPE_LEVEL_LOW>; + davicom,no-eeprom; + + gpmc,mux-add-data = <0>; + gpmc,device-width = <1>; + gpmc,wait-pin = <0>; + gpmc,cycle2cycle-samecsen; + gpmc,cycle2cycle-diffcsen; + + gpmc,cs-on-ns = <6>; + gpmc,cs-rd-off-ns = <180>; + gpmc,cs-wr-off-ns = <180>; + gpmc,adv-on-ns = <0>; + gpmc,adv-rd-off-ns = <18>; + gpmc,adv-wr-off-ns = <48>; + gpmc,oe-on-ns = <54>; + gpmc,oe-off-ns = <168>; + gpmc,we-on-ns = <54>; + gpmc,we-off-ns = <168>; + gpmc,rd-cycle-ns = <186>; + gpmc,wr-cycle-ns = <186>; + gpmc,access-ns = <144>; + gpmc,page-burst-access-ns = <24>; + gpmc,bus-turnaround-ns = <90>; + gpmc,cycle2cycle-delay-ns = <90>; + gpmc,wait-monitoring-ns = <0>; + gpmc,clk-activation-ns = <0>; + gpmc,wr-data-mux-bus-ns = <0>; + gpmc,wr-access-ns = <0>; + }; +}; + +&omap3_pmx_core { + dss_dpi_pins: pinmux_dss_dpi_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */ + OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */ + OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */ + OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */ + OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */ + OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */ + OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */ + OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */ + OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */ + OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */ + OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */ + OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */ + OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */ + OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */ + OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */ + OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */ + OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */ + OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */ + OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */ + OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */ + OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */ + OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */ + OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */ + OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */ + OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */ + OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */ + OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */ + OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */ + >; + }; +}; + +&vpll1 { + /* Needed for DSS */ + regulator-name = "vdds_dsi"; + + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; +}; + +&dss { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&dss_dpi_pins>; + + vdds_dsi-supply = <&vpll1>; + vdda_dac-supply = <&vdac>; + + port { + #address-cells = <1>; + #size-cells = <0>; + dpi_dvi_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&tfp410_in>; + data-lines = <24>; + }; + + endpoint@1 { + reg = <1>; + }; + }; +}; + +&venc { + status = "okay"; + + vdda-supply = <&vdac>; + + port { + venc_out: endpoint { + remote-endpoint = <&tv_connector_in>; + ti,channels = <2>; + }; + }; +}; diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index 4e144a9c169..ecc30904867 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -2,21 +2,26 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_TEXT_BASE=0x80100000 CONFIG_SYS_MALLOC_LEN=0x40000 -CONFIG_SYS_MALLOC_F_LEN=0x400 +CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_DEFAULT_DEVICE_TREE="omap3-devkit8000" CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_DEVKIT8000=y +CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_BOOTCOMMAND="run autoboot" +CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_BSS_START_ADDR=0x80000500 +CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80208000 +# CONFIG_SPL_FS_EXT4 is not set CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_SIMPLE=y @@ -31,8 +36,8 @@ CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=8 CONFIG_SYS_MAXARGS=64 # CONFIG_CMD_IMI is not set CONFIG_CMD_SPL=y -CONFIG_CMD_SPL_NAND_OFS=0x680000 -CONFIG_CMD_SPL_WRITE_SIZE=0x400 +CONFIG_CMD_SPL_NAND_OFS=0x280000 +CONFIG_CMD_SPL_WRITE_SIZE=0x20000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -50,12 +55,20 @@ CONFIG_JFFS2_PART_SIZE=0xF980000 CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=nand:512k(x-loader),1920k(u-boot),128k(u-boot-env),4m(kernel),-(fs)" +# CONFIG_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_SPL_REMOVE_PROPS="clocks clock-names interrupt-parent" CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=20 CONFIG_BOOTP_SEND_HOSTNAME=y +CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_OF_TRANSLATE=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TWL4030_LED=y @@ -71,6 +84,4 @@ CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000 CONFIG_DRIVER_DM9000=y -CONFIG_CONS_INDEX=3 CONFIG_JFFS2_NAND=y -CONFIG_OF_LIBFDT=y diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index 4e91f8caa32..d45115bdf68 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -14,17 +14,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* High Level Configuration Options */ - -/* - * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM - * 64 bytes before this address should be set aside for u-boot.img's - * header. That is 0x800FFFC0--0x80100000 should not be used for any - * other needs. - */ - -/* Physical Memory Map */ - #include /* Hardware drivers */ @@ -40,9 +29,12 @@ /* BOOTP/DHCP options */ +#define MEM_LAYOUT_ENV_SETTINGS \ + DEFAULT_LINUX_BOOT_ENV + /* Environment information */ #define CONFIG_EXTRA_ENV_SETTINGS \ - "loadaddr=0x82000000\0" \ + MEM_LAYOUT_ENV_SETTINGS \ "console=ttyO2,115200n8\0" \ "mmcdev=0\0" \ "vram=12M\0" \ -- GitLab From 8d09c7b774af20660e5baae28210e92a20ffda04 Mon Sep 17 00:00:00 2001 From: Anthoine Bourgeois Date: Thu, 2 Jun 2022 22:27:07 +0200 Subject: [PATCH 218/581] ARM: dts: omap3-devkit8000: Fix CONFIG_DM_I2C warning Seems that u-boot can't probe i2c bus at 2.6Mhz speed, so lower the speed to the default value 100Khz. v2: fix i2c1 frequency in the root omap3-u-boot.dtsi include. Signed-off-by: Anthoine Bourgeois --- arch/arm/dts/omap3-u-boot.dtsi | 1 + configs/devkit8000_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/dts/omap3-u-boot.dtsi b/arch/arm/dts/omap3-u-boot.dtsi index 32bea6b6d9b..96d8ac54539 100644 --- a/arch/arm/dts/omap3-u-boot.dtsi +++ b/arch/arm/dts/omap3-u-boot.dtsi @@ -78,4 +78,5 @@ &i2c1 { u-boot,dm-spl; + clock-frequency = <100000>; }; diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index ecc30904867..76371e3074f 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -73,6 +73,7 @@ CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TWL4030_LED=y CONFIG_MMC_OMAP_HS=y +CONFIG_DM_I2C=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_OMAP_ECCSCHEME_HAM1_CODE_HW=y -- GitLab From a47ce34403f27178c1264bf60496bbb9a21e5842 Mon Sep 17 00:00:00 2001 From: Anthoine Bourgeois Date: Thu, 2 Jun 2022 22:27:08 +0200 Subject: [PATCH 219/581] ARM: dts: omap3-devkit8000: Fix CONFIG_DM_ETH warning Add the missing ethernet node in u-boot dts. Signed-off-by: Anthoine Bourgeois --- arch/arm/dts/omap3-devkit8000-u-boot.dtsi | 6 ++++++ configs/devkit8000_defconfig | 1 + 2 files changed, 7 insertions(+) diff --git a/arch/arm/dts/omap3-devkit8000-u-boot.dtsi b/arch/arm/dts/omap3-devkit8000-u-boot.dtsi index 2c03701c896..a5768b7281d 100644 --- a/arch/arm/dts/omap3-devkit8000-u-boot.dtsi +++ b/arch/arm/dts/omap3-devkit8000-u-boot.dtsi @@ -11,4 +11,10 @@ chosen { stdout-path = &uart3; }; + + ethernet@2c000000 { + compatible = "davicom,dm9000"; + reg = <0x2c000000 2 0x2c000400 2>; + bank-width = <2>; + }; }; diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index 76371e3074f..a5e9f614df1 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -84,5 +84,6 @@ CONFIG_SYS_NAND_OOBSIZE=0x40 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000 +CONFIG_DM_ETH=y CONFIG_DRIVER_DM9000=y CONFIG_JFFS2_NAND=y -- GitLab From bfef72e4dd1c1d6dfc680867bf24a78597ab0438 Mon Sep 17 00:00:00 2001 From: Rui Miguel Silva Date: Wed, 11 May 2022 10:55:40 +0100 Subject: [PATCH 220/581] cmd: load: add load command for memory mapped cp.b is used a lot as a way to load binaries to memory and execute them, however we may need to integrate this with the efi subsystem to set it up as a bootdev. So, introduce a loadm command that will be consistent with the other loadX commands and will call the efi API's. ex: loadm $kernel_addr $kernel_addr_r $kernel_size with this a kernel with CONFIG_EFI_STUB enabled will be loaded and then subsequently booted with bootefi command. Signed-off-by: Rui Miguel Silva Reviewed-by: Tom Rini --- README | 1 + cmd/Kconfig | 5 +++ cmd/bootefi.c | 12 ++++++ cmd/load.c | 48 +++++++++++++++++++++ configs/sandbox64_defconfig | 1 + configs/sandbox_defconfig | 1 + doc/usage/cmd/loadm.rst | 49 ++++++++++++++++++++++ doc/usage/index.rst | 1 + include/efi_loader.h | 2 + include/test/suites.h | 1 + lib/efi_loader/efi_device_path.c | 9 ++++ test/cmd/Makefile | 1 + test/cmd/loadm.c | 72 ++++++++++++++++++++++++++++++++ test/cmd_ut.c | 6 +++ 14 files changed, 209 insertions(+) create mode 100644 doc/usage/cmd/loadm.rst create mode 100644 test/cmd/loadm.c diff --git a/README b/README index 9800359e5df..f3304229d8d 100644 --- a/README +++ b/README @@ -2415,6 +2415,7 @@ rarpboot- boot image via network using RARP/TFTP protocol diskboot- boot from IDE devicebootd - boot default, i.e., run 'bootcmd' loads - load S-Record file over serial line loadb - load binary file over serial line (kermit mode) +loadm - load binary blob from source address to destination address md - memory display mm - memory modify (auto-incrementing) nm - memory modify (constant address) diff --git a/cmd/Kconfig b/cmd/Kconfig index 9a0b7203112..dea3729d132 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -1160,6 +1160,11 @@ config CMD_LOADB help Load a binary file over serial line. +config CMD_LOADM + bool "loadm" + help + Load a binary over memory mapped. + config CMD_LOADS bool "loads" default y diff --git a/cmd/bootefi.c b/cmd/bootefi.c index 827fcd97dfd..37ce659fa12 100644 --- a/cmd/bootefi.c +++ b/cmd/bootefi.c @@ -34,6 +34,18 @@ static struct efi_device_path *bootefi_device_path; static void *image_addr; static size_t image_size; +/** + * efi_get_image_parameters() - return image parameters + * + * @img_addr: address of loaded image in memory + * @img_size: size of loaded image + */ +void efi_get_image_parameters(void **img_addr, size_t *img_size) +{ + *img_addr = image_addr; + *img_size = image_size; +} + /** * efi_clear_bootdev() - clear boot device */ diff --git a/cmd/load.c b/cmd/load.c index 7e4a552d90e..1224a7f85bb 100644 --- a/cmd/load.c +++ b/cmd/load.c @@ -1063,6 +1063,44 @@ static ulong load_serial_ymodem(ulong offset, int mode) #endif +#if defined(CONFIG_CMD_LOADM) +static int do_load_memory_bin(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + ulong addr, dest, size; + void *src, *dst; + + if (argc != 4) + return CMD_RET_USAGE; + + addr = simple_strtoul(argv[1], NULL, 16); + + dest = simple_strtoul(argv[2], NULL, 16); + + size = simple_strtoul(argv[3], NULL, 16); + + if (!size) { + printf("loadm: can not load zero bytes\n"); + return 1; + } + + src = map_sysmem(addr, size); + dst = map_sysmem(dest, size); + + memcpy(dst, src, size); + + unmap_sysmem(src); + unmap_sysmem(dst); + + if (IS_ENABLED(CONFIG_CMD_BOOTEFI)) + efi_set_bootdev("Mem", "", "", map_sysmem(dest, 0), size); + + printf("loaded bin to memory: size: %lu\n", size); + + return 0; +} +#endif + /* -------------------------------------------------------------------- */ #if defined(CONFIG_CMD_LOADS) @@ -1137,3 +1175,13 @@ U_BOOT_CMD( ); #endif /* CONFIG_CMD_LOADB */ + +#if defined(CONFIG_CMD_LOADM) +U_BOOT_CMD( + loadm, 4, 0, do_load_memory_bin, + "load binary blob from source address to destination address", + "[src_addr] [dst_addr] [size]\n" + " - load a binary blob from one memory location to other" + " from src_addr to dst_addr by size bytes" +); +#endif /* CONFIG_CMD_LOADM */ diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index 9d72e39bc20..46a9b16ad3f 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -47,6 +47,7 @@ CONFIG_CMD_GPT=y CONFIG_CMD_GPT_RENAME=y CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y +CONFIG_CMD_LOADM=y CONFIG_CMD_OSD=y CONFIG_CMD_PCI=y CONFIG_CMD_READ=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index be40562cc3f..86204c79088 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -67,6 +67,7 @@ CONFIG_CMD_GPT=y CONFIG_CMD_GPT_RENAME=y CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y +CONFIG_CMD_LOADM=y CONFIG_CMD_LSBLK=y CONFIG_CMD_MUX=y CONFIG_CMD_OSD=y diff --git a/doc/usage/cmd/loadm.rst b/doc/usage/cmd/loadm.rst new file mode 100644 index 00000000000..b6571140437 --- /dev/null +++ b/doc/usage/cmd/loadm.rst @@ -0,0 +1,49 @@ +.. SPDX-License-Identifier: GPL-2.0+: + +loadm command +============= + +Synopsis +-------- + +:: + + loadm + +Description +----------- + +The loadm command is used to copy memory content from source address +to destination address and, if efi is enabled, will setup a "Mem" efi +boot device. + +The number of transferred bytes must be set by bytes parameter + +src_addr + start address of the memory location to be loaded + +dst_addr + destination address of the byte stream to be loaded + +len + number of bytes to be copied in hexadecimal. Can not be 0 (zero). + +Example +------- + +:: + + => loadm ${kernel_addr} ${kernel_addr_r} ${kernel_size} + loaded bin to memory: size: 12582912 + +Configuration +------------- + +The command is only available if CONFIG_CMD_LOADM=y. + +Return value +------------ + +The return value $? is set 0 (true) if the loading is succefull, and +is set to 1 (false) in case of error. + diff --git a/doc/usage/index.rst b/doc/usage/index.rst index 770418434ad..8d08ea14b00 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -44,6 +44,7 @@ Shell commands cmd/fatload cmd/for cmd/load + cmd/loadm cmd/loady cmd/mbr cmd/md diff --git a/include/efi_loader.h b/include/efi_loader.h index c1e00ebac39..31de191e3df 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -591,6 +591,8 @@ efi_status_t efi_load_pe(struct efi_loaded_image_obj *handle, void efi_save_gd(void); /* Call this to relocate the runtime section to an address space */ void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map); +/* Call this to get image parameters */ +void efi_get_image_parameters(void **img_addr, size_t *img_size); /* Add a new object to the object list. */ void efi_add_handle(efi_handle_t obj); /* Create handle */ diff --git a/include/test/suites.h b/include/test/suites.h index ee6858a802a..ddb8827fdb1 100644 --- a/include/test/suites.h +++ b/include/test/suites.h @@ -39,6 +39,7 @@ int do_ut_compression(struct cmd_tbl *cmdtp, int flag, int argc, int do_ut_dm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); int do_ut_env(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); int do_ut_lib(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); +int do_ut_loadm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); int do_ut_log(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[]); int do_ut_mem(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); int do_ut_optee(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c index 171661b8972..2493d743261 100644 --- a/lib/efi_loader/efi_device_path.c +++ b/lib/efi_loader/efi_device_path.c @@ -1158,6 +1158,8 @@ efi_status_t efi_dp_from_name(const char *dev, const char *devnr, { struct blk_desc *desc = NULL; struct disk_partition fs_partition; + size_t image_size; + void *image_addr; int part = 0; char *filename; char *s; @@ -1173,6 +1175,13 @@ efi_status_t efi_dp_from_name(const char *dev, const char *devnr, } else if (!strcmp(dev, "Uart")) { if (device) *device = efi_dp_from_uart(); + } else if (!strcmp(dev, "Mem")) { + efi_get_image_parameters(&image_addr, &image_size); + + if (device) + *device = efi_dp_from_mem(EFI_RESERVED_MEMORY_TYPE, + (uintptr_t)image_addr, + image_size); } else { part = blk_get_device_part_str(dev, devnr, &desc, &fs_partition, 1); diff --git a/test/cmd/Makefile b/test/cmd/Makefile index a59adb1e6d6..4b2d7df0d2e 100644 --- a/test/cmd/Makefile +++ b/test/cmd/Makefile @@ -7,6 +7,7 @@ obj-$(CONFIG_CONSOLE_RECORD) += test_echo.o endif obj-y += mem.o obj-$(CONFIG_CMD_ADDRMAP) += addrmap.o +obj-$(CONFIG_CMD_LOADM) += loadm.o obj-$(CONFIG_CMD_MEM_SEARCH) += mem_search.o obj-$(CONFIG_CMD_PINMUX) += pinmux.o obj-$(CONFIG_CMD_PWM) += pwm.o diff --git a/test/cmd/loadm.c b/test/cmd/loadm.c new file mode 100644 index 00000000000..41e005ac592 --- /dev/null +++ b/test/cmd/loadm.c @@ -0,0 +1,72 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Test for loadm command + * + * Copyright 2022 ARM Limited + * Copyright 2022 Linaro + * + * Authors: + * Rui Miguel Silva + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define BUF_SIZE 0x100 + +#define LOADM_TEST(_name, _flags) UNIT_TEST(_name, _flags, loadm_test) + +static int loadm_test_params(struct unit_test_state *uts) +{ + ut_assertok(console_record_reset_enable()); + run_command("loadm", 0); + ut_assert_nextline("loadm - load binary blob from source address to destination address"); + + ut_assertok(console_record_reset_enable()); + run_command("loadm 0x12345678", 0); + ut_assert_nextline("loadm - load binary blob from source address to destination address"); + + ut_assertok(console_record_reset_enable()); + run_command("loadm 0x12345678 0x12345678", 0); + ut_assert_nextline("loadm - load binary blob from source address to destination address"); + + ut_assertok(console_record_reset_enable()); + run_command("loadm 0x12345678 0x12345678 0", 0); + ut_assert_nextline("loadm: can not load zero bytes"); + + return 0; +} +LOADM_TEST(loadm_test_params, UT_TESTF_CONSOLE_REC); + +static int loadm_test_load (struct unit_test_state *uts) +{ + char *buf; + + buf = map_sysmem(0, BUF_SIZE); + memset(buf, '\0', BUF_SIZE); + memset(buf, 0xaa, BUF_SIZE / 2); + + ut_assertok(console_record_reset_enable()); + run_command("loadm 0x0 0x80 0x80", 0); + ut_assert_nextline("loaded bin to memory: size: 128"); + + unmap_sysmem(buf); + + return 0; +} +LOADM_TEST(loadm_test_load, UT_TESTF_CONSOLE_REC); + +int do_ut_loadm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) +{ + struct unit_test *tests = UNIT_TEST_SUITE_START(loadm_test); + const int n_ents = UNIT_TEST_SUITE_COUNT(loadm_test); + + return cmd_ut_category("loadm", "loadm_test_", tests, n_ents, argc, + argv); +} diff --git a/test/cmd_ut.c b/test/cmd_ut.c index 67a13ee32b8..d70b72678ae 100644 --- a/test/cmd_ut.c +++ b/test/cmd_ut.c @@ -74,6 +74,9 @@ static struct cmd_tbl cmd_ut_sub[] = { #ifdef CONFIG_CMD_ADDRMAP U_BOOT_CMD_MKENT(addrmap, CONFIG_SYS_MAXARGS, 1, do_ut_addrmap, "", ""), #endif +#ifdef CONFIG_CMD_LOADM + U_BOOT_CMD_MKENT(loadm, CONFIG_SYS_MAXARGS, 1, do_ut_loadm, "", ""), +#endif }; static int do_ut_all(struct cmd_tbl *cmdtp, int flag, int argc, @@ -155,6 +158,9 @@ static char ut_help_text[] = #endif #ifdef CONFIG_CMD_ADDRMAP "ut addrmap - Very basic test of addrmap command\n" +#endif +#ifdef CONFIG_CMD_LOADM + "ut loadm [test-name]- test of parameters and load memory blob\n" #endif ; #endif /* CONFIG_SYS_LONGHELP */ -- GitLab From f98457d70a35ad6bda284577a8a2a8ad7868b13b Mon Sep 17 00:00:00 2001 From: Rui Miguel Silva Date: Wed, 11 May 2022 10:55:41 +0100 Subject: [PATCH 221/581] arm: add support to corstone1000 platform Corstone1000 is a platform from arm, which includes pre verified Corstone SSE710 sub-system that combines Cortex-A and Cortex-M processors [0]. This code adds the support for the Cortex-A35 implementation at host side, it contains also the necessary bits to support the Corstone 1000 FVP (Fixed Virtual Platform) [1] and also the FPGA MPS3 board implementation of this platform. [2] 0: https://developer.arm.com/documentation/102360/0000 1: https://developer.arm.com/tools-and-software/open-source-software/arm-platforms-software/arm-ecosystem-fvps 2: https://developer.arm.com/documentation/dai0550/c/ Signed-off-by: Rui Miguel Silva Reviewed-by: Tom Rini --- arch/arm/Kconfig | 8 +- arch/arm/dts/Makefile | 3 + arch/arm/dts/corstone1000-fvp.dts | 51 +++++++ arch/arm/dts/corstone1000-mps3.dts | 32 +++++ arch/arm/dts/corstone1000.dtsi | 164 +++++++++++++++++++++++ board/armltd/corstone1000/Kconfig | 12 ++ board/armltd/corstone1000/MAINTAINERS | 7 + board/armltd/corstone1000/Makefile | 7 + board/armltd/corstone1000/corstone1000.c | 91 +++++++++++++ configs/corstone1000_defconfig | 52 +++++++ include/configs/corstone1000.h | 41 ++++++ 11 files changed, 467 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/corstone1000-fvp.dts create mode 100644 arch/arm/dts/corstone1000-mps3.dts create mode 100644 arch/arm/dts/corstone1000.dtsi create mode 100644 board/armltd/corstone1000/Kconfig create mode 100644 board/armltd/corstone1000/MAINTAINERS create mode 100644 board/armltd/corstone1000/Makefile create mode 100644 board/armltd/corstone1000/corstone1000.c create mode 100644 configs/corstone1000_defconfig create mode 100644 include/configs/corstone1000.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index c618aad8018..95f92538d7a 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1352,6 +1352,12 @@ config ARCH_VEXPRESS64 select ENV_IS_IN_FLASH if MTD imply DISTRO_DEFAULTS +config TARGET_CORSTONE1000 + bool "Support Corstone1000 Platform" + select ARM64 + select PL01X_SERIAL + select DM + config TARGET_TOTAL_COMPUTE bool "Support Total Compute Platform" select ARM64 @@ -2300,7 +2306,7 @@ source "arch/arm/mach-nexell/Kconfig" source "arch/arm/mach-npcm/Kconfig" source "board/armltd/total_compute/Kconfig" - +source "board/armltd/corstone1000/Kconfig" source "board/bosch/shc/Kconfig" source "board/bosch/guardian/Kconfig" source "board/Marvell/octeontx/Kconfig" diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 2fa39571624..2873d048cdb 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1273,6 +1273,9 @@ dtb-$(CONFIG_TARGET_EA_LPC3250DEVKITV2) += lpc3250-ea3250.dtb dtb-$(CONFIG_ARCH_QEMU) += qemu-arm.dtb qemu-arm64.dtb +dtb-$(CONFIG_TARGET_CORSTONE1000) += corstone1000-mps3.dtb \ + corstone1000-fvp.dtb + include $(srctree)/scripts/Makefile.dts targets += $(dtb-y) diff --git a/arch/arm/dts/corstone1000-fvp.dts b/arch/arm/dts/corstone1000-fvp.dts new file mode 100644 index 00000000000..26b0f1b3cea --- /dev/null +++ b/arch/arm/dts/corstone1000-fvp.dts @@ -0,0 +1,51 @@ +// SPDX-License-Identifier: GPL-2.0 or MIT +/* + * Copyright (c) 2022, Arm Limited. All rights reserved. + * Copyright (c) 2022, Linaro Limited. All rights reserved. + * + */ + +/dts-v1/; + +#include "corstone1000.dtsi" + +/ { + model = "ARM Corstone1000 FVP (Fixed Virtual Platform)"; + compatible = "arm,corstone1000-fvp"; + + smsc: ethernet@4010000 { + compatible = "smsc,lan91c111"; + reg = <0x40100000 0x10000>; + phy-mode = "mii"; + interrupts = ; + reg-io-width = <2>; + }; + + vmmc_v3_3d: fixed_v3_3d { + compatible = "regulator-fixed"; + regulator-name = "vmmc_supply"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + sdmmc0: mmc@40300000 { + compatible = "arm,pl18x", "arm,primecell"; + reg = <0x40300000 0x1000>; + interrupts = ; + max-frequency = <12000000>; + vmmc-supply = <&vmmc_v3_3d>; + clocks = <&smbclk>, <&refclk100mhz>; + clock-names = "smclk", "apb_pclk"; + }; + + sdmmc1: mmc@50000000 { + compatible = "arm,pl18x", "arm,primecell"; + reg = <0x50000000 0x10000>; + interrupts = ; + max-frequency = <12000000>; + vmmc-supply = <&vmmc_v3_3d>; + clocks = <&smbclk>, <&refclk100mhz>; + clock-names = "smclk", "apb_pclk"; + }; +}; diff --git a/arch/arm/dts/corstone1000-mps3.dts b/arch/arm/dts/corstone1000-mps3.dts new file mode 100644 index 00000000000..e3146747c2d --- /dev/null +++ b/arch/arm/dts/corstone1000-mps3.dts @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: GPL-2.0 or MIT +/* + * Copyright (c) 2022, Arm Limited. All rights reserved. + * Copyright (c) 2022, Linaro Limited. All rights reserved. + * + */ + +/dts-v1/; + +#include "corstone1000.dtsi" + +/ { + model = "ARM Corstone1000 FPGA MPS3 board"; + compatible = "arm,corstone1000-mps3"; + + smsc: ethernet@4010000 { + compatible = "smsc,lan9220", "smsc,lan9115"; + reg = <0x40100000 0x10000>; + phy-mode = "mii"; + interrupts = ; + reg-io-width = <2>; + smsc,irq-push-pull; + }; + + usb_host: usb@40200000 { + compatible = "nxp,usb-isp1763"; + reg = <0x40200000 0x100000>; + interrupts = ; + bus-width = <16>; + dr_mode = "host"; + }; +}; diff --git a/arch/arm/dts/corstone1000.dtsi b/arch/arm/dts/corstone1000.dtsi new file mode 100644 index 00000000000..4e46826f883 --- /dev/null +++ b/arch/arm/dts/corstone1000.dtsi @@ -0,0 +1,164 @@ +// SPDX-License-Identifier: GPL-2.0 or MIT +/* + * Copyright (c) 2022, Arm Limited. All rights reserved. + * Copyright (c) 2022, Linaro Limited. All rights reserved. + * + */ + +#include + +/ { + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a35"; + reg = <0>; + next-level-cache = <&L2_0>; + }; + }; + + memory@88200000 { + device_type = "memory"; + reg = <0x88200000 0x77e00000>; + }; + + gic: interrupt-controller@1c000000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x1c010000 0x1000>, + <0x1c02f000 0x2000>, + <0x1c04f000 0x1000>, + <0x1c06f000 0x2000>; + interrupts = ; + }; + + L2_0: l2-cache0 { + compatible = "cache"; + cache-level = <2>; + cache-size = <0x80000>; + cache-line-size = <64>; + cache-sets = <1024>; + }; + + refclk100mhz: refclk100mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + clock-output-names = "apb_pclk"; + }; + + smbclk: refclk24mhzx2 { + /* Reference 24MHz clock x 2 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <48000000>; + clock-output-names = "smclk"; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + uartclk: uartclk { + /* UART clock - 50MHz */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + clock-output-names = "uartclk"; + }; + + psci { + compatible = "arm,psci-1.0", "arm,psci-0.2"; + method = "smc"; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&gic>; + ranges; + + timer@1a220000 { + compatible = "arm,armv7-timer-mem"; + reg = <0x1a220000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + clock-frequency = <50000000>; + ranges; + + frame@1a230000 { + frame-number = <0>; + interrupts = ; + reg = <0x1a230000 0x1000>; + }; + }; + + uart0: serial@1a510000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x1a510000 0x1000>; + interrupts = ; + clocks = <&uartclk>, <&refclk100mhz>; + clock-names = "uartclk", "apb_pclk"; + }; + + uart1: serial@1a520000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x1a520000 0x1000>; + interrupts = ; + clocks = <&uartclk>, <&refclk100mhz>; + clock-names = "uartclk", "apb_pclk"; + }; + + mhu_hse1: mailbox@1b820000 { + compatible = "arm,mhuv2-tx", "arm,primecell"; + reg = <0x1b820000 0x1000>; + clocks = <&refclk100mhz>; + clock-names = "apb_pclk"; + interrupts = ; + #mbox-cells = <2>; + arm,mhuv2-protocols = <0 0>; + secure-status = "okay"; /* secure-world-only */ + status = "disabled"; + }; + + mhu_seh1: mailbox@1b830000 { + compatible = "arm,mhuv2-rx", "arm,primecell"; + reg = <0x1b830000 0x1000>; + clocks = <&refclk100mhz>; + clock-names = "apb_pclk"; + interrupts = ; + #mbox-cells = <2>; + arm,mhuv2-protocols = <0 0>; + secure-status = "okay"; /* secure-world-only */ + status = "disabled"; + }; + }; +}; diff --git a/board/armltd/corstone1000/Kconfig b/board/armltd/corstone1000/Kconfig new file mode 100644 index 00000000000..709674d4cf7 --- /dev/null +++ b/board/armltd/corstone1000/Kconfig @@ -0,0 +1,12 @@ +if TARGET_CORSTONE1000 + +config SYS_BOARD + default "corstone1000" + +config SYS_VENDOR + default "armltd" + +config SYS_CONFIG_NAME + default "corstone1000" + +endif diff --git a/board/armltd/corstone1000/MAINTAINERS b/board/armltd/corstone1000/MAINTAINERS new file mode 100644 index 00000000000..8c905686de7 --- /dev/null +++ b/board/armltd/corstone1000/MAINTAINERS @@ -0,0 +1,7 @@ +CORSTONE1000 BOARD +M: Rui Miguel Silva +M: Vishnu Banavath +S: Maintained +F: board/armltd/corstone1000/ +F: include/configs/corstone1000.h +F: configs/corstone1000_defconfig diff --git a/board/armltd/corstone1000/Makefile b/board/armltd/corstone1000/Makefile new file mode 100644 index 00000000000..77a82c28929 --- /dev/null +++ b/board/armltd/corstone1000/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2022 Arm Limited +# (C) Copyright 2022 Linaro +# Rui Miguel Silva + +obj-y := corstone1000.o diff --git a/board/armltd/corstone1000/corstone1000.c b/board/armltd/corstone1000/corstone1000.c new file mode 100644 index 00000000000..4f4b96a095c --- /dev/null +++ b/board/armltd/corstone1000/corstone1000.c @@ -0,0 +1,91 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2022 ARM Limited + * (C) Copyright 2022 Linaro + * Rui Miguel Silva + */ + +#include +#include +#include +#include +#include +#include + +static struct mm_region corstone1000_mem_map[] = { + { + /* CVM */ + .virt = 0x02000000UL, + .phys = 0x02000000UL, + .size = 0x02000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + /* QSPI */ + .virt = 0x08000000UL, + .phys = 0x08000000UL, + .size = 0x08000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + /* Host Peripherals */ + .virt = 0x1A000000UL, + .phys = 0x1A000000UL, + .size = 0x26000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* USB */ + .virt = 0x40200000UL, + .phys = 0x40200000UL, + .size = 0x00100000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* ethernet */ + .virt = 0x40100000UL, + .phys = 0x40100000UL, + .size = 0x00100000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* OCVM */ + .virt = 0x80000000UL, + .phys = 0x80000000UL, + .size = 0x80000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + /* List terminator */ + 0, + } +}; + +struct mm_region *mem_map = corstone1000_mem_map; + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ + gd->ram_size = PHYS_SDRAM_1_SIZE; + + return 0; +} + +int dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return 0; +} + +void reset_cpu(ulong addr) +{ +} diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig new file mode 100644 index 00000000000..49a651aba23 --- /dev/null +++ b/configs/corstone1000_defconfig @@ -0,0 +1,52 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_TARGET_CORSTONE1000=y +CONFIG_SYS_TEXT_BASE=0x80000000 +CONFIG_SYS_MALLOC_LEN=0x2000000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="corstone1000-mps3" +CONFIG_IDENT_STRING=" corstone1000 aarch64 " +CONFIG_SYS_LOAD_ADDR=0x82100000 +CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x83f00000 +CONFIG_FIT=y +CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyAMA0 loglevel=9 ip=dhcp earlyprintk" +CONFIG_BOOTCOMMAND="run retrieve_kernel_load_addr; echo Loading kernel from $kernel_addr to memory ... ; loadm $kernel_addr $kernel_addr_r 0xc00000; usb start; usb reset; run distro_bootcmd; bootefi $kernel_addr_r $fdtcontroladdr;" +CONFIG_CONSOLE_RECORD=y +CONFIG_LOGLEVEL=7 +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SYS_PROMPT="corstone1000# " +CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=512 +# CONFIG_CMD_CONSOLE is not set +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_XIMG is not set +CONFIG_CMD_LOADM=y +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NFS is not set +CONFIG_CMD_CACHE=y +CONFIG_CMD_RTC=y +CONFIG_CMD_TIME=y +CONFIG_CMD_GETTIME=y +CONFIG_OF_CONTROL=y +CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_REGMAP=y +CONFIG_MISC=y +# CONFIG_MMC is not set +CONFIG_PHYLIB=y +CONFIG_PHY_SMSC=y +CONFIG_DM_ETH=y +CONFIG_SMC911X=y +CONFIG_PHY=y +CONFIG_RAM=y +CONFIG_DM_RTC=y +CONFIG_RTC_EMULATION=y +CONFIG_DM_SERIAL=y +CONFIG_USB=y +CONFIG_ERRNO_STR=y diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h new file mode 100644 index 00000000000..eba5cba0fba --- /dev/null +++ b/include/configs/corstone1000.h @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2022 ARM Limited + * (C) Copyright 2022 Linaro + * Rui Miguel Silva + * Abdellatif El Khlifi + * + * Configuration for Corstone1000. Parts were derived from other ARM + * configurations. + */ + +#ifndef __CORSTONE1000_H +#define __CORSTONE1000_H + +#include + +#define V2M_BASE 0x80000000 + +#define CONFIG_PL011_CLOCK 50000000 + +/* Physical Memory Map */ +#define PHYS_SDRAM_1 (V2M_BASE) +#define PHYS_SDRAM_1_SIZE 0x80000000 + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "usb_pgood_delay=250\0" \ + "boot_bank_flag=0x08002000\0" \ + "kernel_addr_bank_0=0x083EE000\0" \ + "kernel_addr_bank_1=0x0936E000\0" \ + "retrieve_kernel_load_addr=" \ + "if itest.l *${boot_bank_flag} == 0; then " \ + "setenv kernel_addr $kernel_addr_bank_0;" \ + "else " \ + "setenv kernel_addr $kernel_addr_bank_1;" \ + "fi;" \ + "\0" \ + "kernel_addr_r=0x88200000\0" + +#endif -- GitLab From c4645fc87e96e730a6c140d7d7820be2da1b2743 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 22 Jun 2022 16:08:56 -0400 Subject: [PATCH 222/581] cmd/misc: Stop using a function pointer Currently, enabling CMD_MISC gives: cmd/misc.c:67:25: warning: assignment to 'int (*)(struct udevice *, int, void *, int)' from incompatible pointer type 'int (*)(struct udevice *, int, const void *, int)' [-Wincompatible-pointer-types] Because 'misc_read' takes a void * and 'misc_write' takes a const void *, both of which make sense for their operation. Given there's one place we make use of the function pointer, just call read or write directly for the operation we're called with. Reviewed-by: Bin Meng Reviewed-by: Sean Anderson Signed-off-by: Tom Rini --- cmd/misc.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/cmd/misc.c b/cmd/misc.c index bcd8d960ee0..ec32b41ed1e 100644 --- a/cmd/misc.c +++ b/cmd/misc.c @@ -44,7 +44,6 @@ static int do_misc_list(struct cmd_tbl *cmdtp, int flag, static int do_misc_op(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[], enum misc_op op) { - int (*misc_op)(struct udevice *, int, void *, int); struct udevice *dev; int offset; void *buf; @@ -62,11 +61,10 @@ static int do_misc_op(struct cmd_tbl *cmdtp, int flag, size = hextoul(argv[3], NULL); if (op == MISC_OP_READ) - misc_op = misc_read; + ret = misc_read(dev, offset, buf, size); else - misc_op = misc_write; + ret = misc_write(dev, offset, buf, size); - ret = misc_op(dev, offset, buf, size); if (ret < 0) { if (ret == -ENOSYS) { printf("The device does not support %s\n", -- GitLab From 4276c9b2aabc7c6ff2faceedd839479a562c6738 Mon Sep 17 00:00:00 2001 From: Nick Hawkins Date: Wed, 8 Jun 2022 16:21:34 -0500 Subject: [PATCH 223/581] ARM: hpe: gxp: add core support The GXP is the HPE BMC SoC that is used in the majority of current generation HPE servers. Traditionally the asic will last multiple generations of server before being replaced. Info about SoC: HPE GXP is the name of the HPE Soc. This SoC is used to implement many BMC features at HPE. It supports ARMv7 architecture based on the Cortex A9 core. It is capable of using an AXI bus to whicha memory controller is attached. It has multiple SPI interfaces to connect boot flash and BIOS flash. It uses a 10/100/1000 MAC for network connectivity. It has multiple i2c engines to drive connectivity with a host infrastructure. There currently are no public specifications but this process is being worked. Signed-off-by: Nick Hawkins --- arch/arm/Kconfig | 8 ++++++++ arch/arm/Makefile | 1 + arch/arm/mach-hpe/Makefile | 1 + arch/arm/mach-hpe/gxp/Kconfig | 9 +++++++++ arch/arm/mach-hpe/gxp/Makefile | 1 + arch/arm/mach-hpe/gxp/reset.c | 25 +++++++++++++++++++++++++ 6 files changed, 45 insertions(+) create mode 100644 arch/arm/mach-hpe/Makefile create mode 100644 arch/arm/mach-hpe/gxp/Kconfig create mode 100644 arch/arm/mach-hpe/gxp/Makefile create mode 100644 arch/arm/mach-hpe/gxp/reset.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 95f92538d7a..dab785efad5 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -2095,6 +2095,12 @@ config TARGET_XENGUEST_ARM64 select SSCANF imply OF_HAS_PRIOR_STAGE +config ARCH_GXP + bool "Support HPE GXP SoCs" + select DM + select OF_CONTROL + imply CMD_DM + endchoice config SUPPORT_PASSING_ATAGS @@ -2205,6 +2211,8 @@ source "arch/arm/mach-davinci/Kconfig" source "arch/arm/mach-exynos/Kconfig" +source "arch/arm/mach-hpe/gxp/Kconfig" + source "arch/arm/mach-highbank/Kconfig" source "arch/arm/mach-integrator/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index a342d72daac..64c58f4c4a3 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -63,6 +63,7 @@ machine-$(CONFIG_ARCH_BCMBCA) += bcmbca machine-$(CONFIG_ARCH_BCMSTB) += bcmstb machine-$(CONFIG_ARCH_DAVINCI) += davinci machine-$(CONFIG_ARCH_EXYNOS) += exynos +machine-$(CONFIG_ARCH_GXP) += hpe machine-$(CONFIG_ARCH_HIGHBANK) += highbank machine-$(CONFIG_ARCH_IPQ40XX) += ipq40xx machine-$(CONFIG_ARCH_K3) += k3 diff --git a/arch/arm/mach-hpe/Makefile b/arch/arm/mach-hpe/Makefile new file mode 100644 index 00000000000..afe5f7a29ee --- /dev/null +++ b/arch/arm/mach-hpe/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_SOC_GXP) += gxp/ diff --git a/arch/arm/mach-hpe/gxp/Kconfig b/arch/arm/mach-hpe/gxp/Kconfig new file mode 100644 index 00000000000..2d43133ab06 --- /dev/null +++ b/arch/arm/mach-hpe/gxp/Kconfig @@ -0,0 +1,9 @@ +if ARCH_GXP + +config SOC_GXP + bool + select CPU_V7A + +source "board/hpe/gxp/Kconfig" + +endif diff --git a/arch/arm/mach-hpe/gxp/Makefile b/arch/arm/mach-hpe/gxp/Makefile new file mode 100644 index 00000000000..f3cc6684b89 --- /dev/null +++ b/arch/arm/mach-hpe/gxp/Makefile @@ -0,0 +1 @@ +obj-y += reset.o diff --git a/arch/arm/mach-hpe/gxp/reset.c b/arch/arm/mach-hpe/gxp/reset.c new file mode 100644 index 00000000000..ce018a35d94 --- /dev/null +++ b/arch/arm/mach-hpe/gxp/reset.c @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * GXP driver + * + * (C) Copyright 2022 Hewlett Packard Enterprise Development LP. + * Author: Nick Hawkins + * Author: Jean-Marie Verdun + */ + +#include + +#define GXP_CCR 0xc0000000 + +/* empty to satisfy current lowlevel_init, can be removed any time */ +void lowlevel_init(void) +{ +} + +void reset_cpu(ulong ignored) +{ + writel(1, GXP_CCR); + + while (1) + ; /* loop forever till reset */ +} -- GitLab From b25913b40ee138c35d4c92e55898a365348d5769 Mon Sep 17 00:00:00 2001 From: Nick Hawkins Date: Wed, 8 Jun 2022 16:21:35 -0500 Subject: [PATCH 224/581] timer: gxp: Add HPE GXP timer support Add support for the HPE GXP SOC timer. The GXP supports several different kinds of timers but for the purpose of this driver there is only support for the General Timer. The timer has a 1us resolution and is 56 bits. Signed-off-by: Nick Hawkins --- drivers/timer/Kconfig | 7 +++++ drivers/timer/Makefile | 1 + drivers/timer/gxp-timer.c | 64 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 72 insertions(+) create mode 100644 drivers/timer/gxp-timer.c diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig index 7b8ab56ed32..d592dba285c 100644 --- a/drivers/timer/Kconfig +++ b/drivers/timer/Kconfig @@ -139,6 +139,13 @@ config DESIGNWARE_APB_TIMER Enables support for the Designware APB Timer driver. This timer is present on Altera SoCFPGA SoCs. +config GXP_TIMER + bool "HPE GXP Timer" + depends on TIMER + help + Enables support for the GXP Timer driver. This timer is + present on HPE GXP SoCs. + config MPC83XX_TIMER bool "MPC83xx timer support" depends on TIMER diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile index b2f002d5978..cc2b8516b57 100644 --- a/drivers/timer/Makefile +++ b/drivers/timer/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_$(SPL_)ATMEL_PIT_TIMER) += atmel_pit_timer.o obj-$(CONFIG_$(SPL_)ATMEL_TCB_TIMER) += atmel_tcb_timer.o obj-$(CONFIG_CADENCE_TTC_TIMER) += cadence-ttc.o obj-$(CONFIG_DESIGNWARE_APB_TIMER) += dw-apb-timer.o +obj-$(CONFIG_GXP_TIMER) += gxp-timer.o obj-$(CONFIG_MPC83XX_TIMER) += mpc83xx_timer.o obj-$(CONFIG_NOMADIK_MTU_TIMER) += nomadik-mtu-timer.o obj-$(CONFIG_NPCM_TIMER) += npcm-timer.o diff --git a/drivers/timer/gxp-timer.c b/drivers/timer/gxp-timer.c new file mode 100644 index 00000000000..6f316bc8c5c --- /dev/null +++ b/drivers/timer/gxp-timer.c @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * GXP timer driver + * + * (C) Copyright 2022 Hewlett Packard Enterprise Development LP. + * Author: Nick Hawkins + * Author: Jean-Marie Verdun + */ + +#include +#include +#include +#include + +#define USTIMELO 0x18 +#define USTIMEHI 0x1C + +struct gxp_timer_priv { + void __iomem *base; +}; + +static u64 gxp_timer_get_count(struct udevice *dev) +{ + struct gxp_timer_priv *priv = dev_get_priv(dev); + u64 val; + + val = readl(priv->base + USTIMEHI); + val = (val << 32) | readl(priv->base + USTIMELO); + + return val; +} + +static int gxp_timer_probe(struct udevice *dev) +{ + struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev); + struct gxp_timer_priv *priv = dev_get_priv(dev); + + priv->base = dev_read_addr_ptr(dev); + if (!priv->base) + return -ENOENT; + + uc_priv->clock_rate = 1000000; + + return 0; +} + +static const struct timer_ops gxp_timer_ops = { + .get_count = gxp_timer_get_count, +}; + +static const struct udevice_id gxp_timer_ids[] = { + { .compatible = "hpe,gxp-timer" }, + {} +}; + +U_BOOT_DRIVER(gxp_timer) = { + .name = "gxp-timer", + .id = UCLASS_TIMER, + .of_match = gxp_timer_ids, + .priv_auto = sizeof(struct gxp_timer_priv), + .probe = gxp_timer_probe, + .ops = &gxp_timer_ops, + .flags = DM_FLAG_PRE_RELOC, +}; -- GitLab From 4f689b3d86be92625ec0593779590ab5ccfd8171 Mon Sep 17 00:00:00 2001 From: Nick Hawkins Date: Wed, 8 Jun 2022 16:21:36 -0500 Subject: [PATCH 225/581] spi: gxp_spi: Add GXP SPI controller driver The GXP supports 3 separate SPI interfaces to accommodate the system flash, core flash, and other functions. The SPI engine supports variable clock frequency, selectable 3-byte or 4-byte addressing and a configurable x1, x2, and x4 command/address/data modes. The memory buffer for reading and writing ranges between 256 bytes and 8KB. This driver supports access to the core flash. Signed-off-by: Nick Hawkins --- drivers/spi/Kconfig | 6 + drivers/spi/Makefile | 1 + drivers/spi/gxp_spi.c | 304 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 311 insertions(+) create mode 100644 drivers/spi/gxp_spi.c diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index a1e515cb2bc..e48d72d7445 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -186,6 +186,12 @@ config FSL_QSPI_AHB_FULL_MAP Enable the Freescale QSPI driver to use full AHB memory map space for flash access. +config GXP_SPI + bool "SPI driver for GXP" + imply SPI_FLASH_BAR + help + Enable support for SPI on GXP. + config ICH_SPI bool "Intel ICH SPI driver" help diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 06e81b465bc..8755408e629 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -33,6 +33,7 @@ obj-$(CONFIG_EXYNOS_SPI) += exynos_spi.o obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o obj-$(CONFIG_FSL_ESPI) += fsl_espi.o obj-$(CONFIG_SYNQUACER_SPI) += spi-synquacer.o +obj-$(CONFIG_GXP_SPI) += gxp_spi.o obj-$(CONFIG_ICH_SPI) += ich.o obj-$(CONFIG_IPROC_QSPI) += iproc_qspi.o obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o diff --git a/drivers/spi/gxp_spi.c b/drivers/spi/gxp_spi.c new file mode 100644 index 00000000000..70d76ac66ad --- /dev/null +++ b/drivers/spi/gxp_spi.c @@ -0,0 +1,304 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * GXP SPI driver + * + * (C) Copyright 2022 Hewlett Packard Enterprise Development LP. + * Author: Nick Hawkins + * Author: Jean-Marie Verdun + */ + +#include +#include +#include + +#define GXP_SPI0_MAX_CHIPSELECT 2 + +#define MANUAL_MODE 0 +#define AUTO_MODE 1 +#define OFFSET_SPIMCFG 0x00 +#define OFFSET_SPIMCTRL 0x04 +#define OFFSET_SPICMD 0x05 +#define OFFSET_SPIDCNT 0x06 +#define OFFSET_SPIADDR 0x08 +#define OFFSET_SPILDAT 0x40 +#define GXP_SPILDAT_SIZE 64 + +#define SPIMCTRL_START 0x01 +#define SPIMCTRL_BUSY 0x02 + +#define CMD_READ_ARRAY_FAST 0x0b + +struct gxp_spi_priv { + struct spi_slave slave; + void __iomem *base; + unsigned int mode; + +}; + +static void spi_set_mode(struct gxp_spi_priv *priv, int mode) +{ + unsigned char value; + + value = readb(priv->base + OFFSET_SPIMCTRL); + if (mode == MANUAL_MODE) { + writeb(0x55, priv->base + OFFSET_SPICMD); + writeb(0xaa, priv->base + OFFSET_SPICMD); + /* clear bit5 and bit4, auto_start and start_mask */ + value &= ~(0x03 << 4); + } else { + value |= (0x03 << 4); + } + writeb(value, priv->base + OFFSET_SPIMCTRL); +} + +static int gxp_spi_xfer(struct udevice *dev, unsigned int bitlen, const void *dout, void *din, + unsigned long flags) +{ + struct gxp_spi_priv *priv = dev_get_priv(dev->parent); + struct spi_slave *slave = dev_get_parent_priv(dev); + struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev); + + unsigned int len = bitlen / 8; + unsigned int value; + unsigned int addr = 0; + unsigned char uchar_out[len]; + unsigned char *uchar_in = (unsigned char *)din; + int read_len; + int read_ptr; + + if (dout && din) { + /* + * error: gxp spi engin cannot send data to dout and read data from din at the same + * time + */ + return -1; + } + + memset(uchar_out, 0, sizeof(uchar_out)); + if (dout) + memcpy(uchar_out, dout, len); + + if (flags & SPI_XFER_BEGIN) { + /* the dout is cmd + addr, cmd=dout[0], add1~3=dout[1~3]. */ + /* cmd reg */ + writeb(uchar_out[0], priv->base + OFFSET_SPICMD); + + /* config reg */ + value = readl(priv->base + OFFSET_SPIMCFG); + value &= ~(1 << 24); + /* set chipselect */ + value |= (slave_plat->cs << 24); + + /* addr reg and addr size */ + if (len >= 4) { + addr = uchar_out[1] << 16 | uchar_out[2] << 8 | uchar_out[3]; + writel(addr, priv->base + OFFSET_SPIADDR); + value &= ~(0x07 << 16); + /* set the address size to 3 byte */ + value |= (3 << 16); + } else { + writel(0, priv->base + OFFSET_SPIADDR); + /* set the address size to 0 byte */ + value &= ~(0x07 << 16); + } + + /* dummy */ + /* clear dummy_cnt to */ + value &= ~(0x1f << 19); + if (uchar_out[0] == CMD_READ_ARRAY_FAST) { + /* fast read needs 8 dummy clocks */ + value |= (8 << 19); + } + + writel(value, priv->base + OFFSET_SPIMCFG); + + if (flags & SPI_XFER_END) { + /* no data cmd just start it */ + /* set the data direction bit to 1 */ + value = readb(priv->base + OFFSET_SPIMCTRL); + value |= (1 << 3); + writeb(value, priv->base + OFFSET_SPIMCTRL); + + /* set the data byte count */ + writeb(0, priv->base + OFFSET_SPIDCNT); + + /* set the start bit */ + value = readb(priv->base + OFFSET_SPIMCTRL); + value |= SPIMCTRL_START; + writeb(value, priv->base + OFFSET_SPIMCTRL); + + /* wait busy bit is cleared */ + do { + value = readb(priv->base + OFFSET_SPIMCTRL); + } while (value & SPIMCTRL_BUSY); + return 0; + } + } + + if (!(flags & SPI_XFER_END) && (flags & SPI_XFER_BEGIN)) { + /* first of spi_xfer calls */ + return 0; + } + + /* if dout != null, write data to buf and start transaction */ + if (dout) { + if (len > slave->max_write_size) { + printf("SF: write length is too big(>%d)\n", slave->max_write_size); + return -1; + } + + /* load the data bytes */ + memcpy((u8 *)priv->base + OFFSET_SPILDAT, dout, len); + + /* write: set the data direction bit to 1 */ + value = readb(priv->base + OFFSET_SPIMCTRL); + value |= (1 << 3); + writeb(value, priv->base + OFFSET_SPIMCTRL); + + /* set the data byte count */ + writeb(len, priv->base + OFFSET_SPIDCNT); + + /* set the start bit */ + value = readb(priv->base + OFFSET_SPIMCTRL); + value |= SPIMCTRL_START; + writeb(value, priv->base + OFFSET_SPIMCTRL); + + /* wait busy bit is cleared */ + do { + value = readb(priv->base + OFFSET_SPIMCTRL); + } while (value & SPIMCTRL_BUSY); + + return 0; + } + + /* if din !=null, start and read data */ + if (uchar_in) { + read_ptr = 0; + + while (read_ptr < len) { + read_len = len - read_ptr; + if (read_len > GXP_SPILDAT_SIZE) + read_len = GXP_SPILDAT_SIZE; + + /* read: set the data direction bit to 0 */ + value = readb(priv->base + OFFSET_SPIMCTRL); + value &= ~(1 << 3); + writeb(value, priv->base + OFFSET_SPIMCTRL); + + /* set the data byte count */ + writeb(read_len, priv->base + OFFSET_SPIDCNT); + + /* set the start bit */ + value = readb(priv->base + OFFSET_SPIMCTRL); + value |= SPIMCTRL_START; + writeb(value, priv->base + OFFSET_SPIMCTRL); + + /* wait busy bit is cleared */ + do { + value = readb(priv->base + OFFSET_SPIMCTRL); + } while (value & SPIMCTRL_BUSY); + + /* store the data bytes */ + memcpy(uchar_in + read_ptr, (u8 *)priv->base + OFFSET_SPILDAT, read_len); + /* update read_ptr and addr reg */ + read_ptr += read_len; + + addr = readl(priv->base + OFFSET_SPIADDR); + addr += read_len; + writel(addr, priv->base + OFFSET_SPIADDR); + } + + return 0; + } + return -2; +} + +static int gxp_spi_set_speed(struct udevice *dev, unsigned int speed) +{ + /* Accept any speed */ + return 0; +} + +static int gxp_spi_set_mode(struct udevice *dev, unsigned int mode) +{ + struct gxp_spi_priv *priv = dev_get_priv(dev->parent); + + priv->mode = mode; + + return 0; +} + +static int gxp_spi_claim_bus(struct udevice *dev) +{ + struct gxp_spi_priv *priv = dev_get_priv(dev->parent); + unsigned char cmd; + + spi_set_mode(priv, MANUAL_MODE); + + /* exit 4 bytes addr mode, uboot spi_flash only supports 3 byets address mode */ + cmd = 0xe9; + gxp_spi_xfer(dev, 1 * 8, &cmd, NULL, SPI_XFER_BEGIN | SPI_XFER_END); + return 0; +} + +static int gxp_spi_release_bus(struct udevice *dev) +{ + struct gxp_spi_priv *priv = dev_get_priv(dev->parent); + + spi_set_mode(priv, AUTO_MODE); + + return 0; +} + +int gxp_spi_cs_info(struct udevice *bus, unsigned int cs, struct spi_cs_info *info) +{ + if (cs < GXP_SPI0_MAX_CHIPSELECT) + return 0; + else + return -ENODEV; +} + +static int gxp_spi_probe(struct udevice *bus) +{ + struct gxp_spi_priv *priv = dev_get_priv(bus); + + priv->base = dev_read_addr_ptr(bus); + if (!priv->base) + return -ENOENT; + + return 0; +} + +static int gxp_spi_child_pre_probe(struct udevice *dev) +{ + struct spi_slave *slave = dev_get_parent_priv(dev); + + slave->max_write_size = GXP_SPILDAT_SIZE; + + return 0; +} + +static const struct dm_spi_ops gxp_spi_ops = { + .claim_bus = gxp_spi_claim_bus, + .release_bus = gxp_spi_release_bus, + .xfer = gxp_spi_xfer, + .set_speed = gxp_spi_set_speed, + .set_mode = gxp_spi_set_mode, + .cs_info = gxp_spi_cs_info, +}; + +static const struct udevice_id gxp_spi_ids[] = { + { .compatible = "hpe,gxp-spi" }, + { } +}; + +U_BOOT_DRIVER(gxp_spi) = { + .name = "gxp_spi", + .id = UCLASS_SPI, + .of_match = gxp_spi_ids, + .ops = &gxp_spi_ops, + .priv_auto = sizeof(struct gxp_spi_priv), + .probe = gxp_spi_probe, + .child_pre_probe = gxp_spi_child_pre_probe, +}; + -- GitLab From e7ea0a2ba3ec6bc9392270aa97e4d3f8a196d91a Mon Sep 17 00:00:00 2001 From: Nick Hawkins Date: Wed, 8 Jun 2022 16:21:37 -0500 Subject: [PATCH 226/581] board: hpe: gxp: add HPE GXP soc support Add basic support for the HPE GXP SoC. Reset the EHCI controller at boot. Signed-off-by: Nick Hawkins --- board/hpe/gxp/Kconfig | 46 ++++++++++++++++++++++++ board/hpe/gxp/Makefile | 1 + board/hpe/gxp/gxp_board.c | 75 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 122 insertions(+) create mode 100644 board/hpe/gxp/Kconfig create mode 100644 board/hpe/gxp/Makefile create mode 100644 board/hpe/gxp/gxp_board.c diff --git a/board/hpe/gxp/Kconfig b/board/hpe/gxp/Kconfig new file mode 100644 index 00000000000..5b154a3f6e5 --- /dev/null +++ b/board/hpe/gxp/Kconfig @@ -0,0 +1,46 @@ +choice + prompt "SoC select" + +config TARGET_GXP + bool "GXP" + select DM + select SOC_GXP + imply CMD_DM + +config TARGET_GXP2 + bool "GXP2" + select DM + select SOC_GXP + select GXP_ECC + imply CMD_DM + +endchoice + +choice + prompt "GXP VROM size" + default GXP_VROM_64MB + optional + +config GXP_VROM_64MB + bool "64MB" + +config GXP_VROM_32MB + bool "32MB" +endchoice + +config GXP_ECC + bool "Enable memory ECC protected" + help + Use half of memory to enable ECC protected + +config SYS_BOARD + default "gxp" + +config SYS_VENDOR + default "hpe" + +config SYS_CONFIG_NAME + default "gxp" + +config SYS_TEXT_BASE + default 0x50000000 diff --git a/board/hpe/gxp/Makefile b/board/hpe/gxp/Makefile new file mode 100644 index 00000000000..775d6bf8497 --- /dev/null +++ b/board/hpe/gxp/Makefile @@ -0,0 +1 @@ +obj-y += gxp_board.o diff --git a/board/hpe/gxp/gxp_board.c b/board/hpe/gxp/gxp_board.c new file mode 100644 index 00000000000..d94d9b8a19e --- /dev/null +++ b/board/hpe/gxp/gxp_board.c @@ -0,0 +1,75 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * GXP timer driver + * + * (C) Copyright 2022 Hewlett Packard Enterprise Development LP. + * Author: Nick Hawkins + * Author: Jean-Marie Verdun + */ + +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define ECHI_CMD 0xcefe0010 + +int board_init(void) +{ + writel(0x00080002, ECHI_CMD); + + return 0; +} + +int dram_init(void) +{ + if (IS_ENABLED(CONFIG_TARGET_GXP)) { + if (IS_ENABLED(CONFIG_GXP_ECC)) { + /* 0x0f800000 */ + gd->ram_size = SZ_128M + SZ_64M + SZ_32M + SZ_16M + SZ_8M; + } else { + /* 0x1f000000 */ + gd->ram_size = SZ_256M + SZ_128M + SZ_64M + SZ_32M + SZ_16M; + } + + if (IS_ENABLED(CONFIG_GXP_VROM_64MB)) { + if (IS_ENABLED(CONFIG_GXP_ECC)) { + /* 0x0c000000 */ + gd->ram_size = SZ_128M + SZ_64M; + } else { + /* 0x18000000 */ + gd->ram_size = SZ_256M + SZ_128M; + } + } + + if (IS_ENABLED(CONFIG_GXP_VROM_32MB)) { + if (IS_ENABLED(CONFIG_GXP_ECC)) { + /* 0x0e000000 */ + gd->ram_size = SZ_128M + SZ_64M + SZ_32M; + } else { + /* 0x1c000000 */ + gd->ram_size = SZ_256M + SZ_128M + SZ_64M; + } + } + } + + if (IS_ENABLED(CONFIG_TARGET_GXP2)) { + /* 0x1b200000 */ + gd->ram_size = SZ_256M + SZ_128M + SZ_32M + SZ_16M + SZ_2M; + if (IS_ENABLED(CONFIG_GXP_VROM_64MB)) { + /* 0x14000000 */ + gd->ram_size = SZ_256M + SZ_64M; + } + + if (IS_ENABLED(CONFIG_GXP_VROM_32MB)) { + /* 0x18000000 */ + gd->ram_size = SZ_256M + SZ_128M; + } + } + + return 0; +} + -- GitLab From 63ff9d91348a95fb21bc97b3d757fd68462b9910 Mon Sep 17 00:00:00 2001 From: Nick Hawkins Date: Wed, 8 Jun 2022 16:21:38 -0500 Subject: [PATCH 227/581] dt-bindings: spi: Add hpe gxp spi Add support for the HPE GXP SPI Controller. Signed-off-by: Nick Hawkins --- doc/device-tree-bindings/spi/hpe,gxp-spi.yaml | 37 +++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 doc/device-tree-bindings/spi/hpe,gxp-spi.yaml diff --git a/doc/device-tree-bindings/spi/hpe,gxp-spi.yaml b/doc/device-tree-bindings/spi/hpe,gxp-spi.yaml new file mode 100644 index 00000000000..5e23de1847c --- /dev/null +++ b/doc/device-tree-bindings/spi/hpe,gxp-spi.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/spi/hpe,gxp-spi.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: HPE GXP SPI Controller + +maintainers: + - Nick Hawkins + - Jean-Marie Verdun + +allOf: + - $ref: "spi-controller.yaml#" + +properties: + compatible: + const: mikrotik,rb4xx-spi + + reg: + maxItems: 1 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + spi@c00000200{ + compatible = "hpe,gxp-spi"; + reg = <0xc0000200 0x80>; + #address-cells = <1>; + #size-cells = <0>; + }; + -- GitLab From 2b7a89bc941707baccf9f3acdc8ca48d489b524c Mon Sep 17 00:00:00 2001 From: Nick Hawkins Date: Wed, 8 Jun 2022 16:21:39 -0500 Subject: [PATCH 228/581] ARM: dts: Add device tree files for hpe gxp soc The HPE SoC is new to linux. A basic device tree layout with minimum required for linux to boot including a timer and watchdog support has been created. The dts file is empty at this point but will be updated in subsequent updates as board specific features are enabled. Signed-off-by: Nick Hawkins --- arch/arm/dts/Makefile | 2 + arch/arm/dts/hpe-bmc-dl360gen10.dts | 26 ++++++ arch/arm/dts/hpe-gxp-u-boot.dtsi | 25 ++++++ arch/arm/dts/hpe-gxp.dtsi | 127 ++++++++++++++++++++++++++++ 4 files changed, 180 insertions(+) create mode 100644 arch/arm/dts/hpe-bmc-dl360gen10.dts create mode 100644 arch/arm/dts/hpe-gxp-u-boot.dtsi create mode 100644 arch/arm/dts/hpe-gxp.dtsi diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 2873d048cdb..4b940f85169 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1247,6 +1247,8 @@ dtb-$(CONFIG_TARGET_POMELO) += phytium-pomelo.dtb dtb-$(CONFIG_TARGET_PRESIDIO_ASIC) += ca-presidio-engboard.dtb +dtb-$(CONFIG_TARGET_GXP) += hpe-bmc-dl360gen10.dts + dtb-$(CONFIG_TARGET_IMX8MM_CL_IOT_GATE) += imx8mm-cl-iot-gate.dtb \ imx8mm-cl-iot-gate-ied.dtbo \ imx8mm-cl-iot-gate-ied-adc0.dtbo \ diff --git a/arch/arm/dts/hpe-bmc-dl360gen10.dts b/arch/arm/dts/hpe-bmc-dl360gen10.dts new file mode 100644 index 00000000000..b8030d9d9fd --- /dev/null +++ b/arch/arm/dts/hpe-bmc-dl360gen10.dts @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree file for HPE DL360Gen10 + */ + +/include/ "hpe-gxp-u-boot.dtsi" + +/ { + #address-cells = <1>; + #size-cells = <1>; + compatible = "hpe,gxp-dl360gen10", "hpe,gxp"; + model = "Hewlett Packard Enterprise ProLiant dl360 Gen10"; + + aliases { + serial0 = &uartc; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0x40000000 0x20000000>; + }; +}; diff --git a/arch/arm/dts/hpe-gxp-u-boot.dtsi b/arch/arm/dts/hpe-gxp-u-boot.dtsi new file mode 100644 index 00000000000..7a2b488521f --- /dev/null +++ b/arch/arm/dts/hpe-gxp-u-boot.dtsi @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree file for HPE GXP + */ + +/include/ "hpe-gxp.dtsi" + +/ { + + axi { + u-boot,dm-pre-reloc; + + ahb@c0000000 { + u-boot,dm-pre-reloc; + + spi0: spi@200 { + compatible = "hpe,gxp-spi"; + reg = <0x200 0x80>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + }; + }; + }; +}; diff --git a/arch/arm/dts/hpe-gxp.dtsi b/arch/arm/dts/hpe-gxp.dtsi new file mode 100644 index 00000000000..cf735b3c4f3 --- /dev/null +++ b/arch/arm/dts/hpe-gxp.dtsi @@ -0,0 +1,127 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree file for HPE GXP + */ + +/dts-v1/; +/ { + model = "Hewlett Packard Enterprise GXP BMC"; + compatible = "hpe,gxp"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "arm,cortex-a9"; + reg = <0>; + device_type = "cpu"; + next-level-cache = <&L2>; + }; + }; + + clocks { + pll: clock-0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <1600000000>; + }; + + iopclk: clock-1 { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <4>; + clock-mult = <1>; + clocks = <&pll>; + }; + }; + + axi { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + dma-ranges; + + L2: cache-controller@b0040000 { + compatible = "arm,pl310-cache"; + reg = <0xb0040000 0x1000>; + cache-unified; + cache-level = <2>; + }; + + ahb@c0000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xc0000000 0x30000000>; + dma-ranges; + + vic0: interrupt-controller@eff0000 { + compatible = "arm,pl192-vic"; + reg = <0xeff0000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + vic1: interrupt-controller@80f00000 { + compatible = "arm,pl192-vic"; + reg = <0x80f00000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + uarta: serial@e0 { + compatible = "ns16550a"; + reg = <0xe0 0x8>; + interrupts = <17>; + interrupt-parent = <&vic0>; + clock-frequency = <1846153>; + reg-shift = <0>; + }; + + uartb: serial@e8 { + compatible = "ns16550a"; + reg = <0xe8 0x8>; + interrupts = <18>; + interrupt-parent = <&vic0>; + clock-frequency = <1846153>; + reg-shift = <0>; + }; + + uartc: serial@f0 { + compatible = "ns16550a"; + reg = <0xf0 0x8>; + interrupts = <19>; + interrupt-parent = <&vic0>; + clock-frequency = <1846153>; + reg-shift = <0>; + }; + + usb0: usb@efe0000 { + compatible = "hpe,gxp-ehci", "generic-ehci"; + reg = <0xefe0000 0x100>; + interrupts = <7>; + interrupt-parent = <&vic0>; + }; + + st: timer@80 { + compatible = "hpe,gxp-timer"; + reg = <0x80 0x16>; + interrupts = <0>; + interrupt-parent = <&vic0>; + clocks = <&iopclk>; + clock-names = "iop"; + }; + + usb1: usb@efe0100 { + compatible = "hpe,gxp-ohci", "generic-ohci"; + reg = <0xefe0100 0x110>; + interrupts = <6>; + interrupt-parent = <&vic0>; + }; + }; + }; +}; -- GitLab From 79c6c381020324e059f877eb4539fc31226d7fb7 Mon Sep 17 00:00:00 2001 From: Nick Hawkins Date: Wed, 8 Jun 2022 16:21:40 -0500 Subject: [PATCH 229/581] configs: gxp: add core support Add the include file for the gxp soc. Signed-off-by: Nick Hawkins --- include/configs/gxp.h | 43 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 include/configs/gxp.h diff --git a/include/configs/gxp.h b/include/configs/gxp.h new file mode 100644 index 00000000000..ae46126399f --- /dev/null +++ b/include/configs/gxp.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * GXP board + * + * (C) Copyright 2022 Hewlett Packard Enterprise Development LP. + * Author: Nick Hawkins + * Author: Jean-Marie Verdun + */ + +#ifndef _GXP_H_ +#define _GXP_H_ + +#define CONFIG_SYS_SDRAM_BASE 0x40000000 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "recover_file=openbmc-hpe-recovery-image.mtd\0" \ + "recover_cmd=usb start; " \ + "mw.b 0xD100000D 0x40; " \ + "if fatload usb 0 0x50000000 $recover_file 0x4C0000 0x80000; then " \ + "setenv bootargs console=ttyS0,115200 recovery; " \ + "setenv force_recovery; " \ + "saveenv; " \ + "bootm 0x50000000; " \ + "else " \ + "while itest 0 < 1; do " \ + "mw.b 0xd1000005 0xc0; " \ + "sleep .1; " \ + "mw.b 0xd1000005 0x00; " \ + "sleep .1; " \ + "done; " \ + "fi; " \ + "reset;\0" \ + "spiboot=if itest.b *0xD10000B2 == 6; then " \ + "run recover_cmd;" \ + "fi;" \ + "if printenv force_recovery; then " \ + "run recover_cmd; " \ + "else " \ + "bootm 0xfc080000; " \ + "run recover_cmd; " \ + "fi;\0" + +#endif -- GitLab From 3736faee5b776a9f273d4107ea58fab4bbd48cef Mon Sep 17 00:00:00 2001 From: Nick Hawkins Date: Wed, 8 Jun 2022 16:21:41 -0500 Subject: [PATCH 230/581] configs: gxp: add gxp_defconfig This is the initial very basic config that enables the U-Boot console on the hpe gxp soc. Signed-off-by: Nick Hawkins --- configs/gxp_defconfig | 60 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 configs/gxp_defconfig diff --git a/configs/gxp_defconfig b/configs/gxp_defconfig new file mode 100644 index 00000000000..4408c6ce370 --- /dev/null +++ b/configs/gxp_defconfig @@ -0,0 +1,60 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_THUMB_BUILD=y +CONFIG_ARCH_GXP=y +CONFIG_SYS_MALLOC_LEN=0x4000000 +CONFIG_GXP_VROM_64MB=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_OFFSET=0x60000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="hpe-bmc-dl360gen10" +CONFIG_ENV_OFFSET_REDUND=0x70000 +CONFIG_SYS_LOAD_ADDR=0x40100000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_BOOTDELAY=5 +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" +CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="earlyprintk console=ttyS2,115200 user_debug=31" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run spiboot" +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="gxp# " +# CONFIG_BOOTM_NETBSD is not set +# CONFIG_BOOTM_PLAN9 is not set +# CONFIG_BOOTM_RTEMS is not set +# CONFIG_BOOTM_VXWORKS is not set +CONFIG_CMD_GPT=y +# CONFIG_RANDOM_UUID is not set +CONFIG_CMD_MISC=y +CONFIG_CMD_FAT=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_NETCONSOLE=y +CONFIG_MISC=y +# CONFIG_MMC is not set +CONFIG_DM_SPI_FLASH=y +CONFIG_SF_DEFAULT_MODE=3 +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_POWER is not set +CONFIG_RAM=y +CONFIG_DM_SERIAL=y +CONFIG_SYS_NS16550=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_GXP_SPI=y +CONFIG_TIMER=y +CONFIG_GXP_TIMER=y +CONFIG_SHA512=y -- GitLab From 478c00718df842271fe0636031603bfcef420837 Mon Sep 17 00:00:00 2001 From: Nick Hawkins Date: Wed, 8 Jun 2022 16:21:42 -0500 Subject: [PATCH 231/581] MAINTAINERS: Introduce HPE GXP Architecture Create a section in MAINTAINERS for the GXP HPE architecture Signed-off-by: Nick Hawkins --- MAINTAINERS | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 2ebec1f7b40..ba9fdb5a667 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -279,6 +279,19 @@ F: arch/arm/cpu/armv8/hisilicon F: arch/arm/include/asm/arch-hi6220/ F: arch/arm/include/asm/arch-hi3660/ +ARM HPE GXP ARCHITECTURE +M: Jean-Marie Verdun +M: Nick Hawkins +S: Maintained +F: arch/arm/dts/hpe-bmc* +F: arch/arm/dts/hpe-gxp* +F: arch/arm/mach-hpe/ +F: board/hpe/ +F: configs/gxp_defconfig +F: doc/device-tree-bindings/spi/hpe,gxp-spi.yaml +F: drivers/timer/gxp-timer.c +F: drivers/spi/gxp_spi.c + ARM IPQ40XX M: Robert Marko M: Luka Kovacic -- GitLab From 442a69c143759648f571e3784c7b3bc5be7ed595 Mon Sep 17 00:00:00 2001 From: Chia-Wei Wang Date: Wed, 1 Jun 2022 16:21:15 +0800 Subject: [PATCH 232/581] configs: ast2600: Move SPL bss section to DRAM space The commit b583348ca8c8 ("image: fit: Align hash output buffers") places the hash output buffer at the .bss section. However, AST2600 by default executes SPL in the NOR flash XIP way. This results in the hash output cannot be written to the buffer as it is located at the R/X only region. We need to move the .bss section out of the SPL body to the DRAM space, where hash output can be written to. This patch includes: - Define the .bss section base and size - A new SPL linker script is added with a separate .bss region specified - Enable CONFIG_SPL_SEPARATE_BSS kconfig option Signed-off-by: Chia-Wei Wang Reviewed-by: Neal Liu --- arch/arm/mach-aspeed/ast2600/u-boot-spl.lds | 94 +++++++++++++++++++++ configs/evb-ast2600_defconfig | 6 +- 2 files changed, 99 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-aspeed/ast2600/u-boot-spl.lds diff --git a/arch/arm/mach-aspeed/ast2600/u-boot-spl.lds b/arch/arm/mach-aspeed/ast2600/u-boot-spl.lds new file mode 100644 index 00000000000..22b4e16d35c --- /dev/null +++ b/arch/arm/mach-aspeed/ast2600/u-boot-spl.lds @@ -0,0 +1,94 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2004-2008 Texas Instruments + * + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, + * + * (C) Copyright 2022 + * Chia-Wei Wang + */ + +MEMORY { .nor : ORIGIN = CONFIG_SPL_TEXT_BASE, + LENGTH = CONFIG_SPL_SIZE_LIMIT } +MEMORY { .bss : ORIGIN = CONFIG_SPL_BSS_START_ADDR, + LENGTH = CONFIG_SPL_BSS_MAX_SIZE } + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + __image_copy_start = .; + *(.vectors) + CPUDIR/start.o (.text*) + *(.text*) + *(.glue*) + } > .nor + + . = ALIGN(4); + .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } > .nor + + . = ALIGN(4); + .data : { + *(.data*) + } > .nor + + . = ALIGN(4); + .u_boot_list : { + KEEP(*(SORT(.u_boot_list*))); + } > .nor + + . = ALIGN(4); + .binman_sym_table : { + __binman_sym_start = .; + KEEP(*(SORT(.binman_sym*))); + __binman_sym_end = .; + } > .nor + + . = ALIGN(4); + + __image_copy_end = .; + + .rel.dyn : { + __rel_dyn_start = .; + *(.rel*) + __rel_dyn_end = .; + } > .nor + + .end : + { + *(.__end) + } > .nor + + _image_binary_end = .; + + .bss : { + __bss_start = .; + *(.bss*) + . = ALIGN(4); + __bss_end = .; + } > .bss + + __bss_size = __bss_end - __bss_start; +} + +#if defined(IMAGE_MAX_SIZE) +ASSERT(__image_copy_end - __image_copy_start <= (IMAGE_MAX_SIZE), \ + "SPL image too big"); +#endif + +#if defined(CONFIG_SPL_BSS_MAX_SIZE) +ASSERT(__bss_end - __bss_start <= (CONFIG_SPL_BSS_MAX_SIZE), \ + "SPL image BSS too big"); +#endif + +#if defined(CONFIG_SPL_MAX_FOOTPRINT) +ASSERT(__bss_end - _start <= (CONFIG_SPL_MAX_FOOTPRINT), \ + "SPL image plus BSS too big"); +#endif diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index bfd0a5f2b10..a91a53da4fc 100644 --- a/configs/evb-ast2600_defconfig +++ b/configs/evb-ast2600_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SYS_DCACHE_OFF=y CONFIG_SPL_SYS_THUMB_BUILD=y +CONFIG_SPL_LDSCRIPT="arch/arm/mach-aspeed/ast2600/u-boot-spl.lds" CONFIG_ARCH_ASPEED=y CONFIG_SYS_TEXT_BASE=0x80000000 CONFIG_SYS_MALLOC_LEN=0x2000000 @@ -32,10 +33,13 @@ CONFIG_BOOTCOMMAND="run bootspi" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y -CONFIG_SPL_NO_BSS_LIMIT=y +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x83000000 +CONFIG_SPL_BSS_MAX_SIZE=0x1000000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000000 +CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_RAM_SUPPORT=y -- GitLab From 12770d0df0e841cfa1bdbde7636aad3d531bf66b Mon Sep 17 00:00:00 2001 From: Chia-Wei Wang Date: Wed, 1 Jun 2022 16:43:52 +0800 Subject: [PATCH 233/581] ast2600: spl: Add boot mode detection AST2600 supports boot from SPI(mmap), eMMC, and UART. This patch adds the boot mode detection and return the corresponding boot device type. Signed-off-by: Chia-Wei Wang --- .../arm/include/asm/arch-aspeed/scu_ast2600.h | 3 ++ arch/arm/mach-aspeed/ast2600/spl.c | 30 +++++++++++++++++++ 2 files changed, 33 insertions(+) diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2600.h b/arch/arm/include/asm/arch-aspeed/scu_ast2600.h index 7c5aab98b63..251bfa269bf 100644 --- a/arch/arm/include/asm/arch-aspeed/scu_ast2600.h +++ b/arch/arm/include/asm/arch-aspeed/scu_ast2600.h @@ -87,6 +87,9 @@ #define SCU_HWSTRAP1_CPU_FREQ_SHIFT 8 #define SCU_HWSTRAP1_MAC2_INTF BIT(7) #define SCU_HWSTRAP1_MAC1_INTF BIT(6) +#define SCU_HWSTRAP1_BOOT_EMMC BIT(2) + +#define SCU_HWSTRAP2_BOOT_UART BIT(8) #define SCU_EFUSE_DIS_DP BIT(17) #define SCU_EFUSE_DIS_VGA BIT(14) diff --git a/arch/arm/mach-aspeed/ast2600/spl.c b/arch/arm/mach-aspeed/ast2600/spl.c index 6c49d6aede8..53c8a15bf9c 100644 --- a/arch/arm/mach-aspeed/ast2600/spl.c +++ b/arch/arm/mach-aspeed/ast2600/spl.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -21,8 +22,37 @@ void board_init_f(ulong dummy) dram_init(); } +/* + * Try to detect the boot mode. Fallback to the default, + * memory mapped SPI XIP booting if detection failed. + */ u32 spl_boot_device(void) { + int rc; + struct udevice *scu_dev; + struct ast2600_scu *scu; + + rc = uclass_get_device_by_driver(UCLASS_CLK, + DM_DRIVER_GET(aspeed_ast2600_scu), &scu_dev); + if (rc) { + debug("%s: failed to get SCU driver\n", __func__); + goto out; + } + + scu = devfdt_get_addr_ptr(scu_dev); + if (IS_ERR_OR_NULL(scu)) { + debug("%s: failed to get SCU base\n", __func__); + goto out; + } + + /* boot from UART has higher priority */ + if (scu->hwstrap2 & SCU_HWSTRAP2_BOOT_UART) + return BOOT_DEVICE_UART; + + if (scu->hwstrap1 & SCU_HWSTRAP1_BOOT_EMMC) + return BOOT_DEVICE_MMC1; + +out: return BOOT_DEVICE_RAM; } -- GitLab From 9e03b48dfa6f0ad4a0a4f4411c8cc1da2cd70800 Mon Sep 17 00:00:00 2001 From: Jim Liu Date: Tue, 7 Jun 2022 16:32:08 +0800 Subject: [PATCH 234/581] crypto: nuvoton: Add NPCM7xx AES driver add nuvoton BMC npcm750 AES driver Signed-off-by: Jim Liu --- arch/arm/include/asm/arch-npcm7xx/aes.h | 53 +++++ drivers/crypto/Kconfig | 2 + drivers/crypto/Makefile | 1 + drivers/crypto/nuvoton/Kconfig | 8 + drivers/crypto/nuvoton/Makefile | 1 + drivers/crypto/nuvoton/npcm_aes.c | 301 ++++++++++++++++++++++++ 6 files changed, 366 insertions(+) create mode 100644 arch/arm/include/asm/arch-npcm7xx/aes.h create mode 100644 drivers/crypto/nuvoton/Kconfig create mode 100644 drivers/crypto/nuvoton/Makefile create mode 100644 drivers/crypto/nuvoton/npcm_aes.c diff --git a/arch/arm/include/asm/arch-npcm7xx/aes.h b/arch/arm/include/asm/arch-npcm7xx/aes.h new file mode 100644 index 00000000000..255efcb5ce0 --- /dev/null +++ b/arch/arm/include/asm/arch-npcm7xx/aes.h @@ -0,0 +1,53 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef _NPCM_AES_H_ +#define _NPCM_AES_H_ + +#define AES_OP_ENCRYPT 0 +#define AES_OP_DECRYPT 1 +#define SIZE_AES_BLOCK (AES128_KEY_LENGTH) + +struct npcm_aes_regs { + unsigned char reserved_0[0x400]; // 0x000 + unsigned int aes_key_0; // 0x400 + unsigned int aes_key_1; // 0x404 + unsigned int aes_key_2; // 0x408 + unsigned int aes_key_3; // 0x40c + unsigned char reserved_1[0x30]; // 0x410 + unsigned int aes_iv_0; // 0x440 + unsigned char reserved_2[0x1c]; // 0x444 + unsigned int aes_ctr_0; // 0x460 + unsigned char reserved_3[0x0c]; // 0x464 + unsigned int aes_busy; // 0x470 + unsigned char reserved_4[0x04]; // 0x474 + unsigned int aes_sk; // 0x478 + unsigned char reserved_5[0x14]; // 0x47c + unsigned int aes_prev_iv_0; // 0x490 + unsigned char reserved_6[0x0c]; // 0x494 + unsigned int aes_din_dout; // 0x4a0 + unsigned char reserved_7[0x1c]; // 0x4a4 + unsigned int aes_control; // 0x4c0 + unsigned int aes_version; // 0x4c4 + unsigned int aes_hw_flags; // 0x4c8 + unsigned char reserved_8[0x28]; // 0x4cc + unsigned int aes_sw_reset; // 0x4f4 + unsigned char reserved_9[0x08]; // 0x4f8 + unsigned int aes_fifo_data; // 0x500 + unsigned char reserved_10[0xfc]; // 0x504 + unsigned int aes_fifo_status; // 0x600 +}; + +#define AES_BUSY_BIT BIT(0) +#define SW_RESET_BIT BIT(0) +#define AES_SK_BIT BIT(0) + +#define DIN_FIFO_FULL BIT(0) +#define DIN_FIFO_EMPTY BIT(1) +#define DOUT_FIFO_FULL BIT(2) +#define DOUT_FIFO_EMPTY BIT(3) +#define DIN_FIFO_OVERFLOW BIT(4) +#define DOUT_FIFO_UNDERFLOW BIT(5) + +int npcm_aes_select_key(u8 fkeyind); + +#endif diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig index 675081ecd37..12ef84ca05c 100644 --- a/drivers/crypto/Kconfig +++ b/drivers/crypto/Kconfig @@ -6,4 +6,6 @@ source drivers/crypto/fsl/Kconfig source drivers/crypto/aspeed/Kconfig +source drivers/crypto/nuvoton/Kconfig + endmenu diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile index 6b762565a1f..b9105186097 100644 --- a/drivers/crypto/Makefile +++ b/drivers/crypto/Makefile @@ -8,3 +8,4 @@ obj-y += rsa_mod_exp/ obj-y += fsl/ obj-y += hash/ obj-y += aspeed/ +obj-y += nuvoton/ diff --git a/drivers/crypto/nuvoton/Kconfig b/drivers/crypto/nuvoton/Kconfig new file mode 100644 index 00000000000..c4ab0674e5e --- /dev/null +++ b/drivers/crypto/nuvoton/Kconfig @@ -0,0 +1,8 @@ +config NPCM_AES + bool "Support the NPCM AES algorithm" + select NPCM_OTP + help + This provides a means to encrypt and decrypt data using the NPCM + AES (Advanced Encryption Standard). This algorithm uses a symmetric + key and is widely used as a streaming cipher. This command only + supports AES256-CBC. diff --git a/drivers/crypto/nuvoton/Makefile b/drivers/crypto/nuvoton/Makefile new file mode 100644 index 00000000000..5b2fb90314a --- /dev/null +++ b/drivers/crypto/nuvoton/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_NPCM_AES) += npcm_aes.o diff --git a/drivers/crypto/nuvoton/npcm_aes.c b/drivers/crypto/nuvoton/npcm_aes.c new file mode 100644 index 00000000000..6493ea108ec --- /dev/null +++ b/drivers/crypto/nuvoton/npcm_aes.c @@ -0,0 +1,301 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2021 Nuvoton Technology Corp. + */ + +#include +#include +#include +#include +#include +#include +#include + +#define ONE_SECOND 0xC00000 + +struct npcm_aes_priv { + struct npcm_aes_regs *regs; +}; + +static struct npcm_aes_priv *aes_priv; +static u8 fkeyind_to_set = 0xff; + +static int second_timeout(u32 *addr, u32 bitmask, u32 bitpol) +{ + ulong time, i = 0; + + time = get_timer(0); + + /* default 1 second timeout */ + while (((readl(addr) & bitmask) == bitpol) && i < ONE_SECOND) + i++; + + if (i == ONE_SECOND) { + printf("%xms timeout: addr = %x, mask = %x\n", (u32)get_timer(time), + *addr, bitmask); + return -1; + } + + return 0; +} + +int npcm_aes_select_key(u8 fkeyind) +{ + if (npcm_otp_is_fuse_array_disabled(NPCM_KEY_SA)) { + printf("AES key access denied\n"); + return -EACCES; + } + + if (fkeyind < 4) + fkeyind_to_set = fkeyind; + + return 0; +} + +static int npcm_aes_init(u8 dec_enc) +{ + struct npcm_aes_regs *regs = aes_priv->regs; + u32 ctrl, orgctrlval, wrtimeout; + + /* reset hw */ + writel(readl(®s->aes_sw_reset) | SW_RESET_BIT, ®s->aes_sw_reset); + writel(readl(®s->aes_fifo_status) | DIN_FIFO_OVERFLOW, ®s->aes_fifo_status); + writel(readl(®s->aes_fifo_status) | DOUT_FIFO_UNDERFLOW, ®s->aes_fifo_status); + + /* Workaround to over come Errata #648 */ + orgctrlval = readl(®s->aes_control); + ctrl = (0x00002004 | dec_enc); /* AES256(CBC) */ + + if (ctrl != orgctrlval) { + writel(ctrl, ®s->aes_control); + + if (ctrl != readl(®s->aes_control)) { + u32 read_ctrl; + int intwr; + + for (wrtimeout = 0; wrtimeout < 1000; wrtimeout++) { + for (intwr = 0 ; intwr < 10; intwr++) { + writel(ctrl, ®s->aes_control); + writew(ctrl, (u16 *)®s->aes_control + 1); + /* Write configurable info in a single write operation */ + mb(); + } + + read_ctrl = readl(®s->aes_control); + if (ctrl == read_ctrl) + break; + } + + if (wrtimeout == 1000) { + printf("\nTIMEOUT expected data=0x%x Actual AES_CONTROL data 0x%x\n\n", + ctrl, read_ctrl); + return -EAGAIN; + } + + printf("Workaround success, wrtimeout = %d\n", wrtimeout); + } + } + + if (second_timeout(®s->aes_busy, AES_BUSY_BIT, AES_BUSY_BIT)) + return -EAGAIN; + + return 0; +} + +static inline void npcm_aes_load_iv(u8 *iv) +{ + struct npcm_aes_regs *regs = aes_priv->regs; + u32 *p = (u32 *)iv; + u32 i; + + /* Initialization Vector is loaded in 32-bit chunks */ + for (i = 0; i < (SIZE_AES_BLOCK / sizeof(u32)); i++) + writel(p[i], ®s->aes_iv_0 + i); +} + +static inline void npcm_aes_load_key(u8 *key) +{ + struct npcm_aes_regs *regs = aes_priv->regs; + u32 *p = (u32 *)key; + u32 i; + + /* The key can be loaded either via the configuration or by using sideband + * key port (aes_select_key). + * If aes_select_key has been called ('fkeyind_to_set' was set to desired + * key index) and no key is specified (key is NULL), we should use the + * key index. Otherwise, we write the given key to the registers. + */ + if (!key && fkeyind_to_set < 4) { + npcm_otp_select_key(fkeyind_to_set); + + /* Sample the new key */ + writel(readl(®s->aes_sk) | AES_SK_BIT, ®s->aes_sk); + + } else { + /* Initialization Vector is loaded in 32-bit chunks */ + for (i = 0; i < (2 * SIZE_AES_BLOCK / sizeof(u32)); i++) + writel(p[i], ®s->aes_key_0 + i); + + fkeyind_to_set = 0xff; + } +} + +static inline void npcm_aes_write(u32 *in) +{ + struct npcm_aes_regs *regs = aes_priv->regs; + u32 i; + + /* 16 Byte AES Block is written in 32-bit chunks */ + for (i = 0; i < (SIZE_AES_BLOCK / sizeof(u32)); i++) + writel(in[i], ®s->aes_fifo_data); +} + +static inline void npcm_aes_read(u32 *out) +{ + struct npcm_aes_regs *regs = aes_priv->regs; + u32 i; + + /* Data is read in 32-bit chunks */ + for (i = 0; i < (SIZE_AES_BLOCK / sizeof(u32)); i++) + out[i] = readl(®s->aes_fifo_data); +} + +static void npcm_aes_feed(u32 num_aes_blocks, u32 *datain, u32 *dataout) +{ + struct npcm_aes_regs *regs = aes_priv->regs; + u32 aes_datablk; + u32 total_blocks = num_aes_blocks; + u32 blocks_left = num_aes_blocks; + + /* data mode */ + writel(readl(®s->aes_busy) | AES_BUSY_BIT, ®s->aes_busy); + + /* Clear overflow and underflow */ + writel(readl(®s->aes_fifo_status) | DIN_FIFO_OVERFLOW, ®s->aes_fifo_status); + writel(readl(®s->aes_fifo_status) | DOUT_FIFO_UNDERFLOW, ®s->aes_fifo_status); + + /* datain/dataout is advanced in 32-bit chunks */ + aes_datablk = (SIZE_AES_BLOCK / sizeof(u32)); + + /* Quit if there is no complete blocks */ + if (total_blocks == 0) + return; + + /* Write the first block */ + if (total_blocks > 1) { + npcm_aes_write(datain); + datain += aes_datablk; + blocks_left--; + } + + /* Write the second block */ + if (total_blocks > 2) { + second_timeout(®s->aes_fifo_status, DIN_FIFO_EMPTY, 0); + npcm_aes_write(datain); + datain += aes_datablk; + blocks_left--; + } + + /* Write & read available blocks */ + while (blocks_left > 0) { + second_timeout(®s->aes_fifo_status, DIN_FIFO_FULL, DIN_FIFO_FULL); + + /* Write next block */ + npcm_aes_write(datain); + datain += aes_datablk; + + /* Wait till DOUT FIFO is empty */ + second_timeout(®s->aes_fifo_status, DOUT_FIFO_EMPTY, DOUT_FIFO_EMPTY); + + /* Read next block */ + npcm_aes_read(dataout); + dataout += aes_datablk; + + blocks_left--; + } + + if (total_blocks > 2) { + second_timeout(®s->aes_fifo_status, DOUT_FIFO_FULL, 0); + + /* Read next block */ + npcm_aes_read(dataout); + dataout += aes_datablk; + + second_timeout(®s->aes_fifo_status, DOUT_FIFO_FULL, 0); + + /* Read next block */ + npcm_aes_read(dataout); + dataout += aes_datablk; + } else if (total_blocks > 1) { + second_timeout(®s->aes_fifo_status, DOUT_FIFO_FULL, 0); + + /* Read next block */ + npcm_aes_read(dataout); + dataout += aes_datablk; + } +} + +void aes_expand_key(u8 *key, u32 key_size, u8 *expkey) +{ + /* npcm hw expands the key automatically, just copy it */ + memcpy(expkey, key, SIZE_AES_BLOCK * 2); +} + +void aes_cbc_encrypt_blocks(u32 key_size, u8 *key_exp, u8 *iv, u8 *src, u8 *dst, + u32 num_aes_blocks) +{ + if (npcm_aes_init(AES_OP_ENCRYPT)) + return; + + npcm_aes_load_iv(iv); + + npcm_aes_load_key(key_exp); + + npcm_aes_feed(num_aes_blocks, (u32 *)src, (u32 *)dst); +} + +void aes_cbc_decrypt_blocks(u32 key_size, u8 *key_exp, u8 *iv, u8 *src, u8 *dst, + u32 num_aes_blocks) +{ + if (npcm_aes_init(AES_OP_DECRYPT)) + return; + + npcm_aes_load_iv(iv); + + npcm_aes_load_key(key_exp); + + npcm_aes_feed(num_aes_blocks, (u32 *)src, (u32 *)dst); +} + +static int npcm_aes_bind(struct udevice *dev) +{ + aes_priv = calloc(1, sizeof(struct npcm_aes_priv)); + if (!aes_priv) { + printf("%s: %d\n", __func__, __LINE__); + return -ENOMEM; + } + + aes_priv->regs = dev_read_addr_ptr(dev); + if (!aes_priv->regs) { + printf("Cannot find aes reg address, binding failed\n"); + return -EINVAL; + } + + printf("AES: NPCM AES module bind OK\n"); + + return 0; +} + +static const struct udevice_id npcm_aes_ids[] = { + { .compatible = "nuvoton,npcm845-aes" }, + { .compatible = "nuvoton,npcm750-aes" }, + { } +}; + +U_BOOT_DRIVER(npcm_aes) = { + .name = "npcm_aes", + .id = UCLASS_MISC, + .of_match = npcm_aes_ids, + .priv_auto = sizeof(struct npcm_aes_priv), + .bind = npcm_aes_bind, +}; -- GitLab From 2eeb4ee97ef8ebf92f4097ddba0dfc9654370196 Mon Sep 17 00:00:00 2001 From: Jim Liu Date: Tue, 7 Jun 2022 16:32:09 +0800 Subject: [PATCH 235/581] crypto: nuvoton: Add NPCM7xx SHA driver add nuvoton BMC npcm750 SHA driver Signed-off-by: Jim Liu --- drivers/crypto/nuvoton/Kconfig | 6 + drivers/crypto/nuvoton/Makefile | 1 + drivers/crypto/nuvoton/npcm_sha.c | 897 ++++++++++++++++++++++++++++++ 3 files changed, 904 insertions(+) create mode 100644 drivers/crypto/nuvoton/npcm_sha.c diff --git a/drivers/crypto/nuvoton/Kconfig b/drivers/crypto/nuvoton/Kconfig index c4ab0674e5e..034fcadfcc8 100644 --- a/drivers/crypto/nuvoton/Kconfig +++ b/drivers/crypto/nuvoton/Kconfig @@ -6,3 +6,9 @@ config NPCM_AES AES (Advanced Encryption Standard). This algorithm uses a symmetric key and is widely used as a streaming cipher. This command only supports AES256-CBC. + +config NPCM_SHA + bool "Enable NPCM cryptographic HW SHA accelerator" + help + This option enables support of NPCM cryptographic HW SHA accelerator. + It supports SHA1 and SHA256 hashing algorithms. diff --git a/drivers/crypto/nuvoton/Makefile b/drivers/crypto/nuvoton/Makefile index 5b2fb90314a..5a1173dfe73 100644 --- a/drivers/crypto/nuvoton/Makefile +++ b/drivers/crypto/nuvoton/Makefile @@ -1 +1,2 @@ obj-$(CONFIG_NPCM_AES) += npcm_aes.o +obj-$(CONFIG_NPCM_SHA) += npcm_sha.o diff --git a/drivers/crypto/nuvoton/npcm_sha.c b/drivers/crypto/nuvoton/npcm_sha.c new file mode 100644 index 00000000000..7ebdfa16f4f --- /dev/null +++ b/drivers/crypto/nuvoton/npcm_sha.c @@ -0,0 +1,897 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2022 Nuvoton Technology Corp. + */ + +#include +#include +#include +#include +#include +#include + +#define HASH_DIG_H_NUM 8 + +#define HASH_CTR_STS_SHA_EN BIT(0) +#define HASH_CTR_STS_SHA_BUSY BIT(1) +#define HASH_CTR_STS_SHA_RST BIT(2) +#define HASH_CFG_SHA1_SHA2 BIT(0) + +/* SHA type */ +enum npcm_sha_type { + npcm_sha_type_sha2 = 0, + npcm_sha_type_sha1, + npcm_sha_type_num +}; + +struct npcm_sha_regs { + unsigned int hash_data_in; + unsigned char hash_ctr_sts; + unsigned char reserved_0[0x03]; + unsigned char hash_cfg; + unsigned char reserved_1[0x03]; + unsigned char hash_ver; + unsigned char reserved_2[0x13]; + unsigned int hash_dig[HASH_DIG_H_NUM]; +}; + +struct npcm_sha_priv { + struct npcm_sha_regs *regs; +}; + +static struct npcm_sha_priv *sha_priv; + +#ifdef SHA_DEBUG_MODULE +#define sha_print(fmt, args...) printf(fmt, ##args) +#else +#define sha_print(fmt, args...) (void)0 +#endif + +#define SHA_BLOCK_LENGTH (512 / 8) +#define SHA_2_HASH_LENGTH (256 / 8) +#define SHA_1_HASH_LENGTH (160 / 8) +#define SHA_HASH_LENGTH(type) ((type == npcm_sha_type_sha2) ? \ + (SHA_2_HASH_LENGTH) : (SHA_1_HASH_LENGTH)) + +#define SHA_SECRUN_BUFF_SIZE 64 +#define SHA_TIMEOUT 100 +#define SHA_DATA_LAST_BYTE 0x80 + +#define SHA2_NUM_OF_SELF_TESTS 3 +#define SHA1_NUM_OF_SELF_TESTS 4 + +#define NUVOTON_ALIGNMENT 4 + +/*-----------------------------------------------------------------------------*/ +/* SHA instance struct handler */ +/*-----------------------------------------------------------------------------*/ +struct SHA_HANDLE_T { + u32 hv[SHA_2_HASH_LENGTH / sizeof(u32)]; + u32 length0; + u32 length1; + u32 block[SHA_BLOCK_LENGTH / sizeof(u32)]; + u8 type; + bool active; +}; + +// The # of bytes currently in the sha block buffer +#define SHA_BUFF_POS(length) ((length) & (SHA_BLOCK_LENGTH - 1)) + +// The # of free bytes in the sha block buffer +#define SHA_BUFF_FREE(length) (SHA_BLOCK_LENGTH - SHA_BUFF_POS(length)) + +static void SHA_FlushLocalBuffer_l(const u32 *buff); +static int SHA_BusyWait_l(void); +static void SHA_GetShaDigest_l(u8 *hashdigest, u8 type); +static void SHA_SetShaDigest_l(const u32 *hashdigest, u8 type); +static void SHA_SetBlock_l(const u8 *data, u32 len, u16 position, u32 *block); +static void SHA_ClearBlock_l(u16 len, u16 position, u32 *block); +static void SHA_SetLength32_l(struct SHA_HANDLE_T *handleptr, u32 *block); + +static int SHA_Init(struct SHA_HANDLE_T *handleptr); +static int SHA_Start(struct SHA_HANDLE_T *handleptr, u8 type); +static int SHA_Update(struct SHA_HANDLE_T *handleptr, const u8 *buffer, u32 len); +static int SHA_Finish(struct SHA_HANDLE_T *handleptr, u8 *hashdigest); +static int SHA_Reset(void); +static int SHA_Power(bool on); +#ifdef SHA_PRINT +static void SHA_PrintRegs(void); +static void SHA_PrintVersion(void); +#endif + +static struct SHA_HANDLE_T sha_handle; + +/*----------------------------------------------------------------------------*/ +/* Checks if give function returns int error, and returns the error */ +/* immediately after SHA disabling */ +/*----------------------------------------------------------------------------*/ +int npcm_sha_check(int status) +{ + if (status != 0) { + SHA_Power(false); + return status; + } + return 0; +} + +/*----------------------------------------------------------------------------*/ +/* Function: npcm_sha_calc */ +/* */ +/* Parameters: type - SHA module type */ +/* inBuff - Pointer to a buffer containing the data to */ +/* be hashed */ +/* len - Length of the data to hash */ +/* hashDigest - Pointer to a buffer where the reseulting */ +/* digest will be copied to */ +/* */ +/* Returns: 0 on success or other int error code on error */ +/* Side effects: */ +/* Description: */ +/* This routine performs complete SHA calculation in one */ +/* step */ +/*----------------------------------------------------------------------------*/ +int npcm_sha_calc(u8 type, const u8 *inbuff, u32 len, u8 *hashdigest) +{ + int status; + struct SHA_HANDLE_T handle; + + SHA_Init(&handle); + SHA_Power(true); + SHA_Reset(); + SHA_Start(&handle, type); + status = SHA_Update(&handle, inbuff, len); + npcm_sha_check(status); + status = SHA_Finish(&handle, hashdigest); + npcm_sha_check(status); + SHA_Power(false); + + return 0; +} + +/* + * Computes hash value of input pbuf using h/w acceleration + * + * @param in_addr A pointer to the input buffer + * @param bufleni Byte length of input buffer + * @param out_addr A pointer to the output buffer. When complete + * 32 bytes are copied to pout[0]...pout[31]. Thus, a user + * should allocate at least 32 bytes at pOut in advance. + * @param chunk_size chunk size for sha256 + */ +void hw_sha256(const uchar *in_addr, uint buflen, uchar *out_addr, uint chunk_size) +{ + puts("\nhw_sha256 using BMC HW accelerator\t"); + npcm_sha_calc(npcm_sha_type_sha2, (u8 *)in_addr, buflen, (u8 *)out_addr); +} + +/* + * Computes hash value of input pbuf using h/w acceleration + * + * @param in_addr A pointer to the input buffer + * @param bufleni Byte length of input buffer + * @param out_addr A pointer to the output buffer. When complete + * 32 bytes are copied to pout[0]...pout[31]. Thus, a user + * should allocate at least 32 bytes at pOut in advance. + * @param chunk_size chunk_size for sha1 + */ +void hw_sha1(const uchar *in_addr, uint buflen, uchar *out_addr, uint chunk_size) +{ + puts("\nhw_sha1 using BMC HW accelerator\t"); + npcm_sha_calc(npcm_sha_type_sha1, (u8 *)in_addr, buflen, (u8 *)out_addr); +} + +/* + * Create the context for sha progressive hashing using h/w acceleration + * + * @algo: Pointer to the hash_algo struct + * @ctxp: Pointer to the pointer of the context for hashing + * @return 0 if ok, -ve on error + */ +int hw_sha_init(struct hash_algo *algo, void **ctxp) +{ + const char *algo_name1 = "sha1"; + const char *algo_name2 = "sha256"; + + SHA_Init(&sha_handle); + SHA_Power(true); + SHA_Reset(); + if (!strcmp(algo_name1, algo->name)) + return SHA_Start(&sha_handle, npcm_sha_type_sha1); + else if (!strcmp(algo_name2, algo->name)) + return SHA_Start(&sha_handle, npcm_sha_type_sha2); + else + return -EPROTO; +} + +/* + * Update buffer for sha progressive hashing using h/w acceleration + * + * The context is freed by this function if an error occurs. + * + * @algo: Pointer to the hash_algo struct + * @ctx: Pointer to the context for hashing + * @buf: Pointer to the buffer being hashed + * @size: Size of the buffer being hashed + * @is_last: 1 if this is the last update; 0 otherwise + * @return 0 if ok, -ve on error + */ +int hw_sha_update(struct hash_algo *algo, void *ctx, const void *buf, + unsigned int size, int is_last) +{ + return SHA_Update(&sha_handle, buf, size); +} + +/* + * Copy sha hash result at destination location + * + * The context is freed after completion of hash operation or after an error. + * + * @algo: Pointer to the hash_algo struct + * @ctx: Pointer to the context for hashing + * @dest_buf: Pointer to the destination buffer where hash is to be copied + * @size: Size of the buffer being hashed + * @return 0 if ok, -ve on error + */ +int hw_sha_finish(struct hash_algo *algo, void *ctx, void *dest_buf, int size) +{ + int status; + + status = SHA_Finish(&sha_handle, dest_buf); + npcm_sha_check(status); + return SHA_Power(false); +} + +/*----------------------------------------------------------------------------*/ +/* Function: SHA_Init */ +/* */ +/* Parameters: handlePtr - SHA processing handle pointer */ +/* Returns: 0 on success or other int error code on error. */ +/* Side effects: */ +/* Description: */ +/* This routine initialize the SHA module */ +/*----------------------------------------------------------------------------*/ +static int SHA_Init(struct SHA_HANDLE_T *handleptr) +{ + handleptr->active = false; + + return 0; +} + +/*----------------------------------------------------------------------------*/ +/* Function: SHA_Start */ +/* */ +/* Parameters: handlePtr - SHA processing handle pointer */ +/* type - SHA module type */ +/* */ +/* Returns: 0 on success or other int error code on error. */ +/* Side effects: */ +/* Description: */ +/* This routine start a single SHA process */ +/*----------------------------------------------------------------------------*/ +static int SHA_Start(struct SHA_HANDLE_T *handleptr, u8 type) +{ + struct npcm_sha_regs *regs = sha_priv->regs; + + // Initialize handle + handleptr->length0 = 0; + handleptr->length1 = 0; + handleptr->type = type; + handleptr->active = true; + + // Set SHA type + writeb(handleptr->type & HASH_CFG_SHA1_SHA2, ®s->hash_cfg); + + // Reset SHA hardware + SHA_Reset(); + + /* The handlePtr->hv is initialized with the correct IV as the SHA engine + * automatically fill the HASH_DIG_Hn registers according to SHA spec + * (following SHA_RST assertion) + */ + SHA_GetShaDigest_l((u8 *)handleptr->hv, type); + + // Init block with zeros + memset(handleptr->block, 0, sizeof(handleptr->block)); + + return 0; +} + +/*----------------------------------------------------------------------------*/ +/* Function: SHA_Update */ +/* */ +/* Parameters: handlePtr - SHA processing handle pointer */ +/* buffer - Pointer to the data that will be added to */ +/* the hash calculation */ +/* len - Length of data to add to SHA calculation */ +/* */ +/* */ +/* Returns: 0 on success or other int error code on error */ +/* Side effects: */ +/* Description: */ +/* This routine adds data to previously started SHA */ +/* calculation */ +/*----------------------------------------------------------------------------*/ +static int SHA_Update(struct SHA_HANDLE_T *handleptr, const u8 *buffer, u32 len) +{ + struct npcm_sha_regs *regs = sha_priv->regs; + u32 localbuffer[SHA_SECRUN_BUFF_SIZE / sizeof(u32)]; + u32 bufferlen = len; + u16 pos = 0; + u8 *blockptr; + int status; + + // Error check + if (!handleptr->active) + return -EPROTO; + + // Wait till SHA is not busy + status = SHA_BusyWait_l(); + npcm_sha_check(status); + + // Set SHA type + writeb(handleptr->type & HASH_CFG_SHA1_SHA2, ®s->hash_cfg); + + // Write SHA latest digest into SHA module + SHA_SetShaDigest_l(handleptr->hv, handleptr->type); + + // Set number of unhashed bytes which remained from last update + pos = SHA_BUFF_POS(handleptr->length0); + + // Copy unhashed bytes which remained from last update to secrun buffer + SHA_SetBlock_l((u8 *)handleptr->block, pos, 0, localbuffer); + + while (len) { + // Wait for the hardware to be available (in case we are hashing) + status = SHA_BusyWait_l(); + npcm_sha_check(status); + + // Move as much bytes as we can into the secrun buffer + bufferlen = min(len, SHA_BUFF_FREE(handleptr->length0)); + + // Copy current given buffer to the secrun buffer + SHA_SetBlock_l((u8 *)buffer, bufferlen, pos, localbuffer); + + // Update size of hashed bytes + handleptr->length0 += bufferlen; + + if (handleptr->length0 < bufferlen) + handleptr->length1++; + + // Update length of data left to digest + len -= bufferlen; + + // Update given buffer pointer + buffer += bufferlen; + + // If secrun buffer is full + if (SHA_BUFF_POS(handleptr->length0) == 0) { + /* We just filled up the buffer perfectly, so let it hash (we'll + * unload the hash only when we are done with all hashing) + */ + SHA_FlushLocalBuffer_l(localbuffer); + + pos = 0; + bufferlen = 0; + } + } + + // Wait till SHA is not busy + status = SHA_BusyWait_l(); + npcm_sha_check(status); + + /* Copy unhashed bytes from given buffer to handle block for next update/finish */ + blockptr = (u8 *)handleptr->block; + while (bufferlen) + blockptr[--bufferlen + pos] = *(--buffer); + + // Save SHA current digest + SHA_GetShaDigest_l((u8 *)handleptr->hv, handleptr->type); + + return 0; +} + +/*----------------------------------------------------------------------------*/ +/* Function: SHA_Finish */ +/* */ +/* Parameters: handlePtr - SHA processing handle pointer */ +/* hashDigest - Pointer to a buffer where the final digest */ +/* will be copied to */ +/* */ +/* Returns: 0 on success or other int error code on error */ +/* Side effects: */ +/* Description: */ +/* This routine finish SHA calculation and get */ +/* the resulting SHA digest */ +/*----------------------------------------------------------------------------*/ +static int SHA_Finish(struct SHA_HANDLE_T *handleptr, u8 *hashdigest) +{ + struct npcm_sha_regs *regs = sha_priv->regs; + u32 localbuffer[SHA_SECRUN_BUFF_SIZE / sizeof(u32)]; + const u8 lastbyte = SHA_DATA_LAST_BYTE; + u16 pos; + int status; + + // Error check + if (!handleptr->active) + return -EPROTO; + + // Set SHA type + writeb(handleptr->type & HASH_CFG_SHA1_SHA2, ®s->hash_cfg); + + // Wait till SHA is not busy + status = SHA_BusyWait_l(); + npcm_sha_check(status); + + // Finish off the current buffer with the SHA spec'ed padding + pos = SHA_BUFF_POS(handleptr->length0); + + // Init SHA digest + SHA_SetShaDigest_l(handleptr->hv, handleptr->type); + + // Load data into secrun buffer + SHA_SetBlock_l((u8 *)handleptr->block, pos, 0, localbuffer); + + // Set data last byte as in SHA algorithm spec + SHA_SetBlock_l(&lastbyte, 1, pos++, localbuffer); + + // If the remainder of data is longer then one block + if (pos > (SHA_BLOCK_LENGTH - 8)) { + /* The length will be in the next block Pad the rest of the last block with 0's */ + SHA_ClearBlock_l((SHA_BLOCK_LENGTH - pos), pos, localbuffer); + + // Hash the current block + SHA_FlushLocalBuffer_l(localbuffer); + + pos = 0; + + // Wait till SHA is not busy + status = SHA_BusyWait_l(); + npcm_sha_check(status); + } + + // Pad the rest of the last block with 0's except for the last 8-3 bytes + SHA_ClearBlock_l((SHA_BLOCK_LENGTH - (8 - 3)) - pos, pos, localbuffer); + + /* The last 8-3 bytes are set to the bit-length of the message in big-endian form */ + SHA_SetLength32_l(handleptr, localbuffer); + + // Hash all that, and save the hash for the caller + SHA_FlushLocalBuffer_l(localbuffer); + + // Wait till SHA is not busy + status = SHA_BusyWait_l(); + npcm_sha_check(status); + + // Save SHA final digest into given buffer + SHA_GetShaDigest_l(hashdigest, handleptr->type); + + // Free handle + handleptr->active = false; + + return 0; +} + +/*----------------------------------------------------------------------------*/ +/* Function: SHA_Reset */ +/* */ +/* Parameters: none */ +/* Returns: none */ +/* Side effects: */ +/* Description: */ +/* This routine reset SHA module */ +/*----------------------------------------------------------------------------*/ +static int SHA_Reset(void) +{ + struct npcm_sha_regs *regs = sha_priv->regs; + + writel(readl(®s->hash_ctr_sts) | HASH_CTR_STS_SHA_RST, ®s->hash_ctr_sts); + + return 0; +} + +/*----------------------------------------------------------------------------*/ +/* Function: SHA_Power */ +/* */ +/* Parameters: on - true enable the module, false disable the module */ +/* Returns: none */ +/* Side effects: */ +/* Description: */ +/* This routine set SHA module power on/off */ +/*----------------------------------------------------------------------------*/ +static int SHA_Power(bool on) +{ + struct npcm_sha_regs *regs = sha_priv->regs; + u8 hash_sts; + + hash_sts = readb(®s->hash_ctr_sts) & ~HASH_CTR_STS_SHA_EN; + writeb(hash_sts | (on & HASH_CTR_STS_SHA_EN), ®s->hash_ctr_sts); + + return 0; +} + +#ifdef SHA_PRINT +/*----------------------------------------------------------------------------*/ +/* Function: SHA_PrintRegs */ +/* */ +/* Parameters: none */ +/* Returns: none */ +/* Side effects: */ +/* Description: */ +/* This routine prints the module registers */ +/*----------------------------------------------------------------------------*/ +static void SHA_PrintRegs(void) +{ +#ifdef SHA_DEBUG_MODULE + struct npcm_sha_regs *regs = sha_priv->regs; +#endif + unsigned int i; + + sha_print("/*--------------*/\n"); + sha_print("/* SHA */\n"); + sha_print("/*--------------*/\n\n"); + + sha_print("HASH_CTR_STS = 0x%02X\n", readb(®s->hash_ctr_sts)); + sha_print("HASH_CFG = 0x%02X\n", readb(®s->hash_cfg)); + + for (i = 0; i < HASH_DIG_H_NUM; i++) + sha_print("HASH_DIG_H%d = 0x%08X\n", i, readl(®s->hash_dig[i])); + + sha_print("HASH_VER = 0x%08X\n", readb(®s->hash_ver)); + + sha_print("\n"); +} + +/*----------------------------------------------------------------------------*/ +/* Function: SHA_PrintVersion */ +/* */ +/* Parameters: none */ +/* Returns: none */ +/* Side effects: */ +/* Description: */ +/* This routine prints the module version */ +/*----------------------------------------------------------------------------*/ +static void SHA_PrintVersion(void) +{ + struct npcm_sha_regs *regs = sha_priv->regs; + + printf("SHA MODULE VER = %d\n", readb(®s->hash_ver)); +} +#endif + +/*----------------------------------------------------------------------------*/ +/* Function: npcm_sha_selftest */ +/* */ +/* Parameters: type - SHA module type */ +/* Returns: 0 on success or other int error code on error */ +/* Side effects: */ +/* Description: */ +/* This routine performs various tests on the SHA HW and SW */ +/*----------------------------------------------------------------------------*/ +int npcm_sha_selftest(u8 type) +{ + int status; + struct SHA_HANDLE_T handle; + u8 hashdigest[max(SHA_1_HASH_LENGTH, SHA_2_HASH_LENGTH)]; + u16 i, j; + + /*------------------------------------------------------------------------*/ + /* SHA1 tests info */ + /*------------------------------------------------------------------------*/ + + static const u8 sha1selftestbuff[SHA1_NUM_OF_SELF_TESTS][94] = { + {"abc"}, + {"abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq"}, + {"0123456789012345678901234567890123456789012345678901234567890123"}, + {0x30, 0x5c, 0x30, 0x2c, 0x02, 0x01, 0x00, 0x30, 0x09, 0x06, 0x05, 0x2b, + 0x0e, 0x03, 0x02, 0x1a, 0x05, 0x00, 0x30, 0x06, 0x06, 0x04, 0x67, 0x2a, + 0x01, 0x0c, 0x04, 0x14, 0xe1, 0xb6, 0x93, 0xfe, 0x33, 0x43, 0xc1, 0x20, + 0x5d, 0x4b, 0xaa, 0xb8, 0x63, 0xfb, 0xcf, 0x6c, 0x46, 0x1e, 0x88, 0x04, + 0x30, 0x2c, 0x02, 0x01, 0x00, 0x30, 0x09, 0x06, 0x05, 0x2b, 0x0e, 0x03, + 0x02, 0x1a, 0x05, 0x00, 0x30, 0x06, 0x06, 0x04, 0x67, 0x2a, 0x01, 0x0c, + 0x04, 0x14, 0x13, 0xc1, 0x0c, 0xfc, 0xc8, 0x92, 0xd7, 0xde, 0x07, 0x1c, + 0x40, 0xde, 0x4f, 0xcd, 0x07, 0x5b, 0x68, 0x20, 0x5a, 0x6c} + }; + + static const u8 sha1selftestbufflen[SHA1_NUM_OF_SELF_TESTS] = { + 3, 56, 64, 94 + }; + + static const u8 sha1selftestexpres[SHA1_NUM_OF_SELF_TESTS][SHA_1_HASH_LENGTH] = { + {0xA9, 0x99, 0x3E, 0x36, + 0x47, 0x06, 0x81, 0x6A, + 0xBA, 0x3E, 0x25, 0x71, + 0x78, 0x50, 0xC2, 0x6C, + 0x9C, 0xD0, 0xD8, 0x9D}, + {0x84, 0x98, 0x3E, 0x44, + 0x1C, 0x3B, 0xD2, 0x6E, + 0xBA, 0xAE, 0x4A, 0xA1, + 0xF9, 0x51, 0x29, 0xE5, + 0xE5, 0x46, 0x70, 0xF1}, + {0xCF, 0x08, 0x00, 0xF7, + 0x64, 0x4A, 0xCE, 0x3C, + 0xB4, 0xC3, 0xFA, 0x33, + 0x38, 0x8D, 0x3B, 0xA0, + 0xEA, 0x3C, 0x8B, 0x6E}, + {0xc9, 0x84, 0x45, 0xc8, + 0x64, 0x04, 0xb1, 0xe3, + 0x3c, 0x6b, 0x0a, 0x8c, + 0x8b, 0x80, 0x94, 0xfc, + 0xf3, 0xc9, 0x98, 0xab} + }; + + /*------------------------------------------------------------------------*/ + /* SHA2 tests info */ + /*------------------------------------------------------------------------*/ + + static const u8 sha2selftestbuff[SHA2_NUM_OF_SELF_TESTS][100] = { + { "abc" }, + { "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq" }, + {'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', + 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', + 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', + 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', + 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', + 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', + 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', + 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', + 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', + 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a', 'a'} + }; + + static const u8 sha2selftestbufflen[SHA2_NUM_OF_SELF_TESTS] = { + 3, 56, 100 + }; + + static const u8 sha2selftestexpres[SHA2_NUM_OF_SELF_TESTS][SHA_2_HASH_LENGTH] = { + /* + * SHA-256 test vectors + */ + { 0xBA, 0x78, 0x16, 0xBF, 0x8F, 0x01, 0xCF, 0xEA, + 0x41, 0x41, 0x40, 0xDE, 0x5D, 0xAE, 0x22, 0x23, + 0xB0, 0x03, 0x61, 0xA3, 0x96, 0x17, 0x7A, 0x9C, + 0xB4, 0x10, 0xFF, 0x61, 0xF2, 0x00, 0x15, 0xAD }, + { 0x24, 0x8D, 0x6A, 0x61, 0xD2, 0x06, 0x38, 0xB8, + 0xE5, 0xC0, 0x26, 0x93, 0x0C, 0x3E, 0x60, 0x39, + 0xA3, 0x3C, 0xE4, 0x59, 0x64, 0xFF, 0x21, 0x67, + 0xF6, 0xEC, 0xED, 0xD4, 0x19, 0xDB, 0x06, 0xC1 }, + { 0xCD, 0xC7, 0x6E, 0x5C, 0x99, 0x14, 0xFB, 0x92, + 0x81, 0xA1, 0xC7, 0xE2, 0x84, 0xD7, 0x3E, 0x67, + 0xF1, 0x80, 0x9A, 0x48, 0xA4, 0x97, 0x20, 0x0E, + 0x04, 0x6D, 0x39, 0xCC, 0xC7, 0x11, 0x2C, 0xD0 }, + }; + + if (type == npcm_sha_type_sha1) { + /*--------------------------------------------------------------------*/ + /* SHA 1 TESTS */ + /*--------------------------------------------------------------------*/ + for (i = 0; i < SHA1_NUM_OF_SELF_TESTS; i++) { + if (i != 3) { + status = npcm_sha_calc(npcm_sha_type_sha1, sha1selftestbuff[i], sha1selftestbufflen[i], hashdigest); + npcm_sha_check(status); + } else { + SHA_Power(true); + SHA_Reset(); + status = SHA_Start(&handle, npcm_sha_type_sha1); + npcm_sha_check(status); + status = SHA_Update(&handle, sha1selftestbuff[i], 73); + npcm_sha_check(status); + status = SHA_Update(&handle, &sha1selftestbuff[i][73], sha1selftestbufflen[i] - 73); + npcm_sha_check(status); + status = SHA_Finish(&handle, hashdigest); + npcm_sha_check(status); + SHA_Power(false); + } + + if (memcmp(hashdigest, sha1selftestexpres[i], SHA_1_HASH_LENGTH)) + return -1; + } + + } else { + /*--------------------------------------------------------------------*/ + /* SHA 2 TESTS */ + /*--------------------------------------------------------------------*/ + for (i = 0; i < SHA2_NUM_OF_SELF_TESTS; i++) { + SHA_Power(true); + SHA_Reset(); + status = SHA_Start(&handle, npcm_sha_type_sha2); + npcm_sha_check(status); + if (i == 2) { + for (j = 0; j < 10000; j++) { //not working + status = SHA_Update(&handle, sha2selftestbuff[i], sha2selftestbufflen[i]); + npcm_sha_check(status); + } + } else { + status = SHA_Update(&handle, sha2selftestbuff[i], sha2selftestbufflen[i]); + npcm_sha_check(status); + } + + status = SHA_Finish(&handle, hashdigest); + npcm_sha_check(status); + SHA_Power(false); + if (memcmp(hashdigest, sha2selftestexpres[i], SHA_2_HASH_LENGTH)) + return -1; + + npcm_sha_calc(npcm_sha_type_sha2, sha2selftestbuff[i], sha2selftestbufflen[i], hashdigest); + if (memcmp(hashdigest, sha2selftestexpres[i], SHA_2_HASH_LENGTH)) + return -1; + } + } + + return 0; +} + +/*----------------------------------------------------------------------------*/ +/* Function: SHA_FlushLocalBuffer_l */ +/* */ +/* Parameters: */ +/* Returns: none */ +/* Side effects: */ +/* Description: This routine flush secrun buffer to SHA module */ +/*----------------------------------------------------------------------------*/ +static void SHA_FlushLocalBuffer_l(const u32 *buff) +{ + struct npcm_sha_regs *regs = sha_priv->regs; + u32 i; + + for (i = 0; i < (SHA_BLOCK_LENGTH / sizeof(u32)); i++) + writel(buff[i], ®s->hash_data_in); +} + +/*----------------------------------------------------------------------------*/ +/* Function: SHA_BusyWait_l */ +/* */ +/* Parameters: */ +/* Returns: 0 if no error was found or DEFS_STATUS_ERROR otherwise */ +/* Side effects: */ +/* Description: This routine wait for SHA unit to no longer be busy */ +/*----------------------------------------------------------------------------*/ +static int SHA_BusyWait_l(void) +{ + struct npcm_sha_regs *regs = sha_priv->regs; + u32 timeout = SHA_TIMEOUT; + + do { + if (timeout-- == 0) + return -ETIMEDOUT; + } while ((readb(®s->hash_ctr_sts) & HASH_CTR_STS_SHA_BUSY) + == HASH_CTR_STS_SHA_BUSY); + + return 0; +} + +/*----------------------------------------------------------------------------*/ +/* Function: SHA_GetShaDigest_l */ +/* */ +/* Parameters: hashDigest - buffer for the hash output. */ +/* type - SHA module type */ +/* Returns: none */ +/* Side effects: */ +/* Description: This routine copy the hash digest from the hardware */ +/* and into given buffer (in ram) */ +/*----------------------------------------------------------------------------*/ +static void SHA_GetShaDigest_l(u8 *hashdigest, u8 type) +{ + struct npcm_sha_regs *regs = sha_priv->regs; + u16 j; + u8 len = SHA_HASH_LENGTH(type) / sizeof(u32); + + // Copy Bytes from SHA module to given buffer + for (j = 0; j < len; j++) + ((u32 *)hashdigest)[j] = readl(®s->hash_dig[j]); +} + +/*----------------------------------------------------------------------------*/ +/* Function: SHA_SetShaDigest_l */ +/* */ +/* Parameters: hashDigest - input buffer to set as hash digest */ +/* type - SHA module type */ +/* Returns: none */ +/* Side effects: */ +/* Description: This routine set the hash digest in the hardware from */ +/* a given buffer (in ram) */ +/*----------------------------------------------------------------------------*/ +static void SHA_SetShaDigest_l(const u32 *hashdigest, u8 type) +{ + struct npcm_sha_regs *regs = sha_priv->regs; + u16 j; + u8 len = SHA_HASH_LENGTH(type) / sizeof(u32); + + // Copy Bytes from given buffer to SHA module + for (j = 0; j < len; j++) + writel(hashdigest[j], ®s->hash_dig[j]); +} + +/*----------------------------------------------------------------------------*/ +/* Function: SHA_SetBlock_l */ +/* */ +/* Parameters: data - data to copy */ +/* len - size of data */ +/* position - byte offset into the block at which data */ +/* should be placed */ +/* block - block buffer */ +/* Returns: none */ +/* Side effects: */ +/* Description: This routine load bytes into block buffer */ +/*----------------------------------------------------------------------------*/ +static void SHA_SetBlock_l(const u8 *data, u32 len, u16 position, u32 *block) +{ + u8 *dest = (u8 *)block; + + memcpy(dest + position, data, len); +} + +/*----------------------------------------------------------------------------*/ +/* Function: SHA_SetBlock_l */ +/* */ +/* Parameters: */ +/* len - size of data */ +/* position - byte offset into the block at which data */ +/* should be placed */ +/* block - block buffer */ +/* Returns: none */ +/* Side effects: */ +/* Description: This routine load zero's into the block buffer */ +/*----------------------------------------------------------------------------*/ +static void SHA_ClearBlock_l(u16 len, u16 position, u32 *block) +{ + u8 *dest = (u8 *)block; + + memset(dest + position, 0, len); +} + +/*----------------------------------------------------------------------------*/ +/* Function: SHA_SetLength32_l */ +/* */ +/* Parameters: */ +/* handlePtr - SHA processing handle pointer */ +/* block - block buffer */ +/* Returns: none */ +/* Side effects: */ +/* Description: This routine set the length of the hash's data */ +/* len is the 32-bit byte length of the message */ +/*lint -efunc(734,SHA_SetLength32_l) Supperess loss of percision lint warning */ +/*----------------------------------------------------------------------------*/ +static void SHA_SetLength32_l(struct SHA_HANDLE_T *handleptr, u32 *block) +{ + u16 *secrunbufferswappedptr = (u16 *)(void *)(block); + + secrunbufferswappedptr[(SHA_BLOCK_LENGTH / sizeof(u16)) - 1] = (u16) + ((handleptr->length0 << 3) << 8) | ((u16)(handleptr->length0 << 3) >> 8); + secrunbufferswappedptr[(SHA_BLOCK_LENGTH / sizeof(u16)) - 2] = (u16) + ((handleptr->length0 >> (16 - 3)) >> 8) | ((u16)(handleptr->length0 >> (16 - 3)) << 8); + secrunbufferswappedptr[(SHA_BLOCK_LENGTH / sizeof(u16)) - 3] = (u16) + ((handleptr->length1 << 3) << 8) | ((u16)(handleptr->length1 << 3) >> 8); + secrunbufferswappedptr[(SHA_BLOCK_LENGTH / sizeof(u16)) - 4] = (u16) + ((handleptr->length1 >> (16 - 3)) >> 8) | ((u16)(handleptr->length1 >> (16 - 3)) << 8); +} + +static int npcm_sha_bind(struct udevice *dev) +{ + sha_priv = calloc(1, sizeof(struct npcm_sha_priv)); + if (!sha_priv) + return -ENOMEM; + + sha_priv->regs = dev_remap_addr_index(dev, 0); + if (!sha_priv->regs) { + printf("Cannot find sha reg address, binding failed\n"); + return -EINVAL; + } + + printf("SHA: NPCM SHA module bind OK\n"); + + return 0; +} + +static const struct udevice_id npcm_sha_ids[] = { + { .compatible = "nuvoton,npcm845-sha" }, + { .compatible = "nuvoton,npcm750-sha" }, + { } +}; + +U_BOOT_DRIVER(npcm_sha) = { + .name = "npcm_sha", + .id = UCLASS_MISC, + .of_match = npcm_sha_ids, + .priv_auto = sizeof(struct npcm_sha_priv), + .bind = npcm_sha_bind, +}; -- GitLab From 0ae1c77199a6ae0b5bf759f894736898d62d46b0 Mon Sep 17 00:00:00 2001 From: Jim Liu Date: Tue, 7 Jun 2022 16:33:54 +0800 Subject: [PATCH 236/581] misc: nuvoton: Add NPCM7xx otp controller driver Add Nuvoton BMC npcm750 otp driver Signed-off-by: Jim Liu --- arch/arm/include/asm/arch-npcm7xx/otp.h | 90 +++++ drivers/misc/Kconfig | 9 + drivers/misc/Makefile | 1 + drivers/misc/npcm_otp.c | 512 ++++++++++++++++++++++++ 4 files changed, 612 insertions(+) create mode 100644 arch/arm/include/asm/arch-npcm7xx/otp.h create mode 100644 drivers/misc/npcm_otp.c diff --git a/arch/arm/include/asm/arch-npcm7xx/otp.h b/arch/arm/include/asm/arch-npcm7xx/otp.h new file mode 100644 index 00000000000..11d1e8550c9 --- /dev/null +++ b/arch/arm/include/asm/arch-npcm7xx/otp.h @@ -0,0 +1,90 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef _NPCM_OTP_H_ +#define _NPCM_OTP_H_ + +#ifdef CONFIG_ARCH_NPCM8XX +enum { + NPCM_KEY_SA = 0, + NPCM_FUSE_SA = 0, + NPCM_NUM_OF_SA = 1 +}; +#else +enum { + NPCM_KEY_SA = 0, + NPCM_FUSE_SA = 1, + NPCM_NUM_OF_SA = 2 +}; +#endif + +struct npcm_otp_regs { + unsigned int fst; + unsigned int faddr; + unsigned int fdata; + unsigned int fcfg; + unsigned int fustrap_fkeyind; + unsigned int fctl; +}; + +#define FST_RDY BIT(0) +#define FST_RDST BIT(1) +#define FST_RIEN BIT(2) + +#ifdef CONFIG_ARCH_NPCM8XX +#define FADDR_BYTEADDR(addr) ((addr) << 3) +#define FADDR_BITPOS(pos) ((pos) << 0) +#define FADDR_VAL(addr, pos) (FADDR_BITPOS(pos) | FADDR_BYTEADDR(addr)) +#define FADDR_IN_PROG BIT(16) +#else +#define FADDR_BYTEADDR(addr) ((addr) << 0) +#define FADDR_BITPOS(pos) ((pos) << 10) +#define FADDR_VAL(addr, pos) (FADDR_BYTEADDR(addr) | FADDR_BITPOS(pos)) +#define FADDR_IN_PROG BIT(16) +#endif + +#define FDATA_MASK (0xff) + +#define FUSTRAP_O_SECBOOT BIT(23) + +#define FCFG_FDIS BIT(31) + +#define FKEYIND_KVAL BIT(0) +#define FKEYIND_KSIZE_MASK (0x00000070) +#define FKEYIND_KSIZE_128 (0x40) +#define FKEYIND_KSIZE_192 (0x50) +#define FKEYIND_KSIZE_256 (0x60) +#define FKEYIND_KIND_MASK (0x000c0000) +#define FKEYIND_KIND_KEY(indx) ((indx) << 18) + +// Program cycle initiation values (sequence of two adjacent writes) +#define PROGRAM_ARM 0x1 +#define PROGRAM_INIT 0xBF79E5D0 + +#define OTP2_BASE 0xF018A000 +#define FUSTRAP (OTP2_BASE + 0x10) + +// Read cycle initiation value +#define READ_INIT 0x02 + +// Value to clean FDATA contents +#define FDATA_CLEAN_VALUE 0x01 + +#ifdef CONFIG_ARCH_NPCM8XX +#define NPCM_OTP_ARR_BYTE_SIZE 8192 +#else +#define NPCM_OTP_ARR_BYTE_SIZE 1024 +#endif + +#define MIN_PROGRAM_PULSES 4 +#define MAX_PROGRAM_PULSES 20 +#define NPCM_OTP_ARR_BYTE_SIZE 1024 + +int fuse_prog_image(u32 bank, uintptr_t address); +int fuse_program_data(u32 bank, u32 word, u8 *data, u32 size); +int npcm_otp_select_key(u8 key_index); +bool npcm_otp_is_fuse_array_disabled(u32 arr); +void npcm_otp_nibble_parity_ecc_encode(u8 *datain, u8 *dataout, u32 size); +void npcm_otp_majority_rule_ecc_encode(u8 *datain, u8 *dataout, u32 size); +void npcm_arch_preboot_os(void); + +#endif diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 7b6c371d1c2..28d5da49ff1 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -321,6 +321,15 @@ config SPL_MXC_OCOTP Programmable memory pages, that are stored on some Freescale i.MX processors, in SPL. +config NPCM_OTP + bool "Nnvoton NPCM BMC On-Chip OTP Memory Support" + depends on (ARM && ARCH_NPCM) + default n + help + Support NPCM BMC OTP memory (fuse). + To compile this driver as a module, choose M here: the module + will be called npcm_otp. + config NUVOTON_NCT6102D bool "Enable Nuvoton NCT6102D Super I/O driver" help diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 0a333640b9f..0bf05ca05ef 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -56,6 +56,7 @@ obj-$(CONFIG_MPC83XX_SERDES) += mpc83xx_serdes.o obj-$(CONFIG_$(SPL_TPL_)LS2_SFP) += ls2_sfp.o obj-$(CONFIG_$(SPL_)MXC_OCOTP) += mxc_ocotp.o obj-$(CONFIG_MXS_OCOTP) += mxs_ocotp.o +obj-$(CONFIG_NPCM_OTP) += npcm_otp.o obj-$(CONFIG_NUVOTON_NCT6102D) += nuvoton_nct6102d.o obj-$(CONFIG_P2SB) += p2sb-uclass.o obj-$(CONFIG_PCA9551_LED) += pca9551_led.o diff --git a/drivers/misc/npcm_otp.c b/drivers/misc/npcm_otp.c new file mode 100644 index 00000000000..304910888bb --- /dev/null +++ b/drivers/misc/npcm_otp.c @@ -0,0 +1,512 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2021 Nuvoton Technology Corp. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +struct npcm_otp_priv { + struct npcm_otp_regs *regs[2]; +}; + +static struct npcm_otp_priv *otp_priv; + +/*----------------------------------------------------------------------------*/ +/* Function: npcm_otp_check_inputs */ +/* */ +/* Parameters: arr - fuse array number to check */ +/* word - fuse word (offset) to check */ +/* Returns: int */ +/* Side effects: */ +/* Description: Checks is arr and word are illegal and do not exceed */ +/* their range. Return 0 if they are legal, -1 if not */ +/*----------------------------------------------------------------------------*/ +static int npcm_otp_check_inputs(u32 arr, u32 word) +{ + if (arr >= NPCM_NUM_OF_SA) { + if (IS_ENABLED(CONFIG_ARCH_NPCM8XX)) + printf("\nError: npcm8XX otp includs only one bank: 0\n"); + if (IS_ENABLED(CONFIG_ARCH_NPCM7XX)) + printf("\nError: npcm7XX otp includs only two banks: 0 and 1\n"); + return -1; + } + + if (word >= NPCM_OTP_ARR_BYTE_SIZE) { + printf("\nError: npcm otp array comprises only %d bytes, numbered from 0 to %d\n", + NPCM_OTP_ARR_BYTE_SIZE, NPCM_OTP_ARR_BYTE_SIZE - 1); + return -1; + } + + return 0; +} + +/*----------------------------------------------------------------------------*/ +/* Function: npcm_otp_wait_for_otp_ready */ +/* */ +/* Parameters: array - fuse array to wait for */ +/* Returns: int */ +/* Side effects: */ +/* Description: Initialize the Fuse HW module. */ +/*----------------------------------------------------------------------------*/ +static int npcm_otp_wait_for_otp_ready(u32 arr, u32 timeout) +{ + struct npcm_otp_regs *regs = otp_priv->regs[arr]; + u32 time = timeout; + + /*------------------------------------------------------------------------*/ + /* check parameters validity */ + /*------------------------------------------------------------------------*/ + if (arr > NPCM_FUSE_SA) + return -EINVAL; + + while (--time > 1) { + if (readl(®s->fst) & FST_RDY) { + /* fuse is ready, clear the status. */ + writel(readl(®s->fst) | FST_RDST, ®s->fst); + return 0; + } + } + + /* try to clear the status in case it was set */ + writel(readl(®s->fst) | FST_RDST, ®s->fst); + + return -EINVAL; +} + +/*----------------------------------------------------------------------------*/ +/* Function: npcm_otp_read_byte */ +/* */ +/* Parameters: arr - Storage Array type [input]. */ +/* addr - Byte-address to read from [input]. */ +/* data - Pointer to result [output]. */ +/* Returns: none */ +/* Side effects: */ +/* Description: Read 8-bit data from an OTP storage array. */ +/*----------------------------------------------------------------------------*/ +static void npcm_otp_read_byte(u32 arr, u32 addr, u8 *data) +{ + struct npcm_otp_regs *regs = otp_priv->regs[arr]; + + /* Wait for the Fuse Box Idle */ + npcm_otp_wait_for_otp_ready(arr, 0xDEADBEEF); + + /* Configure the byte address in the fuse array for read operation */ + writel(FADDR_VAL(addr, 0), ®s->faddr); + + /* Initiate a read cycle */ + writel(READ_INIT, ®s->fctl); + + /* Wait for read operation completion */ + npcm_otp_wait_for_otp_ready(arr, 0xDEADBEEF); + + /* Read the result */ + *data = readl(®s->fdata) & FDATA_MASK; + + /* Clean FDATA contents to prevent unauthorized software from reading + * sensitive information + */ + writel(FDATA_CLEAN_VALUE, ®s->fdata); +} + +/*----------------------------------------------------------------------------*/ +/* Function: npcm_otp_bit_is_programmed */ +/* */ +/* Parameters: arr - Storage Array type [input]. */ +/* byte_offset - Byte offset in array [input]. */ +/* bit_offset - Bit offset in byte [input]. */ +/* Returns: Nonzero if bit is programmed, zero otherwise. */ +/* Side effects: */ +/* Description: Check if a bit is programmed in an OTP storage array. */ +/*----------------------------------------------------------------------------*/ +static bool npcm_otp_bit_is_programmed(u32 arr, + u32 byte_offset, u8 bit_offset) +{ + u32 data = 0; + + /* Read the entire byte you wish to program */ + npcm_otp_read_byte(arr, byte_offset, (u8 *)&data); + + /* Check whether the bit is already programmed */ + if (data & (1 << bit_offset)) + return true; + + return false; +} + +/*----------------------------------------------------------------------------*/ +/* Function: npcm_otp_program_bit */ +/* */ +/* Parameters: arr - Storage Array type [input]. */ +/* byte)offset - Byte offset in array [input]. */ +/* bit_offset - Bit offset in byte [input]. */ +/* Returns: int */ +/* Side effects: */ +/* Description: Program (set to 1) a bit in an OTP storage array. */ +/*----------------------------------------------------------------------------*/ +static int npcm_otp_program_bit(u32 arr, u32 byte_offset, + u8 bit_offset) +{ + struct npcm_otp_regs *regs = otp_priv->regs[arr]; + int count; + u8 read_data; + + /* Wait for the Fuse Box Idle */ + npcm_otp_wait_for_otp_ready(arr, 0xDEADBEEF); + + /* Make sure the bit is not already programmed */ + if (npcm_otp_bit_is_programmed(arr, byte_offset, bit_offset)) + return 0; + + /* Configure the bit address in the fuse array for program operation */ + writel(FADDR_VAL(byte_offset, bit_offset), ®s->faddr); + writel(readl(®s->faddr) | FADDR_IN_PROG, ®s->faddr); + + // program up to MAX_PROGRAM_PULSES + for (count = 1; count <= MAX_PROGRAM_PULSES; count++) { + /* Initiate a program cycle */ + writel(PROGRAM_ARM, ®s->fctl); + writel(PROGRAM_INIT, ®s->fctl); + + /* Wait for program operation completion */ + npcm_otp_wait_for_otp_ready(arr, 0xDEADBEEF); + + // after MIN_PROGRAM_PULSES start verifying the result + if (count >= MIN_PROGRAM_PULSES) { + /* Initiate a read cycle */ + writel(READ_INIT, ®s->fctl); + + /* Wait for read operation completion */ + npcm_otp_wait_for_otp_ready(arr, 0xDEADBEEF); + + /* Read the result */ + read_data = readl(®s->fdata) & FDATA_MASK; + + /* If the bit is set the sequence ended correctly */ + if (read_data & (1 << bit_offset)) + break; + } + } + + // check if programmking failed + if (count > MAX_PROGRAM_PULSES) { + printf("program fail\n"); + return -EINVAL; + } + + /* + * Clean FDATA contents to prevent unauthorized software from reading + * sensitive information + */ + writel(FDATA_CLEAN_VALUE, ®s->fdata); + + return 0; +} + +/*----------------------------------------------------------------------------*/ +/* Function: npcm_otp_program_byte */ +/* */ +/* Parameters: arr - Storage Array type [input]. */ +/* byte_offset - Byte offset in array [input]. */ +/* value - Byte to program [input]. */ +/* Returns: int */ +/* Side effects: */ +/* Description: Program (set to 1) a given byte's relevant bits in an */ +/* OTP storage array. */ +/*----------------------------------------------------------------------------*/ +static int npcm_otp_program_byte(u32 arr, u32 byte_offset, + u8 value) +{ + int status = 0; + unsigned int i; + u8 data = 0; + int rc; + + rc = npcm_otp_check_inputs(arr, byte_offset); + if (rc != 0) + return rc; + + /* Wait for the Fuse Box Idle */ + npcm_otp_wait_for_otp_ready(arr, 0xDEADBEEF); + + /* Read the entire byte you wish to program */ + npcm_otp_read_byte(arr, byte_offset, &data); + + /* In case all relevant bits are already programmed - nothing to do */ + if ((~data & value) == 0) + return status; + + /* Program unprogrammed bits. */ + for (i = 0; i < 8; i++) { + if (value & (1 << i)) { + /* Program (set to 1) the relevant bit */ + int last_status = npcm_otp_program_bit(arr, byte_offset, (u8)i); + + if (last_status != 0) + status = last_status; + } + } + return status; +} + +/*----------------------------------------------------------------------------*/ +/* Function: npcm_otp_is_fuse_array_disabled */ +/* */ +/* Parameters: arr - Storage Array type [input]. */ +/* Returns: bool */ +/* Side effects: */ +/* Description: Return true if access to the first 2048 bits of the */ +/* specified fuse array is disabled, false if not */ +/*----------------------------------------------------------------------------*/ +bool npcm_otp_is_fuse_array_disabled(u32 arr) +{ + struct npcm_otp_regs *regs = otp_priv->regs[arr]; + + return (readl(®s->fcfg) & FCFG_FDIS) != 0; +} + +int npcm_otp_select_key(u8 key_index) +{ + struct npcm_otp_regs *regs = otp_priv->regs[NPCM_KEY_SA]; + u32 idx = 0; + u32 time = 0xDAEDBEEF; + + if (key_index >= 4) + return -1; + + /* Do not destroy ECCDIS bit */ + idx = readl(®s->fustrap_fkeyind); + + /* Configure the key size */ + idx &= ~FKEYIND_KSIZE_MASK; + idx |= FKEYIND_KSIZE_256; + + /* Configure the key index (0 to 3) */ + idx &= ~FKEYIND_KIND_MASK; + idx |= FKEYIND_KIND_KEY(key_index); + + writel(idx, ®s->fustrap_fkeyind); + + /* Wait for selection completetion */ + while (--time > 1) { + if (readl(®s->fustrap_fkeyind) & FKEYIND_KVAL) + return 0; + udelay(1); + } + + return -1; +} + +/*----------------------------------------------------------------------------*/ +/* Function: npcm_otp_nibble_parity_ecc_encode */ +/* */ +/* Parameters: datain - pointer to decoded data buffer */ +/* dataout - pointer to encoded data buffer (buffer size */ +/* should be 2 x dataout) */ +/* size - size of encoded data (decoded data x 2) */ +/* Returns: none */ +/* Side effects: */ +/* Description: Decodes the data according to nibble parity ECC scheme. */ +/* Size specifies the encoded data size. */ +/* Decodes whole bytes only */ +/*----------------------------------------------------------------------------*/ +void npcm_otp_nibble_parity_ecc_encode(u8 *datain, u8 *dataout, u32 size) +{ + u32 i, idx; + u8 E0, E1, E2, E3; + + for (i = 0; i < (size / 2); i++) { + E0 = (datain[i] >> 0) & 0x01; + E1 = (datain[i] >> 1) & 0x01; + E2 = (datain[i] >> 2) & 0x01; + E3 = (datain[i] >> 3) & 0x01; + + idx = i * 2; + dataout[idx] = datain[i] & 0x0f; + dataout[idx] |= (E0 ^ E1) << 4; + dataout[idx] |= (E2 ^ E3) << 5; + dataout[idx] |= (E0 ^ E2) << 6; + dataout[idx] |= (E1 ^ E3) << 7; + + E0 = (datain[i] >> 4) & 0x01; + E1 = (datain[i] >> 5) & 0x01; + E2 = (datain[i] >> 6) & 0x01; + E3 = (datain[i] >> 7) & 0x01; + + idx = i * 2 + 1; + dataout[idx] = (datain[i] & 0xf0) >> 4; + dataout[idx] |= (E0 ^ E1) << 4; + dataout[idx] |= (E2 ^ E3) << 5; + dataout[idx] |= (E0 ^ E2) << 6; + dataout[idx] |= (E1 ^ E3) << 7; + } +} + +/*----------------------------------------------------------------------------*/ +/* Function: npcm_otp_majority_rule_ecc_encode */ +/* */ +/* Parameters: datain - pointer to decoded data buffer */ +/* dataout - pointer to encoded data buffer (buffer size */ +/* should be 3 x dataout) */ +/* size - size of encoded data (decoded data x 3) */ +/* Returns: none */ +/* Side effects: */ +/* Description: Decodes the data according to Major Rule ECC scheme. */ +/* Size specifies the encoded data size. */ +/* Decodes whole bytes only */ +/*----------------------------------------------------------------------------*/ +void npcm_otp_majority_rule_ecc_encode(u8 *datain, u8 *dataout, u32 size) +{ + u32 byte; + u32 bit; + u8 bit_val; + u32 decoded_size = size / 3; + + for (byte = 0; byte < decoded_size; byte++) { + for (bit = 0; bit < 8; bit++) { + bit_val = (datain[byte] >> bit) & 0x01; + + if (bit_val) { + dataout[byte] |= (1 << bit); + dataout[decoded_size + byte] |= (1 << bit); + dataout[decoded_size * 2 + byte] |= (1 << bit); + } else { + dataout[byte] &= ~(1 << bit); + dataout[decoded_size + byte] &= ~(1 << bit); + dataout[decoded_size * 2 + byte] &= ~(1 << bit); + } + } + } +} + +/*----------------------------------------------------------------------------*/ +/* Function: fuse_program_data */ +/* */ +/* Parameters: bank - Storage Array type [input]. */ +/* word - Byte offset in array [input]. */ +/* data - Pointer to data buffer to program. */ +/* size - Number of bytes to program. */ +/* Returns: none */ +/* Side effects: */ +/* Description: Programs the given byte array (size bytes) to the given */ +/* OTP storage array, starting from offset word. */ +/*----------------------------------------------------------------------------*/ +int fuse_program_data(u32 bank, u32 word, u8 *data, u32 size) +{ + u32 arr = (u32)bank; + u32 byte; + int rc; + + rc = npcm_otp_check_inputs(bank, word + size - 1); + if (rc != 0) + return rc; + + for (byte = 0; byte < size; byte++) { + u8 val; + + val = data[byte]; + if (val == 0) // optimization + continue; + + rc = npcm_otp_program_byte(arr, word + byte, data[byte]); + if (rc != 0) + return rc; + + // verify programming of every '1' bit + val = 0; + npcm_otp_read_byte((u32)bank, byte, &val); + if ((data[byte] & ~val) != 0) + return -1; + } + + return 0; +} + +int fuse_prog_image(u32 bank, uintptr_t address) +{ + return fuse_program_data(bank, 0, (u8 *)address, NPCM_OTP_ARR_BYTE_SIZE); +} + +int fuse_read(u32 bank, u32 word, u32 *val) +{ + int rc = npcm_otp_check_inputs(bank, word); + + if (rc != 0) + return rc; + + *val = 0; + npcm_otp_read_byte((u32)bank, word, (u8 *)val); + + return 0; +} + +int fuse_sense(u32 bank, u32 word, u32 *val) +{ + /* We do not support overriding */ + return -EINVAL; +} + +int fuse_prog(u32 bank, u32 word, u32 val) +{ + int rc; + + rc = npcm_otp_check_inputs(bank, word); + if (rc != 0) + return rc; + + return npcm_otp_program_byte(bank, word, (u8)val); +} + +int fuse_override(u32 bank, u32 word, u32 val) +{ + /* We do not support overriding */ + return -EINVAL; +} + +static int npcm_otp_bind(struct udevice *dev) +{ + struct npcm_otp_regs *regs; + + otp_priv = calloc(1, sizeof(struct npcm_otp_priv)); + if (!otp_priv) + return -ENOMEM; + + regs = dev_remap_addr_index(dev, 0); + if (!regs) { + printf("Cannot find reg address (arr #0), binding failed\n"); + return -EINVAL; + } + otp_priv->regs[0] = regs; + + if (IS_ENABLED(CONFIG_ARCH_NPCM7xx)) { + regs = dev_remap_addr_index(dev, 1); + if (!regs) { + printf("Cannot find reg address (arr #1), binding failed\n"); + return -EINVAL; + } + otp_priv->regs[1] = regs; + } + printf("OTP: NPCM OTP module bind OK\n"); + + return 0; +} + +static const struct udevice_id npcm_otp_ids[] = { + { .compatible = "nuvoton,npcm845-otp" }, + { .compatible = "nuvoton,npcm750-otp" }, + { } +}; + +U_BOOT_DRIVER(npcm_otp) = { + .name = "npcm_otp", + .id = UCLASS_MISC, + .of_match = npcm_otp_ids, + .priv_auto = sizeof(struct npcm_otp_priv), + .bind = npcm_otp_bind, +}; -- GitLab From 781a144a7a7e1c3efea94b1a8be8ea65f5e0ac13 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 22 Jun 2022 11:23:03 -0400 Subject: [PATCH 237/581] gxp: Convert to text file environment Convert this platform to using the text file environment rather than defining CONFIG_EXTRA_ENV_SETTINGS. Signed-off-by: Tom Rini --- board/hpe/gxp/gxp.env | 27 +++++++++++++++++++++++++++ include/configs/gxp.h | 28 ---------------------------- 2 files changed, 27 insertions(+), 28 deletions(-) create mode 100644 board/hpe/gxp/gxp.env diff --git a/board/hpe/gxp/gxp.env b/board/hpe/gxp/gxp.env new file mode 100644 index 00000000000..4760bf1663a --- /dev/null +++ b/board/hpe/gxp/gxp.env @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +recover_file=openbmc-hpe-recovery-image.mtd +recover_cmd=usb start; mw.b 0xD100000D 0x40; + if fatload usb 0 0x50000000 $recover_file 0x4C0000 0x80000; then + setenv bootargs console=ttyS0,115200 recovery; + setenv force_recovery; + saveenv; + bootm 0x50000000; + else + while itest 0 < 1; do + mw.b 0xd1000005 0xc0; + sleep .1; + mw.b 0xd1000005 0x00; + sleep .1; + done; + fi; + reset; +spiboot=if itest.b *0xD10000B2 == 6; then + run recover_cmd; + fi; + if printenv force_recovery; then + run recover_cmd; + else + bootm 0xfc080000; + run recover_cmd; + fi; diff --git a/include/configs/gxp.h b/include/configs/gxp.h index ae46126399f..e3c97b20d51 100644 --- a/include/configs/gxp.h +++ b/include/configs/gxp.h @@ -12,32 +12,4 @@ #define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define CONFIG_EXTRA_ENV_SETTINGS \ - "recover_file=openbmc-hpe-recovery-image.mtd\0" \ - "recover_cmd=usb start; " \ - "mw.b 0xD100000D 0x40; " \ - "if fatload usb 0 0x50000000 $recover_file 0x4C0000 0x80000; then " \ - "setenv bootargs console=ttyS0,115200 recovery; " \ - "setenv force_recovery; " \ - "saveenv; " \ - "bootm 0x50000000; " \ - "else " \ - "while itest 0 < 1; do " \ - "mw.b 0xd1000005 0xc0; " \ - "sleep .1; " \ - "mw.b 0xd1000005 0x00; " \ - "sleep .1; " \ - "done; " \ - "fi; " \ - "reset;\0" \ - "spiboot=if itest.b *0xD10000B2 == 6; then " \ - "run recover_cmd;" \ - "fi;" \ - "if printenv force_recovery; then " \ - "run recover_cmd; " \ - "else " \ - "bootm 0xfc080000; " \ - "run recover_cmd; " \ - "fi;\0" - #endif -- GitLab From 929e581a620feba40bea659725f88b338d8b65ec Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 22 Jun 2022 11:25:52 -0400 Subject: [PATCH 238/581] corstone1000: Convert to text file environment Convert this platform to using the text file environment rather than defining CONFIG_EXTRA_ENV_SETTINGS. Signed-off-by: Tom Rini --- board/armltd/corstone1000/corstone1000.env | 13 +++++++++++++ include/configs/corstone1000.h | 14 -------------- 2 files changed, 13 insertions(+), 14 deletions(-) create mode 100644 board/armltd/corstone1000/corstone1000.env diff --git a/board/armltd/corstone1000/corstone1000.env b/board/armltd/corstone1000/corstone1000.env new file mode 100644 index 00000000000..b24ff07fc6b --- /dev/null +++ b/board/armltd/corstone1000/corstone1000.env @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +usb_pgood_delay=250 +boot_bank_flag=0x08002000 +kernel_addr_bank_0=0x083EE000 +kernel_addr_bank_1=0x0936E000 +retrieve_kernel_load_addr= + if itest.l *${boot_bank_flag} == 0; then + setenv kernel_addr $kernel_addr_bank_0; + else + setenv kernel_addr $kernel_addr_bank_1; + fi; +kernel_addr_r=0x88200000 diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h index eba5cba0fba..38d7fe8d0d4 100644 --- a/include/configs/corstone1000.h +++ b/include/configs/corstone1000.h @@ -24,18 +24,4 @@ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_EXTRA_ENV_SETTINGS \ - "usb_pgood_delay=250\0" \ - "boot_bank_flag=0x08002000\0" \ - "kernel_addr_bank_0=0x083EE000\0" \ - "kernel_addr_bank_1=0x0936E000\0" \ - "retrieve_kernel_load_addr=" \ - "if itest.l *${boot_bank_flag} == 0; then " \ - "setenv kernel_addr $kernel_addr_bank_0;" \ - "else " \ - "setenv kernel_addr $kernel_addr_bank_1;" \ - "fi;" \ - "\0" \ - "kernel_addr_r=0x88200000\0" - #endif -- GitLab From 337b26e4688720560662246eb7703860b68bd6e2 Mon Sep 17 00:00:00 2001 From: Andrew Scull Date: Mon, 30 May 2022 10:00:01 +0000 Subject: [PATCH 239/581] serial: sandbox: Fix buffer underflow in puts Fix the buffer underflow that would occur if puts is called with length of zero. Fixes: efa51f2bd64 ("serial: sandbox: Implement puts") Cc: Sean Anderson Cc: Simon Glass Reviewed-by: Sean Anderson --- drivers/serial/sandbox.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/serial/sandbox.c b/drivers/serial/sandbox.c index e726e19c46f..13b54921c41 100644 --- a/drivers/serial/sandbox.c +++ b/drivers/serial/sandbox.c @@ -114,7 +114,7 @@ static ssize_t sandbox_serial_puts(struct udevice *dev, const char *s, struct sandbox_serial_priv *priv = dev_get_priv(dev); ssize_t ret; - if (s[len - 1] == '\n') + if (len && s[len - 1] == '\n') priv->start_of_line = true; if (sandbox_serial_enabled) { -- GitLab From aac53d3d96a236c1e62f250ed7ffa8cf9b0e44a6 Mon Sep 17 00:00:00 2001 From: Andrew Scull Date: Mon, 30 May 2022 10:00:02 +0000 Subject: [PATCH 240/581] sandbox: Rename EFI runtime sections Rename the sections used for placing the EFI runtime so that they don't start with a '.'. ELF says that sections starting with a '.' are reserved for system use, but the sandbox runs as a normal user process so should be using user sections instead. Clang's ASAN adds redzones to non-user sections and the extra padding meant that the list of options was being corrupted. Naming the sections as user sections avoids this issue as clang handles them as we intended. Signed-off-by: Andrew Scull --- arch/sandbox/cpu/u-boot.lds | 22 ++++++++++------------ arch/sandbox/lib/sections.c | 8 ++++---- 2 files changed, 14 insertions(+), 16 deletions(-) diff --git a/arch/sandbox/cpu/u-boot.lds b/arch/sandbox/cpu/u-boot.lds index 92e834a8d2b..d2cb12fc298 100644 --- a/arch/sandbox/cpu/u-boot.lds +++ b/arch/sandbox/cpu/u-boot.lds @@ -19,32 +19,30 @@ SECTIONS *(.u_boot_sandbox_getopt_end) } - .__efi_runtime_start : { - *(.__efi_runtime_start) + efi_runtime_start : { + *(___efi_runtime_start) } - .efi_runtime : { + efi_runtime : { *(efi_runtime_text) *(efi_runtime_data) } - .__efi_runtime_stop : { - *(.__efi_runtime_stop) + efi_runtime_stop : { + *(___efi_runtime_stop) } - .efi_runtime_rel_start : - { - *(.__efi_runtime_rel_start) + efi_runtime_rel_start : { + *(___efi_runtime_rel_start) } - .efi_runtime_rel : { + efi_runtime_rel : { *(.relefi_runtime_text) *(.relefi_runtime_data) } - .efi_runtime_rel_stop : - { - *(.__efi_runtime_rel_stop) + efi_runtime_rel_stop : { + *(___efi_runtime_rel_stop) } .dynsym : diff --git a/arch/sandbox/lib/sections.c b/arch/sandbox/lib/sections.c index 2559eeea38b..2f2f3fbfdb8 100644 --- a/arch/sandbox/lib/sections.c +++ b/arch/sandbox/lib/sections.c @@ -5,9 +5,9 @@ */ #include -char __efi_runtime_start[0] __section(".__efi_runtime_start"); -char __efi_runtime_stop[0] __section(".__efi_runtime_stop"); +char __efi_runtime_start[0] __section("___efi_runtime_start"); +char __efi_runtime_stop[0] __section("___efi_runtime_stop"); char __efi_runtime_rel_start[0] - __section(".__efi_runtime_rel_start"); + __section("___efi_runtime_rel_start"); char __efi_runtime_rel_stop[0] - __section(".__efi_runtime_rel_stop"); + __section("___efi_runtime_rel_stop"); -- GitLab From 0648b132696532c96c3656876c5b12ac336e1b27 Mon Sep 17 00:00:00 2001 From: Andrew Scull Date: Mon, 30 May 2022 10:00:03 +0000 Subject: [PATCH 241/581] sandbox: Rename getopt sections Rename the sections used for defining sandbox command line options so that they don't start with a '.'. ELF says that sections starting with a '.' are reserved for system use, but the sandbox runs as a normal user process so should be using user sections instead. Clang's ASAN adds redzones to non-user sections and the extra padding meant that the list of options was being corrupted. Naming the sections as user sections avoids this issue as clang handles them as we intended. Signed-off-by: Andrew Scull --- arch/sandbox/cpu/u-boot-spl.lds | 6 +++--- arch/sandbox/cpu/u-boot.lds | 6 +++--- arch/sandbox/include/asm/getopt.h | 2 +- arch/sandbox/include/asm/sections.h | 4 ++-- 4 files changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/sandbox/cpu/u-boot-spl.lds b/arch/sandbox/cpu/u-boot-spl.lds index 206e265e74b..6b300bcc930 100644 --- a/arch/sandbox/cpu/u-boot-spl.lds +++ b/arch/sandbox/cpu/u-boot-spl.lds @@ -22,9 +22,9 @@ SECTIONS } _u_boot_sandbox_getopt : { - *(.u_boot_sandbox_getopt_start) - KEEP(*(.u_boot_sandbox_getopt)) - *(.u_boot_sandbox_getopt_end) + *(_u_boot_sandbox_getopt_start) + KEEP(*(_u_boot_sandbox_getopt)) + *(_u_boot_sandbox_getopt_end) } } diff --git a/arch/sandbox/cpu/u-boot.lds b/arch/sandbox/cpu/u-boot.lds index d2cb12fc298..1f89a3329e1 100644 --- a/arch/sandbox/cpu/u-boot.lds +++ b/arch/sandbox/cpu/u-boot.lds @@ -14,9 +14,9 @@ SECTIONS } _u_boot_sandbox_getopt : { - *(.u_boot_sandbox_getopt_start) - *(.u_boot_sandbox_getopt) - *(.u_boot_sandbox_getopt_end) + *(_u_boot_sandbox_getopt_start) + *(_u_boot_sandbox_getopt) + *(_u_boot_sandbox_getopt_end) } efi_runtime_start : { diff --git a/arch/sandbox/include/asm/getopt.h b/arch/sandbox/include/asm/getopt.h index d2145ad6e2d..df30572d6c9 100644 --- a/arch/sandbox/include/asm/getopt.h +++ b/arch/sandbox/include/asm/getopt.h @@ -44,7 +44,7 @@ struct sandbox_cmdline_option { .callback = sandbox_cmdline_cb_##f, \ }; \ /* Ppointer to the struct in a special section for the linker script */ \ - static __used __section(".u_boot_sandbox_getopt") \ + static __used __section("_u_boot_sandbox_getopt") \ struct sandbox_cmdline_option \ *sandbox_cmdline_option_##f##_ptr = \ &sandbox_cmdline_option_##f diff --git a/arch/sandbox/include/asm/sections.h b/arch/sandbox/include/asm/sections.h index f4351ae7dbf..88837bb35c8 100644 --- a/arch/sandbox/include/asm/sections.h +++ b/arch/sandbox/include/asm/sections.h @@ -17,7 +17,7 @@ static inline struct sandbox_cmdline_option ** __u_boot_sandbox_option_start(void) { static char start[0] __aligned(4) __attribute__((unused)) - __section(".u_boot_sandbox_getopt_start"); + __section("_u_boot_sandbox_getopt_start"); return (struct sandbox_cmdline_option **)&start; } @@ -26,7 +26,7 @@ static inline struct sandbox_cmdline_option ** __u_boot_sandbox_option_end(void) { static char end[0] __aligned(4) __attribute__((unused)) - __section(".u_boot_sandbox_getopt_end"); + __section("_u_boot_sandbox_getopt_end"); return (struct sandbox_cmdline_option **)&end; } -- GitLab From 99e2fbcb69f0759432c4cfa0b6e1afa006f22930 Mon Sep 17 00:00:00 2001 From: Andrew Scull Date: Mon, 30 May 2022 10:00:04 +0000 Subject: [PATCH 242/581] linker_lists: Rename sections to remove . prefix Rename the sections used to implement linker lists so they begin with '__u_boot_list' rather than '.u_boot_list'. The double underscore at the start is still distinct from the single underscore used by the symbol names. Having a '.' in the section names conflicts with clang's ASAN instrumentation which tries to add redzones between the linker list elements, causing expected accesses to fail. However, clang doesn't try to add redzones to user sections, which are names with all alphanumeric and underscore characters. Signed-off-by: Andrew Scull Reviewed-by: Simon Glass --- arch/arc/cpu/u-boot.lds | 4 ++-- arch/arm/config.mk | 4 ++-- arch/arm/cpu/arm926ejs/sunxi/u-boot-spl.lds | 4 ++-- arch/arm/cpu/armv7/sunxi/u-boot-spl.lds | 4 ++-- arch/arm/cpu/armv8/u-boot-spl.lds | 4 ++-- arch/arm/cpu/armv8/u-boot.lds | 4 ++-- arch/arm/cpu/u-boot-spl.lds | 4 ++-- arch/arm/cpu/u-boot.lds | 6 ++--- arch/arm/mach-at91/arm926ejs/u-boot-spl.lds | 2 +- arch/arm/mach-at91/armv7/u-boot-spl.lds | 2 +- arch/arm/mach-omap2/u-boot-spl.lds | 4 ++-- arch/arm/mach-orion5x/u-boot-spl.lds | 4 ++-- arch/arm/mach-rockchip/u-boot-tpl-v8.lds | 4 ++-- arch/arm/mach-zynq/u-boot-spl.lds | 4 ++-- arch/arm/mach-zynq/u-boot.lds | 4 ++-- arch/m68k/cpu/u-boot.lds | 4 ++-- arch/microblaze/cpu/u-boot-spl.lds | 4 ++-- arch/microblaze/cpu/u-boot.lds | 4 ++-- arch/mips/config.mk | 2 +- arch/mips/cpu/u-boot-spl.lds | 4 ++-- arch/mips/cpu/u-boot.lds | 4 ++-- arch/nios2/cpu/u-boot.lds | 4 ++-- arch/powerpc/cpu/mpc83xx/u-boot.lds | 4 ++-- arch/powerpc/cpu/mpc85xx/u-boot-spl.lds | 4 ++-- arch/powerpc/cpu/mpc85xx/u-boot.lds | 4 ++-- arch/riscv/cpu/u-boot-spl.lds | 4 ++-- arch/riscv/cpu/u-boot.lds | 4 ++-- arch/sandbox/config.mk | 4 ++-- arch/sandbox/cpu/u-boot-spl.lds | 4 ++-- arch/sandbox/cpu/u-boot.lds | 4 ++-- arch/sh/cpu/u-boot.lds | 4 ++-- arch/x86/cpu/u-boot-64.lds | 6 ++--- arch/x86/cpu/u-boot-spl.lds | 6 ++--- arch/x86/cpu/u-boot.lds | 6 ++--- arch/x86/lib/elf_ia32_efi.lds | 4 ++-- arch/x86/lib/elf_x86_64_efi.lds | 4 ++-- arch/xtensa/cpu/u-boot.lds | 4 ++-- arch/xtensa/include/asm/ldscript.h | 13 +++++++---- board/compulab/cm_t335/u-boot.lds | 4 ++-- board/cssi/MCR3000/u-boot.lds | 4 ++-- .../davinci/da8xxevm/u-boot-spl-da850evm.lds | 2 +- board/qualcomm/dragonboard820c/u-boot.lds | 4 ++-- board/samsung/common/exynos-uboot-spl.lds | 4 ++-- board/synopsys/iot_devkit/u-boot.lds | 4 ++-- board/ti/am335x/u-boot.lds | 4 ++-- board/vscom/baltos/u-boot.lds | 4 ++-- doc/api/linker_lists.rst | 22 +++++++++---------- doc/develop/commands.rst | 4 ++-- doc/develop/driver-model/of-plat.rst | 4 ++-- include/linker_lists.h | 18 +++++++-------- tools/mips-relocs.c | 9 ++++---- 51 files changed, 128 insertions(+), 122 deletions(-) diff --git a/arch/arc/cpu/u-boot.lds b/arch/arc/cpu/u-boot.lds index e12145c7684..9f2973da659 100644 --- a/arch/arc/cpu/u-boot.lds +++ b/arch/arc/cpu/u-boot.lds @@ -39,8 +39,8 @@ SECTIONS } . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } . = ALIGN(4); diff --git a/arch/arm/config.mk b/arch/arm/config.mk index b107b1af27a..b3548ce2439 100644 --- a/arch/arm/config.mk +++ b/arch/arm/config.mk @@ -141,11 +141,11 @@ endif # limit ourselves to the sections we want in the .bin. ifdef CONFIG_ARM64 OBJCOPYFLAGS += -j .text -j .secure_text -j .secure_data -j .rodata -j .data \ - -j .u_boot_list -j .rela.dyn -j .got -j .got.plt \ + -j __u_boot_list -j .rela.dyn -j .got -j .got.plt \ -j .binman_sym_table -j .text_rest else OBJCOPYFLAGS += -j .text -j .secure_text -j .secure_data -j .rodata -j .hash \ - -j .data -j .got -j .got.plt -j .u_boot_list -j .rel.dyn \ + -j .data -j .got -j .got.plt -j __u_boot_list -j .rel.dyn \ -j .binman_sym_table -j .text_rest endif diff --git a/arch/arm/cpu/arm926ejs/sunxi/u-boot-spl.lds b/arch/arm/cpu/arm926ejs/sunxi/u-boot-spl.lds index 9a000ac5d38..c1087368115 100644 --- a/arch/arm/cpu/arm926ejs/sunxi/u-boot-spl.lds +++ b/arch/arm/cpu/arm926ejs/sunxi/u-boot-spl.lds @@ -29,8 +29,8 @@ SECTIONS .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } > .sram . = ALIGN(4); diff --git a/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds b/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds index 942c29fc959..306a4ddf3cd 100644 --- a/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds +++ b/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds @@ -38,8 +38,8 @@ SECTIONS .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } > .sram . = ALIGN(4); diff --git a/arch/arm/cpu/armv8/u-boot-spl.lds b/arch/arm/cpu/armv8/u-boot-spl.lds index 730eb93dbc3..d02b788e608 100644 --- a/arch/arm/cpu/armv8/u-boot-spl.lds +++ b/arch/arm/cpu/armv8/u-boot-spl.lds @@ -46,9 +46,9 @@ SECTIONS } >.sram #endif - .u_boot_list : { + __u_boot_list : { . = ALIGN(8); - KEEP(*(SORT(.u_boot_list*))); + KEEP(*(SORT(__u_boot_list*))); } >.sram .image_copy_end : { diff --git a/arch/arm/cpu/armv8/u-boot.lds b/arch/arm/cpu/armv8/u-boot.lds index 2554980595b..8fe4682dd2a 100644 --- a/arch/arm/cpu/armv8/u-boot.lds +++ b/arch/arm/cpu/armv8/u-boot.lds @@ -109,8 +109,8 @@ SECTIONS . = .; . = ALIGN(8); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } . = ALIGN(8); diff --git a/arch/arm/cpu/u-boot-spl.lds b/arch/arm/cpu/u-boot-spl.lds index 97899a567ff..fb2189d50de 100644 --- a/arch/arm/cpu/u-boot-spl.lds +++ b/arch/arm/cpu/u-boot-spl.lds @@ -32,8 +32,8 @@ SECTIONS } . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } . = ALIGN(4); diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds index 0eb164d2e69..f25f72b2e0d 100644 --- a/arch/arm/cpu/u-boot.lds +++ b/arch/arm/cpu/u-boot.lds @@ -15,7 +15,7 @@ ENTRY(_start) SECTIONS { #ifndef CONFIG_CMDLINE - /DISCARD/ : { *(.u_boot_list_2_cmd_*) } + /DISCARD/ : { *(__u_boot_list_2_cmd_*) } #endif #if defined(CONFIG_ARMV7_SECURE_BASE) && defined(CONFIG_ARMV7_NONSEC) /* @@ -149,8 +149,8 @@ SECTIONS . = .; . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } . = ALIGN(4); diff --git a/arch/arm/mach-at91/arm926ejs/u-boot-spl.lds b/arch/arm/mach-at91/arm926ejs/u-boot-spl.lds index 74f63552297..1a8bf94dee0 100644 --- a/arch/arm/mach-at91/arm926ejs/u-boot-spl.lds +++ b/arch/arm/mach-at91/arm926ejs/u-boot-spl.lds @@ -29,7 +29,7 @@ SECTIONS .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram . = ALIGN(4); - .u_boot_list : { KEEP(*(SORT(.u_boot_list*))) } > .sram + __u_boot_list : { KEEP(*(SORT(__u_boot_list*))) } > .sram . = ALIGN(4); __image_copy_end = .; diff --git a/arch/arm/mach-at91/armv7/u-boot-spl.lds b/arch/arm/mach-at91/armv7/u-boot-spl.lds index 950ea55d7c4..6ca725fc4ce 100644 --- a/arch/arm/mach-at91/armv7/u-boot-spl.lds +++ b/arch/arm/mach-at91/armv7/u-boot-spl.lds @@ -36,7 +36,7 @@ SECTIONS .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram . = ALIGN(4); - .u_boot_list : { KEEP(*(SORT(.u_boot_list*))) } > .sram + __u_boot_list : { KEEP(*(SORT(__u_boot_list*))) } > .sram . = ALIGN(4); __image_copy_end = .; diff --git a/arch/arm/mach-omap2/u-boot-spl.lds b/arch/arm/mach-omap2/u-boot-spl.lds index 88d81f9b98d..1d6e5d45b46 100644 --- a/arch/arm/mach-omap2/u-boot-spl.lds +++ b/arch/arm/mach-omap2/u-boot-spl.lds @@ -33,8 +33,8 @@ SECTIONS .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } >.sram . = ALIGN(4); diff --git a/arch/arm/mach-orion5x/u-boot-spl.lds b/arch/arm/mach-orion5x/u-boot-spl.lds index a537fe02954..154bb120603 100644 --- a/arch/arm/mach-orion5x/u-boot-spl.lds +++ b/arch/arm/mach-orion5x/u-boot-spl.lds @@ -41,8 +41,8 @@ SECTIONS .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.nor . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } > .nor . = ALIGN(4); diff --git a/arch/arm/mach-rockchip/u-boot-tpl-v8.lds b/arch/arm/mach-rockchip/u-boot-tpl-v8.lds index 9869972e222..74618eba591 100644 --- a/arch/arm/mach-rockchip/u-boot-tpl-v8.lds +++ b/arch/arm/mach-rockchip/u-boot-tpl-v8.lds @@ -39,9 +39,9 @@ SECTIONS *(.data*) } - .u_boot_list : { + __u_boot_list : { . = ALIGN(8); - KEEP(*(SORT(.u_boot_list*))); + KEEP(*(SORT(__u_boot_list*))); } .image_copy_end : { diff --git a/arch/arm/mach-zynq/u-boot-spl.lds b/arch/arm/mach-zynq/u-boot-spl.lds index 106d2e390ba..8c18d3f91f4 100644 --- a/arch/arm/mach-zynq/u-boot-spl.lds +++ b/arch/arm/mach-zynq/u-boot-spl.lds @@ -37,8 +37,8 @@ SECTIONS } > .sram . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } > .sram . = ALIGN(4); diff --git a/arch/arm/mach-zynq/u-boot.lds b/arch/arm/mach-zynq/u-boot.lds index 91c32e89e8f..a5169fd9150 100644 --- a/arch/arm/mach-zynq/u-boot.lds +++ b/arch/arm/mach-zynq/u-boot.lds @@ -54,8 +54,8 @@ SECTIONS . = .; . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } . = ALIGN(4); diff --git a/arch/m68k/cpu/u-boot.lds b/arch/m68k/cpu/u-boot.lds index affb2d93746..133f79150ba 100644 --- a/arch/m68k/cpu/u-boot.lds +++ b/arch/m68k/cpu/u-boot.lds @@ -60,8 +60,8 @@ SECTIONS . = .; . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } . = .; diff --git a/arch/microblaze/cpu/u-boot-spl.lds b/arch/microblaze/cpu/u-boot-spl.lds index 7883a64b158..4ac5a21524c 100644 --- a/arch/microblaze/cpu/u-boot-spl.lds +++ b/arch/microblaze/cpu/u-boot-spl.lds @@ -37,8 +37,8 @@ SECTIONS } . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } __init_end = . ; diff --git a/arch/microblaze/cpu/u-boot.lds b/arch/microblaze/cpu/u-boot.lds index 2b316cc7f5a..8bd515b0992 100644 --- a/arch/microblaze/cpu/u-boot.lds +++ b/arch/microblaze/cpu/u-boot.lds @@ -41,8 +41,8 @@ SECTIONS } . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } __init_end = . ; diff --git a/arch/mips/config.mk b/arch/mips/config.mk index faf4129ac16..04f36278058 100644 --- a/arch/mips/config.mk +++ b/arch/mips/config.mk @@ -65,6 +65,6 @@ PLATFORM_CPPFLAGS += -msoft-float KBUILD_LDFLAGS += -G 0 -static -n -nostdlib PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections LDFLAGS_FINAL += --gc-sections -OBJCOPYFLAGS += -j .text -j .rodata -j .data -j .u_boot_list +OBJCOPYFLAGS += -j .text -j .rodata -j .data -j __u_boot_list LDFLAGS_STANDALONE += --gc-sections diff --git a/arch/mips/cpu/u-boot-spl.lds b/arch/mips/cpu/u-boot-spl.lds index 28ea4f2a481..194398be853 100644 --- a/arch/mips/cpu/u-boot-spl.lds +++ b/arch/mips/cpu/u-boot-spl.lds @@ -29,8 +29,8 @@ SECTIONS #if defined(CONFIG_SPL_DM) || defined(CONFIG_SPL_LOADER_SUPPORT) . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } > .spl_mem #endif diff --git a/arch/mips/cpu/u-boot.lds b/arch/mips/cpu/u-boot.lds index 86496737d35..9a4ebcd1515 100644 --- a/arch/mips/cpu/u-boot.lds +++ b/arch/mips/cpu/u-boot.lds @@ -33,8 +33,8 @@ SECTIONS } . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } . = ALIGN(4); diff --git a/arch/nios2/cpu/u-boot.lds b/arch/nios2/cpu/u-boot.lds index cbf54b46103..5b9e27d9406 100644 --- a/arch/nios2/cpu/u-boot.lds +++ b/arch/nios2/cpu/u-boot.lds @@ -32,8 +32,8 @@ SECTIONS */ . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } /* INIT DATA sections - "Small" data (see the gcc -G option) diff --git a/arch/powerpc/cpu/mpc83xx/u-boot.lds b/arch/powerpc/cpu/mpc83xx/u-boot.lds index d10f528da4c..1a1e537b2a7 100644 --- a/arch/powerpc/cpu/mpc83xx/u-boot.lds +++ b/arch/powerpc/cpu/mpc83xx/u-boot.lds @@ -42,8 +42,8 @@ SECTIONS . = .; . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds index 1b4d1e05a4a..06a70ff2af9 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds @@ -50,8 +50,8 @@ SECTIONS _edata = .; . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } . = .; diff --git a/arch/powerpc/cpu/mpc85xx/u-boot.lds b/arch/powerpc/cpu/mpc85xx/u-boot.lds index e1bbee43bcb..8bbe319b3e7 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot.lds @@ -67,8 +67,8 @@ SECTIONS . = .; . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } . = .; diff --git a/arch/riscv/cpu/u-boot-spl.lds b/arch/riscv/cpu/u-boot-spl.lds index d0495ce2486..993536302a2 100644 --- a/arch/riscv/cpu/u-boot-spl.lds +++ b/arch/riscv/cpu/u-boot-spl.lds @@ -40,8 +40,8 @@ SECTIONS . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } > .spl_mem . = ALIGN(4); diff --git a/arch/riscv/cpu/u-boot.lds b/arch/riscv/cpu/u-boot.lds index c00d17c7369..1c937aebee0 100644 --- a/arch/riscv/cpu/u-boot.lds +++ b/arch/riscv/cpu/u-boot.lds @@ -44,8 +44,8 @@ SECTIONS . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } . = ALIGN(4); diff --git a/arch/sandbox/config.mk b/arch/sandbox/config.mk index 02a3ba0c0e9..f3d3af66116 100644 --- a/arch/sandbox/config.mk +++ b/arch/sandbox/config.mk @@ -44,13 +44,13 @@ EFI_TARGET := --target=efi-app-ia32 else ifeq ($(HOST_ARCH),$(HOST_ARCH_AARCH64)) EFI_LDS := ${SRCDIR}/../../../arch/arm/lib/elf_aarch64_efi.lds OBJCOPYFLAGS += -j .text -j .secure_text -j .secure_data -j .rodata -j .data \ - -j .u_boot_list -j .rela.dyn -j .got -j .got.plt \ + -j __u_boot_list -j .rela.dyn -j .got -j .got.plt \ -j .binman_sym_table -j .text_rest \ -j .efi_runtime -j .efi_runtime_rel else ifeq ($(HOST_ARCH),$(HOST_ARCH_ARM)) EFI_LDS := ${SRCDIR}/../../../arch/arm/lib/elf_arm_efi.lds OBJCOPYFLAGS += -j .text -j .secure_text -j .secure_data -j .rodata -j .hash \ - -j .data -j .got -j .got.plt -j .u_boot_list -j .rel.dyn \ + -j .data -j .got -j .got.plt -j __u_boot_list -j .rel.dyn \ -j .binman_sym_table -j .text_rest \ -j .efi_runtime -j .efi_runtime_rel else ifeq ($(HOST_ARCH),$(HOST_ARCH_RISCV32)) diff --git a/arch/sandbox/cpu/u-boot-spl.lds b/arch/sandbox/cpu/u-boot-spl.lds index 6b300bcc930..ef885fd0cb0 100644 --- a/arch/sandbox/cpu/u-boot-spl.lds +++ b/arch/sandbox/cpu/u-boot-spl.lds @@ -9,8 +9,8 @@ SECTIONS { . = ALIGN(32); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } /* Private data for devices with OF_PLATDATA_RT */ diff --git a/arch/sandbox/cpu/u-boot.lds b/arch/sandbox/cpu/u-boot.lds index 1f89a3329e1..ba8dee50c7b 100644 --- a/arch/sandbox/cpu/u-boot.lds +++ b/arch/sandbox/cpu/u-boot.lds @@ -9,8 +9,8 @@ SECTIONS { . = ALIGN(32); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } _u_boot_sandbox_getopt : { diff --git a/arch/sh/cpu/u-boot.lds b/arch/sh/cpu/u-boot.lds index 4cc97737f1c..ff80ce78f3e 100644 --- a/arch/sh/cpu/u-boot.lds +++ b/arch/sh/cpu/u-boot.lds @@ -70,8 +70,8 @@ SECTIONS } >ram PROVIDE (_egot = .); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } >ram PROVIDE (__init_end = .); diff --git a/arch/x86/cpu/u-boot-64.lds b/arch/x86/cpu/u-boot-64.lds index 92a30c2a387..53c56043a9e 100644 --- a/arch/x86/cpu/u-boot-64.lds +++ b/arch/x86/cpu/u-boot-64.lds @@ -12,7 +12,7 @@ ENTRY(_start) SECTIONS { #ifndef CONFIG_CMDLINE - /DISCARD/ : { *(.u_boot_list_2_cmd_*) } + /DISCARD/ : { *(__u_boot_list_2_cmd_*) } #endif #ifdef CONFIG_SYS_TEXT_BASE @@ -41,8 +41,8 @@ SECTIONS . = ALIGN(4); . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } . = ALIGN(4); diff --git a/arch/x86/cpu/u-boot-spl.lds b/arch/x86/cpu/u-boot-spl.lds index 346f60bdac0..a0a2a06a18c 100644 --- a/arch/x86/cpu/u-boot-spl.lds +++ b/arch/x86/cpu/u-boot-spl.lds @@ -12,7 +12,7 @@ ENTRY(_start) SECTIONS { #ifndef CONFIG_CMDLINE - /DISCARD/ : { *(.u_boot_list_2_cmd_*) } + /DISCARD/ : { *(__u_boot_list_2_cmd_*) } #endif . = IMAGE_TEXT_BASE; /* Location of bootcode in flash */ @@ -25,8 +25,8 @@ SECTIONS . = ALIGN(4); . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } . = ALIGN(4); diff --git a/arch/x86/cpu/u-boot.lds b/arch/x86/cpu/u-boot.lds index 22fde01e749..7c872098342 100644 --- a/arch/x86/cpu/u-boot.lds +++ b/arch/x86/cpu/u-boot.lds @@ -12,7 +12,7 @@ ENTRY(_start) SECTIONS { #ifndef CONFIG_CMDLINE - /DISCARD/ : { *(.u_boot_list_2_cmd_*) } + /DISCARD/ : { *(__u_boot_list_2_cmd_*) } #endif . = CONFIG_SYS_TEXT_BASE; /* Location of bootcode in flash */ @@ -39,8 +39,8 @@ SECTIONS . = ALIGN(4); . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } . = ALIGN(4); diff --git a/arch/x86/lib/elf_ia32_efi.lds b/arch/x86/lib/elf_ia32_efi.lds index aad61e7f817..6d89c1fbd53 100644 --- a/arch/x86/lib/elf_ia32_efi.lds +++ b/arch/x86/lib/elf_ia32_efi.lds @@ -51,7 +51,7 @@ SECTIONS /* U-Boot lists and device tree */ . = ALIGN(8); - *(SORT(.u_boot_list*)); + *(SORT(__u_boot_list*)); . = ALIGN(8); *(.dtb*); } @@ -69,7 +69,7 @@ SECTIONS *(.data.rel.local) *(.data.rel.ro) *(.data.rel*) - *(.rel.u_boot_list*) + *(.rel__u_boot_list*) } . = ALIGN(4096); .reloc : /* This is the PECOFF .reloc section! */ diff --git a/arch/x86/lib/elf_x86_64_efi.lds b/arch/x86/lib/elf_x86_64_efi.lds index 75727400aa4..ada024c05c3 100644 --- a/arch/x86/lib/elf_x86_64_efi.lds +++ b/arch/x86/lib/elf_x86_64_efi.lds @@ -50,7 +50,7 @@ SECTIONS /* U-Boot lists and device tree */ . = ALIGN(8); - *(SORT(.u_boot_list*)); + *(SORT(__u_boot_list*)); . = ALIGN(8); *(.dtb*); } @@ -63,7 +63,7 @@ SECTIONS *(.rela.data*) *(.rela.got) *(.rela.stab) - *(.rela.u_boot_list*) + *(.rela__u_boot_list*) } . = ALIGN(4096); diff --git a/arch/xtensa/cpu/u-boot.lds b/arch/xtensa/cpu/u-boot.lds index 493f3fdb99b..84ba32c0444 100644 --- a/arch/xtensa/cpu/u-boot.lds +++ b/arch/xtensa/cpu/u-boot.lds @@ -49,7 +49,7 @@ SECTIONS RELOCATE1(text); RELOCATE1(rodata); RELOCATE1(data); - RELOCATE1(u_boot_list); + RELOCATE_USER1(__u_boot_list); __reloc_table_end = ABSOLUTE(.); } @@ -78,7 +78,7 @@ SECTIONS SECTION_text(XTENSA_SYS_TEXT_ADDR, FOLLOWING(.DoubleExceptionVector.text)) SECTION_rodata(ALIGN(16), FOLLOWING(.text)) SECTION_u_boot_list(ALIGN(16), FOLLOWING(.rodata)) - SECTION_data(ALIGN(16), FOLLOWING(.u_boot_list)) + SECTION_data(ALIGN(16), FOLLOWING(__u_boot_list)) __reloc_end = .; __init_end = .; diff --git a/arch/xtensa/include/asm/ldscript.h b/arch/xtensa/include/asm/ldscript.h index 08f5d0135ed..78a0b230bda 100644 --- a/arch/xtensa/include/asm/ldscript.h +++ b/arch/xtensa/include/asm/ldscript.h @@ -41,6 +41,11 @@ LONG(_##_sym_##_##_sec_##_end); \ LONG(LOADADDR(.##_sym_##.##_sec_)); +#define RELOCATE_USER1(_sec_) \ + LONG(_##_sec_##_start); \ + LONG(_##_sec_##_end); \ + LONG(LOADADDR(_sec_)); + #define SECTION_VECTOR(_sym_, _sec_, _vma_, _lma_) \ .##_sym_##.##_sec_ _vma_ : _lma_ \ { \ @@ -100,11 +105,11 @@ } #define SECTION_u_boot_list(_vma_, _lma_) \ - .u_boot_list _vma_ : _lma_ \ + __u_boot_list _vma_ : _lma_ \ { \ - _u_boot_list_start = ABSOLUTE(.); \ - KEEP(*(SORT(.u_boot_list*))); \ - _u_boot_list_end = ABSOLUTE(.); \ + ___u_boot_list_start = ABSOLUTE(.); \ + KEEP(*(SORT(__u_boot_list*))); \ + ___u_boot_list_end = ABSOLUTE(.); \ } #define SECTION_data(_vma_, _lma_) \ diff --git a/board/compulab/cm_t335/u-boot.lds b/board/compulab/cm_t335/u-boot.lds index b00e466d580..49938804611 100644 --- a/board/compulab/cm_t335/u-boot.lds +++ b/board/compulab/cm_t335/u-boot.lds @@ -36,8 +36,8 @@ SECTIONS . = .; . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } . = ALIGN(4); diff --git a/board/cssi/MCR3000/u-boot.lds b/board/cssi/MCR3000/u-boot.lds index 70aef3241c8..24b535e724a 100644 --- a/board/cssi/MCR3000/u-boot.lds +++ b/board/cssi/MCR3000/u-boot.lds @@ -59,8 +59,8 @@ SECTIONS . = .; . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } . = .; diff --git a/board/davinci/da8xxevm/u-boot-spl-da850evm.lds b/board/davinci/da8xxevm/u-boot-spl-da850evm.lds index f6b9de29084..7e0f09f3b5b 100644 --- a/board/davinci/da8xxevm/u-boot-spl-da850evm.lds +++ b/board/davinci/da8xxevm/u-boot-spl-da850evm.lds @@ -36,7 +36,7 @@ SECTIONS .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram . = ALIGN(4); - .u_boot_list : { KEEP(*(SORT(.u_boot_list*))); } >.sram + __u_boot_list : { KEEP(*(SORT(__u_boot_list*))); } >.sram . = ALIGN(4); .rel.dyn : { diff --git a/board/qualcomm/dragonboard820c/u-boot.lds b/board/qualcomm/dragonboard820c/u-boot.lds index dcf8256cec3..5251b59fbe7 100644 --- a/board/qualcomm/dragonboard820c/u-boot.lds +++ b/board/qualcomm/dragonboard820c/u-boot.lds @@ -49,8 +49,8 @@ SECTIONS . = .; . = ALIGN(8); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } . = ALIGN(8); diff --git a/board/samsung/common/exynos-uboot-spl.lds b/board/samsung/common/exynos-uboot-spl.lds index 5b32f7feb81..73cd97a1b1d 100644 --- a/board/samsung/common/exynos-uboot-spl.lds +++ b/board/samsung/common/exynos-uboot-spl.lds @@ -32,8 +32,8 @@ SECTIONS .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } >.sram . = ALIGN(4); diff --git a/board/synopsys/iot_devkit/u-boot.lds b/board/synopsys/iot_devkit/u-boot.lds index 5aff100315e..e82e4987f6f 100644 --- a/board/synopsys/iot_devkit/u-boot.lds +++ b/board/synopsys/iot_devkit/u-boot.lds @@ -40,8 +40,8 @@ SECTIONS } > ROM . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); /* Mark RAM's LMA */ . = ALIGN(4); diff --git a/board/ti/am335x/u-boot.lds b/board/ti/am335x/u-boot.lds index 03c1d5f73b3..087dee8bb2e 100644 --- a/board/ti/am335x/u-boot.lds +++ b/board/ti/am335x/u-boot.lds @@ -72,8 +72,8 @@ SECTIONS . = .; . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } . = ALIGN(4); diff --git a/board/vscom/baltos/u-boot.lds b/board/vscom/baltos/u-boot.lds index 315ba5b99a7..cb2ee676975 100644 --- a/board/vscom/baltos/u-boot.lds +++ b/board/vscom/baltos/u-boot.lds @@ -53,8 +53,8 @@ SECTIONS . = .; . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } . = ALIGN(4); diff --git a/doc/api/linker_lists.rst b/doc/api/linker_lists.rst index 7063fdc8314..3cd447f187d 100644 --- a/doc/api/linker_lists.rst +++ b/doc/api/linker_lists.rst @@ -13,7 +13,7 @@ then the corresponding input section name is :: - .u_boot_list_ + 2_ + @_list + _2_ + @_entry + __u_boot_list_ + 2_ + @_list + _2_ + @_entry and the C variable name is @@ -23,7 +23,7 @@ and the C variable name is This ensures uniqueness for both input section and C variable name. -Note that the names differ only in the first character, "." for the +Note that the names differ only in the characters, "__" for the section and "_" for the variable, so that the linker cannot confuse section and symbol names. From now on, both names will be referred to as @@ -63,11 +63,11 @@ iterated at least once. :: - .u_boot_list_2_array_1 - .u_boot_list_2_array_2_first - .u_boot_list_2_array_2_second - .u_boot_list_2_array_2_third - .u_boot_list_2_array_3 + __u_boot_list_2_array_1 + __u_boot_list_2_array_2_first + __u_boot_list_2_array_2_second + __u_boot_list_2_array_2_third + __u_boot_list_2_array_3 If lists must be divided into sublists (e.g. for iterating only on part of a list), one can simply give the list a name of the form @@ -129,17 +129,17 @@ the compiler cannot update the alignment of the linker_list item. In the first case, an 8-byte 'fill' region is added:: - .u_boot_list_2_driver_2_testbus_drv + __u_boot_list_2_driver_2_testbus_drv 0x0000000000270018 0x80 test/built-in.o 0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv - .u_boot_list_2_driver_2_testfdt1_drv + __u_boot_list_2_driver_2_testfdt1_drv 0x0000000000270098 0x80 test/built-in.o 0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv *fill* 0x0000000000270118 0x8 - .u_boot_list_2_driver_2_testfdt_drv + __u_boot_list_2_driver_2_testfdt_drv 0x0000000000270120 0x80 test/built-in.o 0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv - .u_boot_list_2_driver_2_testprobe_drv + __u_boot_list_2_driver_2_testprobe_drv 0x00000000002701a0 0x80 test/built-in.o 0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv diff --git a/doc/develop/commands.rst b/doc/develop/commands.rst index c72d1b0aaad..ede880d248c 100644 --- a/doc/develop/commands.rst +++ b/doc/develop/commands.rst @@ -169,8 +169,8 @@ by writing in u-boot.lds ($(srctree)/board/boardname/u-boot.lds) these .. code-block:: c - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } Writing tests diff --git a/doc/develop/driver-model/of-plat.rst b/doc/develop/driver-model/of-plat.rst index 237af38ad4d..b454f7be85e 100644 --- a/doc/develop/driver-model/of-plat.rst +++ b/doc/develop/driver-model/of-plat.rst @@ -707,9 +707,9 @@ Link errors / undefined reference Sometimes dtoc does not find the problem for you, but something is wrong and you get a link error, e.g.:: - :(.u_boot_list_2_udevice_2_spl_test5+0x0): undefined reference to + :(__u_boot_list_2_udevice_2_spl_test5+0x0): undefined reference to `_u_boot_list_2_driver_2_sandbox_spl_test' - /usr/bin/ld: dts/dt-uclass.o:(.u_boot_list_2_uclass_2_misc+0x8): + /usr/bin/ld: dts/dt-uclass.o:(__u_boot_list_2_uclass_2_misc+0x8): undefined reference to `_u_boot_list_2_uclass_driver_2_misc' The first one indicates that the device cannot find its driver. This means that diff --git a/include/linker_lists.h b/include/linker_lists.h index 0575164ce4c..d3da9d44e85 100644 --- a/include/linker_lists.h +++ b/include/linker_lists.h @@ -70,7 +70,7 @@ #define ll_entry_declare(_type, _name, _list) \ _type _u_boot_list_2_##_list##_2_##_name __aligned(4) \ __attribute__((unused)) \ - __section(".u_boot_list_2_"#_list"_2_"#_name) + __section("__u_boot_list_2_"#_list"_2_"#_name) /** * ll_entry_declare_list() - Declare a list of link-generated array entries @@ -93,7 +93,7 @@ #define ll_entry_declare_list(_type, _name, _list) \ _type _u_boot_list_2_##_list##_2_##_name[] __aligned(4) \ __attribute__((unused)) \ - __section(".u_boot_list_2_"#_list"_2_"#_name) + __section("__u_boot_list_2_"#_list"_2_"#_name) /* * We need a 0-byte-size type for iterator symbols, and the compiler @@ -110,7 +110,7 @@ * @_list: Name of the list in which this entry is placed * * This function returns ``(_type *)`` pointer to the very first entry of a - * linker-generated array placed into subsection of .u_boot_list section + * linker-generated array placed into subsection of __u_boot_list section * specified by _list argument. * * Since this macro defines an array start symbol, its leftmost index @@ -126,7 +126,7 @@ ({ \ static char start[0] __aligned(CONFIG_LINKER_LIST_ALIGN) \ __attribute__((unused)) \ - __section(".u_boot_list_2_"#_list"_1"); \ + __section("__u_boot_list_2_"#_list"_1"); \ (_type *)&start; \ }) @@ -137,7 +137,7 @@ * (with underscores instead of dots) * * This function returns ``(_type *)`` pointer after the very last entry of - * a linker-generated array placed into subsection of .u_boot_list + * a linker-generated array placed into subsection of __u_boot_list * section specified by _list argument. * * Since this macro defines an array end symbol, its leftmost index @@ -152,7 +152,7 @@ #define ll_entry_end(_type, _list) \ ({ \ static char end[0] __aligned(4) __attribute__((unused)) \ - __section(".u_boot_list_2_"#_list"_3"); \ + __section("__u_boot_list_2_"#_list"_3"); \ (_type *)&end; \ }) /** @@ -161,7 +161,7 @@ * @_list: Name of the list of which the number of elements is computed * * This function returns the number of elements of a linker-generated array - * placed into subsection of .u_boot_list section specified by _list + * placed into subsection of __u_boot_list section specified by _list * argument. The result is of an unsigned int type. * * Example: @@ -246,7 +246,7 @@ #define ll_start(_type) \ ({ \ static char start[0] __aligned(4) __attribute__((unused)) \ - __section(".u_boot_list_1"); \ + __section("__u_boot_list_1"); \ (_type *)&start; \ }) @@ -269,7 +269,7 @@ #define ll_end(_type) \ ({ \ static char end[0] __aligned(4) __attribute__((unused)) \ - __section(".u_boot_list_3"); \ + __section("__u_boot_list_3"); \ (_type *)&end; \ }) diff --git a/tools/mips-relocs.c b/tools/mips-relocs.c index 625258085b6..5db610f5c77 100644 --- a/tools/mips-relocs.c +++ b/tools/mips-relocs.c @@ -312,7 +312,7 @@ int main(int argc, char *argv[]) goto out_free_relocs; } - rel_pfx = is_64 ? ".rela." : ".rel."; + rel_pfx = is_64 ? ".rela" : ".rel"; for (i = 0; i < ehdr_field(e_shnum); i++) { sh_type = shdr_field(i, sh_type); @@ -321,10 +321,11 @@ int main(int argc, char *argv[]) sh_name = shstr(shdr_field(i, sh_name)); if (strncmp(sh_name, rel_pfx, strlen(rel_pfx))) { - if (strcmp(sh_name, ".rel") && strcmp(sh_name, ".rel.dyn")) - fprintf(stderr, "WARNING: Unexpected reloc section name '%s'\n", sh_name); + fprintf(stderr, "WARNING: Unexpected reloc section name '%s'\n", sh_name); continue; } + if (!strcmp(sh_name, ".rel") || !strcmp(sh_name, ".rel.dyn")) + continue; /* * Skip reloc sections which either don't correspond to another @@ -334,7 +335,7 @@ int main(int argc, char *argv[]) */ skip = true; for (j = 0; j < ehdr_field(e_shnum); j++) { - if (strcmp(&sh_name[strlen(rel_pfx) - 1], shstr(shdr_field(j, sh_name)))) + if (strcmp(&sh_name[strlen(rel_pfx)], shstr(shdr_field(j, sh_name)))) continue; skip = !(shdr_field(j, sh_flags) & SHF_ALLOC); -- GitLab From 1e578ed20c733e7b2b6ac1e01a4e33338db45b5a Mon Sep 17 00:00:00 2001 From: Andrew Scull Date: Mon, 30 May 2022 10:00:05 +0000 Subject: [PATCH 243/581] sandbox: Add support for Address Sanitizer Add CONFIG_ASAN to build with the Address Sanitizer. This only works with the sandbox so the config is likewise dependent. The resulting executable will have ASAN instrumentation, including the leak detector that can be disabled with the ASAN_OPTIONS environment variable: ASAN_OPTIONS=detect_leaks=0 ./u-boot Since u-boot uses its own dlmalloc, dynamic allocations aren't automatically instrumented, but stack variables and globals are. Instrumentation could be added to dlmalloc to poison and unpoison memory as it is allocated and deallocated, and to introduce redzones between allocations. Alternatively, the sandbox may be able to play games with the system allocator and somehow still keep the required memory abstraction. No effort to address dynamic allocation is made by this patch. The config is not yet enabled for any targets by default. Signed-off-by: Andrew Scull Reviewed-by: Simon Glass --- Kconfig | 7 +++++++ arch/sandbox/config.mk | 14 ++++++++++++-- 2 files changed, 19 insertions(+), 2 deletions(-) diff --git a/Kconfig b/Kconfig index 429b5f9a70d..6b97a0236f8 100644 --- a/Kconfig +++ b/Kconfig @@ -154,6 +154,13 @@ config CC_COVERAGE Enabling this option will pass "--coverage" to gcc to compile and link code instrumented for coverage analysis. +config ASAN + bool "Enable AddressSanitizer" + depends on SANDBOX + help + Enables AddressSanitizer to discover out-of-bounds accesses, + use-after-free, double-free and memory leaks. + config CC_HAS_ASM_INLINE def_bool $(success,echo 'void foo(void) { asm inline (""); }' | $(CC) -x c - -c -o /dev/null) diff --git a/arch/sandbox/config.mk b/arch/sandbox/config.mk index f3d3af66116..410603252ee 100644 --- a/arch/sandbox/config.mk +++ b/arch/sandbox/config.mk @@ -15,8 +15,16 @@ PLATFORM_LIBS += $(shell $(SDL_CONFIG) --libs) PLATFORM_CPPFLAGS += $(shell $(SDL_CONFIG) --cflags) endif +SANITIZERS := +ifdef CONFIG_ASAN +SANITIZERS += -fsanitize=address +endif +KBUILD_CFLAGS += $(SANITIZERS) + cmd_u-boot__ = $(CC) -o $@ -Wl,-T u-boot.lds $(u-boot-init) \ - $(KBUILD_LDFLAGS:%=-Wl,%)$(LTO_FINAL_LDFLAGS) \ + $(KBUILD_LDFLAGS:%=-Wl,%) \ + $(SANITIZERS) \ + $(LTO_FINAL_LDFLAGS) \ -Wl,--whole-archive \ $(u-boot-main) \ $(u-boot-keep-syms-lto) \ @@ -24,7 +32,9 @@ cmd_u-boot__ = $(CC) -o $@ -Wl,-T u-boot.lds $(u-boot-init) \ $(PLATFORM_LIBS) -Wl,-Map -Wl,u-boot.map cmd_u-boot-spl = (cd $(obj) && $(CC) -o $(SPL_BIN) -Wl,-T u-boot-spl.lds \ - $(KBUILD_LDFLAGS:%=-Wl,%) $(LTO_FINAL_LDFLAGS) \ + $(KBUILD_LDFLAGS:%=-Wl,%) \ + $(SANITIZERS) \ + $(LTO_FINAL_LDFLAGS) \ $(patsubst $(obj)/%,%,$(u-boot-spl-init)) \ -Wl,--whole-archive \ $(patsubst $(obj)/%,%,$(u-boot-spl-main)) \ -- GitLab From 791de336b630709a92ca6f99285c327eadb93165 Mon Sep 17 00:00:00 2001 From: Andrew Scull Date: Mon, 30 May 2022 10:00:06 +0000 Subject: [PATCH 244/581] test/py: test_stackprotector: Disable for ASAN The stack protector test intentionally overflows a buffer in order to corrupt the stack canary so that it can test that the corruption is detected as expected. However, this is incompatible with ASAN, which detects the buffer overflow and interrupts the test, so disable the test for such configurations. Signed-off-by: Andrew Scull --- test/py/tests/test_stackprotector.py | 1 + 1 file changed, 1 insertion(+) diff --git a/test/py/tests/test_stackprotector.py b/test/py/tests/test_stackprotector.py index b009437e5e0..b87392c54ff 100644 --- a/test/py/tests/test_stackprotector.py +++ b/test/py/tests/test_stackprotector.py @@ -5,6 +5,7 @@ import pytest import signal @pytest.mark.buildconfigspec('cmd_stackprotector_test') +@pytest.mark.notbuildconfigspec('asan') def test_stackprotector(u_boot_console): """Test that the stackprotector function works.""" -- GitLab From eabc4e2980b25f16e6d2805077aaa6ecbc074d63 Mon Sep 17 00:00:00 2001 From: Andrew Scull Date: Mon, 30 May 2022 10:00:07 +0000 Subject: [PATCH 245/581] CI: Azure: Build with ASAN enabled In order to prevent build regressions with ASAN, add the builds to CI. The longer term objective will be to enabled test targets with ASAN enabled, but there are too many at the moment. Signed-off-by: Andrew Scull --- .azure-pipelines.yml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index ad540ea6353..915d5115b12 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -473,6 +473,12 @@ stages: BUILDMAN: "imx8" keystone2_keystone3: BUILDMAN: "k2 k3" + sandbox_asan: + BUILDMAN: "sandbox" + OVERRIDE: "-a ASAN" + sandbox_clang_asan: + BUILDMAN: "sandbox" + OVERRIDE: "-O clang-13 -a ASAN" samsung_socfpga: BUILDMAN: "samsung socfpga" sun4i: -- GitLab From 3f807c6b81219555ac964f2623cfcbd1103151fa Mon Sep 17 00:00:00 2001 From: Andrew Scull Date: Mon, 30 May 2022 10:00:08 +0000 Subject: [PATCH 246/581] fuzzing_engine: Add fuzzing engine uclass This new class of device will provide fuzzing inputs from a fuzzing engine. Signed-off-by: Andrew Scull Reviewed-by: Simon Glass --- drivers/Kconfig | 2 ++ drivers/Makefile | 1 + drivers/fuzz/Kconfig | 9 +++++ drivers/fuzz/Makefile | 7 ++++ drivers/fuzz/fuzzing_engine-uclass.c | 28 +++++++++++++++ include/dm/uclass-id.h | 1 + include/fuzzing_engine.h | 51 ++++++++++++++++++++++++++++ 7 files changed, 99 insertions(+) create mode 100644 drivers/fuzz/Kconfig create mode 100644 drivers/fuzz/Makefile create mode 100644 drivers/fuzz/fuzzing_engine-uclass.c create mode 100644 include/fuzzing_engine.h diff --git a/drivers/Kconfig b/drivers/Kconfig index b26ca8cf70c..8b6fead3510 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -40,6 +40,8 @@ source "drivers/fastboot/Kconfig" source "drivers/firmware/Kconfig" +source "drivers/fuzz/Kconfig" + source "drivers/fpga/Kconfig" source "drivers/gpio/Kconfig" diff --git a/drivers/Makefile b/drivers/Makefile index 67c8af74424..d63fd1c04d1 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -115,6 +115,7 @@ obj-$(CONFIG_W1) += w1/ obj-$(CONFIG_W1_EEPROM) += w1-eeprom/ obj-$(CONFIG_MACH_PIC32) += ddr/microchip/ +obj-$(CONFIG_FUZZ) += fuzz/ obj-$(CONFIG_DM_HWSPINLOCK) += hwspinlock/ obj-$(CONFIG_DM_RNG) += rng/ endif diff --git a/drivers/fuzz/Kconfig b/drivers/fuzz/Kconfig new file mode 100644 index 00000000000..a03120f63ab --- /dev/null +++ b/drivers/fuzz/Kconfig @@ -0,0 +1,9 @@ +config DM_FUZZING_ENGINE + bool "Driver support for fuzzing engine devices" + depends on DM + help + Enable driver model for fuzzing engine devices. This interface is + used to get successive inputs from a fuzzing engine that aims to + explore different code paths in a fuzz test. The fuzzing engine may + be instrumenting the execution in order to more effectively generate + inputs that explore different code paths. diff --git a/drivers/fuzz/Makefile b/drivers/fuzz/Makefile new file mode 100644 index 00000000000..acd894999c9 --- /dev/null +++ b/drivers/fuzz/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (c) 2022 Google, Inc. +# Written by Andrew Scull +# + +obj-$(CONFIG_DM_FUZZING_ENGINE) += fuzzing_engine-uclass.o diff --git a/drivers/fuzz/fuzzing_engine-uclass.c b/drivers/fuzz/fuzzing_engine-uclass.c new file mode 100644 index 00000000000..b16f1c4cfb7 --- /dev/null +++ b/drivers/fuzz/fuzzing_engine-uclass.c @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2022 Google, Inc. + * Written by Andrew Scull + */ + +#define LOG_CATEGORY UCLASS_FUZZING_ENGINE + +#include +#include +#include + +int dm_fuzzing_engine_get_input(struct udevice *dev, + const uint8_t **data, + size_t *size) +{ + const struct dm_fuzzing_engine_ops *ops = device_get_ops(dev); + + if (!ops->get_input) + return -ENOSYS; + + return ops->get_input(dev, data, size); +} + +UCLASS_DRIVER(fuzzing_engine) = { + .name = "fuzzing_engine", + .id = UCLASS_FUZZING_ENGINE, +}; diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index 3ba69ad9a08..a432e438716 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -56,6 +56,7 @@ enum uclass_id { UCLASS_ETH, /* Ethernet device */ UCLASS_ETH_PHY, /* Ethernet PHY device */ UCLASS_FIRMWARE, /* Firmware */ + UCLASS_FUZZING_ENGINE, /* Fuzzing engine */ UCLASS_FS_FIRMWARE_LOADER, /* Generic loader */ UCLASS_GPIO, /* Bank of general-purpose I/O pins */ UCLASS_HASH, /* Hash device */ diff --git a/include/fuzzing_engine.h b/include/fuzzing_engine.h new file mode 100644 index 00000000000..357346e93df --- /dev/null +++ b/include/fuzzing_engine.h @@ -0,0 +1,51 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2022 Google, Inc. + * Written by Andrew Scull + */ + +#ifndef __FUZZING_ENGINE_H +#define __FUZZING_ENGINE_H + +struct udevice; + +/** + * dm_fuzzing_engine_get_input() - get an input from the fuzzing engine device + * + * The function will return a pointer to the input data and the size of the + * data pointed to. The pointer will remain valid until the next invocation of + * this function. + * + * @dev: fuzzing engine device + * @data: output pointer to input data + * @size output size of input data + * Return: 0 if OK, -ve on error + */ +int dm_fuzzing_engine_get_input(struct udevice *dev, + const uint8_t **data, + size_t *size); + +/** + * struct dm_fuzzing_engine_ops - operations for the fuzzing engine uclass + * + * This contains the functions implemented by a fuzzing engine device. + */ +struct dm_fuzzing_engine_ops { + /** + * @get_input() - get an input + * + * The function will return a pointer to the input data and the size of + * the data pointed to. The pointer will remain valid until the next + * invocation of this function. + * + * @get_input.dev: fuzzing engine device + * @get_input.data: output pointer to input data + * @get_input.size output size of input data + * @get_input.Return: 0 if OK, -ve on error + */ + int (*get_input)(struct udevice *dev, + const uint8_t **data, + size_t *size); +}; + +#endif /* __FUZZING_ENGINE_H */ -- GitLab From 36f641c54e1ad7f08552fe51f9826c1a27b662f9 Mon Sep 17 00:00:00 2001 From: Andrew Scull Date: Mon, 30 May 2022 10:00:09 +0000 Subject: [PATCH 247/581] test: fuzz: Add framework for fuzzing Add the basic infrastructure for declaring fuzz tests and a command to invoke them. Signed-off-by: Andrew Scull Reviewed-by: Simon Glass --- Kconfig | 9 +++++ include/test/fuzz.h | 51 +++++++++++++++++++++++++++ test/Makefile | 1 + test/fuzz/Makefile | 7 ++++ test/fuzz/cmd_fuzz.c | 82 ++++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 150 insertions(+) create mode 100644 include/test/fuzz.h create mode 100644 test/fuzz/Makefile create mode 100644 test/fuzz/cmd_fuzz.c diff --git a/Kconfig b/Kconfig index 6b97a0236f8..991b260182e 100644 --- a/Kconfig +++ b/Kconfig @@ -161,6 +161,15 @@ config ASAN Enables AddressSanitizer to discover out-of-bounds accesses, use-after-free, double-free and memory leaks. +config FUZZ + bool "Enable fuzzing" + depends on CC_IS_CLANG + depends on DM_FUZZING_ENGINE + select ASAN + help + Enables the fuzzing infrastructure to generate fuzzing data and run + fuzz tests. + config CC_HAS_ASM_INLINE def_bool $(success,echo 'void foo(void) { asm inline (""); }' | $(CC) -x c - -c -o /dev/null) diff --git a/include/test/fuzz.h b/include/test/fuzz.h new file mode 100644 index 00000000000..d4c57540eb3 --- /dev/null +++ b/include/test/fuzz.h @@ -0,0 +1,51 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2022 Google, Inc. + * Written by Andrew Scull + */ + +#ifndef __TEST_FUZZ_H +#define __TEST_FUZZ_H + +#include +#include + +/** + * struct fuzz_test - Information about a fuzz test + * + * @name: Name of fuzz test + * @func: Function to call to perform fuzz test on an input + * @flags: Flags indicate pre-conditions for fuzz test + */ +struct fuzz_test { + const char *name; + int (*func)(const uint8_t * data, size_t size); + int flags; +}; + +/** + * FUZZ_TEST() - register a fuzz test + * + * The fuzz test function must return 0 as other values are reserved for future + * use. + * + * @_name: the name of the fuzz test function + * @_flags: an integer field that can be evaluated by the fuzzer + * implementation + */ +#define FUZZ_TEST(_name, _flags) \ + ll_entry_declare(struct fuzz_test, _name, fuzz_tests) = { \ + .name = #_name, \ + .func = _name, \ + .flags = _flags, \ + } + +/** Get the start of the list of fuzz tests */ +#define FUZZ_TEST_START() \ + ll_entry_start(struct fuzz_test, fuzz_tests) + +/** Get the number of elements in the list of fuzz tests */ +#define FUZZ_TEST_COUNT() \ + ll_entry_count(struct fuzz_test, fuzz_tests) + +#endif /* __TEST_FUZZ_H */ diff --git a/test/Makefile b/test/Makefile index abd605a4351..1dfd5677440 100644 --- a/test/Makefile +++ b/test/Makefile @@ -16,6 +16,7 @@ obj-$(CONFIG_$(SPL_)CMDLINE) += cmd_ut.o obj-$(CONFIG_$(SPL_)CMDLINE) += command_ut.o obj-$(CONFIG_$(SPL_)UT_COMPRESSION) += compression.o obj-y += dm/ +obj-$(CONFIG_FUZZ) += fuzz/ obj-$(CONFIG_$(SPL_)CMDLINE) += print_ut.o obj-$(CONFIG_$(SPL_)CMDLINE) += str_ut.o obj-$(CONFIG_UT_TIME) += time_ut.o diff --git a/test/fuzz/Makefile b/test/fuzz/Makefile new file mode 100644 index 00000000000..03eeeeb4979 --- /dev/null +++ b/test/fuzz/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (c) 2022 Google, Inc. +# Written by Andrew Scull +# + +obj-$(CONFIG_$(SPL_)CMDLINE) += cmd_fuzz.o diff --git a/test/fuzz/cmd_fuzz.c b/test/fuzz/cmd_fuzz.c new file mode 100644 index 00000000000..0cc01dc199c --- /dev/null +++ b/test/fuzz/cmd_fuzz.c @@ -0,0 +1,82 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2022 Google, Inc. + * Written by Andrew Scull + */ + +#include +#include +#include +#include +#include + +static struct fuzz_test *find_fuzz_test(const char *name) +{ + struct fuzz_test *fuzzer = FUZZ_TEST_START(); + size_t count = FUZZ_TEST_COUNT(); + size_t i; + + for (i = 0; i < count; ++i) { + if (strcmp(name, fuzzer->name) == 0) + return fuzzer; + ++fuzzer; + } + + return NULL; +} + +static struct udevice *find_fuzzing_engine(void) +{ + struct udevice *dev; + + if (uclass_first_device(UCLASS_FUZZING_ENGINE, &dev)) + return NULL; + + return dev; +} + +static int do_fuzz(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) +{ + struct fuzz_test *fuzzer; + struct udevice *dev; + + if (argc != 2) + return CMD_RET_USAGE; + + fuzzer = find_fuzz_test(argv[1]); + if (!fuzzer) { + printf("Could not find fuzzer: %s\n", argv[1]); + return 1; + } + + dev = find_fuzzing_engine(); + if (!dev) { + puts("No fuzzing engine available\n"); + return 1; + } + + while (1) { + const uint8_t *data; + size_t size; + + if (dm_fuzzing_engine_get_input(dev, &data, &size)) { + puts("Fuzzing engine failed\n"); + return 1; + } + + fuzzer->func(data, size); + } + + return 1; +} + +#ifdef CONFIG_SYS_LONGHELP +static char fuzz_help_text[] = + "[fuzz-test-name] - execute the named fuzz test\n" + ; +#endif /* CONFIG_SYS_LONGHELP */ + +U_BOOT_CMD( + fuzz, CONFIG_SYS_MAXARGS, 1, do_fuzz, + "fuzz tests", fuzz_help_text +); -- GitLab From 001c39a196c2f4414ddab8713fa113dd06a028eb Mon Sep 17 00:00:00 2001 From: Andrew Scull Date: Mon, 30 May 2022 10:00:10 +0000 Subject: [PATCH 248/581] sandbox: Decouple program entry from sandbox init Move the program's entry point to os.c, in preparation for a separate fuzzing entry point to be added. Signed-off-by: Andrew Scull Reviewed-by: Simon Glass --- arch/sandbox/cpu/os.c | 6 ++++++ arch/sandbox/cpu/start.c | 2 +- arch/sandbox/include/asm/main.h | 18 ++++++++++++++++++ 3 files changed, 25 insertions(+), 1 deletion(-) create mode 100644 arch/sandbox/include/asm/main.h diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c index 5ea54179176..f229d1621a4 100644 --- a/arch/sandbox/cpu/os.c +++ b/arch/sandbox/cpu/os.c @@ -27,6 +27,7 @@ #include #include +#include #include #include #include @@ -1001,3 +1002,8 @@ void os_relaunch(char *argv[]) execv(argv[0], argv); os_exit(1); } + +int main(int argc, char *argv[]) +{ + return sandbox_main(argc, argv); +} diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c index 0f5a87309d2..90a84e93c79 100644 --- a/arch/sandbox/cpu/start.c +++ b/arch/sandbox/cpu/start.c @@ -453,7 +453,7 @@ void sandbox_reset(void) os_relaunch(os_argv); } -int main(int argc, char *argv[]) +int sandbox_main(int argc, char *argv[]) { struct sandbox_state *state; void * text_base; diff --git a/arch/sandbox/include/asm/main.h b/arch/sandbox/include/asm/main.h new file mode 100644 index 00000000000..7a2f0d3a8d5 --- /dev/null +++ b/arch/sandbox/include/asm/main.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2022 Google, Inc. + * Written by Andrew Scull + */ + +#ifndef __ASM_SANDBOX_MAIN_H +#define __ASM_SANDBOX_MAIN_H + +/** + * sandbox_main() - main entrypoint for sandbox + * + * @argc: the number of arguments passed to the program + * @argv: array of argc+1 pointers, of which the last one is null + */ +int sandbox_main(int argc, char *argv[]); + +#endif /* __ASM_SANDBOX_MAIN_H */ -- GitLab From d9962b12f200156238a4c825c0b540a203c72042 Mon Sep 17 00:00:00 2001 From: Andrew Scull Date: Mon, 30 May 2022 10:00:11 +0000 Subject: [PATCH 249/581] sandbox: Add libfuzzer integration Add an implementation of LLVMFuzzerTestOneInput() that starts the sandbox on a secondary thread and exposes a function to synchronize the generation of fuzzing inputs with their consumption by the sandbox. Signed-off-by: Andrew Scull Reviewed-by: Simon Glass --- arch/sandbox/config.mk | 3 + arch/sandbox/cpu/os.c | 70 +++++++++++++++++++++++ arch/sandbox/include/asm/fuzzing_engine.h | 25 ++++++++ 3 files changed, 98 insertions(+) create mode 100644 arch/sandbox/include/asm/fuzzing_engine.h diff --git a/arch/sandbox/config.mk b/arch/sandbox/config.mk index 410603252ee..3e2c7f9ebe5 100644 --- a/arch/sandbox/config.mk +++ b/arch/sandbox/config.mk @@ -19,6 +19,9 @@ SANITIZERS := ifdef CONFIG_ASAN SANITIZERS += -fsanitize=address endif +ifdef CONFIG_FUZZ +SANITIZERS += -fsanitize=fuzzer +endif KBUILD_CFLAGS += $(SANITIZERS) cmd_u-boot__ = $(CC) -o $@ -Wl,-T u-boot.lds $(u-boot-init) \ diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c index f229d1621a4..3b230606a97 100644 --- a/arch/sandbox/cpu/os.c +++ b/arch/sandbox/cpu/os.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -26,6 +27,7 @@ #include #include +#include #include #include #include @@ -1003,7 +1005,75 @@ void os_relaunch(char *argv[]) os_exit(1); } + +#ifdef CONFIG_FUZZ +static void *fuzzer_thread(void * ptr) +{ + char cmd[64]; + char *argv[5] = {"./u-boot", "-T", "-c", cmd, NULL}; + const char *fuzz_test; + + /* Find which test to run from an environment variable. */ + fuzz_test = getenv("UBOOT_SB_FUZZ_TEST"); + if (!fuzz_test) + os_abort(); + + snprintf(cmd, sizeof(cmd), "fuzz %s", fuzz_test); + + sandbox_main(4, argv); + os_abort(); + return NULL; +} + +static bool fuzzer_initialized = false; +static pthread_mutex_t fuzzer_mutex = PTHREAD_MUTEX_INITIALIZER; +static pthread_cond_t fuzzer_cond = PTHREAD_COND_INITIALIZER; +static const uint8_t *fuzzer_data; +static size_t fuzzer_size; + +int sandbox_fuzzing_engine_get_input(const uint8_t **data, size_t *size) +{ + if (!fuzzer_initialized) + return -ENOSYS; + + /* Tell the main thread we need new inputs then wait for them. */ + pthread_mutex_lock(&fuzzer_mutex); + pthread_cond_signal(&fuzzer_cond); + pthread_cond_wait(&fuzzer_cond, &fuzzer_mutex); + *data = fuzzer_data; + *size = fuzzer_size; + pthread_mutex_unlock(&fuzzer_mutex); + return 0; +} + +int LLVMFuzzerTestOneInput(const uint8_t *data, size_t size) +{ + static pthread_t tid; + + pthread_mutex_lock(&fuzzer_mutex); + + /* Initialize the sandbox on another thread. */ + if (!fuzzer_initialized) { + fuzzer_initialized = true; + if (pthread_create(&tid, NULL, fuzzer_thread, NULL)) + os_abort(); + pthread_cond_wait(&fuzzer_cond, &fuzzer_mutex); + } + + /* Hand over the input. */ + fuzzer_data = data; + fuzzer_size = size; + pthread_cond_signal(&fuzzer_cond); + + /* Wait for the inputs to be finished with. */ + pthread_cond_wait(&fuzzer_cond, &fuzzer_mutex); + pthread_mutex_unlock(&fuzzer_mutex); + + return 0; +} +#else int main(int argc, char *argv[]) { return sandbox_main(argc, argv); } +#endif diff --git a/arch/sandbox/include/asm/fuzzing_engine.h b/arch/sandbox/include/asm/fuzzing_engine.h new file mode 100644 index 00000000000..cf6396363bb --- /dev/null +++ b/arch/sandbox/include/asm/fuzzing_engine.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2022 Google, Inc. + * Written by Andrew Scull + */ + +#ifndef __ASM_FUZZING_ENGINE_H +#define __ASM_FUZZING_ENGINE_H + +/** Function to get fuzzing engine input data. */ +/** + * sandbox_fuzzing_engine_get_input() - get an input from the sandbox fuzzing + * engine + * + * The function will return a pointer to the input data and the size of the + * data pointed to. The pointer will remain valid until the next invocation of + * this function. + * + * @data: output pointer to input data + * @size output size of input data + * Return: 0 if OK, -ve on error + */ +int sandbox_fuzzing_engine_get_input(const uint8_t **data, size_t *size); + +#endif /* __ASM_FUZZING_ENGINE_H */ -- GitLab From 0518e7a28fdbaf27cda7a43d1a52d457536e1d9b Mon Sep 17 00:00:00 2001 From: Andrew Scull Date: Mon, 30 May 2022 10:00:12 +0000 Subject: [PATCH 250/581] sandbox: Implement fuzzing engine driver Add a fuzzing engine driver for the sandbox to take inputs from libfuzzer and expose them to the fuzz tests. Signed-off-by: Andrew Scull --- arch/Kconfig | 2 ++ arch/sandbox/dts/test.dts | 4 +++ drivers/fuzz/Kconfig | 16 +++++++++--- drivers/fuzz/Makefile | 1 + drivers/fuzz/sandbox_fuzzing_engine.c | 35 +++++++++++++++++++++++++++ 5 files changed, 54 insertions(+), 4 deletions(-) create mode 100644 drivers/fuzz/sandbox_fuzzing_engine.c diff --git a/arch/Kconfig b/arch/Kconfig index b396263e3b0..eab89f255b6 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -135,6 +135,7 @@ config SANDBOX select BZIP2 select CMD_POWEROFF select DM + select DM_FUZZING_ENGINE select DM_GPIO select DM_I2C select DM_KEYBOARD @@ -170,6 +171,7 @@ config SANDBOX imply CRC32_VERIFY imply FAT_WRITE imply FIRMWARE + imply FUZZING_ENGINE_SANDBOX imply HASH_VERIFY imply LZMA imply TEE diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index e068d0c8c56..0194b9b30ef 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -92,6 +92,10 @@ }; }; + fuzzing-engine { + compatible = "sandbox,fuzzing-engine"; + }; + reboot-mode0 { compatible = "reboot-mode-gpio"; gpios = <&gpio_c 0 GPIO_ACTIVE_HIGH>, <&gpio_c 1 GPIO_ACTIVE_HIGH>; diff --git a/drivers/fuzz/Kconfig b/drivers/fuzz/Kconfig index a03120f63ab..6311385222f 100644 --- a/drivers/fuzz/Kconfig +++ b/drivers/fuzz/Kconfig @@ -3,7 +3,15 @@ config DM_FUZZING_ENGINE depends on DM help Enable driver model for fuzzing engine devices. This interface is - used to get successive inputs from a fuzzing engine that aims to - explore different code paths in a fuzz test. The fuzzing engine may - be instrumenting the execution in order to more effectively generate - inputs that explore different code paths. + used to get fuzzing inputs from a fuzzing engine. + +if DM_FUZZING_ENGINE + +config FUZZING_ENGINE_SANDBOX + bool "Sanbox fuzzing engine" + depends on SANDBOX + default y + help + Enable fuzzing engine for sandbox. + +endif diff --git a/drivers/fuzz/Makefile b/drivers/fuzz/Makefile index acd894999c9..073743ba946 100644 --- a/drivers/fuzz/Makefile +++ b/drivers/fuzz/Makefile @@ -5,3 +5,4 @@ # obj-$(CONFIG_DM_FUZZING_ENGINE) += fuzzing_engine-uclass.o +obj-$(CONFIG_FUZZING_ENGINE_SANDBOX) += sandbox_fuzzing_engine.o diff --git a/drivers/fuzz/sandbox_fuzzing_engine.c b/drivers/fuzz/sandbox_fuzzing_engine.c new file mode 100644 index 00000000000..ebb938e5ba8 --- /dev/null +++ b/drivers/fuzz/sandbox_fuzzing_engine.c @@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2022 Google, Inc. + * Written by Andrew Scull + */ + +#include +#include +#include +#include + +static int get_input(struct udevice *dev, + const uint8_t **data, + size_t *size) +{ + return sandbox_fuzzing_engine_get_input(data, size); +} + +static const struct dm_fuzzing_engine_ops sandbox_fuzzing_engine_ops = { + .get_input = get_input, +}; + +static const struct udevice_id sandbox_fuzzing_engine_match[] = { + { + .compatible = "sandbox,fuzzing-engine", + }, + {}, +}; + +U_BOOT_DRIVER(sandbox_fuzzing_engine) = { + .name = "sandbox-fuzzing-engine", + .id = UCLASS_FUZZING_ENGINE, + .of_match = sandbox_fuzzing_engine_match, + .ops = &sandbox_fuzzing_engine_ops, +}; -- GitLab From a73f3ba91f15e08d6a7ec8cf0408aed517d22bb1 Mon Sep 17 00:00:00 2001 From: Andrew Scull Date: Mon, 30 May 2022 10:00:13 +0000 Subject: [PATCH 251/581] fuzz: virtio: Add fuzzer for vring Add a fuzzer to test the vring handling code against unexpected mutations from the virtio device. After building the sandbox with CONFIG_FUZZ=y, the fuzzer can be invoked with by: UBOOT_SB_FUZZ_TEST=fuzz_vring ./u-boot This fuzzer finds unvalidated inputs in the vring driver that allow a buggy or malicious device to make the driver chase wild pointers. Signed-off-by: Andrew Scull --- test/fuzz/Makefile | 1 + test/fuzz/virtio.c | 72 ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 73 insertions(+) create mode 100644 test/fuzz/virtio.c diff --git a/test/fuzz/Makefile b/test/fuzz/Makefile index 03eeeeb4979..663b79ce80b 100644 --- a/test/fuzz/Makefile +++ b/test/fuzz/Makefile @@ -5,3 +5,4 @@ # obj-$(CONFIG_$(SPL_)CMDLINE) += cmd_fuzz.o +obj-$(CONFIG_VIRTIO_SANDBOX) += virtio.o diff --git a/test/fuzz/virtio.c b/test/fuzz/virtio.c new file mode 100644 index 00000000000..e5363d5638e --- /dev/null +++ b/test/fuzz/virtio.c @@ -0,0 +1,72 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2022 Google, Inc. + * Written by Andrew Scull + */ + +#include +#include +#include +#include +#include + +static int fuzz_vring(const uint8_t *data, size_t size) +{ + struct udevice *bus, *dev; + struct virtio_dev_priv *uc_priv; + struct virtqueue *vq; + struct virtio_sg sg[2]; + struct virtio_sg *sgs[2]; + unsigned int len; + u8 buffer[2][32]; + + /* hackily hardcode vring sizes */ + size_t num = 4; + size_t desc_size = (sizeof(struct vring_desc) * num); + size_t avail_size = (3 + num) * sizeof(u16); + size_t used_size = (3 * sizeof(u16)) + (sizeof(struct vring_used_elem) * num); + + if (size < (desc_size + avail_size + used_size)) + return 0; + + /* check probe success */ + if (uclass_first_device(UCLASS_VIRTIO, &bus) || !bus) + panic("Could not find virtio bus\n"); + + /* check the child virtio-rng device is bound */ + if (device_find_first_child(bus, &dev) || !dev) + panic("Could not find virtio device\n"); + + /* + * fake the virtio device probe by filling in uc_priv->vdev + * which is used by virtio_find_vqs/virtio_del_vqs. + */ + uc_priv = dev_get_uclass_priv(bus); + uc_priv->vdev = dev; + + /* prepare the scatter-gather buffer */ + sg[0].addr = buffer[0]; + sg[0].length = sizeof(buffer[0]); + sg[1].addr = buffer[1]; + sg[1].length = sizeof(buffer[1]); + sgs[0] = &sg[0]; + sgs[1] = &sg[1]; + + if (virtio_find_vqs(dev, 1, &vq)) + panic("Could not find vqs\n"); + if (virtqueue_add(vq, sgs, 0, 1)) + panic("Could not add to virtqueue\n"); + /* Simulate device writing to vring */ + memcpy(vq->vring.desc, data, desc_size); + memcpy(vq->vring.avail, data + desc_size, avail_size); + memcpy(vq->vring.used, data + desc_size + avail_size, used_size); + /* Make sure there is a response */ + if (vq->vring.used->idx == 0) + vq->vring.used->idx = 1; + virtqueue_get_buf(vq, &len); + if (virtio_del_vqs(dev)) + panic("Could not delete vqs\n"); + + return 0; +} +FUZZ_TEST(fuzz_vring, 0); -- GitLab From 593eac9805de7c0c5744da9c1a86d736c083d8b9 Mon Sep 17 00:00:00 2001 From: Etienne Carriere Date: Tue, 31 May 2022 18:09:16 +0200 Subject: [PATCH 252/581] firmware: scmi: optee: use TEE shared memory for SCMI messages Changes implementation when using TEE dynamically allocated shared memory to synchronize with the Linux implementation where the legacy SMT protocol cannot be used with such memory since it is expected from device mapped memory whereas OP-TEE shared memory is cached and hence should not be accessed using memcpy_toio()/memcpy_fromio(). This change implements the MSG shared memory protocol introduced in Linux [1]. The protocol uses a simplified SMT header of 32bit named MSG_SMT to carry SCMI protocol information and uses side channel means to carry exchanged buffer size information, as TEE invocation API parameters when used in the SCMI OP-TEE transport. Link: [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f301bba0ca7392d16a6ea4f1d264a91f1fadea1a Signed-off-by: Etienne Carriere --- drivers/firmware/scmi/optee_agent.c | 68 ++++++++++++++++++++++------- drivers/firmware/scmi/smt.c | 53 +++++++++++++++++++++- drivers/firmware/scmi/smt.h | 45 ++++++++++++++++++- 3 files changed, 149 insertions(+), 17 deletions(-) diff --git a/drivers/firmware/scmi/optee_agent.c b/drivers/firmware/scmi/optee_agent.c index 1f265922343..e76f738bbaf 100644 --- a/drivers/firmware/scmi/optee_agent.c +++ b/drivers/firmware/scmi/optee_agent.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2020-2021 Linaro Limited. + * Copyright (C) 2020-2022 Linaro Limited. */ #define LOG_CATEGORY UCLASS_SCMI_AGENT @@ -98,6 +98,22 @@ enum optee_smci_pta_cmd { * [in] value[0].b: Requested capabilities mask (enum pta_scmi_caps) */ PTA_SCMI_CMD_GET_CHANNEL = 3, + + /* + * PTA_SCMI_CMD_PROCESS_MSG_CHANNEL - Process SCMI message in MSG + * buffers pointed by memref parameters + * + * [in] value[0].a: Channel handle + * [in] memref[1]: Message buffer (MSG header and SCMI payload) + * [out] memref[2]: Response buffer (MSG header and SCMI payload) + * + * Shared memories used for SCMI message/response are MSG buffers + * referenced by param[1] and param[2]. MSG transport protocol + * uses a 32bit header to carry SCMI meta-data (protocol ID and + * protocol message ID) followed by the effective SCMI message + * payload. + */ + PTA_SCMI_CMD_PROCESS_MSG_CHANNEL = 4, }; /* @@ -106,9 +122,17 @@ enum optee_smci_pta_cmd { * PTA_SCMI_CAPS_SMT_HEADER * When set, OP-TEE supports command using SMT header protocol (SCMI shmem) in * shared memory buffers to carry SCMI protocol synchronisation information. + * + * PTA_SCMI_CAPS_MSG_HEADER + * When set, OP-TEE supports command using MSG header protocol in an OP-TEE + * shared memory to carry SCMI protocol synchronisation information and SCMI + * message payload. */ #define PTA_SCMI_CAPS_NONE 0 #define PTA_SCMI_CAPS_SMT_HEADER BIT(0) +#define PTA_SCMI_CAPS_MSG_HEADER BIT(1) +#define PTA_SCMI_CAPS_MASK (PTA_SCMI_CAPS_SMT_HEADER | \ + PTA_SCMI_CAPS_MSG_HEADER) static int open_channel(struct udevice *dev, struct channel_session *sess) { @@ -139,7 +163,10 @@ static int open_channel(struct udevice *dev, struct channel_session *sess) param[0].attr = TEE_PARAM_ATTR_TYPE_VALUE_INOUT; param[0].u.value.a = chan->channel_id; - param[0].u.value.b = PTA_SCMI_CAPS_SMT_HEADER; + if (chan->dyn_shm) + param[0].u.value.b = PTA_SCMI_CAPS_MSG_HEADER; + else + param[0].u.value.b = PTA_SCMI_CAPS_SMT_HEADER; ret = tee_invoke_func(sess->tee, &cmd_arg, ARRAY_SIZE(param), param); if (ret || cmd_arg.ret) { @@ -167,34 +194,48 @@ static int invoke_cmd(struct udevice *dev, struct channel_session *sess, { struct scmi_optee_channel *chan = dev_get_plat(dev); struct tee_invoke_arg arg = { }; - struct tee_param param[2] = { }; + struct tee_param param[3] = { }; int ret; - scmi_write_msg_to_smt(dev, &chan->smt, msg); - arg.session = sess->tee_session; param[0].attr = TEE_PARAM_ATTR_TYPE_VALUE_INPUT; param[0].u.value.a = sess->channel_hdl; - if (chan->dyn_shm) { - arg.func = PTA_SCMI_CMD_PROCESS_SMT_CHANNEL_MESSAGE; - param[1].attr = TEE_PARAM_ATTR_TYPE_MEMREF_INOUT; + if (sess->tee_shm) { + size_t in_size; + + ret = scmi_msg_to_smt_msg(dev, &chan->smt, msg, &in_size); + if (ret < 0) + return ret; + + arg.func = PTA_SCMI_CMD_PROCESS_MSG_CHANNEL; + param[1].attr = TEE_PARAM_ATTR_TYPE_MEMREF_INPUT; param[1].u.memref.shm = sess->tee_shm; - param[1].u.memref.size = SCMI_SHM_SIZE; + param[1].u.memref.size = in_size; + param[2].attr = TEE_PARAM_ATTR_TYPE_MEMREF_OUTPUT; + param[2].u.memref.shm = sess->tee_shm; + param[2].u.memref.size = sess->tee_shm->size; } else { arg.func = PTA_SCMI_CMD_PROCESS_SMT_CHANNEL; + scmi_write_msg_to_smt(dev, &chan->smt, msg); } ret = tee_invoke_func(sess->tee, &arg, ARRAY_SIZE(param), param); if (ret || arg.ret) { if (!ret) ret = -EPROTO; + + return ret; + } + + if (sess->tee_shm) { + ret = scmi_msg_from_smt_msg(dev, &chan->smt, msg, + param[2].u.memref.size); } else { ret = scmi_read_resp_from_smt(dev, &chan->smt, msg); + scmi_clear_smt_channel(&chan->smt); } - scmi_clear_smt_channel(&chan->smt); - return ret; } @@ -217,9 +258,6 @@ static int prepare_shm(struct udevice *dev, struct channel_session *sess) chan->smt.buf = sess->tee_shm->addr; - /* Initialize shm buffer for message exchanges */ - scmi_clear_smt_channel(&chan->smt); - return 0; } @@ -233,7 +271,7 @@ static void release_shm(struct udevice *dev, struct channel_session *sess) static int scmi_optee_process_msg(struct udevice *dev, struct scmi_msg *msg) { - struct channel_session sess; + struct channel_session sess = { }; int ret; ret = open_channel(dev, &sess); diff --git a/drivers/firmware/scmi/smt.c b/drivers/firmware/scmi/smt.c index e60c2aebc89..509ed618a99 100644 --- a/drivers/firmware/scmi/smt.c +++ b/drivers/firmware/scmi/smt.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2015-2019, Arm Limited and Contributors. All rights reserved. - * Copyright (C) 2019-2020 Linaro Limited. + * Copyright (C) 2019-2022 Linaro Limited. */ #define LOG_CATEGORY UCLASS_SCMI_AGENT @@ -137,3 +137,54 @@ void scmi_clear_smt_channel(struct scmi_smt *smt) hdr->channel_status &= ~SCMI_SHMEM_CHAN_STAT_CHANNEL_ERROR; } + +/** + * Write SCMI message @msg into a SMT_MSG shared buffer @smt. + * Return 0 on success and with a negative errno in case of error. + */ +int scmi_msg_to_smt_msg(struct udevice *dev, struct scmi_smt *smt, + struct scmi_msg *msg, size_t *buf_size) +{ + struct scmi_smt_msg_header *hdr = (void *)smt->buf; + + if ((!msg->in_msg && msg->in_msg_sz) || + (!msg->out_msg && msg->out_msg_sz)) + return -EINVAL; + + if (smt->size < (sizeof(*hdr) + msg->in_msg_sz) || + smt->size < (sizeof(*hdr) + msg->out_msg_sz)) { + dev_dbg(dev, "Buffer too small\n"); + return -ETOOSMALL; + } + + *buf_size = msg->in_msg_sz + sizeof(hdr->msg_header); + + hdr->msg_header = SMT_HEADER_TOKEN(0) | + SMT_HEADER_MESSAGE_TYPE(0) | + SMT_HEADER_PROTOCOL_ID(msg->protocol_id) | + SMT_HEADER_MESSAGE_ID(msg->message_id); + + memcpy(hdr->msg_payload, msg->in_msg, msg->in_msg_sz); + + return 0; +} + +/** + * Read SCMI message from a SMT shared buffer @smt and copy it into @msg. + * Return 0 on success and with a negative errno in case of error. + */ +int scmi_msg_from_smt_msg(struct udevice *dev, struct scmi_smt *smt, + struct scmi_msg *msg, size_t buf_size) +{ + struct scmi_smt_msg_header *hdr = (void *)smt->buf; + + if (buf_size > msg->out_msg_sz + sizeof(hdr->msg_header)) { + dev_err(dev, "Buffer to small\n"); + return -ETOOSMALL; + } + + msg->out_msg_sz = buf_size - sizeof(hdr->msg_header); + memcpy(msg->out_msg, hdr->msg_payload, msg->out_msg_sz); + + return 0; +} diff --git a/drivers/firmware/scmi/smt.h b/drivers/firmware/scmi/smt.h index a8c0987bd30..9d669a6c922 100644 --- a/drivers/firmware/scmi/smt.h +++ b/drivers/firmware/scmi/smt.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2015-2019, Arm Limited and Contributors. All rights reserved. - * Copyright (C) 2019-2020 Linaro Limited. + * Copyright (C) 2019-2022 Linaro Limited. */ #ifndef SCMI_SMT_H #define SCMI_SMT_H @@ -29,6 +29,17 @@ struct scmi_smt_header { u8 msg_payload[0]; }; +/** + * struct scmi_msg_header - Description of a MSG shared memory message buffer + * + * MSG communication protocol uses a 32bit header memory cell to store SCMI + * protocol data followed by the exchange SCMI message payload. + */ +struct scmi_smt_msg_header { + __le32 msg_header; + u8 msg_payload[0]; +}; + #define SMT_HEADER_TOKEN(token) (((token) << 18) & GENMASK(31, 18)) #define SMT_HEADER_PROTOCOL_ID(proto) (((proto) << 10) & GENMASK(17, 10)) #define SMT_HEADER_MESSAGE_TYPE(type) (((type) << 18) & GENMASK(9, 8)) @@ -75,12 +86,44 @@ static inline void scmi_smt_put_channel(struct scmi_smt *smt) int scmi_dt_get_smt_buffer(struct udevice *dev, struct scmi_smt *smt); +/* + * Write SCMI message to a SMT shared memory + * @dev: SCMI device + * @smt: Reference to shared memory using SMT header + * @msg: Input SCMI message transmitted + */ int scmi_write_msg_to_smt(struct udevice *dev, struct scmi_smt *smt, struct scmi_msg *msg); +/* + * Read SCMI message from a SMT shared memory + * @dev: SCMI device + * @smt: Reference to shared memory using SMT header + * @msg: Output SCMI message received + */ int scmi_read_resp_from_smt(struct udevice *dev, struct scmi_smt *smt, struct scmi_msg *msg); void scmi_clear_smt_channel(struct scmi_smt *smt); +/* + * Write SCMI message to SMT_MSG shared memory + * @dev: SCMI device + * @smt: Reference to shared memory using SMT_MSG header + * @msg: Input SCMI message transmitted + * @buf_size: Size of the full SMT_MSG buffer transmitted + */ +int scmi_msg_to_smt_msg(struct udevice *dev, struct scmi_smt *smt, + struct scmi_msg *msg, size_t *buf_size); + +/* + * Read SCMI message from SMT_MSG shared memory + * @dev: SCMI device + * @smt: Reference to shared memory using SMT_MSG header + * @msg: Output SCMI message received + * @buf_size: Size of the full SMT_MSG buffer received + */ +int scmi_msg_from_smt_msg(struct udevice *dev, struct scmi_smt *smt, + struct scmi_msg *msg, size_t buf_size); + #endif /* SCMI_SMT_H */ -- GitLab From 5d8eb4ce33b4620264461a4ab00abd293f4537d5 Mon Sep 17 00:00:00 2001 From: Etienne Carriere Date: Tue, 31 May 2022 18:09:17 +0200 Subject: [PATCH 253/581] firmware: scmi: optee: fix inline description of PTA_SCMI_CMD_GET_CHANNEL Removes inaccurate inline description of OP-TEE SCMI PTA command PTA_SCMI_CMD_GET_CHANNEL. Signed-off-by: Etienne Carriere --- drivers/firmware/scmi/optee_agent.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/firmware/scmi/optee_agent.c b/drivers/firmware/scmi/optee_agent.c index e76f738bbaf..bf0647bafd1 100644 --- a/drivers/firmware/scmi/optee_agent.c +++ b/drivers/firmware/scmi/optee_agent.c @@ -91,8 +91,6 @@ enum optee_smci_pta_cmd { /* * PTA_SCMI_CMD_GET_CHANNEL - Get channel handle * - * SCMI shm information are 0 if agent expects to use OP-TEE regular SHM - * * [in] value[0].a: Channel identifier * [out] value[0].a: Returned channel handle * [in] value[0].b: Requested capabilities mask (enum pta_scmi_caps) -- GitLab From 8bcb1b4898be4849b711687fd140b43074b648da Mon Sep 17 00:00:00 2001 From: Etienne Carriere Date: Tue, 31 May 2022 18:09:18 +0200 Subject: [PATCH 254/581] firmware: scmi: prepare scmi uclass API to multi-channel Changes SCMI driver API function devm_scmi_process_msg() to add an SCMI channel reference argument for when SCMI agent supports SCMI protocol specific channels. First argument of devm_scmi_process_msg() is also change to point to the caller SCMI protocol device rather than its parent device (the SCMI agent device). The argument is a pointer to opaque struct scmi_channel known from the SCMI transport drivers. It is currently unused and caller a pass NULL value. A later change will enable such support once SCMI protocol drivers have means to get the channel reference during initialization. Cc: Lukasz Majewski Cc: Sean Anderson Cc: Jaehoon Chung Signed-off-by: Etienne Carriere --- drivers/clk/clk_scmi.c | 10 +++++----- drivers/firmware/scmi/scmi_agent-uclass.c | 3 ++- drivers/power/regulator/scmi_regulator.c | 10 +++++----- drivers/reset/reset-scmi.c | 4 ++-- include/scmi_agent-uclass.h | 2 +- include/scmi_agent.h | 5 ++++- 6 files changed, 19 insertions(+), 15 deletions(-) diff --git a/drivers/clk/clk_scmi.c b/drivers/clk/clk_scmi.c index 5aaabcf0b44..0d0bb72eaf7 100644 --- a/drivers/clk/clk_scmi.c +++ b/drivers/clk/clk_scmi.c @@ -24,7 +24,7 @@ static int scmi_clk_get_num_clock(struct udevice *dev, size_t *num_clocks) }; int ret; - ret = devm_scmi_process_msg(dev, &msg); + ret = devm_scmi_process_msg(dev, NULL, &msg); if (ret) return ret; @@ -49,7 +49,7 @@ static int scmi_clk_get_attibute(struct udevice *dev, int clkid, char **name) }; int ret; - ret = devm_scmi_process_msg(dev, &msg); + ret = devm_scmi_process_msg(dev, NULL, &msg); if (ret) return ret; @@ -70,7 +70,7 @@ static int scmi_clk_gate(struct clk *clk, int enable) in, out); int ret; - ret = devm_scmi_process_msg(clk->dev, &msg); + ret = devm_scmi_process_msg(clk->dev, NULL, &msg); if (ret) return ret; @@ -98,7 +98,7 @@ static ulong scmi_clk_get_rate(struct clk *clk) in, out); int ret; - ret = devm_scmi_process_msg(clk->dev, &msg); + ret = devm_scmi_process_msg(clk->dev, NULL, &msg); if (ret < 0) return ret; @@ -123,7 +123,7 @@ static ulong scmi_clk_set_rate(struct clk *clk, ulong rate) in, out); int ret; - ret = devm_scmi_process_msg(clk->dev, &msg); + ret = devm_scmi_process_msg(clk->dev, NULL, &msg); if (ret < 0) return ret; diff --git a/drivers/firmware/scmi/scmi_agent-uclass.c b/drivers/firmware/scmi/scmi_agent-uclass.c index 3819f2fa993..93cfc9c395b 100644 --- a/drivers/firmware/scmi/scmi_agent-uclass.c +++ b/drivers/firmware/scmi/scmi_agent-uclass.c @@ -114,7 +114,8 @@ static const struct scmi_agent_ops *transport_dev_ops(struct udevice *dev) return (const struct scmi_agent_ops *)dev->driver->ops; } -int devm_scmi_process_msg(struct udevice *dev, struct scmi_msg *msg) +int devm_scmi_process_msg(struct udevice *dev, struct scmi_channel *channel, + struct scmi_msg *msg) { const struct scmi_agent_ops *ops; struct udevice *parent = dev; diff --git a/drivers/power/regulator/scmi_regulator.c b/drivers/power/regulator/scmi_regulator.c index 2966bdcf830..3325ddaf23b 100644 --- a/drivers/power/regulator/scmi_regulator.c +++ b/drivers/power/regulator/scmi_regulator.c @@ -38,7 +38,7 @@ static int scmi_voltd_set_enable(struct udevice *dev, bool enable) in, out); int ret; - ret = devm_scmi_process_msg(dev, &msg); + ret = devm_scmi_process_msg(dev, NULL, &msg); if (ret) return ret; @@ -61,7 +61,7 @@ static int scmi_voltd_get_enable(struct udevice *dev) in, out); int ret; - ret = devm_scmi_process_msg(dev, &msg); + ret = devm_scmi_process_msg(dev, NULL, &msg); if (ret < 0) return ret; @@ -85,7 +85,7 @@ static int scmi_voltd_set_voltage_level(struct udevice *dev, int uV) in, out); int ret; - ret = devm_scmi_process_msg(dev, &msg); + ret = devm_scmi_process_msg(dev, NULL, &msg); if (ret < 0) return ret; @@ -104,7 +104,7 @@ static int scmi_voltd_get_voltage_level(struct udevice *dev) in, out); int ret; - ret = devm_scmi_process_msg(dev, &msg); + ret = devm_scmi_process_msg(dev, NULL, &msg); if (ret < 0) return ret; @@ -147,7 +147,7 @@ static int scmi_regulator_probe(struct udevice *dev) /* Check voltage domain is known from SCMI server */ in.domain_id = pdata->domain_id; - ret = devm_scmi_process_msg(dev, &scmi_msg); + ret = devm_scmi_process_msg(dev, NULL, &scmi_msg); if (ret) { dev_err(dev, "Failed to query voltage domain %u: %d\n", pdata->domain_id, ret); diff --git a/drivers/reset/reset-scmi.c b/drivers/reset/reset-scmi.c index 81d195a06a9..30b26ec9d31 100644 --- a/drivers/reset/reset-scmi.c +++ b/drivers/reset/reset-scmi.c @@ -26,7 +26,7 @@ static int scmi_reset_set_level(struct reset_ctl *rst, bool assert_not_deassert) in, out); int ret; - ret = devm_scmi_process_msg(rst->dev, &msg); + ret = devm_scmi_process_msg(rst->dev, NULL, &msg); if (ret) return ret; @@ -58,7 +58,7 @@ static int scmi_reset_request(struct reset_ctl *rst) * We don't really care about the attribute, just check * the reset domain exists. */ - ret = devm_scmi_process_msg(rst->dev, &msg); + ret = devm_scmi_process_msg(rst->dev, NULL, &msg); if (ret) return ret; diff --git a/include/scmi_agent-uclass.h b/include/scmi_agent-uclass.h index a501d1b4825..861ac6d1100 100644 --- a/include/scmi_agent-uclass.h +++ b/include/scmi_agent-uclass.h @@ -15,7 +15,7 @@ struct scmi_agent_ops { /* * process_msg - Request transport to get the SCMI message processed * - * @agent: Agent using the transport + * @dev: SCMI protocol device using the transport * @msg: SCMI message to be transmitted */ int (*process_msg)(struct udevice *dev, struct scmi_msg *msg); diff --git a/include/scmi_agent.h b/include/scmi_agent.h index 18bcd48a9d4..f4d85cae773 100644 --- a/include/scmi_agent.h +++ b/include/scmi_agent.h @@ -13,6 +13,7 @@ #include struct udevice; +struct scmi_channel; /* * struct scmi_msg - Context of a SCMI message sent and the response received @@ -52,10 +53,12 @@ struct scmi_msg { * On return, scmi_msg::out_msg_sz stores the response payload size. * * @dev: SCMI device + * @channel: Communication channel for the device * @msg: Message structure reference * Return: 0 on success and a negative errno on failure */ -int devm_scmi_process_msg(struct udevice *dev, struct scmi_msg *msg); +int devm_scmi_process_msg(struct udevice *dev, struct scmi_channel *channel, + struct scmi_msg *msg); /** * scmi_to_linux_errno() - Convert an SCMI error code into a Linux errno code -- GitLab From 85dc582892384600709acff796bbce10153255bf Mon Sep 17 00:00:00 2001 From: Etienne Carriere Date: Tue, 31 May 2022 18:09:19 +0200 Subject: [PATCH 255/581] firmware: scmi: prepare uclass to pass channel reference Changes SCMI transport operator ::process_msg to pass the SCMI channel reference provided by caller SCMI protocol device. Signed-off-by: Etienne Carriere --- drivers/firmware/scmi/mailbox_agent.c | 4 +++- drivers/firmware/scmi/optee_agent.c | 4 +++- drivers/firmware/scmi/sandbox-scmi_agent.c | 1 + drivers/firmware/scmi/scmi_agent-uclass.c | 2 +- drivers/firmware/scmi/smccc_agent.c | 4 +++- include/scmi_agent-uclass.h | 4 +++- 6 files changed, 14 insertions(+), 5 deletions(-) diff --git a/drivers/firmware/scmi/mailbox_agent.c b/drivers/firmware/scmi/mailbox_agent.c index 8e4af0c8faf..aa4929aafae 100644 --- a/drivers/firmware/scmi/mailbox_agent.c +++ b/drivers/firmware/scmi/mailbox_agent.c @@ -31,7 +31,9 @@ struct scmi_mbox_channel { ulong timeout_us; }; -static int scmi_mbox_process_msg(struct udevice *dev, struct scmi_msg *msg) +static int scmi_mbox_process_msg(struct udevice *dev, + struct scmi_channel *channel, + struct scmi_msg *msg) { struct scmi_mbox_channel *chan = dev_get_plat(dev); int ret; diff --git a/drivers/firmware/scmi/optee_agent.c b/drivers/firmware/scmi/optee_agent.c index bf0647bafd1..771fa25e989 100644 --- a/drivers/firmware/scmi/optee_agent.c +++ b/drivers/firmware/scmi/optee_agent.c @@ -267,7 +267,9 @@ static void release_shm(struct udevice *dev, struct channel_session *sess) tee_shm_free(sess->tee_shm); } -static int scmi_optee_process_msg(struct udevice *dev, struct scmi_msg *msg) +static int scmi_optee_process_msg(struct udevice *dev, + struct scmi_channel *channel, + struct scmi_msg *msg) { struct channel_session sess = { }; int ret; diff --git a/drivers/firmware/scmi/sandbox-scmi_agent.c b/drivers/firmware/scmi/sandbox-scmi_agent.c index c555164d196..031882998df 100644 --- a/drivers/firmware/scmi/sandbox-scmi_agent.c +++ b/drivers/firmware/scmi/sandbox-scmi_agent.c @@ -471,6 +471,7 @@ static int sandbox_scmi_voltd_level_get(struct udevice *dev, } static int sandbox_scmi_test_process_msg(struct udevice *dev, + struct scmi_channel *channel, struct scmi_msg *msg) { switch (msg->protocol_id) { diff --git a/drivers/firmware/scmi/scmi_agent-uclass.c b/drivers/firmware/scmi/scmi_agent-uclass.c index 93cfc9c395b..c9c9c00384a 100644 --- a/drivers/firmware/scmi/scmi_agent-uclass.c +++ b/drivers/firmware/scmi/scmi_agent-uclass.c @@ -133,7 +133,7 @@ int devm_scmi_process_msg(struct udevice *dev, struct scmi_channel *channel, ops = transport_dev_ops(parent); if (ops->process_msg) - return ops->process_msg(parent, msg); + return ops->process_msg(parent, NULL, msg); return -EPROTONOSUPPORT; } diff --git a/drivers/firmware/scmi/smccc_agent.c b/drivers/firmware/scmi/smccc_agent.c index 5e166ca93ee..b7a930b24df 100644 --- a/drivers/firmware/scmi/smccc_agent.c +++ b/drivers/firmware/scmi/smccc_agent.c @@ -30,7 +30,9 @@ struct scmi_smccc_channel { struct scmi_smt smt; }; -static int scmi_smccc_process_msg(struct udevice *dev, struct scmi_msg *msg) +static int scmi_smccc_process_msg(struct udevice *dev, + struct scmi_channel *channel, + struct scmi_msg *msg) { struct scmi_smccc_channel *chan = dev_get_plat(dev); struct arm_smccc_res res; diff --git a/include/scmi_agent-uclass.h b/include/scmi_agent-uclass.h index 861ac6d1100..562a4cc99af 100644 --- a/include/scmi_agent-uclass.h +++ b/include/scmi_agent-uclass.h @@ -7,6 +7,7 @@ struct udevice; struct scmi_msg; +struct scmi_channel; /** * struct scmi_transport_ops - The functions that a SCMI transport layer must implement. @@ -18,7 +19,8 @@ struct scmi_agent_ops { * @dev: SCMI protocol device using the transport * @msg: SCMI message to be transmitted */ - int (*process_msg)(struct udevice *dev, struct scmi_msg *msg); + int (*process_msg)(struct udevice *dev, struct scmi_channel *channel, + struct scmi_msg *msg); }; #endif /* _SCMI_TRANSPORT_UCLASS_H */ -- GitLab From 5a11df381a53097a7e813d81221ff735cc20782c Mon Sep 17 00:00:00 2001 From: Etienne Carriere Date: Tue, 31 May 2022 18:09:20 +0200 Subject: [PATCH 256/581] firmware: scmi: factorize scmi transport look up Defines local helper function find_scmi_transport_device() with the instructions to find the SCMI transport device from a SCMI protocol device. Cc: Patrick Delaunay Signed-off-by: Etienne Carriere --- drivers/firmware/scmi/scmi_agent-uclass.c | 26 +++++++++++++++-------- 1 file changed, 17 insertions(+), 9 deletions(-) diff --git a/drivers/firmware/scmi/scmi_agent-uclass.c b/drivers/firmware/scmi/scmi_agent-uclass.c index c9c9c00384a..f7fa5df214c 100644 --- a/drivers/firmware/scmi/scmi_agent-uclass.c +++ b/drivers/firmware/scmi/scmi_agent-uclass.c @@ -109,6 +109,20 @@ static int scmi_bind_protocols(struct udevice *dev) return ret; } +static struct udevice *find_scmi_transport_device(struct udevice *dev) +{ + struct udevice *parent = dev; + + do { + parent = dev_get_parent(parent); + } while (parent && device_get_uclass_id(parent) != UCLASS_SCMI_AGENT); + + if (!parent) + dev_err(dev, "Invalid SCMI device, agent not found\n"); + + return parent; +} + static const struct scmi_agent_ops *transport_dev_ops(struct udevice *dev) { return (const struct scmi_agent_ops *)dev->driver->ops; @@ -118,17 +132,11 @@ int devm_scmi_process_msg(struct udevice *dev, struct scmi_channel *channel, struct scmi_msg *msg) { const struct scmi_agent_ops *ops; - struct udevice *parent = dev; + struct udevice *parent; - /* Find related SCMI agent device */ - do { - parent = dev_get_parent(parent); - } while (parent && device_get_uclass_id(parent) != UCLASS_SCMI_AGENT); - - if (!parent) { - dev_err(dev, "Invalid SCMI device, agent not found\n"); + parent = find_scmi_transport_device(dev); + if (!parent) return -ENODEV; - } ops = transport_dev_ops(parent); -- GitLab From 8e96801aa6ae99905acaf9ca36c30b373d441e68 Mon Sep 17 00:00:00 2001 From: Etienne Carriere Date: Tue, 31 May 2022 18:09:21 +0200 Subject: [PATCH 257/581] firmware: scmi: add multi-channel support Adds resources for SCMI protocols to possibly use a dedicated SCMI channel instead of the default channel allocated by the SCMI agent during initialization. As per DT binding documentation, some SCMI transports can define a specific SCMI communication channel for given SCMI protocols. It allows SCMI protocols to pass messages concurrently each other. This change introduces new scmi agent uclass API function devm_scmi_of_get_channel() for SCMI drivers probe sequences to get a reference to the SCMI channel assigned to its related SCMI protocol. The function queries the channel reference to its SCMI transport driver through new scmi agent uclass operator .of_get_channel that uses Device Tree information from related SCMI agent node. Operator .of_get_channel returns a reference to the SCMI channel assigned to SCMI protocol used by the caller device. SCMI transport drivers that do not support multi-channel are not mandated to register this operator. When so, API function devm_scmi_of_get_channel() returns NULL and SCMI transport driver are expected to retrieve by their own means the reference to the unique SCMI channel, for example using platform data as these drivers currently do in U-Boot source tree. Signed-off-by: Etienne Carriere --- drivers/firmware/scmi/scmi_agent-uclass.c | 19 ++++++++++++++++++- include/scmi_agent-uclass.h | 9 +++++++++ include/scmi_agent.h | 9 +++++++++ 3 files changed, 36 insertions(+), 1 deletion(-) diff --git a/drivers/firmware/scmi/scmi_agent-uclass.c b/drivers/firmware/scmi/scmi_agent-uclass.c index f7fa5df214c..2b6211c4e6a 100644 --- a/drivers/firmware/scmi/scmi_agent-uclass.c +++ b/drivers/firmware/scmi/scmi_agent-uclass.c @@ -128,6 +128,23 @@ static const struct scmi_agent_ops *transport_dev_ops(struct udevice *dev) return (const struct scmi_agent_ops *)dev->driver->ops; } +int devm_scmi_of_get_channel(struct udevice *dev, struct scmi_channel **channel) +{ + struct udevice *parent; + + parent = find_scmi_transport_device(dev); + if (!parent) + return -ENODEV; + + if (transport_dev_ops(parent)->of_get_channel) + return transport_dev_ops(parent)->of_get_channel(dev, channel); + + /* Drivers without a get_channel operator don't need a channel ref */ + *channel = NULL; + + return 0; +} + int devm_scmi_process_msg(struct udevice *dev, struct scmi_channel *channel, struct scmi_msg *msg) { @@ -141,7 +158,7 @@ int devm_scmi_process_msg(struct udevice *dev, struct scmi_channel *channel, ops = transport_dev_ops(parent); if (ops->process_msg) - return ops->process_msg(parent, NULL, msg); + return ops->process_msg(parent, channel, msg); return -EPROTONOSUPPORT; } diff --git a/include/scmi_agent-uclass.h b/include/scmi_agent-uclass.h index 562a4cc99af..b1c93532c0e 100644 --- a/include/scmi_agent-uclass.h +++ b/include/scmi_agent-uclass.h @@ -13,6 +13,15 @@ struct scmi_channel; * struct scmi_transport_ops - The functions that a SCMI transport layer must implement. */ struct scmi_agent_ops { + /* + * of_get_channel - Get SCMI channel from SCMI agent device tree node + * + * @dev: SCMI protocol device using the transport + * @channel: Output reference to SCMI channel upon success + * Return 0 upon success and a negative errno on failure + */ + int (*of_get_channel)(struct udevice *dev, struct scmi_channel **channel); + /* * process_msg - Request transport to get the SCMI message processed * diff --git a/include/scmi_agent.h b/include/scmi_agent.h index f4d85cae773..ee6286366df 100644 --- a/include/scmi_agent.h +++ b/include/scmi_agent.h @@ -45,6 +45,15 @@ struct scmi_msg { .out_msg_sz = sizeof(_out_array), \ } +/** + * devm_scmi_of_get_channel() - Get SCMI channel handle from SCMI agent DT node + * + * @dev: Device requesting a channel + * @channel: Output reference to the SCMI channel upon success + * @return 0 on success and a negative errno on failure + */ +int devm_scmi_of_get_channel(struct udevice *dev, struct scmi_channel **channel); + /** * devm_scmi_process_msg() - Send and process an SCMI message * -- GitLab From b5d32ea42b38472348fed22f3605ed56a173f74a Mon Sep 17 00:00:00 2001 From: Etienne Carriere Date: Tue, 31 May 2022 18:09:22 +0200 Subject: [PATCH 258/581] firmware: scmi: mailbox transport: implement multi-channel Updates SCMI mailbox transport driver to get SCMI channel reference at initialization and use when posting SCMI messages. Signed-off-by: Etienne Carriere --- drivers/firmware/scmi/mailbox_agent.c | 63 ++++++++++++++++++++++++--- 1 file changed, 57 insertions(+), 6 deletions(-) diff --git a/drivers/firmware/scmi/mailbox_agent.c b/drivers/firmware/scmi/mailbox_agent.c index aa4929aafae..e63b67c5ee8 100644 --- a/drivers/firmware/scmi/mailbox_agent.c +++ b/drivers/firmware/scmi/mailbox_agent.c @@ -31,6 +31,14 @@ struct scmi_mbox_channel { ulong timeout_us; }; +/** + * struct scmi_channel - Channel instance referenced in SCMI drivers + * @ref: Reference to local channel instance + **/ +struct scmi_channel { + struct scmi_mbox_channel ref; +}; + static int scmi_mbox_process_msg(struct udevice *dev, struct scmi_channel *channel, struct scmi_msg *msg) @@ -38,6 +46,10 @@ static int scmi_mbox_process_msg(struct udevice *dev, struct scmi_mbox_channel *chan = dev_get_plat(dev); int ret; + /* Support SCMI drivers upgraded to of_get_channel operator */ + if (channel) + chan = &channel->ref; + ret = scmi_write_msg_to_smt(dev, &chan->smt, msg); if (ret) return ret; @@ -64,13 +76,10 @@ out: return ret; } -int scmi_mbox_of_to_plat(struct udevice *dev) +static int setup_channel(struct udevice *dev, struct scmi_mbox_channel *chan) { - struct scmi_mbox_channel *chan = dev_get_plat(dev); int ret; - chan->timeout_us = TIMEOUT_US_10MS; - ret = mbox_get_by_index(dev, 0, &chan->mbox); if (ret) { dev_err(dev, "Failed to find mailbox: %d\n", ret); @@ -78,10 +87,51 @@ int scmi_mbox_of_to_plat(struct udevice *dev) } ret = scmi_dt_get_smt_buffer(dev, &chan->smt); - if (ret) + if (ret) { dev_err(dev, "Failed to get shm resources: %d\n", ret); + return ret; + } - return ret; + chan->timeout_us = TIMEOUT_US_10MS; + + return 0; +} + +static int scmi_mbox_get_channel(struct udevice *dev, + struct scmi_channel **channel) +{ + struct scmi_mbox_channel *base_chan = dev_get_plat(dev->parent); + struct scmi_mbox_channel *chan; + int ret; + + if (!dev_read_prop(dev, "shmem", NULL)) { + /* Uses agent base channel */ + *channel = container_of(base_chan, struct scmi_channel, ref); + + return 0; + } + + chan = calloc(1, sizeof(*chan)); + if (!chan) + return -ENOMEM; + + /* Setup a dedicated channel for the protocol */ + ret = setup_channel(dev, chan); + if (ret) { + free(chan); + return ret; + } + + *channel = (void *)chan; + + return 0; +} + +int scmi_mbox_of_to_plat(struct udevice *dev) +{ + struct scmi_mbox_channel *chan = dev_get_plat(dev); + + return setup_channel(dev, chan); } static const struct udevice_id scmi_mbox_ids[] = { @@ -90,6 +140,7 @@ static const struct udevice_id scmi_mbox_ids[] = { }; static const struct scmi_agent_ops scmi_mbox_ops = { + .of_get_channel = scmi_mbox_get_channel, .process_msg = scmi_mbox_process_msg, }; -- GitLab From 57b812fc8f7c02b670df8229e085197fa672e381 Mon Sep 17 00:00:00 2001 From: Etienne Carriere Date: Tue, 31 May 2022 18:09:23 +0200 Subject: [PATCH 259/581] firmware: scmi: smccc transport: implement multi-channel Updates SCMI SMCCC transport driver to get SCMI channel reference at initialization and use when posting SCMI messages. Signed-off-by: Etienne Carriere --- drivers/firmware/scmi/smccc_agent.c | 54 +++++++++++++++++++++++++++-- 1 file changed, 52 insertions(+), 2 deletions(-) diff --git a/drivers/firmware/scmi/smccc_agent.c b/drivers/firmware/scmi/smccc_agent.c index b7a930b24df..73a7e0a844a 100644 --- a/drivers/firmware/scmi/smccc_agent.c +++ b/drivers/firmware/scmi/smccc_agent.c @@ -30,6 +30,14 @@ struct scmi_smccc_channel { struct scmi_smt smt; }; +/** + * struct scmi_channel - Channel instance referenced in SCMI drivers + * @ref: Reference to local channel instance + **/ +struct scmi_channel { + struct scmi_smccc_channel ref; +}; + static int scmi_smccc_process_msg(struct udevice *dev, struct scmi_channel *channel, struct scmi_msg *msg) @@ -38,6 +46,10 @@ static int scmi_smccc_process_msg(struct udevice *dev, struct arm_smccc_res res; int ret; + /* Support SCMI drivers upgraded to of_get_channel operator */ + if (channel) + chan = &channel->ref; + ret = scmi_write_msg_to_smt(dev, &chan->smt, msg); if (ret) return ret; @@ -53,9 +65,8 @@ static int scmi_smccc_process_msg(struct udevice *dev, return ret; } -static int scmi_smccc_of_to_plat(struct udevice *dev) +static int setup_channel(struct udevice *dev, struct scmi_smccc_channel *chan) { - struct scmi_smccc_channel *chan = dev_get_plat(dev); u32 func_id; int ret; @@ -73,12 +84,51 @@ static int scmi_smccc_of_to_plat(struct udevice *dev) return ret; } +static int scmi_smccc_get_channel(struct udevice *dev, + struct scmi_channel **channel) +{ + struct scmi_smccc_channel *base_chan = dev_get_plat(dev->parent); + struct scmi_smccc_channel *chan; + u32 func_id; + int ret; + + if (dev_read_u32(dev, "arm,smc-id", &func_id)) { + /* Uses agent base channel */ + *channel = container_of(base_chan, struct scmi_channel, ref); + + return 0; + } + + /* Setup a dedicated channel */ + chan = calloc(1, sizeof(*chan)); + if (!chan) + return -ENOMEM; + + ret = setup_channel(dev, chan); + if (ret) { + free(chan); + return ret; + } + + *channel = container_of(chan, struct scmi_channel, ref); + + return 0; +} + +static int scmi_smccc_of_to_plat(struct udevice *dev) +{ + struct scmi_smccc_channel *chan = dev_get_plat(dev); + + return setup_channel(dev, chan); +} + static const struct udevice_id scmi_smccc_ids[] = { { .compatible = "arm,scmi-smc" }, { } }; static const struct scmi_agent_ops scmi_smccc_ops = { + .of_get_channel = scmi_smccc_get_channel, .process_msg = scmi_smccc_process_msg, }; -- GitLab From 965d606d60b5593d176c74bc634f4d869efdc189 Mon Sep 17 00:00:00 2001 From: Etienne Carriere Date: Tue, 31 May 2022 18:09:24 +0200 Subject: [PATCH 260/581] firmware: scmi: optee transport: implement multi-channel Implements multi SCMI channel support in OP-TEE SCMI transport. An SCMI protocol may use a dedicated channel, specified by the DT. Signed-off-by: Etienne Carriere --- drivers/firmware/scmi/optee_agent.c | 76 ++++++++++++++++++++++++----- 1 file changed, 63 insertions(+), 13 deletions(-) diff --git a/drivers/firmware/scmi/optee_agent.c b/drivers/firmware/scmi/optee_agent.c index 771fa25e989..da5c2ec9754 100644 --- a/drivers/firmware/scmi/optee_agent.c +++ b/drivers/firmware/scmi/optee_agent.c @@ -35,6 +35,14 @@ struct scmi_optee_channel { bool dyn_shm; }; +/** + * struct scmi_channel - Channel instance referenced in SCMI drivers + * @ref: Reference to local channel instance + **/ +struct scmi_channel { + struct scmi_optee_channel ref; +}; + /** * struct channel_session - Aggreates SCMI service session context references * @tee: OP-TEE device to invoke @@ -132,10 +140,10 @@ enum optee_smci_pta_cmd { #define PTA_SCMI_CAPS_MASK (PTA_SCMI_CAPS_SMT_HEADER | \ PTA_SCMI_CAPS_MSG_HEADER) -static int open_channel(struct udevice *dev, struct channel_session *sess) +static int open_channel(struct udevice *dev, struct scmi_optee_channel *chan, + struct channel_session *sess) { const struct tee_optee_ta_uuid uuid = TA_SCMI_UUID; - struct scmi_optee_channel *chan = dev_get_plat(dev); struct tee_open_session_arg sess_arg = { }; struct tee_invoke_arg cmd_arg = { }; struct tee_param param[1] = { }; @@ -187,10 +195,9 @@ static void close_channel(struct channel_session *sess) tee_close_session(sess->tee, sess->tee_session); } -static int invoke_cmd(struct udevice *dev, struct channel_session *sess, - struct scmi_msg *msg) +static int invoke_cmd(struct udevice *dev, struct scmi_optee_channel *chan, + struct channel_session *sess, struct scmi_msg *msg) { - struct scmi_optee_channel *chan = dev_get_plat(dev); struct tee_invoke_arg arg = { }; struct tee_param param[3] = { }; int ret; @@ -237,9 +244,9 @@ static int invoke_cmd(struct udevice *dev, struct channel_session *sess, return ret; } -static int prepare_shm(struct udevice *dev, struct channel_session *sess) +static int prepare_shm(struct udevice *dev, struct scmi_optee_channel *chan, + struct channel_session *sess) { - struct scmi_optee_channel *chan = dev_get_plat(dev); int ret; /* Static shm is already prepared by the firmware: nothing to do */ @@ -274,15 +281,19 @@ static int scmi_optee_process_msg(struct udevice *dev, struct channel_session sess = { }; int ret; - ret = open_channel(dev, &sess); + /* Support SCMI drivers upgraded to of_get_channel operator */ + if (channel) + chan = &channel->ref; + + ret = open_channel(dev, chan, &sess); if (ret) return ret; - ret = prepare_shm(dev, &sess); + ret = prepare_shm(dev, chan, &sess); if (ret) goto out; - ret = invoke_cmd(dev, &sess, msg); + ret = invoke_cmd(dev, chan, &sess, msg); release_shm(dev, &sess); @@ -292,9 +303,8 @@ out: return ret; } -static int scmi_optee_of_to_plat(struct udevice *dev) +static int setup_channel(struct udevice *dev, struct scmi_optee_channel *chan) { - struct scmi_optee_channel *chan = dev_get_plat(dev); int ret; if (dev_read_u32(dev, "linaro,optee-channel-id", &chan->channel_id)) { @@ -316,13 +326,52 @@ static int scmi_optee_of_to_plat(struct udevice *dev) return 0; } +static int scmi_optee_get_channel(struct udevice *dev, + struct scmi_channel **channel) +{ + struct scmi_optee_channel *base_chan = dev_get_plat(dev->parent); + struct scmi_optee_channel *chan; + u32 channel_id; + int ret; + + if (dev_read_u32(dev, "linaro,optee-channel-id", &channel_id)) { + /* Uses agent base channel */ + *channel = container_of(base_chan, struct scmi_channel, ref); + + return 0; + } + + /* Setup a dedicated channel */ + chan = calloc(1, sizeof(*chan)); + if (!chan) + return -ENOMEM; + + ret = setup_channel(dev, chan); + if (ret) { + free(chan); + return ret; + } + + *channel = container_of(chan, struct scmi_channel, ref); + + return 0; +} + +static int scmi_optee_of_to_plat(struct udevice *dev) +{ + struct scmi_optee_channel *chan = dev_get_plat(dev); + + return setup_channel(dev, chan); +} + static int scmi_optee_probe(struct udevice *dev) { + struct scmi_optee_channel *chan = dev_get_plat(dev); struct channel_session sess; int ret; /* Check OP-TEE service acknowledges the SCMI channel */ - ret = open_channel(dev, &sess); + ret = open_channel(dev, chan, &sess); if (!ret) close_channel(&sess); @@ -335,6 +384,7 @@ static const struct udevice_id scmi_optee_ids[] = { }; static const struct scmi_agent_ops scmi_optee_ops = { + .of_get_channel = scmi_optee_get_channel, .process_msg = scmi_optee_process_msg, }; -- GitLab From 38a905ecf91914f64e4832218349f2789f969509 Mon Sep 17 00:00:00 2001 From: Etienne Carriere Date: Tue, 31 May 2022 18:09:25 +0200 Subject: [PATCH 261/581] clk: scmi: support SCMI multi-channel Update SCMI clock driver to get its assigned SCMI channel during initialization. This change allows SCMI clock protocol to use a dedicated channel when defined in the DT. The reference is saved in SCMI clock driver private data. Cc: Lukasz Majewski Cc: Sean Anderson Signed-off-by: Etienne Carriere --- drivers/clk/clk_scmi.c | 33 ++++++++++++++++++++++++++------- 1 file changed, 26 insertions(+), 7 deletions(-) diff --git a/drivers/clk/clk_scmi.c b/drivers/clk/clk_scmi.c index 0d0bb72eaf7..d172fed24c9 100644 --- a/drivers/clk/clk_scmi.c +++ b/drivers/clk/clk_scmi.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2019-2020 Linaro Limited + * Copyright (C) 2019-2022 Linaro Limited */ #define LOG_CATEGORY UCLASS_CLK @@ -13,8 +13,17 @@ #include #include +/** + * struct scmi_clk_priv - Private data for SCMI clocks + * @channel: Reference to the SCMI channel to use + */ +struct scmi_clk_priv { + struct scmi_channel *channel; +}; + static int scmi_clk_get_num_clock(struct udevice *dev, size_t *num_clocks) { + struct scmi_clk_priv *priv = dev_get_priv(dev); struct scmi_clk_protocol_attr_out out; struct scmi_msg msg = { .protocol_id = SCMI_PROTOCOL_ID_CLOCK, @@ -24,7 +33,7 @@ static int scmi_clk_get_num_clock(struct udevice *dev, size_t *num_clocks) }; int ret; - ret = devm_scmi_process_msg(dev, NULL, &msg); + ret = devm_scmi_process_msg(dev, priv->channel, &msg); if (ret) return ret; @@ -35,6 +44,7 @@ static int scmi_clk_get_num_clock(struct udevice *dev, size_t *num_clocks) static int scmi_clk_get_attibute(struct udevice *dev, int clkid, char **name) { + struct scmi_clk_priv *priv = dev_get_priv(dev); struct scmi_clk_attribute_in in = { .clock_id = clkid, }; @@ -49,7 +59,7 @@ static int scmi_clk_get_attibute(struct udevice *dev, int clkid, char **name) }; int ret; - ret = devm_scmi_process_msg(dev, NULL, &msg); + ret = devm_scmi_process_msg(dev, priv->channel, &msg); if (ret) return ret; @@ -60,6 +70,7 @@ static int scmi_clk_get_attibute(struct udevice *dev, int clkid, char **name) static int scmi_clk_gate(struct clk *clk, int enable) { + struct scmi_clk_priv *priv = dev_get_priv(clk->dev); struct scmi_clk_state_in in = { .clock_id = clk->id, .attributes = enable, @@ -70,7 +81,7 @@ static int scmi_clk_gate(struct clk *clk, int enable) in, out); int ret; - ret = devm_scmi_process_msg(clk->dev, NULL, &msg); + ret = devm_scmi_process_msg(clk->dev, priv->channel, &msg); if (ret) return ret; @@ -89,6 +100,7 @@ static int scmi_clk_disable(struct clk *clk) static ulong scmi_clk_get_rate(struct clk *clk) { + struct scmi_clk_priv *priv = dev_get_priv(clk->dev); struct scmi_clk_rate_get_in in = { .clock_id = clk->id, }; @@ -98,7 +110,7 @@ static ulong scmi_clk_get_rate(struct clk *clk) in, out); int ret; - ret = devm_scmi_process_msg(clk->dev, NULL, &msg); + ret = devm_scmi_process_msg(clk->dev, priv->channel, &msg); if (ret < 0) return ret; @@ -111,6 +123,7 @@ static ulong scmi_clk_get_rate(struct clk *clk) static ulong scmi_clk_set_rate(struct clk *clk, ulong rate) { + struct scmi_clk_priv *priv = dev_get_priv(clk->dev); struct scmi_clk_rate_set_in in = { .clock_id = clk->id, .flags = SCMI_CLK_RATE_ROUND_CLOSEST, @@ -123,7 +136,7 @@ static ulong scmi_clk_set_rate(struct clk *clk, ulong rate) in, out); int ret; - ret = devm_scmi_process_msg(clk->dev, NULL, &msg); + ret = devm_scmi_process_msg(clk->dev, priv->channel, &msg); if (ret < 0) return ret; @@ -136,10 +149,15 @@ static ulong scmi_clk_set_rate(struct clk *clk, ulong rate) static int scmi_clk_probe(struct udevice *dev) { + struct scmi_clk_priv *priv = dev_get_priv(dev); struct clk *clk; size_t num_clocks, i; int ret; + ret = devm_scmi_of_get_channel(dev, &priv->channel); + if (ret) + return ret; + if (!CONFIG_IS_ENABLED(CLK_CCF)) return 0; @@ -186,5 +204,6 @@ U_BOOT_DRIVER(scmi_clock) = { .name = "scmi_clk", .id = UCLASS_CLK, .ops = &scmi_clk_ops, - .probe = &scmi_clk_probe, + .probe = scmi_clk_probe, + .priv_auto = sizeof(struct scmi_clk_priv *), }; -- GitLab From f487a88c644a8ad7e50202ab8a617f81d4b56867 Mon Sep 17 00:00:00 2001 From: Etienne Carriere Date: Tue, 31 May 2022 18:09:26 +0200 Subject: [PATCH 262/581] reset: scmi: support SCMI multi-channel Update SCMI reset controller driver to get its assigned SCMI channel during initialization. This change allows SCMI reset domain protocol to use a dedicated channel when defined in the DT. The reference is saved in SCMI reset controller driver private data. Signed-off-by: Etienne Carriere --- drivers/reset/reset-scmi.c | 25 ++++++++++++++++++++++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/drivers/reset/reset-scmi.c b/drivers/reset/reset-scmi.c index 30b26ec9d31..122556162ec 100644 --- a/drivers/reset/reset-scmi.c +++ b/drivers/reset/reset-scmi.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2019-2020 Linaro Limited + * Copyright (C) 2019-2022 Linaro Limited */ #define LOG_CATEGORY UCLASS_RESET @@ -13,8 +13,17 @@ #include #include +/** + * struct scmi_reset_priv - Private data for SCMI reset controller + * @channel: Reference to the SCMI channel to use + */ +struct scmi_reset_priv { + struct scmi_channel *channel; +}; + static int scmi_reset_set_level(struct reset_ctl *rst, bool assert_not_deassert) { + struct scmi_reset_priv *priv = dev_get_priv(rst->dev); struct scmi_rd_reset_in in = { .domain_id = rst->id, .flags = assert_not_deassert ? SCMI_RD_RESET_FLAG_ASSERT : 0, @@ -26,7 +35,7 @@ static int scmi_reset_set_level(struct reset_ctl *rst, bool assert_not_deassert) in, out); int ret; - ret = devm_scmi_process_msg(rst->dev, NULL, &msg); + ret = devm_scmi_process_msg(rst->dev, priv->channel, &msg); if (ret) return ret; @@ -45,6 +54,7 @@ static int scmi_reset_deassert(struct reset_ctl *rst) static int scmi_reset_request(struct reset_ctl *rst) { + struct scmi_reset_priv *priv = dev_get_priv(rst->dev); struct scmi_rd_attr_in in = { .domain_id = rst->id, }; @@ -58,7 +68,7 @@ static int scmi_reset_request(struct reset_ctl *rst) * We don't really care about the attribute, just check * the reset domain exists. */ - ret = devm_scmi_process_msg(rst->dev, NULL, &msg); + ret = devm_scmi_process_msg(rst->dev, priv->channel, &msg); if (ret) return ret; @@ -71,8 +81,17 @@ static const struct reset_ops scmi_reset_domain_ops = { .rst_deassert = scmi_reset_deassert, }; +static int scmi_reset_probe(struct udevice *dev) +{ + struct scmi_reset_priv *priv = dev_get_priv(dev); + + return devm_scmi_of_get_channel(dev, &priv->channel); +} + U_BOOT_DRIVER(scmi_reset_domain) = { .name = "scmi_reset_domain", .id = UCLASS_RESET, .ops = &scmi_reset_domain_ops, + .probe = scmi_reset_probe, + .priv_auto = sizeof(struct scmi_reset_priv *), }; -- GitLab From ff33ed32b6a7c261eefa6663a0775e4a45369aab Mon Sep 17 00:00:00 2001 From: Etienne Carriere Date: Tue, 31 May 2022 18:09:27 +0200 Subject: [PATCH 263/581] power: regulator: scmi: support SCMI multi-channel Update SCMI regulator controller driver to get its assigned SCMI channel during initialization. This change allows SCMI voltage domain protocol to use a dedicated channel when defined in the DT. The reference is saved in SCMI regulator controller driver private data. Cc: Jaehoon Chung Signed-off-by: Etienne Carriere Reviewed-by: Jaehoon Chung --- drivers/power/regulator/scmi_regulator.c | 30 +++++++++++++++++++----- 1 file changed, 24 insertions(+), 6 deletions(-) diff --git a/drivers/power/regulator/scmi_regulator.c b/drivers/power/regulator/scmi_regulator.c index 3325ddaf23b..352daa9bbc9 100644 --- a/drivers/power/regulator/scmi_regulator.c +++ b/drivers/power/regulator/scmi_regulator.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2020-2021 Linaro Limited + * Copyright (C) 2020-2022 Linaro Limited */ #define LOG_CATEGORY UCLASS_REGULATOR @@ -25,9 +25,18 @@ struct scmi_regulator_platdata { u32 domain_id; }; +/** + * struct scmi_regulator_priv - Private data for SCMI voltage regulator + * @channel: Reference to the SCMI channel to use + */ +struct scmi_regulator_priv { + struct scmi_channel *channel; +}; + static int scmi_voltd_set_enable(struct udevice *dev, bool enable) { struct scmi_regulator_platdata *pdata = dev_get_plat(dev); + struct scmi_regulator_priv *priv = dev_get_priv(dev); struct scmi_voltd_config_set_in in = { .domain_id = pdata->domain_id, .config = enable ? SCMI_VOLTD_CONFIG_ON : SCMI_VOLTD_CONFIG_OFF, @@ -38,7 +47,7 @@ static int scmi_voltd_set_enable(struct udevice *dev, bool enable) in, out); int ret; - ret = devm_scmi_process_msg(dev, NULL, &msg); + ret = devm_scmi_process_msg(dev, priv->channel, &msg); if (ret) return ret; @@ -52,6 +61,7 @@ static int scmi_voltd_set_enable(struct udevice *dev, bool enable) static int scmi_voltd_get_enable(struct udevice *dev) { struct scmi_regulator_platdata *pdata = dev_get_plat(dev); + struct scmi_regulator_priv *priv = dev_get_priv(dev); struct scmi_voltd_config_get_in in = { .domain_id = pdata->domain_id, }; @@ -61,7 +71,7 @@ static int scmi_voltd_get_enable(struct udevice *dev) in, out); int ret; - ret = devm_scmi_process_msg(dev, NULL, &msg); + ret = devm_scmi_process_msg(dev, priv->channel, &msg); if (ret < 0) return ret; @@ -74,6 +84,7 @@ static int scmi_voltd_get_enable(struct udevice *dev) static int scmi_voltd_set_voltage_level(struct udevice *dev, int uV) { + struct scmi_regulator_priv *priv = dev_get_priv(dev); struct scmi_regulator_platdata *pdata = dev_get_plat(dev); struct scmi_voltd_level_set_in in = { .domain_id = pdata->domain_id, @@ -85,7 +96,7 @@ static int scmi_voltd_set_voltage_level(struct udevice *dev, int uV) in, out); int ret; - ret = devm_scmi_process_msg(dev, NULL, &msg); + ret = devm_scmi_process_msg(dev, priv->channel, &msg); if (ret < 0) return ret; @@ -94,6 +105,7 @@ static int scmi_voltd_set_voltage_level(struct udevice *dev, int uV) static int scmi_voltd_get_voltage_level(struct udevice *dev) { + struct scmi_regulator_priv *priv = dev_get_priv(dev); struct scmi_regulator_platdata *pdata = dev_get_plat(dev); struct scmi_voltd_level_get_in in = { .domain_id = pdata->domain_id, @@ -104,7 +116,7 @@ static int scmi_voltd_get_voltage_level(struct udevice *dev) in, out); int ret; - ret = devm_scmi_process_msg(dev, NULL, &msg); + ret = devm_scmi_process_msg(dev, priv->channel, &msg); if (ret < 0) return ret; @@ -132,6 +144,7 @@ static int scmi_regulator_of_to_plat(struct udevice *dev) static int scmi_regulator_probe(struct udevice *dev) { struct scmi_regulator_platdata *pdata = dev_get_plat(dev); + struct scmi_regulator_priv *priv = dev_get_priv(dev); struct scmi_voltd_attr_in in = { 0 }; struct scmi_voltd_attr_out out = { 0 }; struct scmi_msg scmi_msg = { @@ -144,10 +157,14 @@ static int scmi_regulator_probe(struct udevice *dev) }; int ret; + ret = devm_scmi_of_get_channel(dev->parent, &priv->channel); + if (ret) + return ret; + /* Check voltage domain is known from SCMI server */ in.domain_id = pdata->domain_id; - ret = devm_scmi_process_msg(dev, NULL, &scmi_msg); + ret = devm_scmi_process_msg(dev, priv->channel, &scmi_msg); if (ret) { dev_err(dev, "Failed to query voltage domain %u: %d\n", pdata->domain_id, ret); @@ -171,6 +188,7 @@ U_BOOT_DRIVER(scmi_regulator) = { .probe = scmi_regulator_probe, .of_to_plat = scmi_regulator_of_to_plat, .plat_auto = sizeof(struct scmi_regulator_platdata), + .priv_auto = sizeof(struct scmi_regulator_priv *), }; static int scmi_regulator_bind(struct udevice *dev) -- GitLab From db59fef0f84859504cd0b81063d7540517167d7b Mon Sep 17 00:00:00 2001 From: Etienne Carriere Date: Tue, 31 May 2022 18:09:28 +0200 Subject: [PATCH 264/581] power: regulator: scmi: simplify scmi_voltd_set_enable() Simplify scmi_voltd_set_enable() exit sequence. Cc: Jaehoon Chung Signed-off-by: Etienne Carriere Reviewed-by: Jaehoon Chung --- drivers/power/regulator/scmi_regulator.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/power/regulator/scmi_regulator.c b/drivers/power/regulator/scmi_regulator.c index 352daa9bbc9..801148036ff 100644 --- a/drivers/power/regulator/scmi_regulator.c +++ b/drivers/power/regulator/scmi_regulator.c @@ -51,11 +51,7 @@ static int scmi_voltd_set_enable(struct udevice *dev, bool enable) if (ret) return ret; - ret = scmi_to_linux_errno(out.status); - if (ret) - return ret; - - return ret; + return scmi_to_linux_errno(out.status); } static int scmi_voltd_get_enable(struct udevice *dev) -- GitLab From c08decd29ec44b38262eaa93e0e66d3965d26232 Mon Sep 17 00:00:00 2001 From: Etienne Carriere Date: Tue, 31 May 2022 18:09:29 +0200 Subject: [PATCH 265/581] firmware: scmi: use multi channel in mailbox, optee and smccc agents Updates .process_msg operators of the SCMI transport drivers that supports multi-channel to use it now that drivers do provide the reference through channel argument. These are the mailbox agent, the optee agent and the smccc agent. Signed-off-by: Etienne Carriere --- drivers/firmware/scmi/mailbox_agent.c | 6 +----- drivers/firmware/scmi/optee_agent.c | 5 +---- drivers/firmware/scmi/smccc_agent.c | 6 +----- 3 files changed, 3 insertions(+), 14 deletions(-) diff --git a/drivers/firmware/scmi/mailbox_agent.c b/drivers/firmware/scmi/mailbox_agent.c index e63b67c5ee8..3efdab9e723 100644 --- a/drivers/firmware/scmi/mailbox_agent.c +++ b/drivers/firmware/scmi/mailbox_agent.c @@ -43,13 +43,9 @@ static int scmi_mbox_process_msg(struct udevice *dev, struct scmi_channel *channel, struct scmi_msg *msg) { - struct scmi_mbox_channel *chan = dev_get_plat(dev); + struct scmi_mbox_channel *chan = &channel->ref; int ret; - /* Support SCMI drivers upgraded to of_get_channel operator */ - if (channel) - chan = &channel->ref; - ret = scmi_write_msg_to_smt(dev, &chan->smt, msg); if (ret) return ret; diff --git a/drivers/firmware/scmi/optee_agent.c b/drivers/firmware/scmi/optee_agent.c index da5c2ec9754..2b2b8c1670a 100644 --- a/drivers/firmware/scmi/optee_agent.c +++ b/drivers/firmware/scmi/optee_agent.c @@ -278,13 +278,10 @@ static int scmi_optee_process_msg(struct udevice *dev, struct scmi_channel *channel, struct scmi_msg *msg) { + struct scmi_optee_channel *chan = &channel->ref; struct channel_session sess = { }; int ret; - /* Support SCMI drivers upgraded to of_get_channel operator */ - if (channel) - chan = &channel->ref; - ret = open_channel(dev, chan, &sess); if (ret) return ret; diff --git a/drivers/firmware/scmi/smccc_agent.c b/drivers/firmware/scmi/smccc_agent.c index 73a7e0a844a..bc2eb67335b 100644 --- a/drivers/firmware/scmi/smccc_agent.c +++ b/drivers/firmware/scmi/smccc_agent.c @@ -42,14 +42,10 @@ static int scmi_smccc_process_msg(struct udevice *dev, struct scmi_channel *channel, struct scmi_msg *msg) { - struct scmi_smccc_channel *chan = dev_get_plat(dev); + struct scmi_smccc_channel *chan = &channel->ref; struct arm_smccc_res res; int ret; - /* Support SCMI drivers upgraded to of_get_channel operator */ - if (channel) - chan = &channel->ref; - ret = scmi_write_msg_to_smt(dev, &chan->smt, msg); if (ret) return ret; -- GitLab From f7f124001540878b68b50c6d7ca188a9872a3cb5 Mon Sep 17 00:00:00 2001 From: Etienne Carriere Date: Wed, 1 Jun 2022 10:27:31 +0200 Subject: [PATCH 266/581] smccc: define generic IDs for feature discovery Defines function IDs ARM_SMCCC_ARCH_FEATURES used to query SMCCC feature support, applicable from Arm SMCCC v1.1 specification. Defines macro ARM_SMCCC_RET_NOT_SUPPORTED as generic return identifier for when a SMCCC feature is not supported. Signed-off-by: Etienne Carriere --- include/linux/arm-smccc.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h index 7f2be233947..94a20c97937 100644 --- a/include/linux/arm-smccc.h +++ b/include/linux/arm-smccc.h @@ -51,6 +51,10 @@ #define ARM_SMCCC_QUIRK_NONE 0 #define ARM_SMCCC_QUIRK_QCOM_A6 1 /* Save/restore register a6 */ +#define ARM_SMCCC_ARCH_FEATURES 0x80000001 + +#define ARM_SMCCC_RET_NOT_SUPPORTED ((unsigned long)-1) + #ifndef __ASSEMBLY__ #include -- GitLab From b1ff399c6ed19ce24d8bbcadc279f223941f257a Mon Sep 17 00:00:00 2001 From: Etienne Carriere Date: Wed, 1 Jun 2022 10:27:32 +0200 Subject: [PATCH 267/581] firmware: psci: reorder header files inclusion Fixes ordering of header files inclusion in PSCI firmware driver. Signed-off-by: Etienne Carriere --- drivers/firmware/psci.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c index 657e7eb5aea..f845ba67f8f 100644 --- a/drivers/firmware/psci.c +++ b/drivers/firmware/psci.c @@ -9,18 +9,18 @@ #include #include #include +#include #include #include -#include -#include #include -#include -#include +#include +#include #include +#include #include +#include #include #include -#include #define DRIVER_NAME "psci" -- GitLab From 2fbe47b7e77134c81d8def15a2a6e028abe0f077 Mon Sep 17 00:00:00 2001 From: Etienne Carriere Date: Wed, 1 Jun 2022 10:27:33 +0200 Subject: [PATCH 268/581] firmware: psci: bind arm smccc features when discovered Use PSCI device to query Arm SMCCC v1.1 support from secure monitor and if so, bind drivers for the SMCCC features that monitor supports. Drivers willing to be bound from Arm SMCCC features discovery can use macro ARM_SMCCC_FEATURE_DRIVER() to register to smccc feature discovery, providing target driver name and a callback function that returns whether or not the SMCCC feature is supported by the system. Signed-off-by: Etienne Carriere --- drivers/firmware/Kconfig | 8 ++++ drivers/firmware/psci.c | 81 ++++++++++++++++++++++++++++++++++++++- include/linux/arm-smccc.h | 16 ++++++++ include/linux/psci.h | 14 +++++++ 4 files changed, 118 insertions(+), 1 deletion(-) diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig index ef958b3a7a4..f10d1aaf4b6 100644 --- a/drivers/firmware/Kconfig +++ b/drivers/firmware/Kconfig @@ -37,4 +37,12 @@ config ZYNQMP_FIRMWARE Say yes to enable ZynqMP firmware interface driver. If in doubt, say N. +config ARM_SMCCC_FEATURES + bool "Arm SMCCC features discovery" + depends on ARM_PSCI_FW + help + Discover Arm SMCCC features for which a U-Boot driver is defined. When enabled, + the PSCI driver is always probed and binds dirvers registered to the Arm SMCCC + services if any and reported as supported by the SMCCC firmware. + source "drivers/firmware/scmi/Kconfig" diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c index f845ba67f8f..ef3e9836461 100644 --- a/drivers/firmware/psci.c +++ b/drivers/firmware/psci.c @@ -11,9 +11,11 @@ #include #include #include +#include #include #include #include +#include #include #include #include @@ -95,6 +97,76 @@ static bool psci_is_system_reset2_supported(void) return false; } +static void smccc_invoke_hvc(unsigned long a0, unsigned long a1, + unsigned long a2, unsigned long a3, + unsigned long a4, unsigned long a5, + unsigned long a6, unsigned long a7, + struct arm_smccc_res *res) +{ + arm_smccc_hvc(a0, a1, a2, a3, a4, a5, a6, a7, res); +} + +static void smccc_invoke_smc(unsigned long a0, unsigned long a1, + unsigned long a2, unsigned long a3, + unsigned long a4, unsigned long a5, + unsigned long a6, unsigned long a7, + struct arm_smccc_res *res) +{ + arm_smccc_smc(a0, a1, a2, a3, a4, a5, a6, a7, res); +} + +static int bind_smccc_features(struct udevice *dev, int psci_method) +{ + struct psci_plat_data *pdata = dev_get_plat(dev); + struct arm_smccc_feature *feature; + size_t feature_cnt, n; + + if (!IS_ENABLED(CONFIG_ARM_SMCCC_FEATURES)) + return 0; + + /* + * SMCCC features discovery invoke SMCCC standard function ID + * ARM_SMCCC_ARCH_FEATURES but this sequence requires that this + * standard ARM_SMCCC_ARCH_FEATURES function ID itself is supported. + * It is queried here with invoking PSCI_FEATURES known available + * from PSCI 1.0. + */ + if (!device_is_compatible(dev, "arm,psci-1.0") || + PSCI_VERSION_MAJOR(psci_0_2_get_version()) == 0) + return 0; + + if (request_psci_features(ARM_SMCCC_ARCH_FEATURES) == + PSCI_RET_NOT_SUPPORTED) + return 0; + + if (psci_method == PSCI_METHOD_HVC) + pdata->invoke_fn = smccc_invoke_hvc; + else + pdata->invoke_fn = smccc_invoke_smc; + + feature_cnt = ll_entry_count(struct arm_smccc_feature, arm_smccc_feature); + feature = ll_entry_start(struct arm_smccc_feature, arm_smccc_feature); + + for (n = 0; n < feature_cnt; n++, feature++) { + const char *drv_name = feature->driver_name; + struct udevice *dev2; + int ret; + + if (!feature->is_supported || !feature->is_supported(pdata->invoke_fn)) + continue; + + ret = device_bind_driver(dev, drv_name, drv_name, &dev2); + if (ret) { + pr_warn("%s was not bound: %d, ignore\n", drv_name, ret); + continue; + } + + dev_set_parent_plat(dev2, dev_get_plat(dev)); + } + + return 0; +} + static int psci_bind(struct udevice *dev) { /* No SYSTEM_RESET support for PSCI 0.1 */ @@ -109,6 +181,10 @@ static int psci_bind(struct udevice *dev) pr_debug("PSCI System Reset was not bound.\n"); } + /* From PSCI v1.0 onward we can discover services through ARM_SMCCC_FEATURE */ + if (IS_ENABLED(CONFIG_ARM_SMCCC_FEATURES) && device_is_compatible(dev, "arm,psci-1.0")) + dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND); + return 0; } @@ -136,7 +212,7 @@ static int psci_probe(struct udevice *dev) return -EINVAL; } - return 0; + return bind_smccc_features(dev, psci_method); } /** @@ -240,4 +316,7 @@ U_BOOT_DRIVER(psci) = { .of_match = psci_of_match, .bind = psci_bind, .probe = psci_probe, +#ifdef CONFIG_ARM_SMCCC_FEATURES + .plat_auto = sizeof(struct psci_plat_data), +#endif }; diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h index 94a20c97937..e1d09884a1c 100644 --- a/include/linux/arm-smccc.h +++ b/include/linux/arm-smccc.h @@ -83,6 +83,22 @@ struct arm_smccc_quirk { } state; }; +/** + * struct arm_smccc_feature - Driver registration data for discoverable feature + * @driver_name: name of the driver relate to the SMCCC feature + * @is_supported: callback to test if SMCCC feature is supported + */ +struct arm_smccc_feature { + const char *driver_name; + bool (*is_supported)(void (*invoke_fn)(unsigned long a0, unsigned long a1, unsigned long a2, + unsigned long a3, unsigned long a4, unsigned long a5, + unsigned long a6, unsigned long a7, + struct arm_smccc_res *res)); +}; + +#define ARM_SMCCC_FEATURE_DRIVER(__name) \ + ll_entry_declare(struct arm_smccc_feature, __name, arm_smccc_feature) + /** * __arm_smccc_smc() - make SMC calls * @a0-a7: arguments passed in registers 0 to 7 diff --git a/include/linux/psci.h b/include/linux/psci.h index c78c1079a82..03e41863432 100644 --- a/include/linux/psci.h +++ b/include/linux/psci.h @@ -11,6 +11,8 @@ #ifndef _UAPI_LINUX_PSCI_H #define _UAPI_LINUX_PSCI_H +#include + /* * PSCI v0.1 interface * @@ -115,6 +117,18 @@ #define PSCI_RET_DISABLED -8 #define PSCI_RET_INVALID_ADDRESS -9 +/** + * struct psci_plat_data - PSCI driver platform data + * @method: Selected invocation conduit + */ +struct psci_plat_data { + void (*invoke_fn)(unsigned long arg0, unsigned long arg1, + unsigned long arg2, unsigned long arg3, + unsigned long arg4, unsigned long arg5, + unsigned long arg6, unsigned long arg7, + struct arm_smccc_res *res); +}; + #ifdef CONFIG_ARM_PSCI_FW unsigned long invoke_psci_fn(unsigned long a0, unsigned long a1, unsigned long a2, unsigned long a3); -- GitLab From 53355bb86c25d9cced1493df9fc95140acece556 Mon Sep 17 00:00:00 2001 From: Etienne Carriere Date: Wed, 1 Jun 2022 10:27:34 +0200 Subject: [PATCH 269/581] drivers: rng: add smccc trng driver Adds random number generator driver using Arm SMCCC TRNG interface to get entropy bytes from secure monitor. The driver registers as an Arm SMCCC feature driver to allow PSCI driver to bind a device for when secure monitor exposes RNG support from Arm SMCCC TRNG interface. Cc: Sughosh Ganu Cc: Heinrich Schuchardt Signed-off-by: Etienne Carriere --- MAINTAINERS | 5 + drivers/rng/Kconfig | 9 ++ drivers/rng/Makefile | 1 + drivers/rng/smccc_trng.c | 207 +++++++++++++++++++++++++++++++++++++++ 4 files changed, 222 insertions(+) create mode 100644 drivers/rng/smccc_trng.c diff --git a/MAINTAINERS b/MAINTAINERS index ba9fdb5a667..5945ba1c7a9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1278,6 +1278,11 @@ F: drivers/gpio/sl28cpld-gpio.c F: drivers/misc/sl28cpld.c F: drivers/watchdog/sl28cpld-wdt.c +SMCCC TRNG +M: Etienne Carriere +S: Maintained +F: drivers/rng/smccc_trng.c + SPI M: Jagan Teki S: Maintained diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig index c0c49c34843..21a9ff01954 100644 --- a/drivers/rng/Kconfig +++ b/drivers/rng/Kconfig @@ -65,4 +65,13 @@ config RNG_IPROC200 depends on DM_RNG help Enable random number generator for RPI4. + +config RNG_SMCCC_TRNG + bool "Arm SMCCC TRNG interface" + depends on DM_RNG && ARM_PSCI_FW + default y if ARM_SMCCC_FEATURES + help + Enable random number generator for platforms that support Arm + SMCCC TRNG interface. + endif diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile index 0ae0ed4171c..2494717d7c7 100644 --- a/drivers/rng/Makefile +++ b/drivers/rng/Makefile @@ -12,3 +12,4 @@ obj-$(CONFIG_RNG_OPTEE) += optee_rng.o obj-$(CONFIG_RNG_STM32MP1) += stm32mp1_rng.o obj-$(CONFIG_RNG_ROCKCHIP) += rockchip_rng.o obj-$(CONFIG_RNG_IPROC200) += iproc_rng200.o +obj-$(CONFIG_RNG_SMCCC_TRNG) += smccc_trng.o diff --git a/drivers/rng/smccc_trng.c b/drivers/rng/smccc_trng.c new file mode 100644 index 00000000000..3a4bb339415 --- /dev/null +++ b/drivers/rng/smccc_trng.c @@ -0,0 +1,207 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2022, Linaro Limited + */ + +#define LOG_CATEGORY UCLASS_RNG + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "smccc-trng" + +/** + * Arm SMCCC TRNG firmware interface specification: + * https://developer.arm.com/documentation/den0098/latest/ + */ +#define ARM_SMCCC_TRNG_VERSION 0x84000050 +#define ARM_SMCCC_TRNG_FEATURES 0x84000051 +#define ARM_SMCCC_TRNG_GET_UUID 0x84000052 +#define ARM_SMCCC_TRNG_RND_32 0x84000053 +#define ARM_SMCCC_TRNG_RND_64 0xC4000053 + +#define ARM_SMCCC_RET_TRNG_SUCCESS ((ulong)0) +#define ARM_SMCCC_RET_TRNG_NOT_SUPPORTED ((ulong)-1) +#define ARM_SMCCC_RET_TRNG_INVALID_PARAMETER ((ulong)-2) +#define ARM_SMCCC_RET_TRNG_NO_ENTROPY ((ulong)-3) + +#define TRNG_MAJOR_MASK GENMASK(30, 16) +#define TRNG_MAJOR_SHIFT 16 +#define TRNG_MINOR_MASK GENMASK(15, 0) +#define TRNG_MINOR_SHIFT 0 + +#define TRNG_MAX_RND_64 (192 / 8) +#define TRNG_MAX_RND_32 (96 / 8) + +/** + * struct smccc_trng_priv - Private data for SMCCC TRNG support + * + * @smc64 - True if TRNG_RND_64 is supported, false if TRNG_RND_32 is supported + */ +struct smccc_trng_priv { + bool smc64; +}; + +/* + * Copy random bytes from ulong SMCCC output register to target buffer + * Defines 2 function flavors for whether ARM_SMCCC_TRNG_RND_32 or + * ARM_SMCCC_TRNG_RND_64 was used to invoke the service. + */ +static size_t smc32_copy_sample(u8 **ptr, size_t size, ulong *rnd) +{ + size_t len = min(size, sizeof(u32)); + u32 sample = *rnd; + + memcpy(*ptr, &sample, len); + *ptr += len; + + return size - len; +} + +static size_t smc64_copy_sample(u8 **ptr, size_t size, ulong *rnd) +{ + size_t len = min(size, sizeof(u64)); + u64 sample = *rnd; + + memcpy(*ptr, &sample, len); + *ptr += len; + + return size - len; +} + +static int smccc_trng_read(struct udevice *dev, void *data, size_t len) +{ + struct psci_plat_data *smccc = dev_get_parent_plat(dev); + struct smccc_trng_priv *priv = dev_get_priv(dev); + struct arm_smccc_res res; + u32 func_id; + u8 *ptr = data; + size_t rem = len; + size_t max_sz; + size_t (*copy_sample)(u8 **ptr, size_t size, ulong *rnd); + + if (priv->smc64) { + copy_sample = smc64_copy_sample; + func_id = ARM_SMCCC_TRNG_RND_64; + max_sz = TRNG_MAX_RND_64; + } else { + copy_sample = smc32_copy_sample; + func_id = ARM_SMCCC_TRNG_RND_32; + max_sz = TRNG_MAX_RND_32; + } + + while (rem) { + size_t sz = min(rem, max_sz); + + smccc->invoke_fn(func_id, sz * 8, 0, 0, 0, 0, 0, 0, &res); + + switch (res.a0) { + case ARM_SMCCC_RET_TRNG_SUCCESS: + break; + case ARM_SMCCC_RET_TRNG_NO_ENTROPY: + continue; + default: + return -EIO; + } + + rem -= sz; + + sz = copy_sample(&ptr, sz, &res.a3); + if (sz) + sz = copy_sample(&ptr, sz, &res.a2); + if (sz) + sz = copy_sample(&ptr, sz, &res.a1); + } + + return 0; +} + +static const struct dm_rng_ops smccc_trng_ops = { + .read = smccc_trng_read, +}; + +static bool smccc_trng_is_supported(void (*invoke_fn)(unsigned long a0, unsigned long a1, + unsigned long a2, unsigned long a3, + unsigned long a4, unsigned long a5, + unsigned long a6, unsigned long a7, + struct arm_smccc_res *res)) +{ + struct arm_smccc_res res; + + (*invoke_fn)(ARM_SMCCC_ARCH_FEATURES, ARM_SMCCC_TRNG_VERSION, 0, 0, 0, 0, 0, 0, &res); + if (res.a0 == ARM_SMCCC_RET_NOT_SUPPORTED) + return false; + + (*invoke_fn)(ARM_SMCCC_TRNG_VERSION, 0, 0, 0, 0, 0, 0, 0, &res); + if (res.a0 & BIT(31)) + return false; + + /* Test 64bit interface and fallback to 32bit interface */ + invoke_fn(ARM_SMCCC_TRNG_FEATURES, ARM_SMCCC_TRNG_RND_64, + 0, 0, 0, 0, 0, 0, &res); + + if (res.a0 == ARM_SMCCC_RET_TRNG_NOT_SUPPORTED) + invoke_fn(ARM_SMCCC_TRNG_FEATURES, ARM_SMCCC_TRNG_RND_32, + 0, 0, 0, 0, 0, 0, &res); + + return res.a0 == ARM_SMCCC_RET_TRNG_SUCCESS; +} + +ARM_SMCCC_FEATURE_DRIVER(smccc_trng) = { + .driver_name = DRIVER_NAME, + .is_supported = smccc_trng_is_supported, +}; + +static int smccc_trng_probe(struct udevice *dev) +{ + struct psci_plat_data *smccc = dev_get_parent_plat(dev); + struct smccc_trng_priv *priv = dev_get_priv(dev); + struct arm_smccc_res res; + + if (!(smccc_trng_is_supported(smccc->invoke_fn))) + return -ENODEV; + + /* At least one of 64bit and 32bit interfaces is available */ + smccc->invoke_fn(ARM_SMCCC_TRNG_FEATURES, ARM_SMCCC_TRNG_RND_64, + 0, 0, 0, 0, 0, 0, &res); + priv->smc64 = (res.a0 == ARM_SMCCC_RET_TRNG_SUCCESS); + +#ifdef DEBUG + smccc->invoke_fn(ARM_SMCCC_TRNG_GET_UUID, 0, 0, 0, 0, 0, 0, 0, &res); + if (res.a0 != ARM_SMCCC_RET_TRNG_NOT_SUPPORTED) { + unsigned long uuid_a0 = res.a0; + unsigned long uuid_a1 = res.a1; + unsigned long uuid_a2 = res.a2; + unsigned long uuid_a3 = res.a3; + unsigned long major, minor; + + smccc->invoke_fn(ARM_SMCCC_TRNG_VERSION, 0, 0, 0, 0, 0, 0, 0, &res); + major = (res.a0 & TRNG_MAJOR_MASK) >> TRNG_MAJOR_SHIFT; + minor = (res.a0 & TRNG_MINOR_MASK) >> TRNG_MINOR_SHIFT; + + dev_dbg(dev, "Version %lu.%lu, UUID %08lx-%04lx-%04lx-%04lx-%04lx%08lx\n", + major, minor, uuid_a0, uuid_a1 >> 16, uuid_a1 & GENMASK(16, 0), + uuid_a2 >> 16, uuid_a2 & GENMASK(16, 0), uuid_a3); + } else { + dev_warn(dev, "Can't get TRNG UUID\n"); + } +#endif + + return 0; +} + +U_BOOT_DRIVER(smccc_trng) = { + .name = DRIVER_NAME, + .id = UCLASS_RNG, + .ops = &smccc_trng_ops, + .probe = smccc_trng_probe, + .priv_auto = sizeof(struct smccc_trng_priv), +}; -- GitLab From 935e3625ceedbcf11e66947f1bc8791ececbf083 Mon Sep 17 00:00:00 2001 From: T Karthik Reddy Date: Tue, 10 May 2022 13:26:09 +0200 Subject: [PATCH 270/581] net: xilinx: axi_emac: Use shared MDIO bus support for axi emac driver CONFIG_DM_ETH_PHY enables support to utilize generic ethernet phy framework. Though if ethernet PHY node is in other ethernet node, it will use shared MDIO to access the PHY of other ethernet. Move ethernet print info statement from plat function to probe function, as phyaddr is not enumerated when CONFIG_DM_ETH_PHY is enabled. Signed-off-by: T Karthik Reddy Signed-off-by: Michal Simek Reviewed-by: Ramon Fried Acked-by: Ashok Reddy Soma Link: https://lore.kernel.org/r/ecfec78234233fefdc172c141c207b2d78ef70c5.1652181968.git.michal.simek@amd.com --- drivers/net/xilinx_axi_emac.c | 38 ++++++++++++++++++++++++----------- 1 file changed, 26 insertions(+), 12 deletions(-) diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c index a4715735c3c..04277b1269f 100644 --- a/drivers/net/xilinx_axi_emac.c +++ b/drivers/net/xilinx_axi_emac.c @@ -19,6 +19,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -295,6 +296,9 @@ static int axiemac_phy_init(struct udevice *dev) /* Set default MDIO divisor */ writel(XAE_MDIO_DIV_DFT | XAE_MDIO_MC_MDIOEN_MASK, ®s->mdio_mc); + if (IS_ENABLED(CONFIG_DM_ETH_PHY)) + priv->phyaddr = eth_phy_get_addr(dev); + if (priv->phyaddr == -1) { /* Detect the PHY address */ for (i = 31; i >= 0; i--) { @@ -778,18 +782,29 @@ static int axi_emac_probe(struct udevice *dev) priv->phy_of_handle = plat->phy_of_handle; priv->interface = pdata->phy_interface; - priv->bus = mdio_alloc(); - priv->bus->read = axiemac_miiphy_read; - priv->bus->write = axiemac_miiphy_write; - priv->bus->priv = priv; + if (IS_ENABLED(CONFIG_DM_ETH_PHY)) + priv->bus = eth_phy_get_mdio_bus(dev); - ret = mdio_register_seq(priv->bus, dev_seq(dev)); - if (ret) - return ret; + if (!priv->bus) { + priv->bus = mdio_alloc(); + priv->bus->read = axiemac_miiphy_read; + priv->bus->write = axiemac_miiphy_write; + priv->bus->priv = priv; + + ret = mdio_register_seq(priv->bus, dev_seq(dev)); + if (ret) + return ret; + } + + if (IS_ENABLED(CONFIG_DM_ETH_PHY)) + eth_phy_set_mdio_bus(dev, priv->bus); axiemac_phy_init(dev); } + printf("AXI EMAC: %lx, phyaddr %d, interface %s\n", (ulong)pdata->iobase, + priv->phyaddr, phy_string_for_interface(pdata->phy_interface)); + return 0; } @@ -844,8 +859,10 @@ static int axi_emac_of_to_plat(struct udevice *dev) offset = fdtdec_lookup_phandle(gd->fdt_blob, node, "phy-handle"); if (offset > 0) { - plat->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, - "reg", -1); + if (!(IS_ENABLED(CONFIG_DM_ETH_PHY))) + plat->phyaddr = fdtdec_get_int(gd->fdt_blob, + offset, + "reg", -1); plat->phy_of_handle = offset; } @@ -857,9 +874,6 @@ static int axi_emac_of_to_plat(struct udevice *dev) "xlnx,eth-hasnobuf"); } - printf("AXI EMAC: %lx, phyaddr %d, interface %s\n", (ulong)pdata->iobase, - plat->phyaddr, phy_string_for_interface(pdata->phy_interface)); - return 0; } -- GitLab From 8faeb023e9486fdbadf70f438c52e2d47ba2ab86 Mon Sep 17 00:00:00 2001 From: T Karthik Reddy Date: Tue, 10 May 2022 13:26:10 +0200 Subject: [PATCH 271/581] net: xilinx: axi_emaclite: Use shared MDIO bus support for axi emaclite driver CONFIG_DM_ETH_PHY enables support to utilize generic ethernet phy framework. Though if ethernet PHY node is in other ethernet node, it will use shared MDIO to access the PHY of other ethernet. Move ethernet print info statement from plat function to probe function, as phyaddr is not enumerated when CONFIG_DM_ETH_PHY is enabled. Signed-off-by: T Karthik Reddy Signed-off-by: Michal Simek Reviewed-by: Ramon Fried Acked-by: Ashok Reddy Soma Link: https://lore.kernel.org/r/93e11ccca56b6e52b2dcc283d08d5042537f828f.1652181968.git.michal.simek@amd.com --- drivers/net/xilinx_emaclite.c | 43 +++++++++++++++++++++++------------ 1 file changed, 28 insertions(+), 15 deletions(-) diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c index 43fc36dc6a8..6c9f1f7c272 100644 --- a/drivers/net/xilinx_emaclite.c +++ b/drivers/net/xilinx_emaclite.c @@ -22,6 +22,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -564,14 +565,27 @@ static int emaclite_probe(struct udevice *dev) struct xemaclite *emaclite = dev_get_priv(dev); int ret; - emaclite->bus = mdio_alloc(); - emaclite->bus->read = emaclite_miiphy_read; - emaclite->bus->write = emaclite_miiphy_write; - emaclite->bus->priv = emaclite; + if (IS_ENABLED(CONFIG_DM_ETH_PHY)) + emaclite->bus = eth_phy_get_mdio_bus(dev); - ret = mdio_register_seq(emaclite->bus, dev_seq(dev)); - if (ret) - return ret; + if (!emaclite->bus) { + emaclite->bus = mdio_alloc(); + emaclite->bus->read = emaclite_miiphy_read; + emaclite->bus->write = emaclite_miiphy_write; + emaclite->bus->priv = emaclite; + + ret = mdio_register_seq(emaclite->bus, dev_seq(dev)); + if (ret) + return ret; + } + + if (IS_ENABLED(CONFIG_DM_ETH_PHY)) { + eth_phy_set_mdio_bus(dev, emaclite->bus); + emaclite->phyaddr = eth_phy_get_addr(dev); + } + + printf("EMACLITE: %lx, phyaddr %d, %d/%d\n", (ulong)emaclite->regs, + emaclite->phyaddr, emaclite->txpp, emaclite->rxpp); return 0; } @@ -606,20 +620,19 @@ static int emaclite_of_to_plat(struct udevice *dev) emaclite->phyaddr = -1; - offset = fdtdec_lookup_phandle(gd->fdt_blob, dev_of_offset(dev), - "phy-handle"); - if (offset > 0) - emaclite->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, - "reg", -1); + if (!(IS_ENABLED(CONFIG_DM_ETH_PHY))) { + offset = fdtdec_lookup_phandle(gd->fdt_blob, dev_of_offset(dev), + "phy-handle"); + if (offset > 0) + emaclite->phyaddr = fdtdec_get_int(gd->fdt_blob, + offset, "reg", -1); + } emaclite->txpp = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "xlnx,tx-ping-pong", 0); emaclite->rxpp = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "xlnx,rx-ping-pong", 0); - printf("EMACLITE: %lx, phyaddr %d, %d/%d\n", (ulong)emaclite->regs, - emaclite->phyaddr, emaclite->txpp, emaclite->rxpp); - return 0; } -- GitLab From a110caa206b5a19f2b8ed1f26a6bbd5e4c96597d Mon Sep 17 00:00:00 2001 From: T Karthik Reddy Date: Tue, 10 May 2022 13:26:11 +0200 Subject: [PATCH 272/581] xilinx: Add CONFIG_DM_ETH_PHY config Enable CONFIG_DM_ETH_PHY to utilize shared MDIO bus support on all xilinx platforms. Signed-off-by: T Karthik Reddy Signed-off-by: Michal Simek Acked-by: Ashok Reddy Soma Link: https://lore.kernel.org/r/965981eb324d13a98aad8bd88eb8b50bc5147a7e.1652181968.git.michal.simek@amd.com --- configs/microblaze-generic_defconfig | 1 + configs/xilinx_versal_virt_defconfig | 1 + configs/xilinx_zynq_virt_defconfig | 1 + configs/xilinx_zynqmp_virt_defconfig | 1 + 4 files changed, 4 insertions(+) diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index 3142b469c26..7994110b28a 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -76,6 +76,7 @@ CONFIG_PHY_NATSEMI=y CONFIG_PHY_REALTEK=y CONFIG_PHY_VITESSE=y CONFIG_DM_ETH=y +CONFIG_DM_ETH_PHY=y CONFIG_XILINX_AXIEMAC=y CONFIG_XILINX_EMACLITE=y CONFIG_SYS_NS16550=y diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index 38747ffd02c..c9ae0185f8a 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -92,6 +92,7 @@ CONFIG_PHY_REALTEK=y CONFIG_PHY_TI_DP83867=y CONFIG_PHY_VITESSE=y CONFIG_PHY_FIXED=y +CONFIG_DM_ETH_PHY=y CONFIG_PHY_GIGE=y CONFIG_XILINX_AXIEMAC=y CONFIG_XILINX_AXIMRMAC=y diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index 1f3e6a42a14..120bc29393d 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -111,6 +111,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_PHY_REALTEK=y CONFIG_PHY_XILINX=y +CONFIG_DM_ETH_PHY=y CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_ARM_DCC=y diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 35894076c52..abaebb8edaf 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -160,6 +160,7 @@ CONFIG_PHY_TI_DP83867=y CONFIG_PHY_VITESSE=y CONFIG_PHY_XILINX_GMII2RGMII=y CONFIG_PHY_FIXED=y +CONFIG_DM_ETH_PHY=y CONFIG_XILINX_AXIEMAC=y CONFIG_ZYNQ_GEM=y CONFIG_DM_REGULATOR=y -- GitLab From 2eeceb4842b2465e07e654b78133bb035c28b7c2 Mon Sep 17 00:00:00 2001 From: Ashok Reddy Soma Date: Thu, 5 May 2022 23:53:45 -0600 Subject: [PATCH 273/581] arm64: versal: Add support to load an app at EL1 Add support to switch to EL1 and load an EL1 app from U-Boot which is executing at EL2 or EL3 in aarch64 mode. Signed-off-by: Ashok Reddy Soma Link: https://lore.kernel.org/r/20220506055345.1921-1-ashok.reddy.soma@xilinx.com Signed-off-by: Michal Simek --- board/xilinx/versal/board.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c index a88f5bb177e..81663e0cd0e 100644 --- a/board/xilinx/versal/board.c +++ b/board/xilinx/versal/board.c @@ -91,6 +91,23 @@ int board_early_init_r(void) return 0; } +unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc, + char *const argv[]) +{ + int ret = 0; + + if (current_el() > 1) { + smp_kick_all_cpus(); + dcache_disable(); + armv8_switch_to_el1(0x0, 0, 0, 0, (unsigned long)entry, + ES_TO_AARCH64); + } else { + printf("FAIL: current EL is not above EL1\n"); + ret = EINVAL; + } + return ret; +} + static u8 versal_get_bootmode(void) { u8 bootmode; -- GitLab From 254f0c766d944ef5dbb2053340feb328f5e061aa Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 6 Jun 2022 09:37:09 +0200 Subject: [PATCH 274/581] arm64: zynqmp: Add debug messages to bl2_plat_get_bl31_params() It is useful to get information about BL type and entry address that's why add some debug messages. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/fb023b618a009009a0b564c24223cadc10ced5b3.1652871741.git.michal.simek@amd.com --- arch/arm/mach-zynqmp/handoff.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/mach-zynqmp/handoff.c b/arch/arm/mach-zynqmp/handoff.c index 31346d9b2e2..b9e0c6c536b 100644 --- a/arch/arm/mach-zynqmp/handoff.c +++ b/arch/arm/mach-zynqmp/handoff.c @@ -79,7 +79,10 @@ struct bl31_params *bl2_plat_get_bl31_params(uintptr_t bl32_entry, atfhandoffparams->magic[2] = 'N'; atfhandoffparams->magic[3] = 'X'; + debug("Creating handoff:\n"); + if (bl32_entry) { + debug(" to BL32 at 0x%x EL-1, Secure\n", (u32)bl32_entry); atfhandoffparams->partition[index].entry_point = bl32_entry; atfhandoffparams->partition[index].flags = FSBL_FLAGS_EL1 << FSBL_FLAGS_EL_SHIFT | FSBL_FLAGS_SECURE << FSBL_FLAGS_TZ_SHIFT; @@ -87,6 +90,7 @@ struct bl31_params *bl2_plat_get_bl31_params(uintptr_t bl32_entry, } if (bl33_entry) { + debug(" to BL33 at 0x%x EL-2\n", (u32)bl33_entry); atfhandoffparams->partition[index].entry_point = bl33_entry; atfhandoffparams->partition[index].flags = FSBL_FLAGS_EL2 << FSBL_FLAGS_EL_SHIFT; -- GitLab From ad55d99e3cc3aabdb1c167b7b63e64a26a458225 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 6 Jun 2022 09:44:01 +0200 Subject: [PATCH 275/581] serial: Setup serial base and freq for zynq/zynqmp Setup default values for debug console, base address and frequency. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/ce93efd3ed67aa6390810ce0b79e0d00e7c36b4b.1652871485.git.michal.simek@amd.com --- drivers/serial/Kconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 45c284a408d..f585622fdb7 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -476,6 +476,8 @@ config DEBUG_UART_BASE depends on DEBUG_UART default 0 if DEBUG_SBI_CONSOLE default 0 if DEBUG_UART_SANDBOX + default 0xff000000 if DEBUG_UART_ZYNQ && ARCH_ZYNQMP + default 0xe0000000 if DEBUG_UART_ZYNQ && ARCH_ZYNQ help This is the base address of your UART for memory-mapped UARTs. @@ -502,6 +504,8 @@ config DEBUG_UART_CLOCK default 0 if DEBUG_SBI_CONSOLE default 0 if DEBUG_UART_SANDBOX default 0 if DEBUG_MVEBU_A3700_UART + default 100000000 if DEBUG_UART_ZYNQ && ARCH_ZYNQMP + default 50000000 if DEBUG_UART_ZYNQ && ARCH_ZYNQ help The UART input clock determines the speed of the internal UART circuitry. The baud rate is derived from this by dividing the input -- GitLab From baba22addd2c08789325f798a22c2b568538cacb Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 18 May 2022 12:49:26 +0200 Subject: [PATCH 276/581] arm64: zynqmp: Add support for kr260 revA/B boards Board is using kv260 design for couple of parts defined by spec like i2c eeproms, ina260, uart, etc. Board has 4 gems. One gem connected via PS SGMII(GT), another PS RGMII(MIO) and 2 via EMIO. First two shares the same MIO lines for PHYs. PL based one have separate EMIO lines via PL. Also two USB 3.0 with usb hubs are present. USB phys and USB hubs should have separate reset line. The first usb0 hub also has USB-SD controller (usb2244) connected to port 0. To test compatibility with k26 you can run: fdtoverlay -o /tmp/output.dtb -i arch/arm/dts/zynqmp-sm-k26-revA.dtb \ arch/arm/dts/zynqmp-sck-kr-g-revA.dtbo Also add support for kr260-revB board. Based on FRU it is revision B but schematics can be label as revA03. Changes in revB are: - SFP light - GEM2/3 TX_CLK fixes - PMOD/RPI connector fixes - Replace si5332 with oscilators Signed-off-by: Michal Simek Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/dac2ee1826e73b89c8cc1e430354eb43d291f675.1652870941.git.michal.simek@amd.com --- arch/arm/dts/Makefile | 2 + arch/arm/dts/zynqmp-sck-kr-g-revA.dts | 382 ++++++++++++++++++++++++++ arch/arm/dts/zynqmp-sck-kr-g-revB.dts | 382 ++++++++++++++++++++++++++ 3 files changed, 766 insertions(+) create mode 100644 arch/arm/dts/zynqmp-sck-kr-g-revA.dts create mode 100644 arch/arm/dts/zynqmp-sck-kr-g-revB.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 0a2713c06a3..8da631b9e6a 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -342,6 +342,8 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \ zynqmp-mini-qspi.dtb \ zynqmp-sm-k26-revA.dtb \ zynqmp-smk-k26-revA.dtb \ + zynqmp-sck-kr-g-revA.dtbo \ + zynqmp-sck-kr-g-revB.dtbo \ zynqmp-sck-kv-g-revA.dtbo \ zynqmp-sck-kv-g-revB.dtbo \ zynqmp-topic-miamimp-xilinx-xdp-v1r1.dtb \ diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts new file mode 100644 index 00000000000..7be02ab29fa --- /dev/null +++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts @@ -0,0 +1,382 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for KR260 revA Carrier Card + * + * (C) Copyright 2021, Xilinx, Inc. + * + * Michal Simek + */ + +#include +#include +#include +#include + +/dts-v1/; +/plugin/; + +&{/} { + compatible = "xlnx,zynqmp-sk-kr260-revA", + "xlnx,zynqmp-sk-kr260", "xlnx,zynqmp"; + + ina260-u14 { + compatible = "iio-hwmon"; + io-channels = <&u14 0>, <&u14 1>, <&u14 2>; + }; + + si5332_0: si5332_0 { /* u17 - GEM0/1 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + }; + + si5332_1: si5332_1 { /* u17 - DP */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <27000000>; + }; + + si5332_2: si5332_2 { /* u17 - USB */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; + + si5332_3: si5332_3 { /* u17 - SFP+ */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <156250000>; + }; + + si5332_4: si5332_4 { /* u17 - GEM2 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; + + si5332_5: si5332_5 { /* u17 - GEM3 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; +}; + +&i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */ + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_default>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>; + + u14: ina260@40 { /* u14 */ + compatible = "ti,ina260"; + #io-channel-cells = <1>; + label = "ina260-u14"; + reg = <0x40>; + }; + + slg7xl45106: gpio@11 { /* u19 - reset logic */ + compatible = "dlg,slg7xl45106"; + reg = <0x11>; + label = "resetchip"; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "USB0_PHY_RESET_B", "USB1_PHY_RESET_B", + "SD_RESET_B", "USB0_HUB_RESET_B", + "USB1_HUB_RESET_B", "PS_GEM0_RESET_B", + "PS_GEM1_RESET_B", ""; + }; + + i2c-mux@74 { /* u18 */ + compatible = "nxp,pca9546"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + usbhub_i2c0: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + usbhub_i2c1: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + /* Bus 2/3 are not connected */ + }; + + /* si5332@6a - u17 - clock-generator */ +}; + +/* GEM SGMII/DP and USB 3.0 */ +&psgtr { + status = "okay"; + /* gem0/1, dp, usb */ + clocks = <&si5332_0>, <&si5332_1>, <&si5332_2>; + clock-names = "ref0", "ref1", "ref2"; +}; + +&zynqmp_dpsub { + status = "okay"; + phy-names = "dp-phy0"; + phys = <&psgtr 1 PHY_TYPE_DP 0 1>; + assigned-clock-rates = <27000000>, <25000000>, <300000000>; +}; + +&zynqmp_dpdma { + status = "okay"; + assigned-clock-rates = <600000000>; +}; + +&usb0 { /* mio52 - mio63 */ + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0_default>; + phy-names = "usb3-phy"; + phys = <&psgtr 2 PHY_TYPE_USB3 0 2>; + reset-gpios = <&slg7xl45106 0 GPIO_ACTIVE_LOW>; + assigned-clock-rates = <250000000>, <20000000>; + + usbhub0: usb-hub { /* u43 */ + i2c-bus = <&usbhub_i2c0>; + compatible = "microchip,usb5744"; + reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>; + }; + + usb2244: usb-sd { /* u38 */ + compatible = "microchip,usb2244"; + reset-gpios = <&slg7xl45106 2 GPIO_ACTIVE_LOW>; + }; +}; + +&dwc3_0 { + status = "okay"; + dr_mode = "host"; + snps,usb3_lpm_capable; + maximum-speed = "super-speed"; +}; + +&usb1 { /* mio64 - mio75 */ + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb1_default>; + phy-names = "usb3-phy"; + phys = <&psgtr 3 PHY_TYPE_USB3 1 2>; + reset-gpios = <&slg7xl45106 1 GPIO_ACTIVE_LOW>; + assigned-clock-rates = <250000000>, <20000000>; + + usbhub1: usb-hub { /* u84 */ + i2c-bus = <&usbhub_i2c1>; + compatible = "microchip,usb5744"; + reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>; + }; +}; + +&dwc3_1 { + status = "okay"; + dr_mode = "host"; + snps,usb3_lpm_capable; + maximum-speed = "super-speed"; +}; + +&gem0 { /* mdio mio50/51 */ + status = "okay"; + phys = <&psgtr 0 PHY_TYPE_SGMII 0 0>; + phy-handle = <&phy0>; + phy-mode = "sgmii"; + is-internal-pcspma; +}; + +&gem1 { /* mdio mio50/51, gem mio38 - mio49 */ + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gem1_default>; + phy-handle = <&phy1>; + phy-mode = "rgmii-id"; + + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy0: ethernet-phy@4 { /* u81 */ + #phy-cells = <1>; + compatible = "ethernet-phy-id2000.a231"; + reg = <4>; + ti,rx-internal-delay = ; + ti,tx-internal-delay = ; + ti,fifo-depth = ; + ti,dp83867-rxctrl-strap-quirk; + reset-assert-us = <100>; + reset-deassert-us = <280>; + reset-gpios = <&slg7xl45106 5 GPIO_ACTIVE_LOW>; + }; + phy1: ethernet-phy@8 { /* u36 */ + #phy-cells = <1>; + compatible = "ethernet-phy-id2000.a231"; + reg = <8>; + ti,rx-internal-delay = ; + ti,tx-internal-delay = ; + ti,fifo-depth = ; + ti,dp83867-rxctrl-strap-quirk; + reset-assert-us = <100>; + reset-deassert-us = <280>; + reset-gpios = <&slg7xl45106 6 GPIO_ACTIVE_LOW>; + }; + }; +}; + +/* gem2/gem3 via PL with phys u79@2 and u80@3 */ + +&pinctrl0 { /* required by spec */ + status = "okay"; + + pinctrl_uart1_default: uart1-default { + conf { + groups = "uart1_9_grp"; + slew-rate = ; + power-source = ; + drive-strength = <12>; + }; + + conf-rx { + pins = "MIO37"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO36"; + bias-disable; + }; + + mux { + groups = "uart1_9_grp"; + function = "uart1"; + }; + }; + + pinctrl_i2c1_default: i2c1-default { + conf { + groups = "i2c1_6_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + + mux { + groups = "i2c1_6_grp"; + function = "i2c1"; + }; + }; + + pinctrl_i2c1_gpio: i2c1-gpio { + conf { + groups = "gpio0_24_grp", "gpio0_25_grp"; + slew-rate = ; + power-source = ; + }; + + mux { + groups = "gpio0_24_grp", "gpio0_25_grp"; + function = "gpio0"; + }; + }; + + pinctrl_gem1_default: gem1-default { + conf { + groups = "ethernet1_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO44", "MIO46", "MIO48"; + bias-high-impedance; + low-power-disable; + }; + + conf-bootstrap { + pins = "MIO45", "MIO47", "MIO49"; + bias-disable; + low-power-disable; + }; + + conf-tx { + pins = "MIO38", "MIO39", "MIO40", + "MIO41", "MIO42", "MIO43"; + bias-disable; + low-power-enable; + }; + + conf-mdio { + groups = "mdio1_0_grp"; + slew-rate = ; + power-source = ; + bias-disable; + }; + + mux-mdio { + function = "mdio1"; + groups = "mdio1_0_grp"; + }; + + mux { + function = "ethernet1"; + groups = "ethernet1_0_grp"; + }; + }; + + pinctrl_usb0_default: usb0-default { + conf { + groups = "usb0_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO52", "MIO53", "MIO55"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", + "MIO60", "MIO61", "MIO62", "MIO63"; + bias-disable; + }; + + mux { + groups = "usb0_0_grp"; + function = "usb0"; + }; + }; + + pinctrl_usb1_default: usb1-default { + conf { + groups = "usb1_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO64", "MIO65", "MIO67"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", + "MIO72", "MIO73", "MIO74", "MIO75"; + bias-disable; + }; + + mux { + groups = "usb1_0_grp"; + function = "usb1"; + }; + }; +}; + +&uart1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_default>; +}; diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts new file mode 100644 index 00000000000..56effb5e21a --- /dev/null +++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts @@ -0,0 +1,382 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for KR260 revB Carrier Card (A03 revision) + * + * (C) Copyright 2021 - 2022, Xilinx, Inc. + * + * Michal Simek + */ + +#include +#include +#include +#include + +/dts-v1/; +/plugin/; + +&{/} { + compatible = "xlnx,zynqmp-sk-kr260-revB", + "xlnx,zynqmp-sk-kr260", "xlnx,zynqmp"; + + ina260-u14 { + compatible = "iio-hwmon"; + io-channels = <&u14 0>, <&u14 1>, <&u14 2>; + }; + + clk_125: clock0 { /* u87 - GEM0/1 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + }; + + clk_27: clock1 { /* u86 - DP */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <27000000>; + }; + + clk_26: clock2 { /* u89 - USB */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; + + clk_156: clock3 { /* u90 - SFP+ */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <156250000>; + }; + + clk_25_0: clock4 { /* u92/u91 - GEM2 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; + + clk_25_1: clock5 { /* u92/u91 - GEM3 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; +}; + +&i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */ + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_default>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>; + + u14: ina260@40 { /* u14 */ + compatible = "ti,ina260"; + #io-channel-cells = <1>; + label = "ina260-u14"; + reg = <0x40>; + }; + + slg7xl45106: gpio@11 { /* u19 - reset logic */ + compatible = "dlg,slg7xl45106"; + reg = <0x11>; + label = "resetchip"; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "USB0_PHY_RESET_B", "USB1_PHY_RESET_B", + "SD_RESET_B", "USB0_HUB_RESET_B", + "USB1_HUB_RESET_B", "PS_GEM0_RESET_B", + "PS_GEM1_RESET_B", ""; + }; + + i2c-mux@74 { /* u18 */ + compatible = "nxp,pca9546"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + usbhub_i2c0: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + usbhub_i2c1: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + /* Bus 2/3 are not connected */ + }; + + /* si5332@6a - u17 - clock-generator */ +}; + +/* GEM SGMII/DP and USB 3.0 */ +&psgtr { + status = "okay"; + /* gem0/1, dp, usb */ + clocks = <&clk_125>, <&clk_27>, <&clk_26>; + clock-names = "ref0", "ref1", "ref2"; +}; + +&zynqmp_dpsub { + status = "okay"; + phy-names = "dp-phy0"; + phys = <&psgtr 1 PHY_TYPE_DP 0 1>; + assigned-clock-rates = <27000000>, <25000000>, <300000000>; +}; + +&zynqmp_dpdma { + status = "okay"; + assigned-clock-rates = <600000000>; +}; + +&usb0 { /* mio52 - mio63 */ + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0_default>; + phy-names = "usb3-phy"; + phys = <&psgtr 2 PHY_TYPE_USB3 0 2>; + reset-gpios = <&slg7xl45106 0 GPIO_ACTIVE_LOW>; + assigned-clock-rates = <250000000>, <20000000>; + + usbhub0: usb-hub { /* u43 */ + i2c-bus = <&usbhub_i2c0>; + compatible = "microchip,usb5744"; + reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>; + }; + + usb2244: usb-sd { /* u38 */ + compatible = "microchip,usb2244"; + reset-gpios = <&slg7xl45106 2 GPIO_ACTIVE_LOW>; + }; +}; + +&dwc3_0 { + status = "okay"; + dr_mode = "host"; + snps,usb3_lpm_capable; + maximum-speed = "super-speed"; +}; + +&usb1 { /* mio64 - mio75 */ + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb1_default>; + phy-names = "usb3-phy"; + phys = <&psgtr 3 PHY_TYPE_USB3 1 2>; + reset-gpios = <&slg7xl45106 1 GPIO_ACTIVE_LOW>; + assigned-clock-rates = <250000000>, <20000000>; + + usbhub1: usb-hub { /* u84 */ + i2c-bus = <&usbhub_i2c1>; + compatible = "microchip,usb5744"; + reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>; + }; +}; + +&dwc3_1 { + status = "okay"; + dr_mode = "host"; + snps,usb3_lpm_capable; + maximum-speed = "super-speed"; +}; + +&gem0 { /* mdio mio50/51 */ + status = "okay"; + phys = <&psgtr 0 PHY_TYPE_SGMII 0 0>; + phy-handle = <&phy0>; + phy-mode = "sgmii"; + is-internal-pcspma; +}; + +&gem1 { /* mdio mio50/51, gem mio38 - mio49 */ + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gem1_default>; + phy-handle = <&phy1>; + phy-mode = "rgmii-id"; + + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy0: ethernet-phy@4 { /* u81 */ + #phy-cells = <1>; + compatible = "ethernet-phy-id2000.a231"; + reg = <4>; + ti,rx-internal-delay = ; + ti,tx-internal-delay = ; + ti,fifo-depth = ; + ti,dp83867-rxctrl-strap-quirk; + reset-assert-us = <100>; + reset-deassert-us = <280>; + reset-gpios = <&slg7xl45106 5 GPIO_ACTIVE_LOW>; + }; + phy1: ethernet-phy@8 { /* u36 */ + #phy-cells = <1>; + compatible = "ethernet-phy-id2000.a231"; + reg = <8>; + ti,rx-internal-delay = ; + ti,tx-internal-delay = ; + ti,fifo-depth = ; + ti,dp83867-rxctrl-strap-quirk; + reset-assert-us = <100>; + reset-deassert-us = <280>; + reset-gpios = <&slg7xl45106 6 GPIO_ACTIVE_LOW>; + }; + }; +}; + +/* gem2/gem3 via PL with phys u79@2 and u80@3 */ + +&pinctrl0 { /* required by spec */ + status = "okay"; + + pinctrl_uart1_default: uart1-default { + conf { + groups = "uart1_9_grp"; + slew-rate = ; + power-source = ; + drive-strength = <12>; + }; + + conf-rx { + pins = "MIO37"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO36"; + bias-disable; + }; + + mux { + groups = "uart1_9_grp"; + function = "uart1"; + }; + }; + + pinctrl_i2c1_default: i2c1-default { + conf { + groups = "i2c1_6_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + + mux { + groups = "i2c1_6_grp"; + function = "i2c1"; + }; + }; + + pinctrl_i2c1_gpio: i2c1-gpio { + conf { + groups = "gpio0_24_grp", "gpio0_25_grp"; + slew-rate = ; + power-source = ; + }; + + mux { + groups = "gpio0_24_grp", "gpio0_25_grp"; + function = "gpio0"; + }; + }; + + pinctrl_gem1_default: gem1-default { + conf { + groups = "ethernet1_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO44", "MIO46", "MIO48"; + bias-high-impedance; + low-power-disable; + }; + + conf-bootstrap { + pins = "MIO45", "MIO47", "MIO49"; + bias-disable; + low-power-disable; + }; + + conf-tx { + pins = "MIO38", "MIO39", "MIO40", + "MIO41", "MIO42", "MIO43"; + bias-disable; + low-power-enable; + }; + + conf-mdio { + groups = "mdio1_0_grp"; + slew-rate = ; + power-source = ; + bias-disable; + }; + + mux-mdio { + function = "mdio1"; + groups = "mdio1_0_grp"; + }; + + mux { + function = "ethernet1"; + groups = "ethernet1_0_grp"; + }; + }; + + pinctrl_usb0_default: usb0-default { + conf { + groups = "usb0_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO52", "MIO53", "MIO55"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", + "MIO60", "MIO61", "MIO62", "MIO63"; + bias-disable; + }; + + mux { + groups = "usb0_0_grp"; + function = "usb0"; + }; + }; + + pinctrl_usb1_default: usb1-default { + conf { + groups = "usb1_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO64", "MIO65", "MIO67"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", + "MIO72", "MIO73", "MIO74", "MIO75"; + bias-disable; + }; + + mux { + groups = "usb1_0_grp"; + function = "usb1"; + }; + }; +}; + +&uart1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_default>; +}; -- GitLab From ff5d9065ed58718283b10ae229043bde8fa9c4f3 Mon Sep 17 00:00:00 2001 From: Stefan Herbrechtsmeier Date: Tue, 7 Jun 2022 09:43:14 +0200 Subject: [PATCH 277/581] xilinx: zynqmp: Do not use 0 as spl bss start address Do not use 0 as address for memory because of the special meaning for pointers (null pointer). Change the spl bss start address to the second page. Signed-off-by: Stefan Herbrechtsmeier Link: https://lore.kernel.org/r/20220607074314.27125-1-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek --- include/configs/xilinx_zynqmp.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index f25d796a1e7..21a5cf1617b 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -209,7 +209,7 @@ #define CONFIG_SPL_MAX_SIZE 0x40000 /* Just random location in OCM */ -#define CONFIG_SPL_BSS_START_ADDR 0x0 +#define CONFIG_SPL_BSS_START_ADDR 0x1000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #if defined(CONFIG_SPL_SPI_FLASH_SUPPORT) -- GitLab From b611f7faf978e673f939aa096e72dca08fdea9e8 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 24 Jun 2022 14:14:25 +0200 Subject: [PATCH 278/581] arm64: zynqmp: Enable DP for kv260-revA board DP is enabled for revB and should be enabled for kv260-revA too. Changes in other boards were done by commit 8b82a3a7feb0 ("arm64: zynqmp: Enable DP driver for SOMs"). Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/4e273bce3a8acf4495b67b702b1704acec8d9ccb.1654779436.git.michal.simek@amd.com --- arch/arm/dts/zynqmp-sck-kv-g-revA.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts index 85994bef7cc..8250a493c8a 100644 --- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts +++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts @@ -112,7 +112,7 @@ }; &zynqmp_dpsub { - status = "disabled"; + status = "okay"; phy-names = "dp-phy0", "dp-phy1"; phys = <&psgtr 1 PHY_TYPE_DP 0 0>, <&psgtr 0 PHY_TYPE_DP 1 0>; assigned-clock-rates = <27000000>, <25000000>, <300000000>; -- GitLab From 123462e5e534d6e17b1b7d2006734bbe54b03e0a Mon Sep 17 00:00:00 2001 From: Ashok Reddy Soma Date: Wed, 15 Jun 2022 11:52:28 +0200 Subject: [PATCH 279/581] pinctrl: zynqmp: Add support for output-enable and bias-high-impedance Add support to handle 'output-enable' and 'bias-high-impedance' configurations. DT property output-enable brings out the pins from tri-state, whereas bias-high-impedance changes the pins state to tri-state. Signed-off-by: Ashok Reddy Soma Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/1a02cd41d183d397ebce23c497178281c7286692.1655286745.git.michal.simek@amd.com --- drivers/pinctrl/pinctrl-zynqmp.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/pinctrl/pinctrl-zynqmp.c b/drivers/pinctrl/pinctrl-zynqmp.c index 7c5a02db1b9..52d428f566f 100644 --- a/drivers/pinctrl/pinctrl-zynqmp.c +++ b/drivers/pinctrl/pinctrl-zynqmp.c @@ -467,6 +467,10 @@ static int zynqmp_pinconf_set(struct udevice *dev, unsigned int pin, pin); break; case PIN_CONFIG_BIAS_HIGH_IMPEDANCE: + param = PM_PINCTRL_CONFIG_TRI_STATE; + arg = PM_PINCTRL_TRI_STATE_ENABLE; + ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); + break; case PIN_CONFIG_LOW_POWER_MODE: /* * This cases are mentioned in dts but configurable @@ -475,6 +479,11 @@ static int zynqmp_pinconf_set(struct udevice *dev, unsigned int pin, */ ret = 0; break; + case PIN_CONFIG_OUTPUT_ENABLE: + param = PM_PINCTRL_CONFIG_TRI_STATE; + arg = PM_PINCTRL_TRI_STATE_DISABLE; + ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); + break; default: dev_warn(dev, "unsupported configuration parameter '%u'\n", param); -- GitLab From 0b0d433b6c73fafc448c02b75196391ab3031a84 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 15 Jun 2022 11:56:54 +0200 Subject: [PATCH 280/581] arm64: zynqmp: Fix i2c addresses for vck190 SC si570 is normally at 0x5d address and address is not aligned with address in node. 8T49N240 can't be at 0xd8 that's why it is shifter by one bit. Signed-off-by: Michal Simek Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/4fa86fffa9cb8abe633fbc5a9c55bea249b5edfb.1655287013.git.michal.simek@amd.com --- arch/arm/dts/zynqmp-e-a2197-00-revA.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts index 72618378230..37c56181c9c 100644 --- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts @@ -294,10 +294,10 @@ #address-cells = <1>; #size-cells = <0>; reg = <2>; - clock_8t49n287: clock-generator@d8 { /* u39 8T49N240 */ + clock_8t49n287: clock-generator@6c { /* u39 8T49N240 */ #clock-cells = <1>; /* author David Cater */ compatible = "idt,8t49n240", "idt,8t49n241"; /* FIXME no driver for 240 */ - reg = <0xd8>; + reg = <0x6c>; /* Documentation/devicetree/bindings/clock/idt,idt8t49n24x.txt */ /* FIXME there input via J241 Samtec CLK1 and CLK0 from U38 - selection PIN */ }; @@ -447,7 +447,7 @@ si570_user1: clock-generator@5d { /* u205 */ #clock-cells = <0>; compatible = "silabs,si570"; - reg = <0x5f>; + reg = <0x5d>; temperature-stability = <50>; factory-fout = <100000000>; clock-frequency = <100000000>; -- GitLab From 5f5979f430861c2a41c28cc2b3cc96f84021493f Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 15 Jun 2022 11:56:55 +0200 Subject: [PATCH 281/581] arm64: zynqmp: Update tps53681 i2c address TI manual (https://www.ti.com/lit/gpn/TPS53681) is saying that i2c address is 7bit where c0h is 1100000 which is 0x60. This will fix issues reported by make dtbs that 0xc0 is above 7bit regular i2c address range. Signed-off-by: Michal Simek Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/2f50c1cd258f6b05deb2a6a9af7fa92952f3f8cb.1655287013.git.michal.simek@amd.com --- arch/arm/dts/zynqmp-g-a2197-00-revA.dts | 4 ++-- arch/arm/dts/zynqmp-m-a2197-01-revA.dts | 4 ++-- arch/arm/dts/zynqmp-m-a2197-02-revA.dts | 4 ++-- arch/arm/dts/zynqmp-m-a2197-03-revA.dts | 4 ++-- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/dts/zynqmp-g-a2197-00-revA.dts b/arch/arm/dts/zynqmp-g-a2197-00-revA.dts index ee530ba3e14..e00428351cb 100644 --- a/arch/arm/dts/zynqmp-g-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-g-a2197-00-revA.dts @@ -260,9 +260,9 @@ reg = <0x45>; shunt-resistor = <5000>; }; - tps53681@c0 { /* u53 - FIXME name - don't know what it does - also vcc_io_soc */ + tps53681@60 { /* u53 - 0xc0 - FIXME name - don't know what it does - also vcc_io_soc */ compatible = "ti,tps53681", "ti,tps53679"; - reg = <0xc0>; + reg = <0x60>; }; }; i2c@3 { /* fmc1 via JA2G */ diff --git a/arch/arm/dts/zynqmp-m-a2197-01-revA.dts b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts index 7b3722f0808..1fa023ffb13 100644 --- a/arch/arm/dts/zynqmp-m-a2197-01-revA.dts +++ b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts @@ -247,9 +247,9 @@ #address-cells = <1>; #size-cells = <0>; reg = <2>; - reg_vccint: tps53681@c0 { /* u69 */ + reg_vccint: tps53681@60 { /* u69 - 0xc0 */ compatible = "ti,tps53681", "ti,tps53679"; - reg = <0xc0>; + reg = <0x60>; }; reg_vcc_pmc: tps544@7 { /* u80 */ compatible = "ti,tps544b25"; diff --git a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts index 11b2a58a0f0..85790551d0b 100644 --- a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts +++ b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts @@ -239,9 +239,9 @@ #address-cells = <1>; #size-cells = <0>; reg = <2>; - reg_vccint: tps53681@c0 { /* u69 */ + reg_vccint: tps53681@60 { /* u69 - 0xc0 */ compatible = "ti,tps53681", "ti,tps53679"; - reg = <0xc0>; + reg = <0x60>; }; reg_vcc_pmc: tps544@7 { /* u80 */ compatible = "ti,tps544b25"; diff --git a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts index db199c467b0..21ef1a5e82b 100644 --- a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts +++ b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts @@ -239,9 +239,9 @@ #address-cells = <1>; #size-cells = <0>; reg = <2>; - reg_vccint: tps53681@c0 { /* u69 */ + reg_vccint: tps53681@60 { /* u69 - 0xc0 */ compatible = "ti,tps53681", "ti,tps53679"; - reg = <0xc0>; + reg = <0x60>; }; reg_vcc_pmc: tps544@7 { /* u80 */ compatible = "ti,tps544b25"; -- GitLab From 686c2bbb4429088b21b7dc281e43f7ea0c3080d1 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 15 Jun 2022 11:56:56 +0200 Subject: [PATCH 282/581] arm64: zynqmp: Fix tps544/u3007 node description u3007 is removed in zynqmp-m-a2197-02-revA board and on zynqmp-m-a2197-03-revA it was renamed to v3022 at address 0x18. Signed-off-by: Michal Simek Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/f477796bcca6fce09168699a0498d792f4a54acf.1655287013.git.michal.simek@amd.com --- arch/arm/dts/zynqmp-m-a2197-02-revA.dts | 4 ---- arch/arm/dts/zynqmp-m-a2197-03-revA.dts | 4 ++-- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts index 85790551d0b..2271a6a4906 100644 --- a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts +++ b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts @@ -190,10 +190,6 @@ compatible = "ti,tps544b25"; reg = <0x1e>; }; - reg_vpp_2v5_ddr4: tps544@1x { /* u3007 */ - compatible = "ti,tps544b25"; - reg = <0x17>; /* FIXME wrong in schematics */ - }; }; i2c@1 { /* PMBUS_INA226 */ #address-cells = <1>; diff --git a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts index 21ef1a5e82b..a89046a818f 100644 --- a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts +++ b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts @@ -190,9 +190,9 @@ compatible = "ti,tps544b25"; reg = <0x1e>; }; - reg_vpp_2v5_ddr4: tps544@1x { /* u3007 */ + reg_vcc1v2_ddr4: tps544@18 { /* u3022 */ compatible = "ti,tps544b25"; - reg = <0x17>; /* FIXME wrong in schematics */ + reg = <0x18>; }; }; i2c@1 { /* PMBUS_INA226 */ -- GitLab From fe9d049e1319b040c80634a0db8d6309b9e9b746 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 24 Jun 2022 14:14:59 +0200 Subject: [PATCH 283/581] tools: relocate-rela: Open binary u-boot file later There is no value to open u-boot binary file so early. Better to check all values first and then open binary file. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/9c2b4ebadbe83497db28af02f6af2623793ffdb6.1655299267.git.michal.simek@amd.com --- tools/relocate-rela.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c index f0bc548617a..88398711186 100644 --- a/tools/relocate-rela.c +++ b/tools/relocate-rela.c @@ -73,13 +73,6 @@ int main(int argc, char **argv) return 1; } - f = fopen(argv[1], "r+b"); - if (!f) { - fprintf(stderr, "%s: Cannot open %s: %s\n", - argv[0], argv[1], strerror(errno)); - return 2; - } - if (!read_num(argv[2], &text_base) || !read_num(argv[3], &rela_start) || !read_num(argv[4], &rela_end)) { @@ -95,6 +88,13 @@ int main(int argc, char **argv) rela_start -= text_base; rela_end -= text_base; + f = fopen(argv[1], "r+b"); + if (!f) { + fprintf(stderr, "%s: Cannot open %s: %s\n", + argv[0], argv[1], strerror(errno)); + return 2; + } + fseek(f, 0, SEEK_END); file_size = ftell(f); rewind(f); -- GitLab From b956637b68f84bfd1eb8082891bab3c75116cfd9 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 24 Jun 2022 14:14:59 +0200 Subject: [PATCH 284/581] Makefile: Fix description for relocate-rela parameters Numbers in comment are shifter which is visible from command which calls them. Also relocate-rela usage is describing them. "Usage: %s " Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/bb0287b9071eb33eea0cf914a7128c2603684377.1655299267.git.michal.simek@amd.com --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 2fa3a3b488e..2270ec5c793 100644 --- a/Makefile +++ b/Makefile @@ -922,7 +922,7 @@ endif # the raw binary, but certain simulators only accept an ELF file (but don't # do the relocation). ifneq ($(CONFIG_STATIC_RELA),) -# $(1) is u-boot ELF, $(2) is u-boot bin, $(3) is text base +# $(2) is u-boot ELF, $(3) is u-boot bin, $(4) is text base quiet_cmd_static_rela = RELOC $@ cmd_static_rela = \ start=$$($(NM) $(2) | grep __rel_dyn_start | cut -f 1 -d ' '); \ -- GitLab From d8b0444b56b44c8f68e5655130dbf4f285d7cd2b Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 24 Jun 2022 14:14:59 +0200 Subject: [PATCH 285/581] tools: relocate-rela: Use global variables Declare rela_start/end and text_base as global variables. It will help with using these variables for ELF decoding. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/7485b163e92f8f3f754c35f7c88c3314f2212efd.1655299267.git.michal.simek@amd.com --- tools/relocate-rela.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c index 88398711186..67a138aa67d 100644 --- a/tools/relocate-rela.c +++ b/tools/relocate-rela.c @@ -20,6 +20,8 @@ #define R_AARCH64_RELATIVE 1027 #endif +static uint64_t rela_start, rela_end, text_base; + static const bool debug_en; static void debug(const char *fmt, ...) @@ -63,7 +65,7 @@ int main(int argc, char **argv) { FILE *f; int i, num; - uint64_t rela_start, rela_end, text_base, file_size; + uint64_t file_size; if (argc != 5) { fprintf(stderr, "Statically apply ELF rela relocations\n"); -- GitLab From 4c9e2d643460d1439e417b64ed82efb02a934daf Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 24 Jun 2022 14:14:59 +0200 Subject: [PATCH 286/581] tools: relocate-rela: Read rela start/end directly from ELF There is no need to pass section information via parameters. Let's read text base and rela start/end directly from elf. It will help with reading other information from ELF for others architecture. Input to relocate-rela is u-boot binary and u-boot ELF. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/ab7ae14a6e058722e8c608089729e98edf20a08d.1655299267.git.michal.simek@amd.com --- Makefile | 4 +- tools/relocate-rela.c | 181 ++++++++++++++++++++++++++++++++++++++---- 2 files changed, 168 insertions(+), 17 deletions(-) diff --git a/Makefile b/Makefile index 2270ec5c793..55c55dbb7e2 100644 --- a/Makefile +++ b/Makefile @@ -925,9 +925,7 @@ ifneq ($(CONFIG_STATIC_RELA),) # $(2) is u-boot ELF, $(3) is u-boot bin, $(4) is text base quiet_cmd_static_rela = RELOC $@ cmd_static_rela = \ - start=$$($(NM) $(2) | grep __rel_dyn_start | cut -f 1 -d ' '); \ - end=$$($(NM) $(2) | grep __rel_dyn_end | cut -f 1 -d ' '); \ - tools/relocate-rela $(3) $(4) $$start $$end + tools/relocate-rela $(3) $(2) else quiet_cmd_static_rela = cmd_static_rela = diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c index 67a138aa67d..36065edb3f0 100644 --- a/tools/relocate-rela.c +++ b/tools/relocate-rela.c @@ -20,6 +20,8 @@ #define R_AARCH64_RELATIVE 1027 #endif +static int ei_class; + static uint64_t rela_start, rela_end, text_base; static const bool debug_en; @@ -54,32 +56,183 @@ static bool supported_rela(Elf64_Rela *rela) } } -static bool read_num(const char *str, uint64_t *num) +static int decode_elf64(FILE *felf, char **argv) +{ + size_t size; + Elf64_Ehdr header; + uint64_t section_header_base, section_header_size, sh_offset, sh_size; + Elf64_Shdr *sh_table; /* Elf symbol table */ + int ret, i, machine; + char *sh_str; + + debug("64bit version\n"); + + /* Make sure we are at start */ + rewind(felf); + + size = fread(&header, 1, sizeof(header), felf); + if (size != sizeof(header)) { + fclose(felf); + return 25; + } + + machine = header.e_machine; + debug("Machine\t%d\n", machine); + + text_base = header.e_entry; + section_header_base = header.e_shoff; + section_header_size = header.e_shentsize * header.e_shnum; + + sh_table = malloc(section_header_size); + if (!sh_table) { + fprintf(stderr, "%s: Cannot allocate space for section header\n", + argv[0]); + fclose(felf); + return 26; + } + + ret = fseek(felf, section_header_base, SEEK_SET); + if (ret) { + fprintf(stderr, "%s: Can't set pointer to section header: %x/%lx\n", + argv[0], ret, section_header_base); + free(sh_table); + fclose(felf); + return 26; + } + + size = fread(sh_table, 1, section_header_size, felf); + if (size != section_header_size) { + fprintf(stderr, "%s: Can't read section header: %lx/%lx\n", + argv[0], size, section_header_size); + free(sh_table); + fclose(felf); + return 27; + } + + sh_size = sh_table[header.e_shstrndx].sh_size; + debug("e_shstrndx\t0x%08x\n", header.e_shstrndx); + debug("sh_size\t\t0x%08lx\n", sh_size); + + sh_str = malloc(sh_size); + if (!sh_str) { + fprintf(stderr, "malloc failed\n"); + free(sh_table); + fclose(felf); + return 28; + } + + /* + * Specifies the byte offset from the beginning of the file + * to the first byte in the section. + */ + sh_offset = sh_table[header.e_shstrndx].sh_offset; + + debug("sh_offset\t0x%08x\n", header.e_shnum); + + ret = fseek(felf, sh_offset, SEEK_SET); + if (ret) { + fprintf(stderr, "Setting up sh_offset failed\n"); + free(sh_str); + free(sh_table); + fclose(felf); + return 29; + } + + size = fread(sh_str, 1, sh_size, felf); + if (size != sh_size) { + fprintf(stderr, "%s: Can't read section: %lx/%lx\n", + argv[0], size, sh_size); + free(sh_str); + free(sh_table); + fclose(felf); + return 30; + } + + for (i = 0; i < header.e_shnum; i++) { + /* fprintf(stderr, "%s\n", sh_str + sh_table[i].sh_name); Debug only */ + if (!strcmp(".rela.dyn", (sh_str + sh_table[i].sh_name))) { + debug("Found section\t\".rela_dyn\"\n"); + debug(" at addr\t0x%08x\n", + (unsigned int)sh_table[i].sh_addr); + debug(" at offset\t0x%08x\n", + (unsigned int)sh_table[i].sh_offset); + debug(" of size\t0x%08x\n", + (unsigned int)sh_table[i].sh_size); + rela_start = sh_table[i].sh_addr; + rela_end = rela_start + sh_table[i].sh_size; + break; + } + } + + /* Clean up */ + free(sh_str); + free(sh_table); + fclose(felf); + + debug("text_base\t0x%08lx\n", text_base); + debug("rela_start\t0x%08lx\n", rela_start); + debug("rela_end\t0x%08lx\n", rela_end); + + if (!rela_start) + return 1; + + return 0; +} + +static int decode_elf(char **argv) { - char *endptr; - *num = strtoull(str, &endptr, 16); - return str[0] && !endptr[0]; + FILE *felf; + size_t size; + unsigned char e_ident[EI_NIDENT]; + + felf = fopen(argv[2], "r+b"); + if (!felf) { + fprintf(stderr, "%s: Cannot open %s: %s\n", + argv[0], argv[5], strerror(errno)); + return 2; + } + + size = fread(e_ident, 1, EI_NIDENT, felf); + if (size != EI_NIDENT) { + fclose(felf); + return 25; + } + + /* Check if this is really ELF file */ + if (e_ident[0] != 0x7f && + e_ident[1] != 'E' && + e_ident[2] != 'L' && + e_ident[3] != 'F') { + fclose(felf); + return 1; + } + + ei_class = e_ident[4]; + debug("EI_CLASS(1=32bit, 2=64bit) %d\n", ei_class); + + if (ei_class == 2) + return decode_elf64(felf, argv); + + return 1; } int main(int argc, char **argv) { FILE *f; - int i, num; + int i, num, ret; uint64_t file_size; - if (argc != 5) { + if (argc != 3) { fprintf(stderr, "Statically apply ELF rela relocations\n"); - fprintf(stderr, "Usage: %s " \ - " \n", argv[0]); - fprintf(stderr, "All numbers in hex.\n"); + fprintf(stderr, "Usage: %s \n", + argv[0]); return 1; } - if (!read_num(argv[2], &text_base) || - !read_num(argv[3], &rela_start) || - !read_num(argv[4], &rela_end)) { - fprintf(stderr, "%s: bad number\n", argv[0]); - return 3; + ret = decode_elf(argv); + if (ret) { + fprintf(stderr, "ELF decoding failed\n"); + return ret; } if (rela_start > rela_end || rela_start < text_base) { -- GitLab From 7cf236cf1f7d6b6aa2a860a1a80ad99df46b9144 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 24 Jun 2022 14:14:59 +0200 Subject: [PATCH 287/581] microblaze: Switch absolute branches to relative There is no reason to use absolute branches and use just relative. This change helps with moving binary to different location and start it from there. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/83a5103b85c1c2220cd3ab4d5365169c6660e40a.1655299267.git.michal.simek@amd.com --- arch/microblaze/cpu/start.S | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 645f7cb0389..9e00eef1f4b 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -29,7 +29,7 @@ _start: /* Call board_init_f_alloc_reserve with the current stack pointer as * parameter. */ add r5, r0, r1 - bralid r15, board_init_f_alloc_reserve + brlid r15, board_init_f_alloc_reserve nop /* board_init_f_alloc_reserve returns a pointer to the allocated area @@ -41,20 +41,20 @@ _start: /* Call board_init_f_init_reserve with the address returned by * board_init_f_alloc_reserve as parameter. */ add r5, r0, r3 - bralid r15, board_init_f_init_reserve + brlid r15, board_init_f_init_reserve nop #if !defined(CONFIG_SPL_BUILD) /* Setup vectors with pre-relocation symbols */ or r5, r0, r0 - bralid r15, __setup_exceptions + brlid r15, __setup_exceptions nop #endif /* Flush cache before enable cache */ addik r5, r0, 0 addik r6, r0, XILINX_DCACHE_BYTE_SIZE - bralid r15, flush_cache + brlid r15, flush_cache nop /* enable instruction and data cache */ @@ -75,14 +75,14 @@ clear_bss: bnei r6, 2b 3: /* jumping to board_init */ #ifdef CONFIG_DEBUG_UART - bralid r15, debug_uart_init + brlid r15, debug_uart_init nop #endif #ifndef CONFIG_SPL_BUILD or r5, r0, r0 /* flags - empty */ - brai board_init_f + bri board_init_f #else - brai board_init_r + bri board_init_r #endif 1: bri 1b @@ -289,7 +289,7 @@ relocate_code: /* Setup vectors with post-relocation symbols */ add r5, r0, r23 /* load gd->reloc_off to r5 */ - bralid r15, __setup_exceptions + brlid r15, __setup_exceptions nop /* Check if GOT exist */ @@ -318,7 +318,7 @@ relocate_code: /* Flush caches to ensure consistency */ addik r5, r0, 0 addik r6, r0, XILINX_DCACHE_BYTE_SIZE - bralid r15, flush_cache + brlid r15, flush_cache nop 2: addi r5, r31, 0 /* gd is initialized in board_r.c */ -- GitLab From 16a18471bbdeb051d6905c1cba5a1bb84a2fbe49 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 24 Jun 2022 14:14:59 +0200 Subject: [PATCH 288/581] microblaze: Fix stack protection behavior When U-Boot starts stack protection can be already enabled that's why setup the lowest possible SLR value which is address 0. And the highest possible stack in front of U-Boot. That's why you should never load U-Boot to the beginning of DDR. There must be some space reserved. Code is using this location for early malloc space, early global data and stack. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/86b9748bad12142659804d6381bc6bbf20be44f1.1655299267.git.michal.simek@amd.com --- arch/microblaze/cpu/start.S | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 9e00eef1f4b..715ef37b39d 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -15,8 +15,9 @@ _start: mts rmsr, r0 /* disable cache */ - addi r8, r0, _end - mts rslr, r8 + mts rslr, r0 + addi r8, r0, _start + mts rshr, r8 #if defined(CONFIG_SPL_BUILD) addi r1, r0, CONFIG_SPL_STACK_ADDR -- GitLab From aa0799eb67fe15b0ff929f92a6a49319111ff5b7 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 24 Jun 2022 14:14:59 +0200 Subject: [PATCH 289/581] microblaze: Fix early stack allocation CONFIG_SYS_INIT_SP_OFFSET macro place stack to TEXT_BASE - SYS_MALLOC_F_LEN but there is no reason to do it now because board_init_f_alloc_reserve() returns exact location where stack should be. That's why stack location is calculated at run time and there is no need to hardcode it via macro. This change will help with placing U-Boot to any address. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/e9aee69646e022fd8a96cbee2d2a07ab81fb6e05.1655299267.git.michal.simek@amd.com --- arch/microblaze/cpu/start.S | 2 +- include/configs/microblaze-generic.h | 4 ---- 2 files changed, 1 insertion(+), 5 deletions(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 715ef37b39d..1acac5faf42 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -22,7 +22,7 @@ _start: #if defined(CONFIG_SPL_BUILD) addi r1, r0, CONFIG_SPL_STACK_ADDR #else - addi r1, r0, CONFIG_SYS_INIT_SP_OFFSET + add r1, r0, r8 #endif addi r1, r1, -4 /* Decrement SP to top of memory */ diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 663837f33dc..60ceb2c817e 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -18,10 +18,6 @@ # define CONFIG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} -/* Stack location before relocation */ -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - \ - CONFIG_SYS_MALLOC_F_LEN) - #ifdef CONFIG_CFI_FLASH /* ?empty sector */ # define CONFIG_SYS_FLASH_EMPTY_INFO 1 -- GitLab From 65a4da947e57d00744897663943ad630a706dc2f Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 24 Jun 2022 14:14:59 +0200 Subject: [PATCH 290/581] microblaze: Remove CONFIG_TEXT_BASE from code Use symbol instead macro to find where U-Boot starts. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/d5d4c201bee6171e85b47783d916387d84db0456.1655299267.git.michal.simek@amd.com --- arch/microblaze/cpu/start.S | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 1acac5faf42..205d5f384c3 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -142,7 +142,7 @@ __setup_exceptions: swi r2, r4, 0x0 /* reset address - imm opcode */ swi r3, r4, 0x4 /* reset address - brai opcode */ - addik r6, r0, CONFIG_SYS_TEXT_BASE + addik r6, r0, _start sw r6, r1, r0 lhu r7, r1, r10 rsubi r8, r10, 0x2 @@ -285,7 +285,7 @@ relocate_code: /* R23 points to the base address. */ add r23, r0, r7 /* Move reloc addr to r23 */ - addi r24, r0, CONFIG_SYS_TEXT_BASE /* Get reloc offset */ + addi r24, r0, _start /* Get reloc offset */ rsub r23, r24, r23 /* keep - this is already here gd->reloc_off */ /* Setup vectors with post-relocation symbols */ @@ -323,7 +323,7 @@ relocate_code: nop 2: addi r5, r31, 0 /* gd is initialized in board_r.c */ - addi r6, r0, CONFIG_SYS_TEXT_BASE + addi r6, r0, _start addi r12, r23, board_init_r bra r12 /* Jump to relocated code */ -- GitLab From d896e790cb735b6be8a17bdfefca54e288468bd5 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 24 Jun 2022 14:14:59 +0200 Subject: [PATCH 291/581] microblaze: Fix typo in exception.c Trivial fix. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/c4ede6dc738c5bd7c518f3bb2c9410b15c102e20.1655299267.git.michal.simek@amd.com --- arch/microblaze/cpu/exception.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/microblaze/cpu/exception.c b/arch/microblaze/cpu/exception.c index d3640d3903b..9414776afa7 100644 --- a/arch/microblaze/cpu/exception.c +++ b/arch/microblaze/cpu/exception.c @@ -16,7 +16,7 @@ void _hw_exception_handler (void) /* loading address of exception EAR */ MFS(address, rear); - /* loading excetpion state register ESR */ + /* loading exception state register ESR */ MFS(state, resr); printf("Hardware exception at 0x%x address\n", address); R17(address); -- GitLab From 89e81e6c32bba4b92172019068b81c025698395a Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 24 Jun 2022 14:14:59 +0200 Subject: [PATCH 292/581] mips: Move endianness selection to arch/Kconfig This option will be used by Microblaze that's why move it to generic location to be able to use it. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/ceb39fa615cb5657b66a7b77bab99e86ca7a3346.1655299267.git.michal.simek@amd.com --- arch/Kconfig | 22 ++++++++++++++++++++++ arch/mips/Kconfig | 18 ------------------ 2 files changed, 22 insertions(+), 18 deletions(-) diff --git a/arch/Kconfig b/arch/Kconfig index 12de8a11650..4851300e9bb 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -447,3 +447,25 @@ source "arch/xtensa/Kconfig" source "arch/riscv/Kconfig" source "board/keymile/Kconfig" + +if MIPS + +choice + prompt "Endianness selection" + help + Some MIPS boards can be configured for either little or big endian + byte order. These modes require different U-Boot images. In general there + is one preferred byteorder for a particular system but some systems are + just as commonly used in the one or the other endianness. + +config SYS_BIG_ENDIAN + bool "Big endian" + depends on SUPPORTS_BIG_ENDIAN + +config SYS_LITTLE_ENDIAN + bool "Little endian" + depends on SUPPORTS_LITTLE_ENDIAN + +endchoice + +endif diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 9b62764f4fe..2e0793a7a7b 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -180,24 +180,6 @@ source "arch/mips/mach-octeon/Kconfig" if MIPS -choice - prompt "Endianness selection" - help - Some MIPS boards can be configured for either little or big endian - byte order. These modes require different U-Boot images. In general there - is one preferred byteorder for a particular system but some systems are - just as commonly used in the one or the other endianness. - -config SYS_BIG_ENDIAN - bool "Big endian" - depends on SUPPORTS_BIG_ENDIAN - -config SYS_LITTLE_ENDIAN - bool "Little endian" - depends on SUPPORTS_LITTLE_ENDIAN - -endchoice - choice prompt "CPU selection" default CPU_MIPS32_R2 -- GitLab From 10fd6d64c747a0267a3735cc64d108cdbde6aeb4 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 24 Jun 2022 14:14:59 +0200 Subject: [PATCH 293/581] microblaze: Enable REMAKE_ELF Enable u-boot.elf recreation from u-boot.bin to prepare for removing manul relocation. Enable option for big endian configuration but it is not used too much that's why it is completely untested. By supporting this system there is a need to define LITTLE/BIG endian Kconfig options to pass -EL/-EB flags. Full command line for u-boot.elf recreation looks like this: microblazeel-xilinx-linux-gnu-objcopy -I binary -B microblaze \ -O elf32-microblazeel u-boot.bin u-boot-elf.o Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/7e242a519fcd1c693b9103c5599b515af555ca43.1655299267.git.michal.simek@amd.com --- arch/Kconfig | 6 +++--- arch/microblaze/config.mk | 6 ++++++ configs/microblaze-generic_defconfig | 1 + 3 files changed, 10 insertions(+), 3 deletions(-) diff --git a/arch/Kconfig b/arch/Kconfig index 4851300e9bb..02de32f9c77 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -448,7 +448,7 @@ source "arch/riscv/Kconfig" source "board/keymile/Kconfig" -if MIPS +if MIPS || MICROBLAZE choice prompt "Endianness selection" @@ -460,11 +460,11 @@ choice config SYS_BIG_ENDIAN bool "Big endian" - depends on SUPPORTS_BIG_ENDIAN + depends on (SUPPORTS_BIG_ENDIAN && MIPS) || MICROBLAZE config SYS_LITTLE_ENDIAN bool "Little endian" - depends on SUPPORTS_LITTLE_ENDIAN + depends on (SUPPORTS_LITTLE_ENDIAN && MIPS) || MICROBLAZE endchoice diff --git a/arch/microblaze/config.mk b/arch/microblaze/config.mk index de5b97e719c..3e84a832fc1 100644 --- a/arch/microblaze/config.mk +++ b/arch/microblaze/config.mk @@ -16,3 +16,9 @@ LDFLAGS_FINAL += --gc-sections ifeq ($(CONFIG_SPL_BUILD),) PLATFORM_CPPFLAGS += -fPIC endif + +ifeq ($(CONFIG_SYS_LITTLE_ENDIAN),y) +PLATFORM_ELFFLAGS += -B microblaze $(OBJCOPYFLAGS) -O elf32-microblazeel +else +PLATFORM_ELFFLAGS += -B microblaze $(OBJCOPYFLAGS) -O elf32-microblaze +endif diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index 7994110b28a..35e32466bdf 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -14,6 +14,7 @@ CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1 CONFIG_XILINX_MICROBLAZE0_USE_DIV=1 CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1 CONFIG_DISTRO_DEFAULTS=y +CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_BOOTDELAY=-1 -- GitLab From 1918c4166eea9f0dfe135c4cb9fcd794825522c1 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 24 Jun 2022 14:15:00 +0200 Subject: [PATCH 294/581] microblaze: Separate code end substraction Follow up patch will convert symbol handling that's why it is necessary to separate logic around symbols to special instruction. It adds 4B for new instruction but it is worth to do it to have code ready for for full relocation. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/030863fa9a9c1ca0a9b082fe498522da09189fbc.1655299267.git.michal.simek@amd.com --- arch/microblaze/cpu/start.S | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 205d5f384c3..a35d8d8ea29 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -273,7 +273,8 @@ relocate_code: add r23, r0, r7 /* Move reloc addr to r23 */ /* Relocate text and data - r12 temp value */ addi r21, r0, _start - addi r22, r0, _end - 4 /* Include BSS too */ + addi r22, r0, _end /* Include BSS too */ + addi r22, r22, -4 rsub r6, r21, r22 or r5, r0, r0 -- GitLab From 532ad5f84163cdf010e0181e2f9c3fbb1eac88d6 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 24 Jun 2022 14:15:00 +0200 Subject: [PATCH 295/581] microblaze: Change stack protection address to new stack address SLR low address is still setup to 0 that's why only high limit should be updated. STACK_SIZE macro is present and could be possible used for low address alignment but it is not done by this patch. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/c00cb843df848703b760a65934ed3ce31fafcf19.1655299267.git.michal.simek@amd.com --- arch/microblaze/cpu/start.S | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index a35d8d8ea29..2aae4a0b7cc 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -268,6 +268,7 @@ relocate_code: * r7 - reloc_addr */ addi r1, r5, 0 /* Start to use new SP */ + mts rshr, r1 addi r31, r6, 0 /* Start to use new GD */ add r23, r0, r7 /* Move reloc addr to r23 */ -- GitLab From 3041b512ebed13e29144cf5b9524e714c4aa458e Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 24 Jun 2022 14:15:00 +0200 Subject: [PATCH 296/581] microblaze: Optimize register usage in relocate_code There are additional operations which can be done simpler that's why improve logic around relocation address r7 handling and _start symbol. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/c8b60f72f1605c2ba6b4b7be1893d7e6ec3d8597.1655299267.git.michal.simek@amd.com --- arch/microblaze/cpu/start.S | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 2aae4a0b7cc..f2d6d12deb7 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -271,7 +271,6 @@ relocate_code: mts rshr, r1 addi r31, r6, 0 /* Start to use new GD */ - add r23, r0, r7 /* Move reloc addr to r23 */ /* Relocate text and data - r12 temp value */ addi r21, r0, _start addi r22, r0, _end /* Include BSS too */ @@ -280,15 +279,13 @@ relocate_code: rsub r6, r21, r22 or r5, r0, r0 1: lw r12, r21, r5 /* Load u-boot data */ - sw r12, r23, r5 /* Write zero to loc */ + sw r12, r7, r5 /* Write zero to loc */ cmp r12, r5, r6 /* Check if we have reach the end */ bneid r12, 1b addi r5, r5, 4 /* Increment to next loc - relocate code */ /* R23 points to the base address. */ - add r23, r0, r7 /* Move reloc addr to r23 */ - addi r24, r0, _start /* Get reloc offset */ - rsub r23, r24, r23 /* keep - this is already here gd->reloc_off */ + rsub r23, r21, r7 /* keep - this is already here gd->reloc_off */ /* Setup vectors with post-relocation symbols */ add r5, r0, r23 /* load gd->reloc_off to r5 */ -- GitLab From 986727ca11425942807e226fe50c16e4b223a4e5 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 24 Jun 2022 14:15:00 +0200 Subject: [PATCH 297/581] microblaze: Remove code around r20 in relocate_code() r20 is not used that's why remove logic around it. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/1b32bab5c050d099b2f6d49bc4896322ed03d788.1655299267.git.michal.simek@amd.com --- arch/microblaze/cpu/start.S | 5 ----- 1 file changed, 5 deletions(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index f2d6d12deb7..c3d925c1d15 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -310,11 +310,6 @@ relocate_code: bneid r12, 3b addik r21. r21, 4 - /* Update pointer to GOT */ - mfs r20, rpc - addik r20, r20, _GLOBAL_OFFSET_TABLE_ + 8 - addk r20, r20, r23 - /* Flush caches to ensure consistency */ addik r5, r0, 0 addik r6, r0, XILINX_DCACHE_BYTE_SIZE -- GitLab From b6fe10afe99c708a1dbb2d01be084aca32521651 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 24 Jun 2022 14:15:00 +0200 Subject: [PATCH 298/581] microblaze: Remove _start symbol handling at U-Boot start Right now U-Boot runs all the time from the same address where it is loaded but going to full relocation code starting address doesn't need to be fixed and can be simply discovered from reading PC register. That's why use r20 to get PC address and subtract offset from the beginning to get starting address. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/044b727c33dfbe662f68512d0da0775a4805f360.1655299267.git.michal.simek@amd.com --- arch/microblaze/cpu/start.S | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index c3d925c1d15..db3998f5450 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -14,15 +14,16 @@ .global _start _start: mts rmsr, r0 /* disable cache */ + mfs r20, rpc + addi r20, r20, -4 mts rslr, r0 - addi r8, r0, _start - mts rshr, r8 + mts rshr, r20 #if defined(CONFIG_SPL_BUILD) addi r1, r0, CONFIG_SPL_STACK_ADDR #else - add r1, r0, r8 + add r1, r0, r20 #endif addi r1, r1, -4 /* Decrement SP to top of memory */ -- GitLab From 81169ae64872eaa99304df70422f9c674755d0c5 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 24 Jun 2022 14:15:00 +0200 Subject: [PATCH 299/581] microblaze: Add comment about reset location Better to add comment to explain why reset vector points all the time to origin U-Boot location. If reset happens U-Boot should start from it's origin location. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/5ca6341b7487708247fe2948d7e496ea6f7c2e02.1655299267.git.michal.simek@amd.com --- arch/microblaze/cpu/start.S | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index db3998f5450..9aa5fd09936 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -144,6 +144,7 @@ __setup_exceptions: swi r3, r4, 0x4 /* reset address - brai opcode */ addik r6, r0, _start + /* Intentionally keep reset vector back to origin u-boot location */ sw r6, r1, r0 lhu r7, r1, r10 rsubi r8, r10, 0x2 -- GitLab From 07c052be51d26264a865ae3634964beddca1e1f1 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 24 Jun 2022 14:15:00 +0200 Subject: [PATCH 300/581] microblaze: Create SYM_ADDR macro to deal with symbols Symbol handling depends on compilation flags. Right now manual relocation is used that's why symbols can be referenced just by name and there is no need to find them out. But when position independent code (PIC) is used symbols need to be described differently. That's why having one macro change is easier than changing the whole code. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/d704e9a267c8b536452fb999111dbfbc9d652be5.1655299267.git.michal.simek@amd.com --- arch/microblaze/cpu/start.S | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 9aa5fd09936..72b0f335473 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -10,6 +10,9 @@ #include #include +#define SYM_ADDR(reg, reg_add, symbol) \ + addi reg, reg_add, symbol + .text .global _start _start: @@ -66,8 +69,8 @@ _start: clear_bss: /* clear BSS segments */ - addi r5, r0, __bss_start - addi r4, r0, __bss_end + SYM_ADDR(r5, r0, __bss_start) + SYM_ADDR(r4, r0, __bss_end) cmp r6, r5, r4 beqi r6, 3f 2: @@ -143,7 +146,7 @@ __setup_exceptions: swi r2, r4, 0x0 /* reset address - imm opcode */ swi r3, r4, 0x4 /* reset address - brai opcode */ - addik r6, r0, _start + SYM_ADDR(r6, r0, _start) /* Intentionally keep reset vector back to origin u-boot location */ sw r6, r1, r0 lhu r7, r1, r10 @@ -157,7 +160,7 @@ __setup_exceptions: swi r2, r4, 0x8 /* user vector exception - imm opcode */ swi r3, r4, 0xC /* user vector exception - brai opcode */ - addik r6, r5, _exception_handler + SYM_ADDR(r6, r5, _exception_handler) sw r6, r1, r0 /* * BIG ENDIAN memory map for user exception @@ -190,7 +193,7 @@ __setup_exceptions: swi r2, r4, 0x10 /* interrupt - imm opcode */ swi r3, r4, 0x14 /* interrupt - brai opcode */ - addik r6, r5, _interrupt_handler + SYM_ADDR(r6, r5, _interrupt_handler) sw r6, r1, r0 lhu r7, r1, r10 rsubi r8, r10, 0x12 @@ -202,7 +205,7 @@ __setup_exceptions: swi r2, r4, 0x20 /* hardware exception - imm opcode */ swi r3, r4, 0x24 /* hardware exception - brai opcode */ - addik r6, r5, _hw_exception_handler + SYM_ADDR(r6, r5, _hw_exception_handler) sw r6, r1, r0 lhu r7, r1, r10 rsubi r8, r10, 0x22 @@ -274,8 +277,8 @@ relocate_code: addi r31, r6, 0 /* Start to use new GD */ /* Relocate text and data - r12 temp value */ - addi r21, r0, _start - addi r22, r0, _end /* Include BSS too */ + SYM_ADDR(r21, r0, _start) + SYM_ADDR(r22, r0, _end) /* Include BSS too */ addi r22, r22, -4 rsub r6, r21, r22 @@ -319,8 +322,8 @@ relocate_code: nop 2: addi r5, r31, 0 /* gd is initialized in board_r.c */ - addi r6, r0, _start - addi r12, r23, board_init_r + SYM_ADDR(r6, r0, _start) + SYM_ADDR(r12, r23, board_init_r) bra r12 /* Jump to relocated code */ .end relocate_code -- GitLab From 582ffb5cb3784ec8f4981d464a11f043d1d63846 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 24 Jun 2022 14:15:00 +0200 Subject: [PATCH 301/581] tools: relocate-rela: Extract elf64 reloc to special function Adding support for new type requires to change code layout that's why move elf64 code to own function for easier maintenance. It also solves the problem with not calling fclose in case of error. Return value from rela_elf64 is saved to variable that's why fclose() is called all the time. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/21763b80527521c85ca7d4ac64ad6ff4885409c8.1655299267.git.michal.simek@amd.com --- tools/relocate-rela.c | 96 ++++++++++++++++++++++++------------------- 1 file changed, 53 insertions(+), 43 deletions(-) diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c index 36065edb3f0..e62247d51e2 100644 --- a/tools/relocate-rela.c +++ b/tools/relocate-rela.c @@ -216,49 +216,9 @@ static int decode_elf(char **argv) return 1; } -int main(int argc, char **argv) +static int rela_elf64(char **argv, FILE *f) { - FILE *f; - int i, num, ret; - uint64_t file_size; - - if (argc != 3) { - fprintf(stderr, "Statically apply ELF rela relocations\n"); - fprintf(stderr, "Usage: %s \n", - argv[0]); - return 1; - } - - ret = decode_elf(argv); - if (ret) { - fprintf(stderr, "ELF decoding failed\n"); - return ret; - } - - if (rela_start > rela_end || rela_start < text_base) { - fprintf(stderr, "%s: bad rela bounds\n", argv[0]); - return 3; - } - - rela_start -= text_base; - rela_end -= text_base; - - f = fopen(argv[1], "r+b"); - if (!f) { - fprintf(stderr, "%s: Cannot open %s: %s\n", - argv[0], argv[1], strerror(errno)); - return 2; - } - - fseek(f, 0, SEEK_END); - file_size = ftell(f); - rewind(f); - - if (rela_end > file_size) { - // Most likely compiler inserted some section that didn't get - // objcopy-ed into the final binary - rela_end = file_size; - } + int i, num; if ((rela_end - rela_start) % sizeof(Elf64_Rela)) { fprintf(stderr, "%s: rela size isn't a multiple of Elf64_Rela\n", argv[0]); @@ -316,11 +276,61 @@ int main(int argc, char **argv) } } + return 0; +} + +int main(int argc, char **argv) +{ + FILE *f; + int ret; + uint64_t file_size; + + if (argc != 3) { + fprintf(stderr, "Statically apply ELF rela relocations\n"); + fprintf(stderr, "Usage: %s \n", + argv[0]); + return 1; + } + + ret = decode_elf(argv); + if (ret) { + fprintf(stderr, "ELF decoding failed\n"); + return ret; + } + + if (rela_start > rela_end || rela_start < text_base) { + fprintf(stderr, "%s: bad rela bounds\n", argv[0]); + return 3; + } + + rela_start -= text_base; + rela_end -= text_base; + + f = fopen(argv[1], "r+b"); + if (!f) { + fprintf(stderr, "%s: Cannot open %s: %s\n", + argv[0], argv[1], strerror(errno)); + return 2; + } + + fseek(f, 0, SEEK_END); + file_size = ftell(f); + rewind(f); + + if (rela_end > file_size) { + // Most likely compiler inserted some section that didn't get + // objcopy-ed into the final binary + rela_end = file_size; + } + + if (ei_class == 2) + ret = rela_elf64(argv, f); + if (fclose(f) < 0) { fprintf(stderr, "%s: %s: close failed: %s\n", argv[0], argv[1], strerror(errno)); return 4; } - return 0; + return ret; } -- GitLab From a1405d9cfedb1228289e617258de3fc0d7facecd Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 24 Jun 2022 14:15:00 +0200 Subject: [PATCH 302/581] tools: relocate-rela: Check that relocation works only for EM_AARCH64 Relocation support is only for EM_AARCH64 that's why check machine type to make sure that the code will never run on any unsupported one. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/36f26c8752335239344b265e5ddedad10e9cac8b.1655299267.git.michal.simek@amd.com --- tools/relocate-rela.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c index e62247d51e2..2f7f1796a0e 100644 --- a/tools/relocate-rela.c +++ b/tools/relocate-rela.c @@ -79,6 +79,11 @@ static int decode_elf64(FILE *felf, char **argv) machine = header.e_machine; debug("Machine\t%d\n", machine); + if (machine != EM_AARCH64) { + fprintf(stderr, "%s: Not supported machine type\n", argv[0]); + return 30; + } + text_base = header.e_entry; section_header_base = header.e_shoff; section_header_size = header.e_shentsize * header.e_shnum; -- GitLab From 30fb8d29cd3e7a682dfb89f40c4702c0a4029615 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 24 Jun 2022 14:15:00 +0200 Subject: [PATCH 303/581] tools: relocate-rela: Add support for elf32 decoding Add support for 32bit ELF format which is used by Microblaze. Also check that code runs only for Microblaze. Function finds information about rela.dyn and dynsym which will be used later for relocation. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/7491cc72fe04cbd48db014f1492ce463e91dfb42.1655299267.git.michal.simek@amd.com --- tools/relocate-rela.c | 141 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 139 insertions(+), 2 deletions(-) diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c index 2f7f1796a0e..7c2a441a8e9 100644 --- a/tools/relocate-rela.c +++ b/tools/relocate-rela.c @@ -22,7 +22,7 @@ static int ei_class; -static uint64_t rela_start, rela_end, text_base; +static uint64_t rela_start, rela_end, text_base, dyn_start; static const bool debug_en; @@ -184,6 +184,142 @@ static int decode_elf64(FILE *felf, char **argv) return 0; } +static int decode_elf32(FILE *felf, char **argv) +{ + size_t size; + Elf32_Ehdr header; + uint64_t section_header_base, section_header_size, sh_offset, sh_size; + Elf32_Shdr *sh_table; /* Elf symbol table */ + int ret, i, machine; + char *sh_str; + + debug("32bit version\n"); + + /* Make sure we are at start */ + rewind(felf); + + size = fread(&header, 1, sizeof(header), felf); + if (size != sizeof(header)) { + fclose(felf); + return 25; + } + + machine = header.e_machine; + debug("Machine %d\n", machine); + + if (machine != EM_MICROBLAZE) { + fprintf(stderr, "%s: Not supported machine type\n", argv[0]); + return 30; + } + + text_base = header.e_entry; + section_header_base = header.e_shoff; + + debug("Section header base %x\n", section_header_base); + + section_header_size = header.e_shentsize * header.e_shnum; + + debug("Section header size %d\n", section_header_size); + + sh_table = malloc(section_header_size); + if (!sh_table) { + fprintf(stderr, "%s: Cannot allocate space for section header\n", + argv[0]); + fclose(felf); + return 26; + } + + ret = fseek(felf, section_header_base, SEEK_SET); + if (ret) { + fprintf(stderr, "%s: Can't set pointer to section header: %x/%lx\n", + argv[0], ret, section_header_base); + free(sh_table); + fclose(felf); + return 26; + } + + size = fread(sh_table, 1, section_header_size, felf); + if (size != section_header_size) { + fprintf(stderr, "%s: Can't read section header: %lx/%lx\n", + argv[0], size, section_header_size); + free(sh_table); + fclose(felf); + return 27; + } + + sh_size = sh_table[header.e_shstrndx].sh_size; + debug("e_shstrndx %x, sh_size %lx\n", header.e_shstrndx, sh_size); + + sh_str = malloc(sh_size); + if (!sh_str) { + fprintf(stderr, "malloc failed\n"); + free(sh_table); + fclose(felf); + return 28; + } + + /* + * Specifies the byte offset from the beginning of the file + * to the first byte in the section. + */ + sh_offset = sh_table[header.e_shstrndx].sh_offset; + + debug("sh_offset %x\n", header.e_shnum); + + ret = fseek(felf, sh_offset, SEEK_SET); + if (ret) { + fprintf(stderr, "Setting up sh_offset failed\n"); + free(sh_str); + free(sh_table); + fclose(felf); + return 29; + } + + size = fread(sh_str, 1, sh_size, felf); + if (size != sh_size) { + fprintf(stderr, "%s: Can't read section: %lx/%lx\n", + argv[0], size, sh_size); + free(sh_str); + free(sh_table); + fclose(felf); + return 30; + } + + for (i = 0; i < header.e_shnum; i++) { + debug("%s\n", sh_str + sh_table[i].sh_name); + if (!strcmp(".rela.dyn", (sh_str + sh_table[i].sh_name))) { + debug("Found section\t\".rela_dyn\"\n"); + debug(" at addr\t0x%08x\n", (unsigned int)sh_table[i].sh_addr); + debug(" at offset\t0x%08x\n", (unsigned int)sh_table[i].sh_offset); + debug(" of size\t0x%08x\n", (unsigned int)sh_table[i].sh_size); + rela_start = sh_table[i].sh_addr; + rela_end = rela_start + sh_table[i].sh_size; + } + if (!strcmp(".dynsym", (sh_str + sh_table[i].sh_name))) { + debug("Found section\t\".dynsym\"\n"); + debug(" at addr\t0x%08x\n", (unsigned int)sh_table[i].sh_addr); + debug(" at offset\t0x%08x\n", (unsigned int)sh_table[i].sh_offset); + debug(" of size\t0x%08x\n", (unsigned int)sh_table[i].sh_size); + dyn_start = sh_table[i].sh_addr; + } + } + + /* Clean up */ + free(sh_str); + free(sh_table); + fclose(felf); + + debug("text_base\t0x%08lx\n", text_base); + debug("rela_start\t0x%08lx\n", rela_start); + debug("rela_end\t0x%08lx\n", rela_end); + debug("dyn_start\t0x%08lx\n", dyn_start); + + if (!rela_start) + return 1; + + return 0; +} + static int decode_elf(char **argv) { FILE *felf; @@ -218,7 +354,7 @@ static int decode_elf(char **argv) if (ei_class == 2) return decode_elf64(felf, argv); - return 1; + return decode_elf32(felf, argv); } static int rela_elf64(char **argv, FILE *f) @@ -310,6 +446,7 @@ int main(int argc, char **argv) rela_start -= text_base; rela_end -= text_base; + dyn_start -= text_base; f = fopen(argv[1], "r+b"); if (!f) { -- GitLab From 034944b33bc8dd42dd90f9d043c5c03cc0036f01 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 24 Jun 2022 14:15:00 +0200 Subject: [PATCH 304/581] tools: relocate-rela: Add support for 32bit Microblaze relocation Microblaze is 32bit that's why it is using elf32 format. Relocation code requires to get information about rela and dynsym senctions and also text base which was used for compilation. Code build with -fPIC and linked with -pic generates 4 relocation types. R_MICROBLAZE_NONE is the easiest one which doesn't require any action. R_MICROBLAZE_REL only requires write addend to r_offset address. R_MICROBLAZE_32/R_MICROBLAZE_GLOB_DAT are the most complicated. There is a need to find out symbol value with adding symbol value and write it to address pointed by r_offset. Calculation with addend is also added but only 0 addend values are generated now. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/9912c3d76933bdf75e1ebb6aab43726cd32cafb5.1655299267.git.michal.simek@amd.com --- tools/relocate-rela.c | 166 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 166 insertions(+) diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c index 7c2a441a8e9..090fb1acb20 100644 --- a/tools/relocate-rela.c +++ b/tools/relocate-rela.c @@ -420,6 +420,170 @@ static int rela_elf64(char **argv, FILE *f) return 0; } +static bool supported_rela32(Elf32_Rela *rela, uint32_t *type) +{ + uint32_t mask = 0xffULL; /* would be different on 32-bit */ + *type = rela->r_info & mask; + + debug("Type:\t"); + + switch (*type) { + case R_MICROBLAZE_32: + debug("R_MICROBLAZE_32\n"); + return true; + case R_MICROBLAZE_GLOB_DAT: + debug("R_MICROBLAZE_GLOB_DAT\n"); + return true; + case R_MICROBLAZE_NONE: + debug("R_MICROBLAZE_NONE - ignoring - do nothing\n"); + return false; + case R_MICROBLAZE_REL: + debug("R_MICROBLAZE_REL\n"); + return true; + default: + fprintf(stderr, "warning: unsupported relocation type %" + PRIu32 " at %" PRIx32 "\n", *type, rela->r_offset); + + return false; + } +} + +static int rela_elf32(char **argv, FILE *f) +{ + int i, num, index; + uint32_t value, type; + + if ((rela_end - rela_start) % sizeof(Elf32_Rela)) { + fprintf(stderr, "%s: rela size isn't a multiple of Elf32_Rela\n", argv[0]); + return 3; + } + + num = (rela_end - rela_start) / sizeof(Elf32_Rela); + + debug("Number of entries: %u\n", num); + + for (i = 0; i < num; i++) { + Elf32_Rela rela, swrela; + Elf32_Sym symbols; + uint32_t pos = rela_start + sizeof(Elf32_Rela) * i; + uint32_t addr, pos_dyn; + + debug("\nPossition:\t%d/0x%x\n", i, pos); + + if (fseek(f, pos, SEEK_SET) < 0) { + fprintf(stderr, "%s: %s: seek to %" PRIx32 + " failed: %s\n", + argv[0], argv[1], pos, strerror(errno)); + } + + if (fread(&rela, sizeof(rela), 1, f) != 1) { + fprintf(stderr, "%s: %s: read rela failed at %" + PRIx32 "\n", + argv[0], argv[1], pos); + return 4; + } + + debug("Rela:\toffset:\t%" PRIx32 " r_info:\t%" + PRIu32 " r_addend:\t%" PRIx32 "\n", + rela.r_offset, rela.r_info, rela.r_addend); + + swrela.r_offset = cpu_to_le32(rela.r_offset); + swrela.r_info = cpu_to_le32(rela.r_info); + swrela.r_addend = cpu_to_le32(rela.r_addend); + + debug("SWRela:\toffset:\t%" PRIx32 " r_info:\t%" + PRIu32 " r_addend:\t%" PRIx32 "\n", + swrela.r_offset, swrela.r_info, swrela.r_addend); + + if (!supported_rela32(&swrela, &type)) + continue; + + if (swrela.r_offset < text_base) { + fprintf(stderr, "%s: %s: bad rela at %" PRIx32 "\n", + argv[0], argv[1], pos); + return 4; + } + + addr = swrela.r_offset - text_base; + + debug("Addr:\t0x%" PRIx32 "\n", addr); + + switch (type) { + case R_MICROBLAZE_REL: + if (fseek(f, addr, SEEK_SET) < 0) { + fprintf(stderr, "%s: %s: seek to %" + PRIx32 " failed: %s\n", + argv[0], argv[1], addr, strerror(errno)); + return 5; + } + + debug("Write addend\n"); + + if (fwrite(&rela.r_addend, sizeof(rela.r_addend), 1, f) != 1) { + fprintf(stderr, "%s: %s: write failed at %" PRIx32 "\n", + argv[0], argv[1], addr); + return 4; + } + break; + case R_MICROBLAZE_32: + case R_MICROBLAZE_GLOB_DAT: + /* global symbols read it and add reloc offset */ + index = swrela.r_info >> 8; + pos_dyn = dyn_start + sizeof(Elf32_Sym) * index; + + debug("Index:\t%d\n", index); + debug("Pos_dyn:\t0x%x\n", pos_dyn); + + if (fseek(f, pos_dyn, SEEK_SET) < 0) { + fprintf(stderr, "%s: %s: seek to %" + PRIx32 " failed: %s\n", + argv[0], argv[1], pos_dyn, strerror(errno)); + return 5; + } + + if (fread(&symbols, sizeof(symbols), 1, f) != 1) { + fprintf(stderr, "%s: %s: read symbols failed at %" + PRIx32 "\n", + argv[0], argv[1], pos_dyn); + return 4; + } + + debug("Symbol description:\n"); + debug(" st_name:\t0x%x\n", symbols.st_name); + debug(" st_value:\t0x%x\n", symbols.st_value); + debug(" st_size:\t0x%x\n", symbols.st_size); + + value = swrela.r_addend + symbols.st_value; + + debug("Value:\t0x%x\n", value); + + if (fseek(f, addr, SEEK_SET) < 0) { + fprintf(stderr, "%s: %s: seek to %" + PRIx32 " failed: %s\n", + argv[0], argv[1], addr, strerror(errno)); + return 5; + } + + if (fwrite(&value, sizeof(rela.r_addend), 1, f) != 1) { + fprintf(stderr, "%s: %s: write failed at %" PRIx32 "\n", + argv[0], argv[1], addr); + return 4; + } + + break; + case R_MICROBLAZE_NONE: + debug("R_MICROBLAZE_NONE - skip\n"); + break; + default: + fprintf(stderr, "warning: unsupported relocation type %" + PRIu32 " at %" PRIx32 "\n", + type, rela.r_offset); + } + } + + return 0; +} + int main(int argc, char **argv) { FILE *f; @@ -467,6 +631,8 @@ int main(int argc, char **argv) if (ei_class == 2) ret = rela_elf64(argv, f); + else + ret = rela_elf32(argv, f); if (fclose(f) < 0) { fprintf(stderr, "%s: %s: close failed: %s\n", -- GitLab From d58c007498258b73d9eb5e3b24973578498fc341 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 24 Jun 2022 14:15:01 +0200 Subject: [PATCH 305/581] microblaze: Add support for run time relocation Microblaze is using NEEDS_MANUAL_RELOC from the beginnging. This is causing issues with function pointer arrays which need to be updated manually after relocation. Building code with -fPIC and linking with -pic will remove this limitation and there is no longer need to run manual update. By default still old option is enabled but by disabling NEEDS_MANUAL_RELOC code will be compiled for full relocation. The patch does couple of things which are connected to each other. - Define STATIC_RELA dependency to call relocate-rela to fill sections. - REMAKE_ELF was already enabled but u-boot file can't be used because sections are empty. relocate-rela will fill them and output file is u-boot.elf which should be used. - Add support for full relocation (u-boot.elf) - Add support for early relocation when u-boot.bin is loaded to different address then CONFIG_SYS_TEXT_BASE - Add rela.dyn and dynsym sections Disabling NEEDS_MANUAL_RELOC U-Boot size increased by 10% of it's original size (550kB to 608kB). Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/a845670b34925859b2e321875f7588a29f6655f9.1655299267.git.michal.simek@amd.com --- arch/Kconfig | 4 -- arch/m68k/Kconfig | 3 + arch/microblaze/Kconfig | 14 +++++ arch/microblaze/config.mk | 5 ++ arch/microblaze/cpu/Makefile | 1 + arch/microblaze/cpu/relocate.c | 111 +++++++++++++++++++++++++++++++++ arch/microblaze/cpu/start.S | 66 ++++++++++++++++++++ arch/microblaze/cpu/u-boot.lds | 14 +++++ common/board_f.c | 2 + 9 files changed, 216 insertions(+), 4 deletions(-) create mode 100644 arch/microblaze/cpu/relocate.c diff --git a/arch/Kconfig b/arch/Kconfig index 02de32f9c77..d91475d2474 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -8,9 +8,6 @@ config CREATE_ARCH_SYMLINK config HAVE_ARCH_IOREMAP bool -config NEEDS_MANUAL_RELOC - bool - config SYS_CACHE_SHIFT_4 bool @@ -76,7 +73,6 @@ config M68K config MICROBLAZE bool "MicroBlaze architecture" - select NEEDS_MANUAL_RELOC select SUPPORT_OF_CONTROL imply CMD_IRQ diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig index 7f6e4310f1f..d501c4c9799 100644 --- a/arch/m68k/Kconfig +++ b/arch/m68k/Kconfig @@ -4,6 +4,9 @@ menu "M68000 architecture" config SYS_ARCH default "m68k" +config NEEDS_MANUAL_RELOC + def_bool y + # processor family config MCF520x select OF_CONTROL diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig index d7d1b219704..6f45d19330a 100644 --- a/arch/microblaze/Kconfig +++ b/arch/microblaze/Kconfig @@ -4,6 +4,20 @@ menu "MicroBlaze architecture" config SYS_ARCH default "microblaze" +config NEEDS_MANUAL_RELOC + bool "Disable position-independent pre-relocation code" + default y + help + U-Boot expects to be linked to a specific hard-coded address, and to + be loaded to and run from that address. This option lifts that + restriction, thus allowing the code to be loaded to and executed from + almost any 4K aligned address. This logic relies on the relocation + information that is embedded in the binary to support U-Boot + relocating itself to the top-of-RAM later during execution. + +config STATIC_RELA + def_bool y if !NEEDS_MANUAL_RELOC + choice prompt "Target select" optional diff --git a/arch/microblaze/config.mk b/arch/microblaze/config.mk index 3e84a832fc1..d35b4f6db7a 100644 --- a/arch/microblaze/config.mk +++ b/arch/microblaze/config.mk @@ -17,6 +17,11 @@ ifeq ($(CONFIG_SPL_BUILD),) PLATFORM_CPPFLAGS += -fPIC endif +ifeq ($(CONFIG_STATIC_RELA),y) +PLATFORM_CPPFLAGS += -fPIC +LDFLAGS_u-boot += -pic +endif + ifeq ($(CONFIG_SYS_LITTLE_ENDIAN),y) PLATFORM_ELFFLAGS += -B microblaze $(OBJCOPYFLAGS) -O elf32-microblazeel else diff --git a/arch/microblaze/cpu/Makefile b/arch/microblaze/cpu/Makefile index f7a83d07b6f..1feffc6a97c 100644 --- a/arch/microblaze/cpu/Makefile +++ b/arch/microblaze/cpu/Makefile @@ -6,4 +6,5 @@ extra-y = start.o obj-y = irq.o obj-y += interrupts.o cache.o exception.o timer.o +obj-$(CONFIG_STATIC_RELA) += relocate.o obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/arch/microblaze/cpu/relocate.c b/arch/microblaze/cpu/relocate.c new file mode 100644 index 00000000000..b00d02b1dfc --- /dev/null +++ b/arch/microblaze/cpu/relocate.c @@ -0,0 +1,111 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * (C) Copyright 2022 Advanced Micro Devices, Inc + * Michal Simek + */ + +#include +#include + +#define R_MICROBLAZE_NONE 0 +#define R_MICROBLAZE_32 1 +#define R_MICROBLAZE_REL 16 +#define R_MICROBLAZE_GLOB_DAT 18 + +/** + * mb_fix_rela - update relocation to new address + * @reloc_addr: new relocation address + * @verbose: enable version messages + * @rela_start: rela section start + * @rela_end: rela section end + * @dyn_start: dynamic section start + * @origin_addr: address where u-boot starts(doesn't need to be CONFIG_SYS_TEXT_BASE) + */ +void mb_fix_rela(u32 reloc_addr, u32 verbose, u32 rela_start, + u32 rela_end, u32 dyn_start, u32 origin_addr) +{ + u32 num, type, mask, i, reloc_off; + + /* + * Return in case u-boot.elf is used directly. + * Skip it when u-boot.bin is loaded to different address than + * CONFIG_SYS_TEXT_BASE. In this case relocation is necessary to run. + */ + if (reloc_addr == CONFIG_SYS_TEXT_BASE) { + debug_cond(verbose, + "Relocation address is the same - skip relocation\n"); + return; + } + + reloc_off = reloc_addr - origin_addr; + + debug_cond(verbose, "Relocation address:\t0x%08x\n", reloc_addr); + debug_cond(verbose, "Relocation offset:\t0x%08x\n", reloc_off); + debug_cond(verbose, "Origin address:\t0x%08x\n", origin_addr); + debug_cond(verbose, "Rela start:\t0x%08x\n", rela_start); + debug_cond(verbose, "Rela end:\t0x%08x\n", rela_end); + debug_cond(verbose, "Dynsym start:\t0x%08x\n", dyn_start); + + num = (rela_end - rela_start) / sizeof(Elf32_Rela); + + debug_cond(verbose, "Number of entries:\t%u\n", num); + + for (i = 0; i < num; i++) { + Elf32_Rela *rela; + u32 temp; + + rela = (Elf32_Rela *)(rela_start + sizeof(Elf32_Rela) * i); + + mask = 0xffULL; /* would be different on 32-bit */ + type = rela->r_info & mask; + + debug_cond(verbose, "\nRela possition:\t%d/0x%x\n", + i, (u32)rela); + + switch (type) { + case R_MICROBLAZE_REL: + temp = *(u32 *)rela->r_offset; + + debug_cond(verbose, "Type:\tREL\n"); + debug_cond(verbose, "Rela r_offset:\t\t0x%x\n", rela->r_offset); + debug_cond(verbose, "Rela r_info:\t\t0x%x\n", rela->r_info); + debug_cond(verbose, "Rela r_addend:\t\t0x%x\n", rela->r_addend); + debug_cond(verbose, "Value at r_offset:\t0x%x\n", temp); + + rela->r_offset += reloc_off; + rela->r_addend += reloc_off; + + temp = *(u32 *)rela->r_offset; + temp += reloc_off; + *(u32 *)rela->r_offset = temp; + + debug_cond(verbose, "New:Rela r_offset:\t0x%x\n", rela->r_offset); + debug_cond(verbose, "New:Rela r_addend:\t0x%x\n", rela->r_addend); + debug_cond(verbose, "New:Value at r_offset:\t0x%x\n", temp); + break; + case R_MICROBLAZE_32: + case R_MICROBLAZE_GLOB_DAT: + debug_cond(verbose, "Type:\t(32/GLOB) %u\n", type); + debug_cond(verbose, "Rela r_offset:\t\t0x%x\n", rela->r_offset); + debug_cond(verbose, "Rela r_info:\t\t0x%x\n", rela->r_info); + debug_cond(verbose, "Rela r_addend:\t\t0x%x\n", rela->r_addend); + debug_cond(verbose, "Value at r_offset:\t0x%x\n", temp); + + rela->r_offset += reloc_off; + + temp = *(u32 *)rela->r_offset; + temp += reloc_off; + *(u32 *)rela->r_offset = temp; + + debug_cond(verbose, "New:Rela r_offset:\t0x%x\n", rela->r_offset); + debug_cond(verbose, "New:Value at r_offset:\t0x%x\n", temp); + break; + case R_MICROBLAZE_NONE: + debug_cond(verbose, "R_MICROBLAZE_NONE - skip\n"); + break; + default: + debug_cond(verbose, "warning: unsupported relocation type %d at %x\n", + type, rela->r_offset); + } + } +} diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 72b0f335473..9a661e785f6 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -10,8 +10,16 @@ #include #include +#if defined(CONFIG_STATIC_RELA) +#define SYM_ADDR(reg, reg_add, symbol) \ + mfs r20, rpc; \ + addik r20, r20, _GLOBAL_OFFSET_TABLE_ + 8; \ + lwi reg, r20, symbol@GOT; \ + addk reg, reg reg_add; +#else #define SYM_ADDR(reg, reg_add, symbol) \ addi reg, reg_add, symbol +#endif .text .global _start @@ -27,6 +35,39 @@ _start: addi r1, r0, CONFIG_SPL_STACK_ADDR #else add r1, r0, r20 +#if defined(CONFIG_STATIC_RELA) + bri 1f + + /* Force alignment for easier ASM code below */ +#define ALIGNMENT_ADDR 0x20 + .align 4 +uboot_dyn_start: + .word __rel_dyn_start + +uboot_dyn_end: + .word __rel_dyn_end + +uboot_sym_start: + .word __dyn_sym_start +1: + + addi r5, r20, 0 + add r6, r0, r0 + + lwi r7, r20, ALIGNMENT_ADDR + addi r7, r7, -CONFIG_SYS_TEXT_BASE + add r7, r7, r5 + lwi r8, r20, ALIGNMENT_ADDR + 0x4 + addi r8, r8, -CONFIG_SYS_TEXT_BASE + add r8, r8, r5 + lwi r9, r20, ALIGNMENT_ADDR + 0x8 + addi r9, r9, -CONFIG_SYS_TEXT_BASE + add r9, r9, r5 + addi r10, r0, CONFIG_SYS_TEXT_BASE + + brlid r15, mb_fix_rela + nop +#endif #endif addi r1, r1, -4 /* Decrement SP to top of memory */ @@ -297,6 +338,30 @@ relocate_code: brlid r15, __setup_exceptions nop +#if defined(CONFIG_STATIC_RELA) + /* reloc_offset is current location */ + SYM_ADDR(r10, r0, _start) + + /* r5 new address where I should copy code */ + add r5, r0, r7 /* Move reloc addr to r5 */ + + /* Verbose message */ + addi r6, r0, 0 + + SYM_ADDR(r7, r0, __rel_dyn_start) + rsub r7, r10, r7 + add r7, r7, r5 + SYM_ADDR(r8, r0, __rel_dyn_end) + rsub r8, r10, r8 + add r8, r8, r5 + SYM_ADDR(r9, r0, __dyn_sym_start) + rsub r9, r10, r9 + add r9, r9, r5 + brlid r15, mb_fix_rela + nop + + /* end of code which does relocation */ +#else /* Check if GOT exist */ addik r21, r23, _got_start addik r22, r23, _got_end @@ -314,6 +379,7 @@ relocate_code: cmpu r12, r21, r22 /* Check if this cross boundary */ bneid r12, 3b addik r21. r21, 4 +#endif /* Flush caches to ensure consistency */ addik r5, r0, 0 diff --git a/arch/microblaze/cpu/u-boot.lds b/arch/microblaze/cpu/u-boot.lds index 2b316cc7f5a..821cc55d7b3 100644 --- a/arch/microblaze/cpu/u-boot.lds +++ b/arch/microblaze/cpu/u-boot.lds @@ -46,6 +46,20 @@ SECTIONS } __init_end = . ; + . = ALIGN(4); + __rel_dyn_start = .; + .rela.dyn : { + *(.rela.dyn) + } + __rel_dyn_end = .; + + . = ALIGN(4); + __dyn_sym_start = .; + .dynsym : { + *(.dynsym) + } + __dyn_sym_end = .; + .bss ALIGN(0x4): { __bss_start = .; diff --git a/common/board_f.c b/common/board_f.c index 51d2f3c365e..a5666ca77c2 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -684,6 +684,8 @@ static int setup_reloc(void) #ifdef CONFIG_SYS_TEXT_BASE #ifdef ARM gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start; +#elif defined(CONFIG_MICROBLAZE) + gd->reloc_off = gd->relocaddr - (u32)_start; #elif defined(CONFIG_M68K) /* * On all ColdFire arch cpu, monitor code starts always -- GitLab From 15c924a7437b9763b1b84aa693a842c49184586d Mon Sep 17 00:00:00 2001 From: Ovidiu Panait Date: Tue, 31 May 2022 21:14:22 +0300 Subject: [PATCH 306/581] cmd: cpu: migrate cpu command to U_BOOT_CMD_WITH_SUBCMDS() Migrate cpu command to use U_BOOT_CMD_WITH_SUBCMDS() helper macro, to reduce duplicated code. This also fixes the cpu command on boards that enable CONFIG_NEEDS_MANUAL_RELOC. Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20220531181435.3473549-1-ovpanait@gmail.com Signed-off-by: Michal Simek --- cmd/cpu.c | 39 ++++++++------------------------------- 1 file changed, 8 insertions(+), 31 deletions(-) diff --git a/cmd/cpu.c b/cmd/cpu.c index 67dbb044b53..2ca4d05ae8a 100644 --- a/cmd/cpu.c +++ b/cmd/cpu.c @@ -82,36 +82,13 @@ static int do_cpu_detail(struct cmd_tbl *cmdtp, int flag, int argc, return 0; } -static struct cmd_tbl cmd_cpu_sub[] = { - U_BOOT_CMD_MKENT(list, 2, 1, do_cpu_list, "", ""), - U_BOOT_CMD_MKENT(detail, 4, 0, do_cpu_detail, "", ""), -}; - -/* - * Process a cpu sub-command - */ -static int do_cpu(struct cmd_tbl *cmdtp, int flag, int argc, - char *const argv[]) -{ - struct cmd_tbl *c = NULL; - - /* Strip off leading 'cpu' command argument */ - argc--; - argv++; - - if (argc) - c = find_cmd_tbl(argv[0], cmd_cpu_sub, - ARRAY_SIZE(cmd_cpu_sub)); - - if (c) - return c->cmd(cmdtp, flag, argc, argv); - else - return CMD_RET_USAGE; -} - -U_BOOT_CMD( - cpu, 2, 1, do_cpu, - "display information about CPUs", +#if CONFIG_IS_ENABLED(SYS_LONGHELP) +static char cpu_help_text[] = "list - list available CPUs\n" "cpu detail - show CPU detail" -); + ; +#endif + +U_BOOT_CMD_WITH_SUBCMDS(cpu, "display information about CPUs", cpu_help_text, + U_BOOT_SUBCMD_MKENT(list, 1, 1, do_cpu_list), + U_BOOT_SUBCMD_MKENT(detail, 1, 0, do_cpu_detail)); -- GitLab From b391b915bb3441a01b18d9b144425b577ea6b2c2 Mon Sep 17 00:00:00 2001 From: Ovidiu Panait Date: Tue, 31 May 2022 21:14:23 +0300 Subject: [PATCH 307/581] cpu-uclass: relocate ops pointers for CONFIG_NEEDS_MANUAL_RELOC Relocate cpu_ops pointers when CONFIG_NEEDS_MANUAL_RELOC is enabled. The (gd->flags & GD_FLG_RELOC) check was added to make sure the reloc_done logic works for drivers that use DM_FLAG_PRE_RELOC. Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20220531181435.3473549-2-ovpanait@gmail.com Signed-off-by: Michal Simek --- drivers/cpu/cpu-uclass.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/drivers/cpu/cpu-uclass.c b/drivers/cpu/cpu-uclass.c index a5cda6a62c4..71e5900d70e 100644 --- a/drivers/cpu/cpu-uclass.c +++ b/drivers/cpu/cpu-uclass.c @@ -14,6 +14,9 @@ #include #include #include +#include + +DECLARE_GLOBAL_DATA_PTR; int cpu_probe_all(void) { @@ -136,9 +139,36 @@ static int uclass_cpu_init(struct uclass *uc) return ret; } +static int uclass_cpu_post_bind(struct udevice *dev) +{ + if (IS_ENABLED(CONFIG_NEEDS_MANUAL_RELOC) && + (gd->flags & GD_FLG_RELOC)) { + struct cpu_ops *ops = cpu_get_ops(dev); + static int reloc_done; + + if (!reloc_done) { + if (ops->get_desc) + MANUAL_RELOC(ops->get_desc); + if (ops->get_info) + MANUAL_RELOC(ops->get_info); + if (ops->get_count) + MANUAL_RELOC(ops->get_count); + if (ops->get_vendor) + MANUAL_RELOC(ops->get_vendor); + if (ops->is_current) + MANUAL_RELOC(ops->is_current); + + reloc_done++; + } + } + + return 0; +} + UCLASS_DRIVER(cpu) = { .id = UCLASS_CPU, .name = "cpu", .flags = DM_UC_FLAG_SEQ_ALIAS, .init = uclass_cpu_init, + .post_bind = uclass_cpu_post_bind, }; -- GitLab From 130fae2decdb1a408f89931156a5b00249e54eec Mon Sep 17 00:00:00 2001 From: Ovidiu Panait Date: Tue, 31 May 2022 21:14:24 +0300 Subject: [PATCH 308/581] microblaze: start.S: remove unused code in16/out16 routines seem to not be used anywhere in microblaze code, so remove them. Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20220531181435.3473549-3-ovpanait@gmail.com Signed-off-by: Michal Simek --- arch/microblaze/cpu/start.S | 33 --------------------------------- 1 file changed, 33 deletions(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 9a661e785f6..cd47b0f95bd 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -267,39 +267,6 @@ __setup_exceptions: or r0, r0, r0 .end __setup_exceptions -/* - * Read 16bit little endian - */ - .text - .global in16 - .ent in16 - .align 2 -in16: lhu r3, r0, r5 - bslli r4, r3, 8 - bsrli r3, r3, 8 - andi r4, r4, 0xffff - or r3, r3, r4 - rtsd r15, 8 - sext16 r3, r3 - .end in16 - -/* - * Write 16bit little endian - * first parameter(r5) - address, second(r6) - short value - */ - .text - .global out16 - .ent out16 - .align 2 -out16: bslli r3, r6, 8 - bsrli r6, r6, 8 - andi r3, r3, 0xffff - or r3, r3, r6 - sh r3, r0, r5 - rtsd r15, 8 - or r0, r0, r0 - .end out16 - /* * Relocate u-boot */ -- GitLab From 0ad71dc53af000609d4484a465e630e569e73d63 Mon Sep 17 00:00:00 2001 From: Ovidiu Panait Date: Tue, 31 May 2022 21:14:25 +0300 Subject: [PATCH 309/581] microblaze: cache: replace XILINX_USE_DCACHE -> CONFIG_DCACHE XILINX_USE_DCACHE macro was removed in 7556fa09e0e ("microblaze: Simplify cache handling"), but it was still used in a couple of places. Replace those occurences with CONFIG_DCACHE. Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20220531181435.3473549-4-ovpanait@gmail.com Signed-off-by: Michal Simek --- arch/microblaze/cpu/cache.c | 2 +- arch/microblaze/lib/bootm.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/microblaze/cpu/cache.c b/arch/microblaze/cpu/cache.c index aa832d6be6d..b6126de1944 100644 --- a/arch/microblaze/cpu/cache.c +++ b/arch/microblaze/cpu/cache.c @@ -49,7 +49,7 @@ void dcache_enable(void) void dcache_disable(void) { -#ifdef XILINX_USE_DCACHE +#ifdef CONFIG_DCACHE flush_cache(0, XILINX_DCACHE_BYTE_SIZE); #endif MSRCLR(0x80); diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c index 12ea32488e6..b652d2767a2 100644 --- a/arch/microblaze/lib/bootm.c +++ b/arch/microblaze/lib/bootm.c @@ -57,7 +57,7 @@ static void boot_jump_linux(bootm_headers_t *images, int flag) "(fake run for tracing)" : ""); bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel"); -#ifdef XILINX_USE_DCACHE +#ifdef CONFIG_DCACHE flush_cache(0, XILINX_DCACHE_BYTE_SIZE); #endif -- GitLab From ef0a592ae8e2961519510f48ffe48b655b31610a Mon Sep 17 00:00:00 2001 From: Ovidiu Panait Date: Tue, 31 May 2022 21:14:26 +0300 Subject: [PATCH 310/581] microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek --- arch/microblaze/Kconfig | 4 ---- arch/microblaze/cpu/cache.c | 15 ++++++++++----- arch/microblaze/lib/bootm.c | 2 -- board/xilinx/microblaze-generic/Kconfig | 11 +++++++++++ 4 files changed, 21 insertions(+), 11 deletions(-) diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig index 6f45d19330a..11ccbcc9f20 100644 --- a/arch/microblaze/Kconfig +++ b/arch/microblaze/Kconfig @@ -39,10 +39,6 @@ config TARGET_MICROBLAZE_GENERIC endchoice -config DCACHE - bool "Enable dcache support" - default y - config ICACHE bool "Enable icache support" default y diff --git a/arch/microblaze/cpu/cache.c b/arch/microblaze/cpu/cache.c index b6126de1944..4e8e228a22c 100644 --- a/arch/microblaze/cpu/cache.c +++ b/arch/microblaze/cpu/cache.c @@ -49,26 +49,31 @@ void dcache_enable(void) void dcache_disable(void) { -#ifdef CONFIG_DCACHE flush_cache(0, XILINX_DCACHE_BYTE_SIZE); -#endif + MSRCLR(0x80); } void flush_cache(ulong addr, ulong size) { int i; - for (i = 0; i < size; i += 4) + for (i = 0; i < size; i += 4) { asm volatile ( #ifdef CONFIG_ICACHE "wic %0, r0;" #endif "nop;" -#ifdef CONFIG_DCACHE + : + : "r" (addr + i) + : "memory"); + + if (CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_USE_WDC)) { + asm volatile ( "wdc.flush %0, r0;" -#endif "nop;" : : "r" (addr + i) : "memory"); + } + } } diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c index b652d2767a2..dba6226ce56 100644 --- a/arch/microblaze/lib/bootm.c +++ b/arch/microblaze/lib/bootm.c @@ -57,9 +57,7 @@ static void boot_jump_linux(bootm_headers_t *images, int flag) "(fake run for tracing)" : ""); bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel"); -#ifdef CONFIG_DCACHE flush_cache(0, XILINX_DCACHE_BYTE_SIZE); -#endif if (!fake) { /* diff --git a/board/xilinx/microblaze-generic/Kconfig b/board/xilinx/microblaze-generic/Kconfig index 117b476f3f4..b00ce6f59a4 100644 --- a/board/xilinx/microblaze-generic/Kconfig +++ b/board/xilinx/microblaze-generic/Kconfig @@ -63,4 +63,15 @@ config XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Memory address location of the exception vector table. It is configurable via the C_BASE_VECTORS hdl parameter. +config XILINX_MICROBLAZE0_USE_WDC + bool "MicroBlaze wdc instruction support" + default y + help + Enable this option if the MicroBlaze processor is configured with + support for the "wdc" (Write to Data Cache) instruction. + +config SPL_XILINX_MICROBLAZE0_USE_WDC + bool + default XILINX_MICROBLAZE0_USE_WDC + endif -- GitLab From 8daf89678e9a8ce4203d2df6c65d9ff17aad785a Mon Sep 17 00:00:00 2001 From: Ovidiu Panait Date: Tue, 31 May 2022 21:14:27 +0300 Subject: [PATCH 311/581] microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek --- arch/microblaze/Kconfig | 4 ---- arch/microblaze/cpu/cache.c | 6 +++--- board/xilinx/microblaze-generic/Kconfig | 11 +++++++++++ 3 files changed, 14 insertions(+), 7 deletions(-) diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig index 11ccbcc9f20..ce157a79ccc 100644 --- a/arch/microblaze/Kconfig +++ b/arch/microblaze/Kconfig @@ -39,10 +39,6 @@ config TARGET_MICROBLAZE_GENERIC endchoice -config ICACHE - bool "Enable icache support" - default y - source "board/xilinx/Kconfig" source "board/xilinx/microblaze-generic/Kconfig" diff --git a/arch/microblaze/cpu/cache.c b/arch/microblaze/cpu/cache.c index 4e8e228a22c..b6bbc215b37 100644 --- a/arch/microblaze/cpu/cache.c +++ b/arch/microblaze/cpu/cache.c @@ -58,14 +58,14 @@ void flush_cache(ulong addr, ulong size) { int i; for (i = 0; i < size; i += 4) { - asm volatile ( -#ifdef CONFIG_ICACHE + if (CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_USE_WIC)) { + asm volatile ( "wic %0, r0;" -#endif "nop;" : : "r" (addr + i) : "memory"); + } if (CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_USE_WDC)) { asm volatile ( diff --git a/board/xilinx/microblaze-generic/Kconfig b/board/xilinx/microblaze-generic/Kconfig index b00ce6f59a4..98b4814b95a 100644 --- a/board/xilinx/microblaze-generic/Kconfig +++ b/board/xilinx/microblaze-generic/Kconfig @@ -74,4 +74,15 @@ config SPL_XILINX_MICROBLAZE0_USE_WDC bool default XILINX_MICROBLAZE0_USE_WDC +config XILINX_MICROBLAZE0_USE_WIC + bool "MicroBlaze wic instruction support" + default y + help + Enable this option if the MicroBlaze processor is configured with + support for the "wic" (Write to Instruction Cache) instruction. + +config SPL_XILINX_MICROBLAZE0_USE_WIC + bool + default XILINX_MICROBLAZE0_USE_WIC + endif -- GitLab From 73b8ee62a0a0aa03b789e5299a00cf8e6adf23ac Mon Sep 17 00:00:00 2001 From: Ovidiu Panait Date: Tue, 31 May 2022 21:14:28 +0300 Subject: [PATCH 312/581] microblaze: cache: split flush_cache() function Factor out icache/dcache components from flush_cache() function. Call the newly added __flush_icache()/__flush_dcache() functions inside icache_disable() and dcache_disable(), respectively. There is no need to flush both caches when disabling a particular cache type. Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20220531181435.3473549-7-ovpanait@gmail.com Signed-off-by: Michal Simek --- arch/microblaze/cpu/cache.c | 55 ++++++++++++++++++++++--------------- 1 file changed, 33 insertions(+), 22 deletions(-) diff --git a/arch/microblaze/cpu/cache.c b/arch/microblaze/cpu/cache.c index b6bbc215b37..e362a34a796 100644 --- a/arch/microblaze/cpu/cache.c +++ b/arch/microblaze/cpu/cache.c @@ -10,6 +10,34 @@ #include #include +static void __invalidate_icache(ulong addr, ulong size) +{ + if (CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_USE_WIC)) { + for (int i = 0; i < size; i += 4) { + asm volatile ( + "wic %0, r0;" + "nop;" + : + : "r" (addr + i) + : "memory"); + } + } +} + +static void __flush_dcache(ulong addr, ulong size) +{ + if (CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_USE_WDC)) { + for (int i = 0; i < size; i += 4) { + asm volatile ( + "wdc.flush %0, r0;" + "nop;" + : + : "r" (addr + i) + : "memory"); + } + } +} + int dcache_status(void) { int i = 0; @@ -38,7 +66,8 @@ void icache_enable(void) void icache_disable(void) { /* we are not generate ICACHE size -> flush whole cache */ - flush_cache(0, 32768); + __invalidate_icache(0, 32768); + MSRCLR(0x20); } @@ -49,31 +78,13 @@ void dcache_enable(void) void dcache_disable(void) { - flush_cache(0, XILINX_DCACHE_BYTE_SIZE); + __flush_dcache(0, XILINX_DCACHE_BYTE_SIZE); MSRCLR(0x80); } void flush_cache(ulong addr, ulong size) { - int i; - for (i = 0; i < size; i += 4) { - if (CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_USE_WIC)) { - asm volatile ( - "wic %0, r0;" - "nop;" - : - : "r" (addr + i) - : "memory"); - } - - if (CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_USE_WDC)) { - asm volatile ( - "wdc.flush %0, r0;" - "nop;" - : - : "r" (addr + i) - : "memory"); - } - } + __invalidate_icache(addr, size); + __flush_dcache(addr, size); } -- GitLab From 84488fc69348367ee693ea4ab6affe3cbcae97a0 Mon Sep 17 00:00:00 2001 From: Ovidiu Panait Date: Tue, 31 May 2022 21:14:29 +0300 Subject: [PATCH 313/581] microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek (s/bralid/brlid/g) --- arch/microblaze/cpu/cache.c | 5 ++--- arch/microblaze/cpu/start.S | 4 ++-- arch/microblaze/lib/bootm.c | 2 +- board/xilinx/microblaze-generic/Kconfig | 16 ++++++++++++++++ include/configs/microblaze-generic.h | 4 ---- 5 files changed, 21 insertions(+), 10 deletions(-) diff --git a/arch/microblaze/cpu/cache.c b/arch/microblaze/cpu/cache.c index e362a34a796..d5c0afd9355 100644 --- a/arch/microblaze/cpu/cache.c +++ b/arch/microblaze/cpu/cache.c @@ -65,8 +65,7 @@ void icache_enable(void) void icache_disable(void) { - /* we are not generate ICACHE size -> flush whole cache */ - __invalidate_icache(0, 32768); + __invalidate_icache(0, CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE); MSRCLR(0x20); } @@ -78,7 +77,7 @@ void dcache_enable(void) void dcache_disable(void) { - __flush_dcache(0, XILINX_DCACHE_BYTE_SIZE); + __flush_dcache(0, CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE); MSRCLR(0x80); } diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index cd47b0f95bd..6e3ffafa5fd 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -99,7 +99,7 @@ uboot_sym_start: /* Flush cache before enable cache */ addik r5, r0, 0 - addik r6, r0, XILINX_DCACHE_BYTE_SIZE + addik r6, r0, CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE brlid r15, flush_cache nop @@ -350,7 +350,7 @@ relocate_code: /* Flush caches to ensure consistency */ addik r5, r0, 0 - addik r6, r0, XILINX_DCACHE_BYTE_SIZE + addik r6, r0, CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE brlid r15, flush_cache nop diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c index dba6226ce56..48e05333a67 100644 --- a/arch/microblaze/lib/bootm.c +++ b/arch/microblaze/lib/bootm.c @@ -57,7 +57,7 @@ static void boot_jump_linux(bootm_headers_t *images, int flag) "(fake run for tracing)" : ""); bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel"); - flush_cache(0, XILINX_DCACHE_BYTE_SIZE); + flush_cache(0, CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE); if (!fake) { /* diff --git a/board/xilinx/microblaze-generic/Kconfig b/board/xilinx/microblaze-generic/Kconfig index 98b4814b95a..a6743cadf45 100644 --- a/board/xilinx/microblaze-generic/Kconfig +++ b/board/xilinx/microblaze-generic/Kconfig @@ -85,4 +85,20 @@ config SPL_XILINX_MICROBLAZE0_USE_WIC bool default XILINX_MICROBLAZE0_USE_WIC +config XILINX_MICROBLAZE0_DCACHE_SIZE + int "Default data cache size" + default 32768 + help + This fallback size will be used when no dcache info can be found in + the device tree, or when the data cache is flushed very early in the + boot process, before device tree is available. + +config XILINX_MICROBLAZE0_ICACHE_SIZE + int "Default instruction cache size" + default 32768 + help + This fallback size will be used when no icache info can be found in + the device tree, or when the instruction cache is flushed very early + in the boot process, before device tree is available. + endif diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 60ceb2c817e..bae0f284fdc 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -26,10 +26,6 @@ # define CONFIG_SYS_MAX_FLASH_SECT 2048 #endif -#ifndef XILINX_DCACHE_BYTE_SIZE -#define XILINX_DCACHE_BYTE_SIZE 32768 -#endif - /* size of console buffer */ #define CONFIG_SYS_CBSIZE 512 /* max number of command args */ -- GitLab From b195134984ec714f92632704e4725ced170ab1da Mon Sep 17 00:00:00 2001 From: Ovidiu Panait Date: Tue, 31 May 2022 21:14:30 +0300 Subject: [PATCH 314/581] microblaze: cache: introduce flush_cache_all() All flush_cache() calls in microblaze code are supposed to flush the entire instruction and data caches, so introduce flush_cache_all() helper to handle this. Also, provide implementations for flush_dcache_all() and invalidate_icache_all() so that icache and dcache u-boot commands can work. Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20220531181435.3473549-9-ovpanait@gmail.com Signed-off-by: Michal Simek --- arch/microblaze/cpu/cache.c | 20 ++++++++++++++++++-- arch/microblaze/cpu/start.S | 8 ++------ arch/microblaze/include/asm/cache.h | 5 +++++ arch/microblaze/lib/bootm.c | 2 +- 4 files changed, 26 insertions(+), 9 deletions(-) diff --git a/arch/microblaze/cpu/cache.c b/arch/microblaze/cpu/cache.c index d5c0afd9355..b99b8c17066 100644 --- a/arch/microblaze/cpu/cache.c +++ b/arch/microblaze/cpu/cache.c @@ -24,6 +24,11 @@ static void __invalidate_icache(ulong addr, ulong size) } } +void invalidate_icache_all(void) +{ + __invalidate_icache(0, CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE); +} + static void __flush_dcache(ulong addr, ulong size) { if (CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_USE_WDC)) { @@ -38,6 +43,11 @@ static void __flush_dcache(ulong addr, ulong size) } } +void flush_dcache_all(void) +{ + __flush_dcache(0, CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE); +} + int dcache_status(void) { int i = 0; @@ -65,7 +75,7 @@ void icache_enable(void) void icache_disable(void) { - __invalidate_icache(0, CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE); + invalidate_icache_all(); MSRCLR(0x20); } @@ -77,7 +87,7 @@ void dcache_enable(void) void dcache_disable(void) { - __flush_dcache(0, CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE); + flush_dcache_all(); MSRCLR(0x80); } @@ -87,3 +97,9 @@ void flush_cache(ulong addr, ulong size) __invalidate_icache(addr, size); __flush_dcache(addr, size); } + +void flush_cache_all(void) +{ + invalidate_icache_all(); + flush_dcache_all(); +} diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 6e3ffafa5fd..e6a30e8e002 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -98,9 +98,7 @@ uboot_sym_start: #endif /* Flush cache before enable cache */ - addik r5, r0, 0 - addik r6, r0, CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE - brlid r15, flush_cache + brlid r15, flush_cache_all nop /* enable instruction and data cache */ @@ -349,9 +347,7 @@ relocate_code: #endif /* Flush caches to ensure consistency */ - addik r5, r0, 0 - addik r6, r0, CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE - brlid r15, flush_cache + brlid r15, flush_cache_all nop 2: addi r5, r31, 0 /* gd is initialized in board_r.c */ diff --git a/arch/microblaze/include/asm/cache.h b/arch/microblaze/include/asm/cache.h index baee01a0e28..c39b66dd7da 100644 --- a/arch/microblaze/include/asm/cache.h +++ b/arch/microblaze/include/asm/cache.h @@ -18,4 +18,9 @@ #define ARCH_DMA_MINALIGN 16 #endif +/** + * flush_cache_all - flush the entire instruction/data caches + */ +void flush_cache_all(void); + #endif /* __MICROBLAZE_CACHE_H__ */ diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c index 48e05333a67..af946b86428 100644 --- a/arch/microblaze/lib/bootm.c +++ b/arch/microblaze/lib/bootm.c @@ -57,7 +57,7 @@ static void boot_jump_linux(bootm_headers_t *images, int flag) "(fake run for tracing)" : ""); bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel"); - flush_cache(0, CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE); + flush_cache_all(); if (!fake) { /* -- GitLab From 95b7a8fd128aec8214d13b33131a4ea1fa4cc9a3 Mon Sep 17 00:00:00 2001 From: Ovidiu Panait Date: Tue, 31 May 2022 21:14:31 +0300 Subject: [PATCH 315/581] microblaze: cache: introduce cpuinfo structure Introduce a minimal cpuinfo structure to hold cache related info. The instruction/data cache size and cache line size are initialized early in the boot to default Kconfig values. They will be overwritten with data from PVR/dtb if the microblaze UCLASS_CPU driver is enabled. The cpuinfo struct was placed in global_data to allow the microblaze UCLASS_CPU driver to also run before relocation (initialized global data should be read-only before relocation). gd_cpuinfo() helper macro was added to avoid volatile "-Wdiscarded-qualifiers" warnings when using the pointer directly. Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20220531181435.3473549-10-ovpanait@gmail.com Signed-off-by: Michal Simek (s/bralid/brlid/) --- arch/microblaze/cpu/Makefile | 2 +- arch/microblaze/cpu/cache.c | 14 ++++++--- arch/microblaze/cpu/cpuinfo.c | 20 +++++++++++++ arch/microblaze/cpu/start.S | 7 +++++ arch/microblaze/include/asm/cpuinfo.h | 35 +++++++++++++++++++++++ arch/microblaze/include/asm/global_data.h | 5 ++++ 6 files changed, 78 insertions(+), 5 deletions(-) create mode 100644 arch/microblaze/cpu/cpuinfo.c create mode 100644 arch/microblaze/include/asm/cpuinfo.h diff --git a/arch/microblaze/cpu/Makefile b/arch/microblaze/cpu/Makefile index 1feffc6a97c..78d7f83597a 100644 --- a/arch/microblaze/cpu/Makefile +++ b/arch/microblaze/cpu/Makefile @@ -5,6 +5,6 @@ extra-y = start.o obj-y = irq.o -obj-y += interrupts.o cache.o exception.o timer.o +obj-y += interrupts.o cache.o exception.o timer.o cpuinfo.o obj-$(CONFIG_STATIC_RELA) += relocate.o obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/arch/microblaze/cpu/cache.c b/arch/microblaze/cpu/cache.c index b99b8c17066..cd8507901d4 100644 --- a/arch/microblaze/cpu/cache.c +++ b/arch/microblaze/cpu/cache.c @@ -9,11 +9,16 @@ #include #include #include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; static void __invalidate_icache(ulong addr, ulong size) { if (CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_USE_WIC)) { - for (int i = 0; i < size; i += 4) { + for (int i = 0; i < size; + i += gd_cpuinfo()->icache_line_length) { asm volatile ( "wic %0, r0;" "nop;" @@ -26,13 +31,14 @@ static void __invalidate_icache(ulong addr, ulong size) void invalidate_icache_all(void) { - __invalidate_icache(0, CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE); + __invalidate_icache(0, gd_cpuinfo()->icache_size); } static void __flush_dcache(ulong addr, ulong size) { if (CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_USE_WDC)) { - for (int i = 0; i < size; i += 4) { + for (int i = 0; i < size; + i += gd_cpuinfo()->dcache_line_length) { asm volatile ( "wdc.flush %0, r0;" "nop;" @@ -45,7 +51,7 @@ static void __flush_dcache(ulong addr, ulong size) void flush_dcache_all(void) { - __flush_dcache(0, CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE); + __flush_dcache(0, gd_cpuinfo()->dcache_size); } int dcache_status(void) diff --git a/arch/microblaze/cpu/cpuinfo.c b/arch/microblaze/cpu/cpuinfo.c new file mode 100644 index 00000000000..3f0b1d2c04a --- /dev/null +++ b/arch/microblaze/cpu/cpuinfo.c @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022, Ovidiu Panait + */ +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +void microblaze_early_cpuinfo_init(void) +{ + struct microblaze_cpuinfo *ci = gd_cpuinfo(); + + ci->icache_size = CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE; + ci->icache_line_length = 4; + + ci->dcache_size = CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE; + ci->dcache_line_length = 4; +} diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index e6a30e8e002..de952701dff 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -97,6 +97,13 @@ uboot_sym_start: nop #endif + /* + * Initialize global data cpuinfo with default values (cache + * size, cache line size, etc). + */ + brlid r15, microblaze_early_cpuinfo_init + nop + /* Flush cache before enable cache */ brlid r15, flush_cache_all nop diff --git a/arch/microblaze/include/asm/cpuinfo.h b/arch/microblaze/include/asm/cpuinfo.h new file mode 100644 index 00000000000..c27dd40af7c --- /dev/null +++ b/arch/microblaze/include/asm/cpuinfo.h @@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2022, Ovidiu Panait + */ + +#ifndef __ASM_MICROBLAZE_CPUINFO_H +#define __ASM_MICROBLAZE_CPUINFO_H + +/** + * struct microblaze_cpuinfo - CPU info for microblaze processor core. + * + * @icache_size: Size of instruction cache memory in bytes. + * @icache_line_length: Instruction cache line length in bytes. + * @dcache_size: Size of data cache memory in bytes. + * @dcache_line_length: Data cache line length in bytes. + */ +struct microblaze_cpuinfo { + u32 icache_size; + u32 icache_line_length; + + u32 dcache_size; + u32 dcache_line_length; +}; + +/** + * microblaze_early_cpuinfo_init() - Initialize cpuinfo with default values. + * + * Initializes the global data cpuinfo structure with default values (cache + * size, cache line size, etc.). It is called very early in the boot process + * (start.S codepath right before the first cache flush call) to ensure that + * cache related operations are properly handled. + */ +void microblaze_early_cpuinfo_init(void); + +#endif /* __ASM_MICROBLAZE_CPUINFO_H */ diff --git a/arch/microblaze/include/asm/global_data.h b/arch/microblaze/include/asm/global_data.h index 05868ac4f54..93506dec894 100644 --- a/arch/microblaze/include/asm/global_data.h +++ b/arch/microblaze/include/asm/global_data.h @@ -8,12 +8,17 @@ #ifndef __ASM_GBL_DATA_H #define __ASM_GBL_DATA_H +#include + /* Architecture-specific global data */ struct arch_global_data { + struct microblaze_cpuinfo cpuinfo; }; #include #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r31") +#define gd_cpuinfo() ((struct microblaze_cpuinfo *)&gd->arch.cpuinfo) + #endif /* __ASM_GBL_DATA_H */ -- GitLab From 10f6508c0728c1a125bead212259b2921702d1b7 Mon Sep 17 00:00:00 2001 From: Ovidiu Panait Date: Tue, 31 May 2022 21:14:32 +0300 Subject: [PATCH 316/581] microblaze: cache: introduce flush_dcache_range() Align microblaze with the other architectures and provide an implementation for flush_dcache_range(). Also, remove the microblaze exception in drivers/core/device.c. Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20220531181435.3473549-11-ovpanait@gmail.com Signed-off-by: Michal Simek --- arch/microblaze/cpu/cache.c | 11 +++++++++++ drivers/core/device.c | 5 ----- 2 files changed, 11 insertions(+), 5 deletions(-) diff --git a/arch/microblaze/cpu/cache.c b/arch/microblaze/cpu/cache.c index cd8507901d4..829e6c7ae60 100644 --- a/arch/microblaze/cpu/cache.c +++ b/arch/microblaze/cpu/cache.c @@ -49,6 +49,17 @@ static void __flush_dcache(ulong addr, ulong size) } } +void flush_dcache_range(unsigned long start, unsigned long end) +{ + if (start >= end) { + debug("Invalid dcache range - start: 0x%08lx end: 0x%08lx\n", + start, end); + return; + } + + __flush_dcache(start, end - start); +} + void flush_dcache_all(void) { __flush_dcache(0, gd_cpuinfo()->dcache_size); diff --git a/drivers/core/device.c b/drivers/core/device.c index 3ab2583df38..03155e98673 100644 --- a/drivers/core/device.c +++ b/drivers/core/device.c @@ -328,13 +328,8 @@ static void *alloc_priv(int size, uint flags) * within this range at the start. The driver can then * use normal flush-after-write, invalidate-before-read * procedures. - * - * TODO(sjg@chromium.org): Drop this microblaze - * exception. */ -#ifndef CONFIG_MICROBLAZE flush_dcache_range((ulong)priv, (ulong)priv + size); -#endif } } else { priv = calloc(1, size); -- GitLab From 064057fdbee085dba17f7afc298deb9ffbf3382a Mon Sep 17 00:00:00 2001 From: Ovidiu Panait Date: Tue, 31 May 2022 21:14:33 +0300 Subject: [PATCH 317/581] microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek --- board/xilinx/microblaze-generic/Kconfig | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/board/xilinx/microblaze-generic/Kconfig b/board/xilinx/microblaze-generic/Kconfig index a6743cadf45..90f79cfb945 100644 --- a/board/xilinx/microblaze-generic/Kconfig +++ b/board/xilinx/microblaze-generic/Kconfig @@ -38,6 +38,14 @@ config XILINX_MICROBLAZE0_HW_VER string "Core version number" default "7.10.d" +config XILINX_MICROBLAZE0_FPGA_FAMILY + string "Targeted FPGA family" + default "virtex5" + help + This option contains info about the target FPGA architecture + (Zynq-7000, UltraScale+ Kintex, etc) that the MicroBlaze soft core is + implemented on. It corresponds to the C_FAMILY hdl parameter. + config XILINX_MICROBLAZE0_USR_EXCEP bool "MicroBlaze user exception support" default y -- GitLab From 9df16c5937f68654fb2b67f932319c375f8e4e45 Mon Sep 17 00:00:00 2001 From: Ovidiu Panait Date: Tue, 31 May 2022 21:14:34 +0300 Subject: [PATCH 318/581] microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek --- arch/microblaze/cpu/Makefile | 1 + arch/microblaze/cpu/pvr.c | 41 ++++++++++++++ arch/microblaze/include/asm/pvr.h | 75 +++++++++++++++++++++++++ board/xilinx/microblaze-generic/Kconfig | 8 +++ 4 files changed, 125 insertions(+) create mode 100644 arch/microblaze/cpu/pvr.c create mode 100644 arch/microblaze/include/asm/pvr.h diff --git a/arch/microblaze/cpu/Makefile b/arch/microblaze/cpu/Makefile index 78d7f83597a..ea65a0976ee 100644 --- a/arch/microblaze/cpu/Makefile +++ b/arch/microblaze/cpu/Makefile @@ -7,4 +7,5 @@ extra-y = start.o obj-y = irq.o obj-y += interrupts.o cache.o exception.o timer.o cpuinfo.o obj-$(CONFIG_STATIC_RELA) += relocate.o +obj-$(CONFIG_XILINX_MICROBLAZE0_PVR) += pvr.o obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/arch/microblaze/cpu/pvr.c b/arch/microblaze/cpu/pvr.c new file mode 100644 index 00000000000..23c0f912d43 --- /dev/null +++ b/arch/microblaze/cpu/pvr.c @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022, Ovidiu Panait + */ +#include +#include +#include + +int microblaze_cpu_has_pvr_full(void) +{ + u32 msr, pvr0; + + MFS(msr, rmsr); + if (!(msr & PVR_MSR_BIT)) + return 0; + + get_pvr(0, pvr0); + debug("%s: pvr0 is 0x%08x\n", __func__, pvr0); + + if (!(pvr0 & PVR0_PVR_FULL_MASK)) + return 0; + + return 1; +} + +void microblaze_get_all_pvrs(u32 pvr[PVR_FULL_COUNT]) +{ + get_pvr(0, pvr[0]); + get_pvr(1, pvr[1]); + get_pvr(2, pvr[2]); + get_pvr(3, pvr[3]); + get_pvr(4, pvr[4]); + get_pvr(5, pvr[5]); + get_pvr(6, pvr[6]); + get_pvr(7, pvr[7]); + get_pvr(8, pvr[8]); + get_pvr(9, pvr[9]); + get_pvr(10, pvr[10]); + get_pvr(11, pvr[11]); + get_pvr(12, pvr[12]); +} diff --git a/arch/microblaze/include/asm/pvr.h b/arch/microblaze/include/asm/pvr.h new file mode 100644 index 00000000000..bfe159af794 --- /dev/null +++ b/arch/microblaze/include/asm/pvr.h @@ -0,0 +1,75 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2022, Ovidiu Panait + */ + +#ifndef __ASM_MICROBLAZE_PVR_H +#define __ASM_MICROBLAZE_PVR_H + +#include + +#define PVR_FULL_COUNT 13 /* PVR0 - PVR12 */ + +#define __get_pvr(val, reg) \ + __asm__ __volatile__ ("mfs %0," #reg : "=r" (val) :: "memory") +#define get_pvr(pvrid, val) \ + __get_pvr(val, rpvr ## pvrid) + +#define PVR_MSR_BIT 0x00000400 + +/* PVR0 masks */ +#define PVR0_PVR_FULL_MASK 0x80000000 +#define PVR0_VERSION_MASK 0x0000FF00 + +/* PVR4 masks - ICache configs */ +#define PVR4_ICACHE_LINE_LEN_MASK 0x00E00000 /* ICLL */ +#define PVR4_ICACHE_BYTE_SIZE_MASK 0x001F0000 /* ICBS */ + +/* PVR5 masks - DCache configs */ +#define PVR5_DCACHE_LINE_LEN_MASK 0x00E00000 /* DCLL */ +#define PVR5_DCACHE_BYTE_SIZE_MASK 0x001F0000 /* DCBS */ + +/* PVR10 masks - FPGA family */ +#define PVR10_TARGET_FAMILY_MASK 0xFF000000 + +/* PVR11 masks - MMU */ +#define PVR11_USE_MMU 0xC0000000 + +/* PVR access macros */ +#define PVR_VERSION(pvr) \ + ((pvr[0] & PVR0_VERSION_MASK) >> 8) + +#define PVR_ICACHE_LINE_LEN(pvr) \ + ((1 << ((pvr[4] & PVR4_ICACHE_LINE_LEN_MASK) >> 21)) << 2) +#define PVR_ICACHE_BYTE_SIZE(pvr) \ + (1 << ((pvr[4] & PVR4_ICACHE_BYTE_SIZE_MASK) >> 16)) + +#define PVR_DCACHE_LINE_LEN(pvr) \ + ((1 << ((pvr[5] & PVR5_DCACHE_LINE_LEN_MASK) >> 21)) << 2) +#define PVR_DCACHE_BYTE_SIZE(pvr) \ + (1 << ((pvr[5] & PVR5_DCACHE_BYTE_SIZE_MASK) >> 16)) + +#define PVR_USE_MMU(pvr) \ + ((pvr[11] & PVR11_USE_MMU) >> 30) + +#define PVR_TARGET_FAMILY(pvr) \ + ((pvr[10] & PVR10_TARGET_FAMILY_MASK) >> 24) + +/** + * microblaze_cpu_has_pvr_full() - Check for full PVR support + * + * Check MSR register for PVR support and, if applicable, check the PVR0 + * register for full PVR support. + * + * Return: 1 if there is full PVR support, 0 otherwise. + */ +int microblaze_cpu_has_pvr_full(void); + +/** + * microblaze_get_all_pvrs() - Copy PVR0-PVR12 to destination array + * + * @pvr: destination array of size PVR_FULL_COUNT + */ +void microblaze_get_all_pvrs(u32 pvr[PVR_FULL_COUNT]); + +#endif /* __ASM_MICROBLAZE_PVR_H */ diff --git a/board/xilinx/microblaze-generic/Kconfig b/board/xilinx/microblaze-generic/Kconfig index 90f79cfb945..dd5eacef52a 100644 --- a/board/xilinx/microblaze-generic/Kconfig +++ b/board/xilinx/microblaze-generic/Kconfig @@ -109,4 +109,12 @@ config XILINX_MICROBLAZE0_ICACHE_SIZE the device tree, or when the instruction cache is flushed very early in the boot process, before device tree is available. +config XILINX_MICROBLAZE0_PVR + bool "MicroBlaze PVR support" + help + Enables helper functions and macros needed to manipulate PVR + (Processor Version Register) data. Currently, only the microblaze + UCLASS_CPU driver makes use of this feature to retrieve CPU info at + runtime. + endif -- GitLab From 816226d27efa22d89821dfd0796f763a24c33944 Mon Sep 17 00:00:00 2001 From: Ovidiu Panait Date: Tue, 31 May 2022 21:14:35 +0300 Subject: [PATCH 319/581] cpu: add CPU driver for microblaze Add a basic CPU driver that retrieves information about the microblaze CPU core. cpu_ops handlers are implemented so that the "cpu" command can work properly: U-Boot-mONStR> cpu list 0: cpu@0 MicroBlaze @ 50MHz, Rev: 11.0, FPGA family: zynq7000 U-Boot-mONStR> cpu detail 0: cpu@0 MicroBlaze @ 50MHz, Rev: 11.0, FPGA family: zynq7000 ID = 0, freq = 50 MHz: L1 cache, MMU Note: cpu_ver_lookup[] and family_string_lookup[] arrays were imported from linux. Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20220531181435.3473549-14-ovpanait@gmail.com Signed-off-by: Michal Simek --- arch/microblaze/cpu/cpuinfo.c | 111 ++++++++++++++++ arch/microblaze/include/asm/cpuinfo.h | 79 +++++++++++ drivers/cpu/Kconfig | 9 ++ drivers/cpu/Makefile | 1 + drivers/cpu/microblaze_cpu.c | 180 ++++++++++++++++++++++++++ 5 files changed, 380 insertions(+) create mode 100644 drivers/cpu/microblaze_cpu.c diff --git a/arch/microblaze/cpu/cpuinfo.c b/arch/microblaze/cpu/cpuinfo.c index 3f0b1d2c04a..f021f4e5e25 100644 --- a/arch/microblaze/cpu/cpuinfo.c +++ b/arch/microblaze/cpu/cpuinfo.c @@ -8,6 +8,117 @@ DECLARE_GLOBAL_DATA_PTR; +#if CONFIG_IS_ENABLED(CPU_MICROBLAZE) +/* These key value are as per MBV field in PVR0 */ +static const struct microblaze_version_map cpu_ver_lookup[] = { + {"5.00.a", 0x01}, + {"5.00.b", 0x02}, + {"5.00.c", 0x03}, + {"6.00.a", 0x04}, + {"6.00.b", 0x06}, + {"7.00.a", 0x05}, + {"7.00.b", 0x07}, + {"7.10.a", 0x08}, + {"7.10.b", 0x09}, + {"7.10.c", 0x0a}, + {"7.10.d", 0x0b}, + {"7.20.a", 0x0c}, + {"7.20.b", 0x0d}, + {"7.20.c", 0x0e}, + {"7.20.d", 0x0f}, + {"7.30.a", 0x10}, + {"7.30.b", 0x11}, + {"8.00.a", 0x12}, + {"8.00.b", 0x13}, + {"8.10.a", 0x14}, + {"8.20.a", 0x15}, + {"8.20.b", 0x16}, + {"8.30.a", 0x17}, + {"8.40.a", 0x18}, + {"8.40.b", 0x19}, + {"8.50.a", 0x1a}, + {"8.50.b", 0x1c}, + {"8.50.c", 0x1e}, + {"9.0", 0x1b}, + {"9.1", 0x1d}, + {"9.2", 0x1f}, + {"9.3", 0x20}, + {"9.4", 0x21}, + {"9.5", 0x22}, + {"9.6", 0x23}, + {"10.0", 0x24}, + {"11.0", 0x25}, + {NULL, 0}, +}; + +static const struct microblaze_version_map family_string_lookup[] = { + {"virtex2", 0x4}, + {"virtex2pro", 0x5}, + {"spartan3", 0x6}, + {"virtex4", 0x7}, + {"virtex5", 0x8}, + {"spartan3e", 0x9}, + {"spartan3a", 0xa}, + {"spartan3an", 0xb}, + {"spartan3adsp", 0xc}, + {"spartan6", 0xd}, + {"virtex6", 0xe}, + {"virtex7", 0xf}, + /* FIXME There is no key code defined for spartan2 */ + {"spartan2", 0xf0}, + {"kintex7", 0x10}, + {"artix7", 0x11}, + {"zynq7000", 0x12}, + {"UltraScale Virtex", 0x13}, + {"UltraScale Kintex", 0x14}, + {"UltraScale+ Zynq", 0x15}, + {"UltraScale+ Virtex", 0x16}, + {"UltraScale+ Kintex", 0x17}, + {"Spartan7", 0x18}, + {NULL, 0}, +}; + +static const char *lookup_string(u32 code, + const struct microblaze_version_map *entry) +{ + for (; entry->string; ++entry) + if (entry->code == code) + return entry->string; + + return "(unknown)"; +} + +static const u32 lookup_code(const char *string, + const struct microblaze_version_map *entry) +{ + for (; entry->string; ++entry) + if (!strcmp(entry->string, string)) + return entry->code; + + return 0; +} + +const char *microblaze_lookup_fpga_family_string(const u32 code) +{ + return lookup_string(code, family_string_lookup); +} + +const char *microblaze_lookup_cpu_version_string(const u32 code) +{ + return lookup_string(code, cpu_ver_lookup); +} + +const u32 microblaze_lookup_fpga_family_code(const char *string) +{ + return lookup_code(string, family_string_lookup); +} + +const u32 microblaze_lookup_cpu_version_code(const char *string) +{ + return lookup_code(string, cpu_ver_lookup); +} +#endif /* CONFIG_CPU_MICROBLAZE */ + void microblaze_early_cpuinfo_init(void) { struct microblaze_cpuinfo *ci = gd_cpuinfo(); diff --git a/arch/microblaze/include/asm/cpuinfo.h b/arch/microblaze/include/asm/cpuinfo.h index c27dd40af7c..86d2c8a034d 100644 --- a/arch/microblaze/include/asm/cpuinfo.h +++ b/arch/microblaze/include/asm/cpuinfo.h @@ -13,6 +13,11 @@ * @icache_line_length: Instruction cache line length in bytes. * @dcache_size: Size of data cache memory in bytes. * @dcache_line_length: Data cache line length in bytes. + * @use_mmu: MMU support flag. + * @cpu_freq: Cpu clock frequency in Hz. + * @addr_size: Address bus width in bits. + * @ver_code: Cpu version code. + * @fpga_code: FPGA family version code. */ struct microblaze_cpuinfo { u32 icache_size; @@ -20,8 +25,82 @@ struct microblaze_cpuinfo { u32 dcache_size; u32 dcache_line_length; + +#if CONFIG_IS_ENABLED(CPU_MICROBLAZE) + u32 use_mmu; + u32 cpu_freq; + u32 addr_size; + + u32 ver_code; + u32 fpga_code; +#endif /* CONFIG_CPU_MICROBLAZE */ +}; + +/** + * struct microblaze_version_data - Maps a hex version code to a cpu/fpga name. + */ +struct microblaze_version_map { + const char *string; + const u32 code; }; +/** + * microblaze_lookup_cpu_version_code() - Get hex version code for the + * specified cpu name string. + * + * This function searches the cpu_ver_lookup[] array for the hex version code + * associated with a specific CPU name. The version code is returned if a match + * is found, otherwise 0. + * + * @string: cpu name string + * + * Return: >0 if the entry is found, 0 otherwise. + */ +const u32 microblaze_lookup_cpu_version_code(const char *string); + +/** + * microblaze_lookup_fpga_family_code() - Get hex version code for the + * specified fpga family name. + * + * This function searches the family_string_lookup[] array for the hex version + * code associated with a specific fpga family name. The version code is + * returned if a match is found, otherwise 0. + * + * @string: fpga family name string + * + * Return: >0 if the entry is found, 0 otherwise. + */ +const u32 microblaze_lookup_fpga_family_code(const char *string); + +/** + * microblaze_lookup_cpu_version_string() - Get cpu name for the specified cpu + * version code. + * + * This function searches the cpu_ver_lookup[] array for the cpu name string + * associated with a specific version code. The cpu name is returned if a match + * is found, otherwise "(unknown)". + * + * @code: cpu version code + * + * Return: Pointer to the cpu name if the entry is found, otherwise "(unknown)". + */ +const char *microblaze_lookup_cpu_version_string(const u32 code); + +/** + * microblaze_lookup_fpga_family_string() - Get fpga family name for the + * specified version code. + * + * This function searches the family_string_lookup[] array for the fpga family + * name string associated with a specific version code. The fpga family name is + * returned if a match is found, otherwise "(unknown)". + * + * @code: fpga family version code + * + * Return: Pointer to the fpga family name if the entry is found, otherwise + * "(unknown)". + */ +const char *microblaze_lookup_fpga_family_string(const u32 code); + /** * microblaze_early_cpuinfo_init() - Initialize cpuinfo with default values. * diff --git a/drivers/cpu/Kconfig b/drivers/cpu/Kconfig index 789728167ce..21874335c87 100644 --- a/drivers/cpu/Kconfig +++ b/drivers/cpu/Kconfig @@ -19,3 +19,12 @@ config CPU_RISCV depends on CPU && RISCV help Support CPU cores for RISC-V architecture. + +config CPU_MICROBLAZE + bool "Enable Microblaze CPU driver" + depends on CPU && MICROBLAZE + select EVENT + select DM_EVENT + select XILINX_MICROBLAZE0_PVR + help + Support CPU cores for Microblaze architecture. diff --git a/drivers/cpu/Makefile b/drivers/cpu/Makefile index c8532637ca7..20884b17953 100644 --- a/drivers/cpu/Makefile +++ b/drivers/cpu/Makefile @@ -11,4 +11,5 @@ obj-$(CONFIG_ARCH_IMX8) += imx8_cpu.o obj-$(CONFIG_ARCH_AT91) += at91_cpu.o obj-$(CONFIG_CPU_MPC83XX) += mpc83xx_cpu.o obj-$(CONFIG_CPU_RISCV) += riscv_cpu.o +obj-$(CONFIG_CPU_MICROBLAZE) += microblaze_cpu.o obj-$(CONFIG_SANDBOX) += cpu_sandbox.o diff --git a/drivers/cpu/microblaze_cpu.c b/drivers/cpu/microblaze_cpu.c new file mode 100644 index 00000000000..969a1047e59 --- /dev/null +++ b/drivers/cpu/microblaze_cpu.c @@ -0,0 +1,180 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022, Ovidiu Panait + */ +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define update_cpuinfo_pvr(pvr, ci, name) \ +{ \ + u32 tmp = PVR_##name(pvr); \ + if (ci != tmp) \ + printf("PVR value for " #name " does not match static data!\n");\ + ci = tmp; \ +} + +static int microblaze_cpu_probe_all(void *ctx, struct event *event) +{ + int ret; + + ret = cpu_probe_all(); + if (ret) + return log_msg_ret("Microblaze cpus probe failed\n", ret); + + return 0; +} +EVENT_SPY(EVT_DM_POST_INIT, microblaze_cpu_probe_all); + +static void microblaze_set_cpuinfo_pvr(struct microblaze_cpuinfo *ci) +{ + u32 pvr[PVR_FULL_COUNT]; + + microblaze_get_all_pvrs(pvr); + + update_cpuinfo_pvr(pvr, ci->icache_size, ICACHE_BYTE_SIZE); + update_cpuinfo_pvr(pvr, ci->icache_line_length, ICACHE_LINE_LEN); + + update_cpuinfo_pvr(pvr, ci->dcache_size, DCACHE_BYTE_SIZE); + update_cpuinfo_pvr(pvr, ci->dcache_line_length, DCACHE_LINE_LEN); + + update_cpuinfo_pvr(pvr, ci->use_mmu, USE_MMU); + update_cpuinfo_pvr(pvr, ci->ver_code, VERSION); + update_cpuinfo_pvr(pvr, ci->fpga_code, TARGET_FAMILY); +} + +static void microblaze_set_cpuinfo_static(struct udevice *dev, + struct microblaze_cpuinfo *ci) +{ + const char *hw_ver = CONFIG_XILINX_MICROBLAZE0_HW_VER; + const char *fpga_family = CONFIG_XILINX_MICROBLAZE0_FPGA_FAMILY; + + ci->icache_size = dev_read_u32_default(dev, "i-cache-size", 0); + ci->icache_line_length = dev_read_u32_default(dev, + "i-cache-line-size", 0); + + ci->dcache_size = dev_read_u32_default(dev, "d-cache-size", 0); + ci->dcache_line_length = dev_read_u32_default(dev, + "d-cache-line-size", 0); + + ci->cpu_freq = dev_read_u32_default(dev, "clock-frequency", 0); + ci->addr_size = dev_read_u32_default(dev, "xlnx,addr-size", 32); + ci->use_mmu = dev_read_u32_default(dev, "xlnx,use-mmu", 0); + + ci->ver_code = microblaze_lookup_cpu_version_code(hw_ver); + ci->fpga_code = microblaze_lookup_fpga_family_code(fpga_family); +} + +static int microblaze_cpu_probe(struct udevice *dev) +{ + microblaze_set_cpuinfo_static(dev, gd_cpuinfo()); + + if (microblaze_cpu_has_pvr_full()) + microblaze_set_cpuinfo_pvr(gd_cpuinfo()); + else + debug("No PVR support. Using only static CPU info.\n"); + + return 0; +} + +static int microblaze_cpu_get_desc(const struct udevice *dev, char *buf, + int size) +{ + struct microblaze_cpuinfo *ci = gd_cpuinfo(); + const char *cpu_ver, *fpga_family; + u32 cpu_freq_mhz; + int ret; + + cpu_freq_mhz = ci->cpu_freq / 1000000; + cpu_ver = microblaze_lookup_cpu_version_string(ci->ver_code); + fpga_family = microblaze_lookup_fpga_family_string(ci->fpga_code); + + ret = snprintf(buf, size, + "MicroBlaze @ %uMHz, Rev: %s, FPGA family: %s", + cpu_freq_mhz, cpu_ver, fpga_family); + + return 0; +} + +static int microblaze_cpu_get_info(const struct udevice *dev, + struct cpu_info *info) +{ + struct microblaze_cpuinfo *ci = gd_cpuinfo(); + + info->cpu_freq = ci->cpu_freq; + info->address_width = ci->addr_size; + + if (ci->icache_size || ci->dcache_size) + info->features |= BIT(CPU_FEAT_L1_CACHE); + + if (ci->use_mmu) + info->features |= BIT(CPU_FEAT_MMU); + + return 0; +} + +static int microblaze_cpu_get_count(const struct udevice *dev) +{ + return 1; +} + +static const struct cpu_ops microblaze_cpu_ops = { + .get_desc = microblaze_cpu_get_desc, + .get_info = microblaze_cpu_get_info, + .get_count = microblaze_cpu_get_count, +}; + +static const struct udevice_id microblaze_cpu_ids[] = { + { .compatible = "xlnx,microblaze-11.0" }, + { .compatible = "xlnx,microblaze-10.0" }, + { .compatible = "xlnx,microblaze-9.6" }, + { .compatible = "xlnx,microblaze-9.5" }, + { .compatible = "xlnx,microblaze-9.4" }, + { .compatible = "xlnx,microblaze-9.3" }, + { .compatible = "xlnx,microblaze-9.2" }, + { .compatible = "xlnx,microblaze-9.1" }, + { .compatible = "xlnx,microblaze-9.0" }, + { .compatible = "xlnx,microblaze-8.50.c" }, + { .compatible = "xlnx,microblaze-8.50.b" }, + { .compatible = "xlnx,microblaze-8.50.a" }, + { .compatible = "xlnx,microblaze-8.40.b" }, + { .compatible = "xlnx,microblaze-8.40.a" }, + { .compatible = "xlnx,microblaze-8.30.a" }, + { .compatible = "xlnx,microblaze-8.20.b" }, + { .compatible = "xlnx,microblaze-8.20.a" }, + { .compatible = "xlnx,microblaze-8.10.a" }, + { .compatible = "xlnx,microblaze-8.00.b" }, + { .compatible = "xlnx,microblaze-8.00.a" }, + { .compatible = "xlnx,microblaze-7.30.b" }, + { .compatible = "xlnx,microblaze-7.30.a" }, + { .compatible = "xlnx,microblaze-7.20.d" }, + { .compatible = "xlnx,microblaze-7.20.c" }, + { .compatible = "xlnx,microblaze-7.20.b" }, + { .compatible = "xlnx,microblaze-7.20.a" }, + { .compatible = "xlnx,microblaze-7.10.d" }, + { .compatible = "xlnx,microblaze-7.10.c" }, + { .compatible = "xlnx,microblaze-7.10.b" }, + { .compatible = "xlnx,microblaze-7.10.a" }, + { .compatible = "xlnx,microblaze-7.00.b" }, + { .compatible = "xlnx,microblaze-7.00.a" }, + { .compatible = "xlnx,microblaze-6.00.b" }, + { .compatible = "xlnx,microblaze-6.00.a" }, + { .compatible = "xlnx,microblaze-5.00.c" }, + { .compatible = "xlnx,microblaze-5.00.b" }, + { .compatible = "xlnx,microblaze-5.00.a" }, + { } +}; + +U_BOOT_DRIVER(microblaze_cpu) = { + .name = "microblaze_cpu", + .id = UCLASS_CPU, + .of_match = microblaze_cpu_ids, + .probe = microblaze_cpu_probe, + .ops = µblaze_cpu_ops, + .flags = DM_FLAG_PRE_RELOC, +}; -- GitLab From a36d86720f23a6dd503073a82905002b88c8e363 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 24 Jun 2022 14:16:32 +0200 Subject: [PATCH 320/581] microblaze: Convert axi timer to DM driver Move axi timer driver from Microblaze to generic location. Origin implementation was irq based with counting down timer. CONFIG_TIMER drivers are designed differently that timer is free running up timer with automatic reload without any interrupt. Information about clock rates are find out in timer_pre_probe() that's why there is no need to get any additional information from DT in the driver itself (only register offset). Signed-off-by: Michal Simek Tested-by: Ovidiu Panait Link: https://lore.kernel.org/r/6c12fc86bbc1f17d05c25018862e7b7b03346b36.1654684731.git.michal.simek@amd.com --- MAINTAINERS | 1 + arch/Kconfig | 5 + arch/microblaze/cpu/Makefile | 2 +- arch/microblaze/cpu/timer.c | 123 ------------------ .../microblaze/include/asm/microblaze_timer.h | 26 ---- drivers/timer/Kconfig | 8 ++ drivers/timer/Makefile | 1 + drivers/timer/xilinx-timer.c | 82 ++++++++++++ 8 files changed, 98 insertions(+), 150 deletions(-) delete mode 100644 arch/microblaze/cpu/timer.c delete mode 100644 arch/microblaze/include/asm/microblaze_timer.h create mode 100644 drivers/timer/xilinx-timer.c diff --git a/MAINTAINERS b/MAINTAINERS index 28e4d382386..a18762573d9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -975,6 +975,7 @@ F: drivers/net/xilinx_emaclite.c F: drivers/serial/serial_xuartlite.c F: drivers/spi/xilinx_spi.c F: drivers/sysreset/sysreset_gpio.c +F: drivers/timer/xilinx-timer.c F: drivers/watchdog/xilinx_tb_wdt.c N: xilinx diff --git a/arch/Kconfig b/arch/Kconfig index d91475d2474..3d02d8e71af 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -75,6 +75,11 @@ config MICROBLAZE bool "MicroBlaze architecture" select SUPPORT_OF_CONTROL imply CMD_IRQ + imply CMD_TIMER + imply SPL_REGMAP if SPL + imply SPL_TIMER if SPL + imply TIMER + imply XILINX_TIMER config MIPS bool "MIPS architecture" diff --git a/arch/microblaze/cpu/Makefile b/arch/microblaze/cpu/Makefile index ea65a0976ee..1c586a7de02 100644 --- a/arch/microblaze/cpu/Makefile +++ b/arch/microblaze/cpu/Makefile @@ -5,7 +5,7 @@ extra-y = start.o obj-y = irq.o -obj-y += interrupts.o cache.o exception.o timer.o cpuinfo.o +obj-y += interrupts.o cache.o exception.o cpuinfo.o obj-$(CONFIG_STATIC_RELA) += relocate.o obj-$(CONFIG_XILINX_MICROBLAZE0_PVR) += pvr.o obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/arch/microblaze/cpu/timer.c b/arch/microblaze/cpu/timer.c deleted file mode 100644 index 647bdcd5ba5..00000000000 --- a/arch/microblaze/cpu/timer.c +++ /dev/null @@ -1,123 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2007 Michal Simek - * - * Michal SIMEK - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -volatile int timestamp = 0; -microblaze_timer_t *tmr; - -ulong get_timer (ulong base) -{ - if (tmr) - return timestamp - base; - return timestamp++ - base; -} - -void __udelay(unsigned long usec) -{ - u32 i; - - if (tmr) { - i = get_timer(0); - while ((get_timer(0) - i) < (usec / 1000)) - ; - } -} - -#ifndef CONFIG_SPL_BUILD -static void timer_isr(void *arg) -{ - timestamp++; - tmr->control = tmr->control | TIMER_INTERRUPT; -} - -int timer_init (void) -{ - int irq = -1; - u32 preload = 0; - u32 ret = 0; - const void *blob = gd->fdt_blob; - int node = 0; - u32 cell[2]; - - debug("TIMER: Initialization\n"); - - /* Do not init before relocation */ - if (!(gd->flags & GD_FLG_RELOC)) - return 0; - - node = fdt_node_offset_by_compatible(blob, node, - "xlnx,xps-timer-1.00.a"); - if (node != -1) { - fdt_addr_t base = fdtdec_get_addr(blob, node, "reg"); - if (base == FDT_ADDR_T_NONE) - return -1; - - debug("TIMER: Base addr %lx\n", base); - tmr = (microblaze_timer_t *)base; - - ret = fdtdec_get_int_array(blob, node, "interrupts", - cell, ARRAY_SIZE(cell)); - if (ret) - return ret; - - irq = cell[0]; - debug("TIMER: IRQ %x\n", irq); - - preload = fdtdec_get_int(blob, node, "clock-frequency", 0); - preload /= CONFIG_SYS_HZ; - } else { - return node; - } - - if (tmr && preload && irq >= 0) { - tmr->loadreg = preload; - tmr->control = TIMER_INTERRUPT | TIMER_RESET; - tmr->control = TIMER_ENABLE | TIMER_ENABLE_INTR |\ - TIMER_RELOAD | TIMER_DOWN_COUNT; - timestamp = 0; - ret = install_interrupt_handler (irq, timer_isr, (void *)tmr); - if (ret) - tmr = NULL; - } - /* No problem if timer is not found/initialized */ - return 0; -} -#else -int timer_init(void) -{ - return 0; -} -#endif - -/* - * This function is derived from PowerPC code (read timebase as long long). - * On Microblaze it just returns the timer value. - */ -unsigned long long get_ticks(void) -{ - return get_timer(0); -} - -/* - * This function is derived from PowerPC code (timebase clock frequency). - * On Microblaze it returns the number of timer ticks per second. - */ -ulong get_tbclk(void) -{ - return CONFIG_SYS_HZ; -} diff --git a/arch/microblaze/include/asm/microblaze_timer.h b/arch/microblaze/include/asm/microblaze_timer.h deleted file mode 100644 index 2ed1651ffcf..00000000000 --- a/arch/microblaze/include/asm/microblaze_timer.h +++ /dev/null @@ -1,26 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2007 Michal Simek - * - * Michal SIMEK - */ - -#define TIMER_ENABLE_ALL 0x400 /* ENALL */ -#define TIMER_PWM 0x200 /* PWMA0 */ -#define TIMER_INTERRUPT 0x100 /* T0INT */ -#define TIMER_ENABLE 0x080 /* ENT0 */ -#define TIMER_ENABLE_INTR 0x040 /* ENIT0 */ -#define TIMER_RESET 0x020 /* LOAD0 */ -#define TIMER_RELOAD 0x010 /* ARHT0 */ -#define TIMER_EXT_CAPTURE 0x008 /* CAPT0 */ -#define TIMER_EXT_COMPARE 0x004 /* GENT0 */ -#define TIMER_DOWN_COUNT 0x002 /* UDT0 */ -#define TIMER_CAPTURE_MODE 0x001 /* MDT0 */ - -typedef volatile struct microblaze_timer_t { - int control; /* control/statuc register TCSR */ - int loadreg; /* load register TLR */ - int counter; /* timer/counter register */ -} microblaze_timer_t; - -int timer_init(void); diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig index 7b8ab56ed32..44d1a81bad3 100644 --- a/drivers/timer/Kconfig +++ b/drivers/timer/Kconfig @@ -272,4 +272,12 @@ config IMX_GPT_TIMER Select this to enable support for the timer found on NXP i.MX devices. +config XILINX_TIMER + bool "Xilinx timer support" + depends on TIMER + select REGMAP + help + Select this to enable support for the timer found on + any Xilinx boards (axi timer). + endmenu diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile index b2f002d5978..4d06375317e 100644 --- a/drivers/timer/Makefile +++ b/drivers/timer/Makefile @@ -27,3 +27,4 @@ obj-$(CONFIG_X86_TSC_TIMER) += tsc_timer.o obj-$(CONFIG_MTK_TIMER) += mtk_timer.o obj-$(CONFIG_MCHP_PIT64B_TIMER) += mchp-pit64b-timer.o obj-$(CONFIG_IMX_GPT_TIMER) += imx-gpt-timer.o +obj-$(CONFIG_XILINX_TIMER) += xilinx-timer.o diff --git a/drivers/timer/xilinx-timer.c b/drivers/timer/xilinx-timer.c new file mode 100644 index 00000000000..75b4473b639 --- /dev/null +++ b/drivers/timer/xilinx-timer.c @@ -0,0 +1,82 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2022 Advanced Micro Devices, Inc + * Michal Simek + * + * (C) Copyright 2007 Michal Simek + * Michal SIMEK + */ + +#include +#include +#include +#include +#include + +#define TIMER_ENABLE_ALL 0x400 /* ENALL */ +#define TIMER_PWM 0x200 /* PWMA0 */ +#define TIMER_INTERRUPT 0x100 /* T0INT */ +#define TIMER_ENABLE 0x080 /* ENT0 */ +#define TIMER_ENABLE_INTR 0x040 /* ENIT0 */ +#define TIMER_RESET 0x020 /* LOAD0 */ +#define TIMER_RELOAD 0x010 /* ARHT0 */ +#define TIMER_EXT_CAPTURE 0x008 /* CAPT0 */ +#define TIMER_EXT_COMPARE 0x004 /* GENT0 */ +#define TIMER_DOWN_COUNT 0x002 /* UDT0 */ +#define TIMER_CAPTURE_MODE 0x001 /* MDT0 */ + +#define TIMER_CONTROL_OFFSET 0 +#define TIMER_LOADREG_OFFSET 4 +#define TIMER_COUNTER_OFFSET 8 + +struct xilinx_timer_priv { + struct regmap *regs; +}; + +static u64 xilinx_timer_get_count(struct udevice *dev) +{ + struct xilinx_timer_priv *priv = dev_get_priv(dev); + u32 value; + + regmap_read(priv->regs, TIMER_COUNTER_OFFSET, &value); + + return value; +} + +static int xilinx_timer_probe(struct udevice *dev) +{ + struct xilinx_timer_priv *priv = dev_get_priv(dev); + int ret; + + /* uc_priv->clock_rate has already clock rate */ + ret = regmap_init_mem(dev_ofnode(dev), &priv->regs); + if (ret) { + dev_dbg(dev, "failed to get regbase of timer\n"); + return ret; + } + + regmap_write(priv->regs, TIMER_LOADREG_OFFSET, 0); + regmap_write(priv->regs, TIMER_CONTROL_OFFSET, TIMER_RESET); + regmap_write(priv->regs, TIMER_CONTROL_OFFSET, + TIMER_ENABLE | TIMER_RELOAD); + + return 0; +} + +static const struct timer_ops xilinx_timer_ops = { + .get_count = xilinx_timer_get_count, +}; + +static const struct udevice_id xilinx_timer_ids[] = { + { .compatible = "xlnx,xps-timer-1.00.a" }, + {} +}; + +U_BOOT_DRIVER(xilinx_timer) = { + .name = "xilinx_timer", + .id = UCLASS_TIMER, + .of_match = xilinx_timer_ids, + .priv_auto = sizeof(struct xilinx_timer_priv), + .probe = xilinx_timer_probe, + .ops = &xilinx_timer_ops, +}; -- GitLab From aec051d813906f2a52b840d0d12a0764370aba1a Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 24 Jun 2022 14:16:32 +0200 Subject: [PATCH 321/581] microblaze: Remove interrupt handler The primary purpose for this code was timer. By converting it to CONFIG_TIMER there is no code which uses this implementation that's why remove it. If there is a need to handle interrupts this patch can be reverted in future. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/5f2decc5a30a5678490ebde26d8c6f5a5f873cda.1654684731.git.michal.simek@amd.com --- arch/Kconfig | 1 - arch/microblaze/cpu/interrupts.c | 182 +----------------- arch/microblaze/include/asm/microblaze_intc.h | 37 ---- 3 files changed, 1 insertion(+), 219 deletions(-) delete mode 100644 arch/microblaze/include/asm/microblaze_intc.h diff --git a/arch/Kconfig b/arch/Kconfig index 3d02d8e71af..a8d0123b810 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -74,7 +74,6 @@ config M68K config MICROBLAZE bool "MicroBlaze architecture" select SUPPORT_OF_CONTROL - imply CMD_IRQ imply CMD_TIMER imply SPL_REGMAP if SPL imply SPL_TIMER if SPL diff --git a/arch/microblaze/cpu/interrupts.c b/arch/microblaze/cpu/interrupts.c index fe65f3728fd..ac53208bda6 100644 --- a/arch/microblaze/cpu/interrupts.c +++ b/arch/microblaze/cpu/interrupts.c @@ -8,17 +8,8 @@ */ #include -#include -#include -#include -#include -#include -#include -#include #include -DECLARE_GLOBAL_DATA_PTR; - void enable_interrupts(void) { debug("Enable interrupts for the whole CPU\n"); @@ -34,183 +25,12 @@ int disable_interrupts(void) return (msr & 0x2) != 0; } -static struct irq_action *vecs; -static u32 irq_no; - -/* mapping structure to interrupt controller */ -microblaze_intc_t *intc; - -/* default handler */ -static void def_hdlr(void) -{ - puts("def_hdlr\n"); -} - -static void enable_one_interrupt(int irq) -{ - int mask; - int offset = 1; - - offset <<= irq; - mask = intc->ier; - intc->ier = (mask | offset); - - debug("Enable one interrupt irq %x - mask %x,ier %x\n", offset, mask, - intc->ier); - debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, - intc->iar, intc->mer); -} - -static void disable_one_interrupt(int irq) -{ - int mask; - int offset = 1; - - offset <<= irq; - mask = intc->ier; - intc->ier = (mask & ~offset); - - debug("Disable one interrupt irq %x - mask %x,ier %x\n", irq, mask, - intc->ier); - debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, - intc->iar, intc->mer); -} - -int install_interrupt_handler(int irq, interrupt_handler_t *hdlr, void *arg) -{ - struct irq_action *act; - - /* irq out of range */ - if ((irq < 0) || (irq > irq_no)) { - puts("IRQ out of range\n"); - return -1; - } - act = &vecs[irq]; - if (hdlr) { /* enable */ - act->handler = hdlr; - act->arg = arg; - act->count = 0; - enable_one_interrupt(irq); - return 0; - } - - /* Disable */ - act->handler = (interrupt_handler_t *)def_hdlr; - act->arg = (void *)irq; - disable_one_interrupt(irq); - return 1; -} - -/* initialization interrupt controller - hardware */ -static void intc_init(void) -{ - intc->mer = 0; - intc->ier = 0; - intc->iar = 0xFFFFFFFF; - /* XIntc_Start - hw_interrupt enable and all interrupt enable */ - intc->mer = 0x3; - - debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, - intc->iar, intc->mer); -} - int interrupt_init(void) { - int i; - const void *blob = gd->fdt_blob; - int node = 0; - - debug("INTC: Initialization\n"); - - node = fdt_node_offset_by_compatible(blob, node, - "xlnx,xps-intc-1.00.a"); - if (node != -1) { - fdt_addr_t base = fdtdec_get_addr(blob, node, "reg"); - if (base == FDT_ADDR_T_NONE) - return -1; - - debug("INTC: Base addr %lx\n", base); - intc = (microblaze_intc_t *)base; - irq_no = fdtdec_get_int(blob, node, "xlnx,num-intr-inputs", 0); - debug("INTC: IRQ NO %x\n", irq_no); - } else { - return node; - } - - if (irq_no) { - vecs = calloc(1, sizeof(struct irq_action) * irq_no); - if (vecs == NULL) { - puts("Interrupt vector allocation failed\n"); - return -1; - } - - /* initialize irq list */ - for (i = 0; i < irq_no; i++) { - vecs[i].handler = (interrupt_handler_t *)def_hdlr; - vecs[i].arg = (void *)i; - vecs[i].count = 0; - } - /* initialize intc controller */ - intc_init(); - enable_interrupts(); - } else { - puts("Undefined interrupt controller\n"); - } return 0; } void interrupt_handler(void) { - int irqs = intc->ivr; /* find active interrupt */ - int mask = 1; - int value; - struct irq_action *act = vecs + irqs; - - debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, - intc->iar, intc->mer); -#ifdef DEBUG - R14(value); -#endif - debug("Interrupt handler on %x line, r14 %x\n", irqs, value); - - debug("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n", - (u32)act->handler, act->count, (u32)act->arg); - act->handler(act->arg); - act->count++; - - intc->iar = mask << irqs; - - debug("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr, - intc->ier, intc->iar, intc->mer); -#ifdef DEBUG - R14(value); -#endif - debug("Interrupt handler on %x line, r14 %x\n", irqs, value); -} - -#if defined(CONFIG_CMD_IRQ) -int do_irqinfo(struct cmd_tbl *cmdtp, int flag, int argc, const char *argv[]) -{ - int i; - struct irq_action *act = vecs; - - if (irq_no) { - puts("\nInterrupt-Information:\n\n" - "Nr Routine Arg Count\n" - "-----------------------------\n"); - - for (i = 0; i < irq_no; i++) { - if (act->handler != (interrupt_handler_t *)def_hdlr) { - printf("%02d %08x %08x %d\n", i, - (int)act->handler, (int)act->arg, - act->count); - } - act++; - } - puts("\n"); - } else { - puts("Undefined interrupt controller\n"); - } - return 0; + panic("Interrupt occurred\n"); } -#endif diff --git a/arch/microblaze/include/asm/microblaze_intc.h b/arch/microblaze/include/asm/microblaze_intc.h deleted file mode 100644 index a7e8715851e..00000000000 --- a/arch/microblaze/include/asm/microblaze_intc.h +++ /dev/null @@ -1,37 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2007 Michal Simek - * - * Michal SIMEK - */ - -#include - -typedef volatile struct microblaze_intc_t { - int isr; /* interrupt status register */ - int ipr; /* interrupt pending register */ - int ier; /* interrupt enable register */ - int iar; /* interrupt acknowledge register */ - int sie; /* set interrupt enable bits */ - int cie; /* clear interrupt enable bits */ - int ivr; /* interrupt vector register */ - int mer; /* master enable register */ -} microblaze_intc_t; - -struct irq_action { - interrupt_handler_t *handler; /* pointer to interrupt rutine */ - void *arg; - int count; /* number of interrupt */ -}; - -/** - * Register and unregister interrupt handler rutines - * - * @param irq IRQ number - * @param hdlr Interrupt handler rutine - * @param arg Pointer to argument which is passed to int. handler rutine - * Return: 0 if registration pass, 1 if unregistration pass, - * or an error code < 0 otherwise - */ -int install_interrupt_handler(int irq, interrupt_handler_t *hdlr, - void *arg); -- GitLab From b8745e7eb4888ec6dd7495aad7948a92d141669a Mon Sep 17 00:00:00 2001 From: Ashok Reddy Soma Date: Wed, 15 Jun 2022 12:16:13 +0200 Subject: [PATCH 322/581] arm64: zynqmp: Fix usb node drive strength and slew rate As per design, all input/rx pins should have fast slew rate and 12mA drive strength. Rest all pins should be slow slew rate and 4mA drive strength. Fix usb nodes as per this and remove setting of slow slew rate for all the usb gorup pins. Signed-off-by: Ashok Reddy Soma Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/b245c165f05845c1f3ab41a92c82b7ec1538cee4.1655288171.git.michal.simek@amd.com --- arch/arm/dts/zynqmp-sck-kr-g-revA.dts | 10 ++++++++-- arch/arm/dts/zynqmp-sck-kr-g-revB.dts | 10 ++++++++-- arch/arm/dts/zynqmp-sck-kv-g-revA.dts | 5 ++++- arch/arm/dts/zynqmp-sck-kv-g-revB.dts | 5 ++++- arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 5 ++++- arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 5 ++++- arch/arm/dts/zynqmp-zcu100-revC.dts | 10 ++++++++-- arch/arm/dts/zynqmp-zcu102-revA.dts | 5 ++++- arch/arm/dts/zynqmp-zcu104-revA.dts | 6 ++++-- arch/arm/dts/zynqmp-zcu104-revC.dts | 6 ++++-- arch/arm/dts/zynqmp-zcu106-revA.dts | 5 ++++- arch/arm/dts/zynqmp-zcu111-revA.dts | 5 ++++- 12 files changed, 60 insertions(+), 17 deletions(-) diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts index 7be02ab29fa..735c1e3d1a8 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts +++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts @@ -329,19 +329,22 @@ pinctrl_usb0_default: usb0-default { conf { groups = "usb0_0_grp"; - slew-rate = ; power-source = ; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = ; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = ; }; mux { @@ -353,19 +356,22 @@ pinctrl_usb1_default: usb1-default { conf { groups = "usb1_0_grp"; - slew-rate = ; power-source = ; }; conf-rx { pins = "MIO64", "MIO65", "MIO67"; bias-high-impedance; + drive-strength = <12>; + slew-rate = ; }; conf-tx { pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", "MIO75"; bias-disable; + drive-strength = <4>; + slew-rate = ; }; mux { diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts index 56effb5e21a..63590619d43 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts +++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts @@ -329,19 +329,22 @@ pinctrl_usb0_default: usb0-default { conf { groups = "usb0_0_grp"; - slew-rate = ; power-source = ; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = ; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = ; }; mux { @@ -353,19 +356,22 @@ pinctrl_usb1_default: usb1-default { conf { groups = "usb1_0_grp"; - slew-rate = ; power-source = ; }; conf-rx { pins = "MIO64", "MIO65", "MIO67"; bias-high-impedance; + drive-strength = <12>; + slew-rate = ; }; conf-tx { pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", "MIO75"; bias-disable; + drive-strength = <4>; + slew-rate = ; }; mux { diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts index 8250a493c8a..b714bd3eb1b 100644 --- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts +++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts @@ -285,19 +285,22 @@ pinctrl_usb0_default: usb0-default { conf { groups = "usb0_0_grp"; - slew-rate = ; power-source = ; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = ; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = ; }; mux { diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts index b81c2e6b754..a1d8f9f0e51 100644 --- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts +++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts @@ -272,19 +272,22 @@ pinctrl_usb0_default: usb0-default { conf { groups = "usb0_0_grp"; - slew-rate = ; power-source = ; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = ; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = ; }; mux { diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts index d20f6675687..7ea2a1c96f4 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts @@ -187,19 +187,22 @@ conf { groups = "usb0_0_grp"; - slew-rate = ; power-source = ; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = ; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = ; }; }; diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts index f32f87acacb..4e6160bcd8b 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts @@ -335,19 +335,22 @@ conf { groups = "usb1_0_grp"; - slew-rate = ; power-source = ; }; conf-rx { pins = "MIO64", "MIO65", "MIO67"; bias-high-impedance; + drive-strength = <12>; + slew-rate = ; }; conf-tx { pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", "MIO75"; bias-disable; + drive-strength = <4>; + slew-rate = ; }; }; diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts index ea630a43dc7..5e7bc7384fc 100644 --- a/arch/arm/dts/zynqmp-zcu100-revC.dts +++ b/arch/arm/dts/zynqmp-zcu100-revC.dts @@ -441,19 +441,22 @@ conf { groups = "usb0_0_grp"; - slew-rate = ; power-source = ; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = ; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = ; }; }; @@ -465,19 +468,22 @@ conf { groups = "usb1_0_grp"; - slew-rate = ; power-source = ; }; conf-rx { pins = "MIO64", "MIO65", "MIO67"; bias-high-impedance; + drive-strength = <12>; + slew-rate = ; }; conf-tx { pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", "MIO75"; bias-disable; + drive-strength = <4>; + slew-rate = ; }; }; }; diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index c13b52a6aea..a4e92c8bb16 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -795,19 +795,22 @@ conf { groups = "usb0_0_grp"; - slew-rate = ; power-source = ; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = ; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = ; }; }; diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts b/arch/arm/dts/zynqmp-zcu104-revA.dts index 50bf4790891..1418cffb204 100644 --- a/arch/arm/dts/zynqmp-zcu104-revA.dts +++ b/arch/arm/dts/zynqmp-zcu104-revA.dts @@ -402,20 +402,22 @@ conf { groups = "usb0_0_grp"; - slew-rate = ; power-source = ; - drive-strength = <12>; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = ; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = ; }; }; }; diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts index 752a9e38f3d..7fd19ca3a8c 100644 --- a/arch/arm/dts/zynqmp-zcu104-revC.dts +++ b/arch/arm/dts/zynqmp-zcu104-revC.dts @@ -414,20 +414,22 @@ conf { groups = "usb0_0_grp"; - slew-rate = ; power-source = ; - drive-strength = <12>; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = ; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = ; }; }; }; diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts index 6dfc8fe17bf..3e137676feb 100644 --- a/arch/arm/dts/zynqmp-zcu106-revA.dts +++ b/arch/arm/dts/zynqmp-zcu106-revA.dts @@ -793,19 +793,22 @@ conf { groups = "usb0_0_grp"; - slew-rate = ; power-source = ; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = ; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = ; }; }; diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts index 021fe88670f..e412992ff1b 100644 --- a/arch/arm/dts/zynqmp-zcu111-revA.dts +++ b/arch/arm/dts/zynqmp-zcu111-revA.dts @@ -652,19 +652,22 @@ conf { groups = "usb0_0_grp"; - slew-rate = ; power-source = ; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = ; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = ; }; }; -- GitLab From a13e0821da4abfd0d0cff853469ab8a195c5129f Mon Sep 17 00:00:00 2001 From: Amit Kumar Mahapatra Date: Wed, 15 Jun 2022 12:22:41 +0200 Subject: [PATCH 323/581] ARM: zynq: Fix size-cells for pl353 driver "size-cells" of the nand controller node should be 0 as the "reg" property of the nand device node contains the chip select number and not address information. The patch fixes the below compilation warning arch/arm/dts/zynq-zc770-xm011.dtb: Warning (reg_format): /axi/memory-controller@e000e000/nand-controller@0,0/nand@0:reg: property has invalid length (4 bytes) (#address-cells == 1, #size-cells == 1) Signed-off-by: Amit Kumar Mahapatra Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/6e90665a2dad7fe8ade10b8f57101f8144963791.1655288559.git.michal.simek@amd.com --- arch/arm/dts/zynq-7000.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi index 9495911397e..37155df0fd4 100644 --- a/arch/arm/dts/zynq-7000.dtsi +++ b/arch/arm/dts/zynq-7000.dtsi @@ -287,7 +287,7 @@ reg = <0 0 0x1000000>; status = "disabled"; #address-cells = <1>; - #size-cells = <1>; + #size-cells = <0>; }; nor0: flash@1,0 { status = "disabled"; -- GitLab From fe7090c7020694a7adcbfcac3bd7b5c3babea5be Mon Sep 17 00:00:00 2001 From: Stefan Herbrechtsmeier Date: Mon, 20 Jun 2022 18:36:36 +0200 Subject: [PATCH 324/581] firmware: zynqmp: Check if rx channel dev pointer is valid Check if rx channel dev pointer is valid and not if the address of the pointer is valid. Signed-off-by: Stefan Herbrechtsmeier Link: https://lore.kernel.org/r/20220620163650.18756-1-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek --- drivers/firmware/firmware-zynqmp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/firmware/firmware-zynqmp.c b/drivers/firmware/firmware-zynqmp.c index 0f0d2b07c00..341d7cf1358 100644 --- a/drivers/firmware/firmware-zynqmp.c +++ b/drivers/firmware/firmware-zynqmp.c @@ -92,7 +92,7 @@ static int ipi_req(const u32 *req, size_t req_len, u32 *res, size_t res_maxlen) res_maxlen > PMUFW_PAYLOAD_ARG_CNT) return -EINVAL; - if (!(zynqmp_power.tx_chan.dev) || !(&zynqmp_power.rx_chan.dev)) + if (!(zynqmp_power.tx_chan.dev) || !(zynqmp_power.rx_chan.dev)) return -EINVAL; debug("%s, Sending IPI message with ID: 0x%0x\n", __func__, req[0]); -- GitLab From f851be15f44af23ebd1e6623fdc3b6eb46d90ae4 Mon Sep 17 00:00:00 2001 From: Stefan Herbrechtsmeier Date: Mon, 20 Jun 2022 18:36:37 +0200 Subject: [PATCH 325/581] firmware: zynqmp: Probe driver before use Probe the driver before use to ensure that the driver is always available and the global data are valid. Initialize the global data with zero and probe the driver if the global data are still zero. This allows a usage of the firmware functions from other drivers with arbitrary order between the drivers. Signed-off-by: Stefan Herbrechtsmeier Link: https://lore.kernel.org/r/20220620163650.18756-2-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek --- drivers/firmware/firmware-zynqmp.c | 23 ++++++++++++++++++++--- 1 file changed, 20 insertions(+), 3 deletions(-) diff --git a/drivers/firmware/firmware-zynqmp.c b/drivers/firmware/firmware-zynqmp.c index 341d7cf1358..b0cd647aa51 100644 --- a/drivers/firmware/firmware-zynqmp.c +++ b/drivers/firmware/firmware-zynqmp.c @@ -26,7 +26,7 @@ struct zynqmp_power { struct mbox_chan tx_chan; struct mbox_chan rx_chan; -} zynqmp_power; +} zynqmp_power = {}; #define NODE_ID_LOCATION 5 @@ -79,6 +79,20 @@ int zynqmp_pmufw_node(u32 id) return 0; } +static int do_pm_probe(void) +{ + struct udevice *dev; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_FIRMWARE, + DM_DRIVER_GET(zynqmp_power), + &dev); + if (ret) + debug("%s: Probing device failed: %d\n", __func__, ret); + + return ret; +} + static int ipi_req(const u32 *req, size_t req_len, u32 *res, size_t res_maxlen) { struct zynqmp_ipi_msg msg; @@ -92,8 +106,11 @@ static int ipi_req(const u32 *req, size_t req_len, u32 *res, size_t res_maxlen) res_maxlen > PMUFW_PAYLOAD_ARG_CNT) return -EINVAL; - if (!(zynqmp_power.tx_chan.dev) || !(zynqmp_power.rx_chan.dev)) - return -EINVAL; + if (!(zynqmp_power.tx_chan.dev) || !(zynqmp_power.rx_chan.dev)) { + ret = do_pm_probe(); + if (ret) + return ret; + } debug("%s, Sending IPI message with ID: 0x%0x\n", __func__, req[0]); msg.buf = (u32 *)req; -- GitLab From bcf6f71bd701cc258e08e1f8c4e915ddb9803faa Mon Sep 17 00:00:00 2001 From: Stefan Herbrechtsmeier Date: Mon, 20 Jun 2022 18:36:38 +0200 Subject: [PATCH 326/581] xilinx: zynqmp: Replace strncat with strlcat Replace strncat with strlcat to always produce a valid null-terminated string. Signed-off-by: Stefan Herbrechtsmeier Link: https://lore.kernel.org/r/20220620163650.18756-3-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek --- board/xilinx/zynqmp/zynqmp.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index e311aa772cc..9dfa4643fb6 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -282,13 +282,13 @@ static char *zynqmp_get_silicon_idcode_name(void) */ switch (family) { case 0x00: - strncat(name, "ev", 2); + strlcat(name, "ev", sizeof(name)); break; case 0x10: - strncat(name, "eg", 2); + strlcat(name, "eg", sizeof(name)); break; case 0x11: - strncat(name, "cg", 2); + strlcat(name, "cg", sizeof(name)); break; default: /* Do not append family name*/ @@ -300,16 +300,17 @@ static char *zynqmp_get_silicon_idcode_name(void) * read. So, ignore the bit and just findout if it is CG * or EG/EV variant. */ - strncat(name, (idcode2 & EFUSE_GPU_DIS_MASK) ? "cg" : - "e", 2); + strlcat(name, (idcode2 & EFUSE_GPU_DIS_MASK) ? "cg" : + "e", sizeof(name)); } } else if (zynqmp_devices[i].variants & ZYNQMP_VARIANT_CG) { /* Devices with CG variant might be EG or CG family */ - strncat(name, (idcode2 & EFUSE_GPU_DIS_MASK) ? "cg" : "eg", 2); + strlcat(name, (idcode2 & EFUSE_GPU_DIS_MASK) ? "cg" : "eg", + sizeof(name)); } else if (zynqmp_devices[i].variants & ZYNQMP_VARIANT_EG) { - strncat(name, "eg", 2); + strlcat(name, "eg", sizeof(name)); } else if (zynqmp_devices[i].variants & ZYNQMP_VARIANT_DR) { - strncat(name, "dr", 2); + strlcat(name, "dr", sizeof(name)); } else { debug("Variant not identified\n"); } -- GitLab From 9bc5a24dea086d526f804ea527b845c1ab77b38c Mon Sep 17 00:00:00 2001 From: Stefan Herbrechtsmeier Date: Mon, 20 Jun 2022 18:36:39 +0200 Subject: [PATCH 327/581] xilinx: zynqmp: Add macro for device type mask Add a macro for the device type mask of the id code. Signed-off-by: Stefan Herbrechtsmeier Link: https://lore.kernel.org/r/20220620163650.18756-4-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek --- board/xilinx/zynqmp/zynqmp.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 9dfa4643fb6..1a7383d0230 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -49,6 +49,7 @@ #define EFUSE_VCU_DIS_SHIFT 8 #define EFUSE_GPU_DIS_MASK 0x20 #define EFUSE_GPU_DIS_SHIFT 5 +#define IDCODE_DEV_TYPE_MASK GENMASK(27, 0) #define IDCODE2_PL_INIT_MASK 0x200 #define IDCODE2_PL_INIT_SHIFT 9 @@ -218,7 +219,7 @@ static char *zynqmp_detect_svd_name(u32 idcode) u32 i; for (i = 0; i < ARRAY_SIZE(zynqmp_svd_devices); i++) { - if (zynqmp_svd_devices[i].id == (idcode & 0x0FFFFFFF)) + if (zynqmp_svd_devices[i].id == (idcode & IDCODE_DEV_TYPE_MASK)) return zynqmp_svd_devices[i].name; } @@ -254,7 +255,7 @@ static char *zynqmp_get_silicon_idcode_name(void) idcode2); for (i = 0; i < ARRAY_SIZE(zynqmp_devices); i++) { - if (zynqmp_devices[i].id == (idcode & 0x0FFFFFFF)) + if (zynqmp_devices[i].id == (idcode & IDCODE_DEV_TYPE_MASK)) break; } -- GitLab From 71278c0e5909b8f52ef9996f33dd447048ca04a6 Mon Sep 17 00:00:00 2001 From: Stefan Herbrechtsmeier Date: Mon, 20 Jun 2022 18:36:40 +0200 Subject: [PATCH 328/581] xilinx: zynqmp: Reuse shift macros to define masks Reuse the shift macros to define the masks. Signed-off-by: Stefan Herbrechtsmeier Link: https://lore.kernel.org/r/20220620163650.18756-5-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek --- board/xilinx/zynqmp/zynqmp.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 1a7383d0230..56bb01335d6 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -45,13 +45,13 @@ #include "pm_cfg_obj.h" #define ZYNQMP_VERSION_SIZE 7 -#define EFUSE_VCU_DIS_MASK 0x100 #define EFUSE_VCU_DIS_SHIFT 8 -#define EFUSE_GPU_DIS_MASK 0x20 +#define EFUSE_VCU_DIS_MASK BIT(EFUSE_VCU_DIS_SHIFT) #define EFUSE_GPU_DIS_SHIFT 5 +#define EFUSE_GPU_DIS_MASK BIT(EFUSE_GPU_DIS_SHIFT) #define IDCODE_DEV_TYPE_MASK GENMASK(27, 0) -#define IDCODE2_PL_INIT_MASK 0x200 #define IDCODE2_PL_INIT_SHIFT 9 +#define IDCODE2_PL_INIT_MASK BIT(IDCODE2_PL_INIT_SHIFT) DECLARE_GLOBAL_DATA_PTR; -- GitLab From d43d78ef033446eed9deb734c5240d4e7a6bfdde Mon Sep 17 00:00:00 2001 From: Stefan Herbrechtsmeier Date: Mon, 20 Jun 2022 18:36:41 +0200 Subject: [PATCH 329/581] xilinx: zynqmp: Merge device lists Merge the svd / xck devices into to the common zynqmp device list. Signed-off-by: Stefan Herbrechtsmeier Link: https://lore.kernel.org/r/20220620163650.18756-6-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek --- board/xilinx/zynqmp/zynqmp.c | 54 ++++++++++++++++-------------------- 1 file changed, 24 insertions(+), 30 deletions(-) diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 56bb01335d6..1f18fb3473c 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -65,11 +65,13 @@ enum { ZYNQMP_VARIANT_DR = BIT(3U), }; -static const struct { +struct zynqmp_device { u32 id; u8 device; u8 variants; -} zynqmp_devices[] = { +}; + +static const struct zynqmp_device zynqmp_devices[] = { { .id = 0x04688093, .device = 1, @@ -198,37 +200,33 @@ static const struct { .device = 67, .variants = ZYNQMP_VARIANT_DR, }, -}; - -static const struct { - u32 id; - char *name; -} zynqmp_svd_devices[] = { { .id = 0x04714093, - .name = "xck24" + .device = 24, + .variants = 0, }, { .id = 0x04724093, - .name = "xck26", + .device = 26, + .variants = 0, }, }; -static char *zynqmp_detect_svd_name(u32 idcode) +static const struct zynqmp_device *zynqmp_get_device(u32 idcode) { - u32 i; + idcode &= IDCODE_DEV_TYPE_MASK; - for (i = 0; i < ARRAY_SIZE(zynqmp_svd_devices); i++) { - if (zynqmp_svd_devices[i].id == (idcode & IDCODE_DEV_TYPE_MASK)) - return zynqmp_svd_devices[i].name; + for (int i = 0; i < ARRAY_SIZE(zynqmp_devices); i++) { + if (zynqmp_devices[i].id == idcode) + return &zynqmp_devices[i]; } - return "unknown"; + return NULL; } static char *zynqmp_get_silicon_idcode_name(void) { - u32 i; + const struct zynqmp_device *device; u32 idcode, idcode2; char name[ZYNQMP_VERSION_SIZE]; u32 ret_payload[PAYLOAD_ARG_CNT]; @@ -254,21 +252,17 @@ static char *zynqmp_get_silicon_idcode_name(void) debug("%s, IDCODE: 0x%0x, IDCODE2: 0x%0x\r\n", __func__, idcode, idcode2); - for (i = 0; i < ARRAY_SIZE(zynqmp_devices); i++) { - if (zynqmp_devices[i].id == (idcode & IDCODE_DEV_TYPE_MASK)) - break; - } - - if (i >= ARRAY_SIZE(zynqmp_devices)) - return zynqmp_detect_svd_name(idcode); + device = zynqmp_get_device(idcode); + if (!device) + return "unknown"; /* Add device prefix to the name */ - ret = snprintf(name, ZYNQMP_VERSION_SIZE, "zu%d", - zynqmp_devices[i].device); + ret = snprintf(name, ZYNQMP_VERSION_SIZE, "%s%d", + device->variants ? "zu" : "xck", device->device); if (ret < 0) return "unknown"; - if (zynqmp_devices[i].variants & ZYNQMP_VARIANT_EV) { + if (device->variants & ZYNQMP_VARIANT_EV) { /* Devices with EV variant might be EG/CG/EV family */ if (idcode2 & IDCODE2_PL_INIT_MASK) { u32 family = ((idcode2 & EFUSE_VCU_DIS_MASK) >> @@ -304,13 +298,13 @@ static char *zynqmp_get_silicon_idcode_name(void) strlcat(name, (idcode2 & EFUSE_GPU_DIS_MASK) ? "cg" : "e", sizeof(name)); } - } else if (zynqmp_devices[i].variants & ZYNQMP_VARIANT_CG) { + } else if (device->variants & ZYNQMP_VARIANT_CG) { /* Devices with CG variant might be EG or CG family */ strlcat(name, (idcode2 & EFUSE_GPU_DIS_MASK) ? "cg" : "eg", sizeof(name)); - } else if (zynqmp_devices[i].variants & ZYNQMP_VARIANT_EG) { + } else if (device->variants & ZYNQMP_VARIANT_EG) { strlcat(name, "eg", sizeof(name)); - } else if (zynqmp_devices[i].variants & ZYNQMP_VARIANT_DR) { + } else if (device->variants & ZYNQMP_VARIANT_DR) { strlcat(name, "dr", sizeof(name)); } else { debug("Variant not identified\n"); -- GitLab From 18fcb49db51eaae58dc68f527c4880958ec5e3ca Mon Sep 17 00:00:00 2001 From: Stefan Herbrechtsmeier Date: Mon, 20 Jun 2022 18:36:42 +0200 Subject: [PATCH 330/581] soc: xilinx: zynqmp: Remove redundant checks for zynqmp_mmio_read Remove the redundant SPL and CurrentEL checks for the zynqmp_mmio_read function call because the function itself runs the same checks. Signed-off-by: Stefan Herbrechtsmeier Link: https://lore.kernel.org/r/20220620163650.18756-7-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek --- drivers/soc/soc_xilinx_zynqmp.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/soc/soc_xilinx_zynqmp.c b/drivers/soc/soc_xilinx_zynqmp.c index a71115b17cc..563d93da24b 100644 --- a/drivers/soc/soc_xilinx_zynqmp.c +++ b/drivers/soc/soc_xilinx_zynqmp.c @@ -54,8 +54,7 @@ static int soc_xilinx_zynqmp_probe(struct udevice *dev) priv->family = zynqmp_family; - if (IS_ENABLED(CONFIG_SPL_BUILD) || current_el() == 3 || - !IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE)) + if (!IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE)) ret = zynqmp_mmio_read(ZYNQMP_PS_VERSION, &ret_payload[2]); else ret = xilinx_pm_request(PM_GET_CHIPID, 0, 0, 0, 0, -- GitLab From a1e618a1b925c43e70b2e72928f62f3d447fbf68 Mon Sep 17 00:00:00 2001 From: Stefan Herbrechtsmeier Date: Mon, 20 Jun 2022 18:36:43 +0200 Subject: [PATCH 331/581] soc: xilinx: zynqmp: Add machine identification support Add machine identification support based on the zynqmp_get_silicon_idcode_name function and use the soc_get_machine function of the soc uclass to get silicon idcode name for the fpga init. Signed-off-by: Stefan Herbrechtsmeier Link: https://lore.kernel.org/r/20220620163650.18756-8-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek --- board/xilinx/zynqmp/zynqmp.c | 283 ++------------------------------ drivers/soc/soc_xilinx_zynqmp.c | 283 ++++++++++++++++++++++++++++++++ 2 files changed, 298 insertions(+), 268 deletions(-) diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 1f18fb3473c..06f6dbab182 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -44,274 +45,10 @@ #include "pm_cfg_obj.h" -#define ZYNQMP_VERSION_SIZE 7 -#define EFUSE_VCU_DIS_SHIFT 8 -#define EFUSE_VCU_DIS_MASK BIT(EFUSE_VCU_DIS_SHIFT) -#define EFUSE_GPU_DIS_SHIFT 5 -#define EFUSE_GPU_DIS_MASK BIT(EFUSE_GPU_DIS_SHIFT) -#define IDCODE_DEV_TYPE_MASK GENMASK(27, 0) -#define IDCODE2_PL_INIT_SHIFT 9 -#define IDCODE2_PL_INIT_MASK BIT(IDCODE2_PL_INIT_SHIFT) - DECLARE_GLOBAL_DATA_PTR; #if CONFIG_IS_ENABLED(FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) static xilinx_desc zynqmppl = XILINX_ZYNQMP_DESC; - -enum { - ZYNQMP_VARIANT_EG = BIT(0U), - ZYNQMP_VARIANT_EV = BIT(1U), - ZYNQMP_VARIANT_CG = BIT(2U), - ZYNQMP_VARIANT_DR = BIT(3U), -}; - -struct zynqmp_device { - u32 id; - u8 device; - u8 variants; -}; - -static const struct zynqmp_device zynqmp_devices[] = { - { - .id = 0x04688093, - .device = 1, - .variants = ZYNQMP_VARIANT_EG, - }, - { - .id = 0x04711093, - .device = 2, - .variants = ZYNQMP_VARIANT_EG | ZYNQMP_VARIANT_CG, - }, - { - .id = 0x04710093, - .device = 3, - .variants = ZYNQMP_VARIANT_EG | ZYNQMP_VARIANT_CG, - }, - { - .id = 0x04721093, - .device = 4, - .variants = ZYNQMP_VARIANT_EG | ZYNQMP_VARIANT_CG | - ZYNQMP_VARIANT_EV, - }, - { - .id = 0x04720093, - .device = 5, - .variants = ZYNQMP_VARIANT_EG | ZYNQMP_VARIANT_CG | - ZYNQMP_VARIANT_EV, - }, - { - .id = 0x04739093, - .device = 6, - .variants = ZYNQMP_VARIANT_EG | ZYNQMP_VARIANT_CG, - }, - { - .id = 0x04730093, - .device = 7, - .variants = ZYNQMP_VARIANT_EG | ZYNQMP_VARIANT_CG | - ZYNQMP_VARIANT_EV, - }, - { - .id = 0x04738093, - .device = 9, - .variants = ZYNQMP_VARIANT_EG | ZYNQMP_VARIANT_CG, - }, - { - .id = 0x04740093, - .device = 11, - .variants = ZYNQMP_VARIANT_EG, - }, - { - .id = 0x04750093, - .device = 15, - .variants = ZYNQMP_VARIANT_EG, - }, - { - .id = 0x04759093, - .device = 17, - .variants = ZYNQMP_VARIANT_EG, - }, - { - .id = 0x04758093, - .device = 19, - .variants = ZYNQMP_VARIANT_EG, - }, - { - .id = 0x047E1093, - .device = 21, - .variants = ZYNQMP_VARIANT_DR, - }, - { - .id = 0x047E3093, - .device = 23, - .variants = ZYNQMP_VARIANT_DR, - }, - { - .id = 0x047E5093, - .device = 25, - .variants = ZYNQMP_VARIANT_DR, - }, - { - .id = 0x047E4093, - .device = 27, - .variants = ZYNQMP_VARIANT_DR, - }, - { - .id = 0x047E0093, - .device = 28, - .variants = ZYNQMP_VARIANT_DR, - }, - { - .id = 0x047E2093, - .device = 29, - .variants = ZYNQMP_VARIANT_DR, - }, - { - .id = 0x047E6093, - .device = 39, - .variants = ZYNQMP_VARIANT_DR, - }, - { - .id = 0x047FD093, - .device = 43, - .variants = ZYNQMP_VARIANT_DR, - }, - { - .id = 0x047F8093, - .device = 46, - .variants = ZYNQMP_VARIANT_DR, - }, - { - .id = 0x047FF093, - .device = 47, - .variants = ZYNQMP_VARIANT_DR, - }, - { - .id = 0x047FB093, - .device = 48, - .variants = ZYNQMP_VARIANT_DR, - }, - { - .id = 0x047FE093, - .device = 49, - .variants = ZYNQMP_VARIANT_DR, - }, - { - .id = 0x046d0093, - .device = 67, - .variants = ZYNQMP_VARIANT_DR, - }, - { - .id = 0x04714093, - .device = 24, - .variants = 0, - }, - { - .id = 0x04724093, - .device = 26, - .variants = 0, - }, -}; - -static const struct zynqmp_device *zynqmp_get_device(u32 idcode) -{ - idcode &= IDCODE_DEV_TYPE_MASK; - - for (int i = 0; i < ARRAY_SIZE(zynqmp_devices); i++) { - if (zynqmp_devices[i].id == idcode) - return &zynqmp_devices[i]; - } - - return NULL; -} - -static char *zynqmp_get_silicon_idcode_name(void) -{ - const struct zynqmp_device *device; - u32 idcode, idcode2; - char name[ZYNQMP_VERSION_SIZE]; - u32 ret_payload[PAYLOAD_ARG_CNT]; - int ret; - - ret = xilinx_pm_request(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload); - if (ret) { - debug("%s: Getting chipid failed\n", __func__); - return "unknown"; - } - - /* - * Firmware returns: - * payload[0][31:0] = status of the operation - * payload[1]] = IDCODE - * payload[2][19:0] = Version - * payload[2][28:20] = EXTENDED_IDCODE - * payload[2][29] = PL_INIT - */ - - idcode = ret_payload[1]; - idcode2 = ret_payload[2] >> ZYNQMP_CSU_VERSION_EMPTY_SHIFT; - debug("%s, IDCODE: 0x%0x, IDCODE2: 0x%0x\r\n", __func__, idcode, - idcode2); - - device = zynqmp_get_device(idcode); - if (!device) - return "unknown"; - - /* Add device prefix to the name */ - ret = snprintf(name, ZYNQMP_VERSION_SIZE, "%s%d", - device->variants ? "zu" : "xck", device->device); - if (ret < 0) - return "unknown"; - - if (device->variants & ZYNQMP_VARIANT_EV) { - /* Devices with EV variant might be EG/CG/EV family */ - if (idcode2 & IDCODE2_PL_INIT_MASK) { - u32 family = ((idcode2 & EFUSE_VCU_DIS_MASK) >> - EFUSE_VCU_DIS_SHIFT) << 1 | - ((idcode2 & EFUSE_GPU_DIS_MASK) >> - EFUSE_GPU_DIS_SHIFT); - - /* - * Get family name based on extended idcode values as - * determined on UG1087, EXTENDED_IDCODE register - * description - */ - switch (family) { - case 0x00: - strlcat(name, "ev", sizeof(name)); - break; - case 0x10: - strlcat(name, "eg", sizeof(name)); - break; - case 0x11: - strlcat(name, "cg", sizeof(name)); - break; - default: - /* Do not append family name*/ - break; - } - } else { - /* - * When PL powered down the VCU Disable efuse cannot be - * read. So, ignore the bit and just findout if it is CG - * or EG/EV variant. - */ - strlcat(name, (idcode2 & EFUSE_GPU_DIS_MASK) ? "cg" : - "e", sizeof(name)); - } - } else if (device->variants & ZYNQMP_VARIANT_CG) { - /* Devices with CG variant might be EG or CG family */ - strlcat(name, (idcode2 & EFUSE_GPU_DIS_MASK) ? "cg" : "eg", - sizeof(name)); - } else if (device->variants & ZYNQMP_VARIANT_EG) { - strlcat(name, "eg", sizeof(name)); - } else if (device->variants & ZYNQMP_VARIANT_DR) { - strlcat(name, "dr", sizeof(name)); - } else { - debug("Variant not identified\n"); - } - - return strdup(name); -} #endif int __maybe_unused psu_uboot_init(void) @@ -402,6 +139,11 @@ static void print_secure_boot(void) int board_init(void) { +#if CONFIG_IS_ENABLED(FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) + struct udevice *soc; + char name[SOC_MAX_STR_SIZE]; + int ret; +#endif #if defined(CONFIG_ZYNQMP_FIRMWARE) struct udevice *dev; @@ -428,10 +170,15 @@ int board_init(void) printf("EL Level:\tEL%d\n", current_el()); #if CONFIG_IS_ENABLED(FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) - zynqmppl.name = zynqmp_get_silicon_idcode_name(); - printf("Chip ID:\t%s\n", zynqmppl.name); - fpga_init(); - fpga_add(fpga_xilinx, &zynqmppl); + ret = soc_get(&soc); + if (!ret) { + ret = soc_get_machine(soc, name, sizeof(name)); + if (ret >= 0) { + zynqmppl.name = strdup(name); + fpga_init(); + fpga_add(fpga_xilinx, &zynqmppl); + } + } #endif /* display secure boot information */ diff --git a/drivers/soc/soc_xilinx_zynqmp.c b/drivers/soc/soc_xilinx_zynqmp.c index 563d93da24b..c10fc7d4449 100644 --- a/drivers/soc/soc_xilinx_zynqmp.c +++ b/drivers/soc/soc_xilinx_zynqmp.c @@ -3,10 +3,15 @@ * Xilinx ZynqMP SOC driver * * Copyright (C) 2021 Xilinx, Inc. + * Michal Simek + * + * Copyright (C) 2022 Weidmüller Interface GmbH & Co. KG + * Stefan Herbrechtsmeier */ #include #include +#include #include #include #include @@ -22,11 +27,257 @@ */ static const char zynqmp_family[] = "ZynqMP"; +#define EFUSE_VCU_DIS_SHIFT 8 +#define EFUSE_VCU_DIS_MASK BIT(EFUSE_VCU_DIS_SHIFT) +#define EFUSE_GPU_DIS_SHIFT 5 +#define EFUSE_GPU_DIS_MASK BIT(EFUSE_GPU_DIS_SHIFT) +#define IDCODE_DEV_TYPE_MASK GENMASK(27, 0) +#define IDCODE2_PL_INIT_SHIFT 9 +#define IDCODE2_PL_INIT_MASK BIT(IDCODE2_PL_INIT_SHIFT) + +#define ZYNQMP_VERSION_SIZE 7 + +enum { + ZYNQMP_VARIANT_EG = BIT(0), + ZYNQMP_VARIANT_EV = BIT(1), + ZYNQMP_VARIANT_CG = BIT(2), + ZYNQMP_VARIANT_DR = BIT(3), +}; + +struct zynqmp_device { + u32 id; + u8 device; + u8 variants; +}; + struct soc_xilinx_zynqmp_priv { const char *family; + char machine[ZYNQMP_VERSION_SIZE]; char revision; }; +static const struct zynqmp_device zynqmp_devices[] = { + { + .id = 0x04688093, + .device = 1, + .variants = ZYNQMP_VARIANT_EG, + }, + { + .id = 0x04711093, + .device = 2, + .variants = ZYNQMP_VARIANT_EG | ZYNQMP_VARIANT_CG, + }, + { + .id = 0x04710093, + .device = 3, + .variants = ZYNQMP_VARIANT_EG | ZYNQMP_VARIANT_CG, + }, + { + .id = 0x04721093, + .device = 4, + .variants = ZYNQMP_VARIANT_EG | ZYNQMP_VARIANT_CG | + ZYNQMP_VARIANT_EV, + }, + { + .id = 0x04720093, + .device = 5, + .variants = ZYNQMP_VARIANT_EG | ZYNQMP_VARIANT_CG | + ZYNQMP_VARIANT_EV, + }, + { + .id = 0x04739093, + .device = 6, + .variants = ZYNQMP_VARIANT_EG | ZYNQMP_VARIANT_CG, + }, + { + .id = 0x04730093, + .device = 7, + .variants = ZYNQMP_VARIANT_EG | ZYNQMP_VARIANT_CG | + ZYNQMP_VARIANT_EV, + }, + { + .id = 0x04738093, + .device = 9, + .variants = ZYNQMP_VARIANT_EG | ZYNQMP_VARIANT_CG, + }, + { + .id = 0x04740093, + .device = 11, + .variants = ZYNQMP_VARIANT_EG, + }, + { + .id = 0x04750093, + .device = 15, + .variants = ZYNQMP_VARIANT_EG, + }, + { + .id = 0x04759093, + .device = 17, + .variants = ZYNQMP_VARIANT_EG, + }, + { + .id = 0x04758093, + .device = 19, + .variants = ZYNQMP_VARIANT_EG, + }, + { + .id = 0x047E1093, + .device = 21, + .variants = ZYNQMP_VARIANT_DR, + }, + { + .id = 0x047E3093, + .device = 23, + .variants = ZYNQMP_VARIANT_DR, + }, + { + .id = 0x047E5093, + .device = 25, + .variants = ZYNQMP_VARIANT_DR, + }, + { + .id = 0x047E4093, + .device = 27, + .variants = ZYNQMP_VARIANT_DR, + }, + { + .id = 0x047E0093, + .device = 28, + .variants = ZYNQMP_VARIANT_DR, + }, + { + .id = 0x047E2093, + .device = 29, + .variants = ZYNQMP_VARIANT_DR, + }, + { + .id = 0x047E6093, + .device = 39, + .variants = ZYNQMP_VARIANT_DR, + }, + { + .id = 0x047FD093, + .device = 43, + .variants = ZYNQMP_VARIANT_DR, + }, + { + .id = 0x047F8093, + .device = 46, + .variants = ZYNQMP_VARIANT_DR, + }, + { + .id = 0x047FF093, + .device = 47, + .variants = ZYNQMP_VARIANT_DR, + }, + { + .id = 0x047FB093, + .device = 48, + .variants = ZYNQMP_VARIANT_DR, + }, + { + .id = 0x047FE093, + .device = 49, + .variants = ZYNQMP_VARIANT_DR, + }, + { + .id = 0x046d0093, + .device = 67, + .variants = ZYNQMP_VARIANT_DR, + }, + { + .id = 0x04714093, + .device = 24, + .variants = 0, + }, + { + .id = 0x04724093, + .device = 26, + .variants = 0, + }, +}; + +static const struct zynqmp_device *zynqmp_get_device(u32 idcode) +{ + idcode &= IDCODE_DEV_TYPE_MASK; + + for (int i = 0; i < ARRAY_SIZE(zynqmp_devices); i++) { + if (zynqmp_devices[i].id == idcode) + return &zynqmp_devices[i]; + } + + return NULL; +} + +static int soc_xilinx_zynqmp_detect_machine(struct udevice *dev, u32 idcode, + u32 idcode2) +{ + struct soc_xilinx_zynqmp_priv *priv = dev_get_priv(dev); + const struct zynqmp_device *device; + int ret; + + device = zynqmp_get_device(idcode); + if (!device) + return 0; + + /* Add device prefix to the name */ + ret = snprintf(priv->machine, sizeof(priv->machine), "%s%d", + device->variants ? "zu" : "xck", device->device); + if (ret < 0) + return ret; + + if (device->variants & ZYNQMP_VARIANT_EV) { + /* Devices with EV variant might be EG/CG/EV family */ + if (idcode2 & IDCODE2_PL_INIT_MASK) { + u32 family = ((idcode2 & EFUSE_VCU_DIS_MASK) >> + EFUSE_VCU_DIS_SHIFT) << 1 | + ((idcode2 & EFUSE_GPU_DIS_MASK) >> + EFUSE_GPU_DIS_SHIFT); + + /* + * Get family name based on extended idcode values as + * determined on UG1087, EXTENDED_IDCODE register + * description + */ + switch (family) { + case 0x00: + strlcat(priv->machine, "ev", + sizeof(priv->machine)); + break; + case 0x10: + strlcat(priv->machine, "eg", + sizeof(priv->machine)); + break; + case 0x11: + strlcat(priv->machine, "cg", + sizeof(priv->machine)); + break; + default: + /* Do not append family name*/ + break; + } + } else { + /* + * When PL powered down the VCU Disable efuse cannot be + * read. So, ignore the bit and just findout if it is CG + * or EG/EV variant. + */ + strlcat(priv->machine, (idcode2 & EFUSE_GPU_DIS_MASK) ? + "cg" : "e", sizeof(priv->machine)); + } + } else if (device->variants & ZYNQMP_VARIANT_CG) { + /* Devices with CG variant might be EG or CG family */ + strlcat(priv->machine, (idcode2 & EFUSE_GPU_DIS_MASK) ? + "cg" : "eg", sizeof(priv->machine)); + } else if (device->variants & ZYNQMP_VARIANT_EG) { + strlcat(priv->machine, "eg", sizeof(priv->machine)); + } else if (device->variants & ZYNQMP_VARIANT_DR) { + strlcat(priv->machine, "dr", sizeof(priv->machine)); + } + + return 0; +} + static int soc_xilinx_zynqmp_get_family(struct udevice *dev, char *buf, int size) { struct soc_xilinx_zynqmp_priv *priv = dev_get_priv(dev); @@ -34,6 +285,17 @@ static int soc_xilinx_zynqmp_get_family(struct udevice *dev, char *buf, int size return snprintf(buf, size, "%s", priv->family); } +int soc_xilinx_zynqmp_get_machine(struct udevice *dev, char *buf, int size) +{ + struct soc_xilinx_zynqmp_priv *priv = dev_get_priv(dev); + const char *machine = priv->machine; + + if (!machine[0]) + machine = "unknown"; + + return snprintf(buf, size, "%s", machine); +} + static int soc_xilinx_zynqmp_get_revision(struct udevice *dev, char *buf, int size) { struct soc_xilinx_zynqmp_priv *priv = dev_get_priv(dev); @@ -44,6 +306,7 @@ static int soc_xilinx_zynqmp_get_revision(struct udevice *dev, char *buf, int si static const struct soc_ops soc_xilinx_zynqmp_ops = { .get_family = soc_xilinx_zynqmp_get_family, .get_revision = soc_xilinx_zynqmp_get_revision, + .get_machine = soc_xilinx_zynqmp_get_machine, }; static int soc_xilinx_zynqmp_probe(struct udevice *dev) @@ -64,6 +327,26 @@ static int soc_xilinx_zynqmp_probe(struct udevice *dev) priv->revision = ret_payload[2] & ZYNQMP_PS_VER_MASK; + if (IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE)) { + /* + * Firmware returns: + * payload[0][31:0] = status of the operation + * payload[1] = IDCODE + * payload[2][19:0] = Version + * payload[2][28:20] = EXTENDED_IDCODE + * payload[2][29] = PL_INIT + */ + u32 idcode = ret_payload[1]; + u32 idcode2 = ret_payload[2] >> + ZYNQMP_CSU_VERSION_EMPTY_SHIFT; + dev_dbg(dev, "IDCODE: 0x%0x, IDCODE2: 0x%0x\n", idcode, + idcode2); + + ret = soc_xilinx_zynqmp_detect_machine(dev, idcode, idcode2); + if (ret) + return ret; + } + return 0; } -- GitLab From 381ede9e3885b98ec4d93d51d7da538dfb3db076 Mon Sep 17 00:00:00 2001 From: Stefan Herbrechtsmeier Date: Mon, 20 Jun 2022 18:36:44 +0200 Subject: [PATCH 332/581] xilinx: cpuinfo: Print soc machine Print the soc machine in the print_cpuinfo function. Signed-off-by: Stefan Herbrechtsmeier Link: https://lore.kernel.org/r/20220620163650.18756-9-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek --- board/xilinx/common/board.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c index 629a6ee036f..402fa770063 100644 --- a/board/xilinx/common/board.c +++ b/board/xilinx/common/board.c @@ -506,6 +506,10 @@ int print_cpuinfo(void) if (ret) printf("Silicon: %s\n", name); + ret = soc_get_machine(soc, name, SOC_MAX_STR_SIZE); + if (ret) + printf("Chip: %s\n", name); + return 0; } #endif -- GitLab From 86ceedd84e2052db5497dbb51fa373d3229d83e1 Mon Sep 17 00:00:00 2001 From: Stefan Herbrechtsmeier Date: Mon, 20 Jun 2022 18:36:45 +0200 Subject: [PATCH 333/581] xilinx: common: Separate display cpu info function Move the print_cpuinfo function of CONFIG_DISPLAY_CPUINFO into its own source file to support reuse by other board vendors. Signed-off-by: Stefan Herbrechtsmeier Link: https://lore.kernel.org/r/20220620163650.18756-10-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek --- board/xilinx/common/Makefile | 3 +++ board/xilinx/common/board.c | 29 ---------------------------- board/xilinx/common/cpu-info.c | 35 ++++++++++++++++++++++++++++++++++ 3 files changed, 38 insertions(+), 29 deletions(-) create mode 100644 board/xilinx/common/cpu-info.c diff --git a/board/xilinx/common/Makefile b/board/xilinx/common/Makefile index 212028478c0..cdc3c967743 100644 --- a/board/xilinx/common/Makefile +++ b/board/xilinx/common/Makefile @@ -5,6 +5,9 @@ # obj-y += board.o +ifndef CONFIG_ARCH_ZYNQ +obj-$(CONFIG_DISPLAY_CPUINFO) += cpu-info.o +endif ifndef CONFIG_SPL_BUILD obj-$(CONFIG_CMD_FRU) += fru.o fru_ops.o endif diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c index 402fa770063..5f2afb9def4 100644 --- a/board/xilinx/common/board.c +++ b/board/xilinx/common/board.c @@ -485,35 +485,6 @@ int __maybe_unused board_fit_config_name_match(const char *name) return -1; } -#if defined(CONFIG_DISPLAY_CPUINFO) && !defined(CONFIG_ARCH_ZYNQ) -int print_cpuinfo(void) -{ - struct udevice *soc; - char name[SOC_MAX_STR_SIZE]; - int ret; - - ret = soc_get(&soc); - if (ret) { - printf("CPU: UNKNOWN\n"); - return 0; - } - - ret = soc_get_family(soc, name, SOC_MAX_STR_SIZE); - if (ret) - printf("CPU: %s\n", name); - - ret = soc_get_revision(soc, name, SOC_MAX_STR_SIZE); - if (ret) - printf("Silicon: %s\n", name); - - ret = soc_get_machine(soc, name, SOC_MAX_STR_SIZE); - if (ret) - printf("Chip: %s\n", name); - - return 0; -} -#endif - #if CONFIG_IS_ENABLED(DTB_RESELECT) #define MAX_NAME_LENGTH 50 diff --git a/board/xilinx/common/cpu-info.c b/board/xilinx/common/cpu-info.c new file mode 100644 index 00000000000..4a863d00dec --- /dev/null +++ b/board/xilinx/common/cpu-info.c @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2014 - 2020 Xilinx, Inc. + * Michal Simek + */ + +#include +#include + +int print_cpuinfo(void) +{ + struct udevice *soc; + char name[SOC_MAX_STR_SIZE]; + int ret; + + ret = soc_get(&soc); + if (ret) { + printf("CPU: UNKNOWN\n"); + return 0; + } + + ret = soc_get_family(soc, name, SOC_MAX_STR_SIZE); + if (ret) + printf("CPU: %s\n", name); + + ret = soc_get_revision(soc, name, SOC_MAX_STR_SIZE); + if (ret) + printf("Silicon: %s\n", name); + + ret = soc_get_machine(soc, name, SOC_MAX_STR_SIZE); + if (ret) + printf("Chip: %s\n", name); + + return 0; +} -- GitLab From f93c1c8f3f908a45c0137bff0e999be728774649 Mon Sep 17 00:00:00 2001 From: Stefan Herbrechtsmeier Date: Mon, 20 Jun 2022 18:36:46 +0200 Subject: [PATCH 334/581] xilinx: zynqmp: make spi flash support optional The set_dfu_alt_info function use the CONFIG_SYS_SPI_U_BOOT_OFFS define to set the dfu_alt_info environment variable for qspi boot mode. Guard the usage of CONFIG_SYS_SPI_U_BOOT_OFFS to make spi flash support optional. Signed-off-by: Stefan Herbrechtsmeier Link: https://lore.kernel.org/r/20220620163650.18756-11-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek --- board/xilinx/zynqmp/zynqmp.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 06f6dbab182..106c3953e1f 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -667,6 +667,7 @@ void set_dfu_alt_info(char *interface, char *devstr) bootseq, multiboot, bootseq, CONFIG_SPL_FS_LOAD_PAYLOAD_NAME, bootseq); break; +#if defined(CONFIG_SYS_SPI_U_BOOT_OFFS) case QSPI_MODE_24BIT: case QSPI_MODE_32BIT: snprintf(buf, DFU_ALT_BUF_LEN, @@ -675,6 +676,7 @@ void set_dfu_alt_info(char *interface, char *devstr) multiboot * SZ_32K, CONFIG_SPL_FS_LOAD_PAYLOAD_NAME, CONFIG_SYS_SPI_U_BOOT_OFFS); break; +#endif default: return; } -- GitLab From 2f799b4fbc5be867842a57054a922fbeb0b690d5 Mon Sep 17 00:00:00 2001 From: Stefan Herbrechtsmeier Date: Mon, 20 Jun 2022 18:36:47 +0200 Subject: [PATCH 335/581] tools: zynqmp_psu_init_minimize: Remove low level uart settings There is no reason to do serial initialization. Uart driver does it already based on DT. Good effect is that it is clear which interface is console. The resulting change was done in past by commit 84d2bbf082fa ("arm64: zynqmp: Remove low level UART setting"). Signed-off-by: Stefan Herbrechtsmeier Link: https://lore.kernel.org/r/20220620163650.18756-12-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek --- tools/zynqmp_psu_init_minimize.sh | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/tools/zynqmp_psu_init_minimize.sh b/tools/zynqmp_psu_init_minimize.sh index 4ee418f07ea..31fbeac3274 100755 --- a/tools/zynqmp_psu_init_minimize.sh +++ b/tools/zynqmp_psu_init_minimize.sh @@ -2,6 +2,8 @@ # SPDX-License-Identifier: GPL-2.0+ # Copyright (C) 2018 Michal Simek # Copyright (C) 2019 Luca Ceresoli +# Copyright (C) 2022 Weidmüller Interface GmbH & Co. KG +# Stefan Herbrechtsmeier usage() { @@ -144,4 +146,19 @@ sed -i -r 's|\((._code .= [x[:xdigit:]]+)\)|\1|g' ${TMP} # Convert back newlines tr "\r" "\n" <${TMP} >${OUT} +# Remove unnecessary settings +# - Low level UART +SETTINGS_TO_REMOVE="0xFF000000 +0xFF000004 +0xFF000018 +0xFF000034 +0xFF010000 +0xFF010004 +0xFF010018 +0xFF010034 +" +for i in $SETTINGS_TO_REMOVE; do +sed -i "/^\tpsu_mask_write($i,.*$/d" ${OUT} +done + rm ${TMP} -- GitLab From 4d8f2bb151fbe9aa632050aca670c18ac5d96fbe Mon Sep 17 00:00:00 2001 From: Stefan Herbrechtsmeier Date: Mon, 20 Jun 2022 18:36:48 +0200 Subject: [PATCH 336/581] tools: zynqmp_psu_init_minimize: Use CR instead of LF Use carriage return instead of line feed to support mangling across lines. Signed-off-by: Stefan Herbrechtsmeier Link: https://lore.kernel.org/r/20220620163650.18756-13-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek --- tools/zynqmp_psu_init_minimize.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/zynqmp_psu_init_minimize.sh b/tools/zynqmp_psu_init_minimize.sh index 31fbeac3274..c0a7a89465e 100755 --- a/tools/zynqmp_psu_init_minimize.sh +++ b/tools/zynqmp_psu_init_minimize.sh @@ -121,7 +121,7 @@ tr "\n" "\r" <${OUT} >${TMP} # | | ==> |while (e)| # | } | | ; | # | | -sed -i -r 's| \{\r+(\t*)\}\r\r|\n\1\t;\n|g' ${TMP} +sed -i -r 's| \{\r+(\t*)\}\r\r|\r\1\t;\r|g' ${TMP} # Remove empty line between variable declaration sed -i -r 's|\r(\r\t(unsigned )?int )|\1|g' ${TMP} -- GitLab From d2162549fee294740d419634e973c017ba845d70 Mon Sep 17 00:00:00 2001 From: Stefan Herbrechtsmeier Date: Mon, 20 Jun 2022 18:36:49 +0200 Subject: [PATCH 337/581] tools: zynqmp_psu_init_minimize: Move helper functions below header includes Move helper functions below header includes to avoid forward declarations. Signed-off-by: Stefan Herbrechtsmeier Link: https://lore.kernel.org/r/20220620163650.18756-14-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek --- tools/zynqmp_psu_init_minimize.sh | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/tools/zynqmp_psu_init_minimize.sh b/tools/zynqmp_psu_init_minimize.sh index c0a7a89465e..16c622f6ce7 100755 --- a/tools/zynqmp_psu_init_minimize.sh +++ b/tools/zynqmp_psu_init_minimize.sh @@ -143,6 +143,14 @@ sed -i -r 's| \{(\r[^\r]*;)\r\t*\}|\1|g' ${TMP} # if ((p_code >= 0x26) && ...) -> if (p_code >= 0x26 && ...) sed -i -r 's|\((._code .= [x[:xdigit:]]+)\)|\1|g' ${TMP} +# Move helper functions below header includes +TARGET="#include " +START="static int serdes_rst_seq" +END="static int serdes_enb_coarse_saturation" + +sed -i -e "s|\(${TARGET}\r\r\)\(.*\)\(${START}(.*\)\(${END}(\)|\1\3\2\4|g" \ + ${TMP} + # Convert back newlines tr "\r" "\n" <${TMP} >${OUT} -- GitLab From 036ef47b325bf7c01ae1f94659f83e4bbf4d22cd Mon Sep 17 00:00:00 2001 From: Stefan Herbrechtsmeier Date: Mon, 20 Jun 2022 18:36:50 +0200 Subject: [PATCH 338/581] arm64: zynqmp: Move helper functions below header includes Move helper functions in psu_init files below header includes to avoid forward declarations. Signed-off-by: Stefan Herbrechtsmeier Link: https://lore.kernel.org/r/20220620163650.18756-15-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek --- .../zynqmp-e-a2197-00-revA/psu_init_gpl.c | 3478 ++++++++--------- .../zynqmp/zynqmp-zcu208-revA/psu_init_gpl.c | 3231 ++++++++------- .../zynqmp/zynqmp-zcu216-revA/psu_init_gpl.c | 3231 ++++++++------- 3 files changed, 4961 insertions(+), 4979 deletions(-) diff --git a/board/xilinx/zynqmp/zynqmp-e-a2197-00-revA/psu_init_gpl.c b/board/xilinx/zynqmp/zynqmp-e-a2197-00-revA/psu_init_gpl.c index 40d9279378b..5ec327134b7 100644 --- a/board/xilinx/zynqmp/zynqmp-e-a2197-00-revA/psu_init_gpl.c +++ b/board/xilinx/zynqmp/zynqmp-e-a2197-00-revA/psu_init_gpl.c @@ -6,1866 +6,1858 @@ #include #include -static int serdes_illcalib(u32 lane3_protocol, u32 lane3_rate, - u32 lane2_protocol, u32 lane2_rate, - u32 lane1_protocol, u32 lane1_rate, - u32 lane0_protocol, u32 lane0_rate); - -static void dpll_prog(int div2, int ddr_pll_fbdiv, int d_lock_dly, - int d_lock_cnt, int d_lfhf, int d_cp, int d_res); - -static unsigned long psu_pll_init_data(void) +static int serdes_rst_seq(u32 pllsel, u32 lane3_protocol, u32 lane3_rate, + u32 lane2_protocol, u32 lane2_rate, + u32 lane1_protocol, u32 lane1_rate, + u32 lane0_protocol, u32 lane0_rate) { - psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4B0C62U); - psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00014600U); - psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000008U); - psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000001U); - psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000000U); - mask_poll(0xFF5E0040, 0x00000002U); - psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000000U); - psu_mask_write(0xFF5E0048, 0x00003F00U, 0x00000300U); - psu_mask_write(0xFF5E0038, 0x8000FFFFU, 0x00000000U); - psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01012300U); - psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E672C6CU); - psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00002D00U); - psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000008U); - psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000001U); - psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000000U); - mask_poll(0xFF5E0040, 0x00000001U); - psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000000U); - psu_mask_write(0xFF5E0044, 0x00003F00U, 0x00000300U); - psu_mask_write(0xFF5E0028, 0x8000FFFFU, 0x00000000U); - psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U); - psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014800U); - psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000008U); - psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000000U); - mask_poll(0xFD1A0044, 0x00000001U); - psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000000U); - psu_mask_write(0xFD1A0048, 0x00003F00U, 0x00000300U); - psu_mask_write(0xFD1A0028, 0x8000FFFFU, 0x00000000U); - psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U); - psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00014000U); - psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000008U); - psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000000U); - mask_poll(0xFD1A0044, 0x00000002U); - psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000000U); - psu_mask_write(0xFD1A004C, 0x00003F00U, 0x00000300U); - psu_mask_write(0xFD1A0034, 0x8000FFFFU, 0x00000000U); - psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E4B0C62U); - psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00014700U); - psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000008U); - psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000000U); - mask_poll(0xFD1A0044, 0x00000004U); - psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000000U); - psu_mask_write(0xFD1A0050, 0x00003F00U, 0x00000300U); - psu_mask_write(0xFD1A0040, 0x8000FFFFU, 0x00000000U); + Xil_Out32(0xFD410098, 0x00000000); + Xil_Out32(0xFD401010, 0x00000040); + Xil_Out32(0xFD405010, 0x00000040); + Xil_Out32(0xFD409010, 0x00000040); + Xil_Out32(0xFD40D010, 0x00000040); + Xil_Out32(0xFD402084, 0x00000080); + Xil_Out32(0xFD406084, 0x00000080); + Xil_Out32(0xFD40A084, 0x00000080); + Xil_Out32(0xFD40E084, 0x00000080); + Xil_Out32(0xFD410098, 0x00000004); + mask_delay(50); + if (lane0_rate == 1) + Xil_Out32(0xFD410098, 0x0000000E); + Xil_Out32(0xFD410098, 0x00000006); + if (lane0_rate == 1) { + Xil_Out32(0xFD40000C, 0x00000004); + Xil_Out32(0xFD40400C, 0x00000004); + Xil_Out32(0xFD40800C, 0x00000004); + Xil_Out32(0xFD40C00C, 0x00000004); + Xil_Out32(0xFD410098, 0x00000007); + mask_delay(400); + Xil_Out32(0xFD40000C, 0x0000000C); + Xil_Out32(0xFD40400C, 0x0000000C); + Xil_Out32(0xFD40800C, 0x0000000C); + Xil_Out32(0xFD40C00C, 0x0000000C); + mask_delay(15); + Xil_Out32(0xFD410098, 0x0000000F); + mask_delay(100); + } + if (pllsel == 0) + mask_poll(0xFD4023E4, 0x00000010U); + if (pllsel == 1) + mask_poll(0xFD4063E4, 0x00000010U); + if (pllsel == 2) + mask_poll(0xFD40A3E4, 0x00000010U); + if (pllsel == 3) + mask_poll(0xFD40E3E4, 0x00000010U); + mask_delay(50); + Xil_Out32(0xFD401010, 0x000000C0); + Xil_Out32(0xFD405010, 0x000000C0); + Xil_Out32(0xFD409010, 0x000000C0); + Xil_Out32(0xFD40D010, 0x000000C0); + Xil_Out32(0xFD401010, 0x00000080); + Xil_Out32(0xFD405010, 0x00000080); + Xil_Out32(0xFD409010, 0x00000080); + Xil_Out32(0xFD40D010, 0x00000080); + Xil_Out32(0xFD402084, 0x000000C0); + Xil_Out32(0xFD406084, 0x000000C0); + Xil_Out32(0xFD40A084, 0x000000C0); + Xil_Out32(0xFD40E084, 0x000000C0); + mask_delay(50); + Xil_Out32(0xFD402084, 0x00000080); + Xil_Out32(0xFD406084, 0x00000080); + Xil_Out32(0xFD40A084, 0x00000080); + Xil_Out32(0xFD40E084, 0x00000080); + mask_delay(50); + Xil_Out32(0xFD401010, 0x00000000); + Xil_Out32(0xFD405010, 0x00000000); + Xil_Out32(0xFD409010, 0x00000000); + Xil_Out32(0xFD40D010, 0x00000000); + Xil_Out32(0xFD402084, 0x00000000); + Xil_Out32(0xFD406084, 0x00000000); + Xil_Out32(0xFD40A084, 0x00000000); + Xil_Out32(0xFD40E084, 0x00000000); + mask_delay(500); return 1; } -static unsigned long psu_clock_init_data(void) +static int serdes_bist_static_settings(u32 lane_active) { - psu_mask_write(0xFF5E0050, 0x063F3F07U, 0x06010C00U); - psu_mask_write(0xFF180360, 0x00000003U, 0x00000001U); - psu_mask_write(0xFF180308, 0x00000006U, 0x00000006U); - psu_mask_write(0xFF5E0100, 0x013F3F07U, 0x01010600U); - psu_mask_write(0xFF5E0070, 0x013F3F07U, 0x01010800U); - psu_mask_write(0xFF18030C, 0x00020000U, 0x00000000U); - psu_mask_write(0xFF5E0074, 0x013F3F07U, 0x01010F00U); - psu_mask_write(0xFF5E0120, 0x013F3F07U, 0x01010F00U); - psu_mask_write(0xFF5E0124, 0x013F3F07U, 0x01010F00U); - psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000302U); - psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000602U); - psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000800U); - psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U); - psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U); - psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U); - psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U); - psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010F00U); - psu_mask_write(0xFF5E00C4, 0x013F3F07U, 0x01040F00U); - psu_mask_write(0xFF5E00C8, 0x013F3F07U, 0x01010500U); - psu_mask_write(0xFF5E00CC, 0x013F3F07U, 0x01010400U); - psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011D02U); - psu_mask_write(0xFF5E0104, 0x00000007U, 0x00000000U); - psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000F00U); - psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U); - psu_mask_write(0xFD1A0068, 0x01003F07U, 0x01000200U); - psu_mask_write(0xFD1A0080, 0x00003F07U, 0x00000200U); - psu_mask_write(0xFD1A0084, 0x07003F07U, 0x07000100U); - psu_mask_write(0xFD1A00B8, 0x01003F07U, 0x01000200U); - psu_mask_write(0xFD1A00BC, 0x01003F07U, 0x01000200U); - psu_mask_write(0xFD1A00C0, 0x01003F07U, 0x01000203U); - psu_mask_write(0xFD1A00C4, 0x01003F07U, 0x01000502U); - psu_mask_write(0xFD1A00F8, 0x00003F07U, 0x00000200U); - psu_mask_write(0xFF180380, 0x000000FFU, 0x00000000U); - psu_mask_write(0xFD610100, 0x00000001U, 0x00000000U); - psu_mask_write(0xFF180300, 0x00000001U, 0x00000000U); - psu_mask_write(0xFF410050, 0x00000001U, 0x00000000U); + if (lane_active == 0) { + Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) & 0xFFFFFF1F)); + Xil_Out32(0xFD403068, 0x1); + Xil_Out32(0xFD40306C, 0x1); + Xil_Out32(0xFD4010AC, 0x0020); + Xil_Out32(0xFD403008, 0x0); + Xil_Out32(0xFD40300C, 0xF4); + Xil_Out32(0xFD403010, 0x0); + Xil_Out32(0xFD403014, 0x0); + Xil_Out32(0xFD403018, 0x00); + Xil_Out32(0xFD40301C, 0xFB); + Xil_Out32(0xFD403020, 0xFF); + Xil_Out32(0xFD403024, 0x0); + Xil_Out32(0xFD403028, 0x00); + Xil_Out32(0xFD40302C, 0x00); + Xil_Out32(0xFD403030, 0x4A); + Xil_Out32(0xFD403034, 0x4A); + Xil_Out32(0xFD403038, 0x4A); + Xil_Out32(0xFD40303C, 0x4A); + Xil_Out32(0xFD403040, 0x0); + Xil_Out32(0xFD403044, 0x14); + Xil_Out32(0xFD403048, 0x02); + Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) & 0xFFFFFF1F)); + } + if (lane_active == 1) { + Xil_Out32(0xFD407004, (Xil_In32(0xFD407004) & 0xFFFFFF1F)); + Xil_Out32(0xFD407068, 0x1); + Xil_Out32(0xFD40706C, 0x1); + Xil_Out32(0xFD4050AC, 0x0020); + Xil_Out32(0xFD407008, 0x0); + Xil_Out32(0xFD40700C, 0xF4); + Xil_Out32(0xFD407010, 0x0); + Xil_Out32(0xFD407014, 0x0); + Xil_Out32(0xFD407018, 0x00); + Xil_Out32(0xFD40701C, 0xFB); + Xil_Out32(0xFD407020, 0xFF); + Xil_Out32(0xFD407024, 0x0); + Xil_Out32(0xFD407028, 0x00); + Xil_Out32(0xFD40702C, 0x00); + Xil_Out32(0xFD407030, 0x4A); + Xil_Out32(0xFD407034, 0x4A); + Xil_Out32(0xFD407038, 0x4A); + Xil_Out32(0xFD40703C, 0x4A); + Xil_Out32(0xFD407040, 0x0); + Xil_Out32(0xFD407044, 0x14); + Xil_Out32(0xFD407048, 0x02); + Xil_Out32(0xFD407004, (Xil_In32(0xFD407004) & 0xFFFFFF1F)); + } - return 1; -} - -static unsigned long psu_ddr_init_data(void) -{ - psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000008U); - psu_mask_write(0xFD070000, 0xE30FBE3DU, 0xC1081020U); - psu_mask_write(0xFD070010, 0x8000F03FU, 0x00000030U); - psu_mask_write(0xFD070020, 0x000003F3U, 0x00000202U); - psu_mask_write(0xFD070024, 0xFFFFFFFFU, 0x00516120U); - psu_mask_write(0xFD070030, 0x0000007FU, 0x00000000U); - psu_mask_write(0xFD070034, 0x00FFFF1FU, 0x00408410U); - psu_mask_write(0xFD070050, 0x00F1F1F4U, 0x00210000U); - psu_mask_write(0xFD070054, 0x0FFF0FFFU, 0x00000000U); - psu_mask_write(0xFD070060, 0x00000073U, 0x00000001U); - psu_mask_write(0xFD070064, 0x0FFF83FFU, 0x00418096U); - psu_mask_write(0xFD070070, 0x00000017U, 0x00000010U); - psu_mask_write(0xFD070074, 0x00000003U, 0x00000000U); - psu_mask_write(0xFD0700C4, 0x3F000391U, 0x10000200U); - psu_mask_write(0xFD0700C8, 0x01FF1F3FU, 0x0030051FU); - psu_mask_write(0xFD0700D0, 0xC3FF0FFFU, 0x00030413U); - psu_mask_write(0xFD0700D4, 0x01FF7F0FU, 0x006A0000U); - psu_mask_write(0xFD0700D8, 0x0000FF0FU, 0x00002305U); - psu_mask_write(0xFD0700DC, 0xFFFFFFFFU, 0x00440024U); - psu_mask_write(0xFD0700E0, 0xFFFFFFFFU, 0x00310008U); - psu_mask_write(0xFD0700E4, 0x00FF03FFU, 0x00210004U); - psu_mask_write(0xFD0700E8, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD0700EC, 0xFFFF0000U, 0x00000000U); - psu_mask_write(0xFD0700F0, 0x0000003FU, 0x00000010U); - psu_mask_write(0xFD0700F4, 0x00000FFFU, 0x0000077FU); - psu_mask_write(0xFD070100, 0x7F3F7F3FU, 0x15161117U); - psu_mask_write(0xFD070104, 0x001F1F7FU, 0x00040422U); - psu_mask_write(0xFD070108, 0x3F3F3F3FU, 0x060C1A10U); - psu_mask_write(0xFD07010C, 0x3FF3F3FFU, 0x00F08000U); - psu_mask_write(0xFD070110, 0x1F0F0F1FU, 0x0A04060CU); - psu_mask_write(0xFD070114, 0x0F0F3F1FU, 0x01040808U); - psu_mask_write(0xFD070118, 0x0F0F000FU, 0x01010005U); - psu_mask_write(0xFD07011C, 0x00000F0FU, 0x00000401U); - psu_mask_write(0xFD070120, 0x7F7F7F7FU, 0x04040606U); - psu_mask_write(0xFD070124, 0x40070F3FU, 0x0004040DU); - psu_mask_write(0xFD07012C, 0x7F1F031FU, 0x440C011CU); - psu_mask_write(0xFD070130, 0x00030F1FU, 0x00020608U); - psu_mask_write(0xFD070180, 0xF7FF03FFU, 0x82160010U); - psu_mask_write(0xFD070184, 0x3FFFFFFFU, 0x01B65B96U); - psu_mask_write(0xFD070190, 0x1FBFBF3FU, 0x0495820AU); - psu_mask_write(0xFD070194, 0xF31F0F0FU, 0x00030304U); - psu_mask_write(0xFD070198, 0x0FF1F1F1U, 0x07000101U); - psu_mask_write(0xFD07019C, 0x000000F1U, 0x00000021U); - psu_mask_write(0xFD0701A0, 0xC3FF03FFU, 0x83FF0003U); - psu_mask_write(0xFD0701A4, 0x00FF00FFU, 0x00C800FFU); - psu_mask_write(0xFD0701B0, 0x00000007U, 0x00000004U); - psu_mask_write(0xFD0701B4, 0x00003F3FU, 0x00001308U); - psu_mask_write(0xFD0701C0, 0x00000007U, 0x00000001U); - psu_mask_write(0xFD070200, 0x0000001FU, 0x0000001FU); - psu_mask_write(0xFD070204, 0x001F1F1FU, 0x00070707U); - psu_mask_write(0xFD070208, 0x0F0F0F0FU, 0x00000000U); - psu_mask_write(0xFD07020C, 0x0F0F0F0FU, 0x0F000000U); - psu_mask_write(0xFD070210, 0x00000F0FU, 0x00000F0FU); - psu_mask_write(0xFD070214, 0x0F0F0F0FU, 0x060F0606U); - psu_mask_write(0xFD070218, 0x8F0F0F0FU, 0x06060606U); - psu_mask_write(0xFD07021C, 0x00000F0FU, 0x00000F0FU); - psu_mask_write(0xFD070220, 0x00001F1FU, 0x00000000U); - psu_mask_write(0xFD070224, 0x0F0F0F0FU, 0x06060606U); - psu_mask_write(0xFD070228, 0x0F0F0F0FU, 0x06060606U); - psu_mask_write(0xFD07022C, 0x0000000FU, 0x00000006U); - psu_mask_write(0xFD070240, 0x0F1F0F7CU, 0x04000400U); - psu_mask_write(0xFD070244, 0x00003333U, 0x00000000U); - psu_mask_write(0xFD070250, 0x7FFF3F07U, 0x01002001U); - psu_mask_write(0xFD070264, 0xFF00FFFFU, 0x08000040U); - psu_mask_write(0xFD07026C, 0xFF00FFFFU, 0x08000040U); - psu_mask_write(0xFD070280, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD070284, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD070288, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD07028C, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD070290, 0x0000FFFFU, 0x00000000U); - psu_mask_write(0xFD070294, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD070300, 0x00000011U, 0x00000000U); - psu_mask_write(0xFD07030C, 0x80000033U, 0x00000000U); - psu_mask_write(0xFD070320, 0x00000001U, 0x00000000U); - psu_mask_write(0xFD070400, 0x00000111U, 0x00000001U); - psu_mask_write(0xFD070404, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD070408, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD070490, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD070494, 0x0033000FU, 0x0020000BU); - psu_mask_write(0xFD070498, 0x07FF07FFU, 0x00000000U); - psu_mask_write(0xFD0704B4, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD0704B8, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD070540, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD070544, 0x03330F0FU, 0x02000B03U); - psu_mask_write(0xFD070548, 0x07FF07FFU, 0x00000000U); - psu_mask_write(0xFD070564, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD070568, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD0705F0, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD0705F4, 0x03330F0FU, 0x02000B03U); - psu_mask_write(0xFD0705F8, 0x07FF07FFU, 0x00000000U); - psu_mask_write(0xFD070614, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD070618, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD0706A0, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD0706A4, 0x0033000FU, 0x00100003U); - psu_mask_write(0xFD0706A8, 0x07FF07FFU, 0x0000004FU); - psu_mask_write(0xFD0706AC, 0x0033000FU, 0x00100003U); - psu_mask_write(0xFD0706B0, 0x000007FFU, 0x0000004FU); - psu_mask_write(0xFD0706C4, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD0706C8, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD070750, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD070754, 0x0033000FU, 0x00100003U); - psu_mask_write(0xFD070758, 0x07FF07FFU, 0x0000004FU); - psu_mask_write(0xFD07075C, 0x0033000FU, 0x00100003U); - psu_mask_write(0xFD070760, 0x000007FFU, 0x0000004FU); - psu_mask_write(0xFD070774, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD070778, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD070800, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD070804, 0x0033000FU, 0x00100003U); - psu_mask_write(0xFD070808, 0x07FF07FFU, 0x0000004FU); - psu_mask_write(0xFD07080C, 0x0033000FU, 0x00100003U); - psu_mask_write(0xFD070810, 0x000007FFU, 0x0000004FU); - psu_mask_write(0xFD070F04, 0x000001FFU, 0x00000000U); - psu_mask_write(0xFD070F08, 0x000000FFU, 0x00000000U); - psu_mask_write(0xFD070F0C, 0x000001FFU, 0x00000010U); - psu_mask_write(0xFD070F10, 0x000000FFU, 0x0000000FU); - psu_mask_write(0xFD072190, 0x1FBFBF3FU, 0x07828002U); - psu_mask_write(0xFD1A0108, 0x0000000CU, 0x00000000U); - psu_mask_write(0xFD080010, 0xFFFFFFFFU, 0x87001E00U); - psu_mask_write(0xFD080018, 0xFFFFFFFFU, 0x00F07E38U); - psu_mask_write(0xFD08001C, 0xFFFFFFFFU, 0x55AA5480U); - psu_mask_write(0xFD080024, 0xFFFFFFFFU, 0x010100F4U); - psu_mask_write(0xFD080040, 0xFFFFFFFFU, 0x42C21590U); - psu_mask_write(0xFD080044, 0xFFFFFFFFU, 0xD05512C0U); - psu_mask_write(0xFD080068, 0xFFFFFFFFU, 0x01100000U); - psu_mask_write(0xFD080090, 0xFFFFFFFFU, 0x02A04161U); - psu_mask_write(0xFD0800C0, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD0800C4, 0xFFFFFFFFU, 0x000000E4U); - psu_mask_write(0xFD080100, 0xFFFFFFFFU, 0x0000040DU); - psu_mask_write(0xFD080110, 0xFFFFFFFFU, 0x0B2E1708U); - psu_mask_write(0xFD080114, 0xFFFFFFFFU, 0x282B0711U); - psu_mask_write(0xFD080118, 0xFFFFFFFFU, 0x000F0133U); - psu_mask_write(0xFD08011C, 0xFFFFFFFFU, 0x82000501U); - psu_mask_write(0xFD080120, 0xFFFFFFFFU, 0x012B2B0BU); - psu_mask_write(0xFD080124, 0xFFFFFFFFU, 0x0044260BU); - psu_mask_write(0xFD080128, 0xFFFFFFFFU, 0x00000C18U); - psu_mask_write(0xFD080140, 0xFFFFFFFFU, 0x08400020U); - psu_mask_write(0xFD080144, 0xFFFFFFFFU, 0x00000C80U); - psu_mask_write(0xFD080150, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080154, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080180, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080184, 0xFFFFFFFFU, 0x00000044U); - psu_mask_write(0xFD080188, 0xFFFFFFFFU, 0x00000024U); - psu_mask_write(0xFD08018C, 0xFFFFFFFFU, 0x00000031U); - psu_mask_write(0xFD080190, 0xFFFFFFFFU, 0x00000008U); - psu_mask_write(0xFD080194, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080198, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD0801AC, 0xFFFFFFFFU, 0x00000056U); - psu_mask_write(0xFD0801B0, 0xFFFFFFFFU, 0x00000056U); - psu_mask_write(0xFD0801B4, 0xFFFFFFFFU, 0x00000008U); - psu_mask_write(0xFD0801B8, 0xFFFFFFFFU, 0x00000019U); - psu_mask_write(0xFD0801D8, 0xFFFFFFFFU, 0x00000016U); - psu_mask_write(0xFD080200, 0xFFFFFFFFU, 0x800091C7U); - psu_mask_write(0xFD080204, 0xFFFFFFFFU, 0x00010236U); - psu_mask_write(0xFD080240, 0xFFFFFFFFU, 0x00141054U); - psu_mask_write(0xFD080250, 0xFFFFFFFFU, 0x00088000U); - psu_mask_write(0xFD080414, 0xFFFFFFFFU, 0x12340800U); - psu_mask_write(0xFD0804F4, 0xFFFFFFFFU, 0x0000000AU); - psu_mask_write(0xFD080500, 0xFFFFFFFFU, 0x30000028U); - psu_mask_write(0xFD080508, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD08050C, 0xFFFFFFFFU, 0x00000005U); - psu_mask_write(0xFD080510, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080520, 0xFFFFFFFFU, 0x0300BD99U); - psu_mask_write(0xFD080528, 0xFFFFFFFFU, 0xF1032019U); - psu_mask_write(0xFD08052C, 0xFFFFFFFFU, 0x07F001E3U); - psu_mask_write(0xFD080544, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080548, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080558, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD08055C, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080560, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080564, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080680, 0xFFFFFFFFU, 0x008AAC58U); - psu_mask_write(0xFD080684, 0xFFFFFFFFU, 0x0001B39BU); - psu_mask_write(0xFD080694, 0xFFFFFFFFU, 0x01E10210U); - psu_mask_write(0xFD080698, 0xFFFFFFFFU, 0x01E10000U); - psu_mask_write(0xFD0806A4, 0xFFFFFFFFU, 0x0001BB9BU); - psu_mask_write(0xFD080700, 0xFFFFFFFFU, 0x40800604U); - psu_mask_write(0xFD080704, 0xFFFFFFFFU, 0x00007FFFU); - psu_mask_write(0xFD08070C, 0xFFFFFFFFU, 0x3F000008U); - psu_mask_write(0xFD080710, 0xFFFFFFFFU, 0x0E00F50CU); - psu_mask_write(0xFD080714, 0xFFFFFFFFU, 0x09091616U); - psu_mask_write(0xFD080718, 0xFFFFFFFFU, 0x09092B2BU); - psu_mask_write(0xFD080800, 0xFFFFFFFFU, 0x40800604U); - psu_mask_write(0xFD080804, 0xFFFFFFFFU, 0x00007FFFU); - psu_mask_write(0xFD08080C, 0xFFFFFFFFU, 0x3F000008U); - psu_mask_write(0xFD080810, 0xFFFFFFFFU, 0x0E00F50CU); - psu_mask_write(0xFD080814, 0xFFFFFFFFU, 0x09091616U); - psu_mask_write(0xFD080818, 0xFFFFFFFFU, 0x09092B2BU); - psu_mask_write(0xFD080900, 0xFFFFFFFFU, 0x40800604U); - psu_mask_write(0xFD080904, 0xFFFFFFFFU, 0x00007FFFU); - psu_mask_write(0xFD08090C, 0xFFFFFFFFU, 0x3F000008U); - psu_mask_write(0xFD080910, 0xFFFFFFFFU, 0x0E00F504U); - psu_mask_write(0xFD080914, 0xFFFFFFFFU, 0x09091616U); - psu_mask_write(0xFD080918, 0xFFFFFFFFU, 0x09092B2BU); - psu_mask_write(0xFD080A00, 0xFFFFFFFFU, 0x40800604U); - psu_mask_write(0xFD080A04, 0xFFFFFFFFU, 0x00007FFFU); - psu_mask_write(0xFD080A0C, 0xFFFFFFFFU, 0x3F000008U); - psu_mask_write(0xFD080A10, 0xFFFFFFFFU, 0x0E00F504U); - psu_mask_write(0xFD080A14, 0xFFFFFFFFU, 0x09091616U); - psu_mask_write(0xFD080A18, 0xFFFFFFFFU, 0x09092B2BU); - psu_mask_write(0xFD080B00, 0xFFFFFFFFU, 0x80803660U); - psu_mask_write(0xFD080B04, 0xFFFFFFFFU, 0x55556000U); - psu_mask_write(0xFD080B08, 0xFFFFFFFFU, 0xAAAAAAAAU); - psu_mask_write(0xFD080B0C, 0xFFFFFFFFU, 0x0029A4A4U); - psu_mask_write(0xFD080B10, 0xFFFFFFFFU, 0x0C00BD00U); - psu_mask_write(0xFD080B14, 0xFFFFFFFFU, 0x09091616U); - psu_mask_write(0xFD080B18, 0xFFFFFFFFU, 0x09092B2BU); - psu_mask_write(0xFD080C00, 0xFFFFFFFFU, 0x80803660U); - psu_mask_write(0xFD080C04, 0xFFFFFFFFU, 0x55556000U); - psu_mask_write(0xFD080C08, 0xFFFFFFFFU, 0xAAAAAAAAU); - psu_mask_write(0xFD080C0C, 0xFFFFFFFFU, 0x0029A4A4U); - psu_mask_write(0xFD080C10, 0xFFFFFFFFU, 0x0C00BD00U); - psu_mask_write(0xFD080C14, 0xFFFFFFFFU, 0x09091616U); - psu_mask_write(0xFD080C18, 0xFFFFFFFFU, 0x09092B2BU); - psu_mask_write(0xFD080D00, 0xFFFFFFFFU, 0x80803660U); - psu_mask_write(0xFD080D04, 0xFFFFFFFFU, 0x55556000U); - psu_mask_write(0xFD080D08, 0xFFFFFFFFU, 0xAAAAAAAAU); - psu_mask_write(0xFD080D0C, 0xFFFFFFFFU, 0x0029A4A4U); - psu_mask_write(0xFD080D10, 0xFFFFFFFFU, 0x0C00BD00U); - psu_mask_write(0xFD080D14, 0xFFFFFFFFU, 0x09091616U); - psu_mask_write(0xFD080D18, 0xFFFFFFFFU, 0x09092B2BU); - psu_mask_write(0xFD080E00, 0xFFFFFFFFU, 0x80803660U); - psu_mask_write(0xFD080E04, 0xFFFFFFFFU, 0x55556000U); - psu_mask_write(0xFD080E08, 0xFFFFFFFFU, 0xAAAAAAAAU); - psu_mask_write(0xFD080E0C, 0xFFFFFFFFU, 0x0029A4A4U); - psu_mask_write(0xFD080E10, 0xFFFFFFFFU, 0x0C00BD00U); - psu_mask_write(0xFD080E14, 0xFFFFFFFFU, 0x09091616U); - psu_mask_write(0xFD080E18, 0xFFFFFFFFU, 0x09092B2BU); - psu_mask_write(0xFD080F00, 0xFFFFFFFFU, 0x80803660U); - psu_mask_write(0xFD080F04, 0xFFFFFFFFU, 0x55556000U); - psu_mask_write(0xFD080F08, 0xFFFFFFFFU, 0xAAAAAAAAU); - psu_mask_write(0xFD080F0C, 0xFFFFFFFFU, 0x0029A4A4U); - psu_mask_write(0xFD080F10, 0xFFFFFFFFU, 0x0C00BD00U); - psu_mask_write(0xFD080F14, 0xFFFFFFFFU, 0x09091616U); - psu_mask_write(0xFD080F18, 0xFFFFFFFFU, 0x09092B2BU); - psu_mask_write(0xFD081400, 0xFFFFFFFFU, 0x2A019FFEU); - psu_mask_write(0xFD081404, 0xFFFFFFFFU, 0x01100000U); - psu_mask_write(0xFD08141C, 0xFFFFFFFFU, 0x01264300U); - psu_mask_write(0xFD08142C, 0xFFFFFFFFU, 0x000C1800U); - psu_mask_write(0xFD081430, 0xFFFFFFFFU, 0x71000000U); - psu_mask_write(0xFD081440, 0xFFFFFFFFU, 0x2A019FFEU); - psu_mask_write(0xFD081444, 0xFFFFFFFFU, 0x01100000U); - psu_mask_write(0xFD08145C, 0xFFFFFFFFU, 0x01264300U); - psu_mask_write(0xFD08146C, 0xFFFFFFFFU, 0x000C1800U); - psu_mask_write(0xFD081470, 0xFFFFFFFFU, 0x71000000U); - psu_mask_write(0xFD081480, 0xFFFFFFFFU, 0x15019FFEU); - psu_mask_write(0xFD081484, 0xFFFFFFFFU, 0x21100000U); - psu_mask_write(0xFD08149C, 0xFFFFFFFFU, 0x01266300U); - psu_mask_write(0xFD0814AC, 0xFFFFFFFFU, 0x000C1800U); - psu_mask_write(0xFD0814B0, 0xFFFFFFFFU, 0x70400000U); - psu_mask_write(0xFD0814C0, 0xFFFFFFFFU, 0x15019FFEU); - psu_mask_write(0xFD0814C4, 0xFFFFFFFFU, 0x21100000U); - psu_mask_write(0xFD0814DC, 0xFFFFFFFFU, 0x01266300U); - psu_mask_write(0xFD0814EC, 0xFFFFFFFFU, 0x000C1800U); - psu_mask_write(0xFD0814F0, 0xFFFFFFFFU, 0x70400000U); - psu_mask_write(0xFD081500, 0xFFFFFFFFU, 0x15019FFEU); - psu_mask_write(0xFD081504, 0xFFFFFFFFU, 0x21100000U); - psu_mask_write(0xFD08151C, 0xFFFFFFFFU, 0x01266300U); - psu_mask_write(0xFD08152C, 0xFFFFFFFFU, 0x000C1800U); - psu_mask_write(0xFD081530, 0xFFFFFFFFU, 0x70400000U); - psu_mask_write(0xFD0817DC, 0xFFFFFFFFU, 0x012643C4U); - - return 1; -} - -static unsigned long psu_ddr_qos_init_data(void) -{ - psu_mask_write(0xFD360008, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD36001C, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD370008, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD37001C, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD380008, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD38001C, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD390008, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD39001C, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD3A0008, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD3A001C, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD3B0008, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD3B001C, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFF9B0008, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFF9B001C, 0x0000000FU, 0x00000000U); + if (lane_active == 2) { + Xil_Out32(0xFD40B004, (Xil_In32(0xFD40B004) & 0xFFFFFF1F)); + Xil_Out32(0xFD40B068, 0x1); + Xil_Out32(0xFD40B06C, 0x1); + Xil_Out32(0xFD4090AC, 0x0020); + Xil_Out32(0xFD40B008, 0x0); + Xil_Out32(0xFD40B00C, 0xF4); + Xil_Out32(0xFD40B010, 0x0); + Xil_Out32(0xFD40B014, 0x0); + Xil_Out32(0xFD40B018, 0x00); + Xil_Out32(0xFD40B01C, 0xFB); + Xil_Out32(0xFD40B020, 0xFF); + Xil_Out32(0xFD40B024, 0x0); + Xil_Out32(0xFD40B028, 0x00); + Xil_Out32(0xFD40B02C, 0x00); + Xil_Out32(0xFD40B030, 0x4A); + Xil_Out32(0xFD40B034, 0x4A); + Xil_Out32(0xFD40B038, 0x4A); + Xil_Out32(0xFD40B03C, 0x4A); + Xil_Out32(0xFD40B040, 0x0); + Xil_Out32(0xFD40B044, 0x14); + Xil_Out32(0xFD40B048, 0x02); + Xil_Out32(0xFD40B004, (Xil_In32(0xFD40B004) & 0xFFFFFF1F)); + } + if (lane_active == 3) { + Xil_Out32(0xFD40F004, (Xil_In32(0xFD40F004) & 0xFFFFFF1F)); + Xil_Out32(0xFD40F068, 0x1); + Xil_Out32(0xFD40F06C, 0x1); + Xil_Out32(0xFD40D0AC, 0x0020); + Xil_Out32(0xFD40F008, 0x0); + Xil_Out32(0xFD40F00C, 0xF4); + Xil_Out32(0xFD40F010, 0x0); + Xil_Out32(0xFD40F014, 0x0); + Xil_Out32(0xFD40F018, 0x00); + Xil_Out32(0xFD40F01C, 0xFB); + Xil_Out32(0xFD40F020, 0xFF); + Xil_Out32(0xFD40F024, 0x0); + Xil_Out32(0xFD40F028, 0x00); + Xil_Out32(0xFD40F02C, 0x00); + Xil_Out32(0xFD40F030, 0x4A); + Xil_Out32(0xFD40F034, 0x4A); + Xil_Out32(0xFD40F038, 0x4A); + Xil_Out32(0xFD40F03C, 0x4A); + Xil_Out32(0xFD40F040, 0x0); + Xil_Out32(0xFD40F044, 0x14); + Xil_Out32(0xFD40F048, 0x02); + Xil_Out32(0xFD40F004, (Xil_In32(0xFD40F004) & 0xFFFFFF1F)); + } return 1; } -static unsigned long psu_mio_init_data(void) +static int serdes_bist_run(u32 lane_active) { - psu_mask_write(0xFF180000, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180004, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180008, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF18000C, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180010, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180014, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180018, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF18001C, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180020, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180024, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180028, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF18002C, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180030, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180034, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180038, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF18003C, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180040, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180044, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180048, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF18004C, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180050, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180054, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180058, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF18005C, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180060, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180064, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180068, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF18006C, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180070, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180074, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180078, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF18007C, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180080, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180084, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180088, 0x000000FEU, 0x00000040U); - psu_mask_write(0xFF18008C, 0x000000FEU, 0x00000040U); - psu_mask_write(0xFF180090, 0x000000FEU, 0x00000040U); - psu_mask_write(0xFF180094, 0x000000FEU, 0x00000040U); - psu_mask_write(0xFF180098, 0x000000FEU, 0x000000C0U); - psu_mask_write(0xFF18009C, 0x000000FEU, 0x000000C0U); - psu_mask_write(0xFF1800A0, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF1800A4, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF1800A8, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF1800AC, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF1800B0, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF1800B4, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800B8, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800BC, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800C0, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800C4, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800C8, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800CC, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800D0, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF1800D4, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF1800D8, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF1800DC, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF1800E0, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF1800E4, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF1800E8, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF1800EC, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF1800F0, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF1800F4, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF1800F8, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF1800FC, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180100, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180104, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180108, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF18010C, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180110, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180114, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180118, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF18011C, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180120, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180124, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180128, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF18012C, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180130, 0x000000FEU, 0x00000060U); - psu_mask_write(0xFF180134, 0x000000FEU, 0x00000060U); - psu_mask_write(0xFF180204, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFF180208, 0xFFFFFFFFU, 0x00002040U); - psu_mask_write(0xFF18020C, 0x00003FFFU, 0x00000000U); - psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF18013C, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF180140, 0x03FFFFFFU, 0x00000000U); - psu_mask_write(0xFF180144, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF180148, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x00000000U); - psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF180158, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF18015C, 0x03FFFFFFU, 0x00000000U); - psu_mask_write(0xFF180160, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x00000000U); - psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF180174, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF180178, 0x03FFFFFFU, 0x00000000U); - psu_mask_write(0xFF18017C, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x00000000U); - psu_mask_write(0xFF180200, 0x0000000FU, 0x00000000U); - + if (lane_active == 0) { + psu_mask_write(0xFD410044, 0x00000003U, 0x00000000U); + psu_mask_write(0xFD410040, 0x00000003U, 0x00000000U); + psu_mask_write(0xFD410038, 0x00000007U, 0x00000001U); + Xil_Out32(0xFD4010AC, 0x0020); + Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) | 0x1)); + } + if (lane_active == 1) { + psu_mask_write(0xFD410044, 0x0000000CU, 0x00000000U); + psu_mask_write(0xFD410040, 0x0000000CU, 0x00000000U); + psu_mask_write(0xFD410038, 0x00000070U, 0x00000010U); + Xil_Out32(0xFD4050AC, 0x0020); + Xil_Out32(0xFD407004, (Xil_In32(0xFD407004) | 0x1)); + } + if (lane_active == 2) { + psu_mask_write(0xFD410044, 0x00000030U, 0x00000000U); + psu_mask_write(0xFD410040, 0x00000030U, 0x00000000U); + psu_mask_write(0xFD41003C, 0x00000007U, 0x00000001U); + Xil_Out32(0xFD4090AC, 0x0020); + Xil_Out32(0xFD40B004, (Xil_In32(0xFD40B004) | 0x1)); + } + if (lane_active == 3) { + psu_mask_write(0xFD410040, 0x000000C0U, 0x00000000U); + psu_mask_write(0xFD410044, 0x000000C0U, 0x00000000U); + psu_mask_write(0xFD41003C, 0x00000070U, 0x00000010U); + Xil_Out32(0xFD40D0AC, 0x0020); + Xil_Out32(0xFD40F004, (Xil_In32(0xFD40F004) | 0x1)); + } + mask_delay(100); return 1; } -static unsigned long psu_peripherals_pre_init_data(void) +static int serdes_bist_result(u32 lane_active) { - psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01012302U); + u32 pkt_cnt_l0, pkt_cnt_h0, err_cnt_l0, err_cnt_h0; + if (lane_active == 0) { + pkt_cnt_l0 = Xil_In32(0xFD40304C); + pkt_cnt_h0 = Xil_In32(0xFD403050); + err_cnt_l0 = Xil_In32(0xFD403054); + err_cnt_h0 = Xil_In32(0xFD403058); + } + if (lane_active == 1) { + pkt_cnt_l0 = Xil_In32(0xFD40704C); + pkt_cnt_h0 = Xil_In32(0xFD407050); + err_cnt_l0 = Xil_In32(0xFD407054); + err_cnt_h0 = Xil_In32(0xFD407058); + } + if (lane_active == 2) { + pkt_cnt_l0 = Xil_In32(0xFD40B04C); + pkt_cnt_h0 = Xil_In32(0xFD40B050); + err_cnt_l0 = Xil_In32(0xFD40B054); + err_cnt_h0 = Xil_In32(0xFD40B058); + } + if (lane_active == 3) { + pkt_cnt_l0 = Xil_In32(0xFD40F04C); + pkt_cnt_h0 = Xil_In32(0xFD40F050); + err_cnt_l0 = Xil_In32(0xFD40F054); + err_cnt_h0 = Xil_In32(0xFD40F058); + } + if (lane_active == 0) + Xil_Out32(0xFD403004, 0x0); + if (lane_active == 1) + Xil_Out32(0xFD407004, 0x0); + if (lane_active == 2) + Xil_Out32(0xFD40B004, 0x0); + if (lane_active == 3) + Xil_Out32(0xFD40F004, 0x0); + if (err_cnt_l0 > 0 || err_cnt_h0 > 0 || + (pkt_cnt_l0 == 0 && pkt_cnt_h0 == 0)) + return 0; return 1; } -static unsigned long psu_peripherals_init_data(void) +static int serdes_illcalib_pcie_gen1(u32 pllsel, u32 lane3_protocol, + u32 lane3_rate, u32 lane2_protocol, + u32 lane2_rate, u32 lane1_protocol, + u32 lane1_rate, u32 lane0_protocol, + u32 lane0_rate, u32 gen2_calib) { - psu_mask_write(0xFD1A0100, 0x0000007CU, 0x00000000U); - psu_mask_write(0xFF5E0238, 0x001A0000U, 0x00000000U); - psu_mask_write(0xFF5E023C, 0x0093C018U, 0x00000000U); - psu_mask_write(0xFF5E0230, 0x00000001U, 0x00000000U); - psu_mask_write(0xFF5E0238, 0x00000040U, 0x00000000U); - psu_mask_write(0xFF180310, 0x00008000U, 0x00000000U); - psu_mask_write(0xFF180320, 0x33840000U, 0x00800000U); - psu_mask_write(0xFF18031C, 0x7FFE0000U, 0x64500000U); - psu_mask_write(0xFF180358, 0x00000008U, 0x00000008U); - psu_mask_write(0xFF180324, 0x03C00000U, 0x00000000U); - psu_mask_write(0xFF5E0238, 0x00000600U, 0x00000000U); - psu_mask_write(0xFF5E0238, 0x00000002U, 0x00000000U); - psu_mask_write(0xFF5E0238, 0x00040000U, 0x00000000U); - psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU); - psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U); - psu_mask_write(0xFD5C0060, 0x000F000FU, 0x00000000U); - psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U); - psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x05F5DD18U); - psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U); - return 1; -} + u64 tempbistresult; + u32 currbistresult[4]; + u32 prevbistresult[4]; + u32 itercount = 0; + u32 ill12_val[4], ill1_val[4]; + u32 loop = 0; + u32 iterresult[8]; + u32 meancount[4]; + u32 bistpasscount[4]; + u32 meancountalt[4]; + u32 meancountalt_bistpasscount[4]; + u32 lane0_active; + u32 lane1_active; + u32 lane2_active; + u32 lane3_active; -static unsigned long psu_serdes_init_data(void) -{ - psu_mask_write(0xFD410000, 0x0000001FU, 0x0000000FU); - psu_mask_write(0xFD402860, 0x00000080U, 0x00000080U); - psu_mask_write(0xFD40106C, 0x0000000FU, 0x0000000FU); - psu_mask_write(0xFD4000F4, 0x0000000BU, 0x0000000BU); - psu_mask_write(0xFD401074, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD405074, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD409074, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD40D074, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD40189C, 0x00000080U, 0x00000080U); - psu_mask_write(0xFD4018F8, 0x000000FFU, 0x0000007DU); - psu_mask_write(0xFD4018FC, 0x000000FFU, 0x0000007DU); - psu_mask_write(0xFD401990, 0x000000FFU, 0x00000000U); - psu_mask_write(0xFD401924, 0x000000FFU, 0x00000082U); - psu_mask_write(0xFD401928, 0x000000FFU, 0x00000000U); - psu_mask_write(0xFD401900, 0x000000FFU, 0x00000064U); - psu_mask_write(0xFD40192C, 0x000000FFU, 0x00000000U); - psu_mask_write(0xFD401980, 0x000000FFU, 0x000000FFU); - psu_mask_write(0xFD401914, 0x000000FFU, 0x000000FFU); - psu_mask_write(0xFD401918, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD401940, 0x000000FFU, 0x000000FFU); - psu_mask_write(0xFD401944, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD401994, 0x00000007U, 0x00000007U); - psu_mask_write(0xFD405994, 0x00000007U, 0x00000007U); - psu_mask_write(0xFD409994, 0x00000007U, 0x00000007U); - psu_mask_write(0xFD40D994, 0x00000007U, 0x00000007U); - psu_mask_write(0xFD40107C, 0x0000000FU, 0x00000001U); - psu_mask_write(0xFD40507C, 0x0000000FU, 0x00000001U); - psu_mask_write(0xFD40907C, 0x0000000FU, 0x00000001U); - psu_mask_write(0xFD40D07C, 0x0000000FU, 0x00000001U); - psu_mask_write(0xFD4019A4, 0x000000FFU, 0x000000FFU); - psu_mask_write(0xFD401038, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD40102C, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD4059A4, 0x000000FFU, 0x000000FFU); - psu_mask_write(0xFD405038, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD40502C, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD4099A4, 0x000000FFU, 0x000000FFU); - psu_mask_write(0xFD409038, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD40902C, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD40D9A4, 0x000000FFU, 0x000000FFU); - psu_mask_write(0xFD40D038, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD40D02C, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD4019AC, 0x00000003U, 0x00000000U); - psu_mask_write(0xFD4059AC, 0x00000003U, 0x00000000U); - psu_mask_write(0xFD4099AC, 0x00000003U, 0x00000000U); - psu_mask_write(0xFD40D9AC, 0x00000003U, 0x00000000U); - psu_mask_write(0xFD401978, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD405978, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD409978, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD40D978, 0x00000010U, 0x00000010U); + lane0_active = (lane0_protocol == 1); + lane1_active = (lane1_protocol == 1); + lane2_active = (lane2_protocol == 1); + lane3_active = (lane3_protocol == 1); + for (loop = 0; loop <= 3; loop++) { + iterresult[loop] = 0; + iterresult[loop + 4] = 0; + meancountalt[loop] = 0; + meancountalt_bistpasscount[loop] = 0; + meancount[loop] = 0; + prevbistresult[loop] = 0; + bistpasscount[loop] = 0; + } + itercount = 0; + if (lane0_active) + serdes_bist_static_settings(0); + if (lane1_active) + serdes_bist_static_settings(1); + if (lane2_active) + serdes_bist_static_settings(2); + if (lane3_active) + serdes_bist_static_settings(3); + do { + if (gen2_calib != 1) { + if (lane0_active == 1) + ill1_val[0] = ((0x04 + itercount * 8) % 0x100); + if (lane0_active == 1) + ill12_val[0] = + ((0x04 + itercount * 8) >= + 0x100) ? 0x10 : 0x00; + if (lane1_active == 1) + ill1_val[1] = ((0x04 + itercount * 8) % 0x100); + if (lane1_active == 1) + ill12_val[1] = + ((0x04 + itercount * 8) >= + 0x100) ? 0x10 : 0x00; + if (lane2_active == 1) + ill1_val[2] = ((0x04 + itercount * 8) % 0x100); + if (lane2_active == 1) + ill12_val[2] = + ((0x04 + itercount * 8) >= + 0x100) ? 0x10 : 0x00; + if (lane3_active == 1) + ill1_val[3] = ((0x04 + itercount * 8) % 0x100); + if (lane3_active == 1) + ill12_val[3] = + ((0x04 + itercount * 8) >= + 0x100) ? 0x10 : 0x00; + + if (lane0_active == 1) + Xil_Out32(0xFD401924, ill1_val[0]); + if (lane0_active == 1) + psu_mask_write(0xFD401990, 0x000000F0U, + ill12_val[0]); + if (lane1_active == 1) + Xil_Out32(0xFD405924, ill1_val[1]); + if (lane1_active == 1) + psu_mask_write(0xFD405990, 0x000000F0U, + ill12_val[1]); + if (lane2_active == 1) + Xil_Out32(0xFD409924, ill1_val[2]); + if (lane2_active == 1) + psu_mask_write(0xFD409990, 0x000000F0U, + ill12_val[2]); + if (lane3_active == 1) + Xil_Out32(0xFD40D924, ill1_val[3]); + if (lane3_active == 1) + psu_mask_write(0xFD40D990, 0x000000F0U, + ill12_val[3]); + } + if (gen2_calib == 1) { + if (lane0_active == 1) + ill1_val[0] = ((0x104 + itercount * 8) % 0x100); + if (lane0_active == 1) + ill12_val[0] = + ((0x104 + itercount * 8) >= + 0x200) ? 0x02 : 0x01; + if (lane1_active == 1) + ill1_val[1] = ((0x104 + itercount * 8) % 0x100); + if (lane1_active == 1) + ill12_val[1] = + ((0x104 + itercount * 8) >= + 0x200) ? 0x02 : 0x01; + if (lane2_active == 1) + ill1_val[2] = ((0x104 + itercount * 8) % 0x100); + if (lane2_active == 1) + ill12_val[2] = + ((0x104 + itercount * 8) >= + 0x200) ? 0x02 : 0x01; + if (lane3_active == 1) + ill1_val[3] = ((0x104 + itercount * 8) % 0x100); + if (lane3_active == 1) + ill12_val[3] = + ((0x104 + itercount * 8) >= + 0x200) ? 0x02 : 0x01; + + if (lane0_active == 1) + Xil_Out32(0xFD401928, ill1_val[0]); + if (lane0_active == 1) + psu_mask_write(0xFD401990, 0x0000000FU, + ill12_val[0]); + if (lane1_active == 1) + Xil_Out32(0xFD405928, ill1_val[1]); + if (lane1_active == 1) + psu_mask_write(0xFD405990, 0x0000000FU, + ill12_val[1]); + if (lane2_active == 1) + Xil_Out32(0xFD409928, ill1_val[2]); + if (lane2_active == 1) + psu_mask_write(0xFD409990, 0x0000000FU, + ill12_val[2]); + if (lane3_active == 1) + Xil_Out32(0xFD40D928, ill1_val[3]); + if (lane3_active == 1) + psu_mask_write(0xFD40D990, 0x0000000FU, + ill12_val[3]); + } - serdes_illcalib(0, 0, 0, 0, 0, 0, 5, 0); - psu_mask_write(0xFD410010, 0x00000007U, 0x00000005U); - psu_mask_write(0xFD410040, 0x00000003U, 0x00000000U); - psu_mask_write(0xFD410044, 0x00000003U, 0x00000000U); + if (lane0_active == 1) + psu_mask_write(0xFD401018, 0x00000030U, 0x00000010U); + if (lane1_active == 1) + psu_mask_write(0xFD405018, 0x00000030U, 0x00000010U); + if (lane2_active == 1) + psu_mask_write(0xFD409018, 0x00000030U, 0x00000010U); + if (lane3_active == 1) + psu_mask_write(0xFD40D018, 0x00000030U, 0x00000010U); + if (lane0_active == 1) + currbistresult[0] = 0; + if (lane1_active == 1) + currbistresult[1] = 0; + if (lane2_active == 1) + currbistresult[2] = 0; + if (lane3_active == 1) + currbistresult[3] = 0; + serdes_rst_seq(pllsel, lane3_protocol, lane3_rate, + lane2_protocol, lane2_rate, lane1_protocol, + lane1_rate, lane0_protocol, lane0_rate); + if (lane3_active == 1) + serdes_bist_run(3); + if (lane2_active == 1) + serdes_bist_run(2); + if (lane1_active == 1) + serdes_bist_run(1); + if (lane0_active == 1) + serdes_bist_run(0); + tempbistresult = 0; + if (lane3_active == 1) + tempbistresult = tempbistresult | serdes_bist_result(3); + tempbistresult = tempbistresult << 1; + if (lane2_active == 1) + tempbistresult = tempbistresult | serdes_bist_result(2); + tempbistresult = tempbistresult << 1; + if (lane1_active == 1) + tempbistresult = tempbistresult | serdes_bist_result(1); + tempbistresult = tempbistresult << 1; + if (lane0_active == 1) + tempbistresult = tempbistresult | serdes_bist_result(0); + Xil_Out32(0xFD410098, 0x0); + Xil_Out32(0xFD410098, 0x2); - return 1; -} + if (itercount < 32) { + iterresult[0] = + ((iterresult[0] << 1) | + ((tempbistresult & 0x1) == 0x1)); + iterresult[1] = + ((iterresult[1] << 1) | + ((tempbistresult & 0x2) == 0x2)); + iterresult[2] = + ((iterresult[2] << 1) | + ((tempbistresult & 0x4) == 0x4)); + iterresult[3] = + ((iterresult[3] << 1) | + ((tempbistresult & 0x8) == 0x8)); + } else { + iterresult[4] = + ((iterresult[4] << 1) | + ((tempbistresult & 0x1) == 0x1)); + iterresult[5] = + ((iterresult[5] << 1) | + ((tempbistresult & 0x2) == 0x2)); + iterresult[6] = + ((iterresult[6] << 1) | + ((tempbistresult & 0x4) == 0x4)); + iterresult[7] = + ((iterresult[7] << 1) | + ((tempbistresult & 0x8) == 0x8)); + } + currbistresult[0] = + currbistresult[0] | ((tempbistresult & 0x1) == 1); + currbistresult[1] = + currbistresult[1] | ((tempbistresult & 0x2) == 0x2); + currbistresult[2] = + currbistresult[2] | ((tempbistresult & 0x4) == 0x4); + currbistresult[3] = + currbistresult[3] | ((tempbistresult & 0x8) == 0x8); -static unsigned long psu_resetout_init_data(void) -{ - psu_mask_write(0xFF5E0230, 0x00000001U, 0x00000000U); - psu_mask_write(0xFD480064, 0x00000200U, 0x00000200U); - mask_poll(0xFD4023E4, 0x00000010U); + for (loop = 0; loop <= 3; loop++) { + if (currbistresult[loop] == 1 && + prevbistresult[loop] == 1) + bistpasscount[loop] = bistpasscount[loop] + 1; + if (bistpasscount[loop] < 4 && + currbistresult[loop] == 0 && itercount > 2) { + if (meancountalt_bistpasscount[loop] < + bistpasscount[loop]) { + meancountalt_bistpasscount[loop] = + bistpasscount[loop]; + meancountalt[loop] = + ((itercount - 1) - + ((bistpasscount[loop] + 1) / 2)); + } + bistpasscount[loop] = 0; + } + if (meancount[loop] == 0 && bistpasscount[loop] >= 4 && + (currbistresult[loop] == 0 || itercount == 63) && + prevbistresult[loop] == 1) + meancount[loop] = + itercount - 1 - + ((bistpasscount[loop] + 1) / 2); + prevbistresult[loop] = currbistresult[loop]; + } + } while (++itercount < 64); - return 1; -} + for (loop = 0; loop <= 3; loop++) { + if (lane0_active == 0 && loop == 0) + continue; + if (lane1_active == 0 && loop == 1) + continue; + if (lane2_active == 0 && loop == 2) + continue; + if (lane3_active == 0 && loop == 3) + continue; -static unsigned long psu_resetin_init_data(void) -{ - psu_mask_write(0xFF5E0230, 0x00000001U, 0x00000001U); + if (meancount[loop] == 0) + meancount[loop] = meancountalt[loop]; - return 1; -} + if (gen2_calib != 1) { + ill1_val[loop] = ((0x04 + meancount[loop] * 8) % 0x100); + ill12_val[loop] = + ((0x04 + meancount[loop] * 8) >= + 0x100) ? 0x10 : 0x00; + } + if (gen2_calib == 1) { + ill1_val[loop] = + ((0x104 + meancount[loop] * 8) % 0x100); + ill12_val[loop] = + ((0x104 + meancount[loop] * 8) >= + 0x200) ? 0x02 : 0x01; + } + } + if (gen2_calib != 1) { + if (lane0_active == 1) + Xil_Out32(0xFD401924, ill1_val[0]); + if (lane0_active == 1) + psu_mask_write(0xFD401990, 0x000000F0U, ill12_val[0]); + if (lane1_active == 1) + Xil_Out32(0xFD405924, ill1_val[1]); + if (lane1_active == 1) + psu_mask_write(0xFD405990, 0x000000F0U, ill12_val[1]); + if (lane2_active == 1) + Xil_Out32(0xFD409924, ill1_val[2]); + if (lane2_active == 1) + psu_mask_write(0xFD409990, 0x000000F0U, ill12_val[2]); + if (lane3_active == 1) + Xil_Out32(0xFD40D924, ill1_val[3]); + if (lane3_active == 1) + psu_mask_write(0xFD40D990, 0x000000F0U, ill12_val[3]); + } + if (gen2_calib == 1) { + if (lane0_active == 1) + Xil_Out32(0xFD401928, ill1_val[0]); + if (lane0_active == 1) + psu_mask_write(0xFD401990, 0x0000000FU, ill12_val[0]); + if (lane1_active == 1) + Xil_Out32(0xFD405928, ill1_val[1]); + if (lane1_active == 1) + psu_mask_write(0xFD405990, 0x0000000FU, ill12_val[1]); + if (lane2_active == 1) + Xil_Out32(0xFD409928, ill1_val[2]); + if (lane2_active == 1) + psu_mask_write(0xFD409990, 0x0000000FU, ill12_val[2]); + if (lane3_active == 1) + Xil_Out32(0xFD40D928, ill1_val[3]); + if (lane3_active == 1) + psu_mask_write(0xFD40D990, 0x0000000FU, ill12_val[3]); + } -static unsigned long psu_afi_config(void) -{ - psu_mask_write(0xFD1A0100, 0x00001F80U, 0x00000000U); - psu_mask_write(0xFF5E023C, 0x00080000U, 0x00000000U); - psu_mask_write(0xFF419000, 0x00000300U, 0x00000000U); + if (lane0_active == 1) + psu_mask_write(0xFD401018, 0x00000030U, 0x00000000U); + if (lane1_active == 1) + psu_mask_write(0xFD405018, 0x00000030U, 0x00000000U); + if (lane2_active == 1) + psu_mask_write(0xFD409018, 0x00000030U, 0x00000000U); + if (lane3_active == 1) + psu_mask_write(0xFD40D018, 0x00000030U, 0x00000000U); + Xil_Out32(0xFD410098, 0); + if (lane0_active == 1) { + Xil_Out32(0xFD403004, 0); + Xil_Out32(0xFD403008, 0); + Xil_Out32(0xFD40300C, 0); + Xil_Out32(0xFD403010, 0); + Xil_Out32(0xFD403014, 0); + Xil_Out32(0xFD403018, 0); + Xil_Out32(0xFD40301C, 0); + Xil_Out32(0xFD403020, 0); + Xil_Out32(0xFD403024, 0); + Xil_Out32(0xFD403028, 0); + Xil_Out32(0xFD40302C, 0); + Xil_Out32(0xFD403030, 0); + Xil_Out32(0xFD403034, 0); + Xil_Out32(0xFD403038, 0); + Xil_Out32(0xFD40303C, 0); + Xil_Out32(0xFD403040, 0); + Xil_Out32(0xFD403044, 0); + Xil_Out32(0xFD403048, 0); + Xil_Out32(0xFD40304C, 0); + Xil_Out32(0xFD403050, 0); + Xil_Out32(0xFD403054, 0); + Xil_Out32(0xFD403058, 0); + Xil_Out32(0xFD403068, 1); + Xil_Out32(0xFD40306C, 0); + Xil_Out32(0xFD4010AC, 0); + psu_mask_write(0xFD410044, 0x00000003U, 0x00000001U); + psu_mask_write(0xFD410040, 0x00000003U, 0x00000001U); + psu_mask_write(0xFD410038, 0x00000007U, 0x00000000U); + } + if (lane1_active == 1) { + Xil_Out32(0xFD407004, 0); + Xil_Out32(0xFD407008, 0); + Xil_Out32(0xFD40700C, 0); + Xil_Out32(0xFD407010, 0); + Xil_Out32(0xFD407014, 0); + Xil_Out32(0xFD407018, 0); + Xil_Out32(0xFD40701C, 0); + Xil_Out32(0xFD407020, 0); + Xil_Out32(0xFD407024, 0); + Xil_Out32(0xFD407028, 0); + Xil_Out32(0xFD40702C, 0); + Xil_Out32(0xFD407030, 0); + Xil_Out32(0xFD407034, 0); + Xil_Out32(0xFD407038, 0); + Xil_Out32(0xFD40703C, 0); + Xil_Out32(0xFD407040, 0); + Xil_Out32(0xFD407044, 0); + Xil_Out32(0xFD407048, 0); + Xil_Out32(0xFD40704C, 0); + Xil_Out32(0xFD407050, 0); + Xil_Out32(0xFD407054, 0); + Xil_Out32(0xFD407058, 0); + Xil_Out32(0xFD407068, 1); + Xil_Out32(0xFD40706C, 0); + Xil_Out32(0xFD4050AC, 0); + psu_mask_write(0xFD410044, 0x0000000CU, 0x00000004U); + psu_mask_write(0xFD410040, 0x0000000CU, 0x00000004U); + psu_mask_write(0xFD410038, 0x00000070U, 0x00000000U); + } + if (lane2_active == 1) { + Xil_Out32(0xFD40B004, 0); + Xil_Out32(0xFD40B008, 0); + Xil_Out32(0xFD40B00C, 0); + Xil_Out32(0xFD40B010, 0); + Xil_Out32(0xFD40B014, 0); + Xil_Out32(0xFD40B018, 0); + Xil_Out32(0xFD40B01C, 0); + Xil_Out32(0xFD40B020, 0); + Xil_Out32(0xFD40B024, 0); + Xil_Out32(0xFD40B028, 0); + Xil_Out32(0xFD40B02C, 0); + Xil_Out32(0xFD40B030, 0); + Xil_Out32(0xFD40B034, 0); + Xil_Out32(0xFD40B038, 0); + Xil_Out32(0xFD40B03C, 0); + Xil_Out32(0xFD40B040, 0); + Xil_Out32(0xFD40B044, 0); + Xil_Out32(0xFD40B048, 0); + Xil_Out32(0xFD40B04C, 0); + Xil_Out32(0xFD40B050, 0); + Xil_Out32(0xFD40B054, 0); + Xil_Out32(0xFD40B058, 0); + Xil_Out32(0xFD40B068, 1); + Xil_Out32(0xFD40B06C, 0); + Xil_Out32(0xFD4090AC, 0); + psu_mask_write(0xFD410044, 0x00000030U, 0x00000010U); + psu_mask_write(0xFD410040, 0x00000030U, 0x00000010U); + psu_mask_write(0xFD41003C, 0x00000007U, 0x00000000U); + } + if (lane3_active == 1) { + Xil_Out32(0xFD40F004, 0); + Xil_Out32(0xFD40F008, 0); + Xil_Out32(0xFD40F00C, 0); + Xil_Out32(0xFD40F010, 0); + Xil_Out32(0xFD40F014, 0); + Xil_Out32(0xFD40F018, 0); + Xil_Out32(0xFD40F01C, 0); + Xil_Out32(0xFD40F020, 0); + Xil_Out32(0xFD40F024, 0); + Xil_Out32(0xFD40F028, 0); + Xil_Out32(0xFD40F02C, 0); + Xil_Out32(0xFD40F030, 0); + Xil_Out32(0xFD40F034, 0); + Xil_Out32(0xFD40F038, 0); + Xil_Out32(0xFD40F03C, 0); + Xil_Out32(0xFD40F040, 0); + Xil_Out32(0xFD40F044, 0); + Xil_Out32(0xFD40F048, 0); + Xil_Out32(0xFD40F04C, 0); + Xil_Out32(0xFD40F050, 0); + Xil_Out32(0xFD40F054, 0); + Xil_Out32(0xFD40F058, 0); + Xil_Out32(0xFD40F068, 1); + Xil_Out32(0xFD40F06C, 0); + Xil_Out32(0xFD40D0AC, 0); + psu_mask_write(0xFD410044, 0x000000C0U, 0x00000040U); + psu_mask_write(0xFD410040, 0x000000C0U, 0x00000040U); + psu_mask_write(0xFD41003C, 0x00000070U, 0x00000000U); + } return 1; } -static unsigned long psu_ddr_phybringup_data(void) +static int serdes_illcalib(u32 lane3_protocol, u32 lane3_rate, + u32 lane2_protocol, u32 lane2_rate, + u32 lane1_protocol, u32 lane1_rate, + u32 lane0_protocol, u32 lane0_rate) { - unsigned int regval = 0; - - for (int tp = 0; tp < 20; tp++) - regval = Xil_In32(0xFD070018); - int cur_PLLCR0; - - cur_PLLCR0 = (Xil_In32(0xFD080068U) & 0xFFFFFFFFU) >> 0x00000000U; - int cur_DX8SL0PLLCR0; - - cur_DX8SL0PLLCR0 = (Xil_In32(0xFD081404U) & 0xFFFFFFFFU) >> 0x00000000U; - int cur_DX8SL1PLLCR0; - - cur_DX8SL1PLLCR0 = (Xil_In32(0xFD081444U) & 0xFFFFFFFFU) >> 0x00000000U; - int cur_DX8SL2PLLCR0; - - cur_DX8SL2PLLCR0 = (Xil_In32(0xFD081484U) & 0xFFFFFFFFU) >> 0x00000000U; - int cur_DX8SL3PLLCR0; - - cur_DX8SL3PLLCR0 = (Xil_In32(0xFD0814C4U) & 0xFFFFFFFFU) >> 0x00000000U; - int cur_DX8SL4PLLCR0; - - cur_DX8SL4PLLCR0 = (Xil_In32(0xFD081504U) & 0xFFFFFFFFU) >> 0x00000000U; - int cur_DX8SLBPLLCR0; - - cur_DX8SLBPLLCR0 = (Xil_In32(0xFD0817C4U) & 0xFFFFFFFFU) >> 0x00000000U; - Xil_Out32(0xFD080068, 0x02120000); - Xil_Out32(0xFD081404, 0x02120000); - Xil_Out32(0xFD081444, 0x02120000); - Xil_Out32(0xFD081484, 0x02120000); - Xil_Out32(0xFD0814C4, 0x02120000); - Xil_Out32(0xFD081504, 0x02120000); - Xil_Out32(0xFD0817C4, 0x02120000); - int cur_div2; - - cur_div2 = (Xil_In32(0xFD1A002CU) & 0x00010000U) >> 0x00000010U; - int cur_fbdiv; - - cur_fbdiv = (Xil_In32(0xFD1A002CU) & 0x00007F00U) >> 0x00000008U; - dpll_prog(1, 49, 63, 625, 3, 3, 2); - for (int tp = 0; tp < 20; tp++) - regval = Xil_In32(0xFD070018); - unsigned int pll_retry = 10; - unsigned int pll_locked = 0; - - while ((pll_retry > 0) && (!pll_locked)) { - Xil_Out32(0xFD080004, 0x00040010); - Xil_Out32(0xFD080004, 0x00040011); + unsigned int rdata = 0; + unsigned int sata_gen2 = 1; + unsigned int temp_ill12 = 0; + unsigned int temp_PLL_REF_SEL_OFFSET; + unsigned int temp_TM_IQ_ILL1; + unsigned int temp_TM_E_ILL1; + unsigned int temp_tx_dig_tm_61; + unsigned int temp_tm_dig_6; + unsigned int temp_pll_fbdiv_frac_3_msb_offset; - while ((Xil_In32(0xFD080030) & 0x1) != 1) - ; - pll_locked = (Xil_In32(0xFD080030) & 0x80000000) - >> 31; - pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000) - >> 16; - pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000) >> 16; - pll_retry--; + if (lane0_protocol == 2 || lane0_protocol == 1) { + Xil_Out32(0xFD401910, 0xF3); + Xil_Out32(0xFD40193C, 0xF3); + Xil_Out32(0xFD401914, 0xF3); + Xil_Out32(0xFD401940, 0xF3); + } + if (lane1_protocol == 2 || lane1_protocol == 1) { + Xil_Out32(0xFD405910, 0xF3); + Xil_Out32(0xFD40593C, 0xF3); + Xil_Out32(0xFD405914, 0xF3); + Xil_Out32(0xFD405940, 0xF3); + } + if (lane2_protocol == 2 || lane2_protocol == 1) { + Xil_Out32(0xFD409910, 0xF3); + Xil_Out32(0xFD40993C, 0xF3); + Xil_Out32(0xFD409914, 0xF3); + Xil_Out32(0xFD409940, 0xF3); + } + if (lane3_protocol == 2 || lane3_protocol == 1) { + Xil_Out32(0xFD40D910, 0xF3); + Xil_Out32(0xFD40D93C, 0xF3); + Xil_Out32(0xFD40D914, 0xF3); + Xil_Out32(0xFD40D940, 0xF3); } - Xil_Out32(0xFD0800C4, Xil_In32(0xFD0800C4) | (pll_retry << 16)); - if (!pll_locked) - return 0; - - Xil_Out32(0xFD080004U, 0x00040063U); - Xil_Out32(0xFD0800C0U, 0x00000001U); - - while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU) - ; - prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U); - - while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU) - ; - Xil_Out32(0xFD070010U, 0x80000018U); - Xil_Out32(0xFD0701B0U, 0x00000005U); - regval = Xil_In32(0xFD070018); - while ((regval & 0x1) != 0x0) - regval = Xil_In32(0xFD070018); - - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - Xil_Out32(0xFD070014U, 0x00000331U); - Xil_Out32(0xFD070010U, 0x80000018U); - regval = Xil_In32(0xFD070018); - while ((regval & 0x1) != 0x0) - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - Xil_Out32(0xFD070014U, 0x00000B36U); - Xil_Out32(0xFD070010U, 0x80000018U); - regval = Xil_In32(0xFD070018); - while ((regval & 0x1) != 0x0) - regval = Xil_In32(0xFD070018); + if (sata_gen2 == 1) { + if (lane0_protocol == 2) { + temp_pll_fbdiv_frac_3_msb_offset = Xil_In32(0xFD402360); + Xil_Out32(0xFD402360, 0x0); + temp_PLL_REF_SEL_OFFSET = Xil_In32(0xFD410000); + psu_mask_write(0xFD410000, 0x0000001FU, 0x0000000DU); + temp_TM_IQ_ILL1 = Xil_In32(0xFD4018F8); + temp_TM_E_ILL1 = Xil_In32(0xFD401924); + Xil_Out32(0xFD4018F8, 0x78); + temp_tx_dig_tm_61 = Xil_In32(0xFD4000F4); + temp_tm_dig_6 = Xil_In32(0xFD40106C); + psu_mask_write(0xFD4000F4, 0x0000000BU, 0x00000000U); + psu_mask_write(0xFD40106C, 0x0000000FU, 0x00000000U); + temp_ill12 = Xil_In32(0xFD401990) & 0xF0; - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - Xil_Out32(0xFD070014U, 0x00000C56U); - Xil_Out32(0xFD070010U, 0x80000018U); - regval = Xil_In32(0xFD070018); - while ((regval & 0x1) != 0x0) - regval = Xil_In32(0xFD070018); + serdes_illcalib_pcie_gen1(0, 0, 0, 0, 0, 0, 0, 1, 0, 0); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - Xil_Out32(0xFD070014U, 0x00000E19U); - Xil_Out32(0xFD070010U, 0x80000018U); - regval = Xil_In32(0xFD070018); - while ((regval & 0x1) != 0x0) - regval = Xil_In32(0xFD070018); + Xil_Out32(0xFD402360, temp_pll_fbdiv_frac_3_msb_offset); + Xil_Out32(0xFD410000, temp_PLL_REF_SEL_OFFSET); + Xil_Out32(0xFD4018F8, temp_TM_IQ_ILL1); + Xil_Out32(0xFD4000F4, temp_tx_dig_tm_61); + Xil_Out32(0xFD40106C, temp_tm_dig_6); + Xil_Out32(0xFD401928, Xil_In32(0xFD401924)); + temp_ill12 = + temp_ill12 | (Xil_In32(0xFD401990) >> 4 & 0xF); + Xil_Out32(0xFD401990, temp_ill12); + Xil_Out32(0xFD401924, temp_TM_E_ILL1); + } + if (lane1_protocol == 2) { + temp_pll_fbdiv_frac_3_msb_offset = Xil_In32(0xFD406360); + Xil_Out32(0xFD406360, 0x0); + temp_PLL_REF_SEL_OFFSET = Xil_In32(0xFD410004); + psu_mask_write(0xFD410004, 0x0000001FU, 0x0000000DU); + temp_TM_IQ_ILL1 = Xil_In32(0xFD4058F8); + temp_TM_E_ILL1 = Xil_In32(0xFD405924); + Xil_Out32(0xFD4058F8, 0x78); + temp_tx_dig_tm_61 = Xil_In32(0xFD4040F4); + temp_tm_dig_6 = Xil_In32(0xFD40506C); + psu_mask_write(0xFD4040F4, 0x0000000BU, 0x00000000U); + psu_mask_write(0xFD40506C, 0x0000000FU, 0x00000000U); + temp_ill12 = Xil_In32(0xFD405990) & 0xF0; - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - regval = Xil_In32(0xFD070018); - Xil_Out32(0xFD070014U, 0x00001616U); - Xil_Out32(0xFD070010U, 0x80000018U); - Xil_Out32(0xFD070010U, 0x80000010U); - Xil_Out32(0xFD0701B0U, 0x00000005U); - Xil_Out32(0xFD070320U, 0x00000001U); - while ((Xil_In32(0xFD070004U) & 0x0000000FU) != 0x00000001U) - ; - prog_reg(0xFD0701B0U, 0x00000001U, 0x00000000U, 0x00000000U); - prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U); - prog_reg(0xFD080028U, 0x00000001U, 0x00000000U, 0x00000001U); - prog_reg(0xFD080004U, 0x20000000U, 0x0000001DU, 0x00000001U); - prog_reg(0xFD08016CU, 0x00000004U, 0x00000002U, 0x00000001U); - prog_reg(0xFD080168U, 0x000000F0U, 0x00000004U, 0x00000007U); - prog_reg(0xFD080168U, 0x00000F00U, 0x00000008U, 0x00000002U); - prog_reg(0xFD080168U, 0x0000000FU, 0x00000000U, 0x00000001U); - for (int tp = 0; tp < 20; tp++) - regval = Xil_In32(0xFD070018); + serdes_illcalib_pcie_gen1(1, 0, 0, 0, 0, 1, 0, 0, 0, 0); - Xil_Out32(0xFD080068, cur_PLLCR0); - Xil_Out32(0xFD081404, cur_DX8SL0PLLCR0); - Xil_Out32(0xFD081444, cur_DX8SL1PLLCR0); - Xil_Out32(0xFD081484, cur_DX8SL2PLLCR0); - Xil_Out32(0xFD0814C4, cur_DX8SL3PLLCR0); - Xil_Out32(0xFD081504, cur_DX8SL4PLLCR0); - Xil_Out32(0xFD0817C4, cur_DX8SLBPLLCR0); - for (int tp = 0; tp < 20; tp++) - regval = Xil_In32(0xFD070018); + Xil_Out32(0xFD406360, temp_pll_fbdiv_frac_3_msb_offset); + Xil_Out32(0xFD410004, temp_PLL_REF_SEL_OFFSET); + Xil_Out32(0xFD4058F8, temp_TM_IQ_ILL1); + Xil_Out32(0xFD4040F4, temp_tx_dig_tm_61); + Xil_Out32(0xFD40506C, temp_tm_dig_6); + Xil_Out32(0xFD405928, Xil_In32(0xFD405924)); + temp_ill12 = + temp_ill12 | (Xil_In32(0xFD405990) >> 4 & 0xF); + Xil_Out32(0xFD405990, temp_ill12); + Xil_Out32(0xFD405924, temp_TM_E_ILL1); + } + if (lane2_protocol == 2) { + temp_pll_fbdiv_frac_3_msb_offset = Xil_In32(0xFD40A360); + Xil_Out32(0xFD40A360, 0x0); + temp_PLL_REF_SEL_OFFSET = Xil_In32(0xFD410008); + psu_mask_write(0xFD410008, 0x0000001FU, 0x0000000DU); + temp_TM_IQ_ILL1 = Xil_In32(0xFD4098F8); + temp_TM_E_ILL1 = Xil_In32(0xFD409924); + Xil_Out32(0xFD4098F8, 0x78); + temp_tx_dig_tm_61 = Xil_In32(0xFD4080F4); + temp_tm_dig_6 = Xil_In32(0xFD40906C); + psu_mask_write(0xFD4080F4, 0x0000000BU, 0x00000000U); + psu_mask_write(0xFD40906C, 0x0000000FU, 0x00000000U); + temp_ill12 = Xil_In32(0xFD409990) & 0xF0; - dpll_prog(cur_div2, cur_fbdiv, 63, 625, 3, 3, 2); - for (int tp = 0; tp < 2000; tp++) - regval = Xil_In32(0xFD070018); + serdes_illcalib_pcie_gen1(2, 0, 0, 1, 0, 0, 0, 0, 0, 0); - prog_reg(0xFD080004U, 0x20000000U, 0x0000001DU, 0x00000000U); - prog_reg(0xFD080004U, 0x00040000U, 0x00000012U, 0x00000001U); - prog_reg(0xFD080004U, 0x00000040U, 0x00000006U, 0x00000001U); - prog_reg(0xFD080004U, 0x00000020U, 0x00000005U, 0x00000001U); - prog_reg(0xFD080004U, 0x00000010U, 0x00000004U, 0x00000001U); - prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U); + Xil_Out32(0xFD40A360, temp_pll_fbdiv_frac_3_msb_offset); + Xil_Out32(0xFD410008, temp_PLL_REF_SEL_OFFSET); + Xil_Out32(0xFD4098F8, temp_TM_IQ_ILL1); + Xil_Out32(0xFD4080F4, temp_tx_dig_tm_61); + Xil_Out32(0xFD40906C, temp_tm_dig_6); + Xil_Out32(0xFD409928, Xil_In32(0xFD409924)); + temp_ill12 = + temp_ill12 | (Xil_In32(0xFD409990) >> 4 & 0xF); + Xil_Out32(0xFD409990, temp_ill12); + Xil_Out32(0xFD409924, temp_TM_E_ILL1); + } + if (lane3_protocol == 2) { + temp_pll_fbdiv_frac_3_msb_offset = Xil_In32(0xFD40E360); + Xil_Out32(0xFD40E360, 0x0); + temp_PLL_REF_SEL_OFFSET = Xil_In32(0xFD41000C); + psu_mask_write(0xFD41000C, 0x0000001FU, 0x0000000DU); + temp_TM_IQ_ILL1 = Xil_In32(0xFD40D8F8); + temp_TM_E_ILL1 = Xil_In32(0xFD40D924); + Xil_Out32(0xFD40D8F8, 0x78); + temp_tx_dig_tm_61 = Xil_In32(0xFD40C0F4); + temp_tm_dig_6 = Xil_In32(0xFD40D06C); + psu_mask_write(0xFD40C0F4, 0x0000000BU, 0x00000000U); + psu_mask_write(0xFD40D06C, 0x0000000FU, 0x00000000U); + temp_ill12 = Xil_In32(0xFD40D990) & 0xF0; - while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU) - ; - prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U); + serdes_illcalib_pcie_gen1(3, 1, 0, 0, 0, 0, 0, 0, 0, 0); - while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU) - ; - for (int tp = 0; tp < 2000; tp++) - regval = Xil_In32(0xFD070018); + Xil_Out32(0xFD40E360, temp_pll_fbdiv_frac_3_msb_offset); + Xil_Out32(0xFD41000C, temp_PLL_REF_SEL_OFFSET); + Xil_Out32(0xFD40D8F8, temp_TM_IQ_ILL1); + Xil_Out32(0xFD40C0F4, temp_tx_dig_tm_61); + Xil_Out32(0xFD40D06C, temp_tm_dig_6); + Xil_Out32(0xFD40D928, Xil_In32(0xFD40D924)); + temp_ill12 = + temp_ill12 | (Xil_In32(0xFD40D990) >> 4 & 0xF); + Xil_Out32(0xFD40D990, temp_ill12); + Xil_Out32(0xFD40D924, temp_TM_E_ILL1); + } + rdata = Xil_In32(0xFD410098); + rdata = (rdata & 0xDF); + Xil_Out32(0xFD410098, rdata); + } - prog_reg(0xFD080028U, 0x00000001U, 0x00000000U, 0x00000000U); - prog_reg(0xFD08016CU, 0x00000004U, 0x00000002U, 0x00000001U); - prog_reg(0xFD080168U, 0x000000F0U, 0x00000004U, 0x00000007U); - prog_reg(0xFD080168U, 0x00000F00U, 0x00000008U, 0x00000003U); - prog_reg(0xFD080168U, 0x0000000FU, 0x00000000U, 0x00000001U); - for (int tp = 0; tp < 2000; tp++) - regval = Xil_In32(0xFD070018); + if (lane0_protocol == 2 && lane0_rate == 3) { + psu_mask_write(0xFD40198C, 0x000000F0U, 0x00000020U); + psu_mask_write(0xFD40192C, 0x000000FFU, 0x00000094U); + } + if (lane1_protocol == 2 && lane1_rate == 3) { + psu_mask_write(0xFD40598C, 0x000000F0U, 0x00000020U); + psu_mask_write(0xFD40592C, 0x000000FFU, 0x00000094U); + } + if (lane2_protocol == 2 && lane2_rate == 3) { + psu_mask_write(0xFD40998C, 0x000000F0U, 0x00000020U); + psu_mask_write(0xFD40992C, 0x000000FFU, 0x00000094U); + } + if (lane3_protocol == 2 && lane3_rate == 3) { + psu_mask_write(0xFD40D98C, 0x000000F0U, 0x00000020U); + psu_mask_write(0xFD40D92C, 0x000000FFU, 0x00000094U); + } - prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U); - Xil_Out32(0xFD080004, 0x0014FE01); + if (lane0_protocol == 1) { + if (lane0_rate == 0) { + serdes_illcalib_pcie_gen1(0, lane3_protocol, lane3_rate, + lane2_protocol, lane2_rate, + lane1_protocol, lane1_rate, + lane0_protocol, 0, 0); + } else { + serdes_illcalib_pcie_gen1(0, lane3_protocol, lane3_rate, + lane2_protocol, lane2_rate, + lane1_protocol, lane1_rate, + lane0_protocol, 0, 0); + serdes_illcalib_pcie_gen1(0, lane3_protocol, lane3_rate, + lane2_protocol, lane2_rate, + lane1_protocol, lane1_rate, + lane0_protocol, lane0_rate, + 1); + } + } - regval = Xil_In32(0xFD080030); - while (regval != 0x8000007E) - regval = Xil_In32(0xFD080030); + if (lane0_protocol == 3) + Xil_Out32(0xFD401914, 0xF3); + if (lane0_protocol == 3) + Xil_Out32(0xFD401940, 0xF3); + if (lane0_protocol == 3) + Xil_Out32(0xFD401990, 0x20); + if (lane0_protocol == 3) + Xil_Out32(0xFD401924, 0x37); - Xil_Out32(0xFD080200U, 0x000091C7U); - regval = Xil_In32(0xFD080030); - while (regval != 0x80008FFF) - regval = Xil_In32(0xFD080030); + if (lane1_protocol == 3) + Xil_Out32(0xFD405914, 0xF3); + if (lane1_protocol == 3) + Xil_Out32(0xFD405940, 0xF3); + if (lane1_protocol == 3) + Xil_Out32(0xFD405990, 0x20); + if (lane1_protocol == 3) + Xil_Out32(0xFD405924, 0x37); - Xil_Out32(0xFD080200U, 0x800091C7U); - regval = ((Xil_In32(0xFD080030) & 0x1FFF0000) >> 18); - if (regval != 0) - return 0; - prog_reg(0xFD070320U, 0x00000001U, 0x00000000U, 0x00000000U); - prog_reg(0xFD0701B0U, 0x00000001U, 0x00000000U, 0x00000001U); - prog_reg(0xFD0701A0U, 0x80000000U, 0x0000001FU, 0x00000000U); - prog_reg(0xFD070320U, 0x00000001U, 0x00000000U, 0x00000001U); - Xil_Out32(0xFD070180U, 0x02160010U); - Xil_Out32(0xFD070060U, 0x00000000U); - prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000000U); - for (int tp = 0; tp < 4000; tp++) - regval = Xil_In32(0xFD070018); + if (lane2_protocol == 3) + Xil_Out32(0xFD409914, 0xF3); + if (lane2_protocol == 3) + Xil_Out32(0xFD409940, 0xF3); + if (lane2_protocol == 3) + Xil_Out32(0xFD409990, 0x20); + if (lane2_protocol == 3) + Xil_Out32(0xFD409924, 0x37); - prog_reg(0xFD080090U, 0x00000FC0U, 0x00000006U, 0x00000007U); - prog_reg(0xFD080090U, 0x00000004U, 0x00000002U, 0x00000001U); - prog_reg(0xFD08070CU, 0x02000000U, 0x00000019U, 0x00000000U); - prog_reg(0xFD08080CU, 0x02000000U, 0x00000019U, 0x00000000U); - prog_reg(0xFD08090CU, 0x02000000U, 0x00000019U, 0x00000000U); - prog_reg(0xFD080A0CU, 0x02000000U, 0x00000019U, 0x00000000U); - prog_reg(0xFD080F0CU, 0x02000000U, 0x00000019U, 0x00000000U); - prog_reg(0xFD080200U, 0x00000010U, 0x00000004U, 0x00000001U); - prog_reg(0xFD080250U, 0x00000002U, 0x00000001U, 0x00000000U); - prog_reg(0xFD080250U, 0x0000000CU, 0x00000002U, 0x00000001U); - prog_reg(0xFD080250U, 0x000000F0U, 0x00000004U, 0x00000000U); - prog_reg(0xFD080250U, 0x00300000U, 0x00000014U, 0x00000001U); - prog_reg(0xFD080250U, 0xF0000000U, 0x0000001CU, 0x00000002U); - prog_reg(0xFD08070CU, 0x08000000U, 0x0000001BU, 0x00000000U); - prog_reg(0xFD08080CU, 0x08000000U, 0x0000001BU, 0x00000000U); - prog_reg(0xFD08090CU, 0x08000000U, 0x0000001BU, 0x00000000U); - prog_reg(0xFD080A0CU, 0x08000000U, 0x0000001BU, 0x00000000U); - prog_reg(0xFD080B0CU, 0x08000000U, 0x0000001BU, 0x00000000U); - prog_reg(0xFD080C0CU, 0x08000000U, 0x0000001BU, 0x00000000U); - prog_reg(0xFD080D0CU, 0x08000000U, 0x0000001BU, 0x00000000U); - prog_reg(0xFD080E0CU, 0x08000000U, 0x0000001BU, 0x00000000U); - prog_reg(0xFD080F0CU, 0x08000000U, 0x0000001BU, 0x00000000U); - prog_reg(0xFD080254U, 0x000000FFU, 0x00000000U, 0x00000001U); - prog_reg(0xFD080254U, 0x000F0000U, 0x00000010U, 0x0000000AU); - prog_reg(0xFD080250U, 0x00000001U, 0x00000000U, 0x00000001U); + if (lane3_protocol == 3) + Xil_Out32(0xFD40D914, 0xF3); + if (lane3_protocol == 3) + Xil_Out32(0xFD40D940, 0xF3); + if (lane3_protocol == 3) + Xil_Out32(0xFD40D990, 0x20); + if (lane3_protocol == 3) + Xil_Out32(0xFD40D924, 0x37); return 1; } -static int serdes_rst_seq(u32 pllsel, u32 lane3_protocol, u32 lane3_rate, - u32 lane2_protocol, u32 lane2_rate, - u32 lane1_protocol, u32 lane1_rate, - u32 lane0_protocol, u32 lane0_rate) +static void dpll_prog(int div2, int ddr_pll_fbdiv, int d_lock_dly, + int d_lock_cnt, int d_lfhf, int d_cp, int d_res) { - Xil_Out32(0xFD410098, 0x00000000); - Xil_Out32(0xFD401010, 0x00000040); - Xil_Out32(0xFD405010, 0x00000040); - Xil_Out32(0xFD409010, 0x00000040); - Xil_Out32(0xFD40D010, 0x00000040); - Xil_Out32(0xFD402084, 0x00000080); - Xil_Out32(0xFD406084, 0x00000080); - Xil_Out32(0xFD40A084, 0x00000080); - Xil_Out32(0xFD40E084, 0x00000080); - Xil_Out32(0xFD410098, 0x00000004); - mask_delay(50); - if (lane0_rate == 1) - Xil_Out32(0xFD410098, 0x0000000E); - Xil_Out32(0xFD410098, 0x00000006); - if (lane0_rate == 1) { - Xil_Out32(0xFD40000C, 0x00000004); - Xil_Out32(0xFD40400C, 0x00000004); - Xil_Out32(0xFD40800C, 0x00000004); - Xil_Out32(0xFD40C00C, 0x00000004); - Xil_Out32(0xFD410098, 0x00000007); - mask_delay(400); - Xil_Out32(0xFD40000C, 0x0000000C); - Xil_Out32(0xFD40400C, 0x0000000C); - Xil_Out32(0xFD40800C, 0x0000000C); - Xil_Out32(0xFD40C00C, 0x0000000C); - mask_delay(15); - Xil_Out32(0xFD410098, 0x0000000F); - mask_delay(100); - } - if (pllsel == 0) - mask_poll(0xFD4023E4, 0x00000010U); - if (pllsel == 1) - mask_poll(0xFD4063E4, 0x00000010U); - if (pllsel == 2) - mask_poll(0xFD40A3E4, 0x00000010U); - if (pllsel == 3) - mask_poll(0xFD40E3E4, 0x00000010U); - mask_delay(50); - Xil_Out32(0xFD401010, 0x000000C0); - Xil_Out32(0xFD405010, 0x000000C0); - Xil_Out32(0xFD409010, 0x000000C0); - Xil_Out32(0xFD40D010, 0x000000C0); - Xil_Out32(0xFD401010, 0x00000080); - Xil_Out32(0xFD405010, 0x00000080); - Xil_Out32(0xFD409010, 0x00000080); - Xil_Out32(0xFD40D010, 0x00000080); + unsigned int pll_ctrl_regval; + unsigned int pll_status_regval; - Xil_Out32(0xFD402084, 0x000000C0); - Xil_Out32(0xFD406084, 0x000000C0); - Xil_Out32(0xFD40A084, 0x000000C0); - Xil_Out32(0xFD40E084, 0x000000C0); - mask_delay(50); - Xil_Out32(0xFD402084, 0x00000080); - Xil_Out32(0xFD406084, 0x00000080); - Xil_Out32(0xFD40A084, 0x00000080); - Xil_Out32(0xFD40E084, 0x00000080); - mask_delay(50); - Xil_Out32(0xFD401010, 0x00000000); - Xil_Out32(0xFD405010, 0x00000000); - Xil_Out32(0xFD409010, 0x00000000); - Xil_Out32(0xFD40D010, 0x00000000); - Xil_Out32(0xFD402084, 0x00000000); - Xil_Out32(0xFD406084, 0x00000000); - Xil_Out32(0xFD40A084, 0x00000000); - Xil_Out32(0xFD40E084, 0x00000000); - mask_delay(500); - return 1; -} + pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C)); + pll_ctrl_regval = pll_ctrl_regval & (~0x00010000U); + pll_ctrl_regval = pll_ctrl_regval | (div2 << 16); + Xil_Out32(((0xFD1A0000U) + 0x0000002C), pll_ctrl_regval); -static int serdes_bist_static_settings(u32 lane_active) -{ - if (lane_active == 0) { - Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) & 0xFFFFFF1F)); - Xil_Out32(0xFD403068, 0x1); - Xil_Out32(0xFD40306C, 0x1); - Xil_Out32(0xFD4010AC, 0x0020); - Xil_Out32(0xFD403008, 0x0); - Xil_Out32(0xFD40300C, 0xF4); - Xil_Out32(0xFD403010, 0x0); - Xil_Out32(0xFD403014, 0x0); - Xil_Out32(0xFD403018, 0x00); - Xil_Out32(0xFD40301C, 0xFB); - Xil_Out32(0xFD403020, 0xFF); - Xil_Out32(0xFD403024, 0x0); - Xil_Out32(0xFD403028, 0x00); - Xil_Out32(0xFD40302C, 0x00); - Xil_Out32(0xFD403030, 0x4A); - Xil_Out32(0xFD403034, 0x4A); - Xil_Out32(0xFD403038, 0x4A); - Xil_Out32(0xFD40303C, 0x4A); - Xil_Out32(0xFD403040, 0x0); - Xil_Out32(0xFD403044, 0x14); - Xil_Out32(0xFD403048, 0x02); - Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) & 0xFFFFFF1F)); - } - if (lane_active == 1) { - Xil_Out32(0xFD407004, (Xil_In32(0xFD407004) & 0xFFFFFF1F)); - Xil_Out32(0xFD407068, 0x1); - Xil_Out32(0xFD40706C, 0x1); - Xil_Out32(0xFD4050AC, 0x0020); - Xil_Out32(0xFD407008, 0x0); - Xil_Out32(0xFD40700C, 0xF4); - Xil_Out32(0xFD407010, 0x0); - Xil_Out32(0xFD407014, 0x0); - Xil_Out32(0xFD407018, 0x00); - Xil_Out32(0xFD40701C, 0xFB); - Xil_Out32(0xFD407020, 0xFF); - Xil_Out32(0xFD407024, 0x0); - Xil_Out32(0xFD407028, 0x00); - Xil_Out32(0xFD40702C, 0x00); - Xil_Out32(0xFD407030, 0x4A); - Xil_Out32(0xFD407034, 0x4A); - Xil_Out32(0xFD407038, 0x4A); - Xil_Out32(0xFD40703C, 0x4A); - Xil_Out32(0xFD407040, 0x0); - Xil_Out32(0xFD407044, 0x14); - Xil_Out32(0xFD407048, 0x02); - Xil_Out32(0xFD407004, (Xil_In32(0xFD407004) & 0xFFFFFF1F)); - } + pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030)); + pll_ctrl_regval = pll_ctrl_regval & (~0xFE000000U); + pll_ctrl_regval = pll_ctrl_regval | (d_lock_dly << 25); + Xil_Out32(((0xFD1A0000U) + 0x00000030), pll_ctrl_regval); - if (lane_active == 2) { - Xil_Out32(0xFD40B004, (Xil_In32(0xFD40B004) & 0xFFFFFF1F)); - Xil_Out32(0xFD40B068, 0x1); - Xil_Out32(0xFD40B06C, 0x1); - Xil_Out32(0xFD4090AC, 0x0020); - Xil_Out32(0xFD40B008, 0x0); - Xil_Out32(0xFD40B00C, 0xF4); - Xil_Out32(0xFD40B010, 0x0); - Xil_Out32(0xFD40B014, 0x0); - Xil_Out32(0xFD40B018, 0x00); - Xil_Out32(0xFD40B01C, 0xFB); - Xil_Out32(0xFD40B020, 0xFF); - Xil_Out32(0xFD40B024, 0x0); - Xil_Out32(0xFD40B028, 0x00); - Xil_Out32(0xFD40B02C, 0x00); - Xil_Out32(0xFD40B030, 0x4A); - Xil_Out32(0xFD40B034, 0x4A); - Xil_Out32(0xFD40B038, 0x4A); - Xil_Out32(0xFD40B03C, 0x4A); - Xil_Out32(0xFD40B040, 0x0); - Xil_Out32(0xFD40B044, 0x14); - Xil_Out32(0xFD40B048, 0x02); - Xil_Out32(0xFD40B004, (Xil_In32(0xFD40B004) & 0xFFFFFF1F)); - } + pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030)); + pll_ctrl_regval = pll_ctrl_regval & (~0x007FE000U); + pll_ctrl_regval = pll_ctrl_regval | (d_lock_cnt << 13); + Xil_Out32(((0xFD1A0000U) + 0x00000030), pll_ctrl_regval); + + pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030)); + pll_ctrl_regval = pll_ctrl_regval & (~0x00000C00U); + pll_ctrl_regval = pll_ctrl_regval | (d_lfhf << 10); + Xil_Out32(((0xFD1A0000U) + 0x00000030), pll_ctrl_regval); + + pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030)); + pll_ctrl_regval = pll_ctrl_regval & (~0x000001E0U); + pll_ctrl_regval = pll_ctrl_regval | (d_cp << 5); + Xil_Out32(((0xFD1A0000U) + 0x00000030), pll_ctrl_regval); + + pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030)); + pll_ctrl_regval = pll_ctrl_regval & (~0x0000000FU); + pll_ctrl_regval = pll_ctrl_regval | (d_res << 0); + Xil_Out32(((0xFD1A0000U) + 0x00000030), pll_ctrl_regval); + + pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C)); + pll_ctrl_regval = pll_ctrl_regval & (~0x00007F00U); + pll_ctrl_regval = pll_ctrl_regval | (ddr_pll_fbdiv << 8); + Xil_Out32(((0xFD1A0000U) + 0x0000002C), pll_ctrl_regval); + + pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C)); + pll_ctrl_regval = pll_ctrl_regval & (~0x00000008U); + pll_ctrl_regval = pll_ctrl_regval | (1 << 3); + Xil_Out32(((0xFD1A0000U) + 0x0000002C), pll_ctrl_regval); + + pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C)); + pll_ctrl_regval = pll_ctrl_regval & (~0x00000001U); + pll_ctrl_regval = pll_ctrl_regval | (1 << 0); + Xil_Out32(((0xFD1A0000U) + 0x0000002C), pll_ctrl_regval); + + pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C)); + pll_ctrl_regval = pll_ctrl_regval & (~0x00000001U); + pll_ctrl_regval = pll_ctrl_regval | (0 << 0); + Xil_Out32(((0xFD1A0000U) + 0x0000002C), pll_ctrl_regval); + + pll_status_regval = 0x00000000; + while ((pll_status_regval & 0x00000002U) != 0x00000002U) + pll_status_regval = Xil_In32(((0xFD1A0000U) + 0x00000044)); + + pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C)); + pll_ctrl_regval = pll_ctrl_regval & (~0x00000008U); + pll_ctrl_regval = pll_ctrl_regval | (0 << 3); + Xil_Out32(((0xFD1A0000U) + 0x0000002C), pll_ctrl_regval); +} + +static unsigned long psu_pll_init_data(void) +{ + psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4B0C62U); + psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00014600U); + psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000008U); + psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000001U); + psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000000U); + mask_poll(0xFF5E0040, 0x00000002U); + psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000000U); + psu_mask_write(0xFF5E0048, 0x00003F00U, 0x00000300U); + psu_mask_write(0xFF5E0038, 0x8000FFFFU, 0x00000000U); + psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01012300U); + psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E672C6CU); + psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00002D00U); + psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000008U); + psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000001U); + psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000000U); + mask_poll(0xFF5E0040, 0x00000001U); + psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000000U); + psu_mask_write(0xFF5E0044, 0x00003F00U, 0x00000300U); + psu_mask_write(0xFF5E0028, 0x8000FFFFU, 0x00000000U); + psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U); + psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014800U); + psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000008U); + psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000000U); + mask_poll(0xFD1A0044, 0x00000001U); + psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000000U); + psu_mask_write(0xFD1A0048, 0x00003F00U, 0x00000300U); + psu_mask_write(0xFD1A0028, 0x8000FFFFU, 0x00000000U); + psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U); + psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00014000U); + psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000008U); + psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000000U); + mask_poll(0xFD1A0044, 0x00000002U); + psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000000U); + psu_mask_write(0xFD1A004C, 0x00003F00U, 0x00000300U); + psu_mask_write(0xFD1A0034, 0x8000FFFFU, 0x00000000U); + psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E4B0C62U); + psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00014700U); + psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000008U); + psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000000U); + mask_poll(0xFD1A0044, 0x00000004U); + psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000000U); + psu_mask_write(0xFD1A0050, 0x00003F00U, 0x00000300U); + psu_mask_write(0xFD1A0040, 0x8000FFFFU, 0x00000000U); - if (lane_active == 3) { - Xil_Out32(0xFD40F004, (Xil_In32(0xFD40F004) & 0xFFFFFF1F)); - Xil_Out32(0xFD40F068, 0x1); - Xil_Out32(0xFD40F06C, 0x1); - Xil_Out32(0xFD40D0AC, 0x0020); - Xil_Out32(0xFD40F008, 0x0); - Xil_Out32(0xFD40F00C, 0xF4); - Xil_Out32(0xFD40F010, 0x0); - Xil_Out32(0xFD40F014, 0x0); - Xil_Out32(0xFD40F018, 0x00); - Xil_Out32(0xFD40F01C, 0xFB); - Xil_Out32(0xFD40F020, 0xFF); - Xil_Out32(0xFD40F024, 0x0); - Xil_Out32(0xFD40F028, 0x00); - Xil_Out32(0xFD40F02C, 0x00); - Xil_Out32(0xFD40F030, 0x4A); - Xil_Out32(0xFD40F034, 0x4A); - Xil_Out32(0xFD40F038, 0x4A); - Xil_Out32(0xFD40F03C, 0x4A); - Xil_Out32(0xFD40F040, 0x0); - Xil_Out32(0xFD40F044, 0x14); - Xil_Out32(0xFD40F048, 0x02); - Xil_Out32(0xFD40F004, (Xil_In32(0xFD40F004) & 0xFFFFFF1F)); - } return 1; } -static int serdes_bist_run(u32 lane_active) +static unsigned long psu_clock_init_data(void) { - if (lane_active == 0) { - psu_mask_write(0xFD410044, 0x00000003U, 0x00000000U); - psu_mask_write(0xFD410040, 0x00000003U, 0x00000000U); - psu_mask_write(0xFD410038, 0x00000007U, 0x00000001U); - Xil_Out32(0xFD4010AC, 0x0020); - Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) | 0x1)); - } - if (lane_active == 1) { - psu_mask_write(0xFD410044, 0x0000000CU, 0x00000000U); - psu_mask_write(0xFD410040, 0x0000000CU, 0x00000000U); - psu_mask_write(0xFD410038, 0x00000070U, 0x00000010U); - Xil_Out32(0xFD4050AC, 0x0020); - Xil_Out32(0xFD407004, (Xil_In32(0xFD407004) | 0x1)); - } - if (lane_active == 2) { - psu_mask_write(0xFD410044, 0x00000030U, 0x00000000U); - psu_mask_write(0xFD410040, 0x00000030U, 0x00000000U); - psu_mask_write(0xFD41003C, 0x00000007U, 0x00000001U); - Xil_Out32(0xFD4090AC, 0x0020); - Xil_Out32(0xFD40B004, (Xil_In32(0xFD40B004) | 0x1)); - } - if (lane_active == 3) { - psu_mask_write(0xFD410040, 0x000000C0U, 0x00000000U); - psu_mask_write(0xFD410044, 0x000000C0U, 0x00000000U); - psu_mask_write(0xFD41003C, 0x00000070U, 0x00000010U); - Xil_Out32(0xFD40D0AC, 0x0020); - Xil_Out32(0xFD40F004, (Xil_In32(0xFD40F004) | 0x1)); - } - mask_delay(100); + psu_mask_write(0xFF5E0050, 0x063F3F07U, 0x06010C00U); + psu_mask_write(0xFF180360, 0x00000003U, 0x00000001U); + psu_mask_write(0xFF180308, 0x00000006U, 0x00000006U); + psu_mask_write(0xFF5E0100, 0x013F3F07U, 0x01010600U); + psu_mask_write(0xFF5E0070, 0x013F3F07U, 0x01010800U); + psu_mask_write(0xFF18030C, 0x00020000U, 0x00000000U); + psu_mask_write(0xFF5E0074, 0x013F3F07U, 0x01010F00U); + psu_mask_write(0xFF5E0120, 0x013F3F07U, 0x01010F00U); + psu_mask_write(0xFF5E0124, 0x013F3F07U, 0x01010F00U); + psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000302U); + psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000602U); + psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000800U); + psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U); + psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U); + psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U); + psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U); + psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010F00U); + psu_mask_write(0xFF5E00C4, 0x013F3F07U, 0x01040F00U); + psu_mask_write(0xFF5E00C8, 0x013F3F07U, 0x01010500U); + psu_mask_write(0xFF5E00CC, 0x013F3F07U, 0x01010400U); + psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011D02U); + psu_mask_write(0xFF5E0104, 0x00000007U, 0x00000000U); + psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000F00U); + psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U); + psu_mask_write(0xFD1A0068, 0x01003F07U, 0x01000200U); + psu_mask_write(0xFD1A0080, 0x00003F07U, 0x00000200U); + psu_mask_write(0xFD1A0084, 0x07003F07U, 0x07000100U); + psu_mask_write(0xFD1A00B8, 0x01003F07U, 0x01000200U); + psu_mask_write(0xFD1A00BC, 0x01003F07U, 0x01000200U); + psu_mask_write(0xFD1A00C0, 0x01003F07U, 0x01000203U); + psu_mask_write(0xFD1A00C4, 0x01003F07U, 0x01000502U); + psu_mask_write(0xFD1A00F8, 0x00003F07U, 0x00000200U); + psu_mask_write(0xFF180380, 0x000000FFU, 0x00000000U); + psu_mask_write(0xFD610100, 0x00000001U, 0x00000000U); + psu_mask_write(0xFF180300, 0x00000001U, 0x00000000U); + psu_mask_write(0xFF410050, 0x00000001U, 0x00000000U); + return 1; } -static int serdes_bist_result(u32 lane_active) +static unsigned long psu_ddr_init_data(void) { - u32 pkt_cnt_l0, pkt_cnt_h0, err_cnt_l0, err_cnt_h0; + psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000008U); + psu_mask_write(0xFD070000, 0xE30FBE3DU, 0xC1081020U); + psu_mask_write(0xFD070010, 0x8000F03FU, 0x00000030U); + psu_mask_write(0xFD070020, 0x000003F3U, 0x00000202U); + psu_mask_write(0xFD070024, 0xFFFFFFFFU, 0x00516120U); + psu_mask_write(0xFD070030, 0x0000007FU, 0x00000000U); + psu_mask_write(0xFD070034, 0x00FFFF1FU, 0x00408410U); + psu_mask_write(0xFD070050, 0x00F1F1F4U, 0x00210000U); + psu_mask_write(0xFD070054, 0x0FFF0FFFU, 0x00000000U); + psu_mask_write(0xFD070060, 0x00000073U, 0x00000001U); + psu_mask_write(0xFD070064, 0x0FFF83FFU, 0x00418096U); + psu_mask_write(0xFD070070, 0x00000017U, 0x00000010U); + psu_mask_write(0xFD070074, 0x00000003U, 0x00000000U); + psu_mask_write(0xFD0700C4, 0x3F000391U, 0x10000200U); + psu_mask_write(0xFD0700C8, 0x01FF1F3FU, 0x0030051FU); + psu_mask_write(0xFD0700D0, 0xC3FF0FFFU, 0x00030413U); + psu_mask_write(0xFD0700D4, 0x01FF7F0FU, 0x006A0000U); + psu_mask_write(0xFD0700D8, 0x0000FF0FU, 0x00002305U); + psu_mask_write(0xFD0700DC, 0xFFFFFFFFU, 0x00440024U); + psu_mask_write(0xFD0700E0, 0xFFFFFFFFU, 0x00310008U); + psu_mask_write(0xFD0700E4, 0x00FF03FFU, 0x00210004U); + psu_mask_write(0xFD0700E8, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD0700EC, 0xFFFF0000U, 0x00000000U); + psu_mask_write(0xFD0700F0, 0x0000003FU, 0x00000010U); + psu_mask_write(0xFD0700F4, 0x00000FFFU, 0x0000077FU); + psu_mask_write(0xFD070100, 0x7F3F7F3FU, 0x15161117U); + psu_mask_write(0xFD070104, 0x001F1F7FU, 0x00040422U); + psu_mask_write(0xFD070108, 0x3F3F3F3FU, 0x060C1A10U); + psu_mask_write(0xFD07010C, 0x3FF3F3FFU, 0x00F08000U); + psu_mask_write(0xFD070110, 0x1F0F0F1FU, 0x0A04060CU); + psu_mask_write(0xFD070114, 0x0F0F3F1FU, 0x01040808U); + psu_mask_write(0xFD070118, 0x0F0F000FU, 0x01010005U); + psu_mask_write(0xFD07011C, 0x00000F0FU, 0x00000401U); + psu_mask_write(0xFD070120, 0x7F7F7F7FU, 0x04040606U); + psu_mask_write(0xFD070124, 0x40070F3FU, 0x0004040DU); + psu_mask_write(0xFD07012C, 0x7F1F031FU, 0x440C011CU); + psu_mask_write(0xFD070130, 0x00030F1FU, 0x00020608U); + psu_mask_write(0xFD070180, 0xF7FF03FFU, 0x82160010U); + psu_mask_write(0xFD070184, 0x3FFFFFFFU, 0x01B65B96U); + psu_mask_write(0xFD070190, 0x1FBFBF3FU, 0x0495820AU); + psu_mask_write(0xFD070194, 0xF31F0F0FU, 0x00030304U); + psu_mask_write(0xFD070198, 0x0FF1F1F1U, 0x07000101U); + psu_mask_write(0xFD07019C, 0x000000F1U, 0x00000021U); + psu_mask_write(0xFD0701A0, 0xC3FF03FFU, 0x83FF0003U); + psu_mask_write(0xFD0701A4, 0x00FF00FFU, 0x00C800FFU); + psu_mask_write(0xFD0701B0, 0x00000007U, 0x00000004U); + psu_mask_write(0xFD0701B4, 0x00003F3FU, 0x00001308U); + psu_mask_write(0xFD0701C0, 0x00000007U, 0x00000001U); + psu_mask_write(0xFD070200, 0x0000001FU, 0x0000001FU); + psu_mask_write(0xFD070204, 0x001F1F1FU, 0x00070707U); + psu_mask_write(0xFD070208, 0x0F0F0F0FU, 0x00000000U); + psu_mask_write(0xFD07020C, 0x0F0F0F0FU, 0x0F000000U); + psu_mask_write(0xFD070210, 0x00000F0FU, 0x00000F0FU); + psu_mask_write(0xFD070214, 0x0F0F0F0FU, 0x060F0606U); + psu_mask_write(0xFD070218, 0x8F0F0F0FU, 0x06060606U); + psu_mask_write(0xFD07021C, 0x00000F0FU, 0x00000F0FU); + psu_mask_write(0xFD070220, 0x00001F1FU, 0x00000000U); + psu_mask_write(0xFD070224, 0x0F0F0F0FU, 0x06060606U); + psu_mask_write(0xFD070228, 0x0F0F0F0FU, 0x06060606U); + psu_mask_write(0xFD07022C, 0x0000000FU, 0x00000006U); + psu_mask_write(0xFD070240, 0x0F1F0F7CU, 0x04000400U); + psu_mask_write(0xFD070244, 0x00003333U, 0x00000000U); + psu_mask_write(0xFD070250, 0x7FFF3F07U, 0x01002001U); + psu_mask_write(0xFD070264, 0xFF00FFFFU, 0x08000040U); + psu_mask_write(0xFD07026C, 0xFF00FFFFU, 0x08000040U); + psu_mask_write(0xFD070280, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD070284, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD070288, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD07028C, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD070290, 0x0000FFFFU, 0x00000000U); + psu_mask_write(0xFD070294, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD070300, 0x00000011U, 0x00000000U); + psu_mask_write(0xFD07030C, 0x80000033U, 0x00000000U); + psu_mask_write(0xFD070320, 0x00000001U, 0x00000000U); + psu_mask_write(0xFD070400, 0x00000111U, 0x00000001U); + psu_mask_write(0xFD070404, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070408, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070490, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD070494, 0x0033000FU, 0x0020000BU); + psu_mask_write(0xFD070498, 0x07FF07FFU, 0x00000000U); + psu_mask_write(0xFD0704B4, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD0704B8, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070540, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD070544, 0x03330F0FU, 0x02000B03U); + psu_mask_write(0xFD070548, 0x07FF07FFU, 0x00000000U); + psu_mask_write(0xFD070564, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070568, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD0705F0, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD0705F4, 0x03330F0FU, 0x02000B03U); + psu_mask_write(0xFD0705F8, 0x07FF07FFU, 0x00000000U); + psu_mask_write(0xFD070614, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070618, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD0706A0, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD0706A4, 0x0033000FU, 0x00100003U); + psu_mask_write(0xFD0706A8, 0x07FF07FFU, 0x0000004FU); + psu_mask_write(0xFD0706AC, 0x0033000FU, 0x00100003U); + psu_mask_write(0xFD0706B0, 0x000007FFU, 0x0000004FU); + psu_mask_write(0xFD0706C4, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD0706C8, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070750, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD070754, 0x0033000FU, 0x00100003U); + psu_mask_write(0xFD070758, 0x07FF07FFU, 0x0000004FU); + psu_mask_write(0xFD07075C, 0x0033000FU, 0x00100003U); + psu_mask_write(0xFD070760, 0x000007FFU, 0x0000004FU); + psu_mask_write(0xFD070774, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070778, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070800, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD070804, 0x0033000FU, 0x00100003U); + psu_mask_write(0xFD070808, 0x07FF07FFU, 0x0000004FU); + psu_mask_write(0xFD07080C, 0x0033000FU, 0x00100003U); + psu_mask_write(0xFD070810, 0x000007FFU, 0x0000004FU); + psu_mask_write(0xFD070F04, 0x000001FFU, 0x00000000U); + psu_mask_write(0xFD070F08, 0x000000FFU, 0x00000000U); + psu_mask_write(0xFD070F0C, 0x000001FFU, 0x00000010U); + psu_mask_write(0xFD070F10, 0x000000FFU, 0x0000000FU); + psu_mask_write(0xFD072190, 0x1FBFBF3FU, 0x07828002U); + psu_mask_write(0xFD1A0108, 0x0000000CU, 0x00000000U); + psu_mask_write(0xFD080010, 0xFFFFFFFFU, 0x87001E00U); + psu_mask_write(0xFD080018, 0xFFFFFFFFU, 0x00F07E38U); + psu_mask_write(0xFD08001C, 0xFFFFFFFFU, 0x55AA5480U); + psu_mask_write(0xFD080024, 0xFFFFFFFFU, 0x010100F4U); + psu_mask_write(0xFD080040, 0xFFFFFFFFU, 0x42C21590U); + psu_mask_write(0xFD080044, 0xFFFFFFFFU, 0xD05512C0U); + psu_mask_write(0xFD080068, 0xFFFFFFFFU, 0x01100000U); + psu_mask_write(0xFD080090, 0xFFFFFFFFU, 0x02A04161U); + psu_mask_write(0xFD0800C0, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD0800C4, 0xFFFFFFFFU, 0x000000E4U); + psu_mask_write(0xFD080100, 0xFFFFFFFFU, 0x0000040DU); + psu_mask_write(0xFD080110, 0xFFFFFFFFU, 0x0B2E1708U); + psu_mask_write(0xFD080114, 0xFFFFFFFFU, 0x282B0711U); + psu_mask_write(0xFD080118, 0xFFFFFFFFU, 0x000F0133U); + psu_mask_write(0xFD08011C, 0xFFFFFFFFU, 0x82000501U); + psu_mask_write(0xFD080120, 0xFFFFFFFFU, 0x012B2B0BU); + psu_mask_write(0xFD080124, 0xFFFFFFFFU, 0x0044260BU); + psu_mask_write(0xFD080128, 0xFFFFFFFFU, 0x00000C18U); + psu_mask_write(0xFD080140, 0xFFFFFFFFU, 0x08400020U); + psu_mask_write(0xFD080144, 0xFFFFFFFFU, 0x00000C80U); + psu_mask_write(0xFD080150, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080154, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080180, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080184, 0xFFFFFFFFU, 0x00000044U); + psu_mask_write(0xFD080188, 0xFFFFFFFFU, 0x00000024U); + psu_mask_write(0xFD08018C, 0xFFFFFFFFU, 0x00000031U); + psu_mask_write(0xFD080190, 0xFFFFFFFFU, 0x00000008U); + psu_mask_write(0xFD080194, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080198, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD0801AC, 0xFFFFFFFFU, 0x00000056U); + psu_mask_write(0xFD0801B0, 0xFFFFFFFFU, 0x00000056U); + psu_mask_write(0xFD0801B4, 0xFFFFFFFFU, 0x00000008U); + psu_mask_write(0xFD0801B8, 0xFFFFFFFFU, 0x00000019U); + psu_mask_write(0xFD0801D8, 0xFFFFFFFFU, 0x00000016U); + psu_mask_write(0xFD080200, 0xFFFFFFFFU, 0x800091C7U); + psu_mask_write(0xFD080204, 0xFFFFFFFFU, 0x00010236U); + psu_mask_write(0xFD080240, 0xFFFFFFFFU, 0x00141054U); + psu_mask_write(0xFD080250, 0xFFFFFFFFU, 0x00088000U); + psu_mask_write(0xFD080414, 0xFFFFFFFFU, 0x12340800U); + psu_mask_write(0xFD0804F4, 0xFFFFFFFFU, 0x0000000AU); + psu_mask_write(0xFD080500, 0xFFFFFFFFU, 0x30000028U); + psu_mask_write(0xFD080508, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD08050C, 0xFFFFFFFFU, 0x00000005U); + psu_mask_write(0xFD080510, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080520, 0xFFFFFFFFU, 0x0300BD99U); + psu_mask_write(0xFD080528, 0xFFFFFFFFU, 0xF1032019U); + psu_mask_write(0xFD08052C, 0xFFFFFFFFU, 0x07F001E3U); + psu_mask_write(0xFD080544, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080548, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080558, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD08055C, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080560, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080564, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080680, 0xFFFFFFFFU, 0x008AAC58U); + psu_mask_write(0xFD080684, 0xFFFFFFFFU, 0x0001B39BU); + psu_mask_write(0xFD080694, 0xFFFFFFFFU, 0x01E10210U); + psu_mask_write(0xFD080698, 0xFFFFFFFFU, 0x01E10000U); + psu_mask_write(0xFD0806A4, 0xFFFFFFFFU, 0x0001BB9BU); + psu_mask_write(0xFD080700, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080704, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0xFD08070C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080710, 0xFFFFFFFFU, 0x0E00F50CU); + psu_mask_write(0xFD080714, 0xFFFFFFFFU, 0x09091616U); + psu_mask_write(0xFD080718, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080800, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080804, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0xFD08080C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080810, 0xFFFFFFFFU, 0x0E00F50CU); + psu_mask_write(0xFD080814, 0xFFFFFFFFU, 0x09091616U); + psu_mask_write(0xFD080818, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080900, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080904, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0xFD08090C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080910, 0xFFFFFFFFU, 0x0E00F504U); + psu_mask_write(0xFD080914, 0xFFFFFFFFU, 0x09091616U); + psu_mask_write(0xFD080918, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080A00, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080A04, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0xFD080A0C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080A10, 0xFFFFFFFFU, 0x0E00F504U); + psu_mask_write(0xFD080A14, 0xFFFFFFFFU, 0x09091616U); + psu_mask_write(0xFD080A18, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080B00, 0xFFFFFFFFU, 0x80803660U); + psu_mask_write(0xFD080B04, 0xFFFFFFFFU, 0x55556000U); + psu_mask_write(0xFD080B08, 0xFFFFFFFFU, 0xAAAAAAAAU); + psu_mask_write(0xFD080B0C, 0xFFFFFFFFU, 0x0029A4A4U); + psu_mask_write(0xFD080B10, 0xFFFFFFFFU, 0x0C00BD00U); + psu_mask_write(0xFD080B14, 0xFFFFFFFFU, 0x09091616U); + psu_mask_write(0xFD080B18, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080C00, 0xFFFFFFFFU, 0x80803660U); + psu_mask_write(0xFD080C04, 0xFFFFFFFFU, 0x55556000U); + psu_mask_write(0xFD080C08, 0xFFFFFFFFU, 0xAAAAAAAAU); + psu_mask_write(0xFD080C0C, 0xFFFFFFFFU, 0x0029A4A4U); + psu_mask_write(0xFD080C10, 0xFFFFFFFFU, 0x0C00BD00U); + psu_mask_write(0xFD080C14, 0xFFFFFFFFU, 0x09091616U); + psu_mask_write(0xFD080C18, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080D00, 0xFFFFFFFFU, 0x80803660U); + psu_mask_write(0xFD080D04, 0xFFFFFFFFU, 0x55556000U); + psu_mask_write(0xFD080D08, 0xFFFFFFFFU, 0xAAAAAAAAU); + psu_mask_write(0xFD080D0C, 0xFFFFFFFFU, 0x0029A4A4U); + psu_mask_write(0xFD080D10, 0xFFFFFFFFU, 0x0C00BD00U); + psu_mask_write(0xFD080D14, 0xFFFFFFFFU, 0x09091616U); + psu_mask_write(0xFD080D18, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080E00, 0xFFFFFFFFU, 0x80803660U); + psu_mask_write(0xFD080E04, 0xFFFFFFFFU, 0x55556000U); + psu_mask_write(0xFD080E08, 0xFFFFFFFFU, 0xAAAAAAAAU); + psu_mask_write(0xFD080E0C, 0xFFFFFFFFU, 0x0029A4A4U); + psu_mask_write(0xFD080E10, 0xFFFFFFFFU, 0x0C00BD00U); + psu_mask_write(0xFD080E14, 0xFFFFFFFFU, 0x09091616U); + psu_mask_write(0xFD080E18, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080F00, 0xFFFFFFFFU, 0x80803660U); + psu_mask_write(0xFD080F04, 0xFFFFFFFFU, 0x55556000U); + psu_mask_write(0xFD080F08, 0xFFFFFFFFU, 0xAAAAAAAAU); + psu_mask_write(0xFD080F0C, 0xFFFFFFFFU, 0x0029A4A4U); + psu_mask_write(0xFD080F10, 0xFFFFFFFFU, 0x0C00BD00U); + psu_mask_write(0xFD080F14, 0xFFFFFFFFU, 0x09091616U); + psu_mask_write(0xFD080F18, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD081400, 0xFFFFFFFFU, 0x2A019FFEU); + psu_mask_write(0xFD081404, 0xFFFFFFFFU, 0x01100000U); + psu_mask_write(0xFD08141C, 0xFFFFFFFFU, 0x01264300U); + psu_mask_write(0xFD08142C, 0xFFFFFFFFU, 0x000C1800U); + psu_mask_write(0xFD081430, 0xFFFFFFFFU, 0x71000000U); + psu_mask_write(0xFD081440, 0xFFFFFFFFU, 0x2A019FFEU); + psu_mask_write(0xFD081444, 0xFFFFFFFFU, 0x01100000U); + psu_mask_write(0xFD08145C, 0xFFFFFFFFU, 0x01264300U); + psu_mask_write(0xFD08146C, 0xFFFFFFFFU, 0x000C1800U); + psu_mask_write(0xFD081470, 0xFFFFFFFFU, 0x71000000U); + psu_mask_write(0xFD081480, 0xFFFFFFFFU, 0x15019FFEU); + psu_mask_write(0xFD081484, 0xFFFFFFFFU, 0x21100000U); + psu_mask_write(0xFD08149C, 0xFFFFFFFFU, 0x01266300U); + psu_mask_write(0xFD0814AC, 0xFFFFFFFFU, 0x000C1800U); + psu_mask_write(0xFD0814B0, 0xFFFFFFFFU, 0x70400000U); + psu_mask_write(0xFD0814C0, 0xFFFFFFFFU, 0x15019FFEU); + psu_mask_write(0xFD0814C4, 0xFFFFFFFFU, 0x21100000U); + psu_mask_write(0xFD0814DC, 0xFFFFFFFFU, 0x01266300U); + psu_mask_write(0xFD0814EC, 0xFFFFFFFFU, 0x000C1800U); + psu_mask_write(0xFD0814F0, 0xFFFFFFFFU, 0x70400000U); + psu_mask_write(0xFD081500, 0xFFFFFFFFU, 0x15019FFEU); + psu_mask_write(0xFD081504, 0xFFFFFFFFU, 0x21100000U); + psu_mask_write(0xFD08151C, 0xFFFFFFFFU, 0x01266300U); + psu_mask_write(0xFD08152C, 0xFFFFFFFFU, 0x000C1800U); + psu_mask_write(0xFD081530, 0xFFFFFFFFU, 0x70400000U); + psu_mask_write(0xFD0817DC, 0xFFFFFFFFU, 0x012643C4U); - if (lane_active == 0) { - pkt_cnt_l0 = Xil_In32(0xFD40304C); - pkt_cnt_h0 = Xil_In32(0xFD403050); - err_cnt_l0 = Xil_In32(0xFD403054); - err_cnt_h0 = Xil_In32(0xFD403058); - } - if (lane_active == 1) { - pkt_cnt_l0 = Xil_In32(0xFD40704C); - pkt_cnt_h0 = Xil_In32(0xFD407050); - err_cnt_l0 = Xil_In32(0xFD407054); - err_cnt_h0 = Xil_In32(0xFD407058); - } - if (lane_active == 2) { - pkt_cnt_l0 = Xil_In32(0xFD40B04C); - pkt_cnt_h0 = Xil_In32(0xFD40B050); - err_cnt_l0 = Xil_In32(0xFD40B054); - err_cnt_h0 = Xil_In32(0xFD40B058); - } - if (lane_active == 3) { - pkt_cnt_l0 = Xil_In32(0xFD40F04C); - pkt_cnt_h0 = Xil_In32(0xFD40F050); - err_cnt_l0 = Xil_In32(0xFD40F054); - err_cnt_h0 = Xil_In32(0xFD40F058); - } - if (lane_active == 0) - Xil_Out32(0xFD403004, 0x0); - if (lane_active == 1) - Xil_Out32(0xFD407004, 0x0); - if (lane_active == 2) - Xil_Out32(0xFD40B004, 0x0); - if (lane_active == 3) - Xil_Out32(0xFD40F004, 0x0); - if (err_cnt_l0 > 0 || err_cnt_h0 > 0 || - (pkt_cnt_l0 == 0 && pkt_cnt_h0 == 0)) - return 0; return 1; } -static int serdes_illcalib_pcie_gen1(u32 pllsel, u32 lane3_protocol, - u32 lane3_rate, u32 lane2_protocol, - u32 lane2_rate, u32 lane1_protocol, - u32 lane1_rate, u32 lane0_protocol, - u32 lane0_rate, u32 gen2_calib) +static unsigned long psu_ddr_qos_init_data(void) { - u64 tempbistresult; - u32 currbistresult[4]; - u32 prevbistresult[4]; - u32 itercount = 0; - u32 ill12_val[4], ill1_val[4]; - u32 loop = 0; - u32 iterresult[8]; - u32 meancount[4]; - u32 bistpasscount[4]; - u32 meancountalt[4]; - u32 meancountalt_bistpasscount[4]; - u32 lane0_active; - u32 lane1_active; - u32 lane2_active; - u32 lane3_active; - - lane0_active = (lane0_protocol == 1); - lane1_active = (lane1_protocol == 1); - lane2_active = (lane2_protocol == 1); - lane3_active = (lane3_protocol == 1); - for (loop = 0; loop <= 3; loop++) { - iterresult[loop] = 0; - iterresult[loop + 4] = 0; - meancountalt[loop] = 0; - meancountalt_bistpasscount[loop] = 0; - meancount[loop] = 0; - prevbistresult[loop] = 0; - bistpasscount[loop] = 0; - } - itercount = 0; - if (lane0_active) - serdes_bist_static_settings(0); - if (lane1_active) - serdes_bist_static_settings(1); - if (lane2_active) - serdes_bist_static_settings(2); - if (lane3_active) - serdes_bist_static_settings(3); - do { - if (gen2_calib != 1) { - if (lane0_active == 1) - ill1_val[0] = ((0x04 + itercount * 8) % 0x100); - if (lane0_active == 1) - ill12_val[0] = - ((0x04 + itercount * 8) >= - 0x100) ? 0x10 : 0x00; - if (lane1_active == 1) - ill1_val[1] = ((0x04 + itercount * 8) % 0x100); - if (lane1_active == 1) - ill12_val[1] = - ((0x04 + itercount * 8) >= - 0x100) ? 0x10 : 0x00; - if (lane2_active == 1) - ill1_val[2] = ((0x04 + itercount * 8) % 0x100); - if (lane2_active == 1) - ill12_val[2] = - ((0x04 + itercount * 8) >= - 0x100) ? 0x10 : 0x00; - if (lane3_active == 1) - ill1_val[3] = ((0x04 + itercount * 8) % 0x100); - if (lane3_active == 1) - ill12_val[3] = - ((0x04 + itercount * 8) >= - 0x100) ? 0x10 : 0x00; - - if (lane0_active == 1) - Xil_Out32(0xFD401924, ill1_val[0]); - if (lane0_active == 1) - psu_mask_write(0xFD401990, 0x000000F0U, - ill12_val[0]); - if (lane1_active == 1) - Xil_Out32(0xFD405924, ill1_val[1]); - if (lane1_active == 1) - psu_mask_write(0xFD405990, 0x000000F0U, - ill12_val[1]); - if (lane2_active == 1) - Xil_Out32(0xFD409924, ill1_val[2]); - if (lane2_active == 1) - psu_mask_write(0xFD409990, 0x000000F0U, - ill12_val[2]); - if (lane3_active == 1) - Xil_Out32(0xFD40D924, ill1_val[3]); - if (lane3_active == 1) - psu_mask_write(0xFD40D990, 0x000000F0U, - ill12_val[3]); - } - if (gen2_calib == 1) { - if (lane0_active == 1) - ill1_val[0] = ((0x104 + itercount * 8) % 0x100); - if (lane0_active == 1) - ill12_val[0] = - ((0x104 + itercount * 8) >= - 0x200) ? 0x02 : 0x01; - if (lane1_active == 1) - ill1_val[1] = ((0x104 + itercount * 8) % 0x100); - if (lane1_active == 1) - ill12_val[1] = - ((0x104 + itercount * 8) >= - 0x200) ? 0x02 : 0x01; - if (lane2_active == 1) - ill1_val[2] = ((0x104 + itercount * 8) % 0x100); - if (lane2_active == 1) - ill12_val[2] = - ((0x104 + itercount * 8) >= - 0x200) ? 0x02 : 0x01; - if (lane3_active == 1) - ill1_val[3] = ((0x104 + itercount * 8) % 0x100); - if (lane3_active == 1) - ill12_val[3] = - ((0x104 + itercount * 8) >= - 0x200) ? 0x02 : 0x01; + psu_mask_write(0xFD360008, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD36001C, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD370008, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD37001C, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD380008, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD38001C, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD390008, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD39001C, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD3A0008, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD3A001C, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD3B0008, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD3B001C, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFF9B0008, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFF9B001C, 0x0000000FU, 0x00000000U); - if (lane0_active == 1) - Xil_Out32(0xFD401928, ill1_val[0]); - if (lane0_active == 1) - psu_mask_write(0xFD401990, 0x0000000FU, - ill12_val[0]); - if (lane1_active == 1) - Xil_Out32(0xFD405928, ill1_val[1]); - if (lane1_active == 1) - psu_mask_write(0xFD405990, 0x0000000FU, - ill12_val[1]); - if (lane2_active == 1) - Xil_Out32(0xFD409928, ill1_val[2]); - if (lane2_active == 1) - psu_mask_write(0xFD409990, 0x0000000FU, - ill12_val[2]); - if (lane3_active == 1) - Xil_Out32(0xFD40D928, ill1_val[3]); - if (lane3_active == 1) - psu_mask_write(0xFD40D990, 0x0000000FU, - ill12_val[3]); - } + return 1; +} - if (lane0_active == 1) - psu_mask_write(0xFD401018, 0x00000030U, 0x00000010U); - if (lane1_active == 1) - psu_mask_write(0xFD405018, 0x00000030U, 0x00000010U); - if (lane2_active == 1) - psu_mask_write(0xFD409018, 0x00000030U, 0x00000010U); - if (lane3_active == 1) - psu_mask_write(0xFD40D018, 0x00000030U, 0x00000010U); - if (lane0_active == 1) - currbistresult[0] = 0; - if (lane1_active == 1) - currbistresult[1] = 0; - if (lane2_active == 1) - currbistresult[2] = 0; - if (lane3_active == 1) - currbistresult[3] = 0; - serdes_rst_seq(pllsel, lane3_protocol, lane3_rate, - lane2_protocol, lane2_rate, lane1_protocol, - lane1_rate, lane0_protocol, lane0_rate); - if (lane3_active == 1) - serdes_bist_run(3); - if (lane2_active == 1) - serdes_bist_run(2); - if (lane1_active == 1) - serdes_bist_run(1); - if (lane0_active == 1) - serdes_bist_run(0); - tempbistresult = 0; - if (lane3_active == 1) - tempbistresult = tempbistresult | serdes_bist_result(3); - tempbistresult = tempbistresult << 1; - if (lane2_active == 1) - tempbistresult = tempbistresult | serdes_bist_result(2); - tempbistresult = tempbistresult << 1; - if (lane1_active == 1) - tempbistresult = tempbistresult | serdes_bist_result(1); - tempbistresult = tempbistresult << 1; - if (lane0_active == 1) - tempbistresult = tempbistresult | serdes_bist_result(0); - Xil_Out32(0xFD410098, 0x0); - Xil_Out32(0xFD410098, 0x2); +static unsigned long psu_mio_init_data(void) +{ + psu_mask_write(0xFF180000, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180004, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180008, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF18000C, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180010, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180014, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180018, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF18001C, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180020, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180024, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180028, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF18002C, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180030, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180034, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180038, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF18003C, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180040, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180044, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180048, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF18004C, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180050, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180054, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180058, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF18005C, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180060, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180064, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180068, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF18006C, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180070, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180074, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180078, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF18007C, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180080, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180084, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180088, 0x000000FEU, 0x00000040U); + psu_mask_write(0xFF18008C, 0x000000FEU, 0x00000040U); + psu_mask_write(0xFF180090, 0x000000FEU, 0x00000040U); + psu_mask_write(0xFF180094, 0x000000FEU, 0x00000040U); + psu_mask_write(0xFF180098, 0x000000FEU, 0x000000C0U); + psu_mask_write(0xFF18009C, 0x000000FEU, 0x000000C0U); + psu_mask_write(0xFF1800A0, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF1800A4, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF1800A8, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF1800AC, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF1800B0, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF1800B4, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800B8, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800BC, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800C0, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800C4, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800C8, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800CC, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800D0, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF1800D4, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF1800D8, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF1800DC, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF1800E0, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF1800E4, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF1800E8, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF1800EC, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF1800F0, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF1800F4, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF1800F8, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF1800FC, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180100, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180104, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180108, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF18010C, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180110, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180114, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180118, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF18011C, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180120, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180124, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180128, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF18012C, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180130, 0x000000FEU, 0x00000060U); + psu_mask_write(0xFF180134, 0x000000FEU, 0x00000060U); + psu_mask_write(0xFF180204, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFF180208, 0xFFFFFFFFU, 0x00002040U); + psu_mask_write(0xFF18020C, 0x00003FFFU, 0x00000000U); + psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF18013C, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180140, 0x03FFFFFFU, 0x00000000U); + psu_mask_write(0xFF180144, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180148, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x00000000U); + psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180158, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF18015C, 0x03FFFFFFU, 0x00000000U); + psu_mask_write(0xFF180160, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x00000000U); + psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180174, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180178, 0x03FFFFFFU, 0x00000000U); + psu_mask_write(0xFF18017C, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x00000000U); + psu_mask_write(0xFF180200, 0x0000000FU, 0x00000000U); - if (itercount < 32) { - iterresult[0] = - ((iterresult[0] << 1) | - ((tempbistresult & 0x1) == 0x1)); - iterresult[1] = - ((iterresult[1] << 1) | - ((tempbistresult & 0x2) == 0x2)); - iterresult[2] = - ((iterresult[2] << 1) | - ((tempbistresult & 0x4) == 0x4)); - iterresult[3] = - ((iterresult[3] << 1) | - ((tempbistresult & 0x8) == 0x8)); - } else { - iterresult[4] = - ((iterresult[4] << 1) | - ((tempbistresult & 0x1) == 0x1)); - iterresult[5] = - ((iterresult[5] << 1) | - ((tempbistresult & 0x2) == 0x2)); - iterresult[6] = - ((iterresult[6] << 1) | - ((tempbistresult & 0x4) == 0x4)); - iterresult[7] = - ((iterresult[7] << 1) | - ((tempbistresult & 0x8) == 0x8)); - } - currbistresult[0] = - currbistresult[0] | ((tempbistresult & 0x1) == 1); - currbistresult[1] = - currbistresult[1] | ((tempbistresult & 0x2) == 0x2); - currbistresult[2] = - currbistresult[2] | ((tempbistresult & 0x4) == 0x4); - currbistresult[3] = - currbistresult[3] | ((tempbistresult & 0x8) == 0x8); + return 1; +} - for (loop = 0; loop <= 3; loop++) { - if (currbistresult[loop] == 1 && - prevbistresult[loop] == 1) - bistpasscount[loop] = bistpasscount[loop] + 1; - if (bistpasscount[loop] < 4 && - currbistresult[loop] == 0 && itercount > 2) { - if (meancountalt_bistpasscount[loop] < - bistpasscount[loop]) { - meancountalt_bistpasscount[loop] = - bistpasscount[loop]; - meancountalt[loop] = - ((itercount - 1) - - ((bistpasscount[loop] + 1) / 2)); - } - bistpasscount[loop] = 0; - } - if (meancount[loop] == 0 && bistpasscount[loop] >= 4 && - (currbistresult[loop] == 0 || itercount == 63) && - prevbistresult[loop] == 1) - meancount[loop] = - itercount - 1 - - ((bistpasscount[loop] + 1) / 2); - prevbistresult[loop] = currbistresult[loop]; - } - } while (++itercount < 64); +static unsigned long psu_peripherals_pre_init_data(void) +{ + psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01012302U); - for (loop = 0; loop <= 3; loop++) { - if (lane0_active == 0 && loop == 0) - continue; - if (lane1_active == 0 && loop == 1) - continue; - if (lane2_active == 0 && loop == 2) - continue; - if (lane3_active == 0 && loop == 3) - continue; + return 1; +} + +static unsigned long psu_peripherals_init_data(void) +{ + psu_mask_write(0xFD1A0100, 0x0000007CU, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x001A0000U, 0x00000000U); + psu_mask_write(0xFF5E023C, 0x0093C018U, 0x00000000U); + psu_mask_write(0xFF5E0230, 0x00000001U, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x00000040U, 0x00000000U); + psu_mask_write(0xFF180310, 0x00008000U, 0x00000000U); + psu_mask_write(0xFF180320, 0x33840000U, 0x00800000U); + psu_mask_write(0xFF18031C, 0x7FFE0000U, 0x64500000U); + psu_mask_write(0xFF180358, 0x00000008U, 0x00000008U); + psu_mask_write(0xFF180324, 0x03C00000U, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x00000600U, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x00000002U, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x00040000U, 0x00000000U); + psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U); + psu_mask_write(0xFD5C0060, 0x000F000FU, 0x00000000U); + psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U); + psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x05F5DD18U); + psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U); + return 1; +} - if (meancount[loop] == 0) - meancount[loop] = meancountalt[loop]; +static unsigned long psu_serdes_init_data(void) +{ + psu_mask_write(0xFD410000, 0x0000001FU, 0x0000000FU); + psu_mask_write(0xFD402860, 0x00000080U, 0x00000080U); + psu_mask_write(0xFD40106C, 0x0000000FU, 0x0000000FU); + psu_mask_write(0xFD4000F4, 0x0000000BU, 0x0000000BU); + psu_mask_write(0xFD401074, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD405074, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD409074, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD40D074, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD40189C, 0x00000080U, 0x00000080U); + psu_mask_write(0xFD4018F8, 0x000000FFU, 0x0000007DU); + psu_mask_write(0xFD4018FC, 0x000000FFU, 0x0000007DU); + psu_mask_write(0xFD401990, 0x000000FFU, 0x00000000U); + psu_mask_write(0xFD401924, 0x000000FFU, 0x00000082U); + psu_mask_write(0xFD401928, 0x000000FFU, 0x00000000U); + psu_mask_write(0xFD401900, 0x000000FFU, 0x00000064U); + psu_mask_write(0xFD40192C, 0x000000FFU, 0x00000000U); + psu_mask_write(0xFD401980, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFD401914, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFD401918, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD401940, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFD401944, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD401994, 0x00000007U, 0x00000007U); + psu_mask_write(0xFD405994, 0x00000007U, 0x00000007U); + psu_mask_write(0xFD409994, 0x00000007U, 0x00000007U); + psu_mask_write(0xFD40D994, 0x00000007U, 0x00000007U); + psu_mask_write(0xFD40107C, 0x0000000FU, 0x00000001U); + psu_mask_write(0xFD40507C, 0x0000000FU, 0x00000001U); + psu_mask_write(0xFD40907C, 0x0000000FU, 0x00000001U); + psu_mask_write(0xFD40D07C, 0x0000000FU, 0x00000001U); + psu_mask_write(0xFD4019A4, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFD401038, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD40102C, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD4059A4, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFD405038, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD40502C, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD4099A4, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFD409038, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD40902C, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD40D9A4, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFD40D038, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD40D02C, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD4019AC, 0x00000003U, 0x00000000U); + psu_mask_write(0xFD4059AC, 0x00000003U, 0x00000000U); + psu_mask_write(0xFD4099AC, 0x00000003U, 0x00000000U); + psu_mask_write(0xFD40D9AC, 0x00000003U, 0x00000000U); + psu_mask_write(0xFD401978, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD405978, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD409978, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD40D978, 0x00000010U, 0x00000010U); - if (gen2_calib != 1) { - ill1_val[loop] = ((0x04 + meancount[loop] * 8) % 0x100); - ill12_val[loop] = - ((0x04 + meancount[loop] * 8) >= - 0x100) ? 0x10 : 0x00; - } - if (gen2_calib == 1) { - ill1_val[loop] = - ((0x104 + meancount[loop] * 8) % 0x100); - ill12_val[loop] = - ((0x104 + meancount[loop] * 8) >= - 0x200) ? 0x02 : 0x01; - } - } - if (gen2_calib != 1) { - if (lane0_active == 1) - Xil_Out32(0xFD401924, ill1_val[0]); - if (lane0_active == 1) - psu_mask_write(0xFD401990, 0x000000F0U, ill12_val[0]); - if (lane1_active == 1) - Xil_Out32(0xFD405924, ill1_val[1]); - if (lane1_active == 1) - psu_mask_write(0xFD405990, 0x000000F0U, ill12_val[1]); - if (lane2_active == 1) - Xil_Out32(0xFD409924, ill1_val[2]); - if (lane2_active == 1) - psu_mask_write(0xFD409990, 0x000000F0U, ill12_val[2]); - if (lane3_active == 1) - Xil_Out32(0xFD40D924, ill1_val[3]); - if (lane3_active == 1) - psu_mask_write(0xFD40D990, 0x000000F0U, ill12_val[3]); - } - if (gen2_calib == 1) { - if (lane0_active == 1) - Xil_Out32(0xFD401928, ill1_val[0]); - if (lane0_active == 1) - psu_mask_write(0xFD401990, 0x0000000FU, ill12_val[0]); - if (lane1_active == 1) - Xil_Out32(0xFD405928, ill1_val[1]); - if (lane1_active == 1) - psu_mask_write(0xFD405990, 0x0000000FU, ill12_val[1]); - if (lane2_active == 1) - Xil_Out32(0xFD409928, ill1_val[2]); - if (lane2_active == 1) - psu_mask_write(0xFD409990, 0x0000000FU, ill12_val[2]); - if (lane3_active == 1) - Xil_Out32(0xFD40D928, ill1_val[3]); - if (lane3_active == 1) - psu_mask_write(0xFD40D990, 0x0000000FU, ill12_val[3]); - } + serdes_illcalib(0, 0, 0, 0, 0, 0, 5, 0); + psu_mask_write(0xFD410010, 0x00000007U, 0x00000005U); + psu_mask_write(0xFD410040, 0x00000003U, 0x00000000U); + psu_mask_write(0xFD410044, 0x00000003U, 0x00000000U); - if (lane0_active == 1) - psu_mask_write(0xFD401018, 0x00000030U, 0x00000000U); - if (lane1_active == 1) - psu_mask_write(0xFD405018, 0x00000030U, 0x00000000U); - if (lane2_active == 1) - psu_mask_write(0xFD409018, 0x00000030U, 0x00000000U); - if (lane3_active == 1) - psu_mask_write(0xFD40D018, 0x00000030U, 0x00000000U); + return 1; +} + +static unsigned long psu_resetout_init_data(void) +{ + psu_mask_write(0xFF5E0230, 0x00000001U, 0x00000000U); + psu_mask_write(0xFD480064, 0x00000200U, 0x00000200U); + mask_poll(0xFD4023E4, 0x00000010U); - Xil_Out32(0xFD410098, 0); - if (lane0_active == 1) { - Xil_Out32(0xFD403004, 0); - Xil_Out32(0xFD403008, 0); - Xil_Out32(0xFD40300C, 0); - Xil_Out32(0xFD403010, 0); - Xil_Out32(0xFD403014, 0); - Xil_Out32(0xFD403018, 0); - Xil_Out32(0xFD40301C, 0); - Xil_Out32(0xFD403020, 0); - Xil_Out32(0xFD403024, 0); - Xil_Out32(0xFD403028, 0); - Xil_Out32(0xFD40302C, 0); - Xil_Out32(0xFD403030, 0); - Xil_Out32(0xFD403034, 0); - Xil_Out32(0xFD403038, 0); - Xil_Out32(0xFD40303C, 0); - Xil_Out32(0xFD403040, 0); - Xil_Out32(0xFD403044, 0); - Xil_Out32(0xFD403048, 0); - Xil_Out32(0xFD40304C, 0); - Xil_Out32(0xFD403050, 0); - Xil_Out32(0xFD403054, 0); - Xil_Out32(0xFD403058, 0); - Xil_Out32(0xFD403068, 1); - Xil_Out32(0xFD40306C, 0); - Xil_Out32(0xFD4010AC, 0); - psu_mask_write(0xFD410044, 0x00000003U, 0x00000001U); - psu_mask_write(0xFD410040, 0x00000003U, 0x00000001U); - psu_mask_write(0xFD410038, 0x00000007U, 0x00000000U); - } - if (lane1_active == 1) { - Xil_Out32(0xFD407004, 0); - Xil_Out32(0xFD407008, 0); - Xil_Out32(0xFD40700C, 0); - Xil_Out32(0xFD407010, 0); - Xil_Out32(0xFD407014, 0); - Xil_Out32(0xFD407018, 0); - Xil_Out32(0xFD40701C, 0); - Xil_Out32(0xFD407020, 0); - Xil_Out32(0xFD407024, 0); - Xil_Out32(0xFD407028, 0); - Xil_Out32(0xFD40702C, 0); - Xil_Out32(0xFD407030, 0); - Xil_Out32(0xFD407034, 0); - Xil_Out32(0xFD407038, 0); - Xil_Out32(0xFD40703C, 0); - Xil_Out32(0xFD407040, 0); - Xil_Out32(0xFD407044, 0); - Xil_Out32(0xFD407048, 0); - Xil_Out32(0xFD40704C, 0); - Xil_Out32(0xFD407050, 0); - Xil_Out32(0xFD407054, 0); - Xil_Out32(0xFD407058, 0); - Xil_Out32(0xFD407068, 1); - Xil_Out32(0xFD40706C, 0); - Xil_Out32(0xFD4050AC, 0); - psu_mask_write(0xFD410044, 0x0000000CU, 0x00000004U); - psu_mask_write(0xFD410040, 0x0000000CU, 0x00000004U); - psu_mask_write(0xFD410038, 0x00000070U, 0x00000000U); - } - if (lane2_active == 1) { - Xil_Out32(0xFD40B004, 0); - Xil_Out32(0xFD40B008, 0); - Xil_Out32(0xFD40B00C, 0); - Xil_Out32(0xFD40B010, 0); - Xil_Out32(0xFD40B014, 0); - Xil_Out32(0xFD40B018, 0); - Xil_Out32(0xFD40B01C, 0); - Xil_Out32(0xFD40B020, 0); - Xil_Out32(0xFD40B024, 0); - Xil_Out32(0xFD40B028, 0); - Xil_Out32(0xFD40B02C, 0); - Xil_Out32(0xFD40B030, 0); - Xil_Out32(0xFD40B034, 0); - Xil_Out32(0xFD40B038, 0); - Xil_Out32(0xFD40B03C, 0); - Xil_Out32(0xFD40B040, 0); - Xil_Out32(0xFD40B044, 0); - Xil_Out32(0xFD40B048, 0); - Xil_Out32(0xFD40B04C, 0); - Xil_Out32(0xFD40B050, 0); - Xil_Out32(0xFD40B054, 0); - Xil_Out32(0xFD40B058, 0); - Xil_Out32(0xFD40B068, 1); - Xil_Out32(0xFD40B06C, 0); - Xil_Out32(0xFD4090AC, 0); - psu_mask_write(0xFD410044, 0x00000030U, 0x00000010U); - psu_mask_write(0xFD410040, 0x00000030U, 0x00000010U); - psu_mask_write(0xFD41003C, 0x00000007U, 0x00000000U); - } - if (lane3_active == 1) { - Xil_Out32(0xFD40F004, 0); - Xil_Out32(0xFD40F008, 0); - Xil_Out32(0xFD40F00C, 0); - Xil_Out32(0xFD40F010, 0); - Xil_Out32(0xFD40F014, 0); - Xil_Out32(0xFD40F018, 0); - Xil_Out32(0xFD40F01C, 0); - Xil_Out32(0xFD40F020, 0); - Xil_Out32(0xFD40F024, 0); - Xil_Out32(0xFD40F028, 0); - Xil_Out32(0xFD40F02C, 0); - Xil_Out32(0xFD40F030, 0); - Xil_Out32(0xFD40F034, 0); - Xil_Out32(0xFD40F038, 0); - Xil_Out32(0xFD40F03C, 0); - Xil_Out32(0xFD40F040, 0); - Xil_Out32(0xFD40F044, 0); - Xil_Out32(0xFD40F048, 0); - Xil_Out32(0xFD40F04C, 0); - Xil_Out32(0xFD40F050, 0); - Xil_Out32(0xFD40F054, 0); - Xil_Out32(0xFD40F058, 0); - Xil_Out32(0xFD40F068, 1); - Xil_Out32(0xFD40F06C, 0); - Xil_Out32(0xFD40D0AC, 0); - psu_mask_write(0xFD410044, 0x000000C0U, 0x00000040U); - psu_mask_write(0xFD410040, 0x000000C0U, 0x00000040U); - psu_mask_write(0xFD41003C, 0x00000070U, 0x00000000U); - } return 1; } -static int serdes_illcalib(u32 lane3_protocol, u32 lane3_rate, - u32 lane2_protocol, u32 lane2_rate, - u32 lane1_protocol, u32 lane1_rate, - u32 lane0_protocol, u32 lane0_rate) +static unsigned long psu_resetin_init_data(void) { - unsigned int rdata = 0; - unsigned int sata_gen2 = 1; - unsigned int temp_ill12 = 0; - unsigned int temp_PLL_REF_SEL_OFFSET; - unsigned int temp_TM_IQ_ILL1; - unsigned int temp_TM_E_ILL1; - unsigned int temp_tx_dig_tm_61; - unsigned int temp_tm_dig_6; - unsigned int temp_pll_fbdiv_frac_3_msb_offset; + psu_mask_write(0xFF5E0230, 0x00000001U, 0x00000001U); - if (lane0_protocol == 2 || lane0_protocol == 1) { - Xil_Out32(0xFD401910, 0xF3); - Xil_Out32(0xFD40193C, 0xF3); - Xil_Out32(0xFD401914, 0xF3); - Xil_Out32(0xFD401940, 0xF3); - } - if (lane1_protocol == 2 || lane1_protocol == 1) { - Xil_Out32(0xFD405910, 0xF3); - Xil_Out32(0xFD40593C, 0xF3); - Xil_Out32(0xFD405914, 0xF3); - Xil_Out32(0xFD405940, 0xF3); - } - if (lane2_protocol == 2 || lane2_protocol == 1) { - Xil_Out32(0xFD409910, 0xF3); - Xil_Out32(0xFD40993C, 0xF3); - Xil_Out32(0xFD409914, 0xF3); - Xil_Out32(0xFD409940, 0xF3); - } - if (lane3_protocol == 2 || lane3_protocol == 1) { - Xil_Out32(0xFD40D910, 0xF3); - Xil_Out32(0xFD40D93C, 0xF3); - Xil_Out32(0xFD40D914, 0xF3); - Xil_Out32(0xFD40D940, 0xF3); - } + return 1; +} - if (sata_gen2 == 1) { - if (lane0_protocol == 2) { - temp_pll_fbdiv_frac_3_msb_offset = Xil_In32(0xFD402360); - Xil_Out32(0xFD402360, 0x0); - temp_PLL_REF_SEL_OFFSET = Xil_In32(0xFD410000); - psu_mask_write(0xFD410000, 0x0000001FU, 0x0000000DU); - temp_TM_IQ_ILL1 = Xil_In32(0xFD4018F8); - temp_TM_E_ILL1 = Xil_In32(0xFD401924); - Xil_Out32(0xFD4018F8, 0x78); - temp_tx_dig_tm_61 = Xil_In32(0xFD4000F4); - temp_tm_dig_6 = Xil_In32(0xFD40106C); - psu_mask_write(0xFD4000F4, 0x0000000BU, 0x00000000U); - psu_mask_write(0xFD40106C, 0x0000000FU, 0x00000000U); - temp_ill12 = Xil_In32(0xFD401990) & 0xF0; +static unsigned long psu_afi_config(void) +{ + psu_mask_write(0xFD1A0100, 0x00001F80U, 0x00000000U); + psu_mask_write(0xFF5E023C, 0x00080000U, 0x00000000U); + psu_mask_write(0xFF419000, 0x00000300U, 0x00000000U); - serdes_illcalib_pcie_gen1(0, 0, 0, 0, 0, 0, 0, 1, 0, 0); + return 1; +} - Xil_Out32(0xFD402360, temp_pll_fbdiv_frac_3_msb_offset); - Xil_Out32(0xFD410000, temp_PLL_REF_SEL_OFFSET); - Xil_Out32(0xFD4018F8, temp_TM_IQ_ILL1); - Xil_Out32(0xFD4000F4, temp_tx_dig_tm_61); - Xil_Out32(0xFD40106C, temp_tm_dig_6); - Xil_Out32(0xFD401928, Xil_In32(0xFD401924)); - temp_ill12 = - temp_ill12 | (Xil_In32(0xFD401990) >> 4 & 0xF); - Xil_Out32(0xFD401990, temp_ill12); - Xil_Out32(0xFD401924, temp_TM_E_ILL1); - } - if (lane1_protocol == 2) { - temp_pll_fbdiv_frac_3_msb_offset = Xil_In32(0xFD406360); - Xil_Out32(0xFD406360, 0x0); - temp_PLL_REF_SEL_OFFSET = Xil_In32(0xFD410004); - psu_mask_write(0xFD410004, 0x0000001FU, 0x0000000DU); - temp_TM_IQ_ILL1 = Xil_In32(0xFD4058F8); - temp_TM_E_ILL1 = Xil_In32(0xFD405924); - Xil_Out32(0xFD4058F8, 0x78); - temp_tx_dig_tm_61 = Xil_In32(0xFD4040F4); - temp_tm_dig_6 = Xil_In32(0xFD40506C); - psu_mask_write(0xFD4040F4, 0x0000000BU, 0x00000000U); - psu_mask_write(0xFD40506C, 0x0000000FU, 0x00000000U); - temp_ill12 = Xil_In32(0xFD405990) & 0xF0; +static unsigned long psu_ddr_phybringup_data(void) +{ + unsigned int regval = 0; - serdes_illcalib_pcie_gen1(1, 0, 0, 0, 0, 1, 0, 0, 0, 0); + for (int tp = 0; tp < 20; tp++) + regval = Xil_In32(0xFD070018); + int cur_PLLCR0; - Xil_Out32(0xFD406360, temp_pll_fbdiv_frac_3_msb_offset); - Xil_Out32(0xFD410004, temp_PLL_REF_SEL_OFFSET); - Xil_Out32(0xFD4058F8, temp_TM_IQ_ILL1); - Xil_Out32(0xFD4040F4, temp_tx_dig_tm_61); - Xil_Out32(0xFD40506C, temp_tm_dig_6); - Xil_Out32(0xFD405928, Xil_In32(0xFD405924)); - temp_ill12 = - temp_ill12 | (Xil_In32(0xFD405990) >> 4 & 0xF); - Xil_Out32(0xFD405990, temp_ill12); - Xil_Out32(0xFD405924, temp_TM_E_ILL1); - } - if (lane2_protocol == 2) { - temp_pll_fbdiv_frac_3_msb_offset = Xil_In32(0xFD40A360); - Xil_Out32(0xFD40A360, 0x0); - temp_PLL_REF_SEL_OFFSET = Xil_In32(0xFD410008); - psu_mask_write(0xFD410008, 0x0000001FU, 0x0000000DU); - temp_TM_IQ_ILL1 = Xil_In32(0xFD4098F8); - temp_TM_E_ILL1 = Xil_In32(0xFD409924); - Xil_Out32(0xFD4098F8, 0x78); - temp_tx_dig_tm_61 = Xil_In32(0xFD4080F4); - temp_tm_dig_6 = Xil_In32(0xFD40906C); - psu_mask_write(0xFD4080F4, 0x0000000BU, 0x00000000U); - psu_mask_write(0xFD40906C, 0x0000000FU, 0x00000000U); - temp_ill12 = Xil_In32(0xFD409990) & 0xF0; + cur_PLLCR0 = (Xil_In32(0xFD080068U) & 0xFFFFFFFFU) >> 0x00000000U; + int cur_DX8SL0PLLCR0; - serdes_illcalib_pcie_gen1(2, 0, 0, 1, 0, 0, 0, 0, 0, 0); + cur_DX8SL0PLLCR0 = (Xil_In32(0xFD081404U) & 0xFFFFFFFFU) >> 0x00000000U; + int cur_DX8SL1PLLCR0; - Xil_Out32(0xFD40A360, temp_pll_fbdiv_frac_3_msb_offset); - Xil_Out32(0xFD410008, temp_PLL_REF_SEL_OFFSET); - Xil_Out32(0xFD4098F8, temp_TM_IQ_ILL1); - Xil_Out32(0xFD4080F4, temp_tx_dig_tm_61); - Xil_Out32(0xFD40906C, temp_tm_dig_6); - Xil_Out32(0xFD409928, Xil_In32(0xFD409924)); - temp_ill12 = - temp_ill12 | (Xil_In32(0xFD409990) >> 4 & 0xF); - Xil_Out32(0xFD409990, temp_ill12); - Xil_Out32(0xFD409924, temp_TM_E_ILL1); - } - if (lane3_protocol == 2) { - temp_pll_fbdiv_frac_3_msb_offset = Xil_In32(0xFD40E360); - Xil_Out32(0xFD40E360, 0x0); - temp_PLL_REF_SEL_OFFSET = Xil_In32(0xFD41000C); - psu_mask_write(0xFD41000C, 0x0000001FU, 0x0000000DU); - temp_TM_IQ_ILL1 = Xil_In32(0xFD40D8F8); - temp_TM_E_ILL1 = Xil_In32(0xFD40D924); - Xil_Out32(0xFD40D8F8, 0x78); - temp_tx_dig_tm_61 = Xil_In32(0xFD40C0F4); - temp_tm_dig_6 = Xil_In32(0xFD40D06C); - psu_mask_write(0xFD40C0F4, 0x0000000BU, 0x00000000U); - psu_mask_write(0xFD40D06C, 0x0000000FU, 0x00000000U); - temp_ill12 = Xil_In32(0xFD40D990) & 0xF0; + cur_DX8SL1PLLCR0 = (Xil_In32(0xFD081444U) & 0xFFFFFFFFU) >> 0x00000000U; + int cur_DX8SL2PLLCR0; - serdes_illcalib_pcie_gen1(3, 1, 0, 0, 0, 0, 0, 0, 0, 0); + cur_DX8SL2PLLCR0 = (Xil_In32(0xFD081484U) & 0xFFFFFFFFU) >> 0x00000000U; + int cur_DX8SL3PLLCR0; - Xil_Out32(0xFD40E360, temp_pll_fbdiv_frac_3_msb_offset); - Xil_Out32(0xFD41000C, temp_PLL_REF_SEL_OFFSET); - Xil_Out32(0xFD40D8F8, temp_TM_IQ_ILL1); - Xil_Out32(0xFD40C0F4, temp_tx_dig_tm_61); - Xil_Out32(0xFD40D06C, temp_tm_dig_6); - Xil_Out32(0xFD40D928, Xil_In32(0xFD40D924)); - temp_ill12 = - temp_ill12 | (Xil_In32(0xFD40D990) >> 4 & 0xF); - Xil_Out32(0xFD40D990, temp_ill12); - Xil_Out32(0xFD40D924, temp_TM_E_ILL1); - } - rdata = Xil_In32(0xFD410098); - rdata = (rdata & 0xDF); - Xil_Out32(0xFD410098, rdata); - } + cur_DX8SL3PLLCR0 = (Xil_In32(0xFD0814C4U) & 0xFFFFFFFFU) >> 0x00000000U; + int cur_DX8SL4PLLCR0; - if (lane0_protocol == 2 && lane0_rate == 3) { - psu_mask_write(0xFD40198C, 0x000000F0U, 0x00000020U); - psu_mask_write(0xFD40192C, 0x000000FFU, 0x00000094U); - } - if (lane1_protocol == 2 && lane1_rate == 3) { - psu_mask_write(0xFD40598C, 0x000000F0U, 0x00000020U); - psu_mask_write(0xFD40592C, 0x000000FFU, 0x00000094U); - } - if (lane2_protocol == 2 && lane2_rate == 3) { - psu_mask_write(0xFD40998C, 0x000000F0U, 0x00000020U); - psu_mask_write(0xFD40992C, 0x000000FFU, 0x00000094U); - } - if (lane3_protocol == 2 && lane3_rate == 3) { - psu_mask_write(0xFD40D98C, 0x000000F0U, 0x00000020U); - psu_mask_write(0xFD40D92C, 0x000000FFU, 0x00000094U); - } + cur_DX8SL4PLLCR0 = (Xil_In32(0xFD081504U) & 0xFFFFFFFFU) >> 0x00000000U; + int cur_DX8SLBPLLCR0; - if (lane0_protocol == 1) { - if (lane0_rate == 0) { - serdes_illcalib_pcie_gen1(0, lane3_protocol, lane3_rate, - lane2_protocol, lane2_rate, - lane1_protocol, lane1_rate, - lane0_protocol, 0, 0); - } else { - serdes_illcalib_pcie_gen1(0, lane3_protocol, lane3_rate, - lane2_protocol, lane2_rate, - lane1_protocol, lane1_rate, - lane0_protocol, 0, 0); - serdes_illcalib_pcie_gen1(0, lane3_protocol, lane3_rate, - lane2_protocol, lane2_rate, - lane1_protocol, lane1_rate, - lane0_protocol, lane0_rate, - 1); - } + cur_DX8SLBPLLCR0 = (Xil_In32(0xFD0817C4U) & 0xFFFFFFFFU) >> 0x00000000U; + Xil_Out32(0xFD080068, 0x02120000); + Xil_Out32(0xFD081404, 0x02120000); + Xil_Out32(0xFD081444, 0x02120000); + Xil_Out32(0xFD081484, 0x02120000); + Xil_Out32(0xFD0814C4, 0x02120000); + Xil_Out32(0xFD081504, 0x02120000); + Xil_Out32(0xFD0817C4, 0x02120000); + int cur_div2; + + cur_div2 = (Xil_In32(0xFD1A002CU) & 0x00010000U) >> 0x00000010U; + int cur_fbdiv; + + cur_fbdiv = (Xil_In32(0xFD1A002CU) & 0x00007F00U) >> 0x00000008U; + dpll_prog(1, 49, 63, 625, 3, 3, 2); + for (int tp = 0; tp < 20; tp++) + regval = Xil_In32(0xFD070018); + unsigned int pll_retry = 10; + unsigned int pll_locked = 0; + + while ((pll_retry > 0) && (!pll_locked)) { + Xil_Out32(0xFD080004, 0x00040010); + Xil_Out32(0xFD080004, 0x00040011); + + while ((Xil_In32(0xFD080030) & 0x1) != 1) + ; + pll_locked = (Xil_In32(0xFD080030) & 0x80000000) + >> 31; + pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000) + >> 16; + pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000) >> 16; + pll_retry--; } + Xil_Out32(0xFD0800C4, Xil_In32(0xFD0800C4) | (pll_retry << 16)); + if (!pll_locked) + return 0; - if (lane0_protocol == 3) - Xil_Out32(0xFD401914, 0xF3); - if (lane0_protocol == 3) - Xil_Out32(0xFD401940, 0xF3); - if (lane0_protocol == 3) - Xil_Out32(0xFD401990, 0x20); - if (lane0_protocol == 3) - Xil_Out32(0xFD401924, 0x37); + Xil_Out32(0xFD080004U, 0x00040063U); + Xil_Out32(0xFD0800C0U, 0x00000001U); + + while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU) + ; + prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U); - if (lane1_protocol == 3) - Xil_Out32(0xFD405914, 0xF3); - if (lane1_protocol == 3) - Xil_Out32(0xFD405940, 0xF3); - if (lane1_protocol == 3) - Xil_Out32(0xFD405990, 0x20); - if (lane1_protocol == 3) - Xil_Out32(0xFD405924, 0x37); + while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU) + ; + Xil_Out32(0xFD070010U, 0x80000018U); + Xil_Out32(0xFD0701B0U, 0x00000005U); + regval = Xil_In32(0xFD070018); + while ((regval & 0x1) != 0x0) + regval = Xil_In32(0xFD070018); - if (lane2_protocol == 3) - Xil_Out32(0xFD409914, 0xF3); - if (lane2_protocol == 3) - Xil_Out32(0xFD409940, 0xF3); - if (lane2_protocol == 3) - Xil_Out32(0xFD409990, 0x20); - if (lane2_protocol == 3) - Xil_Out32(0xFD409924, 0x37); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + Xil_Out32(0xFD070014U, 0x00000331U); + Xil_Out32(0xFD070010U, 0x80000018U); + regval = Xil_In32(0xFD070018); + while ((regval & 0x1) != 0x0) + regval = Xil_In32(0xFD070018); - if (lane3_protocol == 3) - Xil_Out32(0xFD40D914, 0xF3); - if (lane3_protocol == 3) - Xil_Out32(0xFD40D940, 0xF3); - if (lane3_protocol == 3) - Xil_Out32(0xFD40D990, 0x20); - if (lane3_protocol == 3) - Xil_Out32(0xFD40D924, 0x37); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + Xil_Out32(0xFD070014U, 0x00000B36U); + Xil_Out32(0xFD070010U, 0x80000018U); + regval = Xil_In32(0xFD070018); + while ((regval & 0x1) != 0x0) + regval = Xil_In32(0xFD070018); - return 1; -} + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + Xil_Out32(0xFD070014U, 0x00000C56U); + Xil_Out32(0xFD070010U, 0x80000018U); + regval = Xil_In32(0xFD070018); + while ((regval & 0x1) != 0x0) + regval = Xil_In32(0xFD070018); -static void dpll_prog(int div2, int ddr_pll_fbdiv, int d_lock_dly, - int d_lock_cnt, int d_lfhf, int d_cp, int d_res) -{ - unsigned int pll_ctrl_regval; - unsigned int pll_status_regval; + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + Xil_Out32(0xFD070014U, 0x00000E19U); + Xil_Out32(0xFD070010U, 0x80000018U); + regval = Xil_In32(0xFD070018); + while ((regval & 0x1) != 0x0) + regval = Xil_In32(0xFD070018); - pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C)); - pll_ctrl_regval = pll_ctrl_regval & (~0x00010000U); - pll_ctrl_regval = pll_ctrl_regval | (div2 << 16); - Xil_Out32(((0xFD1A0000U) + 0x0000002C), pll_ctrl_regval); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + regval = Xil_In32(0xFD070018); + Xil_Out32(0xFD070014U, 0x00001616U); + Xil_Out32(0xFD070010U, 0x80000018U); + Xil_Out32(0xFD070010U, 0x80000010U); + Xil_Out32(0xFD0701B0U, 0x00000005U); + Xil_Out32(0xFD070320U, 0x00000001U); + while ((Xil_In32(0xFD070004U) & 0x0000000FU) != 0x00000001U) + ; + prog_reg(0xFD0701B0U, 0x00000001U, 0x00000000U, 0x00000000U); + prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U); + prog_reg(0xFD080028U, 0x00000001U, 0x00000000U, 0x00000001U); + prog_reg(0xFD080004U, 0x20000000U, 0x0000001DU, 0x00000001U); + prog_reg(0xFD08016CU, 0x00000004U, 0x00000002U, 0x00000001U); + prog_reg(0xFD080168U, 0x000000F0U, 0x00000004U, 0x00000007U); + prog_reg(0xFD080168U, 0x00000F00U, 0x00000008U, 0x00000002U); + prog_reg(0xFD080168U, 0x0000000FU, 0x00000000U, 0x00000001U); + for (int tp = 0; tp < 20; tp++) + regval = Xil_In32(0xFD070018); - pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030)); - pll_ctrl_regval = pll_ctrl_regval & (~0xFE000000U); - pll_ctrl_regval = pll_ctrl_regval | (d_lock_dly << 25); - Xil_Out32(((0xFD1A0000U) + 0x00000030), pll_ctrl_regval); + Xil_Out32(0xFD080068, cur_PLLCR0); + Xil_Out32(0xFD081404, cur_DX8SL0PLLCR0); + Xil_Out32(0xFD081444, cur_DX8SL1PLLCR0); + Xil_Out32(0xFD081484, cur_DX8SL2PLLCR0); + Xil_Out32(0xFD0814C4, cur_DX8SL3PLLCR0); + Xil_Out32(0xFD081504, cur_DX8SL4PLLCR0); + Xil_Out32(0xFD0817C4, cur_DX8SLBPLLCR0); + for (int tp = 0; tp < 20; tp++) + regval = Xil_In32(0xFD070018); - pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030)); - pll_ctrl_regval = pll_ctrl_regval & (~0x007FE000U); - pll_ctrl_regval = pll_ctrl_regval | (d_lock_cnt << 13); - Xil_Out32(((0xFD1A0000U) + 0x00000030), pll_ctrl_regval); + dpll_prog(cur_div2, cur_fbdiv, 63, 625, 3, 3, 2); + for (int tp = 0; tp < 2000; tp++) + regval = Xil_In32(0xFD070018); - pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030)); - pll_ctrl_regval = pll_ctrl_regval & (~0x00000C00U); - pll_ctrl_regval = pll_ctrl_regval | (d_lfhf << 10); - Xil_Out32(((0xFD1A0000U) + 0x00000030), pll_ctrl_regval); + prog_reg(0xFD080004U, 0x20000000U, 0x0000001DU, 0x00000000U); + prog_reg(0xFD080004U, 0x00040000U, 0x00000012U, 0x00000001U); + prog_reg(0xFD080004U, 0x00000040U, 0x00000006U, 0x00000001U); + prog_reg(0xFD080004U, 0x00000020U, 0x00000005U, 0x00000001U); + prog_reg(0xFD080004U, 0x00000010U, 0x00000004U, 0x00000001U); + prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U); - pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030)); - pll_ctrl_regval = pll_ctrl_regval & (~0x000001E0U); - pll_ctrl_regval = pll_ctrl_regval | (d_cp << 5); - Xil_Out32(((0xFD1A0000U) + 0x00000030), pll_ctrl_regval); + while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU) + ; + prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U); - pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030)); - pll_ctrl_regval = pll_ctrl_regval & (~0x0000000FU); - pll_ctrl_regval = pll_ctrl_regval | (d_res << 0); - Xil_Out32(((0xFD1A0000U) + 0x00000030), pll_ctrl_regval); + while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU) + ; + for (int tp = 0; tp < 2000; tp++) + regval = Xil_In32(0xFD070018); - pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C)); - pll_ctrl_regval = pll_ctrl_regval & (~0x00007F00U); - pll_ctrl_regval = pll_ctrl_regval | (ddr_pll_fbdiv << 8); - Xil_Out32(((0xFD1A0000U) + 0x0000002C), pll_ctrl_regval); + prog_reg(0xFD080028U, 0x00000001U, 0x00000000U, 0x00000000U); + prog_reg(0xFD08016CU, 0x00000004U, 0x00000002U, 0x00000001U); + prog_reg(0xFD080168U, 0x000000F0U, 0x00000004U, 0x00000007U); + prog_reg(0xFD080168U, 0x00000F00U, 0x00000008U, 0x00000003U); + prog_reg(0xFD080168U, 0x0000000FU, 0x00000000U, 0x00000001U); + for (int tp = 0; tp < 2000; tp++) + regval = Xil_In32(0xFD070018); - pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C)); - pll_ctrl_regval = pll_ctrl_regval & (~0x00000008U); - pll_ctrl_regval = pll_ctrl_regval | (1 << 3); - Xil_Out32(((0xFD1A0000U) + 0x0000002C), pll_ctrl_regval); + prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U); + Xil_Out32(0xFD080004, 0x0014FE01); - pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C)); - pll_ctrl_regval = pll_ctrl_regval & (~0x00000001U); - pll_ctrl_regval = pll_ctrl_regval | (1 << 0); - Xil_Out32(((0xFD1A0000U) + 0x0000002C), pll_ctrl_regval); + regval = Xil_In32(0xFD080030); + while (regval != 0x8000007E) + regval = Xil_In32(0xFD080030); - pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C)); - pll_ctrl_regval = pll_ctrl_regval & (~0x00000001U); - pll_ctrl_regval = pll_ctrl_regval | (0 << 0); - Xil_Out32(((0xFD1A0000U) + 0x0000002C), pll_ctrl_regval); + Xil_Out32(0xFD080200U, 0x000091C7U); + regval = Xil_In32(0xFD080030); + while (regval != 0x80008FFF) + regval = Xil_In32(0xFD080030); - pll_status_regval = 0x00000000; - while ((pll_status_regval & 0x00000002U) != 0x00000002U) - pll_status_regval = Xil_In32(((0xFD1A0000U) + 0x00000044)); + Xil_Out32(0xFD080200U, 0x800091C7U); + regval = ((Xil_In32(0xFD080030) & 0x1FFF0000) >> 18); + if (regval != 0) + return 0; + prog_reg(0xFD070320U, 0x00000001U, 0x00000000U, 0x00000000U); + prog_reg(0xFD0701B0U, 0x00000001U, 0x00000000U, 0x00000001U); + prog_reg(0xFD0701A0U, 0x80000000U, 0x0000001FU, 0x00000000U); + prog_reg(0xFD070320U, 0x00000001U, 0x00000000U, 0x00000001U); + Xil_Out32(0xFD070180U, 0x02160010U); + Xil_Out32(0xFD070060U, 0x00000000U); + prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000000U); + for (int tp = 0; tp < 4000; tp++) + regval = Xil_In32(0xFD070018); - pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C)); - pll_ctrl_regval = pll_ctrl_regval & (~0x00000008U); - pll_ctrl_regval = pll_ctrl_regval | (0 << 3); - Xil_Out32(((0xFD1A0000U) + 0x0000002C), pll_ctrl_regval); + prog_reg(0xFD080090U, 0x00000FC0U, 0x00000006U, 0x00000007U); + prog_reg(0xFD080090U, 0x00000004U, 0x00000002U, 0x00000001U); + prog_reg(0xFD08070CU, 0x02000000U, 0x00000019U, 0x00000000U); + prog_reg(0xFD08080CU, 0x02000000U, 0x00000019U, 0x00000000U); + prog_reg(0xFD08090CU, 0x02000000U, 0x00000019U, 0x00000000U); + prog_reg(0xFD080A0CU, 0x02000000U, 0x00000019U, 0x00000000U); + prog_reg(0xFD080F0CU, 0x02000000U, 0x00000019U, 0x00000000U); + prog_reg(0xFD080200U, 0x00000010U, 0x00000004U, 0x00000001U); + prog_reg(0xFD080250U, 0x00000002U, 0x00000001U, 0x00000000U); + prog_reg(0xFD080250U, 0x0000000CU, 0x00000002U, 0x00000001U); + prog_reg(0xFD080250U, 0x000000F0U, 0x00000004U, 0x00000000U); + prog_reg(0xFD080250U, 0x00300000U, 0x00000014U, 0x00000001U); + prog_reg(0xFD080250U, 0xF0000000U, 0x0000001CU, 0x00000002U); + prog_reg(0xFD08070CU, 0x08000000U, 0x0000001BU, 0x00000000U); + prog_reg(0xFD08080CU, 0x08000000U, 0x0000001BU, 0x00000000U); + prog_reg(0xFD08090CU, 0x08000000U, 0x0000001BU, 0x00000000U); + prog_reg(0xFD080A0CU, 0x08000000U, 0x0000001BU, 0x00000000U); + prog_reg(0xFD080B0CU, 0x08000000U, 0x0000001BU, 0x00000000U); + prog_reg(0xFD080C0CU, 0x08000000U, 0x0000001BU, 0x00000000U); + prog_reg(0xFD080D0CU, 0x08000000U, 0x0000001BU, 0x00000000U); + prog_reg(0xFD080E0CU, 0x08000000U, 0x0000001BU, 0x00000000U); + prog_reg(0xFD080F0CU, 0x08000000U, 0x0000001BU, 0x00000000U); + prog_reg(0xFD080254U, 0x000000FFU, 0x00000000U, 0x00000001U); + prog_reg(0xFD080254U, 0x000F0000U, 0x00000010U, 0x0000000AU); + prog_reg(0xFD080250U, 0x00000001U, 0x00000000U, 0x00000001U); + + return 1; } static int serdes_enb_coarse_saturation(void) diff --git a/board/xilinx/zynqmp/zynqmp-zcu208-revA/psu_init_gpl.c b/board/xilinx/zynqmp/zynqmp-zcu208-revA/psu_init_gpl.c index 2adcad04d86..f98ad8af82e 100644 --- a/board/xilinx/zynqmp/zynqmp-zcu208-revA/psu_init_gpl.c +++ b/board/xilinx/zynqmp/zynqmp-zcu208-revA/psu_init_gpl.c @@ -6,1692 +6,1687 @@ #include #include -static int serdes_illcalib(u32 lane3_protocol, u32 lane3_rate, - u32 lane2_protocol, u32 lane2_rate, - u32 lane1_protocol, u32 lane1_rate, - u32 lane0_protocol, u32 lane0_rate); - -static unsigned long psu_pll_init_data(void) +static int serdes_rst_seq(u32 lane3_protocol, u32 lane3_rate, + u32 lane2_protocol, u32 lane2_rate, + u32 lane1_protocol, u32 lane1_rate, + u32 lane0_protocol, u32 lane0_rate) { - psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4B0C82U); - psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00015A00U); - psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000008U); - psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000001U); - psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000000U); - mask_poll(0xFF5E0040, 0x00000002U); - psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000000U); - psu_mask_write(0xFF5E0048, 0x00003F00U, 0x00000300U); - psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01012300U); - psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E4B0C82U); - psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00015A00U); - psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000008U); - psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000001U); - psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000000U); - mask_poll(0xFF5E0040, 0x00000001U); - psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000000U); - psu_mask_write(0xFF5E0044, 0x00003F00U, 0x00000300U); - psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U); - psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014800U); - psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000008U); - psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000000U); - mask_poll(0xFD1A0044, 0x00000001U); - psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000000U); - psu_mask_write(0xFD1A0048, 0x00003F00U, 0x00000300U); - psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U); - psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00013F00U); - psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000008U); - psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000000U); - mask_poll(0xFD1A0044, 0x00000002U); - psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000000U); - psu_mask_write(0xFD1A004C, 0x00003F00U, 0x00000200U); - psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E4B0C82U); - psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00015A00U); - psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000008U); - psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000000U); - mask_poll(0xFD1A0044, 0x00000004U); - psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000000U); - psu_mask_write(0xFD1A0050, 0x00003F00U, 0x00000300U); + Xil_Out32(0xFD410098, 0x00000000); + Xil_Out32(0xFD401010, 0x00000040); + Xil_Out32(0xFD405010, 0x00000040); + Xil_Out32(0xFD409010, 0x00000040); + Xil_Out32(0xFD40D010, 0x00000040); + Xil_Out32(0xFD402084, 0x00000080); + Xil_Out32(0xFD406084, 0x00000080); + Xil_Out32(0xFD40A084, 0x00000080); + Xil_Out32(0xFD40E084, 0x00000080); + Xil_Out32(0xFD410098, 0x00000004); + mask_delay(50); + if (lane0_rate == 1) + Xil_Out32(0xFD410098, 0x0000000E); + Xil_Out32(0xFD410098, 0x00000006); + if (lane0_rate == 1) { + Xil_Out32(0xFD40000C, 0x00000004); + Xil_Out32(0xFD40400C, 0x00000004); + Xil_Out32(0xFD40800C, 0x00000004); + Xil_Out32(0xFD40C00C, 0x00000004); + Xil_Out32(0xFD410098, 0x00000007); + mask_delay(400); + Xil_Out32(0xFD40000C, 0x0000000C); + Xil_Out32(0xFD40400C, 0x0000000C); + Xil_Out32(0xFD40800C, 0x0000000C); + Xil_Out32(0xFD40C00C, 0x0000000C); + mask_delay(15); + Xil_Out32(0xFD410098, 0x0000000F); + mask_delay(100); + } + if (lane0_protocol != 0) + mask_poll(0xFD4023E4, 0x00000010U); + if (lane1_protocol != 0) + mask_poll(0xFD4063E4, 0x00000010U); + if (lane2_protocol != 0) + mask_poll(0xFD40A3E4, 0x00000010U); + if (lane3_protocol != 0) + mask_poll(0xFD40E3E4, 0x00000010U); + mask_delay(50); + Xil_Out32(0xFD401010, 0x000000C0); + Xil_Out32(0xFD405010, 0x000000C0); + Xil_Out32(0xFD409010, 0x000000C0); + Xil_Out32(0xFD40D010, 0x000000C0); + Xil_Out32(0xFD401010, 0x00000080); + Xil_Out32(0xFD405010, 0x00000080); + Xil_Out32(0xFD409010, 0x00000080); + Xil_Out32(0xFD40D010, 0x00000080); + Xil_Out32(0xFD402084, 0x000000C0); + Xil_Out32(0xFD406084, 0x000000C0); + Xil_Out32(0xFD40A084, 0x000000C0); + Xil_Out32(0xFD40E084, 0x000000C0); + mask_delay(50); + Xil_Out32(0xFD402084, 0x00000080); + Xil_Out32(0xFD406084, 0x00000080); + Xil_Out32(0xFD40A084, 0x00000080); + Xil_Out32(0xFD40E084, 0x00000080); + mask_delay(50); + Xil_Out32(0xFD401010, 0x00000000); + Xil_Out32(0xFD405010, 0x00000000); + Xil_Out32(0xFD409010, 0x00000000); + Xil_Out32(0xFD40D010, 0x00000000); + Xil_Out32(0xFD402084, 0x00000000); + Xil_Out32(0xFD406084, 0x00000000); + Xil_Out32(0xFD40A084, 0x00000000); + Xil_Out32(0xFD40E084, 0x00000000); + mask_delay(500); return 1; } -static unsigned long psu_clock_init_data(void) +static int serdes_bist_static_settings(u32 lane_active) { - psu_mask_write(0xFF5E005C, 0x063F3F07U, 0x06010C00U); - psu_mask_write(0xFF5E0100, 0x013F3F07U, 0x01010600U); - psu_mask_write(0xFF5E0060, 0x023F3F07U, 0x02010600U); - psu_mask_write(0xFF5E004C, 0x023F3F07U, 0x02031900U); - psu_mask_write(0xFF5E0068, 0x013F3F07U, 0x01010C00U); - psu_mask_write(0xFF5E0070, 0x013F3F07U, 0x01010800U); - psu_mask_write(0xFF18030C, 0x00020000U, 0x00000000U); - psu_mask_write(0xFF5E0074, 0x013F3F07U, 0x01010F00U); - psu_mask_write(0xFF5E0120, 0x013F3F07U, 0x01010F00U); - psu_mask_write(0xFF5E0124, 0x013F3F07U, 0x01010F00U); - psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000302U); - psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000602U); - psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000800U); - psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U); - psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U); - psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U); - psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U); - psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010F00U); - psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011E02U); - psu_mask_write(0xFF5E0104, 0x00000007U, 0x00000000U); - psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000F00U); - psu_mask_write(0xFD1A00A0, 0x01003F07U, 0x01000200U); - psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U); - psu_mask_write(0xFD1A0068, 0x01003F07U, 0x01000200U); - psu_mask_write(0xFD1A0080, 0x00003F07U, 0x00000200U); - psu_mask_write(0xFD1A00B8, 0x01003F07U, 0x01000200U); - psu_mask_write(0xFD1A00BC, 0x01003F07U, 0x01000200U); - psu_mask_write(0xFD1A00C0, 0x01003F07U, 0x01000203U); - psu_mask_write(0xFD1A00C4, 0x01003F07U, 0x01000502U); - psu_mask_write(0xFD1A00F8, 0x00003F07U, 0x00000200U); - psu_mask_write(0xFF180380, 0x000000FFU, 0x00000000U); - psu_mask_write(0xFD610100, 0x00000001U, 0x00000000U); - psu_mask_write(0xFF180300, 0x00000001U, 0x00000000U); - psu_mask_write(0xFF410050, 0x00000001U, 0x00000000U); + if (lane_active == 0) { + Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) & 0xFFFFFF1F)); + Xil_Out32(0xFD403068, 0x1); + Xil_Out32(0xFD40306C, 0x1); + Xil_Out32(0xFD4010AC, 0x0020); + Xil_Out32(0xFD403008, 0x0); + Xil_Out32(0xFD40300C, 0xF4); + Xil_Out32(0xFD403010, 0x0); + Xil_Out32(0xFD403014, 0x0); + Xil_Out32(0xFD403018, 0x00); + Xil_Out32(0xFD40301C, 0xFB); + Xil_Out32(0xFD403020, 0xFF); + Xil_Out32(0xFD403024, 0x0); + Xil_Out32(0xFD403028, 0x00); + Xil_Out32(0xFD40302C, 0x00); + Xil_Out32(0xFD403030, 0x4A); + Xil_Out32(0xFD403034, 0x4A); + Xil_Out32(0xFD403038, 0x4A); + Xil_Out32(0xFD40303C, 0x4A); + Xil_Out32(0xFD403040, 0x0); + Xil_Out32(0xFD403044, 0x14); + Xil_Out32(0xFD403048, 0x02); + Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) & 0xFFFFFF1F)); + } + if (lane_active == 1) { + Xil_Out32(0xFD407004, (Xil_In32(0xFD407004) & 0xFFFFFF1F)); + Xil_Out32(0xFD407068, 0x1); + Xil_Out32(0xFD40706C, 0x1); + Xil_Out32(0xFD4050AC, 0x0020); + Xil_Out32(0xFD407008, 0x0); + Xil_Out32(0xFD40700C, 0xF4); + Xil_Out32(0xFD407010, 0x0); + Xil_Out32(0xFD407014, 0x0); + Xil_Out32(0xFD407018, 0x00); + Xil_Out32(0xFD40701C, 0xFB); + Xil_Out32(0xFD407020, 0xFF); + Xil_Out32(0xFD407024, 0x0); + Xil_Out32(0xFD407028, 0x00); + Xil_Out32(0xFD40702C, 0x00); + Xil_Out32(0xFD407030, 0x4A); + Xil_Out32(0xFD407034, 0x4A); + Xil_Out32(0xFD407038, 0x4A); + Xil_Out32(0xFD40703C, 0x4A); + Xil_Out32(0xFD407040, 0x0); + Xil_Out32(0xFD407044, 0x14); + Xil_Out32(0xFD407048, 0x02); + Xil_Out32(0xFD407004, (Xil_In32(0xFD407004) & 0xFFFFFF1F)); + } + + if (lane_active == 2) { + Xil_Out32(0xFD40B004, (Xil_In32(0xFD40B004) & 0xFFFFFF1F)); + Xil_Out32(0xFD40B068, 0x1); + Xil_Out32(0xFD40B06C, 0x1); + Xil_Out32(0xFD4090AC, 0x0020); + Xil_Out32(0xFD40B008, 0x0); + Xil_Out32(0xFD40B00C, 0xF4); + Xil_Out32(0xFD40B010, 0x0); + Xil_Out32(0xFD40B014, 0x0); + Xil_Out32(0xFD40B018, 0x00); + Xil_Out32(0xFD40B01C, 0xFB); + Xil_Out32(0xFD40B020, 0xFF); + Xil_Out32(0xFD40B024, 0x0); + Xil_Out32(0xFD40B028, 0x00); + Xil_Out32(0xFD40B02C, 0x00); + Xil_Out32(0xFD40B030, 0x4A); + Xil_Out32(0xFD40B034, 0x4A); + Xil_Out32(0xFD40B038, 0x4A); + Xil_Out32(0xFD40B03C, 0x4A); + Xil_Out32(0xFD40B040, 0x0); + Xil_Out32(0xFD40B044, 0x14); + Xil_Out32(0xFD40B048, 0x02); + Xil_Out32(0xFD40B004, (Xil_In32(0xFD40B004) & 0xFFFFFF1F)); + } + if (lane_active == 3) { + Xil_Out32(0xFD40F004, (Xil_In32(0xFD40F004) & 0xFFFFFF1F)); + Xil_Out32(0xFD40F068, 0x1); + Xil_Out32(0xFD40F06C, 0x1); + Xil_Out32(0xFD40D0AC, 0x0020); + Xil_Out32(0xFD40F008, 0x0); + Xil_Out32(0xFD40F00C, 0xF4); + Xil_Out32(0xFD40F010, 0x0); + Xil_Out32(0xFD40F014, 0x0); + Xil_Out32(0xFD40F018, 0x00); + Xil_Out32(0xFD40F01C, 0xFB); + Xil_Out32(0xFD40F020, 0xFF); + Xil_Out32(0xFD40F024, 0x0); + Xil_Out32(0xFD40F028, 0x00); + Xil_Out32(0xFD40F02C, 0x00); + Xil_Out32(0xFD40F030, 0x4A); + Xil_Out32(0xFD40F034, 0x4A); + Xil_Out32(0xFD40F038, 0x4A); + Xil_Out32(0xFD40F03C, 0x4A); + Xil_Out32(0xFD40F040, 0x0); + Xil_Out32(0xFD40F044, 0x14); + Xil_Out32(0xFD40F048, 0x02); + Xil_Out32(0xFD40F004, (Xil_In32(0xFD40F004) & 0xFFFFFF1F)); + } return 1; } -static unsigned long psu_ddr_init_data(void) +static int serdes_bist_run(u32 lane_active) { - psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000008U); - psu_mask_write(0xFD070000, 0xE30FBE3DU, 0x81040010U); - psu_mask_write(0xFD070010, 0x8000F03FU, 0x00000030U); - psu_mask_write(0xFD070020, 0x000003F3U, 0x00000200U); - psu_mask_write(0xFD070024, 0xFFFFFFFFU, 0x00800000U); - psu_mask_write(0xFD070030, 0x0000007FU, 0x00000000U); - psu_mask_write(0xFD070034, 0x00FFFF1FU, 0x00408210U); - psu_mask_write(0xFD070050, 0x00F1F1F4U, 0x00210000U); - psu_mask_write(0xFD070054, 0x0FFF0FFFU, 0x00000000U); - psu_mask_write(0xFD070060, 0x00000073U, 0x00000001U); - psu_mask_write(0xFD070064, 0x0FFF83FFU, 0x007F80B8U); - psu_mask_write(0xFD070070, 0x00000017U, 0x00000010U); - psu_mask_write(0xFD070074, 0x00000003U, 0x00000000U); - psu_mask_write(0xFD0700C4, 0x3F000391U, 0x10000200U); - psu_mask_write(0xFD0700C8, 0x01FF1F3FU, 0x0040051FU); - psu_mask_write(0xFD0700D0, 0xC3FF0FFFU, 0x00020102U); - psu_mask_write(0xFD0700D4, 0x01FF7F0FU, 0x00020000U); - psu_mask_write(0xFD0700D8, 0x0000FF0FU, 0x00002205U); - psu_mask_write(0xFD0700DC, 0xFFFFFFFFU, 0x07300301U); - psu_mask_write(0xFD0700E0, 0xFFFFFFFFU, 0x00100200U); - psu_mask_write(0xFD0700E4, 0x00FF03FFU, 0x00210004U); - psu_mask_write(0xFD0700E8, 0xFFFFFFFFU, 0x000006C0U); - psu_mask_write(0xFD0700EC, 0xFFFF0000U, 0x08190000U); - psu_mask_write(0xFD0700F0, 0x0000003FU, 0x00000010U); - psu_mask_write(0xFD0700F4, 0x00000FFFU, 0x0000066FU); - psu_mask_write(0xFD070100, 0x7F3F7F3FU, 0x0F102311U); - psu_mask_write(0xFD070104, 0x001F1F7FU, 0x00040419U); - psu_mask_write(0xFD070108, 0x3F3F3F3FU, 0x0608070CU); - psu_mask_write(0xFD07010C, 0x3FF3F3FFU, 0x0050400CU); - psu_mask_write(0xFD070110, 0x1F0F0F1FU, 0x08030409U); - psu_mask_write(0xFD070114, 0x0F0F3F1FU, 0x06060403U); - psu_mask_write(0xFD070118, 0x0F0F000FU, 0x01010004U); - psu_mask_write(0xFD07011C, 0x00000F0FU, 0x00000606U); - psu_mask_write(0xFD070120, 0x7F7F7F7FU, 0x04040D07U); - psu_mask_write(0xFD070124, 0x40070F3FU, 0x00020309U); - psu_mask_write(0xFD07012C, 0x7F1F031FU, 0x1207010EU); - psu_mask_write(0xFD070130, 0x00030F1FU, 0x00020608U); - psu_mask_write(0xFD070180, 0xF7FF03FFU, 0x81000040U); - psu_mask_write(0xFD070184, 0x3FFFFFFFU, 0x0201908AU); - psu_mask_write(0xFD070190, 0x1FBFBF3FU, 0x048B8208U); - psu_mask_write(0xFD070194, 0xF31F0F0FU, 0x00030304U); - psu_mask_write(0xFD070198, 0x0FF1F1F1U, 0x07000101U); - psu_mask_write(0xFD07019C, 0x000000F1U, 0x00000021U); - psu_mask_write(0xFD0701A0, 0xC3FF03FFU, 0x00400003U); - psu_mask_write(0xFD0701A4, 0x00FF00FFU, 0x00C800FFU); - psu_mask_write(0xFD0701B0, 0x00000007U, 0x00000000U); - psu_mask_write(0xFD0701B4, 0x00003F3FU, 0x00000906U); - psu_mask_write(0xFD0701C0, 0x00000007U, 0x00000001U); - psu_mask_write(0xFD070200, 0x0000001FU, 0x0000001FU); - psu_mask_write(0xFD070204, 0x001F1F1FU, 0x001F0909U); - psu_mask_write(0xFD070208, 0x0F0F0F0FU, 0x01010100U); - psu_mask_write(0xFD07020C, 0x0F0F0F0FU, 0x01010101U); - psu_mask_write(0xFD070210, 0x00000F0FU, 0x00000F0FU); - psu_mask_write(0xFD070214, 0x0F0F0F0FU, 0x070F0707U); - psu_mask_write(0xFD070218, 0x8F0F0F0FU, 0x07070707U); - psu_mask_write(0xFD07021C, 0x00000F0FU, 0x00000F0FU); - psu_mask_write(0xFD070220, 0x00001F1FU, 0x00001F01U); - psu_mask_write(0xFD070224, 0x0F0F0F0FU, 0x07070707U); - psu_mask_write(0xFD070228, 0x0F0F0F0FU, 0x07070707U); - psu_mask_write(0xFD07022C, 0x0000000FU, 0x00000007U); - psu_mask_write(0xFD070240, 0x0F1F0F7CU, 0x0600060CU); - psu_mask_write(0xFD070244, 0x00003333U, 0x00000001U); - psu_mask_write(0xFD070250, 0x7FFF3F07U, 0x01002001U); - psu_mask_write(0xFD070264, 0xFF00FFFFU, 0x08000040U); - psu_mask_write(0xFD07026C, 0xFF00FFFFU, 0x08000040U); - psu_mask_write(0xFD070280, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD070284, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD070288, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD07028C, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD070290, 0x0000FFFFU, 0x00000000U); - psu_mask_write(0xFD070294, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD070300, 0x00000011U, 0x00000000U); - psu_mask_write(0xFD07030C, 0x80000033U, 0x00000000U); - psu_mask_write(0xFD070320, 0x00000001U, 0x00000000U); - psu_mask_write(0xFD070400, 0x00000111U, 0x00000001U); - psu_mask_write(0xFD070404, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD070408, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD070490, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD070494, 0x0033000FU, 0x0020000BU); - psu_mask_write(0xFD070498, 0x07FF07FFU, 0x00000000U); - psu_mask_write(0xFD0704B4, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD0704B8, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD070540, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD070544, 0x03330F0FU, 0x02000B03U); - psu_mask_write(0xFD070548, 0x07FF07FFU, 0x00000000U); - psu_mask_write(0xFD070564, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD070568, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD0705F0, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD0705F4, 0x03330F0FU, 0x02000B03U); - psu_mask_write(0xFD0705F8, 0x07FF07FFU, 0x00000000U); - psu_mask_write(0xFD070614, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD070618, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD0706A0, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD0706A4, 0x0033000FU, 0x00100003U); - psu_mask_write(0xFD0706A8, 0x07FF07FFU, 0x0000004FU); - psu_mask_write(0xFD0706AC, 0x0033000FU, 0x00100003U); - psu_mask_write(0xFD0706B0, 0x000007FFU, 0x0000004FU); - psu_mask_write(0xFD0706C4, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD0706C8, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD070750, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD070754, 0x0033000FU, 0x00100003U); - psu_mask_write(0xFD070758, 0x07FF07FFU, 0x0000004FU); - psu_mask_write(0xFD07075C, 0x0033000FU, 0x00100003U); - psu_mask_write(0xFD070760, 0x000007FFU, 0x0000004FU); - psu_mask_write(0xFD070774, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD070778, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD070800, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD070804, 0x0033000FU, 0x00100003U); - psu_mask_write(0xFD070808, 0x07FF07FFU, 0x0000004FU); - psu_mask_write(0xFD07080C, 0x0033000FU, 0x00100003U); - psu_mask_write(0xFD070810, 0x000007FFU, 0x0000004FU); - psu_mask_write(0xFD070F04, 0x000001FFU, 0x00000000U); - psu_mask_write(0xFD070F08, 0x000000FFU, 0x00000000U); - psu_mask_write(0xFD070F0C, 0x000001FFU, 0x00000010U); - psu_mask_write(0xFD070F10, 0x000000FFU, 0x0000000FU); - psu_mask_write(0xFD072190, 0x1FBFBF3FU, 0x07828002U); - psu_mask_write(0xFD1A0108, 0x0000000CU, 0x00000000U); - psu_mask_write(0xFD080010, 0xFFFFFFFFU, 0x07001E00U); - psu_mask_write(0xFD080018, 0xFFFFFFFFU, 0x00F0FC00U); - psu_mask_write(0xFD08001C, 0xFFFFFFFFU, 0x55AA5480U); - psu_mask_write(0xFD080024, 0xFFFFFFFFU, 0x010100F4U); - psu_mask_write(0xFD080040, 0xFFFFFFFFU, 0x41A20D10U); - psu_mask_write(0xFD080044, 0xFFFFFFFFU, 0xCD141275U); - psu_mask_write(0xFD080068, 0xFFFFFFFFU, 0x01100000U); - psu_mask_write(0xFD080090, 0xFFFFFFFFU, 0x02A04161U); - psu_mask_write(0xFD0800C0, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD0800C4, 0xFFFFFFFFU, 0x000000E3U); - psu_mask_write(0xFD080100, 0xFFFFFFFFU, 0x0800040CU); - psu_mask_write(0xFD080110, 0xFFFFFFFFU, 0x07220F08U); - psu_mask_write(0xFD080114, 0xFFFFFFFFU, 0x28200008U); - psu_mask_write(0xFD080118, 0xFFFFFFFFU, 0x000F0300U); - psu_mask_write(0xFD08011C, 0xFFFFFFFFU, 0x83000800U); - psu_mask_write(0xFD080120, 0xFFFFFFFFU, 0x01702B07U); - psu_mask_write(0xFD080124, 0xFFFFFFFFU, 0x00310F08U); - psu_mask_write(0xFD080128, 0xFFFFFFFFU, 0x00000B0FU); - psu_mask_write(0xFD080140, 0xFFFFFFFFU, 0x08400020U); - psu_mask_write(0xFD080144, 0xFFFFFFFFU, 0x00000C80U); - psu_mask_write(0xFD080150, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080154, 0xFFFFFFFFU, 0x00000200U); - psu_mask_write(0xFD080180, 0xFFFFFFFFU, 0x00000630U); - psu_mask_write(0xFD080184, 0xFFFFFFFFU, 0x00000301U); - psu_mask_write(0xFD080188, 0xFFFFFFFFU, 0x00000010U); - psu_mask_write(0xFD08018C, 0xFFFFFFFFU, 0x00000200U); - psu_mask_write(0xFD080190, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080194, 0xFFFFFFFFU, 0x000006C0U); - psu_mask_write(0xFD080198, 0xFFFFFFFFU, 0x00000819U); - psu_mask_write(0xFD0801AC, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD0801B0, 0xFFFFFFFFU, 0x0000004DU); - psu_mask_write(0xFD0801B4, 0xFFFFFFFFU, 0x00000008U); - psu_mask_write(0xFD0801B8, 0xFFFFFFFFU, 0x0000004DU); - psu_mask_write(0xFD0801D8, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080200, 0xFFFFFFFFU, 0x800091C7U); - psu_mask_write(0xFD080204, 0xFFFFFFFFU, 0x00010236U); - psu_mask_write(0xFD080240, 0xFFFFFFFFU, 0x00141054U); - psu_mask_write(0xFD080250, 0xFFFFFFFFU, 0x00088000U); - psu_mask_write(0xFD080414, 0xFFFFFFFFU, 0x12341000U); - psu_mask_write(0xFD0804F4, 0xFFFFFFFFU, 0x00000005U); - psu_mask_write(0xFD080500, 0xFFFFFFFFU, 0x30000028U); - psu_mask_write(0xFD080508, 0xFFFFFFFFU, 0x0A000000U); - psu_mask_write(0xFD08050C, 0xFFFFFFFFU, 0x00000009U); - psu_mask_write(0xFD080510, 0xFFFFFFFFU, 0x0A000000U); - psu_mask_write(0xFD080520, 0xFFFFFFFFU, 0x0300B0CEU); - psu_mask_write(0xFD080528, 0xFFFFFFFFU, 0xF9032019U); - psu_mask_write(0xFD08052C, 0xFFFFFFFFU, 0x07F001E3U); - psu_mask_write(0xFD080544, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080548, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080558, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD08055C, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080560, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080564, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080680, 0xFFFFFFFFU, 0x008A8A58U); - psu_mask_write(0xFD080684, 0xFFFFFFFFU, 0x000079DDU); - psu_mask_write(0xFD080694, 0xFFFFFFFFU, 0x01E10210U); - psu_mask_write(0xFD080698, 0xFFFFFFFFU, 0x01E10000U); - psu_mask_write(0xFD0806A4, 0xFFFFFFFFU, 0x00087BDBU); - psu_mask_write(0xFD080700, 0xFFFFFFFFU, 0x40800604U); - psu_mask_write(0xFD080704, 0xFFFFFFFFU, 0x00007FFFU); - psu_mask_write(0xFD08070C, 0xFFFFFFFFU, 0x3F000008U); - psu_mask_write(0xFD080710, 0xFFFFFFFFU, 0x0E00B03CU); - psu_mask_write(0xFD080714, 0xFFFFFFFFU, 0x09095555U); - psu_mask_write(0xFD080718, 0xFFFFFFFFU, 0x09092B2BU); - psu_mask_write(0xFD080800, 0xFFFFFFFFU, 0x40800604U); - psu_mask_write(0xFD080804, 0xFFFFFFFFU, 0x00007FFFU); - psu_mask_write(0xFD08080C, 0xFFFFFFFFU, 0x3F000008U); - psu_mask_write(0xFD080810, 0xFFFFFFFFU, 0x0E00B03CU); - psu_mask_write(0xFD080814, 0xFFFFFFFFU, 0x09095555U); - psu_mask_write(0xFD080818, 0xFFFFFFFFU, 0x09092B2BU); - psu_mask_write(0xFD080900, 0xFFFFFFFFU, 0x40800604U); - psu_mask_write(0xFD080904, 0xFFFFFFFFU, 0x00007FFFU); - psu_mask_write(0xFD08090C, 0xFFFFFFFFU, 0x3F000008U); - psu_mask_write(0xFD080910, 0xFFFFFFFFU, 0x0E00B004U); - psu_mask_write(0xFD080914, 0xFFFFFFFFU, 0x09095555U); - psu_mask_write(0xFD080918, 0xFFFFFFFFU, 0x09092B2BU); - psu_mask_write(0xFD080A00, 0xFFFFFFFFU, 0x40800604U); - psu_mask_write(0xFD080A04, 0xFFFFFFFFU, 0x00007FFFU); - psu_mask_write(0xFD080A0C, 0xFFFFFFFFU, 0x3F000008U); - psu_mask_write(0xFD080A10, 0xFFFFFFFFU, 0x0E00B004U); - psu_mask_write(0xFD080A14, 0xFFFFFFFFU, 0x09095555U); - psu_mask_write(0xFD080A18, 0xFFFFFFFFU, 0x09092B2BU); - psu_mask_write(0xFD080B00, 0xFFFFFFFFU, 0x40800604U); - psu_mask_write(0xFD080B04, 0xFFFFFFFFU, 0x00007FFFU); - psu_mask_write(0xFD080B08, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080B0C, 0xFFFFFFFFU, 0x3F000008U); - psu_mask_write(0xFD080B10, 0xFFFFFFFFU, 0x0E00B004U); - psu_mask_write(0xFD080B14, 0xFFFFFFFFU, 0x09095555U); - psu_mask_write(0xFD080B18, 0xFFFFFFFFU, 0x09092B2BU); - psu_mask_write(0xFD080C00, 0xFFFFFFFFU, 0x40800604U); - psu_mask_write(0xFD080C04, 0xFFFFFFFFU, 0x00007FFFU); - psu_mask_write(0xFD080C08, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080C0C, 0xFFFFFFFFU, 0x3F000008U); - psu_mask_write(0xFD080C10, 0xFFFFFFFFU, 0x0E00B03CU); - psu_mask_write(0xFD080C14, 0xFFFFFFFFU, 0x09095555U); - psu_mask_write(0xFD080C18, 0xFFFFFFFFU, 0x09092B2BU); - psu_mask_write(0xFD080D00, 0xFFFFFFFFU, 0x40800604U); - psu_mask_write(0xFD080D04, 0xFFFFFFFFU, 0x00007FFFU); - psu_mask_write(0xFD080D08, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080D0C, 0xFFFFFFFFU, 0x3F000008U); - psu_mask_write(0xFD080D10, 0xFFFFFFFFU, 0x0E00B004U); - psu_mask_write(0xFD080D14, 0xFFFFFFFFU, 0x09095555U); - psu_mask_write(0xFD080D18, 0xFFFFFFFFU, 0x09092B2BU); - psu_mask_write(0xFD080E00, 0xFFFFFFFFU, 0x40800604U); - psu_mask_write(0xFD080E04, 0xFFFFFFFFU, 0x00007FFFU); - psu_mask_write(0xFD080E08, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080E0C, 0xFFFFFFFFU, 0x3F000008U); - psu_mask_write(0xFD080E10, 0xFFFFFFFFU, 0x0E00B03CU); - psu_mask_write(0xFD080E14, 0xFFFFFFFFU, 0x09095555U); - psu_mask_write(0xFD080E18, 0xFFFFFFFFU, 0x09092B2BU); - psu_mask_write(0xFD080F00, 0xFFFFFFFFU, 0x80803660U); - psu_mask_write(0xFD080F04, 0xFFFFFFFFU, 0x55556000U); - psu_mask_write(0xFD080F08, 0xFFFFFFFFU, 0xAAAAAAAAU); - psu_mask_write(0xFD080F0C, 0xFFFFFFFFU, 0x0029A4A4U); - psu_mask_write(0xFD080F10, 0xFFFFFFFFU, 0x0C00B000U); - psu_mask_write(0xFD080F14, 0xFFFFFFFFU, 0x09095555U); - psu_mask_write(0xFD080F18, 0xFFFFFFFFU, 0x09092B2BU); - psu_mask_write(0xFD081400, 0xFFFFFFFFU, 0x2A019FFEU); - psu_mask_write(0xFD081404, 0xFFFFFFFFU, 0x01100000U); - psu_mask_write(0xFD08141C, 0xFFFFFFFFU, 0x01264300U); - psu_mask_write(0xFD08142C, 0xFFFFFFFFU, 0x00041800U); - psu_mask_write(0xFD081430, 0xFFFFFFFFU, 0x70800000U); - psu_mask_write(0xFD081440, 0xFFFFFFFFU, 0x2A019FFEU); - psu_mask_write(0xFD081444, 0xFFFFFFFFU, 0x01100000U); - psu_mask_write(0xFD08145C, 0xFFFFFFFFU, 0x01264300U); - psu_mask_write(0xFD08146C, 0xFFFFFFFFU, 0x00041800U); - psu_mask_write(0xFD081470, 0xFFFFFFFFU, 0x70800000U); - psu_mask_write(0xFD081480, 0xFFFFFFFFU, 0x2A019FFEU); - psu_mask_write(0xFD081484, 0xFFFFFFFFU, 0x01100000U); - psu_mask_write(0xFD08149C, 0xFFFFFFFFU, 0x01264300U); - psu_mask_write(0xFD0814AC, 0xFFFFFFFFU, 0x00041800U); - psu_mask_write(0xFD0814B0, 0xFFFFFFFFU, 0x70800000U); - psu_mask_write(0xFD0814C0, 0xFFFFFFFFU, 0x2A019FFEU); - psu_mask_write(0xFD0814C4, 0xFFFFFFFFU, 0x01100000U); - psu_mask_write(0xFD0814DC, 0xFFFFFFFFU, 0x01264300U); - psu_mask_write(0xFD0814EC, 0xFFFFFFFFU, 0x00041800U); - psu_mask_write(0xFD0814F0, 0xFFFFFFFFU, 0x70800000U); - psu_mask_write(0xFD081500, 0xFFFFFFFFU, 0x15019FFEU); - psu_mask_write(0xFD081504, 0xFFFFFFFFU, 0x21100000U); - psu_mask_write(0xFD08151C, 0xFFFFFFFFU, 0x01266300U); - psu_mask_write(0xFD08152C, 0xFFFFFFFFU, 0x00041800U); - psu_mask_write(0xFD081530, 0xFFFFFFFFU, 0x70400000U); - psu_mask_write(0xFD0817DC, 0xFFFFFFFFU, 0x012643C4U); - - return 1; -} - -static unsigned long psu_ddr_qos_init_data(void) -{ - psu_mask_write(0xFD360008, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD36001C, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD370008, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD37001C, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD380008, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD38001C, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD390008, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD39001C, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD3A0008, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD3A001C, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD3B0008, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD3B001C, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFF9B0008, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFF9B001C, 0x0000000FU, 0x00000000U); - - return 1; -} - -static unsigned long psu_mio_init_data(void) -{ - psu_mask_write(0xFF180000, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180004, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180008, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF18000C, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180010, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180014, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180018, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF18001C, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180020, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180024, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180028, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF18002C, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180030, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180034, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180038, 0x000000FEU, 0x00000040U); - psu_mask_write(0xFF18003C, 0x000000FEU, 0x00000040U); - psu_mask_write(0xFF180040, 0x000000FEU, 0x00000040U); - psu_mask_write(0xFF180044, 0x000000FEU, 0x00000040U); - psu_mask_write(0xFF180048, 0x000000FEU, 0x000000C0U); - psu_mask_write(0xFF18004C, 0x000000FEU, 0x000000C0U); - psu_mask_write(0xFF180050, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180054, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180058, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF18005C, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180060, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180064, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180068, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF18006C, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180070, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180074, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180078, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF18007C, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180080, 0x000000FEU, 0x00000008U); - psu_mask_write(0xFF180084, 0x000000FEU, 0x00000008U); - psu_mask_write(0xFF180098, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF18009C, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800A0, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800A4, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800A8, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800AC, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF1800B0, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF1800B4, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800B8, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800BC, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800C0, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800C4, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800C8, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800CC, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800D0, 0x000000FEU, 0x00000004U); - psu_mask_write(0xFF1800D4, 0x000000FEU, 0x00000004U); - psu_mask_write(0xFF1800D8, 0x000000FEU, 0x00000004U); - psu_mask_write(0xFF1800DC, 0x000000FEU, 0x00000004U); - psu_mask_write(0xFF1800E0, 0x000000FEU, 0x00000004U); - psu_mask_write(0xFF1800E4, 0x000000FEU, 0x00000004U); - psu_mask_write(0xFF1800E8, 0x000000FEU, 0x00000004U); - psu_mask_write(0xFF1800EC, 0x000000FEU, 0x00000004U); - psu_mask_write(0xFF1800F0, 0x000000FEU, 0x00000004U); - psu_mask_write(0xFF1800F4, 0x000000FEU, 0x00000004U); - psu_mask_write(0xFF1800F8, 0x000000FEU, 0x00000004U); - psu_mask_write(0xFF1800FC, 0x000000FEU, 0x00000004U); - psu_mask_write(0xFF180100, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180104, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180108, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF18010C, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180110, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180114, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180118, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF18011C, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180120, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180124, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180128, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF18012C, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180130, 0x000000FEU, 0x000000C0U); - psu_mask_write(0xFF180134, 0x000000FEU, 0x000000C0U); - psu_mask_write(0xFF180204, 0xFFFFFFFFU, 0x00040000U); - psu_mask_write(0xFF180208, 0xFFFFFFFFU, 0x00B02000U); - psu_mask_write(0xFF18020C, 0x00003FFFU, 0x00000FC0U); - psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF18013C, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF180140, 0x03FFFFFFU, 0x00000000U); - psu_mask_write(0xFF180144, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF180148, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x00000000U); - psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF180158, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF18015C, 0x03FFFFFFU, 0x00000000U); - psu_mask_write(0xFF180160, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x00000000U); - psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF180174, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF180178, 0x03FFFFFFU, 0x00000000U); - psu_mask_write(0xFF18017C, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x00000000U); - psu_mask_write(0xFF180200, 0x0000000FU, 0x00000000U); - - return 1; -} - -static unsigned long psu_peripherals_pre_init_data(void) -{ - psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01012302U); - psu_mask_write(0xFF5E0238, 0x00000001U, 0x00000001U); - - return 1; -} - -static unsigned long psu_peripherals_init_data(void) -{ - psu_mask_write(0xFD1A0100, 0x00008046U, 0x00000000U); - psu_mask_write(0xFF5E0238, 0x001A0000U, 0x00000000U); - psu_mask_write(0xFF5E023C, 0x0093C018U, 0x00000000U); - psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U); - psu_mask_write(0xFF5E0238, 0x00000001U, 0x00000000U); - psu_mask_write(0xFF180390, 0x00000004U, 0x00000004U); - psu_mask_write(0xFF5E023C, 0x00000400U, 0x00000000U); - psu_mask_write(0xFF5E0238, 0x00000040U, 0x00000000U); - psu_mask_write(0xFF180310, 0x00008000U, 0x00000000U); - psu_mask_write(0xFF180320, 0x33840000U, 0x02840000U); - psu_mask_write(0xFF18031C, 0x7FFE0000U, 0x64500000U); - psu_mask_write(0xFF180358, 0x00000008U, 0x00000008U); - psu_mask_write(0xFF180324, 0x03C00000U, 0x00000000U); - psu_mask_write(0xFF5E0238, 0x00000600U, 0x00000000U); - psu_mask_write(0xFF5E0238, 0x00008000U, 0x00000000U); - psu_mask_write(0xFF5E0238, 0x00007800U, 0x00000000U); - psu_mask_write(0xFF5E0238, 0x00000002U, 0x00000000U); - psu_mask_write(0xFF5E0238, 0x00040000U, 0x00000000U); - psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU); - psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U); - psu_mask_write(0xFD5C0060, 0x000F000FU, 0x00000000U); - psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U); - psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x05F5DD18U); - psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U); - psu_mask_write(0xFF5E0250, 0x00000F0FU, 0x00000202U); - - mask_delay(1); - psu_mask_write(0xFF5E0250, 0x00000F0FU, 0x00000002U); - - mask_delay(5); - psu_mask_write(0xFF5E0250, 0x00000F0FU, 0x00000202U); - - return 1; -} - -static unsigned long psu_serdes_init_data(void) -{ - psu_mask_write(0xFD410008, 0x0000001FU, 0x00000008U); - psu_mask_write(0xFD41000C, 0x0000001FU, 0x0000000FU); - psu_mask_write(0xFD402868, 0x00000080U, 0x00000080U); - psu_mask_write(0xFD40286C, 0x00000080U, 0x00000080U); - psu_mask_write(0xFD40A094, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD40A368, 0x000000FFU, 0x00000038U); - psu_mask_write(0xFD40A36C, 0x00000007U, 0x00000003U); - psu_mask_write(0xFD40E368, 0x000000FFU, 0x000000E0U); - psu_mask_write(0xFD40E36C, 0x00000007U, 0x00000003U); - psu_mask_write(0xFD40A370, 0x000000FFU, 0x000000F4U); - psu_mask_write(0xFD40A374, 0x000000FFU, 0x00000031U); - psu_mask_write(0xFD40A378, 0x000000FFU, 0x00000002U); - psu_mask_write(0xFD40A37C, 0x00000033U, 0x00000030U); - psu_mask_write(0xFD40E370, 0x000000FFU, 0x000000C9U); - psu_mask_write(0xFD40E374, 0x000000FFU, 0x000000D2U); - psu_mask_write(0xFD40E378, 0x000000FFU, 0x00000001U); - psu_mask_write(0xFD40E37C, 0x000000B3U, 0x000000B0U); - psu_mask_write(0xFD40906C, 0x00000003U, 0x00000003U); - psu_mask_write(0xFD4080F4, 0x00000003U, 0x00000003U); - psu_mask_write(0xFD40E360, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD40D06C, 0x0000000FU, 0x0000000FU); - psu_mask_write(0xFD40C0F4, 0x0000000BU, 0x0000000BU); - psu_mask_write(0xFD4090CC, 0x00000020U, 0x00000020U); - psu_mask_write(0xFD401074, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD405074, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD409074, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD40D074, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD401994, 0x00000007U, 0x00000007U); - psu_mask_write(0xFD405994, 0x00000007U, 0x00000007U); - psu_mask_write(0xFD40989C, 0x00000080U, 0x00000080U); - psu_mask_write(0xFD4098F8, 0x000000FFU, 0x0000001AU); - psu_mask_write(0xFD4098FC, 0x000000FFU, 0x0000001AU); - psu_mask_write(0xFD409990, 0x000000FFU, 0x00000010U); - psu_mask_write(0xFD409924, 0x000000FFU, 0x000000FEU); - psu_mask_write(0xFD409928, 0x000000FFU, 0x00000000U); - psu_mask_write(0xFD409900, 0x000000FFU, 0x0000001AU); - psu_mask_write(0xFD40992C, 0x000000FFU, 0x00000000U); - psu_mask_write(0xFD409980, 0x000000FFU, 0x000000FFU); - psu_mask_write(0xFD409914, 0x000000FFU, 0x000000F7U); - psu_mask_write(0xFD409918, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD409940, 0x000000FFU, 0x000000F7U); - psu_mask_write(0xFD409944, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD409994, 0x00000007U, 0x00000007U); - psu_mask_write(0xFD40D89C, 0x00000080U, 0x00000080U); - psu_mask_write(0xFD40D8F8, 0x000000FFU, 0x0000007DU); - psu_mask_write(0xFD40D8FC, 0x000000FFU, 0x0000007DU); - psu_mask_write(0xFD40D990, 0x000000FFU, 0x00000001U); - psu_mask_write(0xFD40D924, 0x000000FFU, 0x0000009CU); - psu_mask_write(0xFD40D928, 0x000000FFU, 0x00000039U); - psu_mask_write(0xFD40D98C, 0x000000F0U, 0x00000020U); - psu_mask_write(0xFD40D900, 0x000000FFU, 0x0000007DU); - psu_mask_write(0xFD40D92C, 0x000000FFU, 0x00000064U); - psu_mask_write(0xFD40D980, 0x000000FFU, 0x000000FFU); - psu_mask_write(0xFD40D914, 0x000000FFU, 0x000000F7U); - psu_mask_write(0xFD40D918, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD40D940, 0x000000FFU, 0x000000F7U); - psu_mask_write(0xFD40D944, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD40D994, 0x00000007U, 0x00000007U); - psu_mask_write(0xFD40107C, 0x0000000FU, 0x00000001U); - psu_mask_write(0xFD40507C, 0x0000000FU, 0x00000001U); - psu_mask_write(0xFD40907C, 0x0000000FU, 0x00000001U); - psu_mask_write(0xFD40D07C, 0x0000000FU, 0x00000001U); - psu_mask_write(0xFD4019A4, 0x000000FFU, 0x000000FFU); - psu_mask_write(0xFD401038, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD40102C, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD4059A4, 0x000000FFU, 0x000000FFU); - psu_mask_write(0xFD405038, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD40502C, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD4099A4, 0x000000FFU, 0x000000FFU); - psu_mask_write(0xFD409038, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD40902C, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD40D9A4, 0x000000FFU, 0x000000FFU); - psu_mask_write(0xFD40D038, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD40D02C, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD4019AC, 0x00000003U, 0x00000000U); - psu_mask_write(0xFD4059AC, 0x00000003U, 0x00000000U); - psu_mask_write(0xFD4099AC, 0x00000003U, 0x00000000U); - psu_mask_write(0xFD40D9AC, 0x00000003U, 0x00000000U); - psu_mask_write(0xFD401978, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD405978, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD409978, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD40D978, 0x00000010U, 0x00000010U); - - serdes_illcalib(2, 3, 3, 0, 0, 0, 0, 0); - psu_mask_write(0xFD410014, 0x00000077U, 0x00000023U); - psu_mask_write(0xFD40C1D8, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD40DC14, 0x000000FFU, 0x000000E6U); - psu_mask_write(0xFD40DC40, 0x0000001FU, 0x0000000CU); - psu_mask_write(0xFD40D94C, 0x00000020U, 0x00000020U); - psu_mask_write(0xFD40D950, 0x00000007U, 0x00000006U); - psu_mask_write(0xFD40C048, 0x000000FFU, 0x00000001U); - - return 1; -} - -static unsigned long psu_resetout_init_data(void) -{ - psu_mask_write(0xFF5E023C, 0x00000400U, 0x00000000U); - psu_mask_write(0xFF9D0080, 0x00000001U, 0x00000001U); - psu_mask_write(0xFF9D007C, 0x00000001U, 0x00000000U); - psu_mask_write(0xFF5E023C, 0x00000140U, 0x00000000U); - psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U); - psu_mask_write(0xFD3D0100, 0x00000003U, 0x00000003U); - psu_mask_write(0xFD1A0100, 0x00000002U, 0x00000000U); - psu_mask_write(0xFE20C200, 0x00023FFFU, 0x00022457U); - psu_mask_write(0xFE20C630, 0x003FFF00U, 0x00000000U); - psu_mask_write(0xFE20C11C, 0x00000600U, 0x00000600U); - psu_mask_write(0xFE20C12C, 0x00004000U, 0x00004000U); - psu_mask_write(0xFD480064, 0x00000200U, 0x00000200U); - mask_poll(0xFD40A3E4, 0x00000010U); - mask_poll(0xFD40E3E4, 0x00000010U); - psu_mask_write(0xFD0C00AC, 0xFFFFFFFFU, 0x28184018U); - psu_mask_write(0xFD0C00B0, 0xFFFFFFFFU, 0x0E081406U); - psu_mask_write(0xFD0C00B4, 0xFFFFFFFFU, 0x064A0813U); - psu_mask_write(0xFD0C00B8, 0xFFFFFFFFU, 0x3FFC96A4U); - - return 1; -} - -static unsigned long psu_resetin_init_data(void) -{ - psu_mask_write(0xFF5E023C, 0x00000540U, 0x00000540U); - psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000008U); - psu_mask_write(0xFD1A0100, 0x00000002U, 0x00000002U); - - return 1; -} - -static unsigned long psu_afi_config(void) -{ - psu_mask_write(0xFD1A0100, 0x00001F80U, 0x00000000U); - psu_mask_write(0xFF5E023C, 0x00080000U, 0x00000000U); - psu_mask_write(0xFD615000, 0x00000300U, 0x00000200U); - psu_mask_write(0xFD360000, 0x00000003U, 0x00000002U); - psu_mask_write(0xFD370000, 0x00000003U, 0x00000002U); - psu_mask_write(0xFD360014, 0x00000003U, 0x00000002U); - psu_mask_write(0xFD370014, 0x00000003U, 0x00000002U); - - return 1; -} - -static unsigned long psu_ddr_phybringup_data(void) -{ - unsigned int regval = 0; - unsigned int pll_retry = 10; - unsigned int pll_locked = 0; - int cur_R006_tREFPRD; - - while ((pll_retry > 0) && (!pll_locked)) { - Xil_Out32(0xFD080004, 0x00040010); - Xil_Out32(0xFD080004, 0x00040011); - - while ((Xil_In32(0xFD080030) & 0x1) != 1) - ; - pll_locked = (Xil_In32(0xFD080030) & 0x80000000) - >> 31; - pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000) - >> 16; - pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000) >> 16; - pll_locked &= (Xil_In32(0xFD080BE0) & 0x10000) - >> 16; - pll_locked &= (Xil_In32(0xFD080DE0) & 0x10000) - >> 16; - pll_retry--; + if (lane_active == 0) { + psu_mask_write(0xFD410044, 0x00000003U, 0x00000000U); + psu_mask_write(0xFD410040, 0x00000003U, 0x00000000U); + psu_mask_write(0xFD410038, 0x00000007U, 0x00000001U); + Xil_Out32(0xFD4010AC, 0x0020); + Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) | 0x1)); } - Xil_Out32(0xFD0800C4, Xil_In32(0xFD0800C4) | (pll_retry << 16)); - if (!pll_locked) - return 0; - - Xil_Out32(0xFD080004U, 0x00040063U); - - while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU) - ; - prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U); - - while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU) - ; - Xil_Out32(0xFD0701B0U, 0x00000001U); - Xil_Out32(0xFD070320U, 0x00000001U); - while ((Xil_In32(0xFD070004U) & 0x0000000FU) != 0x00000001U) - ; - prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U); - Xil_Out32(0xFD080004, 0x0004FE01); - regval = Xil_In32(0xFD080030); - while (regval != 0x80000FFF) - regval = Xil_In32(0xFD080030); - regval = ((Xil_In32(0xFD080030) & 0x1FFF0000) >> 18); - if (regval != 0) - return 0; - - Xil_Out32(0xFD080200U, 0x100091C7U); - - cur_R006_tREFPRD = (Xil_In32(0xFD080018U) & 0x0003FFFFU) >> 0x00000000U; - prog_reg(0xFD080018, 0x3FFFF, 0x0, cur_R006_tREFPRD); - - prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000003U); - prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000003U); - prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000003U); - prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000003U); - prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000003U); - prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000003U); - - Xil_Out32(0xFD080004, 0x00060001); - regval = Xil_In32(0xFD080030); - while ((regval & 0x80004001) != 0x80004001) - regval = Xil_In32(0xFD080030); - - regval = ((Xil_In32(0xFD080030) & 0x1FFF0000) >> 18); - if (regval != 0) - return 0; - - prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000000U); - prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000000U); - prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000000U); - prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000000U); - prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000000U); - prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000000U); - - Xil_Out32(0xFD080200U, 0x800091C7U); - prog_reg(0xFD080018, 0x3FFFF, 0x0, cur_R006_tREFPRD); - - Xil_Out32(0xFD080004, 0x0000C001); - regval = Xil_In32(0xFD080030); - while ((regval & 0x80000C01) != 0x80000C01) - regval = Xil_In32(0xFD080030); + if (lane_active == 1) { + psu_mask_write(0xFD410044, 0x0000000CU, 0x00000000U); + psu_mask_write(0xFD410040, 0x0000000CU, 0x00000000U); + psu_mask_write(0xFD410038, 0x00000070U, 0x00000010U); + Xil_Out32(0xFD4050AC, 0x0020); + Xil_Out32(0xFD407004, (Xil_In32(0xFD407004) | 0x1)); + } + if (lane_active == 2) { + psu_mask_write(0xFD410044, 0x00000030U, 0x00000000U); + psu_mask_write(0xFD410040, 0x00000030U, 0x00000000U); + psu_mask_write(0xFD41003C, 0x00000007U, 0x00000001U); + Xil_Out32(0xFD4090AC, 0x0020); + Xil_Out32(0xFD40B004, (Xil_In32(0xFD40B004) | 0x1)); + } + if (lane_active == 3) { + psu_mask_write(0xFD410040, 0x000000C0U, 0x00000000U); + psu_mask_write(0xFD410044, 0x000000C0U, 0x00000000U); + psu_mask_write(0xFD41003C, 0x00000070U, 0x00000010U); + Xil_Out32(0xFD40D0AC, 0x0020); + Xil_Out32(0xFD40F004, (Xil_In32(0xFD40F004) | 0x1)); + } + mask_delay(100); + return 1; +} - Xil_Out32(0xFD070180U, 0x01000040U); - Xil_Out32(0xFD070060U, 0x00000000U); - prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000000U); +static int serdes_bist_result(u32 lane_active) +{ + u32 pkt_cnt_l0, pkt_cnt_h0, err_cnt_l0, err_cnt_h0; + if (lane_active == 0) { + pkt_cnt_l0 = Xil_In32(0xFD40304C); + pkt_cnt_h0 = Xil_In32(0xFD403050); + err_cnt_l0 = Xil_In32(0xFD403054); + err_cnt_h0 = Xil_In32(0xFD403058); + } + if (lane_active == 1) { + pkt_cnt_l0 = Xil_In32(0xFD40704C); + pkt_cnt_h0 = Xil_In32(0xFD407050); + err_cnt_l0 = Xil_In32(0xFD407054); + err_cnt_h0 = Xil_In32(0xFD407058); + } + if (lane_active == 2) { + pkt_cnt_l0 = Xil_In32(0xFD40B04C); + pkt_cnt_h0 = Xil_In32(0xFD40B050); + err_cnt_l0 = Xil_In32(0xFD40B054); + err_cnt_h0 = Xil_In32(0xFD40B058); + } + if (lane_active == 3) { + pkt_cnt_l0 = Xil_In32(0xFD40F04C); + pkt_cnt_h0 = Xil_In32(0xFD40F050); + err_cnt_l0 = Xil_In32(0xFD40F054); + err_cnt_h0 = Xil_In32(0xFD40F058); + } + if (lane_active == 0) + Xil_Out32(0xFD403004, 0x0); + if (lane_active == 1) + Xil_Out32(0xFD407004, 0x0); + if (lane_active == 2) + Xil_Out32(0xFD40B004, 0x0); + if (lane_active == 3) + Xil_Out32(0xFD40F004, 0x0); + if (err_cnt_l0 > 0 || err_cnt_h0 > 0 || + (pkt_cnt_l0 == 0 && pkt_cnt_h0 == 0)) + return 0; return 1; } -static int serdes_rst_seq(u32 lane3_protocol, u32 lane3_rate, - u32 lane2_protocol, u32 lane2_rate, - u32 lane1_protocol, u32 lane1_rate, - u32 lane0_protocol, u32 lane0_rate) +static int serdes_illcalib_pcie_gen1(u32 lane3_protocol, u32 lane3_rate, + u32 lane2_protocol, u32 lane2_rate, + u32 lane1_protocol, u32 lane1_rate, + u32 lane0_protocol, u32 lane0_rate, + u32 gen2_calib) { - Xil_Out32(0xFD410098, 0x00000000); - Xil_Out32(0xFD401010, 0x00000040); - Xil_Out32(0xFD405010, 0x00000040); - Xil_Out32(0xFD409010, 0x00000040); - Xil_Out32(0xFD40D010, 0x00000040); - Xil_Out32(0xFD402084, 0x00000080); - Xil_Out32(0xFD406084, 0x00000080); - Xil_Out32(0xFD40A084, 0x00000080); - Xil_Out32(0xFD40E084, 0x00000080); - Xil_Out32(0xFD410098, 0x00000004); - mask_delay(50); - if (lane0_rate == 1) - Xil_Out32(0xFD410098, 0x0000000E); - Xil_Out32(0xFD410098, 0x00000006); - if (lane0_rate == 1) { - Xil_Out32(0xFD40000C, 0x00000004); - Xil_Out32(0xFD40400C, 0x00000004); - Xil_Out32(0xFD40800C, 0x00000004); - Xil_Out32(0xFD40C00C, 0x00000004); - Xil_Out32(0xFD410098, 0x00000007); - mask_delay(400); - Xil_Out32(0xFD40000C, 0x0000000C); - Xil_Out32(0xFD40400C, 0x0000000C); - Xil_Out32(0xFD40800C, 0x0000000C); - Xil_Out32(0xFD40C00C, 0x0000000C); - mask_delay(15); - Xil_Out32(0xFD410098, 0x0000000F); - mask_delay(100); + u64 tempbistresult; + u32 currbistresult[4]; + u32 prevbistresult[4]; + u32 itercount = 0; + u32 ill12_val[4], ill1_val[4]; + u32 loop = 0; + u32 iterresult[8]; + u32 meancount[4]; + u32 bistpasscount[4]; + u32 meancountalt[4]; + u32 meancountalt_bistpasscount[4]; + u32 lane0_active; + u32 lane1_active; + u32 lane2_active; + u32 lane3_active; + + lane0_active = (lane0_protocol == 1); + lane1_active = (lane1_protocol == 1); + lane2_active = (lane2_protocol == 1); + lane3_active = (lane3_protocol == 1); + for (loop = 0; loop <= 3; loop++) { + iterresult[loop] = 0; + iterresult[loop + 4] = 0; + meancountalt[loop] = 0; + meancountalt_bistpasscount[loop] = 0; + meancount[loop] = 0; + prevbistresult[loop] = 0; + bistpasscount[loop] = 0; } - if (lane0_protocol != 0) - mask_poll(0xFD4023E4, 0x00000010U); - if (lane1_protocol != 0) - mask_poll(0xFD4063E4, 0x00000010U); - if (lane2_protocol != 0) - mask_poll(0xFD40A3E4, 0x00000010U); - if (lane3_protocol != 0) - mask_poll(0xFD40E3E4, 0x00000010U); - mask_delay(50); - Xil_Out32(0xFD401010, 0x000000C0); - Xil_Out32(0xFD405010, 0x000000C0); - Xil_Out32(0xFD409010, 0x000000C0); - Xil_Out32(0xFD40D010, 0x000000C0); - Xil_Out32(0xFD401010, 0x00000080); - Xil_Out32(0xFD405010, 0x00000080); - Xil_Out32(0xFD409010, 0x00000080); - Xil_Out32(0xFD40D010, 0x00000080); + itercount = 0; + if (lane0_active) + serdes_bist_static_settings(0); + if (lane1_active) + serdes_bist_static_settings(1); + if (lane2_active) + serdes_bist_static_settings(2); + if (lane3_active) + serdes_bist_static_settings(3); + do { + if (gen2_calib != 1) { + if (lane0_active == 1) + ill1_val[0] = ((0x04 + itercount * 8) % 0x100); + if (lane0_active == 1) + ill12_val[0] = + ((0x04 + itercount * 8) >= + 0x100) ? 0x10 : 0x00; + if (lane1_active == 1) + ill1_val[1] = ((0x04 + itercount * 8) % 0x100); + if (lane1_active == 1) + ill12_val[1] = + ((0x04 + itercount * 8) >= + 0x100) ? 0x10 : 0x00; + if (lane2_active == 1) + ill1_val[2] = ((0x04 + itercount * 8) % 0x100); + if (lane2_active == 1) + ill12_val[2] = + ((0x04 + itercount * 8) >= + 0x100) ? 0x10 : 0x00; + if (lane3_active == 1) + ill1_val[3] = ((0x04 + itercount * 8) % 0x100); + if (lane3_active == 1) + ill12_val[3] = + ((0x04 + itercount * 8) >= + 0x100) ? 0x10 : 0x00; + + if (lane0_active == 1) + Xil_Out32(0xFD401924, ill1_val[0]); + if (lane0_active == 1) + psu_mask_write(0xFD401990, 0x000000F0U, + ill12_val[0]); + if (lane1_active == 1) + Xil_Out32(0xFD405924, ill1_val[1]); + if (lane1_active == 1) + psu_mask_write(0xFD405990, 0x000000F0U, + ill12_val[1]); + if (lane2_active == 1) + Xil_Out32(0xFD409924, ill1_val[2]); + if (lane2_active == 1) + psu_mask_write(0xFD409990, 0x000000F0U, + ill12_val[2]); + if (lane3_active == 1) + Xil_Out32(0xFD40D924, ill1_val[3]); + if (lane3_active == 1) + psu_mask_write(0xFD40D990, 0x000000F0U, + ill12_val[3]); + } + if (gen2_calib == 1) { + if (lane0_active == 1) + ill1_val[0] = ((0x104 + itercount * 8) % 0x100); + if (lane0_active == 1) + ill12_val[0] = + ((0x104 + itercount * 8) >= + 0x200) ? 0x02 : 0x01; + if (lane1_active == 1) + ill1_val[1] = ((0x104 + itercount * 8) % 0x100); + if (lane1_active == 1) + ill12_val[1] = + ((0x104 + itercount * 8) >= + 0x200) ? 0x02 : 0x01; + if (lane2_active == 1) + ill1_val[2] = ((0x104 + itercount * 8) % 0x100); + if (lane2_active == 1) + ill12_val[2] = + ((0x104 + itercount * 8) >= + 0x200) ? 0x02 : 0x01; + if (lane3_active == 1) + ill1_val[3] = ((0x104 + itercount * 8) % 0x100); + if (lane3_active == 1) + ill12_val[3] = + ((0x104 + itercount * 8) >= + 0x200) ? 0x02 : 0x01; + + if (lane0_active == 1) + Xil_Out32(0xFD401928, ill1_val[0]); + if (lane0_active == 1) + psu_mask_write(0xFD401990, 0x0000000FU, + ill12_val[0]); + if (lane1_active == 1) + Xil_Out32(0xFD405928, ill1_val[1]); + if (lane1_active == 1) + psu_mask_write(0xFD405990, 0x0000000FU, + ill12_val[1]); + if (lane2_active == 1) + Xil_Out32(0xFD409928, ill1_val[2]); + if (lane2_active == 1) + psu_mask_write(0xFD409990, 0x0000000FU, + ill12_val[2]); + if (lane3_active == 1) + Xil_Out32(0xFD40D928, ill1_val[3]); + if (lane3_active == 1) + psu_mask_write(0xFD40D990, 0x0000000FU, + ill12_val[3]); + } + + if (lane0_active == 1) + psu_mask_write(0xFD401018, 0x00000030U, 0x00000010U); + if (lane1_active == 1) + psu_mask_write(0xFD405018, 0x00000030U, 0x00000010U); + if (lane2_active == 1) + psu_mask_write(0xFD409018, 0x00000030U, 0x00000010U); + if (lane3_active == 1) + psu_mask_write(0xFD40D018, 0x00000030U, 0x00000010U); + if (lane0_active == 1) + currbistresult[0] = 0; + if (lane1_active == 1) + currbistresult[1] = 0; + if (lane2_active == 1) + currbistresult[2] = 0; + if (lane3_active == 1) + currbistresult[3] = 0; + serdes_rst_seq(lane3_protocol, lane3_rate, lane2_protocol, + lane2_rate, lane1_protocol, lane1_rate, + lane0_protocol, lane0_rate); + if (lane3_active == 1) + serdes_bist_run(3); + if (lane2_active == 1) + serdes_bist_run(2); + if (lane1_active == 1) + serdes_bist_run(1); + if (lane0_active == 1) + serdes_bist_run(0); + tempbistresult = 0; + if (lane3_active == 1) + tempbistresult = tempbistresult | serdes_bist_result(3); + tempbistresult = tempbistresult << 1; + if (lane2_active == 1) + tempbistresult = tempbistresult | serdes_bist_result(2); + tempbistresult = tempbistresult << 1; + if (lane1_active == 1) + tempbistresult = tempbistresult | serdes_bist_result(1); + tempbistresult = tempbistresult << 1; + if (lane0_active == 1) + tempbistresult = tempbistresult | serdes_bist_result(0); + Xil_Out32(0xFD410098, 0x0); + Xil_Out32(0xFD410098, 0x2); - Xil_Out32(0xFD402084, 0x000000C0); - Xil_Out32(0xFD406084, 0x000000C0); - Xil_Out32(0xFD40A084, 0x000000C0); - Xil_Out32(0xFD40E084, 0x000000C0); - mask_delay(50); - Xil_Out32(0xFD402084, 0x00000080); - Xil_Out32(0xFD406084, 0x00000080); - Xil_Out32(0xFD40A084, 0x00000080); - Xil_Out32(0xFD40E084, 0x00000080); - mask_delay(50); - Xil_Out32(0xFD401010, 0x00000000); - Xil_Out32(0xFD405010, 0x00000000); - Xil_Out32(0xFD409010, 0x00000000); - Xil_Out32(0xFD40D010, 0x00000000); - Xil_Out32(0xFD402084, 0x00000000); - Xil_Out32(0xFD406084, 0x00000000); - Xil_Out32(0xFD40A084, 0x00000000); - Xil_Out32(0xFD40E084, 0x00000000); - mask_delay(500); - return 1; -} + if (itercount < 32) { + iterresult[0] = + ((iterresult[0] << 1) | + ((tempbistresult & 0x1) == 0x1)); + iterresult[1] = + ((iterresult[1] << 1) | + ((tempbistresult & 0x2) == 0x2)); + iterresult[2] = + ((iterresult[2] << 1) | + ((tempbistresult & 0x4) == 0x4)); + iterresult[3] = + ((iterresult[3] << 1) | + ((tempbistresult & 0x8) == 0x8)); + } else { + iterresult[4] = + ((iterresult[4] << 1) | + ((tempbistresult & 0x1) == 0x1)); + iterresult[5] = + ((iterresult[5] << 1) | + ((tempbistresult & 0x2) == 0x2)); + iterresult[6] = + ((iterresult[6] << 1) | + ((tempbistresult & 0x4) == 0x4)); + iterresult[7] = + ((iterresult[7] << 1) | + ((tempbistresult & 0x8) == 0x8)); + } + currbistresult[0] = + currbistresult[0] | ((tempbistresult & 0x1) == 1); + currbistresult[1] = + currbistresult[1] | ((tempbistresult & 0x2) == 0x2); + currbistresult[2] = + currbistresult[2] | ((tempbistresult & 0x4) == 0x4); + currbistresult[3] = + currbistresult[3] | ((tempbistresult & 0x8) == 0x8); -static int serdes_bist_static_settings(u32 lane_active) -{ - if (lane_active == 0) { - Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) & 0xFFFFFF1F)); - Xil_Out32(0xFD403068, 0x1); - Xil_Out32(0xFD40306C, 0x1); - Xil_Out32(0xFD4010AC, 0x0020); - Xil_Out32(0xFD403008, 0x0); - Xil_Out32(0xFD40300C, 0xF4); - Xil_Out32(0xFD403010, 0x0); - Xil_Out32(0xFD403014, 0x0); - Xil_Out32(0xFD403018, 0x00); - Xil_Out32(0xFD40301C, 0xFB); - Xil_Out32(0xFD403020, 0xFF); - Xil_Out32(0xFD403024, 0x0); - Xil_Out32(0xFD403028, 0x00); - Xil_Out32(0xFD40302C, 0x00); - Xil_Out32(0xFD403030, 0x4A); - Xil_Out32(0xFD403034, 0x4A); - Xil_Out32(0xFD403038, 0x4A); - Xil_Out32(0xFD40303C, 0x4A); - Xil_Out32(0xFD403040, 0x0); - Xil_Out32(0xFD403044, 0x14); - Xil_Out32(0xFD403048, 0x02); - Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) & 0xFFFFFF1F)); - } - if (lane_active == 1) { - Xil_Out32(0xFD407004, (Xil_In32(0xFD407004) & 0xFFFFFF1F)); - Xil_Out32(0xFD407068, 0x1); - Xil_Out32(0xFD40706C, 0x1); - Xil_Out32(0xFD4050AC, 0x0020); - Xil_Out32(0xFD407008, 0x0); - Xil_Out32(0xFD40700C, 0xF4); - Xil_Out32(0xFD407010, 0x0); - Xil_Out32(0xFD407014, 0x0); - Xil_Out32(0xFD407018, 0x00); - Xil_Out32(0xFD40701C, 0xFB); - Xil_Out32(0xFD407020, 0xFF); - Xil_Out32(0xFD407024, 0x0); - Xil_Out32(0xFD407028, 0x00); - Xil_Out32(0xFD40702C, 0x00); - Xil_Out32(0xFD407030, 0x4A); - Xil_Out32(0xFD407034, 0x4A); - Xil_Out32(0xFD407038, 0x4A); - Xil_Out32(0xFD40703C, 0x4A); - Xil_Out32(0xFD407040, 0x0); - Xil_Out32(0xFD407044, 0x14); - Xil_Out32(0xFD407048, 0x02); - Xil_Out32(0xFD407004, (Xil_In32(0xFD407004) & 0xFFFFFF1F)); - } + for (loop = 0; loop <= 3; loop++) { + if (currbistresult[loop] == 1 && prevbistresult[loop] == 1) + bistpasscount[loop] = bistpasscount[loop] + 1; + if (bistpasscount[loop] < 4 && + currbistresult[loop] == 0 && itercount > 2) { + if (meancountalt_bistpasscount[loop] < + bistpasscount[loop]) { + meancountalt_bistpasscount[loop] = + bistpasscount[loop]; + meancountalt[loop] = + ((itercount - 1) - + ((bistpasscount[loop] + 1) / 2)); + } + bistpasscount[loop] = 0; + } + if (meancount[loop] == 0 && bistpasscount[loop] >= 4 && + (currbistresult[loop] == 0 || itercount == 63) && + prevbistresult[loop] == 1) + meancount[loop] = + (itercount - 1) - + ((bistpasscount[loop] + 1) / 2); + prevbistresult[loop] = currbistresult[loop]; + } + } while (++itercount < 64); - if (lane_active == 2) { - Xil_Out32(0xFD40B004, (Xil_In32(0xFD40B004) & 0xFFFFFF1F)); - Xil_Out32(0xFD40B068, 0x1); - Xil_Out32(0xFD40B06C, 0x1); - Xil_Out32(0xFD4090AC, 0x0020); - Xil_Out32(0xFD40B008, 0x0); - Xil_Out32(0xFD40B00C, 0xF4); - Xil_Out32(0xFD40B010, 0x0); - Xil_Out32(0xFD40B014, 0x0); - Xil_Out32(0xFD40B018, 0x00); - Xil_Out32(0xFD40B01C, 0xFB); - Xil_Out32(0xFD40B020, 0xFF); - Xil_Out32(0xFD40B024, 0x0); - Xil_Out32(0xFD40B028, 0x00); - Xil_Out32(0xFD40B02C, 0x00); - Xil_Out32(0xFD40B030, 0x4A); - Xil_Out32(0xFD40B034, 0x4A); - Xil_Out32(0xFD40B038, 0x4A); - Xil_Out32(0xFD40B03C, 0x4A); - Xil_Out32(0xFD40B040, 0x0); - Xil_Out32(0xFD40B044, 0x14); - Xil_Out32(0xFD40B048, 0x02); - Xil_Out32(0xFD40B004, (Xil_In32(0xFD40B004) & 0xFFFFFF1F)); - } + for (loop = 0; loop <= 3; loop++) { + if (lane0_active == 0 && loop == 0) + continue; + if (lane1_active == 0 && loop == 1) + continue; + if (lane2_active == 0 && loop == 2) + continue; + if (lane3_active == 0 && loop == 3) + continue; - if (lane_active == 3) { - Xil_Out32(0xFD40F004, (Xil_In32(0xFD40F004) & 0xFFFFFF1F)); - Xil_Out32(0xFD40F068, 0x1); - Xil_Out32(0xFD40F06C, 0x1); - Xil_Out32(0xFD40D0AC, 0x0020); - Xil_Out32(0xFD40F008, 0x0); - Xil_Out32(0xFD40F00C, 0xF4); - Xil_Out32(0xFD40F010, 0x0); - Xil_Out32(0xFD40F014, 0x0); - Xil_Out32(0xFD40F018, 0x00); - Xil_Out32(0xFD40F01C, 0xFB); - Xil_Out32(0xFD40F020, 0xFF); - Xil_Out32(0xFD40F024, 0x0); - Xil_Out32(0xFD40F028, 0x00); - Xil_Out32(0xFD40F02C, 0x00); - Xil_Out32(0xFD40F030, 0x4A); - Xil_Out32(0xFD40F034, 0x4A); - Xil_Out32(0xFD40F038, 0x4A); - Xil_Out32(0xFD40F03C, 0x4A); - Xil_Out32(0xFD40F040, 0x0); - Xil_Out32(0xFD40F044, 0x14); - Xil_Out32(0xFD40F048, 0x02); - Xil_Out32(0xFD40F004, (Xil_In32(0xFD40F004) & 0xFFFFFF1F)); - } - return 1; -} + if (meancount[loop] == 0) + meancount[loop] = meancountalt[loop]; -static int serdes_bist_run(u32 lane_active) -{ - if (lane_active == 0) { - psu_mask_write(0xFD410044, 0x00000003U, 0x00000000U); - psu_mask_write(0xFD410040, 0x00000003U, 0x00000000U); - psu_mask_write(0xFD410038, 0x00000007U, 0x00000001U); - Xil_Out32(0xFD4010AC, 0x0020); - Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) | 0x1)); - } - if (lane_active == 1) { - psu_mask_write(0xFD410044, 0x0000000CU, 0x00000000U); - psu_mask_write(0xFD410040, 0x0000000CU, 0x00000000U); - psu_mask_write(0xFD410038, 0x00000070U, 0x00000010U); - Xil_Out32(0xFD4050AC, 0x0020); - Xil_Out32(0xFD407004, (Xil_In32(0xFD407004) | 0x1)); - } - if (lane_active == 2) { - psu_mask_write(0xFD410044, 0x00000030U, 0x00000000U); - psu_mask_write(0xFD410040, 0x00000030U, 0x00000000U); - psu_mask_write(0xFD41003C, 0x00000007U, 0x00000001U); - Xil_Out32(0xFD4090AC, 0x0020); - Xil_Out32(0xFD40B004, (Xil_In32(0xFD40B004) | 0x1)); + if (gen2_calib != 1) { + ill1_val[loop] = ((0x04 + meancount[loop] * 8) % 0x100); + ill12_val[loop] = + ((0x04 + meancount[loop] * 8) >= + 0x100) ? 0x10 : 0x00; + Xil_Out32(0xFFFE0000 + loop * 4, iterresult[loop]); + Xil_Out32(0xFFFE0010 + loop * 4, iterresult[loop + 4]); + Xil_Out32(0xFFFE0020 + loop * 4, bistpasscount[loop]); + Xil_Out32(0xFFFE0030 + loop * 4, meancount[loop]); + } + if (gen2_calib == 1) { + ill1_val[loop] = + ((0x104 + meancount[loop] * 8) % 0x100); + ill12_val[loop] = + ((0x104 + meancount[loop] * 8) >= + 0x200) ? 0x02 : 0x01; + Xil_Out32(0xFFFE0040 + loop * 4, iterresult[loop]); + Xil_Out32(0xFFFE0050 + loop * 4, iterresult[loop + 4]); + Xil_Out32(0xFFFE0060 + loop * 4, bistpasscount[loop]); + Xil_Out32(0xFFFE0070 + loop * 4, meancount[loop]); + } } - if (lane_active == 3) { - psu_mask_write(0xFD410040, 0x000000C0U, 0x00000000U); - psu_mask_write(0xFD410044, 0x000000C0U, 0x00000000U); - psu_mask_write(0xFD41003C, 0x00000070U, 0x00000010U); - Xil_Out32(0xFD40D0AC, 0x0020); - Xil_Out32(0xFD40F004, (Xil_In32(0xFD40F004) | 0x1)); + if (gen2_calib != 1) { + if (lane0_active == 1) + Xil_Out32(0xFD401924, ill1_val[0]); + if (lane0_active == 1) + psu_mask_write(0xFD401990, 0x000000F0U, ill12_val[0]); + if (lane1_active == 1) + Xil_Out32(0xFD405924, ill1_val[1]); + if (lane1_active == 1) + psu_mask_write(0xFD405990, 0x000000F0U, ill12_val[1]); + if (lane2_active == 1) + Xil_Out32(0xFD409924, ill1_val[2]); + if (lane2_active == 1) + psu_mask_write(0xFD409990, 0x000000F0U, ill12_val[2]); + if (lane3_active == 1) + Xil_Out32(0xFD40D924, ill1_val[3]); + if (lane3_active == 1) + psu_mask_write(0xFD40D990, 0x000000F0U, ill12_val[3]); + } + if (gen2_calib == 1) { + if (lane0_active == 1) + Xil_Out32(0xFD401928, ill1_val[0]); + if (lane0_active == 1) + psu_mask_write(0xFD401990, 0x0000000FU, ill12_val[0]); + if (lane1_active == 1) + Xil_Out32(0xFD405928, ill1_val[1]); + if (lane1_active == 1) + psu_mask_write(0xFD405990, 0x0000000FU, ill12_val[1]); + if (lane2_active == 1) + Xil_Out32(0xFD409928, ill1_val[2]); + if (lane2_active == 1) + psu_mask_write(0xFD409990, 0x0000000FU, ill12_val[2]); + if (lane3_active == 1) + Xil_Out32(0xFD40D928, ill1_val[3]); + if (lane3_active == 1) + psu_mask_write(0xFD40D990, 0x0000000FU, ill12_val[3]); } - mask_delay(100); - return 1; -} -static int serdes_bist_result(u32 lane_active) -{ - u32 pkt_cnt_l0, pkt_cnt_h0, err_cnt_l0, err_cnt_h0; + if (lane0_active == 1) + psu_mask_write(0xFD401018, 0x00000030U, 0x00000000U); + if (lane1_active == 1) + psu_mask_write(0xFD405018, 0x00000030U, 0x00000000U); + if (lane2_active == 1) + psu_mask_write(0xFD409018, 0x00000030U, 0x00000000U); + if (lane3_active == 1) + psu_mask_write(0xFD40D018, 0x00000030U, 0x00000000U); - if (lane_active == 0) { - pkt_cnt_l0 = Xil_In32(0xFD40304C); - pkt_cnt_h0 = Xil_In32(0xFD403050); - err_cnt_l0 = Xil_In32(0xFD403054); - err_cnt_h0 = Xil_In32(0xFD403058); - } - if (lane_active == 1) { - pkt_cnt_l0 = Xil_In32(0xFD40704C); - pkt_cnt_h0 = Xil_In32(0xFD407050); - err_cnt_l0 = Xil_In32(0xFD407054); - err_cnt_h0 = Xil_In32(0xFD407058); - } - if (lane_active == 2) { - pkt_cnt_l0 = Xil_In32(0xFD40B04C); - pkt_cnt_h0 = Xil_In32(0xFD40B050); - err_cnt_l0 = Xil_In32(0xFD40B054); - err_cnt_h0 = Xil_In32(0xFD40B058); + Xil_Out32(0xFD410098, 0); + if (lane0_active == 1) { + Xil_Out32(0xFD403004, 0); + Xil_Out32(0xFD403008, 0); + Xil_Out32(0xFD40300C, 0); + Xil_Out32(0xFD403010, 0); + Xil_Out32(0xFD403014, 0); + Xil_Out32(0xFD403018, 0); + Xil_Out32(0xFD40301C, 0); + Xil_Out32(0xFD403020, 0); + Xil_Out32(0xFD403024, 0); + Xil_Out32(0xFD403028, 0); + Xil_Out32(0xFD40302C, 0); + Xil_Out32(0xFD403030, 0); + Xil_Out32(0xFD403034, 0); + Xil_Out32(0xFD403038, 0); + Xil_Out32(0xFD40303C, 0); + Xil_Out32(0xFD403040, 0); + Xil_Out32(0xFD403044, 0); + Xil_Out32(0xFD403048, 0); + Xil_Out32(0xFD40304C, 0); + Xil_Out32(0xFD403050, 0); + Xil_Out32(0xFD403054, 0); + Xil_Out32(0xFD403058, 0); + Xil_Out32(0xFD403068, 1); + Xil_Out32(0xFD40306C, 0); + Xil_Out32(0xFD4010AC, 0); + psu_mask_write(0xFD410044, 0x00000003U, 0x00000001U); + psu_mask_write(0xFD410040, 0x00000003U, 0x00000001U); + psu_mask_write(0xFD410038, 0x00000007U, 0x00000000U); } - if (lane_active == 3) { - pkt_cnt_l0 = Xil_In32(0xFD40F04C); - pkt_cnt_h0 = Xil_In32(0xFD40F050); - err_cnt_l0 = Xil_In32(0xFD40F054); - err_cnt_h0 = Xil_In32(0xFD40F058); + if (lane1_active == 1) { + Xil_Out32(0xFD407004, 0); + Xil_Out32(0xFD407008, 0); + Xil_Out32(0xFD40700C, 0); + Xil_Out32(0xFD407010, 0); + Xil_Out32(0xFD407014, 0); + Xil_Out32(0xFD407018, 0); + Xil_Out32(0xFD40701C, 0); + Xil_Out32(0xFD407020, 0); + Xil_Out32(0xFD407024, 0); + Xil_Out32(0xFD407028, 0); + Xil_Out32(0xFD40702C, 0); + Xil_Out32(0xFD407030, 0); + Xil_Out32(0xFD407034, 0); + Xil_Out32(0xFD407038, 0); + Xil_Out32(0xFD40703C, 0); + Xil_Out32(0xFD407040, 0); + Xil_Out32(0xFD407044, 0); + Xil_Out32(0xFD407048, 0); + Xil_Out32(0xFD40704C, 0); + Xil_Out32(0xFD407050, 0); + Xil_Out32(0xFD407054, 0); + Xil_Out32(0xFD407058, 0); + Xil_Out32(0xFD407068, 1); + Xil_Out32(0xFD40706C, 0); + Xil_Out32(0xFD4050AC, 0); + psu_mask_write(0xFD410044, 0x0000000CU, 0x00000004U); + psu_mask_write(0xFD410040, 0x0000000CU, 0x00000004U); + psu_mask_write(0xFD410038, 0x00000070U, 0x00000000U); } - if (lane_active == 0) - Xil_Out32(0xFD403004, 0x0); - if (lane_active == 1) - Xil_Out32(0xFD407004, 0x0); - if (lane_active == 2) - Xil_Out32(0xFD40B004, 0x0); - if (lane_active == 3) - Xil_Out32(0xFD40F004, 0x0); - if (err_cnt_l0 > 0 || err_cnt_h0 > 0 || - (pkt_cnt_l0 == 0 && pkt_cnt_h0 == 0)) - return 0; - return 1; -} - -static int serdes_illcalib_pcie_gen1(u32 lane3_protocol, u32 lane3_rate, - u32 lane2_protocol, u32 lane2_rate, - u32 lane1_protocol, u32 lane1_rate, - u32 lane0_protocol, u32 lane0_rate, - u32 gen2_calib) -{ - u64 tempbistresult; - u32 currbistresult[4]; - u32 prevbistresult[4]; - u32 itercount = 0; - u32 ill12_val[4], ill1_val[4]; - u32 loop = 0; - u32 iterresult[8]; - u32 meancount[4]; - u32 bistpasscount[4]; - u32 meancountalt[4]; - u32 meancountalt_bistpasscount[4]; - u32 lane0_active; - u32 lane1_active; - u32 lane2_active; - u32 lane3_active; - - lane0_active = (lane0_protocol == 1); - lane1_active = (lane1_protocol == 1); - lane2_active = (lane2_protocol == 1); - lane3_active = (lane3_protocol == 1); - for (loop = 0; loop <= 3; loop++) { - iterresult[loop] = 0; - iterresult[loop + 4] = 0; - meancountalt[loop] = 0; - meancountalt_bistpasscount[loop] = 0; - meancount[loop] = 0; - prevbistresult[loop] = 0; - bistpasscount[loop] = 0; + if (lane2_active == 1) { + Xil_Out32(0xFD40B004, 0); + Xil_Out32(0xFD40B008, 0); + Xil_Out32(0xFD40B00C, 0); + Xil_Out32(0xFD40B010, 0); + Xil_Out32(0xFD40B014, 0); + Xil_Out32(0xFD40B018, 0); + Xil_Out32(0xFD40B01C, 0); + Xil_Out32(0xFD40B020, 0); + Xil_Out32(0xFD40B024, 0); + Xil_Out32(0xFD40B028, 0); + Xil_Out32(0xFD40B02C, 0); + Xil_Out32(0xFD40B030, 0); + Xil_Out32(0xFD40B034, 0); + Xil_Out32(0xFD40B038, 0); + Xil_Out32(0xFD40B03C, 0); + Xil_Out32(0xFD40B040, 0); + Xil_Out32(0xFD40B044, 0); + Xil_Out32(0xFD40B048, 0); + Xil_Out32(0xFD40B04C, 0); + Xil_Out32(0xFD40B050, 0); + Xil_Out32(0xFD40B054, 0); + Xil_Out32(0xFD40B058, 0); + Xil_Out32(0xFD40B068, 1); + Xil_Out32(0xFD40B06C, 0); + Xil_Out32(0xFD4090AC, 0); + psu_mask_write(0xFD410044, 0x00000030U, 0x00000010U); + psu_mask_write(0xFD410040, 0x00000030U, 0x00000010U); + psu_mask_write(0xFD41003C, 0x00000007U, 0x00000000U); } - itercount = 0; - if (lane0_active) - serdes_bist_static_settings(0); - if (lane1_active) - serdes_bist_static_settings(1); - if (lane2_active) - serdes_bist_static_settings(2); - if (lane3_active) - serdes_bist_static_settings(3); - do { - if (gen2_calib != 1) { - if (lane0_active == 1) - ill1_val[0] = ((0x04 + itercount * 8) % 0x100); - if (lane0_active == 1) - ill12_val[0] = - ((0x04 + itercount * 8) >= - 0x100) ? 0x10 : 0x00; - if (lane1_active == 1) - ill1_val[1] = ((0x04 + itercount * 8) % 0x100); - if (lane1_active == 1) - ill12_val[1] = - ((0x04 + itercount * 8) >= - 0x100) ? 0x10 : 0x00; - if (lane2_active == 1) - ill1_val[2] = ((0x04 + itercount * 8) % 0x100); - if (lane2_active == 1) - ill12_val[2] = - ((0x04 + itercount * 8) >= - 0x100) ? 0x10 : 0x00; - if (lane3_active == 1) - ill1_val[3] = ((0x04 + itercount * 8) % 0x100); - if (lane3_active == 1) - ill12_val[3] = - ((0x04 + itercount * 8) >= - 0x100) ? 0x10 : 0x00; + if (lane3_active == 1) { + Xil_Out32(0xFD40F004, 0); + Xil_Out32(0xFD40F008, 0); + Xil_Out32(0xFD40F00C, 0); + Xil_Out32(0xFD40F010, 0); + Xil_Out32(0xFD40F014, 0); + Xil_Out32(0xFD40F018, 0); + Xil_Out32(0xFD40F01C, 0); + Xil_Out32(0xFD40F020, 0); + Xil_Out32(0xFD40F024, 0); + Xil_Out32(0xFD40F028, 0); + Xil_Out32(0xFD40F02C, 0); + Xil_Out32(0xFD40F030, 0); + Xil_Out32(0xFD40F034, 0); + Xil_Out32(0xFD40F038, 0); + Xil_Out32(0xFD40F03C, 0); + Xil_Out32(0xFD40F040, 0); + Xil_Out32(0xFD40F044, 0); + Xil_Out32(0xFD40F048, 0); + Xil_Out32(0xFD40F04C, 0); + Xil_Out32(0xFD40F050, 0); + Xil_Out32(0xFD40F054, 0); + Xil_Out32(0xFD40F058, 0); + Xil_Out32(0xFD40F068, 1); + Xil_Out32(0xFD40F06C, 0); + Xil_Out32(0xFD40D0AC, 0); + psu_mask_write(0xFD410044, 0x000000C0U, 0x00000040U); + psu_mask_write(0xFD410040, 0x000000C0U, 0x00000040U); + psu_mask_write(0xFD41003C, 0x00000070U, 0x00000000U); + } + return 1; +} - if (lane0_active == 1) - Xil_Out32(0xFD401924, ill1_val[0]); - if (lane0_active == 1) - psu_mask_write(0xFD401990, 0x000000F0U, - ill12_val[0]); - if (lane1_active == 1) - Xil_Out32(0xFD405924, ill1_val[1]); - if (lane1_active == 1) - psu_mask_write(0xFD405990, 0x000000F0U, - ill12_val[1]); - if (lane2_active == 1) - Xil_Out32(0xFD409924, ill1_val[2]); - if (lane2_active == 1) - psu_mask_write(0xFD409990, 0x000000F0U, - ill12_val[2]); - if (lane3_active == 1) - Xil_Out32(0xFD40D924, ill1_val[3]); - if (lane3_active == 1) - psu_mask_write(0xFD40D990, 0x000000F0U, - ill12_val[3]); - } - if (gen2_calib == 1) { - if (lane0_active == 1) - ill1_val[0] = ((0x104 + itercount * 8) % 0x100); - if (lane0_active == 1) - ill12_val[0] = - ((0x104 + itercount * 8) >= - 0x200) ? 0x02 : 0x01; - if (lane1_active == 1) - ill1_val[1] = ((0x104 + itercount * 8) % 0x100); - if (lane1_active == 1) - ill12_val[1] = - ((0x104 + itercount * 8) >= - 0x200) ? 0x02 : 0x01; - if (lane2_active == 1) - ill1_val[2] = ((0x104 + itercount * 8) % 0x100); - if (lane2_active == 1) - ill12_val[2] = - ((0x104 + itercount * 8) >= - 0x200) ? 0x02 : 0x01; - if (lane3_active == 1) - ill1_val[3] = ((0x104 + itercount * 8) % 0x100); - if (lane3_active == 1) - ill12_val[3] = - ((0x104 + itercount * 8) >= - 0x200) ? 0x02 : 0x01; +static int serdes_illcalib(u32 lane3_protocol, u32 lane3_rate, + u32 lane2_protocol, u32 lane2_rate, + u32 lane1_protocol, u32 lane1_rate, + u32 lane0_protocol, u32 lane0_rate) +{ + unsigned int rdata = 0; + unsigned int sata_gen2 = 1; + unsigned int temp_ill12 = 0; + unsigned int temp_PLL_REF_SEL_OFFSET; + unsigned int temp_TM_IQ_ILL1; + unsigned int temp_TM_E_ILL1; + unsigned int temp_tx_dig_tm_61; + unsigned int temp_tm_dig_6; + unsigned int temp_pll_fbdiv_frac_3_msb_offset; - if (lane0_active == 1) - Xil_Out32(0xFD401928, ill1_val[0]); - if (lane0_active == 1) - psu_mask_write(0xFD401990, 0x0000000FU, - ill12_val[0]); - if (lane1_active == 1) - Xil_Out32(0xFD405928, ill1_val[1]); - if (lane1_active == 1) - psu_mask_write(0xFD405990, 0x0000000FU, - ill12_val[1]); - if (lane2_active == 1) - Xil_Out32(0xFD409928, ill1_val[2]); - if (lane2_active == 1) - psu_mask_write(0xFD409990, 0x0000000FU, - ill12_val[2]); - if (lane3_active == 1) - Xil_Out32(0xFD40D928, ill1_val[3]); - if (lane3_active == 1) - psu_mask_write(0xFD40D990, 0x0000000FU, - ill12_val[3]); - } + if (lane0_protocol == 2 || lane0_protocol == 1) { + Xil_Out32(0xFD401910, 0xF3); + Xil_Out32(0xFD40193C, 0xF3); + Xil_Out32(0xFD401914, 0xF3); + Xil_Out32(0xFD401940, 0xF3); + } + if (lane1_protocol == 2 || lane1_protocol == 1) { + Xil_Out32(0xFD405910, 0xF3); + Xil_Out32(0xFD40593C, 0xF3); + Xil_Out32(0xFD405914, 0xF3); + Xil_Out32(0xFD405940, 0xF3); + } + if (lane2_protocol == 2 || lane2_protocol == 1) { + Xil_Out32(0xFD409910, 0xF3); + Xil_Out32(0xFD40993C, 0xF3); + Xil_Out32(0xFD409914, 0xF3); + Xil_Out32(0xFD409940, 0xF3); + } + if (lane3_protocol == 2 || lane3_protocol == 1) { + Xil_Out32(0xFD40D910, 0xF3); + Xil_Out32(0xFD40D93C, 0xF3); + Xil_Out32(0xFD40D914, 0xF3); + Xil_Out32(0xFD40D940, 0xF3); + } - if (lane0_active == 1) - psu_mask_write(0xFD401018, 0x00000030U, 0x00000010U); - if (lane1_active == 1) - psu_mask_write(0xFD405018, 0x00000030U, 0x00000010U); - if (lane2_active == 1) - psu_mask_write(0xFD409018, 0x00000030U, 0x00000010U); - if (lane3_active == 1) - psu_mask_write(0xFD40D018, 0x00000030U, 0x00000010U); - if (lane0_active == 1) - currbistresult[0] = 0; - if (lane1_active == 1) - currbistresult[1] = 0; - if (lane2_active == 1) - currbistresult[2] = 0; - if (lane3_active == 1) - currbistresult[3] = 0; - serdes_rst_seq(lane3_protocol, lane3_rate, lane2_protocol, - lane2_rate, lane1_protocol, lane1_rate, - lane0_protocol, lane0_rate); - if (lane3_active == 1) - serdes_bist_run(3); - if (lane2_active == 1) - serdes_bist_run(2); - if (lane1_active == 1) - serdes_bist_run(1); - if (lane0_active == 1) - serdes_bist_run(0); - tempbistresult = 0; - if (lane3_active == 1) - tempbistresult = tempbistresult | serdes_bist_result(3); - tempbistresult = tempbistresult << 1; - if (lane2_active == 1) - tempbistresult = tempbistresult | serdes_bist_result(2); - tempbistresult = tempbistresult << 1; - if (lane1_active == 1) - tempbistresult = tempbistresult | serdes_bist_result(1); - tempbistresult = tempbistresult << 1; - if (lane0_active == 1) - tempbistresult = tempbistresult | serdes_bist_result(0); - Xil_Out32(0xFD410098, 0x0); - Xil_Out32(0xFD410098, 0x2); + if (sata_gen2 == 1) { + if (lane0_protocol == 2) { + temp_pll_fbdiv_frac_3_msb_offset = Xil_In32(0xFD402360); + Xil_Out32(0xFD402360, 0x0); + temp_PLL_REF_SEL_OFFSET = Xil_In32(0xFD410000); + psu_mask_write(0xFD410000, 0x0000001FU, 0x0000000DU); + temp_TM_IQ_ILL1 = Xil_In32(0xFD4018F8); + temp_TM_E_ILL1 = Xil_In32(0xFD401924); + Xil_Out32(0xFD4018F8, 0x78); + temp_tx_dig_tm_61 = Xil_In32(0xFD4000F4); + temp_tm_dig_6 = Xil_In32(0xFD40106C); + psu_mask_write(0xFD4000F4, 0x0000000BU, 0x00000000U); + psu_mask_write(0xFD40106C, 0x0000000FU, 0x00000000U); + temp_ill12 = Xil_In32(0xFD401990) & 0xF0; - if (itercount < 32) { - iterresult[0] = - ((iterresult[0] << 1) | - ((tempbistresult & 0x1) == 0x1)); - iterresult[1] = - ((iterresult[1] << 1) | - ((tempbistresult & 0x2) == 0x2)); - iterresult[2] = - ((iterresult[2] << 1) | - ((tempbistresult & 0x4) == 0x4)); - iterresult[3] = - ((iterresult[3] << 1) | - ((tempbistresult & 0x8) == 0x8)); - } else { - iterresult[4] = - ((iterresult[4] << 1) | - ((tempbistresult & 0x1) == 0x1)); - iterresult[5] = - ((iterresult[5] << 1) | - ((tempbistresult & 0x2) == 0x2)); - iterresult[6] = - ((iterresult[6] << 1) | - ((tempbistresult & 0x4) == 0x4)); - iterresult[7] = - ((iterresult[7] << 1) | - ((tempbistresult & 0x8) == 0x8)); - } - currbistresult[0] = - currbistresult[0] | ((tempbistresult & 0x1) == 1); - currbistresult[1] = - currbistresult[1] | ((tempbistresult & 0x2) == 0x2); - currbistresult[2] = - currbistresult[2] | ((tempbistresult & 0x4) == 0x4); - currbistresult[3] = - currbistresult[3] | ((tempbistresult & 0x8) == 0x8); + serdes_illcalib_pcie_gen1(0, 0, 0, 0, 0, 0, 1, 0, 0); - for (loop = 0; loop <= 3; loop++) { - if (currbistresult[loop] == 1 && prevbistresult[loop] == 1) - bistpasscount[loop] = bistpasscount[loop] + 1; - if (bistpasscount[loop] < 4 && - currbistresult[loop] == 0 && itercount > 2) { - if (meancountalt_bistpasscount[loop] < - bistpasscount[loop]) { - meancountalt_bistpasscount[loop] = - bistpasscount[loop]; - meancountalt[loop] = - ((itercount - 1) - - ((bistpasscount[loop] + 1) / 2)); - } - bistpasscount[loop] = 0; - } - if (meancount[loop] == 0 && bistpasscount[loop] >= 4 && - (currbistresult[loop] == 0 || itercount == 63) && - prevbistresult[loop] == 1) - meancount[loop] = - (itercount - 1) - - ((bistpasscount[loop] + 1) / 2); - prevbistresult[loop] = currbistresult[loop]; + Xil_Out32(0xFD402360, temp_pll_fbdiv_frac_3_msb_offset); + Xil_Out32(0xFD41000C, temp_PLL_REF_SEL_OFFSET); + Xil_Out32(0xFD4018F8, temp_TM_IQ_ILL1); + Xil_Out32(0xFD4000F4, temp_tx_dig_tm_61); + Xil_Out32(0xFD40106C, temp_tm_dig_6); + Xil_Out32(0xFD401928, Xil_In32(0xFD401924)); + temp_ill12 = + temp_ill12 | (Xil_In32(0xFD401990) >> 4 & 0xF); + Xil_Out32(0xFD401990, temp_ill12); + Xil_Out32(0xFD401924, temp_TM_E_ILL1); } - } while (++itercount < 64); + if (lane1_protocol == 2) { + temp_pll_fbdiv_frac_3_msb_offset = Xil_In32(0xFD406360); + Xil_Out32(0xFD406360, 0x0); + temp_PLL_REF_SEL_OFFSET = Xil_In32(0xFD410004); + psu_mask_write(0xFD410004, 0x0000001FU, 0x0000000DU); + temp_TM_IQ_ILL1 = Xil_In32(0xFD4058F8); + temp_TM_E_ILL1 = Xil_In32(0xFD405924); + Xil_Out32(0xFD4058F8, 0x78); + temp_tx_dig_tm_61 = Xil_In32(0xFD4040F4); + temp_tm_dig_6 = Xil_In32(0xFD40506C); + psu_mask_write(0xFD4040F4, 0x0000000BU, 0x00000000U); + psu_mask_write(0xFD40506C, 0x0000000FU, 0x00000000U); + temp_ill12 = Xil_In32(0xFD405990) & 0xF0; - for (loop = 0; loop <= 3; loop++) { - if (lane0_active == 0 && loop == 0) - continue; - if (lane1_active == 0 && loop == 1) - continue; - if (lane2_active == 0 && loop == 2) - continue; - if (lane3_active == 0 && loop == 3) - continue; + serdes_illcalib_pcie_gen1(0, 0, 0, 0, 1, 0, 0, 0, 0); - if (meancount[loop] == 0) - meancount[loop] = meancountalt[loop]; + Xil_Out32(0xFD406360, temp_pll_fbdiv_frac_3_msb_offset); + Xil_Out32(0xFD41000C, temp_PLL_REF_SEL_OFFSET); + Xil_Out32(0xFD4058F8, temp_TM_IQ_ILL1); + Xil_Out32(0xFD4040F4, temp_tx_dig_tm_61); + Xil_Out32(0xFD40506C, temp_tm_dig_6); + Xil_Out32(0xFD405928, Xil_In32(0xFD405924)); + temp_ill12 = + temp_ill12 | (Xil_In32(0xFD405990) >> 4 & 0xF); + Xil_Out32(0xFD405990, temp_ill12); + Xil_Out32(0xFD405924, temp_TM_E_ILL1); + } + if (lane2_protocol == 2) { + temp_pll_fbdiv_frac_3_msb_offset = Xil_In32(0xFD40A360); + Xil_Out32(0xFD40A360, 0x0); + temp_PLL_REF_SEL_OFFSET = Xil_In32(0xFD410008); + psu_mask_write(0xFD410008, 0x0000001FU, 0x0000000DU); + temp_TM_IQ_ILL1 = Xil_In32(0xFD4098F8); + temp_TM_E_ILL1 = Xil_In32(0xFD409924); + Xil_Out32(0xFD4098F8, 0x78); + temp_tx_dig_tm_61 = Xil_In32(0xFD4080F4); + temp_tm_dig_6 = Xil_In32(0xFD40906C); + psu_mask_write(0xFD4080F4, 0x0000000BU, 0x00000000U); + psu_mask_write(0xFD40906C, 0x0000000FU, 0x00000000U); + temp_ill12 = Xil_In32(0xFD409990) & 0xF0; - if (gen2_calib != 1) { - ill1_val[loop] = ((0x04 + meancount[loop] * 8) % 0x100); - ill12_val[loop] = - ((0x04 + meancount[loop] * 8) >= - 0x100) ? 0x10 : 0x00; - Xil_Out32(0xFFFE0000 + loop * 4, iterresult[loop]); - Xil_Out32(0xFFFE0010 + loop * 4, iterresult[loop + 4]); - Xil_Out32(0xFFFE0020 + loop * 4, bistpasscount[loop]); - Xil_Out32(0xFFFE0030 + loop * 4, meancount[loop]); + serdes_illcalib_pcie_gen1(0, 0, 1, 0, 0, 0, 0, 0, 0); + + Xil_Out32(0xFD40A360, temp_pll_fbdiv_frac_3_msb_offset); + Xil_Out32(0xFD41000C, temp_PLL_REF_SEL_OFFSET); + Xil_Out32(0xFD4098F8, temp_TM_IQ_ILL1); + Xil_Out32(0xFD4080F4, temp_tx_dig_tm_61); + Xil_Out32(0xFD40906C, temp_tm_dig_6); + Xil_Out32(0xFD409928, Xil_In32(0xFD409924)); + temp_ill12 = + temp_ill12 | (Xil_In32(0xFD409990) >> 4 & 0xF); + Xil_Out32(0xFD409990, temp_ill12); + Xil_Out32(0xFD409924, temp_TM_E_ILL1); } - if (gen2_calib == 1) { - ill1_val[loop] = - ((0x104 + meancount[loop] * 8) % 0x100); - ill12_val[loop] = - ((0x104 + meancount[loop] * 8) >= - 0x200) ? 0x02 : 0x01; - Xil_Out32(0xFFFE0040 + loop * 4, iterresult[loop]); - Xil_Out32(0xFFFE0050 + loop * 4, iterresult[loop + 4]); - Xil_Out32(0xFFFE0060 + loop * 4, bistpasscount[loop]); - Xil_Out32(0xFFFE0070 + loop * 4, meancount[loop]); + if (lane3_protocol == 2) { + temp_pll_fbdiv_frac_3_msb_offset = Xil_In32(0xFD40E360); + Xil_Out32(0xFD40E360, 0x0); + temp_PLL_REF_SEL_OFFSET = Xil_In32(0xFD41000C); + psu_mask_write(0xFD41000C, 0x0000001FU, 0x0000000DU); + temp_TM_IQ_ILL1 = Xil_In32(0xFD40D8F8); + temp_TM_E_ILL1 = Xil_In32(0xFD40D924); + Xil_Out32(0xFD40D8F8, 0x78); + temp_tx_dig_tm_61 = Xil_In32(0xFD40C0F4); + temp_tm_dig_6 = Xil_In32(0xFD40D06C); + psu_mask_write(0xFD40C0F4, 0x0000000BU, 0x00000000U); + psu_mask_write(0xFD40D06C, 0x0000000FU, 0x00000000U); + temp_ill12 = Xil_In32(0xFD40D990) & 0xF0; + + serdes_illcalib_pcie_gen1(1, 0, 0, 0, 0, 0, 0, 0, 0); + + Xil_Out32(0xFD40E360, temp_pll_fbdiv_frac_3_msb_offset); + Xil_Out32(0xFD41000C, temp_PLL_REF_SEL_OFFSET); + Xil_Out32(0xFD40D8F8, temp_TM_IQ_ILL1); + Xil_Out32(0xFD40C0F4, temp_tx_dig_tm_61); + Xil_Out32(0xFD40D06C, temp_tm_dig_6); + Xil_Out32(0xFD40D928, Xil_In32(0xFD40D924)); + temp_ill12 = + temp_ill12 | (Xil_In32(0xFD40D990) >> 4 & 0xF); + Xil_Out32(0xFD40D990, temp_ill12); + Xil_Out32(0xFD40D924, temp_TM_E_ILL1); } + rdata = Xil_In32(0xFD410098); + rdata = (rdata & 0xDF); + Xil_Out32(0xFD410098, rdata); } - if (gen2_calib != 1) { - if (lane0_active == 1) - Xil_Out32(0xFD401924, ill1_val[0]); - if (lane0_active == 1) - psu_mask_write(0xFD401990, 0x000000F0U, ill12_val[0]); - if (lane1_active == 1) - Xil_Out32(0xFD405924, ill1_val[1]); - if (lane1_active == 1) - psu_mask_write(0xFD405990, 0x000000F0U, ill12_val[1]); - if (lane2_active == 1) - Xil_Out32(0xFD409924, ill1_val[2]); - if (lane2_active == 1) - psu_mask_write(0xFD409990, 0x000000F0U, ill12_val[2]); - if (lane3_active == 1) - Xil_Out32(0xFD40D924, ill1_val[3]); - if (lane3_active == 1) - psu_mask_write(0xFD40D990, 0x000000F0U, ill12_val[3]); + + if (lane0_protocol == 2 && lane0_rate == 3) { + psu_mask_write(0xFD40198C, 0x000000F0U, 0x00000020U); + psu_mask_write(0xFD40192C, 0x000000FFU, 0x00000094U); } - if (gen2_calib == 1) { - if (lane0_active == 1) - Xil_Out32(0xFD401928, ill1_val[0]); - if (lane0_active == 1) - psu_mask_write(0xFD401990, 0x0000000FU, ill12_val[0]); - if (lane1_active == 1) - Xil_Out32(0xFD405928, ill1_val[1]); - if (lane1_active == 1) - psu_mask_write(0xFD405990, 0x0000000FU, ill12_val[1]); - if (lane2_active == 1) - Xil_Out32(0xFD409928, ill1_val[2]); - if (lane2_active == 1) - psu_mask_write(0xFD409990, 0x0000000FU, ill12_val[2]); - if (lane3_active == 1) - Xil_Out32(0xFD40D928, ill1_val[3]); - if (lane3_active == 1) - psu_mask_write(0xFD40D990, 0x0000000FU, ill12_val[3]); + if (lane1_protocol == 2 && lane1_rate == 3) { + psu_mask_write(0xFD40598C, 0x000000F0U, 0x00000020U); + psu_mask_write(0xFD40592C, 0x000000FFU, 0x00000094U); + } + if (lane2_protocol == 2 && lane2_rate == 3) { + psu_mask_write(0xFD40998C, 0x000000F0U, 0x00000020U); + psu_mask_write(0xFD40992C, 0x000000FFU, 0x00000094U); + } + if (lane3_protocol == 2 && lane3_rate == 3) { + psu_mask_write(0xFD40D98C, 0x000000F0U, 0x00000020U); + psu_mask_write(0xFD40D92C, 0x000000FFU, 0x00000094U); + } + + if (lane0_protocol == 1) { + if (lane0_rate == 0) { + serdes_illcalib_pcie_gen1(lane3_protocol, lane3_rate, + lane2_protocol, lane2_rate, + lane1_protocol, lane1_rate, + lane0_protocol, 0, 0); + } else { + serdes_illcalib_pcie_gen1(lane3_protocol, lane3_rate, + lane2_protocol, lane2_rate, + lane1_protocol, lane1_rate, + lane0_protocol, 0, 0); + serdes_illcalib_pcie_gen1(lane3_protocol, lane3_rate, + lane2_protocol, lane2_rate, + lane1_protocol, lane1_rate, + lane0_protocol, lane0_rate, + 1); + } } - if (lane0_active == 1) - psu_mask_write(0xFD401018, 0x00000030U, 0x00000000U); - if (lane1_active == 1) - psu_mask_write(0xFD405018, 0x00000030U, 0x00000000U); - if (lane2_active == 1) - psu_mask_write(0xFD409018, 0x00000030U, 0x00000000U); - if (lane3_active == 1) - psu_mask_write(0xFD40D018, 0x00000030U, 0x00000000U); + if (lane0_protocol == 3) + Xil_Out32(0xFD401914, 0xF3); + if (lane0_protocol == 3) + Xil_Out32(0xFD401940, 0xF3); + if (lane0_protocol == 3) + Xil_Out32(0xFD401990, 0x20); + if (lane0_protocol == 3) + Xil_Out32(0xFD401924, 0x37); + + if (lane1_protocol == 3) + Xil_Out32(0xFD405914, 0xF3); + if (lane1_protocol == 3) + Xil_Out32(0xFD405940, 0xF3); + if (lane1_protocol == 3) + Xil_Out32(0xFD405990, 0x20); + if (lane1_protocol == 3) + Xil_Out32(0xFD405924, 0x37); + + if (lane2_protocol == 3) + Xil_Out32(0xFD409914, 0xF3); + if (lane2_protocol == 3) + Xil_Out32(0xFD409940, 0xF3); + if (lane2_protocol == 3) + Xil_Out32(0xFD409990, 0x20); + if (lane2_protocol == 3) + Xil_Out32(0xFD409924, 0x37); + + if (lane3_protocol == 3) + Xil_Out32(0xFD40D914, 0xF3); + if (lane3_protocol == 3) + Xil_Out32(0xFD40D940, 0xF3); + if (lane3_protocol == 3) + Xil_Out32(0xFD40D990, 0x20); + if (lane3_protocol == 3) + Xil_Out32(0xFD40D924, 0x37); + + return 1; +} + +static unsigned long psu_pll_init_data(void) +{ + psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4B0C82U); + psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00015A00U); + psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000008U); + psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000001U); + psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000000U); + mask_poll(0xFF5E0040, 0x00000002U); + psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000000U); + psu_mask_write(0xFF5E0048, 0x00003F00U, 0x00000300U); + psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01012300U); + psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E4B0C82U); + psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00015A00U); + psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000008U); + psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000001U); + psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000000U); + mask_poll(0xFF5E0040, 0x00000001U); + psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000000U); + psu_mask_write(0xFF5E0044, 0x00003F00U, 0x00000300U); + psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U); + psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014800U); + psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000008U); + psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000000U); + mask_poll(0xFD1A0044, 0x00000001U); + psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000000U); + psu_mask_write(0xFD1A0048, 0x00003F00U, 0x00000300U); + psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U); + psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00013F00U); + psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000008U); + psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000000U); + mask_poll(0xFD1A0044, 0x00000002U); + psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000000U); + psu_mask_write(0xFD1A004C, 0x00003F00U, 0x00000200U); + psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E4B0C82U); + psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00015A00U); + psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000008U); + psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000000U); + mask_poll(0xFD1A0044, 0x00000004U); + psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000000U); + psu_mask_write(0xFD1A0050, 0x00003F00U, 0x00000300U); + + return 1; +} + +static unsigned long psu_clock_init_data(void) +{ + psu_mask_write(0xFF5E005C, 0x063F3F07U, 0x06010C00U); + psu_mask_write(0xFF5E0100, 0x013F3F07U, 0x01010600U); + psu_mask_write(0xFF5E0060, 0x023F3F07U, 0x02010600U); + psu_mask_write(0xFF5E004C, 0x023F3F07U, 0x02031900U); + psu_mask_write(0xFF5E0068, 0x013F3F07U, 0x01010C00U); + psu_mask_write(0xFF5E0070, 0x013F3F07U, 0x01010800U); + psu_mask_write(0xFF18030C, 0x00020000U, 0x00000000U); + psu_mask_write(0xFF5E0074, 0x013F3F07U, 0x01010F00U); + psu_mask_write(0xFF5E0120, 0x013F3F07U, 0x01010F00U); + psu_mask_write(0xFF5E0124, 0x013F3F07U, 0x01010F00U); + psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000302U); + psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000602U); + psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000800U); + psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U); + psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U); + psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U); + psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U); + psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010F00U); + psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011E02U); + psu_mask_write(0xFF5E0104, 0x00000007U, 0x00000000U); + psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000F00U); + psu_mask_write(0xFD1A00A0, 0x01003F07U, 0x01000200U); + psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U); + psu_mask_write(0xFD1A0068, 0x01003F07U, 0x01000200U); + psu_mask_write(0xFD1A0080, 0x00003F07U, 0x00000200U); + psu_mask_write(0xFD1A00B8, 0x01003F07U, 0x01000200U); + psu_mask_write(0xFD1A00BC, 0x01003F07U, 0x01000200U); + psu_mask_write(0xFD1A00C0, 0x01003F07U, 0x01000203U); + psu_mask_write(0xFD1A00C4, 0x01003F07U, 0x01000502U); + psu_mask_write(0xFD1A00F8, 0x00003F07U, 0x00000200U); + psu_mask_write(0xFF180380, 0x000000FFU, 0x00000000U); + psu_mask_write(0xFD610100, 0x00000001U, 0x00000000U); + psu_mask_write(0xFF180300, 0x00000001U, 0x00000000U); + psu_mask_write(0xFF410050, 0x00000001U, 0x00000000U); + + return 1; +} + +static unsigned long psu_ddr_init_data(void) +{ + psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000008U); + psu_mask_write(0xFD070000, 0xE30FBE3DU, 0x81040010U); + psu_mask_write(0xFD070010, 0x8000F03FU, 0x00000030U); + psu_mask_write(0xFD070020, 0x000003F3U, 0x00000200U); + psu_mask_write(0xFD070024, 0xFFFFFFFFU, 0x00800000U); + psu_mask_write(0xFD070030, 0x0000007FU, 0x00000000U); + psu_mask_write(0xFD070034, 0x00FFFF1FU, 0x00408210U); + psu_mask_write(0xFD070050, 0x00F1F1F4U, 0x00210000U); + psu_mask_write(0xFD070054, 0x0FFF0FFFU, 0x00000000U); + psu_mask_write(0xFD070060, 0x00000073U, 0x00000001U); + psu_mask_write(0xFD070064, 0x0FFF83FFU, 0x007F80B8U); + psu_mask_write(0xFD070070, 0x00000017U, 0x00000010U); + psu_mask_write(0xFD070074, 0x00000003U, 0x00000000U); + psu_mask_write(0xFD0700C4, 0x3F000391U, 0x10000200U); + psu_mask_write(0xFD0700C8, 0x01FF1F3FU, 0x0040051FU); + psu_mask_write(0xFD0700D0, 0xC3FF0FFFU, 0x00020102U); + psu_mask_write(0xFD0700D4, 0x01FF7F0FU, 0x00020000U); + psu_mask_write(0xFD0700D8, 0x0000FF0FU, 0x00002205U); + psu_mask_write(0xFD0700DC, 0xFFFFFFFFU, 0x07300301U); + psu_mask_write(0xFD0700E0, 0xFFFFFFFFU, 0x00100200U); + psu_mask_write(0xFD0700E4, 0x00FF03FFU, 0x00210004U); + psu_mask_write(0xFD0700E8, 0xFFFFFFFFU, 0x000006C0U); + psu_mask_write(0xFD0700EC, 0xFFFF0000U, 0x08190000U); + psu_mask_write(0xFD0700F0, 0x0000003FU, 0x00000010U); + psu_mask_write(0xFD0700F4, 0x00000FFFU, 0x0000066FU); + psu_mask_write(0xFD070100, 0x7F3F7F3FU, 0x0F102311U); + psu_mask_write(0xFD070104, 0x001F1F7FU, 0x00040419U); + psu_mask_write(0xFD070108, 0x3F3F3F3FU, 0x0608070CU); + psu_mask_write(0xFD07010C, 0x3FF3F3FFU, 0x0050400CU); + psu_mask_write(0xFD070110, 0x1F0F0F1FU, 0x08030409U); + psu_mask_write(0xFD070114, 0x0F0F3F1FU, 0x06060403U); + psu_mask_write(0xFD070118, 0x0F0F000FU, 0x01010004U); + psu_mask_write(0xFD07011C, 0x00000F0FU, 0x00000606U); + psu_mask_write(0xFD070120, 0x7F7F7F7FU, 0x04040D07U); + psu_mask_write(0xFD070124, 0x40070F3FU, 0x00020309U); + psu_mask_write(0xFD07012C, 0x7F1F031FU, 0x1207010EU); + psu_mask_write(0xFD070130, 0x00030F1FU, 0x00020608U); + psu_mask_write(0xFD070180, 0xF7FF03FFU, 0x81000040U); + psu_mask_write(0xFD070184, 0x3FFFFFFFU, 0x0201908AU); + psu_mask_write(0xFD070190, 0x1FBFBF3FU, 0x048B8208U); + psu_mask_write(0xFD070194, 0xF31F0F0FU, 0x00030304U); + psu_mask_write(0xFD070198, 0x0FF1F1F1U, 0x07000101U); + psu_mask_write(0xFD07019C, 0x000000F1U, 0x00000021U); + psu_mask_write(0xFD0701A0, 0xC3FF03FFU, 0x00400003U); + psu_mask_write(0xFD0701A4, 0x00FF00FFU, 0x00C800FFU); + psu_mask_write(0xFD0701B0, 0x00000007U, 0x00000000U); + psu_mask_write(0xFD0701B4, 0x00003F3FU, 0x00000906U); + psu_mask_write(0xFD0701C0, 0x00000007U, 0x00000001U); + psu_mask_write(0xFD070200, 0x0000001FU, 0x0000001FU); + psu_mask_write(0xFD070204, 0x001F1F1FU, 0x001F0909U); + psu_mask_write(0xFD070208, 0x0F0F0F0FU, 0x01010100U); + psu_mask_write(0xFD07020C, 0x0F0F0F0FU, 0x01010101U); + psu_mask_write(0xFD070210, 0x00000F0FU, 0x00000F0FU); + psu_mask_write(0xFD070214, 0x0F0F0F0FU, 0x070F0707U); + psu_mask_write(0xFD070218, 0x8F0F0F0FU, 0x07070707U); + psu_mask_write(0xFD07021C, 0x00000F0FU, 0x00000F0FU); + psu_mask_write(0xFD070220, 0x00001F1FU, 0x00001F01U); + psu_mask_write(0xFD070224, 0x0F0F0F0FU, 0x07070707U); + psu_mask_write(0xFD070228, 0x0F0F0F0FU, 0x07070707U); + psu_mask_write(0xFD07022C, 0x0000000FU, 0x00000007U); + psu_mask_write(0xFD070240, 0x0F1F0F7CU, 0x0600060CU); + psu_mask_write(0xFD070244, 0x00003333U, 0x00000001U); + psu_mask_write(0xFD070250, 0x7FFF3F07U, 0x01002001U); + psu_mask_write(0xFD070264, 0xFF00FFFFU, 0x08000040U); + psu_mask_write(0xFD07026C, 0xFF00FFFFU, 0x08000040U); + psu_mask_write(0xFD070280, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD070284, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD070288, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD07028C, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD070290, 0x0000FFFFU, 0x00000000U); + psu_mask_write(0xFD070294, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD070300, 0x00000011U, 0x00000000U); + psu_mask_write(0xFD07030C, 0x80000033U, 0x00000000U); + psu_mask_write(0xFD070320, 0x00000001U, 0x00000000U); + psu_mask_write(0xFD070400, 0x00000111U, 0x00000001U); + psu_mask_write(0xFD070404, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070408, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070490, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD070494, 0x0033000FU, 0x0020000BU); + psu_mask_write(0xFD070498, 0x07FF07FFU, 0x00000000U); + psu_mask_write(0xFD0704B4, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD0704B8, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070540, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD070544, 0x03330F0FU, 0x02000B03U); + psu_mask_write(0xFD070548, 0x07FF07FFU, 0x00000000U); + psu_mask_write(0xFD070564, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070568, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD0705F0, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD0705F4, 0x03330F0FU, 0x02000B03U); + psu_mask_write(0xFD0705F8, 0x07FF07FFU, 0x00000000U); + psu_mask_write(0xFD070614, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070618, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD0706A0, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD0706A4, 0x0033000FU, 0x00100003U); + psu_mask_write(0xFD0706A8, 0x07FF07FFU, 0x0000004FU); + psu_mask_write(0xFD0706AC, 0x0033000FU, 0x00100003U); + psu_mask_write(0xFD0706B0, 0x000007FFU, 0x0000004FU); + psu_mask_write(0xFD0706C4, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD0706C8, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070750, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD070754, 0x0033000FU, 0x00100003U); + psu_mask_write(0xFD070758, 0x07FF07FFU, 0x0000004FU); + psu_mask_write(0xFD07075C, 0x0033000FU, 0x00100003U); + psu_mask_write(0xFD070760, 0x000007FFU, 0x0000004FU); + psu_mask_write(0xFD070774, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070778, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070800, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD070804, 0x0033000FU, 0x00100003U); + psu_mask_write(0xFD070808, 0x07FF07FFU, 0x0000004FU); + psu_mask_write(0xFD07080C, 0x0033000FU, 0x00100003U); + psu_mask_write(0xFD070810, 0x000007FFU, 0x0000004FU); + psu_mask_write(0xFD070F04, 0x000001FFU, 0x00000000U); + psu_mask_write(0xFD070F08, 0x000000FFU, 0x00000000U); + psu_mask_write(0xFD070F0C, 0x000001FFU, 0x00000010U); + psu_mask_write(0xFD070F10, 0x000000FFU, 0x0000000FU); + psu_mask_write(0xFD072190, 0x1FBFBF3FU, 0x07828002U); + psu_mask_write(0xFD1A0108, 0x0000000CU, 0x00000000U); + psu_mask_write(0xFD080010, 0xFFFFFFFFU, 0x07001E00U); + psu_mask_write(0xFD080018, 0xFFFFFFFFU, 0x00F0FC00U); + psu_mask_write(0xFD08001C, 0xFFFFFFFFU, 0x55AA5480U); + psu_mask_write(0xFD080024, 0xFFFFFFFFU, 0x010100F4U); + psu_mask_write(0xFD080040, 0xFFFFFFFFU, 0x41A20D10U); + psu_mask_write(0xFD080044, 0xFFFFFFFFU, 0xCD141275U); + psu_mask_write(0xFD080068, 0xFFFFFFFFU, 0x01100000U); + psu_mask_write(0xFD080090, 0xFFFFFFFFU, 0x02A04161U); + psu_mask_write(0xFD0800C0, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD0800C4, 0xFFFFFFFFU, 0x000000E3U); + psu_mask_write(0xFD080100, 0xFFFFFFFFU, 0x0800040CU); + psu_mask_write(0xFD080110, 0xFFFFFFFFU, 0x07220F08U); + psu_mask_write(0xFD080114, 0xFFFFFFFFU, 0x28200008U); + psu_mask_write(0xFD080118, 0xFFFFFFFFU, 0x000F0300U); + psu_mask_write(0xFD08011C, 0xFFFFFFFFU, 0x83000800U); + psu_mask_write(0xFD080120, 0xFFFFFFFFU, 0x01702B07U); + psu_mask_write(0xFD080124, 0xFFFFFFFFU, 0x00310F08U); + psu_mask_write(0xFD080128, 0xFFFFFFFFU, 0x00000B0FU); + psu_mask_write(0xFD080140, 0xFFFFFFFFU, 0x08400020U); + psu_mask_write(0xFD080144, 0xFFFFFFFFU, 0x00000C80U); + psu_mask_write(0xFD080150, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080154, 0xFFFFFFFFU, 0x00000200U); + psu_mask_write(0xFD080180, 0xFFFFFFFFU, 0x00000630U); + psu_mask_write(0xFD080184, 0xFFFFFFFFU, 0x00000301U); + psu_mask_write(0xFD080188, 0xFFFFFFFFU, 0x00000010U); + psu_mask_write(0xFD08018C, 0xFFFFFFFFU, 0x00000200U); + psu_mask_write(0xFD080190, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080194, 0xFFFFFFFFU, 0x000006C0U); + psu_mask_write(0xFD080198, 0xFFFFFFFFU, 0x00000819U); + psu_mask_write(0xFD0801AC, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD0801B0, 0xFFFFFFFFU, 0x0000004DU); + psu_mask_write(0xFD0801B4, 0xFFFFFFFFU, 0x00000008U); + psu_mask_write(0xFD0801B8, 0xFFFFFFFFU, 0x0000004DU); + psu_mask_write(0xFD0801D8, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080200, 0xFFFFFFFFU, 0x800091C7U); + psu_mask_write(0xFD080204, 0xFFFFFFFFU, 0x00010236U); + psu_mask_write(0xFD080240, 0xFFFFFFFFU, 0x00141054U); + psu_mask_write(0xFD080250, 0xFFFFFFFFU, 0x00088000U); + psu_mask_write(0xFD080414, 0xFFFFFFFFU, 0x12341000U); + psu_mask_write(0xFD0804F4, 0xFFFFFFFFU, 0x00000005U); + psu_mask_write(0xFD080500, 0xFFFFFFFFU, 0x30000028U); + psu_mask_write(0xFD080508, 0xFFFFFFFFU, 0x0A000000U); + psu_mask_write(0xFD08050C, 0xFFFFFFFFU, 0x00000009U); + psu_mask_write(0xFD080510, 0xFFFFFFFFU, 0x0A000000U); + psu_mask_write(0xFD080520, 0xFFFFFFFFU, 0x0300B0CEU); + psu_mask_write(0xFD080528, 0xFFFFFFFFU, 0xF9032019U); + psu_mask_write(0xFD08052C, 0xFFFFFFFFU, 0x07F001E3U); + psu_mask_write(0xFD080544, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080548, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080558, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD08055C, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080560, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080564, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080680, 0xFFFFFFFFU, 0x008A8A58U); + psu_mask_write(0xFD080684, 0xFFFFFFFFU, 0x000079DDU); + psu_mask_write(0xFD080694, 0xFFFFFFFFU, 0x01E10210U); + psu_mask_write(0xFD080698, 0xFFFFFFFFU, 0x01E10000U); + psu_mask_write(0xFD0806A4, 0xFFFFFFFFU, 0x00087BDBU); + psu_mask_write(0xFD080700, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080704, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0xFD08070C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080710, 0xFFFFFFFFU, 0x0E00B03CU); + psu_mask_write(0xFD080714, 0xFFFFFFFFU, 0x09095555U); + psu_mask_write(0xFD080718, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080800, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080804, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0xFD08080C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080810, 0xFFFFFFFFU, 0x0E00B03CU); + psu_mask_write(0xFD080814, 0xFFFFFFFFU, 0x09095555U); + psu_mask_write(0xFD080818, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080900, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080904, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0xFD08090C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080910, 0xFFFFFFFFU, 0x0E00B004U); + psu_mask_write(0xFD080914, 0xFFFFFFFFU, 0x09095555U); + psu_mask_write(0xFD080918, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080A00, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080A04, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0xFD080A0C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080A10, 0xFFFFFFFFU, 0x0E00B004U); + psu_mask_write(0xFD080A14, 0xFFFFFFFFU, 0x09095555U); + psu_mask_write(0xFD080A18, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080B00, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080B04, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0xFD080B08, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080B0C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080B10, 0xFFFFFFFFU, 0x0E00B004U); + psu_mask_write(0xFD080B14, 0xFFFFFFFFU, 0x09095555U); + psu_mask_write(0xFD080B18, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080C00, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080C04, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0xFD080C08, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080C0C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080C10, 0xFFFFFFFFU, 0x0E00B03CU); + psu_mask_write(0xFD080C14, 0xFFFFFFFFU, 0x09095555U); + psu_mask_write(0xFD080C18, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080D00, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080D04, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0xFD080D08, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080D0C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080D10, 0xFFFFFFFFU, 0x0E00B004U); + psu_mask_write(0xFD080D14, 0xFFFFFFFFU, 0x09095555U); + psu_mask_write(0xFD080D18, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080E00, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080E04, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0xFD080E08, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080E0C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080E10, 0xFFFFFFFFU, 0x0E00B03CU); + psu_mask_write(0xFD080E14, 0xFFFFFFFFU, 0x09095555U); + psu_mask_write(0xFD080E18, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080F00, 0xFFFFFFFFU, 0x80803660U); + psu_mask_write(0xFD080F04, 0xFFFFFFFFU, 0x55556000U); + psu_mask_write(0xFD080F08, 0xFFFFFFFFU, 0xAAAAAAAAU); + psu_mask_write(0xFD080F0C, 0xFFFFFFFFU, 0x0029A4A4U); + psu_mask_write(0xFD080F10, 0xFFFFFFFFU, 0x0C00B000U); + psu_mask_write(0xFD080F14, 0xFFFFFFFFU, 0x09095555U); + psu_mask_write(0xFD080F18, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD081400, 0xFFFFFFFFU, 0x2A019FFEU); + psu_mask_write(0xFD081404, 0xFFFFFFFFU, 0x01100000U); + psu_mask_write(0xFD08141C, 0xFFFFFFFFU, 0x01264300U); + psu_mask_write(0xFD08142C, 0xFFFFFFFFU, 0x00041800U); + psu_mask_write(0xFD081430, 0xFFFFFFFFU, 0x70800000U); + psu_mask_write(0xFD081440, 0xFFFFFFFFU, 0x2A019FFEU); + psu_mask_write(0xFD081444, 0xFFFFFFFFU, 0x01100000U); + psu_mask_write(0xFD08145C, 0xFFFFFFFFU, 0x01264300U); + psu_mask_write(0xFD08146C, 0xFFFFFFFFU, 0x00041800U); + psu_mask_write(0xFD081470, 0xFFFFFFFFU, 0x70800000U); + psu_mask_write(0xFD081480, 0xFFFFFFFFU, 0x2A019FFEU); + psu_mask_write(0xFD081484, 0xFFFFFFFFU, 0x01100000U); + psu_mask_write(0xFD08149C, 0xFFFFFFFFU, 0x01264300U); + psu_mask_write(0xFD0814AC, 0xFFFFFFFFU, 0x00041800U); + psu_mask_write(0xFD0814B0, 0xFFFFFFFFU, 0x70800000U); + psu_mask_write(0xFD0814C0, 0xFFFFFFFFU, 0x2A019FFEU); + psu_mask_write(0xFD0814C4, 0xFFFFFFFFU, 0x01100000U); + psu_mask_write(0xFD0814DC, 0xFFFFFFFFU, 0x01264300U); + psu_mask_write(0xFD0814EC, 0xFFFFFFFFU, 0x00041800U); + psu_mask_write(0xFD0814F0, 0xFFFFFFFFU, 0x70800000U); + psu_mask_write(0xFD081500, 0xFFFFFFFFU, 0x15019FFEU); + psu_mask_write(0xFD081504, 0xFFFFFFFFU, 0x21100000U); + psu_mask_write(0xFD08151C, 0xFFFFFFFFU, 0x01266300U); + psu_mask_write(0xFD08152C, 0xFFFFFFFFU, 0x00041800U); + psu_mask_write(0xFD081530, 0xFFFFFFFFU, 0x70400000U); + psu_mask_write(0xFD0817DC, 0xFFFFFFFFU, 0x012643C4U); + + return 1; +} + +static unsigned long psu_ddr_qos_init_data(void) +{ + psu_mask_write(0xFD360008, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD36001C, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD370008, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD37001C, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD380008, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD38001C, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD390008, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD39001C, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD3A0008, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD3A001C, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD3B0008, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD3B001C, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFF9B0008, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFF9B001C, 0x0000000FU, 0x00000000U); + + return 1; +} + +static unsigned long psu_mio_init_data(void) +{ + psu_mask_write(0xFF180000, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180004, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180008, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF18000C, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180010, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180014, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180018, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF18001C, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180020, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180024, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180028, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF18002C, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180030, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180034, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180038, 0x000000FEU, 0x00000040U); + psu_mask_write(0xFF18003C, 0x000000FEU, 0x00000040U); + psu_mask_write(0xFF180040, 0x000000FEU, 0x00000040U); + psu_mask_write(0xFF180044, 0x000000FEU, 0x00000040U); + psu_mask_write(0xFF180048, 0x000000FEU, 0x000000C0U); + psu_mask_write(0xFF18004C, 0x000000FEU, 0x000000C0U); + psu_mask_write(0xFF180050, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180054, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180058, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF18005C, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180060, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180064, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180068, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF18006C, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180070, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180074, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180078, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF18007C, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180080, 0x000000FEU, 0x00000008U); + psu_mask_write(0xFF180084, 0x000000FEU, 0x00000008U); + psu_mask_write(0xFF180098, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF18009C, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800A0, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800A4, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800A8, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800AC, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF1800B0, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF1800B4, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800B8, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800BC, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800C0, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800C4, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800C8, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800CC, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800D0, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800D4, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800D8, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800DC, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800E0, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800E4, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800E8, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800EC, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800F0, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800F4, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800F8, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800FC, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF180100, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180104, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180108, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF18010C, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180110, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180114, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180118, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF18011C, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180120, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180124, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180128, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF18012C, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180130, 0x000000FEU, 0x000000C0U); + psu_mask_write(0xFF180134, 0x000000FEU, 0x000000C0U); + psu_mask_write(0xFF180204, 0xFFFFFFFFU, 0x00040000U); + psu_mask_write(0xFF180208, 0xFFFFFFFFU, 0x00B02000U); + psu_mask_write(0xFF18020C, 0x00003FFFU, 0x00000FC0U); + psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF18013C, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180140, 0x03FFFFFFU, 0x00000000U); + psu_mask_write(0xFF180144, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180148, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x00000000U); + psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180158, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF18015C, 0x03FFFFFFU, 0x00000000U); + psu_mask_write(0xFF180160, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x00000000U); + psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180174, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180178, 0x03FFFFFFU, 0x00000000U); + psu_mask_write(0xFF18017C, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x00000000U); + psu_mask_write(0xFF180200, 0x0000000FU, 0x00000000U); - Xil_Out32(0xFD410098, 0); - if (lane0_active == 1) { - Xil_Out32(0xFD403004, 0); - Xil_Out32(0xFD403008, 0); - Xil_Out32(0xFD40300C, 0); - Xil_Out32(0xFD403010, 0); - Xil_Out32(0xFD403014, 0); - Xil_Out32(0xFD403018, 0); - Xil_Out32(0xFD40301C, 0); - Xil_Out32(0xFD403020, 0); - Xil_Out32(0xFD403024, 0); - Xil_Out32(0xFD403028, 0); - Xil_Out32(0xFD40302C, 0); - Xil_Out32(0xFD403030, 0); - Xil_Out32(0xFD403034, 0); - Xil_Out32(0xFD403038, 0); - Xil_Out32(0xFD40303C, 0); - Xil_Out32(0xFD403040, 0); - Xil_Out32(0xFD403044, 0); - Xil_Out32(0xFD403048, 0); - Xil_Out32(0xFD40304C, 0); - Xil_Out32(0xFD403050, 0); - Xil_Out32(0xFD403054, 0); - Xil_Out32(0xFD403058, 0); - Xil_Out32(0xFD403068, 1); - Xil_Out32(0xFD40306C, 0); - Xil_Out32(0xFD4010AC, 0); - psu_mask_write(0xFD410044, 0x00000003U, 0x00000001U); - psu_mask_write(0xFD410040, 0x00000003U, 0x00000001U); - psu_mask_write(0xFD410038, 0x00000007U, 0x00000000U); - } - if (lane1_active == 1) { - Xil_Out32(0xFD407004, 0); - Xil_Out32(0xFD407008, 0); - Xil_Out32(0xFD40700C, 0); - Xil_Out32(0xFD407010, 0); - Xil_Out32(0xFD407014, 0); - Xil_Out32(0xFD407018, 0); - Xil_Out32(0xFD40701C, 0); - Xil_Out32(0xFD407020, 0); - Xil_Out32(0xFD407024, 0); - Xil_Out32(0xFD407028, 0); - Xil_Out32(0xFD40702C, 0); - Xil_Out32(0xFD407030, 0); - Xil_Out32(0xFD407034, 0); - Xil_Out32(0xFD407038, 0); - Xil_Out32(0xFD40703C, 0); - Xil_Out32(0xFD407040, 0); - Xil_Out32(0xFD407044, 0); - Xil_Out32(0xFD407048, 0); - Xil_Out32(0xFD40704C, 0); - Xil_Out32(0xFD407050, 0); - Xil_Out32(0xFD407054, 0); - Xil_Out32(0xFD407058, 0); - Xil_Out32(0xFD407068, 1); - Xil_Out32(0xFD40706C, 0); - Xil_Out32(0xFD4050AC, 0); - psu_mask_write(0xFD410044, 0x0000000CU, 0x00000004U); - psu_mask_write(0xFD410040, 0x0000000CU, 0x00000004U); - psu_mask_write(0xFD410038, 0x00000070U, 0x00000000U); - } - if (lane2_active == 1) { - Xil_Out32(0xFD40B004, 0); - Xil_Out32(0xFD40B008, 0); - Xil_Out32(0xFD40B00C, 0); - Xil_Out32(0xFD40B010, 0); - Xil_Out32(0xFD40B014, 0); - Xil_Out32(0xFD40B018, 0); - Xil_Out32(0xFD40B01C, 0); - Xil_Out32(0xFD40B020, 0); - Xil_Out32(0xFD40B024, 0); - Xil_Out32(0xFD40B028, 0); - Xil_Out32(0xFD40B02C, 0); - Xil_Out32(0xFD40B030, 0); - Xil_Out32(0xFD40B034, 0); - Xil_Out32(0xFD40B038, 0); - Xil_Out32(0xFD40B03C, 0); - Xil_Out32(0xFD40B040, 0); - Xil_Out32(0xFD40B044, 0); - Xil_Out32(0xFD40B048, 0); - Xil_Out32(0xFD40B04C, 0); - Xil_Out32(0xFD40B050, 0); - Xil_Out32(0xFD40B054, 0); - Xil_Out32(0xFD40B058, 0); - Xil_Out32(0xFD40B068, 1); - Xil_Out32(0xFD40B06C, 0); - Xil_Out32(0xFD4090AC, 0); - psu_mask_write(0xFD410044, 0x00000030U, 0x00000010U); - psu_mask_write(0xFD410040, 0x00000030U, 0x00000010U); - psu_mask_write(0xFD41003C, 0x00000007U, 0x00000000U); - } - if (lane3_active == 1) { - Xil_Out32(0xFD40F004, 0); - Xil_Out32(0xFD40F008, 0); - Xil_Out32(0xFD40F00C, 0); - Xil_Out32(0xFD40F010, 0); - Xil_Out32(0xFD40F014, 0); - Xil_Out32(0xFD40F018, 0); - Xil_Out32(0xFD40F01C, 0); - Xil_Out32(0xFD40F020, 0); - Xil_Out32(0xFD40F024, 0); - Xil_Out32(0xFD40F028, 0); - Xil_Out32(0xFD40F02C, 0); - Xil_Out32(0xFD40F030, 0); - Xil_Out32(0xFD40F034, 0); - Xil_Out32(0xFD40F038, 0); - Xil_Out32(0xFD40F03C, 0); - Xil_Out32(0xFD40F040, 0); - Xil_Out32(0xFD40F044, 0); - Xil_Out32(0xFD40F048, 0); - Xil_Out32(0xFD40F04C, 0); - Xil_Out32(0xFD40F050, 0); - Xil_Out32(0xFD40F054, 0); - Xil_Out32(0xFD40F058, 0); - Xil_Out32(0xFD40F068, 1); - Xil_Out32(0xFD40F06C, 0); - Xil_Out32(0xFD40D0AC, 0); - psu_mask_write(0xFD410044, 0x000000C0U, 0x00000040U); - psu_mask_write(0xFD410040, 0x000000C0U, 0x00000040U); - psu_mask_write(0xFD41003C, 0x00000070U, 0x00000000U); - } return 1; } -static int serdes_illcalib(u32 lane3_protocol, u32 lane3_rate, - u32 lane2_protocol, u32 lane2_rate, - u32 lane1_protocol, u32 lane1_rate, - u32 lane0_protocol, u32 lane0_rate) +static unsigned long psu_peripherals_pre_init_data(void) { - unsigned int rdata = 0; - unsigned int sata_gen2 = 1; - unsigned int temp_ill12 = 0; - unsigned int temp_PLL_REF_SEL_OFFSET; - unsigned int temp_TM_IQ_ILL1; - unsigned int temp_TM_E_ILL1; - unsigned int temp_tx_dig_tm_61; - unsigned int temp_tm_dig_6; - unsigned int temp_pll_fbdiv_frac_3_msb_offset; + psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01012302U); + psu_mask_write(0xFF5E0238, 0x00000001U, 0x00000001U); - if (lane0_protocol == 2 || lane0_protocol == 1) { - Xil_Out32(0xFD401910, 0xF3); - Xil_Out32(0xFD40193C, 0xF3); - Xil_Out32(0xFD401914, 0xF3); - Xil_Out32(0xFD401940, 0xF3); - } - if (lane1_protocol == 2 || lane1_protocol == 1) { - Xil_Out32(0xFD405910, 0xF3); - Xil_Out32(0xFD40593C, 0xF3); - Xil_Out32(0xFD405914, 0xF3); - Xil_Out32(0xFD405940, 0xF3); - } - if (lane2_protocol == 2 || lane2_protocol == 1) { - Xil_Out32(0xFD409910, 0xF3); - Xil_Out32(0xFD40993C, 0xF3); - Xil_Out32(0xFD409914, 0xF3); - Xil_Out32(0xFD409940, 0xF3); - } - if (lane3_protocol == 2 || lane3_protocol == 1) { - Xil_Out32(0xFD40D910, 0xF3); - Xil_Out32(0xFD40D93C, 0xF3); - Xil_Out32(0xFD40D914, 0xF3); - Xil_Out32(0xFD40D940, 0xF3); - } + return 1; +} - if (sata_gen2 == 1) { - if (lane0_protocol == 2) { - temp_pll_fbdiv_frac_3_msb_offset = Xil_In32(0xFD402360); - Xil_Out32(0xFD402360, 0x0); - temp_PLL_REF_SEL_OFFSET = Xil_In32(0xFD410000); - psu_mask_write(0xFD410000, 0x0000001FU, 0x0000000DU); - temp_TM_IQ_ILL1 = Xil_In32(0xFD4018F8); - temp_TM_E_ILL1 = Xil_In32(0xFD401924); - Xil_Out32(0xFD4018F8, 0x78); - temp_tx_dig_tm_61 = Xil_In32(0xFD4000F4); - temp_tm_dig_6 = Xil_In32(0xFD40106C); - psu_mask_write(0xFD4000F4, 0x0000000BU, 0x00000000U); - psu_mask_write(0xFD40106C, 0x0000000FU, 0x00000000U); - temp_ill12 = Xil_In32(0xFD401990) & 0xF0; +static unsigned long psu_peripherals_init_data(void) +{ + psu_mask_write(0xFD1A0100, 0x00008046U, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x001A0000U, 0x00000000U); + psu_mask_write(0xFF5E023C, 0x0093C018U, 0x00000000U); + psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x00000001U, 0x00000000U); + psu_mask_write(0xFF180390, 0x00000004U, 0x00000004U); + psu_mask_write(0xFF5E023C, 0x00000400U, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x00000040U, 0x00000000U); + psu_mask_write(0xFF180310, 0x00008000U, 0x00000000U); + psu_mask_write(0xFF180320, 0x33840000U, 0x02840000U); + psu_mask_write(0xFF18031C, 0x7FFE0000U, 0x64500000U); + psu_mask_write(0xFF180358, 0x00000008U, 0x00000008U); + psu_mask_write(0xFF180324, 0x03C00000U, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x00000600U, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x00008000U, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x00007800U, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x00000002U, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x00040000U, 0x00000000U); + psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U); + psu_mask_write(0xFD5C0060, 0x000F000FU, 0x00000000U); + psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U); + psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x05F5DD18U); + psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U); + psu_mask_write(0xFF5E0250, 0x00000F0FU, 0x00000202U); + + mask_delay(1); + psu_mask_write(0xFF5E0250, 0x00000F0FU, 0x00000002U); + + mask_delay(5); + psu_mask_write(0xFF5E0250, 0x00000F0FU, 0x00000202U); + + return 1; +} + +static unsigned long psu_serdes_init_data(void) +{ + psu_mask_write(0xFD410008, 0x0000001FU, 0x00000008U); + psu_mask_write(0xFD41000C, 0x0000001FU, 0x0000000FU); + psu_mask_write(0xFD402868, 0x00000080U, 0x00000080U); + psu_mask_write(0xFD40286C, 0x00000080U, 0x00000080U); + psu_mask_write(0xFD40A094, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD40A368, 0x000000FFU, 0x00000038U); + psu_mask_write(0xFD40A36C, 0x00000007U, 0x00000003U); + psu_mask_write(0xFD40E368, 0x000000FFU, 0x000000E0U); + psu_mask_write(0xFD40E36C, 0x00000007U, 0x00000003U); + psu_mask_write(0xFD40A370, 0x000000FFU, 0x000000F4U); + psu_mask_write(0xFD40A374, 0x000000FFU, 0x00000031U); + psu_mask_write(0xFD40A378, 0x000000FFU, 0x00000002U); + psu_mask_write(0xFD40A37C, 0x00000033U, 0x00000030U); + psu_mask_write(0xFD40E370, 0x000000FFU, 0x000000C9U); + psu_mask_write(0xFD40E374, 0x000000FFU, 0x000000D2U); + psu_mask_write(0xFD40E378, 0x000000FFU, 0x00000001U); + psu_mask_write(0xFD40E37C, 0x000000B3U, 0x000000B0U); + psu_mask_write(0xFD40906C, 0x00000003U, 0x00000003U); + psu_mask_write(0xFD4080F4, 0x00000003U, 0x00000003U); + psu_mask_write(0xFD40E360, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD40D06C, 0x0000000FU, 0x0000000FU); + psu_mask_write(0xFD40C0F4, 0x0000000BU, 0x0000000BU); + psu_mask_write(0xFD4090CC, 0x00000020U, 0x00000020U); + psu_mask_write(0xFD401074, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD405074, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD409074, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD40D074, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD401994, 0x00000007U, 0x00000007U); + psu_mask_write(0xFD405994, 0x00000007U, 0x00000007U); + psu_mask_write(0xFD40989C, 0x00000080U, 0x00000080U); + psu_mask_write(0xFD4098F8, 0x000000FFU, 0x0000001AU); + psu_mask_write(0xFD4098FC, 0x000000FFU, 0x0000001AU); + psu_mask_write(0xFD409990, 0x000000FFU, 0x00000010U); + psu_mask_write(0xFD409924, 0x000000FFU, 0x000000FEU); + psu_mask_write(0xFD409928, 0x000000FFU, 0x00000000U); + psu_mask_write(0xFD409900, 0x000000FFU, 0x0000001AU); + psu_mask_write(0xFD40992C, 0x000000FFU, 0x00000000U); + psu_mask_write(0xFD409980, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFD409914, 0x000000FFU, 0x000000F7U); + psu_mask_write(0xFD409918, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD409940, 0x000000FFU, 0x000000F7U); + psu_mask_write(0xFD409944, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD409994, 0x00000007U, 0x00000007U); + psu_mask_write(0xFD40D89C, 0x00000080U, 0x00000080U); + psu_mask_write(0xFD40D8F8, 0x000000FFU, 0x0000007DU); + psu_mask_write(0xFD40D8FC, 0x000000FFU, 0x0000007DU); + psu_mask_write(0xFD40D990, 0x000000FFU, 0x00000001U); + psu_mask_write(0xFD40D924, 0x000000FFU, 0x0000009CU); + psu_mask_write(0xFD40D928, 0x000000FFU, 0x00000039U); + psu_mask_write(0xFD40D98C, 0x000000F0U, 0x00000020U); + psu_mask_write(0xFD40D900, 0x000000FFU, 0x0000007DU); + psu_mask_write(0xFD40D92C, 0x000000FFU, 0x00000064U); + psu_mask_write(0xFD40D980, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFD40D914, 0x000000FFU, 0x000000F7U); + psu_mask_write(0xFD40D918, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD40D940, 0x000000FFU, 0x000000F7U); + psu_mask_write(0xFD40D944, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD40D994, 0x00000007U, 0x00000007U); + psu_mask_write(0xFD40107C, 0x0000000FU, 0x00000001U); + psu_mask_write(0xFD40507C, 0x0000000FU, 0x00000001U); + psu_mask_write(0xFD40907C, 0x0000000FU, 0x00000001U); + psu_mask_write(0xFD40D07C, 0x0000000FU, 0x00000001U); + psu_mask_write(0xFD4019A4, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFD401038, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD40102C, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD4059A4, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFD405038, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD40502C, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD4099A4, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFD409038, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD40902C, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD40D9A4, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFD40D038, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD40D02C, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD4019AC, 0x00000003U, 0x00000000U); + psu_mask_write(0xFD4059AC, 0x00000003U, 0x00000000U); + psu_mask_write(0xFD4099AC, 0x00000003U, 0x00000000U); + psu_mask_write(0xFD40D9AC, 0x00000003U, 0x00000000U); + psu_mask_write(0xFD401978, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD405978, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD409978, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD40D978, 0x00000010U, 0x00000010U); + + serdes_illcalib(2, 3, 3, 0, 0, 0, 0, 0); + psu_mask_write(0xFD410014, 0x00000077U, 0x00000023U); + psu_mask_write(0xFD40C1D8, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD40DC14, 0x000000FFU, 0x000000E6U); + psu_mask_write(0xFD40DC40, 0x0000001FU, 0x0000000CU); + psu_mask_write(0xFD40D94C, 0x00000020U, 0x00000020U); + psu_mask_write(0xFD40D950, 0x00000007U, 0x00000006U); + psu_mask_write(0xFD40C048, 0x000000FFU, 0x00000001U); + + return 1; +} + +static unsigned long psu_resetout_init_data(void) +{ + psu_mask_write(0xFF5E023C, 0x00000400U, 0x00000000U); + psu_mask_write(0xFF9D0080, 0x00000001U, 0x00000001U); + psu_mask_write(0xFF9D007C, 0x00000001U, 0x00000000U); + psu_mask_write(0xFF5E023C, 0x00000140U, 0x00000000U); + psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U); + psu_mask_write(0xFD3D0100, 0x00000003U, 0x00000003U); + psu_mask_write(0xFD1A0100, 0x00000002U, 0x00000000U); + psu_mask_write(0xFE20C200, 0x00023FFFU, 0x00022457U); + psu_mask_write(0xFE20C630, 0x003FFF00U, 0x00000000U); + psu_mask_write(0xFE20C11C, 0x00000600U, 0x00000600U); + psu_mask_write(0xFE20C12C, 0x00004000U, 0x00004000U); + psu_mask_write(0xFD480064, 0x00000200U, 0x00000200U); + mask_poll(0xFD40A3E4, 0x00000010U); + mask_poll(0xFD40E3E4, 0x00000010U); + psu_mask_write(0xFD0C00AC, 0xFFFFFFFFU, 0x28184018U); + psu_mask_write(0xFD0C00B0, 0xFFFFFFFFU, 0x0E081406U); + psu_mask_write(0xFD0C00B4, 0xFFFFFFFFU, 0x064A0813U); + psu_mask_write(0xFD0C00B8, 0xFFFFFFFFU, 0x3FFC96A4U); - serdes_illcalib_pcie_gen1(0, 0, 0, 0, 0, 0, 1, 0, 0); + return 1; +} - Xil_Out32(0xFD402360, temp_pll_fbdiv_frac_3_msb_offset); - Xil_Out32(0xFD41000C, temp_PLL_REF_SEL_OFFSET); - Xil_Out32(0xFD4018F8, temp_TM_IQ_ILL1); - Xil_Out32(0xFD4000F4, temp_tx_dig_tm_61); - Xil_Out32(0xFD40106C, temp_tm_dig_6); - Xil_Out32(0xFD401928, Xil_In32(0xFD401924)); - temp_ill12 = - temp_ill12 | (Xil_In32(0xFD401990) >> 4 & 0xF); - Xil_Out32(0xFD401990, temp_ill12); - Xil_Out32(0xFD401924, temp_TM_E_ILL1); - } - if (lane1_protocol == 2) { - temp_pll_fbdiv_frac_3_msb_offset = Xil_In32(0xFD406360); - Xil_Out32(0xFD406360, 0x0); - temp_PLL_REF_SEL_OFFSET = Xil_In32(0xFD410004); - psu_mask_write(0xFD410004, 0x0000001FU, 0x0000000DU); - temp_TM_IQ_ILL1 = Xil_In32(0xFD4058F8); - temp_TM_E_ILL1 = Xil_In32(0xFD405924); - Xil_Out32(0xFD4058F8, 0x78); - temp_tx_dig_tm_61 = Xil_In32(0xFD4040F4); - temp_tm_dig_6 = Xil_In32(0xFD40506C); - psu_mask_write(0xFD4040F4, 0x0000000BU, 0x00000000U); - psu_mask_write(0xFD40506C, 0x0000000FU, 0x00000000U); - temp_ill12 = Xil_In32(0xFD405990) & 0xF0; +static unsigned long psu_resetin_init_data(void) +{ + psu_mask_write(0xFF5E023C, 0x00000540U, 0x00000540U); + psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000008U); + psu_mask_write(0xFD1A0100, 0x00000002U, 0x00000002U); - serdes_illcalib_pcie_gen1(0, 0, 0, 0, 1, 0, 0, 0, 0); + return 1; +} - Xil_Out32(0xFD406360, temp_pll_fbdiv_frac_3_msb_offset); - Xil_Out32(0xFD41000C, temp_PLL_REF_SEL_OFFSET); - Xil_Out32(0xFD4058F8, temp_TM_IQ_ILL1); - Xil_Out32(0xFD4040F4, temp_tx_dig_tm_61); - Xil_Out32(0xFD40506C, temp_tm_dig_6); - Xil_Out32(0xFD405928, Xil_In32(0xFD405924)); - temp_ill12 = - temp_ill12 | (Xil_In32(0xFD405990) >> 4 & 0xF); - Xil_Out32(0xFD405990, temp_ill12); - Xil_Out32(0xFD405924, temp_TM_E_ILL1); - } - if (lane2_protocol == 2) { - temp_pll_fbdiv_frac_3_msb_offset = Xil_In32(0xFD40A360); - Xil_Out32(0xFD40A360, 0x0); - temp_PLL_REF_SEL_OFFSET = Xil_In32(0xFD410008); - psu_mask_write(0xFD410008, 0x0000001FU, 0x0000000DU); - temp_TM_IQ_ILL1 = Xil_In32(0xFD4098F8); - temp_TM_E_ILL1 = Xil_In32(0xFD409924); - Xil_Out32(0xFD4098F8, 0x78); - temp_tx_dig_tm_61 = Xil_In32(0xFD4080F4); - temp_tm_dig_6 = Xil_In32(0xFD40906C); - psu_mask_write(0xFD4080F4, 0x0000000BU, 0x00000000U); - psu_mask_write(0xFD40906C, 0x0000000FU, 0x00000000U); - temp_ill12 = Xil_In32(0xFD409990) & 0xF0; +static unsigned long psu_afi_config(void) +{ + psu_mask_write(0xFD1A0100, 0x00001F80U, 0x00000000U); + psu_mask_write(0xFF5E023C, 0x00080000U, 0x00000000U); + psu_mask_write(0xFD615000, 0x00000300U, 0x00000200U); + psu_mask_write(0xFD360000, 0x00000003U, 0x00000002U); + psu_mask_write(0xFD370000, 0x00000003U, 0x00000002U); + psu_mask_write(0xFD360014, 0x00000003U, 0x00000002U); + psu_mask_write(0xFD370014, 0x00000003U, 0x00000002U); - serdes_illcalib_pcie_gen1(0, 0, 1, 0, 0, 0, 0, 0, 0); + return 1; +} - Xil_Out32(0xFD40A360, temp_pll_fbdiv_frac_3_msb_offset); - Xil_Out32(0xFD41000C, temp_PLL_REF_SEL_OFFSET); - Xil_Out32(0xFD4098F8, temp_TM_IQ_ILL1); - Xil_Out32(0xFD4080F4, temp_tx_dig_tm_61); - Xil_Out32(0xFD40906C, temp_tm_dig_6); - Xil_Out32(0xFD409928, Xil_In32(0xFD409924)); - temp_ill12 = - temp_ill12 | (Xil_In32(0xFD409990) >> 4 & 0xF); - Xil_Out32(0xFD409990, temp_ill12); - Xil_Out32(0xFD409924, temp_TM_E_ILL1); - } - if (lane3_protocol == 2) { - temp_pll_fbdiv_frac_3_msb_offset = Xil_In32(0xFD40E360); - Xil_Out32(0xFD40E360, 0x0); - temp_PLL_REF_SEL_OFFSET = Xil_In32(0xFD41000C); - psu_mask_write(0xFD41000C, 0x0000001FU, 0x0000000DU); - temp_TM_IQ_ILL1 = Xil_In32(0xFD40D8F8); - temp_TM_E_ILL1 = Xil_In32(0xFD40D924); - Xil_Out32(0xFD40D8F8, 0x78); - temp_tx_dig_tm_61 = Xil_In32(0xFD40C0F4); - temp_tm_dig_6 = Xil_In32(0xFD40D06C); - psu_mask_write(0xFD40C0F4, 0x0000000BU, 0x00000000U); - psu_mask_write(0xFD40D06C, 0x0000000FU, 0x00000000U); - temp_ill12 = Xil_In32(0xFD40D990) & 0xF0; +static unsigned long psu_ddr_phybringup_data(void) +{ + unsigned int regval = 0; + unsigned int pll_retry = 10; + unsigned int pll_locked = 0; + int cur_R006_tREFPRD; - serdes_illcalib_pcie_gen1(1, 0, 0, 0, 0, 0, 0, 0, 0); + while ((pll_retry > 0) && (!pll_locked)) { + Xil_Out32(0xFD080004, 0x00040010); + Xil_Out32(0xFD080004, 0x00040011); - Xil_Out32(0xFD40E360, temp_pll_fbdiv_frac_3_msb_offset); - Xil_Out32(0xFD41000C, temp_PLL_REF_SEL_OFFSET); - Xil_Out32(0xFD40D8F8, temp_TM_IQ_ILL1); - Xil_Out32(0xFD40C0F4, temp_tx_dig_tm_61); - Xil_Out32(0xFD40D06C, temp_tm_dig_6); - Xil_Out32(0xFD40D928, Xil_In32(0xFD40D924)); - temp_ill12 = - temp_ill12 | (Xil_In32(0xFD40D990) >> 4 & 0xF); - Xil_Out32(0xFD40D990, temp_ill12); - Xil_Out32(0xFD40D924, temp_TM_E_ILL1); - } - rdata = Xil_In32(0xFD410098); - rdata = (rdata & 0xDF); - Xil_Out32(0xFD410098, rdata); + while ((Xil_In32(0xFD080030) & 0x1) != 1) + ; + pll_locked = (Xil_In32(0xFD080030) & 0x80000000) + >> 31; + pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000) + >> 16; + pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000) >> 16; + pll_locked &= (Xil_In32(0xFD080BE0) & 0x10000) + >> 16; + pll_locked &= (Xil_In32(0xFD080DE0) & 0x10000) + >> 16; + pll_retry--; } + Xil_Out32(0xFD0800C4, Xil_In32(0xFD0800C4) | (pll_retry << 16)); + if (!pll_locked) + return 0; - if (lane0_protocol == 2 && lane0_rate == 3) { - psu_mask_write(0xFD40198C, 0x000000F0U, 0x00000020U); - psu_mask_write(0xFD40192C, 0x000000FFU, 0x00000094U); - } - if (lane1_protocol == 2 && lane1_rate == 3) { - psu_mask_write(0xFD40598C, 0x000000F0U, 0x00000020U); - psu_mask_write(0xFD40592C, 0x000000FFU, 0x00000094U); - } - if (lane2_protocol == 2 && lane2_rate == 3) { - psu_mask_write(0xFD40998C, 0x000000F0U, 0x00000020U); - psu_mask_write(0xFD40992C, 0x000000FFU, 0x00000094U); - } - if (lane3_protocol == 2 && lane3_rate == 3) { - psu_mask_write(0xFD40D98C, 0x000000F0U, 0x00000020U); - psu_mask_write(0xFD40D92C, 0x000000FFU, 0x00000094U); - } + Xil_Out32(0xFD080004U, 0x00040063U); - if (lane0_protocol == 1) { - if (lane0_rate == 0) { - serdes_illcalib_pcie_gen1(lane3_protocol, lane3_rate, - lane2_protocol, lane2_rate, - lane1_protocol, lane1_rate, - lane0_protocol, 0, 0); - } else { - serdes_illcalib_pcie_gen1(lane3_protocol, lane3_rate, - lane2_protocol, lane2_rate, - lane1_protocol, lane1_rate, - lane0_protocol, 0, 0); - serdes_illcalib_pcie_gen1(lane3_protocol, lane3_rate, - lane2_protocol, lane2_rate, - lane1_protocol, lane1_rate, - lane0_protocol, lane0_rate, - 1); - } - } + while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU) + ; + prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U); - if (lane0_protocol == 3) - Xil_Out32(0xFD401914, 0xF3); - if (lane0_protocol == 3) - Xil_Out32(0xFD401940, 0xF3); - if (lane0_protocol == 3) - Xil_Out32(0xFD401990, 0x20); - if (lane0_protocol == 3) - Xil_Out32(0xFD401924, 0x37); + while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU) + ; + Xil_Out32(0xFD0701B0U, 0x00000001U); + Xil_Out32(0xFD070320U, 0x00000001U); + while ((Xil_In32(0xFD070004U) & 0x0000000FU) != 0x00000001U) + ; + prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U); + Xil_Out32(0xFD080004, 0x0004FE01); + regval = Xil_In32(0xFD080030); + while (regval != 0x80000FFF) + regval = Xil_In32(0xFD080030); + regval = ((Xil_In32(0xFD080030) & 0x1FFF0000) >> 18); + if (regval != 0) + return 0; - if (lane1_protocol == 3) - Xil_Out32(0xFD405914, 0xF3); - if (lane1_protocol == 3) - Xil_Out32(0xFD405940, 0xF3); - if (lane1_protocol == 3) - Xil_Out32(0xFD405990, 0x20); - if (lane1_protocol == 3) - Xil_Out32(0xFD405924, 0x37); + Xil_Out32(0xFD080200U, 0x100091C7U); - if (lane2_protocol == 3) - Xil_Out32(0xFD409914, 0xF3); - if (lane2_protocol == 3) - Xil_Out32(0xFD409940, 0xF3); - if (lane2_protocol == 3) - Xil_Out32(0xFD409990, 0x20); - if (lane2_protocol == 3) - Xil_Out32(0xFD409924, 0x37); + cur_R006_tREFPRD = (Xil_In32(0xFD080018U) & 0x0003FFFFU) >> 0x00000000U; + prog_reg(0xFD080018, 0x3FFFF, 0x0, cur_R006_tREFPRD); - if (lane3_protocol == 3) - Xil_Out32(0xFD40D914, 0xF3); - if (lane3_protocol == 3) - Xil_Out32(0xFD40D940, 0xF3); - if (lane3_protocol == 3) - Xil_Out32(0xFD40D990, 0x20); - if (lane3_protocol == 3) - Xil_Out32(0xFD40D924, 0x37); + prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000003U); + prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000003U); + prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000003U); + prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000003U); + prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000003U); + prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000003U); + + Xil_Out32(0xFD080004, 0x00060001); + regval = Xil_In32(0xFD080030); + while ((regval & 0x80004001) != 0x80004001) + regval = Xil_In32(0xFD080030); + + regval = ((Xil_In32(0xFD080030) & 0x1FFF0000) >> 18); + if (regval != 0) + return 0; + + prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000000U); + prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000000U); + prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000000U); + prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000000U); + prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000000U); + prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000000U); + + Xil_Out32(0xFD080200U, 0x800091C7U); + prog_reg(0xFD080018, 0x3FFFF, 0x0, cur_R006_tREFPRD); + + Xil_Out32(0xFD080004, 0x0000C001); + regval = Xil_In32(0xFD080030); + while ((regval & 0x80000C01) != 0x80000C01) + regval = Xil_In32(0xFD080030); + + Xil_Out32(0xFD070180U, 0x01000040U); + Xil_Out32(0xFD070060U, 0x00000000U); + prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000000U); return 1; } diff --git a/board/xilinx/zynqmp/zynqmp-zcu216-revA/psu_init_gpl.c b/board/xilinx/zynqmp/zynqmp-zcu216-revA/psu_init_gpl.c index bd316872eb3..5d47cd1abc0 100644 --- a/board/xilinx/zynqmp/zynqmp-zcu216-revA/psu_init_gpl.c +++ b/board/xilinx/zynqmp/zynqmp-zcu216-revA/psu_init_gpl.c @@ -6,1692 +6,1687 @@ #include #include -static int serdes_illcalib(u32 lane3_protocol, u32 lane3_rate, - u32 lane2_protocol, u32 lane2_rate, - u32 lane1_protocol, u32 lane1_rate, - u32 lane0_protocol, u32 lane0_rate); - -static unsigned long psu_pll_init_data(void) +static int serdes_rst_seq(u32 lane3_protocol, u32 lane3_rate, + u32 lane2_protocol, u32 lane2_rate, + u32 lane1_protocol, u32 lane1_rate, + u32 lane0_protocol, u32 lane0_rate) { - psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4B0C82U); - psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00015A00U); - psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000008U); - psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000001U); - psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000000U); - mask_poll(0xFF5E0040, 0x00000002U); - psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000000U); - psu_mask_write(0xFF5E0048, 0x00003F00U, 0x00000300U); - psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01012300U); - psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E4B0C82U); - psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00015A00U); - psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000008U); - psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000001U); - psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000000U); - mask_poll(0xFF5E0040, 0x00000001U); - psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000000U); - psu_mask_write(0xFF5E0044, 0x00003F00U, 0x00000300U); - psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U); - psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014800U); - psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000008U); - psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000000U); - mask_poll(0xFD1A0044, 0x00000001U); - psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000000U); - psu_mask_write(0xFD1A0048, 0x00003F00U, 0x00000300U); - psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U); - psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00013F00U); - psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000008U); - psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000000U); - mask_poll(0xFD1A0044, 0x00000002U); - psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000000U); - psu_mask_write(0xFD1A004C, 0x00003F00U, 0x00000200U); - psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E4B0C82U); - psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00015A00U); - psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000008U); - psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000000U); - mask_poll(0xFD1A0044, 0x00000004U); - psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000000U); - psu_mask_write(0xFD1A0050, 0x00003F00U, 0x00000300U); + Xil_Out32(0xFD410098, 0x00000000); + Xil_Out32(0xFD401010, 0x00000040); + Xil_Out32(0xFD405010, 0x00000040); + Xil_Out32(0xFD409010, 0x00000040); + Xil_Out32(0xFD40D010, 0x00000040); + Xil_Out32(0xFD402084, 0x00000080); + Xil_Out32(0xFD406084, 0x00000080); + Xil_Out32(0xFD40A084, 0x00000080); + Xil_Out32(0xFD40E084, 0x00000080); + Xil_Out32(0xFD410098, 0x00000004); + mask_delay(50); + if (lane0_rate == 1) + Xil_Out32(0xFD410098, 0x0000000E); + Xil_Out32(0xFD410098, 0x00000006); + if (lane0_rate == 1) { + Xil_Out32(0xFD40000C, 0x00000004); + Xil_Out32(0xFD40400C, 0x00000004); + Xil_Out32(0xFD40800C, 0x00000004); + Xil_Out32(0xFD40C00C, 0x00000004); + Xil_Out32(0xFD410098, 0x00000007); + mask_delay(400); + Xil_Out32(0xFD40000C, 0x0000000C); + Xil_Out32(0xFD40400C, 0x0000000C); + Xil_Out32(0xFD40800C, 0x0000000C); + Xil_Out32(0xFD40C00C, 0x0000000C); + mask_delay(15); + Xil_Out32(0xFD410098, 0x0000000F); + mask_delay(100); + } + if (lane0_protocol != 0) + mask_poll(0xFD4023E4, 0x00000010U); + if (lane1_protocol != 0) + mask_poll(0xFD4063E4, 0x00000010U); + if (lane2_protocol != 0) + mask_poll(0xFD40A3E4, 0x00000010U); + if (lane3_protocol != 0) + mask_poll(0xFD40E3E4, 0x00000010U); + mask_delay(50); + Xil_Out32(0xFD401010, 0x000000C0); + Xil_Out32(0xFD405010, 0x000000C0); + Xil_Out32(0xFD409010, 0x000000C0); + Xil_Out32(0xFD40D010, 0x000000C0); + Xil_Out32(0xFD401010, 0x00000080); + Xil_Out32(0xFD405010, 0x00000080); + Xil_Out32(0xFD409010, 0x00000080); + Xil_Out32(0xFD40D010, 0x00000080); + Xil_Out32(0xFD402084, 0x000000C0); + Xil_Out32(0xFD406084, 0x000000C0); + Xil_Out32(0xFD40A084, 0x000000C0); + Xil_Out32(0xFD40E084, 0x000000C0); + mask_delay(50); + Xil_Out32(0xFD402084, 0x00000080); + Xil_Out32(0xFD406084, 0x00000080); + Xil_Out32(0xFD40A084, 0x00000080); + Xil_Out32(0xFD40E084, 0x00000080); + mask_delay(50); + Xil_Out32(0xFD401010, 0x00000000); + Xil_Out32(0xFD405010, 0x00000000); + Xil_Out32(0xFD409010, 0x00000000); + Xil_Out32(0xFD40D010, 0x00000000); + Xil_Out32(0xFD402084, 0x00000000); + Xil_Out32(0xFD406084, 0x00000000); + Xil_Out32(0xFD40A084, 0x00000000); + Xil_Out32(0xFD40E084, 0x00000000); + mask_delay(500); return 1; } -static unsigned long psu_clock_init_data(void) +static int serdes_bist_static_settings(u32 lane_active) { - psu_mask_write(0xFF5E005C, 0x063F3F07U, 0x06010C00U); - psu_mask_write(0xFF5E0100, 0x013F3F07U, 0x01010600U); - psu_mask_write(0xFF5E0060, 0x023F3F07U, 0x02010600U); - psu_mask_write(0xFF5E004C, 0x023F3F07U, 0x02031900U); - psu_mask_write(0xFF5E0068, 0x013F3F07U, 0x01010C00U); - psu_mask_write(0xFF5E0070, 0x013F3F07U, 0x01010800U); - psu_mask_write(0xFF18030C, 0x00020000U, 0x00000000U); - psu_mask_write(0xFF5E0074, 0x013F3F07U, 0x01010F00U); - psu_mask_write(0xFF5E0120, 0x013F3F07U, 0x01010F00U); - psu_mask_write(0xFF5E0124, 0x013F3F07U, 0x01010F00U); - psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000302U); - psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000602U); - psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000800U); - psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U); - psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U); - psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U); - psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U); - psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010F00U); - psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011E02U); - psu_mask_write(0xFF5E0104, 0x00000007U, 0x00000000U); - psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000F00U); - psu_mask_write(0xFD1A00A0, 0x01003F07U, 0x01000200U); - psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U); - psu_mask_write(0xFD1A0068, 0x01003F07U, 0x01000200U); - psu_mask_write(0xFD1A0080, 0x00003F07U, 0x00000200U); - psu_mask_write(0xFD1A00B8, 0x01003F07U, 0x01000200U); - psu_mask_write(0xFD1A00BC, 0x01003F07U, 0x01000200U); - psu_mask_write(0xFD1A00C0, 0x01003F07U, 0x01000203U); - psu_mask_write(0xFD1A00C4, 0x01003F07U, 0x01000502U); - psu_mask_write(0xFD1A00F8, 0x00003F07U, 0x00000200U); - psu_mask_write(0xFF180380, 0x000000FFU, 0x00000000U); - psu_mask_write(0xFD610100, 0x00000001U, 0x00000000U); - psu_mask_write(0xFF180300, 0x00000001U, 0x00000000U); - psu_mask_write(0xFF410050, 0x00000001U, 0x00000000U); + if (lane_active == 0) { + Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) & 0xFFFFFF1F)); + Xil_Out32(0xFD403068, 0x1); + Xil_Out32(0xFD40306C, 0x1); + Xil_Out32(0xFD4010AC, 0x0020); + Xil_Out32(0xFD403008, 0x0); + Xil_Out32(0xFD40300C, 0xF4); + Xil_Out32(0xFD403010, 0x0); + Xil_Out32(0xFD403014, 0x0); + Xil_Out32(0xFD403018, 0x00); + Xil_Out32(0xFD40301C, 0xFB); + Xil_Out32(0xFD403020, 0xFF); + Xil_Out32(0xFD403024, 0x0); + Xil_Out32(0xFD403028, 0x00); + Xil_Out32(0xFD40302C, 0x00); + Xil_Out32(0xFD403030, 0x4A); + Xil_Out32(0xFD403034, 0x4A); + Xil_Out32(0xFD403038, 0x4A); + Xil_Out32(0xFD40303C, 0x4A); + Xil_Out32(0xFD403040, 0x0); + Xil_Out32(0xFD403044, 0x14); + Xil_Out32(0xFD403048, 0x02); + Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) & 0xFFFFFF1F)); + } + if (lane_active == 1) { + Xil_Out32(0xFD407004, (Xil_In32(0xFD407004) & 0xFFFFFF1F)); + Xil_Out32(0xFD407068, 0x1); + Xil_Out32(0xFD40706C, 0x1); + Xil_Out32(0xFD4050AC, 0x0020); + Xil_Out32(0xFD407008, 0x0); + Xil_Out32(0xFD40700C, 0xF4); + Xil_Out32(0xFD407010, 0x0); + Xil_Out32(0xFD407014, 0x0); + Xil_Out32(0xFD407018, 0x00); + Xil_Out32(0xFD40701C, 0xFB); + Xil_Out32(0xFD407020, 0xFF); + Xil_Out32(0xFD407024, 0x0); + Xil_Out32(0xFD407028, 0x00); + Xil_Out32(0xFD40702C, 0x00); + Xil_Out32(0xFD407030, 0x4A); + Xil_Out32(0xFD407034, 0x4A); + Xil_Out32(0xFD407038, 0x4A); + Xil_Out32(0xFD40703C, 0x4A); + Xil_Out32(0xFD407040, 0x0); + Xil_Out32(0xFD407044, 0x14); + Xil_Out32(0xFD407048, 0x02); + Xil_Out32(0xFD407004, (Xil_In32(0xFD407004) & 0xFFFFFF1F)); + } + + if (lane_active == 2) { + Xil_Out32(0xFD40B004, (Xil_In32(0xFD40B004) & 0xFFFFFF1F)); + Xil_Out32(0xFD40B068, 0x1); + Xil_Out32(0xFD40B06C, 0x1); + Xil_Out32(0xFD4090AC, 0x0020); + Xil_Out32(0xFD40B008, 0x0); + Xil_Out32(0xFD40B00C, 0xF4); + Xil_Out32(0xFD40B010, 0x0); + Xil_Out32(0xFD40B014, 0x0); + Xil_Out32(0xFD40B018, 0x00); + Xil_Out32(0xFD40B01C, 0xFB); + Xil_Out32(0xFD40B020, 0xFF); + Xil_Out32(0xFD40B024, 0x0); + Xil_Out32(0xFD40B028, 0x00); + Xil_Out32(0xFD40B02C, 0x00); + Xil_Out32(0xFD40B030, 0x4A); + Xil_Out32(0xFD40B034, 0x4A); + Xil_Out32(0xFD40B038, 0x4A); + Xil_Out32(0xFD40B03C, 0x4A); + Xil_Out32(0xFD40B040, 0x0); + Xil_Out32(0xFD40B044, 0x14); + Xil_Out32(0xFD40B048, 0x02); + Xil_Out32(0xFD40B004, (Xil_In32(0xFD40B004) & 0xFFFFFF1F)); + } + if (lane_active == 3) { + Xil_Out32(0xFD40F004, (Xil_In32(0xFD40F004) & 0xFFFFFF1F)); + Xil_Out32(0xFD40F068, 0x1); + Xil_Out32(0xFD40F06C, 0x1); + Xil_Out32(0xFD40D0AC, 0x0020); + Xil_Out32(0xFD40F008, 0x0); + Xil_Out32(0xFD40F00C, 0xF4); + Xil_Out32(0xFD40F010, 0x0); + Xil_Out32(0xFD40F014, 0x0); + Xil_Out32(0xFD40F018, 0x00); + Xil_Out32(0xFD40F01C, 0xFB); + Xil_Out32(0xFD40F020, 0xFF); + Xil_Out32(0xFD40F024, 0x0); + Xil_Out32(0xFD40F028, 0x00); + Xil_Out32(0xFD40F02C, 0x00); + Xil_Out32(0xFD40F030, 0x4A); + Xil_Out32(0xFD40F034, 0x4A); + Xil_Out32(0xFD40F038, 0x4A); + Xil_Out32(0xFD40F03C, 0x4A); + Xil_Out32(0xFD40F040, 0x0); + Xil_Out32(0xFD40F044, 0x14); + Xil_Out32(0xFD40F048, 0x02); + Xil_Out32(0xFD40F004, (Xil_In32(0xFD40F004) & 0xFFFFFF1F)); + } return 1; } -static unsigned long psu_ddr_init_data(void) +static int serdes_bist_run(u32 lane_active) { - psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000008U); - psu_mask_write(0xFD070000, 0xE30FBE3DU, 0x81040010U); - psu_mask_write(0xFD070010, 0x8000F03FU, 0x00000030U); - psu_mask_write(0xFD070020, 0x000003F3U, 0x00000200U); - psu_mask_write(0xFD070024, 0xFFFFFFFFU, 0x00800000U); - psu_mask_write(0xFD070030, 0x0000007FU, 0x00000000U); - psu_mask_write(0xFD070034, 0x00FFFF1FU, 0x00408210U); - psu_mask_write(0xFD070050, 0x00F1F1F4U, 0x00210000U); - psu_mask_write(0xFD070054, 0x0FFF0FFFU, 0x00000000U); - psu_mask_write(0xFD070060, 0x00000073U, 0x00000001U); - psu_mask_write(0xFD070064, 0x0FFF83FFU, 0x007F80B8U); - psu_mask_write(0xFD070070, 0x00000017U, 0x00000010U); - psu_mask_write(0xFD070074, 0x00000003U, 0x00000000U); - psu_mask_write(0xFD0700C4, 0x3F000391U, 0x10000200U); - psu_mask_write(0xFD0700C8, 0x01FF1F3FU, 0x0040051FU); - psu_mask_write(0xFD0700D0, 0xC3FF0FFFU, 0x00020102U); - psu_mask_write(0xFD0700D4, 0x01FF7F0FU, 0x00020000U); - psu_mask_write(0xFD0700D8, 0x0000FF0FU, 0x00002205U); - psu_mask_write(0xFD0700DC, 0xFFFFFFFFU, 0x07300301U); - psu_mask_write(0xFD0700E0, 0xFFFFFFFFU, 0x00100200U); - psu_mask_write(0xFD0700E4, 0x00FF03FFU, 0x00210004U); - psu_mask_write(0xFD0700E8, 0xFFFFFFFFU, 0x000006C0U); - psu_mask_write(0xFD0700EC, 0xFFFF0000U, 0x08190000U); - psu_mask_write(0xFD0700F0, 0x0000003FU, 0x00000010U); - psu_mask_write(0xFD0700F4, 0x00000FFFU, 0x0000066FU); - psu_mask_write(0xFD070100, 0x7F3F7F3FU, 0x0F102311U); - psu_mask_write(0xFD070104, 0x001F1F7FU, 0x00040419U); - psu_mask_write(0xFD070108, 0x3F3F3F3FU, 0x0608070CU); - psu_mask_write(0xFD07010C, 0x3FF3F3FFU, 0x0050400CU); - psu_mask_write(0xFD070110, 0x1F0F0F1FU, 0x08030409U); - psu_mask_write(0xFD070114, 0x0F0F3F1FU, 0x06060403U); - psu_mask_write(0xFD070118, 0x0F0F000FU, 0x01010004U); - psu_mask_write(0xFD07011C, 0x00000F0FU, 0x00000606U); - psu_mask_write(0xFD070120, 0x7F7F7F7FU, 0x04040D07U); - psu_mask_write(0xFD070124, 0x40070F3FU, 0x00020309U); - psu_mask_write(0xFD07012C, 0x7F1F031FU, 0x1207010EU); - psu_mask_write(0xFD070130, 0x00030F1FU, 0x00020608U); - psu_mask_write(0xFD070180, 0xF7FF03FFU, 0x81000040U); - psu_mask_write(0xFD070184, 0x3FFFFFFFU, 0x0201908AU); - psu_mask_write(0xFD070190, 0x1FBFBF3FU, 0x048B8208U); - psu_mask_write(0xFD070194, 0xF31F0F0FU, 0x00030304U); - psu_mask_write(0xFD070198, 0x0FF1F1F1U, 0x07000101U); - psu_mask_write(0xFD07019C, 0x000000F1U, 0x00000021U); - psu_mask_write(0xFD0701A0, 0xC3FF03FFU, 0x00400003U); - psu_mask_write(0xFD0701A4, 0x00FF00FFU, 0x00C800FFU); - psu_mask_write(0xFD0701B0, 0x00000007U, 0x00000000U); - psu_mask_write(0xFD0701B4, 0x00003F3FU, 0x00000906U); - psu_mask_write(0xFD0701C0, 0x00000007U, 0x00000001U); - psu_mask_write(0xFD070200, 0x0000001FU, 0x0000001FU); - psu_mask_write(0xFD070204, 0x001F1F1FU, 0x001F0909U); - psu_mask_write(0xFD070208, 0x0F0F0F0FU, 0x01010100U); - psu_mask_write(0xFD07020C, 0x0F0F0F0FU, 0x01010101U); - psu_mask_write(0xFD070210, 0x00000F0FU, 0x00000F0FU); - psu_mask_write(0xFD070214, 0x0F0F0F0FU, 0x070F0707U); - psu_mask_write(0xFD070218, 0x8F0F0F0FU, 0x07070707U); - psu_mask_write(0xFD07021C, 0x00000F0FU, 0x00000F0FU); - psu_mask_write(0xFD070220, 0x00001F1FU, 0x00001F01U); - psu_mask_write(0xFD070224, 0x0F0F0F0FU, 0x07070707U); - psu_mask_write(0xFD070228, 0x0F0F0F0FU, 0x07070707U); - psu_mask_write(0xFD07022C, 0x0000000FU, 0x00000007U); - psu_mask_write(0xFD070240, 0x0F1F0F7CU, 0x0600060CU); - psu_mask_write(0xFD070244, 0x00003333U, 0x00000001U); - psu_mask_write(0xFD070250, 0x7FFF3F07U, 0x01002001U); - psu_mask_write(0xFD070264, 0xFF00FFFFU, 0x08000040U); - psu_mask_write(0xFD07026C, 0xFF00FFFFU, 0x08000040U); - psu_mask_write(0xFD070280, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD070284, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD070288, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD07028C, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD070290, 0x0000FFFFU, 0x00000000U); - psu_mask_write(0xFD070294, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD070300, 0x00000011U, 0x00000000U); - psu_mask_write(0xFD07030C, 0x80000033U, 0x00000000U); - psu_mask_write(0xFD070320, 0x00000001U, 0x00000000U); - psu_mask_write(0xFD070400, 0x00000111U, 0x00000001U); - psu_mask_write(0xFD070404, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD070408, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD070490, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD070494, 0x0033000FU, 0x0020000BU); - psu_mask_write(0xFD070498, 0x07FF07FFU, 0x00000000U); - psu_mask_write(0xFD0704B4, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD0704B8, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD070540, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD070544, 0x03330F0FU, 0x02000B03U); - psu_mask_write(0xFD070548, 0x07FF07FFU, 0x00000000U); - psu_mask_write(0xFD070564, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD070568, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD0705F0, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD0705F4, 0x03330F0FU, 0x02000B03U); - psu_mask_write(0xFD0705F8, 0x07FF07FFU, 0x00000000U); - psu_mask_write(0xFD070614, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD070618, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD0706A0, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD0706A4, 0x0033000FU, 0x00100003U); - psu_mask_write(0xFD0706A8, 0x07FF07FFU, 0x0000004FU); - psu_mask_write(0xFD0706AC, 0x0033000FU, 0x00100003U); - psu_mask_write(0xFD0706B0, 0x000007FFU, 0x0000004FU); - psu_mask_write(0xFD0706C4, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD0706C8, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD070750, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD070754, 0x0033000FU, 0x00100003U); - psu_mask_write(0xFD070758, 0x07FF07FFU, 0x0000004FU); - psu_mask_write(0xFD07075C, 0x0033000FU, 0x00100003U); - psu_mask_write(0xFD070760, 0x000007FFU, 0x0000004FU); - psu_mask_write(0xFD070774, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD070778, 0x000073FFU, 0x0000200FU); - psu_mask_write(0xFD070800, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD070804, 0x0033000FU, 0x00100003U); - psu_mask_write(0xFD070808, 0x07FF07FFU, 0x0000004FU); - psu_mask_write(0xFD07080C, 0x0033000FU, 0x00100003U); - psu_mask_write(0xFD070810, 0x000007FFU, 0x0000004FU); - psu_mask_write(0xFD070F04, 0x000001FFU, 0x00000000U); - psu_mask_write(0xFD070F08, 0x000000FFU, 0x00000000U); - psu_mask_write(0xFD070F0C, 0x000001FFU, 0x00000010U); - psu_mask_write(0xFD070F10, 0x000000FFU, 0x0000000FU); - psu_mask_write(0xFD072190, 0x1FBFBF3FU, 0x07828002U); - psu_mask_write(0xFD1A0108, 0x0000000CU, 0x00000000U); - psu_mask_write(0xFD080010, 0xFFFFFFFFU, 0x07001E00U); - psu_mask_write(0xFD080018, 0xFFFFFFFFU, 0x00F0FC00U); - psu_mask_write(0xFD08001C, 0xFFFFFFFFU, 0x55AA5480U); - psu_mask_write(0xFD080024, 0xFFFFFFFFU, 0x010100F4U); - psu_mask_write(0xFD080040, 0xFFFFFFFFU, 0x41A20D10U); - psu_mask_write(0xFD080044, 0xFFFFFFFFU, 0xCD141275U); - psu_mask_write(0xFD080068, 0xFFFFFFFFU, 0x01100000U); - psu_mask_write(0xFD080090, 0xFFFFFFFFU, 0x02A04161U); - psu_mask_write(0xFD0800C0, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD0800C4, 0xFFFFFFFFU, 0x000000E3U); - psu_mask_write(0xFD080100, 0xFFFFFFFFU, 0x0800040CU); - psu_mask_write(0xFD080110, 0xFFFFFFFFU, 0x07220F08U); - psu_mask_write(0xFD080114, 0xFFFFFFFFU, 0x28200008U); - psu_mask_write(0xFD080118, 0xFFFFFFFFU, 0x000F0300U); - psu_mask_write(0xFD08011C, 0xFFFFFFFFU, 0x83000800U); - psu_mask_write(0xFD080120, 0xFFFFFFFFU, 0x01702B07U); - psu_mask_write(0xFD080124, 0xFFFFFFFFU, 0x00310F08U); - psu_mask_write(0xFD080128, 0xFFFFFFFFU, 0x00000B0FU); - psu_mask_write(0xFD080140, 0xFFFFFFFFU, 0x08400020U); - psu_mask_write(0xFD080144, 0xFFFFFFFFU, 0x00000C80U); - psu_mask_write(0xFD080150, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080154, 0xFFFFFFFFU, 0x00000200U); - psu_mask_write(0xFD080180, 0xFFFFFFFFU, 0x00000630U); - psu_mask_write(0xFD080184, 0xFFFFFFFFU, 0x00000301U); - psu_mask_write(0xFD080188, 0xFFFFFFFFU, 0x00000010U); - psu_mask_write(0xFD08018C, 0xFFFFFFFFU, 0x00000200U); - psu_mask_write(0xFD080190, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080194, 0xFFFFFFFFU, 0x000006C0U); - psu_mask_write(0xFD080198, 0xFFFFFFFFU, 0x00000819U); - psu_mask_write(0xFD0801AC, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD0801B0, 0xFFFFFFFFU, 0x0000004DU); - psu_mask_write(0xFD0801B4, 0xFFFFFFFFU, 0x00000008U); - psu_mask_write(0xFD0801B8, 0xFFFFFFFFU, 0x0000004DU); - psu_mask_write(0xFD0801D8, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080200, 0xFFFFFFFFU, 0x800091C7U); - psu_mask_write(0xFD080204, 0xFFFFFFFFU, 0x00010236U); - psu_mask_write(0xFD080240, 0xFFFFFFFFU, 0x00141054U); - psu_mask_write(0xFD080250, 0xFFFFFFFFU, 0x00088000U); - psu_mask_write(0xFD080414, 0xFFFFFFFFU, 0x12341000U); - psu_mask_write(0xFD0804F4, 0xFFFFFFFFU, 0x00000005U); - psu_mask_write(0xFD080500, 0xFFFFFFFFU, 0x30000028U); - psu_mask_write(0xFD080508, 0xFFFFFFFFU, 0x0A000000U); - psu_mask_write(0xFD08050C, 0xFFFFFFFFU, 0x00000009U); - psu_mask_write(0xFD080510, 0xFFFFFFFFU, 0x0A000000U); - psu_mask_write(0xFD080520, 0xFFFFFFFFU, 0x0300B0CEU); - psu_mask_write(0xFD080528, 0xFFFFFFFFU, 0xF9032019U); - psu_mask_write(0xFD08052C, 0xFFFFFFFFU, 0x07F001E3U); - psu_mask_write(0xFD080544, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080548, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080558, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD08055C, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080560, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080564, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080680, 0xFFFFFFFFU, 0x008A8A58U); - psu_mask_write(0xFD080684, 0xFFFFFFFFU, 0x000079DDU); - psu_mask_write(0xFD080694, 0xFFFFFFFFU, 0x01E10210U); - psu_mask_write(0xFD080698, 0xFFFFFFFFU, 0x01E10000U); - psu_mask_write(0xFD0806A4, 0xFFFFFFFFU, 0x00087BDBU); - psu_mask_write(0xFD080700, 0xFFFFFFFFU, 0x40800604U); - psu_mask_write(0xFD080704, 0xFFFFFFFFU, 0x00007FFFU); - psu_mask_write(0xFD08070C, 0xFFFFFFFFU, 0x3F000008U); - psu_mask_write(0xFD080710, 0xFFFFFFFFU, 0x0E00B03CU); - psu_mask_write(0xFD080714, 0xFFFFFFFFU, 0x09095555U); - psu_mask_write(0xFD080718, 0xFFFFFFFFU, 0x09092B2BU); - psu_mask_write(0xFD080800, 0xFFFFFFFFU, 0x40800604U); - psu_mask_write(0xFD080804, 0xFFFFFFFFU, 0x00007FFFU); - psu_mask_write(0xFD08080C, 0xFFFFFFFFU, 0x3F000008U); - psu_mask_write(0xFD080810, 0xFFFFFFFFU, 0x0E00B03CU); - psu_mask_write(0xFD080814, 0xFFFFFFFFU, 0x09095555U); - psu_mask_write(0xFD080818, 0xFFFFFFFFU, 0x09092B2BU); - psu_mask_write(0xFD080900, 0xFFFFFFFFU, 0x40800604U); - psu_mask_write(0xFD080904, 0xFFFFFFFFU, 0x00007FFFU); - psu_mask_write(0xFD08090C, 0xFFFFFFFFU, 0x3F000008U); - psu_mask_write(0xFD080910, 0xFFFFFFFFU, 0x0E00B004U); - psu_mask_write(0xFD080914, 0xFFFFFFFFU, 0x09095555U); - psu_mask_write(0xFD080918, 0xFFFFFFFFU, 0x09092B2BU); - psu_mask_write(0xFD080A00, 0xFFFFFFFFU, 0x40800604U); - psu_mask_write(0xFD080A04, 0xFFFFFFFFU, 0x00007FFFU); - psu_mask_write(0xFD080A0C, 0xFFFFFFFFU, 0x3F000008U); - psu_mask_write(0xFD080A10, 0xFFFFFFFFU, 0x0E00B004U); - psu_mask_write(0xFD080A14, 0xFFFFFFFFU, 0x09095555U); - psu_mask_write(0xFD080A18, 0xFFFFFFFFU, 0x09092B2BU); - psu_mask_write(0xFD080B00, 0xFFFFFFFFU, 0x40800604U); - psu_mask_write(0xFD080B04, 0xFFFFFFFFU, 0x00007FFFU); - psu_mask_write(0xFD080B08, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080B0C, 0xFFFFFFFFU, 0x3F000008U); - psu_mask_write(0xFD080B10, 0xFFFFFFFFU, 0x0E00B004U); - psu_mask_write(0xFD080B14, 0xFFFFFFFFU, 0x09095555U); - psu_mask_write(0xFD080B18, 0xFFFFFFFFU, 0x09092B2BU); - psu_mask_write(0xFD080C00, 0xFFFFFFFFU, 0x40800604U); - psu_mask_write(0xFD080C04, 0xFFFFFFFFU, 0x00007FFFU); - psu_mask_write(0xFD080C08, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080C0C, 0xFFFFFFFFU, 0x3F000008U); - psu_mask_write(0xFD080C10, 0xFFFFFFFFU, 0x0E00B03CU); - psu_mask_write(0xFD080C14, 0xFFFFFFFFU, 0x09095555U); - psu_mask_write(0xFD080C18, 0xFFFFFFFFU, 0x09092B2BU); - psu_mask_write(0xFD080D00, 0xFFFFFFFFU, 0x40800604U); - psu_mask_write(0xFD080D04, 0xFFFFFFFFU, 0x00007FFFU); - psu_mask_write(0xFD080D08, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080D0C, 0xFFFFFFFFU, 0x3F000008U); - psu_mask_write(0xFD080D10, 0xFFFFFFFFU, 0x0E00B004U); - psu_mask_write(0xFD080D14, 0xFFFFFFFFU, 0x09095555U); - psu_mask_write(0xFD080D18, 0xFFFFFFFFU, 0x09092B2BU); - psu_mask_write(0xFD080E00, 0xFFFFFFFFU, 0x40800604U); - psu_mask_write(0xFD080E04, 0xFFFFFFFFU, 0x00007FFFU); - psu_mask_write(0xFD080E08, 0xFFFFFFFFU, 0x00000000U); - psu_mask_write(0xFD080E0C, 0xFFFFFFFFU, 0x3F000008U); - psu_mask_write(0xFD080E10, 0xFFFFFFFFU, 0x0E00B03CU); - psu_mask_write(0xFD080E14, 0xFFFFFFFFU, 0x09095555U); - psu_mask_write(0xFD080E18, 0xFFFFFFFFU, 0x09092B2BU); - psu_mask_write(0xFD080F00, 0xFFFFFFFFU, 0x80803660U); - psu_mask_write(0xFD080F04, 0xFFFFFFFFU, 0x55556000U); - psu_mask_write(0xFD080F08, 0xFFFFFFFFU, 0xAAAAAAAAU); - psu_mask_write(0xFD080F0C, 0xFFFFFFFFU, 0x0029A4A4U); - psu_mask_write(0xFD080F10, 0xFFFFFFFFU, 0x0C00B000U); - psu_mask_write(0xFD080F14, 0xFFFFFFFFU, 0x09095555U); - psu_mask_write(0xFD080F18, 0xFFFFFFFFU, 0x09092B2BU); - psu_mask_write(0xFD081400, 0xFFFFFFFFU, 0x2A019FFEU); - psu_mask_write(0xFD081404, 0xFFFFFFFFU, 0x01100000U); - psu_mask_write(0xFD08141C, 0xFFFFFFFFU, 0x01264300U); - psu_mask_write(0xFD08142C, 0xFFFFFFFFU, 0x00041800U); - psu_mask_write(0xFD081430, 0xFFFFFFFFU, 0x70800000U); - psu_mask_write(0xFD081440, 0xFFFFFFFFU, 0x2A019FFEU); - psu_mask_write(0xFD081444, 0xFFFFFFFFU, 0x01100000U); - psu_mask_write(0xFD08145C, 0xFFFFFFFFU, 0x01264300U); - psu_mask_write(0xFD08146C, 0xFFFFFFFFU, 0x00041800U); - psu_mask_write(0xFD081470, 0xFFFFFFFFU, 0x70800000U); - psu_mask_write(0xFD081480, 0xFFFFFFFFU, 0x2A019FFEU); - psu_mask_write(0xFD081484, 0xFFFFFFFFU, 0x01100000U); - psu_mask_write(0xFD08149C, 0xFFFFFFFFU, 0x01264300U); - psu_mask_write(0xFD0814AC, 0xFFFFFFFFU, 0x00041800U); - psu_mask_write(0xFD0814B0, 0xFFFFFFFFU, 0x70800000U); - psu_mask_write(0xFD0814C0, 0xFFFFFFFFU, 0x2A019FFEU); - psu_mask_write(0xFD0814C4, 0xFFFFFFFFU, 0x01100000U); - psu_mask_write(0xFD0814DC, 0xFFFFFFFFU, 0x01264300U); - psu_mask_write(0xFD0814EC, 0xFFFFFFFFU, 0x00041800U); - psu_mask_write(0xFD0814F0, 0xFFFFFFFFU, 0x70800000U); - psu_mask_write(0xFD081500, 0xFFFFFFFFU, 0x15019FFEU); - psu_mask_write(0xFD081504, 0xFFFFFFFFU, 0x21100000U); - psu_mask_write(0xFD08151C, 0xFFFFFFFFU, 0x01266300U); - psu_mask_write(0xFD08152C, 0xFFFFFFFFU, 0x00041800U); - psu_mask_write(0xFD081530, 0xFFFFFFFFU, 0x70400000U); - psu_mask_write(0xFD0817DC, 0xFFFFFFFFU, 0x012643C4U); - - return 1; -} - -static unsigned long psu_ddr_qos_init_data(void) -{ - psu_mask_write(0xFD360008, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD36001C, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD370008, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD37001C, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD380008, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD38001C, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD390008, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD39001C, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD3A0008, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD3A001C, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD3B0008, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFD3B001C, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFF9B0008, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFF9B001C, 0x0000000FU, 0x00000000U); - - return 1; -} - -static unsigned long psu_mio_init_data(void) -{ - psu_mask_write(0xFF180000, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180004, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180008, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF18000C, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180010, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180014, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180018, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF18001C, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180020, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180024, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180028, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF18002C, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180030, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180034, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180038, 0x000000FEU, 0x00000040U); - psu_mask_write(0xFF18003C, 0x000000FEU, 0x00000040U); - psu_mask_write(0xFF180040, 0x000000FEU, 0x00000040U); - psu_mask_write(0xFF180044, 0x000000FEU, 0x00000040U); - psu_mask_write(0xFF180048, 0x000000FEU, 0x000000C0U); - psu_mask_write(0xFF18004C, 0x000000FEU, 0x000000C0U); - psu_mask_write(0xFF180050, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180054, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180058, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF18005C, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180060, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180064, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180068, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF18006C, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180070, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180074, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180078, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF18007C, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF180080, 0x000000FEU, 0x00000008U); - psu_mask_write(0xFF180084, 0x000000FEU, 0x00000008U); - psu_mask_write(0xFF180098, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF18009C, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800A0, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800A4, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800A8, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800AC, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF1800B0, 0x000000FEU, 0x00000000U); - psu_mask_write(0xFF1800B4, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800B8, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800BC, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800C0, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800C4, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800C8, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800CC, 0x000000FEU, 0x00000010U); - psu_mask_write(0xFF1800D0, 0x000000FEU, 0x00000004U); - psu_mask_write(0xFF1800D4, 0x000000FEU, 0x00000004U); - psu_mask_write(0xFF1800D8, 0x000000FEU, 0x00000004U); - psu_mask_write(0xFF1800DC, 0x000000FEU, 0x00000004U); - psu_mask_write(0xFF1800E0, 0x000000FEU, 0x00000004U); - psu_mask_write(0xFF1800E4, 0x000000FEU, 0x00000004U); - psu_mask_write(0xFF1800E8, 0x000000FEU, 0x00000004U); - psu_mask_write(0xFF1800EC, 0x000000FEU, 0x00000004U); - psu_mask_write(0xFF1800F0, 0x000000FEU, 0x00000004U); - psu_mask_write(0xFF1800F4, 0x000000FEU, 0x00000004U); - psu_mask_write(0xFF1800F8, 0x000000FEU, 0x00000004U); - psu_mask_write(0xFF1800FC, 0x000000FEU, 0x00000004U); - psu_mask_write(0xFF180100, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180104, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180108, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF18010C, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180110, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180114, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180118, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF18011C, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180120, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180124, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180128, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF18012C, 0x000000FEU, 0x00000002U); - psu_mask_write(0xFF180130, 0x000000FEU, 0x000000C0U); - psu_mask_write(0xFF180134, 0x000000FEU, 0x000000C0U); - psu_mask_write(0xFF180204, 0xFFFFFFFFU, 0x00040000U); - psu_mask_write(0xFF180208, 0xFFFFFFFFU, 0x00B02000U); - psu_mask_write(0xFF18020C, 0x00003FFFU, 0x00000FC0U); - psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF18013C, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF180140, 0x03FFFFFFU, 0x00000000U); - psu_mask_write(0xFF180144, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF180148, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x00000000U); - psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF180158, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF18015C, 0x03FFFFFFU, 0x00000000U); - psu_mask_write(0xFF180160, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x00000000U); - psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF180174, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF180178, 0x03FFFFFFU, 0x00000000U); - psu_mask_write(0xFF18017C, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x03FFFFFFU); - psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x00000000U); - psu_mask_write(0xFF180200, 0x0000000FU, 0x00000000U); - - return 1; -} - -static unsigned long psu_peripherals_pre_init_data(void) -{ - psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01012302U); - psu_mask_write(0xFF5E0238, 0x00000001U, 0x00000001U); - - return 1; -} - -static unsigned long psu_peripherals_init_data(void) -{ - psu_mask_write(0xFD1A0100, 0x00008046U, 0x00000000U); - psu_mask_write(0xFF5E0238, 0x001A0000U, 0x00000000U); - psu_mask_write(0xFF5E023C, 0x0093C018U, 0x00000000U); - psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U); - psu_mask_write(0xFF5E0238, 0x00000001U, 0x00000000U); - psu_mask_write(0xFF180390, 0x00000004U, 0x00000004U); - psu_mask_write(0xFF5E023C, 0x00000400U, 0x00000000U); - psu_mask_write(0xFF5E0238, 0x00000040U, 0x00000000U); - psu_mask_write(0xFF180310, 0x00008000U, 0x00000000U); - psu_mask_write(0xFF180320, 0x33840000U, 0x02840000U); - psu_mask_write(0xFF18031C, 0x7FFE0000U, 0x64500000U); - psu_mask_write(0xFF180358, 0x00000008U, 0x00000008U); - psu_mask_write(0xFF180324, 0x03C00000U, 0x00000000U); - psu_mask_write(0xFF5E0238, 0x00000600U, 0x00000000U); - psu_mask_write(0xFF5E0238, 0x00008000U, 0x00000000U); - psu_mask_write(0xFF5E0238, 0x00007800U, 0x00000000U); - psu_mask_write(0xFF5E0238, 0x00000002U, 0x00000000U); - psu_mask_write(0xFF5E0238, 0x00040000U, 0x00000000U); - psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU); - psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U); - psu_mask_write(0xFD5C0060, 0x000F000FU, 0x00000000U); - psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U); - psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x05F5DD18U); - psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U); - psu_mask_write(0xFF5E0250, 0x00000F0FU, 0x00000202U); - - mask_delay(1); - psu_mask_write(0xFF5E0250, 0x00000F0FU, 0x00000002U); - - mask_delay(5); - psu_mask_write(0xFF5E0250, 0x00000F0FU, 0x00000202U); - - return 1; -} - -static unsigned long psu_serdes_init_data(void) -{ - psu_mask_write(0xFD410008, 0x0000001FU, 0x00000008U); - psu_mask_write(0xFD41000C, 0x0000001FU, 0x0000000FU); - psu_mask_write(0xFD402868, 0x00000080U, 0x00000080U); - psu_mask_write(0xFD40286C, 0x00000080U, 0x00000080U); - psu_mask_write(0xFD40A094, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD40A368, 0x000000FFU, 0x00000038U); - psu_mask_write(0xFD40A36C, 0x00000007U, 0x00000003U); - psu_mask_write(0xFD40E368, 0x000000FFU, 0x000000E0U); - psu_mask_write(0xFD40E36C, 0x00000007U, 0x00000003U); - psu_mask_write(0xFD40A370, 0x000000FFU, 0x000000F4U); - psu_mask_write(0xFD40A374, 0x000000FFU, 0x00000031U); - psu_mask_write(0xFD40A378, 0x000000FFU, 0x00000002U); - psu_mask_write(0xFD40A37C, 0x00000033U, 0x00000030U); - psu_mask_write(0xFD40E370, 0x000000FFU, 0x000000C9U); - psu_mask_write(0xFD40E374, 0x000000FFU, 0x000000D2U); - psu_mask_write(0xFD40E378, 0x000000FFU, 0x00000001U); - psu_mask_write(0xFD40E37C, 0x000000B3U, 0x000000B0U); - psu_mask_write(0xFD40906C, 0x00000003U, 0x00000003U); - psu_mask_write(0xFD4080F4, 0x00000003U, 0x00000003U); - psu_mask_write(0xFD40E360, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD40D06C, 0x0000000FU, 0x0000000FU); - psu_mask_write(0xFD40C0F4, 0x0000000BU, 0x0000000BU); - psu_mask_write(0xFD4090CC, 0x00000020U, 0x00000020U); - psu_mask_write(0xFD401074, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD405074, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD409074, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD40D074, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD401994, 0x00000007U, 0x00000007U); - psu_mask_write(0xFD405994, 0x00000007U, 0x00000007U); - psu_mask_write(0xFD40989C, 0x00000080U, 0x00000080U); - psu_mask_write(0xFD4098F8, 0x000000FFU, 0x0000001AU); - psu_mask_write(0xFD4098FC, 0x000000FFU, 0x0000001AU); - psu_mask_write(0xFD409990, 0x000000FFU, 0x00000010U); - psu_mask_write(0xFD409924, 0x000000FFU, 0x000000FEU); - psu_mask_write(0xFD409928, 0x000000FFU, 0x00000000U); - psu_mask_write(0xFD409900, 0x000000FFU, 0x0000001AU); - psu_mask_write(0xFD40992C, 0x000000FFU, 0x00000000U); - psu_mask_write(0xFD409980, 0x000000FFU, 0x000000FFU); - psu_mask_write(0xFD409914, 0x000000FFU, 0x000000F7U); - psu_mask_write(0xFD409918, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD409940, 0x000000FFU, 0x000000F7U); - psu_mask_write(0xFD409944, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD409994, 0x00000007U, 0x00000007U); - psu_mask_write(0xFD40D89C, 0x00000080U, 0x00000080U); - psu_mask_write(0xFD40D8F8, 0x000000FFU, 0x0000007DU); - psu_mask_write(0xFD40D8FC, 0x000000FFU, 0x0000007DU); - psu_mask_write(0xFD40D990, 0x000000FFU, 0x00000001U); - psu_mask_write(0xFD40D924, 0x000000FFU, 0x0000009CU); - psu_mask_write(0xFD40D928, 0x000000FFU, 0x00000039U); - psu_mask_write(0xFD40D98C, 0x000000F0U, 0x00000020U); - psu_mask_write(0xFD40D900, 0x000000FFU, 0x0000007DU); - psu_mask_write(0xFD40D92C, 0x000000FFU, 0x00000064U); - psu_mask_write(0xFD40D980, 0x000000FFU, 0x000000FFU); - psu_mask_write(0xFD40D914, 0x000000FFU, 0x000000F7U); - psu_mask_write(0xFD40D918, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD40D940, 0x000000FFU, 0x000000F7U); - psu_mask_write(0xFD40D944, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD40D994, 0x00000007U, 0x00000007U); - psu_mask_write(0xFD40107C, 0x0000000FU, 0x00000001U); - psu_mask_write(0xFD40507C, 0x0000000FU, 0x00000001U); - psu_mask_write(0xFD40907C, 0x0000000FU, 0x00000001U); - psu_mask_write(0xFD40D07C, 0x0000000FU, 0x00000001U); - psu_mask_write(0xFD4019A4, 0x000000FFU, 0x000000FFU); - psu_mask_write(0xFD401038, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD40102C, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD4059A4, 0x000000FFU, 0x000000FFU); - psu_mask_write(0xFD405038, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD40502C, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD4099A4, 0x000000FFU, 0x000000FFU); - psu_mask_write(0xFD409038, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD40902C, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD40D9A4, 0x000000FFU, 0x000000FFU); - psu_mask_write(0xFD40D038, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD40D02C, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD4019AC, 0x00000003U, 0x00000000U); - psu_mask_write(0xFD4059AC, 0x00000003U, 0x00000000U); - psu_mask_write(0xFD4099AC, 0x00000003U, 0x00000000U); - psu_mask_write(0xFD40D9AC, 0x00000003U, 0x00000000U); - psu_mask_write(0xFD401978, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD405978, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD409978, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD40D978, 0x00000010U, 0x00000010U); - - serdes_illcalib(2, 3, 3, 0, 0, 0, 0, 0); - psu_mask_write(0xFD410014, 0x00000077U, 0x00000023U); - psu_mask_write(0xFD40C1D8, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD40DC14, 0x000000FFU, 0x000000E6U); - psu_mask_write(0xFD40DC40, 0x0000001FU, 0x0000000CU); - psu_mask_write(0xFD40D94C, 0x00000020U, 0x00000020U); - psu_mask_write(0xFD40D950, 0x00000007U, 0x00000006U); - psu_mask_write(0xFD40C048, 0x000000FFU, 0x00000001U); - - return 1; -} - -static unsigned long psu_resetout_init_data(void) -{ - psu_mask_write(0xFF5E023C, 0x00000400U, 0x00000000U); - psu_mask_write(0xFF9D0080, 0x00000001U, 0x00000001U); - psu_mask_write(0xFF9D007C, 0x00000001U, 0x00000000U); - psu_mask_write(0xFF5E023C, 0x00000140U, 0x00000000U); - psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U); - psu_mask_write(0xFD3D0100, 0x00000003U, 0x00000003U); - psu_mask_write(0xFD1A0100, 0x00000002U, 0x00000000U); - psu_mask_write(0xFE20C200, 0x00023FFFU, 0x00022457U); - psu_mask_write(0xFE20C630, 0x003FFF00U, 0x00000000U); - psu_mask_write(0xFE20C11C, 0x00000600U, 0x00000600U); - psu_mask_write(0xFE20C12C, 0x00004000U, 0x00004000U); - psu_mask_write(0xFD480064, 0x00000200U, 0x00000200U); - mask_poll(0xFD40A3E4, 0x00000010U); - mask_poll(0xFD40E3E4, 0x00000010U); - psu_mask_write(0xFD0C00AC, 0xFFFFFFFFU, 0x28184018U); - psu_mask_write(0xFD0C00B0, 0xFFFFFFFFU, 0x0E081406U); - psu_mask_write(0xFD0C00B4, 0xFFFFFFFFU, 0x064A0813U); - psu_mask_write(0xFD0C00B8, 0xFFFFFFFFU, 0x3FFC96A4U); - - return 1; -} - -static unsigned long psu_resetin_init_data(void) -{ - psu_mask_write(0xFF5E023C, 0x00000540U, 0x00000540U); - psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000008U); - psu_mask_write(0xFD1A0100, 0x00000002U, 0x00000002U); - - return 1; -} - -static unsigned long psu_afi_config(void) -{ - psu_mask_write(0xFD1A0100, 0x00001F80U, 0x00000000U); - psu_mask_write(0xFF5E023C, 0x00080000U, 0x00000000U); - psu_mask_write(0xFD615000, 0x00000300U, 0x00000200U); - psu_mask_write(0xFD360000, 0x00000003U, 0x00000002U); - psu_mask_write(0xFD370000, 0x00000003U, 0x00000002U); - psu_mask_write(0xFD360014, 0x00000003U, 0x00000002U); - psu_mask_write(0xFD370014, 0x00000003U, 0x00000002U); - - return 1; -} - -static unsigned long psu_ddr_phybringup_data(void) -{ - unsigned int regval = 0; - unsigned int pll_retry = 10; - unsigned int pll_locked = 0; - int cur_R006_tREFPRD; - - while ((pll_retry > 0) && (!pll_locked)) { - Xil_Out32(0xFD080004, 0x00040010); - Xil_Out32(0xFD080004, 0x00040011); - - while ((Xil_In32(0xFD080030) & 0x1) != 1) - ; - pll_locked = (Xil_In32(0xFD080030) & 0x80000000) - >> 31; - pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000) - >> 16; - pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000) >> 16; - pll_locked &= (Xil_In32(0xFD080BE0) & 0x10000) - >> 16; - pll_locked &= (Xil_In32(0xFD080DE0) & 0x10000) - >> 16; - pll_retry--; + if (lane_active == 0) { + psu_mask_write(0xFD410044, 0x00000003U, 0x00000000U); + psu_mask_write(0xFD410040, 0x00000003U, 0x00000000U); + psu_mask_write(0xFD410038, 0x00000007U, 0x00000001U); + Xil_Out32(0xFD4010AC, 0x0020); + Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) | 0x1)); } - Xil_Out32(0xFD0800C4, Xil_In32(0xFD0800C4) | (pll_retry << 16)); - if (!pll_locked) - return 0; - - Xil_Out32(0xFD080004U, 0x00040063U); - - while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU) - ; - prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U); - - while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU) - ; - Xil_Out32(0xFD0701B0U, 0x00000001U); - Xil_Out32(0xFD070320U, 0x00000001U); - while ((Xil_In32(0xFD070004U) & 0x0000000FU) != 0x00000001U) - ; - prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U); - Xil_Out32(0xFD080004, 0x0004FE01); - regval = Xil_In32(0xFD080030); - while (regval != 0x80000FFF) - regval = Xil_In32(0xFD080030); - regval = ((Xil_In32(0xFD080030) & 0x1FFF0000) >> 18); - if (regval != 0) - return 0; - - Xil_Out32(0xFD080200U, 0x100091C7U); - - cur_R006_tREFPRD = (Xil_In32(0xFD080018U) & 0x0003FFFFU) >> 0x00000000U; - prog_reg(0xFD080018, 0x3FFFF, 0x0, cur_R006_tREFPRD); - - prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000003U); - prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000003U); - prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000003U); - prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000003U); - prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000003U); - prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000003U); - - Xil_Out32(0xFD080004, 0x00060001); - regval = Xil_In32(0xFD080030); - while ((regval & 0x80004001) != 0x80004001) - regval = Xil_In32(0xFD080030); - - regval = ((Xil_In32(0xFD080030) & 0x1FFF0000) >> 18); - if (regval != 0) - return 0; - - prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000000U); - prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000000U); - prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000000U); - prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000000U); - prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000000U); - prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000000U); - - Xil_Out32(0xFD080200U, 0x800091C7U); - prog_reg(0xFD080018, 0x3FFFF, 0x0, cur_R006_tREFPRD); - - Xil_Out32(0xFD080004, 0x0000C001); - regval = Xil_In32(0xFD080030); - while ((regval & 0x80000C01) != 0x80000C01) - regval = Xil_In32(0xFD080030); + if (lane_active == 1) { + psu_mask_write(0xFD410044, 0x0000000CU, 0x00000000U); + psu_mask_write(0xFD410040, 0x0000000CU, 0x00000000U); + psu_mask_write(0xFD410038, 0x00000070U, 0x00000010U); + Xil_Out32(0xFD4050AC, 0x0020); + Xil_Out32(0xFD407004, (Xil_In32(0xFD407004) | 0x1)); + } + if (lane_active == 2) { + psu_mask_write(0xFD410044, 0x00000030U, 0x00000000U); + psu_mask_write(0xFD410040, 0x00000030U, 0x00000000U); + psu_mask_write(0xFD41003C, 0x00000007U, 0x00000001U); + Xil_Out32(0xFD4090AC, 0x0020); + Xil_Out32(0xFD40B004, (Xil_In32(0xFD40B004) | 0x1)); + } + if (lane_active == 3) { + psu_mask_write(0xFD410040, 0x000000C0U, 0x00000000U); + psu_mask_write(0xFD410044, 0x000000C0U, 0x00000000U); + psu_mask_write(0xFD41003C, 0x00000070U, 0x00000010U); + Xil_Out32(0xFD40D0AC, 0x0020); + Xil_Out32(0xFD40F004, (Xil_In32(0xFD40F004) | 0x1)); + } + mask_delay(100); + return 1; +} - Xil_Out32(0xFD070180U, 0x01000040U); - Xil_Out32(0xFD070060U, 0x00000000U); - prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000000U); +static int serdes_bist_result(u32 lane_active) +{ + u32 pkt_cnt_l0, pkt_cnt_h0, err_cnt_l0, err_cnt_h0; + if (lane_active == 0) { + pkt_cnt_l0 = Xil_In32(0xFD40304C); + pkt_cnt_h0 = Xil_In32(0xFD403050); + err_cnt_l0 = Xil_In32(0xFD403054); + err_cnt_h0 = Xil_In32(0xFD403058); + } + if (lane_active == 1) { + pkt_cnt_l0 = Xil_In32(0xFD40704C); + pkt_cnt_h0 = Xil_In32(0xFD407050); + err_cnt_l0 = Xil_In32(0xFD407054); + err_cnt_h0 = Xil_In32(0xFD407058); + } + if (lane_active == 2) { + pkt_cnt_l0 = Xil_In32(0xFD40B04C); + pkt_cnt_h0 = Xil_In32(0xFD40B050); + err_cnt_l0 = Xil_In32(0xFD40B054); + err_cnt_h0 = Xil_In32(0xFD40B058); + } + if (lane_active == 3) { + pkt_cnt_l0 = Xil_In32(0xFD40F04C); + pkt_cnt_h0 = Xil_In32(0xFD40F050); + err_cnt_l0 = Xil_In32(0xFD40F054); + err_cnt_h0 = Xil_In32(0xFD40F058); + } + if (lane_active == 0) + Xil_Out32(0xFD403004, 0x0); + if (lane_active == 1) + Xil_Out32(0xFD407004, 0x0); + if (lane_active == 2) + Xil_Out32(0xFD40B004, 0x0); + if (lane_active == 3) + Xil_Out32(0xFD40F004, 0x0); + if (err_cnt_l0 > 0 || err_cnt_h0 > 0 || + (pkt_cnt_l0 == 0 && pkt_cnt_h0 == 0)) + return 0; return 1; } -static int serdes_rst_seq(u32 lane3_protocol, u32 lane3_rate, - u32 lane2_protocol, u32 lane2_rate, - u32 lane1_protocol, u32 lane1_rate, - u32 lane0_protocol, u32 lane0_rate) +static int serdes_illcalib_pcie_gen1(u32 lane3_protocol, u32 lane3_rate, + u32 lane2_protocol, u32 lane2_rate, + u32 lane1_protocol, u32 lane1_rate, + u32 lane0_protocol, u32 lane0_rate, + u32 gen2_calib) { - Xil_Out32(0xFD410098, 0x00000000); - Xil_Out32(0xFD401010, 0x00000040); - Xil_Out32(0xFD405010, 0x00000040); - Xil_Out32(0xFD409010, 0x00000040); - Xil_Out32(0xFD40D010, 0x00000040); - Xil_Out32(0xFD402084, 0x00000080); - Xil_Out32(0xFD406084, 0x00000080); - Xil_Out32(0xFD40A084, 0x00000080); - Xil_Out32(0xFD40E084, 0x00000080); - Xil_Out32(0xFD410098, 0x00000004); - mask_delay(50); - if (lane0_rate == 1) - Xil_Out32(0xFD410098, 0x0000000E); - Xil_Out32(0xFD410098, 0x00000006); - if (lane0_rate == 1) { - Xil_Out32(0xFD40000C, 0x00000004); - Xil_Out32(0xFD40400C, 0x00000004); - Xil_Out32(0xFD40800C, 0x00000004); - Xil_Out32(0xFD40C00C, 0x00000004); - Xil_Out32(0xFD410098, 0x00000007); - mask_delay(400); - Xil_Out32(0xFD40000C, 0x0000000C); - Xil_Out32(0xFD40400C, 0x0000000C); - Xil_Out32(0xFD40800C, 0x0000000C); - Xil_Out32(0xFD40C00C, 0x0000000C); - mask_delay(15); - Xil_Out32(0xFD410098, 0x0000000F); - mask_delay(100); + u64 tempbistresult; + u32 currbistresult[4]; + u32 prevbistresult[4]; + u32 itercount = 0; + u32 ill12_val[4], ill1_val[4]; + u32 loop = 0; + u32 iterresult[8]; + u32 meancount[4]; + u32 bistpasscount[4]; + u32 meancountalt[4]; + u32 meancountalt_bistpasscount[4]; + u32 lane0_active; + u32 lane1_active; + u32 lane2_active; + u32 lane3_active; + + lane0_active = (lane0_protocol == 1); + lane1_active = (lane1_protocol == 1); + lane2_active = (lane2_protocol == 1); + lane3_active = (lane3_protocol == 1); + for (loop = 0; loop <= 3; loop++) { + iterresult[loop] = 0; + iterresult[loop + 4] = 0; + meancountalt[loop] = 0; + meancountalt_bistpasscount[loop] = 0; + meancount[loop] = 0; + prevbistresult[loop] = 0; + bistpasscount[loop] = 0; } - if (lane0_protocol != 0) - mask_poll(0xFD4023E4, 0x00000010U); - if (lane1_protocol != 0) - mask_poll(0xFD4063E4, 0x00000010U); - if (lane2_protocol != 0) - mask_poll(0xFD40A3E4, 0x00000010U); - if (lane3_protocol != 0) - mask_poll(0xFD40E3E4, 0x00000010U); - mask_delay(50); - Xil_Out32(0xFD401010, 0x000000C0); - Xil_Out32(0xFD405010, 0x000000C0); - Xil_Out32(0xFD409010, 0x000000C0); - Xil_Out32(0xFD40D010, 0x000000C0); - Xil_Out32(0xFD401010, 0x00000080); - Xil_Out32(0xFD405010, 0x00000080); - Xil_Out32(0xFD409010, 0x00000080); - Xil_Out32(0xFD40D010, 0x00000080); + itercount = 0; + if (lane0_active) + serdes_bist_static_settings(0); + if (lane1_active) + serdes_bist_static_settings(1); + if (lane2_active) + serdes_bist_static_settings(2); + if (lane3_active) + serdes_bist_static_settings(3); + do { + if (gen2_calib != 1) { + if (lane0_active == 1) + ill1_val[0] = ((0x04 + itercount * 8) % 0x100); + if (lane0_active == 1) + ill12_val[0] = + ((0x04 + itercount * 8) >= + 0x100) ? 0x10 : 0x00; + if (lane1_active == 1) + ill1_val[1] = ((0x04 + itercount * 8) % 0x100); + if (lane1_active == 1) + ill12_val[1] = + ((0x04 + itercount * 8) >= + 0x100) ? 0x10 : 0x00; + if (lane2_active == 1) + ill1_val[2] = ((0x04 + itercount * 8) % 0x100); + if (lane2_active == 1) + ill12_val[2] = + ((0x04 + itercount * 8) >= + 0x100) ? 0x10 : 0x00; + if (lane3_active == 1) + ill1_val[3] = ((0x04 + itercount * 8) % 0x100); + if (lane3_active == 1) + ill12_val[3] = + ((0x04 + itercount * 8) >= + 0x100) ? 0x10 : 0x00; + + if (lane0_active == 1) + Xil_Out32(0xFD401924, ill1_val[0]); + if (lane0_active == 1) + psu_mask_write(0xFD401990, 0x000000F0U, + ill12_val[0]); + if (lane1_active == 1) + Xil_Out32(0xFD405924, ill1_val[1]); + if (lane1_active == 1) + psu_mask_write(0xFD405990, 0x000000F0U, + ill12_val[1]); + if (lane2_active == 1) + Xil_Out32(0xFD409924, ill1_val[2]); + if (lane2_active == 1) + psu_mask_write(0xFD409990, 0x000000F0U, + ill12_val[2]); + if (lane3_active == 1) + Xil_Out32(0xFD40D924, ill1_val[3]); + if (lane3_active == 1) + psu_mask_write(0xFD40D990, 0x000000F0U, + ill12_val[3]); + } + if (gen2_calib == 1) { + if (lane0_active == 1) + ill1_val[0] = ((0x104 + itercount * 8) % 0x100); + if (lane0_active == 1) + ill12_val[0] = + ((0x104 + itercount * 8) >= + 0x200) ? 0x02 : 0x01; + if (lane1_active == 1) + ill1_val[1] = ((0x104 + itercount * 8) % 0x100); + if (lane1_active == 1) + ill12_val[1] = + ((0x104 + itercount * 8) >= + 0x200) ? 0x02 : 0x01; + if (lane2_active == 1) + ill1_val[2] = ((0x104 + itercount * 8) % 0x100); + if (lane2_active == 1) + ill12_val[2] = + ((0x104 + itercount * 8) >= + 0x200) ? 0x02 : 0x01; + if (lane3_active == 1) + ill1_val[3] = ((0x104 + itercount * 8) % 0x100); + if (lane3_active == 1) + ill12_val[3] = + ((0x104 + itercount * 8) >= + 0x200) ? 0x02 : 0x01; + + if (lane0_active == 1) + Xil_Out32(0xFD401928, ill1_val[0]); + if (lane0_active == 1) + psu_mask_write(0xFD401990, 0x0000000FU, + ill12_val[0]); + if (lane1_active == 1) + Xil_Out32(0xFD405928, ill1_val[1]); + if (lane1_active == 1) + psu_mask_write(0xFD405990, 0x0000000FU, + ill12_val[1]); + if (lane2_active == 1) + Xil_Out32(0xFD409928, ill1_val[2]); + if (lane2_active == 1) + psu_mask_write(0xFD409990, 0x0000000FU, + ill12_val[2]); + if (lane3_active == 1) + Xil_Out32(0xFD40D928, ill1_val[3]); + if (lane3_active == 1) + psu_mask_write(0xFD40D990, 0x0000000FU, + ill12_val[3]); + } + + if (lane0_active == 1) + psu_mask_write(0xFD401018, 0x00000030U, 0x00000010U); + if (lane1_active == 1) + psu_mask_write(0xFD405018, 0x00000030U, 0x00000010U); + if (lane2_active == 1) + psu_mask_write(0xFD409018, 0x00000030U, 0x00000010U); + if (lane3_active == 1) + psu_mask_write(0xFD40D018, 0x00000030U, 0x00000010U); + if (lane0_active == 1) + currbistresult[0] = 0; + if (lane1_active == 1) + currbistresult[1] = 0; + if (lane2_active == 1) + currbistresult[2] = 0; + if (lane3_active == 1) + currbistresult[3] = 0; + serdes_rst_seq(lane3_protocol, lane3_rate, lane2_protocol, + lane2_rate, lane1_protocol, lane1_rate, + lane0_protocol, lane0_rate); + if (lane3_active == 1) + serdes_bist_run(3); + if (lane2_active == 1) + serdes_bist_run(2); + if (lane1_active == 1) + serdes_bist_run(1); + if (lane0_active == 1) + serdes_bist_run(0); + tempbistresult = 0; + if (lane3_active == 1) + tempbistresult = tempbistresult | serdes_bist_result(3); + tempbistresult = tempbistresult << 1; + if (lane2_active == 1) + tempbistresult = tempbistresult | serdes_bist_result(2); + tempbistresult = tempbistresult << 1; + if (lane1_active == 1) + tempbistresult = tempbistresult | serdes_bist_result(1); + tempbistresult = tempbistresult << 1; + if (lane0_active == 1) + tempbistresult = tempbistresult | serdes_bist_result(0); + Xil_Out32(0xFD410098, 0x0); + Xil_Out32(0xFD410098, 0x2); - Xil_Out32(0xFD402084, 0x000000C0); - Xil_Out32(0xFD406084, 0x000000C0); - Xil_Out32(0xFD40A084, 0x000000C0); - Xil_Out32(0xFD40E084, 0x000000C0); - mask_delay(50); - Xil_Out32(0xFD402084, 0x00000080); - Xil_Out32(0xFD406084, 0x00000080); - Xil_Out32(0xFD40A084, 0x00000080); - Xil_Out32(0xFD40E084, 0x00000080); - mask_delay(50); - Xil_Out32(0xFD401010, 0x00000000); - Xil_Out32(0xFD405010, 0x00000000); - Xil_Out32(0xFD409010, 0x00000000); - Xil_Out32(0xFD40D010, 0x00000000); - Xil_Out32(0xFD402084, 0x00000000); - Xil_Out32(0xFD406084, 0x00000000); - Xil_Out32(0xFD40A084, 0x00000000); - Xil_Out32(0xFD40E084, 0x00000000); - mask_delay(500); - return 1; -} + if (itercount < 32) { + iterresult[0] = + ((iterresult[0] << 1) | + ((tempbistresult & 0x1) == 0x1)); + iterresult[1] = + ((iterresult[1] << 1) | + ((tempbistresult & 0x2) == 0x2)); + iterresult[2] = + ((iterresult[2] << 1) | + ((tempbistresult & 0x4) == 0x4)); + iterresult[3] = + ((iterresult[3] << 1) | + ((tempbistresult & 0x8) == 0x8)); + } else { + iterresult[4] = + ((iterresult[4] << 1) | + ((tempbistresult & 0x1) == 0x1)); + iterresult[5] = + ((iterresult[5] << 1) | + ((tempbistresult & 0x2) == 0x2)); + iterresult[6] = + ((iterresult[6] << 1) | + ((tempbistresult & 0x4) == 0x4)); + iterresult[7] = + ((iterresult[7] << 1) | + ((tempbistresult & 0x8) == 0x8)); + } + currbistresult[0] = + currbistresult[0] | ((tempbistresult & 0x1) == 1); + currbistresult[1] = + currbistresult[1] | ((tempbistresult & 0x2) == 0x2); + currbistresult[2] = + currbistresult[2] | ((tempbistresult & 0x4) == 0x4); + currbistresult[3] = + currbistresult[3] | ((tempbistresult & 0x8) == 0x8); -static int serdes_bist_static_settings(u32 lane_active) -{ - if (lane_active == 0) { - Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) & 0xFFFFFF1F)); - Xil_Out32(0xFD403068, 0x1); - Xil_Out32(0xFD40306C, 0x1); - Xil_Out32(0xFD4010AC, 0x0020); - Xil_Out32(0xFD403008, 0x0); - Xil_Out32(0xFD40300C, 0xF4); - Xil_Out32(0xFD403010, 0x0); - Xil_Out32(0xFD403014, 0x0); - Xil_Out32(0xFD403018, 0x00); - Xil_Out32(0xFD40301C, 0xFB); - Xil_Out32(0xFD403020, 0xFF); - Xil_Out32(0xFD403024, 0x0); - Xil_Out32(0xFD403028, 0x00); - Xil_Out32(0xFD40302C, 0x00); - Xil_Out32(0xFD403030, 0x4A); - Xil_Out32(0xFD403034, 0x4A); - Xil_Out32(0xFD403038, 0x4A); - Xil_Out32(0xFD40303C, 0x4A); - Xil_Out32(0xFD403040, 0x0); - Xil_Out32(0xFD403044, 0x14); - Xil_Out32(0xFD403048, 0x02); - Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) & 0xFFFFFF1F)); - } - if (lane_active == 1) { - Xil_Out32(0xFD407004, (Xil_In32(0xFD407004) & 0xFFFFFF1F)); - Xil_Out32(0xFD407068, 0x1); - Xil_Out32(0xFD40706C, 0x1); - Xil_Out32(0xFD4050AC, 0x0020); - Xil_Out32(0xFD407008, 0x0); - Xil_Out32(0xFD40700C, 0xF4); - Xil_Out32(0xFD407010, 0x0); - Xil_Out32(0xFD407014, 0x0); - Xil_Out32(0xFD407018, 0x00); - Xil_Out32(0xFD40701C, 0xFB); - Xil_Out32(0xFD407020, 0xFF); - Xil_Out32(0xFD407024, 0x0); - Xil_Out32(0xFD407028, 0x00); - Xil_Out32(0xFD40702C, 0x00); - Xil_Out32(0xFD407030, 0x4A); - Xil_Out32(0xFD407034, 0x4A); - Xil_Out32(0xFD407038, 0x4A); - Xil_Out32(0xFD40703C, 0x4A); - Xil_Out32(0xFD407040, 0x0); - Xil_Out32(0xFD407044, 0x14); - Xil_Out32(0xFD407048, 0x02); - Xil_Out32(0xFD407004, (Xil_In32(0xFD407004) & 0xFFFFFF1F)); - } + for (loop = 0; loop <= 3; loop++) { + if (currbistresult[loop] == 1 && prevbistresult[loop] == 1) + bistpasscount[loop] = bistpasscount[loop] + 1; + if (bistpasscount[loop] < 4 && currbistresult[loop] == 0 && + itercount > 2) { + if (meancountalt_bistpasscount[loop] < + bistpasscount[loop]) { + meancountalt_bistpasscount[loop] = + bistpasscount[loop]; + meancountalt[loop] = + ((itercount - 1) - + ((bistpasscount[loop] + 1) / 2)); + } + bistpasscount[loop] = 0; + } + if (meancount[loop] == 0 && bistpasscount[loop] >= 4 && + (currbistresult[loop] == 0 || itercount == 63) && + prevbistresult[loop] == 1) + meancount[loop] = + (itercount - 1) - + ((bistpasscount[loop] + 1) / 2); + prevbistresult[loop] = currbistresult[loop]; + } + } while (++itercount < 64); - if (lane_active == 2) { - Xil_Out32(0xFD40B004, (Xil_In32(0xFD40B004) & 0xFFFFFF1F)); - Xil_Out32(0xFD40B068, 0x1); - Xil_Out32(0xFD40B06C, 0x1); - Xil_Out32(0xFD4090AC, 0x0020); - Xil_Out32(0xFD40B008, 0x0); - Xil_Out32(0xFD40B00C, 0xF4); - Xil_Out32(0xFD40B010, 0x0); - Xil_Out32(0xFD40B014, 0x0); - Xil_Out32(0xFD40B018, 0x00); - Xil_Out32(0xFD40B01C, 0xFB); - Xil_Out32(0xFD40B020, 0xFF); - Xil_Out32(0xFD40B024, 0x0); - Xil_Out32(0xFD40B028, 0x00); - Xil_Out32(0xFD40B02C, 0x00); - Xil_Out32(0xFD40B030, 0x4A); - Xil_Out32(0xFD40B034, 0x4A); - Xil_Out32(0xFD40B038, 0x4A); - Xil_Out32(0xFD40B03C, 0x4A); - Xil_Out32(0xFD40B040, 0x0); - Xil_Out32(0xFD40B044, 0x14); - Xil_Out32(0xFD40B048, 0x02); - Xil_Out32(0xFD40B004, (Xil_In32(0xFD40B004) & 0xFFFFFF1F)); - } + for (loop = 0; loop <= 3; loop++) { + if (lane0_active == 0 && loop == 0) + continue; + if (lane1_active == 0 && loop == 1) + continue; + if (lane2_active == 0 && loop == 2) + continue; + if (lane3_active == 0 && loop == 3) + continue; - if (lane_active == 3) { - Xil_Out32(0xFD40F004, (Xil_In32(0xFD40F004) & 0xFFFFFF1F)); - Xil_Out32(0xFD40F068, 0x1); - Xil_Out32(0xFD40F06C, 0x1); - Xil_Out32(0xFD40D0AC, 0x0020); - Xil_Out32(0xFD40F008, 0x0); - Xil_Out32(0xFD40F00C, 0xF4); - Xil_Out32(0xFD40F010, 0x0); - Xil_Out32(0xFD40F014, 0x0); - Xil_Out32(0xFD40F018, 0x00); - Xil_Out32(0xFD40F01C, 0xFB); - Xil_Out32(0xFD40F020, 0xFF); - Xil_Out32(0xFD40F024, 0x0); - Xil_Out32(0xFD40F028, 0x00); - Xil_Out32(0xFD40F02C, 0x00); - Xil_Out32(0xFD40F030, 0x4A); - Xil_Out32(0xFD40F034, 0x4A); - Xil_Out32(0xFD40F038, 0x4A); - Xil_Out32(0xFD40F03C, 0x4A); - Xil_Out32(0xFD40F040, 0x0); - Xil_Out32(0xFD40F044, 0x14); - Xil_Out32(0xFD40F048, 0x02); - Xil_Out32(0xFD40F004, (Xil_In32(0xFD40F004) & 0xFFFFFF1F)); - } - return 1; -} + if (meancount[loop] == 0) + meancount[loop] = meancountalt[loop]; -static int serdes_bist_run(u32 lane_active) -{ - if (lane_active == 0) { - psu_mask_write(0xFD410044, 0x00000003U, 0x00000000U); - psu_mask_write(0xFD410040, 0x00000003U, 0x00000000U); - psu_mask_write(0xFD410038, 0x00000007U, 0x00000001U); - Xil_Out32(0xFD4010AC, 0x0020); - Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) | 0x1)); - } - if (lane_active == 1) { - psu_mask_write(0xFD410044, 0x0000000CU, 0x00000000U); - psu_mask_write(0xFD410040, 0x0000000CU, 0x00000000U); - psu_mask_write(0xFD410038, 0x00000070U, 0x00000010U); - Xil_Out32(0xFD4050AC, 0x0020); - Xil_Out32(0xFD407004, (Xil_In32(0xFD407004) | 0x1)); - } - if (lane_active == 2) { - psu_mask_write(0xFD410044, 0x00000030U, 0x00000000U); - psu_mask_write(0xFD410040, 0x00000030U, 0x00000000U); - psu_mask_write(0xFD41003C, 0x00000007U, 0x00000001U); - Xil_Out32(0xFD4090AC, 0x0020); - Xil_Out32(0xFD40B004, (Xil_In32(0xFD40B004) | 0x1)); + if (gen2_calib != 1) { + ill1_val[loop] = ((0x04 + meancount[loop] * 8) % 0x100); + ill12_val[loop] = + ((0x04 + meancount[loop] * 8) >= + 0x100) ? 0x10 : 0x00; + Xil_Out32(0xFFFE0000 + loop * 4, iterresult[loop]); + Xil_Out32(0xFFFE0010 + loop * 4, iterresult[loop + 4]); + Xil_Out32(0xFFFE0020 + loop * 4, bistpasscount[loop]); + Xil_Out32(0xFFFE0030 + loop * 4, meancount[loop]); + } + if (gen2_calib == 1) { + ill1_val[loop] = + ((0x104 + meancount[loop] * 8) % 0x100); + ill12_val[loop] = + ((0x104 + meancount[loop] * 8) >= + 0x200) ? 0x02 : 0x01; + Xil_Out32(0xFFFE0040 + loop * 4, iterresult[loop]); + Xil_Out32(0xFFFE0050 + loop * 4, iterresult[loop + 4]); + Xil_Out32(0xFFFE0060 + loop * 4, bistpasscount[loop]); + Xil_Out32(0xFFFE0070 + loop * 4, meancount[loop]); + } } - if (lane_active == 3) { - psu_mask_write(0xFD410040, 0x000000C0U, 0x00000000U); - psu_mask_write(0xFD410044, 0x000000C0U, 0x00000000U); - psu_mask_write(0xFD41003C, 0x00000070U, 0x00000010U); - Xil_Out32(0xFD40D0AC, 0x0020); - Xil_Out32(0xFD40F004, (Xil_In32(0xFD40F004) | 0x1)); + if (gen2_calib != 1) { + if (lane0_active == 1) + Xil_Out32(0xFD401924, ill1_val[0]); + if (lane0_active == 1) + psu_mask_write(0xFD401990, 0x000000F0U, ill12_val[0]); + if (lane1_active == 1) + Xil_Out32(0xFD405924, ill1_val[1]); + if (lane1_active == 1) + psu_mask_write(0xFD405990, 0x000000F0U, ill12_val[1]); + if (lane2_active == 1) + Xil_Out32(0xFD409924, ill1_val[2]); + if (lane2_active == 1) + psu_mask_write(0xFD409990, 0x000000F0U, ill12_val[2]); + if (lane3_active == 1) + Xil_Out32(0xFD40D924, ill1_val[3]); + if (lane3_active == 1) + psu_mask_write(0xFD40D990, 0x000000F0U, ill12_val[3]); + } + if (gen2_calib == 1) { + if (lane0_active == 1) + Xil_Out32(0xFD401928, ill1_val[0]); + if (lane0_active == 1) + psu_mask_write(0xFD401990, 0x0000000FU, ill12_val[0]); + if (lane1_active == 1) + Xil_Out32(0xFD405928, ill1_val[1]); + if (lane1_active == 1) + psu_mask_write(0xFD405990, 0x0000000FU, ill12_val[1]); + if (lane2_active == 1) + Xil_Out32(0xFD409928, ill1_val[2]); + if (lane2_active == 1) + psu_mask_write(0xFD409990, 0x0000000FU, ill12_val[2]); + if (lane3_active == 1) + Xil_Out32(0xFD40D928, ill1_val[3]); + if (lane3_active == 1) + psu_mask_write(0xFD40D990, 0x0000000FU, ill12_val[3]); } - mask_delay(100); - return 1; -} -static int serdes_bist_result(u32 lane_active) -{ - u32 pkt_cnt_l0, pkt_cnt_h0, err_cnt_l0, err_cnt_h0; + if (lane0_active == 1) + psu_mask_write(0xFD401018, 0x00000030U, 0x00000000U); + if (lane1_active == 1) + psu_mask_write(0xFD405018, 0x00000030U, 0x00000000U); + if (lane2_active == 1) + psu_mask_write(0xFD409018, 0x00000030U, 0x00000000U); + if (lane3_active == 1) + psu_mask_write(0xFD40D018, 0x00000030U, 0x00000000U); - if (lane_active == 0) { - pkt_cnt_l0 = Xil_In32(0xFD40304C); - pkt_cnt_h0 = Xil_In32(0xFD403050); - err_cnt_l0 = Xil_In32(0xFD403054); - err_cnt_h0 = Xil_In32(0xFD403058); - } - if (lane_active == 1) { - pkt_cnt_l0 = Xil_In32(0xFD40704C); - pkt_cnt_h0 = Xil_In32(0xFD407050); - err_cnt_l0 = Xil_In32(0xFD407054); - err_cnt_h0 = Xil_In32(0xFD407058); - } - if (lane_active == 2) { - pkt_cnt_l0 = Xil_In32(0xFD40B04C); - pkt_cnt_h0 = Xil_In32(0xFD40B050); - err_cnt_l0 = Xil_In32(0xFD40B054); - err_cnt_h0 = Xil_In32(0xFD40B058); + Xil_Out32(0xFD410098, 0); + if (lane0_active == 1) { + Xil_Out32(0xFD403004, 0); + Xil_Out32(0xFD403008, 0); + Xil_Out32(0xFD40300C, 0); + Xil_Out32(0xFD403010, 0); + Xil_Out32(0xFD403014, 0); + Xil_Out32(0xFD403018, 0); + Xil_Out32(0xFD40301C, 0); + Xil_Out32(0xFD403020, 0); + Xil_Out32(0xFD403024, 0); + Xil_Out32(0xFD403028, 0); + Xil_Out32(0xFD40302C, 0); + Xil_Out32(0xFD403030, 0); + Xil_Out32(0xFD403034, 0); + Xil_Out32(0xFD403038, 0); + Xil_Out32(0xFD40303C, 0); + Xil_Out32(0xFD403040, 0); + Xil_Out32(0xFD403044, 0); + Xil_Out32(0xFD403048, 0); + Xil_Out32(0xFD40304C, 0); + Xil_Out32(0xFD403050, 0); + Xil_Out32(0xFD403054, 0); + Xil_Out32(0xFD403058, 0); + Xil_Out32(0xFD403068, 1); + Xil_Out32(0xFD40306C, 0); + Xil_Out32(0xFD4010AC, 0); + psu_mask_write(0xFD410044, 0x00000003U, 0x00000001U); + psu_mask_write(0xFD410040, 0x00000003U, 0x00000001U); + psu_mask_write(0xFD410038, 0x00000007U, 0x00000000U); } - if (lane_active == 3) { - pkt_cnt_l0 = Xil_In32(0xFD40F04C); - pkt_cnt_h0 = Xil_In32(0xFD40F050); - err_cnt_l0 = Xil_In32(0xFD40F054); - err_cnt_h0 = Xil_In32(0xFD40F058); + if (lane1_active == 1) { + Xil_Out32(0xFD407004, 0); + Xil_Out32(0xFD407008, 0); + Xil_Out32(0xFD40700C, 0); + Xil_Out32(0xFD407010, 0); + Xil_Out32(0xFD407014, 0); + Xil_Out32(0xFD407018, 0); + Xil_Out32(0xFD40701C, 0); + Xil_Out32(0xFD407020, 0); + Xil_Out32(0xFD407024, 0); + Xil_Out32(0xFD407028, 0); + Xil_Out32(0xFD40702C, 0); + Xil_Out32(0xFD407030, 0); + Xil_Out32(0xFD407034, 0); + Xil_Out32(0xFD407038, 0); + Xil_Out32(0xFD40703C, 0); + Xil_Out32(0xFD407040, 0); + Xil_Out32(0xFD407044, 0); + Xil_Out32(0xFD407048, 0); + Xil_Out32(0xFD40704C, 0); + Xil_Out32(0xFD407050, 0); + Xil_Out32(0xFD407054, 0); + Xil_Out32(0xFD407058, 0); + Xil_Out32(0xFD407068, 1); + Xil_Out32(0xFD40706C, 0); + Xil_Out32(0xFD4050AC, 0); + psu_mask_write(0xFD410044, 0x0000000CU, 0x00000004U); + psu_mask_write(0xFD410040, 0x0000000CU, 0x00000004U); + psu_mask_write(0xFD410038, 0x00000070U, 0x00000000U); } - if (lane_active == 0) - Xil_Out32(0xFD403004, 0x0); - if (lane_active == 1) - Xil_Out32(0xFD407004, 0x0); - if (lane_active == 2) - Xil_Out32(0xFD40B004, 0x0); - if (lane_active == 3) - Xil_Out32(0xFD40F004, 0x0); - if (err_cnt_l0 > 0 || err_cnt_h0 > 0 || - (pkt_cnt_l0 == 0 && pkt_cnt_h0 == 0)) - return 0; - return 1; -} - -static int serdes_illcalib_pcie_gen1(u32 lane3_protocol, u32 lane3_rate, - u32 lane2_protocol, u32 lane2_rate, - u32 lane1_protocol, u32 lane1_rate, - u32 lane0_protocol, u32 lane0_rate, - u32 gen2_calib) -{ - u64 tempbistresult; - u32 currbistresult[4]; - u32 prevbistresult[4]; - u32 itercount = 0; - u32 ill12_val[4], ill1_val[4]; - u32 loop = 0; - u32 iterresult[8]; - u32 meancount[4]; - u32 bistpasscount[4]; - u32 meancountalt[4]; - u32 meancountalt_bistpasscount[4]; - u32 lane0_active; - u32 lane1_active; - u32 lane2_active; - u32 lane3_active; - - lane0_active = (lane0_protocol == 1); - lane1_active = (lane1_protocol == 1); - lane2_active = (lane2_protocol == 1); - lane3_active = (lane3_protocol == 1); - for (loop = 0; loop <= 3; loop++) { - iterresult[loop] = 0; - iterresult[loop + 4] = 0; - meancountalt[loop] = 0; - meancountalt_bistpasscount[loop] = 0; - meancount[loop] = 0; - prevbistresult[loop] = 0; - bistpasscount[loop] = 0; + if (lane2_active == 1) { + Xil_Out32(0xFD40B004, 0); + Xil_Out32(0xFD40B008, 0); + Xil_Out32(0xFD40B00C, 0); + Xil_Out32(0xFD40B010, 0); + Xil_Out32(0xFD40B014, 0); + Xil_Out32(0xFD40B018, 0); + Xil_Out32(0xFD40B01C, 0); + Xil_Out32(0xFD40B020, 0); + Xil_Out32(0xFD40B024, 0); + Xil_Out32(0xFD40B028, 0); + Xil_Out32(0xFD40B02C, 0); + Xil_Out32(0xFD40B030, 0); + Xil_Out32(0xFD40B034, 0); + Xil_Out32(0xFD40B038, 0); + Xil_Out32(0xFD40B03C, 0); + Xil_Out32(0xFD40B040, 0); + Xil_Out32(0xFD40B044, 0); + Xil_Out32(0xFD40B048, 0); + Xil_Out32(0xFD40B04C, 0); + Xil_Out32(0xFD40B050, 0); + Xil_Out32(0xFD40B054, 0); + Xil_Out32(0xFD40B058, 0); + Xil_Out32(0xFD40B068, 1); + Xil_Out32(0xFD40B06C, 0); + Xil_Out32(0xFD4090AC, 0); + psu_mask_write(0xFD410044, 0x00000030U, 0x00000010U); + psu_mask_write(0xFD410040, 0x00000030U, 0x00000010U); + psu_mask_write(0xFD41003C, 0x00000007U, 0x00000000U); } - itercount = 0; - if (lane0_active) - serdes_bist_static_settings(0); - if (lane1_active) - serdes_bist_static_settings(1); - if (lane2_active) - serdes_bist_static_settings(2); - if (lane3_active) - serdes_bist_static_settings(3); - do { - if (gen2_calib != 1) { - if (lane0_active == 1) - ill1_val[0] = ((0x04 + itercount * 8) % 0x100); - if (lane0_active == 1) - ill12_val[0] = - ((0x04 + itercount * 8) >= - 0x100) ? 0x10 : 0x00; - if (lane1_active == 1) - ill1_val[1] = ((0x04 + itercount * 8) % 0x100); - if (lane1_active == 1) - ill12_val[1] = - ((0x04 + itercount * 8) >= - 0x100) ? 0x10 : 0x00; - if (lane2_active == 1) - ill1_val[2] = ((0x04 + itercount * 8) % 0x100); - if (lane2_active == 1) - ill12_val[2] = - ((0x04 + itercount * 8) >= - 0x100) ? 0x10 : 0x00; - if (lane3_active == 1) - ill1_val[3] = ((0x04 + itercount * 8) % 0x100); - if (lane3_active == 1) - ill12_val[3] = - ((0x04 + itercount * 8) >= - 0x100) ? 0x10 : 0x00; + if (lane3_active == 1) { + Xil_Out32(0xFD40F004, 0); + Xil_Out32(0xFD40F008, 0); + Xil_Out32(0xFD40F00C, 0); + Xil_Out32(0xFD40F010, 0); + Xil_Out32(0xFD40F014, 0); + Xil_Out32(0xFD40F018, 0); + Xil_Out32(0xFD40F01C, 0); + Xil_Out32(0xFD40F020, 0); + Xil_Out32(0xFD40F024, 0); + Xil_Out32(0xFD40F028, 0); + Xil_Out32(0xFD40F02C, 0); + Xil_Out32(0xFD40F030, 0); + Xil_Out32(0xFD40F034, 0); + Xil_Out32(0xFD40F038, 0); + Xil_Out32(0xFD40F03C, 0); + Xil_Out32(0xFD40F040, 0); + Xil_Out32(0xFD40F044, 0); + Xil_Out32(0xFD40F048, 0); + Xil_Out32(0xFD40F04C, 0); + Xil_Out32(0xFD40F050, 0); + Xil_Out32(0xFD40F054, 0); + Xil_Out32(0xFD40F058, 0); + Xil_Out32(0xFD40F068, 1); + Xil_Out32(0xFD40F06C, 0); + Xil_Out32(0xFD40D0AC, 0); + psu_mask_write(0xFD410044, 0x000000C0U, 0x00000040U); + psu_mask_write(0xFD410040, 0x000000C0U, 0x00000040U); + psu_mask_write(0xFD41003C, 0x00000070U, 0x00000000U); + } + return 1; +} - if (lane0_active == 1) - Xil_Out32(0xFD401924, ill1_val[0]); - if (lane0_active == 1) - psu_mask_write(0xFD401990, 0x000000F0U, - ill12_val[0]); - if (lane1_active == 1) - Xil_Out32(0xFD405924, ill1_val[1]); - if (lane1_active == 1) - psu_mask_write(0xFD405990, 0x000000F0U, - ill12_val[1]); - if (lane2_active == 1) - Xil_Out32(0xFD409924, ill1_val[2]); - if (lane2_active == 1) - psu_mask_write(0xFD409990, 0x000000F0U, - ill12_val[2]); - if (lane3_active == 1) - Xil_Out32(0xFD40D924, ill1_val[3]); - if (lane3_active == 1) - psu_mask_write(0xFD40D990, 0x000000F0U, - ill12_val[3]); - } - if (gen2_calib == 1) { - if (lane0_active == 1) - ill1_val[0] = ((0x104 + itercount * 8) % 0x100); - if (lane0_active == 1) - ill12_val[0] = - ((0x104 + itercount * 8) >= - 0x200) ? 0x02 : 0x01; - if (lane1_active == 1) - ill1_val[1] = ((0x104 + itercount * 8) % 0x100); - if (lane1_active == 1) - ill12_val[1] = - ((0x104 + itercount * 8) >= - 0x200) ? 0x02 : 0x01; - if (lane2_active == 1) - ill1_val[2] = ((0x104 + itercount * 8) % 0x100); - if (lane2_active == 1) - ill12_val[2] = - ((0x104 + itercount * 8) >= - 0x200) ? 0x02 : 0x01; - if (lane3_active == 1) - ill1_val[3] = ((0x104 + itercount * 8) % 0x100); - if (lane3_active == 1) - ill12_val[3] = - ((0x104 + itercount * 8) >= - 0x200) ? 0x02 : 0x01; +static int serdes_illcalib(u32 lane3_protocol, u32 lane3_rate, + u32 lane2_protocol, u32 lane2_rate, + u32 lane1_protocol, u32 lane1_rate, + u32 lane0_protocol, u32 lane0_rate) +{ + unsigned int rdata = 0; + unsigned int sata_gen2 = 1; + unsigned int temp_ill12 = 0; + unsigned int temp_PLL_REF_SEL_OFFSET; + unsigned int temp_TM_IQ_ILL1; + unsigned int temp_TM_E_ILL1; + unsigned int temp_tx_dig_tm_61; + unsigned int temp_tm_dig_6; + unsigned int temp_pll_fbdiv_frac_3_msb_offset; - if (lane0_active == 1) - Xil_Out32(0xFD401928, ill1_val[0]); - if (lane0_active == 1) - psu_mask_write(0xFD401990, 0x0000000FU, - ill12_val[0]); - if (lane1_active == 1) - Xil_Out32(0xFD405928, ill1_val[1]); - if (lane1_active == 1) - psu_mask_write(0xFD405990, 0x0000000FU, - ill12_val[1]); - if (lane2_active == 1) - Xil_Out32(0xFD409928, ill1_val[2]); - if (lane2_active == 1) - psu_mask_write(0xFD409990, 0x0000000FU, - ill12_val[2]); - if (lane3_active == 1) - Xil_Out32(0xFD40D928, ill1_val[3]); - if (lane3_active == 1) - psu_mask_write(0xFD40D990, 0x0000000FU, - ill12_val[3]); - } + if (lane0_protocol == 2 || lane0_protocol == 1) { + Xil_Out32(0xFD401910, 0xF3); + Xil_Out32(0xFD40193C, 0xF3); + Xil_Out32(0xFD401914, 0xF3); + Xil_Out32(0xFD401940, 0xF3); + } + if (lane1_protocol == 2 || lane1_protocol == 1) { + Xil_Out32(0xFD405910, 0xF3); + Xil_Out32(0xFD40593C, 0xF3); + Xil_Out32(0xFD405914, 0xF3); + Xil_Out32(0xFD405940, 0xF3); + } + if (lane2_protocol == 2 || lane2_protocol == 1) { + Xil_Out32(0xFD409910, 0xF3); + Xil_Out32(0xFD40993C, 0xF3); + Xil_Out32(0xFD409914, 0xF3); + Xil_Out32(0xFD409940, 0xF3); + } + if (lane3_protocol == 2 || lane3_protocol == 1) { + Xil_Out32(0xFD40D910, 0xF3); + Xil_Out32(0xFD40D93C, 0xF3); + Xil_Out32(0xFD40D914, 0xF3); + Xil_Out32(0xFD40D940, 0xF3); + } - if (lane0_active == 1) - psu_mask_write(0xFD401018, 0x00000030U, 0x00000010U); - if (lane1_active == 1) - psu_mask_write(0xFD405018, 0x00000030U, 0x00000010U); - if (lane2_active == 1) - psu_mask_write(0xFD409018, 0x00000030U, 0x00000010U); - if (lane3_active == 1) - psu_mask_write(0xFD40D018, 0x00000030U, 0x00000010U); - if (lane0_active == 1) - currbistresult[0] = 0; - if (lane1_active == 1) - currbistresult[1] = 0; - if (lane2_active == 1) - currbistresult[2] = 0; - if (lane3_active == 1) - currbistresult[3] = 0; - serdes_rst_seq(lane3_protocol, lane3_rate, lane2_protocol, - lane2_rate, lane1_protocol, lane1_rate, - lane0_protocol, lane0_rate); - if (lane3_active == 1) - serdes_bist_run(3); - if (lane2_active == 1) - serdes_bist_run(2); - if (lane1_active == 1) - serdes_bist_run(1); - if (lane0_active == 1) - serdes_bist_run(0); - tempbistresult = 0; - if (lane3_active == 1) - tempbistresult = tempbistresult | serdes_bist_result(3); - tempbistresult = tempbistresult << 1; - if (lane2_active == 1) - tempbistresult = tempbistresult | serdes_bist_result(2); - tempbistresult = tempbistresult << 1; - if (lane1_active == 1) - tempbistresult = tempbistresult | serdes_bist_result(1); - tempbistresult = tempbistresult << 1; - if (lane0_active == 1) - tempbistresult = tempbistresult | serdes_bist_result(0); - Xil_Out32(0xFD410098, 0x0); - Xil_Out32(0xFD410098, 0x2); + if (sata_gen2 == 1) { + if (lane0_protocol == 2) { + temp_pll_fbdiv_frac_3_msb_offset = Xil_In32(0xFD402360); + Xil_Out32(0xFD402360, 0x0); + temp_PLL_REF_SEL_OFFSET = Xil_In32(0xFD410000); + psu_mask_write(0xFD410000, 0x0000001FU, 0x0000000DU); + temp_TM_IQ_ILL1 = Xil_In32(0xFD4018F8); + temp_TM_E_ILL1 = Xil_In32(0xFD401924); + Xil_Out32(0xFD4018F8, 0x78); + temp_tx_dig_tm_61 = Xil_In32(0xFD4000F4); + temp_tm_dig_6 = Xil_In32(0xFD40106C); + psu_mask_write(0xFD4000F4, 0x0000000BU, 0x00000000U); + psu_mask_write(0xFD40106C, 0x0000000FU, 0x00000000U); + temp_ill12 = Xil_In32(0xFD401990) & 0xF0; - if (itercount < 32) { - iterresult[0] = - ((iterresult[0] << 1) | - ((tempbistresult & 0x1) == 0x1)); - iterresult[1] = - ((iterresult[1] << 1) | - ((tempbistresult & 0x2) == 0x2)); - iterresult[2] = - ((iterresult[2] << 1) | - ((tempbistresult & 0x4) == 0x4)); - iterresult[3] = - ((iterresult[3] << 1) | - ((tempbistresult & 0x8) == 0x8)); - } else { - iterresult[4] = - ((iterresult[4] << 1) | - ((tempbistresult & 0x1) == 0x1)); - iterresult[5] = - ((iterresult[5] << 1) | - ((tempbistresult & 0x2) == 0x2)); - iterresult[6] = - ((iterresult[6] << 1) | - ((tempbistresult & 0x4) == 0x4)); - iterresult[7] = - ((iterresult[7] << 1) | - ((tempbistresult & 0x8) == 0x8)); - } - currbistresult[0] = - currbistresult[0] | ((tempbistresult & 0x1) == 1); - currbistresult[1] = - currbistresult[1] | ((tempbistresult & 0x2) == 0x2); - currbistresult[2] = - currbistresult[2] | ((tempbistresult & 0x4) == 0x4); - currbistresult[3] = - currbistresult[3] | ((tempbistresult & 0x8) == 0x8); + serdes_illcalib_pcie_gen1(0, 0, 0, 0, 0, 0, 1, 0, 0); - for (loop = 0; loop <= 3; loop++) { - if (currbistresult[loop] == 1 && prevbistresult[loop] == 1) - bistpasscount[loop] = bistpasscount[loop] + 1; - if (bistpasscount[loop] < 4 && currbistresult[loop] == 0 && - itercount > 2) { - if (meancountalt_bistpasscount[loop] < - bistpasscount[loop]) { - meancountalt_bistpasscount[loop] = - bistpasscount[loop]; - meancountalt[loop] = - ((itercount - 1) - - ((bistpasscount[loop] + 1) / 2)); - } - bistpasscount[loop] = 0; - } - if (meancount[loop] == 0 && bistpasscount[loop] >= 4 && - (currbistresult[loop] == 0 || itercount == 63) && - prevbistresult[loop] == 1) - meancount[loop] = - (itercount - 1) - - ((bistpasscount[loop] + 1) / 2); - prevbistresult[loop] = currbistresult[loop]; + Xil_Out32(0xFD402360, temp_pll_fbdiv_frac_3_msb_offset); + Xil_Out32(0xFD41000C, temp_PLL_REF_SEL_OFFSET); + Xil_Out32(0xFD4018F8, temp_TM_IQ_ILL1); + Xil_Out32(0xFD4000F4, temp_tx_dig_tm_61); + Xil_Out32(0xFD40106C, temp_tm_dig_6); + Xil_Out32(0xFD401928, Xil_In32(0xFD401924)); + temp_ill12 = + temp_ill12 | (Xil_In32(0xFD401990) >> 4 & 0xF); + Xil_Out32(0xFD401990, temp_ill12); + Xil_Out32(0xFD401924, temp_TM_E_ILL1); } - } while (++itercount < 64); + if (lane1_protocol == 2) { + temp_pll_fbdiv_frac_3_msb_offset = Xil_In32(0xFD406360); + Xil_Out32(0xFD406360, 0x0); + temp_PLL_REF_SEL_OFFSET = Xil_In32(0xFD410004); + psu_mask_write(0xFD410004, 0x0000001FU, 0x0000000DU); + temp_TM_IQ_ILL1 = Xil_In32(0xFD4058F8); + temp_TM_E_ILL1 = Xil_In32(0xFD405924); + Xil_Out32(0xFD4058F8, 0x78); + temp_tx_dig_tm_61 = Xil_In32(0xFD4040F4); + temp_tm_dig_6 = Xil_In32(0xFD40506C); + psu_mask_write(0xFD4040F4, 0x0000000BU, 0x00000000U); + psu_mask_write(0xFD40506C, 0x0000000FU, 0x00000000U); + temp_ill12 = Xil_In32(0xFD405990) & 0xF0; - for (loop = 0; loop <= 3; loop++) { - if (lane0_active == 0 && loop == 0) - continue; - if (lane1_active == 0 && loop == 1) - continue; - if (lane2_active == 0 && loop == 2) - continue; - if (lane3_active == 0 && loop == 3) - continue; + serdes_illcalib_pcie_gen1(0, 0, 0, 0, 1, 0, 0, 0, 0); - if (meancount[loop] == 0) - meancount[loop] = meancountalt[loop]; + Xil_Out32(0xFD406360, temp_pll_fbdiv_frac_3_msb_offset); + Xil_Out32(0xFD41000C, temp_PLL_REF_SEL_OFFSET); + Xil_Out32(0xFD4058F8, temp_TM_IQ_ILL1); + Xil_Out32(0xFD4040F4, temp_tx_dig_tm_61); + Xil_Out32(0xFD40506C, temp_tm_dig_6); + Xil_Out32(0xFD405928, Xil_In32(0xFD405924)); + temp_ill12 = + temp_ill12 | (Xil_In32(0xFD405990) >> 4 & 0xF); + Xil_Out32(0xFD405990, temp_ill12); + Xil_Out32(0xFD405924, temp_TM_E_ILL1); + } + if (lane2_protocol == 2) { + temp_pll_fbdiv_frac_3_msb_offset = Xil_In32(0xFD40A360); + Xil_Out32(0xFD40A360, 0x0); + temp_PLL_REF_SEL_OFFSET = Xil_In32(0xFD410008); + psu_mask_write(0xFD410008, 0x0000001FU, 0x0000000DU); + temp_TM_IQ_ILL1 = Xil_In32(0xFD4098F8); + temp_TM_E_ILL1 = Xil_In32(0xFD409924); + Xil_Out32(0xFD4098F8, 0x78); + temp_tx_dig_tm_61 = Xil_In32(0xFD4080F4); + temp_tm_dig_6 = Xil_In32(0xFD40906C); + psu_mask_write(0xFD4080F4, 0x0000000BU, 0x00000000U); + psu_mask_write(0xFD40906C, 0x0000000FU, 0x00000000U); + temp_ill12 = Xil_In32(0xFD409990) & 0xF0; - if (gen2_calib != 1) { - ill1_val[loop] = ((0x04 + meancount[loop] * 8) % 0x100); - ill12_val[loop] = - ((0x04 + meancount[loop] * 8) >= - 0x100) ? 0x10 : 0x00; - Xil_Out32(0xFFFE0000 + loop * 4, iterresult[loop]); - Xil_Out32(0xFFFE0010 + loop * 4, iterresult[loop + 4]); - Xil_Out32(0xFFFE0020 + loop * 4, bistpasscount[loop]); - Xil_Out32(0xFFFE0030 + loop * 4, meancount[loop]); + serdes_illcalib_pcie_gen1(0, 0, 1, 0, 0, 0, 0, 0, 0); + + Xil_Out32(0xFD40A360, temp_pll_fbdiv_frac_3_msb_offset); + Xil_Out32(0xFD41000C, temp_PLL_REF_SEL_OFFSET); + Xil_Out32(0xFD4098F8, temp_TM_IQ_ILL1); + Xil_Out32(0xFD4080F4, temp_tx_dig_tm_61); + Xil_Out32(0xFD40906C, temp_tm_dig_6); + Xil_Out32(0xFD409928, Xil_In32(0xFD409924)); + temp_ill12 = + temp_ill12 | (Xil_In32(0xFD409990) >> 4 & 0xF); + Xil_Out32(0xFD409990, temp_ill12); + Xil_Out32(0xFD409924, temp_TM_E_ILL1); } - if (gen2_calib == 1) { - ill1_val[loop] = - ((0x104 + meancount[loop] * 8) % 0x100); - ill12_val[loop] = - ((0x104 + meancount[loop] * 8) >= - 0x200) ? 0x02 : 0x01; - Xil_Out32(0xFFFE0040 + loop * 4, iterresult[loop]); - Xil_Out32(0xFFFE0050 + loop * 4, iterresult[loop + 4]); - Xil_Out32(0xFFFE0060 + loop * 4, bistpasscount[loop]); - Xil_Out32(0xFFFE0070 + loop * 4, meancount[loop]); + if (lane3_protocol == 2) { + temp_pll_fbdiv_frac_3_msb_offset = Xil_In32(0xFD40E360); + Xil_Out32(0xFD40E360, 0x0); + temp_PLL_REF_SEL_OFFSET = Xil_In32(0xFD41000C); + psu_mask_write(0xFD41000C, 0x0000001FU, 0x0000000DU); + temp_TM_IQ_ILL1 = Xil_In32(0xFD40D8F8); + temp_TM_E_ILL1 = Xil_In32(0xFD40D924); + Xil_Out32(0xFD40D8F8, 0x78); + temp_tx_dig_tm_61 = Xil_In32(0xFD40C0F4); + temp_tm_dig_6 = Xil_In32(0xFD40D06C); + psu_mask_write(0xFD40C0F4, 0x0000000BU, 0x00000000U); + psu_mask_write(0xFD40D06C, 0x0000000FU, 0x00000000U); + temp_ill12 = Xil_In32(0xFD40D990) & 0xF0; + + serdes_illcalib_pcie_gen1(1, 0, 0, 0, 0, 0, 0, 0, 0); + + Xil_Out32(0xFD40E360, temp_pll_fbdiv_frac_3_msb_offset); + Xil_Out32(0xFD41000C, temp_PLL_REF_SEL_OFFSET); + Xil_Out32(0xFD40D8F8, temp_TM_IQ_ILL1); + Xil_Out32(0xFD40C0F4, temp_tx_dig_tm_61); + Xil_Out32(0xFD40D06C, temp_tm_dig_6); + Xil_Out32(0xFD40D928, Xil_In32(0xFD40D924)); + temp_ill12 = + temp_ill12 | (Xil_In32(0xFD40D990) >> 4 & 0xF); + Xil_Out32(0xFD40D990, temp_ill12); + Xil_Out32(0xFD40D924, temp_TM_E_ILL1); } + rdata = Xil_In32(0xFD410098); + rdata = (rdata & 0xDF); + Xil_Out32(0xFD410098, rdata); } - if (gen2_calib != 1) { - if (lane0_active == 1) - Xil_Out32(0xFD401924, ill1_val[0]); - if (lane0_active == 1) - psu_mask_write(0xFD401990, 0x000000F0U, ill12_val[0]); - if (lane1_active == 1) - Xil_Out32(0xFD405924, ill1_val[1]); - if (lane1_active == 1) - psu_mask_write(0xFD405990, 0x000000F0U, ill12_val[1]); - if (lane2_active == 1) - Xil_Out32(0xFD409924, ill1_val[2]); - if (lane2_active == 1) - psu_mask_write(0xFD409990, 0x000000F0U, ill12_val[2]); - if (lane3_active == 1) - Xil_Out32(0xFD40D924, ill1_val[3]); - if (lane3_active == 1) - psu_mask_write(0xFD40D990, 0x000000F0U, ill12_val[3]); + + if (lane0_protocol == 2 && lane0_rate == 3) { + psu_mask_write(0xFD40198C, 0x000000F0U, 0x00000020U); + psu_mask_write(0xFD40192C, 0x000000FFU, 0x00000094U); } - if (gen2_calib == 1) { - if (lane0_active == 1) - Xil_Out32(0xFD401928, ill1_val[0]); - if (lane0_active == 1) - psu_mask_write(0xFD401990, 0x0000000FU, ill12_val[0]); - if (lane1_active == 1) - Xil_Out32(0xFD405928, ill1_val[1]); - if (lane1_active == 1) - psu_mask_write(0xFD405990, 0x0000000FU, ill12_val[1]); - if (lane2_active == 1) - Xil_Out32(0xFD409928, ill1_val[2]); - if (lane2_active == 1) - psu_mask_write(0xFD409990, 0x0000000FU, ill12_val[2]); - if (lane3_active == 1) - Xil_Out32(0xFD40D928, ill1_val[3]); - if (lane3_active == 1) - psu_mask_write(0xFD40D990, 0x0000000FU, ill12_val[3]); + if (lane1_protocol == 2 && lane1_rate == 3) { + psu_mask_write(0xFD40598C, 0x000000F0U, 0x00000020U); + psu_mask_write(0xFD40592C, 0x000000FFU, 0x00000094U); + } + if (lane2_protocol == 2 && lane2_rate == 3) { + psu_mask_write(0xFD40998C, 0x000000F0U, 0x00000020U); + psu_mask_write(0xFD40992C, 0x000000FFU, 0x00000094U); + } + if (lane3_protocol == 2 && lane3_rate == 3) { + psu_mask_write(0xFD40D98C, 0x000000F0U, 0x00000020U); + psu_mask_write(0xFD40D92C, 0x000000FFU, 0x00000094U); + } + + if (lane0_protocol == 1) { + if (lane0_rate == 0) { + serdes_illcalib_pcie_gen1(lane3_protocol, lane3_rate, + lane2_protocol, lane2_rate, + lane1_protocol, lane1_rate, + lane0_protocol, 0, 0); + } else { + serdes_illcalib_pcie_gen1(lane3_protocol, lane3_rate, + lane2_protocol, lane2_rate, + lane1_protocol, lane1_rate, + lane0_protocol, 0, 0); + serdes_illcalib_pcie_gen1(lane3_protocol, lane3_rate, + lane2_protocol, lane2_rate, + lane1_protocol, lane1_rate, + lane0_protocol, lane0_rate, + 1); + } } - if (lane0_active == 1) - psu_mask_write(0xFD401018, 0x00000030U, 0x00000000U); - if (lane1_active == 1) - psu_mask_write(0xFD405018, 0x00000030U, 0x00000000U); - if (lane2_active == 1) - psu_mask_write(0xFD409018, 0x00000030U, 0x00000000U); - if (lane3_active == 1) - psu_mask_write(0xFD40D018, 0x00000030U, 0x00000000U); + if (lane0_protocol == 3) + Xil_Out32(0xFD401914, 0xF3); + if (lane0_protocol == 3) + Xil_Out32(0xFD401940, 0xF3); + if (lane0_protocol == 3) + Xil_Out32(0xFD401990, 0x20); + if (lane0_protocol == 3) + Xil_Out32(0xFD401924, 0x37); + + if (lane1_protocol == 3) + Xil_Out32(0xFD405914, 0xF3); + if (lane1_protocol == 3) + Xil_Out32(0xFD405940, 0xF3); + if (lane1_protocol == 3) + Xil_Out32(0xFD405990, 0x20); + if (lane1_protocol == 3) + Xil_Out32(0xFD405924, 0x37); + + if (lane2_protocol == 3) + Xil_Out32(0xFD409914, 0xF3); + if (lane2_protocol == 3) + Xil_Out32(0xFD409940, 0xF3); + if (lane2_protocol == 3) + Xil_Out32(0xFD409990, 0x20); + if (lane2_protocol == 3) + Xil_Out32(0xFD409924, 0x37); + + if (lane3_protocol == 3) + Xil_Out32(0xFD40D914, 0xF3); + if (lane3_protocol == 3) + Xil_Out32(0xFD40D940, 0xF3); + if (lane3_protocol == 3) + Xil_Out32(0xFD40D990, 0x20); + if (lane3_protocol == 3) + Xil_Out32(0xFD40D924, 0x37); + + return 1; +} + +static unsigned long psu_pll_init_data(void) +{ + psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4B0C82U); + psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00015A00U); + psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000008U); + psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000001U); + psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000000U); + mask_poll(0xFF5E0040, 0x00000002U); + psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000000U); + psu_mask_write(0xFF5E0048, 0x00003F00U, 0x00000300U); + psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01012300U); + psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E4B0C82U); + psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00015A00U); + psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000008U); + psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000001U); + psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000000U); + mask_poll(0xFF5E0040, 0x00000001U); + psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000000U); + psu_mask_write(0xFF5E0044, 0x00003F00U, 0x00000300U); + psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U); + psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014800U); + psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000008U); + psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000000U); + mask_poll(0xFD1A0044, 0x00000001U); + psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000000U); + psu_mask_write(0xFD1A0048, 0x00003F00U, 0x00000300U); + psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U); + psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00013F00U); + psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000008U); + psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000000U); + mask_poll(0xFD1A0044, 0x00000002U); + psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000000U); + psu_mask_write(0xFD1A004C, 0x00003F00U, 0x00000200U); + psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E4B0C82U); + psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00015A00U); + psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000008U); + psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000000U); + mask_poll(0xFD1A0044, 0x00000004U); + psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000000U); + psu_mask_write(0xFD1A0050, 0x00003F00U, 0x00000300U); + + return 1; +} + +static unsigned long psu_clock_init_data(void) +{ + psu_mask_write(0xFF5E005C, 0x063F3F07U, 0x06010C00U); + psu_mask_write(0xFF5E0100, 0x013F3F07U, 0x01010600U); + psu_mask_write(0xFF5E0060, 0x023F3F07U, 0x02010600U); + psu_mask_write(0xFF5E004C, 0x023F3F07U, 0x02031900U); + psu_mask_write(0xFF5E0068, 0x013F3F07U, 0x01010C00U); + psu_mask_write(0xFF5E0070, 0x013F3F07U, 0x01010800U); + psu_mask_write(0xFF18030C, 0x00020000U, 0x00000000U); + psu_mask_write(0xFF5E0074, 0x013F3F07U, 0x01010F00U); + psu_mask_write(0xFF5E0120, 0x013F3F07U, 0x01010F00U); + psu_mask_write(0xFF5E0124, 0x013F3F07U, 0x01010F00U); + psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000302U); + psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000602U); + psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000800U); + psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U); + psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U); + psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U); + psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U); + psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010F00U); + psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011E02U); + psu_mask_write(0xFF5E0104, 0x00000007U, 0x00000000U); + psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000F00U); + psu_mask_write(0xFD1A00A0, 0x01003F07U, 0x01000200U); + psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U); + psu_mask_write(0xFD1A0068, 0x01003F07U, 0x01000200U); + psu_mask_write(0xFD1A0080, 0x00003F07U, 0x00000200U); + psu_mask_write(0xFD1A00B8, 0x01003F07U, 0x01000200U); + psu_mask_write(0xFD1A00BC, 0x01003F07U, 0x01000200U); + psu_mask_write(0xFD1A00C0, 0x01003F07U, 0x01000203U); + psu_mask_write(0xFD1A00C4, 0x01003F07U, 0x01000502U); + psu_mask_write(0xFD1A00F8, 0x00003F07U, 0x00000200U); + psu_mask_write(0xFF180380, 0x000000FFU, 0x00000000U); + psu_mask_write(0xFD610100, 0x00000001U, 0x00000000U); + psu_mask_write(0xFF180300, 0x00000001U, 0x00000000U); + psu_mask_write(0xFF410050, 0x00000001U, 0x00000000U); + + return 1; +} + +static unsigned long psu_ddr_init_data(void) +{ + psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000008U); + psu_mask_write(0xFD070000, 0xE30FBE3DU, 0x81040010U); + psu_mask_write(0xFD070010, 0x8000F03FU, 0x00000030U); + psu_mask_write(0xFD070020, 0x000003F3U, 0x00000200U); + psu_mask_write(0xFD070024, 0xFFFFFFFFU, 0x00800000U); + psu_mask_write(0xFD070030, 0x0000007FU, 0x00000000U); + psu_mask_write(0xFD070034, 0x00FFFF1FU, 0x00408210U); + psu_mask_write(0xFD070050, 0x00F1F1F4U, 0x00210000U); + psu_mask_write(0xFD070054, 0x0FFF0FFFU, 0x00000000U); + psu_mask_write(0xFD070060, 0x00000073U, 0x00000001U); + psu_mask_write(0xFD070064, 0x0FFF83FFU, 0x007F80B8U); + psu_mask_write(0xFD070070, 0x00000017U, 0x00000010U); + psu_mask_write(0xFD070074, 0x00000003U, 0x00000000U); + psu_mask_write(0xFD0700C4, 0x3F000391U, 0x10000200U); + psu_mask_write(0xFD0700C8, 0x01FF1F3FU, 0x0040051FU); + psu_mask_write(0xFD0700D0, 0xC3FF0FFFU, 0x00020102U); + psu_mask_write(0xFD0700D4, 0x01FF7F0FU, 0x00020000U); + psu_mask_write(0xFD0700D8, 0x0000FF0FU, 0x00002205U); + psu_mask_write(0xFD0700DC, 0xFFFFFFFFU, 0x07300301U); + psu_mask_write(0xFD0700E0, 0xFFFFFFFFU, 0x00100200U); + psu_mask_write(0xFD0700E4, 0x00FF03FFU, 0x00210004U); + psu_mask_write(0xFD0700E8, 0xFFFFFFFFU, 0x000006C0U); + psu_mask_write(0xFD0700EC, 0xFFFF0000U, 0x08190000U); + psu_mask_write(0xFD0700F0, 0x0000003FU, 0x00000010U); + psu_mask_write(0xFD0700F4, 0x00000FFFU, 0x0000066FU); + psu_mask_write(0xFD070100, 0x7F3F7F3FU, 0x0F102311U); + psu_mask_write(0xFD070104, 0x001F1F7FU, 0x00040419U); + psu_mask_write(0xFD070108, 0x3F3F3F3FU, 0x0608070CU); + psu_mask_write(0xFD07010C, 0x3FF3F3FFU, 0x0050400CU); + psu_mask_write(0xFD070110, 0x1F0F0F1FU, 0x08030409U); + psu_mask_write(0xFD070114, 0x0F0F3F1FU, 0x06060403U); + psu_mask_write(0xFD070118, 0x0F0F000FU, 0x01010004U); + psu_mask_write(0xFD07011C, 0x00000F0FU, 0x00000606U); + psu_mask_write(0xFD070120, 0x7F7F7F7FU, 0x04040D07U); + psu_mask_write(0xFD070124, 0x40070F3FU, 0x00020309U); + psu_mask_write(0xFD07012C, 0x7F1F031FU, 0x1207010EU); + psu_mask_write(0xFD070130, 0x00030F1FU, 0x00020608U); + psu_mask_write(0xFD070180, 0xF7FF03FFU, 0x81000040U); + psu_mask_write(0xFD070184, 0x3FFFFFFFU, 0x0201908AU); + psu_mask_write(0xFD070190, 0x1FBFBF3FU, 0x048B8208U); + psu_mask_write(0xFD070194, 0xF31F0F0FU, 0x00030304U); + psu_mask_write(0xFD070198, 0x0FF1F1F1U, 0x07000101U); + psu_mask_write(0xFD07019C, 0x000000F1U, 0x00000021U); + psu_mask_write(0xFD0701A0, 0xC3FF03FFU, 0x00400003U); + psu_mask_write(0xFD0701A4, 0x00FF00FFU, 0x00C800FFU); + psu_mask_write(0xFD0701B0, 0x00000007U, 0x00000000U); + psu_mask_write(0xFD0701B4, 0x00003F3FU, 0x00000906U); + psu_mask_write(0xFD0701C0, 0x00000007U, 0x00000001U); + psu_mask_write(0xFD070200, 0x0000001FU, 0x0000001FU); + psu_mask_write(0xFD070204, 0x001F1F1FU, 0x001F0909U); + psu_mask_write(0xFD070208, 0x0F0F0F0FU, 0x01010100U); + psu_mask_write(0xFD07020C, 0x0F0F0F0FU, 0x01010101U); + psu_mask_write(0xFD070210, 0x00000F0FU, 0x00000F0FU); + psu_mask_write(0xFD070214, 0x0F0F0F0FU, 0x070F0707U); + psu_mask_write(0xFD070218, 0x8F0F0F0FU, 0x07070707U); + psu_mask_write(0xFD07021C, 0x00000F0FU, 0x00000F0FU); + psu_mask_write(0xFD070220, 0x00001F1FU, 0x00001F01U); + psu_mask_write(0xFD070224, 0x0F0F0F0FU, 0x07070707U); + psu_mask_write(0xFD070228, 0x0F0F0F0FU, 0x07070707U); + psu_mask_write(0xFD07022C, 0x0000000FU, 0x00000007U); + psu_mask_write(0xFD070240, 0x0F1F0F7CU, 0x0600060CU); + psu_mask_write(0xFD070244, 0x00003333U, 0x00000001U); + psu_mask_write(0xFD070250, 0x7FFF3F07U, 0x01002001U); + psu_mask_write(0xFD070264, 0xFF00FFFFU, 0x08000040U); + psu_mask_write(0xFD07026C, 0xFF00FFFFU, 0x08000040U); + psu_mask_write(0xFD070280, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD070284, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD070288, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD07028C, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD070290, 0x0000FFFFU, 0x00000000U); + psu_mask_write(0xFD070294, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD070300, 0x00000011U, 0x00000000U); + psu_mask_write(0xFD07030C, 0x80000033U, 0x00000000U); + psu_mask_write(0xFD070320, 0x00000001U, 0x00000000U); + psu_mask_write(0xFD070400, 0x00000111U, 0x00000001U); + psu_mask_write(0xFD070404, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070408, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070490, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD070494, 0x0033000FU, 0x0020000BU); + psu_mask_write(0xFD070498, 0x07FF07FFU, 0x00000000U); + psu_mask_write(0xFD0704B4, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD0704B8, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070540, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD070544, 0x03330F0FU, 0x02000B03U); + psu_mask_write(0xFD070548, 0x07FF07FFU, 0x00000000U); + psu_mask_write(0xFD070564, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070568, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD0705F0, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD0705F4, 0x03330F0FU, 0x02000B03U); + psu_mask_write(0xFD0705F8, 0x07FF07FFU, 0x00000000U); + psu_mask_write(0xFD070614, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070618, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD0706A0, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD0706A4, 0x0033000FU, 0x00100003U); + psu_mask_write(0xFD0706A8, 0x07FF07FFU, 0x0000004FU); + psu_mask_write(0xFD0706AC, 0x0033000FU, 0x00100003U); + psu_mask_write(0xFD0706B0, 0x000007FFU, 0x0000004FU); + psu_mask_write(0xFD0706C4, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD0706C8, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070750, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD070754, 0x0033000FU, 0x00100003U); + psu_mask_write(0xFD070758, 0x07FF07FFU, 0x0000004FU); + psu_mask_write(0xFD07075C, 0x0033000FU, 0x00100003U); + psu_mask_write(0xFD070760, 0x000007FFU, 0x0000004FU); + psu_mask_write(0xFD070774, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070778, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070800, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD070804, 0x0033000FU, 0x00100003U); + psu_mask_write(0xFD070808, 0x07FF07FFU, 0x0000004FU); + psu_mask_write(0xFD07080C, 0x0033000FU, 0x00100003U); + psu_mask_write(0xFD070810, 0x000007FFU, 0x0000004FU); + psu_mask_write(0xFD070F04, 0x000001FFU, 0x00000000U); + psu_mask_write(0xFD070F08, 0x000000FFU, 0x00000000U); + psu_mask_write(0xFD070F0C, 0x000001FFU, 0x00000010U); + psu_mask_write(0xFD070F10, 0x000000FFU, 0x0000000FU); + psu_mask_write(0xFD072190, 0x1FBFBF3FU, 0x07828002U); + psu_mask_write(0xFD1A0108, 0x0000000CU, 0x00000000U); + psu_mask_write(0xFD080010, 0xFFFFFFFFU, 0x07001E00U); + psu_mask_write(0xFD080018, 0xFFFFFFFFU, 0x00F0FC00U); + psu_mask_write(0xFD08001C, 0xFFFFFFFFU, 0x55AA5480U); + psu_mask_write(0xFD080024, 0xFFFFFFFFU, 0x010100F4U); + psu_mask_write(0xFD080040, 0xFFFFFFFFU, 0x41A20D10U); + psu_mask_write(0xFD080044, 0xFFFFFFFFU, 0xCD141275U); + psu_mask_write(0xFD080068, 0xFFFFFFFFU, 0x01100000U); + psu_mask_write(0xFD080090, 0xFFFFFFFFU, 0x02A04161U); + psu_mask_write(0xFD0800C0, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD0800C4, 0xFFFFFFFFU, 0x000000E3U); + psu_mask_write(0xFD080100, 0xFFFFFFFFU, 0x0800040CU); + psu_mask_write(0xFD080110, 0xFFFFFFFFU, 0x07220F08U); + psu_mask_write(0xFD080114, 0xFFFFFFFFU, 0x28200008U); + psu_mask_write(0xFD080118, 0xFFFFFFFFU, 0x000F0300U); + psu_mask_write(0xFD08011C, 0xFFFFFFFFU, 0x83000800U); + psu_mask_write(0xFD080120, 0xFFFFFFFFU, 0x01702B07U); + psu_mask_write(0xFD080124, 0xFFFFFFFFU, 0x00310F08U); + psu_mask_write(0xFD080128, 0xFFFFFFFFU, 0x00000B0FU); + psu_mask_write(0xFD080140, 0xFFFFFFFFU, 0x08400020U); + psu_mask_write(0xFD080144, 0xFFFFFFFFU, 0x00000C80U); + psu_mask_write(0xFD080150, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080154, 0xFFFFFFFFU, 0x00000200U); + psu_mask_write(0xFD080180, 0xFFFFFFFFU, 0x00000630U); + psu_mask_write(0xFD080184, 0xFFFFFFFFU, 0x00000301U); + psu_mask_write(0xFD080188, 0xFFFFFFFFU, 0x00000010U); + psu_mask_write(0xFD08018C, 0xFFFFFFFFU, 0x00000200U); + psu_mask_write(0xFD080190, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080194, 0xFFFFFFFFU, 0x000006C0U); + psu_mask_write(0xFD080198, 0xFFFFFFFFU, 0x00000819U); + psu_mask_write(0xFD0801AC, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD0801B0, 0xFFFFFFFFU, 0x0000004DU); + psu_mask_write(0xFD0801B4, 0xFFFFFFFFU, 0x00000008U); + psu_mask_write(0xFD0801B8, 0xFFFFFFFFU, 0x0000004DU); + psu_mask_write(0xFD0801D8, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080200, 0xFFFFFFFFU, 0x800091C7U); + psu_mask_write(0xFD080204, 0xFFFFFFFFU, 0x00010236U); + psu_mask_write(0xFD080240, 0xFFFFFFFFU, 0x00141054U); + psu_mask_write(0xFD080250, 0xFFFFFFFFU, 0x00088000U); + psu_mask_write(0xFD080414, 0xFFFFFFFFU, 0x12341000U); + psu_mask_write(0xFD0804F4, 0xFFFFFFFFU, 0x00000005U); + psu_mask_write(0xFD080500, 0xFFFFFFFFU, 0x30000028U); + psu_mask_write(0xFD080508, 0xFFFFFFFFU, 0x0A000000U); + psu_mask_write(0xFD08050C, 0xFFFFFFFFU, 0x00000009U); + psu_mask_write(0xFD080510, 0xFFFFFFFFU, 0x0A000000U); + psu_mask_write(0xFD080520, 0xFFFFFFFFU, 0x0300B0CEU); + psu_mask_write(0xFD080528, 0xFFFFFFFFU, 0xF9032019U); + psu_mask_write(0xFD08052C, 0xFFFFFFFFU, 0x07F001E3U); + psu_mask_write(0xFD080544, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080548, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080558, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD08055C, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080560, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080564, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080680, 0xFFFFFFFFU, 0x008A8A58U); + psu_mask_write(0xFD080684, 0xFFFFFFFFU, 0x000079DDU); + psu_mask_write(0xFD080694, 0xFFFFFFFFU, 0x01E10210U); + psu_mask_write(0xFD080698, 0xFFFFFFFFU, 0x01E10000U); + psu_mask_write(0xFD0806A4, 0xFFFFFFFFU, 0x00087BDBU); + psu_mask_write(0xFD080700, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080704, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0xFD08070C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080710, 0xFFFFFFFFU, 0x0E00B03CU); + psu_mask_write(0xFD080714, 0xFFFFFFFFU, 0x09095555U); + psu_mask_write(0xFD080718, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080800, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080804, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0xFD08080C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080810, 0xFFFFFFFFU, 0x0E00B03CU); + psu_mask_write(0xFD080814, 0xFFFFFFFFU, 0x09095555U); + psu_mask_write(0xFD080818, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080900, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080904, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0xFD08090C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080910, 0xFFFFFFFFU, 0x0E00B004U); + psu_mask_write(0xFD080914, 0xFFFFFFFFU, 0x09095555U); + psu_mask_write(0xFD080918, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080A00, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080A04, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0xFD080A0C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080A10, 0xFFFFFFFFU, 0x0E00B004U); + psu_mask_write(0xFD080A14, 0xFFFFFFFFU, 0x09095555U); + psu_mask_write(0xFD080A18, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080B00, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080B04, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0xFD080B08, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080B0C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080B10, 0xFFFFFFFFU, 0x0E00B004U); + psu_mask_write(0xFD080B14, 0xFFFFFFFFU, 0x09095555U); + psu_mask_write(0xFD080B18, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080C00, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080C04, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0xFD080C08, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080C0C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080C10, 0xFFFFFFFFU, 0x0E00B03CU); + psu_mask_write(0xFD080C14, 0xFFFFFFFFU, 0x09095555U); + psu_mask_write(0xFD080C18, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080D00, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080D04, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0xFD080D08, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080D0C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080D10, 0xFFFFFFFFU, 0x0E00B004U); + psu_mask_write(0xFD080D14, 0xFFFFFFFFU, 0x09095555U); + psu_mask_write(0xFD080D18, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080E00, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080E04, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0xFD080E08, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080E0C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080E10, 0xFFFFFFFFU, 0x0E00B03CU); + psu_mask_write(0xFD080E14, 0xFFFFFFFFU, 0x09095555U); + psu_mask_write(0xFD080E18, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080F00, 0xFFFFFFFFU, 0x80803660U); + psu_mask_write(0xFD080F04, 0xFFFFFFFFU, 0x55556000U); + psu_mask_write(0xFD080F08, 0xFFFFFFFFU, 0xAAAAAAAAU); + psu_mask_write(0xFD080F0C, 0xFFFFFFFFU, 0x0029A4A4U); + psu_mask_write(0xFD080F10, 0xFFFFFFFFU, 0x0C00B000U); + psu_mask_write(0xFD080F14, 0xFFFFFFFFU, 0x09095555U); + psu_mask_write(0xFD080F18, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD081400, 0xFFFFFFFFU, 0x2A019FFEU); + psu_mask_write(0xFD081404, 0xFFFFFFFFU, 0x01100000U); + psu_mask_write(0xFD08141C, 0xFFFFFFFFU, 0x01264300U); + psu_mask_write(0xFD08142C, 0xFFFFFFFFU, 0x00041800U); + psu_mask_write(0xFD081430, 0xFFFFFFFFU, 0x70800000U); + psu_mask_write(0xFD081440, 0xFFFFFFFFU, 0x2A019FFEU); + psu_mask_write(0xFD081444, 0xFFFFFFFFU, 0x01100000U); + psu_mask_write(0xFD08145C, 0xFFFFFFFFU, 0x01264300U); + psu_mask_write(0xFD08146C, 0xFFFFFFFFU, 0x00041800U); + psu_mask_write(0xFD081470, 0xFFFFFFFFU, 0x70800000U); + psu_mask_write(0xFD081480, 0xFFFFFFFFU, 0x2A019FFEU); + psu_mask_write(0xFD081484, 0xFFFFFFFFU, 0x01100000U); + psu_mask_write(0xFD08149C, 0xFFFFFFFFU, 0x01264300U); + psu_mask_write(0xFD0814AC, 0xFFFFFFFFU, 0x00041800U); + psu_mask_write(0xFD0814B0, 0xFFFFFFFFU, 0x70800000U); + psu_mask_write(0xFD0814C0, 0xFFFFFFFFU, 0x2A019FFEU); + psu_mask_write(0xFD0814C4, 0xFFFFFFFFU, 0x01100000U); + psu_mask_write(0xFD0814DC, 0xFFFFFFFFU, 0x01264300U); + psu_mask_write(0xFD0814EC, 0xFFFFFFFFU, 0x00041800U); + psu_mask_write(0xFD0814F0, 0xFFFFFFFFU, 0x70800000U); + psu_mask_write(0xFD081500, 0xFFFFFFFFU, 0x15019FFEU); + psu_mask_write(0xFD081504, 0xFFFFFFFFU, 0x21100000U); + psu_mask_write(0xFD08151C, 0xFFFFFFFFU, 0x01266300U); + psu_mask_write(0xFD08152C, 0xFFFFFFFFU, 0x00041800U); + psu_mask_write(0xFD081530, 0xFFFFFFFFU, 0x70400000U); + psu_mask_write(0xFD0817DC, 0xFFFFFFFFU, 0x012643C4U); + + return 1; +} + +static unsigned long psu_ddr_qos_init_data(void) +{ + psu_mask_write(0xFD360008, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD36001C, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD370008, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD37001C, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD380008, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD38001C, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD390008, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD39001C, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD3A0008, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD3A001C, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD3B0008, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFD3B001C, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFF9B0008, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFF9B001C, 0x0000000FU, 0x00000000U); + + return 1; +} + +static unsigned long psu_mio_init_data(void) +{ + psu_mask_write(0xFF180000, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180004, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180008, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF18000C, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180010, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180014, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180018, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF18001C, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180020, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180024, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180028, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF18002C, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180030, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180034, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180038, 0x000000FEU, 0x00000040U); + psu_mask_write(0xFF18003C, 0x000000FEU, 0x00000040U); + psu_mask_write(0xFF180040, 0x000000FEU, 0x00000040U); + psu_mask_write(0xFF180044, 0x000000FEU, 0x00000040U); + psu_mask_write(0xFF180048, 0x000000FEU, 0x000000C0U); + psu_mask_write(0xFF18004C, 0x000000FEU, 0x000000C0U); + psu_mask_write(0xFF180050, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180054, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180058, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF18005C, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180060, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180064, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180068, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF18006C, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180070, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180074, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180078, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF18007C, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180080, 0x000000FEU, 0x00000008U); + psu_mask_write(0xFF180084, 0x000000FEU, 0x00000008U); + psu_mask_write(0xFF180098, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF18009C, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800A0, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800A4, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800A8, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800AC, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF1800B0, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF1800B4, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800B8, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800BC, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800C0, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800C4, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800C8, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800CC, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800D0, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800D4, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800D8, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800DC, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800E0, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800E4, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800E8, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800EC, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800F0, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800F4, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800F8, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800FC, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF180100, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180104, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180108, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF18010C, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180110, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180114, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180118, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF18011C, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180120, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180124, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180128, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF18012C, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180130, 0x000000FEU, 0x000000C0U); + psu_mask_write(0xFF180134, 0x000000FEU, 0x000000C0U); + psu_mask_write(0xFF180204, 0xFFFFFFFFU, 0x00040000U); + psu_mask_write(0xFF180208, 0xFFFFFFFFU, 0x00B02000U); + psu_mask_write(0xFF18020C, 0x00003FFFU, 0x00000FC0U); + psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF18013C, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180140, 0x03FFFFFFU, 0x00000000U); + psu_mask_write(0xFF180144, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180148, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x00000000U); + psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180158, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF18015C, 0x03FFFFFFU, 0x00000000U); + psu_mask_write(0xFF180160, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x00000000U); + psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180174, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180178, 0x03FFFFFFU, 0x00000000U); + psu_mask_write(0xFF18017C, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x00000000U); + psu_mask_write(0xFF180200, 0x0000000FU, 0x00000000U); - Xil_Out32(0xFD410098, 0); - if (lane0_active == 1) { - Xil_Out32(0xFD403004, 0); - Xil_Out32(0xFD403008, 0); - Xil_Out32(0xFD40300C, 0); - Xil_Out32(0xFD403010, 0); - Xil_Out32(0xFD403014, 0); - Xil_Out32(0xFD403018, 0); - Xil_Out32(0xFD40301C, 0); - Xil_Out32(0xFD403020, 0); - Xil_Out32(0xFD403024, 0); - Xil_Out32(0xFD403028, 0); - Xil_Out32(0xFD40302C, 0); - Xil_Out32(0xFD403030, 0); - Xil_Out32(0xFD403034, 0); - Xil_Out32(0xFD403038, 0); - Xil_Out32(0xFD40303C, 0); - Xil_Out32(0xFD403040, 0); - Xil_Out32(0xFD403044, 0); - Xil_Out32(0xFD403048, 0); - Xil_Out32(0xFD40304C, 0); - Xil_Out32(0xFD403050, 0); - Xil_Out32(0xFD403054, 0); - Xil_Out32(0xFD403058, 0); - Xil_Out32(0xFD403068, 1); - Xil_Out32(0xFD40306C, 0); - Xil_Out32(0xFD4010AC, 0); - psu_mask_write(0xFD410044, 0x00000003U, 0x00000001U); - psu_mask_write(0xFD410040, 0x00000003U, 0x00000001U); - psu_mask_write(0xFD410038, 0x00000007U, 0x00000000U); - } - if (lane1_active == 1) { - Xil_Out32(0xFD407004, 0); - Xil_Out32(0xFD407008, 0); - Xil_Out32(0xFD40700C, 0); - Xil_Out32(0xFD407010, 0); - Xil_Out32(0xFD407014, 0); - Xil_Out32(0xFD407018, 0); - Xil_Out32(0xFD40701C, 0); - Xil_Out32(0xFD407020, 0); - Xil_Out32(0xFD407024, 0); - Xil_Out32(0xFD407028, 0); - Xil_Out32(0xFD40702C, 0); - Xil_Out32(0xFD407030, 0); - Xil_Out32(0xFD407034, 0); - Xil_Out32(0xFD407038, 0); - Xil_Out32(0xFD40703C, 0); - Xil_Out32(0xFD407040, 0); - Xil_Out32(0xFD407044, 0); - Xil_Out32(0xFD407048, 0); - Xil_Out32(0xFD40704C, 0); - Xil_Out32(0xFD407050, 0); - Xil_Out32(0xFD407054, 0); - Xil_Out32(0xFD407058, 0); - Xil_Out32(0xFD407068, 1); - Xil_Out32(0xFD40706C, 0); - Xil_Out32(0xFD4050AC, 0); - psu_mask_write(0xFD410044, 0x0000000CU, 0x00000004U); - psu_mask_write(0xFD410040, 0x0000000CU, 0x00000004U); - psu_mask_write(0xFD410038, 0x00000070U, 0x00000000U); - } - if (lane2_active == 1) { - Xil_Out32(0xFD40B004, 0); - Xil_Out32(0xFD40B008, 0); - Xil_Out32(0xFD40B00C, 0); - Xil_Out32(0xFD40B010, 0); - Xil_Out32(0xFD40B014, 0); - Xil_Out32(0xFD40B018, 0); - Xil_Out32(0xFD40B01C, 0); - Xil_Out32(0xFD40B020, 0); - Xil_Out32(0xFD40B024, 0); - Xil_Out32(0xFD40B028, 0); - Xil_Out32(0xFD40B02C, 0); - Xil_Out32(0xFD40B030, 0); - Xil_Out32(0xFD40B034, 0); - Xil_Out32(0xFD40B038, 0); - Xil_Out32(0xFD40B03C, 0); - Xil_Out32(0xFD40B040, 0); - Xil_Out32(0xFD40B044, 0); - Xil_Out32(0xFD40B048, 0); - Xil_Out32(0xFD40B04C, 0); - Xil_Out32(0xFD40B050, 0); - Xil_Out32(0xFD40B054, 0); - Xil_Out32(0xFD40B058, 0); - Xil_Out32(0xFD40B068, 1); - Xil_Out32(0xFD40B06C, 0); - Xil_Out32(0xFD4090AC, 0); - psu_mask_write(0xFD410044, 0x00000030U, 0x00000010U); - psu_mask_write(0xFD410040, 0x00000030U, 0x00000010U); - psu_mask_write(0xFD41003C, 0x00000007U, 0x00000000U); - } - if (lane3_active == 1) { - Xil_Out32(0xFD40F004, 0); - Xil_Out32(0xFD40F008, 0); - Xil_Out32(0xFD40F00C, 0); - Xil_Out32(0xFD40F010, 0); - Xil_Out32(0xFD40F014, 0); - Xil_Out32(0xFD40F018, 0); - Xil_Out32(0xFD40F01C, 0); - Xil_Out32(0xFD40F020, 0); - Xil_Out32(0xFD40F024, 0); - Xil_Out32(0xFD40F028, 0); - Xil_Out32(0xFD40F02C, 0); - Xil_Out32(0xFD40F030, 0); - Xil_Out32(0xFD40F034, 0); - Xil_Out32(0xFD40F038, 0); - Xil_Out32(0xFD40F03C, 0); - Xil_Out32(0xFD40F040, 0); - Xil_Out32(0xFD40F044, 0); - Xil_Out32(0xFD40F048, 0); - Xil_Out32(0xFD40F04C, 0); - Xil_Out32(0xFD40F050, 0); - Xil_Out32(0xFD40F054, 0); - Xil_Out32(0xFD40F058, 0); - Xil_Out32(0xFD40F068, 1); - Xil_Out32(0xFD40F06C, 0); - Xil_Out32(0xFD40D0AC, 0); - psu_mask_write(0xFD410044, 0x000000C0U, 0x00000040U); - psu_mask_write(0xFD410040, 0x000000C0U, 0x00000040U); - psu_mask_write(0xFD41003C, 0x00000070U, 0x00000000U); - } return 1; } -static int serdes_illcalib(u32 lane3_protocol, u32 lane3_rate, - u32 lane2_protocol, u32 lane2_rate, - u32 lane1_protocol, u32 lane1_rate, - u32 lane0_protocol, u32 lane0_rate) +static unsigned long psu_peripherals_pre_init_data(void) { - unsigned int rdata = 0; - unsigned int sata_gen2 = 1; - unsigned int temp_ill12 = 0; - unsigned int temp_PLL_REF_SEL_OFFSET; - unsigned int temp_TM_IQ_ILL1; - unsigned int temp_TM_E_ILL1; - unsigned int temp_tx_dig_tm_61; - unsigned int temp_tm_dig_6; - unsigned int temp_pll_fbdiv_frac_3_msb_offset; + psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01012302U); + psu_mask_write(0xFF5E0238, 0x00000001U, 0x00000001U); - if (lane0_protocol == 2 || lane0_protocol == 1) { - Xil_Out32(0xFD401910, 0xF3); - Xil_Out32(0xFD40193C, 0xF3); - Xil_Out32(0xFD401914, 0xF3); - Xil_Out32(0xFD401940, 0xF3); - } - if (lane1_protocol == 2 || lane1_protocol == 1) { - Xil_Out32(0xFD405910, 0xF3); - Xil_Out32(0xFD40593C, 0xF3); - Xil_Out32(0xFD405914, 0xF3); - Xil_Out32(0xFD405940, 0xF3); - } - if (lane2_protocol == 2 || lane2_protocol == 1) { - Xil_Out32(0xFD409910, 0xF3); - Xil_Out32(0xFD40993C, 0xF3); - Xil_Out32(0xFD409914, 0xF3); - Xil_Out32(0xFD409940, 0xF3); - } - if (lane3_protocol == 2 || lane3_protocol == 1) { - Xil_Out32(0xFD40D910, 0xF3); - Xil_Out32(0xFD40D93C, 0xF3); - Xil_Out32(0xFD40D914, 0xF3); - Xil_Out32(0xFD40D940, 0xF3); - } + return 1; +} - if (sata_gen2 == 1) { - if (lane0_protocol == 2) { - temp_pll_fbdiv_frac_3_msb_offset = Xil_In32(0xFD402360); - Xil_Out32(0xFD402360, 0x0); - temp_PLL_REF_SEL_OFFSET = Xil_In32(0xFD410000); - psu_mask_write(0xFD410000, 0x0000001FU, 0x0000000DU); - temp_TM_IQ_ILL1 = Xil_In32(0xFD4018F8); - temp_TM_E_ILL1 = Xil_In32(0xFD401924); - Xil_Out32(0xFD4018F8, 0x78); - temp_tx_dig_tm_61 = Xil_In32(0xFD4000F4); - temp_tm_dig_6 = Xil_In32(0xFD40106C); - psu_mask_write(0xFD4000F4, 0x0000000BU, 0x00000000U); - psu_mask_write(0xFD40106C, 0x0000000FU, 0x00000000U); - temp_ill12 = Xil_In32(0xFD401990) & 0xF0; +static unsigned long psu_peripherals_init_data(void) +{ + psu_mask_write(0xFD1A0100, 0x00008046U, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x001A0000U, 0x00000000U); + psu_mask_write(0xFF5E023C, 0x0093C018U, 0x00000000U); + psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x00000001U, 0x00000000U); + psu_mask_write(0xFF180390, 0x00000004U, 0x00000004U); + psu_mask_write(0xFF5E023C, 0x00000400U, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x00000040U, 0x00000000U); + psu_mask_write(0xFF180310, 0x00008000U, 0x00000000U); + psu_mask_write(0xFF180320, 0x33840000U, 0x02840000U); + psu_mask_write(0xFF18031C, 0x7FFE0000U, 0x64500000U); + psu_mask_write(0xFF180358, 0x00000008U, 0x00000008U); + psu_mask_write(0xFF180324, 0x03C00000U, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x00000600U, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x00008000U, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x00007800U, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x00000002U, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x00040000U, 0x00000000U); + psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U); + psu_mask_write(0xFD5C0060, 0x000F000FU, 0x00000000U); + psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U); + psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x05F5DD18U); + psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U); + psu_mask_write(0xFF5E0250, 0x00000F0FU, 0x00000202U); + + mask_delay(1); + psu_mask_write(0xFF5E0250, 0x00000F0FU, 0x00000002U); + + mask_delay(5); + psu_mask_write(0xFF5E0250, 0x00000F0FU, 0x00000202U); + + return 1; +} + +static unsigned long psu_serdes_init_data(void) +{ + psu_mask_write(0xFD410008, 0x0000001FU, 0x00000008U); + psu_mask_write(0xFD41000C, 0x0000001FU, 0x0000000FU); + psu_mask_write(0xFD402868, 0x00000080U, 0x00000080U); + psu_mask_write(0xFD40286C, 0x00000080U, 0x00000080U); + psu_mask_write(0xFD40A094, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD40A368, 0x000000FFU, 0x00000038U); + psu_mask_write(0xFD40A36C, 0x00000007U, 0x00000003U); + psu_mask_write(0xFD40E368, 0x000000FFU, 0x000000E0U); + psu_mask_write(0xFD40E36C, 0x00000007U, 0x00000003U); + psu_mask_write(0xFD40A370, 0x000000FFU, 0x000000F4U); + psu_mask_write(0xFD40A374, 0x000000FFU, 0x00000031U); + psu_mask_write(0xFD40A378, 0x000000FFU, 0x00000002U); + psu_mask_write(0xFD40A37C, 0x00000033U, 0x00000030U); + psu_mask_write(0xFD40E370, 0x000000FFU, 0x000000C9U); + psu_mask_write(0xFD40E374, 0x000000FFU, 0x000000D2U); + psu_mask_write(0xFD40E378, 0x000000FFU, 0x00000001U); + psu_mask_write(0xFD40E37C, 0x000000B3U, 0x000000B0U); + psu_mask_write(0xFD40906C, 0x00000003U, 0x00000003U); + psu_mask_write(0xFD4080F4, 0x00000003U, 0x00000003U); + psu_mask_write(0xFD40E360, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD40D06C, 0x0000000FU, 0x0000000FU); + psu_mask_write(0xFD40C0F4, 0x0000000BU, 0x0000000BU); + psu_mask_write(0xFD4090CC, 0x00000020U, 0x00000020U); + psu_mask_write(0xFD401074, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD405074, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD409074, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD40D074, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD401994, 0x00000007U, 0x00000007U); + psu_mask_write(0xFD405994, 0x00000007U, 0x00000007U); + psu_mask_write(0xFD40989C, 0x00000080U, 0x00000080U); + psu_mask_write(0xFD4098F8, 0x000000FFU, 0x0000001AU); + psu_mask_write(0xFD4098FC, 0x000000FFU, 0x0000001AU); + psu_mask_write(0xFD409990, 0x000000FFU, 0x00000010U); + psu_mask_write(0xFD409924, 0x000000FFU, 0x000000FEU); + psu_mask_write(0xFD409928, 0x000000FFU, 0x00000000U); + psu_mask_write(0xFD409900, 0x000000FFU, 0x0000001AU); + psu_mask_write(0xFD40992C, 0x000000FFU, 0x00000000U); + psu_mask_write(0xFD409980, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFD409914, 0x000000FFU, 0x000000F7U); + psu_mask_write(0xFD409918, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD409940, 0x000000FFU, 0x000000F7U); + psu_mask_write(0xFD409944, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD409994, 0x00000007U, 0x00000007U); + psu_mask_write(0xFD40D89C, 0x00000080U, 0x00000080U); + psu_mask_write(0xFD40D8F8, 0x000000FFU, 0x0000007DU); + psu_mask_write(0xFD40D8FC, 0x000000FFU, 0x0000007DU); + psu_mask_write(0xFD40D990, 0x000000FFU, 0x00000001U); + psu_mask_write(0xFD40D924, 0x000000FFU, 0x0000009CU); + psu_mask_write(0xFD40D928, 0x000000FFU, 0x00000039U); + psu_mask_write(0xFD40D98C, 0x000000F0U, 0x00000020U); + psu_mask_write(0xFD40D900, 0x000000FFU, 0x0000007DU); + psu_mask_write(0xFD40D92C, 0x000000FFU, 0x00000064U); + psu_mask_write(0xFD40D980, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFD40D914, 0x000000FFU, 0x000000F7U); + psu_mask_write(0xFD40D918, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD40D940, 0x000000FFU, 0x000000F7U); + psu_mask_write(0xFD40D944, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD40D994, 0x00000007U, 0x00000007U); + psu_mask_write(0xFD40107C, 0x0000000FU, 0x00000001U); + psu_mask_write(0xFD40507C, 0x0000000FU, 0x00000001U); + psu_mask_write(0xFD40907C, 0x0000000FU, 0x00000001U); + psu_mask_write(0xFD40D07C, 0x0000000FU, 0x00000001U); + psu_mask_write(0xFD4019A4, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFD401038, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD40102C, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD4059A4, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFD405038, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD40502C, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD4099A4, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFD409038, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD40902C, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD40D9A4, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFD40D038, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD40D02C, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD4019AC, 0x00000003U, 0x00000000U); + psu_mask_write(0xFD4059AC, 0x00000003U, 0x00000000U); + psu_mask_write(0xFD4099AC, 0x00000003U, 0x00000000U); + psu_mask_write(0xFD40D9AC, 0x00000003U, 0x00000000U); + psu_mask_write(0xFD401978, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD405978, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD409978, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD40D978, 0x00000010U, 0x00000010U); + + serdes_illcalib(2, 3, 3, 0, 0, 0, 0, 0); + psu_mask_write(0xFD410014, 0x00000077U, 0x00000023U); + psu_mask_write(0xFD40C1D8, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD40DC14, 0x000000FFU, 0x000000E6U); + psu_mask_write(0xFD40DC40, 0x0000001FU, 0x0000000CU); + psu_mask_write(0xFD40D94C, 0x00000020U, 0x00000020U); + psu_mask_write(0xFD40D950, 0x00000007U, 0x00000006U); + psu_mask_write(0xFD40C048, 0x000000FFU, 0x00000001U); + + return 1; +} + +static unsigned long psu_resetout_init_data(void) +{ + psu_mask_write(0xFF5E023C, 0x00000400U, 0x00000000U); + psu_mask_write(0xFF9D0080, 0x00000001U, 0x00000001U); + psu_mask_write(0xFF9D007C, 0x00000001U, 0x00000000U); + psu_mask_write(0xFF5E023C, 0x00000140U, 0x00000000U); + psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U); + psu_mask_write(0xFD3D0100, 0x00000003U, 0x00000003U); + psu_mask_write(0xFD1A0100, 0x00000002U, 0x00000000U); + psu_mask_write(0xFE20C200, 0x00023FFFU, 0x00022457U); + psu_mask_write(0xFE20C630, 0x003FFF00U, 0x00000000U); + psu_mask_write(0xFE20C11C, 0x00000600U, 0x00000600U); + psu_mask_write(0xFE20C12C, 0x00004000U, 0x00004000U); + psu_mask_write(0xFD480064, 0x00000200U, 0x00000200U); + mask_poll(0xFD40A3E4, 0x00000010U); + mask_poll(0xFD40E3E4, 0x00000010U); + psu_mask_write(0xFD0C00AC, 0xFFFFFFFFU, 0x28184018U); + psu_mask_write(0xFD0C00B0, 0xFFFFFFFFU, 0x0E081406U); + psu_mask_write(0xFD0C00B4, 0xFFFFFFFFU, 0x064A0813U); + psu_mask_write(0xFD0C00B8, 0xFFFFFFFFU, 0x3FFC96A4U); - serdes_illcalib_pcie_gen1(0, 0, 0, 0, 0, 0, 1, 0, 0); + return 1; +} - Xil_Out32(0xFD402360, temp_pll_fbdiv_frac_3_msb_offset); - Xil_Out32(0xFD41000C, temp_PLL_REF_SEL_OFFSET); - Xil_Out32(0xFD4018F8, temp_TM_IQ_ILL1); - Xil_Out32(0xFD4000F4, temp_tx_dig_tm_61); - Xil_Out32(0xFD40106C, temp_tm_dig_6); - Xil_Out32(0xFD401928, Xil_In32(0xFD401924)); - temp_ill12 = - temp_ill12 | (Xil_In32(0xFD401990) >> 4 & 0xF); - Xil_Out32(0xFD401990, temp_ill12); - Xil_Out32(0xFD401924, temp_TM_E_ILL1); - } - if (lane1_protocol == 2) { - temp_pll_fbdiv_frac_3_msb_offset = Xil_In32(0xFD406360); - Xil_Out32(0xFD406360, 0x0); - temp_PLL_REF_SEL_OFFSET = Xil_In32(0xFD410004); - psu_mask_write(0xFD410004, 0x0000001FU, 0x0000000DU); - temp_TM_IQ_ILL1 = Xil_In32(0xFD4058F8); - temp_TM_E_ILL1 = Xil_In32(0xFD405924); - Xil_Out32(0xFD4058F8, 0x78); - temp_tx_dig_tm_61 = Xil_In32(0xFD4040F4); - temp_tm_dig_6 = Xil_In32(0xFD40506C); - psu_mask_write(0xFD4040F4, 0x0000000BU, 0x00000000U); - psu_mask_write(0xFD40506C, 0x0000000FU, 0x00000000U); - temp_ill12 = Xil_In32(0xFD405990) & 0xF0; +static unsigned long psu_resetin_init_data(void) +{ + psu_mask_write(0xFF5E023C, 0x00000540U, 0x00000540U); + psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000008U); + psu_mask_write(0xFD1A0100, 0x00000002U, 0x00000002U); - serdes_illcalib_pcie_gen1(0, 0, 0, 0, 1, 0, 0, 0, 0); + return 1; +} - Xil_Out32(0xFD406360, temp_pll_fbdiv_frac_3_msb_offset); - Xil_Out32(0xFD41000C, temp_PLL_REF_SEL_OFFSET); - Xil_Out32(0xFD4058F8, temp_TM_IQ_ILL1); - Xil_Out32(0xFD4040F4, temp_tx_dig_tm_61); - Xil_Out32(0xFD40506C, temp_tm_dig_6); - Xil_Out32(0xFD405928, Xil_In32(0xFD405924)); - temp_ill12 = - temp_ill12 | (Xil_In32(0xFD405990) >> 4 & 0xF); - Xil_Out32(0xFD405990, temp_ill12); - Xil_Out32(0xFD405924, temp_TM_E_ILL1); - } - if (lane2_protocol == 2) { - temp_pll_fbdiv_frac_3_msb_offset = Xil_In32(0xFD40A360); - Xil_Out32(0xFD40A360, 0x0); - temp_PLL_REF_SEL_OFFSET = Xil_In32(0xFD410008); - psu_mask_write(0xFD410008, 0x0000001FU, 0x0000000DU); - temp_TM_IQ_ILL1 = Xil_In32(0xFD4098F8); - temp_TM_E_ILL1 = Xil_In32(0xFD409924); - Xil_Out32(0xFD4098F8, 0x78); - temp_tx_dig_tm_61 = Xil_In32(0xFD4080F4); - temp_tm_dig_6 = Xil_In32(0xFD40906C); - psu_mask_write(0xFD4080F4, 0x0000000BU, 0x00000000U); - psu_mask_write(0xFD40906C, 0x0000000FU, 0x00000000U); - temp_ill12 = Xil_In32(0xFD409990) & 0xF0; +static unsigned long psu_afi_config(void) +{ + psu_mask_write(0xFD1A0100, 0x00001F80U, 0x00000000U); + psu_mask_write(0xFF5E023C, 0x00080000U, 0x00000000U); + psu_mask_write(0xFD615000, 0x00000300U, 0x00000200U); + psu_mask_write(0xFD360000, 0x00000003U, 0x00000002U); + psu_mask_write(0xFD370000, 0x00000003U, 0x00000002U); + psu_mask_write(0xFD360014, 0x00000003U, 0x00000002U); + psu_mask_write(0xFD370014, 0x00000003U, 0x00000002U); - serdes_illcalib_pcie_gen1(0, 0, 1, 0, 0, 0, 0, 0, 0); + return 1; +} - Xil_Out32(0xFD40A360, temp_pll_fbdiv_frac_3_msb_offset); - Xil_Out32(0xFD41000C, temp_PLL_REF_SEL_OFFSET); - Xil_Out32(0xFD4098F8, temp_TM_IQ_ILL1); - Xil_Out32(0xFD4080F4, temp_tx_dig_tm_61); - Xil_Out32(0xFD40906C, temp_tm_dig_6); - Xil_Out32(0xFD409928, Xil_In32(0xFD409924)); - temp_ill12 = - temp_ill12 | (Xil_In32(0xFD409990) >> 4 & 0xF); - Xil_Out32(0xFD409990, temp_ill12); - Xil_Out32(0xFD409924, temp_TM_E_ILL1); - } - if (lane3_protocol == 2) { - temp_pll_fbdiv_frac_3_msb_offset = Xil_In32(0xFD40E360); - Xil_Out32(0xFD40E360, 0x0); - temp_PLL_REF_SEL_OFFSET = Xil_In32(0xFD41000C); - psu_mask_write(0xFD41000C, 0x0000001FU, 0x0000000DU); - temp_TM_IQ_ILL1 = Xil_In32(0xFD40D8F8); - temp_TM_E_ILL1 = Xil_In32(0xFD40D924); - Xil_Out32(0xFD40D8F8, 0x78); - temp_tx_dig_tm_61 = Xil_In32(0xFD40C0F4); - temp_tm_dig_6 = Xil_In32(0xFD40D06C); - psu_mask_write(0xFD40C0F4, 0x0000000BU, 0x00000000U); - psu_mask_write(0xFD40D06C, 0x0000000FU, 0x00000000U); - temp_ill12 = Xil_In32(0xFD40D990) & 0xF0; +static unsigned long psu_ddr_phybringup_data(void) +{ + unsigned int regval = 0; + unsigned int pll_retry = 10; + unsigned int pll_locked = 0; + int cur_R006_tREFPRD; - serdes_illcalib_pcie_gen1(1, 0, 0, 0, 0, 0, 0, 0, 0); + while ((pll_retry > 0) && (!pll_locked)) { + Xil_Out32(0xFD080004, 0x00040010); + Xil_Out32(0xFD080004, 0x00040011); - Xil_Out32(0xFD40E360, temp_pll_fbdiv_frac_3_msb_offset); - Xil_Out32(0xFD41000C, temp_PLL_REF_SEL_OFFSET); - Xil_Out32(0xFD40D8F8, temp_TM_IQ_ILL1); - Xil_Out32(0xFD40C0F4, temp_tx_dig_tm_61); - Xil_Out32(0xFD40D06C, temp_tm_dig_6); - Xil_Out32(0xFD40D928, Xil_In32(0xFD40D924)); - temp_ill12 = - temp_ill12 | (Xil_In32(0xFD40D990) >> 4 & 0xF); - Xil_Out32(0xFD40D990, temp_ill12); - Xil_Out32(0xFD40D924, temp_TM_E_ILL1); - } - rdata = Xil_In32(0xFD410098); - rdata = (rdata & 0xDF); - Xil_Out32(0xFD410098, rdata); + while ((Xil_In32(0xFD080030) & 0x1) != 1) + ; + pll_locked = (Xil_In32(0xFD080030) & 0x80000000) + >> 31; + pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000) + >> 16; + pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000) >> 16; + pll_locked &= (Xil_In32(0xFD080BE0) & 0x10000) + >> 16; + pll_locked &= (Xil_In32(0xFD080DE0) & 0x10000) + >> 16; + pll_retry--; } + Xil_Out32(0xFD0800C4, Xil_In32(0xFD0800C4) | (pll_retry << 16)); + if (!pll_locked) + return 0; - if (lane0_protocol == 2 && lane0_rate == 3) { - psu_mask_write(0xFD40198C, 0x000000F0U, 0x00000020U); - psu_mask_write(0xFD40192C, 0x000000FFU, 0x00000094U); - } - if (lane1_protocol == 2 && lane1_rate == 3) { - psu_mask_write(0xFD40598C, 0x000000F0U, 0x00000020U); - psu_mask_write(0xFD40592C, 0x000000FFU, 0x00000094U); - } - if (lane2_protocol == 2 && lane2_rate == 3) { - psu_mask_write(0xFD40998C, 0x000000F0U, 0x00000020U); - psu_mask_write(0xFD40992C, 0x000000FFU, 0x00000094U); - } - if (lane3_protocol == 2 && lane3_rate == 3) { - psu_mask_write(0xFD40D98C, 0x000000F0U, 0x00000020U); - psu_mask_write(0xFD40D92C, 0x000000FFU, 0x00000094U); - } + Xil_Out32(0xFD080004U, 0x00040063U); - if (lane0_protocol == 1) { - if (lane0_rate == 0) { - serdes_illcalib_pcie_gen1(lane3_protocol, lane3_rate, - lane2_protocol, lane2_rate, - lane1_protocol, lane1_rate, - lane0_protocol, 0, 0); - } else { - serdes_illcalib_pcie_gen1(lane3_protocol, lane3_rate, - lane2_protocol, lane2_rate, - lane1_protocol, lane1_rate, - lane0_protocol, 0, 0); - serdes_illcalib_pcie_gen1(lane3_protocol, lane3_rate, - lane2_protocol, lane2_rate, - lane1_protocol, lane1_rate, - lane0_protocol, lane0_rate, - 1); - } - } + while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU) + ; + prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U); - if (lane0_protocol == 3) - Xil_Out32(0xFD401914, 0xF3); - if (lane0_protocol == 3) - Xil_Out32(0xFD401940, 0xF3); - if (lane0_protocol == 3) - Xil_Out32(0xFD401990, 0x20); - if (lane0_protocol == 3) - Xil_Out32(0xFD401924, 0x37); + while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU) + ; + Xil_Out32(0xFD0701B0U, 0x00000001U); + Xil_Out32(0xFD070320U, 0x00000001U); + while ((Xil_In32(0xFD070004U) & 0x0000000FU) != 0x00000001U) + ; + prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U); + Xil_Out32(0xFD080004, 0x0004FE01); + regval = Xil_In32(0xFD080030); + while (regval != 0x80000FFF) + regval = Xil_In32(0xFD080030); + regval = ((Xil_In32(0xFD080030) & 0x1FFF0000) >> 18); + if (regval != 0) + return 0; - if (lane1_protocol == 3) - Xil_Out32(0xFD405914, 0xF3); - if (lane1_protocol == 3) - Xil_Out32(0xFD405940, 0xF3); - if (lane1_protocol == 3) - Xil_Out32(0xFD405990, 0x20); - if (lane1_protocol == 3) - Xil_Out32(0xFD405924, 0x37); + Xil_Out32(0xFD080200U, 0x100091C7U); - if (lane2_protocol == 3) - Xil_Out32(0xFD409914, 0xF3); - if (lane2_protocol == 3) - Xil_Out32(0xFD409940, 0xF3); - if (lane2_protocol == 3) - Xil_Out32(0xFD409990, 0x20); - if (lane2_protocol == 3) - Xil_Out32(0xFD409924, 0x37); + cur_R006_tREFPRD = (Xil_In32(0xFD080018U) & 0x0003FFFFU) >> 0x00000000U; + prog_reg(0xFD080018, 0x3FFFF, 0x0, cur_R006_tREFPRD); - if (lane3_protocol == 3) - Xil_Out32(0xFD40D914, 0xF3); - if (lane3_protocol == 3) - Xil_Out32(0xFD40D940, 0xF3); - if (lane3_protocol == 3) - Xil_Out32(0xFD40D990, 0x20); - if (lane3_protocol == 3) - Xil_Out32(0xFD40D924, 0x37); + prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000003U); + prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000003U); + prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000003U); + prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000003U); + prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000003U); + prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000003U); + + Xil_Out32(0xFD080004, 0x00060001); + regval = Xil_In32(0xFD080030); + while ((regval & 0x80004001) != 0x80004001) + regval = Xil_In32(0xFD080030); + + regval = ((Xil_In32(0xFD080030) & 0x1FFF0000) >> 18); + if (regval != 0) + return 0; + + prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000000U); + prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000000U); + prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000000U); + prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000000U); + prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000000U); + prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000000U); + + Xil_Out32(0xFD080200U, 0x800091C7U); + prog_reg(0xFD080018, 0x3FFFF, 0x0, cur_R006_tREFPRD); + + Xil_Out32(0xFD080004, 0x0000C001); + regval = Xil_In32(0xFD080030); + while ((regval & 0x80000C01) != 0x80000C01) + regval = Xil_In32(0xFD080030); + + Xil_Out32(0xFD070180U, 0x01000040U); + Xil_Out32(0xFD070060U, 0x00000000U); + prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000000U); return 1; } -- GitLab From b5b8bad2db2148378e412bb1397bcffaecf97544 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 23 Jun 2022 13:04:21 +0200 Subject: [PATCH 339/581] xilinx: Enable support for SquashFS Enable SquashFS for all xilinx platforms. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/dbe85afda8cd90ebfc537979d382808ff9bec160.1655982259.git.michal.simek@amd.com --- configs/xilinx_versal_virt_defconfig | 1 + configs/xilinx_zynq_virt_defconfig | 1 + configs/xilinx_zynqmp_virt_defconfig | 1 + 3 files changed, 3 insertions(+) diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index c9ae0185f8a..1ab9ae2ac3c 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -44,6 +44,7 @@ CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_TIME=y CONFIG_CMD_TIMER=y CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_SQUASHFS=y CONFIG_CMD_MTDPARTS=y CONFIG_CMD_UBI=y CONFIG_PARTITION_TYPE_GUID=y diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index 120bc29393d..489e86adb34 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -58,6 +58,7 @@ CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_TIME=y CONFIG_CMD_TIMER=y CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_SQUASHFS=y CONFIG_CMD_MTDPARTS=y CONFIG_CMD_MTDPARTS_SPREAD=y CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index abaebb8edaf..014941fb67b 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -79,6 +79,7 @@ CONFIG_CMD_TIMER=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_TPM=y CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_SQUASHFS=y CONFIG_CMD_MTDPARTS=y CONFIG_CMD_MTDPARTS_SPREAD=y CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y -- GitLab From 728a86edb63a647e6faf211c0dbc7bd0e4ff7ac6 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 23 Jun 2022 13:08:30 +0200 Subject: [PATCH 340/581] timer: Add SPL_REGMAP dependency for Xilinx timer Add SPL_REGMAP dependency when SPL is enabled. This can avoid compilation issues if timer is selected but SPL_REGMAP not. Reported-by: Ovidiu Panait Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/8f6c187e04cb3127bf5148ae2dbbdf55b25ea544.1655982509.git.michal.simek@amd.com --- drivers/timer/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig index 44d1a81bad3..61156371a66 100644 --- a/drivers/timer/Kconfig +++ b/drivers/timer/Kconfig @@ -276,6 +276,7 @@ config XILINX_TIMER bool "Xilinx timer support" depends on TIMER select REGMAP + select SPL_REGMAP if SPL help Select this to enable support for the timer found on any Xilinx boards (axi timer). -- GitLab From 8201b8066a898c1ae72af45dbda8950410ee4743 Mon Sep 17 00:00:00 2001 From: Loic Poulain Date: Wed, 1 Jun 2022 20:26:27 +0200 Subject: [PATCH 341/581] lib: sha1: Add support for hardware specific sha1_process Mark sha1_process as weak to allow hardware specific implementation. Add parameter to support for multiple blocks processing. Signed-off-by: Loic Poulain --- lib/sha1.c | 26 +++++++++++++++++++------- 1 file changed, 19 insertions(+), 7 deletions(-) diff --git a/lib/sha1.c b/lib/sha1.c index 8154e1e1350..e5e42bc9fe3 100644 --- a/lib/sha1.c +++ b/lib/sha1.c @@ -25,6 +25,8 @@ #include #include +#include + const uint8_t sha1_der_prefix[SHA1_DER_LEN] = { 0x30, 0x21, 0x30, 0x09, 0x06, 0x05, 0x2b, 0x0e, 0x03, 0x02, 0x1a, 0x05, 0x00, 0x04, 0x14 @@ -65,7 +67,7 @@ void sha1_starts (sha1_context * ctx) ctx->state[4] = 0xC3D2E1F0; } -static void sha1_process(sha1_context *ctx, const unsigned char data[64]) +static void __maybe_unused sha1_process_one(sha1_context *ctx, const unsigned char data[64]) { unsigned long temp, W[16], A, B, C, D, E; @@ -219,6 +221,18 @@ static void sha1_process(sha1_context *ctx, const unsigned char data[64]) ctx->state[4] += E; } +__weak void sha1_process(sha1_context *ctx, const unsigned char *data, + unsigned int blocks) +{ + if (!blocks) + return; + + while (blocks--) { + sha1_process_one(ctx, data); + data += 64; + } +} + /* * SHA-1 process buffer */ @@ -242,17 +256,15 @@ void sha1_update(sha1_context *ctx, const unsigned char *input, if (left && ilen >= fill) { memcpy ((void *) (ctx->buffer + left), (void *) input, fill); - sha1_process (ctx, ctx->buffer); + sha1_process(ctx, ctx->buffer, 1); input += fill; ilen -= fill; left = 0; } - while (ilen >= 64) { - sha1_process (ctx, input); - input += 64; - ilen -= 64; - } + sha1_process(ctx, input, ilen / 64); + input += ilen / 64 * 64; + ilen = ilen % 64; if (ilen > 0) { memcpy ((void *) (ctx->buffer + left), (void *) input, ilen); -- GitLab From 4e883522bad7f1fed4ce0e35d26080fe29a972a5 Mon Sep 17 00:00:00 2001 From: Loic Poulain Date: Wed, 1 Jun 2022 20:26:28 +0200 Subject: [PATCH 342/581] sha1: Fix digest state size/type sha1 digest size is 5*32-bit => 160-bit. Using 64-bit unsigned long does not cause issue with the current sha1 implementation, but could be problematic for vectorized access. Signed-off-by: Loic Poulain --- include/u-boot/sha1.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/u-boot/sha1.h b/include/u-boot/sha1.h index 283f1032936..09fee594d26 100644 --- a/include/u-boot/sha1.h +++ b/include/u-boot/sha1.h @@ -30,7 +30,7 @@ extern const uint8_t sha1_der_prefix[]; typedef struct { unsigned long total[2]; /*!< number of bytes processed */ - unsigned long state[5]; /*!< intermediate digest state */ + uint32_t state[5]; /*!< intermediate digest state */ unsigned char buffer[64]; /*!< data block being processed */ } sha1_context; -- GitLab From 084d8e6bf9ea6673e94f798c5c3793893eb783ab Mon Sep 17 00:00:00 2001 From: Loic Poulain Date: Wed, 1 Jun 2022 20:26:29 +0200 Subject: [PATCH 343/581] armv8 SHA-1 using ARMv8 Crypto Extensions: This patch adds support for the SHA-1 Secure Hash Algorithm for CPUs that have support for the SHA-1 part of the ARM v8 Crypto Extensions. It greatly improves sha-1 based operations, about 10x faster on iMX8M evk board. ~12ms vs ~165ms for a 20MiB kernel sha-1 verification. asm implementation is a simplified version of the Linux version (from Ard Biesheuvel). Signed-off-by: Loic Poulain --- arch/arm/cpu/armv8/Kconfig | 11 +++ arch/arm/cpu/armv8/Makefile | 1 + arch/arm/cpu/armv8/sha1_ce_core.S | 132 ++++++++++++++++++++++++++++++ arch/arm/cpu/armv8/sha1_ce_glue.c | 21 +++++ 4 files changed, 165 insertions(+) create mode 100644 arch/arm/cpu/armv8/sha1_ce_core.S create mode 100644 arch/arm/cpu/armv8/sha1_ce_glue.c diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index 09f3f50fa22..1768e67088a 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -185,4 +185,15 @@ config ARMV8_EA_EL3_FIRST Exception handling at all exception levels for External Abort and SError interrupt exception are taken in EL3. +menuconfig ARMV8_CRYPTO + bool "ARM64 Accelerated Cryptographic Algorithms" + +if ARMV8_CRYPTO + +config ARMV8_CE_SHA1 + bool "SHA-1 digest algorithm (ARMv8 Crypto Extensions)" + default y if SHA1 + +endif + endif diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile index 85fe0475c86..ff2495c1997 100644 --- a/arch/arm/cpu/armv8/Makefile +++ b/arch/arm/cpu/armv8/Makefile @@ -44,3 +44,4 @@ obj-$(CONFIG_TARGET_HIKEY) += hisilicon/ obj-$(CONFIG_ARMV8_PSCI) += psci.o obj-$(CONFIG_TARGET_BCMNS3) += bcmns3/ obj-$(CONFIG_XEN) += xen/ +obj-$(CONFIG_ARMV8_CE_SHA1) += sha1_ce_glue.o sha1_ce_core.o diff --git a/arch/arm/cpu/armv8/sha1_ce_core.S b/arch/arm/cpu/armv8/sha1_ce_core.S new file mode 100644 index 00000000000..fbf2714206e --- /dev/null +++ b/arch/arm/cpu/armv8/sha1_ce_core.S @@ -0,0 +1,132 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * sha1_ce_core.S - SHA-1 secure hash using ARMv8 Crypto Extensions + * + * Copyright (C) 2014 Linaro Ltd + * Copyright (C) 2022 Linaro Ltd + */ + +#include +#include +#include +#include + + .text + .arch armv8-a+crypto + + k0 .req v0 + k1 .req v1 + k2 .req v2 + k3 .req v3 + + t0 .req v4 + t1 .req v5 + + dga .req q6 + dgav .req v6 + dgb .req s7 + dgbv .req v7 + + dg0q .req q12 + dg0s .req s12 + dg0v .req v12 + dg1s .req s13 + dg1v .req v13 + dg2s .req s14 + + .macro add_only, op, ev, rc, s0, dg1 + .ifc \ev, ev + add t1.4s, v\s0\().4s, \rc\().4s + sha1h dg2s, dg0s + .ifnb \dg1 + sha1\op dg0q, \dg1, t0.4s + .else + sha1\op dg0q, dg1s, t0.4s + .endif + .else + .ifnb \s0 + add t0.4s, v\s0\().4s, \rc\().4s + .endif + sha1h dg1s, dg0s + sha1\op dg0q, dg2s, t1.4s + .endif + .endm + + .macro add_update, op, ev, rc, s0, s1, s2, s3, dg1 + sha1su0 v\s0\().4s, v\s1\().4s, v\s2\().4s + add_only \op, \ev, \rc, \s1, \dg1 + sha1su1 v\s0\().4s, v\s3\().4s + .endm + + .macro loadrc, k, val, tmp + movz \tmp, :abs_g0_nc:\val + movk \tmp, :abs_g1:\val + dup \k, \tmp + .endm + + /* + * void sha1_armv8_ce_process(uint32_t state[5], uint8_t const *src, + * uint32_t blocks) + */ +ENTRY(sha1_armv8_ce_process) + /* load round constants */ + loadrc k0.4s, 0x5a827999, w6 + loadrc k1.4s, 0x6ed9eba1, w6 + loadrc k2.4s, 0x8f1bbcdc, w6 + loadrc k3.4s, 0xca62c1d6, w6 + + /* load state (4+1 digest states) */ + ld1 {dgav.4s}, [x0] + ldr dgb, [x0, #16] + + /* load input (64 bytes into v8->v11 16B vectors) */ +0: ld1 {v8.4s-v11.4s}, [x1], #64 + sub w2, w2, #1 +#if __BYTE_ORDER == __LITTLE_ENDIAN + rev32 v8.16b, v8.16b + rev32 v9.16b, v9.16b + rev32 v10.16b, v10.16b + rev32 v11.16b, v11.16b +#endif + +1: add t0.4s, v8.4s, k0.4s + mov dg0v.16b, dgav.16b + + add_update c, ev, k0, 8, 9, 10, 11, dgb + add_update c, od, k0, 9, 10, 11, 8 + add_update c, ev, k0, 10, 11, 8, 9 + add_update c, od, k0, 11, 8, 9, 10 + add_update c, ev, k1, 8, 9, 10, 11 + + add_update p, od, k1, 9, 10, 11, 8 + add_update p, ev, k1, 10, 11, 8, 9 + add_update p, od, k1, 11, 8, 9, 10 + add_update p, ev, k1, 8, 9, 10, 11 + add_update p, od, k2, 9, 10, 11, 8 + + add_update m, ev, k2, 10, 11, 8, 9 + add_update m, od, k2, 11, 8, 9, 10 + add_update m, ev, k2, 8, 9, 10, 11 + add_update m, od, k2, 9, 10, 11, 8 + add_update m, ev, k3, 10, 11, 8, 9 + + add_update p, od, k3, 11, 8, 9, 10 + add_only p, ev, k3, 9 + add_only p, od, k3, 10 + add_only p, ev, k3, 11 + add_only p, od + + /* update state */ + add dgbv.2s, dgbv.2s, dg1v.2s + add dgav.4s, dgav.4s, dg0v.4s + + /* loop on next block? */ + cbz w2, 2f + b 0b + + /* store new state */ +2: st1 {dgav.4s}, [x0] + str dgb, [x0, #16] + mov w0, w2 + ret +ENDPROC(sha1_armv8_ce_process) diff --git a/arch/arm/cpu/armv8/sha1_ce_glue.c b/arch/arm/cpu/armv8/sha1_ce_glue.c new file mode 100644 index 00000000000..780b119a90b --- /dev/null +++ b/arch/arm/cpu/armv8/sha1_ce_glue.c @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * sha1_ce_glue.c - SHA-1 secure hash using ARMv8 Crypto Extensions + * + * Copyright (C) 2022 Linaro Ltd + */ + +#include +#include + +extern void sha1_armv8_ce_process(uint32_t state[5], uint8_t const *src, + uint32_t blocks); + +void sha1_process(sha1_context *ctx, const unsigned char *data, + unsigned int blocks) +{ + if (!blocks) + return; + + sha1_armv8_ce_process(ctx->state, data, blocks); +} -- GitLab From 915047048f0acd3dbfe8605b854f151815f9be96 Mon Sep 17 00:00:00 2001 From: Loic Poulain Date: Wed, 1 Jun 2022 20:26:30 +0200 Subject: [PATCH 344/581] lib: sha256: Add support for hardware specific sha256_process Mark sha256_process as weak to allow hardware specific implementation. Add parameter for supporting multiple blocks processing. Signed-off-by: Loic Poulain --- lib/sha256.c | 26 +++++++++++++++++++------- 1 file changed, 19 insertions(+), 7 deletions(-) diff --git a/lib/sha256.c b/lib/sha256.c index c1fe93de012..50b0b511834 100644 --- a/lib/sha256.c +++ b/lib/sha256.c @@ -14,6 +14,8 @@ #include #include +#include + const uint8_t sha256_der_prefix[SHA256_DER_LEN] = { 0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60, 0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x01, 0x05, @@ -55,7 +57,7 @@ void sha256_starts(sha256_context * ctx) ctx->state[7] = 0x5BE0CD19; } -static void sha256_process(sha256_context *ctx, const uint8_t data[64]) +static void sha256_process_one(sha256_context *ctx, const uint8_t data[64]) { uint32_t temp1, temp2; uint32_t W[64]; @@ -186,6 +188,18 @@ static void sha256_process(sha256_context *ctx, const uint8_t data[64]) ctx->state[7] += H; } +__weak void sha256_process(sha256_context *ctx, const unsigned char *data, + unsigned int blocks) +{ + if (!blocks) + return; + + while (blocks--) { + sha256_process_one(ctx, data); + data += 64; + } +} + void sha256_update(sha256_context *ctx, const uint8_t *input, uint32_t length) { uint32_t left, fill; @@ -204,17 +218,15 @@ void sha256_update(sha256_context *ctx, const uint8_t *input, uint32_t length) if (left && length >= fill) { memcpy((void *) (ctx->buffer + left), (void *) input, fill); - sha256_process(ctx, ctx->buffer); + sha256_process(ctx, ctx->buffer, 1); length -= fill; input += fill; left = 0; } - while (length >= 64) { - sha256_process(ctx, input); - length -= 64; - input += 64; - } + sha256_process(ctx, input, length / 64); + input += length / 64 * 64; + length = length % 64; if (length) memcpy((void *) (ctx->buffer + left), (void *) input, length); -- GitLab From 0fcc1c76d1acaa68a0675f0baa0e5d9a25908bae Mon Sep 17 00:00:00 2001 From: Loic Poulain Date: Wed, 1 Jun 2022 20:26:31 +0200 Subject: [PATCH 345/581] armv8 SHA-256 using ARMv8 Crypto Extensions This patch adds support for the SHA-256 Secure Hash Algorithm for CPUs that have support for the SHA-256 part of the ARM v8 Crypto Extensions. It greatly improves sha-256 based operations, about 17x faster on iMX8M evk board. ~12ms vs ~208ms for a 20MiB kernel sha-256 verification. asm implementation is a simplified version of the Linux version (from Ard Biesheuvel). Signed-off-by: Loic Poulain --- arch/arm/cpu/armv8/Kconfig | 4 + arch/arm/cpu/armv8/Makefile | 1 + arch/arm/cpu/armv8/sha256_ce_core.S | 134 ++++++++++++++++++++++++++++ arch/arm/cpu/armv8/sha256_ce_glue.c | 21 +++++ 4 files changed, 160 insertions(+) create mode 100644 arch/arm/cpu/armv8/sha256_ce_core.S create mode 100644 arch/arm/cpu/armv8/sha256_ce_glue.c diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index 1768e67088a..72d12b4e070 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -194,6 +194,10 @@ config ARMV8_CE_SHA1 bool "SHA-1 digest algorithm (ARMv8 Crypto Extensions)" default y if SHA1 +config ARMV8_CE_SHA256 + bool "SHA-256 digest algorithm (ARMv8 Crypto Extensions)" + default y if SHA256 + endif endif diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile index ff2495c1997..2e4bf9e038c 100644 --- a/arch/arm/cpu/armv8/Makefile +++ b/arch/arm/cpu/armv8/Makefile @@ -45,3 +45,4 @@ obj-$(CONFIG_ARMV8_PSCI) += psci.o obj-$(CONFIG_TARGET_BCMNS3) += bcmns3/ obj-$(CONFIG_XEN) += xen/ obj-$(CONFIG_ARMV8_CE_SHA1) += sha1_ce_glue.o sha1_ce_core.o +obj-$(CONFIG_ARMV8_CE_SHA256) += sha256_ce_glue.o sha256_ce_core.o diff --git a/arch/arm/cpu/armv8/sha256_ce_core.S b/arch/arm/cpu/armv8/sha256_ce_core.S new file mode 100644 index 00000000000..fbae3ca362b --- /dev/null +++ b/arch/arm/cpu/armv8/sha256_ce_core.S @@ -0,0 +1,134 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * sha256-ce-core.S - core SHA-256 transform using v8 Crypto Extensions + * + * Copyright (C) 2014 Linaro Ltd + * Copyright (C) 2022 Linaro Ltd + */ + + #include + #include + #include + #include + + .text + .arch armv8-a+crypto + + dga .req q20 + dgav .req v20 + dgb .req q21 + dgbv .req v21 + + t0 .req v22 + t1 .req v23 + + dg0q .req q24 + dg0v .req v24 + dg1q .req q25 + dg1v .req v25 + dg2q .req q26 + dg2v .req v26 + + .macro add_only, ev, rc, s0 + mov dg2v.16b, dg0v.16b + .ifeq \ev + add t1.4s, v\s0\().4s, \rc\().4s + sha256h dg0q, dg1q, t0.4s + sha256h2 dg1q, dg2q, t0.4s + .else + .ifnb \s0 + add t0.4s, v\s0\().4s, \rc\().4s + .endif + sha256h dg0q, dg1q, t1.4s + sha256h2 dg1q, dg2q, t1.4s + .endif + .endm + + .macro add_update, ev, rc, s0, s1, s2, s3 + sha256su0 v\s0\().4s, v\s1\().4s + add_only \ev, \rc, \s1 + sha256su1 v\s0\().4s, v\s2\().4s, v\s3\().4s + .endm + + /* + * The SHA-256 round constants + */ + .align 4 +.Lsha2_rcon: + .word 0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5 + .word 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5 + .word 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3 + .word 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174 + .word 0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc + .word 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da + .word 0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7 + .word 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967 + .word 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13 + .word 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85 + .word 0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3 + .word 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070 + .word 0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5 + .word 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3 + .word 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208 + .word 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2 + + /* + * void sha256_armv8_ce_process(struct sha256_ce_state *sst, + * uint8_t const *src, uint32_t blocks) + */ +ENTRY(sha256_armv8_ce_process) + /* load round constants */ + adr x8, .Lsha2_rcon + ld1 { v0.4s- v3.4s}, [x8], #64 + ld1 { v4.4s- v7.4s}, [x8], #64 + ld1 { v8.4s-v11.4s}, [x8], #64 + ld1 {v12.4s-v15.4s}, [x8] + + /* load state */ + ldp dga, dgb, [x0] + + /* load input */ +0: ld1 {v16.4s-v19.4s}, [x1], #64 + sub w2, w2, #1 +#if __BYTE_ORDER == __LITTLE_ENDIAN + rev32 v16.16b, v16.16b + rev32 v17.16b, v17.16b + rev32 v18.16b, v18.16b + rev32 v19.16b, v19.16b +#endif + +1: add t0.4s, v16.4s, v0.4s + mov dg0v.16b, dgav.16b + mov dg1v.16b, dgbv.16b + + add_update 0, v1, 16, 17, 18, 19 + add_update 1, v2, 17, 18, 19, 16 + add_update 0, v3, 18, 19, 16, 17 + add_update 1, v4, 19, 16, 17, 18 + + add_update 0, v5, 16, 17, 18, 19 + add_update 1, v6, 17, 18, 19, 16 + add_update 0, v7, 18, 19, 16, 17 + add_update 1, v8, 19, 16, 17, 18 + + add_update 0, v9, 16, 17, 18, 19 + add_update 1, v10, 17, 18, 19, 16 + add_update 0, v11, 18, 19, 16, 17 + add_update 1, v12, 19, 16, 17, 18 + + add_only 0, v13, 17 + add_only 1, v14, 18 + add_only 0, v15, 19 + add_only 1 + + /* update state */ + add dgav.4s, dgav.4s, dg0v.4s + add dgbv.4s, dgbv.4s, dg1v.4s + + /* handled all input blocks? */ + cbnz w2, 0b + + /* store new state */ +3: stp dga, dgb, [x0] + ret +ENDPROC(sha256_armv8_ce_process) diff --git a/arch/arm/cpu/armv8/sha256_ce_glue.c b/arch/arm/cpu/armv8/sha256_ce_glue.c new file mode 100644 index 00000000000..67dd796c122 --- /dev/null +++ b/arch/arm/cpu/armv8/sha256_ce_glue.c @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * sha256_ce_glue.c - SHA-256 secure hash using ARMv8 Crypto Extensions + * + * Copyright (C) 2022 Linaro Ltd + */ + +#include +#include + +extern void sha256_armv8_ce_process(uint32_t state[8], uint8_t const *src, + uint32_t blocks); + +void sha256_process(sha256_context *ctx, const unsigned char *data, + unsigned int blocks) +{ + if (!blocks) + return; + + sha256_armv8_ce_process(ctx->state, data, blocks); +} -- GitLab From ba0d0e8c74e8fcd57beb286251d695e63f0d291c Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 23 Jun 2022 15:44:47 -0400 Subject: [PATCH 346/581] qemu_arm64: Enable CONFIG_ARMV8_CRYPTO support Now that we can make use of CPU features for sha1/sha256, enable in QEMU so that we get some test coverage. Cc: Loic Poulain Cc: Tuomas Tynkkynen Signed-off-by: Tom Rini --- configs/qemu_arm64_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig index 87acf00f30e..f7c93ba2af5 100644 --- a/configs/qemu_arm64_defconfig +++ b/configs/qemu_arm64_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="qemu-arm64" CONFIG_DEBUG_UART_BASE=0x9000000 CONFIG_DEBUG_UART_CLOCK=0 +CONFIG_ARMV8_CRYPTO=y CONFIG_SYS_LOAD_ADDR=0x40200000 CONFIG_ENV_ADDR=0x4000000 CONFIG_DEBUG_UART=y -- GitLab From 68ff6d365539fd0bb13a219bb4c5bb885ee1f30f Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 13 Mar 2022 16:22:48 -0600 Subject: [PATCH 347/581] bloblist: Describe the design goals Add a comment explaining the design goals of bloblist, to make it easier for people to understand and comment on the structure. Signed-off-by: Simon Glass --- doc/develop/bloblist.rst | 2 ++ include/bloblist.h | 62 ++++++++++++++++++++++++++++++++++++++-- 2 files changed, 62 insertions(+), 2 deletions(-) diff --git a/doc/develop/bloblist.rst b/doc/develop/bloblist.rst index 572aa65d764..81643c7674b 100644 --- a/doc/develop/bloblist.rst +++ b/doc/develop/bloblist.rst @@ -11,6 +11,8 @@ a central structure. Each record of information is assigned a tag so that its owner can find it and update it. Each record is generally described by a C structure defined by the code that owns it. +For the design goals of bloblist, please see the comments at the top of the +`bloblist.h` header file. Passing state through the boot process -------------------------------------- diff --git a/include/bloblist.h b/include/bloblist.h index d0e128acf10..9684bfd5f4b 100644 --- a/include/bloblist.h +++ b/include/bloblist.h @@ -3,8 +3,66 @@ * This provides a standard way of passing information between boot phases * (TPL -> SPL -> U-Boot proper.) * - * A list of blobs of data, tagged with their owner. The list resides in memory - * and can be updated by SPL, U-Boot, etc. + * It consists of a list of blobs of data, tagged with their owner / contents. + * The list resides in memory and can be updated by SPL, U-Boot, etc. + * + * Design goals for bloblist: + * + * 1. Small and efficient structure. This avoids UUIDs or 16-byte name fields, + * since a 32-bit tag provides enough space for all the tags we will even need. + * If UUIDs are desired, they can be added inside a particular blob. + * + * 2. Avoids use of pointers, so the structure can be relocated in memory. The + * data in each blob is inline, rather than using pointers. + * + * 3. Bloblist is designed to start small in TPL or SPL, when only a few things + * are needed, like the memory size or whether console output should be enabled. + * Then it can grow in U-Boot proper, e.g. to include space for ACPI tables. + * + * 4. The bloblist structure is simple enough that it can be implemented in a + * small amount of C code. The API does not require use of strings or UUIDs, + * which would add to code size. For Thumb-2 the code size needed in SPL is + * approximately 940 bytes (e.g. for chromebook_bob). + * + * 5. Bloblist uses 16-byte alignment internally and is designed to start on a + * 16-byte boundary. Its headers are multiples of 16 bytes. This makes it easier + * to deal with data structures which need this level of alignment, such as ACPI + * tables. For use in SPL and TPL the alignment can be relaxed, since it can be + * relocated to an aligned address in U-Boot proper. + * + * 6. Bloblist is designed to be passed to Linux as reserved memory. While linux + * doesn't understand the bloblist header, it can be passed the indivdual blobs. + * For example, ACPI tables can reside in a blob and the address of those is + * passed to Linux, without Linux ever being away of the existence of a + * bloblist. Having all the blobs contiguous in memory simplifies the + * reserved-memory space. + * + * 7. Bloblist tags are defined in the enum below. There is an area for + * project-specific stuff (e.g. U-Boot, TF-A) and vendor-specific stuff, e.g. + * something used only on a particular SoC. There is also a private area for + * temporary, local use. + * + * 8. Bloblist includes a simple checksum, so that each boot phase can update + * this and allow the next phase to check that all is well. While the bloblist + * is small, this is quite cheap to calculate. When it grows (e.g. in U-Boot\ + * proper), the CPU is likely running faster, so it is not prohibitive. Having + * said that, U-Boot is often the last phase that uses bloblist, so calculating + * the checksum there may not be necessary. + * + * 9. It would be possible to extend bloblist to support a non-contiguous + * structure, e.g. by creating a blob type that points to the next bloblist. + * This does not seem necessary for now. It adds complexity and code. We can + * always just copy it. + * + * 10. Bloblist is designed for simple structures, those that can be defined by + * a single C struct. More complex structures should be passed in a device tree. + * There are some exceptions, chiefly the various binary structures that Intel + * is fond of creating. But device tree provides a dictionary-type format which + * is fairly efficient (for use in U-Boot proper and Linux at least), along with + * a schema and a good set of tools. New formats should be designed around + * device tree rather than creating new binary formats, unless they are needed + * early in boot (where libfdt's 3KB of overhead is too large) and are trival + * enough to be described by a C struct. * * Copyright 2018 Google, Inc * Written by Simon Glass -- GitLab From 42ae363ddd99c38ab26434b9d1c8b68610844e79 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 18 Mar 2022 18:01:50 -0600 Subject: [PATCH 348/581] dtoc: Update fdt tests to use test_util Use the common functions to run tests and report results. Ensure that the result code indicates success or failure. Signed-off-by: Simon Glass Reviewed-by: Alper Nebi Yasak --- tools/dtoc/test_fdt.py | 27 ++++++++++----------------- 1 file changed, 10 insertions(+), 17 deletions(-) diff --git a/tools/dtoc/test_fdt.py b/tools/dtoc/test_fdt.py index 914ed6aed59..3859af8d032 100755 --- a/tools/dtoc/test_fdt.py +++ b/tools/dtoc/test_fdt.py @@ -780,25 +780,17 @@ def RunTests(args): Args: args: List of positional args provided to fdt. This can hold a test name to execute (as in 'fdt -t testFdt', for example) + + Returns: + Return code, 0 on success """ result = unittest.TestResult() - sys.argv = [sys.argv[0]] test_name = args and args[0] or None - for module in (TestFdt, TestNode, TestProp, TestFdtUtil): - if test_name: - try: - suite = unittest.TestLoader().loadTestsFromName(test_name, module) - except AttributeError: - continue - else: - suite = unittest.TestLoader().loadTestsFromTestCase(module) - suite.run(result) - - print(result) - for _, err in result.errors: - print(err) - for _, err in result.failures: - print(err) + test_util.run_test_suites( + result, False, False, False, None, test_name, None, + [TestFdt, TestNode, TestProp, TestFdtUtil]) + + return test_util.report_result('fdt', test_name, result) if __name__ != '__main__': sys.exit(1) @@ -816,6 +808,7 @@ parser.add_option('-T', '--test-coverage', action='store_true', # Run our meagre tests if options.test: - RunTests(args) + ret_code = RunTests(args) + sys.exit(ret_code) elif options.test_coverage: RunTestCoverage() -- GitLab From 24057fe0a8f70ae872da0a8f4889fe7b8cfa09db Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Wed, 23 Mar 2022 18:24:38 -0400 Subject: [PATCH 349/581] sandbox: usb: Fix out-of-bounds read when fd=-1 sandbox_flash_bulk uses priv->read_len to determine if priv->buff contains the response data (such as from SCSI_INQUIRY). However, if priv->fd=-1 in handle_read, then priv->read_len is not set even though we are going to PHASE_DATA. This causes sandbox_flash_bulk to try and read len bytes from priv->buff, which likely goes past the end of the buffer. Fix this by always setting priv->read_len even if we aren't going to read anything. Fixes: f4f715360c ("dm: usb: sandbox: Add an emulator for USB flash devices") Signed-off-by: Sean Anderson Reviewed-by: Simon Glass --- drivers/usb/emul/sandbox_flash.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/usb/emul/sandbox_flash.c b/drivers/usb/emul/sandbox_flash.c index cc80f671337..01b2b41cce9 100644 --- a/drivers/usb/emul/sandbox_flash.c +++ b/drivers/usb/emul/sandbox_flash.c @@ -228,9 +228,9 @@ static void handle_read(struct sandbox_flash_priv *priv, ulong lba, ulong transfer_len) { debug("%s: lba=%lx, transfer_len=%lx\n", __func__, lba, transfer_len); + priv->read_len = transfer_len; if (priv->fd != -1) { os_lseek(priv->fd, lba * SANDBOX_FLASH_BLOCK_LEN, OS_SEEK_SET); - priv->read_len = transfer_len; setup_response(priv, priv->buff, transfer_len * SANDBOX_FLASH_BLOCK_LEN); } else { @@ -336,6 +336,9 @@ static int sandbox_flash_bulk(struct udevice *dev, struct usb_device *udev, if (priv->read_len) { ulong bytes_read; + if (priv->fd == -1) + return -EIO; + bytes_read = os_read(priv->fd, buff, len); if (bytes_read != len) return -EIO; -- GitLab From 8b52f237f0f8ae63c930fa8459c39ab87367bad1 Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Mon, 28 Mar 2022 18:14:37 -0400 Subject: [PATCH 350/581] dm: core: Provide fallbacks for ofnode_conf_read_... Because fdt_get_config_str et al. were moved/renamed to ofnode_conf_read_str, they now depend on CONFIG_DM as well as CONFIG_OF_CONTROL. Add some fallback implementations, preventing a linker error when CONFIG_SPL_OF_CONTROL and CONFIG_SPL_ENV_IS_IN_MMC are enabled and CONFIG_SPL_DM is disabled. Fixes: 7de8bd03c3 ("treewide: fdt: Move fdt_get_config_... to ofnode_conf_read...") Signed-off-by: Sean Anderson --- include/dm/ofnode.h | 66 ++++++++++++++++++++++++++++----------------- 1 file changed, 42 insertions(+), 24 deletions(-) diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h index 2c4d72d77f5..bb60433124b 100644 --- a/include/dm/ofnode.h +++ b/include/dm/ofnode.h @@ -1181,6 +1181,33 @@ int ofnode_write_string(ofnode node, const char *propname, const char *value); */ int ofnode_set_enabled(ofnode node, bool value); +/** + * ofnode_get_phy_node() - Get PHY node for a MAC (if not fixed-link) + * + * This function parses PHY handle from the Ethernet controller's ofnode + * (trying all possible PHY handle property names), and returns the PHY ofnode. + * + * Before this is used, ofnode_phy_is_fixed_link() should be checked first, and + * if the result to that is true, this function should not be called. + * + * @eth_node: ofnode belonging to the Ethernet controller + * Return: ofnode of the PHY, if it exists, otherwise an invalid ofnode + */ +ofnode ofnode_get_phy_node(ofnode eth_node); + +/** + * ofnode_read_phy_mode() - Read PHY connection type from a MAC node + * + * This function parses the "phy-mode" / "phy-connection-type" property and + * returns the corresponding PHY interface type. + * + * @mac_node: ofnode containing the property + * Return: one of PHY_INTERFACE_MODE_* constants, PHY_INTERFACE_MODE_NA on + * error + */ +phy_interface_t ofnode_read_phy_mode(ofnode mac_node); + +#if CONFIG_IS_ENABLED(DM) /** * ofnode_conf_read_bool() - Read a boolean value from the U-Boot config * @@ -1218,30 +1245,21 @@ int ofnode_conf_read_int(const char *prop_name, int default_val); */ const char *ofnode_conf_read_str(const char *prop_name); -/** - * ofnode_get_phy_node() - Get PHY node for a MAC (if not fixed-link) - * - * This function parses PHY handle from the Ethernet controller's ofnode - * (trying all possible PHY handle property names), and returns the PHY ofnode. - * - * Before this is used, ofnode_phy_is_fixed_link() should be checked first, and - * if the result to that is true, this function should not be called. - * - * @eth_node: ofnode belonging to the Ethernet controller - * Return: ofnode of the PHY, if it exists, otherwise an invalid ofnode - */ -ofnode ofnode_get_phy_node(ofnode eth_node); +#else /* CONFIG_DM */ +static inline bool ofnode_conf_read_bool(const char *prop_name) +{ + return false; +} -/** - * ofnode_read_phy_mode() - Read PHY connection type from a MAC node - * - * This function parses the "phy-mode" / "phy-connection-type" property and - * returns the corresponding PHY interface type. - * - * @mac_node: ofnode containing the property - * Return: one of PHY_INTERFACE_MODE_* constants, PHY_INTERFACE_MODE_NA on - * error - */ -phy_interface_t ofnode_read_phy_mode(ofnode mac_node); +static inline int ofnode_conf_read_int(const char *prop_name, int default_val) +{ + return default_val; +} + +static inline const char *ofnode_conf_read_str(const char *prop_name) +{ + return NULL; +} +#endif /* CONFIG_DM */ #endif -- GitLab From 501a9a7ed803ac948adb392e541f9da9bafad60e Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Wed, 30 Mar 2022 12:26:40 -0400 Subject: [PATCH 351/581] dm: core: Use device_foreach_child where possible We have some nice macros for iterating over devices in device.h, but they are not used by the driver core. Convert all the users I could find. Signed-off-by: Sean Anderson --- drivers/core/device-remove.c | 4 ++-- drivers/core/device.c | 21 ++++++++++----------- drivers/core/devres.c | 2 +- drivers/core/dump.c | 2 +- 4 files changed, 14 insertions(+), 15 deletions(-) diff --git a/drivers/core/device-remove.c b/drivers/core/device-remove.c index 73d2e9e4208..a86b9325dd8 100644 --- a/drivers/core/device-remove.c +++ b/drivers/core/device-remove.c @@ -29,7 +29,7 @@ int device_chld_unbind(struct udevice *dev, struct driver *drv) assert(dev); - list_for_each_entry_safe(pos, n, &dev->child_head, sibling_node) { + device_foreach_child_safe(pos, n, dev) { if (drv && (pos->driver != drv)) continue; @@ -52,7 +52,7 @@ int device_chld_remove(struct udevice *dev, struct driver *drv, assert(dev); - list_for_each_entry_safe(pos, n, &dev->child_head, sibling_node) { + device_foreach_child_safe(pos, n, dev) { int ret; if (drv && (pos->driver != drv)) diff --git a/drivers/core/device.c b/drivers/core/device.c index 3d7fbfe0736..7f71570a940 100644 --- a/drivers/core/device.c +++ b/drivers/core/device.c @@ -284,8 +284,7 @@ int device_reparent(struct udevice *dev, struct udevice *new_parent) assert(dev); assert(new_parent); - list_for_each_entry_safe(pos, n, &dev->parent->child_head, - sibling_node) { + device_foreach_child_safe(pos, n, dev->parent) { if (pos->driver != dev->driver) continue; @@ -724,7 +723,7 @@ int device_get_child(const struct udevice *parent, int index, { struct udevice *dev; - list_for_each_entry(dev, &parent->child_head, sibling_node) { + device_foreach_child(dev, parent) { if (!index--) return device_get_device_tail(dev, 0, devp); } @@ -737,7 +736,7 @@ int device_get_child_count(const struct udevice *parent) struct udevice *dev; int count = 0; - list_for_each_entry(dev, &parent->child_head, sibling_node) + device_foreach_child(dev, parent) count++; return count; @@ -748,7 +747,7 @@ int device_get_decendent_count(const struct udevice *parent) const struct udevice *dev; int count = 1; - list_for_each_entry(dev, &parent->child_head, sibling_node) + device_foreach_child(dev, parent) count += device_get_decendent_count(dev); return count; @@ -761,7 +760,7 @@ int device_find_child_by_seq(const struct udevice *parent, int seq, *devp = NULL; - list_for_each_entry(dev, &parent->child_head, sibling_node) { + device_foreach_child(dev, parent) { if (dev->seq_ == seq) { *devp = dev; return 0; @@ -790,7 +789,7 @@ int device_find_child_by_of_offset(const struct udevice *parent, int of_offset, *devp = NULL; - list_for_each_entry(dev, &parent->child_head, sibling_node) { + device_foreach_child(dev, parent) { if (dev_of_offset(dev) == of_offset) { *devp = dev; return 0; @@ -819,7 +818,7 @@ static struct udevice *_device_find_global_by_ofnode(struct udevice *parent, if (ofnode_equal(dev_ofnode(parent), ofnode)) return parent; - list_for_each_entry(dev, &parent->child_head, sibling_node) { + device_foreach_child(dev, parent) { found = _device_find_global_by_ofnode(dev, ofnode); if (found) return found; @@ -897,7 +896,7 @@ int device_find_first_inactive_child(const struct udevice *parent, struct udevice *dev; *devp = NULL; - list_for_each_entry(dev, &parent->child_head, sibling_node) { + device_foreach_child(dev, parent) { if (!device_active(dev) && device_get_uclass_id(dev) == uclass_id) { *devp = dev; @@ -915,7 +914,7 @@ int device_find_first_child_by_uclass(const struct udevice *parent, struct udevice *dev; *devp = NULL; - list_for_each_entry(dev, &parent->child_head, sibling_node) { + device_foreach_child(dev, parent) { if (device_get_uclass_id(dev) == uclass_id) { *devp = dev; return 0; @@ -932,7 +931,7 @@ int device_find_child_by_namelen(const struct udevice *parent, const char *name, *devp = NULL; - list_for_each_entry(dev, &parent->child_head, sibling_node) { + device_foreach_child(dev, parent) { if (!strncmp(dev->name, name, len) && strlen(dev->name) == len) { *devp = dev; diff --git a/drivers/core/devres.c b/drivers/core/devres.c index 313ddc7089c..78914bdf7f2 100644 --- a/drivers/core/devres.c +++ b/drivers/core/devres.c @@ -232,7 +232,7 @@ static void dump_resources(struct udevice *dev, int depth) (unsigned long)dr->size, dr->name, devres_phase_name[dr->phase]); - list_for_each_entry(child, &dev->child_head, sibling_node) + device_foreach_child(child, dev) dump_resources(child, depth + 1); } diff --git a/drivers/core/dump.c b/drivers/core/dump.c index f2f9cacc56c..fe97dca954d 100644 --- a/drivers/core/dump.c +++ b/drivers/core/dump.c @@ -39,7 +39,7 @@ static void show_devices(struct udevice *dev, int depth, int last_flag) printf("%s\n", dev->name); - list_for_each_entry(child, &dev->child_head, sibling_node) { + device_foreach_child(child, dev) { is_last = list_is_last(&child->sibling_node, &dev->child_head); show_devices(child, depth + 1, (last_flag << 1) | is_last); } -- GitLab From 6474aaa1d1de0fe246707ff05816a32776d48fa8 Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak Date: Sat, 2 Apr 2022 20:06:04 +0300 Subject: [PATCH 352/581] patman: test_util: Fix printing results for failed tests When printing a python tool's test results, the entire list of failed tests and their tracebacks are reprinted for every failed test. This makes the test output quite unreadable. Fix the loop to print failures and tracebacks one at a time. Signed-off-by: Alper Nebi Yasak Reviewed-by: Simon Glass --- tools/patman/test_util.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/patman/test_util.py b/tools/patman/test_util.py index c60eb3628e2..8b2220dbbaf 100644 --- a/tools/patman/test_util.py +++ b/tools/patman/test_util.py @@ -127,7 +127,7 @@ def report_result(toolname:str, test_name: str, result: unittest.TestResult): for test, err in result.errors: print(test.id(), err) for test, err in result.failures: - print(err, result.failures) + print(test.id(), err) if result.skipped: print('%d %s test%s SKIPPED:' % (len(result.skipped), toolname, 's' if len(result.skipped) > 1 else '')) -- GitLab From ce12c47b92152e9457d3daa3ddbf53c1cc3de0bb Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak Date: Sat, 2 Apr 2022 20:06:05 +0300 Subject: [PATCH 353/581] patman: test_util: Handle nonexistent tests while loading tests It's possible to request a specific test to run when trying to run a python tool's tests. If we request a nonexistent test, the unittest loaders generate a fake test that reports this as an error. However, we get these fake tests even when the test exists, because test_util can load tests from multiple places one by one and the test we want only exists in one. The test_util helpers currently remove these fake tests when printing test results, but that's more of a workaround than a proper solution. Instead, don't even try to load the missing tests. Signed-off-by: Alper Nebi Yasak Reviewed-by: Simon Glass --- tools/patman/test_util.py | 21 +++++---------------- 1 file changed, 5 insertions(+), 16 deletions(-) diff --git a/tools/patman/test_util.py b/tools/patman/test_util.py index 8b2220dbbaf..a4c2a2c3c0b 100644 --- a/tools/patman/test_util.py +++ b/tools/patman/test_util.py @@ -110,19 +110,6 @@ def report_result(toolname:str, test_name: str, result: unittest.TestResult): test_name: Name of test that was run, or None for all result: A unittest.TestResult object containing the results """ - # Remove errors which just indicate a missing test. Since Python v3.5 If an - # ImportError or AttributeError occurs while traversing name then a - # synthetic test that raises that error when run will be returned. These - # errors are included in the errors accumulated by result.errors. - if test_name: - errors = [] - - for test, err in result.errors: - if ("has no attribute '%s'" % test_name) not in err: - errors.append((test, err)) - result.testsRun -= 1 - result.errors = errors - print(result) for test, err in result.errors: print(test.id(), err) @@ -184,10 +171,12 @@ def run_test_suites(result, debug, verbosity, test_preserve_dirs, processes, preserve_outdirs=test_preserve_dirs and test_name is not None, toolpath=toolpath, verbosity=verbosity) if test_name: - try: + # Since Python v3.5 If an ImportError or AttributeError occurs + # while traversing a name then a synthetic test that raises that + # error when run will be returned. Check that the requested test + # exists, otherwise these errors are included in the results. + if test_name in loader.getTestCaseNames(module): suite.addTests(loader.loadTestsFromName(test_name, module)) - except AttributeError: - continue else: suite.addTests(loader.loadTestsFromTestCase(module)) if use_concurrent and processes != 1: -- GitLab From d8318feba1ef3b2a74495ea7dca33ad1276a4ffe Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak Date: Sat, 2 Apr 2022 20:06:06 +0300 Subject: [PATCH 354/581] patman: test_util: Use unittest text runner to print test results The python tools' test utilities handle printing test results, but the output is quite bare compared to an ordinary unittest run. Delegate printing the results to a unittest text runner, which gives us niceties like clear separation between each test's result and how long it took to run the test suite. Unfortunately it does not print info for skipped tests by default, but this can be handled later by a custom test result subclass. It also does not print the tool name; manually print a heading that includes the toolname so that the outputs of each tool's tests are distinguishable in the CI output. Signed-off-by: Alper Nebi Yasak Reviewed-by: Simon Glass --- tools/binman/main.py | 8 ++---- tools/buildman/main.py | 8 ++---- tools/dtoc/main.py | 9 +++--- tools/dtoc/test_fdt.py | 8 +++--- tools/patman/main.py | 8 ++---- tools/patman/test_util.py | 58 ++++++++++++++------------------------- 6 files changed, 38 insertions(+), 61 deletions(-) diff --git a/tools/binman/main.py b/tools/binman/main.py index 5fb9404ef6a..14432a8d0dc 100755 --- a/tools/binman/main.py +++ b/tools/binman/main.py @@ -13,7 +13,6 @@ import os import site import sys import traceback -import unittest # Get the absolute path to this file at run-time our_path = os.path.dirname(os.path.realpath(__file__)) @@ -73,19 +72,18 @@ def RunTests(debug, verbosity, processes, test_preserve_dirs, args, toolpath): from binman import image_test import doctest - result = unittest.TestResult() test_name = args and args[0] or None # Run the entry tests first ,since these need to be the first to import the # 'entry' module. - test_util.run_test_suites( - result, debug, verbosity, test_preserve_dirs, processes, test_name, + result = test_util.run_test_suites( + 'binman', debug, verbosity, test_preserve_dirs, processes, test_name, toolpath, [bintool_test.TestBintool, entry_test.TestEntry, ftest.TestFunctional, fdt_test.TestFdt, elf_test.TestElf, image_test.TestImage, cbfs_util_test.TestCbfs, fip_util_test.TestFip]) - return test_util.report_result('binman', test_name, result) + return (0 if result.wasSuccessful() else 1) def RunTestCoverage(toolpath): """Run the tests and check that we get 100% coverage""" diff --git a/tools/buildman/main.py b/tools/buildman/main.py index 3b6af240802..67c560c48d3 100755 --- a/tools/buildman/main.py +++ b/tools/buildman/main.py @@ -11,7 +11,6 @@ import multiprocessing import os import re import sys -import unittest # Bring in the patman libraries our_path = os.path.dirname(os.path.realpath(__file__)) @@ -34,19 +33,18 @@ def RunTests(skip_net_tests, verboose, args): from buildman import test import doctest - result = unittest.TestResult() test_name = args and args[0] or None if skip_net_tests: test.use_network = False # Run the entry tests first ,since these need to be the first to import the # 'entry' module. - test_util.run_test_suites( - result, False, verboose, False, None, test_name, [], + result = test_util.run_test_suites( + 'buildman', False, verboose, False, None, test_name, [], [test.TestBuild, func_test.TestFunctional, 'buildman.toolchain', 'patman.gitutil']) - return test_util.report_result('buildman', test_name, result) + return (0 if result.wasSuccessful() else 1) options, args = cmdline.ParseArgs() diff --git a/tools/dtoc/main.py b/tools/dtoc/main.py index fac9db9c786..5508759d4d5 100755 --- a/tools/dtoc/main.py +++ b/tools/dtoc/main.py @@ -24,7 +24,6 @@ see doc/driver-model/of-plat.rst from argparse import ArgumentParser import os import sys -import unittest # Bring in the patman libraries our_path = os.path.dirname(os.path.realpath(__file__)) @@ -49,18 +48,18 @@ def run_tests(processes, args): from dtoc import test_src_scan from dtoc import test_dtoc - result = unittest.TestResult() sys.argv = [sys.argv[0]] test_name = args.files and args.files[0] or None test_dtoc.setup() - test_util.run_test_suites( - result, debug=True, verbosity=1, test_preserve_dirs=False, + result = test_util.run_test_suites( + toolname='dtoc', debug=True, verbosity=1, test_preserve_dirs=False, processes=processes, test_name=test_name, toolpath=[], class_and_module_list=[test_dtoc.TestDtoc,test_src_scan.TestSrcScan]) - return test_util.report_result('binman', test_name, result) + return (0 if result.wasSuccessful() else 1) + def RunTestCoverage(): """Run the tests and check that we get 100% coverage""" diff --git a/tools/dtoc/test_fdt.py b/tools/dtoc/test_fdt.py index 3859af8d032..3baf4437cdd 100755 --- a/tools/dtoc/test_fdt.py +++ b/tools/dtoc/test_fdt.py @@ -784,13 +784,13 @@ def RunTests(args): Returns: Return code, 0 on success """ - result = unittest.TestResult() test_name = args and args[0] or None - test_util.run_test_suites( - result, False, False, False, None, test_name, None, + result = test_util.run_test_suites( + 'test_fdt', False, False, False, None, test_name, None, [TestFdt, TestNode, TestProp, TestFdtUtil]) - return test_util.report_result('fdt', test_name, result) + return (0 if result.wasSuccessful() else 1) + if __name__ != '__main__': sys.exit(1) diff --git a/tools/patman/main.py b/tools/patman/main.py index 2a2ac457093..66d4806c8d8 100755 --- a/tools/patman/main.py +++ b/tools/patman/main.py @@ -12,7 +12,6 @@ import re import shutil import sys import traceback -import unittest if __name__ == "__main__": # Allow 'from patman import xxx to work' @@ -134,13 +133,12 @@ if args.cmd == 'test': import doctest from patman import func_test - result = unittest.TestResult() - test_util.run_test_suites( - result, False, False, False, None, None, None, + result = test_util.run_test_suites( + 'patman', False, False, False, None, None, None, [test_checkpatch.TestPatch, func_test.TestFunctional, 'gitutil', 'settings', 'terminal']) - sys.exit(test_util.report_result('patman', args.testname, result)) + sys.exit(0 if result.wasSuccessful() else 1) # Process commits, produce patches files, check them, email them elif args.cmd == 'send': diff --git a/tools/patman/test_util.py b/tools/patman/test_util.py index a4c2a2c3c0b..ba8f87f75f0 100644 --- a/tools/patman/test_util.py +++ b/tools/patman/test_util.py @@ -102,36 +102,12 @@ def capture_sys_output(): sys.stdout, sys.stderr = old_out, old_err -def report_result(toolname:str, test_name: str, result: unittest.TestResult): - """Report the results from a suite of tests - - Args: - toolname: Name of the tool that ran the tests - test_name: Name of test that was run, or None for all - result: A unittest.TestResult object containing the results - """ - print(result) - for test, err in result.errors: - print(test.id(), err) - for test, err in result.failures: - print(test.id(), err) - if result.skipped: - print('%d %s test%s SKIPPED:' % (len(result.skipped), toolname, - 's' if len(result.skipped) > 1 else '')) - for skip_info in result.skipped: - print('%s: %s' % (skip_info[0], skip_info[1])) - if result.errors or result.failures: - print('%s tests FAILED' % toolname) - return 1 - return 0 - - -def run_test_suites(result, debug, verbosity, test_preserve_dirs, processes, +def run_test_suites(toolname, debug, verbosity, test_preserve_dirs, processes, test_name, toolpath, class_and_module_list): """Run a series of test suites and collect the results Args: - result: A unittest.TestResult object to add the results to + toolname: Name of the tool that ran the tests debug: True to enable debugging, which shows a full stack trace on error verbosity: Verbosity level to use (0-4) test_preserve_dirs: True to preserve the input directory used by tests @@ -145,11 +121,6 @@ def run_test_suites(result, debug, verbosity, test_preserve_dirs, processes, class_and_module_list: List of test classes (type class) and module names (type str) to run """ - for module in class_and_module_list: - if isinstance(module, str) and (not test_name or test_name == module): - suite = doctest.DocTestSuite(module) - suite.run(result) - sys.argv = [sys.argv[0]] if debug: sys.argv.append('-D') @@ -161,6 +132,19 @@ def run_test_suites(result, debug, verbosity, test_preserve_dirs, processes, suite = unittest.TestSuite() loader = unittest.TestLoader() + runner = unittest.TextTestRunner( + stream=sys.stdout, + verbosity=(1 if verbosity is None else verbosity), + ) + + if use_concurrent and processes != 1: + suite = ConcurrentTestSuite(suite, + fork_for_tests(processes or multiprocessing.cpu_count())) + + for module in class_and_module_list: + if isinstance(module, str) and (not test_name or test_name == module): + suite.addTests(doctest.DocTestSuite(module)) + for module in class_and_module_list: if isinstance(module, str): continue @@ -179,9 +163,9 @@ def run_test_suites(result, debug, verbosity, test_preserve_dirs, processes, suite.addTests(loader.loadTestsFromName(test_name, module)) else: suite.addTests(loader.loadTestsFromTestCase(module)) - if use_concurrent and processes != 1: - concurrent_suite = ConcurrentTestSuite(suite, - fork_for_tests(processes or multiprocessing.cpu_count())) - concurrent_suite.run(result) - else: - suite.run(result) + + print(f" Running {toolname} tests ".center(70, "=")) + result = runner.run(suite) + print() + + return result -- GitLab From dd6b92b0b9532bb4ba0ad8ac3620b1f3b81adf5b Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak Date: Sat, 2 Apr 2022 20:06:07 +0300 Subject: [PATCH 355/581] patman: test_util: Customize unittest test results for more info By default, unittest test summaries only print extended info about tests that failed or couldn't run due to an error. Use a custom text result class to print info about more cases: skipped tests, expected failures and unexpected successes. Signed-off-by: Alper Nebi Yasak --- tools/patman/test_util.py | 46 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/tools/patman/test_util.py b/tools/patman/test_util.py index ba8f87f75f0..130d9140914 100644 --- a/tools/patman/test_util.py +++ b/tools/patman/test_util.py @@ -102,6 +102,51 @@ def capture_sys_output(): sys.stdout, sys.stderr = old_out, old_err +class FullTextTestResult(unittest.TextTestResult): + """A test result class that can print extended text results to a stream + + This is meant to be used by a TestRunner as a result class. Like + TextTestResult, this prints out the names of tests as they are run, + errors as they occur, and a summary of the results at the end of the + test run. Beyond those, this prints information about skipped tests, + expected failures and unexpected successes. + + Args: + stream: A file-like object to write results to + descriptions (bool): True to print descriptions with test names + verbosity (int): Detail of printed output per test as they run + Test stdout and stderr always get printed when buffering + them is disabled by the test runner. In addition to that, + 0: Print nothing + 1: Print a dot per test + 2: Print test names + """ + def __init__(self, stream, descriptions, verbosity): + self.verbosity = verbosity + super().__init__(stream, descriptions, verbosity) + + def printErrors(self): + "Called by TestRunner after test run to summarize the tests" + # The parent class doesn't keep unexpected successes in the same + # format as the rest. Adapt it to what printErrorList expects. + unexpected_successes = [ + (test, 'Test was expected to fail, but succeeded.\n') + for test in self.unexpectedSuccesses + ] + + super().printErrors() # FAIL and ERROR + self.printErrorList('SKIP', self.skipped) + self.printErrorList('XFAIL', self.expectedFailures) + self.printErrorList('XPASS', unexpected_successes) + + def addSkip(self, test, reason): + """Called when a test is skipped.""" + # Add empty line to keep spacing consistent with other results + if not reason.endswith('\n'): + reason += '\n' + super().addSkip(test, reason) + + def run_test_suites(toolname, debug, verbosity, test_preserve_dirs, processes, test_name, toolpath, class_and_module_list): """Run a series of test suites and collect the results @@ -135,6 +180,7 @@ def run_test_suites(toolname, debug, verbosity, test_preserve_dirs, processes, runner = unittest.TextTestRunner( stream=sys.stdout, verbosity=(1 if verbosity is None else verbosity), + resultclass=FullTextTestResult, ) if use_concurrent and processes != 1: -- GitLab From ebcaafcded40da8ae6cb4234c2ba9901c7bee644 Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak Date: Sat, 2 Apr 2022 20:06:08 +0300 Subject: [PATCH 356/581] patman: test_util: Print test stdout/stderr within test summaries While running tests for a python tool, the tests' outputs get printed in whatever order they happen to run, without any indication as to which output belongs to which test. Unittest supports capturing these outputs and printing them as part of the test summaries, but when a failure or error occurs it switches back to printing as the tests run. Testtools and subunit tests can do the same as their parts inherit from unittest, but they don't outright expose this functionality. On the unittest side, enable output buffering for the custom test result class. Try to avoid ugly outputs by not printing stdout/stderr before the test summary for low verbosity levels and for successful tests. On the subunit side, implement a custom TestProtocolClient that enables the same underlying functionality and injects the captured streams as additional test details. This causes them to be merged into their test's error traceback message, which is later rebuilt into an exception and passed to our unittest report class. Signed-off-by: Alper Nebi Yasak Reviewed-by: Simon Glass --- tools/concurrencytest/concurrencytest.py | 83 +++++++++++++++++++++++- tools/patman/test_util.py | 33 +++++++++- 2 files changed, 112 insertions(+), 4 deletions(-) diff --git a/tools/concurrencytest/concurrencytest.py b/tools/concurrencytest/concurrencytest.py index 5e88b94f415..1c4f03f37e5 100644 --- a/tools/concurrencytest/concurrencytest.py +++ b/tools/concurrencytest/concurrencytest.py @@ -31,6 +31,7 @@ from subunit import ProtocolTestCase, TestProtocolClient from subunit.test_results import AutoTimingTestResultDecorator from testtools import ConcurrentTestSuite, iterate_tests +from testtools.content import TracebackContent, text_content _all__ = [ @@ -43,11 +44,81 @@ _all__ = [ CPU_COUNT = cpu_count() -def fork_for_tests(concurrency_num=CPU_COUNT): +class BufferingTestProtocolClient(TestProtocolClient): + """A TestProtocolClient which can buffer the test outputs + + This class captures the stdout and stderr output streams of the + tests as it runs them, and includes the output texts in the subunit + stream as additional details. + + Args: + stream: A file-like object to write a subunit stream to + buffer (bool): True to capture test stdout/stderr outputs and + include them in the test details + """ + def __init__(self, stream, buffer=True): + super().__init__(stream) + self.buffer = buffer + + def _addOutcome(self, outcome, test, error=None, details=None, + error_permitted=True): + """Report a test outcome to the subunit stream + + The parent class uses this function as a common implementation + for various methods that report successes, errors, failures, etc. + + This version automatically upgrades the error tracebacks to the + new 'details' format by wrapping them in a Content object, so + that we can include the captured test output in the test result + details. + + Args: + outcome: A string describing the outcome - used as the + event name in the subunit stream. + test: The test case whose outcome is to be reported + error: Standard unittest positional argument form - an + exc_info tuple. + details: New Testing-in-python drafted API; a dict from + string to subunit.Content objects. + error_permitted: If True then one and only one of error or + details must be supplied. If False then error must not + be supplied and details is still optional. + """ + if details is None: + details = {} + + # Parent will raise an exception if error_permitted is False but + # error is not None. We want that exception in that case, so + # don't touch error when error_permitted is explicitly False. + if error_permitted and error is not None: + # Parent class prefers error over details + details['traceback'] = TracebackContent(error, test) + error_permitted = False + error = None + + if self.buffer: + stdout = sys.stdout.getvalue() + if stdout: + details['stdout'] = text_content(stdout) + + stderr = sys.stderr.getvalue() + if stderr: + details['stderr'] = text_content(stderr) + + return super()._addOutcome(outcome, test, error=error, + details=details, error_permitted=error_permitted) + + +def fork_for_tests(concurrency_num=CPU_COUNT, buffer=False): """Implementation of `make_tests` used to construct `ConcurrentTestSuite`. :param concurrency_num: number of processes to use. """ + if buffer: + test_protocol_client_class = BufferingTestProtocolClient + else: + test_protocol_client_class = TestProtocolClient + def do_fork(suite): """Take suite and start up multiple runners by forking (Unix only). @@ -76,7 +147,7 @@ def fork_for_tests(concurrency_num=CPU_COUNT): # child actually gets keystrokes for pdb etc). sys.stdin.close() subunit_result = AutoTimingTestResultDecorator( - TestProtocolClient(stream) + test_protocol_client_class(stream) ) process_suite.run(subunit_result) except: @@ -93,7 +164,13 @@ def fork_for_tests(concurrency_num=CPU_COUNT): else: os.close(c2pwrite) stream = os.fdopen(c2pread, 'rb') - test = ProtocolTestCase(stream) + # If we don't pass the second argument here, it defaults + # to sys.stdout.buffer down the line. But if we don't + # pass it *now*, it may be resolved after sys.stdout is + # replaced with a StringIO (to capture tests' outputs) + # which doesn't have a buffer attribute and can end up + # occasionally causing a 'broken-runner' error. + test = ProtocolTestCase(stream, sys.stdout.buffer) result.append(test) return result return do_fork diff --git a/tools/patman/test_util.py b/tools/patman/test_util.py index 130d9140914..c27e0b39e5f 100644 --- a/tools/patman/test_util.py +++ b/tools/patman/test_util.py @@ -15,6 +15,7 @@ from patman import command from io import StringIO +buffer_outputs = True use_concurrent = True try: from concurrencytest.concurrencytest import ConcurrentTestSuite @@ -120,6 +121,7 @@ class FullTextTestResult(unittest.TextTestResult): 0: Print nothing 1: Print a dot per test 2: Print test names + 3: Print test names, and buffered outputs for failing tests """ def __init__(self, stream, descriptions, verbosity): self.verbosity = verbosity @@ -139,12 +141,39 @@ class FullTextTestResult(unittest.TextTestResult): self.printErrorList('XFAIL', self.expectedFailures) self.printErrorList('XPASS', unexpected_successes) + def addError(self, test, err): + """Called when an error has occurred.""" + super().addError(test, err) + self._mirrorOutput &= self.verbosity >= 3 + + def addFailure(self, test, err): + """Called when a test has failed.""" + super().addFailure(test, err) + self._mirrorOutput &= self.verbosity >= 3 + + def addSubTest(self, test, subtest, err): + """Called at the end of a subtest.""" + super().addSubTest(test, subtest, err) + self._mirrorOutput &= self.verbosity >= 3 + + def addSuccess(self, test): + """Called when a test has completed successfully""" + super().addSuccess(test) + # Don't print stdout/stderr for successful tests + self._mirrorOutput = False + def addSkip(self, test, reason): """Called when a test is skipped.""" # Add empty line to keep spacing consistent with other results if not reason.endswith('\n'): reason += '\n' super().addSkip(test, reason) + self._mirrorOutput &= self.verbosity >= 3 + + def addExpectedFailure(self, test, err): + """Called when an expected failure/error occurred.""" + super().addExpectedFailure(test, err) + self._mirrorOutput &= self.verbosity >= 3 def run_test_suites(toolname, debug, verbosity, test_preserve_dirs, processes, @@ -180,12 +209,14 @@ def run_test_suites(toolname, debug, verbosity, test_preserve_dirs, processes, runner = unittest.TextTestRunner( stream=sys.stdout, verbosity=(1 if verbosity is None else verbosity), + buffer=buffer_outputs, resultclass=FullTextTestResult, ) if use_concurrent and processes != 1: suite = ConcurrentTestSuite(suite, - fork_for_tests(processes or multiprocessing.cpu_count())) + fork_for_tests(processes or multiprocessing.cpu_count(), + buffer=buffer_outputs)) for module in class_and_module_list: if isinstance(module, str) and (not test_name or test_name == module): -- GitLab From 7750ee45a62c7834f170f817232e432b8d2a14d3 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Mon, 4 Apr 2022 22:45:03 +0200 Subject: [PATCH 357/581] sandbox: add function os_printf() Before setting up the devices U-Boot's printf() function cannot be used for console output. Provide function os_printf() to print to stderr. Signed-off-by: Heinrich Schuchardt --- arch/sandbox/cpu/os.c | 13 +++++++++++++ include/os.h | 7 +++++++ 2 files changed, 20 insertions(+) diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c index 3b230606a97..f937991139c 100644 --- a/arch/sandbox/cpu/os.c +++ b/arch/sandbox/cpu/os.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -54,6 +55,18 @@ ssize_t os_write(int fd, const void *buf, size_t count) return write(fd, buf, count); } +int os_printf(const char *fmt, ...) +{ + va_list args; + int i; + + va_start(args, fmt); + i = vfprintf(stdout, fmt, args); + va_end(args); + + return i; +} + off_t os_lseek(int fd, off_t offset, int whence) { if (whence == OS_SEEK_SET) diff --git a/include/os.h b/include/os.h index 10e198cf503..148178787bc 100644 --- a/include/os.h +++ b/include/os.h @@ -16,6 +16,13 @@ struct rtc_time; struct sandbox_state; +/** + * os_printf() - print directly to OS console + * + * @format: format string + */ +int os_printf(const char *format, ...); + /** * Access to the OS read() system call * -- GitLab From 66995164ddbedd3449673052a10fc35917bf3d78 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Mon, 4 Apr 2022 22:45:04 +0200 Subject: [PATCH 358/581] sandbox: show error if the device-tree cannot be loaded U-Boot's printf() used before setting up U-Boot's serial driver does not create any output. Use os_printf() for error messages related to loading the device-tree. Signed-off-by: Heinrich Schuchardt --- arch/sandbox/cpu/cpu.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c index 7a82798c36d..d077948dd7b 100644 --- a/arch/sandbox/cpu/cpu.c +++ b/arch/sandbox/cpu/cpu.c @@ -331,27 +331,27 @@ void *board_fdt_blob_setup(int *ret) err = setup_auto_tree(blob); if (!err) goto done; - printf("Unable to create empty FDT: %s\n", fdt_strerror(err)); + os_printf("Unable to create empty FDT: %s\n", fdt_strerror(err)); *ret = -EINVAL; goto fail; } err = os_get_filesize(fname, &size); if (err < 0) { - printf("Failed to find FDT file '%s'\n", fname); + os_printf("Failed to find FDT file '%s'\n", fname); *ret = err; goto fail; } fd = os_open(fname, OS_O_RDONLY); if (fd < 0) { - printf("Failed to open FDT file '%s'\n", fname); + os_printf("Failed to open FDT file '%s'\n", fname); *ret = -EACCES; goto fail; } if (os_read(fd, blob, size) != size) { os_close(fd); - printf("Failed to read FDT file '%s'\n", fname); + os_printf("Failed to read FDT file '%s'\n", fname); *ret = -EIO; goto fail; } -- GitLab From d3eb1bf7cf242440c966ff20114abbe7f94c4a46 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Tue, 19 Apr 2022 18:46:36 +0200 Subject: [PATCH 359/581] dm: fix formatting of uclass dump Insert an empty line after each uclass independent of whether it has devices or not. Signed-off-by: Heinrich Schuchardt --- drivers/core/dump.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/core/dump.c b/drivers/core/dump.c index fe97dca954d..21d9e7a91f7 100644 --- a/drivers/core/dump.c +++ b/drivers/core/dump.c @@ -89,8 +89,6 @@ void dm_dump_uclass(void) continue; printf("uclass %d: %s\n", id, uc->uc_drv->name); - if (list_empty(&uc->dev_head)) - continue; uclass_foreach_dev(dev, uc) { dm_display_line(dev, i); i++; -- GitLab From 4780f7d8a6b2f479884d4e6068a73d1a69f82d4d Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Fri, 29 Apr 2022 10:53:34 -0400 Subject: [PATCH 360/581] patman: Fix defaults not propagating to subparsers On python 3.8.10 (and 3.10), subparsers are not updated with defaults. I suspect this is related to [1]. Fix this by explicitly updating subparsers with settings. [1] https://github.com/python/cpython/issues/89398 Fixes: 3145b63513 ("patman: Update defaults in subparsers") Signed-off-by: Sean Anderson Reviewed-by: Alper Nebi Yasak Tested-by: Alper Nebi Yasak --- tools/patman/settings.py | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/tools/patman/settings.py b/tools/patman/settings.py index 7c2b5c196c0..4c847fe88fd 100644 --- a/tools/patman/settings.py +++ b/tools/patman/settings.py @@ -246,8 +246,10 @@ def _UpdateDefaults(main_parser, config): # Collect the defaults from each parser defaults = {} + parser_defaults = [] for parser in parsers: pdefs = parser.parse_known_args()[0] + parser_defaults.append(pdefs) defaults.update(vars(pdefs)) # Go through the settings and collect defaults @@ -264,8 +266,11 @@ def _UpdateDefaults(main_parser, config): else: print("WARNING: Unknown setting %s" % name) - # Set all the defaults (this propagates through all subparsers) + # Set all the defaults and manually propagate them to subparsers main_parser.set_defaults(**defaults) + for parser, pdefs in zip(parsers, parser_defaults): + parser.set_defaults(**{ k: v for k, v in defaults.items() + if k in pdefs }) def _ReadAliasFile(fname): """Read in the U-Boot git alias file if it exists. -- GitLab From 2be964d29f11ead9c82ba1a19fbfeceb63e3f62d Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sat, 30 Apr 2022 07:55:53 +0200 Subject: [PATCH 361/581] sandbox: raise SANDBOX_RAM_SIZE_MB default to 256 The UEFI Self Certification Test (SCT) cannot run on 128 MiB. Signed-off-by: Heinrich Schuchardt --- arch/sandbox/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/sandbox/Kconfig b/arch/sandbox/Kconfig index 5f55c7f28e1..852a7c8bf2c 100644 --- a/arch/sandbox/Kconfig +++ b/arch/sandbox/Kconfig @@ -17,11 +17,11 @@ config SANDBOX64 config SANDBOX_RAM_SIZE_MB int "RAM size in MiB" - default 128 + default 256 range 64 4095 if !SANDBOX64 range 64 268435456 if SANDBOX64 help - Memory size of the sandbox in MiB. The default value is 128 MiB. + Memory size of the sandbox in MiB. The default value is 256 MiB. The minimum value is 64 MiB. The maximum value is 4095 MiB for the 32bit sandbox. -- GitLab From 06d590844f3560facdaeba728148e8db0fdbb023 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sat, 30 Apr 2022 11:26:23 +0200 Subject: [PATCH 362/581] test: fix some pylint errors in test_bind.py * Use spaces not tabs * Limit lines to 100 spaces * Remove an unused import * Sort imports correctly * Add a module description Signed-off-by: Heinrich Schuchardt --- test/py/tests/test_bind.py | 345 +++++++++++++++++++------------------ 1 file changed, 175 insertions(+), 170 deletions(-) diff --git a/test/py/tests/test_bind.py b/test/py/tests/test_bind.py index 8ad277da190..d7e6626d45f 100644 --- a/test/py/tests/test_bind.py +++ b/test/py/tests/test_bind.py @@ -1,186 +1,191 @@ # SPDX-License-Identifier: GPL-2.0 # Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. -import os.path -import pytest +""" Test for bind command """ + import re +import pytest def in_tree(response, name, uclass, drv, depth, last_child): - lines = [x.strip() for x in response.splitlines()] - leaf = '' - if depth != 0: - leaf = ' ' + ' ' * (depth - 1) ; - if not last_child: - leaf = leaf + r'\|' - else: - leaf = leaf + '`' - - leaf = leaf + '-- ' + name - line = (r' *{:10.10} *[0-9]* \[ [ +] \] {:20.20} [` |]{}$' - .format(uclass, drv, leaf)) - prog = re.compile(line) - for l in lines: - if prog.match(l): - return True - return False + lines = [x.strip() for x in response.splitlines()] + leaf = '' + if depth != 0: + leaf = ' ' + ' ' * (depth - 1) + if not last_child: + leaf = leaf + r'\|' + else: + leaf = leaf + '`' + + leaf = leaf + '-- ' + name + line = (r' *{:10.10} *[0-9]* \[ [ +] \] {:20.20} [` |]{}$' + .format(uclass, drv, leaf)) + prog = re.compile(line) + for l in lines: + if prog.match(l): + return True + return False @pytest.mark.buildconfigspec('cmd_bind') def test_bind_unbind_with_node(u_boot_console): - tree = u_boot_console.run_command('dm tree') - assert in_tree(tree, 'bind-test', 'simple_bus', 'simple_bus', 0, True) - assert in_tree(tree, 'bind-test-child1', 'phy', 'phy_sandbox', 1, False) - assert in_tree(tree, 'bind-test-child2', 'simple_bus', 'simple_bus', 1, True) - - #bind usb_ether driver (which has no compatible) to usb@1 node. - ##New entry usb_ether should appear in the dm tree - response = u_boot_console.run_command('bind /usb@1 usb_ether') - assert response == '' - tree = u_boot_console.run_command('dm tree') - assert in_tree(tree, 'usb@1', 'ethernet', 'usb_ether', 1, True) - - #Unbind child #1. No error expected and all devices should be there except for bind-test-child1 - response = u_boot_console.run_command('unbind /bind-test/bind-test-child1') - assert response == '' - tree = u_boot_console.run_command('dm tree') - assert in_tree(tree, 'bind-test', 'simple_bus', 'simple_bus', 0, True) - assert 'bind-test-child1' not in tree - assert in_tree(tree, 'bind-test-child2', 'simple_bus', 'simple_bus', 1, True) - - #bind child #1. No error expected and all devices should be there - response = u_boot_console.run_command('bind /bind-test/bind-test-child1 phy_sandbox') - assert response == '' - tree = u_boot_console.run_command('dm tree') - assert in_tree(tree, 'bind-test', 'simple_bus', 'simple_bus', 0, True) - assert in_tree(tree, 'bind-test-child1', 'phy', 'phy_sandbox', 1, True) - assert in_tree(tree, 'bind-test-child2', 'simple_bus', 'simple_bus', 1, False) - - #Unbind child #2. No error expected and all devices should be there except for bind-test-child2 - response = u_boot_console.run_command('unbind /bind-test/bind-test-child2') - assert response == '' - tree = u_boot_console.run_command('dm tree') - assert in_tree(tree, 'bind-test', 'simple_bus', 'simple_bus', 0, True) - assert in_tree(tree, 'bind-test-child1', 'phy', 'phy_sandbox', 1, True) - assert 'bind-test-child2' not in tree - - - #Bind child #2. No error expected and all devices should be there - response = u_boot_console.run_command('bind /bind-test/bind-test-child2 simple_bus') - assert response == '' - tree = u_boot_console.run_command('dm tree') - assert in_tree(tree, 'bind-test', 'simple_bus', 'simple_bus', 0, True) - assert in_tree(tree, 'bind-test-child1', 'phy', 'phy_sandbox', 1, False) - assert in_tree(tree, 'bind-test-child2', 'simple_bus', 'simple_bus', 1, True) - - #Unbind parent. No error expected. All devices should be removed and unbound - response = u_boot_console.run_command('unbind /bind-test') - assert response == '' - tree = u_boot_console.run_command('dm tree') - assert 'bind-test' not in tree - assert 'bind-test-child1' not in tree - assert 'bind-test-child2' not in tree - - #try binding invalid node with valid driver - response = u_boot_console.run_command('bind /not-a-valid-node simple_bus') - assert response != '' - tree = u_boot_console.run_command('dm tree') - assert 'not-a-valid-node' not in tree - - #try binding valid node with invalid driver - response = u_boot_console.run_command('bind /bind-test not_a_driver') - assert response != '' - tree = u_boot_console.run_command('dm tree') - assert 'bind-test' not in tree - - #bind /bind-test. Device should come up as well as its children - response = u_boot_console.run_command('bind /bind-test simple_bus') - assert response == '' - tree = u_boot_console.run_command('dm tree') - assert in_tree(tree, 'bind-test', 'simple_bus', 'simple_bus', 0, True) - assert in_tree(tree, 'bind-test-child1', 'phy', 'phy_sandbox', 1, False) - assert in_tree(tree, 'bind-test-child2', 'simple_bus', 'simple_bus', 1, True) - - response = u_boot_console.run_command('unbind /bind-test') - assert response == '' + tree = u_boot_console.run_command('dm tree') + assert in_tree(tree, 'bind-test', 'simple_bus', 'simple_bus', 0, True) + assert in_tree(tree, 'bind-test-child1', 'phy', 'phy_sandbox', 1, False) + assert in_tree(tree, 'bind-test-child2', 'simple_bus', 'simple_bus', 1, True) + + #bind usb_ether driver (which has no compatible) to usb@1 node. + ##New entry usb_ether should appear in the dm tree + response = u_boot_console.run_command('bind /usb@1 usb_ether') + assert response == '' + tree = u_boot_console.run_command('dm tree') + assert in_tree(tree, 'usb@1', 'ethernet', 'usb_ether', 1, True) + + #Unbind child #1. No error expected and all devices should be there except for bind-test-child1 + response = u_boot_console.run_command('unbind /bind-test/bind-test-child1') + assert response == '' + tree = u_boot_console.run_command('dm tree') + assert in_tree(tree, 'bind-test', 'simple_bus', 'simple_bus', 0, True) + assert 'bind-test-child1' not in tree + assert in_tree(tree, 'bind-test-child2', 'simple_bus', 'simple_bus', 1, True) + + #bind child #1. No error expected and all devices should be there + response = u_boot_console.run_command('bind /bind-test/bind-test-child1 phy_sandbox') + assert response == '' + tree = u_boot_console.run_command('dm tree') + assert in_tree(tree, 'bind-test', 'simple_bus', 'simple_bus', 0, True) + assert in_tree(tree, 'bind-test-child1', 'phy', 'phy_sandbox', 1, True) + assert in_tree(tree, 'bind-test-child2', 'simple_bus', 'simple_bus', 1, False) + + #Unbind child #2. No error expected and all devices should be there except for bind-test-child2 + response = u_boot_console.run_command('unbind /bind-test/bind-test-child2') + assert response == '' + tree = u_boot_console.run_command('dm tree') + assert in_tree(tree, 'bind-test', 'simple_bus', 'simple_bus', 0, True) + assert in_tree(tree, 'bind-test-child1', 'phy', 'phy_sandbox', 1, True) + assert 'bind-test-child2' not in tree + + + #Bind child #2. No error expected and all devices should be there + response = u_boot_console.run_command('bind /bind-test/bind-test-child2 simple_bus') + assert response == '' + tree = u_boot_console.run_command('dm tree') + assert in_tree(tree, 'bind-test', 'simple_bus', 'simple_bus', 0, True) + assert in_tree(tree, 'bind-test-child1', 'phy', 'phy_sandbox', 1, False) + assert in_tree(tree, 'bind-test-child2', 'simple_bus', 'simple_bus', 1, True) + + #Unbind parent. No error expected. All devices should be removed and unbound + response = u_boot_console.run_command('unbind /bind-test') + assert response == '' + tree = u_boot_console.run_command('dm tree') + assert 'bind-test' not in tree + assert 'bind-test-child1' not in tree + assert 'bind-test-child2' not in tree + + #try binding invalid node with valid driver + response = u_boot_console.run_command('bind /not-a-valid-node simple_bus') + assert response != '' + tree = u_boot_console.run_command('dm tree') + assert 'not-a-valid-node' not in tree + + #try binding valid node with invalid driver + response = u_boot_console.run_command('bind /bind-test not_a_driver') + assert response != '' + tree = u_boot_console.run_command('dm tree') + assert 'bind-test' not in tree + + #bind /bind-test. Device should come up as well as its children + response = u_boot_console.run_command('bind /bind-test simple_bus') + assert response == '' + tree = u_boot_console.run_command('dm tree') + assert in_tree(tree, 'bind-test', 'simple_bus', 'simple_bus', 0, True) + assert in_tree(tree, 'bind-test-child1', 'phy', 'phy_sandbox', 1, False) + assert in_tree(tree, 'bind-test-child2', 'simple_bus', 'simple_bus', 1, True) + + response = u_boot_console.run_command('unbind /bind-test') + assert response == '' def get_next_line(tree, name): - treelines = [x.strip() for x in tree.splitlines() if x.strip()] - child_line = '' - for idx, line in enumerate(treelines): - if ('-- ' + name) in line: - try: - child_line = treelines[idx+1] - except: - pass - break - return child_line + treelines = [x.strip() for x in tree.splitlines() if x.strip()] + child_line = '' + for idx, line in enumerate(treelines): + if '-- ' + name in line: + try: + child_line = treelines[idx+1] + except: + pass + break + return child_line @pytest.mark.buildconfigspec('cmd_bind') def test_bind_unbind_with_uclass(u_boot_console): - #bind /bind-test - response = u_boot_console.run_command('bind /bind-test simple_bus') - assert response == '' - - #make sure bind-test-child2 is there and get its uclass/index pair - tree = u_boot_console.run_command('dm tree') - child2_line = [x.strip() for x in tree.splitlines() if '-- bind-test-child2' in x] - assert len(child2_line) == 1 - - child2_uclass = child2_line[0].split()[0] - child2_index = int(child2_line[0].split()[1]) - - #bind simple_bus as a child of bind-test-child2 - response = u_boot_console.run_command('bind {} {} simple_bus'.format(child2_uclass, child2_index)) - - #check that the child is there and its uclass/index pair is right - tree = u_boot_console.run_command('dm tree') - - child_of_child2_line = get_next_line(tree, 'bind-test-child2') - assert child_of_child2_line - child_of_child2_index = int(child_of_child2_line.split()[1]) - assert in_tree(tree, 'simple_bus', 'simple_bus', 'simple_bus', 2, True) - assert child_of_child2_index == child2_index + 1 - - #unbind the child and check it has been removed - response = u_boot_console.run_command('unbind simple_bus {}'.format(child_of_child2_index)) - assert response == '' - tree = u_boot_console.run_command('dm tree') - assert in_tree(tree, 'bind-test-child2', 'simple_bus', 'simple_bus', 1, True) - assert not in_tree(tree, 'simple_bus', 'simple_bus', 'simple_bus', 2, True) - child_of_child2_line = get_next_line(tree, 'bind-test-child2') - assert child_of_child2_line == '' - - #bind simple_bus as a child of bind-test-child2 - response = u_boot_console.run_command('bind {} {} simple_bus'.format(child2_uclass, child2_index)) - - #check that the child is there and its uclass/index pair is right - tree = u_boot_console.run_command('dm tree') - treelines = [x.strip() for x in tree.splitlines() if x.strip()] - - child_of_child2_line = get_next_line(tree, 'bind-test-child2') - assert child_of_child2_line - child_of_child2_index = int(child_of_child2_line.split()[1]) - assert in_tree(tree, 'simple_bus', 'simple_bus', 'simple_bus', 2, True) - assert child_of_child2_index == child2_index + 1 - - #unbind the child and check it has been removed - response = u_boot_console.run_command('unbind {} {} simple_bus'.format(child2_uclass, child2_index)) - assert response == '' - - tree = u_boot_console.run_command('dm tree') - assert in_tree(tree, 'bind-test-child2', 'simple_bus', 'simple_bus', 1, True) - - child_of_child2_line = get_next_line(tree, 'bind-test-child2') - assert child_of_child2_line == '' - - #unbind the child again and check it doesn't change the tree - tree_old = u_boot_console.run_command('dm tree') - response = u_boot_console.run_command('unbind {} {} simple_bus'.format(child2_uclass, child2_index)) - tree_new = u_boot_console.run_command('dm tree') - - assert response == '' - assert tree_old == tree_new - - response = u_boot_console.run_command('unbind /bind-test') - assert response == '' + #bind /bind-test + response = u_boot_console.run_command('bind /bind-test simple_bus') + assert response == '' + + #make sure bind-test-child2 is there and get its uclass/index pair + tree = u_boot_console.run_command('dm tree') + child2_line = [x.strip() for x in tree.splitlines() if '-- bind-test-child2' in x] + assert len(child2_line) == 1 + + child2_uclass = child2_line[0].split()[0] + child2_index = int(child2_line[0].split()[1]) + + #bind simple_bus as a child of bind-test-child2 + response = u_boot_console.run_command( + 'bind {} {} simple_bus'.format(child2_uclass, child2_index)) + + #check that the child is there and its uclass/index pair is right + tree = u_boot_console.run_command('dm tree') + + child_of_child2_line = get_next_line(tree, 'bind-test-child2') + assert child_of_child2_line + child_of_child2_index = int(child_of_child2_line.split()[1]) + assert in_tree(tree, 'simple_bus', 'simple_bus', 'simple_bus', 2, True) + assert child_of_child2_index == child2_index + 1 + + #unbind the child and check it has been removed + response = u_boot_console.run_command('unbind simple_bus {}'.format(child_of_child2_index)) + assert response == '' + tree = u_boot_console.run_command('dm tree') + assert in_tree(tree, 'bind-test-child2', 'simple_bus', 'simple_bus', 1, True) + assert not in_tree(tree, 'simple_bus', 'simple_bus', 'simple_bus', 2, True) + child_of_child2_line = get_next_line(tree, 'bind-test-child2') + assert child_of_child2_line == '' + + #bind simple_bus as a child of bind-test-child2 + response = u_boot_console.run_command( + 'bind {} {} simple_bus'.format(child2_uclass, child2_index)) + + #check that the child is there and its uclass/index pair is right + tree = u_boot_console.run_command('dm tree') + treelines = [x.strip() for x in tree.splitlines() if x.strip()] + + child_of_child2_line = get_next_line(tree, 'bind-test-child2') + assert child_of_child2_line + child_of_child2_index = int(child_of_child2_line.split()[1]) + assert in_tree(tree, 'simple_bus', 'simple_bus', 'simple_bus', 2, True) + assert child_of_child2_index == child2_index + 1 + + #unbind the child and check it has been removed + response = u_boot_console.run_command( + 'unbind {} {} simple_bus'.format(child2_uclass, child2_index)) + assert response == '' + + tree = u_boot_console.run_command('dm tree') + assert in_tree(tree, 'bind-test-child2', 'simple_bus', 'simple_bus', 1, True) + + child_of_child2_line = get_next_line(tree, 'bind-test-child2') + assert child_of_child2_line == '' + + #unbind the child again and check it doesn't change the tree + tree_old = u_boot_console.run_command('dm tree') + response = u_boot_console.run_command( + 'unbind {} {} simple_bus'.format(child2_uclass, child2_index)) + tree_new = u_boot_console.run_command('dm tree') + + assert response == '' + assert tree_old == tree_new + + response = u_boot_console.run_command('unbind /bind-test') + assert response == '' -- GitLab From 1452870404804210db1d797ec046e24a99c101bf Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 8 May 2022 04:39:19 -0600 Subject: [PATCH 363/581] dm: core: Rename dm_dump_all() This is not a good name anymore as it does not dump everything. Rename it to dm_dump_tree() to avoid confusion. Signed-off-by: Simon Glass --- cmd/dm.c | 8 ++++---- drivers/core/dump.c | 2 +- include/dm/util.h | 2 +- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/cmd/dm.c b/cmd/dm.c index ca609224f55..03674cd0864 100644 --- a/cmd/dm.c +++ b/cmd/dm.c @@ -10,10 +10,10 @@ #include #include -static int do_dm_dump_all(struct cmd_tbl *cmdtp, int flag, int argc, - char *const argv[]) +static int do_dm_dump_tree(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) { - dm_dump_all(); + dm_dump_tree(); return 0; } @@ -70,7 +70,7 @@ static char dm_help_text[] = #endif U_BOOT_CMD_WITH_SUBCMDS(dm, "Driver model low level access", dm_help_text, - U_BOOT_SUBCMD_MKENT(tree, 1, 1, do_dm_dump_all), + U_BOOT_SUBCMD_MKENT(tree, 1, 1, do_dm_dump_tree), U_BOOT_SUBCMD_MKENT(uclass, 1, 1, do_dm_dump_uclass), U_BOOT_SUBCMD_MKENT(devres, 1, 1, do_dm_dump_devres), U_BOOT_SUBCMD_MKENT(drivers, 1, 1, do_dm_dump_drivers), diff --git a/drivers/core/dump.c b/drivers/core/dump.c index 21d9e7a91f7..994e308f057 100644 --- a/drivers/core/dump.c +++ b/drivers/core/dump.c @@ -45,7 +45,7 @@ static void show_devices(struct udevice *dev, int depth, int last_flag) } } -void dm_dump_all(void) +void dm_dump_tree(void) { struct udevice *root; diff --git a/include/dm/util.h b/include/dm/util.h index 4428f045b72..c52daa87ef3 100644 --- a/include/dm/util.h +++ b/include/dm/util.h @@ -25,7 +25,7 @@ struct list_head; int list_count_items(struct list_head *head); /* Dump out a tree of all devices */ -void dm_dump_all(void); +void dm_dump_tree(void); /* Dump out a list of uclasses and their devices */ void dm_dump_uclass(void); -- GitLab From dee2f5ae5cde41a5f9da7f154b47bfe92f531957 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 8 May 2022 04:39:20 -0600 Subject: [PATCH 364/581] dm: core: Sort dm subcommands Put these in alphabetic order, both in the help and in the implementation, as there are quite a few subcommands now. Tweak the help for 'dm tree' to better explain what it does. Signed-off-by: Simon Glass --- cmd/dm.c | 50 +++++++++++++++++++++++++------------------------- 1 file changed, 25 insertions(+), 25 deletions(-) diff --git a/cmd/dm.c b/cmd/dm.c index 03674cd0864..0c7554a1b1d 100644 --- a/cmd/dm.c +++ b/cmd/dm.c @@ -10,18 +10,10 @@ #include #include -static int do_dm_dump_tree(struct cmd_tbl *cmdtp, int flag, int argc, - char *const argv[]) -{ - dm_dump_tree(); - - return 0; -} - -static int do_dm_dump_uclass(struct cmd_tbl *cmdtp, int flag, int argc, - char *const argv[]) +static int do_dm_dump_driver_compat(struct cmd_tbl *cmdtp, int flag, int argc, + char * const argv[]) { - dm_dump_uclass(); + dm_dump_driver_compat(); return 0; } @@ -42,37 +34,45 @@ static int do_dm_dump_drivers(struct cmd_tbl *cmdtp, int flag, int argc, return 0; } -static int do_dm_dump_driver_compat(struct cmd_tbl *cmdtp, int flag, int argc, - char * const argv[]) +static int do_dm_dump_static_driver_info(struct cmd_tbl *cmdtp, int flag, + int argc, char * const argv[]) { - dm_dump_driver_compat(); + dm_dump_static_driver_info(); return 0; } -static int do_dm_dump_static_driver_info(struct cmd_tbl *cmdtp, int flag, int argc, - char * const argv[]) +static int do_dm_dump_tree(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) { - dm_dump_static_driver_info(); + dm_dump_tree(); + + return 0; +} + +static int do_dm_dump_uclass(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + dm_dump_uclass(); return 0; } #if CONFIG_IS_ENABLED(SYS_LONGHELP) static char dm_help_text[] = - "tree Dump driver model tree ('*' = activated)\n" - "dm uclass Dump list of instances for each uclass\n" + "compat Dump list of drivers with compatibility strings\n" "dm devres Dump list of device resources for each device\n" "dm drivers Dump list of drivers with uclass and instances\n" - "dm compat Dump list of drivers with compatibility strings\n" - "dm static Dump list of drivers with static platform data" + "dm static Dump list of drivers with static platform data\n" + "dn tree Dump tree of driver model devices ('*' = activated)\n" + "dm uclass Dump list of instances for each uclass" ; #endif U_BOOT_CMD_WITH_SUBCMDS(dm, "Driver model low level access", dm_help_text, - U_BOOT_SUBCMD_MKENT(tree, 1, 1, do_dm_dump_tree), - U_BOOT_SUBCMD_MKENT(uclass, 1, 1, do_dm_dump_uclass), + U_BOOT_SUBCMD_MKENT(compat, 1, 1, do_dm_dump_driver_compat), U_BOOT_SUBCMD_MKENT(devres, 1, 1, do_dm_dump_devres), U_BOOT_SUBCMD_MKENT(drivers, 1, 1, do_dm_dump_drivers), - U_BOOT_SUBCMD_MKENT(compat, 1, 1, do_dm_dump_driver_compat), - U_BOOT_SUBCMD_MKENT(static, 1, 1, do_dm_dump_static_driver_info)); + U_BOOT_SUBCMD_MKENT(static, 1, 1, do_dm_dump_static_driver_info), + U_BOOT_SUBCMD_MKENT(tree, 1, 1, do_dm_dump_tree), + U_BOOT_SUBCMD_MKENT(uclass, 1, 1, do_dm_dump_uclass)); -- GitLab From c625666ea10d88141546807f1b720703ba710eea Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 8 May 2022 04:39:21 -0600 Subject: [PATCH 365/581] dm: core: Fix addresses in the dm static command This command converts pointers to addresses, but the pointers being converted are in the image's rodata region. For sandbox this means it is not in DRAM so it does not make sense to do this conversion. Fix this by showing a simple pointer instead. Drop the unnecessary @ and hex prefixes. Signed-off-by: Simon Glass --- drivers/core/dump.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/core/dump.c b/drivers/core/dump.c index 994e308f057..e434fe04728 100644 --- a/drivers/core/dump.c +++ b/drivers/core/dump.c @@ -169,8 +169,6 @@ void dm_dump_static_driver_info(void) puts("Driver Address\n"); puts("---------------------------------\n"); - for (entry = drv; entry != drv + n_ents; entry++) { - printf("%-25.25s @%08lx\n", entry->name, - (ulong)map_to_sysmem(entry->plat)); - } + for (entry = drv; entry != drv + n_ents; entry++) + printf("%-25.25s %p\n", entry->name, entry->plat); } -- GitLab From d32f62f49d338e68c2d793a9e2412677a740c89f Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 8 May 2022 04:39:22 -0600 Subject: [PATCH 366/581] dm: core: Add documentation for the dm command Add a description and examples for the dm subcommands. Signed-off-by: Simon Glass --- doc/usage/cmd/dm.rst | 487 +++++++++++++++++++++++++++++++++++++++++++ doc/usage/index.rst | 1 + 2 files changed, 488 insertions(+) create mode 100644 doc/usage/cmd/dm.rst diff --git a/doc/usage/cmd/dm.rst b/doc/usage/cmd/dm.rst new file mode 100644 index 00000000000..7bc1962a754 --- /dev/null +++ b/doc/usage/cmd/dm.rst @@ -0,0 +1,487 @@ +.. SPDX-License-Identifier: GPL-2.0+: + +dm command +========== + +Synopis +------- + +:: + + dm compat + dm devres + dm drivers + dm static + dm tree + dm uclass + +Description +----------- + +The *dm* command allows viewing information about driver model, including the +tree of devices and list of available uclasses. + + +dm compat +~~~~~~~~~ + +This shows the compatible strings associated with each driver. Often there +is only one, but multiple strings are shown on their own line. These strings +can be looked up in the device tree files for each board, to see which driver is +used for each node. + +dm devres +~~~~~~~~~ + +This shows a list of a `devres` (device resource) records for a device. Some +drivers use the devres API to allocate memory, so that it can be freed +automatically (without any code needed in the driver's remove() method) when the +device is removed. + +This feature is controlled by CONFIG_DEVRES so no useful output is obtained if +this option is disabled. + +dm drivers +~~~~~~~~~~ + +This shows all the available drivers, their uclass and a list of devices that +use that driver, each on its own line. Drivers with no devices are shown with +`` as the driver name. + + +dm mem +~~~~~~ + +This subcommand is really just for debugging and exploration. It can be enabled +with the `CONFIG_DM_STATS` option. + +All output is in hex except that in brackets which is decimal. + +The output consists of a header shows the size of the main device model +structures (struct udevice, struct driver, struct uclass and struct uc_driver) +and the count and memory used by each (number of devices, memory used by +devices, memory used by device names, number of uclasses, memory used by +uclasses). + +After that is a table of information about each type of data that can be +attached to a device, showing the number that have non-null data for that type, +the total size of all that data, the amount of memory used in total, the +amount that would be used if this type uses tags instead and the amount that +would be thus saved. + +The `driver_data` line shows the number of devices which have non-NULL driver +data. + +The `tags` line shows the number of tags and the memory used by those. + +At the bottom is an indication of the total memory usage obtained by undertaking +various changes, none of which is currently implemented in U-Boot: + +With tags + Using tags instead of all attached types + +Singly linked + Using a singly linked list + +driver index + Using a driver index instead of a pointer + +uclass index + Using a uclass index instead of a pointer + +Drop device name + Using empty device names + + +dm static +~~~~~~~~~ + +This shows devices bound by platform data, i.e. not from the device tree. There +are normally none of these, but some boards may use static devices for space +reasons. + + +dm tree +~~~~~~~ + +This shows the full tree of devices including the following fields: + +uclass + Shows the name of the uclass for the device + +Index + Shows the index number of the device, within the uclass. This shows the + ordering within the uclass, but not the sequence number. + +Probed + Shows `+` if the device is active + +Driver + Shows the name of the driver that this device uses + +Name + Shows the device name as well as the tree structure, since child devices are + shown attached to their parent. + + +dm uclass +~~~~~~~~~ + +This shows each uclass along with a list of devices in that uclass. The uclass +ID is shown (e.g. uclass 7) and its name. + +For each device, the format is:: + + n name @ a, seq s + +where `n` is the index within the uclass, `a` is the address of the device in +memory and `s` is the sequence number of the device. + + +Examples +-------- + +dm compat +~~~~~~~~~ + +This example shows an abridged version of the sandbox output:: + + => dm compat + Driver Compatible + -------------------------------- + act8846_reg + sandbox_adder sandbox,adder + axi_sandbox_bus sandbox,axi + blk_partition + bootcount-rtc u-boot,bootcount-rtc + ... + rockchip_rk805 rockchip,rk805 + rockchip,rk808 + rockchip,rk809 + rockchip,rk816 + rockchip,rk817 + rockchip,rk818 + root_driver + rtc-rv8803 microcrystal,rv8803 + epson,rx8803 + epson,rx8900 + ... + wdt_gpio linux,wdt-gpio + wdt_sandbox sandbox,wdt + + +dm devres +~~~~~~~~~ + +This example shows an abridged version of the sandbox test output (running +U-Boot with the -T flag):: + + => dm devres + - root_driver + - demo_shape_drv + - demo_simple_drv + - demo_shape_drv + ... + - h-test + - devres-test + 00000000130194e0 (100 byte) devm_kmalloc_release BIND + - another-test + ... + - syscon@3 + - a-mux-controller + 0000000013025e60 (96 byte) devm_kmalloc_release PROBE + 0000000013025f00 (24 byte) devm_kmalloc_release PROBE + 0000000013026010 (24 byte) devm_kmalloc_release PROBE + 0000000013026070 (24 byte) devm_kmalloc_release PROBE + 00000000130260d0 (24 byte) devm_kmalloc_release PROBE + - syscon@3 + - a-mux-controller + 0000000013026150 (96 byte) devm_kmalloc_release PROBE + 00000000130261f0 (24 byte) devm_kmalloc_release PROBE + 0000000013026300 (24 byte) devm_kmalloc_release PROBE + 0000000013026360 (24 byte) devm_kmalloc_release PROBE + 00000000130263c0 (24 byte) devm_kmalloc_release PROBE + - emul-mux-controller + 0000000013025fa0 (32 byte) devm_kmalloc_release PROBE + - testfdtm0 + - testfdtm1 + ... + - pinmux_spi0_pins + - pinmux_uart0_pins + - pinctrl-single-bits + 0000000013229180 (320 byte) devm_kmalloc_release PROBE + 0000000013229300 (40 byte) devm_kmalloc_release PROBE + 0000000013229370 (160 byte) devm_kmalloc_release PROBE + 000000001322c190 (40 byte) devm_kmalloc_release PROBE + 000000001322c200 (32 byte) devm_kmalloc_release PROBE + - pinmux_i2c0_pins + ... + - reg@0 + - reg@1 + + +dm drivers +~~~~~~~~~~ + +This example shows an abridged version of the sandbox output:: + + => dm drivers + Driver uid uclass Devices + ---------------------------------------------------------- + act8846_reg 087 regulator + sandbox_adder 021 axi adder + adder + axi_sandbox_bus 021 axi axi@0 + ... + da7219 061 misc + demo_shape_drv 001 demo demo_shape_drv + demo_shape_drv + demo_shape_drv + demo_simple_drv 001 demo demo_simple_drv + demo_simple_drv + testfdt_drv 003 testfdt a-test + b-test + d-test + e-test + f-test + g-test + another-test + chosen-test + testbus_drv 005 testbus some-bus + mmio-bus@0 + mmio-bus@1 + dsa-port 039 ethernet lan0 + lan1 + dsa_sandbox 035 dsa dsa-test + eep_sandbox 121 w1_eeprom + ... + pfuze100_regulator 087 regulator + phy_sandbox 077 phy bind-test-child1 + gen_phy@0 + gen_phy@1 + gen_phy@2 + pinconfig 078 pinconfig gpios + gpio0 + gpio1 + gpio2 + gpio3 + i2c + groups + pins + i2s + spi + cs + pinmux_pwm_pins + pinmux_spi0_pins + pinmux_uart0_pins + pinmux_i2c0_pins + pinmux_lcd_pins + pmc_sandbox 017 power-mgr pci@1e,0 + act8846 pmic 080 pmic + max77686_pmic 080 pmic + mc34708_pmic 080 pmic pmic@41 + ... + wdt_gpio 122 watchdog gpio-wdt + wdt_sandbox 122 watchdog wdt@0 + => + + +dm mem +~~~~~~ + +This example shows the sandbox output:: + + > dm mem + Struct sizes: udevice b0, driver 80, uclass 30, uc_driver 78 + Memory: device fe:aea0, device names a16, uclass 5e:11a0 + + Attached type Count Size Cur Tags Save + --------------- ----- ----- ----- ----- ----- + plat 45 a8f aea0 a7c4 6dc (1756) + parent_plat 1a 3b8 aea0 a718 788 (1928) + uclass_plat 3d 6b4 aea0 a7a4 6fc (1788) + priv 8a 68f3 aea0 a8d8 5c8 (1480) + parent_priv 8 38a0 aea0 a6d0 7d0 (2000) + uclass_priv 4e 14a6 aea0 a7e8 6b8 (1720) + driver_data f 0 aea0 a6ec 7b4 (1972) + uclass 6 20 + Attached total 191 cb54 3164 (12644) + tags 0 0 + + Total size: 18b94 (101268) + + With tags: 15a30 (88624) + - singly-linked: 14260 (82528) + - driver index: 13b6e (80750) + - uclass index: 1347c (78972) + Drop device name (not SRAM): a16 (2582) + => + + +dm static +~~~~~~~~~ + +This example shows the sandbox output:: + + => dm static + Driver Address + --------------------------------- + demo_shape_drv 0000562edab8dca0 + demo_simple_drv 0000562edab8dca0 + demo_shape_drv 0000562edab8dc90 + demo_simple_drv 0000562edab8dc80 + demo_shape_drv 0000562edab8dc80 + test_drv 0000562edaae8840 + test_drv 0000562edaae8848 + test_drv 0000562edaae8850 + sandbox_gpio 0000000000000000 + mod_exp_sw 0000000000000000 + sandbox_test_proc 0000562edabb5330 + qfw_sandbox 0000000000000000 + sandbox_timer 0000000000000000 + sandbox_serial 0000562edaa8ed00 + sysreset_sandbox 0000000000000000 + + +dm tree +------- + +This example shows the abridged sandbox output:: + + => dm tree + Class Index Probed Driver Name + ----------------------------------------------------------- + root 0 [ + ] root_driver root_driver + demo 0 [ ] demo_shape_drv |-- demo_shape_drv + demo 1 [ ] demo_simple_drv |-- demo_simple_drv + demo 2 [ ] demo_shape_drv |-- demo_shape_drv + demo 3 [ ] demo_simple_drv |-- demo_simple_drv + demo 4 [ ] demo_shape_drv |-- demo_shape_drv + test 0 [ ] test_drv |-- test_drv + test 1 [ ] test_drv |-- test_drv + test 2 [ ] test_drv |-- test_drv + .. + sysreset 0 [ ] sysreset_sandbox |-- sysreset_sandbox + bootstd 0 [ ] bootstd_drv |-- bootstd + bootmeth 0 [ ] bootmeth_distro | |-- syslinux + bootmeth 1 [ ] bootmeth_efi | `-- efi + reboot-mod 0 [ ] reboot-mode-gpio |-- reboot-mode0 + reboot-mod 1 [ ] reboot-mode-rtc |-- reboot-mode@14 + ... + ethernet 7 [ + ] dsa-port | `-- lan1 + pinctrl 0 [ + ] sandbox_pinctrl_gpio |-- pinctrl-gpio + gpio 1 [ + ] sandbox_gpio | |-- base-gpios + nop 0 [ + ] gpio_hog | | |-- hog_input_active_low + nop 1 [ + ] gpio_hog | | |-- hog_input_active_high + nop 2 [ + ] gpio_hog | | |-- hog_output_low + nop 3 [ + ] gpio_hog | | `-- hog_output_high + gpio 2 [ ] sandbox_gpio | |-- extra-gpios + gpio 3 [ ] sandbox_gpio | `-- pinmux-gpios + i2c 0 [ + ] sandbox_i2c |-- i2c@0 + i2c_eeprom 0 [ ] i2c_eeprom | |-- eeprom@2c + i2c_eeprom 1 [ ] i2c_eeprom_partition | | `-- bootcount@10 + rtc 0 [ ] sandbox_rtc | |-- rtc@43 + rtc 1 [ + ] sandbox_rtc | |-- rtc@61 + i2c_emul_p 0 [ + ] sandbox_i2c_emul_par | |-- emul + i2c_emul 0 [ ] sandbox_i2c_eeprom_e | | |-- emul-eeprom + i2c_emul 1 [ ] sandbox_i2c_rtc_emul | | |-- emul0 + i2c_emul 2 [ + ] sandbox_i2c_rtc_emul | | |-- emull + i2c_emul 3 [ ] sandbox_i2c_pmic_emu | | |-- pmic-emul0 + i2c_emul 4 [ ] sandbox_i2c_pmic_emu | | `-- pmic-emul1 + pmic 0 [ ] sandbox_pmic | |-- sandbox_pmic + regulator 0 [ ] sandbox_buck | | |-- buck1 + regulator 1 [ ] sandbox_buck | | |-- buck2 + regulator 2 [ ] sandbox_ldo | | |-- ldo1 + regulator 3 [ ] sandbox_ldo | | |-- ldo2 + regulator 4 [ ] sandbox_buck | | `-- no_match_by_nodename + pmic 1 [ ] mc34708_pmic | `-- pmic@41 + bootcount 0 [ + ] bootcount-rtc |-- bootcount@0 + bootcount 1 [ ] bootcount-i2c-eeprom |-- bootcount + ... + clk 4 [ ] fixed_clock |-- osc + firmware 0 [ ] sandbox_firmware |-- sandbox-firmware + scmi_agent 0 [ ] sandbox-scmi_agent `-- scmi + clk 5 [ ] scmi_clk |-- protocol@14 + reset 2 [ ] scmi_reset_domain |-- protocol@16 + nop 8 [ ] scmi_voltage_domain `-- regulators + regulator 5 [ ] scmi_regulator |-- reg@0 + regulator 6 [ ] scmi_regulator `-- reg@1 + => + + +dm uclass +~~~~~~~~~ + +This example shows the abridged sandbox output:: + + => dm uclass + uclass 0: root + 0 * root_driver @ 03015460, seq 0 + + uclass 1: demo + 0 demo_shape_drv @ 03015560, seq 0 + 1 demo_simple_drv @ 03015620, seq 1 + 2 demo_shape_drv @ 030156e0, seq 2 + 3 demo_simple_drv @ 030157a0, seq 3 + 4 demo_shape_drv @ 03015860, seq 4 + + uclass 2: test + 0 test_drv @ 03015980, seq 0 + 1 test_drv @ 03015a60, seq 1 + 2 test_drv @ 03015b40, seq 2 + ... + uclass 20: audio-codec + 0 audio-codec @ 030168e0, seq 0 + + uclass 21: axi + 0 adder @ 0301db60, seq 1 + 1 adder @ 0301dc40, seq 2 + 2 axi@0 @ 030217d0, seq 0 + + uclass 22: blk + 0 mmc2.blk @ 0301ca00, seq 0 + 1 mmc1.blk @ 0301cee0, seq 1 + 2 mmc0.blk @ 0301d380, seq 2 + + uclass 23: bootcount + 0 * bootcount@0 @ 0301b3f0, seq 0 + 1 bootcount @ 0301b4b0, seq 1 + 2 bootcount_4@0 @ 0301b570, seq 2 + 3 bootcount_2@0 @ 0301b630, seq 3 + + uclass 24: bootdev + 0 mmc2.bootdev @ 0301cbb0, seq 0 + 1 mmc1.bootdev @ 0301d050, seq 1 + 2 mmc0.bootdev @ 0301d4f0, seq 2 + + ... + uclass 78: pinconfig + 0 gpios @ 03022410, seq 0 + 1 gpio0 @ 030224d0, seq 1 + 2 gpio1 @ 03022590, seq 2 + 3 gpio2 @ 03022650, seq 3 + 4 gpio3 @ 03022710, seq 4 + 5 i2c @ 030227d0, seq 5 + 6 groups @ 03022890, seq 6 + 7 pins @ 03022950, seq 7 + 8 i2s @ 03022a10, seq 8 + 9 spi @ 03022ad0, seq 9 + 10 cs @ 03022b90, seq 10 + 11 pinmux_pwm_pins @ 03022e10, seq 11 + 12 pinmux_spi0_pins @ 03022ed0, seq 12 + 13 pinmux_uart0_pins @ 03022f90, seq 13 + 14 * pinmux_i2c0_pins @ 03023130, seq 14 + 15 * pinmux_lcd_pins @ 030231f0, seq 15 + + ... + uclass 119: virtio + 0 sandbox_virtio1 @ 030220d0, seq 0 + 1 sandbox_virtio2 @ 03022190, seq 1 + + uclass 120: w1 + uclass 121: w1_eeprom + uclass 122: watchdog + 0 * gpio-wdt @ 0301c070, seq 0 + 1 * wdt@0 @ 03021710, seq 1 + + => diff --git a/doc/usage/index.rst b/doc/usage/index.rst index 8d08ea14b00..8b98629d6bf 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -33,6 +33,7 @@ Shell commands cmd/bootz cmd/cbsysinfo cmd/conitrace + cmd/dm cmd/echo cmd/env cmd/event -- GitLab From 53c20bebb2215caaadc58b2eee2c80c61456b93d Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 8 May 2022 04:39:23 -0600 Subject: [PATCH 367/581] dm: core: Switch the testbus driver to use a new struct At present this driver uses 'priv' struct to hold 'plat' data, which is confusing. The contents of the strct don't matter, since only dtoc is using it. Create a new struct with the correct name. Signed-off-by: Simon Glass --- drivers/misc/test_drv.c | 2 +- include/dm/test.h | 7 +++++++ tools/dtoc/test_dtoc.py | 2 +- 3 files changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/misc/test_drv.c b/drivers/misc/test_drv.c index 5d72982f258..b6df1189032 100644 --- a/drivers/misc/test_drv.c +++ b/drivers/misc/test_drv.c @@ -109,7 +109,7 @@ UCLASS_DRIVER(testbus) = { .child_post_probe = testbus_child_post_probe_uclass, /* This is for dtoc testing only */ - .per_device_plat_auto = sizeof(struct dm_test_uclass_priv), + .per_device_plat_auto = sizeof(struct dm_test_uclass_plat), }; static int testfdt_drv_ping(struct udevice *dev, int pingval, int *pingret) diff --git a/include/dm/test.h b/include/dm/test.h index 4919064cc02..b5937509212 100644 --- a/include/dm/test.h +++ b/include/dm/test.h @@ -92,6 +92,13 @@ struct dm_test_uclass_priv { int total_add; }; +/** + * struct dm_test_uclass_plat - private plat data for test uclass + */ +struct dm_test_uclass_plat { + char dummy[32]; +}; + /** * struct dm_test_parent_data - parent's information on each child * diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py index c81bcc9c32f..8bac2076214 100755 --- a/tools/dtoc/test_dtoc.py +++ b/tools/dtoc/test_dtoc.py @@ -616,7 +616,7 @@ struct dm_test_pdata __attribute__ ((section (".priv_data"))) u8 _denx_u_boot_test_bus_priv_some_bus[sizeof(struct dm_test_priv)] \t__attribute__ ((section (".priv_data"))); #include -u8 _denx_u_boot_test_bus_ucplat_some_bus[sizeof(struct dm_test_uclass_priv)] +u8 _denx_u_boot_test_bus_ucplat_some_bus[sizeof(struct dm_test_uclass_plat)] \t__attribute__ ((section (".priv_data"))); #include -- GitLab From 930a3ddadebf3660cc3163081671de189300afdd Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 8 May 2022 04:39:24 -0600 Subject: [PATCH 368/581] dm: core: Support accessing core tags At present tag numbers are only allocated for non-core data, meaning that the 'core' data, like priv and plat, are accessed through dedicated functions. For debugging and consistency it is convenient to use tags for this 'core' data too. Add support for this, with new tag numbers and functions to access the pointer and size for each. Update one of the test drivers so that the uclass-private data can be tested here. There is some code duplication with functions like device_alloc_priv() but this is not addressed for now. At some point, some rationalisation may help to reduce code size, but more thought it needed on that. Signed-off-by: Simon Glass --- drivers/core/device.c | 65 +++++++++++++++++++++++++++++++++ drivers/misc/test_drv.c | 4 ++- include/dm/device.h | 25 +++++++++++++ include/dm/tag.h | 13 ++++++- test/dm/core.c | 80 +++++++++++++++++++++++++++++++++++++++++ tools/dtoc/test_dtoc.py | 4 +++ 6 files changed, 189 insertions(+), 2 deletions(-) diff --git a/drivers/core/device.c b/drivers/core/device.c index 7f71570a940..d9ce546c0c4 100644 --- a/drivers/core/device.c +++ b/drivers/core/device.c @@ -674,6 +674,71 @@ void *dev_get_parent_priv(const struct udevice *dev) return dm_priv_to_rw(dev->parent_priv_); } +void *dev_get_attach_ptr(const struct udevice *dev, enum dm_tag_t tag) +{ + switch (tag) { + case DM_TAG_PLAT: + return dev_get_plat(dev); + case DM_TAG_PARENT_PLAT: + return dev_get_parent_plat(dev); + case DM_TAG_UC_PLAT: + return dev_get_uclass_plat(dev); + case DM_TAG_PRIV: + return dev_get_priv(dev); + case DM_TAG_PARENT_PRIV: + return dev_get_parent_priv(dev); + case DM_TAG_UC_PRIV: + return dev_get_uclass_priv(dev); + default: + return NULL; + } +} + +int dev_get_attach_size(const struct udevice *dev, enum dm_tag_t tag) +{ + const struct udevice *parent = dev_get_parent(dev); + const struct uclass *uc = dev->uclass; + const struct uclass_driver *uc_drv = uc->uc_drv; + const struct driver *parent_drv = NULL; + int size = 0; + + if (parent) + parent_drv = parent->driver; + + switch (tag) { + case DM_TAG_PLAT: + size = dev->driver->plat_auto; + break; + case DM_TAG_PARENT_PLAT: + if (parent) { + size = parent_drv->per_child_plat_auto; + if (!size) + size = parent->uclass->uc_drv->per_child_plat_auto; + } + break; + case DM_TAG_UC_PLAT: + size = uc_drv->per_device_plat_auto; + break; + case DM_TAG_PRIV: + size = dev->driver->priv_auto; + break; + case DM_TAG_PARENT_PRIV: + if (parent) { + size = parent_drv->per_child_auto; + if (!size) + size = parent->uclass->uc_drv->per_child_auto; + } + break; + case DM_TAG_UC_PRIV: + size = uc_drv->per_device_auto; + break; + default: + break; + } + + return size; +} + static int device_get_device_tail(struct udevice *dev, int ret, struct udevice **devp) { diff --git a/drivers/misc/test_drv.c b/drivers/misc/test_drv.c index b6df1189032..927618256f0 100644 --- a/drivers/misc/test_drv.c +++ b/drivers/misc/test_drv.c @@ -108,7 +108,9 @@ UCLASS_DRIVER(testbus) = { .child_pre_probe = testbus_child_pre_probe_uclass, .child_post_probe = testbus_child_post_probe_uclass, - /* This is for dtoc testing only */ + .per_device_auto = sizeof(struct dm_test_uclass_priv), + + /* Note: this is for dtoc testing as well as tags*/ .per_device_plat_auto = sizeof(struct dm_test_uclass_plat), }; diff --git a/include/dm/device.h b/include/dm/device.h index 5bdb10653f8..12c6ba37ff3 100644 --- a/include/dm/device.h +++ b/include/dm/device.h @@ -11,6 +11,7 @@ #define _DM_DEVICE_H #include +#include #include #include #include @@ -546,6 +547,30 @@ void *dev_get_parent_priv(const struct udevice *dev); */ void *dev_get_uclass_priv(const struct udevice *dev); +/** + * dev_get_attach_ptr() - Get the value of an attached pointed tag + * + * The tag is assumed to hold a pointer, if it exists + * + * @dev: Device to look at + * @tag: Tag to access + * @return value of tag, or NULL if there is no tag of this type + */ +void *dev_get_attach_ptr(const struct udevice *dev, enum dm_tag_t tag); + +/** + * dev_get_attach_size() - Get the size of an attached tag + * + * Core tags have an automatic-allocation mechanism where the allocated size is + * defined by the device, parent or uclass. This returns the size associated + * with a particular tag + * + * @dev: Device to look at + * @tag: Tag to access + * @return size of auto-allocated data, 0 if none + */ +int dev_get_attach_size(const struct udevice *dev, enum dm_tag_t tag); + /** * dev_get_parent() - Get the parent of a device * diff --git a/include/dm/tag.h b/include/dm/tag.h index 54fc31eb153..9cb5d68f0a3 100644 --- a/include/dm/tag.h +++ b/include/dm/tag.h @@ -13,8 +13,19 @@ struct udevice; enum dm_tag_t { + /* Types of core tags that can be attached to devices */ + DM_TAG_PLAT, + DM_TAG_PARENT_PLAT, + DM_TAG_UC_PLAT, + + DM_TAG_PRIV, + DM_TAG_PARENT_PRIV, + DM_TAG_UC_PRIV, + DM_TAG_DRIVER_DATA, + DM_TAG_ATTACH_COUNT, + /* EFI_LOADER */ - DM_TAG_EFI = 0, + DM_TAG_EFI = DM_TAG_ATTACH_COUNT, DM_TAG_COUNT, }; diff --git a/test/dm/core.c b/test/dm/core.c index ebd504427d1..26e2fd56619 100644 --- a/test/dm/core.c +++ b/test/dm/core.c @@ -1275,3 +1275,83 @@ static int dm_test_uclass_find_device(struct unit_test_state *uts) return 0; } DM_TEST(dm_test_uclass_find_device, UT_TESTF_SCAN_FDT); + +/* Test getting information about tags attached to devices */ +static int dm_test_dev_get_attach(struct unit_test_state *uts) +{ + struct udevice *dev; + + ut_assertok(uclass_first_device_err(UCLASS_TEST_FDT, &dev)); + ut_asserteq_str("a-test", dev->name); + + ut_assertnonnull(dev_get_attach_ptr(dev, DM_TAG_PLAT)); + ut_assertnonnull(dev_get_attach_ptr(dev, DM_TAG_PRIV)); + ut_assertnull(dev_get_attach_ptr(dev, DM_TAG_UC_PRIV)); + ut_assertnull(dev_get_attach_ptr(dev, DM_TAG_UC_PLAT)); + ut_assertnull(dev_get_attach_ptr(dev, DM_TAG_PARENT_PLAT)); + ut_assertnull(dev_get_attach_ptr(dev, DM_TAG_PARENT_PRIV)); + + ut_asserteq(sizeof(struct dm_test_pdata), + dev_get_attach_size(dev, DM_TAG_PLAT)); + ut_asserteq(sizeof(struct dm_test_priv), + dev_get_attach_size(dev, DM_TAG_PRIV)); + ut_asserteq(0, dev_get_attach_size(dev, DM_TAG_UC_PRIV)); + ut_asserteq(0, dev_get_attach_size(dev, DM_TAG_UC_PLAT)); + ut_asserteq(0, dev_get_attach_size(dev, DM_TAG_PARENT_PLAT)); + ut_asserteq(0, dev_get_attach_size(dev, DM_TAG_PARENT_PRIV)); + + return 0; +} +DM_TEST(dm_test_dev_get_attach, UT_TESTF_SCAN_FDT); + +/* Test getting information about tags attached to bus devices */ +static int dm_test_dev_get_attach_bus(struct unit_test_state *uts) +{ + struct udevice *dev, *child; + + ut_assertok(uclass_first_device_err(UCLASS_TEST_BUS, &dev)); + ut_asserteq_str("some-bus", dev->name); + + ut_assertnonnull(dev_get_attach_ptr(dev, DM_TAG_PLAT)); + ut_assertnonnull(dev_get_attach_ptr(dev, DM_TAG_PRIV)); + ut_assertnonnull(dev_get_attach_ptr(dev, DM_TAG_UC_PRIV)); + ut_assertnonnull(dev_get_attach_ptr(dev, DM_TAG_UC_PLAT)); + ut_assertnull(dev_get_attach_ptr(dev, DM_TAG_PARENT_PLAT)); + ut_assertnull(dev_get_attach_ptr(dev, DM_TAG_PARENT_PRIV)); + + ut_asserteq(sizeof(struct dm_test_pdata), + dev_get_attach_size(dev, DM_TAG_PLAT)); + ut_asserteq(sizeof(struct dm_test_priv), + dev_get_attach_size(dev, DM_TAG_PRIV)); + ut_asserteq(sizeof(struct dm_test_uclass_priv), + dev_get_attach_size(dev, DM_TAG_UC_PRIV)); + ut_asserteq(sizeof(struct dm_test_uclass_plat), + dev_get_attach_size(dev, DM_TAG_UC_PLAT)); + ut_asserteq(0, dev_get_attach_size(dev, DM_TAG_PARENT_PLAT)); + ut_asserteq(0, dev_get_attach_size(dev, DM_TAG_PARENT_PRIV)); + + /* Now try the child of the bus */ + ut_assertok(device_first_child_err(dev, &child)); + ut_asserteq_str("c-test@5", child->name); + + ut_assertnonnull(dev_get_attach_ptr(child, DM_TAG_PLAT)); + ut_assertnonnull(dev_get_attach_ptr(child, DM_TAG_PRIV)); + ut_assertnull(dev_get_attach_ptr(child, DM_TAG_UC_PRIV)); + ut_assertnull(dev_get_attach_ptr(child, DM_TAG_UC_PLAT)); + ut_assertnonnull(dev_get_attach_ptr(child, DM_TAG_PARENT_PLAT)); + ut_assertnonnull(dev_get_attach_ptr(child, DM_TAG_PARENT_PRIV)); + + ut_asserteq(sizeof(struct dm_test_pdata), + dev_get_attach_size(child, DM_TAG_PLAT)); + ut_asserteq(sizeof(struct dm_test_priv), + dev_get_attach_size(child, DM_TAG_PRIV)); + ut_asserteq(0, dev_get_attach_size(child, DM_TAG_UC_PRIV)); + ut_asserteq(0, dev_get_attach_size(child, DM_TAG_UC_PLAT)); + ut_asserteq(sizeof(struct dm_test_parent_plat), + dev_get_attach_size(child, DM_TAG_PARENT_PLAT)); + ut_asserteq(sizeof(struct dm_test_parent_data), + dev_get_attach_size(child, DM_TAG_PARENT_PRIV)); + + return 0; +} +DM_TEST(dm_test_dev_get_attach_bus, UT_TESTF_SCAN_FDT); diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py index 8bac2076214..879ca2ab2bf 100755 --- a/tools/dtoc/test_dtoc.py +++ b/tools/dtoc/test_dtoc.py @@ -618,6 +618,9 @@ u8 _denx_u_boot_test_bus_priv_some_bus[sizeof(struct dm_test_priv)] #include u8 _denx_u_boot_test_bus_ucplat_some_bus[sizeof(struct dm_test_uclass_plat)] \t__attribute__ ((section (".priv_data"))); +#include +u8 _denx_u_boot_test_bus_uc_priv_some_bus[sizeof(struct dm_test_uclass_priv)] + __attribute__ ((section (".priv_data"))); #include DM_DEVICE_INST(some_bus) = { @@ -628,6 +631,7 @@ DM_DEVICE_INST(some_bus) = { \t.driver_data\t= DM_TEST_TYPE_FIRST, \t.priv_\t\t= _denx_u_boot_test_bus_priv_some_bus, \t.uclass\t\t= DM_UCLASS_REF(testbus), +\t.uclass_priv_ = _denx_u_boot_test_bus_uc_priv_some_bus, \t.uclass_node\t= { \t\t.prev = &DM_UCLASS_REF(testbus)->dev_head, \t\t.next = &DM_UCLASS_REF(testbus)->dev_head, -- GitLab From 0dfda34ca594c701955cfcb71711a7599f97bae3 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 8 May 2022 04:39:25 -0600 Subject: [PATCH 369/581] dm: core: Add a way to collect memory usage Add a function for collecting the amount of memory used by driver model, including devices, uclasses and attached data and tags. This information can provide insights into how to reduce the memory required by driver model. Future work may look at execution speed also. Signed-off-by: Simon Glass --- drivers/core/root.c | 53 +++++++++++++++++++++++++++++++++++++++++++++ drivers/core/tag.c | 11 ++++++++++ include/dm/root.h | 45 ++++++++++++++++++++++++++++++++++++++ include/dm/tag.h | 11 ++++++++++ test/dm/core.c | 11 ++++++++++ 5 files changed, 131 insertions(+) diff --git a/drivers/core/root.c b/drivers/core/root.c index 17dd1205a32..f24ddfa5218 100644 --- a/drivers/core/root.c +++ b/drivers/core/root.c @@ -449,6 +449,59 @@ void dm_get_stats(int *device_countp, int *uclass_countp) *uclass_countp = uclass_get_count(); } +void dev_collect_stats(struct dm_stats *stats, const struct udevice *parent) +{ + const struct udevice *dev; + int i; + + stats->dev_count++; + stats->dev_size += sizeof(struct udevice); + stats->dev_name_size += strlen(parent->name) + 1; + for (i = 0; i < DM_TAG_ATTACH_COUNT; i++) { + int size = dev_get_attach_size(parent, i); + + if (size || + (i == DM_TAG_DRIVER_DATA && parent->driver_data)) { + stats->attach_count[i]++; + stats->attach_size[i] += size; + stats->attach_count_total++; + stats->attach_size_total += size; + } + } + + list_for_each_entry(dev, &parent->child_head, sibling_node) + dev_collect_stats(stats, dev); +} + +void uclass_collect_stats(struct dm_stats *stats) +{ + struct uclass *uc; + + list_for_each_entry(uc, gd->uclass_root, sibling_node) { + int size; + + stats->uc_count++; + stats->uc_size += sizeof(struct uclass); + size = uc->uc_drv->priv_auto; + if (size) { + stats->uc_attach_count++; + stats->uc_attach_size += size; + } + } +} + +void dm_get_mem(struct dm_stats *stats) +{ + memset(stats, '\0', sizeof(*stats)); + dev_collect_stats(stats, gd->dm_root); + uclass_collect_stats(stats); + dev_tag_collect_stats(stats); + + stats->total_size = stats->dev_size + stats->uc_size + + stats->attach_size_total + stats->uc_attach_size + + stats->tag_size; +} + #ifdef CONFIG_ACPIGEN static int root_acpi_get_name(const struct udevice *dev, char *out_name) { diff --git a/drivers/core/tag.c b/drivers/core/tag.c index 22999193a5a..2961725b658 100644 --- a/drivers/core/tag.c +++ b/drivers/core/tag.c @@ -6,6 +6,7 @@ #include #include +#include #include #include #include @@ -137,3 +138,13 @@ int dev_tag_del_all(struct udevice *dev) return -ENOENT; } + +void dev_tag_collect_stats(struct dm_stats *stats) +{ + struct dmtag_node *node; + + list_for_each_entry(node, &gd->dmtag_list, sibling) { + stats->tag_count++; + stats->tag_size += sizeof(struct dmtag_node); + } +} diff --git a/include/dm/root.h b/include/dm/root.h index e888fb993c0..382f83c7f5b 100644 --- a/include/dm/root.h +++ b/include/dm/root.h @@ -9,11 +9,49 @@ #ifndef _DM_ROOT_H_ #define _DM_ROOT_H_ +#include + struct udevice; /* Head of the uclass list if CONFIG_OF_PLATDATA_INST is enabled */ extern struct list_head uclass_head; +/** + * struct dm_stats - Information about driver model memory usage + * + * @total_size: All data + * @dev_count: Number of devices + * @dev_size: Size of all devices (just the struct udevice) + * @dev_name_size: Bytes used by device names + * @uc_count: Number of uclasses + * @uc_size: Size of all uclasses (just the struct uclass) + * @tag_count: Number of tags + * @tag_size: Bytes used by all tags + * @uc_attach_count: Number of uclasses with attached data (priv) + * @uc_attach_size: Total size of that attached data + * @attach_count_total: Total number of attached data items for all udevices and + * uclasses + * @attach_size_total: Total number of bytes of attached data + * @attach_count: Number of devices with attached, for each type + * @attach_size: Total number of bytes of attached data, for each type + */ +struct dm_stats { + int total_size; + int dev_count; + int dev_size; + int dev_name_size; + int uc_count; + int uc_size; + int tag_count; + int tag_size; + int uc_attach_count; + int uc_attach_size; + int attach_count_total; + int attach_size_total; + int attach_count[DM_TAG_ATTACH_COUNT]; + int attach_size[DM_TAG_ATTACH_COUNT]; +}; + /** * dm_root() - Return pointer to the top of the driver tree * @@ -141,4 +179,11 @@ static inline int dm_remove_devices_flags(uint flags) { return 0; } */ void dm_get_stats(int *device_countp, int *uclass_countp); +/** + * dm_get_mem() - Get stats on memory usage in driver model + * + * @mem: Place to put the information + */ +void dm_get_mem(struct dm_stats *stats); + #endif diff --git a/include/dm/tag.h b/include/dm/tag.h index 9cb5d68f0a3..1ea3c9f7af3 100644 --- a/include/dm/tag.h +++ b/include/dm/tag.h @@ -10,6 +10,7 @@ #include #include +struct dm_stats; struct udevice; enum dm_tag_t { @@ -118,4 +119,14 @@ int dev_tag_del(struct udevice *dev, enum dm_tag_t tag); */ int dev_tag_del_all(struct udevice *dev); +/** + * dev_tag_collect_stats() - Collect information on driver model performance + * + * This collects information on how driver model is performing. For now it only + * includes memory usage + * + * @stats: Place to put the collected information + */ +void dev_tag_collect_stats(struct dm_stats *stats); + #endif /* _DM_TAG_H */ diff --git a/test/dm/core.c b/test/dm/core.c index 26e2fd56619..fd4d7569728 100644 --- a/test/dm/core.c +++ b/test/dm/core.c @@ -1355,3 +1355,14 @@ static int dm_test_dev_get_attach_bus(struct unit_test_state *uts) return 0; } DM_TEST(dm_test_dev_get_attach_bus, UT_TESTF_SCAN_FDT); + +/* Test getting information about tags attached to bus devices */ +static int dm_test_dev_get_mem(struct unit_test_state *uts) +{ + struct dm_stats stats; + + dm_get_mem(&stats); + + return 0; +} +DM_TEST(dm_test_dev_get_mem, UT_TESTF_SCAN_FDT); -- GitLab From 2cb4ddb91ec9fcb77c895e4a1192a15aece700c6 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 8 May 2022 04:39:26 -0600 Subject: [PATCH 370/581] dm: core: Add a command to show driver model statistics This command shows the memory used by driver model along with various hints as to what it might be if some 'core' tags were moved to use the tag list instead of a core (i.e. always-there) pointer. This may help with future work to reduce memory usage. Signed-off-by: Simon Glass --- cmd/dm.c | 24 +++++++++++++++ drivers/core/Kconfig | 11 +++++++ drivers/core/dump.c | 73 ++++++++++++++++++++++++++++++++++++++++++++ drivers/core/tag.c | 18 +++++++++++ include/dm/root.h | 2 +- include/dm/tag.h | 8 +++++ include/dm/util.h | 9 ++++++ 7 files changed, 144 insertions(+), 1 deletion(-) diff --git a/cmd/dm.c b/cmd/dm.c index 0c7554a1b1d..eb40f0865fe 100644 --- a/cmd/dm.c +++ b/cmd/dm.c @@ -8,6 +8,7 @@ #include #include +#include #include static int do_dm_dump_driver_compat(struct cmd_tbl *cmdtp, int flag, int argc, @@ -34,6 +35,19 @@ static int do_dm_dump_drivers(struct cmd_tbl *cmdtp, int flag, int argc, return 0; } +#if CONFIG_IS_ENABLED(DM_STATS) +static int do_dm_dump_mem(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + struct dm_stats mem; + + dm_get_mem(&mem); + dm_dump_mem(&mem); + + return 0; +} +#endif /* DM_STATS */ + static int do_dm_dump_static_driver_info(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[]) { @@ -58,11 +72,20 @@ static int do_dm_dump_uclass(struct cmd_tbl *cmdtp, int flag, int argc, return 0; } +#if CONFIG_IS_ENABLED(DM_STATS) +#define DM_MEM_HELP "dm mem Provide a summary of memory usage\n" +#define DM_MEM U_BOOT_SUBCMD_MKENT(mem, 1, 1, do_dm_dump_mem), +#else +#define DM_MEM_HELP +#define DM_MEM +#endif + #if CONFIG_IS_ENABLED(SYS_LONGHELP) static char dm_help_text[] = "compat Dump list of drivers with compatibility strings\n" "dm devres Dump list of device resources for each device\n" "dm drivers Dump list of drivers with uclass and instances\n" + DM_MEM_HELP "dm static Dump list of drivers with static platform data\n" "dn tree Dump tree of driver model devices ('*' = activated)\n" "dm uclass Dump list of instances for each uclass" @@ -73,6 +96,7 @@ U_BOOT_CMD_WITH_SUBCMDS(dm, "Driver model low level access", dm_help_text, U_BOOT_SUBCMD_MKENT(compat, 1, 1, do_dm_dump_driver_compat), U_BOOT_SUBCMD_MKENT(devres, 1, 1, do_dm_dump_devres), U_BOOT_SUBCMD_MKENT(drivers, 1, 1, do_dm_dump_drivers), + DM_MEM U_BOOT_SUBCMD_MKENT(static, 1, 1, do_dm_dump_static_driver_info), U_BOOT_SUBCMD_MKENT(tree, 1, 1, do_dm_dump_tree), U_BOOT_SUBCMD_MKENT(uclass, 1, 1, do_dm_dump_uclass)); diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig index 9b9a7148a1a..97dc699e969 100644 --- a/drivers/core/Kconfig +++ b/drivers/core/Kconfig @@ -75,6 +75,17 @@ config DM_DEBUG help Say Y here if you want to compile in debug messages in DM core. +config DM_STATS + bool "Collect and show driver model stats" + depends on DM + default y if SANDBOX + help + Enable this to collect and display memory statistics about driver + model. This can help to figure out where all the memory is going and + to find optimisations. + + To display the memory stats, use the 'dm mem' command. + config DM_DEVICE_REMOVE bool "Support device removal" depends on DM diff --git a/drivers/core/dump.c b/drivers/core/dump.c index e434fe04728..1c1f7e4d308 100644 --- a/drivers/core/dump.c +++ b/drivers/core/dump.c @@ -172,3 +172,76 @@ void dm_dump_static_driver_info(void) for (entry = drv; entry != drv + n_ents; entry++) printf("%-25.25s %p\n", entry->name, entry->plat); } + +void dm_dump_mem(struct dm_stats *stats) +{ + int total, total_delta; + int i; + + /* Support SPL printf() */ + printf("Struct sizes: udevice %x, driver %x, uclass %x, uc_driver %x\n", + (int)sizeof(struct udevice), (int)sizeof(struct driver), + (int)sizeof(struct uclass), (int)sizeof(struct uclass_driver)); + printf("Memory: device %x:%x, device names %x, uclass %x:%x\n", + stats->dev_count, stats->dev_size, stats->dev_name_size, + stats->uc_count, stats->uc_size); + printf("\n"); + printf("%-15s %5s %5s %5s %5s %5s\n", "Attached type", "Count", + "Size", "Cur", "Tags", "Save"); + printf("%-15s %5s %5s %5s %5s %5s\n", "---------------", "-----", + "-----", "-----", "-----", "-----"); + total_delta = 0; + for (i = 0; i < DM_TAG_ATTACH_COUNT; i++) { + int cur_size, new_size, delta; + + cur_size = stats->dev_count * sizeof(struct udevice); + new_size = stats->dev_count * (sizeof(struct udevice) - + sizeof(void *)); + /* + * Let's assume we can fit each dmtag_node into 32 bits. We can + * limit the 'tiny tags' feature to SPL with + * CONFIG_SPL_SYS_MALLOC_F_LEN <= 64KB, so needing 14 bits to + * point to anything in that region (with 4-byte alignment). + * So: + * 4 bits for tag + * 14 bits for offset of dev + * 14 bits for offset of data + */ + new_size += stats->attach_count[i] * sizeof(u32); + delta = cur_size - new_size; + total_delta += delta; + printf("%-16s %5x %6x %6x %6x %6x (%d)\n", tag_get_name(i), + stats->attach_count[i], stats->attach_size[i], + cur_size, new_size, delta > 0 ? delta : 0, delta); + } + printf("%-16s %5x %6x\n", "uclass", stats->uc_attach_count, + stats->uc_attach_size); + printf("%-16s %5x %6x %5s %5s %6x (%d)\n", "Attached total", + stats->attach_count_total + stats->uc_attach_count, + stats->attach_size_total + stats->uc_attach_size, "", "", + total_delta > 0 ? total_delta : 0, total_delta); + printf("%-16s %5x %6x\n", "tags", stats->tag_count, stats->tag_size); + printf("\n"); + printf("Total size: %x (%d)\n", stats->total_size, stats->total_size); + printf("\n"); + + total = stats->total_size; + total -= total_delta; + printf("With tags: %x (%d)\n", total, total); + + /* Use singly linked lists in struct udevice (3 nodes in each) */ + total -= sizeof(void *) * 3 * stats->dev_count; + printf("- singly-linked: %x (%d)\n", total, total); + + /* Use an index into the struct_driver list instead of a pointer */ + total = total + stats->dev_count * (1 - sizeof(void *)); + printf("- driver index: %x (%d)\n", total, total); + + /* Same with the uclass */ + total = total + stats->dev_count * (1 - sizeof(void *)); + printf("- uclass index: %x (%d)\n", total, total); + + /* Drop the device name */ + printf("Drop device name (not SRAM): %x (%d)\n", stats->dev_name_size, + stats->dev_name_size); +} diff --git a/drivers/core/tag.c b/drivers/core/tag.c index 2961725b658..a3c5cb7e57c 100644 --- a/drivers/core/tag.c +++ b/drivers/core/tag.c @@ -16,6 +16,24 @@ struct udevice; DECLARE_GLOBAL_DATA_PTR; +static const char *const tag_name[] = { + [DM_TAG_PLAT] = "plat", + [DM_TAG_PARENT_PLAT] = "parent_plat", + [DM_TAG_UC_PLAT] = "uclass_plat", + + [DM_TAG_PRIV] = "priv", + [DM_TAG_PARENT_PRIV] = "parent_priv", + [DM_TAG_UC_PRIV] = "uclass_priv", + [DM_TAG_DRIVER_DATA] = "driver_data", + + [DM_TAG_EFI] = "efi", +}; + +const char *tag_get_name(enum dm_tag_t tag) +{ + return tag_name[tag]; +} + int dev_tag_set_ptr(struct udevice *dev, enum dm_tag_t tag, void *ptr) { struct dmtag_node *node; diff --git a/include/dm/root.h b/include/dm/root.h index 382f83c7f5b..b2f30a842f5 100644 --- a/include/dm/root.h +++ b/include/dm/root.h @@ -182,7 +182,7 @@ void dm_get_stats(int *device_countp, int *uclass_countp); /** * dm_get_mem() - Get stats on memory usage in driver model * - * @mem: Place to put the information + * @stats: Place to put the information */ void dm_get_mem(struct dm_stats *stats); diff --git a/include/dm/tag.h b/include/dm/tag.h index 1ea3c9f7af3..745088ffcff 100644 --- a/include/dm/tag.h +++ b/include/dm/tag.h @@ -129,4 +129,12 @@ int dev_tag_del_all(struct udevice *dev); */ void dev_tag_collect_stats(struct dm_stats *stats); +/** + * tag_get_name() - Get the name of a tag + * + * @tag: Tag to look up, which must be valid + * Returns: Name of tag + */ +const char *tag_get_name(enum dm_tag_t tag); + #endif /* _DM_TAG_H */ diff --git a/include/dm/util.h b/include/dm/util.h index c52daa87ef3..e10c6060ce0 100644 --- a/include/dm/util.h +++ b/include/dm/util.h @@ -6,6 +6,8 @@ #ifndef __DM_UTIL_H #define __DM_UTIL_H +struct dm_stats; + #if CONFIG_IS_ENABLED(DM_WARN) #define dm_warn(fmt...) log(LOGC_DM, LOGL_WARNING, ##fmt) #else @@ -48,6 +50,13 @@ void dm_dump_driver_compat(void); /* Dump out a list of drivers with static platform data */ void dm_dump_static_driver_info(void); +/** + * dm_dump_mem() - Dump stats on memory usage in driver model + * + * @mem: Stats to dump + */ +void dm_dump_mem(struct dm_stats *stats); + #if CONFIG_IS_ENABLED(OF_PLATDATA_INST) && CONFIG_IS_ENABLED(READ_ONLY) void *dm_priv_to_rw(void *priv); #else -- GitLab From 4f6500aa1a62a80e8df2ffdf16fe4c3eabd99f1c Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 8 May 2022 04:39:27 -0600 Subject: [PATCH 371/581] dm: spl: Allow SPL to show memory usage Add an option to tell SPL to show memory usage for driver model just before it boots into the next phase. Signed-off-by: Simon Glass --- common/spl/spl.c | 9 +++++++++ drivers/core/Kconfig | 10 ++++++++++ 2 files changed, 19 insertions(+) diff --git a/common/spl/spl.c b/common/spl/spl.c index 2a69a7c9324..dff4eef7071 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -34,6 +34,7 @@ #include #include #include +#include #include #include #include @@ -780,6 +781,14 @@ void board_init_r(gd_t *dummy1, ulong dummy2) bootcount_inc(); + /* Dump driver model states to aid analysis */ + if (CONFIG_IS_ENABLED(DM_STATS)) { + struct dm_stats mem; + + dm_get_mem(&mem); + dm_dump_mem(&mem); + } + memset(&spl_image, '\0', sizeof(spl_image)); #ifdef CONFIG_SYS_SPL_ARGS_ADDR spl_image.arg = (void *)CONFIG_SYS_SPL_ARGS_ADDR; diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig index 97dc699e969..99e28713f9b 100644 --- a/drivers/core/Kconfig +++ b/drivers/core/Kconfig @@ -86,6 +86,16 @@ config DM_STATS To display the memory stats, use the 'dm mem' command. +config SPL_DM_STATS + bool "Collect and show driver model stats in SPL" + depends on DM_SPL + help + Enable this to collect and display memory statistics about driver + model. This can help to figure out where all the memory is going and + to find optimisations. + + The stats are displayed just before SPL boots to the next phase. + config DM_DEVICE_REMOVE bool "Support device removal" depends on DM -- GitLab From d4462ba0443d4ea7de290b2ccf90b2a1c0122b93 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sun, 12 Jun 2022 11:25:22 +0000 Subject: [PATCH 372/581] sandbox: cast to pointer from integer of different size Building sandbox_defconfig on ARMv7 with HOST_32BIT=y results in: drivers/misc/qfw_sandbox.c:51:25: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] 51 | void *address = (void *)be64_to_cpu(dma->address); Add the missing type conversion. Fixes: 69512551aa84 ("test: qemu: add qfw sandbox driver, dm tests, qemu tests") Signed-off-by: Heinrich Schuchardt Reviewed-by: Bin Meng --- drivers/misc/qfw_sandbox.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/misc/qfw_sandbox.c b/drivers/misc/qfw_sandbox.c index b09974d33bd..1002df75339 100644 --- a/drivers/misc/qfw_sandbox.c +++ b/drivers/misc/qfw_sandbox.c @@ -48,7 +48,7 @@ static void qfw_sandbox_read_entry_dma(struct udevice *dev, struct qfw_dma *dma) { u16 entry; u32 control = be32_to_cpu(dma->control); - void *address = (void *)be64_to_cpu(dma->address); + void *address = (void *)(uintptr_t)be64_to_cpu(dma->address); u32 length = be32_to_cpu(dma->length); struct qfw_sandbox_plat *plat = dev_get_plat(dev); struct fw_cfg_file *file; -- GitLab From d7f071725287a5462c57242bf04a752cd5ddfff1 Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak Date: Sat, 18 Jun 2022 15:13:06 +0300 Subject: [PATCH 373/581] spl: binman: Fix use of undeclared u_boot_any symbols Some SPL functions directly use the binman 'u_boot_any' symbols to get U-Boot's binman image position. These symbols are declared by the SPL/TPL_BINMAN_SYMBOLS configs, but they are accessed by macros defined by just CONFIG_BINMAN. So when BINMAN is enabled and BINMAN_SYMBOLS is disabled, the code tries to use undeclared symbols and we get an error. Therefore, any use of 'u_boot_any' symbols in the code is an implicit dependency on SPL/TPL_BINMAN_SYMBOLS. However, in the current uses they are meant to be the next phase's values, where that happens to be U-Boot. In the meantime, helper funcions spl_get_image_pos/size() were introduced to get these values. Convert all uses of u_boot_any symbols to these functions, so we only access these symbols at one place. Make sure they will not use these symbols when the BINMAN_SYMBOLS configs are disabled, by returning early in those cases. Signed-off-by: Alper Nebi Yasak --- common/spl/spl.c | 10 +++++++--- common/spl/spl_ram.c | 2 +- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/common/spl/spl.c b/common/spl/spl.c index dff4eef7071..75051656249 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -150,9 +150,11 @@ void spl_fixup_fdt(void *fdt_blob) #endif } -#if CONFIG_IS_ENABLED(BINMAN_SYMBOLS) ulong spl_get_image_pos(void) { + if (!CONFIG_IS_ENABLED(BINMAN_SYMBOLS)) + return BINMAN_SYM_MISSING; + #ifdef CONFIG_VPL if (spl_next_phase() == PHASE_VPL) return binman_sym(ulong, u_boot_vpl, image_pos); @@ -164,6 +166,9 @@ ulong spl_get_image_pos(void) ulong spl_get_image_size(void) { + if (!CONFIG_IS_ENABLED(BINMAN_SYMBOLS)) + return BINMAN_SYM_MISSING; + #ifdef CONFIG_VPL if (spl_next_phase() == PHASE_VPL) return binman_sym(ulong, u_boot_vpl, size); @@ -172,7 +177,6 @@ ulong spl_get_image_size(void) binman_sym(ulong, u_boot_spl, size) : binman_sym(ulong, u_boot_any, size); } -#endif /* BINMAN_SYMBOLS */ ulong spl_get_image_text_base(void) { @@ -223,7 +227,7 @@ __weak struct image_header *spl_get_load_buffer(ssize_t offset, size_t size) void spl_set_header_raw_uboot(struct spl_image_info *spl_image) { - ulong u_boot_pos = binman_sym(ulong, u_boot_any, image_pos); + ulong u_boot_pos = spl_get_image_pos(); spl_image->size = CONFIG_SYS_MONITOR_LEN; diff --git a/common/spl/spl_ram.c b/common/spl/spl_ram.c index 82964592571..d64710878cf 100644 --- a/common/spl/spl_ram.c +++ b/common/spl/spl_ram.c @@ -70,7 +70,7 @@ static int spl_ram_load_image(struct spl_image_info *spl_image, load.read = spl_ram_load_read; spl_load_simple_fit(spl_image, &load, 0, header); } else { - ulong u_boot_pos = binman_sym(ulong, u_boot_any, image_pos); + ulong u_boot_pos = spl_get_image_pos(); debug("Legacy image\n"); /* -- GitLab From e09a8b9f1b7d16052f5b56303411bdb5388a8044 Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak Date: Sat, 18 Jun 2022 15:13:07 +0300 Subject: [PATCH 374/581] spl: binman: Make TPL_BINMAN_SYMBOLS depend on TPL_FRAMEWORK TPL_BINMAN_SYMBOLS depends on SPL_FRAMEWORK. The code this enables is compiled by checking CONFIG_$(SPL_TPL_)FRAMEWORK, so it should depend on TPL_FRAMEWORK instead (which in turn depends on SPL_FRAMEWORK). This was most likely a typo due to copy-pasting the config's SPL version, fix it. Signed-off-by: Alper Nebi Yasak --- common/spl/Kconfig.tpl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/spl/Kconfig.tpl b/common/spl/Kconfig.tpl index 9a0e719cf94..834cb6b6dd8 100644 --- a/common/spl/Kconfig.tpl +++ b/common/spl/Kconfig.tpl @@ -10,7 +10,7 @@ config TPL_SIZE_LIMIT config TPL_BINMAN_SYMBOLS bool "Declare binman symbols in TPL" - depends on SPL_FRAMEWORK && BINMAN + depends on TPL_FRAMEWORK && BINMAN default y help This enables use of symbols in TPL which refer to U-Boot, enabling TPL -- GitLab From 5204823c81c2be4ef3abfcaae351401f8dd5f058 Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak Date: Sat, 18 Jun 2022 15:13:08 +0300 Subject: [PATCH 375/581] spl: binman: Declare extern symbols for VPL as well The binman extern symbol declarations in spl.h are missing the VPL symbols recently added to spl.c, add them like the others. Signed-off-by: Alper Nebi Yasak --- include/spl.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/spl.h b/include/spl.h index 83ac583e0b4..1778e0f5368 100644 --- a/include/spl.h +++ b/include/spl.h @@ -288,6 +288,8 @@ binman_sym_extern(ulong, u_boot_any, image_pos); binman_sym_extern(ulong, u_boot_any, size); binman_sym_extern(ulong, u_boot_spl, image_pos); binman_sym_extern(ulong, u_boot_spl, size); +binman_sym_extern(ulong, u_boot_vpl, image_pos); +binman_sym_extern(ulong, u_boot_vpl, size); /** * spl_get_image_pos() - get the image position of the next phase -- GitLab From d8830cf84035120562bb490be276fab9e43d6414 Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak Date: Sat, 18 Jun 2022 15:13:09 +0300 Subject: [PATCH 376/581] spl: binman: Split binman symbols support from enabling binman Enabling CONFIG_BINMAN makes binman run after a build to package any images specified in the device-tree. It also enables a mechanism for SPL/TPL to declare and use special linker symbols that refer to other entries in the same binman image. A similar feature that gets this info from the device-tree exists for U-Boot proper, but it is gated behind a CONFIG_BINMAN_FDT unlike the symbols. Confusingly, CONFIG_SPL/TPL_BINMAN_SYMBOLS also exist. These configs don't actually enable/disable the symbols mechanism as one would expect, but declare some symbols for U-Boot using this mechanism. Reuse the BINMAN_SYMBOLS configs to make them toggle the symbols mechanism, and declare symbols for the U-Boot phases in a dependent BINMAN_UBOOT_SYMBOLS config. Extend it to cover symbols of all phases. Update the config prompt and help message to make it clearer about this. Fix binman test binaries to work with CONFIG_IS_ENABLED(BINMAN_SYMBOLS). Co-developed-by: Peng Fan [Alper: New config for phase symbols, update Kconfigs, commit message] Signed-off-by: Alper Nebi Yasak --- common/spl/Kconfig | 22 ++++++++++++++----- common/spl/Kconfig.tpl | 24 +++++++++++++++------ common/spl/spl.c | 9 ++++---- include/binman_sym.h | 6 +++--- tools/binman/test/Makefile | 2 +- tools/binman/test/generated/autoconf.h | 3 +++ tools/binman/test/u_boot_binman_syms.c | 2 +- tools/binman/test/u_boot_binman_syms_size.c | 2 +- 8 files changed, 49 insertions(+), 21 deletions(-) create mode 100644 tools/binman/test/generated/autoconf.h diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 2ad2351c6eb..46d9be73bb1 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -190,12 +190,24 @@ config SPL_BINMAN_SYMBOLS depends on SPL_FRAMEWORK && BINMAN default y help - This enables use of symbols in SPL which refer to U-Boot, enabling SPL - to obtain the location of U-Boot simply by calling spl_get_image_pos() - and spl_get_image_size(). + This enables use of symbols in SPL which refer to other entries in + the same binman image as the SPL. These can be declared with the + binman_sym_declare(type, entry, prop) macro and accessed by the + binman_sym(type, entry, prop) macro defined in binman_sym.h. - For this to work, you must have a U-Boot image in the binman image, so - binman can update SPL with the location of it. + See tools/binman/binman.rst for a detailed explanation. + +config SPL_BINMAN_UBOOT_SYMBOLS + bool "Declare binman symbols for U-Boot phases in SPL" + depends on SPL_BINMAN_SYMBOLS + default y + help + This enables use of symbols in SPL which refer to U-Boot phases, + enabling SPL to obtain the location and size of its next phase simply + by calling spl_get_image_pos() and spl_get_image_size(). + + For this to work, you must have all U-Boot phases in the same binman + image, so binman can update SPL with the locations of everything. source "common/spl/Kconfig.nxp" diff --git a/common/spl/Kconfig.tpl b/common/spl/Kconfig.tpl index 834cb6b6dd8..8c59c767302 100644 --- a/common/spl/Kconfig.tpl +++ b/common/spl/Kconfig.tpl @@ -9,16 +9,28 @@ config TPL_SIZE_LIMIT If this value is zero, it is ignored. config TPL_BINMAN_SYMBOLS - bool "Declare binman symbols in TPL" + bool "Support binman symbols in TPL" depends on TPL_FRAMEWORK && BINMAN default y help - This enables use of symbols in TPL which refer to U-Boot, enabling TPL - to obtain the location of U-Boot simply by calling spl_get_image_pos() - and spl_get_image_size(). + This enables use of symbols in TPL which refer to other entries in + the same binman image as the TPL. These can be declared with the + binman_sym_declare(type, entry, prop) macro and accessed by the + binman_sym(type, entry, prop) macro defined in binman_sym.h. - For this to work, you must have a U-Boot image in the binman image, so - binman can update TPL with the location of it. + See tools/binman/binman.rst for a detailed explanation. + +config TPL_BINMAN_UBOOT_SYMBOLS + bool "Declare binman symbols for U-Boot phases in TPL" + depends on TPL_BINMAN_SYMBOLS + default y + help + This enables use of symbols in TPL which refer to U-Boot phases, + enabling TPL to obtain the location and size of its next phase simply + by calling spl_get_image_pos() and spl_get_image_size(). + + For this to work, you must have all U-Boot phases in the same binman + image, so binman can update TPL with the locations of everything. config TPL_FRAMEWORK bool "Support TPL based upon the common SPL framework" diff --git a/common/spl/spl.c b/common/spl/spl.c index 75051656249..5dd122611c2 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -52,11 +52,10 @@ DECLARE_GLOBAL_DATA_PTR; u32 *boot_params_ptr = NULL; -#if CONFIG_IS_ENABLED(BINMAN_SYMBOLS) +#if CONFIG_IS_ENABLED(BINMAN_UBOOT_SYMBOLS) /* See spl.h for information about this */ binman_sym_declare(ulong, u_boot_any, image_pos); binman_sym_declare(ulong, u_boot_any, size); -#endif #ifdef CONFIG_TPL binman_sym_declare(ulong, u_boot_spl, image_pos); @@ -68,6 +67,8 @@ binman_sym_declare(ulong, u_boot_vpl, image_pos); binman_sym_declare(ulong, u_boot_vpl, size); #endif +#endif /* BINMAN_UBOOT_SYMBOLS */ + /* Define board data structure */ static struct bd_info bdata __attribute__ ((section(".data"))); @@ -152,7 +153,7 @@ void spl_fixup_fdt(void *fdt_blob) ulong spl_get_image_pos(void) { - if (!CONFIG_IS_ENABLED(BINMAN_SYMBOLS)) + if (!CONFIG_IS_ENABLED(BINMAN_UBOOT_SYMBOLS)) return BINMAN_SYM_MISSING; #ifdef CONFIG_VPL @@ -166,7 +167,7 @@ ulong spl_get_image_pos(void) ulong spl_get_image_size(void) { - if (!CONFIG_IS_ENABLED(BINMAN_SYMBOLS)) + if (!CONFIG_IS_ENABLED(BINMAN_UBOOT_SYMBOLS)) return BINMAN_SYM_MISSING; #ifdef CONFIG_VPL diff --git a/include/binman_sym.h b/include/binman_sym.h index 72e6765fe52..8586ef8731b 100644 --- a/include/binman_sym.h +++ b/include/binman_sym.h @@ -13,7 +13,7 @@ #define BINMAN_SYM_MISSING (-1UL) -#ifdef CONFIG_BINMAN +#if CONFIG_IS_ENABLED(BINMAN_SYMBOLS) /** * binman_symname() - Internal function to get a binman symbol name @@ -77,7 +77,7 @@ #define binman_sym(_type, _entry_name, _prop_name) \ (*(_type *)&binman_symname(_entry_name, _prop_name)) -#else /* !BINMAN */ +#else /* !CONFIG_IS_ENABLED(BINMAN_SYMBOLS) */ #define binman_sym_declare(_type, _entry_name, _prop_name) @@ -87,6 +87,6 @@ #define binman_sym(_type, _entry_name, _prop_name) BINMAN_SYM_MISSING -#endif /* BINMAN */ +#endif /* CONFIG_IS_ENABLED(BINMAN_SYMBOLS) */ #endif diff --git a/tools/binman/test/Makefile b/tools/binman/test/Makefile index 57057e2d588..bea8567c9b4 100644 --- a/tools/binman/test/Makefile +++ b/tools/binman/test/Makefile @@ -21,7 +21,7 @@ CC = $(CROSS_COMPILE)gcc OBJCOPY = $(CROSS_COMPILE)objcopy VPATH := $(SRC) -CFLAGS := -march=i386 -m32 -nostdlib -I $(SRC)../../../include \ +CFLAGS := -march=i386 -m32 -nostdlib -I $(SRC)../../../include -I $(SRC) \ -Wl,--no-dynamic-linker LDS_UCODE := -T $(SRC)u_boot_ucode_ptr.lds diff --git a/tools/binman/test/generated/autoconf.h b/tools/binman/test/generated/autoconf.h new file mode 100644 index 00000000000..6a23039f469 --- /dev/null +++ b/tools/binman/test/generated/autoconf.h @@ -0,0 +1,3 @@ +#define CONFIG_BINMAN 1 +#define CONFIG_SPL_BUILD 1 +#define CONFIG_SPL_BINMAN_SYMBOLS 1 diff --git a/tools/binman/test/u_boot_binman_syms.c b/tools/binman/test/u_boot_binman_syms.c index 37fc339ce84..89fee5567e1 100644 --- a/tools/binman/test/u_boot_binman_syms.c +++ b/tools/binman/test/u_boot_binman_syms.c @@ -5,7 +5,7 @@ * Simple program to create some binman symbols. This is used by binman tests. */ -#define CONFIG_BINMAN +#include #include binman_sym_declare(unsigned long, u_boot_spl_any, offset); diff --git a/tools/binman/test/u_boot_binman_syms_size.c b/tools/binman/test/u_boot_binman_syms_size.c index 7224bc1863c..c4a053f96f1 100644 --- a/tools/binman/test/u_boot_binman_syms_size.c +++ b/tools/binman/test/u_boot_binman_syms_size.c @@ -5,7 +5,7 @@ * Simple program to create some binman symbols. This is used by binman tests. */ -#define CONFIG_BINMAN +#include #include binman_sym_declare(char, u_boot_spl, pos); -- GitLab From 3a7d32787602a54486856e8392ba202b56ede3c7 Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak Date: Sat, 18 Jun 2022 15:13:10 +0300 Subject: [PATCH 377/581] spl: binman: Add config options for binman symbols in VPL The SPL code declares binman symbols for U-Boot phases depending on CONFIG_IS_ENABLED(BINMAN_UBOOT_SYMBOLS). This config exists for SPL and TPL, also add a version for VPL. Signed-off-by: Alper Nebi Yasak --- common/spl/Kconfig.vpl | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/common/spl/Kconfig.vpl b/common/spl/Kconfig.vpl index ba1ea6075b9..daec0bb7bff 100644 --- a/common/spl/Kconfig.vpl +++ b/common/spl/Kconfig.vpl @@ -198,4 +198,28 @@ config VPL_TEXT_BASE help The address in memory that VPL will be running from. +config VPL_BINMAN_SYMBOLS + bool "Declare binman symbols in VPL" + depends on VPL_FRAMEWORK && BINMAN + default y + help + This enables use of symbols in VPL which refer to other entries in + the same binman image as the VPL. These can be declared with the + binman_sym_declare(type, entry, prop) macro and accessed by the + binman_sym(type, entry, prop) macro defined in binman_sym.h. + + See tools/binman/binman.rst for a detailed explanation. + +config VPL_BINMAN_UBOOT_SYMBOLS + bool "Declare binman symbols for U-Boot phases in VPL" + depends on VPL_BINMAN_SYMBOLS + default y + help + This enables use of symbols in VPL which refer to U-Boot phases, + enabling VPL to obtain the location and size of its next phase simply + by calling spl_get_image_pos() and spl_get_image_size(). + + For this to work, you must have all U-Boot phases in the same binman + image, so binman can update VPL with the locations of everything. + endmenu -- GitLab From 367ecbf2d3b1c16a3b98b9f6430b8197d2bddbf9 Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak Date: Sat, 18 Jun 2022 15:13:11 +0300 Subject: [PATCH 378/581] spl: binman: Check at runtime if binman symbols were filled in Binman lets us declare symbols in SPL/TPL that refer to other entries in the same binman image as them. These symbols are filled in with the correct values while binman assembles the images, but this is done in-memory only. Symbols marked as optional can be filled with BINMAN_SYM_MISSING as an error value if their referred entry is missing. However, the unmodified SPL/TPL binaries are still available on disk, and can be used by people. For these files, nothing ensures that the symbols are set to this error value, and they will be considered valid when they are not. Empirically, all symbols show up as zero in a sandbox_vpl build when we run e.g. tpl/u-boot-tpl directly. On the other hand, zero is a perfectly fine value for a binman-written symbol, so we cannot say the symbols have wrong values based on that. Declare a magic symbol that binman always fills in with a fixed value. Check this value as an indicator that symbols were filled in correctly. Return the error value for all symbols when this magic symbol has the wrong value. For binman tests, we need to make room for the new symbol in the mocked SPL/TPL data by extending them by four bytes. This messes up some test image layouts. Fix the affected values, and check the magic symbol wherever it makes sense. Signed-off-by: Alper Nebi Yasak --- common/spl/spl.c | 1 + include/binman_sym.h | 45 ++++++++++++++++++++- tools/binman/elf.py | 12 ++++-- tools/binman/elf_test.py | 12 +++--- tools/binman/ftest.py | 33 +++++++-------- tools/binman/test/021_image_pad.dts | 2 +- tools/binman/test/024_sorted.dts | 2 +- tools/binman/test/028_pack_4gb_outside.dts | 2 +- tools/binman/test/029_x86_rom.dts | 6 +-- tools/binman/test/053_symbols.dts | 2 +- tools/binman/test/149_symbols_tpl.dts | 4 +- tools/binman/test/155_symbols_tpl_x86.dts | 4 +- tools/binman/test/187_symbols_sub.dts | 2 +- tools/binman/test/u_boot_binman_syms.c | 4 ++ tools/binman/test/u_boot_binman_syms_size.c | 4 ++ 15 files changed, 97 insertions(+), 38 deletions(-) diff --git a/common/spl/spl.c b/common/spl/spl.c index 5dd122611c2..29e0898f03d 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -41,6 +41,7 @@ #include DECLARE_GLOBAL_DATA_PTR; +DECLARE_BINMAN_MAGIC_SYM; #ifndef CONFIG_SYS_UBOOT_START #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE diff --git a/include/binman_sym.h b/include/binman_sym.h index 8586ef8731b..528d7e4e90e 100644 --- a/include/binman_sym.h +++ b/include/binman_sym.h @@ -11,6 +11,8 @@ #ifndef __BINMAN_SYM_H #define __BINMAN_SYM_H +/* BSYM in little endian, keep in sync with tools/binman/elf.py */ +#define BINMAN_SYM_MAGIC_VALUE (0x4d595342UL) #define BINMAN_SYM_MISSING (-1UL) #if CONFIG_IS_ENABLED(BINMAN_SYMBOLS) @@ -62,6 +64,37 @@ __attribute__((aligned(4), weak, unused, \ section(".binman_sym"))) +/** + * _binman_sym_magic - Internal magic symbol for validity checks + * + * When building images, binman fills in this symbol with the magic + * value #defined above. This is used to check at runtime if the + * symbol values were filled in and are OK to use. + */ +extern ulong _binman_sym_magic; + +/** + * DECLARE_BINMAN_MAGIC_SYM - Declare the internal magic symbol + * + * This macro declares the _binman_sym_magic symbol so that it exists. + * Declaring it here would cause errors during linking due to multiple + * definitions of the symbol. + */ +#define DECLARE_BINMAN_MAGIC_SYM \ + ulong _binman_sym_magic \ + __attribute__((aligned(4), section(".binman_sym"))) + +/** + * BINMAN_SYMS_OK - Check if the symbol values are valid + * + * This macro checks if the magic symbol's value is filled properly, + * which indicates that other symbols are OK to use as well. + * + * Return: 1 if binman symbol values are usable, 0 if not + */ +#define BINMAN_SYMS_OK \ + (*(ulong *)&_binman_sym_magic == BINMAN_SYM_MAGIC_VALUE) + /** * binman_sym() - Access a previously declared symbol * @@ -72,10 +105,14 @@ * @_type: Type f the symbol (e.g. unsigned long) * @entry_name: Name of the entry to look for (e.g. 'u_boot_spl') * @_prop_name: Property value to get from that entry (e.g. 'pos') - * @returns value of that property (filled in by binman) + * + * Return: value of that property (filled in by binman), or + * BINMAN_SYM_MISSING if the value is unavailable */ #define binman_sym(_type, _entry_name, _prop_name) \ - (*(_type *)&binman_symname(_entry_name, _prop_name)) + (BINMAN_SYMS_OK ? \ + (*(_type *)&binman_symname(_entry_name, _prop_name)) : \ + BINMAN_SYM_MISSING) #else /* !CONFIG_IS_ENABLED(BINMAN_SYMBOLS) */ @@ -85,6 +122,10 @@ #define binman_sym_extern(_type, _entry_name, _prop_name) +#define DECLARE_BINMAN_MAGIC_SYM + +#define BINMAN_SYMS_OK (0) + #define binman_sym(_type, _entry_name, _prop_name) BINMAN_SYM_MISSING #endif /* CONFIG_IS_ENABLED(BINMAN_SYMBOLS) */ diff --git a/tools/binman/elf.py b/tools/binman/elf.py index afa05e58fdd..6d440ddf21d 100644 --- a/tools/binman/elf.py +++ b/tools/binman/elf.py @@ -25,6 +25,9 @@ try: except: # pragma: no cover ELF_TOOLS = False +# BSYM in little endian, keep in sync with include/binman_sym.h +BINMAN_SYM_MAGIC_VALUE = 0x4d595342 + # Information about an EFL symbol: # section (str): Name of the section containing this symbol # address (int): Address of the symbol (its value) @@ -223,9 +226,12 @@ def LookupAndWriteSymbols(elf_fname, entry, section): raise ValueError('%s has size %d: only 4 and 8 are supported' % (msg, sym.size)) - # Look up the symbol in our entry tables. - value = section.GetImage().LookupImageSymbol(name, sym.weak, msg, - base.address) + if name == '_binman_sym_magic': + value = BINMAN_SYM_MAGIC_VALUE + else: + # Look up the symbol in our entry tables. + value = section.GetImage().LookupImageSymbol(name, sym.weak, + msg, base.address) if value is None: value = -1 pack_string = pack_string.lower() diff --git a/tools/binman/elf_test.py b/tools/binman/elf_test.py index 02bc1083749..5a51c64cfee 100644 --- a/tools/binman/elf_test.py +++ b/tools/binman/elf_test.py @@ -127,7 +127,7 @@ class TestElf(unittest.TestCase): elf_fname = self.ElfTestFile('u_boot_binman_syms') with self.assertRaises(ValueError) as e: elf.LookupAndWriteSymbols(elf_fname, entry, section) - self.assertIn('entry_path has offset 4 (size 8) but the contents size ' + self.assertIn('entry_path has offset 8 (size 8) but the contents size ' 'is a', str(e.exception)) def testMissingImageStart(self): @@ -161,18 +161,20 @@ class TestElf(unittest.TestCase): This should produce -1 values for all thress symbols, taking up the first 16 bytes of the image. """ - entry = FakeEntry(24) + entry = FakeEntry(28) section = FakeSection(sym_value=None) elf_fname = self.ElfTestFile('u_boot_binman_syms') elf.LookupAndWriteSymbols(elf_fname, entry, section) - self.assertEqual(tools.get_bytes(255, 20) + tools.get_bytes(ord('a'), 4), - entry.data) + expected = (struct.pack('; + offset = <28>; }; }; }; diff --git a/tools/binman/test/024_sorted.dts b/tools/binman/test/024_sorted.dts index b79d9adf682..b54f9b14191 100644 --- a/tools/binman/test/024_sorted.dts +++ b/tools/binman/test/024_sorted.dts @@ -7,7 +7,7 @@ binman { sort-by-offset; u-boot { - offset = <26>; + offset = <30>; }; u-boot-spl { diff --git a/tools/binman/test/028_pack_4gb_outside.dts b/tools/binman/test/028_pack_4gb_outside.dts index 11a1f6059e2..b6ad7fb56a5 100644 --- a/tools/binman/test/028_pack_4gb_outside.dts +++ b/tools/binman/test/028_pack_4gb_outside.dts @@ -13,7 +13,7 @@ }; u-boot-spl { - offset = <0xffffffe7>; + offset = <0xffffffe3>; }; }; }; diff --git a/tools/binman/test/029_x86_rom.dts b/tools/binman/test/029_x86_rom.dts index 88aa007bbae..ad8f9d6e1bd 100644 --- a/tools/binman/test/029_x86_rom.dts +++ b/tools/binman/test/029_x86_rom.dts @@ -7,13 +7,13 @@ binman { sort-by-offset; end-at-4gb; - size = <32>; + size = <36>; u-boot { - offset = <0xffffffe0>; + offset = <0xffffffdc>; }; u-boot-spl { - offset = <0xffffffe7>; + offset = <0xffffffe3>; }; }; }; diff --git a/tools/binman/test/053_symbols.dts b/tools/binman/test/053_symbols.dts index 29658092764..b28f34a72fa 100644 --- a/tools/binman/test/053_symbols.dts +++ b/tools/binman/test/053_symbols.dts @@ -10,7 +10,7 @@ }; u-boot { - offset = <0x18>; + offset = <0x1c>; }; u-boot-spl2 { diff --git a/tools/binman/test/149_symbols_tpl.dts b/tools/binman/test/149_symbols_tpl.dts index 0a4ab3f1fab..4e649c45978 100644 --- a/tools/binman/test/149_symbols_tpl.dts +++ b/tools/binman/test/149_symbols_tpl.dts @@ -11,12 +11,12 @@ }; u-boot-spl2 { - offset = <0x1c>; + offset = <0x20>; type = "u-boot-spl"; }; u-boot { - offset = <0x34>; + offset = <0x3c>; }; section { diff --git a/tools/binman/test/155_symbols_tpl_x86.dts b/tools/binman/test/155_symbols_tpl_x86.dts index 9d7dc51b3d9..e1ce33e67fb 100644 --- a/tools/binman/test/155_symbols_tpl_x86.dts +++ b/tools/binman/test/155_symbols_tpl_x86.dts @@ -14,12 +14,12 @@ }; u-boot-spl2 { - offset = <0xffffff1c>; + offset = <0xffffff20>; type = "u-boot-spl"; }; u-boot { - offset = <0xffffff34>; + offset = <0xffffff3c>; }; section { diff --git a/tools/binman/test/187_symbols_sub.dts b/tools/binman/test/187_symbols_sub.dts index 54511a73711..3ab62d37215 100644 --- a/tools/binman/test/187_symbols_sub.dts +++ b/tools/binman/test/187_symbols_sub.dts @@ -11,7 +11,7 @@ }; u-boot { - offset = <24>; + offset = <28>; }; }; diff --git a/tools/binman/test/u_boot_binman_syms.c b/tools/binman/test/u_boot_binman_syms.c index 89fee5567e1..ed761246aec 100644 --- a/tools/binman/test/u_boot_binman_syms.c +++ b/tools/binman/test/u_boot_binman_syms.c @@ -5,9 +5,13 @@ * Simple program to create some binman symbols. This is used by binman tests. */ +typedef unsigned long ulong; + #include #include +DECLARE_BINMAN_MAGIC_SYM; + binman_sym_declare(unsigned long, u_boot_spl_any, offset); binman_sym_declare(unsigned long long, u_boot_spl2, offset); binman_sym_declare(unsigned long, u_boot_any, image_pos); diff --git a/tools/binman/test/u_boot_binman_syms_size.c b/tools/binman/test/u_boot_binman_syms_size.c index c4a053f96f1..fa41b3d9a33 100644 --- a/tools/binman/test/u_boot_binman_syms_size.c +++ b/tools/binman/test/u_boot_binman_syms_size.c @@ -5,7 +5,11 @@ * Simple program to create some binman symbols. This is used by binman tests. */ +typedef unsigned long ulong; + #include #include +DECLARE_BINMAN_MAGIC_SYM; + binman_sym_declare(char, u_boot_spl, pos); -- GitLab From 6516c9b349b3272c6c9cb7a4bdcfdef617d9f4ee Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak Date: Sat, 18 Jun 2022 15:13:12 +0300 Subject: [PATCH 379/581] spl: binman: Disable u_boot_any symbols for i.MX8M boards The i.MX8M boards use partially specified binman images which have an SPL entry without a U-Boot entry. This would normally cause an error due to the 'u_boot_any' binman symbols declared by BINMAN_UBOOT_SYMBOLS requiring a U-Boot-like entry in the same image as the SPL. However, a problem in the ARMv8 __image_copy_start symbol definition effectively disables binman from attempting to write any symbols at all, so everything appears to work fine until runtime. A future patch fixes the issue in the linker scripts, which lets binman fill in the symbols, which would result in the build error described above. Explicitly disable the 'u_boot_any' symbols for i.MX8M boards. They are already effectively unusable, and they are incompatible with the boards' current binman image descriptions. Signed-off-by: Alper Nebi Yasak --- common/spl/Kconfig | 1 + common/spl/Kconfig.tpl | 1 + common/spl/Kconfig.vpl | 1 + 3 files changed, 3 insertions(+) diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 46d9be73bb1..152569ee435 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -200,6 +200,7 @@ config SPL_BINMAN_SYMBOLS config SPL_BINMAN_UBOOT_SYMBOLS bool "Declare binman symbols for U-Boot phases in SPL" depends on SPL_BINMAN_SYMBOLS + default n if ARCH_IMX8M default y help This enables use of symbols in SPL which refer to U-Boot phases, diff --git a/common/spl/Kconfig.tpl b/common/spl/Kconfig.tpl index 8c59c767302..e314b793a2e 100644 --- a/common/spl/Kconfig.tpl +++ b/common/spl/Kconfig.tpl @@ -23,6 +23,7 @@ config TPL_BINMAN_SYMBOLS config TPL_BINMAN_UBOOT_SYMBOLS bool "Declare binman symbols for U-Boot phases in TPL" depends on TPL_BINMAN_SYMBOLS + default n if ARCH_IMX8M default y help This enables use of symbols in TPL which refer to U-Boot phases, diff --git a/common/spl/Kconfig.vpl b/common/spl/Kconfig.vpl index daec0bb7bff..ba4b2e4f99e 100644 --- a/common/spl/Kconfig.vpl +++ b/common/spl/Kconfig.vpl @@ -213,6 +213,7 @@ config VPL_BINMAN_SYMBOLS config VPL_BINMAN_UBOOT_SYMBOLS bool "Declare binman symbols for U-Boot phases in VPL" depends on VPL_BINMAN_SYMBOLS + default n if ARCH_IMX8M default y help This enables use of symbols in VPL which refer to U-Boot phases, -- GitLab From e87da5704ffa6fc782d93d137fa30a37a5df3566 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Sat, 18 Jun 2022 15:13:13 +0300 Subject: [PATCH 380/581] armv8: u-boot-spl.lds: mark __image_copy_start as symbol In arch/arm/lib/sections.c there is below code: char __image_copy_start[0] __section(".__image_copy_start"); But actually 'objdump -t spl/u-boot-spl' not able to find out symbol '__image_copy_start' for binman update image-pos/size. So update link file Signed-off-by: Peng Fan Reviewed-by: Tom Rini Reviewed-by: Alper Nebi Yasak --- arch/arm/cpu/armv8/u-boot-spl.lds | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv8/u-boot-spl.lds b/arch/arm/cpu/armv8/u-boot-spl.lds index d02b788e608..7cb9d731246 100644 --- a/arch/arm/cpu/armv8/u-boot-spl.lds +++ b/arch/arm/cpu/armv8/u-boot-spl.lds @@ -23,7 +23,7 @@ SECTIONS { .text : { . = ALIGN(8); - *(.__image_copy_start) + __image_copy_start = .; CPUDIR/start.o (.text*) *(.text*) } >.sram -- GitLab From 474130944d6309f3a3651de48b56a3d92cb68149 Mon Sep 17 00:00:00 2001 From: Sergiu Moga Date: Fri, 13 May 2022 18:13:39 +0300 Subject: [PATCH 381/581] ARM: dts: sam9x60: fix compatible for qspi child node Change the compatible of the qspi child node to `jedec,spi-nor` so that it can be properly found when probing the bus. Signed-off-by: Sergiu Moga Reviewed-by: Tudor Ambarus --- arch/arm/dts/sam9x60ek.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/sam9x60ek.dts b/arch/arm/dts/sam9x60ek.dts index 32ffe93b4d9..4258e8e1abd 100644 --- a/arch/arm/dts/sam9x60ek.dts +++ b/arch/arm/dts/sam9x60ek.dts @@ -49,7 +49,7 @@ status = "okay"; nor_flash: sst26vf064@0 { - compatible = "spi-flash"; + compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <80000000>; spi-rx-bus-width = <4>; -- GitLab From 76873c6f6df1c81fca107bad7bf75990ad64586c Mon Sep 17 00:00:00 2001 From: Sergiu Moga Date: Fri, 13 May 2022 18:13:40 +0300 Subject: [PATCH 382/581] configs: at91: sam9x60ek: enable QSPI and SF command Add the configurations required for enabling QSPI and the SF command to allow changes to be made dynamically to serial flash devices from the command line interface. Signed-off-by: Sergiu Moga Reviewed-by: Tudor Ambarus --- configs/sam9x60ek_mmc_defconfig | 13 +++++++++++++ configs/sam9x60ek_nandflash_defconfig | 13 +++++++++++++ 2 files changed, 26 insertions(+) diff --git a/configs/sam9x60ek_mmc_defconfig b/configs/sam9x60ek_mmc_defconfig index 9c9166c16c9..718db00a11a 100644 --- a/configs/sam9x60ek_mmc_defconfig +++ b/configs/sam9x60ek_mmc_defconfig @@ -37,6 +37,7 @@ CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_SF_TEST=y CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y # CONFIG_CMD_SETEXPR is not set @@ -67,6 +68,8 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ATMEL=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_SF_DEFAULT_MODE=0x0 +CONFIG_SF_DEFAULT_SPEED=50000000 CONFIG_NAND_ATMEL=y CONFIG_ATMEL_NAND_HW_PMECC=y CONFIG_PMECC_CAP=8 @@ -88,3 +91,13 @@ CONFIG_W1_GPIO=y CONFIG_W1_EEPROM=y CONFIG_W1_EEPROM_DS24XXX=y CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_SPI_FLASH=y +CONFIG_DM_SPI_FLASH=y +CONFIG_ATMEL_QSPI=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_MTD=y diff --git a/configs/sam9x60ek_nandflash_defconfig b/configs/sam9x60ek_nandflash_defconfig index f07725de36c..00ce9df1a69 100644 --- a/configs/sam9x60ek_nandflash_defconfig +++ b/configs/sam9x60ek_nandflash_defconfig @@ -37,6 +37,7 @@ CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y +CONFIG_CMD_SF_TEST=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y @@ -73,6 +74,15 @@ CONFIG_ATMEL_NAND_HW_PMECC=y CONFIG_PMECC_CAP=8 CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_PHY_MICREL=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SF_DEFAULT_BUS=0 +CONFIG_SF_DEFAULT_SPEED=50000000 +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_DM_ETH=y CONFIG_MACB=y CONFIG_PINCTRL=y @@ -82,6 +92,9 @@ CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SYSRESET=y CONFIG_SYSRESET_AT91=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_ATMEL_QSPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_W1=y -- GitLab From 92099e69a2943dc24675041222cfd8d6a43db44f Mon Sep 17 00:00:00 2001 From: Sergiu Moga Date: Fri, 13 May 2022 18:13:41 +0300 Subject: [PATCH 383/581] configs: at91: sama5d2_icp: enable QSPI and SF command Add the configurations required for enabling QSPI and the SF command to allow changes to be made dynamically to serial flash devices from the command line interface. Signed-off-by: Sergiu Moga Reviewed-by: Tudor Ambarus --- configs/sama5d2_icp_mmc_defconfig | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig index 688fa00d23a..57b76c3a5e1 100644 --- a/configs/sama5d2_icp_mmc_defconfig +++ b/configs/sama5d2_icp_mmc_defconfig @@ -55,6 +55,7 @@ CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set +CONFIG_CMD_SF_TEST=y CONFIG_CMD_MMC=y CONFIG_CMD_DHCP=y CONFIG_BOOTP_BOOTFILESIZE=y @@ -83,6 +84,15 @@ CONFIG_SYS_I2C_AT91=y CONFIG_I2C_EEPROM=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ATMEL=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SF_DEFAULT_BUS=2 +CONFIG_SF_DEFAULT_SPEED=66000000 +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_DM_ETH=y CONFIG_MACB=y CONFIG_PINCTRL=y @@ -94,6 +104,9 @@ CONFIG_ATMEL_USART=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_AT91=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_ATMEL_QSPI=y CONFIG_TIMER=y CONFIG_SPL_TIMER=y CONFIG_ATMEL_TCB_TIMER=y -- GitLab From 1535f1d19ca494c05733e53e4a31cd8799748687 Mon Sep 17 00:00:00 2001 From: Eugen Hristev Date: Tue, 24 May 2022 13:00:54 +0300 Subject: [PATCH 384/581] dt-bindings: sound: add microchip,pdmc.h Include microchip,pdmc.h from Linux. This file includes required defines for DT successful build. Signed-off-by: Eugen Hristev --- include/dt-bindings/sound/microchip,pdmc.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) create mode 100644 include/dt-bindings/sound/microchip,pdmc.h diff --git a/include/dt-bindings/sound/microchip,pdmc.h b/include/dt-bindings/sound/microchip,pdmc.h new file mode 100644 index 00000000000..96cde94ce74 --- /dev/null +++ b/include/dt-bindings/sound/microchip,pdmc.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __DT_BINDINGS_MICROCHIP_PDMC_H__ +#define __DT_BINDINGS_MICROCHIP_PDMC_H__ + +/* PDM microphone's pin placement */ +#define MCHP_PDMC_DS0 0 +#define MCHP_PDMC_DS1 1 + +/* PDM microphone clock edge sampling */ +#define MCHP_PDMC_CLK_POSITIVE 0 +#define MCHP_PDMC_CLK_NEGATIVE 1 + +#endif /* __DT_BINDINGS_MICROCHIP_PDMC_H__ */ -- GitLab From d4d3c33393d006c2970b63eb0b4cb6eac4a231ef Mon Sep 17 00:00:00 2001 From: Eugen Hristev Date: Tue, 24 May 2022 13:01:44 +0300 Subject: [PATCH 385/581] ARM: dts: at91: sama7g5/sama7g5ek: sync with kernel at91 5.19 Sync with at91 maintainer tree for-5.19 branch. Signed-off-by: Eugen Hristev --- arch/arm/dts/at91-sama7g5ek.dts | 21 ++++++++++++++- arch/arm/dts/sama7g5.dtsi | 46 +++++++++++++++++++++++++-------- 2 files changed, 55 insertions(+), 12 deletions(-) diff --git a/arch/arm/dts/at91-sama7g5ek.dts b/arch/arm/dts/at91-sama7g5ek.dts index ee46112b08b..086ee45005f 100644 --- a/arch/arm/dts/at91-sama7g5ek.dts +++ b/arch/arm/dts/at91-sama7g5ek.dts @@ -14,6 +14,7 @@ #include #include #include +#include / { model = "Microchip SAMA7G5-EK"; @@ -468,7 +469,7 @@ &pinctrl_gmac1_mdio_default &pinctrl_gmac1_phy_irq>; phy-mode = "rmii"; - status = "okay"; + status = "okay"; /* Conflict with pdmc0. */ ethernet-phy@0 { reg = <0x0>; @@ -482,6 +483,17 @@ pinctrl-0 = <&pinctrl_i2s0_default>; }; +&pdmc0 { + #sound-dai-cells = <0>; + microchip,mic-pos = , /* MIC 1 */ + , /* MIC 2 */ + , /* MIC 3 */ + ; /* MIC 4 */ + status = "disabled"; /* Conflict with gmac1. */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pdmc0_default>; +}; + &pioA { pinctrl_can0_default: can0_default { @@ -651,6 +663,13 @@ bias-disable; }; + pinctrl_pdmc0_default: pdmc0_default { + pinmux = , + , + ; + bias_disable; + }; + pinctrl_qspi: qspi { pinmux = , , diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index 4efecdb92c7..97400dc18e7 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -33,6 +33,7 @@ reg = <0x0>; clocks = <&pmc PMC_TYPE_CORE 8>, <&pmc PMC_TYPE_CORE 22>, <&main_xtal>; clock-names = "cpu", "master", "xtal"; + operating-points-v2 = <&cpu_opp_table>; }; }; @@ -225,7 +226,7 @@ status = "disabled"; }; - rtt: rtt@e001d020 { + rtt: rtc@e001d020 { compatible = "microchip,sama7g5-rtt", "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt"; reg = <0xe001d020 0x30>; interrupts = ; @@ -490,6 +491,30 @@ status = "disabled"; }; + pdmc0: sound@e1608000 { + compatible = "microchip,sama7g5-pdmc"; + reg = <0xe1608000 0x1000>; + interrupts = ; + #sound-dai-cells = <0>; + dmas = <&dma0 AT91_XDMAC_DT_PERID(37)>; + dma-names = "rx"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 68>, <&pmc PMC_TYPE_GCK 68>; + clock-names = "pclk", "gclk"; + status = "disabled"; + }; + + pdmc1: sound@e160c000 { + compatible = "microchip,sama7g5-pdmc"; + reg = <0xe160c000 0x1000>; + interrupts = ; + #sound-dai-cells = <0>; + dmas = <&dma0 AT91_XDMAC_DT_PERID(38)>; + dma-names = "rx"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 69>, <&pmc PMC_TYPE_GCK 69>; + clock-names = "pclk", "gclk"; + status = "disabled"; + }; + spdifrx: spdifrx@e1614000 { #sound-dai-cells = <0>; compatible = "microchip,sama7g5-spdifrx"; @@ -628,9 +653,9 @@ #size-cells = <0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 39>; atmel,fifo-size = <32>; - dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>, - <&dma0 AT91_XDMAC_DT_PERID(8)>; - dma-names = "rx", "tx"; + dmas = <&dma0 AT91_XDMAC_DT_PERID(8)>, + <&dma0 AT91_XDMAC_DT_PERID(7)>; + dma-names = "tx", "rx"; status = "disabled"; }; }; @@ -814,9 +839,9 @@ #size-cells = <0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 46>; atmel,fifo-size = <32>; - dmas = <&dma0 AT91_XDMAC_DT_PERID(21)>, - <&dma0 AT91_XDMAC_DT_PERID(22)>; - dma-names = "rx", "tx"; + dmas = <&dma0 AT91_XDMAC_DT_PERID(22)>, + <&dma0 AT91_XDMAC_DT_PERID(21)>; + dma-names = "tx", "rx"; status = "disabled"; }; }; @@ -838,9 +863,9 @@ #size-cells = <0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 47>; atmel,fifo-size = <32>; - dmas = <&dma0 AT91_XDMAC_DT_PERID(23)>, - <&dma0 AT91_XDMAC_DT_PERID(24)>; - dma-names = "rx", "tx"; + dmas = <&dma0 AT91_XDMAC_DT_PERID(24)>, + <&dma0 AT91_XDMAC_DT_PERID(23)>; + dma-names = "tx", "rx"; status = "disabled"; }; }; @@ -885,7 +910,6 @@ #interrupt-cells = <3>; #address-cells = <0>; interrupt-controller; - interrupt-parent; reg = <0xe8c11000 0x1000>, <0xe8c12000 0x2000>; }; -- GitLab From 0d60a93053b20dfece6ed85fc2dc69e530c1c8d6 Mon Sep 17 00:00:00 2001 From: Eugen Hristev Date: Thu, 26 May 2022 17:04:54 +0300 Subject: [PATCH 386/581] ARM: dts: at91: replace microchip, 24aa02e48 with atmel, at24c02 microchip,24aa025e48 does not exist in the bindings of this driver. It can be replaced with atmel,at24c02 which is a standard compatible and the memory is compatible with this one, depending on the page size. microchip 24aa02e48 has a page size of 8, while 24aa025e48 has a page size of 16 bytes. Signed-off-by: Eugen Hristev Reviewed-by: Michael Walle Reviewed-by: Heiko Schocher --- arch/arm/dts/at91-sama5d2_icp.dts | 6 +++--- arch/arm/dts/at91-sama7g5ek.dts | 4 ++-- arch/arm/dts/sama5d27_som1.dtsi | 2 +- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/dts/at91-sama5d2_icp.dts b/arch/arm/dts/at91-sama5d2_icp.dts index 44522197ff6..0b0db1b2be8 100644 --- a/arch/arm/dts/at91-sama5d2_icp.dts +++ b/arch/arm/dts/at91-sama5d2_icp.dts @@ -68,19 +68,19 @@ status = "okay"; eeprom@50 { - compatible = "microchip,24aa02e48"; + compatible = "atmel,24c02"; /* EEPROM is 2Kbits microchip 24aa025e48, an at24c02 with page size of 16 */ reg = <0x50>; pagesize = <16>; }; eeprom@52 { - compatible = "microchip,24aa02e48"; + compatible = "atmel,24c02"; /* EEPROM is 2Kbits microchip 24aa025e48, an at24c02 with page size of 16 */ reg = <0x52>; pagesize = <16>; }; eeprom@53 { - compatible = "microchip,24aa02e48"; + compatible = "atmel,24c02"; /* EEPROM is 2Kbits microchip 24aa025e48, an at24c02 with page size of 16 */ reg = <0x53>; pagesize = <16>; }; diff --git a/arch/arm/dts/at91-sama7g5ek.dts b/arch/arm/dts/at91-sama7g5ek.dts index 086ee45005f..eaba0de3f7f 100644 --- a/arch/arm/dts/at91-sama7g5ek.dts +++ b/arch/arm/dts/at91-sama7g5ek.dts @@ -405,13 +405,13 @@ status = "okay"; eeprom@52 { - compatible = "microchip,24aa02e48"; + compatible = "atmel,24c02"; /* EEPROM is 2Kbits microchip 24aa025e48, an at24c02 with page size of 16 */ reg = <0x52>; pagesize = <16>; }; eeprom@53 { - compatible = "microchip,24aa02e48"; + compatible = "atmel,24c02"; /* EEPROM is 2Kbits microchip 24aa025e48, an at24c02 with page size of 16 */ reg = <0x53>; pagesize = <16>; }; diff --git a/arch/arm/dts/sama5d27_som1.dtsi b/arch/arm/dts/sama5d27_som1.dtsi index ea7540bcfcf..db4fefadcd6 100644 --- a/arch/arm/dts/sama5d27_som1.dtsi +++ b/arch/arm/dts/sama5d27_som1.dtsi @@ -92,7 +92,7 @@ status = "okay"; i2c_eeprom: i2c_eeprom@50 { - compatible = "microchip,24aa02e48"; + compatible = "atmel,24c02"; /* EEPROM is 2Kbits microchip 24aa02e48 */ reg = <0x50>; }; }; -- GitLab From 73a9616c211fd3c30d295ad526fbed04d5a17fa6 Mon Sep 17 00:00:00 2001 From: Eugen Hristev Date: Thu, 26 May 2022 17:04:55 +0300 Subject: [PATCH 387/581] misc: i2c_eeprom: remove 24aa02e48 This compatible does not exist in the bindings. All occurences in DT have been replaced by at24c02 which is equivalent. Fixes: 7264066707 ("misc: i2c_eeprom: Add compatible for 24AA02E48") Signed-off-by: Eugen Hristev Reviewed-by: Michael Walle Reviewed-by: Heiko Schocher --- drivers/misc/i2c_eeprom.c | 8 -------- 1 file changed, 8 deletions(-) diff --git a/drivers/misc/i2c_eeprom.c b/drivers/misc/i2c_eeprom.c index 4302e180acd..bdd7e018cc6 100644 --- a/drivers/misc/i2c_eeprom.c +++ b/drivers/misc/i2c_eeprom.c @@ -170,13 +170,6 @@ static const struct i2c_eeprom_drv_data eeprom_data = { .offset_len = 1, }; -static const struct i2c_eeprom_drv_data mc24aa02e48_data = { - .size = 256, - .pagesize = 8, - .addr_offset_mask = 0, - .offset_len = 1, -}; - static const struct i2c_eeprom_drv_data atmel24c01a_data = { .size = 128, .pagesize = 8, @@ -264,7 +257,6 @@ static const struct i2c_eeprom_drv_data atmel24c512_data = { static const struct udevice_id i2c_eeprom_std_ids[] = { { .compatible = "i2c-eeprom", (ulong)&eeprom_data }, - { .compatible = "microchip,24aa02e48", (ulong)&mc24aa02e48_data }, { .compatible = "atmel,24c01", (ulong)&atmel24c01a_data }, { .compatible = "atmel,24c01a", (ulong)&atmel24c01a_data }, { .compatible = "atmel,24c02", (ulong)&atmel24c02_data }, -- GitLab From 5ae89b3cfe842ecbb5153a95e2e3ac404abe543c Mon Sep 17 00:00:00 2001 From: Eugen Hristev Date: Thu, 26 May 2022 17:04:56 +0300 Subject: [PATCH 388/581] ARM: dts: at91: sam9x60ek: fix eeprom compatible The memory on this board is microchip 24aa025e48 which is compatible with at24c02 with a page size of 16. Fix the compatible accordingly. Reported-by: Sergiu Moga Signed-off-by: Eugen Hristev Tested-by: Sergiu Moga Reviewed-by: Heiko Schocher --- arch/arm/dts/sam9x60ek.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/sam9x60ek.dts b/arch/arm/dts/sam9x60ek.dts index 4258e8e1abd..54c694bd784 100644 --- a/arch/arm/dts/sam9x60ek.dts +++ b/arch/arm/dts/sam9x60ek.dts @@ -72,7 +72,7 @@ status = "okay"; eeprom@53 { - compatible = "atmel,24c32"; + compatible = "atmel,24c02"; /* EEPROM is 2Kbits microchip 24aa025e48, an at24c02 with page size of 16 */ reg = <0x53>; pagesize = <16>; }; -- GitLab From 38200202997289c39454187da8f07c97eac70833 Mon Sep 17 00:00:00 2001 From: Eugen Hristev Date: Wed, 8 Jun 2022 17:49:29 +0300 Subject: [PATCH 389/581] board: atmel: remove calls to debug_uart_init Since 0dba45864b ("arm: Init the debug UART") , the debug_uart_init is now called from crt.S It's no longer required to call it from the board file. With the current code, the banned is printed twice: U-Boot 2022.07-rc4-00089-gee3d158fa8 (Jun 08 2022 - 17:39:29 +0300) Remove all calls from board_early_init_f . Suggested-by: Balamanikandan Gunasundar Signed-off-by: Eugen Hristev --- board/atmel/at91sam9260ek/at91sam9260ek.c | 3 --- board/atmel/at91sam9261ek/at91sam9261ek.c | 3 --- board/atmel/at91sam9263ek/at91sam9263ek.c | 3 --- board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c | 3 --- board/atmel/at91sam9n12ek/at91sam9n12ek.c | 3 --- board/atmel/at91sam9rlek/at91sam9rlek.c | 3 --- board/atmel/at91sam9x5ek/at91sam9x5ek.c | 3 --- board/atmel/sam9x60_curiosity/sam9x60_curiosity.c | 3 --- board/atmel/sam9x60ek/sam9x60ek.c | 3 --- board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c | 4 ---- board/atmel/sama5d27_wlsom1_ek/sama5d27_wlsom1_ek.c | 4 ---- board/atmel/sama5d2_icp/sama5d2_icp.c | 3 --- board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c | 3 --- board/atmel/sama5d2_xplained/sama5d2_xplained.c | 4 ---- board/atmel/sama5d3_xplained/sama5d3_xplained.c | 3 --- board/atmel/sama5d3xek/sama5d3xek.c | 3 --- board/atmel/sama5d4_xplained/sama5d4_xplained.c | 3 --- board/atmel/sama5d4ek/sama5d4ek.c | 3 --- board/atmel/sama7g5ek/sama7g5ek.c | 3 --- 19 files changed, 60 deletions(-) diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c b/board/atmel/at91sam9260ek/at91sam9260ek.c index 38f97bce204..a9ea9b558a9 100644 --- a/board/atmel/at91sam9260ek/at91sam9260ek.c +++ b/board/atmel/at91sam9260ek/at91sam9260ek.c @@ -74,9 +74,6 @@ void board_debug_uart_init(void) #ifdef CONFIG_BOARD_EARLY_INIT_F int board_early_init_f(void) { -#ifdef CONFIG_DEBUG_UART - debug_uart_init(); -#endif return 0; } #endif diff --git a/board/atmel/at91sam9261ek/at91sam9261ek.c b/board/atmel/at91sam9261ek/at91sam9261ek.c index 0318eeaa94e..8a7a960c26b 100644 --- a/board/atmel/at91sam9261ek/at91sam9261ek.c +++ b/board/atmel/at91sam9261ek/at91sam9261ek.c @@ -234,9 +234,6 @@ void board_debug_uart_init(void) #ifdef CONFIG_BOARD_EARLY_INIT_F int board_early_init_f(void) { -#ifdef CONFIG_DEBUG_UART - debug_uart_init(); -#endif return 0; } #endif diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c b/board/atmel/at91sam9263ek/at91sam9263ek.c index 3218e14e860..c3e1734dda0 100644 --- a/board/atmel/at91sam9263ek/at91sam9263ek.c +++ b/board/atmel/at91sam9263ek/at91sam9263ek.c @@ -192,9 +192,6 @@ void board_debug_uart_init(void) #ifdef CONFIG_BOARD_EARLY_INIT_F int board_early_init_f(void) { -#ifdef CONFIG_DEBUG_UART - debug_uart_init(); -#endif return 0; } #endif diff --git a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c index fcca8923e38..347197a6067 100644 --- a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c +++ b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c @@ -258,9 +258,6 @@ void board_debug_uart_init(void) #ifdef CONFIG_BOARD_EARLY_INIT_F int board_early_init_f(void) { -#ifdef CONFIG_DEBUG_UART - debug_uart_init(); -#endif return 0; } #endif diff --git a/board/atmel/at91sam9n12ek/at91sam9n12ek.c b/board/atmel/at91sam9n12ek/at91sam9n12ek.c index a3fc55bbc34..018fed9cc2a 100644 --- a/board/atmel/at91sam9n12ek/at91sam9n12ek.c +++ b/board/atmel/at91sam9n12ek/at91sam9n12ek.c @@ -176,9 +176,6 @@ void board_debug_uart_init(void) #ifdef CONFIG_BOARD_EARLY_INIT_F int board_early_init_f(void) { -#ifdef CONFIG_DEBUG_UART - debug_uart_init(); -#endif return 0; } #endif diff --git a/board/atmel/at91sam9rlek/at91sam9rlek.c b/board/atmel/at91sam9rlek/at91sam9rlek.c index f427ee658bf..af59620d0c0 100644 --- a/board/atmel/at91sam9rlek/at91sam9rlek.c +++ b/board/atmel/at91sam9rlek/at91sam9rlek.c @@ -169,9 +169,6 @@ void board_debug_uart_init(void) #ifdef CONFIG_BOARD_EARLY_INIT_F int board_early_init_f(void) { -#ifdef CONFIG_DEBUG_UART - debug_uart_init(); -#endif return 0; } #endif diff --git a/board/atmel/at91sam9x5ek/at91sam9x5ek.c b/board/atmel/at91sam9x5ek/at91sam9x5ek.c index e0abe4aeb08..8192824c59c 100644 --- a/board/atmel/at91sam9x5ek/at91sam9x5ek.c +++ b/board/atmel/at91sam9x5ek/at91sam9x5ek.c @@ -105,9 +105,6 @@ void board_debug_uart_init(void) #ifdef CONFIG_BOARD_EARLY_INIT_F int board_early_init_f(void) { -#ifdef CONFIG_DEBUG_UART - debug_uart_init(); -#endif return 0; } #endif diff --git a/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c b/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c index 00de2778125..d8f32c93b55 100644 --- a/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c +++ b/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c @@ -39,9 +39,6 @@ void board_debug_uart_init(void) int board_early_init_f(void) { -#ifdef CONFIG_DEBUG_UART - debug_uart_init(); -#endif return 0; } diff --git a/board/atmel/sam9x60ek/sam9x60ek.c b/board/atmel/sam9x60ek/sam9x60ek.c index 32e5a2bf23a..7035fab8788 100644 --- a/board/atmel/sam9x60ek/sam9x60ek.c +++ b/board/atmel/sam9x60ek/sam9x60ek.c @@ -101,9 +101,6 @@ void board_debug_uart_init(void) #ifdef CONFIG_BOARD_EARLY_INIT_F int board_early_init_f(void) { -#ifdef CONFIG_DEBUG_UART - debug_uart_init(); -#endif return 0; } #endif diff --git a/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c b/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c index b69f1c8cfae..65d0a7532ea 100644 --- a/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c +++ b/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c @@ -65,10 +65,6 @@ void board_debug_uart_init(void) #ifdef CONFIG_BOARD_EARLY_INIT_F int board_early_init_f(void) { -#ifdef CONFIG_DEBUG_UART - debug_uart_init(); -#endif - return 0; } #endif diff --git a/board/atmel/sama5d27_wlsom1_ek/sama5d27_wlsom1_ek.c b/board/atmel/sama5d27_wlsom1_ek/sama5d27_wlsom1_ek.c index 67ada27072d..c38585c6fe7 100644 --- a/board/atmel/sama5d27_wlsom1_ek/sama5d27_wlsom1_ek.c +++ b/board/atmel/sama5d27_wlsom1_ek/sama5d27_wlsom1_ek.c @@ -58,10 +58,6 @@ void board_debug_uart_init(void) #ifdef CONFIG_BOARD_EARLY_INIT_F int board_early_init_f(void) { -#ifdef CONFIG_DEBUG_UART - debug_uart_init(); -#endif - return 0; } #endif diff --git a/board/atmel/sama5d2_icp/sama5d2_icp.c b/board/atmel/sama5d2_icp/sama5d2_icp.c index da697a7b0fe..02077700282 100644 --- a/board/atmel/sama5d2_icp/sama5d2_icp.c +++ b/board/atmel/sama5d2_icp/sama5d2_icp.c @@ -48,9 +48,6 @@ void board_debug_uart_init(void) int board_early_init_f(void) { -#ifdef CONFIG_DEBUG_UART - debug_uart_init(); -#endif return 0; } diff --git a/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c b/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c index cca5bd1d8aa..16e9183f541 100644 --- a/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c +++ b/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c @@ -108,9 +108,6 @@ void board_debug_uart_init(void) #ifdef CONFIG_BOARD_EARLY_INIT_F int board_early_init_f(void) { -#ifdef CONFIG_DEBUG_UART - debug_uart_init(); -#endif return 0; } #endif diff --git a/board/atmel/sama5d2_xplained/sama5d2_xplained.c b/board/atmel/sama5d2_xplained/sama5d2_xplained.c index 4bbb05c2fbf..9e0f9c3b7e3 100644 --- a/board/atmel/sama5d2_xplained/sama5d2_xplained.c +++ b/board/atmel/sama5d2_xplained/sama5d2_xplained.c @@ -64,10 +64,6 @@ void board_debug_uart_init(void) #ifdef CONFIG_BOARD_EARLY_INIT_F int board_early_init_f(void) { -#ifdef CONFIG_DEBUG_UART - debug_uart_init(); -#endif - return 0; } #endif diff --git a/board/atmel/sama5d3_xplained/sama5d3_xplained.c b/board/atmel/sama5d3_xplained/sama5d3_xplained.c index c25bf42e0af..a778f2694df 100644 --- a/board/atmel/sama5d3_xplained/sama5d3_xplained.c +++ b/board/atmel/sama5d3_xplained/sama5d3_xplained.c @@ -87,9 +87,6 @@ int board_late_init(void) #ifdef CONFIG_BOARD_EARLY_INIT_F int board_early_init_f(void) { -#ifdef CONFIG_DEBUG_UART - debug_uart_init(); -#endif return 0; } #endif diff --git a/board/atmel/sama5d3xek/sama5d3xek.c b/board/atmel/sama5d3xek/sama5d3xek.c index b6f8dcd91dc..132e7fad1ef 100644 --- a/board/atmel/sama5d3xek/sama5d3xek.c +++ b/board/atmel/sama5d3xek/sama5d3xek.c @@ -140,9 +140,6 @@ void board_debug_uart_init(void) #ifdef CONFIG_BOARD_EARLY_INIT_F int board_early_init_f(void) { -#ifdef CONFIG_DEBUG_UART - debug_uart_init(); -#endif return 0; } #endif diff --git a/board/atmel/sama5d4_xplained/sama5d4_xplained.c b/board/atmel/sama5d4_xplained/sama5d4_xplained.c index 2088b48b7ee..9fb7e6f308d 100644 --- a/board/atmel/sama5d4_xplained/sama5d4_xplained.c +++ b/board/atmel/sama5d4_xplained/sama5d4_xplained.c @@ -102,9 +102,6 @@ void board_debug_uart_init(void) #ifdef CONFIG_BOARD_EARLY_INIT_F int board_early_init_f(void) { -#ifdef CONFIG_DEBUG_UART - debug_uart_init(); -#endif return 0; } #endif diff --git a/board/atmel/sama5d4ek/sama5d4ek.c b/board/atmel/sama5d4ek/sama5d4ek.c index 46ec1eb3246..ba385333433 100644 --- a/board/atmel/sama5d4ek/sama5d4ek.c +++ b/board/atmel/sama5d4ek/sama5d4ek.c @@ -100,9 +100,6 @@ void board_debug_uart_init(void) #ifdef CONFIG_BOARD_EARLY_INIT_F int board_early_init_f(void) { -#ifdef CONFIG_DEBUG_UART - debug_uart_init(); -#endif return 0; } #endif diff --git a/board/atmel/sama7g5ek/sama7g5ek.c b/board/atmel/sama7g5ek/sama7g5ek.c index ae18ed05e05..7d83e76f9ac 100644 --- a/board/atmel/sama7g5ek/sama7g5ek.c +++ b/board/atmel/sama7g5ek/sama7g5ek.c @@ -48,9 +48,6 @@ void board_debug_uart_init(void) int board_early_init_f(void) { -#if (IS_ENABLED(CONFIG_DEBUG_UART)) - debug_uart_init(); -#endif return 0; } -- GitLab From c0f47562162f7f6ede331514ff2b59bff204a448 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Thu, 16 Jun 2022 14:19:44 +0200 Subject: [PATCH 390/581] powerpc: mpc85xx: Set TEXT_BASE addresses to real base values MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Currently CONFIG_SPL_TEXT_BASE and CONFIG_SYS_TEXT_BASE addresses are manually increased by 0x1000 due to .bootpg section. This section has size of 0x1000 bytes and is manually put by linker script before .text section (and therefore before base address) when CONFIG_SYS_MPC85XX_NO_RESETVEC is set. Due to this fact lot of other config options are manually increased by 0x1000 value to make correct layout. Note that entry point is not on CONFIG_SPL_TEXT_BASE (image+0x1000) but it is really on address CONFIG_SPL_TEXT_BASE-0x1000 (means at the start of the image). Cleanup handling of .bootpg section when CONFIG_SYS_MPC85XX_NO_RESETVEC is set. Put .bootpg code directly into .text section and move text base address to the start of .bootpg code. And finally remove +0x1000 value from lot of config options. With this removal custom PHDRS is not used anymore, so remove it too. After this change entry point would be at CONFIG_SPL_TEXT_BASE and not at address -0x1000 anymore. Tested on P2020 board with SPL and proper U-Boot. Signed-off-by: Pali Rohár --- arch/powerpc/cpu/mpc85xx/start.S | 4 ++-- arch/powerpc/cpu/mpc85xx/u-boot-spl.lds | 15 +++--------- arch/powerpc/cpu/mpc85xx/u-boot.lds | 24 ++++++-------------- configs/P1010RDB-PA_36BIT_NAND_defconfig | 8 +++---- configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 6 ++--- configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 6 ++--- configs/P1010RDB-PA_NAND_defconfig | 8 +++---- configs/P1010RDB-PA_SDCARD_defconfig | 6 ++--- configs/P1010RDB-PA_SPIFLASH_defconfig | 6 ++--- configs/P1010RDB-PB_36BIT_NAND_defconfig | 8 +++---- configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 6 ++--- configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 6 ++--- configs/P1010RDB-PB_NAND_defconfig | 8 +++---- configs/P1010RDB-PB_SDCARD_defconfig | 6 ++--- configs/P1010RDB-PB_SPIFLASH_defconfig | 6 ++--- configs/P1020RDB-PC_36BIT_NAND_defconfig | 8 +++---- configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 6 ++--- configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 6 ++--- configs/P1020RDB-PC_NAND_defconfig | 8 +++---- configs/P1020RDB-PC_SDCARD_defconfig | 6 ++--- configs/P1020RDB-PC_SPIFLASH_defconfig | 6 ++--- configs/P1020RDB-PD_NAND_defconfig | 8 +++---- configs/P1020RDB-PD_SDCARD_defconfig | 6 ++--- configs/P1020RDB-PD_SPIFLASH_defconfig | 6 ++--- configs/P2020RDB-PC_36BIT_NAND_defconfig | 8 +++---- configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 6 ++--- configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 6 ++--- configs/P2020RDB-PC_NAND_defconfig | 8 +++---- configs/P2020RDB-PC_SDCARD_defconfig | 6 ++--- configs/P2020RDB-PC_SPIFLASH_defconfig | 6 ++--- configs/T1024RDB_NAND_defconfig | 2 +- configs/T1024RDB_SDCARD_defconfig | 2 +- configs/T1024RDB_SPIFLASH_defconfig | 2 +- configs/T1042D4RDB_NAND_defconfig | 2 +- configs/T1042D4RDB_SDCARD_defconfig | 2 +- configs/T1042D4RDB_SPIFLASH_defconfig | 2 +- configs/T2080QDS_NAND_defconfig | 2 +- configs/T2080QDS_SDCARD_defconfig | 2 +- configs/T2080QDS_SPIFLASH_defconfig | 2 +- configs/T2080RDB_NAND_defconfig | 2 +- configs/T2080RDB_SDCARD_defconfig | 2 +- configs/T2080RDB_SPIFLASH_defconfig | 2 +- configs/T2080RDB_revD_NAND_defconfig | 2 +- configs/T2080RDB_revD_SDCARD_defconfig | 2 +- configs/T2080RDB_revD_SPIFLASH_defconfig | 2 +- configs/T4240RDB_SDCARD_defconfig | 2 +- configs/qemu-ppce500_defconfig | 4 ++-- 47 files changed, 120 insertions(+), 139 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 9a28269020d..5009cbef54a 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -1128,7 +1128,7 @@ switch_as: /*--------------------------------------------------------------*/ lis r3,CONFIG_VAL(SYS_MONITOR_BASE)@h ori r3,r3,CONFIG_VAL(SYS_MONITOR_BASE)@l - addi r3,r3,_start_cont - _start_cont + addi r3,r3,_start_cont - CONFIG_VAL(SYS_MONITOR_BASE) mtlr r3 blr #endif @@ -1600,7 +1600,7 @@ relocate_code: * initialization, now running from RAM. */ - addi r0,r10,in_ram - _start_cont + addi r0,r10,in_ram - CONFIG_VAL(SYS_MONITOR_BASE) /* * As IVPR is going to point RAM address, diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds index 06a70ff2af9..b8e08880bdd 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds @@ -9,24 +9,15 @@ #include "config.h" OUTPUT_ARCH(powerpc) -#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC -PHDRS -{ - text PT_LOAD; - bss PT_LOAD; -} -#endif + SECTIONS { + . = IMAGE_TEXT_BASE; + .text : { /* For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec */ #ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC - .bootpg IMAGE_TEXT_BASE - 0x1000 : - { KEEP(*(.bootpg)) - } :text = 0xffff #endif - . = IMAGE_TEXT_BASE; - .text : { *(.text*) } _etext = .; diff --git a/arch/powerpc/cpu/mpc85xx/u-boot.lds b/arch/powerpc/cpu/mpc85xx/u-boot.lds index 8bbe319b3e7..4e137e006f6 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot.lds @@ -14,32 +14,22 @@ OUTPUT_ARCH(powerpc) ENTRY(_start) -PHDRS -{ - text PT_LOAD; - bss PT_LOAD; -} - SECTIONS { /* Read-only sections, merged into text segment: */ -#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC - .bootpg CONFIG_SYS_TEXT_BASE - 0x1000 : + .text : { +#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg)) - } :text = 0xffff - . = CONFIG_SYS_TEXT_BASE; #endif - .text : - { *(.text*) - } :text + } _etext = .; PROVIDE (etext = .); .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } :text + } /* Read-write section, merged into data segment: */ . = (. + 0x00FF) & 0xFFFFFF00; @@ -88,12 +78,12 @@ SECTIONS .bootpg RESET_VECTOR_ADDRESS - 0xffc : { arch/powerpc/cpu/mpc85xx/start.o (.bootpg) - } :text = 0xffff + } = 0xffff .resetvec RESET_VECTOR_ADDRESS : { KEEP(*(.resetvec)) - } :text = 0xffff + } = 0xffff . = RESET_VECTOR_ADDRESS + 0x4; @@ -115,7 +105,7 @@ SECTIONS *(.sbss*) *(.bss*) *(COMMON) - } :bss + } . = ALIGN(4); __bss_end = . ; diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index cec563e0f92..f891ae1cb0b 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -1,12 +1,12 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL=y -CONFIG_TPL_TEXT_BASE=0xD0001000 +CONFIG_TPL_TEXT_BASE=0xD0000000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_TPL_SERIAL=y @@ -19,7 +19,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_TPL_SYS_MONITOR_BASE=0xD0001000 +CONFIG_TPL_SYS_MONITOR_BASE=0xD0000000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" @@ -35,7 +35,7 @@ CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_RELOC_TEXT_BASE=0xd003d000 CONFIG_SPL_RELOC_STACK=0xd003fff0 CONFIG_TPL_GD_ADDR=0xd002c000 -CONFIG_TPL_RELOC_TEXT_BASE=0xd0001000 +CONFIG_TPL_RELOC_TEXT_BASE=0xd0000000 CONFIG_TPL_RELOC_STACK=0xd0030000 CONFIG_TPL_RELOC_MALLOC=y CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000 diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index 8dd667ff482..b46d62c82f4 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -1,12 +1,12 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b" -CONFIG_SPL_TEXT_BASE=0xD0001000 +CONFIG_SPL_TEXT_BASE=0xD0000000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -30,7 +30,7 @@ CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_GD_ADDR=0xd0018000 -CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000 +CONFIG_SPL_RELOC_TEXT_BASE=0xd0000000 CONFIG_SPL_RELOC_STACK=0xd001c000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000 diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index 16bb174e988..feffcd1b1eb 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y @@ -7,7 +7,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b" -CONFIG_SPL_TEXT_BASE=0xD0001000 +CONFIG_SPL_TEXT_BASE=0xD0000000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y @@ -33,7 +33,7 @@ CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_GD_ADDR=0xd0018000 -CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000 +CONFIG_SPL_RELOC_TEXT_BASE=0xd0000000 CONFIG_SPL_RELOC_STACK=0xd001c000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000 diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index 15c7e993b97..6dd81bb7d02 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -1,12 +1,12 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL=y -CONFIG_TPL_TEXT_BASE=0xD0001000 +CONFIG_TPL_TEXT_BASE=0xD0000000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_TPL_SERIAL=y @@ -18,7 +18,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_TPL_SYS_MONITOR_BASE=0xD0001000 +CONFIG_TPL_SYS_MONITOR_BASE=0xD0000000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" @@ -34,7 +34,7 @@ CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_RELOC_TEXT_BASE=0xd003d000 CONFIG_SPL_RELOC_STACK=0xd003fff0 CONFIG_TPL_GD_ADDR=0xd002c000 -CONFIG_TPL_RELOC_TEXT_BASE=0xd0001000 +CONFIG_TPL_RELOC_TEXT_BASE=0xd0000000 CONFIG_TPL_RELOC_STACK=0xd0030000 CONFIG_TPL_RELOC_MALLOC=y CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000 diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index e0d967f8cc1..6dcd2b9d110 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -1,12 +1,12 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa" -CONFIG_SPL_TEXT_BASE=0xD0001000 +CONFIG_SPL_TEXT_BASE=0xD0000000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -29,7 +29,7 @@ CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_GD_ADDR=0xd0018000 -CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000 +CONFIG_SPL_RELOC_TEXT_BASE=0xd0000000 CONFIG_SPL_RELOC_STACK=0xd001c000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000 diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index 92587aa03b6..d902f045c30 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y @@ -7,7 +7,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa" -CONFIG_SPL_TEXT_BASE=0xD0001000 +CONFIG_SPL_TEXT_BASE=0xD0000000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y @@ -32,7 +32,7 @@ CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_GD_ADDR=0xd0018000 -CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000 +CONFIG_SPL_RELOC_TEXT_BASE=0xd0000000 CONFIG_SPL_RELOC_STACK=0xd001c000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000 diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 8e0c4ed3589..16a1b2fc6a5 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -1,12 +1,12 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL=y -CONFIG_TPL_TEXT_BASE=0xD0001000 +CONFIG_TPL_TEXT_BASE=0xD0000000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_TPL_SERIAL=y @@ -19,7 +19,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_TPL_SYS_MONITOR_BASE=0xD0001000 +CONFIG_TPL_SYS_MONITOR_BASE=0xD0000000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" @@ -36,7 +36,7 @@ CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_RELOC_TEXT_BASE=0xd003d000 CONFIG_SPL_RELOC_STACK=0xd003fff0 CONFIG_TPL_GD_ADDR=0xd002c000 -CONFIG_TPL_RELOC_TEXT_BASE=0xd0001000 +CONFIG_TPL_RELOC_TEXT_BASE=0xd0000000 CONFIG_TPL_RELOC_STACK=0xd0030000 CONFIG_TPL_RELOC_MALLOC=y CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000 diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 0b99fb33ed8..7e44655646e 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -1,12 +1,12 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b" -CONFIG_SPL_TEXT_BASE=0xD0001000 +CONFIG_SPL_TEXT_BASE=0xD0000000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -31,7 +31,7 @@ CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_GD_ADDR=0xd0018000 -CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000 +CONFIG_SPL_RELOC_TEXT_BASE=0xd0000000 CONFIG_SPL_RELOC_STACK=0xd001c000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000 diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index 8a6c44d4898..39feff2f483 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y @@ -7,7 +7,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b" -CONFIG_SPL_TEXT_BASE=0xD0001000 +CONFIG_SPL_TEXT_BASE=0xD0000000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y @@ -34,7 +34,7 @@ CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_GD_ADDR=0xd0018000 -CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000 +CONFIG_SPL_RELOC_TEXT_BASE=0xd0000000 CONFIG_SPL_RELOC_STACK=0xd001c000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000 diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 6b249dc7eea..2fd649a9cf5 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -1,12 +1,12 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL=y -CONFIG_TPL_TEXT_BASE=0xD0001000 +CONFIG_TPL_TEXT_BASE=0xD0000000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_TPL_SERIAL=y @@ -18,7 +18,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_TPL_SYS_MONITOR_BASE=0xD0001000 +CONFIG_TPL_SYS_MONITOR_BASE=0xD0000000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" @@ -35,7 +35,7 @@ CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_RELOC_TEXT_BASE=0xd003d000 CONFIG_SPL_RELOC_STACK=0xd003fff0 CONFIG_TPL_GD_ADDR=0xd002c000 -CONFIG_TPL_RELOC_TEXT_BASE=0xd0001000 +CONFIG_TPL_RELOC_TEXT_BASE=0xd0000000 CONFIG_TPL_RELOC_STACK=0xd0030000 CONFIG_TPL_RELOC_MALLOC=y CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000 diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index 7b9aec18829..127a7f09257 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -1,12 +1,12 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb" -CONFIG_SPL_TEXT_BASE=0xD0001000 +CONFIG_SPL_TEXT_BASE=0xD0000000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -30,7 +30,7 @@ CONFIG_SPL_MMC_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_GD_ADDR=0xd0018000 -CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000 +CONFIG_SPL_RELOC_TEXT_BASE=0xd0000000 CONFIG_SPL_RELOC_STACK=0xd001c000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000 diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 13c836d1060..8256475b68a 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y @@ -7,7 +7,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb" -CONFIG_SPL_TEXT_BASE=0xD0001000 +CONFIG_SPL_TEXT_BASE=0xD0000000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y @@ -33,7 +33,7 @@ CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_GD_ADDR=0xd0018000 -CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000 +CONFIG_SPL_RELOC_TEXT_BASE=0xd0000000 CONFIG_SPL_RELOC_STACK=0xd001c000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000 diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 18d9da85357..9bc202cf71e 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -1,12 +1,12 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL=y -CONFIG_TPL_TEXT_BASE=0xF8F81000 +CONFIG_TPL_TEXT_BASE=0xF8F80000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_TPL_SERIAL=y @@ -20,7 +20,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_TPL_SYS_MONITOR_BASE=0xF8F81000 +CONFIG_TPL_SYS_MONITOR_BASE=0xF8F80000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" @@ -36,7 +36,7 @@ CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_RELOC_TEXT_BASE=0xf8fbe000 CONFIG_SPL_RELOC_STACK=0xf8fbfff0 CONFIG_TPL_GD_ADDR=0xf8fac000 -CONFIG_TPL_RELOC_TEXT_BASE=0xf8f81000 +CONFIG_TPL_RELOC_TEXT_BASE=0xf8f80000 CONFIG_TPL_RELOC_STACK=0xf8fb0000 CONFIG_TPL_RELOC_MALLOC=y CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000 diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index b88ca9404d8..534df01b8be 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -1,12 +1,12 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b" -CONFIG_SPL_TEXT_BASE=0xf8f81000 +CONFIG_SPL_TEXT_BASE=0xf8f80000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y @@ -19,7 +19,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000 +CONFIG_SPL_SYS_MONITOR_BASE=0xF8F80000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index 10fecbbbf14..6fcbce4d678 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y @@ -7,7 +7,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b" -CONFIG_SPL_TEXT_BASE=0xf8f81000 +CONFIG_SPL_TEXT_BASE=0xf8f80000 CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -21,7 +21,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000 +CONFIG_SPL_SYS_MONITOR_BASE=0xF8F80000 CONFIG_SPIFLASH=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 25d5a5b25c9..c26ea8e425c 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -1,12 +1,12 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL=y -CONFIG_TPL_TEXT_BASE=0xF8F81000 +CONFIG_TPL_TEXT_BASE=0xF8F80000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_TPL_SERIAL=y @@ -19,7 +19,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_TPL_SYS_MONITOR_BASE=0xF8F81000 +CONFIG_TPL_SYS_MONITOR_BASE=0xF8F80000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" @@ -35,7 +35,7 @@ CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_RELOC_TEXT_BASE=0xf8fbe000 CONFIG_SPL_RELOC_STACK=0xf8fbfff0 CONFIG_TPL_GD_ADDR=0xf8fac000 -CONFIG_TPL_RELOC_TEXT_BASE=0xf8f81000 +CONFIG_TPL_RELOC_TEXT_BASE=0xf8f80000 CONFIG_TPL_RELOC_STACK=0xf8fb0000 CONFIG_TPL_RELOC_MALLOC=y CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000 diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index ca71a909049..8930298f4f8 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -1,12 +1,12 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc" -CONFIG_SPL_TEXT_BASE=0xf8f81000 +CONFIG_SPL_TEXT_BASE=0xf8f80000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y @@ -18,7 +18,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000 +CONFIG_SPL_SYS_MONITOR_BASE=0xF8F80000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 71994c4b7de..5da77d164ba 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y @@ -7,7 +7,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc" -CONFIG_SPL_TEXT_BASE=0xf8f81000 +CONFIG_SPL_TEXT_BASE=0xf8f80000 CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -20,7 +20,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000 +CONFIG_SPL_SYS_MONITOR_BASE=0xF8F80000 CONFIG_SPIFLASH=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index 1c5bb4d5e05..493cc5246a7 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -1,12 +1,12 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL=y -CONFIG_TPL_TEXT_BASE=0xF8F81000 +CONFIG_TPL_TEXT_BASE=0xF8F80000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_TPL_SERIAL=y @@ -19,7 +19,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_TPL_SYS_MONITOR_BASE=0xF8F81000 +CONFIG_TPL_SYS_MONITOR_BASE=0xF8F80000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" @@ -35,7 +35,7 @@ CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_RELOC_TEXT_BASE=0xf8fbe000 CONFIG_SPL_RELOC_STACK=0xf8fbfff0 CONFIG_TPL_GD_ADDR=0xf8fac000 -CONFIG_TPL_RELOC_TEXT_BASE=0xf8f81000 +CONFIG_TPL_RELOC_TEXT_BASE=0xf8f80000 CONFIG_TPL_RELOC_STACK=0xf8fb0000 CONFIG_TPL_RELOC_MALLOC=y CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000 diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index 3b86e8ff435..34fe830debc 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -1,12 +1,12 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd" -CONFIG_SPL_TEXT_BASE=0xf8f81000 +CONFIG_SPL_TEXT_BASE=0xf8f80000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y @@ -18,7 +18,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000 +CONFIG_SPL_SYS_MONITOR_BASE=0xF8F80000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index b8a46f379fc..caafe043bca 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y @@ -7,7 +7,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd" -CONFIG_SPL_TEXT_BASE=0xf8f81000 +CONFIG_SPL_TEXT_BASE=0xf8f80000 CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -20,7 +20,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000 +CONFIG_SPL_SYS_MONITOR_BASE=0xF8F80000 CONFIG_SPIFLASH=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index bb12b477d38..487483aea6a 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -1,12 +1,12 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL=y -CONFIG_TPL_TEXT_BASE=0xF8F81000 +CONFIG_TPL_TEXT_BASE=0xF8F80000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_TPL_SERIAL=y @@ -20,7 +20,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_TPL_SYS_MONITOR_BASE=0xF8F81000 +CONFIG_TPL_SYS_MONITOR_BASE=0xF8F80000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" @@ -36,7 +36,7 @@ CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_RELOC_TEXT_BASE=0xf8ffe000 CONFIG_SPL_RELOC_STACK=0xf8fffff0 CONFIG_TPL_GD_ADDR=0xf8fac000 -CONFIG_TPL_RELOC_TEXT_BASE=0xf8f81000 +CONFIG_TPL_RELOC_TEXT_BASE=0xf8f80000 CONFIG_TPL_RELOC_STACK=0xf8fb0000 CONFIG_TPL_RELOC_MALLOC=y CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000 diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 7a60b990fcb..229d9feb468 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -1,12 +1,12 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b" -CONFIG_SPL_TEXT_BASE=0xf8f81000 +CONFIG_SPL_TEXT_BASE=0xf8f80000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y @@ -19,7 +19,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000 +CONFIG_SPL_SYS_MONITOR_BASE=0xF8F80000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 9ae632b7cb1..69a45537c78 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y @@ -7,7 +7,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b" -CONFIG_SPL_TEXT_BASE=0xf8f81000 +CONFIG_SPL_TEXT_BASE=0xf8f80000 CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -21,7 +21,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000 +CONFIG_SPL_SYS_MONITOR_BASE=0xF8F80000 CONFIG_SPIFLASH=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index b341a2aed62..62461f9bf2d 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -1,12 +1,12 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL=y -CONFIG_TPL_TEXT_BASE=0xF8F81000 +CONFIG_TPL_TEXT_BASE=0xF8F80000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_TPL_SERIAL=y @@ -19,7 +19,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_TPL_SYS_MONITOR_BASE=0xF8F81000 +CONFIG_TPL_SYS_MONITOR_BASE=0xF8F80000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" @@ -35,7 +35,7 @@ CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_RELOC_TEXT_BASE=0xf8ffe000 CONFIG_SPL_RELOC_STACK=0xf8fffff0 CONFIG_TPL_GD_ADDR=0xf8fac000 -CONFIG_TPL_RELOC_TEXT_BASE=0xf8f81000 +CONFIG_TPL_RELOC_TEXT_BASE=0xf8f80000 CONFIG_TPL_RELOC_STACK=0xf8fb0000 CONFIG_TPL_RELOC_MALLOC=y CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000 diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 1727584636c..55d831c6bb1 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -1,12 +1,12 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc" -CONFIG_SPL_TEXT_BASE=0xf8f81000 +CONFIG_SPL_TEXT_BASE=0xf8f80000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y @@ -18,7 +18,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000 +CONFIG_SPL_SYS_MONITOR_BASE=0xF8F80000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 35a726ec60f..9529215fd37 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y @@ -7,7 +7,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc" -CONFIG_SPL_TEXT_BASE=0xf8f81000 +CONFIG_SPL_TEXT_BASE=0xf8f80000 CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -20,7 +20,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000 +CONFIG_SPL_SYS_MONITOR_BASE=0xF8F80000 CONFIG_SPIFLASH=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index 2eb985823ec..ff5e4967819 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x30001000 +CONFIG_SYS_TEXT_BASE=0x30000000 CONFIG_SYS_MALLOC_LEN=0xa00000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index 9daf7fd5ef7..64b1b463d3d 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x30001000 +CONFIG_SYS_TEXT_BASE=0x30000000 CONFIG_SYS_MALLOC_LEN=0xa00000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index ee9292a4fb9..1f7b658d57b 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x30001000 +CONFIG_SYS_TEXT_BASE=0x30000000 CONFIG_SYS_MALLOC_LEN=0xa00000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index 91a83007ce8..f7f2b16f7e1 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x30001000 +CONFIG_SYS_TEXT_BASE=0x30000000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index 32fed7a33a4..1d16947471f 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x30001000 +CONFIG_SYS_TEXT_BASE=0x30000000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 638ed7147a7..114b7463cb1 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x30001000 +CONFIG_SYS_TEXT_BASE=0x30000000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index b71659a6600..34dfeb2dee5 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x00201000 +CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index 1b8ef0cb365..3bd5ad0d84a 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x00201000 +CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index bcef31a665f..0ff5a1a3724 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x00201000 +CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index 9e8e3ea8b5a..83bb1c37c2d 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x00201000 +CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index b6a0b857a72..79958022ba8 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x00201000 +CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index b0f0d165cdd..86725b9a17a 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x00201000 +CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index feba8e54b5c..65beaa91678 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x00201000 +CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index 0495786bc5f..eb30705011e 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x00201000 +CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index bb7c711d557..bfddca98f81 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x00201000 +CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index fb35c83f1b6..142703f2954 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x00201000 +CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig index 55444b69a7a..28a7d18c826 100644 --- a/configs/qemu-ppce500_defconfig +++ b/configs/qemu-ppce500_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0xf01000 +CONFIG_SYS_TEXT_BASE=0xf00000 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="qemu-ppce500" CONFIG_SYS_CLK_FREQ=33000000 @@ -9,7 +9,7 @@ CONFIG_TARGET_QEMU_PPCE500=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_MONITOR_BASE=0x00F01000 +CONFIG_SYS_MONITOR_BASE=0x00F00000 CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $fdtcontroladdr" -- GitLab From f6810b749f2ec136dac02989b23e7c5730c4e1a7 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Tue, 28 Jun 2022 13:57:25 +0930 Subject: [PATCH 391/581] aspeed/ast2600: Fix SPL linker script The commit 99e2fbcb69f0 ("linker_lists: Rename sections to remove . prefix") changed the name of the linker list sections. As the Aspeed SPL linker wasn't in the tree yet, it missed the change. This updates the SPL linker to match arch/arm/cpu/u-boot-spl.lds which Aspeed was copied from. Fixes: 442a69c14375 ("configs: ast2600: Move SPL bss section to DRAM space") Signed-off-by: Joel Stanley --- arch/arm/mach-aspeed/ast2600/u-boot-spl.lds | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-aspeed/ast2600/u-boot-spl.lds b/arch/arm/mach-aspeed/ast2600/u-boot-spl.lds index 22b4e16d35c..95a509ba3f3 100644 --- a/arch/arm/mach-aspeed/ast2600/u-boot-spl.lds +++ b/arch/arm/mach-aspeed/ast2600/u-boot-spl.lds @@ -40,8 +40,8 @@ SECTIONS } > .nor . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); + __u_boot_list : { + KEEP(*(SORT(__u_boot_list*))); } > .nor . = ALIGN(4); @@ -68,7 +68,7 @@ SECTIONS _image_binary_end = .; - .bss : { + .bss __rel_dyn_start (OVERLAY) : { __bss_start = .; *(.bss*) . = ALIGN(4); -- GitLab From 5c511ea93683cbdc94ec7e837b0a5b96495151f2 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 8 Jun 2022 08:24:23 -0400 Subject: [PATCH 392/581] Convert CONFIG_E1000_NO_NVM to Kconfig This converts the following to Kconfig: CONFIG_E1000_NO_NVM Signed-off-by: Tom Rini --- configs/apalis-tk1_defconfig | 1 + configs/apalis_t30_defconfig | 1 + drivers/net/Kconfig | 4 ++++ include/configs/apalis-tk1.h | 3 --- include/configs/apalis_t30.h | 3 --- 5 files changed, 6 insertions(+), 6 deletions(-) diff --git a/configs/apalis-tk1_defconfig b/configs/apalis-tk1_defconfig index 2d9c0ae18e3..0915bca6421 100644 --- a/configs/apalis-tk1_defconfig +++ b/configs/apalis-tk1_defconfig @@ -58,6 +58,7 @@ CONFIG_SYS_I2C_TEGRA=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_TEGRA124_MMC_DISABLE_EXT_LOOPBACK=y CONFIG_E1000=y +CONFIG_E1000_NO_NVM=y CONFIG_PCI=y CONFIG_PCI_TEGRA=y CONFIG_DM_PMIC=y diff --git a/configs/apalis_t30_defconfig b/configs/apalis_t30_defconfig index 2a8d3c6e0a3..f5d958646fa 100644 --- a/configs/apalis_t30_defconfig +++ b/configs/apalis_t30_defconfig @@ -50,6 +50,7 @@ CONFIG_TFTP_TSIZE=y CONFIG_SPL_DM=y CONFIG_SYS_I2C_TEGRA=y CONFIG_E1000=y +CONFIG_E1000_NO_NVM=y CONFIG_PCI=y CONFIG_PCI_TEGRA=y CONFIG_SYS_NS16550=y diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 84d859c21eb..56f9416a48d 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -239,6 +239,10 @@ config E1000 +config E1000_NO_NVM + bool "Intel PRO/1000 has no NVMEM / EEPROM" + depends on E1000 + config E1000_SPI_GENERIC bool "Allow access to the Intel 8257x SPI bus" depends on E1000 diff --git a/include/configs/apalis-tk1.h b/include/configs/apalis-tk1.h index 19e6a1e04ee..a362282a291 100644 --- a/include/configs/apalis-tk1.h +++ b/include/configs/apalis-tk1.h @@ -22,9 +22,6 @@ /* PCI host support */ #undef CONFIG_PCI_SCAN_SHOW -/* PCI networking support */ -#define CONFIG_E1000_NO_NVM - /* * Custom Distro Boot configuration: * 1. 8bit SD port (MMC1) diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h index 104c4135e28..84bd88f835a 100644 --- a/include/configs/apalis_t30.h +++ b/include/configs/apalis_t30.h @@ -23,9 +23,6 @@ #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE -/* PCI networking support */ -#define CONFIG_E1000_NO_NVM - #define UBOOT_UPDATE \ "uboot_hwpart=1\0" \ "uboot_blk=0\0" \ -- GitLab From d6e9efa6b2309d6582366dd4c6a95c4c7fb8f2af Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 8 Jun 2022 08:24:24 -0400 Subject: [PATCH 393/581] Convert CONFIG_EFLASH_PROTSECTORS to Kconfig This converts the following to Kconfig: CONFIG_EFLASH_PROTSECTORS Signed-off-by: Tom Rini --- arch/arm/mach-at91/Kconfig | 7 +++++++ arch/arm/mach-at91/arm926ejs/eflash.c | 4 ++-- configs/ethernut5_defconfig | 1 + include/configs/ethernut5.h | 1 - 4 files changed, 10 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index b87639f8c07..4fee9772bf1 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -327,6 +327,13 @@ config AT91_EFLASH Enable the driver for the embedded flash used in the Atmel AT91SAM9XE devices. +config EFLASH_PROTSECTORS + int "Number of flash sectors to protect from erasing" + depends on AT91_EFLASH + help + If non-zero, this will be the number of sectors of the flash to disallow + U-Boot to ease, starting from the beginning of flash. + config AT91_GPIO_PULLUP bool "Keep pullups on peripheral pins" depends on CPU_ARM926EJS diff --git a/arch/arm/mach-at91/arm926ejs/eflash.c b/arch/arm/mach-at91/arm926ejs/eflash.c index 23c24936edf..043f06a8271 100644 --- a/arch/arm/mach-at91/arm926ejs/eflash.c +++ b/arch/arm/mach-at91/arm926ejs/eflash.c @@ -120,7 +120,7 @@ unsigned long flash_init(void) if (i%32 == 0) tmp = readl(&eefc->frr); flash_info[0].protect[i] = (tmp >> (i%32)) & 1; -#if defined(CONFIG_EFLASH_PROTSECTORS) +#if CONFIG_VAL(EFLASH_PROTSECTORS) if (i < CONFIG_EFLASH_PROTSECTORS) flash_info[0].protect[i] = 1; #endif @@ -158,7 +158,7 @@ int flash_real_protect (flash_info_t *info, long sector, int prot) debug("protect sector=%ld prot=%d\n", sector, prot); -#if defined(CONFIG_EFLASH_PROTSECTORS) +#if CONFIG_VAL(EFLASH_PROTSECTORS) if (sector < CONFIG_EFLASH_PROTSECTORS) { if (!prot) { printf("eflash: sector %lu cannot be unprotected\n", diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig index da8c0bd9cbe..256f6520a59 100644 --- a/configs/ethernut5_defconfig +++ b/configs/ethernut5_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_TEXT_BASE=0x27000000 CONFIG_SYS_MALLOC_LEN=0x121000 CONFIG_TARGET_ETHERNUT5=y CONFIG_AT91_EFLASH=y +CONFIG_EFLASH_PROTSECTORS=1 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x21000 CONFIG_ENV_OFFSET=0x3DE000 diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index 8e7bfadf64e..8f9cfd50bc1 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -32,7 +32,6 @@ /* 512kB on-chip NOR flash */ # define CONFIG_SYS_FLASH_BASE 0x00200000 /* AT91SAM9XE_FLASH_BASE */ # define CONFIG_SYS_MAX_FLASH_SECT 32 -# define CONFIG_EFLASH_PROTSECTORS 1 /* bootstrap + u-boot + env + linux in dataflash on CS0 */ -- GitLab From 90bb5c08c8502b715176c81f5e551c35a4b0c5b1 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 8 Jun 2022 08:24:25 -0400 Subject: [PATCH 394/581] ehci-mxs: Remove non-DM code This code is not enabled anywhere, drop it. Signed-off-by: Tom Rini --- drivers/usb/host/ehci-mxs.c | 77 -------------------------------- include/configs/mx23_olinuxino.h | 1 - include/configs/mx23evk.h | 1 - include/configs/mx28evk.h | 1 - 4 files changed, 80 deletions(-) diff --git a/drivers/usb/host/ehci-mxs.c b/drivers/usb/host/ehci-mxs.c index 9a614955fc1..147b2fa145d 100644 --- a/drivers/usb/host/ehci-mxs.c +++ b/drivers/usb/host/ehci-mxs.c @@ -112,82 +112,6 @@ static int __ehci_hcd_stop(struct ehci_mxs_port *port) return ehci_mxs_toggle_clock(port, 0); } -#if !CONFIG_IS_ENABLED(DM_USB) -static const struct ehci_mxs_port mxs_port[] = { -#ifdef CONFIG_EHCI_MXS_PORT0 - { - MXS_USBCTRL0_BASE, - (struct mxs_usbphy_regs *)MXS_USBPHY0_BASE, - (struct mxs_register_32 *)(MXS_CLKCTRL_BASE + - offsetof(struct mxs_clkctrl_regs, - hw_clkctrl_pll0ctrl0_reg)), - CLKCTRL_PLL0CTRL0_EN_USB_CLKS | CLKCTRL_PLL0CTRL0_POWER, - CLKCTRL_PLL0CTRL0_EN_USB_CLKS, - HW_DIGCTL_CTRL_USB0_CLKGATE, - }, -#endif -#ifdef CONFIG_EHCI_MXS_PORT1 - { - MXS_USBCTRL1_BASE, - (struct mxs_usbphy_regs *)MXS_USBPHY1_BASE, - (struct mxs_register_32 *)(MXS_CLKCTRL_BASE + - offsetof(struct mxs_clkctrl_regs, - hw_clkctrl_pll1ctrl0_reg)), - CLKCTRL_PLL1CTRL0_EN_USB_CLKS | CLKCTRL_PLL1CTRL0_POWER, - CLKCTRL_PLL1CTRL0_EN_USB_CLKS, - HW_DIGCTL_CTRL_USB1_CLKGATE, - }, -#endif -}; - -int __weak board_ehci_hcd_init(int port) -{ - return 0; -} - -int __weak board_ehci_hcd_exit(int port) -{ - return 0; -} - -int ehci_hcd_init(int index, enum usb_init_type init, - struct ehci_hccr **hccr, struct ehci_hcor **hcor) -{ - - int ret; - const struct ehci_mxs_port *port; - - if ((index < 0) || (index >= ARRAY_SIZE(mxs_port))) { - printf("Invalid port index (index = %d)!\n", index); - return -EINVAL; - } - - ret = board_ehci_hcd_init(index); - if (ret) - return ret; - - port = &mxs_port[index]; - return __ehci_hcd_init(port, init, hccr, hcor); -} - -int ehci_hcd_stop(int index) -{ - int ret; - const struct ehci_mxs_port *port; - - if ((index < 0) || (index >= ARRAY_SIZE(mxs_port))) { - printf("Invalid port index (index = %d)!\n", index); - return -EINVAL; - } - - port = &mxs_port[index]; - - ret = __ehci_hcd_stop(port); - board_ehci_hcd_exit(index); - - return ret; -} -#else /* CONFIG_IS_ENABLED(DM_USB) */ struct ehci_mxs_priv_data { struct ehci_ctrl ctrl; struct usb_ehci *ehci; @@ -367,4 +291,3 @@ U_BOOT_DRIVER(usb_mxs) = { .priv_auto = sizeof(struct ehci_mxs_priv_data), .flags = DM_FLAG_ALLOC_PRIV_DMA, }; -#endif /* !CONFIG_IS_ENABLED(DM_USB) */ diff --git a/include/configs/mx23_olinuxino.h b/include/configs/mx23_olinuxino.h index ab466b65ac4..06b90e42b4c 100644 --- a/include/configs/mx23_olinuxino.h +++ b/include/configs/mx23_olinuxino.h @@ -16,7 +16,6 @@ /* USB */ #ifdef CONFIG_CMD_USB -#define CONFIG_EHCI_MXS_PORT0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #endif diff --git a/include/configs/mx23evk.h b/include/configs/mx23evk.h index 3fb00031075..94b916dbdb1 100644 --- a/include/configs/mx23evk.h +++ b/include/configs/mx23evk.h @@ -21,7 +21,6 @@ /* USB */ #ifdef CONFIG_CMD_USB -#define CONFIG_EHCI_MXS_PORT0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #endif diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index fe096d424c3..10f48c12565 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -35,7 +35,6 @@ /* USB */ #ifdef CONFIG_CMD_USB -#define CONFIG_EHCI_MXS_PORT1 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #endif -- GitLab From 879b0b16de9f968d716acd856085428e52b27c23 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 8 Jun 2022 08:24:26 -0400 Subject: [PATCH 395/581] Convert CONFIG_EHCI_DESC_BIG_ENDIAN et al to Kconfig This converts the following to Kconfig: CONFIG_EHCI_DESC_BIG_ENDIAN CONFIG_EHCI_MMIO_BIG_ENDIAN Signed-off-by: Tom Rini --- drivers/usb/host/Kconfig | 10 ++++++++++ include/configs/bmips_bcm6318.h | 2 -- include/configs/bmips_bcm63268.h | 2 -- include/configs/bmips_bcm6328.h | 2 -- include/configs/bmips_bcm6358.h | 2 -- include/configs/bmips_bcm6362.h | 2 -- include/configs/bmips_bcm6368.h | 2 -- include/configs/tplink_wdr4300.h | 4 ---- 8 files changed, 10 insertions(+), 16 deletions(-) diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 8f77412cc71..8e0ecc5e41e 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -116,11 +116,19 @@ config USB_XHCI_BRCM endif # USB_XHCI_HCD +config EHCI_DESC_BIG_ENDIAN + bool + +config EHCI_MMIO_BIG_ENDIAN + bool + config USB_EHCI_HCD bool "EHCI HCD (USB 2.0) support" default y if ARCH_MX5 || ARCH_MX6 depends on DM && OF_CONTROL select USB_HOST + select EHCI_DESC_BIG_ENDIAN if SYS_BIG_ENDIAN + select EHCI_MMIO_BIG_ENDIAN if SYS_BIG_ENDIAN ---help--- The Enhanced Host Controller Interface (EHCI) is standard for USB 2.0 "high speed" (480 Mbit/sec, 60 Mbyte/sec) host controller hardware. @@ -166,6 +174,7 @@ config USB_EHCI_MX5 config USB_EHCI_MX6 bool "Support for i.MX6/i.MX7ULP on-chip EHCI USB controller" depends on ARCH_MX6 || ARCH_MX7ULP || ARCH_IMXRT + select EHCI_HCD_INIT_AFTER_RESET default y ---help--- Enables support for the on-chip EHCI controller on i.MX6 SoCs. @@ -173,6 +182,7 @@ config USB_EHCI_MX6 config USB_EHCI_MX7 bool "Support for i.MX7 on-chip EHCI USB controller" depends on ARCH_MX7 || IMX8M + select EHCI_HCD_INIT_AFTER_RESET if ARCH_MX7 select PHY if IMX8M select NOP_PHY if IMX8M default y diff --git a/include/configs/bmips_bcm6318.h b/include/configs/bmips_bcm6318.h index 412471a4aaa..ad7781bd3a2 100644 --- a/include/configs/bmips_bcm6318.h +++ b/include/configs/bmips_bcm6318.h @@ -15,8 +15,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* USB */ -#define CONFIG_EHCI_DESC_BIG_ENDIAN -#define CONFIG_EHCI_MMIO_BIG_ENDIAN #define CONFIG_SYS_OHCI_SWAP_REG_ACCESS #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #if defined(CONFIG_USB_OHCI_HCD) diff --git a/include/configs/bmips_bcm63268.h b/include/configs/bmips_bcm63268.h index 8caddf38462..0901f6e88ac 100644 --- a/include/configs/bmips_bcm63268.h +++ b/include/configs/bmips_bcm63268.h @@ -15,8 +15,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* USB */ -#define CONFIG_EHCI_DESC_BIG_ENDIAN -#define CONFIG_EHCI_MMIO_BIG_ENDIAN #define CONFIG_SYS_OHCI_SWAP_REG_ACCESS #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #if defined(CONFIG_USB_OHCI_HCD) diff --git a/include/configs/bmips_bcm6328.h b/include/configs/bmips_bcm6328.h index 892a3e2c41e..3f45f1f2550 100644 --- a/include/configs/bmips_bcm6328.h +++ b/include/configs/bmips_bcm6328.h @@ -15,8 +15,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* USB */ -#define CONFIG_EHCI_DESC_BIG_ENDIAN -#define CONFIG_EHCI_MMIO_BIG_ENDIAN #define CONFIG_SYS_OHCI_SWAP_REG_ACCESS #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #if defined(CONFIG_USB_OHCI_HCD) diff --git a/include/configs/bmips_bcm6358.h b/include/configs/bmips_bcm6358.h index 6cb09492aa8..c15218fc9cb 100644 --- a/include/configs/bmips_bcm6358.h +++ b/include/configs/bmips_bcm6358.h @@ -15,8 +15,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* USB */ -#define CONFIG_EHCI_DESC_BIG_ENDIAN -#define CONFIG_EHCI_MMIO_BIG_ENDIAN #define CONFIG_SYS_OHCI_SWAP_REG_ACCESS #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #if defined(CONFIG_USB_OHCI_HCD) diff --git a/include/configs/bmips_bcm6362.h b/include/configs/bmips_bcm6362.h index 92ab0ba7a2f..0c94b2c5254 100644 --- a/include/configs/bmips_bcm6362.h +++ b/include/configs/bmips_bcm6362.h @@ -15,8 +15,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* USB */ -#define CONFIG_EHCI_DESC_BIG_ENDIAN -#define CONFIG_EHCI_MMIO_BIG_ENDIAN #define CONFIG_SYS_OHCI_SWAP_REG_ACCESS #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #if defined(CONFIG_USB_OHCI_HCD) diff --git a/include/configs/bmips_bcm6368.h b/include/configs/bmips_bcm6368.h index 8a22dc1a3c3..6486b7e6110 100644 --- a/include/configs/bmips_bcm6368.h +++ b/include/configs/bmips_bcm6368.h @@ -15,8 +15,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* USB */ -#define CONFIG_EHCI_DESC_BIG_ENDIAN -#define CONFIG_EHCI_MMIO_BIG_ENDIAN #define CONFIG_SYS_OHCI_SWAP_REG_ACCESS #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #if defined(CONFIG_USB_OHCI_HCD) diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h index 3866a433329..f5466fd5092 100644 --- a/include/configs/tplink_wdr4300.h +++ b/include/configs/tplink_wdr4300.h @@ -24,10 +24,6 @@ */ /* Miscellaneous configurable options */ -/* USB, USB storage, USB ethernet */ -#define CONFIG_EHCI_MMIO_BIG_ENDIAN -#define CONFIG_EHCI_DESC_BIG_ENDIAN - /* * Diagnostics */ -- GitLab From e78e880da9e9f85a9b901385fa1d6d37b9f60d2d Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 8 Jun 2022 08:24:27 -0400 Subject: [PATCH 396/581] Convert CONFIG_EHCI_HCD_INIT_AFTER_RESET to Kconfig This converts the following to Kconfig: CONFIG_EHCI_HCD_INIT_AFTER_RESET Signed-off-by: Tom Rini --- drivers/usb/host/Kconfig | 5 ++++- include/configs/MPC837XERDB.h | 1 - include/configs/P1010RDB.h | 6 ------ include/configs/P2041RDB.h | 4 ---- include/configs/T102xRDB.h | 4 ---- include/configs/T104xRDB.h | 6 ------ include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240RDB.h | 1 - include/configs/apalis_imx6.h | 1 - include/configs/aristainetos2.h | 1 - include/configs/brppt2.h | 1 - include/configs/cl-som-imx7.h | 1 - include/configs/cm_fx6.h | 1 - include/configs/colibri-imx6ull.h | 1 - include/configs/colibri_imx6.h | 1 - include/configs/colibri_imx7.h | 1 - include/configs/colibri_vf.h | 1 - include/configs/corenet_ds.h | 4 ---- include/configs/dart_6ul.h | 1 - include/configs/dh_imx6.h | 1 - include/configs/dragonboard410c.h | 4 ---- include/configs/embestmx6boards.h | 1 - include/configs/ge_b1x5v2.h | 1 - include/configs/gw_ventana.h | 1 - include/configs/imx6_logic.h | 1 - include/configs/imx6dl-mamoj.h | 1 - include/configs/imx6q-bosch-acc.h | 1 - include/configs/imx8mm-cl-iot-gate.h | 1 - include/configs/kontron-sl-mx6ul.h | 1 - include/configs/kontron-sl-mx8mm.h | 1 - include/configs/kp_imx6q_tpc.h | 1 - include/configs/liteboard.h | 1 - include/configs/meerkat96.h | 1 - include/configs/mx6sabreauto.h | 1 - include/configs/mx6sabresd.h | 1 - include/configs/mx6slevk.h | 1 - include/configs/mx6sxsabreauto.h | 1 - include/configs/mx6sxsabresd.h | 1 - include/configs/mx6ul_14x14_evk.h | 1 - include/configs/mys_6ulx.h | 1 - include/configs/nitrogen6x.h | 1 - include/configs/npi_imx6ull.h | 1 - include/configs/omap5_uevm.h | 3 --- include/configs/opos6uldev.h | 1 - include/configs/p1_p2_rdb_pc.h | 6 ------ include/configs/pcl063.h | 1 - include/configs/pcl063_ull.h | 1 - include/configs/pico-imx6ul.h | 1 - include/configs/pico-imx7d.h | 1 - include/configs/somlabs_visionsom_6ull.h | 1 - include/configs/tbs2910.h | 1 - include/configs/tqma6.h | 2 -- include/configs/verdin-imx8mm.h | 1 - include/configs/vining_2000.h | 1 - include/configs/warp.h | 1 - include/configs/xpress.h | 1 - 57 files changed, 4 insertions(+), 87 deletions(-) diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 8e0ecc5e41e..5d0855ffcc7 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -260,9 +260,12 @@ config USB_EHCI_GENERIC ---help--- Enables support for generic EHCI controller. +config EHCI_HCD_INIT_AFTER_RESET + bool + config USB_EHCI_FSL bool "Support for FSL on-chip EHCI USB controller" - select CONFIG_EHCI_HCD_INIT_AFTER_RESET + select EHCI_HCD_INIT_AFTER_RESET ---help--- Enables support for the on-chip EHCI controller on FSL chips. endif # USB_EHCI_HCD diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index d356ff95944..01e62668fa5 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -307,7 +307,6 @@ */ #define CONFIG_HAS_FSL_DR_USB -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_NETDEV "eth1" diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index ce63e640d5c..3773b125327 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -492,12 +492,6 @@ extern unsigned long get_sdram_size(void); #define CONFIG_HAS_FSL_DR_USB -#if defined(CONFIG_HAS_FSL_DR_USB) -#ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET -#endif -#endif - /* * Environment */ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 9cce6cf68da..dfe92bcea09 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -379,10 +379,6 @@ #define CONFIG_HAS_FSL_DR_USB #define CONFIG_HAS_FSL_MPH_USB -#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB) -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET -#endif - #ifdef CONFIG_MMC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 618b8ed845a..43cf604fdd5 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -401,10 +401,6 @@ */ #define CONFIG_HAS_FSL_DR_USB -#ifdef CONFIG_HAS_FSL_DR_USB -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET -#endif - /* * SDHC */ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 3f4e59fa8ab..da0a4f206ef 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -405,12 +405,6 @@ */ #define CONFIG_HAS_FSL_DR_USB -#ifdef CONFIG_HAS_FSL_DR_USB -#ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET -#endif -#endif - #ifdef CONFIG_MMC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #endif diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index b4a91eacb9e..dfe9192df12 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -475,7 +475,6 @@ * USB */ #ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_HAS_FSL_DR_USB #endif diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 84e5d5df38d..a5a30d8c855 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -431,7 +431,6 @@ * USB */ #ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_HAS_FSL_DR_USB #endif diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 2ab1b647a86..7690bee4845 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -448,7 +448,6 @@ /* * USB */ -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_HAS_FSL_DR_USB #ifdef CONFIG_MMC diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 28644051471..d0e0e65d85f 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -38,7 +38,6 @@ /* USB Configs */ /* Host */ #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 /* Client */ diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index de4f4407abb..0c44f7483bd 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -420,7 +420,6 @@ /* DMA stuff, needed for GPMI/MXS NAND support */ /* USB Configs */ -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 diff --git a/include/configs/brppt2.h b/include/configs/brppt2.h index 7b110f05ca4..19276cc6eca 100644 --- a/include/configs/brppt2.h +++ b/include/configs/brppt2.h @@ -86,7 +86,6 @@ BUR_COMMON_ENV \ #define CONFIG_FEC_FIXED_SPEED _1000BASET /* USB Configs */ -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) /* SPL */ diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index b19b3ef541c..c63c5ebb672 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -102,7 +102,6 @@ #endif /* USB Configs */ -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index cb4cd925d9f..07ad6fde28d 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -148,7 +148,6 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ /* SATA */ #define CONFIG_LBA48 diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index 0459cb0286e..da5b8a6f80f 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -135,7 +135,6 @@ #endif /* USB Configs */ -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index d7d5c2ddee1..f62a3f6688e 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -28,7 +28,6 @@ /* USB Configs */ /* Host */ #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 /* Client */ diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index 180142a6487..d78a27347c5 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -179,7 +179,6 @@ #endif /* USB Configs */ -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 32e2aabc67c..664c538f6dc 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -98,7 +98,6 @@ /* USB Host Support */ #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* USB DFU */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 9291b81ac2a..54e79b16d65 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -377,10 +377,6 @@ #define CONFIG_HAS_FSL_DR_USB #define CONFIG_HAS_FSL_MPH_USB -#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB) -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET -#endif - #ifdef CONFIG_MMC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT diff --git a/include/configs/dart_6ul.h b/include/configs/dart_6ul.h index d502e98deae..9f27072f12f 100644 --- a/include/configs/dart_6ul.h +++ b/include/configs/dart_6ul.h @@ -50,7 +50,6 @@ #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE /* USB Configs */ -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index b495826301e..298a88c92ed 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -41,7 +41,6 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */ diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h index ed46f26628f..26a714c2886 100644 --- a/include/configs/dragonboard410c.h +++ b/include/configs/dragonboard410c.h @@ -22,10 +22,6 @@ /* UART */ -/* Fixup - in init code we switch from device to host mode, - * it has to be done after each HCD reset */ -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET - #define BOOT_TARGET_DEVICES(func) \ func(USB, usb, 0) \ func(MMC, mmc, 1) \ diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index 00996f5cb78..7526d3b0f51 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -18,7 +18,6 @@ #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) /* USB Configs */ -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 diff --git a/include/configs/ge_b1x5v2.h b/include/configs/ge_b1x5v2.h index 252ab5e7473..61ca5f8b34a 100644 --- a/include/configs/ge_b1x5v2.h +++ b/include/configs/ge_b1x5v2.h @@ -29,7 +29,6 @@ #endif /* USB */ -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */ diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 26d171daae7..6aa6c6262e3 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -55,7 +55,6 @@ /* Various command support */ /* USB Configs */ -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USBD_HS diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h index 592c62ab8ac..6b1c67867da 100644 --- a/include/configs/imx6_logic.h +++ b/include/configs/imx6_logic.h @@ -122,7 +122,6 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */ diff --git a/include/configs/imx6dl-mamoj.h b/include/configs/imx6dl-mamoj.h index c4eebb5aeac..2707ae64406 100644 --- a/include/configs/imx6dl-mamoj.h +++ b/include/configs/imx6dl-mamoj.h @@ -45,7 +45,6 @@ #define CONFIG_FEC_MXC_PHYADDR 1 /* USB */ -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 diff --git a/include/configs/imx6q-bosch-acc.h b/include/configs/imx6q-bosch-acc.h index 785ac7c5014..e904a10b6e8 100644 --- a/include/configs/imx6q-bosch-acc.h +++ b/include/configs/imx6q-bosch-acc.h @@ -111,7 +111,6 @@ #endif #endif -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */ diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index 7135a83e042..9b84730fc76 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -141,7 +141,6 @@ #define CONFIG_FEC_MXC_PHYADDR 0 /* USB Configs */ -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 diff --git a/include/configs/kontron-sl-mx6ul.h b/include/configs/kontron-sl-mx6ul.h index b6e68f8f41a..d04684955d3 100644 --- a/include/configs/kontron-sl-mx6ul.h +++ b/include/configs/kontron-sl-mx6ul.h @@ -29,7 +29,6 @@ #define CONFIG_HOSTNAME "kontron-mx6ul" #ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h index c4be62c3721..e28bfb88ff0 100644 --- a/include/configs/kontron-sl-mx8mm.h +++ b/include/configs/kontron-sl-mx8mm.h @@ -26,7 +26,6 @@ #define CONFIG_HOSTNAME "kontron-mx8mm" #ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h index 5b25be5c925..a513213c598 100644 --- a/include/configs/kp_imx6q_tpc.h +++ b/include/configs/kp_imx6q_tpc.h @@ -21,7 +21,6 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */ diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h index 3c03368b5c0..fa178fbe936 100644 --- a/include/configs/liteboard.h +++ b/include/configs/liteboard.h @@ -98,7 +98,6 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 diff --git a/include/configs/meerkat96.h b/include/configs/meerkat96.h index 0ccfe7db5a4..c6ce8837474 100644 --- a/include/configs/meerkat96.h +++ b/include/configs/meerkat96.h @@ -24,7 +24,6 @@ /* Environment configs */ /* USB configs */ -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h index d120c7c7a35..d0cf6a2251c 100644 --- a/include/configs/mx6sabreauto.h +++ b/include/configs/mx6sabreauto.h @@ -17,7 +17,6 @@ /* USB Configs */ #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 2f4332a4b19..18d5d4988cf 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -36,7 +36,6 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */ diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index e03226d4180..837742b8039 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -94,7 +94,6 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h index 272492466de..b3a786da480 100644 --- a/include/configs/mx6sxsabreauto.h +++ b/include/configs/mx6sxsabreauto.h @@ -97,7 +97,6 @@ #define CONFIG_FEC_MXC_PHYADDR 0x0 #ifdef CONFIG_CMD_USB -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index fda5b03b60f..a5596d98fe6 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -124,7 +124,6 @@ #define CONFIG_FEC_MXC_PHYADDR 0x1 #ifdef CONFIG_CMD_USB -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index 44e6fd0156f..7c76290a2ae 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -119,7 +119,6 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 diff --git a/include/configs/mys_6ulx.h b/include/configs/mys_6ulx.h index fb685ec9631..d1dc445a9b7 100644 --- a/include/configs/mys_6ulx.h +++ b/include/configs/mys_6ulx.h @@ -34,7 +34,6 @@ #define CONFIG_SYS_NAND_BASE 0x40000000 /* USB Configs */ -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 3aa21a28d15..72f2dfb5dac 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -33,7 +33,6 @@ /* USB Configs */ #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 diff --git a/include/configs/npi_imx6ull.h b/include/configs/npi_imx6ull.h index 1fc4b87cab7..b3de41852fe 100644 --- a/include/configs/npi_imx6ull.h +++ b/include/configs/npi_imx6ull.h @@ -35,7 +35,6 @@ #define CONFIG_SYS_NAND_BASE 0x40000000 /* USB Configs */ -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h index 75e84c35ee0..cce5556fe26 100644 --- a/include/configs/omap5_uevm.h +++ b/include/configs/omap5_uevm.h @@ -40,9 +40,6 @@ #define CONFIG_SYS_I2C_TCA642X_BUS_NUM 4 #define CONFIG_SYS_I2C_TCA642X_ADDR 0x22 -/* USB UHH support options */ -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET - /* Enabled commands */ /* USB Networking options */ diff --git a/include/configs/opos6uldev.h b/include/configs/opos6uldev.h index 8624d24b6ea..ebfba72d0da 100644 --- a/include/configs/opos6uldev.h +++ b/include/configs/opos6uldev.h @@ -24,7 +24,6 @@ /* USB */ #ifdef CONFIG_USB_EHCI_MX6 -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 56a16502dcc..033f5b0c7b0 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -458,12 +458,6 @@ */ #define CONFIG_HAS_FSL_DR_USB -#if defined(CONFIG_HAS_FSL_DR_USB) -#ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET -#endif -#endif - #if defined(CONFIG_TARGET_P1020RDB_PD) #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #endif diff --git a/include/configs/pcl063.h b/include/configs/pcl063.h index 659f20e63ab..c6c417b6292 100644 --- a/include/configs/pcl063.h +++ b/include/configs/pcl063.h @@ -46,7 +46,6 @@ #define CONFIG_SYS_NAND_BASE 0x40000000 /* USB Configs */ -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 diff --git a/include/configs/pcl063_ull.h b/include/configs/pcl063_ull.h index 0d099fa14c2..4c1d24f64fd 100644 --- a/include/configs/pcl063_ull.h +++ b/include/configs/pcl063_ull.h @@ -48,7 +48,6 @@ #define CONFIG_SYS_NAND_BASE 0x40000000 /* USB Configs */ -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index ea30fbc4cfc..7e57d7b1422 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -30,7 +30,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR /* USB Configs */ -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index 5a6f2244201..39705d95692 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -116,7 +116,6 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 /* USB Configs */ -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 diff --git a/include/configs/somlabs_visionsom_6ull.h b/include/configs/somlabs_visionsom_6ull.h index f1886cb2145..e7a12799d99 100644 --- a/include/configs/somlabs_visionsom_6ull.h +++ b/include/configs/somlabs_visionsom_6ull.h @@ -65,7 +65,6 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index c355083519f..22a7407a469 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -41,7 +41,6 @@ /* USB */ #ifdef CONFIG_CMD_USB -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #ifdef CONFIG_CMD_USB_MASS_STORAGE #define CONFIG_USBD_HS diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index 3290ec021fd..d60fe51eaf9 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -53,8 +53,6 @@ /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ - #if defined(CONFIG_TQMA6X_MMC_BOOT) diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 19c16df4888..0867ccad0a2 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -75,7 +75,6 @@ #define CONFIG_FEC_MXC_PHYADDR 7 /* USB Configs */ -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index a447ec8c344..487ab3d664c 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -41,7 +41,6 @@ /* Network */ #define CONFIG_FEC_MXC_PHYADDR 0x0 -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 diff --git a/include/configs/warp.h b/include/configs/warp.h index 74fa03b53d8..5716f8f9a60 100644 --- a/include/configs/warp.h +++ b/include/configs/warp.h @@ -34,7 +34,6 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Only OTG2 port enabled */ diff --git a/include/configs/xpress.h b/include/configs/xpress.h index 8e36d1c4c3e..81f8d64067d 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -31,7 +31,6 @@ /* Environment is in stored in the eMMC boot partition */ /* USB Configs */ -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 -- GitLab From 5cc1d9214a73720631c40685dff1fa32ec11106a Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 8 Jun 2022 08:24:28 -0400 Subject: [PATCH 397/581] Convert CONFIG_HAS_FSL_DR_USB to Kconfig This converts the following to Kconfig: CONFIG_HAS_FSL_DR_USB Signed-off-by: Tom Rini --- board/freescale/common/Kconfig | 4 ++++ board/freescale/p1_p2_rdb_pc/Kconfig | 2 ++ include/configs/MPC837XERDB.h | 2 -- include/configs/P1010RDB.h | 2 -- include/configs/P2041RDB.h | 1 - include/configs/T102xRDB.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/T208xQDS.h | 3 --- include/configs/T208xRDB.h | 3 --- include/configs/T4240RDB.h | 1 - include/configs/corenet_ds.h | 1 - include/configs/ids8313.h | 1 - include/configs/p1_p2_rdb_pc.h | 1 - 13 files changed, 6 insertions(+), 17 deletions(-) diff --git a/board/freescale/common/Kconfig b/board/freescale/common/Kconfig index b0e6e43f4fe..195fc471a5b 100644 --- a/board/freescale/common/Kconfig +++ b/board/freescale/common/Kconfig @@ -108,3 +108,7 @@ config QIXIS_I2C_ACCESS bool "Access to QIXIS is over i2c" depends on FSL_QIXIS default y + +config HAS_FSL_DR_USB + def_bool y + depends on USB_EHCI_HCD && PPC diff --git a/board/freescale/p1_p2_rdb_pc/Kconfig b/board/freescale/p1_p2_rdb_pc/Kconfig index cd36150f637..db7b47a4635 100644 --- a/board/freescale/p1_p2_rdb_pc/Kconfig +++ b/board/freescale/p1_p2_rdb_pc/Kconfig @@ -11,4 +11,6 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "p1_p2_rdb_pc" +source "board/freescale/common/Kconfig" + endif diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 01e62668fa5..4995bcee856 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -306,8 +306,6 @@ * Environment Configuration */ -#define CONFIG_HAS_FSL_DR_USB - #define CONFIG_NETDEV "eth1" #define CONFIG_HOSTNAME "mpc837x_rdb" diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 3773b125327..d5b8cfaea39 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -490,8 +490,6 @@ extern unsigned long get_sdram_size(void); #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #endif -#define CONFIG_HAS_FSL_DR_USB - /* * Environment */ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index dfe92bcea09..261e9872a7a 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -376,7 +376,6 @@ /* * USB */ -#define CONFIG_HAS_FSL_DR_USB #define CONFIG_HAS_FSL_MPH_USB #ifdef CONFIG_MMC diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 43cf604fdd5..b412438116d 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -399,7 +399,6 @@ /* * USB */ -#define CONFIG_HAS_FSL_DR_USB /* * SDHC diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index da0a4f206ef..bb05b2ed7c9 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -403,7 +403,6 @@ /* * USB */ -#define CONFIG_HAS_FSL_DR_USB #ifdef CONFIG_MMC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index dfe9192df12..e46488b3c0e 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -474,9 +474,6 @@ /* * USB */ -#ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_HAS_FSL_DR_USB -#endif /* * SDHC diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index a5a30d8c855..d4bf938ac6f 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -430,9 +430,6 @@ /* * USB */ -#ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_HAS_FSL_DR_USB -#endif /* * SDHC diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 7690bee4845..ebdd47edf95 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -448,7 +448,6 @@ /* * USB */ -#define CONFIG_HAS_FSL_DR_USB #ifdef CONFIG_MMC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 54e79b16d65..ce9e5117058 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -374,7 +374,6 @@ /* * USB */ -#define CONFIG_HAS_FSL_DR_USB #define CONFIG_HAS_FSL_MPH_USB #ifdef CONFIG_MMC diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h index 39a36779bc4..aa6a471cc25 100644 --- a/include/configs/ids8313.h +++ b/include/configs/ids8313.h @@ -182,7 +182,6 @@ #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x4600) #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)) -#define CONFIG_HAS_FSL_DR_USB #define CONFIG_SYS_SCCR_USBDRCM 3 /* diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 033f5b0c7b0..186a2568f80 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -456,7 +456,6 @@ /* * USB */ -#define CONFIG_HAS_FSL_DR_USB #if defined(CONFIG_TARGET_P1020RDB_PD) #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -- GitLab From 093044735fd7db1616b1c4920c21ea6c0e0b0cc3 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 8 Jun 2022 08:24:30 -0400 Subject: [PATCH 398/581] usb: ehci-fsl: Remove non-DM code The deadline for DM_USB migration has passed and all users have been migrated. Remove now unused code. Signed-off-by: Tom Rini --- .../asm/arch-fsl-layerscape/immap_lsch2.h | 1 - arch/arm/include/asm/arch-ls102xa/config.h | 1 - arch/powerpc/cpu/mpc83xx/cpu_init.c | 13 ---- drivers/usb/host/ehci-fsl.c | 71 ------------------- include/usb/ehci-ci.h | 15 ---- 5 files changed, 101 deletions(-) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index 61db1738f33..4b0f554e336 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -37,7 +37,6 @@ #define CONFIG_SYS_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x01f00000) #define CONFIG_SYS_XHCI_USB2_ADDR (CONFIG_SYS_IMMR + 0x02000000) #define CONFIG_SYS_XHCI_USB3_ADDR (CONFIG_SYS_IMMR + 0x02100000) -#define CONFIG_SYS_EHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x07600000) #define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_IMMR + 0x2400000) #define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_IMMR + 0x2500000) #define CONFIG_SYS_PCIE3_ADDR (CONFIG_SYS_IMMR + 0x2600000) diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index 3b1d9a3f0c4..2f3409e3e87 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -34,7 +34,6 @@ #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x011d0500) #define CONFIG_SYS_DCU_ADDR (CONFIG_SYS_IMMR + 0x01ce0000) #define CONFIG_SYS_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x02100000) -#define CONFIG_SYS_EHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x07600000) #define CONFIG_SYS_FSL_SEC_OFFSET 0x00700000 #define CONFIG_SYS_FSL_JR0_OFFSET 0x00710000 diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c b/arch/powerpc/cpu/mpc83xx/cpu_init.c index e3e1bfd65a5..33835eeec2a 100644 --- a/arch/powerpc/cpu/mpc83xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c @@ -251,19 +251,6 @@ void cpu_init_f (volatile immap_t * im) im->gpio[1].dat = CONFIG_SYS_GPIO2_DAT; im->gpio[1].dir = CONFIG_SYS_GPIO2_DIR; #endif -#if defined(CONFIG_USB_EHCI_FSL) && defined(CONFIG_ARCH_MPC831X) - uint32_t temp; - struct usb_ehci *ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB1_ADDR; - - /* Configure interface. */ - setbits_be32(&ehci->control, REFSEL_16MHZ | UTMI_PHY_EN); - - /* Wait for clock to stabilize */ - do { - temp = __raw_readl(&ehci->control); - udelay(1000); - } while (!(temp & PHY_CLK_VALID)); -#endif } int cpu_init_r (void) diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c index cf1f882441b..82da339fd50 100644 --- a/drivers/usb/host/ehci-fsl.c +++ b/drivers/usb/host/ehci-fsl.c @@ -29,22 +29,15 @@ DECLARE_GLOBAL_DATA_PTR; #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #endif -#if CONFIG_IS_ENABLED(DM_USB) struct ehci_fsl_priv { struct ehci_ctrl ehci; fdt_addr_t hcd_base; char *phy_type; }; -#endif static void set_txfifothresh(struct usb_ehci *, u32); -#if CONFIG_IS_ENABLED(DM_USB) static int ehci_fsl_init(struct ehci_fsl_priv *priv, struct usb_ehci *ehci, struct ehci_hccr *hccr, struct ehci_hcor *hcor); -#else -static int ehci_fsl_init(int index, struct usb_ehci *ehci, - struct ehci_hccr *hccr, struct ehci_hcor *hcor); -#endif /* Check USB PHY clock valid */ static int usb_phy_clk_valid(struct usb_ehci *ehci) @@ -58,7 +51,6 @@ static int usb_phy_clk_valid(struct usb_ehci *ehci) } } -#if CONFIG_IS_ENABLED(DM_USB) static int ehci_fsl_of_to_plat(struct udevice *dev) { struct ehci_fsl_priv *priv = dev_get_priv(dev); @@ -150,64 +142,11 @@ U_BOOT_DRIVER(ehci_fsl) = { .priv_auto = sizeof(struct ehci_fsl_priv), .flags = DM_FLAG_ALLOC_PRIV_DMA, }; -#else -/* - * Create the appropriate control structures to manage - * a new EHCI host controller. - * - * Excerpts from linux ehci fsl driver. - */ -int ehci_hcd_init(int index, enum usb_init_type init, - struct ehci_hccr **hccr, struct ehci_hcor **hcor) -{ - struct ehci_ctrl *ehci_ctrl = container_of(hccr, - struct ehci_ctrl, hccr); - struct usb_ehci *ehci = NULL; - - switch (index) { - case 0: - ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB1_ADDR; - break; - case 1: - ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB2_ADDR; - break; - default: - printf("ERROR: wrong controller index!!\n"); - return -EINVAL; - }; - - *hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength); - *hcor = (struct ehci_hcor *)((uint32_t) *hccr + - HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); - - ehci_ctrl->has_fsl_erratum_a005275 = has_erratum_a005275(); - - return ehci_fsl_init(index, ehci, *hccr, *hcor); -} -/* - * Destroy the appropriate control structures corresponding - * the the EHCI host controller. - */ -int ehci_hcd_stop(int index) -{ - return 0; -} -#endif - -#if CONFIG_IS_ENABLED(DM_USB) static int ehci_fsl_init(struct ehci_fsl_priv *priv, struct usb_ehci *ehci, struct ehci_hccr *hccr, struct ehci_hcor *hcor) -#else -static int ehci_fsl_init(int index, struct usb_ehci *ehci, - struct ehci_hccr *hccr, struct ehci_hcor *hcor) -#endif { const char *phy_type = NULL; -#if !CONFIG_IS_ENABLED(DM_USB) - size_t len; - char current_usb_controller[5]; -#endif #ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY char usb_phy[5]; @@ -230,18 +169,8 @@ static int ehci_fsl_init(int index, struct usb_ehci *ehci, out_be32(&ehci->snoop2, 0x80000000 | SNOOP_SIZE_2GB); /* Init phy */ -#if CONFIG_IS_ENABLED(DM_USB) if (priv->phy_type) phy_type = priv->phy_type; -#else - memset(current_usb_controller, '\0', 5); - snprintf(current_usb_controller, sizeof(current_usb_controller), - "usb%d", index+1); - - if (hwconfig_sub(current_usb_controller, "phy_type")) - phy_type = hwconfig_subarg(current_usb_controller, - "phy_type", &len); -#endif else phy_type = env_get("usb_phy_type"); diff --git a/include/usb/ehci-ci.h b/include/usb/ehci-ci.h index 2cdb3146e86..bc980934585 100644 --- a/include/usb/ehci-ci.h +++ b/include/usb/ehci-ci.h @@ -146,21 +146,6 @@ #define MPC83XX_SCCR_USB_DRCM_01 0x00100000 #define MPC83XX_SCCR_USB_DRCM_10 0x00200000 -#if defined(CONFIG_MPC83xx) -#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC83xx_USB1_ADDR -#if defined(CONFIG_ARCH_MPC834X) -#define CONFIG_SYS_FSL_USB2_ADDR CONFIG_SYS_MPC83xx_USB2_ADDR -#else -#define CONFIG_SYS_FSL_USB2_ADDR 0 -#endif -#elif defined(CONFIG_MPC85xx) -#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC85xx_USB1_ADDR -#define CONFIG_SYS_FSL_USB2_ADDR CONFIG_SYS_MPC85xx_USB2_ADDR -#elif defined(CONFIG_ARCH_LS1021A) || defined(CONFIG_ARCH_LS1012A) -#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_EHCI_USB1_ADDR -#define CONFIG_SYS_FSL_USB2_ADDR 0 -#endif - /* * Increasing TX FIFO threshold value from 2 to 4 decreases * data burst rate with which data packets are posted from the TX -- GitLab From d4ae15260bbd0f9962b71ad2af53e4c450abd530 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 8 Jun 2022 08:24:31 -0400 Subject: [PATCH 399/581] Convert CONFIG_USB_EHCI_TXFIFO_THRESH to Kconfig This converts the following to Kconfig: CONFIG_USB_EHCI_TXFIFO_THRESH Signed-off-by: Tom Rini --- README | 3 --- drivers/usb/host/Kconfig | 11 +++++++++++ include/configs/tegra114-common.h | 3 --- include/configs/tegra124-common.h | 3 --- include/configs/tegra20-common.h | 8 -------- include/configs/tegra210-common.h | 3 --- include/configs/tegra30-common.h | 3 --- 7 files changed, 11 insertions(+), 23 deletions(-) diff --git a/README b/README index f3304229d8d..e01ff989bd4 100644 --- a/README +++ b/README @@ -793,9 +793,6 @@ The following options need to be configured: Supported are USB Keyboards and USB Floppy drives (TEAC FD-05PUB). - CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the - txfilltuning field in the EHCI controller on reset. - CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2 HW module registers. diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 5d0855ffcc7..8240ed8a443 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -268,6 +268,17 @@ config USB_EHCI_FSL select EHCI_HCD_INIT_AFTER_RESET ---help--- Enables support for the on-chip EHCI controller on FSL chips. + +config USB_EHCI_TXFIFO_THRESH + hex + depends on USB_EHCI_TEGRA + default 0x10 + help + This parameter affects a TXFILLTUNING field that controls how much + data is sent to the latency fifo before it is sent to the wire. + Without this parameter, the default (2) causes occasional Data Buffer + Errors in OUT packets depending on the buffer address and size. + endif # USB_EHCI_HCD config USB_OHCI_HCD diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h index 74208315894..87ec1f5a99d 100644 --- a/include/configs/tegra114-common.h +++ b/include/configs/tegra114-common.h @@ -55,7 +55,4 @@ /* Defines for SPL */ -/* For USB EHCI controller */ -#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 - #endif /* _TEGRA114_COMMON_H_ */ diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h index 314486a1bcb..f509784a868 100644 --- a/include/configs/tegra124-common.h +++ b/include/configs/tegra124-common.h @@ -57,9 +57,6 @@ /* Defines for SPL */ -/* For USB EHCI controller */ -#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 - /* GPU needs setup */ #define CONFIG_TEGRA_GPU diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index a2b14d8ead8..71867bb6baa 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -69,12 +69,4 @@ #define TEGRA_LP0_VEC #endif -/* - * This parameter affects a TXFILLTUNING field that controls how much data is - * sent to the latency fifo before it is sent to the wire. Without this - * parameter, the default (2) causes occasional Data Buffer Errors in OUT - * packets depending on the buffer address and size. - */ -#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 - #endif /* _TEGRA20_COMMON_H_ */ diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h index 3ba12bec0ee..e510820786e 100644 --- a/include/configs/tegra210-common.h +++ b/include/configs/tegra210-common.h @@ -46,9 +46,6 @@ "fdt_addr_r=0x83000000\0" \ "ramdisk_addr_r=0x83420000\0" -/* For USB EHCI controller */ -#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 - /* GPU needs setup */ #define CONFIG_TEGRA_GPU diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h index a68da5ddfc8..04fcf11ed82 100644 --- a/include/configs/tegra30-common.h +++ b/include/configs/tegra30-common.h @@ -52,7 +52,4 @@ /* Defines for SPL */ -/* For USB EHCI controller */ -#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 - #endif /* _TEGRA30_COMMON_H_ */ -- GitLab From cbee8c1ac220d8aa3364b65d30d3eb17099e130f Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 8 Jun 2022 08:24:32 -0400 Subject: [PATCH 400/581] usb: xhci-fsl: Remove non-DM code The deadline for DM_USB migration has passed and all users have been migrated. Remove now unused code. Signed-off-by: Tom Rini --- drivers/usb/host/xhci-fsl.c | 47 ------------------------------------ include/linux/usb/xhci-fsl.h | 17 ------------- 2 files changed, 64 deletions(-) diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c index 80871908dc1..e67e09e31e4 100644 --- a/drivers/usb/host/xhci-fsl.c +++ b/drivers/usb/host/xhci-fsl.c @@ -20,16 +20,11 @@ #include /* Declare global data pointer */ -#if !CONFIG_IS_ENABLED(DM_USB) -static struct fsl_xhci fsl_xhci; -unsigned long ctr_addr[] = FSL_USB_XHCI_ADDR; -#else struct xhci_fsl_priv { struct xhci_ctrl xhci; fdt_addr_t hcd_base; struct fsl_xhci ctx; }; -#endif __weak int __board_usb_init(int index, enum usb_init_type init) { @@ -108,7 +103,6 @@ static int fsl_xhci_core_exit(struct fsl_xhci *fsl_xhci) return 0; } -#if CONFIG_IS_ENABLED(DM_USB) static int xhci_fsl_probe(struct udevice *dev) { struct xhci_fsl_priv *priv = dev_get_priv(dev); @@ -174,44 +168,3 @@ U_BOOT_DRIVER(xhci_fsl) = { .priv_auto = sizeof(struct xhci_fsl_priv), .flags = DM_FLAG_ALLOC_PRIV_DMA, }; -#else -int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor) -{ - struct fsl_xhci *ctx = &fsl_xhci; - int ret = 0; - - ctx->hcd = (struct xhci_hccr *)ctr_addr[index]; - ctx->dwc3_reg = (struct dwc3 *)((char *)(ctx->hcd) + DWC3_REG_OFFSET); - - ret = board_usb_init(index, USB_INIT_HOST); - if (ret != 0) { - puts("Failed to initialize board for USB\n"); - return ret; - } - - fsl_apply_xhci_errata(); - - ret = fsl_xhci_core_init(ctx); - if (ret < 0) { - puts("Failed to initialize xhci\n"); - return ret; - } - - *hccr = (struct xhci_hccr *)ctx->hcd; - *hcor = (struct xhci_hcor *)((uintptr_t) *hccr - + HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); - - debug("fsl-xhci: init hccr %lx and hcor %lx hc_length %lx\n", - (uintptr_t)*hccr, (uintptr_t)*hcor, - (uintptr_t)HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); - - return ret; -} - -void xhci_hcd_stop(int index) -{ - struct fsl_xhci *ctx = &fsl_xhci; - - fsl_xhci_core_exit(ctx); -} -#endif diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h index 1367149c4ba..40979f72fc6 100644 --- a/include/linux/usb/xhci-fsl.h +++ b/include/linux/usb/xhci-fsl.h @@ -53,21 +53,4 @@ struct fsl_xhci { struct dwc3 *dwc3_reg; }; -#if defined(CONFIG_ARCH_LS1021A) || defined(CONFIG_ARCH_LS1012A) -#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR -#define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0 -#define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0 -#elif defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1088A) -#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR -#define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB2_ADDR -#define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0 -#elif defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) -#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR -#define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB2_ADDR -#define CONFIG_SYS_FSL_XHCI_USB3_ADDR CONFIG_SYS_XHCI_USB3_ADDR -#endif - -#define FSL_USB_XHCI_ADDR {CONFIG_SYS_FSL_XHCI_USB1_ADDR, \ - CONFIG_SYS_FSL_XHCI_USB2_ADDR, \ - CONFIG_SYS_FSL_XHCI_USB3_ADDR} #endif /* _ASM_ARCH_XHCI_FSL_H_ */ -- GitLab From 7ef53a3dc6dd3e7e2b66db52ab96feac2fe6b0dc Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 8 Jun 2022 08:24:33 -0400 Subject: [PATCH 401/581] Convert CONFIG_TEGRA_GPU to Kconfig This converts the following to Kconfig: CONFIG_TEGRA_GPU Signed-off-by: Tom Rini --- arch/arm/mach-tegra/Kconfig | 4 ++++ configs/apalis-tk1_defconfig | 1 + configs/cei-tk1-som_defconfig | 1 + configs/jetson-tk1_defconfig | 1 + configs/nyan-big_defconfig | 1 + configs/p2371-0000_defconfig | 1 + configs/p2371-2180_defconfig | 1 + configs/p2571_defconfig | 1 + configs/p3450-0000_defconfig | 1 + configs/venice2_defconfig | 1 + include/configs/tegra124-common.h | 3 --- include/configs/tegra210-common.h | 3 --- 12 files changed, 13 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 5309be9cc21..09ad2d6f5ae 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -178,6 +178,10 @@ source "arch/arm/mach-tegra/tegra124/Kconfig" source "arch/arm/mach-tegra/tegra210/Kconfig" source "arch/arm/mach-tegra/tegra186/Kconfig" +config TEGRA_GPU + bool "Enable setting up the GPU" + depends on TEGRA124 || TEGRA210 + config CMD_ENTERRCM bool "Enable 'enterrcm' command" default y diff --git a/configs/apalis-tk1_defconfig b/configs/apalis-tk1_defconfig index 0915bca6421..39ee46dbec7 100644 --- a/configs/apalis-tk1_defconfig +++ b/configs/apalis-tk1_defconfig @@ -10,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra124-apalis" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_TEGRA124=y CONFIG_TARGET_APALIS_TK1=y +CONFIG_TEGRA_GPU=y CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/cei-tk1-som_defconfig b/configs/cei-tk1-som_defconfig index f55848ab2c0..35f8d9c7817 100644 --- a/configs/cei-tk1-som_defconfig +++ b/configs/cei-tk1-som_defconfig @@ -10,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra124-cei-tk1-som" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_TEGRA124=y CONFIG_TARGET_CEI_TK1_SOM=y +CONFIG_TEGRA_GPU=y CONFIG_ARMV7_PSCI_0_1=y CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_OF_SYSTEM_SETUP=y diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig index b0c7ea3b994..515fa23b249 100644 --- a/configs/jetson-tk1_defconfig +++ b/configs/jetson-tk1_defconfig @@ -10,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra124-jetson-tk1" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_TEGRA124=y CONFIG_TARGET_JETSON_TK1=y +CONFIG_TEGRA_GPU=y CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig index 489ff63595c..a48920cc99d 100644 --- a/configs/nyan-big_defconfig +++ b/configs/nyan-big_defconfig @@ -13,6 +13,7 @@ CONFIG_DEBUG_UART_BASE=0x70006000 CONFIG_DEBUG_UART_CLOCK=408000000 CONFIG_TEGRA124=y CONFIG_TARGET_NYAN_BIG=y +CONFIG_TEGRA_GPU=y CONFIG_SYS_LOAD_ADDR=0x82408000 CONFIG_DEBUG_UART=y CONFIG_FIT=y diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig index d93b355d47d..dcba51de8e5 100644 --- a/configs/p2371-0000_defconfig +++ b/configs/p2371-0000_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2371-0000" CONFIG_TEGRA210=y +CONFIG_TEGRA_GPU=y CONFIG_SYS_LOAD_ADDR=0x80080000 CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig index 74125c15a87..f8a8407a7f8 100644 --- a/configs/p2371-2180_defconfig +++ b/configs/p2371-2180_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_OFFSET=0xFFFFE000 CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2371-2180" CONFIG_TEGRA210=y CONFIG_TARGET_P2371_2180=y +CONFIG_TEGRA_GPU=y CONFIG_SYS_LOAD_ADDR=0x80080000 CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig index b4e14add1d7..031549470f7 100644 --- a/configs/p2571_defconfig +++ b/configs/p2571_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_OFFSET=0xFFFFE000 CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2571" CONFIG_TEGRA210=y CONFIG_TARGET_P2571=y +CONFIG_TEGRA_GPU=y CONFIG_SYS_LOAD_ADDR=0x80080000 CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig index fbe4aea1bd3..7604e8a1223 100644 --- a/configs/p3450-0000_defconfig +++ b/configs/p3450-0000_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="tegra210-p3450-0000" CONFIG_TEGRA210=y CONFIG_TARGET_P3450_0000=y +CONFIG_TEGRA_GPU=y CONFIG_SYS_LOAD_ADDR=0x80080000 CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig index 25ee96a1ddf..db455f4d976 100644 --- a/configs/venice2_defconfig +++ b/configs/venice2_defconfig @@ -10,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra124-venice2" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_TEGRA124=y CONFIG_TARGET_VENICE2=y +CONFIG_TEGRA_GPU=y CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h index f509784a868..0485fea6ccb 100644 --- a/include/configs/tegra124-common.h +++ b/include/configs/tegra124-common.h @@ -57,7 +57,4 @@ /* Defines for SPL */ -/* GPU needs setup */ -#define CONFIG_TEGRA_GPU - #endif /* _TEGRA124_COMMON_H_ */ diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h index e510820786e..7f361d874af 100644 --- a/include/configs/tegra210-common.h +++ b/include/configs/tegra210-common.h @@ -46,7 +46,4 @@ "fdt_addr_r=0x83000000\0" \ "ramdisk_addr_r=0x83420000\0" -/* GPU needs setup */ -#define CONFIG_TEGRA_GPU - #endif /* _TEGRA210_COMMON_H_ */ -- GitLab From 0a4fcb2abceecb59d7e2b44d1c33ef07ffead803 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 8 Jun 2022 08:24:34 -0400 Subject: [PATCH 402/581] PowerPC: Remove some unused USB code These particular code paths aren't used anymore, remove. Signed-off-by: Tom Rini --- arch/powerpc/include/asm/immap_83xx.h | 22 ---------------------- board/freescale/p2041rdb/p2041rdb.c | 2 +- include/configs/P2041RDB.h | 5 ----- include/configs/corenet_ds.h | 5 ----- 4 files changed, 1 insertion(+), 33 deletions(-) diff --git a/arch/powerpc/include/asm/immap_83xx.h b/arch/powerpc/include/asm/immap_83xx.h index d2443dc90d5..6d1ddbcd27b 100644 --- a/arch/powerpc/include/asm/immap_83xx.h +++ b/arch/powerpc/include/asm/immap_83xx.h @@ -666,19 +666,6 @@ typedef struct immap { u8 res7[0xC0000]; } immap_t; -#ifndef CONFIG_ARCH_MPC834X -#ifdef CONFIG_HAS_FSL_MPH_USB -#define CONFIG_SYS_MPC83xx_USB1_OFFSET 0x22000 /* use the MPH controller */ -#define CONFIG_SYS_MPC83xx_USB2_OFFSET 0 -#else -#define CONFIG_SYS_MPC83xx_USB1_OFFSET 0 -#define CONFIG_SYS_MPC83xx_USB2_OFFSET 0x23000 /* use the DR controller */ -#endif -#else -#define CONFIG_SYS_MPC83xx_USB1_OFFSET 0x22000 -#define CONFIG_SYS_MPC83xx_USB2_OFFSET 0x23000 -#endif - #elif defined(CONFIG_ARCH_MPC8313) typedef struct immap { sysconf83xx_t sysconf; /* System configuration */ @@ -944,15 +931,6 @@ struct ccsr_gpio { #define CONFIG_SYS_MPC83xx_ESDHC_ADDR \ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_ESDHC_OFFSET) -#ifndef CONFIG_SYS_MPC83xx_USB1_OFFSET -#define CONFIG_SYS_MPC83xx_USB1_OFFSET 0x23000 -#endif -#define CONFIG_SYS_MPC83xx_USB1_ADDR \ - (CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_USB1_OFFSET) -#if defined(CONFIG_ARCH_MPC834X) -#define CONFIG_SYS_MPC83xx_USB2_ADDR \ - (CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_USB2_OFFSET) -#endif #define CONFIG_SYS_LBC_ADDR (&((immap_t *)CONFIG_SYS_IMMR)->im_lbc) #define CONFIG_SYS_TSEC1_OFFSET 0x24000 diff --git a/board/freescale/p2041rdb/p2041rdb.c b/board/freescale/p2041rdb/p2041rdb.c index 5bd2b995060..2a84e9bdf55 100644 --- a/board/freescale/p2041rdb/p2041rdb.c +++ b/board/freescale/p2041rdb/p2041rdb.c @@ -229,7 +229,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) fdt_fixup_memory(blob, (u64)base, (u64)size); -#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB) +#if defined(CONFIG_HAS_FSL_DR_USB) fsl_fdt_fixup_dr_usb(blob, bd); #endif diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 261e9872a7a..38acb38690d 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -373,11 +373,6 @@ #define CONFIG_LOADS_ECHO /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ -/* -* USB -*/ -#define CONFIG_HAS_FSL_MPH_USB - #ifdef CONFIG_MMC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index ce9e5117058..56b56e8a2e2 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -371,11 +371,6 @@ #define CONFIG_LOADS_ECHO /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ -/* -* USB -*/ -#define CONFIG_HAS_FSL_MPH_USB - #ifdef CONFIG_MMC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT -- GitLab From 13750af0382cfde00a2a911bf44d132d9835cec9 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 8 Jun 2022 08:24:35 -0400 Subject: [PATCH 403/581] usb: ehci-mxc: Remove There are no platforms enabling this driver, remove. Signed-off-by: Tom Rini --- drivers/usb/host/Makefile | 1 - drivers/usb/host/ehci-mxc.c | 148 ------------------------------------ 2 files changed, 149 deletions(-) delete mode 100644 drivers/usb/host/ehci-mxc.c diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index 7785b3744ef..5fdb8041167 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -30,7 +30,6 @@ obj-$(CONFIG_USB_EHCI_FSL) += ehci-fsl.o obj-$(CONFIG_USB_EHCI_FARADAY) += ehci-faraday.o obj-$(CONFIG_USB_EHCI_GENERIC) += ehci-generic.o obj-$(CONFIG_USB_EHCI_EXYNOS) += ehci-exynos.o -obj-$(CONFIG_USB_EHCI_MXC) += ehci-mxc.o obj-$(CONFIG_USB_EHCI_MXS) += ehci-mxs.o obj-$(CONFIG_USB_EHCI_MX5) += ehci-mx5.o obj-$(CONFIG_USB_EHCI_MX6) += ehci-mx6.o diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c deleted file mode 100644 index 1fb685e58d8..00000000000 --- a/drivers/usb/host/ehci-mxc.c +++ /dev/null @@ -1,148 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (c) 2009 Daniel Mack - */ - - -#include -#include -#include -#include -#include -#include -#include - -#include "ehci.h" - -#define USBCTRL_OTGBASE_OFFSET 0x600 - -#define MX25_OTG_SIC_SHIFT 29 -#define MX25_OTG_SIC_MASK (0x3 << MX25_OTG_SIC_SHIFT) -#define MX25_OTG_PM_BIT (1 << 24) -#define MX25_OTG_PP_BIT (1 << 11) -#define MX25_OTG_OCPOL_BIT (1 << 3) - -#define MX25_H1_SIC_SHIFT 21 -#define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT) -#define MX25_H1_PP_BIT (1 << 18) -#define MX25_H1_PM_BIT (1 << 16) -#define MX25_H1_IPPUE_UP_BIT (1 << 7) -#define MX25_H1_IPPUE_DOWN_BIT (1 << 6) -#define MX25_H1_TLL_BIT (1 << 5) -#define MX25_H1_USBTE_BIT (1 << 4) -#define MX25_H1_OCPOL_BIT (1 << 2) - -#define MX31_OTG_SIC_SHIFT 29 -#define MX31_OTG_SIC_MASK (0x3 << MX31_OTG_SIC_SHIFT) -#define MX31_OTG_PM_BIT (1 << 24) - -#define MX31_H2_SIC_SHIFT 21 -#define MX31_H2_SIC_MASK (0x3 << MX31_H2_SIC_SHIFT) -#define MX31_H2_PM_BIT (1 << 16) -#define MX31_H2_DT_BIT (1 << 5) - -#define MX31_H1_SIC_SHIFT 13 -#define MX31_H1_SIC_MASK (0x3 << MX31_H1_SIC_SHIFT) -#define MX31_H1_PM_BIT (1 << 8) -#define MX31_H1_DT_BIT (1 << 4) - -#define MX35_OTG_SIC_SHIFT 29 -#define MX35_OTG_SIC_MASK (0x3 << MX35_OTG_SIC_SHIFT) -#define MX35_OTG_PM_BIT (1 << 24) -#define MX35_OTG_PP_BIT (1 << 11) -#define MX35_OTG_OCPOL_BIT (1 << 3) - -#define MX35_H1_SIC_SHIFT 21 -#define MX35_H1_SIC_MASK (0x3 << MX35_H1_SIC_SHIFT) -#define MX35_H1_PP_BIT (1 << 18) -#define MX35_H1_PM_BIT (1 << 16) -#define MX35_H1_IPPUE_UP_BIT (1 << 7) -#define MX35_H1_IPPUE_DOWN_BIT (1 << 6) -#define MX35_H1_TLL_BIT (1 << 5) -#define MX35_H1_USBTE_BIT (1 << 4) -#define MX35_H1_OCPOL_BIT (1 << 2) - -static int mxc_set_usbcontrol(int port, unsigned int flags) -{ - unsigned int v; - - v = readl(IMX_USB_BASE + USBCTRL_OTGBASE_OFFSET); -#if defined(CONFIG_MX31) - switch (port) { - case 0: /* OTG port */ - v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT); - v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_OTG_SIC_SHIFT; - - if (!(flags & MXC_EHCI_POWER_PINS_ENABLED)) - v |= MX31_OTG_PM_BIT; - - break; - case 1: /* H1 port */ - v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT | MX31_H1_DT_BIT); - v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_H1_SIC_SHIFT; - - if (!(flags & MXC_EHCI_POWER_PINS_ENABLED)) - v |= MX31_H1_PM_BIT; - - if (!(flags & MXC_EHCI_TTL_ENABLED)) - v |= MX31_H1_DT_BIT; - - break; - case 2: /* H2 port */ - v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT | MX31_H2_DT_BIT); - v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_H2_SIC_SHIFT; - - if (!(flags & MXC_EHCI_POWER_PINS_ENABLED)) - v |= MX31_H2_PM_BIT; - - if (!(flags & MXC_EHCI_TTL_ENABLED)) - v |= MX31_H2_DT_BIT; - - break; - default: - return -EINVAL; - } -#else -#error MXC EHCI USB driver not supported on this platform -#endif - writel(v, IMX_USB_BASE + USBCTRL_OTGBASE_OFFSET); - - return 0; -} - -int ehci_hcd_init(int index, enum usb_init_type init, - struct ehci_hccr **hccr, struct ehci_hcor **hcor) -{ - struct usb_ehci *ehci; -#ifdef CONFIG_MX31 - struct clock_control_regs *sc_regs = - (struct clock_control_regs *)CCM_BASE; - - __raw_readl(&sc_regs->ccmr); - __raw_writel(__raw_readl(&sc_regs->ccmr) | (1 << 9), &sc_regs->ccmr) ; -#endif - - udelay(80); - - ehci = (struct usb_ehci *)(IMX_USB_BASE + - IMX_USB_PORT_OFFSET * CONFIG_MXC_USB_PORT); - *hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength); - *hcor = (struct ehci_hcor *)((uint32_t) *hccr + - HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); - setbits_le32(&ehci->usbmode, CM_HOST); - __raw_writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc); - mxc_set_usbcontrol(CONFIG_MXC_USB_PORT, CONFIG_MXC_USB_FLAGS); - - udelay(10000); - - return 0; -} - -/* - * Destroy the appropriate control structures corresponding - * the the EHCI host controller. - */ -int ehci_hcd_stop(int index) -{ - return 0; -} -- GitLab From 49958813e2bfa869494ab49ac10523023a333911 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 8 Jun 2022 08:24:36 -0400 Subject: [PATCH 404/581] usb: ehci-mx5: Remove non-DM code The deadline for DM_USB migration has passed and all users have been migrated. Remove now unused code. Signed-off-by: Tom Rini --- drivers/usb/host/ehci-mx5.c | 47 ------------------------------------- 1 file changed, 47 deletions(-) diff --git a/drivers/usb/host/ehci-mx5.c b/drivers/usb/host/ehci-mx5.c index ab863f41b24..964a53bb7c0 100644 --- a/drivers/usb/host/ehci-mx5.c +++ b/drivers/usb/host/ehci-mx5.c @@ -228,52 +228,6 @@ __weak void mx5_ehci_powerup_fixup(struct ehci_ctrl *ctrl, uint32_t *status_reg, mdelay(50); } -#if !CONFIG_IS_ENABLED(DM_USB) -static const struct ehci_ops mx5_ehci_ops = { - .powerup_fixup = mx5_ehci_powerup_fixup, -}; - -int ehci_hcd_init(int index, enum usb_init_type init, - struct ehci_hccr **hccr, struct ehci_hcor **hcor) -{ - struct usb_ehci *ehci; - - /* The only user for this is efikamx-usb */ - ehci_set_controller_priv(index, NULL, &mx5_ehci_ops); - set_usboh3_clk(); - enable_usboh3_clk(true); - set_usb_phy_clk(); - enable_usb_phy1_clk(true); - enable_usb_phy2_clk(true); - mdelay(1); - - /* Do board specific initialization */ - board_ehci_hcd_init(CONFIG_MXC_USB_PORT); - - ehci = (struct usb_ehci *)(OTG_BASE_ADDR + - (0x200 * CONFIG_MXC_USB_PORT)); - *hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength); - *hcor = (struct ehci_hcor *)((uint32_t)*hccr + - HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); - setbits_le32(&ehci->usbmode, CM_HOST); - - __raw_writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc); - setbits_le32(&ehci->portsc, USB_EN); - - mxc_set_usbcontrol(CONFIG_MXC_USB_PORT, CONFIG_MXC_USB_FLAGS); - mdelay(10); - - /* Do board specific post-initialization */ - board_ehci_hcd_postinit(ehci, CONFIG_MXC_USB_PORT); - - return 0; -} - -int ehci_hcd_stop(int index) -{ - return 0; -} -#else /* CONFIG_IS_ENABLED(DM_USB) */ struct ehci_mx5_priv_data { struct ehci_ctrl ctrl; struct usb_ehci *ehci; @@ -372,4 +326,3 @@ U_BOOT_DRIVER(usb_mx5) = { .priv_auto = sizeof(struct ehci_mx5_priv_data), .flags = DM_FLAG_ALLOC_PRIV_DMA, }; -#endif /* !CONFIG_IS_ENABLED(DM_USB) */ -- GitLab From 5858b90f506e1d3b03afd9dc5f6a5835c2d81675 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 8 Jun 2022 08:24:37 -0400 Subject: [PATCH 405/581] spl: Move SPL_LDSCRIPT defaults to one place We want to keep all of the default values for SPL_LDSCRIPT in the same place both for overall clarity as well as not polluting unrelated config files. Signed-off-by: Tom Rini --- arch/arm/Kconfig | 10 ---------- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 3 --- arch/arm/mach-at91/Kconfig | 4 ---- arch/arm/mach-davinci/Kconfig | 3 --- arch/arm/mach-exynos/Kconfig | 3 --- arch/arm/mach-omap2/Kconfig | 3 --- arch/arm/mach-rockchip/rk3368/Kconfig | 3 --- arch/arm/mach-sunxi/Kconfig | 4 ---- arch/arm/mach-zynq/Kconfig | 3 --- board/ti/am64x/Kconfig | 3 --- board/ti/am65x/Kconfig | 3 --- board/ti/j721e/Kconfig | 6 ------ board/ti/j721s2/Kconfig | 3 --- common/spl/Kconfig | 12 ++++++++++++ 14 files changed, 12 insertions(+), 51 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index dab785efad5..e682d65e512 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -996,11 +996,6 @@ config ARCH_MX6 imply SYS_THUMB_BUILD imply SPL_SEPARATE_BSS -if ARCH_MX6 -config SPL_LDSCRIPT - default "arch/arm/mach-omap2/u-boot-spl.lds" -endif - config ARCH_MX5 bool "Freescale MX5" select BOARD_EARLY_INIT_F @@ -2368,8 +2363,3 @@ source "board/xen/xenguest_arm64/Kconfig" source "arch/arm/Kconfig.debug" endmenu - -config SPL_LDSCRIPT - default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK - default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136 - default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64 diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 80a1642447d..5a809b46118 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -701,9 +701,6 @@ config SYS_FSL_HAS_RGMII bool depends on SYS_FSL_EC1 || SYS_FSL_EC2 -config SPL_LDSCRIPT - default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARCH_LS1043A || ARCH_LS1046A || ARCH_LS2080A - config HAS_FSL_XHCI_USB bool help diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 4fee9772bf1..11bfd5afe74 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -377,8 +377,4 @@ source "board/siemens/corvus/Kconfig" source "board/siemens/taurus/Kconfig" source "board/siemens/smartweb/Kconfig" -config SPL_LDSCRIPT - default "arch/arm/mach-at91/arm926ejs/u-boot-spl.lds" if CPU_ARM926EJS - default "arch/arm/mach-at91/armv7/u-boot-spl.lds" if CPU_V7A - endif diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig index 6eca8db6d5f..25c5db49915 100644 --- a/arch/arm/mach-davinci/Kconfig +++ b/arch/arm/mach-davinci/Kconfig @@ -134,7 +134,4 @@ endif source "board/davinci/da8xxevm/Kconfig" source "board/lego/ev3/Kconfig" -config SPL_LDSCRIPT - default "board/davinci/da8xxevm/u-boot-spl-da850evm.lds" - endif diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index f73dbbb507d..77fb9d1775b 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -201,7 +201,4 @@ source "board/samsung/smdk5420/Kconfig" source "board/samsung/espresso7420/Kconfig" source "board/samsung/axy17lte/Kconfig" -config SPL_LDSCRIPT - default "board/samsung/common/exynos-uboot-spl.lds" if ARCH_EXYNOS5 || ARCH_EXYNOS4 - endif diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index e1b9180a3bb..51d1db4a87b 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -190,7 +190,4 @@ source "board/compulab/cm_t335/Kconfig" source "board/compulab/cm_t43/Kconfig" source "board/phytec/phycore_am335x_r2/Kconfig" -config SPL_LDSCRIPT - default "arch/arm/mach-omap2/u-boot-spl.lds" - endif diff --git a/arch/arm/mach-rockchip/rk3368/Kconfig b/arch/arm/mach-rockchip/rk3368/Kconfig index 25afd3cb607..c3249a7be45 100644 --- a/arch/arm/mach-rockchip/rk3368/Kconfig +++ b/arch/arm/mach-rockchip/rk3368/Kconfig @@ -65,9 +65,6 @@ source "board/rockchip/sheep_rk3368/Kconfig" source "board/geekbuying/geekbox/Kconfig" source "board/rockchip/evb_px5/Kconfig" -config SPL_LDSCRIPT - default "arch/arm/cpu/armv8/u-boot-spl.lds" - config SPL_STACK_R_ADDR default 0x04000000 diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index e712a895340..71a7f8dcee0 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -1,9 +1,5 @@ if ARCH_SUNXI -config SPL_LDSCRIPT - default "arch/arm/cpu/arm926ejs/sunxi/u-boot-spl.lds" if MACH_SUNIV - default "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" if !ARM64 - config IDENT_STRING default " Allwinner Technology" diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig index cf2e727916b..b4c439b4cd6 100644 --- a/arch/arm/mach-zynq/Kconfig +++ b/arch/arm/mach-zynq/Kconfig @@ -1,8 +1,5 @@ if ARCH_ZYNQ -config SPL_LDSCRIPT - default "arch/arm/mach-zynq/u-boot-spl.lds" - config SPL_FS_FAT default y diff --git a/board/ti/am64x/Kconfig b/board/ti/am64x/Kconfig index d4ec759d7f9..8036947e345 100644 --- a/board/ti/am64x/Kconfig +++ b/board/ti/am64x/Kconfig @@ -54,9 +54,6 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "am64x_evm" -config SPL_LDSCRIPT - default "arch/arm/mach-omap2/u-boot-spl.lds" - source "board/ti/common/Kconfig" endif diff --git a/board/ti/am65x/Kconfig b/board/ti/am65x/Kconfig index 47b41cd6afe..16a7476d9c4 100644 --- a/board/ti/am65x/Kconfig +++ b/board/ti/am65x/Kconfig @@ -53,9 +53,6 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "am65x_evm" -config SPL_LDSCRIPT - default "arch/arm/mach-omap2/u-boot-spl.lds" - source "board/ti/common/Kconfig" endif diff --git a/board/ti/j721e/Kconfig b/board/ti/j721e/Kconfig index c28752a658b..d19d30d59ef 100644 --- a/board/ti/j721e/Kconfig +++ b/board/ti/j721e/Kconfig @@ -75,9 +75,6 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "j721e_evm" -config SPL_LDSCRIPT - default "arch/arm/mach-omap2/u-boot-spl.lds" - source "board/ti/common/Kconfig" endif @@ -108,9 +105,6 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "j721e_evm" -config SPL_LDSCRIPT - default "arch/arm/mach-omap2/u-boot-spl.lds" - source "board/ti/common/Kconfig" endif diff --git a/board/ti/j721s2/Kconfig b/board/ti/j721s2/Kconfig index 2e115f14171..6141798333c 100644 --- a/board/ti/j721s2/Kconfig +++ b/board/ti/j721s2/Kconfig @@ -55,9 +55,6 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "j721s2_evm" -config SPL_LDSCRIPT - default "arch/arm/mach-omap2/u-boot-spl.lds" - source "board/ti/common/Kconfig" endif diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 2ad2351c6eb..42f2c95228a 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -221,6 +221,18 @@ config SPL_HANDOFF config SPL_LDSCRIPT string "Linker script for the SPL stage" + default "arch/arm/cpu/arm926ejs/sunxi/u-boot-spl.lds" if MACH_SUNIV + default "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" if ARCH_SUNXI && !MACH_SUNIV && !ARM64 + default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK + default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136 + default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARCH_LS1043A || ARCH_LS1046A || ARCH_LS2080A + default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64 + default "arch/arm/mach-at91/arm926ejs/u-boot-spl.lds" if ARCH_AT91 && CPU_ARM926EJS + default "arch/arm/mach-at91/armv7/u-boot-spl.lds" if ARCH_AT91 && CPU_V7A + default "arch/arm/mach-omap2/u-boot-spl.lds" if ARCH_MX6 || ARCH_OMAP2PLUS || (ARCH_K3 && !ARM64) + default "arch/arm/mach-zynq/u-boot-spl.lds" if ARCH_ZYNQ + default "board/samsung/common/exynos-uboot-spl.lds" if ARCH_EXYNOS5 || ARCH_EXYNOS4 + default "board/davinci/da8xxevm/u-boot-spl-da850evm.lds" if ARCH_DAVINCI default "arch/\$(ARCH)/cpu/u-boot-spl.lds" help The SPL stage will usually require a different linker-script -- GitLab From 8bea4bf7d31d2ab8a4a0162755b79a4a59a90dcd Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 8 Jun 2022 08:24:39 -0400 Subject: [PATCH 406/581] tpl: Ensure all TPL symbols in Kconfig have some TPL dependency MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Tighten up symbol dependencies in a number of places. Ensure that a TPL specific option has at least a direct dependency on TPL. In places where it's clear that we depend on something more specific, use that dependency instead. Reported-by: Pali Rohár Signed-off-by: Tom Rini --- arch/x86/Kconfig | 1 + boot/Kconfig | 2 +- common/Kconfig | 3 ++- drivers/core/Kconfig | 2 +- drivers/power/acpi_pmc/Kconfig | 1 + drivers/ram/Kconfig | 2 +- lib/Kconfig | 3 ++- 7 files changed, 9 insertions(+), 5 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 7cbfd6c9720..1ac43e98bb6 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -956,6 +956,7 @@ config SPL_ACPI_GPE config TPL_ACPI_GPE bool "Support ACPI general-purpose events in TPL" + depends on TPL help Enable a driver for ACPI GPEs to allow peripherals to send interrupts via ACPI to the OS. In U-Boot this is only used when U-Boot itself diff --git a/boot/Kconfig b/boot/Kconfig index 08451c65a56..38fc71c6f79 100644 --- a/boot/Kconfig +++ b/boot/Kconfig @@ -622,7 +622,7 @@ config SPL_BOOTSTAGE config TPL_BOOTSTAGE bool "Boot timing and reported in TPL" - depends on BOOTSTAGE + depends on BOOTSTAGE && TPL help Enable recording of boot time in SPL. To make this visible to U-Boot proper, enable BOOTSTAGE_STASH as well. This will stash the timing diff --git a/common/Kconfig b/common/Kconfig index 84db2e43f15..e3a57e20820 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -87,6 +87,7 @@ config SPL_LOGLEVEL config TPL_LOGLEVEL int + depends on TPL default LOGLEVEL config VPL_LOGLEVEL @@ -408,7 +409,7 @@ endif config TPL_LOG bool "Enable logging support in TPL" - depends on LOG + depends on LOG && TPL help This enables support for logging of status and debug messages. These can be displayed on the console, recorded in a memory buffer, or diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig index 9b9a7148a1a..d3fe1d4093d 100644 --- a/drivers/core/Kconfig +++ b/drivers/core/Kconfig @@ -224,7 +224,7 @@ config SPL_SYSCON config TPL_SYSCON bool "Support system controllers in TPL" - depends on SPL_REGMAP + depends on TPL_REGMAP help Many SoCs have a number of system controllers which are dealt with as a group by a single driver. Some common functionality is provided diff --git a/drivers/power/acpi_pmc/Kconfig b/drivers/power/acpi_pmc/Kconfig index fcd50e36cad..355d1618c61 100644 --- a/drivers/power/acpi_pmc/Kconfig +++ b/drivers/power/acpi_pmc/Kconfig @@ -17,6 +17,7 @@ config SPL_ACPI_PMC config TPL_ACPI_PMC bool "Power Manager (x86 PMC) support in TPL" + depends on TPL default y if ACPI_PMC help Enable support for an x86-style power-management controller which diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig index a4f9f1aad2a..7c346180bae 100644 --- a/drivers/ram/Kconfig +++ b/drivers/ram/Kconfig @@ -19,7 +19,7 @@ config SPL_RAM config TPL_RAM bool "Enable RAM support in TPL" - depends on RAM + depends on RAM && TPL help The RAM subsystem adds a small amount of overhead to the image. If this is acceptable and you have a need to use RAM drivers in diff --git a/lib/Kconfig b/lib/Kconfig index 884569f9b15..ccbc52de894 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -248,6 +248,7 @@ config SPL_TINY_MEMSET config TPL_TINY_MEMSET bool "Use a very small memset() in TPL" + depends on TPL help The faster memset() is the arch-specific one (if available) enabled by CONFIG_USE_ARCH_MEMSET. If that is not enabled, we can still get @@ -771,7 +772,7 @@ config TPL_OF_LIBFDT config TPL_OF_LIBFDT_ASSUME_MASK hex "Mask of conditions to assume for libfdt" - depends on TPL_OF_LIBFDT || FIT + depends on TPL_OF_LIBFDT || (FIT && TPL) default 0xff help Use this to change the assumptions made by libfdt in TPL about the -- GitLab From 13ce351b9a292a758415ef8eba3c349c28cf4697 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 8 Jun 2022 08:24:40 -0400 Subject: [PATCH 407/581] vpl: Ensure all VPL symbols in Kconfig have some VPL dependency MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Tighten up symbol dependencies in a number of places. Ensure that a VPL specific option has at least a direct dependency on VPL. In places where it's clear that we depend on something more specific, use that dependency instead. Reported-by: Pali Rohár Signed-off-by: Tom Rini --- common/Kconfig | 12 ++---------- dts/Kconfig | 1 + lib/Kconfig | 3 ++- 3 files changed, 5 insertions(+), 11 deletions(-) diff --git a/common/Kconfig b/common/Kconfig index e3a57e20820..f08a8e7493d 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -92,6 +92,7 @@ config TPL_LOGLEVEL config VPL_LOGLEVEL int "loglevel for VPL" + depends on VPL default LOGLEVEL help All Messages with a loglevel smaller than the console loglevel will @@ -272,15 +273,6 @@ config LOG if LOG -config VPL_LOG - bool "Enable logging support in VPL" - depends on LOG - help - This enables support for logging of status and debug messages. These - can be displayed on the console, recorded in a memory buffer, or - discarded if not needed. Logging supports various categories and - levels of severity. - config LOG_MAX_LEVEL int "Maximum log level to record" default 6 @@ -452,7 +444,7 @@ endif config VPL_LOG bool "Enable logging support in VPL" - depends on LOG + depends on LOG && VPL help This enables support for logging of status and debug messages. These can be displayed on the console, recorded in a memory buffer, or diff --git a/dts/Kconfig b/dts/Kconfig index f1d05cc0803..bc5f22029ff 100644 --- a/dts/Kconfig +++ b/dts/Kconfig @@ -534,6 +534,7 @@ endif config VPL_OF_REAL def_bool y + depends on VPL help Indicates that a real devicetree is available which can be accessed at runtime. This means that dev_read_...() functions can be used to diff --git a/lib/Kconfig b/lib/Kconfig index ccbc52de894..c9f9ddce7d0 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -783,6 +783,7 @@ config TPL_OF_LIBFDT_ASSUME_MASK config VPL_OF_LIBFDT bool "Enable the FDT library for VPL" + depends on VPL default y if VPL_OF_CONTROL && !VPL_OF_PLATDATA help This enables the FDT library (libfdt). It provides functions for @@ -793,7 +794,7 @@ config VPL_OF_LIBFDT config VPL_OF_LIBFDT_ASSUME_MASK hex "Mask of conditions to assume for libfdt" - depends on VPL_OF_LIBFDT || FIT + depends on VPL_OF_LIBFDT || (FIT && VPL) default 0xff help Use this to change the assumptions made by libfdt in SPL about the -- GitLab From d64d338fcc3e9d6d32c6ced3bd84831337df7e7b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 10 Jun 2022 22:59:24 -0400 Subject: [PATCH 408/581] xtensa: Switch to using CONFIG_XTENSA for building device trees The only use of CONFIG_XTFPGA was to build all of the in-tree device trees. Switch to using CONFIG_XTENSA instead of a non-Kconfig symbol. Signed-off-by: Tom Rini --- arch/xtensa/dts/Makefile | 2 +- include/configs/xtfpga.h | 6 ------ 2 files changed, 1 insertion(+), 7 deletions(-) diff --git a/arch/xtensa/dts/Makefile b/arch/xtensa/dts/Makefile index fbbdefaf2cf..c22c50ac4e5 100644 --- a/arch/xtensa/dts/Makefile +++ b/arch/xtensa/dts/Makefile @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0+ -dtb-$(CONFIG_XTFPGA) += ml605.dtb ml605_nommu.dtb kc705.dtb kc705_nommu.dtb +dtb-$(CONFIG_XTENSA) += ml605.dtb ml605_nommu.dtb kc705.dtb kc705_nommu.dtb include $(srctree)/scripts/Makefile.dts diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h index 7392582b5e4..f1ea4765467 100644 --- a/include/configs/xtfpga.h +++ b/include/configs/xtfpga.h @@ -16,12 +16,6 @@ * differences. */ -/*=====================*/ -/* Board and Processor */ -/*=====================*/ - -#define CONFIG_XTFPGA - /*===================*/ /* RAM Layout */ /*===================*/ -- GitLab From 7b976f7a0b5ab18e3671d683f8092d7ddb0622b5 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 10 Jun 2022 22:59:25 -0400 Subject: [PATCH 409/581] ata: dwc_ahsata: Remove legacy non-CONFIG_AHCI code The migration deadline for this has passed and all boards have been updated, remove this legacy code and references for it. Signed-off-by: Tom Rini --- drivers/ata/dwc_ahsata.c | 133 ----------------------------------- include/configs/cm_fx6.h | 2 - include/configs/ge_bx50v3.h | 2 - include/configs/gw_ventana.h | 2 - include/configs/m53menlo.h | 2 - include/configs/mx53loco.h | 2 - include/configs/mx6cuboxi.h | 2 - include/configs/nitrogen6x.h | 2 - include/configs/tbs2910.h | 2 - include/configs/wandboard.h | 2 - 10 files changed, 151 deletions(-) diff --git a/drivers/ata/dwc_ahsata.c b/drivers/ata/dwc_ahsata.c index d9fd850c6fa..1a2c3c2fe70 100644 --- a/drivers/ata/dwc_ahsata.c +++ b/drivers/ata/dwc_ahsata.c @@ -844,138 +844,6 @@ static ulong sata_write_common(struct ahci_uc_priv *uc_priv, return rc; } -#if !CONFIG_IS_ENABLED(AHCI) -static int ahci_init_one(int pdev) -{ - int rc; - struct ahci_uc_priv *uc_priv = NULL; - - uc_priv = malloc(sizeof(struct ahci_uc_priv)); - if (!uc_priv) - return -ENOMEM; - - memset(uc_priv, 0, sizeof(struct ahci_uc_priv)); - uc_priv->dev = pdev; - - uc_priv->host_flags = ATA_FLAG_SATA - | ATA_FLAG_NO_LEGACY - | ATA_FLAG_MMIO - | ATA_FLAG_PIO_DMA - | ATA_FLAG_NO_ATAPI; - - uc_priv->mmio_base = (void __iomem *)CONFIG_DWC_AHSATA_BASE_ADDR; - - /* initialize adapter */ - rc = ahci_host_init(uc_priv); - if (rc) - goto err_out; - - ahci_print_info(uc_priv); - - /* Save the uc_private struct to block device struct */ - sata_dev_desc[pdev].priv = uc_priv; - - return 0; - -err_out: - if (uc_priv) - free(uc_priv); - return rc; -} - -int init_sata(int dev) -{ - struct ahci_uc_priv *uc_priv = NULL; - -#if defined(CONFIG_MX6) - if (!is_mx6dq() && !is_mx6dqp()) - return 1; -#endif - if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1)) { - printf("The sata index %d is out of ranges\n\r", dev); - return -1; - } - - ahci_init_one(dev); - - uc_priv = sata_dev_desc[dev].priv; - - return dwc_ahci_start_ports(uc_priv) ? 1 : 0; -} - -int reset_sata(int dev) -{ - struct ahci_uc_priv *uc_priv; - struct sata_host_regs *host_mmio; - - if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1)) { - printf("The sata index %d is out of ranges\n\r", dev); - return -1; - } - - uc_priv = sata_dev_desc[dev].priv; - if (NULL == uc_priv) - /* not initialized, so nothing to reset */ - return 0; - - host_mmio = uc_priv->mmio_base; - setbits_le32(&host_mmio->ghc, SATA_HOST_GHC_HR); - while (readl(&host_mmio->ghc) & SATA_HOST_GHC_HR) - udelay(100); - - free(uc_priv); - memset(&sata_dev_desc[dev], 0, sizeof(struct blk_desc)); - - return 0; -} - -int sata_port_status(int dev, int port) -{ - struct sata_port_regs *port_mmio; - struct ahci_uc_priv *uc_priv = NULL; - - if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1)) - return -EINVAL; - - if (sata_dev_desc[dev].priv == NULL) - return -ENODEV; - - uc_priv = sata_dev_desc[dev].priv; - port_mmio = uc_priv->port[port].port_mmio; - - return readl(&port_mmio->ssts) & SATA_PORT_SSTS_DET_MASK; -} - -/* - * SATA interface between low level driver and command layer - */ -ulong sata_read(int dev, ulong blknr, lbaint_t blkcnt, void *buffer) -{ - struct ahci_uc_priv *uc_priv = sata_dev_desc[dev].priv; - - return sata_read_common(uc_priv, &sata_dev_desc[dev], blknr, blkcnt, - buffer); -} - -ulong sata_write(int dev, ulong blknr, lbaint_t blkcnt, const void *buffer) -{ - struct ahci_uc_priv *uc_priv = sata_dev_desc[dev].priv; - - return sata_write_common(uc_priv, &sata_dev_desc[dev], blknr, blkcnt, - buffer); -} - -int scan_sata(int dev) -{ - struct ahci_uc_priv *uc_priv = sata_dev_desc[dev].priv; - struct blk_desc *pdev = &sata_dev_desc[dev]; - - return dwc_ahsata_scan_common(uc_priv, pdev); -} -#endif /* CONFIG_IS_ENABLED(AHCI) */ - -#if CONFIG_IS_ENABLED(AHCI) - int dwc_ahsata_port_status(struct udevice *dev, int port) { struct ahci_uc_priv *uc_priv = dev_get_uclass_priv(dev); @@ -1109,4 +977,3 @@ U_BOOT_DRIVER(dwc_ahsata_ahci) = { .probe = dwc_ahsata_probe, }; #endif -#endif diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 07ad6fde28d..a0bbb409cff 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -151,8 +151,6 @@ /* SATA */ #define CONFIG_LBA48 -#define CONFIG_DWC_AHSATA_PORT_ID 0 -#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR /* Boot */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index 74a2eaa7896..66ea80982b6 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -19,8 +19,6 @@ /* SATA Configs */ #ifdef CONFIG_CMD_SATA -#define CONFIG_DWC_AHSATA_PORT_ID 0 -#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR #define CONFIG_LBA48 #endif diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 6aa6c6262e3..53954cee3b3 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -32,8 +32,6 @@ * SATA Configs */ #ifdef CONFIG_CMD_SATA - #define CONFIG_DWC_AHSATA_PORT_ID 0 - #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR #define CONFIG_LBA48 #endif diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index ed44f355da8..66230f0bf17 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -86,8 +86,6 @@ * SATA */ #ifdef CONFIG_CMD_SATA -#define CONFIG_DWC_AHSATA_PORT_ID 0 -#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR #define CONFIG_LBA48 #endif diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 0268a48c86f..0afd68b880e 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -101,8 +101,6 @@ #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) #ifdef CONFIG_CMD_SATA - #define CONFIG_DWC_AHSATA_PORT_ID 0 - #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR #define CONFIG_LBA48 #endif diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h index 76fbbf42daf..5b4fbba023f 100644 --- a/include/configs/mx6cuboxi.h +++ b/include/configs/mx6cuboxi.h @@ -18,8 +18,6 @@ /* SATA Configuration */ #ifdef CONFIG_CMD_SATA -#define CONFIG_DWC_AHSATA_PORT_ID 0 -#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR #define CONFIG_LBA48 #endif diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 72f2dfb5dac..9b84c36f514 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -23,8 +23,6 @@ * SATA Configs */ #ifdef CONFIG_CMD_SATA -#define CONFIG_DWC_AHSATA_PORT_ID 0 -#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR #define CONFIG_LBA48 #endif diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index 22a7407a469..293ca467461 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -33,8 +33,6 @@ /* SATA */ #ifdef CONFIG_CMD_SATA -#define CONFIG_DWC_AHSATA_PORT_ID 0 -#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR #define CONFIG_LBA48 #define CONFIG_SYS_64BIT_LBA #endif diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index d4224127146..eb0778d072a 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -17,8 +17,6 @@ /* SATA Configs */ #ifdef CONFIG_CMD_SATA -#define CONFIG_DWC_AHSATA_PORT_ID 0 -#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR #define CONFIG_LBA48 #endif -- GitLab From 21af94f882b764353b781c8a4569961124189e0b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 10 Jun 2022 22:59:26 -0400 Subject: [PATCH 410/581] ata: fsl_sata: Remove legacy non-BLK code The migration deadline for this has passed and all boards have been updated, remove this legacy code and references for it. Signed-off-by: Tom Rini --- drivers/ata/fsl_sata.c | 70 ++------------------------------ drivers/ata/fsl_sata.h | 2 - include/configs/MPC837XERDB.h | 9 ---- include/configs/P1010RDB.h | 7 ---- include/configs/P2041RDB.h | 7 ---- include/configs/T104xRDB.h | 4 -- include/configs/T208xQDS.h | 6 --- include/configs/T208xRDB.h | 6 --- include/configs/T4240RDB.h | 14 ------- include/configs/corenet_ds.h | 7 ---- include/configs/ls1028aqds.h | 1 - include/configs/ls1028ardb.h | 1 - include/configs/ls1088a_common.h | 5 --- include/configs/ls2080aqds.h | 5 --- include/configs/ls2080ardb.h | 5 --- include/configs/lx2160a_common.h | 7 ---- 16 files changed, 3 insertions(+), 153 deletions(-) diff --git a/drivers/ata/fsl_sata.c b/drivers/ata/fsl_sata.c index d1bab931895..6db4247368e 100644 --- a/drivers/ata/fsl_sata.c +++ b/drivers/ata/fsl_sata.c @@ -6,10 +6,13 @@ */ #include +#include #include #include #include #include +#include +#include #include #include #include @@ -21,33 +24,6 @@ #include #include "fsl_sata.h" -#if CONFIG_IS_ENABLED(BLK) -#include -#include -#include -#include -#else -#ifndef CONFIG_SYS_SATA1_FLAGS - #define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA -#endif -#ifndef CONFIG_SYS_SATA2_FLAGS - #define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA -#endif - -static struct fsl_sata_info fsl_sata_info[] = { -#ifdef CONFIG_SATA1 - {CONFIG_SYS_SATA1, CONFIG_SYS_SATA1_FLAGS}, -#else - {0, 0}, -#endif -#ifdef CONFIG_SATA2 - {CONFIG_SYS_SATA2, CONFIG_SYS_SATA2_FLAGS}, -#else - {0, 0}, -#endif -}; -#endif - static inline void sdelay(unsigned long sec) { unsigned long i; @@ -86,11 +62,7 @@ static int ata_wait_register(unsigned __iomem *addr, u32 mask, return (i < timeout_msec) ? 0 : -1; } -#if !CONFIG_IS_ENABLED(BLK) -int init_sata(int dev) -#else static int init_sata(struct fsl_ata_priv *priv, int dev) -#endif { u32 length, align; cmd_hdr_tbl_t *cmd_hdr; @@ -129,15 +101,9 @@ static int init_sata(struct fsl_ata_priv *priv, int dev) snprintf(sata->name, 12, "SATA%d:", dev); /* Set the controller register base address to device struct */ -#if !CONFIG_IS_ENABLED(BLK) - sata_dev_desc[dev].priv = (void *)sata; - reg = (fsl_sata_reg_t *)(fsl_sata_info[dev].sata_reg_base); - sata->dma_flag = fsl_sata_info[dev].flags; -#else reg = (fsl_sata_reg_t *)(priv->base + priv->offset * dev); sata->dma_flag = priv->flag; priv->fsl_sata = sata; -#endif sata->reg_base = reg; /* Allocate the command header table, 4 bytes aligned */ @@ -738,17 +704,11 @@ static u32 ata_low_level_rw_lba28(fsl_sata_t *sata, u32 blknr, u32 blkcnt, /* * SATA interface between low level driver and command layer */ -#if !CONFIG_IS_ENABLED(BLK) -ulong sata_read(int dev, ulong blknr, lbaint_t blkcnt, void *buffer) -{ - fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv; -#else static ulong sata_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt, void *buffer) { struct fsl_ata_priv *priv = dev_get_plat(dev); fsl_sata_t *sata = priv->fsl_sata; -#endif u32 rc; if (sata->lba48) @@ -760,17 +720,11 @@ static ulong sata_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt, return rc; } -#if !CONFIG_IS_ENABLED(BLK) -ulong sata_write(int dev, ulong blknr, lbaint_t blkcnt, const void *buffer) -{ - fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv; -#else static ulong sata_write(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt, const void *buffer) { struct fsl_ata_priv *priv = dev_get_plat(dev); fsl_sata_t *sata = priv->fsl_sata; -#endif u32 rc; if (sata->lba48) { @@ -801,17 +755,11 @@ static void fsl_sata_identify(fsl_sata_t *sata, u16 *id) ata_swap_buf_le16(id, ATA_ID_WORDS); } -#if !CONFIG_IS_ENABLED(BLK) -int scan_sata(int dev) -{ - fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv; -#else static int scan_sata(struct udevice *dev) { struct blk_desc *desc = dev_get_uclass_plat(dev); struct fsl_ata_priv *priv = dev_get_plat(dev); fsl_sata_t *sata = priv->fsl_sata; -#endif unsigned char serial[ATA_ID_SERNO_LEN + 1]; unsigned char firmware[ATA_ID_FW_REV_LEN + 1]; @@ -853,22 +801,12 @@ static int scan_sata(struct udevice *dev) debug("Device supports LBA28\n\r"); #endif -#if !CONFIG_IS_ENABLED(BLK) - memcpy(sata_dev_desc[dev].product, serial, sizeof(serial)); - memcpy(sata_dev_desc[dev].revision, firmware, sizeof(firmware)); - memcpy(sata_dev_desc[dev].vendor, product, sizeof(product)); - sata_dev_desc[dev].lba = (u32)n_sectors; -#ifdef CONFIG_LBA48 - sata_dev_desc[dev].lba48 = sata->lba48; -#endif -#else memcpy(desc->product, serial, sizeof(serial)); memcpy(desc->revision, firmware, sizeof(firmware)); memcpy(desc->vendor, product, sizeof(product)); desc->lba = n_sectors; #ifdef CONFIG_LBA48 desc->lba48 = sata->lba48; -#endif #endif /* Get the NCQ queue depth from device */ @@ -890,7 +828,6 @@ static int scan_sata(struct udevice *dev) return 0; } -#if CONFIG_IS_ENABLED(BLK) static const struct blk_ops sata_fsl_blk_ops = { .read = sata_read, .write = sata_write, @@ -1042,4 +979,3 @@ U_BOOT_DRIVER(fsl_ahci) = { .remove = fsl_ata_remove, .priv_auto = sizeof(struct fsl_ata_priv), }; -#endif diff --git a/drivers/ata/fsl_sata.h b/drivers/ata/fsl_sata.h index 5b9daa79e02..e1ea8eb3a18 100644 --- a/drivers/ata/fsl_sata.h +++ b/drivers/ata/fsl_sata.h @@ -319,7 +319,6 @@ typedef struct fsl_sata { #define READ_CMD 0 #define WRITE_CMD 1 -#if CONFIG_IS_ENABLED(BLK) struct fsl_ata_priv { u32 base; u32 flag; @@ -327,6 +326,5 @@ struct fsl_ata_priv { u32 offset; fsl_sata_t *fsl_sata; }; -#endif #endif /* __FSL_SATA_H__ */ diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 4995bcee856..de197a0bd11 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -265,15 +265,6 @@ /* * SATA */ -#define CONFIG_SATA1 -#define CONFIG_SYS_SATA1_OFFSET 0x18000 -#define CONFIG_SYS_SATA1 (CONFIG_SYS_IMMR + CONFIG_SYS_SATA1_OFFSET) -#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA -#define CONFIG_SATA2 -#define CONFIG_SYS_SATA2_OFFSET 0x19000 -#define CONFIG_SYS_SATA2 (CONFIG_SYS_IMMR + CONFIG_SYS_SATA2_OFFSET) -#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA - #ifdef CONFIG_FSL_SATA #define CONFIG_LBA48 #endif diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index d5b8cfaea39..15add282d70 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -476,13 +476,6 @@ extern unsigned long get_sdram_size(void); #define CONFIG_FSL_SATA_V2 #ifdef CONFIG_FSL_SATA -#define CONFIG_SATA1 -#define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR -#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA -#define CONFIG_SATA2 -#define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR -#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA - #define CONFIG_LBA48 #endif /* #ifdef CONFIG_FSL_SATA */ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 38acb38690d..8a7123921bb 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -340,13 +340,6 @@ #define CONFIG_FSL_SATA_V2 #ifdef CONFIG_FSL_SATA_V2 -#define CONFIG_SATA1 -#define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR -#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA -#define CONFIG_SATA2 -#define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR -#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA - #define CONFIG_LBA48 #endif diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index bb05b2ed7c9..e7ebf795451 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -393,10 +393,6 @@ /* SATA */ #define CONFIG_FSL_SATA_V2 #ifdef CONFIG_FSL_SATA_V2 -#define CONFIG_SATA1 -#define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR -#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA - #define CONFIG_LBA48 #endif diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index e46488b3c0e..06be25bf5a7 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -462,12 +462,6 @@ * SATA */ #ifdef CONFIG_FSL_SATA_V2 -#define CONFIG_SATA1 -#define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR -#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA -#define CONFIG_SATA2 -#define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR -#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA #define CONFIG_LBA48 #endif diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index d4bf938ac6f..f96208d2657 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -418,12 +418,6 @@ * SATA */ #ifdef CONFIG_FSL_SATA_V2 -#define CONFIG_SATA1 -#define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR -#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA -#define CONFIG_SATA2 -#define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR -#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA #define CONFIG_LBA48 #endif diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index ebdd47edf95..542786aeef1 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -155,13 +155,6 @@ /* SATA */ #ifdef CONFIG_FSL_SATA_V2 -#define CONFIG_SATA1 -#define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR -#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA -#define CONFIG_SATA2 -#define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR -#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA - #define CONFIG_LBA48 #endif @@ -435,13 +428,6 @@ /* SATA */ #ifdef CONFIG_FSL_SATA_V2 -#define CONFIG_SATA1 -#define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR -#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA -#define CONFIG_SATA2 -#define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR -#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA - #define CONFIG_LBA48 #endif diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 56b56e8a2e2..6006f763822 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -339,13 +339,6 @@ /* SATA */ #ifdef CONFIG_FSL_SATA_V2 -#define CONFIG_SATA1 -#define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR -#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA -#define CONFIG_SATA2 -#define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR -#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA - #define CONFIG_LBA48 #endif diff --git a/include/configs/ls1028aqds.h b/include/configs/ls1028aqds.h index 35363ccda1a..52703632a7e 100644 --- a/include/configs/ls1028aqds.h +++ b/include/configs/ls1028aqds.h @@ -60,7 +60,6 @@ /* SATA */ -#define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1 #ifndef SPL_NO_ENV #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/ls1028ardb.h b/include/configs/ls1028ardb.h index 91223789b83..665723b1511 100644 --- a/include/configs/ls1028ardb.h +++ b/include/configs/ls1028ardb.h @@ -53,7 +53,6 @@ #define SCSI_VEND_ID 0x1b4b #define SCSI_DEV_ID 0x9170 #define CONFIG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID} -#define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1 /* Initial environment variables */ #ifndef SPL_NO_ENV diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 9a29bb6ca1e..ff85f1eb4ac 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -115,11 +115,6 @@ unsigned long long get_qixis_addr(void); /* Miscellaneous configurable options */ -/* SATA */ -#ifdef CONFIG_SCSI -#define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1 -#endif - /* Physical Memory Map */ #define CONFIG_HWCONFIG diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 9ce48a09602..f2eae073810 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -29,11 +29,6 @@ #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1 #endif -/* SATA */ - -#define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1 -#define CONFIG_SYS_SATA2 AHCI_BASE_ADDR2 - #define CONFIG_SYS_NOR0_CSPR_EXT (0x0) #define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) #define CONFIG_SYS_NOR_AMASK_EARLY IFC_AMASK(64*1024*1024) diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index cdfc9fd82e8..43bcc5a9b11 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -34,11 +34,6 @@ #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1 #endif -/* SATA */ - -#define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1 -#define CONFIG_SYS_SATA2 AHCI_BASE_ADDR2 - #if !defined(CONFIG_FSL_QSPI) || defined(CONFIG_TFABOOT) #define CONFIG_SYS_NOR0_CSPR_EXT (0x0) diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 56096682c06..f8c3a0923ab 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -95,13 +95,6 @@ #define CONFIG_PCI_SCAN_SHOW #endif -/* SATA */ - -#ifdef CONFIG_SCSI -#define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1 -#define CONFIG_SYS_SATA2 AHCI_BASE_ADDR2 -#endif - /* USB */ #ifdef CONFIG_USB_HOST #ifndef CONFIG_TARGET_LX2162AQDS -- GitLab From 0a816d92d581749341c0c725816efe930e56e2a4 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 10 Jun 2022 22:59:27 -0400 Subject: [PATCH 411/581] Convert CONFIG_FSL_SATA_V2 to Kconfig This converts the following to Kconfig: CONFIG_FSL_SATA_V2 Signed-off-by: Tom Rini --- configs/P1010RDB-PA_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PA_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PA_NAND_defconfig | 1 + configs/P1010RDB-PA_NOR_defconfig | 1 + configs/P1010RDB-PA_SDCARD_defconfig | 1 + configs/P1010RDB-PA_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PB_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_NAND_defconfig | 1 + configs/P1010RDB-PB_NOR_defconfig | 1 + configs/P1010RDB-PB_SDCARD_defconfig | 1 + configs/P1010RDB-PB_SPIFLASH_defconfig | 1 + configs/P2041RDB_NAND_defconfig | 1 + configs/P2041RDB_SDCARD_defconfig | 1 + configs/P2041RDB_SPIFLASH_defconfig | 1 + configs/P2041RDB_defconfig | 1 + configs/P3041DS_NAND_defconfig | 1 + configs/P3041DS_SDCARD_defconfig | 1 + configs/P3041DS_SPIFLASH_defconfig | 1 + configs/P3041DS_defconfig | 1 + configs/P5040DS_NAND_defconfig | 1 + configs/P5040DS_SDCARD_defconfig | 1 + configs/P5040DS_SPIFLASH_defconfig | 1 + configs/P5040DS_defconfig | 1 + configs/T2080QDS_NAND_defconfig | 1 + configs/T2080QDS_SDCARD_defconfig | 1 + configs/T2080QDS_SECURE_BOOT_defconfig | 1 + configs/T2080QDS_SPIFLASH_defconfig | 1 + configs/T2080QDS_SRIO_PCIE_BOOT_defconfig | 1 + configs/T2080QDS_defconfig | 1 + configs/T2080RDB_NAND_defconfig | 1 + configs/T2080RDB_SDCARD_defconfig | 1 + configs/T2080RDB_SPIFLASH_defconfig | 1 + configs/T2080RDB_defconfig | 1 + configs/T2080RDB_revD_NAND_defconfig | 1 + configs/T2080RDB_revD_SDCARD_defconfig | 1 + configs/T2080RDB_revD_SPIFLASH_defconfig | 1 + configs/T2080RDB_revD_defconfig | 1 + configs/T4240RDB_SDCARD_defconfig | 1 + configs/T4240RDB_defconfig | 1 + drivers/ata/Kconfig | 7 +++++++ include/configs/P1010RDB.h | 1 - include/configs/P2041RDB.h | 1 - include/configs/P3041DS.h | 1 - include/configs/P5040DS.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240RDB.h | 1 - 53 files changed, 51 insertions(+), 8 deletions(-) diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index f891ae1cb0b..98c42279d9f 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -72,6 +72,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index f4209305c1c..f46a2b20af2 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -41,6 +41,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index b46d62c82f4..0076f6681cf 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -62,6 +62,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index feffcd1b1eb..3ff3d90bd2d 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -65,6 +65,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index 6dd81bb7d02..5d8305e5448 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -71,6 +71,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index bea23e2d905..e2af4d3bed5 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -40,6 +40,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 6dcd2b9d110..978ab4dfc87 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -61,6 +61,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index d902f045c30..ac7474c4f16 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -64,6 +64,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 16a1b2fc6a5..165fa97cd58 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -73,6 +73,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 3d5e6dd4eaf..4fd32a1ec52 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -42,6 +42,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 7e44655646e..f3ab87f45b4 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -63,6 +63,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index 39feff2f483..4e1eac59043 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -66,6 +66,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 2fd649a9cf5..846e403fccd 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -72,6 +72,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index ec11f8b53dd..48a71d5b399 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -41,6 +41,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index 127a7f09257..76f5ea14dfe 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -62,6 +62,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 8256475b68a..7ecfa54dfc4 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -65,6 +65,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index 9389d992562..fac2bef7e6a 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -46,6 +46,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index 31d5814d55c..5516850bb3c 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -46,6 +46,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index 7e913c81366..a42d21093c4 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -48,6 +48,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index 23165b83f74..8265602bcc7 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -43,6 +43,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index 7c5b6d288b0..0c07556ef24 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -44,6 +44,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index 41ec73a6be4..2c5e5da15fb 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -44,6 +44,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index bdbf2e959e3..b8a1d679099 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -46,6 +46,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index 953cbd4b0b7..bce873a0bcc 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -41,6 +41,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index 6e0bdb2e130..ac4bb3b19b4 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -45,6 +45,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index e040fab7cb8..06214ca5c35 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -44,6 +44,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index 1e1a2f80365..0c9d564a12c 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -46,6 +46,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index ec897c33231..7e543872a16 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -41,6 +41,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 34dfeb2dee5..0a7bf14cb42 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -72,6 +72,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index 3bd5ad0d84a..45f45fc27d1 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -72,6 +72,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index d9822bab3fd..59ea4ad121e 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -47,6 +47,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DIMM_SLOTS_PER_CTLR=2 diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 0ff5a1a3724..38f313e8669 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -75,6 +75,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig index 6158be76fe5..b5e0a539bec 100644 --- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig @@ -45,6 +45,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index fd658454c4a..1c14aedae2c 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -48,6 +48,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index 83bb1c37c2d..cb6587aac91 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -74,6 +74,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=133330000 diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index 79958022ba8..e3884875cb3 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -74,6 +74,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=133330000 diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index 86725b9a17a..23c233e7012 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -77,6 +77,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=133330000 diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index 66d043309b3..18d9d547372 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -50,6 +50,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=133330000 diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index 65beaa91678..bc596d98464 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -75,6 +75,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=133330000 diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index eb30705011e..17d8fa33b3a 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -75,6 +75,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=133330000 diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index bfddca98f81..88d1ea6a609 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -78,6 +78,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=133330000 diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig index 56b174fad74..c300b82ea8d 100644 --- a/configs/T2080RDB_revD_defconfig +++ b/configs/T2080RDB_revD_defconfig @@ -51,6 +51,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=133330000 diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index 142703f2954..c08a96eb4be 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -66,6 +66,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=133333333 diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index 4f19024a6be..67061d03d56 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -42,6 +42,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=133333333 diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index ce6907e6900..9c9641d2ed9 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig @@ -113,12 +113,19 @@ config SATA_CEVA config FSL_SATA bool "Enable Freescale SATA controller driver support" + depends on PPC select AHCI select LIBATA help Enable this driver to support the SATA controller found in some Freescale PowerPC SoCs. +config FSL_SATA_V2 + bool "Enable support for V2 of the Freescale SATA controller" + depends on FSL_SATA + help + Enable support for V2 of this controller, rather than V1. + config SATA_MV bool "Enable Marvell SATA controller driver support" select AHCI diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 15add282d70..287236f70f2 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -473,7 +473,6 @@ extern unsigned long get_sdram_size(void); #endif /* CONFIG_TSEC_ENET */ /* SATA */ -#define CONFIG_FSL_SATA_V2 #ifdef CONFIG_FSL_SATA #define CONFIG_LBA48 diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 8a7123921bb..3c92a3e405b 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -337,7 +337,6 @@ #endif /* CONFIG_PCI */ /* SATA */ -#define CONFIG_FSL_SATA_V2 #ifdef CONFIG_FSL_SATA_V2 #define CONFIG_LBA48 diff --git a/include/configs/P3041DS.h b/include/configs/P3041DS.h index f1417b1bfc1..6063113634c 100644 --- a/include/configs/P3041DS.h +++ b/include/configs/P3041DS.h @@ -9,7 +9,6 @@ */ #define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */ -#define CONFIG_FSL_SATA_V2 #define CONFIG_PCIE3 #define CONFIG_PCIE4 #define CONFIG_SYS_DPAA_RMAN diff --git a/include/configs/P5040DS.h b/include/configs/P5040DS.h index fc2a07b9741..6e6e5bec66b 100644 --- a/include/configs/P5040DS.h +++ b/include/configs/P5040DS.h @@ -10,7 +10,6 @@ #define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */ #define CONFIG_PCIE3 -#define CONFIG_FSL_SATA_V2 #define CONFIG_SYS_FSL_RAID_ENGINE #define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index e7ebf795451..b832fb33d20 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -391,7 +391,6 @@ #endif /* CONFIG_PCI */ /* SATA */ -#define CONFIG_FSL_SATA_V2 #ifdef CONFIG_FSL_SATA_V2 #define CONFIG_LBA48 #endif diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 06be25bf5a7..a96c5bbd095 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -15,7 +15,6 @@ #define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ #if defined(CONFIG_ARCH_T2080) -#define CONFIG_FSL_SATA_V2 #define CONFIG_SYS_SRIO /* Enable Serial RapidIO Support */ #define CONFIG_SRIO1 /* SRIO port 1 */ #define CONFIG_SRIO2 /* SRIO port 2 */ diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index f96208d2657..82531f69c44 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -14,7 +14,6 @@ #include #define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ -#define CONFIG_FSL_SATA_V2 /* High Level Configuration Options */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 542786aeef1..436f6d0fc8e 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -12,7 +12,6 @@ #include -#define CONFIG_FSL_SATA_V2 #define CONFIG_PCIE4 #define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ -- GitLab From aca1f6789aa2e384a58909fa7a9696db9d607675 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 10 Jun 2022 22:59:28 -0400 Subject: [PATCH 412/581] Convert CONFIG_LBA48 et al to Kconfig This converts the following to Kconfig: CONFIG_LBA48 CONFIG_SYS_64BIT_LBA Signed-off-by: Tom Rini --- README | 12 ------------ arch/arm/mach-kirkwood/include/mach/config.h | 2 -- configs/A10-OLinuXino-Lime_defconfig | 1 + configs/A20-OLinuXino-Lime2-eMMC_defconfig | 1 + configs/A20-OLinuXino-Lime2_defconfig | 1 + configs/A20-OLinuXino-Lime_defconfig | 1 + configs/A20-OLinuXino_MICRO-eMMC_defconfig | 1 + configs/A20-OLinuXino_MICRO_defconfig | 1 + configs/A20-Olimex-SOM-EVB_defconfig | 1 + configs/A20-Olimex-SOM204-EVB-eMMC_defconfig | 1 + configs/A20-Olimex-SOM204-EVB_defconfig | 1 + configs/Bananapi_M2_Ultra_defconfig | 1 + configs/Bananapi_defconfig | 1 + configs/Bananapro_defconfig | 1 + configs/Cubieboard2_defconfig | 1 + configs/Cubieboard_defconfig | 1 + configs/Cubietruck_defconfig | 1 + configs/Itead_Ibox_A20_defconfig | 1 + configs/Lamobo_R1_defconfig | 1 + configs/Linksprite_pcDuino3_Nano_defconfig | 1 + configs/Linksprite_pcDuino3_defconfig | 1 + configs/Marsboard_A10_defconfig | 1 + configs/Mele_A1000_defconfig | 1 + configs/Mele_M5_defconfig | 1 + configs/Orangepi_defconfig | 1 + configs/Orangepi_mini_defconfig | 1 + configs/P1020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_defconfig | 1 + configs/P1020RDB-PC_NAND_defconfig | 1 + configs/P1020RDB-PC_SDCARD_defconfig | 1 + configs/P1020RDB-PC_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_defconfig | 1 + configs/P1020RDB-PD_NAND_defconfig | 1 + configs/P1020RDB-PD_SDCARD_defconfig | 1 + configs/P1020RDB-PD_SPIFLASH_defconfig | 1 + configs/P1020RDB-PD_defconfig | 1 + configs/P2020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_36BIT_defconfig | 1 + configs/P2020RDB-PC_NAND_defconfig | 1 + configs/P2020RDB-PC_SDCARD_defconfig | 1 + configs/P2020RDB-PC_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_defconfig | 1 + configs/P4080DS_SDCARD_defconfig | 1 + configs/P4080DS_SPIFLASH_defconfig | 1 + configs/P4080DS_defconfig | 1 + configs/Wits_Pro_A20_DKT_defconfig | 1 + configs/apalis_imx6_defconfig | 1 + configs/bananapi_m1_plus_defconfig | 1 + configs/bananapi_m2_berry_defconfig | 1 + configs/bayleybay_defconfig | 2 ++ configs/cherryhill_defconfig | 2 ++ configs/chromebook_coral_defconfig | 2 ++ configs/chromebook_link64_defconfig | 2 ++ configs/chromebook_link_defconfig | 2 ++ configs/chromebook_samus_defconfig | 2 ++ configs/chromebook_samus_tpl_defconfig | 2 ++ configs/chromebox_panther_defconfig | 2 ++ configs/clearfog_gt_8k_defconfig | 2 ++ configs/cm_fx6_defconfig | 1 + ...nga-qeval20-qa3-e3845-internal-uart_defconfig | 2 ++ configs/conga-qeval20-qa3-e3845_defconfig | 2 ++ configs/coreboot64_defconfig | 2 ++ configs/coreboot_defconfig | 2 ++ configs/cougarcanyon2_defconfig | 2 ++ configs/crownbay_defconfig | 2 ++ configs/d2net_v2_defconfig | 2 ++ configs/db-mv784mp-gp_defconfig | 1 + configs/dfi-bt700-q7x-151_defconfig | 2 ++ configs/dh_imx6_defconfig | 1 + configs/dns325_defconfig | 1 + configs/dreamplug_defconfig | 1 + configs/ds109_defconfig | 1 + configs/edminiv2_defconfig | 1 + configs/efi-x86_payload32_defconfig | 2 ++ configs/efi-x86_payload64_defconfig | 2 ++ configs/goflexhome_defconfig | 1 + configs/guruplug_defconfig | 1 + configs/gwventana_emmc_defconfig | 1 + configs/gwventana_gw5904_defconfig | 1 + configs/gwventana_nand_defconfig | 1 + configs/highbank_defconfig | 1 + configs/ib62x0_defconfig | 1 + configs/inetspace_v2_defconfig | 2 ++ configs/lschlv2_defconfig | 2 ++ configs/lsxhl_defconfig | 2 ++ configs/minnowmax_defconfig | 2 ++ configs/mvebu_crb_cn9130_defconfig | 2 ++ configs/mvebu_db-88f3720_defconfig | 2 ++ configs/mvebu_db_armada8k_defconfig | 2 ++ configs/mvebu_db_cn9130_defconfig | 2 ++ configs/mvebu_espressobin-88f3720_defconfig | 2 ++ configs/mvebu_mcbin-88f8040_defconfig | 2 ++ configs/mvebu_puzzle-m801-88f8040_defconfig | 2 ++ configs/mx6cuboxi_defconfig | 1 + configs/mx6qsabrelite_defconfig | 1 + configs/nas220_defconfig | 1 + configs/net2big_v2_defconfig | 2 ++ configs/netspace_lite_v2_defconfig | 2 ++ configs/netspace_max_v2_defconfig | 2 ++ configs/netspace_mini_v2_defconfig | 2 ++ configs/netspace_v2_defconfig | 2 ++ configs/nitrogen6q2g_defconfig | 1 + configs/nitrogen6q_defconfig | 1 + configs/novena_defconfig | 1 + configs/nsa310s_defconfig | 2 ++ configs/octeon_nic23_defconfig | 2 ++ configs/octeontx_81xx_defconfig | 2 ++ configs/octeontx_83xx_defconfig | 2 ++ configs/openrd_base_defconfig | 1 + configs/openrd_client_defconfig | 1 + configs/openrd_ultimate_defconfig | 1 + configs/pogo_v4_defconfig | 2 ++ configs/qemu-ppce500_defconfig | 1 + configs/qemu-x86_64_defconfig | 2 ++ configs/qemu-x86_defconfig | 2 ++ configs/sheevaplug_defconfig | 2 ++ configs/slimbootloader_defconfig | 2 ++ configs/som-db5800-som-6867_defconfig | 2 ++ configs/tbs2910_defconfig | 2 ++ ...dorable-x86-conga-qa3-e3845-pcie-x4_defconfig | 2 ++ .../theadorable-x86-conga-qa3-e3845_defconfig | 2 ++ configs/theadorable-x86-dfi-bt700_defconfig | 2 ++ configs/theadorable_debug_defconfig | 1 + configs/uDPU_defconfig | 2 ++ configs/udoo_defconfig | 1 + configs/wandboard_defconfig | 1 + drivers/ata/Kconfig | 1 + drivers/block/Kconfig | 16 ++++++++++++++++ include/configs/M5253DEMO.h | 1 - include/configs/MPC837XERDB.h | 7 ------- include/configs/P1010RDB.h | 6 ------ include/configs/P2041RDB.h | 6 ------ include/configs/P4080DS.h | 2 -- include/configs/T104xRDB.h | 5 ----- include/configs/T208xQDS.h | 7 ------- include/configs/T208xRDB.h | 7 ------- include/configs/T4240RDB.h | 10 ---------- include/configs/apalis_imx6.h | 7 ------- include/configs/cm_fx6.h | 3 --- include/configs/corenet_ds.h | 5 ----- include/configs/db-mv784mp-gp.h | 3 --- include/configs/dh_imx6.h | 3 --- include/configs/dreamplug.h | 5 ----- include/configs/edminiv2.h | 2 -- include/configs/ge_bx50v3.h | 5 ----- include/configs/goflexhome.h | 3 --- include/configs/gw_ventana.h | 7 ------- include/configs/highbank.h | 2 -- include/configs/lacie_kw.h | 12 ------------ include/configs/lsxl.h | 5 ----- include/configs/m53menlo.h | 7 ------- include/configs/mvebu_armada-37xx.h | 6 ------ include/configs/mvebu_armada-8k.h | 6 ------ include/configs/mx53loco.h | 4 ---- include/configs/mx6cuboxi.h | 5 ----- include/configs/nitrogen6x.h | 7 ------- include/configs/novena.h | 3 --- include/configs/nsa310s.h | 4 ---- include/configs/octeon_nic23.h | 9 --------- include/configs/octeontx_common.h | 8 -------- include/configs/p1_p2_rdb_pc.h | 2 -- include/configs/pogo_v4.h | 6 ------ include/configs/qemu-ppce500.h | 2 -- include/configs/sheevaplug.h | 6 ------ include/configs/sunxi-common.h | 4 ---- include/configs/tbs2910.h | 6 ------ include/configs/theadorable.h | 3 --- include/configs/udoo.h | 3 --- include/configs/wandboard.h | 6 ------ include/configs/x86-common.h | 7 ------- 174 files changed, 195 insertions(+), 231 deletions(-) diff --git a/README b/README index e01ff989bd4..fca495bcf59 100644 --- a/README +++ b/README @@ -664,18 +664,6 @@ The following options need to be configured: CONFIG_SCSI) you must configure support for at least one non-MTD partition type as well. -- LBA48 Support - CONFIG_LBA48 - - Set this to enable support for disks larger than 137GB - Also look at CONFIG_SYS_64BIT_LBA. - Whithout these , LBA48 support uses 32bit variables and will 'only' - support disks up to 2.1TB. - - CONFIG_SYS_64BIT_LBA: - When enabled, makes the IDE subsystem use 64bit sector addresses. - Default is 32bit. - - NETWORK Support (PCI): CONFIG_E1000_SPI Utility code for direct access to the SPI bus on Intel 8257x. diff --git a/arch/arm/mach-kirkwood/include/mach/config.h b/arch/arm/mach-kirkwood/include/mach/config.h index 45ee0272f77..ca341570544 100644 --- a/arch/arm/mach-kirkwood/include/mach/config.h +++ b/arch/arm/mach-kirkwood/include/mach/config.h @@ -49,8 +49,6 @@ #define __io /* Data, registers and alternate blocks are at the same offset */ /* Each 8-bit ATA register is aligned to a 4-bytes address */ -/* Controller supports 48-bits LBA addressing */ -#define CONFIG_LBA48 /* CONFIG_IDE requires some #defines for ATA registers */ /* ATA registers base is at SATA controller base */ #endif /* CONFIG_IDE */ diff --git a/configs/A10-OLinuXino-Lime_defconfig b/configs/A10-OLinuXino-Lime_defconfig index 026668b0bd0..26a921279b5 100644 --- a/configs/A10-OLinuXino-Lime_defconfig +++ b/configs/A10-OLinuXino-Lime_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/A20-OLinuXino-Lime2-eMMC_defconfig b/configs/A20-OLinuXino-Lime2-eMMC_defconfig index e0db1e67388..b5802818ec3 100644 --- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig +++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_DFU=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_DFU_RAM=y CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig index a78cbfb1391..de4f6311f2d 100644 --- a/configs/A20-OLinuXino-Lime2_defconfig +++ b/configs/A20-OLinuXino-Lime2_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_DFU=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_DFU_RAM=y CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/A20-OLinuXino-Lime_defconfig b/configs/A20-OLinuXino-Lime_defconfig index da3532ccc46..ebb3a02b824 100644 --- a/configs/A20-OLinuXino-Lime_defconfig +++ b/configs/A20-OLinuXino-Lime_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/A20-OLinuXino_MICRO-eMMC_defconfig b/configs/A20-OLinuXino_MICRO-eMMC_defconfig index 0563a5188e6..c8802435b41 100644 --- a/configs/A20-OLinuXino_MICRO-eMMC_defconfig +++ b/configs/A20-OLinuXino_MICRO-eMMC_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/A20-OLinuXino_MICRO_defconfig b/configs/A20-OLinuXino_MICRO_defconfig index 4993cf7d2d7..f4496412456 100644 --- a/configs/A20-OLinuXino_MICRO_defconfig +++ b/configs/A20-OLinuXino_MICRO_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/A20-Olimex-SOM-EVB_defconfig b/configs/A20-Olimex-SOM-EVB_defconfig index 0db97ae8415..67b47f51f1b 100644 --- a/configs/A20-Olimex-SOM-EVB_defconfig +++ b/configs/A20-Olimex-SOM-EVB_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig index 91d29e44469..e02d67da5e7 100644 --- a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig +++ b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/A20-Olimex-SOM204-EVB_defconfig b/configs/A20-Olimex-SOM204-EVB_defconfig index 893f2e627d5..317a1e695d8 100644 --- a/configs/A20-Olimex-SOM204-EVB_defconfig +++ b/configs/A20-Olimex-SOM204-EVB_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/Bananapi_M2_Ultra_defconfig b/configs/Bananapi_M2_Ultra_defconfig index 7d9c688171d..be5be9ae2fb 100644 --- a/configs/Bananapi_M2_Ultra_defconfig +++ b/configs/Bananapi_M2_Ultra_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig index 6cc2d5b6472..053ba137652 100644 --- a/configs/Bananapi_defconfig +++ b/configs/Bananapi_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_NETCONSOLE=y CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Bananapro_defconfig b/configs/Bananapro_defconfig index 19b644613a6..36f9bf8b32e 100644 --- a/configs/Bananapro_defconfig +++ b/configs/Bananapro_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_NETCONSOLE=y CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Cubieboard2_defconfig b/configs/Cubieboard2_defconfig index 794d6668d2f..315c52f3448 100644 --- a/configs/Cubieboard2_defconfig +++ b/configs/Cubieboard2_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Cubieboard_defconfig b/configs/Cubieboard_defconfig index 1027c5e3bf9..49eb0186953 100644 --- a/configs/Cubieboard_defconfig +++ b/configs/Cubieboard_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig index 560248dc5b1..62668df01ec 100644 --- a/configs/Cubietruck_defconfig +++ b/configs/Cubietruck_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_DFU=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_DFU_RAM=y CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Itead_Ibox_A20_defconfig b/configs/Itead_Ibox_A20_defconfig index 42cb24e88ef..1a161555842 100644 --- a/configs/Itead_Ibox_A20_defconfig +++ b/configs/Itead_Ibox_A20_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Lamobo_R1_defconfig b/configs/Lamobo_R1_defconfig index d4692f8184a..3627e4dd3af 100644 --- a/configs/Lamobo_R1_defconfig +++ b/configs/Lamobo_R1_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Linksprite_pcDuino3_Nano_defconfig b/configs/Linksprite_pcDuino3_Nano_defconfig index dbafdd5bd80..41ed46a7b5a 100644 --- a/configs/Linksprite_pcDuino3_Nano_defconfig +++ b/configs/Linksprite_pcDuino3_Nano_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Linksprite_pcDuino3_defconfig b/configs/Linksprite_pcDuino3_defconfig index ff6a4e8b379..44a3901e22d 100644 --- a/configs/Linksprite_pcDuino3_defconfig +++ b/configs/Linksprite_pcDuino3_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Marsboard_A10_defconfig b/configs/Marsboard_A10_defconfig index c88cfd6aa32..1584778dc74 100644 --- a/configs/Marsboard_A10_defconfig +++ b/configs/Marsboard_A10_defconfig @@ -8,6 +8,7 @@ CONFIG_AHCI=y CONFIG_SPL_STACK=0x8000 CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Mele_A1000_defconfig b/configs/Mele_A1000_defconfig index 429baf3faf2..eb3e7988005 100644 --- a/configs/Mele_A1000_defconfig +++ b/configs/Mele_A1000_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Mele_M5_defconfig b/configs/Mele_M5_defconfig index a426729700e..2e6d5dd4604 100644 --- a/configs/Mele_M5_defconfig +++ b/configs/Mele_M5_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Orangepi_defconfig b/configs/Orangepi_defconfig index e7cf38ac7d1..ba976f8f5f3 100644 --- a/configs/Orangepi_defconfig +++ b/configs/Orangepi_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Orangepi_mini_defconfig b/configs/Orangepi_mini_defconfig index 494edf0625e..720e9e5df4c 100644 --- a/configs/Orangepi_mini_defconfig +++ b/configs/Orangepi_mini_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 9bc202cf71e..54246f0397d 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -72,6 +72,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 534df01b8be..716662efac8 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -63,6 +63,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index 6fcbce4d678..4aa6829d5e2 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -66,6 +66,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index d9f402dbaf1..695a554b14e 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -43,6 +43,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index c26ea8e425c..eb4d8f91f84 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -71,6 +71,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 8930298f4f8..66a95fac2b5 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -62,6 +62,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 5da77d164ba..c60d3dcd336 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -65,6 +65,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 854def10770..f04a7cd3049 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -42,6 +42,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index 493cc5246a7..95ee0f9d225 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -74,6 +74,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index 34fe830debc..8f4a0f1093f 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -65,6 +65,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index caafe043bca..4c382473246 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -68,6 +68,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index a998a6f9610..1d08168aa2d 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -45,6 +45,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index 487483aea6a..c196489b3fd 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -76,6 +76,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 229d9feb468..ebf9daf3203 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -67,6 +67,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 69a45537c78..046a2f4215a 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -70,6 +70,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index 9b3b77f7291..39d8d2be229 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -47,6 +47,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 62461f9bf2d..2ab9a1399e4 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -75,6 +75,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 55d831c6bb1..edbc9ef6d00 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -66,6 +66,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 9529215fd37..01ef578ff52 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -69,6 +69,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index 5f8ba378e70..c27c390f89f 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -46,6 +46,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index e603f81287e..b4917b9a032 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -44,6 +44,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y +CONFIG_LBA48=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index 90b4688ea2e..79a3b95eda4 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -46,6 +46,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y +CONFIG_LBA48=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index 85acd7e427f..d1de9515223 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -41,6 +41,7 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y +CONFIG_LBA48=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y diff --git a/configs/Wits_Pro_A20_DKT_defconfig b/configs/Wits_Pro_A20_DKT_defconfig index 09608dd1cc2..c9d22534d5c 100644 --- a/configs/Wits_Pro_A20_DKT_defconfig +++ b/configs/Wits_Pro_A20_DKT_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index 89e9971ea3c..62891557040 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -79,6 +79,7 @@ CONFIG_IP_DEFRAG=y CONFIG_TFTP_BLOCKSIZE=4096 CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y +CONFIG_LBA48=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y CONFIG_DM_I2C=y diff --git a/configs/bananapi_m1_plus_defconfig b/configs/bananapi_m1_plus_defconfig index 955a60ddc34..290e9c17e21 100644 --- a/configs/bananapi_m1_plus_defconfig +++ b/configs/bananapi_m1_plus_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_NETCONSOLE=y CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/bananapi_m2_berry_defconfig b/configs/bananapi_m2_berry_defconfig index 08f7683233c..e6b8f0f8a3f 100644 --- a/configs/bananapi_m2_berry_defconfig +++ b/configs/bananapi_m2_berry_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/bayleybay_defconfig b/configs/bayleybay_defconfig index 80602fbbff9..d1a467dfe79 100644 --- a/configs/bayleybay_defconfig +++ b/configs/bayleybay_defconfig @@ -55,6 +55,8 @@ CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_CPU=y CONFIG_E1000=y CONFIG_SPI=y diff --git a/configs/cherryhill_defconfig b/configs/cherryhill_defconfig index 1d4256e37ba..9c3d26a36e1 100644 --- a/configs/cherryhill_defconfig +++ b/configs/cherryhill_defconfig @@ -45,6 +45,8 @@ CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y # CONFIG_ACPIGEN is not set +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_CPU=y CONFIG_RTL8169=y CONFIG_SPI=y diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index 693f119b791..60c50e75be6 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -87,6 +87,8 @@ CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_SPL_OF_TRANSLATE=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_CPU=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_DW=y diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig index f735f84d541..b645cba9070 100644 --- a/configs/chromebook_link64_defconfig +++ b/configs/chromebook_link64_defconfig @@ -70,6 +70,8 @@ CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y # CONFIG_ACPIGEN is not set +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_CPU=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_INTEL=y diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig index 1bcf9ce61b2..fa3641e42f5 100644 --- a/configs/chromebook_link_defconfig +++ b/configs/chromebook_link_defconfig @@ -60,6 +60,8 @@ CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y # CONFIG_ACPIGEN is not set +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_CPU=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_INTEL=y diff --git a/configs/chromebook_samus_defconfig b/configs/chromebook_samus_defconfig index 8ee114d0a09..56a0d6c8a8e 100644 --- a/configs/chromebook_samus_defconfig +++ b/configs/chromebook_samus_defconfig @@ -62,6 +62,8 @@ CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y # CONFIG_ACPIGEN is not set +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_CPU=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_DW=y diff --git a/configs/chromebook_samus_tpl_defconfig b/configs/chromebook_samus_tpl_defconfig index 13aa3e2e63f..1e1091fa7ee 100644 --- a/configs/chromebook_samus_tpl_defconfig +++ b/configs/chromebook_samus_tpl_defconfig @@ -80,6 +80,8 @@ CONFIG_BOOTFILE="bzImage" CONFIG_REGMAP=y CONFIG_SYSCON=y # CONFIG_ACPIGEN is not set +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_CPU=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_DW=y diff --git a/configs/chromebox_panther_defconfig b/configs/chromebox_panther_defconfig index c909d316a34..870843ada58 100644 --- a/configs/chromebox_panther_defconfig +++ b/configs/chromebox_panther_defconfig @@ -53,6 +53,8 @@ CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_CROS_EC=y CONFIG_CROS_EC_LPC=y CONFIG_RTL8169=y diff --git a/configs/clearfog_gt_8k_defconfig b/configs/clearfog_gt_8k_defconfig index a45c02061ee..cf35307937f 100644 --- a/configs/clearfog_gt_8k_defconfig +++ b/configs/clearfog_gt_8k_defconfig @@ -47,6 +47,8 @@ CONFIG_ARP_TIMEOUT=200 CONFIG_NET_RETRY_COUNT=50 CONFIG_NET_RANDOM_ETHADDR=y CONFIG_AHCI_MVEBU=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_MISC=y diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index 16e619b38a5..4d8788099f4 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -75,6 +75,7 @@ CONFIG_SPL_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y # CONFIG_DWC_AHSATA_AHCI is not set +CONFIG_LBA48=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MXC=y diff --git a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig index c41b83121e7..8b6957da162 100644 --- a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig +++ b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig @@ -62,6 +62,8 @@ CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_CPU=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_INTEL=y diff --git a/configs/conga-qeval20-qa3-e3845_defconfig b/configs/conga-qeval20-qa3-e3845_defconfig index 84ba5cadfec..286abe2f829 100644 --- a/configs/conga-qeval20-qa3-e3845_defconfig +++ b/configs/conga-qeval20-qa3-e3845_defconfig @@ -58,6 +58,8 @@ CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_CPU=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_INTEL=y diff --git a/configs/coreboot64_defconfig b/configs/coreboot64_defconfig index 3bd099e7231..a42fc3974aa 100644 --- a/configs/coreboot64_defconfig +++ b/configs/coreboot64_defconfig @@ -58,6 +58,8 @@ CONFIG_SYS_ATA_DATA_OFFSET=0 CONFIG_SYS_ATA_REG_OFFSET=0 CONFIG_SYS_ATA_ALT_OFFSET=0 CONFIG_ATAPI=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y # CONFIG_PCI_PNP is not set CONFIG_SOUND=y CONFIG_SOUND_I8254=y diff --git a/configs/coreboot_defconfig b/configs/coreboot_defconfig index 792d35eec58..fcd48148f12 100644 --- a/configs/coreboot_defconfig +++ b/configs/coreboot_defconfig @@ -52,6 +52,8 @@ CONFIG_SYS_ATA_DATA_OFFSET=0 CONFIG_SYS_ATA_REG_OFFSET=0 CONFIG_SYS_ATA_ALT_OFFSET=0 CONFIG_ATAPI=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y # CONFIG_PCI_PNP is not set CONFIG_SOUND=y CONFIG_SOUND_I8254=y diff --git a/configs/cougarcanyon2_defconfig b/configs/cougarcanyon2_defconfig index 09a6e4bc001..7ee0cb746e4 100644 --- a/configs/cougarcanyon2_defconfig +++ b/configs/cougarcanyon2_defconfig @@ -48,6 +48,8 @@ CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_CPU=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig index addaf3b7f79..fdd0d2badb0 100644 --- a/configs/crownbay_defconfig +++ b/configs/crownbay_defconfig @@ -53,6 +53,8 @@ CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y # CONFIG_ACPIGEN is not set +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_CPU=y CONFIG_E1000=y CONFIG_SOUND=y diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig index 4eb74f759f5..05f0d4bb35e 100644 --- a/configs/d2net_v2_defconfig +++ b/configs/d2net_v2_defconfig @@ -54,6 +54,8 @@ CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=2 +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig index 4fe0d3ec24e..49c616852b2 100644 --- a/configs/db-mv784mp-gp_defconfig +++ b/configs/db-mv784mp-gp_defconfig @@ -61,6 +61,7 @@ CONFIG_NET_RETRY_COUNT=50 CONFIG_SPL_OF_TRANSLATE=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=2 +CONFIG_LBA48=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y # CONFIG_MMC is not set diff --git a/configs/dfi-bt700-q7x-151_defconfig b/configs/dfi-bt700-q7x-151_defconfig index 177764ef80c..35e2c1a326f 100644 --- a/configs/dfi-bt700-q7x-151_defconfig +++ b/configs/dfi-bt700-q7x-151_defconfig @@ -56,6 +56,8 @@ CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_CPU=y CONFIG_DM_I2C=y CONFIG_NUVOTON_NCT6102D=y diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index a659e996b5c..7cb4f417e7e 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -67,6 +67,7 @@ CONFIG_ETHPRIME="FEC" CONFIG_ARP_TIMEOUT=200 CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y +CONFIG_LBA48=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000 CONFIG_DM_I2C=y diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig index 585f44d85d3..511ca2f6473 100644 --- a/configs/dns325_defconfig +++ b/configs/dns325_defconfig @@ -50,6 +50,7 @@ CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0x100 CONFIG_SYS_ATA_REG_OFFSET=0x100 CONFIG_SYS_ATA_ALT_OFFSET=0x100 +CONFIG_LBA48=y CONFIG_KIRKWOOD_GPIO=y # CONFIG_MMC is not set CONFIG_MTD=y diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig index 80be9b853cb..d6b55636ba5 100644 --- a/configs/dreamplug_defconfig +++ b/configs/dreamplug_defconfig @@ -50,6 +50,7 @@ CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0x100 CONFIG_SYS_ATA_REG_OFFSET=0x100 CONFIG_SYS_ATA_ALT_OFFSET=0x100 +CONFIG_LBA48=y # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/ds109_defconfig b/configs/ds109_defconfig index aeea352e258..529d7569476 100644 --- a/configs/ds109_defconfig +++ b/configs/ds109_defconfig @@ -48,6 +48,7 @@ CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0x100 CONFIG_SYS_ATA_REG_OFFSET=0x100 CONFIG_SYS_ATA_ALT_OFFSET=0x100 +CONFIG_LBA48=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y # CONFIG_MMC is not set diff --git a/configs/edminiv2_defconfig b/configs/edminiv2_defconfig index b8906b1bb0d..d47f20a4e60 100644 --- a/configs/edminiv2_defconfig +++ b/configs/edminiv2_defconfig @@ -56,6 +56,7 @@ CONFIG_SYS_ATA_DATA_OFFSET=0x100 CONFIG_SYS_ATA_REG_OFFSET=0x100 CONFIG_SYS_ATA_ALT_OFFSET=0x100 CONFIG_SYS_ATA_IDE0_OFFSET=0x4000 +CONFIG_LBA48=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/efi-x86_payload32_defconfig b/configs/efi-x86_payload32_defconfig index 42fb89d5b3e..83f532d6e54 100644 --- a/configs/efi-x86_payload32_defconfig +++ b/configs/efi-x86_payload32_defconfig @@ -49,6 +49,8 @@ CONFIG_SYS_ATA_DATA_OFFSET=0 CONFIG_SYS_ATA_REG_OFFSET=0 CONFIG_SYS_ATA_ALT_OFFSET=0 CONFIG_ATAPI=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y # CONFIG_PCI_PNP is not set # CONFIG_GZIP is not set CONFIG_EFI=y diff --git a/configs/efi-x86_payload64_defconfig b/configs/efi-x86_payload64_defconfig index eef51e8efc3..28aaff69e97 100644 --- a/configs/efi-x86_payload64_defconfig +++ b/configs/efi-x86_payload64_defconfig @@ -49,6 +49,8 @@ CONFIG_SYS_ATA_DATA_OFFSET=0 CONFIG_SYS_ATA_REG_OFFSET=0 CONFIG_SYS_ATA_ALT_OFFSET=0 CONFIG_ATAPI=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y # CONFIG_PCI_PNP is not set # CONFIG_GZIP is not set CONFIG_EFI=y diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig index cdd71b36ddb..1ef4d6c881e 100644 --- a/configs/goflexhome_defconfig +++ b/configs/goflexhome_defconfig @@ -51,6 +51,7 @@ CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 +CONFIG_LBA48=y # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig index 02c59c3f31d..c5cbce52a9b 100644 --- a/configs/guruplug_defconfig +++ b/configs/guruplug_defconfig @@ -54,6 +54,7 @@ CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0x100 CONFIG_SYS_ATA_REG_OFFSET=0x100 CONFIG_SYS_ATA_ALT_OFFSET=0x100 +CONFIG_LBA48=y # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index 0effee6d30f..0044d893128 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -96,6 +96,7 @@ CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y +CONFIG_LBA48=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MXC=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index 28e08788b65..08580255f79 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -96,6 +96,7 @@ CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y +CONFIG_LBA48=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MXC=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index f46440bf560..e2eab2bb381 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -99,6 +99,7 @@ CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y +CONFIG_LBA48=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MXC=y diff --git a/configs/highbank_defconfig b/configs/highbank_defconfig index 8a7d0fd8a9f..4fc73560102 100644 --- a/configs/highbank_defconfig +++ b/configs/highbank_defconfig @@ -31,6 +31,7 @@ CONFIG_MISC_INIT_R=y # CONFIG_CMD_SETEXPR is not set CONFIG_ENV_IS_IN_NVRAM=y CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y CONFIG_BOOTCOUNT_LIMIT=y # CONFIG_MMC is not set CONFIG_CALXEDA_XGMAC=y diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig index 3d4bd5145ff..4771e720c9b 100644 --- a/configs/ib62x0_defconfig +++ b/configs/ib62x0_defconfig @@ -53,6 +53,7 @@ CONFIG_SYS_ATA_REG_OFFSET=0x100 CONFIG_SYS_ATA_ALT_OFFSET=0x100 CONFIG_SYS_ATA_IDE0_OFFSET=0x2000 CONFIG_SYS_ATA_IDE1_OFFSET=0x4000 +CONFIG_LBA48=y # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig index 908e50dab13..160a0898f2e 100644 --- a/configs/inetspace_v2_defconfig +++ b/configs/inetspace_v2_defconfig @@ -54,6 +54,8 @@ CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig index 4fe9f6d3a6b..0da058302c3 100644 --- a/configs/lschlv2_defconfig +++ b/configs/lschlv2_defconfig @@ -44,6 +44,8 @@ CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_KIRKWOOD_GPIO=y # CONFIG_MMC is not set CONFIG_MTD=y diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig index e57f93ebd14..d847255d5ec 100644 --- a/configs/lsxhl_defconfig +++ b/configs/lsxhl_defconfig @@ -45,6 +45,8 @@ CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_KIRKWOOD_GPIO=y # CONFIG_MMC is not set CONFIG_MTD=y diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig index 87eb82a79af..2e9edc6c4ee 100644 --- a/configs/minnowmax_defconfig +++ b/configs/minnowmax_defconfig @@ -61,6 +61,8 @@ CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_CPU=y CONFIG_RTL8169=y CONFIG_SPI=y diff --git a/configs/mvebu_crb_cn9130_defconfig b/configs/mvebu_crb_cn9130_defconfig index 86e8b75e61b..2541b8a22ae 100644 --- a/configs/mvebu_crb_cn9130_defconfig +++ b/configs/mvebu_crb_cn9130_defconfig @@ -47,6 +47,8 @@ CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_ARP_TIMEOUT=200 CONFIG_NET_RETRY_COUNT=50 CONFIG_AHCI_MVEBU=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_MISC=y diff --git a/configs/mvebu_db-88f3720_defconfig b/configs/mvebu_db-88f3720_defconfig index 7b7382216ba..437d438f8ff 100644 --- a/configs/mvebu_db-88f3720_defconfig +++ b/configs/mvebu_db-88f3720_defconfig @@ -47,6 +47,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ARP_TIMEOUT=200 CONFIG_NET_RETRY_COUNT=50 CONFIG_AHCI_MVEBU=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_CLK=y CONFIG_CLK_MVEBU=y # CONFIG_MVEBU_GPIO is not set diff --git a/configs/mvebu_db_armada8k_defconfig b/configs/mvebu_db_armada8k_defconfig index 0b4afbe59e8..d3633d04dcb 100644 --- a/configs/mvebu_db_armada8k_defconfig +++ b/configs/mvebu_db_armada8k_defconfig @@ -43,6 +43,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ARP_TIMEOUT=200 CONFIG_NET_RETRY_COUNT=50 CONFIG_AHCI_MVEBU=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_MISC=y diff --git a/configs/mvebu_db_cn9130_defconfig b/configs/mvebu_db_cn9130_defconfig index 9f6196095b3..7563873ef2e 100644 --- a/configs/mvebu_db_cn9130_defconfig +++ b/configs/mvebu_db_cn9130_defconfig @@ -48,6 +48,8 @@ CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_ARP_TIMEOUT=200 CONFIG_NET_RETRY_COUNT=50 CONFIG_AHCI_MVEBU=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_DM_GPIO_LOOKUP_LABEL=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/mvebu_espressobin-88f3720_defconfig b/configs/mvebu_espressobin-88f3720_defconfig index 8368e4c028b..dd1f9121506 100644 --- a/configs/mvebu_espressobin-88f3720_defconfig +++ b/configs/mvebu_espressobin-88f3720_defconfig @@ -58,6 +58,8 @@ CONFIG_NET_RETRY_COUNT=50 CONFIG_NET_RANDOM_ETHADDR=y CONFIG_AHCI_PCI=y CONFIG_AHCI_MVEBU=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_CLK=y CONFIG_CLK_MVEBU=y CONFIG_DM_I2C=y diff --git a/configs/mvebu_mcbin-88f8040_defconfig b/configs/mvebu_mcbin-88f8040_defconfig index be4bbe87ca2..d334c89ed31 100644 --- a/configs/mvebu_mcbin-88f8040_defconfig +++ b/configs/mvebu_mcbin-88f8040_defconfig @@ -47,6 +47,8 @@ CONFIG_ARP_TIMEOUT=200 CONFIG_NET_RETRY_COUNT=50 CONFIG_NET_RANDOM_ETHADDR=y CONFIG_AHCI_MVEBU=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_MISC=y diff --git a/configs/mvebu_puzzle-m801-88f8040_defconfig b/configs/mvebu_puzzle-m801-88f8040_defconfig index c05beef8f94..5cec3d8a682 100644 --- a/configs/mvebu_puzzle-m801-88f8040_defconfig +++ b/configs/mvebu_puzzle-m801-88f8040_defconfig @@ -50,6 +50,8 @@ CONFIG_ARP_TIMEOUT=200 CONFIG_NET_RETRY_COUNT=50 CONFIG_NET_RANDOM_ETHADDR=y CONFIG_AHCI_MVEBU=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index edfa8b69288..1f15287369e 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -56,6 +56,7 @@ CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y +CONFIG_LBA48=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_FSL_USDHC=y CONFIG_PHYLIB=y diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig index 551057fcfa2..fa2c280a8d4 100644 --- a/configs/mx6qsabrelite_defconfig +++ b/configs/mx6qsabrelite_defconfig @@ -54,6 +54,7 @@ CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y +CONFIG_LBA48=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_SYS_I2C_LEGACY=y diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig index ca482ce745e..5d105522dd1 100644 --- a/configs/nas220_defconfig +++ b/configs/nas220_defconfig @@ -52,6 +52,7 @@ CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0x100 CONFIG_SYS_ATA_REG_OFFSET=0x100 CONFIG_SYS_ATA_ALT_OFFSET=0x100 +CONFIG_LBA48=y CONFIG_KIRKWOOD_GPIO=y # CONFIG_MMC is not set CONFIG_MTD=y diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig index 32308a04f65..68d1eeff11e 100644 --- a/configs/net2big_v2_defconfig +++ b/configs/net2big_v2_defconfig @@ -55,6 +55,8 @@ CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=2 +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig index 2a1c3ac2d34..98d8e59119f 100644 --- a/configs/netspace_lite_v2_defconfig +++ b/configs/netspace_lite_v2_defconfig @@ -55,6 +55,8 @@ CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig index 3c847316f6f..11fd496e6d3 100644 --- a/configs/netspace_max_v2_defconfig +++ b/configs/netspace_max_v2_defconfig @@ -55,6 +55,8 @@ CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=2 +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig index 8239d45a845..1025ca30ad9 100644 --- a/configs/netspace_mini_v2_defconfig +++ b/configs/netspace_mini_v2_defconfig @@ -54,6 +54,8 @@ CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 CONFIG_BLK=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig index 673e0a42a3f..1bb9915cc1e 100644 --- a/configs/netspace_v2_defconfig +++ b/configs/netspace_v2_defconfig @@ -55,6 +55,8 @@ CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig index 2bf3e3a9614..ec75ead6e20 100644 --- a/configs/nitrogen6q2g_defconfig +++ b/configs/nitrogen6q2g_defconfig @@ -62,6 +62,7 @@ CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y +CONFIG_LBA48=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_SYS_I2C_LEGACY=y diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig index e169350f55d..1b999ecc9c1 100644 --- a/configs/nitrogen6q_defconfig +++ b/configs/nitrogen6q_defconfig @@ -62,6 +62,7 @@ CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y +CONFIG_LBA48=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_SYS_I2C_LEGACY=y diff --git a/configs/novena_defconfig b/configs/novena_defconfig index 77d7afa6df8..6b0f17628dc 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -63,6 +63,7 @@ CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y +CONFIG_LBA48=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MXC=y diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig index 8b525eb5ff5..0c1d808f127 100644 --- a/configs/nsa310s_defconfig +++ b/configs/nsa310s_defconfig @@ -52,6 +52,8 @@ CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/octeon_nic23_defconfig b/configs/octeon_nic23_defconfig index 53309152301..23cdef3316c 100644 --- a/configs/octeon_nic23_defconfig +++ b/configs/octeon_nic23_defconfig @@ -45,6 +45,8 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_TFTP_TSIZE=y CONFIG_SATA=y CONFIG_AHCI_MVEBU=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_CLK=y # CONFIG_INPUT is not set CONFIG_MISC=y diff --git a/configs/octeontx_81xx_defconfig b/configs/octeontx_81xx_defconfig index 72e7c6ff539..38ef7f41632 100644 --- a/configs/octeontx_81xx_defconfig +++ b/configs/octeontx_81xx_defconfig @@ -82,6 +82,8 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TFTP_TSIZE=y CONFIG_SCSI_AHCI=y CONFIG_AHCI_PCI=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_DM_I2C=y CONFIG_MISC=y CONFIG_SUPPORT_EMMC_RPMB=y diff --git a/configs/octeontx_83xx_defconfig b/configs/octeontx_83xx_defconfig index fbdf1cb846b..371f6186697 100644 --- a/configs/octeontx_83xx_defconfig +++ b/configs/octeontx_83xx_defconfig @@ -79,6 +79,8 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TFTP_TSIZE=y CONFIG_SCSI_AHCI=y CONFIG_AHCI_PCI=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_DM_I2C=y CONFIG_MISC=y CONFIG_SUPPORT_EMMC_RPMB=y diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig index 967246a9db9..ba5d3a6bfc3 100644 --- a/configs/openrd_base_defconfig +++ b/configs/openrd_base_defconfig @@ -56,6 +56,7 @@ CONFIG_SYS_ATA_REG_OFFSET=0x100 CONFIG_SYS_ATA_ALT_OFFSET=0x100 CONFIG_SYS_ATA_IDE0_OFFSET=0x2000 CONFIG_SYS_ATA_IDE1_OFFSET=0x4000 +CONFIG_LBA48=y # CONFIG_MMC_HW_PARTITIONING is not set CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig index f1dbed87d69..0ee6ce3a65e 100644 --- a/configs/openrd_client_defconfig +++ b/configs/openrd_client_defconfig @@ -57,6 +57,7 @@ CONFIG_SYS_ATA_REG_OFFSET=0x100 CONFIG_SYS_ATA_ALT_OFFSET=0x100 CONFIG_SYS_ATA_IDE0_OFFSET=0x2000 CONFIG_SYS_ATA_IDE1_OFFSET=0x4000 +CONFIG_LBA48=y # CONFIG_MMC_HW_PARTITIONING is not set CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig index 49668150fb9..f7e8a3ee4e7 100644 --- a/configs/openrd_ultimate_defconfig +++ b/configs/openrd_ultimate_defconfig @@ -57,6 +57,7 @@ CONFIG_SYS_ATA_REG_OFFSET=0x100 CONFIG_SYS_ATA_ALT_OFFSET=0x100 CONFIG_SYS_ATA_IDE0_OFFSET=0x2000 CONFIG_SYS_ATA_IDE1_OFFSET=0x4000 +CONFIG_LBA48=y # CONFIG_MMC_HW_PARTITIONING is not set CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/pogo_v4_defconfig b/configs/pogo_v4_defconfig index 6f928edf41b..c62c88f1b5a 100644 --- a/configs/pogo_v4_defconfig +++ b/configs/pogo_v4_defconfig @@ -64,6 +64,8 @@ CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_KIRKWOOD_GPIO=y # CONFIG_MMC_HW_PARTITIONING is not set CONFIG_MVEBU_MMC=y diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig index 28a7d18c826..ea702cdc981 100644 --- a/configs/qemu-ppce500_defconfig +++ b/configs/qemu-ppce500_defconfig @@ -39,6 +39,7 @@ CONFIG_DM=y CONFIG_SIMPLE_BUS_CORRECT_RANGE=y CONFIG_BLK=y CONFIG_HAVE_BLOCK_DEVICE=y +CONFIG_LBA48=y CONFIG_CHIP_SELECTS_PER_CTRL=0 CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig index 66192734d55..b81e60658fd 100644 --- a/configs/qemu-x86_64_defconfig +++ b/configs/qemu-x86_64_defconfig @@ -65,6 +65,8 @@ CONFIG_SYS_ATA_DATA_OFFSET=0 CONFIG_SYS_ATA_REG_OFFSET=0 CONFIG_SYS_ATA_ALT_OFFSET=0 CONFIG_ATAPI=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_CPU=y CONFIG_NVME_PCI=y CONFIG_SPL_DM_RTC=y diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig index b9ab1805ab2..c65b5868cd2 100644 --- a/configs/qemu-x86_defconfig +++ b/configs/qemu-x86_defconfig @@ -46,6 +46,8 @@ CONFIG_SYS_ATA_DATA_OFFSET=0 CONFIG_SYS_ATA_REG_OFFSET=0 CONFIG_SYS_ATA_ALT_OFFSET=0 CONFIG_ATAPI=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_CPU=y CONFIG_NVME_PCI=y CONFIG_SPI=y diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig index d014b2a8144..fa1e7bd2c0c 100644 --- a/configs/sheevaplug_defconfig +++ b/configs/sheevaplug_defconfig @@ -53,6 +53,8 @@ CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=2 +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_MVEBU_MMC=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/slimbootloader_defconfig b/configs/slimbootloader_defconfig index 2e938b64867..b6b9f88c00b 100644 --- a/configs/slimbootloader_defconfig +++ b/configs/slimbootloader_defconfig @@ -28,6 +28,8 @@ CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y # CONFIG_ACPIGEN is not set +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y # CONFIG_PCI_PNP is not set CONFIG_CONSOLE_SCROLL_LINES=5 # CONFIG_GZIP is not set diff --git a/configs/som-db5800-som-6867_defconfig b/configs/som-db5800-som-6867_defconfig index 3b96d64b3b6..d912ac70bc1 100644 --- a/configs/som-db5800-som-6867_defconfig +++ b/configs/som-db5800-som-6867_defconfig @@ -56,6 +56,8 @@ CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_CPU=y CONFIG_E1000=y CONFIG_SPI=y diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 1519f7dbce5..4b304f8c7f5 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -71,6 +71,8 @@ CONFIG_SYS_MMC_ENV_PART=1 CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_FSL_USDHC=y diff --git a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig index daaefba3642..afb1957ddd2 100644 --- a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig +++ b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig @@ -58,6 +58,8 @@ CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_CPU=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_INTEL=y diff --git a/configs/theadorable-x86-conga-qa3-e3845_defconfig b/configs/theadorable-x86-conga-qa3-e3845_defconfig index a62ce3e0a5c..113c0dae2e6 100644 --- a/configs/theadorable-x86-conga-qa3-e3845_defconfig +++ b/configs/theadorable-x86-conga-qa3-e3845_defconfig @@ -57,6 +57,8 @@ CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_CPU=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_INTEL=y diff --git a/configs/theadorable-x86-dfi-bt700_defconfig b/configs/theadorable-x86-dfi-bt700_defconfig index a54f34a6cf7..95ff9d763ff 100644 --- a/configs/theadorable-x86-dfi-bt700_defconfig +++ b/configs/theadorable-x86-dfi-bt700_defconfig @@ -55,6 +55,8 @@ CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_CPU=y CONFIG_DM_I2C=y CONFIG_NUVOTON_NCT6102D=y diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index a3d6313f020..25eb2e88ec1 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -67,6 +67,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 +CONFIG_LBA48=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y CONFIG_FPGA_ALTERA=y diff --git a/configs/uDPU_defconfig b/configs/uDPU_defconfig index 613a81b9b77..a17bdd8ad7c 100644 --- a/configs/uDPU_defconfig +++ b/configs/uDPU_defconfig @@ -54,6 +54,8 @@ CONFIG_ARP_TIMEOUT=200 CONFIG_NET_RETRY_COUNT=50 CONFIG_NET_RANDOM_ETHADDR=y CONFIG_AHCI_MVEBU=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y CONFIG_CLK=y CONFIG_CLK_MVEBU=y CONFIG_DM_I2C=y diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig index e5bacb1bb8e..a1d2d7f2e47 100644 --- a/configs/udoo_defconfig +++ b/configs/udoo_defconfig @@ -44,6 +44,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y +CONFIG_LBA48=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_FSL_USDHC=y CONFIG_PHYLIB=y diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index 595176190a7..8b0533ce585 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -59,6 +59,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y +CONFIG_LBA48=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MXC=y diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index 9c9641d2ed9..7715c403656 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig @@ -116,6 +116,7 @@ config FSL_SATA depends on PPC select AHCI select LIBATA + imply LBA48 help Enable this driver to support the SATA controller found in some Freescale PowerPC SoCs. diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig index d6d1c6e32cc..b5b482086af 100644 --- a/drivers/block/Kconfig +++ b/drivers/block/Kconfig @@ -218,3 +218,19 @@ config IDE_RESET must be defined in a board-specific file. endif # IDE + +config LBA48 + bool "Enable LBA support for disks larger than 137GB" + depends on HAVE_BLOCK_DEVICE + help + Set this to enable support for disks larger than 137GB. + Also look at CONFIG_SYS_64BIT_LBA. Without both of these, LBA48 + support uses 32bit variables and will 'only' support disks up to + 2.1TB. + +config SYS_64BIT_LBA + bool "Enable 64bit number of blocks on a block device" + depends on HAVE_BLOCK_DEVICE + help + Make the block subsystem use 64bit sector addresses, rather than the + default of 32bit. diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index 4c1348c79dc..384217a0d98 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -22,7 +22,6 @@ #ifdef CONFIG_IDE /* ATA */ # define CONFIG_IDE_PREINIT 1 -# undef CONFIG_LBA48 #endif #ifdef CONFIG_DRIVER_DM9000 diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index de197a0bd11..8e75d779c41 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -262,13 +262,6 @@ #endif #endif -/* - * SATA - */ -#ifdef CONFIG_FSL_SATA -#define CONFIG_LBA48 -#endif - /* * Environment */ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 287236f70f2..fce4bfb3dd9 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -472,12 +472,6 @@ extern unsigned long get_sdram_size(void); #endif /* CONFIG_TSEC_ENET */ -/* SATA */ - -#ifdef CONFIG_FSL_SATA -#define CONFIG_LBA48 -#endif /* #ifdef CONFIG_FSL_SATA */ - #ifdef CONFIG_MMC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #endif diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 3c92a3e405b..df16319de4a 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -336,12 +336,6 @@ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif /* CONFIG_PCI */ -/* SATA */ - -#ifdef CONFIG_FSL_SATA_V2 -#define CONFIG_LBA48 -#endif - #ifdef CONFIG_FMAN_ENET #define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x2 #define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x3 diff --git a/include/configs/P4080DS.h b/include/configs/P4080DS.h index 8a0c7039f66..6615dd091e2 100644 --- a/include/configs/P4080DS.h +++ b/include/configs/P4080DS.h @@ -11,8 +11,6 @@ #define CONFIG_PCIE3 -#define CONFIG_LBA48 - #define CONFIG_SYS_SRIO #define CONFIG_SRIO1 /* SRIO port 1 */ #define CONFIG_SRIO2 /* SRIO port 2 */ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index b832fb33d20..767c360b36c 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -390,11 +390,6 @@ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif /* CONFIG_PCI */ -/* SATA */ -#ifdef CONFIG_FSL_SATA_V2 -#define CONFIG_LBA48 -#endif - /* * USB */ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index a96c5bbd095..55b9260d931 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -457,13 +457,6 @@ #define SGMII_CARD_PORT4_PHY_ADDR 0x1F #endif -/* - * SATA - */ -#ifdef CONFIG_FSL_SATA_V2 -#define CONFIG_LBA48 -#endif - /* * USB */ diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 82531f69c44..642099bd098 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -413,13 +413,6 @@ #define AQR113C_PHY_ADDR2 0x08 #endif -/* - * SATA - */ -#ifdef CONFIG_FSL_SATA_V2 -#define CONFIG_LBA48 -#endif - /* * USB */ diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 436f6d0fc8e..757fb054a80 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -152,11 +152,6 @@ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif /* CONFIG_PCI */ -/* SATA */ -#ifdef CONFIG_FSL_SATA_V2 -#define CONFIG_LBA48 -#endif - /* * Environment */ @@ -425,11 +420,6 @@ #define CORTINA_PHY_ADDR4 FM2_10GEC2_PHY_ADDR #endif -/* SATA */ -#ifdef CONFIG_FSL_SATA_V2 -#define CONFIG_LBA48 -#endif - /* * USB */ diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index d0e0e65d85f..5db8b2be2cb 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -25,13 +25,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_USDHC_NUM 3 -/* - * SATA Configs - */ -#ifdef CONFIG_CMD_SATA -#define CONFIG_LBA48 -#endif - /* Network */ #define PHY_ANEG_TIMEOUT 15000 /* PHY needs longer aneg time */ diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index a0bbb409cff..fbe1e35e001 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -149,9 +149,6 @@ #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 -/* SATA */ -#define CONFIG_LBA48 - /* Boot */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 6006f763822..f563a5f3816 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -337,11 +337,6 @@ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif /* CONFIG_PCI */ -/* SATA */ -#ifdef CONFIG_FSL_SATA_V2 -#define CONFIG_LBA48 -#endif - #ifdef CONFIG_FMAN_ENET #define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x1c #define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x1d diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index 808debc6f50..b4cfa61d4e7 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -22,9 +22,6 @@ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ -/* SATA support */ -#define CONFIG_LBA48 - /* PCIe support */ #ifndef CONFIG_SPL_BUILD #define CONFIG_PCI_SCAN_SHOW diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index 298a88c92ed..6fe45a86dcc 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -33,9 +33,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_USDHC_NUM 3 -/* SATA Configs */ -#define CONFIG_LBA48 - /* UART */ #define CONFIG_MXC_UART_BASE UART1_BASE diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h index 07e2b8781fd..fbd83d629c0 100644 --- a/include/configs/dreamplug.h +++ b/include/configs/dreamplug.h @@ -30,9 +30,4 @@ #define CONFIG_MVGBE_PORTS {1, 1} /* enable both ports */ #define CONFIG_PHY_BASE_ADR 0 -/* - * SATA Driver configuration - */ -#define CONFIG_LBA48 - #endif /* _CONFIG_DREAMPLUG_H */ diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index 1d6e6bcc434..86257016824 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -101,8 +101,6 @@ #define __io /* Data, registers and alternate blocks are at the same offset */ /* Each 8-bit ATA register is aligned to a 4-bytes address */ -/* Controller supports 48-bits LBA addressing */ -#define CONFIG_LBA48 /* A single bus, a single device */ /* ATA registers base is at SATA controller base */ /* ATA bus 0 is orion5x port 1 on ED Mini V2 */ diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index 66ea80982b6..d813c6c22e7 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -17,11 +17,6 @@ #include "mx6_common.h" #include -/* SATA Configs */ -#ifdef CONFIG_CMD_SATA -#define CONFIG_LBA48 -#endif - #ifdef CONFIG_CMD_NFS #define NETWORKBOOT \ "setnetworkboot=" \ diff --git a/include/configs/goflexhome.h b/include/configs/goflexhome.h index 832441a7b72..d335a42e99c 100644 --- a/include/configs/goflexhome.h +++ b/include/configs/goflexhome.h @@ -44,7 +44,4 @@ #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 0 -/* SATA driver configuration */ -#define CONFIG_LBA48 - #endif /* _CONFIG_GOFLEXHOME_H */ diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 53954cee3b3..251e360daa9 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -28,13 +28,6 @@ /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -/* - * SATA Configs - */ -#ifdef CONFIG_CMD_SATA - #define CONFIG_LBA48 -#endif - /* * PCI express */ diff --git a/include/configs/highbank.h b/include/configs/highbank.h index d8e71269366..1fc38cfa0cc 100644 --- a/include/configs/highbank.h +++ b/include/configs/highbank.h @@ -20,8 +20,6 @@ * Miscellaneous configurable options */ -#define CONFIG_SYS_64BIT_LBA - /* Environment data setup */ #define CONFIG_SYS_NVRAM_BASE_ADDR 0xfff88000 /* NVRAM base address */ diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h index 0a988e2fadf..5e0f1c90934 100644 --- a/include/configs/lacie_kw.h +++ b/include/configs/lacie_kw.h @@ -21,18 +21,6 @@ #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #endif -/* - * SATA Driver configuration - */ - -#ifdef CONFIG_SATA -#define CONFIG_SYS_64BIT_LBA -#define CONFIG_LBA48 -#if defined(CONFIG_NETSPACE_MAX_V2) || defined(CONFIG_D2NET_V2) || \ - defined(CONFIG_NET2BIG_V2) -#endif -#endif /* CONFIG_SATA */ - /* * Enable GPI0 support */ diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h index 19fd702ab24..81c93375e2e 100644 --- a/include/configs/lsxl.h +++ b/include/configs/lsxl.h @@ -94,9 +94,4 @@ #define CONFIG_PHY_BASE_ADR 7 #endif /* CONFIG_CMD_NET */ -#ifdef CONFIG_SATA -#define CONFIG_SYS_64BIT_LBA -#define CONFIG_LBA48 -#endif - #endif /* _CONFIG_LSXL_H */ diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 66230f0bf17..b8ad0c3a216 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -82,13 +82,6 @@ #define CONFIG_MXC_USB_FLAGS 0 #endif -/* - * SATA - */ -#ifdef CONFIG_CMD_SATA -#define CONFIG_LBA48 -#endif - /* * LCD */ diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h index cae70760bcb..b497ada0655 100644 --- a/include/configs/mvebu_armada-37xx.h +++ b/include/configs/mvebu_armada-37xx.h @@ -36,12 +36,6 @@ #define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3) -/* - * SATA/SCSI/AHCI configuration - */ -#define CONFIG_LBA48 -#define CONFIG_SYS_64BIT_LBA - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 0) \ diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h index 7d7c218bc6a..52d88f70589 100644 --- a/include/configs/mvebu_armada-8k.h +++ b/include/configs/mvebu_armada-8k.h @@ -31,12 +31,6 @@ /* USB ethernet */ -/* - * SATA/SCSI/AHCI configuration - */ -#define CONFIG_LBA48 -#define CONFIG_SYS_64BIT_LBA - /* * PCI configuration */ diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 0afd68b880e..9ceed12e487 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -100,10 +100,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) -#ifdef CONFIG_CMD_SATA - #define CONFIG_LBA48 -#endif - /* Framebuffer and LCD */ #endif /* __CONFIG_H */ diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h index 5b4fbba023f..c6744e970f6 100644 --- a/include/configs/mx6cuboxi.h +++ b/include/configs/mx6cuboxi.h @@ -16,11 +16,6 @@ /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR -/* SATA Configuration */ -#ifdef CONFIG_CMD_SATA -#define CONFIG_LBA48 -#endif - /* Framebuffer */ #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 9b84c36f514..0305aecb143 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -19,13 +19,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_USDHC_NUM 2 -/* - * SATA Configs - */ -#ifdef CONFIG_CMD_SATA -#define CONFIG_LBA48 -#endif - #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 6 diff --git a/include/configs/novena.h b/include/configs/novena.h index 327dde56970..9c67a3a7775 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -59,9 +59,6 @@ #define CONFIG_POWER_PFUZE100 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 -/* SATA Configs */ -#define CONFIG_LBA48 - /* UART */ #define CONFIG_MXC_UART_BASE UART2_BASE diff --git a/include/configs/nsa310s.h b/include/configs/nsa310s.h index 1e6b8d8b0e7..46fd6e6e3b5 100644 --- a/include/configs/nsa310s.h +++ b/include/configs/nsa310s.h @@ -25,8 +25,4 @@ #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 1 -/* Support large HDDs for USB and SATA */ -#define CONFIG_LBA48 -#define CONFIG_SYS_64BIT_LBA - #endif /* _CONFIG_NSA310S_H */ diff --git a/include/configs/octeon_nic23.h b/include/configs/octeon_nic23.h index 0a7b4d8f93e..7d99fd1b019 100644 --- a/include/configs/octeon_nic23.h +++ b/include/configs/octeon_nic23.h @@ -7,15 +7,6 @@ #ifndef __CONFIG_H__ #define __CONFIG_H__ -/* - * SATA/SCSI/AHCI configuration - */ -/* AHCI support Definitions */ -/** Enable 48-bit SATA addressing */ -#define CONFIG_LBA48 -/** Enable 64-bit addressing */ -#define CONFIG_SYS_64BIT_LBA - #include "octeon_common.h" #endif /* __CONFIG_H__ */ diff --git a/include/configs/octeontx_common.h b/include/configs/octeontx_common.h index 22d38588780..2697a703cea 100644 --- a/include/configs/octeontx_common.h +++ b/include/configs/octeontx_common.h @@ -44,14 +44,6 @@ /** Heap size for U-Boot */ -/* AHCI support Definitions */ -#ifdef CONFIG_DM_SCSI -/** Enable 48-bit SATA addressing */ -# define CONFIG_LBA48 -/** Enable 64-bit addressing */ -# define CONFIG_SYS_64BIT_LBA -#endif - #define CONFIG_SYS_MMC_MAX_BLK_COUNT 8192 /** EMMC specific defines */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 186a2568f80..12f45a4acdd 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -112,8 +112,6 @@ #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ -#define CONFIG_LBA48 - #define CONFIG_HWCONFIG /* * These can be toggled for performance analysis, otherwise use default. diff --git a/include/configs/pogo_v4.h b/include/configs/pogo_v4.h index 3365ebe3d2f..24cbf6b72ea 100644 --- a/include/configs/pogo_v4.h +++ b/include/configs/pogo_v4.h @@ -39,10 +39,4 @@ #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 0 -/* - * Support large disk for SATA and USB - */ -#define CONFIG_SYS_64BIT_LBA -#define CONFIG_LBA48 - #endif /* _CONFIG_POGO_V4_H */ diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index 60a17dbcdcd..e427b854fce 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -60,8 +60,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); #define CONFIG_SYS_MONITOR_LEN (512 * 1024) -#define CONFIG_LBA48 - /* RTC */ #define CONFIG_RTC_PT7C4338 diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h index 58345e4e1be..19701ccce22 100644 --- a/include/configs/sheevaplug.h +++ b/include/configs/sheevaplug.h @@ -27,10 +27,4 @@ #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 0 -/* - * Support large disk for SATA and USB - */ -#define CONFIG_SYS_64BIT_LBA -#define CONFIG_LBA48 - #endif /* _CONFIG_SHEEVAPLUG_H */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 5b543fd2db1..327bf98ddb2 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -75,10 +75,6 @@ #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ -#ifdef CONFIG_AHCI -#define CONFIG_SYS_64BIT_LBA -#endif - #ifdef CONFIG_NAND_SUNXI #define CONFIG_SYS_NAND_MAX_ECCPOS 1664 #define CONFIG_SYS_MAX_NAND_DEVICE 8 diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index 293ca467461..dd2c5d77445 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -31,12 +31,6 @@ #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) #endif -/* SATA */ -#ifdef CONFIG_CMD_SATA -#define CONFIG_LBA48 -#define CONFIG_SYS_64BIT_LBA -#endif - /* USB */ #ifdef CONFIG_CMD_USB #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h index c81e89eed8b..4f7c9647e29 100644 --- a/include/configs/theadorable.h +++ b/include/configs/theadorable.h @@ -40,9 +40,6 @@ "fdt_high=0x10000000\0" \ "initrd_high=0x10000000\0" -/* SATA support */ -#define CONFIG_LBA48 - /* FPGA programming support */ #define CONFIG_FPGA_STRATIX_V diff --git a/include/configs/udoo.h b/include/configs/udoo.h index c8d1ed4da68..03e5c04af6e 100644 --- a/include/configs/udoo.h +++ b/include/configs/udoo.h @@ -14,9 +14,6 @@ #define CONFIG_MXC_UART_BASE UART2_BASE -/* SATA Configs */ -#define CONFIG_LBA48 - /* MMC Configuration */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index eb0778d072a..899b8ca470e 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -14,12 +14,6 @@ #define CONFIG_MXC_UART_BASE UART1_BASE -/* SATA Configs */ - -#ifdef CONFIG_CMD_SATA -#define CONFIG_LBA48 -#endif - /* MMC Configuration */ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 48091b95ca7..f28fafe15c6 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -16,13 +16,6 @@ */ #define CONFIG_SYS_BOOTM_LEN (16 << 20) -/* SATA AHCI storage */ -#ifdef CONFIG_SCSI_AHCI -#define CONFIG_LBA48 -#define CONFIG_SYS_64BIT_LBA - -#endif - /* Generic TPM interfaced through LPC bus */ #define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000 -- GitLab From 9836c433094ebbd8e4d06152d09b9a72013d7772 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 10 Jun 2022 22:59:29 -0400 Subject: [PATCH 413/581] ata: sata_sil: Remove useless BLK guard in sata_sil.h Now that the driver only supports CONFIG_BLK, remove the useless guard in sata_sil.h. Signed-off-by: Tom Rini --- drivers/ata/sata_sil.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/ata/sata_sil.h b/drivers/ata/sata_sil.h index bea4322c919..9ad09e5461d 100644 --- a/drivers/ata/sata_sil.h +++ b/drivers/ata/sata_sil.h @@ -212,12 +212,10 @@ enum { CMD_ERR = 0x21, }; -#if CONFIG_IS_ENABLED(BLK) #define ATA_MAX_PORTS 32 struct sil_sata_priv { int port_num; struct sil_sata *sil_sata_desc[ATA_MAX_PORTS]; }; -#endif #endif -- GitLab From 713a8cbb94896350b047c590d0246c1d1fe1400f Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 10 Jun 2022 22:59:30 -0400 Subject: [PATCH 414/581] block: ide: Remove ide_preinit function The only platform currently that defines an ide_preinit function has an empty one that immediately returns. Remove this hook. Signed-off-by: Tom Rini --- board/freescale/m5253demo/m5253demo.c | 5 ----- drivers/block/ide.c | 9 --------- include/configs/M5253DEMO.h | 5 ----- include/ide.h | 4 ---- 4 files changed, 23 deletions(-) diff --git a/board/freescale/m5253demo/m5253demo.c b/board/freescale/m5253demo/m5253demo.c index 2a4703579da..85f5f0c0340 100644 --- a/board/freescale/m5253demo/m5253demo.c +++ b/board/freescale/m5253demo/m5253demo.c @@ -93,11 +93,6 @@ int testdram(void) #ifdef CONFIG_IDE #include -int ide_preinit(void) -{ - return (0); -} - void ide_set_reset(int idereset) { atac_t *ata = (atac_t *) CONFIG_SYS_ATA_BASE_ADDR; diff --git a/drivers/block/ide.c b/drivers/block/ide.c index e8518ff3a11..3270a9f032f 100644 --- a/drivers/block/ide.c +++ b/drivers/block/ide.c @@ -695,15 +695,6 @@ void ide_init(void) unsigned char c; int i, bus; -#ifdef CONFIG_IDE_PREINIT - WATCHDOG_RESET(); - - if (ide_preinit()) { - puts("ide_preinit failed\n"); - return; - } -#endif /* CONFIG_IDE_PREINIT */ - WATCHDOG_RESET(); /* ATAPI Drives seems to need a proper IDE Reset */ diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index 384217a0d98..840d3b4672e 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -19,11 +19,6 @@ . = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text*); -#ifdef CONFIG_IDE -/* ATA */ -# define CONFIG_IDE_PREINIT 1 -#endif - #ifdef CONFIG_DRIVER_DM9000 # define CONFIG_DM9000_BASE (CONFIG_SYS_CS1_BASE | 0x300) # define DM9000_IO CONFIG_DM9000_BASE diff --git a/include/ide.h b/include/ide.h index 2994b7a7622..426cef4e39e 100644 --- a/include/ide.h +++ b/include/ide.h @@ -33,10 +33,6 @@ ulong ide_write(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt, const void *buffer); #endif -#ifdef CONFIG_IDE_PREINIT -int ide_preinit(void); -#endif - #if defined(CONFIG_OF_IDE_FIXUP) int ide_device_present(int dev); #endif -- GitLab From dc2d27ae72d4e380b658d8a0ee3c683fca141f75 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 10 Jun 2022 22:59:31 -0400 Subject: [PATCH 415/581] arm: samsung: Remove dead LCD code Since bb5930d5c97f ("exynos: video: Convert several boards to driver model for video") there have been no callers of any of the exynos_lcd_* family of functions. Remove these from the boards, and then remove unused logo and related code as well. Signed-off-by: Tom Rini Reviewed-by: Minkyu Kang --- arch/arm/mach-exynos/include/mach/system.h | 1 - board/samsung/trats/trats.c | 23 - board/samsung/trats2/trats2.c | 35 - board/samsung/universal_c210/universal.c | 107 - drivers/video/Makefile | 1 - drivers/video/s6e8ax0.c | 265 - include/configs/s5pc210_universal.h | 2 - include/configs/trats.h | 2 - include/configs/trats2.h | 2 - lib/Makefile | 1 - lib/tizen/Makefile | 6 - lib/tizen/tizen.c | 34 - lib/tizen/tizen_logo_16bpp.h | 7934 -------------------- lib/tizen/tizen_logo_16bpp_gzip.h | 647 -- 14 files changed, 9060 deletions(-) delete mode 100644 drivers/video/s6e8ax0.c delete mode 100644 lib/tizen/Makefile delete mode 100644 lib/tizen/tizen.c delete mode 100644 lib/tizen/tizen_logo_16bpp.h delete mode 100644 lib/tizen/tizen_logo_16bpp_gzip.h diff --git a/arch/arm/mach-exynos/include/mach/system.h b/arch/arm/mach-exynos/include/mach/system.h index 48f13c76481..5d0bebac573 100644 --- a/arch/arm/mach-exynos/include/mach/system.h +++ b/arch/arm/mach-exynos/include/mach/system.h @@ -116,6 +116,5 @@ struct exynos5_sysreg { void set_usbhost_mode(unsigned int mode); void set_system_display_ctrl(void); -int exynos_lcd_early_init(const void *blob); #endif /* _EXYNOS4_SYSTEM_H */ diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c index d06687620cf..24bf355ef6e 100644 --- a/board/samsung/trats/trats.c +++ b/board/samsung/trats/trats.c @@ -403,16 +403,6 @@ int exynos_early_init_f(void) return 0; } -void exynos_reset_lcd(void) -{ - gpio_request(EXYNOS4_GPIO_Y45, "lcd_reset"); - gpio_direction_output(EXYNOS4_GPIO_Y45, 1); - udelay(10000); - gpio_direction_output(EXYNOS4_GPIO_Y45, 0); - udelay(10000); - gpio_direction_output(EXYNOS4_GPIO_Y45, 1); -} - int lcd_power(void) { #if !CONFIG_IS_ENABLED(DM_I2C) /* TODO(maintainer): Convert to driver model */ @@ -460,16 +450,3 @@ int mipi_power(void) #endif return 0; } - -#ifdef CONFIG_LCD -void exynos_lcd_misc_init(vidinfo_t *vid) -{ -#ifdef CONFIG_TIZEN - get_tizen_logo_info(vid); -#endif -#ifdef CONFIG_S6E8AX0 - s6e8ax0_init(); - env_set("lcdinfo", "lcd=s6e8ax0"); -#endif -} -#endif diff --git a/board/samsung/trats2/trats2.c b/board/samsung/trats2/trats2.c index a03dc873857..da7f0dc0229 100644 --- a/board/samsung/trats2/trats2.c +++ b/board/samsung/trats2/trats2.c @@ -302,39 +302,4 @@ int mipi_power(void) return 0; } -void exynos_lcd_power_on(void) -{ -#if !CONFIG_IS_ENABLED(DM_I2C) /* TODO(maintainer): Convert to driver model */ - struct pmic *p = pmic_get("MAX77686_PMIC"); - - /* LCD_2.2V_EN: GPC0[1] */ - gpio_request(EXYNOS4X12_GPIO_C01, "lcd_2v2_en"); - gpio_set_pull(EXYNOS4X12_GPIO_C01, S5P_GPIO_PULL_UP); - gpio_direction_output(EXYNOS4X12_GPIO_C01, 1); - - /* LDO25 VCC_3.1V_LCD */ - pmic_probe(p); - max77686_set_ldo_voltage(p, 25, 3100000); - max77686_set_ldo_mode(p, 25, OPMODE_LPM); -#endif -} - -void exynos_reset_lcd(void) -{ - /* reset lcd */ - gpio_request(EXYNOS4X12_GPIO_F21, "lcd_reset"); - gpio_direction_output(EXYNOS4X12_GPIO_F21, 0); - udelay(10); - gpio_set_value(EXYNOS4X12_GPIO_F21, 1); -} - -void exynos_lcd_misc_init(vidinfo_t *vid) -{ -#ifdef CONFIG_TIZEN - get_tizen_logo_info(vid); -#endif -#ifdef CONFIG_S6E8AX0 - s6e8ax0_init(); -#endif -} #endif /* LCD */ diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c index 3764b5478b7..1dde2f799b5 100644 --- a/board/samsung/universal_c210/universal.c +++ b/board/samsung/universal_c210/universal.c @@ -267,98 +267,6 @@ static int init_pmic_lcd(void) return 0; } -void exynos_cfg_lcd_gpio(void) -{ - unsigned int i, f3_end = 4; - - for (i = 0; i < 8; i++) { - /* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */ - gpio_cfg_pin(EXYNOS4_GPIO_F00 + i, S5P_GPIO_FUNC(2)); - gpio_cfg_pin(EXYNOS4_GPIO_F10 + i, S5P_GPIO_FUNC(2)); - gpio_cfg_pin(EXYNOS4_GPIO_F20 + i, S5P_GPIO_FUNC(2)); - /* pull-up/down disable */ - gpio_set_pull(EXYNOS4_GPIO_F00 + i, S5P_GPIO_PULL_NONE); - gpio_set_pull(EXYNOS4_GPIO_F10 + i, S5P_GPIO_PULL_NONE); - gpio_set_pull(EXYNOS4_GPIO_F20 + i, S5P_GPIO_PULL_NONE); - - /* drive strength to max (24bit) */ - gpio_set_drv(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_4X); - gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW); - gpio_set_drv(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_4X); - gpio_set_rate(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_SLOW); - gpio_set_drv(EXYNOS4_GPIO_F20 + i, S5P_GPIO_DRV_4X); - gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW); - } - - for (i = EXYNOS4_GPIO_F30; i < (EXYNOS4_GPIO_F30 + f3_end); i++) { - /* set GPF3[0:3] for RGB Interface and Data lines (32bit) */ - gpio_cfg_pin(i, S5P_GPIO_FUNC(2)); - /* pull-up/down disable */ - gpio_set_pull(i, S5P_GPIO_PULL_NONE); - /* drive strength to max (24bit) */ - gpio_set_drv(i, S5P_GPIO_DRV_4X); - gpio_set_rate(i, S5P_GPIO_DRV_SLOW); - } - - /* gpio pad configuration for LCD reset. */ - gpio_request(EXYNOS4_GPIO_Y45, "lcd_reset"); - gpio_cfg_pin(EXYNOS4_GPIO_Y45, S5P_GPIO_OUTPUT); -} - -int mipi_power(void) -{ - return 0; -} - -void exynos_reset_lcd(void) -{ - gpio_set_value(EXYNOS4_GPIO_Y45, 1); - udelay(10000); - gpio_set_value(EXYNOS4_GPIO_Y45, 0); - udelay(10000); - gpio_set_value(EXYNOS4_GPIO_Y45, 1); - udelay(100); -} - -void exynos_lcd_power_on(void) -{ - struct udevice *dev; - int ret; - u8 reg; - - ret = pmic_get("max8998-pmic", &dev); - if (ret) { - puts("Failed to get MAX8998!\n"); - return; - } - - reg = pmic_reg_read(dev, MAX8998_REG_ONOFF3); - reg |= MAX8998_LDO17; - ret = pmic_reg_write(dev, MAX8998_REG_ONOFF3, reg); - if (ret) { - puts("MAX8998 LDO setting error\n"); - return; - } - - reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2); - reg |= MAX8998_LDO7; - ret = pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg); - if (ret) { - puts("MAX8998 LDO setting error\n"); - return; - } -} - -void exynos_cfg_ldo(void) -{ - ld9040_cfg_ldo(); -} - -void exynos_enable_ldo(unsigned int onoff) -{ - ld9040_enable_ldo(onoff); -} - int exynos_init(void) { gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210; @@ -390,18 +298,3 @@ int exynos_init(void) return 0; } - -#ifdef CONFIG_LCD -void exynos_lcd_misc_init(vidinfo_t *vid) -{ -#ifdef CONFIG_TIZEN - get_tizen_logo_info(vid); -#endif - - /* for LD9040. */ - vid->pclk_name = 1; /* MPLL */ - vid->sclk_div = 1; - - env_set("lcdinfo", "lcd=ld9040"); -} -#endif diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 259658074bc..63d8dbe3c85 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -38,7 +38,6 @@ obj-$(CONFIG_NXP_TDA19988) += tda19988.o obj-$(CONFIG_OSD) += video_osd-uclass.o obj-$(CONFIG_PXA_LCD) += pxa_lcd.o obj-$(CONFIG_SANDBOX_OSD) += sandbox_osd.o -obj-$(CONFIG_S6E8AX0) += s6e8ax0.o obj-$(CONFIG_SCF0403_LCD) += scf0403_lcd.o obj-$(CONFIG_VIDEO_ARM_MALIDP) += mali_dp.o obj-$(CONFIG_VIDEO_BCM2835) += bcm2835.o diff --git a/drivers/video/s6e8ax0.c b/drivers/video/s6e8ax0.c deleted file mode 100644 index 497258f3de9..00000000000 --- a/drivers/video/s6e8ax0.c +++ /dev/null @@ -1,265 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2012 Samsung Electronics - * - * Author: Donghwa Lee - */ - -#include -#include -#include - -#include "exynos/exynos_mipi_dsi_lowlevel.h" -#include "exynos/exynos_mipi_dsi_common.h" - -static void s6e8ax0_panel_cond(struct mipi_dsim_device *dsim_dev) -{ - struct mipi_dsim_master_ops *ops = dsim_dev->master_ops; - int reverse = dsim_dev->dsim_lcd_dev->reverse_panel; - static const unsigned char data_to_send[] = { - 0xf8, 0x3d, 0x35, 0x00, 0x00, 0x00, 0x8d, 0x00, 0x4c, - 0x6e, 0x10, 0x27, 0x7d, 0x3f, 0x10, 0x00, 0x00, 0x20, - 0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08, - 0x23, 0x23, 0xc0, 0xc8, 0x08, 0x48, 0xc1, 0x00, 0xc3, - 0xff, 0xff, 0xc8 - }; - - static const unsigned char data_to_send_reverse[] = { - 0xf8, 0x19, 0x35, 0x00, 0x00, 0x00, 0x93, 0x00, 0x3c, - 0x7d, 0x08, 0x27, 0x7d, 0x3f, 0x00, 0x00, 0x00, 0x20, - 0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08, - 0x23, 0x23, 0xc0, 0xc1, 0x01, 0x41, 0xc1, 0x00, 0xc1, - 0xf6, 0xf6, 0xc1 - }; - - if (reverse) { - ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE, - data_to_send_reverse, - ARRAY_SIZE(data_to_send_reverse)); - } else { - ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE, - data_to_send, ARRAY_SIZE(data_to_send)); - } -} - -static void s6e8ax0_display_cond(struct mipi_dsim_device *dsim_dev) -{ - struct mipi_dsim_master_ops *ops = dsim_dev->master_ops; - static const unsigned char data_to_send[] = { - 0xf2, 0x80, 0x03, 0x0d - }; - - ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE, - data_to_send, ARRAY_SIZE(data_to_send)); -} - -static void s6e8ax0_gamma_cond(struct mipi_dsim_device *dsim_dev) -{ - struct mipi_dsim_master_ops *ops = dsim_dev->master_ops; - /* 7500K 2.2 Set : 30cd */ - static const unsigned char data_to_send[] = { - 0xfa, 0x01, 0x60, 0x10, 0x60, 0xf5, 0x00, 0xff, 0xad, - 0xaf, 0xba, 0xc3, 0xd8, 0xc5, 0x9f, 0xc6, 0x9e, 0xc1, - 0xdc, 0xc0, 0x00, 0x61, 0x00, 0x5a, 0x00, 0x74, - }; - - ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE, - data_to_send, ARRAY_SIZE(data_to_send)); -} - -static void s6e8ax0_gamma_update(struct mipi_dsim_device *dsim_dev) -{ - struct mipi_dsim_master_ops *ops = dsim_dev->master_ops; - static const unsigned char data_to_send[] = { - 0xf7, 0x03 - }; - - ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, data_to_send, - ARRAY_SIZE(data_to_send)); -} - -static void s6e8ax0_etc_source_control(struct mipi_dsim_device *dsim_dev) -{ - struct mipi_dsim_master_ops *ops = dsim_dev->master_ops; - static const unsigned char data_to_send[] = { - 0xf6, 0x00, 0x02, 0x00 - }; - - ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE, - data_to_send, ARRAY_SIZE(data_to_send)); -} - -static void s6e8ax0_etc_pentile_control(struct mipi_dsim_device *dsim_dev) -{ - struct mipi_dsim_master_ops *ops = dsim_dev->master_ops; - static const unsigned char data_to_send[] = { - 0xb6, 0x0c, 0x02, 0x03, 0x32, 0xff, 0x44, 0x44, 0xc0, - 0x00 - }; - - ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE, - data_to_send, ARRAY_SIZE(data_to_send)); -} - -static void s6e8ax0_etc_mipi_control1(struct mipi_dsim_device *dsim_dev) -{ - struct mipi_dsim_master_ops *ops = dsim_dev->master_ops; - static const unsigned char data_to_send[] = { - 0xe1, 0x10, 0x1c, 0x17, 0x08, 0x1d - }; - - ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE, - data_to_send, ARRAY_SIZE(data_to_send)); -} - -static void s6e8ax0_etc_mipi_control2(struct mipi_dsim_device *dsim_dev) -{ - struct mipi_dsim_master_ops *ops = dsim_dev->master_ops; - static const unsigned char data_to_send[] = { - 0xe2, 0xed, 0x07, 0xc3, 0x13, 0x0d, 0x03 - }; - - ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE, - data_to_send, ARRAY_SIZE(data_to_send)); -} - -static void s6e8ax0_etc_power_control(struct mipi_dsim_device *dsim_dev) -{ - struct mipi_dsim_master_ops *ops = dsim_dev->master_ops; - static const unsigned char data_to_send[] = { - 0xf4, 0xcf, 0x0a, 0x12, 0x10, 0x19, 0x33, 0x02 - }; - - ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE, - data_to_send, ARRAY_SIZE(data_to_send)); -} - -static void s6e8ax0_etc_mipi_control3(struct mipi_dsim_device *dsim_dev) -{ - struct mipi_dsim_master_ops *ops = dsim_dev->master_ops; - static const unsigned char data_to_send[] = { - 0xe3, 0x40 - }; - - ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, data_to_send, - ARRAY_SIZE(data_to_send)); -} - -static void s6e8ax0_etc_mipi_control4(struct mipi_dsim_device *dsim_dev) -{ - struct mipi_dsim_master_ops *ops = dsim_dev->master_ops; - static const unsigned char data_to_send[] = { - 0xe4, 0x00, 0x00, 0x14, 0x80, 0x00, 0x00, 0x00 - }; - - ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE, - data_to_send, ARRAY_SIZE(data_to_send)); -} - -static void s6e8ax0_elvss_set(struct mipi_dsim_device *dsim_dev) -{ - struct mipi_dsim_master_ops *ops = dsim_dev->master_ops; - static const unsigned char data_to_send[] = { - 0xb1, 0x04, 0x00 - }; - - ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE, - data_to_send, ARRAY_SIZE(data_to_send)); -} - -static void s6e8ax0_display_on(struct mipi_dsim_device *dsim_dev) -{ - struct mipi_dsim_master_ops *ops = dsim_dev->master_ops; - static const unsigned char data_to_send[] = { - 0x29, 0x00 - }; - - ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE, data_to_send, - ARRAY_SIZE(data_to_send)); -} - -static void s6e8ax0_sleep_out(struct mipi_dsim_device *dsim_dev) -{ - struct mipi_dsim_master_ops *ops = dsim_dev->master_ops; - static const unsigned char data_to_send[] = { - 0x11, 0x00 - }; - - ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE, data_to_send, - ARRAY_SIZE(data_to_send)); -} - -static void s6e8ax0_apply_level1_key(struct mipi_dsim_device *dsim_dev) -{ - struct mipi_dsim_master_ops *ops = dsim_dev->master_ops; - static const unsigned char data_to_send[] = { - 0xf0, 0x5a, 0x5a - }; - - ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE, - data_to_send, ARRAY_SIZE(data_to_send)); -} - -static void s6e8ax0_apply_mtp_key(struct mipi_dsim_device *dsim_dev) -{ - struct mipi_dsim_master_ops *ops = dsim_dev->master_ops; - static const unsigned char data_to_send[] = { - 0xf1, 0x5a, 0x5a - }; - - ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE, - data_to_send, ARRAY_SIZE(data_to_send)); -} - -static void s6e8ax0_panel_init(struct mipi_dsim_device *dsim_dev) -{ - /* - * in case of setting gamma and panel condition at first, - * it shuold be setting like below. - * set_gamma() -> set_panel_condition() - */ - - s6e8ax0_apply_level1_key(dsim_dev); - s6e8ax0_apply_mtp_key(dsim_dev); - - s6e8ax0_sleep_out(dsim_dev); - mdelay(5); - s6e8ax0_panel_cond(dsim_dev); - s6e8ax0_display_cond(dsim_dev); - s6e8ax0_gamma_cond(dsim_dev); - s6e8ax0_gamma_update(dsim_dev); - - s6e8ax0_etc_source_control(dsim_dev); - s6e8ax0_elvss_set(dsim_dev); - s6e8ax0_etc_pentile_control(dsim_dev); - s6e8ax0_etc_mipi_control1(dsim_dev); - s6e8ax0_etc_mipi_control2(dsim_dev); - s6e8ax0_etc_power_control(dsim_dev); - s6e8ax0_etc_mipi_control3(dsim_dev); - s6e8ax0_etc_mipi_control4(dsim_dev); -} - -static int s6e8ax0_panel_set(struct mipi_dsim_device *dsim_dev) -{ - s6e8ax0_panel_init(dsim_dev); - - return 0; -} - -static void s6e8ax0_display_enable(struct mipi_dsim_device *dsim_dev) -{ - s6e8ax0_display_on(dsim_dev); -} - -static struct mipi_dsim_lcd_driver s6e8ax0_dsim_ddi_driver = { - .name = "s6e8ax0", - .id = -1, - - .mipi_panel_init = s6e8ax0_panel_set, - .mipi_display_on = s6e8ax0_display_enable, -}; - -void s6e8ax0_init(void) -{ - exynos_mipi_dsi_register_lcd_driver(&s6e8ax0_dsim_ddi_driver); -} diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 8df7377a0f2..3b94b17ff78 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -11,8 +11,6 @@ #include -#define CONFIG_TIZEN /* TIZEN lib */ - /* Keep L2 Cache Disabled */ /* Universal has 2 banks of DRAM */ diff --git a/include/configs/trats.h b/include/configs/trats.h index db33560f0db..118ceb52501 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -13,8 +13,6 @@ #define CONFIG_TRATS -#define CONFIG_TIZEN /* TIZEN lib */ - #ifndef CONFIG_SYS_L2CACHE_OFF #define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE 0x10502000 diff --git a/include/configs/trats2.h b/include/configs/trats2.h index a4d598d0851..2d644a8b231 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -12,8 +12,6 @@ #include -#define CONFIG_TIZEN /* TIZEN lib */ - #ifndef CONFIG_SYS_L2CACHE_OFF #define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE 0x10502000 diff --git a/lib/Makefile b/lib/Makefile index d9b1811f750..e3deb152879 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -11,7 +11,6 @@ obj-$(CONFIG_EFI_LOADER) += efi_loader/ obj-$(CONFIG_CMD_BOOTEFI_SELFTEST) += efi_selftest/ obj-$(CONFIG_LZMA) += lzma/ obj-$(CONFIG_BZIP2) += bzip2/ -obj-$(CONFIG_TIZEN) += tizen/ obj-$(CONFIG_FIT) += libfdt/ obj-$(CONFIG_OF_LIVE) += of_live.o obj-$(CONFIG_CMD_DHRYSTONE) += dhry/ diff --git a/lib/tizen/Makefile b/lib/tizen/Makefile deleted file mode 100644 index 3651ea21fbe..00000000000 --- a/lib/tizen/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2012 Samsung Electronics -# Donghwa Lee - -obj-$(CONFIG_TIZEN) += tizen.o diff --git a/lib/tizen/tizen.c b/lib/tizen/tizen.c deleted file mode 100644 index 916b2597569..00000000000 --- a/lib/tizen/tizen.c +++ /dev/null @@ -1,34 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2012 Samsung Electronics - * Donghwa Lee - */ - -#include -#include -#include - -#include "tizen_logo_16bpp.h" -#include "tizen_logo_16bpp_gzip.h" - -#ifdef CONFIG_LCD -void get_tizen_logo_info(vidinfo_t *vid) -{ - switch (vid->vl_bpix) { - case 4: - vid->logo_width = TIZEN_LOGO_16BPP_WIDTH; - vid->logo_height = TIZEN_LOGO_16BPP_HEIGHT; - vid->logo_x_offset = TIZEN_LOGO_16BPP_X_OFFSET; - vid->logo_y_offset = TIZEN_LOGO_16BPP_Y_OFFSET; -#if defined(CONFIG_VIDEO_BMP_GZIP) - vid->logo_addr = (ulong)tizen_logo_16bpp_gzip; -#else - vid->logo_addr = (ulong)tizen_logo_16bpp; -#endif - break; - default: - vid->logo_addr = 0; - break; - } -} -#endif diff --git a/lib/tizen/tizen_logo_16bpp.h b/lib/tizen/tizen_logo_16bpp.h deleted file mode 100644 index 12e86269c45..00000000000 --- a/lib/tizen/tizen_logo_16bpp.h +++ /dev/null @@ -1,7934 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2013 Samsung Electronics - * Przemyslaw Marczak - */ - -#ifndef __TIZEN_LOGO_16BPP__ -#define __TIZEN_LOGO_16BPP__ - -#define TIZEN_LOGO_16BPP_WIDTH 452 -#define TIZEN_LOGO_16BPP_HEIGHT 140 - -/* Center align offsets for word "TIZEN" */ -#define TIZEN_LOGO_16BPP_X_OFFSET (16) -#define TIZEN_LOGO_16BPP_Y_OFFSET (-20) - -/* Format: BMP RGB565 16BPP 452x140 */ -unsigned char tizen_logo_16bpp[] = { -0x42,0x4d,0xa6,0xee,0x01,0x00,0x00,0x00,0x00,0x00,0x46,0x00,0x00,0x00,0x38,0x00, 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-0xa9,0x04,0xa9,0x1f,0x3e,0x72,0xf0,0x43,0x21,0x21,0xa1,0xfa,0xea,0x58,0x78,0xe2, -0xa8,0xfa,0x8d,0xe4,0xc0,0xc6,0x38,0x99,0x8f,0xf1,0x58,0xf8,0xa1,0x90,0x50,0xc3, -0xf5,0xf3,0x5f,0x57,0xbb,0x62,0xfd,0x2b,0x7a,0x1e,0xb7,0xc7,0xc2,0x0f,0x85,0x84, -0x9a,0xa2,0x37,0x9f,0x52,0xfb,0xa2,0x4f,0xcf,0x0f,0x3f,0x4a,0x61,0x12,0xbb,0x27, -0xaf,0x09,0x0e,0x85,0x84,0x1a,0xae,0x9f,0x3d,0x13,0x7b,0x7a,0x3e,0xb1,0x4b,0x38, -0x3c,0xf3,0x96,0x18,0x21,0x23,0x24,0xd4,0x04,0x1d,0xec,0x3e,0x35,0xb0,0x3b,0x4e, -0xfc,0x50,0x70,0x28,0x24,0xd4,0x1c,0xfd,0xdd,0xa1,0xdd,0xf1,0xee,0x49,0x94,0x41, -0xa3,0xfb,0xcc,0x1f,0x09,0x0e,0x85,0x84,0x9a,0xa4,0x0b,0x87,0x76,0x53,0x28,0xa3, -0x54,0xf7,0x99,0xc3,0x82,0x43,0x21,0xa1,0xa6,0xe9,0x0f,0x7f,0xe9,0xe2,0xf8,0xf0, -0x99,0xa7,0x05,0x87,0x42,0x42,0x4d,0x55,0x47,0x68,0xf6,0xe8,0xb0,0xe0,0x50,0x48, -0xa8,0xed,0xf5,0xff,0x01,0xd1,0x0a,0xff,0xc9,0xa6,0xee,0x01,0x00}; -#endif -- GitLab From 1e03e03d03a358ad905e90f77565f19909b6063f Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 10 Jun 2022 22:59:32 -0400 Subject: [PATCH 416/581] arm: exynos: Remove old pwm backlight driver Remove the unused older exynos pwm backlight driver. Signed-off-by: Tom Rini Reviewed-by: Minkyu Kang --- .../mach-exynos/include/mach/pwm_backlight.h | 20 --------- drivers/video/exynos/exynos_pwm_bl.c | 44 ------------------- 2 files changed, 64 deletions(-) delete mode 100644 arch/arm/mach-exynos/include/mach/pwm_backlight.h delete mode 100644 drivers/video/exynos/exynos_pwm_bl.c diff --git a/arch/arm/mach-exynos/include/mach/pwm_backlight.h b/arch/arm/mach-exynos/include/mach/pwm_backlight.h deleted file mode 100644 index c7d3a91e318..00000000000 --- a/arch/arm/mach-exynos/include/mach/pwm_backlight.h +++ /dev/null @@ -1,20 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2012 Samsung Electronics - * - * Author: Donghwa Lee - */ - -#ifndef _PWM_BACKLIGHT_H_ -#define _PWM_BACKLIGHT_H_ - -struct pwm_backlight_data { - int pwm_id; - int period; - int max_brightness; - int brightness; -}; - -extern int exynos_pwm_backlight_init(struct pwm_backlight_data *pd); - -#endif /* _PWM_BACKLIGHT_H_ */ diff --git a/drivers/video/exynos/exynos_pwm_bl.c b/drivers/video/exynos/exynos_pwm_bl.c deleted file mode 100644 index a3d467aa23b..00000000000 --- a/drivers/video/exynos/exynos_pwm_bl.c +++ /dev/null @@ -1,44 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * PWM BACKLIGHT driver for Board based on EXYNOS. - * - * Author: Donghwa Lee - * - * Derived from linux/drivers/video/backlight/pwm_backlight.c - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -static struct pwm_backlight_data *pwm; - -static int exynos_pwm_backlight_update_status(void) -{ - int brightness = pwm->brightness; - int max = pwm->max_brightness; - - if (brightness == 0) { - pwm_config(pwm->pwm_id, 0, pwm->period); - pwm_disable(pwm->pwm_id); - } else { - pwm_config(pwm->pwm_id, - brightness * pwm->period / max, pwm->period); - pwm_enable(pwm->pwm_id); - } - return 0; -} - -int exynos_pwm_backlight_init(struct pwm_backlight_data *pd) -{ - pwm = pd; - - exynos_pwm_backlight_update_status(); - - return 0; -} -- GitLab From 24ec3dea4bf07e8928e82d509ce5bc742fdbde9b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 10 Jun 2022 22:59:33 -0400 Subject: [PATCH 417/581] arm: samsung: Migrate a number of symbols to Kconfig - In a number of cases, use CONFIG_ARCH_EXYNOS[45] rather than CONFIG_EXYNOS[45] - In other cases, test for CONFIG_ARCH_EXYNOS or CONFIG_ARCH_S5PC1XX - Migrate specific SoC CONFIG values to Kconfig - Use CONFIG_TARGET_x rather than CONFIG_x - Migrate other CONFIG_EXYNOS_x symbols to Kconfig - Reference CONFIG_EXYNOS_RELOCATE_CODE_BASE directly as EXYNOS_RELOCATE_CODE_BASE - Rename CONFIG_S5P_PA_SYSRAM to CONFIG_SMP_PEN_ADDR to match the rest of U-Boot usage. Cc: Minkyu Kang Signed-off-by: Tom Rini --- arch/arm/Kconfig | 3 ++ arch/arm/dts/Makefile | 8 ++--- arch/arm/include/asm/spl.h | 5 ++-- arch/arm/mach-exynos/Kconfig | 39 +++++++++++++++++++++++++ arch/arm/mach-exynos/Makefile | 4 +-- arch/arm/mach-exynos/dmc_init_exynos4.c | 2 +- arch/arm/mach-exynos/exynos4_setup.h | 4 +-- arch/arm/mach-exynos/lowlevel_init.c | 8 +++-- arch/arm/mach-exynos/sec_boot.S | 2 +- board/samsung/arndale/arndale.c | 4 +-- configs/odroid-xu3_defconfig | 1 + configs/odroid_defconfig | 1 + configs/trats2_defconfig | 1 + configs/trats_defconfig | 1 + drivers/i2c/exynos_hs_i2c.c | 2 +- drivers/i2c/s3c24x0_i2c.c | 4 +-- include/configs/arndale.h | 6 +--- include/configs/espresso7420.h | 2 -- include/configs/exynos-common.h | 4 --- include/configs/exynos4-common.h | 2 -- include/configs/exynos5-common.h | 10 ------- include/configs/exynos5-dt-common.h | 2 -- include/configs/exynos5250-common.h | 2 -- include/configs/exynos5420-common.h | 7 ----- include/configs/exynos7420-common.h | 4 --- include/configs/exynos78x0-common.h | 4 --- include/configs/odroid.h | 3 -- include/configs/odroid_xu3.h | 3 -- include/configs/origen.h | 4 --- include/configs/s5p_goni.h | 5 ---- include/configs/smdkc100.h | 8 ----- include/configs/smdkv310.h | 2 -- include/configs/trats.h | 5 ---- include/configs/trats2.h | 3 -- include/power/fg_battery_cell_params.h | 2 +- scripts/Makefile.spl | 6 ++-- 36 files changed, 74 insertions(+), 99 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index e682d65e512..ddef3d03ab7 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -609,6 +609,9 @@ config ARM64_SUPPORT_AARCH32 help This ARM64 system supports AArch32 execution state. +config S5P + def_bool y if ARCH_EXYNOS || ARCH_S5PC1XX + choice prompt "Target select" default TARGET_HIKEY diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index a9f4cccf8db..87b210dbb01 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -5,9 +5,9 @@ dtb-$(CONFIG_TARGET_TAURUS) += at91sam9g20-taurus.dtb dtb-$(CONFIG_TARGET_CORVUS) += at91sam9g45-corvus.dtb dtb-$(CONFIG_TARGET_GURNARD) += at91sam9g45-gurnard.dtb -dtb-$(CONFIG_S5PC100) += s5pc1xx-smdkc100.dtb -dtb-$(CONFIG_S5PC110) += s5pc1xx-goni.dtb -dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \ +dtb-$(CONFIG_TARGET_SMDKC100) += s5pc1xx-smdkc100.dtb +dtb-$(CONFIG_TARGET_S5P_GONI) += s5pc1xx-goni.dtb +dtb-$(CONFIG_ARCH_EXYNOS4) += exynos4210-origen.dtb \ exynos4210-smdkv310.dtb \ exynos4210-universal_c210.dtb \ exynos4210-trats.dtb \ @@ -19,7 +19,7 @@ dtb-$(CONFIG_TARGET_HIKEY960) += hi3660-hikey960.dtb dtb-$(CONFIG_TARGET_POPLAR) += hi3798cv200-poplar.dtb -dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \ +dtb-$(CONFIG_ARCH_EXYNOS5) += exynos5250-arndale.dtb \ exynos5250-snow.dtb \ exynos5250-spring.dtb \ exynos5250-smdk5250.dtb \ diff --git a/arch/arm/include/asm/spl.h b/arch/arm/include/asm/spl.h index b5790bd0bc4..0ece4b09060 100644 --- a/arch/arm/include/asm/spl.h +++ b/arch/arm/include/asm/spl.h @@ -6,9 +6,8 @@ #ifndef _ASM_SPL_H_ #define _ASM_SPL_H_ -#if defined(CONFIG_ARCH_OMAP2PLUS) \ - || defined(CONFIG_EXYNOS4) || defined(CONFIG_EXYNOS5) \ - || defined(CONFIG_EXYNOS4210) || defined(CONFIG_ARCH_K3) +#if defined(CONFIG_ARCH_EXYNOS4) || defined(CONFIG_ARCH_EXYNOS5) || \ + defined(CONFIG_ARCH_K3) || defined(CONFIG_ARCH_OMAP2PLUS) /* Platform-specific defines */ #include diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 77fb9d1775b..84102908561 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -54,11 +54,15 @@ endchoice if ARCH_EXYNOS4 +config EXYNOS4210 + bool + choice prompt "EXYNOS4 board select" config TARGET_SMDKV310 bool "Exynos4210 SMDKV310 board" + select EXYNOS4210 select OF_CONTROL select SUPPORT_SPL @@ -70,6 +74,7 @@ config TARGET_S5PC210_UNIVERSAL config TARGET_ORIGEN bool "Exynos4412 Origen board" + select EXYNOS4210 select SUPPORT_SPL config TARGET_TRATS2 @@ -83,6 +88,15 @@ endif if ARCH_EXYNOS5 +config EXYNOS5250 + bool + +config EXYNOS5420 + bool + +config EXYNOS5_DT + bool + config SPL_GPIO default y @@ -97,6 +111,8 @@ choice config TARGET_ODROID_XU3 bool "Exynos5422 Odroid board" + select EXYNOS5_DT + select EXYNOS5420 select OF_CONTROL config TARGET_ARNDALE @@ -105,36 +121,49 @@ config TARGET_ARNDALE select ARM_ERRATA_774769 select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT + select EXYNOS5250 select OF_CONTROL select SUPPORT_SPL config TARGET_SMDK5250 bool "SMDK5250 board" + select EXYNOS5_DT + select EXYNOS5250 select OF_CONTROL select SUPPORT_SPL config TARGET_SNOW bool "Snow board" + select EXYNOS5_DT + select EXYNOS5250 select OF_CONTROL select SUPPORT_SPL config TARGET_SPRING bool "Spring board" + select EXYNOS5_DT + select EXYNOS5250 select OF_CONTROL select SUPPORT_SPL config TARGET_SMDK5420 bool "SMDK5420 board" + select EXYNOS5_DT + select EXYNOS5420 select OF_CONTROL select SUPPORT_SPL config TARGET_PEACH_PI bool "Peach Pi board" + select EXYNOS5_DT + select EXYNOS5420 select OF_CONTROL select SUPPORT_SPL config TARGET_PEACH_PIT bool "Peach Pit board" + select EXYNOS5_DT + select EXYNOS5420 select OF_CONTROL select SUPPORT_SPL @@ -189,6 +218,16 @@ endif config SYS_SOC default "exynos" +config EXYNOS_ACE_SHA + bool "Advanced Crypto Engine SHA support" + depends on (ARCH_EXYNOS4 || ARCH_EXYNOS5) && (LIB_HW_RAND || SHA_HW_ACCEL) + default y if ARCH_EXYNOS5 + +config EXYNOS_TMU + bool "Exynos5 thermal management unit support" + depends on ARCH_EXYNOS5 + default y + source "board/samsung/smdkv310/Kconfig" source "board/samsung/trats/Kconfig" source "board/samsung/universal_c210/Kconfig" diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index e895c13157f..dd097cf5418 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile @@ -10,8 +10,8 @@ obj-$(CONFIG_ARM64) += mmu-arm64.o obj-$(CONFIG_EXYNOS5420) += sec_boot.o ifdef CONFIG_SPL_BUILD -obj-$(CONFIG_EXYNOS5) += clock_init_exynos5.o -obj-$(CONFIG_EXYNOS5) += dmc_common.o dmc_init_ddr3.o +obj-$(CONFIG_ARCH_EXYNOS5) += clock_init_exynos5.o +obj-$(CONFIG_ARCH_EXYNOS5) += dmc_common.o dmc_init_ddr3.o obj-$(CONFIG_EXYNOS4210)+= dmc_init_exynos4.o clock_init_exynos4.o obj-y += spl_boot.o tzpc.o obj-y += lowlevel_init.o diff --git a/arch/arm/mach-exynos/dmc_init_exynos4.c b/arch/arm/mach-exynos/dmc_init_exynos4.c index ecddc726849..58a3c82f681 100644 --- a/arch/arm/mach-exynos/dmc_init_exynos4.c +++ b/arch/arm/mach-exynos/dmc_init_exynos4.c @@ -175,7 +175,7 @@ void mem_ctrl_init(int reset) * 0: full_sync */ writel(1, ASYNC_CONFIG); -#ifdef CONFIG_ORIGEN +#ifdef CONFIG_TARGET_ORIGEN /* Interleave: 2Bit, Interleave_bit1: 0x15, Interleave_bit0: 0x7 */ writel(APB_SFR_INTERLEAVE_CONF_VAL, EXYNOS4_MIU_BASE + APB_SFR_INTERLEAVE_CONF_OFFSET); diff --git a/arch/arm/mach-exynos/exynos4_setup.h b/arch/arm/mach-exynos/exynos4_setup.h index a08d64a8e23..fbb45eb897e 100644 --- a/arch/arm/mach-exynos/exynos4_setup.h +++ b/arch/arm/mach-exynos/exynos4_setup.h @@ -420,7 +420,7 @@ struct mem_timings { #define ABP_SFR_SLV1_SINGLE_ADDRMAP_START_OFFSET 0x828 #define ABP_SFR_SLV1_SINGLE_ADDRMAP_END_OFFSET 0x830 -#ifdef CONFIG_ORIGEN +#ifdef CONFIG_TARGET_ORIGEN /* Interleave: 2Bit, Interleave_bit1: 0x15, Interleave_bit0: 0x7 */ #define APB_SFR_INTERLEAVE_CONF_VAL 0x20001507 #define APB_SFR_ARBRITATION_CONF_VAL 0x00000001 @@ -542,7 +542,7 @@ struct mem_timings { #define CONTROL2_VAL 0x00000000 -#ifdef CONFIG_ORIGEN +#ifdef CONFIG_TARGET_ORIGEN #define TIMINGREF_VAL 0x000000BB #define TIMINGROW_VAL 0x4046654f #define TIMINGDATA_VAL 0x46400506 diff --git a/arch/arm/mach-exynos/lowlevel_init.c b/arch/arm/mach-exynos/lowlevel_init.c index 2645a8ff492..1ff5fcac1b3 100644 --- a/arch/arm/mach-exynos/lowlevel_init.c +++ b/arch/arm/mach-exynos/lowlevel_init.c @@ -49,6 +49,10 @@ enum { }; #ifdef CONFIG_EXYNOS5420 + +/* Address for relocating helper code (Last 4 KB of IRAM) */ +#define EXYNOS_RELOCATE_CODE_BASE (CONFIG_IRAM_TOP - 0x1000) + /* * Power up secondary CPUs. */ @@ -56,7 +60,7 @@ static void secondary_cpu_start(void) { v7_enable_smp(EXYNOS5420_INFORM_BASE); svc32_mode_en(); - branch_bx(CONFIG_EXYNOS_RELOCATE_CODE_BASE); + branch_bx(EXYNOS_RELOCATE_CODE_BASE); } /* @@ -153,7 +157,7 @@ static void power_down_core(void) static void secondary_cores_configure(void) { /* Clear secondary boot iRAM base */ - writel(0x0, (CONFIG_EXYNOS_RELOCATE_CODE_BASE + 0x1C)); + writel(0x0, (EXYNOS_RELOCATE_CODE_BASE + 0x1C)); /* set lowpower flag and address */ writel(CPU_RST_FLAG_VAL, CONFIG_LOWPOWER_FLAG); diff --git a/arch/arm/mach-exynos/sec_boot.S b/arch/arm/mach-exynos/sec_boot.S index 59d05e6c01d..40c07209e47 100644 --- a/arch/arm/mach-exynos/sec_boot.S +++ b/arch/arm/mach-exynos/sec_boot.S @@ -21,7 +21,7 @@ relocate_wait_code: .ltorg /* * Secondary core waits here until Primary wake it up. - * Below code is copied to CONFIG_EXYNOS_RELOCATE_CODE_BASE. + * Below code is copied to (CONFIG_IRAM_TOP - 0x1000) * This is a workaround code which is supposed to act as a * substitute/supplement to the iROM code. * diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c index b43242fd3f4..5320c1f2e0a 100644 --- a/board/samsung/arndale/arndale.c +++ b/board/samsung/arndale/arndale.c @@ -112,10 +112,10 @@ int checkboard(void) } #endif -#ifdef CONFIG_S5P_PA_SYSRAM +#ifdef CONFIG_SMP_PEN_ADDR void smp_set_core_boot_addr(unsigned long addr, int corenr) { - writel(addr, CONFIG_S5P_PA_SYSRAM); + writel(addr, CONFIG_SMP_PEN_ADDR); /* make sure this write is really executed */ __asm__ volatile ("dsb\n"); diff --git a/configs/odroid-xu3_defconfig b/configs/odroid-xu3_defconfig index 7acdca93398..929a52140d5 100644 --- a/configs/odroid-xu3_defconfig +++ b/configs/odroid-xu3_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_TEXT_BASE=0x43E00000 CONFIG_SYS_MALLOC_LEN=0x5004000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_ARCH_EXYNOS5=y +# CONFIG_EXYNOS_TMU is not set CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x310000 diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig index d442aca7887..8beb6a006e5 100644 --- a/configs/odroid_defconfig +++ b/configs/odroid_defconfig @@ -8,6 +8,7 @@ CONFIG_SYS_MALLOC_LEN=0x5004000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_ARCH_EXYNOS4=y CONFIG_TARGET_ODROID=y +CONFIG_EXYNOS_ACE_SHA=y CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x140000 diff --git a/configs/trats2_defconfig b/configs/trats2_defconfig index 00a663fcf2a..5c47a22d1e0 100644 --- a/configs/trats2_defconfig +++ b/configs/trats2_defconfig @@ -8,6 +8,7 @@ CONFIG_SYS_MALLOC_LEN=0x5001000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_ARCH_EXYNOS4=y CONFIG_TARGET_TRATS2=y +CONFIG_EXYNOS_ACE_SHA=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 CONFIG_DEFAULT_DEVICE_TREE="exynos4412-trats2" diff --git a/configs/trats_defconfig b/configs/trats_defconfig index d5f08666068..008a8ff4b30 100644 --- a/configs/trats_defconfig +++ b/configs/trats_defconfig @@ -8,6 +8,7 @@ CONFIG_SYS_MALLOC_LEN=0x5001000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_ARCH_EXYNOS4=y CONFIG_TARGET_TRATS=y +CONFIG_EXYNOS_ACE_SHA=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 CONFIG_DEFAULT_DEVICE_TREE="exynos4210-trats" diff --git a/drivers/i2c/exynos_hs_i2c.c b/drivers/i2c/exynos_hs_i2c.c index 39bcacc17a7..a7349e06cfd 100644 --- a/drivers/i2c/exynos_hs_i2c.c +++ b/drivers/i2c/exynos_hs_i2c.c @@ -147,7 +147,7 @@ static int hsi2c_get_clk_details(struct s3c24x0_i2c_bus *i2c_bus) unsigned int i = 0, utemp0 = 0, utemp1 = 0; unsigned int t_ftl_cycle; -#if (defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5) +#if defined(CONFIG_ARCH_EXYNOS4) || defined(CONFIG_ARCH_EXYNOS5) clkin = get_i2c_clk(); #else clkin = get_PCLK(); diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c index aaccb3aa228..505e20bc61c 100644 --- a/drivers/i2c/s3c24x0_i2c.c +++ b/drivers/i2c/s3c24x0_i2c.c @@ -8,7 +8,7 @@ #include #include #include -#if (defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5) +#if defined(CONFIG_ARCH_EXYNOS4) || defined(CONFIG_ARCH_EXYNOS5) #include #include #include @@ -53,7 +53,7 @@ static void read_write_byte(struct s3c24x0_i2c *i2c) static void i2c_ch_init(struct s3c24x0_i2c *i2c, int speed, int slaveadd) { ulong freq, pres = 16, div; -#if (defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5) +#if defined(CONFIG_ARCH_EXYNOS4) || defined(CONFIG_ARCH_EXYNOS5) freq = get_i2c_clk(); #else freq = get_PCLK(); diff --git a/include/configs/arndale.h b/include/configs/arndale.h index 5ebba0cda20..7a244769e30 100644 --- a/include/configs/arndale.h +++ b/include/configs/arndale.h @@ -14,13 +14,9 @@ #include "exynos5250-common.h" #include -/* MMC SPL */ -#define CONFIG_EXYNOS_SPL - /* Miscellaneous configurable options */ -#define CONFIG_S5P_PA_SYSRAM 0x02020000 -#define CONFIG_SMP_PEN_ADDR CONFIG_S5P_PA_SYSRAM +#define CONFIG_SMP_PEN_ADDR 0x02020000 /* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */ #define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000 diff --git a/include/configs/espresso7420.h b/include/configs/espresso7420.h index 660d1a08049..2f067a44248 100644 --- a/include/configs/espresso7420.h +++ b/include/configs/espresso7420.h @@ -10,8 +10,6 @@ #include -#define CONFIG_ESPRESSO7420 - #define CONFIG_SYS_SDRAM_BASE 0x40000000 /* DRAM Memory Banks */ diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h index cbcef261f43..79860212f40 100644 --- a/include/configs/exynos-common.h +++ b/include/configs/exynos-common.h @@ -8,10 +8,6 @@ #ifndef __EXYNOS_COMMON_H #define __EXYNOS_COMMON_H -/* High Level Configuration Options */ -#define CONFIG_SAMSUNG /* in a SAMSUNG core */ -#define CONFIG_S5P /* S5P Family */ - #include /* get chip and board defs */ #include #include diff --git a/include/configs/exynos4-common.h b/include/configs/exynos4-common.h index 4202c626126..625a2d8dc18 100644 --- a/include/configs/exynos4-common.h +++ b/include/configs/exynos4-common.h @@ -8,8 +8,6 @@ #ifndef __CONFIG_EXYNOS4_COMMON_H #define __CONFIG_EXYNOS4_COMMON_H -#define CONFIG_EXYNOS4 /* Exynos4 Family */ - #include "exynos-common.h" /* SD/MMC configuration */ diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index 7ab821d08ca..44f5cb1e83f 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -8,15 +8,8 @@ #ifndef __CONFIG_EXYNOS5_COMMON_H #define __CONFIG_EXYNOS5_COMMON_H -#define CONFIG_EXYNOS5 /* Exynos5 Family */ - #include "exynos-common.h" -#define CONFIG_EXYNOS_SPL - -/* Enable ACE acceleration for SHA1 and SHA256 */ -#define CONFIG_EXYNOS_ACE_SHA - /* Power Down Modes */ #define S5P_CHECK_SLEEP 0x00000BAD #define S5P_CHECK_DIDLE 0xBAD00000 @@ -31,9 +24,6 @@ /* select serial console configuration */ #define EXYNOS5_DEFAULT_UART_OFFSET 0x010000 -/* Thermal Management Unit */ -#define CONFIG_EXYNOS_TMU - /* MMC SPL */ #define COPY_BL2_FNPTR_ADDR 0x02020030 diff --git a/include/configs/exynos5-dt-common.h b/include/configs/exynos5-dt-common.h index bcbdfa7ae35..38f6940a3db 100644 --- a/include/configs/exynos5-dt-common.h +++ b/include/configs/exynos5-dt-common.h @@ -15,8 +15,6 @@ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" -#define CONFIG_EXYNOS5_DT - #define CONFIG_SYS_SPI_BASE 0x12D30000 #define FLASH_SIZE (4 << 20) #define CONFIG_SPI_BOOTING diff --git a/include/configs/exynos5250-common.h b/include/configs/exynos5250-common.h index 82cb8aff7b5..e6f6dbe6bff 100644 --- a/include/configs/exynos5250-common.h +++ b/include/configs/exynos5250-common.h @@ -9,8 +9,6 @@ #ifndef __CONFIG_5250_H #define __CONFIG_5250_H -#define CONFIG_EXYNOS5250 - #define CONFIG_SYS_SDRAM_BASE 0x40000000 /* USB */ diff --git a/include/configs/exynos5420-common.h b/include/configs/exynos5420-common.h index 5e1aba7692e..cfff8bb27ae 100644 --- a/include/configs/exynos5420-common.h +++ b/include/configs/exynos5420-common.h @@ -8,19 +8,12 @@ #ifndef __CONFIG_EXYNOS5420_H #define __CONFIG_EXYNOS5420_H -#define CONFIG_EXYNOS5420 - -#define CONFIG_EXYNOS5_DT - #define CONFIG_VAR_SIZE_SPL #define CONFIG_IRAM_TOP 0x02074000 #define CONFIG_PHY_IRAM_BASE 0x02020000 -/* Address for relocating helper code (Last 4 KB of IRAM) */ -#define CONFIG_EXYNOS_RELOCATE_CODE_BASE (CONFIG_IRAM_TOP - 0x1000) - /* * Low Power settings */ diff --git a/include/configs/exynos7420-common.h b/include/configs/exynos7420-common.h index e8aed567102..a8bef860c2f 100644 --- a/include/configs/exynos7420-common.h +++ b/include/configs/exynos7420-common.h @@ -8,10 +8,6 @@ #ifndef __CONFIG_EXYNOS7420_COMMON_H #define __CONFIG_EXYNOS7420_COMMON_H -/* High Level Configuration Options */ -#define CONFIG_SAMSUNG /* in a SAMSUNG core */ -#define CONFIG_S5P - #include /* get chip and board defs */ #include diff --git a/include/configs/exynos78x0-common.h b/include/configs/exynos78x0-common.h index 4a2e56b6358..6b1de18bc15 100644 --- a/include/configs/exynos78x0-common.h +++ b/include/configs/exynos78x0-common.h @@ -11,10 +11,6 @@ #ifndef __CONFIG_EXYNOS78x0_COMMON_H #define __CONFIG_EXYNOS78x0_COMMON_H -/* High Level Configuration Options */ -#define CONFIG_SAMSUNG /* in a SAMSUNG core */ -#define CONFIG_S5P - #include /* get chip and board defs */ #include diff --git a/include/configs/odroid.h b/include/configs/odroid.h index dec658dd13a..d4cc88206bd 100644 --- a/include/configs/odroid.h +++ b/include/configs/odroid.h @@ -146,9 +146,6 @@ /* GPT */ -/* Security subsystem - enable hw_rand() */ -#define CONFIG_EXYNOS_ACE_SHA - /* USB */ #define CONFIG_USB_EHCI_EXYNOS diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index ed3cf212acb..35e7d7d2658 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -31,9 +31,6 @@ #define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525 #define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5 -/* FIXME: MUST BE REMOVED AFTER TMU IS TURNED ON */ -#undef CONFIG_EXYNOS_TMU - #define CONFIG_DFU_ALT_SYSTEM \ "uImage fat 0 1;" \ "zImage fat 0 1;" \ diff --git a/include/configs/origen.h b/include/configs/origen.h index 4d296b7a03f..36aaa7c14fb 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -10,10 +10,6 @@ #include -/* High Level Configuration Options */ -#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */ -#define CONFIG_ORIGEN 1 /* working with ORIGEN*/ - /* ORIGEN has 4 bank of DRAM */ #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index d27116ad113..8b7e2e5dc9e 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -10,11 +10,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* High Level Configuration Options */ -#define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */ -#define CONFIG_S5P 1 /* which is in a S5P Family */ -#define CONFIG_S5PC110 1 /* which is in a S5PC110 */ - #include #include /* get chip and board defs */ diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index 2f04b077ad3..9a9f3fedff1 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -11,14 +11,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */ -#define CONFIG_S5P 1 /* which is in a S5P Family */ -#define CONFIG_S5PC100 1 /* which is in a S5PC100 */ - #include /* get chip and board defs */ /* input clock of PLL: SMDKC100 has 12MHz input clock */ diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index 1367b7d0600..bb0f5473030 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -13,8 +13,6 @@ #undef CONFIG_USB_GADGET_DWC2_OTG_PHY /* High Level Configuration Options */ -#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */ - #define CONFIG_SYS_SDRAM_BASE 0x40000000 /* Handling Sleep Mode*/ diff --git a/include/configs/trats.h b/include/configs/trats.h index 118ceb52501..ee4a583baa8 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -11,8 +11,6 @@ #include -#define CONFIG_TRATS - #ifndef CONFIG_SYS_L2CACHE_OFF #define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE 0x10502000 @@ -128,9 +126,6 @@ /* GPT */ -/* Security subsystem - enable hw_rand() */ -#define CONFIG_EXYNOS_ACE_SHA - /* Common misc for Samsung */ #define CONFIG_MISC_COMMON diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 2d644a8b231..c5df03a9f54 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -116,9 +116,6 @@ /* GPT */ -/* Security subsystem - enable hw_rand() */ -#define CONFIG_EXYNOS_ACE_SHA - /* Common misc for Samsung */ #define CONFIG_MISC_COMMON diff --git a/include/power/fg_battery_cell_params.h b/include/power/fg_battery_cell_params.h index b8c895bbabb..500c8ea7174 100644 --- a/include/power/fg_battery_cell_params.h +++ b/include/power/fg_battery_cell_params.h @@ -7,7 +7,7 @@ #ifndef __FG_BATTERY_CELL_PARAMS_H_ #define __FG_BATTERY_CELL_PARAMS_H_ -#if defined(CONFIG_POWER_FG_MAX17042) && defined(CONFIG_TRATS) +#if defined(CONFIG_POWER_FG_MAX17042) && defined(CONFIG_TARGET_TRATS) /* Cell characteristics - Exynos4 TRATS development board */ /* Shall be written to addr 0x80h */ diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl index c1d32f58791..1cfb8115e31 100644 --- a/scripts/Makefile.spl +++ b/scripts/Makefile.spl @@ -253,7 +253,7 @@ endif INPUTS-y += $(obj)/$(SPL_BIN).bin $(obj)/$(SPL_BIN).sym -ifdef CONFIG_SAMSUNG +ifneq ($(CONFIG_ARCH_EXYNOS)$(CONFIG_ARCH_S5PC1XX),) INPUTS-y += $(obj)/$(BOARD)-spl.bin endif @@ -367,8 +367,8 @@ $(platdata-hdr) $(u-boot-spl-platdata_c) &: $(obj)/$(SPL_BIN).dtb @rm -f $(u-boot-spl-all-platdata_c) $(u-boot-spl-all-platdata) $(call if_changed,dtoc) -ifdef CONFIG_SAMSUNG -ifdef CONFIG_VAR_SIZE_SPL +ifneq ($(CONFIG_ARCH_EXYNOS)$(CONFIG_ARCH_S5PC1XX),) +ifeq ($(CONFIG_EXYNOS5420),y) VAR_SIZE_PARAM = --vs else VAR_SIZE_PARAM = -- GitLab From 4d2cab33d43a009bfa342598a1760067b022ae5e Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 10 Jun 2022 22:59:34 -0400 Subject: [PATCH 418/581] video: Migrate exynos display options to Kconfig Following how it's done for the majority of drivers, add a new VIDEO_EXYNOS option and Kconfig file under drivers/video/exynos and list the current options there. Cc: Anatolij Gustschin Cc: Jaehoon Chung Cc: Minkyu Kang Signed-off-by: Tom Rini Reviewed-by: Minkyu Kang --- configs/peach-pi_defconfig | 3 +++ configs/peach-pit_defconfig | 3 +++ configs/snow_defconfig | 3 +++ configs/spring_defconfig | 3 +++ drivers/video/Kconfig | 2 ++ drivers/video/exynos/Kconfig | 20 ++++++++++++++++++++ include/configs/exynos5-dt-common.h | 7 ------- include/configs/peach-pi.h | 7 ------- include/configs/smdk5250.h | 3 --- include/configs/smdk5420.h | 3 --- include/configs/trats.h | 1 - include/configs/trats2.h | 1 - 12 files changed, 34 insertions(+), 22 deletions(-) create mode 100644 drivers/video/exynos/Kconfig diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig index 27be6075661..d6662e18ab7 100644 --- a/configs/peach-pi_defconfig +++ b/configs/peach-pi_defconfig @@ -84,6 +84,9 @@ CONFIG_DM_VIDEO=y # CONFIG_VIDEO_BPP8 is not set CONFIG_VIDCONSOLE_AS_LCD=y CONFIG_DISPLAY=y +CONFIG_VIDEO_EXYNOS=y +CONFIG_EXYNOS_DP=y +CONFIG_EXYNOS_FB=y CONFIG_VIDEO_BRIDGE=y CONFIG_VIDEO_BRIDGE_PARADE_PS862X=y CONFIG_LCD=y diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig index 296b4ceb195..07740571c75 100644 --- a/configs/peach-pit_defconfig +++ b/configs/peach-pit_defconfig @@ -83,6 +83,9 @@ CONFIG_DM_VIDEO=y # CONFIG_VIDEO_BPP8 is not set CONFIG_VIDCONSOLE_AS_LCD=y CONFIG_DISPLAY=y +CONFIG_VIDEO_EXYNOS=y +CONFIG_EXYNOS_DP=y +CONFIG_EXYNOS_FB=y CONFIG_VIDEO_BRIDGE=y CONFIG_VIDEO_BRIDGE_PARADE_PS862X=y CONFIG_LCD=y diff --git a/configs/snow_defconfig b/configs/snow_defconfig index 4377a58130e..8d1b28dcf8c 100644 --- a/configs/snow_defconfig +++ b/configs/snow_defconfig @@ -94,6 +94,9 @@ CONFIG_DM_VIDEO=y # CONFIG_VIDEO_BPP8 is not set CONFIG_VIDCONSOLE_AS_LCD=y CONFIG_DISPLAY=y +CONFIG_VIDEO_EXYNOS=y +CONFIG_EXYNOS_DP=y +CONFIG_EXYNOS_FB=y CONFIG_VIDEO_BRIDGE=y CONFIG_VIDEO_BRIDGE_PARADE_PS862X=y CONFIG_VIDEO_BRIDGE_NXP_PTN3460=y diff --git a/configs/spring_defconfig b/configs/spring_defconfig index ad017564d99..366790b4efe 100644 --- a/configs/spring_defconfig +++ b/configs/spring_defconfig @@ -95,6 +95,9 @@ CONFIG_DM_VIDEO=y # CONFIG_VIDEO_BPP8 is not set CONFIG_VIDCONSOLE_AS_LCD=y CONFIG_DISPLAY=y +CONFIG_VIDEO_EXYNOS=y +CONFIG_EXYNOS_DP=y +CONFIG_EXYNOS_FB=y CONFIG_VIDEO_BRIDGE=y CONFIG_VIDEO_BRIDGE_PARADE_PS862X=y CONFIG_LCD=y diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 965b5879274..4ecc158c460 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -583,6 +583,8 @@ config ATMEL_HLCD source "drivers/video/ti/Kconfig" +source "drivers/video/exynos/Kconfig" + config LOGICORE_DP_TX bool "Enable Logicore DP TX driver" depends on DISPLAY diff --git a/drivers/video/exynos/Kconfig b/drivers/video/exynos/Kconfig new file mode 100644 index 00000000000..37e661b1edd --- /dev/null +++ b/drivers/video/exynos/Kconfig @@ -0,0 +1,20 @@ + +menuconfig VIDEO_EXYNOS + bool "Enable Exynos video support" + depends on DM_VIDEO + help + Enable support for various video output options on Exynos SoCs. + +if VIDEO_EXYNOS + +config EXYNOS_DP + bool "Exynos Display Port support" + +config EXYNOS_FB + bool "Exynos FIMD support" + +config EXYNOS_MIPI_DSIM + bool "Exynos MIPI DSI support" + depends on EXYNOS_FB + +endif diff --git a/include/configs/exynos5-dt-common.h b/include/configs/exynos5-dt-common.h index 38f6940a3db..a94f5a15f0d 100644 --- a/include/configs/exynos5-dt-common.h +++ b/include/configs/exynos5-dt-common.h @@ -19,11 +19,4 @@ #define FLASH_SIZE (4 << 20) #define CONFIG_SPI_BOOTING -/* Display */ -#ifdef CONFIG_LCD -#define CONFIG_EXYNOS_FB -#define CONFIG_EXYNOS_DP -#define LCD_BPP LCD_COLOR16 -#endif - #endif diff --git a/include/configs/peach-pi.h b/include/configs/peach-pi.h index ff4180a8331..7a8d3c63d44 100644 --- a/include/configs/peach-pi.h +++ b/include/configs/peach-pi.h @@ -22,13 +22,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x20000000 -/* Display */ -#ifdef CONFIG_LCD -#define CONFIG_EXYNOS_FB -#define CONFIG_EXYNOS_DP -#define LCD_BPP LCD_COLOR16 -#endif - #define CONFIG_POWER_TPS65090_EC /* DRAM Memory Banks */ diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h index 1ea3b650cd2..c6d2b23197d 100644 --- a/include/configs/smdk5250.h +++ b/include/configs/smdk5250.h @@ -12,7 +12,4 @@ #include #include -#undef CONFIG_EXYNOS_FB -#undef CONFIG_EXYNOS_DP - #endif /* __CONFIG_SMDK_H */ diff --git a/include/configs/smdk5420.h b/include/configs/smdk5420.h index f8d2fafd278..81ae6936178 100644 --- a/include/configs/smdk5420.h +++ b/include/configs/smdk5420.h @@ -12,9 +12,6 @@ #include #include -#undef CONFIG_EXYNOS_FB -#undef CONFIG_EXYNOS_DP - #define CONFIG_SMDK5420 /* which is in a SMDK5420 */ #define CONFIG_SYS_SDRAM_BASE 0x20000000 diff --git a/include/configs/trats.h b/include/configs/trats.h index ee4a583baa8..bca239ae817 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -150,7 +150,6 @@ /* LCD */ #define CONFIG_FB_ADDR 0x52504000 -#define CONFIG_EXYNOS_MIPI_DSIM #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54) #endif /* __CONFIG_H */ diff --git a/include/configs/trats2.h b/include/configs/trats2.h index c5df03a9f54..20bd116c9e3 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -140,7 +140,6 @@ /* LCD */ #define CONFIG_FB_ADDR 0x52504000 -#define CONFIG_EXYNOS_MIPI_DSIM #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54) #endif /* __CONFIG_H */ -- GitLab From 3a21d45d33cb868d0a0cd87de4a1a8327eb6523a Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 10 Jun 2022 22:59:35 -0400 Subject: [PATCH 419/581] siemens: Move CONFIG_FACTORYSET to Kconfig Introduce board/siemens/common/Kconfig and have it hold FACTORYSET to start with. Use select for this on the boards that need it. Cc: Anatolij Gustschin Cc: Samuel Egli Signed-off-by: Tom Rini --- arch/arm/Kconfig | 1 + arch/arm/mach-imx/imx8/Kconfig | 2 ++ arch/arm/mach-omap2/am33xx/Kconfig | 6 ++++++ board/siemens/common/Kconfig | 2 ++ include/configs/capricorn-common.h | 2 -- include/configs/draco.h | 2 -- include/configs/etamin.h | 2 -- include/configs/pxm2.h | 2 -- include/configs/rastaban.h | 2 -- include/configs/rut.h | 2 -- include/configs/thuban.h | 2 -- 11 files changed, 11 insertions(+), 14 deletions(-) create mode 100644 board/siemens/common/Kconfig diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ddef3d03ab7..ef79fc3a0a7 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -2352,6 +2352,7 @@ source "board/hisilicon/poplar/Kconfig" source "board/isee/igep003x/Kconfig" source "board/kontron/sl28/Kconfig" source "board/myir/mys_6ulx/Kconfig" +source "board/siemens/common/Kconfig" source "board/seeed/npi_imx6ull/Kconfig" source "board/socionext/developerbox/Kconfig" source "board/st/stv0991/Kconfig" diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig index 5e1b20a4229..8f185c192d5 100644 --- a/arch/arm/mach-imx/imx8/Kconfig +++ b/arch/arm/mach-imx/imx8/Kconfig @@ -57,11 +57,13 @@ config TARGET_COLIBRI_IMX8X config TARGET_DENEB bool "Support i.MX8QXP Capricorn Deneb board" select BOARD_LATE_INIT + select FACTORYSET select IMX8QXP config TARGET_GIEDI bool "Support i.MX8QXP Capricorn Giedi board" select BOARD_LATE_INIT + select FACTORYSET select IMX8QXP config TARGET_IMX8QM_MEK diff --git a/arch/arm/mach-omap2/am33xx/Kconfig b/arch/arm/mach-omap2/am33xx/Kconfig index 23865d4c070..bd6b0865526 100644 --- a/arch/arm/mach-omap2/am33xx/Kconfig +++ b/arch/arm/mach-omap2/am33xx/Kconfig @@ -138,6 +138,7 @@ config TARGET_DRACO select DM select DM_GPIO select DM_SERIAL + select FACTORYSET imply CMD_DM config TARGET_ETAMIN @@ -146,6 +147,7 @@ config TARGET_ETAMIN select DM select DM_GPIO select DM_SERIAL + select FACTORYSET imply CMD_DM config TARGET_PCM051 @@ -168,6 +170,7 @@ config TARGET_PXM2 select DM select DM_GPIO select DM_SERIAL + select FACTORYSET imply CMD_DM config TARGET_RASTABAN @@ -176,6 +179,7 @@ config TARGET_RASTABAN select DM select DM_GPIO select DM_SERIAL + select FACTORYSET imply CMD_DM config TARGET_RUT @@ -184,6 +188,7 @@ config TARGET_RUT select DM select DM_GPIO select DM_SERIAL + select FACTORYSET imply CMD_DM config TARGET_THUBAN @@ -192,6 +197,7 @@ config TARGET_THUBAN select DM select DM_GPIO select DM_SERIAL + select FACTORYSET imply CMD_DM config TARGET_PDU001 diff --git a/board/siemens/common/Kconfig b/board/siemens/common/Kconfig new file mode 100644 index 00000000000..131439fcfea --- /dev/null +++ b/board/siemens/common/Kconfig @@ -0,0 +1,2 @@ +config FACTORYSET + bool diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index 0bbfe0c2174..4f0d69db2a2 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -23,8 +23,6 @@ #endif /* CONFIG_SPL_BUILD */ -#define CONFIG_FACTORYSET - /* ENET1 connects to base board and MUX with ESAI */ #define CONFIG_FEC_ENET_DEV 1 #define CONFIG_FEC_MXC_PHYADDR 0x0 diff --git a/include/configs/draco.h b/include/configs/draco.h index d3056081013..b4998f5c2e5 100644 --- a/include/configs/draco.h +++ b/include/configs/draco.h @@ -27,8 +27,6 @@ /* Physical Memory Map */ #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ -#define CONFIG_FACTORYSET - /* Define own nand partitions */ #define CONFIG_ENV_RANGE (4 * CONFIG_SYS_ENV_SECT_SIZE) diff --git a/include/configs/etamin.h b/include/configs/etamin.h index 654faedf33e..654bfc61216 100644 --- a/include/configs/etamin.h +++ b/include/configs/etamin.h @@ -75,8 +75,6 @@ #define EEPROM_ADDR_DDR3 0x90 #define EEPROM_ADDR_CHIP 0x120 -#define CONFIG_FACTORYSET - /* nedded by compliance test in read mode */ /* Define own nand partitions */ diff --git a/include/configs/pxm2.h b/include/configs/pxm2.h index 7272470d12e..ad05920ad6b 100644 --- a/include/configs/pxm2.h +++ b/include/configs/pxm2.h @@ -30,8 +30,6 @@ /* Physical Memory Map */ #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* 1GB */ -#define CONFIG_FACTORYSET - #ifndef CONFIG_SPL_BUILD /* Use common default */ diff --git a/include/configs/rastaban.h b/include/configs/rastaban.h index 8e20a448d2a..6c942a80980 100644 --- a/include/configs/rastaban.h +++ b/include/configs/rastaban.h @@ -37,8 +37,6 @@ #define EEPROM_ADDR_DDR3 0x90 #define EEPROM_ADDR_CHIP 0x120 -#define CONFIG_FACTORYSET - /* Define own nand partitions */ #define CONFIG_ENV_RANGE (4 * CONFIG_SYS_ENV_SECT_SIZE) diff --git a/include/configs/rut.h b/include/configs/rut.h index b30b12af52c..fc3194654ae 100644 --- a/include/configs/rut.h +++ b/include/configs/rut.h @@ -21,8 +21,6 @@ /* Physical Memory Map */ #define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MiB */ -#define CONFIG_FACTORYSET - /* Watchdog */ #define WATCHDOG_TRIGGER_GPIO 14 diff --git a/include/configs/thuban.h b/include/configs/thuban.h index 3b120073fef..bb0b9fa1560 100644 --- a/include/configs/thuban.h +++ b/include/configs/thuban.h @@ -30,8 +30,6 @@ #define EEPROM_ADDR_DDR3 0x90 #define EEPROM_ADDR_CHIP 0x120 -#define CONFIG_FACTORYSET - /* Define own nand partitions */ #define CONFIG_ENV_RANGE (4 * CONFIG_SYS_ENV_SECT_SIZE) -- GitLab From 5e5744cb2c7fd5d7f4acec5ce1497cfa18c7e5d0 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 10 Jun 2022 22:59:36 -0400 Subject: [PATCH 420/581] Remove CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE and CONFIG_SPL_ABORT_ON_RAW_IMAGE These symbols do not exist in mainline, remove them. Signed-off-by: Tom Rini --- include/configs/capricorn-common.h | 2 -- include/configs/cgtqmx8.h | 2 -- include/configs/imx8mp_dhcom_pdk2.h | 6 ------ include/configs/imx8qm_mek.h | 2 -- include/configs/imx8qxp_mek.h | 2 -- 5 files changed, 14 deletions(-) diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index 4f0d69db2a2..456d1828d62 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -19,8 +19,6 @@ #define CONFIG_MALLOC_F_ADDR 0x00120000 -#define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE - #endif /* CONFIG_SPL_BUILD */ /* ENET1 connects to base board and MUX with ESAI */ diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h index a8ff0a1317d..6ac84878519 100644 --- a/include/configs/cgtqmx8.h +++ b/include/configs/cgtqmx8.h @@ -17,8 +17,6 @@ #define CONFIG_SERIAL_LPUART_BASE 0x5a060000 #define CONFIG_MALLOC_F_ADDR 0x00120000 -#define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE - #endif /* Flat Device Tree Definitions */ diff --git a/include/configs/imx8mp_dhcom_pdk2.h b/include/configs/imx8mp_dhcom_pdk2.h index 1ad90e5bdbd..79db625d037 100644 --- a/include/configs/imx8mp_dhcom_pdk2.h +++ b/include/configs/imx8mp_dhcom_pdk2.h @@ -14,12 +14,6 @@ #define CONFIG_SYS_MONITOR_LEN SZ_1M -#ifdef CONFIG_SPL_BUILD -/* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE - -#endif - /* Link Definitions */ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index b59502e5895..25d35f04e27 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -18,8 +18,6 @@ #define CONFIG_SERIAL_LPUART_BASE 0x5a060000 #define CONFIG_MALLOC_F_ADDR 0x00120000 -#define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE - #endif #ifdef CONFIG_AHAB_BOOT diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index 511f6c8d9bb..f8ec16ebb19 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -16,8 +16,6 @@ #define CONFIG_SERIAL_LPUART_BASE 0x5a060000 #define CONFIG_MALLOC_F_ADDR 0x00120000 -#define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE - #endif #ifdef CONFIG_AHAB_BOOT -- GitLab From de47ff536363289f92f85ed1e4901724d238432d Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 10 Jun 2022 22:59:37 -0400 Subject: [PATCH 421/581] Convert CONFIG_SYS_MPC85XX_NO_RESETVEC to Kconfig This converts the following to Kconfig: CONFIG_SYS_MPC85XX_NO_RESETVEC Signed-off-by: Tom Rini --- README | 5 ----- arch/powerpc/cpu/mpc85xx/Kconfig | 23 ++++++++++++++++++++ arch/powerpc/cpu/mpc85xx/u-boot-spl.lds | 4 ++-- arch/powerpc/cpu/mpc85xx/u-boot.lds | 4 ++-- configs/P1010RDB-PA_36BIT_NAND_defconfig | 2 ++ configs/P1010RDB-PA_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 2 ++ configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 2 ++ configs/P1010RDB-PA_NAND_defconfig | 2 ++ configs/P1010RDB-PA_NOR_defconfig | 1 + configs/P1010RDB-PA_SDCARD_defconfig | 2 ++ configs/P1010RDB-PA_SPIFLASH_defconfig | 2 ++ configs/P1010RDB-PB_36BIT_NAND_defconfig | 2 ++ configs/P1010RDB-PB_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 2 ++ configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 2 ++ configs/P1010RDB-PB_NAND_defconfig | 2 ++ configs/P1010RDB-PB_NOR_defconfig | 1 + configs/P1010RDB-PB_SDCARD_defconfig | 2 ++ configs/P1010RDB-PB_SPIFLASH_defconfig | 2 ++ configs/P1020RDB-PC_36BIT_NAND_defconfig | 2 ++ configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 2 ++ configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 2 ++ configs/P1020RDB-PC_36BIT_defconfig | 1 + configs/P1020RDB-PC_NAND_defconfig | 2 ++ configs/P1020RDB-PC_SDCARD_defconfig | 2 ++ configs/P1020RDB-PC_SPIFLASH_defconfig | 2 ++ configs/P1020RDB-PC_defconfig | 1 + configs/P1020RDB-PD_NAND_defconfig | 2 ++ configs/P1020RDB-PD_SDCARD_defconfig | 2 ++ configs/P1020RDB-PD_SPIFLASH_defconfig | 2 ++ configs/P1020RDB-PD_defconfig | 1 + configs/P2020RDB-PC_36BIT_NAND_defconfig | 2 ++ configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 2 ++ configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 2 ++ configs/P2020RDB-PC_36BIT_defconfig | 1 + configs/P2020RDB-PC_NAND_defconfig | 2 ++ configs/P2020RDB-PC_SDCARD_defconfig | 2 ++ configs/P2020RDB-PC_SPIFLASH_defconfig | 2 ++ configs/P2020RDB-PC_defconfig | 1 + configs/T1024RDB_NAND_defconfig | 2 ++ configs/T1024RDB_SDCARD_defconfig | 1 + configs/T1024RDB_SPIFLASH_defconfig | 1 + configs/T1042D4RDB_NAND_defconfig | 2 ++ configs/T1042D4RDB_SDCARD_defconfig | 1 + configs/T1042D4RDB_SPIFLASH_defconfig | 1 + configs/T2080QDS_NAND_defconfig | 2 ++ configs/T2080QDS_SDCARD_defconfig | 1 + configs/T2080QDS_SPIFLASH_defconfig | 1 + configs/T2080RDB_NAND_defconfig | 2 ++ configs/T2080RDB_SDCARD_defconfig | 1 + configs/T2080RDB_SPIFLASH_defconfig | 1 + configs/T2080RDB_revD_NAND_defconfig | 2 ++ configs/T2080RDB_revD_SDCARD_defconfig | 1 + configs/T2080RDB_revD_SPIFLASH_defconfig | 1 + configs/T4240RDB_SDCARD_defconfig | 1 + configs/qemu-ppce500_defconfig | 1 + include/configs/P1010RDB.h | 7 ------ include/configs/T102xRDB.h | 9 -------- include/configs/T104xRDB.h | 9 -------- include/configs/T208xQDS.h | 9 -------- include/configs/T208xRDB.h | 9 -------- include/configs/T4240RDB.h | 3 --- include/configs/p1_p2_rdb_pc.h | 7 ------ include/configs/qemu-ppce500.h | 2 -- 65 files changed, 112 insertions(+), 64 deletions(-) diff --git a/README b/README index fca495bcf59..1362a96b0f6 100644 --- a/README +++ b/README @@ -2164,11 +2164,6 @@ Low Level (hardware related) configuration options: proper). Code that needs stage-specific behavior should check this. -- CONFIG_SYS_MPC85XX_NO_RESETVEC - Only for 85xx systems. If this variable is specified, the section - .resetvec is not kept and the section .bootpg is placed in the - previous 4k of the .text section. - - CONFIG_ARCH_MAP_SYSMEM Generally U-Boot (and in particular the md command) uses effective address. It is therefore not necessary to regard diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index c1b4e94d919..02efa1c6030 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -1185,6 +1185,29 @@ config SYS_FSL_LBC_CLK_DIV Defines divider of platform clock(clock input to eLBC controller). +config SYS_MPC85XX_NO_RESETVEC + bool "Discard resetvec section and move bootpg section up" + depends on MPC85xx + help + If this variable is specified, the section .resetvec is not kept and + the section .bootpg is placed in the previous 4k of the .text section. + +config SPL_SYS_MPC85XX_NO_RESETVEC + bool "Discard resetvec section and move bootpg section up, in SPL" + depends on MPC85xx && SPL + help + If this variable is specified, the section .resetvec is not kept and + the section .bootpg is placed in the previous 4k of the .text section, + of the SPL portion of the binary. + +config TPL_SYS_MPC85XX_NO_RESETVEC + bool "Discard resetvec section and move bootpg section up, in TPL" + depends on MPC85xx && TPL + help + If this variable is specified, the section .resetvec is not kept and + the section .bootpg is placed in the previous 4k of the .text section, + of the SPL portion of the binary. + config FSL_VIA bool diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds index b8e08880bdd..62c3c51dea2 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds @@ -15,7 +15,7 @@ SECTIONS . = IMAGE_TEXT_BASE; .text : { /* For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec */ -#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC +#if CONFIG_IS_ENABLED(SYS_MPC85XX_NO_RESETVEC) KEEP(*(.bootpg)) #endif *(.text*) @@ -66,7 +66,7 @@ SECTIONS #endif /* For nor and nand is needed the SPL with section .resetvec */ -#ifndef CONFIG_SYS_MPC85XX_NO_RESETVEC +#if !CONFIG_IS_ENABLED(SYS_MPC85XX_NO_RESETVEC) #if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */ #ifndef BOOT_PAGE_OFFSET #define BOOT_PAGE_OFFSET 0x1000 diff --git a/arch/powerpc/cpu/mpc85xx/u-boot.lds b/arch/powerpc/cpu/mpc85xx/u-boot.lds index 4e137e006f6..8fba7126555 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot.lds @@ -19,7 +19,7 @@ SECTIONS /* Read-only sections, merged into text segment: */ .text : { -#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC +#if CONFIG_IS_ENABLED(SYS_MPC85XX_NO_RESETVEC) KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg)) #endif *(.text*) @@ -74,7 +74,7 @@ SECTIONS __init_end = .; _end = .; -#ifndef CONFIG_SYS_MPC85XX_NO_RESETVEC +#if !CONFIG_IS_ENABLED(SYS_MPC85XX_NO_RESETVEC) .bootpg RESET_VECTOR_ADDRESS - 0xffc : { arch/powerpc/cpu/mpc85xx/start.o (.bootpg) diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index 98c42279d9f..989b897b21b 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -14,6 +14,8 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index f46a2b20af2..570ba4bbc90 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index 0076f6681cf..c407c276bc6 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -13,6 +13,8 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index 3ff3d90bd2d..fd2156a29ff 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -15,6 +15,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index 5d8305e5448..16e91656860 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -14,6 +14,8 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index e2af4d3bed5..681af511aa2 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 978ab4dfc87..e18919ea2c0 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -13,6 +13,8 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index ac7474c4f16..9f3c3375ea7 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -15,6 +15,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 165fa97cd58..1ba6d20272b 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -14,6 +14,8 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 4fd32a1ec52..7f749ed1a7f 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index f3ab87f45b4..3e7db0ad39b 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -13,6 +13,8 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index 4e1eac59043..c93e4d4770e 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -15,6 +15,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 846e403fccd..2dc38477169 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -14,6 +14,8 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index 48a71d5b399..5861409a905 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index 76f5ea14dfe..f9a06641ed4 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -13,6 +13,8 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 7ecfa54dfc4..45945ca16c1 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -15,6 +15,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 54246f0397d..4d32d477f14 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -14,6 +14,8 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 716662efac8..0550371f2fe 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -13,6 +13,8 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index 4aa6829d5e2..6f9062ed38d 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -15,6 +15,8 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index 695a554b14e..5ee0112ea76 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index eb4d8f91f84..e06a58254c9 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -14,6 +14,8 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 66a95fac2b5..e1147d42e58 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -13,6 +13,8 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index c60d3dcd336..5bc7091f20d 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -15,6 +15,8 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index f04a7cd3049..9f3a6d06cc6 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index 95ee0f9d225..7b1809bba0f 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -14,6 +14,8 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index 8f4a0f1093f..bb60f1f360f 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -13,6 +13,8 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index 4c382473246..c03914ec3a6 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -15,6 +15,8 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index 1d08168aa2d..2e817473fc2 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index c196489b3fd..18ece2145dc 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -14,6 +14,8 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index ebf9daf3203..fddd5dacd8d 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -13,6 +13,8 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 046a2f4215a..69ccb8dbc99 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -15,6 +15,8 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index 39d8d2be229..d9bf4dc862a 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 2ab9a1399e4..e6cd51c0710 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -14,6 +14,8 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index edbc9ef6d00..3e152f8111a 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -13,6 +13,8 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 01ef578ff52..1b6ed864d4e 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -15,6 +15,8 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index c27c390f89f..d69e948d603 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index ff5e4967819..b66eebc740b 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -12,6 +12,8 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index 64b1b463d3d..b0d7ada29d2 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index 1f7b658d57b..9a66568377a 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index f7f2b16f7e1..906ff940e4a 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -11,6 +11,8 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index 1d16947471f..6959b3768f4 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 114b7463cb1..0eda3cc6490 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 0a7bf14cb42..28274d481fd 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -18,6 +18,8 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index 45f45fc27d1..d2020977da9 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 38f313e8669..56abc03c877 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index cb6587aac91..8089f2db3ff 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -15,6 +15,8 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index e3884875cb3..839c51d2d1c 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index 23c233e7012..c171e34b619 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index bc596d98464..303b646fef4 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -15,6 +15,8 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index 17d8fa33b3a..91f6069f55c 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index 88d1ea6a609..188a5e45b10 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index c08a96eb4be..462e52fe638 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240RDB=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig index ea702cdc981..8c7b8b4ef98 100644 --- a/configs/qemu-ppce500_defconfig +++ b/configs/qemu-ppce500_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_CLK_FREQ=33000000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_QEMU_PPCE500=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_STDOUT_VIA_ALIAS=y diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index fce4bfb3dd9..27361f2d447 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -20,7 +20,6 @@ #define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000) #define CONFIG_SYS_MMC_U_BOOT_START (0x11000000) #define CONFIG_SYS_MMC_U_BOOT_OFFS (96 << 10) -#define CONFIG_SYS_MPC85XX_NO_RESETVEC #endif #ifdef CONFIG_SPIFLASH @@ -32,7 +31,6 @@ #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (96 << 10) -#define CONFIG_SYS_MPC85XX_NO_RESETVEC #endif #endif @@ -43,7 +41,6 @@ #define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 #else #ifdef CONFIG_TPL_BUILD -#define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_NAND_U_BOOT_SIZE (576 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000) #define CONFIG_SYS_NAND_U_BOOT_START (0x11000000) @@ -51,10 +48,6 @@ #define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0xD0000000 #define CONFIG_SYS_NAND_U_BOOT_START 0xD0000000 -#else -#ifndef CONFIG_MPC85XX_HAVE_RESET_VECTOR -#define CONFIG_SYS_MPC85XX_NO_RESETVEC -#endif #endif #endif #endif diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index b412438116d..bd458ff35e9 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -28,9 +28,6 @@ #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0x30000000 #define CONFIG_SYS_NAND_U_BOOT_START 0x30000000 -#ifndef CONFIG_MPC85XX_HAVE_RESET_VECTOR -#define CONFIG_SYS_MPC85XX_NO_RESETVEC -#endif #endif #ifdef CONFIG_SPIFLASH @@ -39,9 +36,6 @@ #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x30000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x30000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (256 << 10) -#ifndef CONFIG_SPL_BUILD -#define CONFIG_SYS_MPC85XX_NO_RESETVEC -#endif #endif #ifdef CONFIG_SDCARD @@ -50,9 +44,6 @@ #define CONFIG_SYS_MMC_U_BOOT_DST (0x30000000) #define CONFIG_SYS_MMC_U_BOOT_START (0x30000000) #define CONFIG_SYS_MMC_U_BOOT_OFFS (260 << 10) -#ifndef CONFIG_SPL_BUILD -#define CONFIG_SYS_MPC85XX_NO_RESETVEC -#endif #endif #endif /* CONFIG_RAMBOOT_PBL */ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 767c360b36c..505bae931e6 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -32,9 +32,6 @@ #endif #define CONFIG_SYS_NAND_U_BOOT_DST 0x30000000 #define CONFIG_SYS_NAND_U_BOOT_START 0x30000000 -#ifndef CONFIG_MPC85XX_HAVE_RESET_VECTOR -#define CONFIG_SYS_MPC85XX_NO_RESETVEC -#endif #endif #ifdef CONFIG_SPIFLASH @@ -43,9 +40,6 @@ #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x30000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x30000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (256 << 10) -#ifndef CONFIG_SPL_BUILD -#define CONFIG_SYS_MPC85XX_NO_RESETVEC -#endif #endif #ifdef CONFIG_SDCARD @@ -54,9 +48,6 @@ #define CONFIG_SYS_MMC_U_BOOT_DST (0x30000000) #define CONFIG_SYS_MMC_U_BOOT_START (0x30000000) #define CONFIG_SYS_MMC_U_BOOT_OFFS (260 << 10) -#ifndef CONFIG_SPL_BUILD -#define CONFIG_SYS_MPC85XX_NO_RESETVEC -#endif #endif #endif diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 55b9260d931..2db2b07fb4b 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -35,9 +35,6 @@ #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000 #define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 -#ifndef CONFIG_MPC85XX_HAVE_RESET_VECTOR -#define CONFIG_SYS_MPC85XX_NO_RESETVEC -#endif #endif #ifdef CONFIG_SPIFLASH @@ -46,9 +43,6 @@ #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x00200000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (256 << 10) -#ifndef CONFIG_SPL_BUILD -#define CONFIG_SYS_MPC85XX_NO_RESETVEC -#endif #endif #ifdef CONFIG_SDCARD @@ -57,9 +51,6 @@ #define CONFIG_SYS_MMC_U_BOOT_DST (0x00200000) #define CONFIG_SYS_MMC_U_BOOT_START (0x00200000) #define CONFIG_SYS_MMC_U_BOOT_OFFS (260 << 10) -#ifndef CONFIG_SPL_BUILD -#define CONFIG_SYS_MPC85XX_NO_RESETVEC -#endif #endif #endif /* CONFIG_RAMBOOT_PBL */ diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 642099bd098..07e1108f0f0 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -30,9 +30,6 @@ #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000 #define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 -#ifndef CONFIG_MPC85XX_HAVE_RESET_VECTOR -#define CONFIG_SYS_MPC85XX_NO_RESETVEC -#endif #endif #ifdef CONFIG_SPIFLASH @@ -41,9 +38,6 @@ #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x00200000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (256 << 10) -#ifndef CONFIG_SPL_BUILD -#define CONFIG_SYS_MPC85XX_NO_RESETVEC -#endif #endif #ifdef CONFIG_SDCARD @@ -52,9 +46,6 @@ #define CONFIG_SYS_MMC_U_BOOT_DST (0x00200000) #define CONFIG_SYS_MMC_U_BOOT_START (0x00200000) #define CONFIG_SYS_MMC_U_BOOT_OFFS (260 << 10) -#ifndef CONFIG_SPL_BUILD -#define CONFIG_SYS_MPC85XX_NO_RESETVEC -#endif #endif #endif /* CONFIG_RAMBOOT_PBL */ diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 757fb054a80..526d40fa034 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -30,9 +30,6 @@ #define CONFIG_SYS_MMC_U_BOOT_DST 0x00200000 #define CONFIG_SYS_MMC_U_BOOT_START 0x00200000 #define CONFIG_SYS_MMC_U_BOOT_OFFS (260 << 10) -#ifndef CONFIG_SPL_BUILD -#define CONFIG_SYS_MPC85XX_NO_RESETVEC -#endif #endif #endif diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 12f45a4acdd..857f329ba92 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -81,16 +81,13 @@ #define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000) #define CONFIG_SYS_MMC_U_BOOT_START (0x11000000) #define CONFIG_SYS_MMC_U_BOOT_OFFS (128 << 10) -#define CONFIG_SYS_MPC85XX_NO_RESETVEC #elif defined(CONFIG_SPIFLASH) #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (128 << 10) -#define CONFIG_SYS_MPC85XX_NO_RESETVEC #elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD -#define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_NAND_U_BOOT_SIZE (832 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000) #define CONFIG_SYS_NAND_U_BOOT_START (0x11000000) @@ -98,10 +95,6 @@ #define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0xf8f80000 #define CONFIG_SYS_NAND_U_BOOT_START 0xf8f80000 -#else -#ifndef CONFIG_MPC85XX_HAVE_RESET_VECTOR -#define CONFIG_SYS_MPC85XX_NO_RESETVEC -#endif #endif /* not CONFIG_TPL_BUILD */ #endif diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index e427b854fce..c3fef0de173 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -9,8 +9,6 @@ #ifndef __QEMU_PPCE500_H #define __QEMU_PPCE500_H -#define CONFIG_SYS_MPC85XX_NO_RESETVEC - #define CONFIG_SYS_RAMBOOT #define CONFIG_ENABLE_36BIT_PHYS -- GitLab From 910feb50d40acdd38b3709050fbe6b650e8c4b9d Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 10 Jun 2022 22:59:38 -0400 Subject: [PATCH 422/581] Globally remove most CONFIG_SPL_BUILD tests from config headers With the exception of how PowerPC handles SPL and TPL (which has its own issues), we cannot safely hide options under CONFIG_SPL_BUILD. Largely remove the places that have this test today. Signed-off-by: Tom Rini --- include/configs/am335x_igep003x.h | 2 -- include/configs/am335x_sl50.h | 4 ---- include/configs/apalis_imx6.h | 4 ---- include/configs/baltos.h | 2 -- include/configs/brppt1.h | 2 -- include/configs/brsmarc1.h | 3 --- include/configs/brxre1.h | 3 --- include/configs/capricorn-common.h | 3 --- include/configs/clearfog.h | 6 ------ include/configs/cm_fx6.h | 6 ------ include/configs/cm_t335.h | 4 ---- include/configs/colibri_imx6.h | 4 ---- include/configs/controlcenterdc.h | 2 -- include/configs/da850evm.h | 2 -- include/configs/db-88f6820-amc.h | 2 -- include/configs/db-88f6820-gp.h | 2 -- include/configs/db-mv784mp-gp.h | 2 -- include/configs/dh_imx6.h | 2 -- include/configs/draco.h | 6 ------ include/configs/dragonboard820c.h | 2 -- include/configs/ds414.h | 2 -- include/configs/helios4.h | 6 ------ include/configs/imx6dl-mamoj.h | 2 -- include/configs/imx8mm_data_modul_edm_sbc.h | 4 ---- include/configs/imx8mm_evk.h | 2 -- include/configs/imx8mm_icore_mx8mm.h | 4 ---- include/configs/imx8mm_venice.h | 4 ---- include/configs/imx8mn_evk.h | 7 ------- include/configs/imx8mn_venice.h | 4 ---- include/configs/imx8mp_dhcom_pdk2.h | 4 ---- include/configs/imx8mp_evk.h | 2 -- include/configs/imx8mp_venice.h | 4 ---- include/configs/imx8mq_cm.h | 2 -- include/configs/imx8mq_evk.h | 2 -- include/configs/iot2050.h | 4 ---- include/configs/kontron-sl-mx6ul.h | 4 ---- include/configs/kontron-sl-mx8mm.h | 4 ---- include/configs/kp_imx6q_tpc.h | 2 -- include/configs/kylin_rk3036.h | 6 ------ include/configs/ls1012a_common.h | 2 -- include/configs/ls1012afrdm.h | 2 -- include/configs/ls1012afrwy.h | 2 -- include/configs/ls1043a_common.h | 2 -- include/configs/ls1046a_common.h | 2 -- include/configs/ls1046afrwy.h | 2 -- include/configs/ls2080aqds.h | 2 +- include/configs/mx6cuboxi.h | 5 ----- include/configs/mx6sxsabresd.h | 4 ---- include/configs/mx6ul_14x14_evk.h | 4 ---- include/configs/novena.h | 5 ----- include/configs/omap3_igep00x0.h | 4 ---- include/configs/opos6uldev.h | 4 ---- include/configs/pdu001.h | 2 -- include/configs/pomelo.h | 2 -- include/configs/poplar.h | 2 -- include/configs/px30_common.h | 4 ---- include/configs/pxm2.h | 7 ------- include/configs/qemu-riscv.h | 2 -- include/configs/rastaban.h | 6 ------ include/configs/rk3036_common.h | 3 --- include/configs/rk3066_common.h | 4 ---- include/configs/rk3128_common.h | 4 ---- include/configs/rk3188_common.h | 3 --- include/configs/rk322x_common.h | 3 --- include/configs/rk3288_common.h | 3 --- include/configs/rk3308_common.h | 4 ---- include/configs/rk3328_common.h | 4 ---- include/configs/rk3368_common.h | 3 --- include/configs/rk3568_common.h | 2 -- include/configs/rut.h | 8 -------- include/configs/rv1108_common.h | 3 +-- include/configs/sandbox.h | 2 -- include/configs/siemens-am33x-common.h | 6 ------ include/configs/sifive-unleashed.h | 2 -- include/configs/sifive-unmatched.h | 2 -- include/configs/smartweb.h | 2 -- include/configs/socfpga_soc64_common.h | 15 --------------- include/configs/sunxi-common.h | 6 ------ include/configs/synquacer.h | 4 ---- include/configs/taurus.h | 6 ------ include/configs/tegra-common-post.h | 5 ----- include/configs/thuban.h | 6 ------ include/configs/ti_omap4_common.h | 2 -- include/configs/uniphier.h | 4 ---- include/configs/verdin-imx8mm.h | 4 ---- include/configs/verdin-imx8mp.h | 4 ---- include/configs/x530.h | 2 -- include/configs/xilinx_zynqmp.h | 2 -- 88 files changed, 2 insertions(+), 313 deletions(-) diff --git a/include/configs/am335x_igep003x.h b/include/configs/am335x_igep003x.h index 2cf77a67c0c..8d36ddeba59 100644 --- a/include/configs/am335x_igep003x.h +++ b/include/configs/am335x_igep003x.h @@ -20,7 +20,6 @@ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) -#ifndef CONFIG_SPL_BUILD #define CONFIG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ "bootdir=/boot\0" \ @@ -89,7 +88,6 @@ "setenv fdtfile am335x-igep-base0040-lite.dtb; fi; " \ "if test ${fdtfile} = ''; then " \ "echo WARNING: Could not determine device tree to use; fi; \0" -#endif /* NS16550 Configuration */ #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ diff --git a/include/configs/am335x_sl50.h b/include/configs/am335x_sl50.h index a57d551bcf1..79d9d03a176 100644 --- a/include/configs/am335x_sl50.h +++ b/include/configs/am335x_sl50.h @@ -16,8 +16,6 @@ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) -#ifndef CONFIG_SPL_BUILD - #define MEM_LAYOUT_ENV_SETTINGS \ "scriptaddr=0x80000000\0" \ "pxefile_addr_r=0x80100000\0" \ @@ -39,8 +37,6 @@ MEM_LAYOUT_ENV_SETTINGS \ BOOTENV -#endif - /* NS16550 Configuration */ #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ #define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 5db8b2be2cb..7767fce4050 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -48,7 +48,6 @@ #undef CONFIG_SERVERIP #define CONFIG_SERVERIP 192.168.10.1 -#ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 2) \ @@ -58,9 +57,6 @@ #include #undef BOOTENV_RUN_NET_USB_START #define BOOTENV_RUN_NET_USB_START "" -#else /* CONFIG_SPL_BUILD */ -#define BOOTENV -#endif /* CONFIG_SPL_BUILD */ #define UBOOT_UPDATE \ "uboot_hwpart=1\0" \ diff --git a/include/configs/baltos.h b/include/configs/baltos.h index 7b43741fde7..1abda0836ab 100644 --- a/include/configs/baltos.h +++ b/include/configs/baltos.h @@ -52,7 +52,6 @@ #define NANDARGS "" #endif -#ifndef CONFIG_SPL_BUILD #define CONFIG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ "boot_fdt=try\0" \ @@ -183,7 +182,6 @@ "findfdt=setenv fdtfile am335x-baltos.dtb\0" \ NANDARGS /*DFUARGS*/ -#endif /* NS16550 Configuration */ #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h index 12a4048a511..440571a799e 100644 --- a/include/configs/brppt1.h +++ b/include/configs/brppt1.h @@ -99,7 +99,6 @@ MMCSPI_TGTS \ #define LOAD_OFFSET(x) 0x8##x -#ifndef CONFIG_SPL_BUILD #define CONFIG_EXTRA_ENV_SETTINGS \ BUR_COMMON_ENV \ "verify=no\0" \ @@ -123,7 +122,6 @@ NANDTGTS \ "b_default=run b_deftgts; for target in ${b_tgts};"\ " do echo \"### booting ${target} ###\"; run b_${target};" \ " if test ${b_break} = 1; then; exit; fi; done\0" -#endif /* !CONFIG_SPL_BUILD*/ #ifdef CONFIG_MTD_RAW_NAND /* diff --git a/include/configs/brsmarc1.h b/include/configs/brsmarc1.h index f1e6dbf6135..eccf16fdb7a 100644 --- a/include/configs/brsmarc1.h +++ b/include/configs/brsmarc1.h @@ -24,8 +24,6 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) -#ifndef CONFIG_SPL_BUILD - /* Default environment */ #define CONFIG_EXTRA_ENV_SETTINGS \ BUR_COMMON_ENV \ @@ -56,7 +54,6 @@ BUR_COMMON_ENV \ " fdt boardsetup\0" \ "startsys=run vxargs && mw 0x80001100 0 && run vxfdt &&" \ " bootm ${loadaddr} - ${dtbaddr}\0" -#endif /* !CONFIG_SPL_BUILD*/ /* SPI Flash */ diff --git a/include/configs/brxre1.h b/include/configs/brxre1.h index d34d69778f1..b4e8d73db05 100644 --- a/include/configs/brxre1.h +++ b/include/configs/brxre1.h @@ -23,8 +23,6 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) -#ifndef CONFIG_SPL_BUILD - /* Default environment */ #define CONFIG_EXTRA_ENV_SETTINGS \ BUR_COMMON_ENV \ @@ -51,7 +49,6 @@ BUR_COMMON_ENV \ "b_usb0=usb start && load usb 0 ${scradr} usbscript.img && source ${scradr}\0" \ "b_default=run b_deftgts; for target in ${b_tgts};"\ " do run b_${target}; if test ${b_break} = 1; then; exit; fi; done\0" -#endif /* !CONFIG_SPL_BUILD*/ /* Environment */ diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index 456d1828d62..6b1e82ad3b1 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -25,15 +25,12 @@ #define CONFIG_FEC_ENET_DEV 1 #define CONFIG_FEC_MXC_PHYADDR 0x0 -/* I2C Configuration */ -#ifndef CONFIG_SPL_BUILD /* EEPROM */ #define EEPROM_I2C_BUS 0 /* I2C0 */ #define EEPROM_I2C_ADDR 0x50 /* PCA9552 */ #define PCA9552_1_I2C_BUS 1 /* I2C1 */ #define PCA9552_1_I2C_ADDR 0x60 -#endif /* !CONFIG_SPL_BUILD */ /* AHAB */ #ifdef CONFIG_AHAB_BOOT diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h index 8497fe28eff..af04352eda3 100644 --- a/include/configs/clearfog.h +++ b/include/configs/clearfog.h @@ -31,9 +31,7 @@ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ /* PCIe support */ -#ifndef CONFIG_SPL_BUILD #define CONFIG_PCI_SCAN_SHOW -#endif /* Keep device tree and initrd in lower memory so the kernel can access them */ #define RELOCATION_LIMITS_ENV_SETTINGS \ @@ -47,8 +45,6 @@ #include "mv-common.h" /* Include the common distro boot environment */ -#ifndef CONFIG_SPL_BUILD - #ifdef CONFIG_MMC #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) #else @@ -125,6 +121,4 @@ "console=ttyS0,115200\0" \ BOOTENV -#endif /* CONFIG_SPL_BUILD */ - #endif /* _CONFIG_CLEARFOG_H */ diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index fbe1e35e001..02935430c25 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -30,7 +30,6 @@ /* Environment */ -#ifndef CONFIG_SPL_BUILD #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ @@ -130,16 +129,11 @@ func(SATA, sata, 0) #include -#else -#define CONFIG_EXTRA_ENV_SETTINGS -#endif /* NAND */ -#ifndef CONFIG_SPL_BUILD #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* APBH DMA is required for NAND support */ -#endif /* Ethernet */ #define CONFIG_FEC_MXC_PHYADDR 0 diff --git a/include/configs/cm_t335.h b/include/configs/cm_t335.h index b3ccc3cac3d..b2bec10960a 100644 --- a/include/configs/cm_t335.h +++ b/include/configs/cm_t335.h @@ -19,7 +19,6 @@ #define V_OSCK 25000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) -#ifndef CONFIG_SPL_BUILD #define MMCARGS \ "mmcdev=0\0" \ "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ @@ -55,7 +54,6 @@ "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ MMCARGS \ NANDARGS -#endif /* CONFIG_SPL_BUILD */ #define CONFIG_SYS_AUTOLOAD "no" @@ -95,7 +93,6 @@ /* EEPROM */ -#ifndef CONFIG_SPL_BUILD /* * Enable PCA9555 at I2C0-0x26. * First select the I2C0 bus with "i2c dev 0", then use "pca953x" command. @@ -103,6 +100,5 @@ #define CONFIG_PCA953X #define CONFIG_SYS_I2C_PCA953X_ADDR 0x26 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x26, 16} } -#endif /* CONFIG_SPL_BUILD */ #endif /* __CONFIG_CM_T335_H */ diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index f62a3f6688e..0d8922bc3f8 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -45,7 +45,6 @@ #undef CONFIG_SERVERIP #define CONFIG_SERVERIP 192.168.10.1 -#ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 0) \ @@ -54,9 +53,6 @@ #include #undef BOOTENV_RUN_NET_USB_START #define BOOTENV_RUN_NET_USB_START "" -#else /* CONFIG_SPL_BUILD */ -#define BOOTENV -#endif /* CONFIG_SPL_BUILD */ #define UBOOT_UPDATE \ "uboot_hwpart=1\0" \ diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h index d1bea54b207..bb1595f9611 100644 --- a/include/configs/controlcenterdc.h +++ b/include/configs/controlcenterdc.h @@ -18,9 +18,7 @@ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ /* PCIe support */ -#ifndef CONFIG_SPL_BUILD #define CONFIG_PCI_SCAN_SHOW -#endif /* * Environment Configuration diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 71ebca587d1..1f6ac8d28ad 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -101,9 +101,7 @@ /* * I2C Configuration */ -#ifndef CONFIG_SPL_BUILD #define CONFIG_SYS_I2C_EXPANDER_ADDR 0x20 -#endif /* * Flash & Environment diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h index 3c442018ab1..6912f39d32d 100644 --- a/include/configs/db-88f6820-amc.h +++ b/include/configs/db-88f6820-amc.h @@ -15,9 +15,7 @@ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ /* PCIe support */ -#ifndef CONFIG_SPL_BUILD #define CONFIG_PCI_SCAN_SHOW -#endif /* NAND */ diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index 6b2edbb1e0d..3b3a7abd281 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -18,9 +18,7 @@ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ /* PCIe support */ -#ifndef CONFIG_SPL_BUILD #define CONFIG_PCI_SCAN_SHOW -#endif /* Keep device tree and initrd in lower memory so the kernel can access them */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index b4cfa61d4e7..da6514b64fc 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -23,9 +23,7 @@ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ /* PCIe support */ -#ifndef CONFIG_SPL_BUILD #define CONFIG_PCI_SCAN_SHOW -#endif /* NAND */ diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index 6fe45a86dcc..0c0abe6023e 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -52,7 +52,6 @@ #endif #endif -#ifndef CONFIG_SPL_BUILD #define CONFIG_EXTRA_ENV_SETTINGS \ "console=ttymxc0,115200\0" \ "fdt_addr=0x18000000\0" \ @@ -77,7 +76,6 @@ func(DHCP, dhcp, na) #include -#endif /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/draco.h b/include/configs/draco.h index b4998f5c2e5..21367f0a6f5 100644 --- a/include/configs/draco.h +++ b/include/configs/draco.h @@ -30,8 +30,6 @@ /* Define own nand partitions */ #define CONFIG_ENV_RANGE (4 * CONFIG_SYS_ENV_SECT_SIZE) -#ifndef CONFIG_SPL_BUILD - /* Default env settings */ #define CONFIG_EXTRA_ENV_SETTINGS \ "hostname=draco\0" \ @@ -43,8 +41,4 @@ CONFIG_ENV_SETTINGS_V2 \ CONFIG_ENV_SETTINGS_NAND_V2 -#ifndef CONFIG_RESTORE_FLASH -/* set to negative value for no autoboot */ -#endif -#endif /* CONFIG_SPL_BUILD */ #endif /* ! __CONFIG_DRACO_H */ diff --git a/include/configs/dragonboard820c.h b/include/configs/dragonboard820c.h index e3940dc3217..705146d04f7 100644 --- a/include/configs/dragonboard820c.h +++ b/include/configs/dragonboard820c.h @@ -22,9 +22,7 @@ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_BOOTM_LEN SZ_64M -#ifndef CONFIG_SPL_BUILD #include -#endif #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) diff --git a/include/configs/ds414.h b/include/configs/ds414.h index 7fa1a4ebf02..7e3f657e31c 100644 --- a/include/configs/ds414.h +++ b/include/configs/ds414.h @@ -20,9 +20,7 @@ #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE /* PCIe support */ -#ifndef CONFIG_SPL_BUILD #define CONFIG_PCI_SCAN_SHOW -#endif /* * mv-common.h should be defined after CMD configs since it used them diff --git a/include/configs/helios4.h b/include/configs/helios4.h index 23eb0d4375d..cae20073584 100644 --- a/include/configs/helios4.h +++ b/include/configs/helios4.h @@ -31,9 +31,7 @@ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ /* PCIe support */ -#ifndef CONFIG_SPL_BUILD #define CONFIG_PCI_SCAN_SHOW -#endif /* Keep device tree and initrd in lower memory so the kernel can access them */ #define RELOCATION_LIMITS_ENV_SETTINGS \ @@ -47,8 +45,6 @@ #include "mv-common.h" /* Include the common distro boot environment */ -#ifndef CONFIG_SPL_BUILD - #ifdef CONFIG_MMC #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) #else @@ -126,6 +122,4 @@ "console=ttyS0,115200\0" \ BOOTENV -#endif /* CONFIG_SPL_BUILD */ - #endif /* _CONFIG_HELIOS4_H */ diff --git a/include/configs/imx6dl-mamoj.h b/include/configs/imx6dl-mamoj.h index 2707ae64406..0bae238a4b0 100644 --- a/include/configs/imx6dl-mamoj.h +++ b/include/configs/imx6dl-mamoj.h @@ -20,7 +20,6 @@ /* Environment in MMC */ #endif -#ifndef CONFIG_SPL_BUILD #define CONFIG_EXTRA_ENV_SETTINGS \ "scriptaddr=0x14000000\0" \ "fdt_addr_r=0x13000000\0" \ @@ -34,7 +33,6 @@ func(MMC, mmc, 2) #include -#endif /* UART */ #define CONFIG_MXC_UART_BASE UART3_BASE diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h index 282b295497c..5392569a556 100644 --- a/include/configs/imx8mm_data_modul_edm_sbc.h +++ b/include/configs/imx8mm_data_modul_edm_sbc.h @@ -38,8 +38,6 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#if !defined(CONFIG_SPL_BUILD) - #define CONFIG_EXTRA_ENV_SETTINGS \ "altbootcmd=setenv devpart 2 && run bootcmd ; reset\0" \ "bootlimit=3\0" \ @@ -105,5 +103,3 @@ "fi" #endif - -#endif diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index e4b2544410b..227e9649f53 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -22,14 +22,12 @@ #endif -#ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 2) \ func(DHCP, dhcp, na) #include -#endif /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index dfe6966c462..ec4aea337c9 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -20,14 +20,10 @@ /* For RAW image gives a error info not panic */ #endif /* CONFIG_SPL_BUILD */ -#ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 2) \ func(MMC, mmc, 0) #include -#else -#define BOOTENV -#endif #define ENV_MEM_LAYOUT_SETTINGS \ "fdt_addr_r=0x44000000\0" \ diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index 8a6cc69b5eb..cfcad110c71 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -28,7 +28,6 @@ "kernel_comp_addr_r=0x40200000\0" /* Enable Distro Boot */ -#ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 2) \ @@ -36,9 +35,6 @@ func(USB, usb, 1) \ func(DHCP, dhcp, na) #include -#else -#define BOOTENV -#endif /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index 1396ae1422e..9de31cfe81c 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -16,19 +16,12 @@ #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) -#ifdef CONFIG_SPL_BUILD -/* For RAW image gives a error info not panic */ - -#endif - -#ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 2) \ func(DHCP, dhcp, na) #include -#endif /* Initial environment variables */ /* see include/configs/ti_armv7_common.h */ diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index 8ef55aa6eba..adac387fac9 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -25,16 +25,12 @@ "kernel_comp_addr_r=0x40200000\0" /* Enable Distro Boot */ -#ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 2) \ func(USB, usb, 0) \ func(DHCP, dhcp, na) #include -#else -#define BOOTENV -#endif /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/imx8mp_dhcom_pdk2.h b/include/configs/imx8mp_dhcom_pdk2.h index 79db625d037..797ea0c7fad 100644 --- a/include/configs/imx8mp_dhcom_pdk2.h +++ b/include/configs/imx8mp_dhcom_pdk2.h @@ -32,8 +32,6 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#if !defined(CONFIG_SPL_BUILD) - #define CONFIG_EXTRA_ENV_SETTINGS \ "altbootcmd=run bootcmd ; reset\0" \ "bootlimit=3\0" \ @@ -85,5 +83,3 @@ #include #endif - -#endif diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index 618010db9fb..f161cffb971 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -32,13 +32,11 @@ #endif -#ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 2) #include -#endif /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h index fce87b1657d..51fdcb7d5b1 100644 --- a/include/configs/imx8mp_venice.h +++ b/include/configs/imx8mp_venice.h @@ -25,16 +25,12 @@ "kernel_comp_addr_r=0x40200000\0" /* Enable Distro Boot */ -#ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 2) \ func(USB, usb, 0) \ func(DHCP, dhcp, na) #include -#else -#define BOOTENV -#endif /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index a5d6adfaa4c..f7a254359c9 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -26,14 +26,12 @@ /* ENET Config */ /* ENET1 */ -#ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(MMC, mmc, 1) \ func(DHCP, dhcp, na) #include -#endif /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 182f45bb74d..43328082edc 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -32,14 +32,12 @@ #define CONFIG_FEC_MXC_PHYADDR 0 #endif -#ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(MMC, mmc, 1) \ func(DHCP, dhcp, na) #include -#endif /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/iot2050.h b/include/configs/iot2050.h index 296bcd4c7b7..d379bad0b15 100644 --- a/include/configs/iot2050.h +++ b/include/configs/iot2050.h @@ -21,8 +21,6 @@ #define EXTRA_ENV_IOT2050_BOARD_SETTINGS \ "usb_pgood_delay=900\0" -#ifndef CONFIG_SPL_BUILD - #if CONFIG_IS_ENABLED(CMD_USB) # define BOOT_TARGET_USB(func) \ func(USB, usb, 0) \ @@ -44,8 +42,6 @@ #include -#endif - #define CONFIG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ BOOTENV \ diff --git a/include/configs/kontron-sl-mx6ul.h b/include/configs/kontron-sl-mx6ul.h index d04684955d3..7b5e5773464 100644 --- a/include/configs/kontron-sl-mx6ul.h +++ b/include/configs/kontron-sl-mx6ul.h @@ -35,7 +35,6 @@ #endif /* Boot order for distro boot */ -#ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 0) \ @@ -44,9 +43,6 @@ func(PXE, pxe, na) \ func(DHCP, dhcp, na) #include -#else -#define BOOTENV -#endif /* MMC Configs */ #ifdef CONFIG_FSL_USDHC diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h index e28bfb88ff0..a8468229f69 100644 --- a/include/configs/kontron-sl-mx8mm.h +++ b/include/configs/kontron-sl-mx8mm.h @@ -36,7 +36,6 @@ EFI_GUID(0xd488e45a, 0x4929, 0x4b55, 0x8c, 0x14, \ 0x86, 0xce, 0xa2, 0xcd, 0x66, 0x29) -#ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 0) \ @@ -46,9 +45,6 @@ /* Do not try to probe USB net adapters for net boot */ #undef BOOTENV_RUN_NET_USB_START #define BOOTENV_RUN_NET_USB_START -#else -#define BOOTENV -#endif #define CONFIG_SYS_BOOTM_LEN SZ_64M diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h index a513213c598..7b8e70e5945 100644 --- a/include/configs/kp_imx6q_tpc.h +++ b/include/configs/kp_imx6q_tpc.h @@ -26,7 +26,6 @@ #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */ #endif -#ifndef CONFIG_SPL_BUILD #define CONFIG_EXTRA_ENV_SETTINGS \ "console=ttymxc0,115200\0" \ "fdt_addr=0x18000000\0" \ @@ -87,7 +86,6 @@ func(DHCP, dhcp, na) #include -#endif /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/kylin_rk3036.h b/include/configs/kylin_rk3036.h index 75fc03f1472..fea7c835fdc 100644 --- a/include/configs/kylin_rk3036.h +++ b/include/configs/kylin_rk3036.h @@ -9,10 +9,4 @@ #include #include -#ifndef CONFIG_SPL_BUILD - -/* Store env in emmc */ - -#endif - #endif diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 1d8d9485e74..19201a735f0 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -36,14 +36,12 @@ #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 -#ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(USB, usb, 0) \ func(SCSI, scsi, 0) \ func(DHCP, dhcp, na) #include -#endif /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h index cb79d6362fc..674bcbeb758 100644 --- a/include/configs/ls1012afrdm.h +++ b/include/configs/ls1012afrdm.h @@ -12,11 +12,9 @@ /* DDR */ #define CONFIG_SYS_SDRAM_SIZE 0x20000000 -#ifndef CONFIG_SPL_BUILD #undef BOOT_TARGET_DEVICES #define BOOT_TARGET_DEVICES(func) \ func(USB, usb, 0) -#endif #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index a1d23b64630..7f083c597e3 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -19,13 +19,11 @@ /* ENV */ #define CONFIG_SYS_FSL_QSPI_BASE 0x40000000 -#ifndef CONFIG_SPL_BUILD #undef BOOT_TARGET_DEVICES #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(USB, usb, 0) \ func(DHCP, dhcp, na) -#endif #define CONFIG_PCIE1 /* PCIE controller 1 */ diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index fe9a8fd3754..6e2c048fb12 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -137,13 +137,11 @@ #define HWCONFIG_BUFFER_SIZE 128 #ifndef SPL_NO_MISC -#ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(USB, usb, 0) \ func(DHCP, dhcp, na) #include -#endif /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 8e9103562eb..e139aa93e1f 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -104,14 +104,12 @@ #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 -#ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(SCSI, scsi, 0) \ func(MMC, mmc, 0) \ func(USB, usb, 0) \ func(DHCP, dhcp, na) #include -#endif #if defined(CONFIG_TARGET_LS1046AFRWY) #define LS1046A_BOOT_SRC_AND_HDR\ diff --git a/include/configs/ls1046afrwy.h b/include/configs/ls1046afrwy.h index d56d0c02947..e663fa0f6c7 100644 --- a/include/configs/ls1046afrwy.h +++ b/include/configs/ls1046afrwy.h @@ -80,13 +80,11 @@ */ #define CONFIG_SYS_FSL_QSPI_BASE 0x40000000 -#ifndef CONFIG_SPL_BUILD #undef BOOT_TARGET_DEVICES #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(USB, usb, 0) \ func(DHCP, dhcp, na) -#endif /* FMan */ #ifdef CONFIG_SYS_DPAA_FMAN diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index f2eae073810..21ca4afa51c 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -410,7 +410,7 @@ "env exists secureboot && esbc_halt;" #endif -#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_FSL_MC_ENET) #define CONFIG_FSL_MEMAC #define SGMII_CARD_PORT1_PHY_ADDR 0x1C #define SGMII_CARD_PORT2_PHY_ADDR 0x1d diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h index c6744e970f6..cffbb64bcd5 100644 --- a/include/configs/mx6cuboxi.h +++ b/include/configs/mx6cuboxi.h @@ -27,7 +27,6 @@ #define CONFIG_MXC_UART_BASE UART1_BASE -#ifndef CONFIG_SPL_BUILD #define CONFIG_EXTRA_ENV_SETTINGS \ "som_rev=undefined\0" \ "has_emmc=undefined\0" \ @@ -87,10 +86,6 @@ #include -#else -#define CONFIG_EXTRA_ENV_SETTINGS -#endif /* CONFIG_SPL_BUILD */ - /* Physical Memory Map */ #define CONFIG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index a5596d98fe6..8bddc5281e5 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -136,10 +136,6 @@ #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1) #endif -#ifndef CONFIG_SPL_BUILD -#ifdef CONFIG_DM_VIDEO #define MXS_LCDIF_BASE MX6SX_LCDIF1_BASE_ADDR -#endif -#endif #endif /* __CONFIG_H */ diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index 7c76290a2ae..6a110132a75 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -134,10 +134,6 @@ #endif #endif -#ifndef CONFIG_SPL_BUILD -#if defined(CONFIG_DM_VIDEO) #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR -#endif -#endif #endif diff --git a/include/configs/novena.h b/include/configs/novena.h index 9c67a3a7775..40304ba468c 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -76,7 +76,6 @@ #define CONFIG_IMX_VIDEO_SKIP /* Extra U-Boot environment. */ -#ifndef CONFIG_SPL_BUILD #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ @@ -147,8 +146,4 @@ #include -#else -#define CONFIG_EXTRA_ENV_SETTINGS -#endif /* CONFIG_SPL_BUILD */ - #endif /* __CONFIG_H */ diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h index c1ef040ce36..6be214753f1 100644 --- a/include/configs/omap3_igep00x0.h +++ b/include/configs/omap3_igep00x0.h @@ -28,8 +28,6 @@ #define GPIO_IGEP00X0_BOARD_DETECTION 28 #define GPIO_IGEP00X0_REVISION_DETECTION 129 -#ifndef CONFIG_SPL_BUILD - /* Environment */ #define ENV_DEVICE_SETTINGS \ "stdin=serial\0" \ @@ -67,8 +65,6 @@ MEM_LAYOUT_SETTINGS \ BOOTENV -#endif - /* OneNAND config */ #define CONFIG_USE_ONENAND_BOARD_INIT #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP diff --git a/include/configs/opos6uldev.h b/include/configs/opos6uldev.h index ebfba72d0da..d368376d202 100644 --- a/include/configs/opos6uldev.h +++ b/include/configs/opos6uldev.h @@ -30,11 +30,7 @@ #endif /* LCD */ -#ifndef CONFIG_SPL_BUILD -#ifdef CONFIG_DM_VIDEO #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR -#endif -#endif /* Environment is stored in the eMMC boot partition */ diff --git a/include/configs/pdu001.h b/include/configs/pdu001.h index 7ab6a896040..ed3201aa3c4 100644 --- a/include/configs/pdu001.h +++ b/include/configs/pdu001.h @@ -32,7 +32,6 @@ #define CONSOLE_DEV "ttyO5" #endif -#ifndef CONFIG_SPL_BUILD #define CONFIG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ "fdtfile=am335x-pdu001.dtb\0" \ @@ -49,7 +48,6 @@ "reset;" \ "fi;" \ "\0" -#endif /* NS16550 Configuration */ #define CONFIG_SYS_NS16550_COM1 UART0_BASE diff --git a/include/configs/pomelo.h b/include/configs/pomelo.h index 11d408f1908..647bb3d02a1 100644 --- a/include/configs/pomelo.h +++ b/include/configs/pomelo.h @@ -16,12 +16,10 @@ /*BOOT*/ #define CONFIG_SYS_BOOTM_LEN 0x3c00000 -#ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(SCSI, scsi, 0) \ #include -#endif /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/poplar.h b/include/configs/poplar.h index 6def3691103..b119465420d 100644 --- a/include/configs/poplar.h +++ b/include/configs/poplar.h @@ -31,9 +31,7 @@ func(USB, usb, 0) \ func(MMC, mmc, 0) \ func(DHCP, dhcp, na) -#ifndef CONFIG_SPL_BUILD #include -#endif #define CONFIG_EXTRA_ENV_SETTINGS \ "loader_mmc_blknum=0x0\0" \ diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h index 96dcfb420f7..62ed86b29c8 100644 --- a/include/configs/px30_common.h +++ b/include/configs/px30_common.h @@ -24,8 +24,6 @@ #define SDRAM_MAX_SIZE 0xff000000 #define SDRAM_BANK_SIZE (2UL << 30) -#ifndef CONFIG_SPL_BUILD - #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x00500000\0" \ "pxefile_addr_r=0x00600000\0" \ @@ -43,5 +41,3 @@ BOOTENV #endif - -#endif diff --git a/include/configs/pxm2.h b/include/configs/pxm2.h index ad05920ad6b..4f24b13f500 100644 --- a/include/configs/pxm2.h +++ b/include/configs/pxm2.h @@ -30,8 +30,6 @@ /* Physical Memory Map */ #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* 1GB */ -#ifndef CONFIG_SPL_BUILD - /* Use common default */ /* Default env settings */ @@ -67,9 +65,4 @@ "bootm ${kloadaddr}\0" \ "" -#ifndef CONFIG_RESTORE_FLASH -/* set to negative value for no autoboot */ -#endif -#endif /* CONFIG_SPL_BUILD */ - #endif /* ! __CONFIG_PXM2_H */ diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h index f3e16e55966..a81c503d9fd 100644 --- a/include/configs/qemu-riscv.h +++ b/include/configs/qemu-riscv.h @@ -21,7 +21,6 @@ /* Environment options */ -#ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(QEMU, qemu, na) \ func(VIRTIO, virtio, 0) \ @@ -50,6 +49,5 @@ "pxefile_addr_r=0x8c200000\0" \ "ramdisk_addr_r=0x8c300000\0" \ BOOTENV -#endif #endif /* __CONFIG_H */ diff --git a/include/configs/rastaban.h b/include/configs/rastaban.h index 6c942a80980..5de980ddc00 100644 --- a/include/configs/rastaban.h +++ b/include/configs/rastaban.h @@ -40,8 +40,6 @@ /* Define own nand partitions */ #define CONFIG_ENV_RANGE (4 * CONFIG_SYS_ENV_SECT_SIZE) -#ifndef CONFIG_SPL_BUILD - /* Default env settings */ #define CONFIG_EXTRA_ENV_SETTINGS \ "hostname=rastaban\0" \ @@ -53,8 +51,4 @@ CONFIG_ENV_SETTINGS_V2 \ CONFIG_ENV_SETTINGS_NAND_V2 -#ifndef CONFIG_RESTORE_FLASH -/* set to negative value for no autoboot */ -#endif -#endif /* CONFIG_SPL_BUILD */ #endif /* ! __CONFIG_RASTABAN_H */ diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index 2f3260e449c..ac57721f021 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -17,8 +17,6 @@ #define SDRAM_BANK_SIZE (512UL << 20UL) #define SDRAM_MAX_SIZE (CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE) -#ifndef CONFIG_SPL_BUILD - #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x60000000\0" \ "pxefile_addr_r=0x60100000\0" \ @@ -36,6 +34,5 @@ "partitions=" PARTS_DEFAULT \ ENV_MEM_LAYOUT_SETTINGS \ BOOTENV -#endif #endif diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h index 41e0d18f88c..9297184bded 100644 --- a/include/configs/rk3066_common.h +++ b/include/configs/rk3066_common.h @@ -15,8 +15,6 @@ #define SDRAM_BANK_SIZE (1024UL << 20UL) #define SDRAM_MAX_SIZE CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE -#ifndef CONFIG_SPL_BUILD - #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x60000000\0" \ "pxefile_addr_r=0x60100000\0" \ @@ -34,6 +32,4 @@ ROCKCHIP_DEVICE_SETTINGS \ BOOTENV -#endif /* CONFIG_SPL_BUILD */ - #endif diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h index 5c60d119f99..f3e0eefb9a2 100644 --- a/include/configs/rk3128_common.h +++ b/include/configs/rk3128_common.h @@ -22,8 +22,6 @@ #define CONFIG_USB_OHCI_NEW #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 -#ifndef CONFIG_SPL_BUILD - /* usb mass storage */ #define ENV_MEM_LAYOUT_SETTINGS \ @@ -41,5 +39,3 @@ BOOTENV #endif - -#endif diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h index c1d66845412..56fba3ff257 100644 --- a/include/configs/rk3188_common.h +++ b/include/configs/rk3188_common.h @@ -19,7 +19,6 @@ #define SDRAM_BANK_SIZE (2UL << 30) #define SDRAM_MAX_SIZE 0x80000000 -#ifndef CONFIG_SPL_BUILD /* usb otg */ /* usb host support */ @@ -43,6 +42,4 @@ ROCKCHIP_DEVICE_SETTINGS \ BOOTENV -#endif /* CONFIG_SPL_BUILD */ - #endif diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index dd1a207aed3..c3279b84d3a 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -20,8 +20,6 @@ #define SDRAM_BANK_SIZE (512UL << 20UL) #define SDRAM_MAX_SIZE 0x80000000 -#ifndef CONFIG_SPL_BUILD - #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x60000000\0" \ "pxefile_addr_r=0x60100000\0" \ @@ -39,6 +37,5 @@ "partitions=" PARTS_DEFAULT \ ENV_MEM_LAYOUT_SETTINGS \ BOOTENV -#endif #endif diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 844c154217b..18f4289d29a 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -23,8 +23,6 @@ #define CONFIG_SYS_MONITOR_LEN (600 * 1024) -#ifndef CONFIG_SPL_BUILD - #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x00000000\0" \ "pxefile_addr_r=0x00100000\0" \ @@ -44,6 +42,5 @@ ENV_MEM_LAYOUT_SETTINGS \ ROCKCHIP_DEVICE_SETTINGS \ BOOTENV -#endif #endif diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h index 169cf2ac9c1..d5aadd5fa80 100644 --- a/include/configs/rk3308_common.h +++ b/include/configs/rk3308_common.h @@ -20,8 +20,6 @@ #define SDRAM_MAX_SIZE 0xff000000 #define SDRAM_BANK_SIZE (2UL << 30) -#ifndef CONFIG_SPL_BUILD - #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x00500000\0" \ "pxefile_addr_r=0x00600000\0" \ @@ -37,5 +35,3 @@ BOOTENV #endif - -#endif diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 9cdc9004a91..90183579202 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -16,8 +16,6 @@ #define CONFIG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 -#ifndef CONFIG_SPL_BUILD - #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x00500000\0" \ "pxefile_addr_r=0x00600000\0" \ @@ -32,8 +30,6 @@ "partitions=" PARTS_DEFAULT \ BOOTENV -#endif - /* rockchip ohci host driver */ #define CONFIG_USB_OHCI_NEW #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index ac881886824..4db4026ebe5 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -18,7 +18,6 @@ #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ -#ifndef CONFIG_SPL_BUILD #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x00500000\0" \ "pxefile_addr_r=0x00600000\0" \ @@ -34,5 +33,3 @@ BOOTENV #endif - -#endif diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h index f9c7c23cd9a..ef4f725b579 100644 --- a/include/configs/rk3568_common.h +++ b/include/configs/rk3568_common.h @@ -15,7 +15,6 @@ #define CONFIG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xf0000000 -#ifndef CONFIG_SPL_BUILD #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x00c00000\0" \ "pxefile_addr_r=0x00e00000\0" \ @@ -30,6 +29,5 @@ "partitions=" PARTS_DEFAULT \ ROCKCHIP_DEVICE_SETTINGS \ BOOTENV -#endif #endif diff --git a/include/configs/rut.h b/include/configs/rut.h index fc3194654ae..ac48372b6c0 100644 --- a/include/configs/rut.h +++ b/include/configs/rut.h @@ -24,8 +24,6 @@ /* Watchdog */ #define WATCHDOG_TRIGGER_GPIO 14 -#ifndef CONFIG_SPL_BUILD - /* Use common default */ /* Default env settings */ @@ -59,10 +57,4 @@ "bootm ${kloadaddr}\0" \ "" -#ifndef CONFIG_RESTORE_FLASH -/* set to negative value for no autoboot */ -#endif - -#endif /* CONFIG_SPL_BUILD */ - #endif /* ! __CONFIG_RUT_H */ diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h index f088f0e7a0c..d8de9c25df2 100644 --- a/include/configs/rv1108_common.h +++ b/include/configs/rv1108_common.h @@ -20,9 +20,7 @@ /* rockchip ohci host driver */ #define CONFIG_USB_OHCI_NEW #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 -#endif -#ifndef CONFIG_SPL_BUILD #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x60000000\0" \ "fdt_addr_r=0x61f00000\0" \ @@ -35,4 +33,5 @@ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "partitions=" PARTS_DEFAULT \ BOOTENV + #endif diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index c22b74f707e..5168e2fa353 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -6,9 +6,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -#ifndef CONFIG_SPL_BUILD #define CONFIG_IO_TRACE -#endif #define CONFIG_MALLOC_F_ADDR 0x0010000 diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 941e02c5c68..db8ff848285 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -17,9 +17,7 @@ /* commands to include */ -#ifndef CONFIG_SPL_BUILD #define CONFIG_ROOTPATH "/opt/eldk" -#endif #define CONFIG_SYS_AUTOLOAD "yes" @@ -81,16 +79,12 @@ * we don't need to do it twice. */ -#ifndef CONFIG_SPL_BUILD - /* USB DRACO ID as default */ #define CONFIG_USBD_HS /* USB Device Firmware Update support */ #define DFU_MANIFEST_POLL_TIMEOUT 25000 -#endif /* CONFIG_SPL_BUILD */ - /* * Default to using SPI for environment, etc. We have multiple copies * of SPL as the ROM will check these locations. diff --git a/include/configs/sifive-unleashed.h b/include/configs/sifive-unleashed.h index 4442fc29e31..a99d143485c 100644 --- a/include/configs/sifive-unleashed.h +++ b/include/configs/sifive-unleashed.h @@ -24,7 +24,6 @@ /* Environment options */ -#ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(SF, sf, 0) \ @@ -61,6 +60,5 @@ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ BOOTENV \ BOOTENV_SF -#endif #endif /* __CONFIG_H */ diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h index f5a341c8449..680caac377b 100644 --- a/include/configs/sifive-unmatched.h +++ b/include/configs/sifive-unmatched.h @@ -19,7 +19,6 @@ /* Environment options */ -#ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(NVME, nvme, 0) \ func(USB, usb, 0) \ @@ -53,7 +52,6 @@ "partitions=" PARTS_DEFAULT "\0" \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ BOOTENV -#endif /* CONFIG_SPL_BUILD */ #define CONFIG_SYS_EEPROM_BUS_NUM 0 diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index cde6abc6261..458d22d61f4 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -69,7 +69,6 @@ #define CONFIG_USART_BASE ATMEL_BASE_DBGU #define CONFIG_USART_ID ATMEL_ID_SYS -#if !defined(CONFIG_SPL_BUILD) /* USB configuration */ #define CONFIG_USB_ATMEL #define CONFIG_USB_ATMEL_CLK_SEL_PLLB @@ -85,7 +84,6 @@ /* DFU class support */ #define DFU_MANIFEST_POLL_TIMEOUT 25000 -#endif /* General Boot Parameter */ diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index b71f8bab156..c388ae9a816 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -34,21 +34,6 @@ * U-Boot environment configurations */ -/* - * QSPI support - */ - #ifdef CONFIG_CADENCE_QSPI -/* Enable it if you want to use dual-stacked mode */ -/*#define CONFIG_QSPI_RBF_ADDR 0x720000*/ - -/* Flash device info */ - -#ifndef CONFIG_SPL_BUILD -#define MTDIDS_DEFAULT "nor0=ff705000.spi.0" -#endif /* CONFIG_SPL_BUILD */ - -#endif /* CONFIG_CADENCE_QSPI */ - /* * Environment variable */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 327bf98ddb2..1f77b7b2dfd 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -125,8 +125,6 @@ #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 #endif -#ifndef CONFIG_SPL_BUILD - #ifdef CONFIG_ARM64 /* * Boards seem to come with at least 512MB of DRAM. @@ -372,8 +370,4 @@ BOOTCMD_SUNXI_COMPAT \ BOOTENV -#else /* ifndef CONFIG_SPL_BUILD */ -#define CONFIG_EXTRA_ENV_SETTINGS -#endif - #endif /* _SUNXI_COMMON_CONFIG_H */ diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h index 5b862f4f2ee..63d897d090a 100644 --- a/include/configs/synquacer.h +++ b/include/configs/synquacer.h @@ -60,7 +60,6 @@ 0xf0, 0xa3, 0x83, 0x87, 0xe6, 0x30) /* Distro boot settings */ -#ifndef CONFIG_SPL_BUILD #ifdef CONFIG_CMD_USB #define BOOT_TARGET_DEVICE_USB(func) func(USB, usb, 0) #else @@ -92,9 +91,6 @@ BOOT_TARGET_DEVICE_NVME(func) \ #include -#else /* CONFIG_SPL_BUILD */ -#define BOOTENV -#endif #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_addr_r=0x9fe00000\0" \ diff --git a/include/configs/taurus.h b/include/configs/taurus.h index b9285e8caba..798d72d8e26 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -84,13 +84,8 @@ /* SPI EEPROM */ #define TAURUS_SPI_MASK (1 << 4) -#if defined(CONFIG_SPL_BUILD) -/* SPL related */ -#endif - /* bootstrap in spi flash , u-boot + env + linux in nandflash */ -#ifndef CONFIG_SPL_BUILD #if defined(CONFIG_BOARD_AXM) #define CONFIG_EXTRA_ENV_SETTINGS \ "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \ @@ -139,7 +134,6 @@ "stdout=serial\0" \ "upgrade_available=0\0" #endif -#endif /* #ifndef CONFIG_SPL_BUILD */ /* Defines for SPL */ diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 755a41fef7e..c8f9d7cb175 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -9,8 +9,6 @@ #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ -#ifndef CONFIG_SPL_BUILD - #if CONFIG_IS_ENABLED(CMD_USB) # define BOOT_TARGET_USB(func) func(USB, usb, 0) #else @@ -26,9 +24,6 @@ func(DHCP, dhcp, na) #endif #include -#else -#define BOOTENV -#endif #ifdef CONFIG_TEGRA_KEYBOARD #define STDIN_KBD_KBC ",tegra-kbc" diff --git a/include/configs/thuban.h b/include/configs/thuban.h index bb0b9fa1560..fd903537ae5 100644 --- a/include/configs/thuban.h +++ b/include/configs/thuban.h @@ -33,8 +33,6 @@ /* Define own nand partitions */ #define CONFIG_ENV_RANGE (4 * CONFIG_SYS_ENV_SECT_SIZE) -#ifndef CONFIG_SPL_BUILD - /* Default env settings */ #define CONFIG_EXTRA_ENV_SETTINGS \ "hostname=thuban\0" \ @@ -46,8 +44,4 @@ CONFIG_ENV_SETTINGS_V2 \ CONFIG_ENV_SETTINGS_NAND_V2 -#ifndef CONFIG_RESTORE_FLASH -/* set to negative value for no autoboot */ -#endif -#endif /* CONFIG_SPL_BUILD */ #endif /* ! __CONFIG_THUBAN_H */ diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index 5d8c45af2fa..fcf282bc4c1 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -47,9 +47,7 @@ #endif /* TWL6030 */ -#ifndef CONFIG_SPL_BUILD #define CONFIG_TWL6030_POWER 1 -#endif /* * Environment setup diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 2bb9e59b946..8096b2c8960 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -10,7 +10,6 @@ #ifndef __CONFIG_UNIPHIER_H__ #define __CONFIG_UNIPHIER_H__ -#ifndef CONFIG_SPL_BUILD #include #ifdef CONFIG_CMD_MMC @@ -35,9 +34,6 @@ BOOT_TARGET_DEVICE_MMC(func) \ BOOT_TARGET_DEVICE_UBIFS(func) \ BOOT_TARGET_DEVICE_USB(func) -#else -#define BOOTENV -#endif #define CONFIG_SYS_MONITOR_LEN 0x00200000 /* 2MB */ diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 0867ccad0a2..710321944ab 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -28,15 +28,11 @@ "scriptaddr=0x46000000\0" /* Enable Distro Boot */ -#ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 0) \ func(DHCP, dhcp, na) #include -#else -#define BOOTENV -#endif /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index 9ad24e82dbe..0de249aa96b 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -40,15 +40,11 @@ "scriptaddr=0x46000000\0" /* Enable Distro Boot */ -#ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 2) \ func(DHCP, dhcp, na) #include -#else -#define BOOTENV -#endif #if defined(CONFIG_TDX_EASY_INSTALLER) # define BOOT_SCRIPT "boot-tezi.scr" diff --git a/include/configs/x530.h b/include/configs/x530.h index d8fc3c13d06..1f1b4e1449e 100644 --- a/include/configs/x530.h +++ b/include/configs/x530.h @@ -48,9 +48,7 @@ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ /* PCIe support */ -#ifndef CONFIG_SPL_BUILD #define CONFIG_PCI_SCAN_SHOW -#endif /* NAND */ diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index bfd622bb028..20515b4e26a 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -37,13 +37,11 @@ #define DFU_DEFAULT_POLL_TIMEOUT 300 #define CONFIG_THOR_RESET_OFF -#ifndef CONFIG_SPL_BUILD # define PARTS_DEFAULT \ "partitions=uuid_disk=${uuid_gpt_disk};" \ "name=""boot"",size=16M,uuid=${uuid_gpt_boot};" \ "name=""Linux"",size=-M,uuid=${uuid_gpt_Linux}\0" #endif -#endif #if !defined(PARTS_DEFAULT) # define PARTS_DEFAULT -- GitLab From 82e0b51ccba898e7240b2533b440ae9e534783e2 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 12 Jun 2022 20:01:58 -0400 Subject: [PATCH 423/581] Convert CONFIG_ENV_MIN_ENTRIES et al to Kconfig This converts the following to Kconfig: CONFIG_ENV_MIN_ENTRIES CONFIG_ENV_MAX_ENTRIES Cc: Michal Simek Signed-off-by: Tom Rini --- README | 8 -------- configs/clearfog_defconfig | 1 + configs/helios4_defconfig | 1 + env/Kconfig | 16 ++++++++++++++++ include/configs/clearfog.h | 2 -- include/configs/helios4.h | 2 -- include/configs/xilinx_zynqmp.h | 5 ----- lib/hashtable.c | 7 ------- 8 files changed, 18 insertions(+), 24 deletions(-) diff --git a/README b/README index 1362a96b0f6..dbb0d969549 100644 --- a/README +++ b/README @@ -1877,14 +1877,6 @@ Configuration Settings: while unprotecting/erasing/programming. Please only enable this option if you really know what you are doing. -- CONFIG_ENV_MAX_ENTRIES - - Maximum number of entries in the hash table that is used - internally to store the environment settings. The default - setting is supposed to be generous and should work in most - cases. This setting can be used to tune behaviour; see - lib/hashtable.c for details. - - CONFIG_ENV_FLAGS_LIST_DEFAULT - CONFIG_ENV_FLAGS_LIST_STATIC Enable validation of the values given to environment variables when diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig index bec36beb855..1ee0c663757 100644 --- a/configs/clearfog_defconfig +++ b/configs/clearfog_defconfig @@ -50,6 +50,7 @@ CONFIG_CMD_TIME=y CONFIG_CMD_MVEBU_BUBT=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_MIN_ENTRIES=128 CONFIG_ARP_TIMEOUT=200 CONFIG_NET_RETRY_COUNT=50 CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig index 2a1db65d1bf..4642eb1ccb2 100644 --- a/configs/helios4_defconfig +++ b/configs/helios4_defconfig @@ -51,6 +51,7 @@ CONFIG_CMD_TIME=y CONFIG_CMD_MVEBU_BUBT=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_MIN_ENTRIES=128 CONFIG_ARP_TIMEOUT=200 CONFIG_NET_RETRY_COUNT=50 CONFIG_NET_RANDOM_ETHADDR=y diff --git a/env/Kconfig b/env/Kconfig index 2f625b22575..0aed7aea46b 100644 --- a/env/Kconfig +++ b/env/Kconfig @@ -30,6 +30,22 @@ config ENV_OVERWRITE Use this to permit overriding of certain environmental variables like Ethernet and Serial +config ENV_MIN_ENTRIES + int "Minimum number of entries in the environment hashtable" + default 64 + help + Minimum number of entries in the hash table that is used internally + to store the environment settings. + +config ENV_MAX_ENTRIES + int "Maximumm number of entries in the environment hashtable" + default 512 + help + Maximum number of entries in the hash table that is used internally + to store the environment settings. The default setting is supposed to + be generous and should work in most cases. This setting can be used + to tune behaviour; see lib/hashtable.c for details. + config ENV_IS_NOWHERE bool "Environment is not stored" default y if !ENV_IS_IN_EEPROM && !ENV_IS_IN_EXT4 && \ diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h index af04352eda3..9969269bf2a 100644 --- a/include/configs/clearfog.h +++ b/include/configs/clearfog.h @@ -18,8 +18,6 @@ * U-Boot into it. */ -#define CONFIG_ENV_MIN_ENTRIES 128 - /* Environment in MMC */ /* * For SD - reserve 1 LBA for MBR + 1M for u-boot image. The MMC/eMMC diff --git a/include/configs/helios4.h b/include/configs/helios4.h index cae20073584..ff2c5064432 100644 --- a/include/configs/helios4.h +++ b/include/configs/helios4.h @@ -18,8 +18,6 @@ * U-Boot into it. */ -#define CONFIG_ENV_MIN_ENTRIES 128 - /* Environment in MMC */ /* * For SD - reserve 1 LBA for MBR + 1M for u-boot image. The MMC/eMMC diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 20515b4e26a..4e71a42cd34 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -207,11 +207,6 @@ /* ATF is my kernel image */ -#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU) -# define CONFIG_SPL_HASH -# define CONFIG_ENV_MAX_ENTRIES 10 -#endif - #ifdef CONFIG_SPL_SYS_MALLOC_SIMPLE # error "Disable CONFIG_SPL_SYS_MALLOC_SIMPLE. Full malloc needs to be used" #endif diff --git a/lib/hashtable.c b/lib/hashtable.c index ff5ff726394..90c8465611e 100644 --- a/lib/hashtable.c +++ b/lib/hashtable.c @@ -35,13 +35,6 @@ # include #endif -#ifndef CONFIG_ENV_MIN_ENTRIES /* minimum number of entries */ -#define CONFIG_ENV_MIN_ENTRIES 64 -#endif -#ifndef CONFIG_ENV_MAX_ENTRIES /* maximum number of entries */ -#define CONFIG_ENV_MAX_ENTRIES 512 -#endif - #define USED_FREE 0 #define USED_DELETED -1 -- GitLab From 60d45642fe0673514aced37e6cc95d4f0fe02a19 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 12 Jun 2022 20:01:59 -0400 Subject: [PATCH 424/581] fpga: Remove CONFIG_FPGA_COUNT This define is only currently used in a single board, and always set to one. Define this within the board code and remove other references. Signed-off-by: Tom Rini --- README | 4 ---- board/astro/mcf5373l/fpga.c | 9 +++++---- include/configs/astro_mcf5373l.h | 1 - include/configs/mx53cx9020.h | 2 -- include/configs/socfpga_common.h | 7 ------- 5 files changed, 5 insertions(+), 18 deletions(-) diff --git a/README b/README index dbb0d969549..c1d516beda8 100644 --- a/README +++ b/README @@ -1350,10 +1350,6 @@ The following options need to be configured: Enables support for FPGA family. (SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX) - CONFIG_FPGA_COUNT - - Specify the number of FPGA devices to support. - CONFIG_SYS_FPGA_PROG_FEEDBACK Enable printing of hash marks during FPGA configuration. diff --git a/board/astro/mcf5373l/fpga.c b/board/astro/mcf5373l/fpga.c index ef82f066070..50a3830b857 100644 --- a/board/astro/mcf5373l/fpga.c +++ b/board/astro/mcf5373l/fpga.c @@ -168,7 +168,8 @@ Altera_CYC2_Passive_Serial_fns altera_fns = { altera_post_fn }; -Altera_desc altera_fpga[CONFIG_FPGA_COUNT] = { +#define FPGA_COUNT 1 +Altera_desc altera_fpga[FPGA_COUNT] = { {Altera_CYC2, passive_serial, 85903, @@ -182,7 +183,7 @@ int astro5373l_altera_load(void) { int i; - for (i = 0; i < CONFIG_FPGA_COUNT; i++) { + for (i = 0; i < FPGA_COUNT; i++) { /* * I did not yet manage to get relocation work properly, * so set stuff here instead of static initialisation: @@ -372,7 +373,7 @@ xilinx_spartan3_slave_serial_fns xilinx_fns = { xilinx_fastwr_config_fn }; -xilinx_desc xilinx_fpga[CONFIG_FPGA_COUNT] = { +xilinx_desc xilinx_fpga[FPGA_COUNT] = { {xilinx_spartan3, slave_serial, XILINX_XC3S4000_SIZE, @@ -388,7 +389,7 @@ int astro5373l_xilinx_load(void) fpga_init(); - for (i = 0; i < CONFIG_FPGA_COUNT; i++) { + for (i = 0; i < FPGA_COUNT; i++) { /* * I did not yet manage to get relocation work properly, * so set stuff here instead of static initialisation: diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index 9bf6968e8ad..18e06076a4a 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -133,7 +133,6 @@ * it needs non-blocking CFI routines. */ -#define CONFIG_FPGA_COUNT 1 #define CONFIG_SYS_FPGA_PROG_FEEDBACK #define CONFIG_SYS_FPGA_WAIT 1000 diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h index 1e5df3f7d7a..f1d751f15a2 100644 --- a/include/configs/mx53cx9020.h +++ b/include/configs/mx53cx9020.h @@ -16,8 +16,6 @@ #define CONFIG_MXC_UART_BASE UART2_BASE -#define CONFIG_FPGA_COUNT 1 - /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_NUM 2 diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 6453ab79527..10ba2d22ffa 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -58,13 +58,6 @@ #define CONFIG_DW_ALTDESCRIPTOR #endif -/* - * FPGA Driver - */ -#ifdef CONFIG_CMD_FPGA -#define CONFIG_FPGA_COUNT 1 -#endif - /* * L4 OSC1 Timer 0 */ -- GitLab From 6e52cb259b565cc7482c65b0e4b2ab78c6b6903b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 12 Jun 2022 20:02:00 -0400 Subject: [PATCH 425/581] Convert CONFIG_FPGA_STRATIX_V to Kconfig This converts the following to Kconfig: CONFIG_FPGA_STRATIX_V Signed-off-by: Tom Rini --- configs/theadorable_debug_defconfig | 1 + drivers/fpga/Kconfig | 6 ++++++ include/configs/theadorable.h | 3 --- 3 files changed, 7 insertions(+), 3 deletions(-) diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index 25eb2e88ec1..d47413c0a91 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -71,6 +71,7 @@ CONFIG_LBA48=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y CONFIG_FPGA_ALTERA=y +CONFIG_FPGA_STRATIX_V=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y # CONFIG_MMC is not set diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index dc0b3dd31b7..76719517f54 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -21,6 +21,12 @@ config FPGA_SOCFPGA This provides common functionality for Gen5 and Arria10 devices. +config FPGA_STRATIX_V + bool "Enable Stratix V FPGA drivers" + depends on FPGA_ALTERA + help + Say Y here to enable the Altera Stratix V FPGA specific driver. + config FPGA_CYCLON2 bool "Enable Altera FPGA driver for Cyclone II" depends on FPGA_ALTERA diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h index 4f7c9647e29..94e1acd98ba 100644 --- a/include/configs/theadorable.h +++ b/include/configs/theadorable.h @@ -40,9 +40,6 @@ "fdt_high=0x10000000\0" \ "initrd_high=0x10000000\0" -/* FPGA programming support */ -#define CONFIG_FPGA_STRATIX_V - /* * Bootcounter */ -- GitLab From a89a4538a1442eb3215935c9cc13db5baa5d196a Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 12 Jun 2022 20:02:01 -0400 Subject: [PATCH 426/581] usb: Remove non-DM code in ehci-fsl and xhci The DM_USB migration deadline has passed and this is not used in SPL. Remove this now unused code. Signed-off-by: Tom Rini --- drivers/usb/host/ehci-fsl.c | 4 -- drivers/usb/host/xhci.c | 110 ------------------------------------ 2 files changed, 114 deletions(-) diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c index 82da339fd50..0569dd54fff 100644 --- a/drivers/usb/host/ehci-fsl.c +++ b/drivers/usb/host/ehci-fsl.c @@ -25,10 +25,6 @@ DECLARE_GLOBAL_DATA_PTR; -#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -#endif - struct ehci_fsl_priv { struct ehci_ctrl ehci; fdt_addr_t hcd_base; diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c index ad73ba12e2b..dbeb88afe37 100644 --- a/drivers/usb/host/xhci.c +++ b/drivers/usb/host/xhci.c @@ -37,10 +37,6 @@ #include #include -#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -#endif - static struct descriptor { struct usb_hub_descriptor hub; struct usb_device_descriptor device; @@ -115,13 +111,8 @@ static struct descriptor { }, }; -#if !CONFIG_IS_ENABLED(DM_USB) -static struct xhci_ctrl xhcic[CONFIG_USB_MAX_CONTROLLER_COUNT]; -#endif - struct xhci_ctrl *xhci_get_ctrl(struct usb_device *udev) { -#if CONFIG_IS_ENABLED(DM_USB) struct udevice *dev; /* Find the USB controller */ @@ -130,9 +121,6 @@ struct xhci_ctrl *xhci_get_ctrl(struct usb_device *udev) dev = dev->parent) ; return dev_get_priv(dev); -#else - return udev->controller; -#endif } /** @@ -752,13 +740,6 @@ static int _xhci_alloc_device(struct usb_device *udev) return 0; } -#if !CONFIG_IS_ENABLED(DM_USB) -int usb_alloc_device(struct usb_device *udev) -{ - return _xhci_alloc_device(udev); -} -#endif - /* * Full speed devices may have a max packet size greater than 8 bytes, but the * USB core doesn't know that until it reads the first 8 bytes of the @@ -1267,95 +1248,6 @@ static int xhci_lowlevel_stop(struct xhci_ctrl *ctrl) return 0; } -#if !CONFIG_IS_ENABLED(DM_USB) -int submit_control_msg(struct usb_device *udev, unsigned long pipe, - void *buffer, int length, struct devrequest *setup) -{ - struct usb_device *hop = udev; - - if (hop->parent) - while (hop->parent->parent) - hop = hop->parent; - - return _xhci_submit_control_msg(udev, pipe, buffer, length, setup, - hop->portnr); -} - -int submit_bulk_msg(struct usb_device *udev, unsigned long pipe, void *buffer, - int length) -{ - return _xhci_submit_bulk_msg(udev, pipe, buffer, length); -} - -int submit_int_msg(struct usb_device *udev, unsigned long pipe, void *buffer, - int length, int interval, bool nonblock) -{ - return _xhci_submit_int_msg(udev, pipe, buffer, length, interval, - nonblock); -} - -/** - * Intialises the XHCI host controller - * and allocates the necessary data structures - * - * @param index index to the host controller data structure - * Return: pointer to the intialised controller - */ -int usb_lowlevel_init(int index, enum usb_init_type init, void **controller) -{ - struct xhci_hccr *hccr; - struct xhci_hcor *hcor; - struct xhci_ctrl *ctrl; - int ret; - - *controller = NULL; - - if (xhci_hcd_init(index, &hccr, (struct xhci_hcor **)&hcor) != 0) - return -ENODEV; - - if (xhci_reset(hcor) != 0) - return -ENODEV; - - ctrl = &xhcic[index]; - - ctrl->hccr = hccr; - ctrl->hcor = hcor; - - ret = xhci_lowlevel_init(ctrl); - - if (ret) { - ctrl->hccr = NULL; - ctrl->hcor = NULL; - } else { - *controller = &xhcic[index]; - } - - return ret; -} - -/** - * Stops the XHCI host controller - * and cleans up all the related data structures - * - * @param index index to the host controller data structure - * Return: none - */ -int usb_lowlevel_stop(int index) -{ - struct xhci_ctrl *ctrl = (xhcic + index); - - if (ctrl->hcor) { - xhci_lowlevel_stop(ctrl); - xhci_hcd_stop(index); - xhci_cleanup(ctrl); - } - - return 0; -} -#endif /* CONFIG_IS_ENABLED(DM_USB) */ - -#if CONFIG_IS_ENABLED(DM_USB) - static int xhci_submit_control_msg(struct udevice *dev, struct usb_device *udev, unsigned long pipe, void *buffer, int length, struct devrequest *setup) @@ -1546,5 +1438,3 @@ struct dm_usb_ops xhci_usb_ops = { .update_hub_device = xhci_update_hub_device, .get_max_xfer_size = xhci_get_max_xfer_size, }; - -#endif -- GitLab From 78196169fdb6dbb45f1f76e26938cadd91a12ab1 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 12 Jun 2022 20:02:02 -0400 Subject: [PATCH 427/581] mx6memcal: Remove SPL_USB_HOST As this particular platform is intended to be loaded and run a specific set of routines in SPL, we do not need the ability to further use the USB as a host device in SPL. Disable this support. Cc: Eric Nelson Signed-off-by: Tom Rini Acked-by: Eric Nelson --- configs/mx6memcal_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/mx6memcal_defconfig b/configs/mx6memcal_defconfig index a1bc95bb4a1..021e8a6151e 100644 --- a/configs/mx6memcal_defconfig +++ b/configs/mx6memcal_defconfig @@ -16,7 +16,6 @@ CONFIG_SYS_MEMTEST_START=0x10000000 CONFIG_SYS_MEMTEST_END=0x20000000 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_SPL_MALLOC=y -CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 -- GitLab From 525fbfabf1f91bde3bd8fc8aa3ec8504e77c074f Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 12 Jun 2022 20:02:03 -0400 Subject: [PATCH 428/581] common: usb: Update logic for usb.o, usb_hub.o and usb_storage.o Now that we have consistently named symbols to enable USB host or gadget controller support in SPL or full U-Boot, we do not need to unconditionally build USB files nor depend on non-SPL symbols to know when to build these common files. Signed-off-by: Tom Rini --- common/Makefile | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/common/Makefile b/common/Makefile index 75c24e32492..2ed8672c3ac 100644 --- a/common/Makefile +++ b/common/Makefile @@ -23,10 +23,9 @@ obj-$(CONFIG_MII) += miiphyutil.o obj-$(CONFIG_CMD_MII) += miiphyutil.o obj-$(CONFIG_PHYLIB) += miiphyutil.o -ifdef CONFIG_USB -obj-y += usb.o usb_hub.o +obj-$(CONFIG_USB_HOST) += usb.o usb_hub.o +obj-$(CONFIG_USB_GADGET) += usb.o usb_hub.o obj-$(CONFIG_USB_STORAGE) += usb_storage.o -endif # others obj-$(CONFIG_CONSOLE_MUX) += iomux.o @@ -57,13 +56,9 @@ endif obj-$(CONFIG_SPL_NET) += miiphyutil.o obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += fdt_support.o -ifdef CONFIG_SPL_USB_HOST -obj-y += usb.o -obj-y += usb_hub.o +obj-$(CONFIG_SPL_USB_HOST) += usb.o usb_hub.o obj-$(CONFIG_SPL_USB_STORAGE) += usb_storage.o -else -obj-$(CONFIG_USB_MUSB_HOST) += usb.o -endif +obj-$(CONFIG_SPL_MUSB_NEW) += usb.o endif # CONFIG_SPL_BUILD #others -- GitLab From 3371eddaa10212b1303b2de305e1d976fe7770ca Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 12 Jun 2022 20:02:04 -0400 Subject: [PATCH 429/581] Convert CONFIG_USB_MAX_CONTROLLER_COUNT to Kconfig This converts the following to Kconfig: CONFIG_USB_MAX_CONTROLLER_COUNT Signed-off-by: Tom Rini --- arch/arm/include/asm/arch-ls102xa/config.h | 1 - arch/powerpc/cpu/mpc8xxx/fdt.c | 4 ---- arch/powerpc/include/asm/config_mpc85xx.h | 24 -------------------- common/usb.c | 4 ---- configs/P1020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_defconfig | 1 + configs/P1020RDB-PC_NAND_defconfig | 1 + configs/P1020RDB-PC_SDCARD_defconfig | 1 + configs/P1020RDB-PC_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_defconfig | 1 + configs/P2041RDB_NAND_defconfig | 1 + configs/P2041RDB_SDCARD_defconfig | 1 + configs/P2041RDB_SPIFLASH_defconfig | 1 + configs/P2041RDB_defconfig | 1 + configs/P3041DS_NAND_defconfig | 1 + configs/P3041DS_SDCARD_defconfig | 1 + configs/P3041DS_SPIFLASH_defconfig | 1 + configs/P3041DS_defconfig | 1 + configs/P4080DS_SDCARD_defconfig | 1 + configs/P4080DS_SPIFLASH_defconfig | 1 + configs/P4080DS_defconfig | 1 + configs/P5040DS_NAND_defconfig | 1 + configs/P5040DS_SDCARD_defconfig | 1 + configs/P5040DS_SPIFLASH_defconfig | 1 + configs/P5040DS_defconfig | 1 + configs/T1024RDB_NAND_defconfig | 1 + configs/T1024RDB_SDCARD_defconfig | 1 + configs/T1024RDB_SPIFLASH_defconfig | 1 + configs/T1024RDB_defconfig | 1 + configs/T1042D4RDB_NAND_defconfig | 1 + configs/T1042D4RDB_SDCARD_defconfig | 1 + configs/T1042D4RDB_SPIFLASH_defconfig | 1 + configs/T1042D4RDB_defconfig | 1 + configs/T2080QDS_NAND_defconfig | 1 + configs/T2080QDS_SDCARD_defconfig | 1 + configs/T2080QDS_SECURE_BOOT_defconfig | 1 + configs/T2080QDS_SPIFLASH_defconfig | 1 + configs/T2080QDS_SRIO_PCIE_BOOT_defconfig | 1 + configs/T2080QDS_defconfig | 1 + configs/T2080RDB_NAND_defconfig | 1 + configs/T2080RDB_SDCARD_defconfig | 1 + configs/T2080RDB_SPIFLASH_defconfig | 1 + configs/T2080RDB_defconfig | 1 + configs/T2080RDB_revD_NAND_defconfig | 1 + configs/T2080RDB_revD_SDCARD_defconfig | 1 + configs/T2080RDB_revD_SPIFLASH_defconfig | 1 + configs/T2080RDB_revD_defconfig | 1 + configs/T4240RDB_SDCARD_defconfig | 1 + configs/T4240RDB_defconfig | 1 + configs/apalis_imx6_defconfig | 1 + configs/colibri_imx6_defconfig | 1 + configs/ge_b1x5v2_defconfig | 1 + configs/imx6dl_mamoj_defconfig | 1 + configs/kontron-sl-mx6ul_defconfig | 1 + configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160aqds_tfa_defconfig | 1 + configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160ardb_tfa_defconfig | 1 + configs/lx2160ardb_tfa_stmm_defconfig | 1 + configs/mx6sabreauto_defconfig | 1 + configs/mx6ul_14x14_evk_defconfig | 1 + configs/pico-dwarf-imx6ul_defconfig | 1 + configs/pico-dwarf-imx7d_defconfig | 1 + configs/pico-hobbit-imx6ul_defconfig | 1 + configs/pico-hobbit-imx7d_defconfig | 1 + configs/pico-imx6ul_defconfig | 1 + configs/pico-imx7d_bl33_defconfig | 1 + configs/pico-imx7d_defconfig | 1 + configs/pico-nymph-imx7d_defconfig | 1 + configs/pico-pi-imx6ul_defconfig | 1 + configs/pico-pi-imx7d_defconfig | 1 + configs/variscite_dart6ul_defconfig | 1 + configs/vining_2000_defconfig | 1 + drivers/usb/common/fsl-dt-fixup.c | 4 ---- drivers/usb/host/Kconfig | 6 +++++ drivers/usb/host/ehci-hcd.c | 4 ---- include/configs/apalis_imx6.h | 1 - include/configs/cl-som-imx7.h | 1 - include/configs/cm_fx6.h | 1 - include/configs/colibri-imx6ull.h | 1 - include/configs/colibri_imx6.h | 1 - include/configs/colibri_imx7.h | 1 - include/configs/colibri_vf.h | 1 - include/configs/dart_6ul.h | 1 - include/configs/db-88f6720.h | 1 - include/configs/db-mv784mp-gp.h | 1 - include/configs/dh_imx6.h | 1 - include/configs/ge_b1x5v2.h | 1 - include/configs/imx6_logic.h | 1 - include/configs/imx6dl-mamoj.h | 1 - include/configs/imx6q-bosch-acc.h | 1 - include/configs/imx8mm-cl-iot-gate.h | 1 - include/configs/kontron-sl-mx6ul.h | 1 - include/configs/kontron-sl-mx8mm.h | 1 - include/configs/kp_imx6q_tpc.h | 1 - include/configs/liteboard.h | 1 - include/configs/ls1021atsn.h | 1 - include/configs/lx2160a_common.h | 5 ---- include/configs/lx2162aqds.h | 2 -- include/configs/mvebu_armada-37xx.h | 2 -- include/configs/mvebu_armada-8k.h | 2 -- include/configs/mx23_olinuxino.h | 3 --- include/configs/mx23evk.h | 3 --- include/configs/mx28evk.h | 3 --- include/configs/mx6sabreauto.h | 1 - include/configs/mx6sabresd.h | 1 - include/configs/mx6slevk.h | 1 - include/configs/mx6sxsabreauto.h | 1 - include/configs/mx6sxsabresd.h | 1 - include/configs/mx6ul_14x14_evk.h | 1 - include/configs/mys_6ulx.h | 1 - include/configs/nitrogen6x.h | 1 - include/configs/novena.h | 1 - include/configs/npi_imx6ull.h | 1 - include/configs/opos6uldev.h | 1 - include/configs/p1_p2_rdb_pc.h | 4 ---- include/configs/pcl063.h | 1 - include/configs/pcl063_ull.h | 1 - include/configs/pico-imx6ul.h | 1 - include/configs/pico-imx7d.h | 1 - include/configs/poplar.h | 1 - include/configs/somlabs_visionsom_6ull.h | 1 - include/configs/theadorable.h | 1 - include/configs/tqma6.h | 1 - include/configs/turris_mox.h | 2 -- include/configs/verdin-imx8mm.h | 1 - include/configs/vining_2000.h | 1 - include/configs/warp.h | 1 - include/configs/xpress.h | 1 - scripts/config_whitelist.txt | 1 - 132 files changed, 77 insertions(+), 112 deletions(-) diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index 2f3409e3e87..aa790ab54c3 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -95,7 +95,6 @@ #define DCU_LAYER_MAX_NUM 16 #ifdef CONFIG_ARCH_LS1021A -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 #else #error SoC not defined diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c index 67f8b100018..871554a7f48 100644 --- a/arch/powerpc/cpu/mpc8xxx/fdt.c +++ b/arch/powerpc/cpu/mpc8xxx/fdt.c @@ -17,10 +17,6 @@ #include #include -#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -#endif - #if defined(CONFIG_MP) && (defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)) static int ft_del_cpuhandle(void *blob, int cpuhandle) { diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 47bfcc72444..06f66d02de2 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -31,7 +31,6 @@ #elif defined(CONFIG_ARCH_P1010) #define CONFIG_FSL_SDHC_V2_3 #define CONFIG_TSECV2 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 4 #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2" #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY @@ -41,25 +40,19 @@ /* P1011 is single core version of P1020 */ #elif defined(CONFIG_ARCH_P1011) #define CONFIG_TSECV2 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #elif defined(CONFIG_ARCH_P1020) #define CONFIG_TSECV2 -#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 -#endif #elif defined(CONFIG_ARCH_P1021) #define CONFIG_TSECV2 #define QE_MURAM_SIZE 0x6000UL #define MAX_QE_RISC 1 #define QE_NUM_OF_SNUM 28 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #elif defined(CONFIG_ARCH_P1023) #define CONFIG_SYS_NUM_FMAN 1 #define CONFIG_SYS_NUM_FM1_DTSEC 2 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define CONFIG_SYS_QMAN_NUM_PORTALS 3 #define CONFIG_SYS_BMAN_NUM_PORTALS 3 #define CONFIG_SYS_FM_MURAM_SIZE 0x10000 @@ -68,11 +61,9 @@ /* P1024 is lower end variant of P1020 */ #elif defined(CONFIG_ARCH_P1024) #define CONFIG_TSECV2 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* P1025 is lower end variant of P1021 */ #elif defined(CONFIG_ARCH_P1025) -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define CONFIG_TSECV2 #define QE_MURAM_SIZE 0x6000UL #define MAX_QE_RISC 1 @@ -84,7 +75,6 @@ #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 #define CONFIG_SYS_FSL_RMU #define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #elif defined(CONFIG_ARCH_P2041) /* also supports P2040 */ #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ @@ -92,9 +82,6 @@ #define CONFIG_SYS_NUM_FMAN 1 #define CONFIG_SYS_NUM_FM1_DTSEC 5 #define CONFIG_SYS_NUM_FM1_10GEC 1 -#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 -#endif #define CONFIG_SYS_FM_MURAM_SIZE 0x28000 #define CONFIG_SYS_FSL_TBCLK_DIV 32 #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2" @@ -118,7 +105,6 @@ #define CONFIG_SYS_FSL_USB1_PHY_ENABLE #define CONFIG_SYS_FSL_USB2_PHY_ENABLE #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2 #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9 #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 @@ -132,7 +118,6 @@ #define CONFIG_SYS_NUM_FM2_DTSEC 4 #define CONFIG_SYS_NUM_FM1_10GEC 1 #define CONFIG_SYS_NUM_FM2_10GEC 1 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_SYS_FM_MURAM_SIZE 0x28000 #define CONFIG_SYS_FSL_TBCLK_DIV 16 #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,p4080-pcie" @@ -151,7 +136,6 @@ #define CONFIG_SYS_NUM_FM1_10GEC 1 #define CONFIG_SYS_NUM_FM2_DTSEC 5 #define CONFIG_SYS_NUM_FM2_10GEC 1 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_SYS_FM_MURAM_SIZE 0x28000 #define CONFIG_SYS_FSL_TBCLK_DIV 16 #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4" @@ -163,7 +147,6 @@ #elif defined(CONFIG_ARCH_BSC9131) #define CONFIG_FSL_SDHC_V2_3 #define CONFIG_TSECV2 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define CONFIG_SYS_FSL_DSP_M2_RAM_ADDR 0xb0000000 #define CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT 0xff600000 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 3 @@ -172,7 +155,6 @@ #elif defined(CONFIG_ARCH_BSC9132) #define CONFIG_FSL_SDHC_V2_3 #define CONFIG_TSECV2 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define CONFIG_SYS_FSL_DSP_DDR_ADDR 0x40000000 #define CONFIG_SYS_FSL_DSP_M2_RAM_ADDR 0xb0000000 #define CONFIG_SYS_FSL_DSP_M3_RAM_ADDR 0xc0000000 @@ -204,7 +186,6 @@ #define CONFIG_SYS_FSL_SRDS_3 #define CONFIG_SYS_FSL_SRDS_4 #define CONFIG_SYS_NUM_FMAN 2 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_SYS_PME_CLK 0 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 #define CONFIG_SYS_FMAN_V3 @@ -234,7 +215,6 @@ #define CONFIG_SYS_CPRI #define CONFIG_SYS_FSL_NUM_CC_PLLS 5 #define CONFIG_SYS_NUM_FMAN 1 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define CONFIG_SYS_FM1_CLK 0 #define CONFIG_SYS_CPRI_CLK 3 #define CONFIG_SYS_ULB_CLK 4 @@ -255,7 +235,6 @@ #define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 4, 4, 4 } #define CONFIG_SYS_NUM_FM1_DTSEC 6 #define CONFIG_SYS_NUM_FM1_10GEC 2 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2 #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9 #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 @@ -278,7 +257,6 @@ #define CONFIG_SYS_FSL_SRDS_1 #define CONFIG_SYS_NUM_FMAN 1 #define CONFIG_SYS_NUM_FM1_DTSEC 5 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_PME_PLAT_CLK_DIV 2 #define CONFIG_SYS_PME_CLK CONFIG_PME_PLAT_CLK_DIV #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 @@ -309,7 +287,6 @@ #define CONFIG_SYS_NUM_FM1_DTSEC 4 #define CONFIG_SYS_NUM_FM1_10GEC 1 #define CONFIG_FSL_FM_10GEC_REGULAR_NOTATION -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 #define CONFIG_SYS_FM1_CLK 0 #define CONFIG_QBMAN_CLK_DIV 1 @@ -343,7 +320,6 @@ #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9 #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 #endif -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_PME_PLAT_CLK_DIV 1 #define CONFIG_SYS_PME_CLK CONFIG_PME_PLAT_CLK_DIV #define CONFIG_SYS_FM1_CLK 0 diff --git a/common/usb.c b/common/usb.c index aad13fd9c55..6fcf1e8428e 100644 --- a/common/usb.c +++ b/common/usb.c @@ -49,10 +49,6 @@ char usb_started; /* flag for the started/stopped USB status */ static struct usb_device usb_dev[USB_MAX_DEVICE]; static int dev_index; -#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -#endif - /*************************************************************************** * Init USB Device */ diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 4d32d477f14..5315efadb2a 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -137,5 +137,6 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 0550371f2fe..c4d5fe890e6 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -119,5 +119,6 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index 6f9062ed38d..cc9b113a3d2 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -122,5 +122,6 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index 5ee0112ea76..6d98c2e7d41 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -99,5 +99,6 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index e06a58254c9..80ca03cb1e9 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -136,4 +136,5 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index e1147d42e58..75a967bc8d5 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -118,4 +118,5 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 5bc7091f20d..f0d9d29dec6 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -121,4 +121,5 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 9f3a6d06cc6..2631bb31b1b 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -98,4 +98,5 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index fac2bef7e6a..193e4717478 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -92,6 +92,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index 5516850bb3c..4a97e85d11b 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -87,6 +87,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index a42d21093c4..3a19e4d09d2 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -89,6 +89,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index 8265602bcc7..5dddbda5c96 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -84,6 +84,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index 0c07556ef24..d9bc80328b8 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -95,6 +95,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index 2c5e5da15fb..e0e65eef68a 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -90,6 +90,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index b8a1d679099..761a9021b8c 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -92,6 +92,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index bce873a0bcc..6798c1dde48 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -87,6 +87,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index b4917b9a032..dde3351aa20 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -88,6 +88,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index 79a3b95eda4..1db447178c3 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -90,6 +90,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index d1de9515223..9eb49bf2f23 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -85,6 +85,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index ac4bb3b19b4..75b9c967481 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -96,6 +96,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index 06214ca5c35..015feac4e7f 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -90,6 +90,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index 0c9d564a12c..7aa07692662 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -92,6 +92,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index 7e543872a16..8d5f1076e21 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -87,6 +87,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index b66eebc740b..940538b3def 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -124,6 +124,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index b0d7ada29d2..ac31a5597da 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -118,6 +118,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index 9a66568377a..76883048ef9 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -121,6 +121,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index 0f7e062380f..a88b6a32343 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -93,6 +93,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index 906ff940e4a..f8772ccfdc2 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -122,6 +122,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index 6959b3768f4..99280a07eab 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -116,6 +116,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 0eda3cc6490..0f624f70e67 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -119,6 +119,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig index f05e66e0d37..ae2f00587e6 100644 --- a/configs/T1042D4RDB_defconfig +++ b/configs/T1042D4RDB_defconfig @@ -91,6 +91,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 28274d481fd..3299fcd9173 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -128,6 +128,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index d2020977da9..b35c964e6e6 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -122,6 +122,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index 59ea4ad121e..69597549e44 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -95,6 +95,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 56abc03c877..ce0b15c9470 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -125,6 +125,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig index b5e0a539bec..362d9fd6f56 100644 --- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig @@ -88,6 +88,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index 1c14aedae2c..e2b3ee11752 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -97,6 +97,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index 8089f2db3ff..c33ff6f2430 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -131,6 +131,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index 839c51d2d1c..4d4c37b39a0 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -125,6 +125,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index c171e34b619..040e5bc3e12 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -128,6 +128,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index 18d9d547372..0e001e2038c 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -99,6 +99,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index 303b646fef4..26ee2972bb2 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -133,6 +133,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index 91f6069f55c..c3c399ce9f5 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -127,6 +127,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index 188a5e45b10..fbae2c41b09 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -130,6 +130,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig index c300b82ea8d..ef87c2ebafa 100644 --- a/configs/T2080RDB_revD_defconfig +++ b/configs/T2080RDB_revD_defconfig @@ -101,6 +101,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index 462e52fe638..dd5861ef0dc 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -112,6 +112,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index 67061d03d56..01236eddcd2 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -87,6 +87,7 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index 62891557040..f9721796dbf 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -105,6 +105,7 @@ CONFIG_DM_SCSI=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y CONFIG_USB=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_KEYBOARD=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_GADGET=y diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 44e2ff09409..0bdd088b1e7 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -102,6 +102,7 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y CONFIG_USB=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_KEYBOARD=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_GADGET=y diff --git a/configs/ge_b1x5v2_defconfig b/configs/ge_b1x5v2_defconfig index ff14bd625a6..c282990aa45 100644 --- a/configs/ge_b1x5v2_defconfig +++ b/configs/ge_b1x5v2_defconfig @@ -123,6 +123,7 @@ CONFIG_POWEROFF_GPIO=y CONFIG_SYSRESET_WATCHDOG=y CONFIG_IMX_THERMAL=y CONFIG_USB=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_USB_GADGET=y diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index 86692174712..067498d80e3 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -63,6 +63,7 @@ CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y CONFIG_USB=y # CONFIG_SPL_DM_USB is not set +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 diff --git a/configs/kontron-sl-mx6ul_defconfig b/configs/kontron-sl-mx6ul_defconfig index efa7a06886a..f9cebf9e9c9 100644 --- a/configs/kontron-sl-mx6ul_defconfig +++ b/configs/kontron-sl-mx6ul_defconfig @@ -92,6 +92,7 @@ CONFIG_FSL_QSPI=y CONFIG_MXC_SPI=y CONFIG_IMX_THERMAL=y CONFIG_USB=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig index abb095d98ac..317347b0d29 100644 --- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig @@ -105,6 +105,7 @@ CONFIG_NXP_FSPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_RSA=y CONFIG_SPL_RSA=y CONFIG_RSA_SOFTWARE_EXP=y diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig index e8ae5af0ade..b6441a3abde 100644 --- a/configs/lx2160aqds_tfa_defconfig +++ b/configs/lx2160aqds_tfa_defconfig @@ -112,6 +112,7 @@ CONFIG_NXP_FSPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_WDT=y CONFIG_WDT_SBSA=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig index d7ebf896fbe..c340d9d23ce 100644 --- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig @@ -96,6 +96,7 @@ CONFIG_NXP_FSPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_RSA=y CONFIG_SPL_RSA=y CONFIG_RSA_SOFTWARE_EXP=y diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig index d3cfb1fea52..3040382e359 100644 --- a/configs/lx2160ardb_tfa_defconfig +++ b/configs/lx2160ardb_tfa_defconfig @@ -107,6 +107,7 @@ CONFIG_OPTEE=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_WDT=y CONFIG_WDT_SBSA=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/lx2160ardb_tfa_stmm_defconfig b/configs/lx2160ardb_tfa_stmm_defconfig index 5589c48beff..efc0f91650e 100644 --- a/configs/lx2160ardb_tfa_stmm_defconfig +++ b/configs/lx2160ardb_tfa_stmm_defconfig @@ -107,5 +107,6 @@ CONFIG_OPTEE=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_EFI_MM_COMM_TEE=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig index 900fbf7ca71..d9d429b4f96 100644 --- a/configs/mx6sabreauto_defconfig +++ b/configs/mx6sabreauto_defconfig @@ -103,6 +103,7 @@ CONFIG_DM_SPI=y CONFIG_MXC_SPI=y CONFIG_IMX_THERMAL=y CONFIG_USB=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig index 10f6b4f099a..784a5d97f08 100644 --- a/configs/mx6ul_14x14_evk_defconfig +++ b/configs/mx6ul_14x14_evk_defconfig @@ -93,6 +93,7 @@ CONFIG_FSL_QSPI=y CONFIG_SOFT_SPI=y CONFIG_IMX_THERMAL=y CONFIG_USB=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="FSL" diff --git a/configs/pico-dwarf-imx6ul_defconfig b/configs/pico-dwarf-imx6ul_defconfig index 18373600a40..cb9c6b8fece 100644 --- a/configs/pico-dwarf-imx6ul_defconfig +++ b/configs/pico-dwarf-imx6ul_defconfig @@ -72,6 +72,7 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_MXC_UART=y CONFIG_USB=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 diff --git a/configs/pico-dwarf-imx7d_defconfig b/configs/pico-dwarf-imx7d_defconfig index e27b5626a3a..3adba803dd4 100644 --- a/configs/pico-dwarf-imx7d_defconfig +++ b/configs/pico-dwarf-imx7d_defconfig @@ -87,6 +87,7 @@ CONFIG_IMX_THERMAL=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_MXC_USB_OTG_HACTIVE=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 diff --git a/configs/pico-hobbit-imx6ul_defconfig b/configs/pico-hobbit-imx6ul_defconfig index f8754092fff..0a2f10d0f15 100644 --- a/configs/pico-hobbit-imx6ul_defconfig +++ b/configs/pico-hobbit-imx6ul_defconfig @@ -75,6 +75,7 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_MXC_UART=y CONFIG_USB=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig index 275a3a0d1f6..cbfe346820f 100644 --- a/configs/pico-hobbit-imx7d_defconfig +++ b/configs/pico-hobbit-imx7d_defconfig @@ -87,6 +87,7 @@ CONFIG_IMX_THERMAL=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_MXC_USB_OTG_HACTIVE=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig index aeda4557436..e8f6c434b66 100644 --- a/configs/pico-imx6ul_defconfig +++ b/configs/pico-imx6ul_defconfig @@ -78,6 +78,7 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_MXC_UART=y CONFIG_USB=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 diff --git a/configs/pico-imx7d_bl33_defconfig b/configs/pico-imx7d_bl33_defconfig index 13a7fcf1759..a9d21eb02c8 100644 --- a/configs/pico-imx7d_bl33_defconfig +++ b/configs/pico-imx7d_bl33_defconfig @@ -84,6 +84,7 @@ CONFIG_IMX_THERMAL=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_MXC_USB_OTG_HACTIVE=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig index 3181964cdd4..6a2f87a8bb1 100644 --- a/configs/pico-imx7d_defconfig +++ b/configs/pico-imx7d_defconfig @@ -87,6 +87,7 @@ CONFIG_IMX_THERMAL=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_MXC_USB_OTG_HACTIVE=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 diff --git a/configs/pico-nymph-imx7d_defconfig b/configs/pico-nymph-imx7d_defconfig index e27b5626a3a..3adba803dd4 100644 --- a/configs/pico-nymph-imx7d_defconfig +++ b/configs/pico-nymph-imx7d_defconfig @@ -87,6 +87,7 @@ CONFIG_IMX_THERMAL=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_MXC_USB_OTG_HACTIVE=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 diff --git a/configs/pico-pi-imx6ul_defconfig b/configs/pico-pi-imx6ul_defconfig index bb085678c7c..a184393abd2 100644 --- a/configs/pico-pi-imx6ul_defconfig +++ b/configs/pico-pi-imx6ul_defconfig @@ -75,6 +75,7 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_MXC_UART=y CONFIG_USB=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig index 1a052a40227..79aa398e1e8 100644 --- a/configs/pico-pi-imx7d_defconfig +++ b/configs/pico-pi-imx7d_defconfig @@ -87,6 +87,7 @@ CONFIG_IMX_THERMAL=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_MXC_USB_OTG_HACTIVE=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 diff --git a/configs/variscite_dart6ul_defconfig b/configs/variscite_dart6ul_defconfig index f19dcbddcdf..0f9cc8d82d3 100644 --- a/configs/variscite_dart6ul_defconfig +++ b/configs/variscite_dart6ul_defconfig @@ -58,6 +58,7 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y CONFIG_USB=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Variscite" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig index 3b9aa979090..da782889a1b 100644 --- a/configs/vining_2000_defconfig +++ b/configs/vining_2000_defconfig @@ -93,6 +93,7 @@ CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y CONFIG_USB=y +CONFIG_USB_MAX_CONTROLLER_COUNT=2 CONFIG_USB_STORAGE=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y diff --git a/drivers/usb/common/fsl-dt-fixup.c b/drivers/usb/common/fsl-dt-fixup.c index 4d7a2acd8e5..00b8cd368b1 100644 --- a/drivers/usb/common/fsl-dt-fixup.c +++ b/drivers/usb/common/fsl-dt-fixup.c @@ -16,10 +16,6 @@ #include #include -#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -#endif - /* USB Controllers */ #define FSL_USB2_MPH "fsl-usb2-mph" #define FSL_USB2_DR "fsl-usb2-dr" diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 8240ed8a443..7d5bde53870 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -364,3 +364,9 @@ config USB_R8A66597_HCD ---help--- This enables support for the on-chip Renesas R8A66597 USB 2.0 controller, present in various RZ and SH SoCs. + +config USB_MAX_CONTROLLER_COUNT + int "Maximum number of USB host controllers" + depends on USB_EHCI_FSL || USB_XHCI_FSL || \ + (SPL_USB_HOST && !DM_SPL_USB) || (USB_HOST && !DM_USB) + default 1 diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index e6355263cb9..f033198a7c1 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -25,10 +25,6 @@ #include "ehci.h" -#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -#endif - /* * EHCI spec page 20 says that the HC may take up to 16 uFrames (= 4ms) to halt. * Let's time out after 8 to have a little safety margin on top of that. diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 7767fce4050..4922b063309 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -30,7 +30,6 @@ /* USB Configs */ /* Host */ -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 /* Client */ diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index c63c5ebb672..4e982189559 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -104,7 +104,6 @@ /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* SPL */ #include "imx7_spl.h" diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 02935430c25..6bffeb6a65b 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -141,7 +141,6 @@ /* USB */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Boot */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index da5b8a6f80f..40d145a1bec 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -138,7 +138,6 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_USBD_HS diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 0d8922bc3f8..3c220e0d6e3 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -27,7 +27,6 @@ /* USB Configs */ /* Host */ -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 /* Client */ diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index d78a27347c5..8e50eeaec15 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -182,7 +182,6 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_USBD_HS diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 664c538f6dc..9b1cec578e6 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -97,7 +97,6 @@ #endif /* USB Host Support */ -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* USB DFU */ diff --git a/include/configs/dart_6ul.h b/include/configs/dart_6ul.h index 9f27072f12f..36052fe7d86 100644 --- a/include/configs/dart_6ul.h +++ b/include/configs/dart_6ul.h @@ -52,7 +52,6 @@ /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define ENV_MMC \ "mmcdev=" __stringify(MMC_ROOTFS_DEV) "\0" \ diff --git a/include/configs/db-88f6720.h b/include/configs/db-88f6720.h index 7357f9800fd..ef9c457e102 100644 --- a/include/configs/db-88f6720.h +++ b/include/configs/db-88f6720.h @@ -20,7 +20,6 @@ #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE /* USB/EHCI configuration */ -#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 /* Environment in SPI NOR flash */ diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index da6514b64fc..715a6d7a9e7 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -16,7 +16,6 @@ #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE /* USB/EHCI configuration */ -#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 /* Environment in SPI NOR flash */ diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index 0c0abe6023e..f770b355286 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -40,7 +40,6 @@ #ifdef CONFIG_CMD_USB #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */ /* USB Gadget (DFU, UMS) */ #if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE) diff --git a/include/configs/ge_b1x5v2.h b/include/configs/ge_b1x5v2.h index 61ca5f8b34a..95ba20c686b 100644 --- a/include/configs/ge_b1x5v2.h +++ b/include/configs/ge_b1x5v2.h @@ -31,7 +31,6 @@ /* USB */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */ #define CONFIG_USBD_HS /* Video */ diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h index 6b1c67867da..2913549c883 100644 --- a/include/configs/imx6_logic.h +++ b/include/configs/imx6_logic.h @@ -124,7 +124,6 @@ #ifdef CONFIG_CMD_USB #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */ #endif /* Falcon Mode */ diff --git a/include/configs/imx6dl-mamoj.h b/include/configs/imx6dl-mamoj.h index 0bae238a4b0..909453cd66f 100644 --- a/include/configs/imx6dl-mamoj.h +++ b/include/configs/imx6dl-mamoj.h @@ -45,7 +45,6 @@ /* USB */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Falcon */ diff --git a/include/configs/imx6q-bosch-acc.h b/include/configs/imx6q-bosch-acc.h index e904a10b6e8..201684ba802 100644 --- a/include/configs/imx6q-bosch-acc.h +++ b/include/configs/imx6q-bosch-acc.h @@ -113,6 +113,5 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */ #endif /* __IMX6Q_ACC_H */ diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index 9b84730fc76..60a0c16f904 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -142,6 +142,5 @@ /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #endif /*__IMX8MM_CL_IOT_GATE_H*/ diff --git a/include/configs/kontron-sl-mx6ul.h b/include/configs/kontron-sl-mx6ul.h index 7b5e5773464..512cef09f80 100644 --- a/include/configs/kontron-sl-mx6ul.h +++ b/include/configs/kontron-sl-mx6ul.h @@ -31,7 +31,6 @@ #ifdef CONFIG_USB_EHCI_HCD #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #endif /* Boot order for distro boot */ diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h index a8468229f69..6b591ed7872 100644 --- a/include/configs/kontron-sl-mx8mm.h +++ b/include/configs/kontron-sl-mx8mm.h @@ -28,7 +28,6 @@ #ifdef CONFIG_USB_EHCI_HCD #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #endif /* GUID for capsule updatable firmware image */ diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h index 7b8e70e5945..1823a793988 100644 --- a/include/configs/kp_imx6q_tpc.h +++ b/include/configs/kp_imx6q_tpc.h @@ -23,7 +23,6 @@ #ifdef CONFIG_CMD_USB #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */ #endif #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h index fa178fbe936..a1fc056c305 100644 --- a/include/configs/liteboard.h +++ b/include/configs/liteboard.h @@ -100,7 +100,6 @@ #ifdef CONFIG_CMD_USB #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #endif #ifdef CONFIG_CMD_NET diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index 905c63d4dda..b06394c3003 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -10,7 +10,6 @@ #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE /* XHCI Support - enabled by default */ -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define DDR_SDRAM_CFG 0x470c0008 #define DDR_CS0_BNDS 0x008000bf diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index f8c3a0923ab..1669ecd2aba 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -96,11 +96,6 @@ #endif /* USB */ -#ifdef CONFIG_USB_HOST -#ifndef CONFIG_TARGET_LX2162AQDS -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 -#endif -#endif #define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4) diff --git a/include/configs/lx2162aqds.h b/include/configs/lx2162aqds.h index 126d226ebc7..729c2707e99 100644 --- a/include/configs/lx2162aqds.h +++ b/include/configs/lx2162aqds.h @@ -9,8 +9,6 @@ #include "lx2160a_common.h" /* USB */ -#undef CONFIG_USB_MAX_CONTROLLER_COUNT -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* RTC */ #define CONFIG_SYS_RTC_BUS_NUM 0 diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h index b497ada0655..56f640226dd 100644 --- a/include/configs/mvebu_armada-37xx.h +++ b/include/configs/mvebu_armada-37xx.h @@ -34,8 +34,6 @@ */ #define DEFAULT_ENV_IS_RW /* required for configuring default fdtfile= */ -#define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3) - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 0) \ diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h index 52d88f70589..5a956f0a3e3 100644 --- a/include/configs/mvebu_armada-8k.h +++ b/include/configs/mvebu_armada-8k.h @@ -27,8 +27,6 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3) - /* USB ethernet */ /* diff --git a/include/configs/mx23_olinuxino.h b/include/configs/mx23_olinuxino.h index 06b90e42b4c..dd303a17d61 100644 --- a/include/configs/mx23_olinuxino.h +++ b/include/configs/mx23_olinuxino.h @@ -15,9 +15,6 @@ /* Status LED */ /* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -#endif /* Ethernet */ diff --git a/include/configs/mx23evk.h b/include/configs/mx23evk.h index 94b916dbdb1..3507e83fb38 100644 --- a/include/configs/mx23evk.h +++ b/include/configs/mx23evk.h @@ -20,9 +20,6 @@ /* Environment is in MMC */ /* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -#endif /* Framebuffer support */ #ifdef CONFIG_DM_VIDEO diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index 10f48c12565..7a352bd2a60 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -34,9 +34,6 @@ #endif /* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -#endif /* Framebuffer support */ #ifdef CONFIG_DM_VIDEO diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h index d0cf6a2251c..bc4aa52f5bf 100644 --- a/include/configs/mx6sabreauto.h +++ b/include/configs/mx6sabreauto.h @@ -16,7 +16,6 @@ #define CONSOLE_DEV "ttymxc3" /* USB Configs */ -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 18d5d4988cf..ef255aa360e 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -38,7 +38,6 @@ #ifdef CONFIG_CMD_USB #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */ #endif #endif /* __MX6SABRESD_CONFIG_H */ diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index 837742b8039..9f890938f98 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -96,7 +96,6 @@ #ifdef CONFIG_CMD_USB #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #endif #define CONFIG_SYS_FSL_USDHC_NUM 3 diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h index b3a786da480..c8780414004 100644 --- a/include/configs/mx6sxsabreauto.h +++ b/include/configs/mx6sxsabreauto.h @@ -99,7 +99,6 @@ #ifdef CONFIG_CMD_USB #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #endif #define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 8bddc5281e5..7bbc500ae12 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -126,7 +126,6 @@ #ifdef CONFIG_CMD_USB #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #endif #ifdef CONFIG_CMD_PCI diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index 6a110132a75..ab56ea0205d 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -121,7 +121,6 @@ #ifdef CONFIG_CMD_USB #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #endif #ifdef CONFIG_CMD_NET diff --git a/include/configs/mys_6ulx.h b/include/configs/mys_6ulx.h index d1dc445a9b7..f7dd31e5578 100644 --- a/include/configs/mys_6ulx.h +++ b/include/configs/mys_6ulx.h @@ -36,7 +36,6 @@ /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define CONFIG_EXTRA_ENV_SETTINGS \ "console=ttymxc0,115200n8\0" \ diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 0305aecb143..72a9f4ec24f 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -23,7 +23,6 @@ #define CONFIG_FEC_MXC_PHYADDR 6 /* USB Configs */ -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 diff --git a/include/configs/novena.h b/include/configs/novena.h index 40304ba468c..ee39b3c297c 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -64,7 +64,6 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 /* Gadget part */ diff --git a/include/configs/npi_imx6ull.h b/include/configs/npi_imx6ull.h index b3de41852fe..96f570af1d0 100644 --- a/include/configs/npi_imx6ull.h +++ b/include/configs/npi_imx6ull.h @@ -37,7 +37,6 @@ /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #ifdef CONFIG_CMD_NET #define CONFIG_FEC_MXC_PHYADDR 0x1 diff --git a/include/configs/opos6uldev.h b/include/configs/opos6uldev.h index d368376d202..9b89d9e524f 100644 --- a/include/configs/opos6uldev.h +++ b/include/configs/opos6uldev.h @@ -26,7 +26,6 @@ #ifdef CONFIG_USB_EHCI_MX6 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #endif /* LCD */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 857f329ba92..f4971a57086 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -448,10 +448,6 @@ * USB */ -#if defined(CONFIG_TARGET_P1020RDB_PD) -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -#endif - #ifdef CONFIG_MMC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #endif diff --git a/include/configs/pcl063.h b/include/configs/pcl063.h index c6c417b6292..a07d3517ce2 100644 --- a/include/configs/pcl063.h +++ b/include/configs/pcl063.h @@ -48,7 +48,6 @@ /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define CONFIG_EXTRA_ENV_SETTINGS \ "console=ttymxc0,115200n8\0" \ diff --git a/include/configs/pcl063_ull.h b/include/configs/pcl063_ull.h index 4c1d24f64fd..ae81b8e214e 100644 --- a/include/configs/pcl063_ull.h +++ b/include/configs/pcl063_ull.h @@ -50,7 +50,6 @@ /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define ENV_MMC \ "mmcdev=" __stringify(MMC_ROOTFS_DEV) "\0" \ diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index 7e57d7b1422..2ac48c40c96 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -32,7 +32,6 @@ /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_USBD_HS diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index 39705d95692..7fbf2c3f55f 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -118,6 +118,5 @@ /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #endif diff --git a/include/configs/poplar.h b/include/configs/poplar.h index b119465420d..4b749b13ee8 100644 --- a/include/configs/poplar.h +++ b/include/configs/poplar.h @@ -21,7 +21,6 @@ /* ATF bl33.bin load address (must match) */ /* USB configuration */ -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /***************************************************************************** * Initial environment variables diff --git a/include/configs/somlabs_visionsom_6ull.h b/include/configs/somlabs_visionsom_6ull.h index e7a12799d99..eeee587bafd 100644 --- a/include/configs/somlabs_visionsom_6ull.h +++ b/include/configs/somlabs_visionsom_6ull.h @@ -67,7 +67,6 @@ #ifdef CONFIG_CMD_USB #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #endif #ifdef CONFIG_CMD_NET diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h index 94e1acd98ba..655fcb0011b 100644 --- a/include/configs/theadorable.h +++ b/include/configs/theadorable.h @@ -29,7 +29,6 @@ #define CONFIG_I2C_MVTWSI_BASE1 MVEBU_TWSI1_BASE /* USB/EHCI configuration */ -#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 /* Environment in SPI NOR flash */ diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index d60fe51eaf9..a782e3d02bd 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -52,7 +52,6 @@ /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #if defined(CONFIG_TQMA6X_MMC_BOOT) diff --git a/include/configs/turris_mox.h b/include/configs/turris_mox.h index 7fa30d04f3c..d4aa312da4f 100644 --- a/include/configs/turris_mox.h +++ b/include/configs/turris_mox.h @@ -18,8 +18,6 @@ 4000000, 4500000, 5000000, 5500000, \ 6000000 } -#define CONFIG_USB_MAX_CONTROLLER_COUNT 6 - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(NVME, nvme, 0) \ diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 710321944ab..6d77df09fb5 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -72,6 +72,5 @@ /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #endif /* __VERDIN_IMX8MM_H */ diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index 487ab3d664c..9cc8fc5ff53 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -43,7 +43,6 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #ifdef CONFIG_CMD_PCI #define CONFIG_PCI_SCAN_SHOW diff --git a/include/configs/warp.h b/include/configs/warp.h index 5716f8f9a60..7cb9743fddb 100644 --- a/include/configs/warp.h +++ b/include/configs/warp.h @@ -36,7 +36,6 @@ #ifdef CONFIG_CMD_USB #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Only OTG2 port enabled */ #endif #define CONFIG_USBD_HS diff --git a/include/configs/xpress.h b/include/configs/xpress.h index 81f8d64067d..0e43b373649 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -33,7 +33,6 @@ /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_FEC_ENET_DEV 0 #define CONFIG_FEC_MXC_PHYADDR 0x0 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 726973b26e2..6e901fde7ef 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1728,7 +1728,6 @@ CONFIG_USB_FAT_BOOT CONFIG_USB_GADGET_AT91 CONFIG_USB_GADGET_DWC2_OTG_PHY CONFIG_USB_ISP1301_I2C_ADDR -CONFIG_USB_MAX_CONTROLLER_COUNT CONFIG_USB_OHCI_LPC32XX CONFIG_USB_OHCI_NEW CONFIG_USB_TTY -- GitLab From 5dbf320bef92770ffba24cd4b04c06fc06692892 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 12 Jun 2022 20:02:05 -0400 Subject: [PATCH 430/581] Convert CONFIG_SYS_USB_FAT_BOOT_PARTITION to Kconfig This converts the following to Kconfig: CONFIG_SYS_USB_FAT_BOOT_PARTITION Signed-off-by: Tom Rini --- common/spl/Kconfig | 7 +++++++ include/configs/am43xx_evm.h | 6 ------ include/configs/am64x_evm.h | 2 -- include/configs/am65x_evm.h | 2 -- 4 files changed, 7 insertions(+), 10 deletions(-) diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 42f2c95228a..3fd56448006 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -1317,6 +1317,13 @@ config SPL_USB_STORAGE config options. This enables loading from USB using a configured device. +config SYS_USB_FAT_BOOT_PARTITION + int "Partition on USB to use to load U-Boot from" + depends on SPL_USB_STORAGE + default 1 + help + Partition on the USB storage device to load U-Boot from + config SPL_USB_GADGET bool "Suppport USB Gadget drivers" help diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index e0138fe1db8..e3a01adae97 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -48,12 +48,6 @@ /* NS16550 Configuration */ #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ -/* SPL USB Support */ - -#if defined(CONFIG_SPL_USB_HOST) || !defined(CONFIG_SPL_BUILD) -#define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1 -#endif - #ifndef CONFIG_SPL_BUILD /* USB Device Firmware Update support */ #define DFUARGS \ diff --git a/include/configs/am64x_evm.h b/include/configs/am64x_evm.h index 6da11b86c4b..140940730d0 100644 --- a/include/configs/am64x_evm.h +++ b/include/configs/am64x_evm.h @@ -106,6 +106,4 @@ /* Now for the remaining common defines */ #include -#define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1 - #endif /* __CONFIG_AM642_EVM_H */ diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h index db35af98d9a..65b0a576a6f 100644 --- a/include/configs/am65x_evm.h +++ b/include/configs/am65x_evm.h @@ -110,8 +110,6 @@ EXTRA_ENV_DFUARGS \ BOOTENV -#define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1 - /* Now for the remaining common defines */ #include -- GitLab From 5cf6a06ae8835738121e39c0f6c581d4a669f651 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 13 Jun 2022 22:57:30 -0400 Subject: [PATCH 431/581] env: Do not make CONFIG_EXTRA_ENV_TEXT and CONFIG_EXTRA_ENV_SETTINGS conflict Largely, the use of CONFIG_EXTRA_ENV_SETTINGS can be migrated directly to come from CONFIG_EXTRA_ENV_TEXT. The biggest case that cannot easily be migrated is distro_bootcmd support. Rather than block migration on this, remove the #error here so that we can being moving forward. Cc: Joe Hershberger Cc: Wolfgang Denk Cc: Simon Glass Signed-off-by: Tom Rini --- include/env_default.h | 3 --- 1 file changed, 3 deletions(-) diff --git a/include/env_default.h b/include/env_default.h index 7004a6fef29..7113e08e6b0 100644 --- a/include/env_default.h +++ b/include/env_default.h @@ -109,9 +109,6 @@ const char default_environment[] = { "bootlimit=" __stringify(CONFIG_BOOTCOUNT_BOOTLIMIT)"\0" #endif #ifdef CONFIG_EXTRA_ENV_TEXT -# ifdef CONFIG_EXTRA_ENV_SETTINGS -# error "Your board uses a text-file environment, so must not define CONFIG_EXTRA_ENV_SETTINGS" -# endif /* This is created in the Makefile */ CONFIG_EXTRA_ENV_TEXT #endif -- GitLab From 07b964284175da7e293debf5ffebd195673deb55 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 13 Jun 2022 22:57:31 -0400 Subject: [PATCH 432/581] env: Remove include/generated/env.* under "make clean" When running "make clean" we want to remove env.in and well as env.txt. Cc: Simon Glass Signed-off-by: Tom Rini --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 9575d43683a..93571d37d98 100644 --- a/Makefile +++ b/Makefile @@ -2207,7 +2207,7 @@ CLEAN_DIRS += $(MODVERDIR) \ $(filter-out include, $(shell ls -1 $d 2>/dev/null)))) CLEAN_FILES += include/bmp_logo.h include/bmp_logo_data.h \ - include/generated/env.in drivers/video/u_boot_logo.S \ + include/generated/env.* drivers/video/u_boot_logo.S \ tools/version.h u-boot* MLO* SPL System.map fit-dtb.blob* \ u-boot-ivt.img.log u-boot-dtb.imx.log SPL.log u-boot.imx.log \ lpc32xx-* bl31.c bl31.elf bl31_*.bin image.map tispl.bin* \ -- GitLab From 5c3f6a320678d64c9fa0c42755488822a033b567 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 13 Jun 2022 22:57:32 -0400 Subject: [PATCH 433/581] dragonboard410c: Migrate to using CONFIG_EXTRA_ENV_TEXT With the exception of distro_boot support, we can move all of the rest of the environment changes to come from CONFIG_EXTRA_ENV_TEXT and in turn remove CONFIG_ENV_REFLASH. Cc: Ramon Fried Signed-off-by: Tom Rini --- .../dragonboard410c/dragonboard410c.env | 36 ++++++++++++++++ include/configs/dragonboard410c.h | 42 +------------------ 2 files changed, 38 insertions(+), 40 deletions(-) create mode 100644 board/qualcomm/dragonboard410c/dragonboard410c.env diff --git a/board/qualcomm/dragonboard410c/dragonboard410c.env b/board/qualcomm/dragonboard410c/dragonboard410c.env new file mode 100644 index 00000000000..9d9a575a0c3 --- /dev/null +++ b/board/qualcomm/dragonboard410c/dragonboard410c.env @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +/* Does what recovery does */ +#define REFLASH(file, partnum) \ +part start mmc 0 partnum start && \ +part size mmc 0 partnum size && \ +tftp $loadaddr file && \ +mmc write $loadaddr $start $size && + +reflash= +mmc dev 0 && +usb start && +dhcp && +tftp $loadaddr dragonboard/rescue/gpt_both0.bin && +mmc write $loadaddr 0 43 && +mmc rescan && +REFLASH(dragonboard/rescue/NON-HLOS.bin, 1) +REFLASH(dragonboard/rescue/sbl1.mbn, 2) +REFLASH(dragonboard/rescue/rpm.mbn, 3) +REFLASH(dragonboard/rescue/tz.mbn, 4) +REFLASH(dragonboard/rescue/hyp.mbn, 5) +REFLASH(dragonboard/rescue/sec.dat, 6) +REFLASH(dragonboard/rescue/emmc_appsboot.mbn, 7) +REFLASH(dragonboard/u-boot.img, 8) +usb stop && +echo Reflash completed + +loadaddr=0x81000000 +initrd_high=0xffffffffffffffff +linux_image=Image +kernel_addr_r=0x81000000 +fdtfile=qcom/apq8016-sbc.dtb +fdt_addr_r=0x83000000 +ramdisk_addr_r=0x84000000 +scriptaddr=0x90000000 +pxefile_addr_r=0x90100000 diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h index 26a714c2886..e1d580b1c8f 100644 --- a/include/configs/dragonboard410c.h +++ b/include/configs/dragonboard410c.h @@ -20,8 +20,7 @@ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_BOOTM_LEN SZ_64M -/* UART */ - +/* Environment */ #define BOOT_TARGET_DEVICES(func) \ func(USB, usb, 0) \ func(MMC, mmc, 1) \ @@ -30,43 +29,6 @@ #include -/* Does what recovery does */ -#define REFLASH(file, part) \ -"part start mmc 0 "#part" start && "\ -"part size mmc 0 "#part" size && "\ -"tftp $loadaddr "#file" && " \ -"mmc write $loadaddr $start $size && " - -#define CONFIG_ENV_REFLASH \ -"mmc dev 0 && "\ -"usb start && "\ -"dhcp && "\ -"tftp $loadaddr dragonboard/rescue/gpt_both0.bin && "\ -"mmc write $loadaddr 0 43 && " \ -"mmc rescan && "\ -REFLASH(dragonboard/rescue/NON-HLOS.bin, 1)\ -REFLASH(dragonboard/rescue/sbl1.mbn, 2)\ -REFLASH(dragonboard/rescue/rpm.mbn, 3)\ -REFLASH(dragonboard/rescue/tz.mbn, 4)\ -REFLASH(dragonboard/rescue/hyp.mbn, 5)\ -REFLASH(dragonboard/rescue/sec.dat, 6)\ -REFLASH(dragonboard/rescue/emmc_appsboot.mbn, 7)\ -REFLASH(dragonboard/u-boot.img, 8)\ -"usb stop &&"\ -"echo Reflash completed" - -/* Environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - "reflash="CONFIG_ENV_REFLASH"\0"\ - "loadaddr=0x81000000\0" \ - "initrd_high=0xffffffffffffffff\0" \ - "linux_image=Image\0" \ - "kernel_addr_r=0x81000000\0"\ - "fdtfile=qcom/apq8016-sbc.dtb\0" \ - "fdt_addr_r=0x83000000\0"\ - "ramdisk_addr_r=0x84000000\0"\ - "scriptaddr=0x90000000\0"\ - "pxefile_addr_r=0x90100000\0"\ - BOOTENV +#define CONFIG_EXTRA_ENV_SETTINGS BOOTENV #endif -- GitLab From 5d7dea14007bc41b8984a7881bf1686d7030f644 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 13 Jun 2022 22:57:33 -0400 Subject: [PATCH 434/581] Convert CONFIG_ENV_RANGE to Kconfig This converts the following to Kconfig: CONFIG_ENV_RANGE Now that this is in Kconfig we can enforce a minimum size and so remove the check in C code to ensure range is larger than size. Signed-off-by: Tom Rini --- configs/P1010RDB-PA_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PA_NAND_defconfig | 1 + configs/P1010RDB-PB_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PB_NAND_defconfig | 1 + configs/P1020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P1020RDB-PC_NAND_defconfig | 1 + configs/P1020RDB-PD_NAND_defconfig | 1 + configs/P2020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P2020RDB-PC_NAND_defconfig | 1 + configs/colibri-imx6ull_defconfig | 1 + configs/colibri_imx7_defconfig | 1 + configs/colibri_vf_defconfig | 1 + configs/draco_defconfig | 1 + configs/etamin_defconfig | 1 + configs/m53menlo_defconfig | 1 + configs/mx28evk_nand_defconfig | 1 + configs/rastaban_defconfig | 1 + configs/smartweb_defconfig | 1 + configs/thuban_defconfig | 1 + configs/vf610twr_nand_defconfig | 1 + env/Kconfig | 18 ++++++++++-------- env/nand.c | 8 -------- include/configs/P1010RDB.h | 6 ------ include/configs/colibri-imx6ull.h | 5 ----- include/configs/colibri_imx7.h | 5 ----- include/configs/colibri_vf.h | 5 ----- include/configs/draco.h | 3 --- include/configs/etamin.h | 4 ---- include/configs/m53menlo.h | 3 --- include/configs/mx28evk.h | 11 ----------- include/configs/p1_p2_rdb_pc.h | 1 - include/configs/rastaban.h | 3 --- include/configs/smartweb.h | 5 ----- include/configs/thuban.h | 3 --- include/configs/vf610twr.h | 4 ---- 35 files changed, 30 insertions(+), 74 deletions(-) diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index 989b897b21b..d1de7059317 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -68,6 +68,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_ENV_RANGE=0xc000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index 16e91656860..eaa9efc1616 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -67,6 +67,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_ENV_RANGE=0xc000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 1ba6d20272b..7a552982bdf 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -69,6 +69,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_ENV_RANGE=0x80000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 2dc38477169..b85d14a4dde 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -68,6 +68,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_ENV_RANGE=0x80000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 5315efadb2a..3b320bc7306 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -68,6 +68,7 @@ CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_ENV_RANGE=0xc000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 80ca03cb1e9..d77c3eda347 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -67,6 +67,7 @@ CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_ENV_RANGE=0xc000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index 7b1809bba0f..f92e3f0bb8a 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -70,6 +70,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=ec000000.nor:128k(dtb),6016k(kernel),57088k(fs CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_ENV_RANGE=0x60000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index 18ece2145dc..91ebd892eb3 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -72,6 +72,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fef000000.nor:256k(vsc7385-firmware),256k(dtb) CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_ENV_RANGE=0xc000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index e6cd51c0710..5a62055d1af 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -71,6 +71,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=ef000000.nor:256k(vsc7385-firmware),256k(dtb), CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_ENV_RANGE=0xc000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" diff --git a/configs/colibri-imx6ull_defconfig b/configs/colibri-imx6ull_defconfig index 750b03b74d8..a4225d862b4 100644 --- a/configs/colibri-imx6ull_defconfig +++ b/configs/colibri-imx6ull_defconfig @@ -55,6 +55,7 @@ CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_ENV_RANGE=0x80000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig index f56064d34d3..15dae6b3db9 100644 --- a/configs/colibri_imx7_defconfig +++ b/configs/colibri_imx7_defconfig @@ -56,6 +56,7 @@ CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_ENV_RANGE=0x80000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_IP_DEFRAG=y diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig index d92756fb166..9dbe6280dd7 100644 --- a/configs/colibri_vf_defconfig +++ b/configs/colibri_vf_defconfig @@ -62,6 +62,7 @@ CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_ENV_RANGE=0x80000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y diff --git a/configs/draco_defconfig b/configs/draco_defconfig index f7bb01f3bf3..c137fc72e0f 100644 --- a/configs/draco_defconfig +++ b/configs/draco_defconfig @@ -79,6 +79,7 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_ENV_RANGE=0x80000 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RETRY_COUNT=10 diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig index 294a67a7fac..f0b10f02923 100644 --- a/configs/etamin_defconfig +++ b/configs/etamin_defconfig @@ -80,6 +80,7 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_ENV_RANGE=0x200000 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RETRY_COUNT=10 diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index 2ccea8315c7..2ce0ab91819 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -68,6 +68,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=mxc_nand:1m(u-boot),512k(env1),512k(env2),-(ub CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_ENV_RANGE=0x80000 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y diff --git a/configs/mx28evk_nand_defconfig b/configs/mx28evk_nand_defconfig index 6b3235ca6e0..136c1d60699 100644 --- a/configs/mx28evk_nand_defconfig +++ b/configs/mx28evk_nand_defconfig @@ -43,6 +43,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:3m(bootloader)ro,512k(environment),5 CONFIG_CMD_UBI=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_ENV_RANGE=0x80000 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig index 9f27592088c..373bca678dd 100644 --- a/configs/rastaban_defconfig +++ b/configs/rastaban_defconfig @@ -79,6 +79,7 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_ENV_RANGE=0x80000 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RETRY_COUNT=10 diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig index 57c5218d4b0..4e05f71bf3a 100644 --- a/configs/smartweb_defconfig +++ b/configs/smartweb_defconfig @@ -69,6 +69,7 @@ CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_ENV_RANGE=0x80000 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RETRY_COUNT=20 diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig index 0a6b0e88b3f..6115e9e3edc 100644 --- a/configs/thuban_defconfig +++ b/configs/thuban_defconfig @@ -79,6 +79,7 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_ENV_RANGE=0x80000 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RETRY_COUNT=10 diff --git a/configs/vf610twr_nand_defconfig b/configs/vf610twr_nand_defconfig index f6ed47f7348..288169c7ee3 100644 --- a/configs/vf610twr_nand_defconfig +++ b/configs/vf610twr_nand_defconfig @@ -45,6 +45,7 @@ CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_ENV_RANGE=0x80000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_VYBRID_GPIO=y diff --git a/env/Kconfig b/env/Kconfig index 0aed7aea46b..238e4c70cf0 100644 --- a/env/Kconfig +++ b/env/Kconfig @@ -264,14 +264,6 @@ config ENV_IS_IN_NAND during a "saveenv" operation. CONFIG_ENV_OFFSET_REDUND must be aligned to an erase block boundary. - - CONFIG_ENV_RANGE (optional): - - Specifies the length of the region in which the environment - can be written. This should be a multiple of the NAND device's - block size. Specifying a range with more erase blocks than - are needed to hold CONFIG_ENV_SIZE allows bad blocks within - the range to be avoided. - - CONFIG_ENV_OFFSET_OOB (optional): Enables support for dynamically retrieving the offset of the @@ -280,6 +272,16 @@ config ENV_IS_IN_NAND Currently, CONFIG_ENV_OFFSET_REDUND is not supported when using CONFIG_ENV_OFFSET_OOB. +config ENV_RANGE + hex "Length of the region in which the environment can be written" + depends on ENV_IS_IN_NAND + range ENV_SIZE 0x7fffffff + default ENV_SIZE + help + This should be a multiple of the NAND device's block size. + Specifying a range with more erase blocks than are needed to hold + CONFIG_ENV_SIZE allows bad blocks within the range to be avoided. + config ENV_IS_IN_NVRAM bool "Environment in a non-volatile RAM" depends on !CHAIN_OF_TRUST diff --git a/env/nand.c b/env/nand.c index 21aa367d5bd..df300b13179 100644 --- a/env/nand.c +++ b/env/nand.c @@ -33,10 +33,6 @@ #error CONFIG_ENV_OFFSET_REDUND must have CONFIG_CMD_SAVEENV & CONFIG_CMD_NAND #endif -#ifndef CONFIG_ENV_RANGE -#define CONFIG_ENV_RANGE CONFIG_ENV_SIZE -#endif - #if defined(ENV_IS_EMBEDDED) static env_t *env_ptr = &environment; #elif defined(CONFIG_NAND_ENV_DST) @@ -201,10 +197,6 @@ static int env_nand_save(void) #endif }; - - if (CONFIG_ENV_RANGE < CONFIG_ENV_SIZE) - return 1; - ret = env_export(env_new); if (ret) return ret; diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 27361f2d447..ad78dba865b 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -477,12 +477,6 @@ extern unsigned long get_sdram_size(void); #elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD #define SPL_ENV_ADDR (CONFIG_SYS_INIT_L2_ADDR + (160 << 10)) -#else -#if defined(CONFIG_TARGET_P1010RDB_PA) -#define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE) /* 3*16=48K for env */ -#elif defined(CONFIG_TARGET_P1010RDB_PB) -#define CONFIG_ENV_RANGE (32 * CONFIG_ENV_SIZE) /* new block size 512K */ -#endif #endif #endif diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index 40d145a1bec..bf020612837 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -122,11 +122,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -/* environment organization */ -#if defined(CONFIG_ENV_IS_IN_NAND) -#define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SIZE) -#endif - #ifdef CONFIG_TARGET_COLIBRI_IMX6ULL_NAND /* NAND stuff */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index 8e50eeaec15..c8884e61b71 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -166,11 +166,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -/* environment organization */ -#if defined(CONFIG_ENV_IS_IN_NAND) -#define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SIZE) -#endif - #ifdef CONFIG_TARGET_COLIBRI_IMX7_NAND /* NAND stuff */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 9b1cec578e6..7d2b7dece02 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -91,11 +91,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -/* Environment organization */ -#ifdef CONFIG_ENV_IS_IN_NAND -#define CONFIG_ENV_RANGE (4 * 64 * 2048) -#endif - /* USB Host Support */ /* USB DFU */ diff --git a/include/configs/draco.h b/include/configs/draco.h index 21367f0a6f5..4869008da44 100644 --- a/include/configs/draco.h +++ b/include/configs/draco.h @@ -27,9 +27,6 @@ /* Physical Memory Map */ #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ -/* Define own nand partitions */ -#define CONFIG_ENV_RANGE (4 * CONFIG_SYS_ENV_SECT_SIZE) - /* Default env settings */ #define CONFIG_EXTRA_ENV_SETTINGS \ "hostname=draco\0" \ diff --git a/include/configs/etamin.h b/include/configs/etamin.h index 654bfc61216..3acc62d9e17 100644 --- a/include/configs/etamin.h +++ b/include/configs/etamin.h @@ -77,10 +77,6 @@ /* nedded by compliance test in read mode */ -/* Define own nand partitions */ -#define CONFIG_ENV_RANGE (4 * CONFIG_SYS_ENV_SECT_SIZE) - - #undef COMMON_ENV_DFU_ARGS #define COMMON_ENV_DFU_ARGS "dfu_args=run bootargs_defaults;" \ "setenv bootargs ${bootargs};" \ diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index b8ad0c3a216..1533e57fa8c 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -51,9 +51,6 @@ #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR #define CONFIG_SYS_NAND_LARGEPAGE #define CONFIG_MXC_NAND_HWECC - -/* Environment is in NAND */ -#define CONFIG_ENV_RANGE (0x00080000) /* 512 KiB */ #endif /* diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index 7a352bd2a60..9f3ac48b70a 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -15,17 +15,6 @@ #define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -/* Environment */ - -/* Environment is in MMC */ - -/* Environment is in NAND */ -#if defined(CONFIG_CMD_NAND) && defined(CONFIG_ENV_IS_IN_NAND) -#define CONFIG_ENV_RANGE (512 * 1024) -#endif - -/* Environment is in SPI flash */ - /* UBI and NAND partitioning */ /* RTC */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index f4971a57086..6d417c57fdb 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -433,7 +433,6 @@ #if defined(CONFIG_SDCARD) #define CONFIG_FSL_FIXED_MMC_LOCATION #elif defined(CONFIG_MTD_RAW_NAND) -#define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE) #ifdef CONFIG_TPL_BUILD #define SPL_ENV_ADDR (CONFIG_SYS_INIT_L2_ADDR + (160 << 10)) #endif diff --git a/include/configs/rastaban.h b/include/configs/rastaban.h index 5de980ddc00..49cd11c17b4 100644 --- a/include/configs/rastaban.h +++ b/include/configs/rastaban.h @@ -37,9 +37,6 @@ #define EEPROM_ADDR_DDR3 0x90 #define EEPROM_ADDR_CHIP 0x120 -/* Define own nand partitions */ -#define CONFIG_ENV_RANGE (4 * CONFIG_SYS_ENV_SECT_SIZE) - /* Default env settings */ #define CONFIG_EXTRA_ENV_SETTINGS \ "hostname=rastaban\0" \ diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 458d22d61f4..da6fb18c17a 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -87,11 +87,6 @@ /* General Boot Parameter */ -/* - * The NAND Flash partitions: - */ -#define CONFIG_ENV_RANGE (SZ_512K) - /* * Predefined environment variables. * Usefull to define some easy to use boot commands. diff --git a/include/configs/thuban.h b/include/configs/thuban.h index fd903537ae5..696306e4659 100644 --- a/include/configs/thuban.h +++ b/include/configs/thuban.h @@ -30,9 +30,6 @@ #define EEPROM_ADDR_DDR3 0x90 #define EEPROM_ADDR_CHIP 0x120 -/* Define own nand partitions */ -#define CONFIG_ENV_RANGE (4 * CONFIG_SYS_ENV_SECT_SIZE) - /* Default env settings */ #define CONFIG_EXTRA_ENV_SETTINGS \ "hostname=thuban\0" \ diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index 6ad1ba9e021..7f4bfb5124a 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -130,8 +130,4 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#ifdef CONFIG_ENV_IS_IN_NAND -#define CONFIG_ENV_RANGE (512 * 1024) -#endif - #endif -- GitLab From d8564e919d06480c84f5e3c9a35e2b8a43092524 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 13 Jun 2022 22:57:34 -0400 Subject: [PATCH 435/581] opos6uldev: Migrate to using CONFIG_EXTRA_ENV_TEXT MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Move the environment text over from being set via CONFIG_EXTRA_ENV_SETTINGS in include/configs/opos6uldev.h and over to plain text in board/armadeus/opos6uldev/opos6uldev.env. This lets us manage env_version without a CONFIG variable. Cc: Sébastien Szymanski Signed-off-by: Tom Rini --- board/armadeus/opos6uldev/opos6uldev.env | 133 +++++++++++++++++++++++ include/configs/opos6uldev.h | 131 ---------------------- 2 files changed, 133 insertions(+), 131 deletions(-) create mode 100644 board/armadeus/opos6uldev/opos6uldev.env diff --git a/board/armadeus/opos6uldev/opos6uldev.env b/board/armadeus/opos6uldev/opos6uldev.env new file mode 100644 index 00000000000..585f28ca858 --- /dev/null +++ b/board/armadeus/opos6uldev/opos6uldev.env @@ -0,0 +1,133 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +/* + * Copyright (C) 2017 Armadeus Systems + */ + +/* Environment is stored in the eMMC boot partition */ + +env_version=100 +consoledev=ttymxc0 +board_name=opos6ul +fdt_addr=0x88000000 +fdt_high=0xffffffff +fdt_name=opos6uldev +initrd_high=0xffffffff +ip_dyn=yes +stdin=serial +stdout=serial +stderr=serial +mmcdev=0 +mmcpart=2 +mmcroot=/dev/mmcblk0p2 ro +mmcrootfstype=ext4 rootwait +kernelimg=opos6ul-linux.bin +splashpos=0,0 +splashimage=CONFIG_SYS_LOAD_ADDR +videomode=video=ctfb:x:800,y:480,depth:18,pclk:33033,le:96,ri:96,up:20,lo:21,hs:64,vs:4,sync:0,vmode:0 +check_env=if test -n ${flash_env_version}; + then env default env_version; + else env set flash_env_version ${env_version}; env save; + fi; + if itest ${flash_env_version} != ${env_version}; then + echo "*** Warning - Environment version + change suggests: run flash_reset_env; reset"; + env default flash_reset_env; + else exit; fi; +flash_reset_env=env default -f -a && saveenv && + echo Environment variables erased! +download_uboot_spl=tftpboot ${loadaddr} ${board_name}-u-boot.spl +flash_uboot_spl= + if mmc dev 0 1; then + setexpr sz ${filesize} / 0x200; + setexpr sz ${sz} + 1; + if mmc write ${loadaddr} 0x2 ${sz}; then + echo Flashing of U-boot SPL succeed; + else echo Flashing of U-boot SPL failed; + fi; + fi; +download_uboot_img=tftpboot ${loadaddr} ${board_name}-u-boot.img +flash_uboot_img= + if mmc dev 0 1; then + setexpr sz ${filesize} / 0x200; + setexpr sz ${sz} + 1; + if mmc write ${loadaddr} 0x8a ${sz}; then + echo Flashing of U-boot image succeed; + else echo Flashing of U-boot image failed; + fi; + fi; +update_uboot=run download_uboot_spl flash_uboot_spl + download_uboot_img flash_uboot_img +download_kernel=tftpboot ${loadaddr} ${kernelimg} +flash_kernel= + if ext4write mmc ${mmcdev}:${mmcpart} ${loadaddr} /boot/${kernelimg} ${filesize}; then + echo kernel update succeed; + else echo kernel update failed; + fi; +update_kernel=run download_kernel flash_kernel +download_dtb=tftpboot ${fdt_addr} imx6ul-${fdt_name}.dtb +flash_dtb= + if ext4write mmc ${mmcdev}:${mmcpart} ${fdt_addr} /boot/imx6ul-${fdt_name}.dtb ${filesize}; then + echo dtb update succeed; + else echo dtb update in failed; + fi; +update_dtb=run download_dtb flash_dtb +download_rootfs=tftpboot ${loadaddr} ${board_name}-rootfs.ext4 +flash_rootfs= + if mmc dev 0 0; then + setexpr nbblocks ${filesize} / 0x200; + setexpr nbblocks ${nbblocks} + 1; + if mmc write ${loadaddr} 0x40800 ${nbblocks}; then + echo Flashing of rootfs image succeed; + else echo Flashing of rootfs image failed; + fi; + fi; +update_rootfs=run download_rootfs flash_rootfs +flash_failsafe= + if mmc dev 0 0; then + setexpr nbblocks ${filesize} / 0x200; + setexpr nbblocks ${nbblocks} + 1; + if mmc write ${loadaddr} 0x800 ${nbblocks}; then + echo Flashing of rootfs image in failsafe partition succeed; + else echo Flashing of rootfs image in failsafe partition failed; + fi; + fi; +update_failsafe=run download_rootfs flash_failsafe +download_userdata=tftpboot ${loadaddr} ${board_name}-user_data.ext4 +flash_userdata= + if mmc dev 0 0; then + setexpr nbblocks ${filesize} / 0x200; + setexpr nbblocks ${nbblocks} + 1; + if mmc write ${loadaddr} 0 ${nbblocks}; then + echo Flashing of user_data image succeed; + else echo Flashing of user_data image failed; + fi; + fi; +update_userdata=run download_userdata flash_userdata; mmc rescan +erase_userdata= + if mmc dev 0 0; then + echo Erasing eMMC User Data partition, no way out...; + mw ${loadaddr} 0 0x200000; + mmc write ${loadaddr} 0 0x1000; + mmc write ${loadaddr} 0x800 0x1000; + mmc write ${loadaddr} 0x40800 0x1000; + mmc write ${loadaddr} 0x440800 0x1000; + fi; + mmc rescan +update_all=run update_rootfs update_uboot +initargs=setenv bootargs console=${consoledev},${baudrate} ${extrabootargs} +addipargs=setenv bootargs ${bootargs} + ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off +addmmcargs=setenv bootargs ${bootargs} root=${mmcroot} + rootfstype=${mmcrootfstype} +emmcboot=run initargs; run addmmcargs; + load mmc ${mmcdev}:${mmcpart} ${loadaddr} /boot/${kernelimg} && + load mmc ${mmcdev}:${mmcpart} ${fdt_addr} /boot/imx6ul-${fdt_name}.dtb && + bootz ${loadaddr} - ${fdt_addr}; +emmcsafeboot=setenv mmcpart 1; setenv mmcroot /dev/mmcblk0p1 ro; run emmcboot; +addnfsargs=setenv bootargs ${bootargs} root=/dev/nfs rw + nfsroot=${serverip}:${rootpath} +nfsboot=run initargs; run addnfsargs addipargs; + nfs ${loadaddr} ${serverip}:${rootpath}/boot/${kernelimg} && + nfs ${fdt_addr} ${serverip}:${rootpath}/boot/imx6ul-${fdt_name}.dtb && + bootz ${loadaddr} - ${fdt_addr}; diff --git a/include/configs/opos6uldev.h b/include/configs/opos6uldev.h index 9b89d9e524f..73fe86f9bab 100644 --- a/include/configs/opos6uldev.h +++ b/include/configs/opos6uldev.h @@ -31,138 +31,7 @@ /* LCD */ #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR -/* Environment is stored in the eMMC boot partition */ - -#define CONFIG_ENV_VERSION 100 -#define ACFG_CONSOLE_DEV ttymxc0 #define CONFIG_SYS_AUTOLOAD "no" #define CONFIG_ROOTPATH "/tftpboot/opos6ul-root" -#define CONFIG_EXTRA_ENV_SETTINGS \ - "env_version=" __stringify(CONFIG_ENV_VERSION) "\0" \ - "consoledev=" __stringify(ACFG_CONSOLE_DEV) "\0" \ - "board_name=opos6ul\0" \ - "fdt_addr=0x88000000\0" \ - "fdt_high=0xffffffff\0" \ - "fdt_name=opos6uldev\0" \ - "initrd_high=0xffffffff\0" \ - "ip_dyn=yes\0" \ - "stdin=serial\0" \ - "stdout=serial\0" \ - "stderr=serial\0" \ - "mmcdev=0\0" \ - "mmcpart=2\0" \ - "mmcroot=/dev/mmcblk0p2 ro\0" \ - "mmcrootfstype=ext4 rootwait\0" \ - "kernelimg=opos6ul-linux.bin\0" \ - "splashpos=0,0\0" \ - "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ - "videomode=video=ctfb:x:800,y:480,depth:18,pclk:33033,le:96,ri:96,up:20,lo:21,hs:64,vs:4,sync:0,vmode:0\0" \ - "check_env=if test -n ${flash_env_version}; " \ - "then env default env_version; " \ - "else env set flash_env_version ${env_version}; env save; " \ - "fi; " \ - "if itest ${flash_env_version} != ${env_version}; then " \ - "echo \"*** Warning - Environment version" \ - " change suggests: run flash_reset_env; reset\"; " \ - "env default flash_reset_env; " \ - "else exit; fi; \0" \ - "flash_reset_env=env default -f -a && saveenv && " \ - "echo Environment variables erased!\0" \ - "download_uboot_spl=tftpboot ${loadaddr} ${board_name}-u-boot.spl\0" \ - "flash_uboot_spl=" \ - "if mmc dev 0 1; then " \ - "setexpr sz ${filesize} / 0x200; " \ - "setexpr sz ${sz} + 1; " \ - "if mmc write ${loadaddr} 0x2 ${sz}; then " \ - "echo Flashing of U-boot SPL succeed; " \ - "else echo Flashing of U-boot SPL failed; " \ - "fi; " \ - "fi;\0" \ - "download_uboot_img=tftpboot ${loadaddr} ${board_name}-u-boot.img\0" \ - "flash_uboot_img=" \ - "if mmc dev 0 1; then " \ - "setexpr sz ${filesize} / 0x200; " \ - "setexpr sz ${sz} + 1; " \ - "if mmc write ${loadaddr} 0x8a ${sz}; then " \ - "echo Flashing of U-boot image succeed; " \ - "else echo Flashing of U-boot image failed; " \ - "fi; " \ - "fi;\0" \ - "update_uboot=run download_uboot_spl flash_uboot_spl " \ - "download_uboot_img flash_uboot_img\0" \ - "download_kernel=tftpboot ${loadaddr} ${kernelimg}\0" \ - "flash_kernel=" \ - "if ext4write mmc ${mmcdev}:${mmcpart} ${loadaddr} /boot/${kernelimg} ${filesize}; then " \ - "echo kernel update succeed; " \ - "else echo kernel update failed; " \ - "fi;\0" \ - "update_kernel=run download_kernel flash_kernel\0" \ - "download_dtb=tftpboot ${fdt_addr} imx6ul-${fdt_name}.dtb\0" \ - "flash_dtb=" \ - "if ext4write mmc ${mmcdev}:${mmcpart} ${fdt_addr} /boot/imx6ul-${fdt_name}.dtb ${filesize}; then " \ - "echo dtb update succeed; " \ - "else echo dtb update in failed; " \ - "fi;\0" \ - "update_dtb=run download_dtb flash_dtb\0" \ - "download_rootfs=tftpboot ${loadaddr} ${board_name}-rootfs.ext4\0" \ - "flash_rootfs=" \ - "if mmc dev 0 0; then " \ - "setexpr nbblocks ${filesize} / 0x200; " \ - "setexpr nbblocks ${nbblocks} + 1; " \ - "if mmc write ${loadaddr} 0x40800 ${nbblocks}; then " \ - "echo Flashing of rootfs image succeed; " \ - "else echo Flashing of rootfs image failed; " \ - "fi; " \ - "fi;\0" \ - "update_rootfs=run download_rootfs flash_rootfs\0" \ - "flash_failsafe=" \ - "if mmc dev 0 0; then " \ - "setexpr nbblocks ${filesize} / 0x200; " \ - "setexpr nbblocks ${nbblocks} + 1; " \ - "if mmc write ${loadaddr} 0x800 ${nbblocks}; then " \ - "echo Flashing of rootfs image in failsafe partition succeed; " \ - "else echo Flashing of rootfs image in failsafe partition failed; " \ - "fi; " \ - "fi;\0" \ - "update_failsafe=run download_rootfs flash_failsafe\0" \ - "download_userdata=tftpboot ${loadaddr} ${board_name}-user_data.ext4\0" \ - "flash_userdata=" \ - "if mmc dev 0 0; then " \ - "setexpr nbblocks ${filesize} / 0x200; " \ - "setexpr nbblocks ${nbblocks} + 1; " \ - "if mmc write ${loadaddr} 0 ${nbblocks}; then " \ - "echo Flashing of user_data image succeed; " \ - "else echo Flashing of user_data image failed; " \ - "fi; " \ - "fi;\0" \ - "update_userdata=run download_userdata flash_userdata; mmc rescan\0" \ - "erase_userdata=" \ - "if mmc dev 0 0; then " \ - "echo Erasing eMMC User Data partition, no way out...; " \ - "mw ${loadaddr} 0 0x200000; " \ - "mmc write ${loadaddr} 0 0x1000; " \ - "mmc write ${loadaddr} 0x800 0x1000; " \ - "mmc write ${loadaddr} 0x40800 0x1000; " \ - "mmc write ${loadaddr} 0x440800 0x1000; " \ - "fi;" \ - "mmc rescan\0" \ - "update_all=run update_rootfs update_uboot\0" \ - "initargs=setenv bootargs console=${consoledev},${baudrate} ${extrabootargs}\0" \ - "addipargs=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \ - "${gatewayip}:${netmask}:${hostname}:eth0:off\0" \ - "addmmcargs=setenv bootargs ${bootargs} root=${mmcroot} " \ - "rootfstype=${mmcrootfstype}\0" \ - "emmcboot=run initargs; run addmmcargs; " \ - "load mmc ${mmcdev}:${mmcpart} ${loadaddr} /boot/${kernelimg} && " \ - "load mmc ${mmcdev}:${mmcpart} ${fdt_addr} /boot/imx6ul-${fdt_name}.dtb && " \ - "bootz ${loadaddr} - ${fdt_addr};\0" \ - "emmcsafeboot=setenv mmcpart 1; setenv mmcroot /dev/mmcblk0p1 ro; run emmcboot;\0" \ - "addnfsargs=setenv bootargs ${bootargs} root=/dev/nfs rw " \ - "nfsroot=${serverip}:${rootpath}\0" \ - "nfsboot=run initargs; run addnfsargs addipargs; " \ - "nfs ${loadaddr} ${serverip}:${rootpath}/boot/${kernelimg} && " \ - "nfs ${fdt_addr} ${serverip}:${rootpath}/boot/imx6ul-${fdt_name}.dtb && " \ - "bootz ${loadaddr} - ${fdt_addr};\0" - #endif /* __OPOS6ULDEV_CONFIG_H */ -- GitLab From bf904ea41883d7dacd77a1c257d10cc89a0ec394 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 13 Jun 2022 22:57:35 -0400 Subject: [PATCH 436/581] Rename CONFIG_SYS_AUTOLAOD to CONFIG_SYS_DISABLE_AUTOLOAD The "autoload" environment variable is always checked with env_get_yesno as it can be set to any form of no. The default behavior of env_get_yesno is to return -1 on variables that are not set, which acts as true in general (we test for non-zero return). To convert CONFIG_SYS_AUTOLOAD to Kconfig, given that it was almost always used to set autoload to no, first rename to CONFIG_SYS_DISABLE_AUTOLOAD for consistency sake. Then, make it so that if enabled we set autoload=0 in the default environment. Migrate all platforms which set CONFIG_SYS_AUTOLOAD to non-true or that set autoload to false in their default environment to using CONFIG_SYS_DISABLE_AUTOLOAD Signed-off-by: Tom Rini --- cmd/Kconfig | 9 +++++++++ configs/am335x_guardian_defconfig | 1 + configs/bitmain_antminer_s9_defconfig | 1 + configs/bk4r1_defconfig | 1 + configs/brppt1_mmc_defconfig | 1 + configs/brppt1_nand_defconfig | 1 + configs/brppt1_spi_defconfig | 1 + configs/brppt2_defconfig | 1 + configs/brsmarc1_defconfig | 1 + configs/brxre1_defconfig | 1 + configs/cl-som-imx7_defconfig | 1 + configs/cm_fx6_defconfig | 1 + configs/cm_t335_defconfig | 1 + configs/cm_t43_defconfig | 1 + configs/d2net_v2_defconfig | 1 + configs/devkit3250_defconfig | 1 + configs/dns325_defconfig | 1 + configs/ethernut5_defconfig | 1 + configs/inetspace_v2_defconfig | 1 + configs/nas220_defconfig | 1 + configs/net2big_v2_defconfig | 1 + configs/netspace_lite_v2_defconfig | 1 + configs/netspace_max_v2_defconfig | 1 + configs/netspace_mini_v2_defconfig | 1 + configs/netspace_v2_defconfig | 1 + configs/octeontx2_95xx_defconfig | 1 + configs/octeontx2_96xx_defconfig | 1 + configs/omap35_logic_defconfig | 1 + configs/omap35_logic_somlv_defconfig | 1 + configs/omap3_logic_defconfig | 1 + configs/omap3_logic_somlv_defconfig | 1 + configs/opos6uldev_defconfig | 1 + configs/pcm052_defconfig | 1 + configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig | 1 + configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig | 1 + .../stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig | 1 + configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig | 1 + configs/stm32mp15_basic_defconfig | 1 + configs/stm32mp15_defconfig | 1 + configs/stm32mp15_dhcom_basic_defconfig | 1 + configs/stm32mp15_dhcor_basic_defconfig | 1 + configs/stm32mp15_trusted_defconfig | 1 + include/configs/am335x_guardian.h | 1 - include/configs/bitmain_antminer_s9.h | 1 - include/configs/bk4r1.h | 1 - include/configs/brppt1.h | 1 - include/configs/brppt2.h | 1 - include/configs/brsmarc1.h | 1 - include/configs/brxre1.h | 1 - include/configs/cl-som-imx7.h | 4 ---- include/configs/cm_fx6.h | 1 - include/configs/cm_t335.h | 2 -- include/configs/cm_t43.h | 1 - include/configs/devkit3250.h | 1 - include/configs/dns325.h | 1 - include/configs/ethernut5.h | 5 ----- include/configs/imx7-cm.h | 1 - include/configs/lacie_kw.h | 1 - include/configs/nas220.h | 3 +-- include/configs/octeontx2_common.h | 3 +-- include/configs/octeontx_common.h | 1 - include/configs/omap3_logic.h | 1 - include/configs/opos6uldev.h | 1 - include/configs/pcm052.h | 1 - include/configs/siemens-am33x-common.h | 2 -- include/configs/smartweb.h | 3 --- include/configs/stm32mp15_common.h | 1 - include/env_default.h | 4 ++-- 68 files changed, 54 insertions(+), 40 deletions(-) diff --git a/cmd/Kconfig b/cmd/Kconfig index dea3729d132..ad36ae63c65 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -1737,6 +1737,15 @@ config NFS_TIMEOUT "ERROR: Cannot umount" in nfs command, try longer timeout such as 10000. +config SYS_DISABLE_AUTOLOAD + bool "Disable automatically loading files over the network" + depends on CMD_BOOTP || CMD_DHCP || CMD_NFS || CMD_RARP + help + Typically, commands such as "dhcp" will attempt to automatically + load a file from the network, once the initial network configuration + is complete. Enable this option to disable this behavior and instead + require files to be loaded over the network by subsequent commands. + config CMD_MII bool "mii" imply CMD_MDIO diff --git a/configs/am335x_guardian_defconfig b/configs/am335x_guardian_defconfig index 0dc4bb25be2..34bef30edd3 100644 --- a/configs/am335x_guardian_defconfig +++ b/configs/am335x_guardian_defconfig @@ -59,6 +59,7 @@ CONFIG_CMD_MTD=y CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_BMP=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig index f8ab9143587..98d38a89a04 100644 --- a/configs/bitmain_antminer_s9_defconfig +++ b/configs/bitmain_antminer_s9_defconfig @@ -56,6 +56,7 @@ CONFIG_CMD_PART=y CONFIG_CMD_DHCP=y CONFIG_BOOTP_MAY_FAIL=y # CONFIG_CMD_NFS is not set +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_PXE=y diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig index 838090e3039..0f8955dbbf1 100644 --- a/configs/bk4r1_defconfig +++ b/configs/bk4r1_defconfig @@ -41,6 +41,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_DHCP=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_BOOTCOUNT=y diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig index 488167e27f1..b1c8577ab62 100644 --- a/configs/brppt1_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -61,6 +61,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_BOOTP_MAY_FAIL=y # CONFIG_CMD_NFS is not set +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_BOOTCOUNT=y diff --git a/configs/brppt1_nand_defconfig b/configs/brppt1_nand_defconfig index dce6bebd81d..5addd4970b2 100644 --- a/configs/brppt1_nand_defconfig +++ b/configs/brppt1_nand_defconfig @@ -61,6 +61,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_BOOTP_MAY_FAIL=y # CONFIG_CMD_NFS is not set +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_BOOTCOUNT=y diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig index 41dd24fedda..67683c895d2 100644 --- a/configs/brppt1_spi_defconfig +++ b/configs/brppt1_spi_defconfig @@ -70,6 +70,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_BOOTP_MAY_FAIL=y # CONFIG_CMD_NFS is not set +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_BOOTCOUNT=y diff --git a/configs/brppt2_defconfig b/configs/brppt2_defconfig index db87b579eed..40e32d1f513 100644 --- a/configs/brppt2_defconfig +++ b/configs/brppt2_defconfig @@ -57,6 +57,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_BOOTP_MAY_FAIL=y # CONFIG_CMD_NFS is not set +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_MII=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y diff --git a/configs/brsmarc1_defconfig b/configs/brsmarc1_defconfig index 3134d3b4b6a..2f7ff524cc1 100644 --- a/configs/brsmarc1_defconfig +++ b/configs/brsmarc1_defconfig @@ -72,6 +72,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_BOOTP_MAY_FAIL=y # CONFIG_CMD_NFS is not set +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_TIME=y diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig index c39389451f1..c38393410f3 100644 --- a/configs/brxre1_defconfig +++ b/configs/brxre1_defconfig @@ -63,6 +63,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_BOOTP_MAY_FAIL=y # CONFIG_CMD_NFS is not set +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_TIME=y diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig index 075d8678c8a..bf670dbae68 100644 --- a/configs/cl-som-imx7_defconfig +++ b/configs/cl-som-imx7_defconfig @@ -52,6 +52,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_MII=y # CONFIG_CMD_MDIO is not set CONFIG_CMD_PING=y diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index 4d8788099f4..9bf78788e49 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -56,6 +56,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_SATA=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y diff --git a/configs/cm_t335_defconfig b/configs/cm_t335_defconfig index 0c2e8a35ef8..f1b4b622cbd 100644 --- a/configs/cm_t335_defconfig +++ b/configs/cm_t335_defconfig @@ -46,6 +46,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set CONFIG_BOOTP_DNS2=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=nand" diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig index 30afd5e7d00..c0dc70312a2 100644 --- a/configs/cm_t43_defconfig +++ b/configs/cm_t43_defconfig @@ -62,6 +62,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_NFS is not set +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_MTDPARTS=y CONFIG_OF_CONTROL=y diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig index 05f0d4bb35e..bbafd577279 100644 --- a/configs/d2net_v2_defconfig +++ b/configs/d2net_v2_defconfig @@ -38,6 +38,7 @@ CONFIG_CMD_SATA=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig index 5290ac5e82e..a0b7a2e2d36 100644 --- a/configs/devkit3250_defconfig +++ b/configs/devkit3250_defconfig @@ -43,6 +43,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig index 511ca2f6473..242cc36fcef 100644 --- a/configs/dns325_defconfig +++ b/configs/dns325_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig index 256f6520a59..796b71793a7 100644 --- a/configs/ethernut5_defconfig +++ b/configs/ethernut5_defconfig @@ -38,6 +38,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_DHCP=y CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_RARP=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_MII=y # CONFIG_CMD_MDIO is not set CONFIG_CMD_PING=y diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig index 160a0898f2e..7b1e8dee16d 100644 --- a/configs/inetspace_v2_defconfig +++ b/configs/inetspace_v2_defconfig @@ -38,6 +38,7 @@ CONFIG_CMD_SATA=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig index 5d105522dd1..99f36b72bf9 100644 --- a/configs/nas220_defconfig +++ b/configs/nas220_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig index 68d1eeff11e..248ce90519e 100644 --- a/configs/net2big_v2_defconfig +++ b/configs/net2big_v2_defconfig @@ -39,6 +39,7 @@ CONFIG_CMD_SATA=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig index 98d8e59119f..eea86eb0b73 100644 --- a/configs/netspace_lite_v2_defconfig +++ b/configs/netspace_lite_v2_defconfig @@ -39,6 +39,7 @@ CONFIG_CMD_SATA=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig index 11fd496e6d3..cb06fe2ae3c 100644 --- a/configs/netspace_max_v2_defconfig +++ b/configs/netspace_max_v2_defconfig @@ -39,6 +39,7 @@ CONFIG_CMD_SATA=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig index 1025ca30ad9..3a461469106 100644 --- a/configs/netspace_mini_v2_defconfig +++ b/configs/netspace_mini_v2_defconfig @@ -38,6 +38,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_SATA=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig index 1bb9915cc1e..d39b6a479e9 100644 --- a/configs/netspace_v2_defconfig +++ b/configs/netspace_v2_defconfig @@ -39,6 +39,7 @@ CONFIG_CMD_SATA=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y diff --git a/configs/octeontx2_95xx_defconfig b/configs/octeontx2_95xx_defconfig index fc7bc6d50ec..2b3748b2d04 100644 --- a/configs/octeontx2_95xx_defconfig +++ b/configs/octeontx2_95xx_defconfig @@ -59,6 +59,7 @@ CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_TFTPSRV=y CONFIG_CMD_RARP=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CDP=y diff --git a/configs/octeontx2_96xx_defconfig b/configs/octeontx2_96xx_defconfig index e0d4fe76a0f..0fd5b7212b8 100644 --- a/configs/octeontx2_96xx_defconfig +++ b/configs/octeontx2_96xx_defconfig @@ -60,6 +60,7 @@ CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_TFTPSRV=y CONFIG_CMD_RARP=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CDP=y diff --git a/configs/omap35_logic_defconfig b/configs/omap35_logic_defconfig index c76c10ac70f..787c26eaa47 100644 --- a/configs/omap35_logic_defconfig +++ b/configs/omap35_logic_defconfig @@ -51,6 +51,7 @@ CONFIG_CMD_SPL_WRITE_SIZE=0x20000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y CONFIG_CMD_NAND_LOCK_UNLOCK=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_CACHE=y CONFIG_CMD_UUID=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/omap35_logic_somlv_defconfig b/configs/omap35_logic_somlv_defconfig index 2637ecf9c50..ab5dfad28fc 100644 --- a/configs/omap35_logic_somlv_defconfig +++ b/configs/omap35_logic_somlv_defconfig @@ -52,6 +52,7 @@ CONFIG_CMD_SPL_NAND_OFS=0x240000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 CONFIG_CMD_NAND=y CONFIG_CMD_NAND_LOCK_UNLOCK=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_CACHE=y CONFIG_CMD_UUID=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index f55d52736ba..ce777cae88b 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -50,6 +50,7 @@ CONFIG_CMD_SPL_WRITE_SIZE=0x20000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y CONFIG_CMD_NAND_LOCK_UNLOCK=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_CACHE=y CONFIG_CMD_UUID=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/omap3_logic_somlv_defconfig b/configs/omap3_logic_somlv_defconfig index 97cdc9491d3..8c5bc19f10b 100644 --- a/configs/omap3_logic_somlv_defconfig +++ b/configs/omap3_logic_somlv_defconfig @@ -52,6 +52,7 @@ CONFIG_CMD_SPL_NAND_OFS=0x240000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 CONFIG_CMD_NAND=y CONFIG_CMD_NAND_LOCK_UNLOCK=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_CACHE=y CONFIG_CMD_UUID=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig index 1c1daf86a3b..b76e272e255 100644 --- a/configs/opos6uldev_defconfig +++ b/configs/opos6uldev_defconfig @@ -55,6 +55,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_DHCP=y CONFIG_CMD_TFTPPUT=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_SNTP=y diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig index 75999d177dc..41f1dc22c88 100644 --- a/configs/pcm052_defconfig +++ b/configs/pcm052_defconfig @@ -31,6 +31,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_DHCP=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y diff --git a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig index 9441b8c3b1c..76a450952fc 100644 --- a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig @@ -43,6 +43,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_REMOTEPROC=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_TIMER=y diff --git a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig index 96162854523..d413d2cac4b 100644 --- a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig @@ -43,6 +43,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_REMOTEPROC=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_TIMER=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig index 354a43cf55e..dd270975508 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig @@ -43,6 +43,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_REMOTEPROC=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_TIMER=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig index a601477d127..54a5385926f 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig @@ -43,6 +43,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_REMOTEPROC=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_TIMER=y diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 8ae668ca238..a17dbed6590 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -64,6 +64,7 @@ CONFIG_CMD_REMOTEPROC=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y CONFIG_CMD_EFIDEBUG=y diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index 8c41f80ee17..48185d32baa 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -40,6 +40,7 @@ CONFIG_CMD_REMOTEPROC=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y CONFIG_CMD_EFIDEBUG=y diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index fc23400264c..178c51687be 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -72,6 +72,7 @@ CONFIG_CMD_REMOTEPROC=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_TIMER=y diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index 95338c58c7d..67a2c249007 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -70,6 +70,7 @@ CONFIG_CMD_REMOTEPROC=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_TIMER=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index ebb51289c8a..7cb430fc328 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -41,6 +41,7 @@ CONFIG_CMD_REMOTEPROC=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y CONFIG_CMD_EFIDEBUG=y diff --git a/include/configs/am335x_guardian.h b/include/configs/am335x_guardian.h index b92703205cd..93fea95996c 100644 --- a/include/configs/am335x_guardian.h +++ b/include/configs/am335x_guardian.h @@ -52,7 +52,6 @@ MEM_LAYOUT_ENV_SETTINGS \ BOOTENV \ GUARDIAN_DEFAULT_PROD_ENV \ - "autoload=no\0" \ "backlight_brightness=50\0" \ "bootubivol=rootfs\0" \ "distro_bootcmd=" \ diff --git a/include/configs/bitmain_antminer_s9.h b/include/configs/bitmain_antminer_s9.h index 2bcd0e1a989..829e816ad66 100644 --- a/include/configs/bitmain_antminer_s9.h +++ b/include/configs/bitmain_antminer_s9.h @@ -10,7 +10,6 @@ #define CONFIG_SYS_SDRAM_SIZE 0x40000000 #define CONFIG_EXTRA_ENV_SETTINGS \ - "autoload=no\0" \ "pxefile_addr_r=0x2000000\0" \ "scriptaddr=0x3000000\0" \ "kernel_addr_r=0x2000000\0" \ diff --git a/include/configs/bk4r1.h b/include/configs/bk4r1.h index 2069d51d2fd..5311dc4eff9 100644 --- a/include/configs/bk4r1.h +++ b/include/configs/bk4r1.h @@ -67,7 +67,6 @@ /* Extra env settings (including the target-defined ones if any) */ #define CONFIG_EXTRA_ENV_SETTINGS \ BK4_EXTRA_ENV_SETTINGS \ - "autoload=no\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ "blimg_file=u-boot.vyb\0" \ diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h index 440571a799e..d7755b8cafa 100644 --- a/include/configs/brppt1.h +++ b/include/configs/brppt1.h @@ -102,7 +102,6 @@ MMCSPI_TGTS \ #define CONFIG_EXTRA_ENV_SETTINGS \ BUR_COMMON_ENV \ "verify=no\0" \ -"autoload=0\0" \ "scraddr=" __stringify(LOAD_OFFSET(0000000)) "\0" \ "cfgaddr=" __stringify(LOAD_OFFSET(0020000)) "\0" \ "dtbaddr=" __stringify(LOAD_OFFSET(0040000)) "\0" \ diff --git a/include/configs/brppt2.h b/include/configs/brppt2.h index 19276cc6eca..adaba410ce9 100644 --- a/include/configs/brppt2.h +++ b/include/configs/brppt2.h @@ -29,7 +29,6 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ BUR_COMMON_ENV \ -"autoload=0\0" \ "cfgaddr=0x106F0000\0" \ "scraddr=0x10700000\0" \ "loadaddr=0x10800000\0" \ diff --git a/include/configs/brsmarc1.h b/include/configs/brsmarc1.h index eccf16fdb7a..8fa5843be5d 100644 --- a/include/configs/brsmarc1.h +++ b/include/configs/brsmarc1.h @@ -27,7 +27,6 @@ /* Default environment */ #define CONFIG_EXTRA_ENV_SETTINGS \ BUR_COMMON_ENV \ -"autoload=0\0" \ "scradr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "cfgscr=mw ${dtbaddr} 0;" \ " sf probe && sf read ${scradr} 0xC0000 0x10000 && source ${scradr};" \ diff --git a/include/configs/brxre1.h b/include/configs/brxre1.h index b4e8d73db05..4d91a776ba8 100644 --- a/include/configs/brxre1.h +++ b/include/configs/brxre1.h @@ -26,7 +26,6 @@ /* Default environment */ #define CONFIG_EXTRA_ENV_SETTINGS \ BUR_COMMON_ENV \ -"autoload=0\0" \ "scradr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "bootaddr=0x80001100\0" \ "bootdev=cpsw(0,0)\0" \ diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index 4e982189559..1043eb75060 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -26,13 +26,9 @@ #define CONFIG_SYS_I2C_PCA953X_ADDR 0x20 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} } -#undef CONFIG_SYS_AUTOLOAD #undef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_SYS_AUTOLOAD "no" - #define CONFIG_EXTRA_ENV_SETTINGS \ - "autoload=off\0" \ "script=boot.scr\0" \ "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0" \ "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0" \ diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 6bffeb6a65b..3bb00a359f8 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -43,7 +43,6 @@ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" \ "panel=HDMI\0" \ - "autoload=no\0" \ "uImage=uImage-cm-fx6\0" \ "zImage=zImage-cm-fx6\0" \ "kernel=uImage-cm-fx6\0" \ diff --git a/include/configs/cm_t335.h b/include/configs/cm_t335.h index b2bec10960a..b81c3af29f6 100644 --- a/include/configs/cm_t335.h +++ b/include/configs/cm_t335.h @@ -55,8 +55,6 @@ MMCARGS \ NANDARGS -#define CONFIG_SYS_AUTOLOAD "no" - /* Serial console configuration */ /* NS16550 Configuration */ diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index ec1355b8a32..07c5cb8ded1 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -56,7 +56,6 @@ "loadaddr=0x80200000\0" \ "fdtaddr=0x81200000\0" \ "bootm_size=0x8000000\0" \ - "autoload=no\0" \ "console=ttyO0,115200n8\0" \ "fdtfile=am437x-sb-som-t43.dtb\0" \ "kernel=zImage-cm-t43\0" \ diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 15160db276d..e101d1f6004 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -71,7 +71,6 @@ */ #define CONFIG_EXTRA_ENV_SETTINGS \ - "autoload=no\0" \ "ethaddr=00:01:90:00:C0:81\0" \ "dtbaddr=0x81000000\0" \ "nfsroot=/opt/projects/images/vladimir/oe/devkit3250/rootfs\0" \ diff --git a/include/configs/dns325.h b/include/configs/dns325.h index 0590704000e..af2d3b6bcc3 100644 --- a/include/configs/dns325.h +++ b/include/configs/dns325.h @@ -40,7 +40,6 @@ "stdout=serial\0" \ "stderr=serial\0" \ "loadaddr=0x800000\0" \ - "autoload=no\0" \ "console=ttyS0,115200\0" \ "mtdparts="CONFIG_MTDPARTS_DEFAULT \ "optargs=\0" \ diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index 8f9cfd50bc1..2126731ccfc 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -98,11 +98,6 @@ #define I2C_DELAY udelay(100) #define I2C_READ at91_get_pio_value(AT91_PIO_PORTA, 23) -/* DHCP/BOOTP options */ -#ifdef CONFIG_CMD_DHCP -#define CONFIG_SYS_AUTOLOAD "n" -#endif - /* File systems */ /* Boot command */ diff --git a/include/configs/imx7-cm.h b/include/configs/imx7-cm.h index 2f00198e40e..f0f800b8409 100644 --- a/include/configs/imx7-cm.h +++ b/include/configs/imx7-cm.h @@ -12,7 +12,6 @@ #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR -#undef CONFIG_SYS_AUTOLOAD #undef CONFIG_EXTRA_ENV_SETTINGS /* diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h index 5e0f1c90934..9b70eed46f7 100644 --- a/include/configs/lacie_kw.h +++ b/include/configs/lacie_kw.h @@ -57,7 +57,6 @@ "stderr=serial\0" \ "bootfile=uImage\0" \ "loadaddr=0x800000\0" \ - "autoload=no\0" \ "netconsole=" \ "set stdin $stdin,nc; " \ "set stdout $stdout,nc; " \ diff --git a/include/configs/nas220.h b/include/configs/nas220.h index 815f81f6493..a8a905d4942 100644 --- a/include/configs/nas220.h +++ b/include/configs/nas220.h @@ -42,8 +42,7 @@ "0x500000@0xc0000(uimage),"\ "0x1a40000@0x5c0000(rootfs)\0" \ "mtdids=nand0=orion_nand\0"\ - "autostart=no\0"\ - "autoload=no\0" + "autostart=no\0" /* * Ethernet Driver configuration diff --git a/include/configs/octeontx2_common.h b/include/configs/octeontx2_common.h index 5c75f23a0bf..f377ba8fa2e 100644 --- a/include/configs/octeontx2_common.h +++ b/include/configs/octeontx2_common.h @@ -18,8 +18,7 @@ /** Extra environment settings */ #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=20080000\0" \ - "ethrotate=yes\0" \ - "autoload=0\0" + "ethrotate=yes\0" #define CONFIG_SYS_MMC_MAX_BLK_COUNT 8192 diff --git a/include/configs/octeontx_common.h b/include/configs/octeontx_common.h index 2697a703cea..73a14b25de6 100644 --- a/include/configs/octeontx_common.h +++ b/include/configs/octeontx_common.h @@ -18,7 +18,6 @@ #include /* Extra environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ - "autoload=0\0" \ "loadaddr=0x20080000\0" \ "kernel_addr_r=0x02000000\0" \ "ramdisk_addr_r=0x03000000\0" \ diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 12e502cd364..ef55a621674 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -87,7 +87,6 @@ "nfsroot=${nfsrootpath} " \ "ip=${ipaddr}:${tftpserver}:${gatewayip}:${netmask}::eth0:off\0" \ "nfsrootpath=/opt/nfs-exports/omap\0" \ - "autoload=no\0" \ "fdtimage=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ "loadfdt=mmc rescan; " \ "load mmc ${mmcdev} ${fdtaddr} ${fdtimage}\0" \ diff --git a/include/configs/opos6uldev.h b/include/configs/opos6uldev.h index 73fe86f9bab..3e551e13aa6 100644 --- a/include/configs/opos6uldev.h +++ b/include/configs/opos6uldev.h @@ -31,7 +31,6 @@ /* LCD */ #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR -#define CONFIG_SYS_AUTOLOAD "no" #define CONFIG_ROOTPATH "/tftpboot/opos6ul-root" #endif /* __OPOS6ULDEV_CONFIG_H */ diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h index e360b166f55..bc4a59b3875 100644 --- a/include/configs/pcm052.h +++ b/include/configs/pcm052.h @@ -33,7 +33,6 @@ /* Extra env settings (including the target-defined ones if any) */ #define CONFIG_EXTRA_ENV_SETTINGS \ PCM052_EXTRA_ENV_SETTINGS \ - "autoload=no\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ "blimg_file=u-boot.vyb\0" \ diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index db8ff848285..d2d4296eed6 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -19,8 +19,6 @@ #define CONFIG_ROOTPATH "/opt/eldk" -#define CONFIG_SYS_AUTOLOAD "yes" - /* Clock Defines */ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index da6fb18c17a..b86b05b3193 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -41,9 +41,6 @@ /* misc settings */ -/* setting board specific options */ -#define CONFIG_SYS_AUTOLOAD "yes" - /* * SDRAM: 1 bank, 64 MB, base address 0x20000000 * Already initialized before u-boot gets started. diff --git a/include/configs/stm32mp15_common.h b/include/configs/stm32mp15_common.h index fc636beb3fc..1e14e91ea70 100644 --- a/include/configs/stm32mp15_common.h +++ b/include/configs/stm32mp15_common.h @@ -33,7 +33,6 @@ /* Ethernet need */ #ifdef CONFIG_DWC_ETH_QOS #define CONFIG_SERVERIP 192.168.1.1 -#define CONFIG_SYS_AUTOLOAD "no" #endif /*****************************************************************************/ diff --git a/include/env_default.h b/include/env_default.h index 7113e08e6b0..d1508b3ff44 100644 --- a/include/env_default.h +++ b/include/env_default.h @@ -59,8 +59,8 @@ const char default_environment[] = { #ifdef CONFIG_SERVERIP "serverip=" __stringify(CONFIG_SERVERIP) "\0" #endif -#ifdef CONFIG_SYS_AUTOLOAD - "autoload=" CONFIG_SYS_AUTOLOAD "\0" +#ifdef CONFIG_SYS_DISABLE_AUTOLOAD + "autoload=0\0" #endif #ifdef CONFIG_PREBOOT "preboot=" CONFIG_PREBOOT "\0" -- GitLab From a331017c237c7da159a1657984250d656ed1c487 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 13 Jun 2022 22:57:36 -0400 Subject: [PATCH 437/581] Complete migration of MTDPARTS_DEFAULT / MTDIDS_DEFAULT, include in environment - Ensure that everyone setting mtdids= and mtdparts= is doing so via the CONFIG options. - If the CONFIG options are set, ensure that the default environment sets mtdparts / mtdids. Signed-off-by: Tom Rini --- configs/aristainetos2c_defconfig | 2 ++ configs/aristainetos2ccslb_defconfig | 2 ++ configs/dockstar_defconfig | 1 + configs/ib62x0_defconfig | 1 + configs/iconnect_defconfig | 1 + configs/nas220_defconfig | 2 ++ configs/nsa310s_defconfig | 1 + configs/pogo_e02_defconfig | 2 ++ include/configs/am335x_evm.h | 2 -- include/configs/am335x_igep003x.h | 2 -- include/configs/am3517_evm.h | 2 -- include/configs/am43xx_evm.h | 2 -- include/configs/am65x_evm.h | 9 --------- include/configs/aristainetos2.h | 3 --- include/configs/at91sam9n12ek.h | 1 - include/configs/baltos.h | 2 -- include/configs/bk4r1.h | 1 - include/configs/brppt1.h | 2 -- include/configs/chiliboard.h | 2 -- include/configs/cm_fx6.h | 2 -- include/configs/cm_t335.h | 2 -- include/configs/colibri-imx6ull.h | 1 - include/configs/colibri_imx7.h | 1 - include/configs/colibri_t20.h | 1 - include/configs/colibri_vf.h | 1 - include/configs/dns325.h | 1 - include/configs/dockstar.h | 2 -- include/configs/goflexhome.h | 2 -- include/configs/guruplug.h | 1 - include/configs/gw_ventana.h | 2 -- include/configs/ib62x0.h | 2 -- include/configs/iconnect.h | 2 -- include/configs/ids8313.h | 2 -- include/configs/imx27lite-common.h | 2 -- include/configs/imx8mn_bsh_smm_s2.h | 2 -- include/configs/j721e_evm.h | 9 --------- include/configs/j721s2_evm.h | 9 --------- include/configs/km/keymile-common.h | 2 -- include/configs/ls1028aqds.h | 1 - include/configs/ls1028ardb.h | 1 - include/configs/ls1043a_common.h | 1 - include/configs/m53menlo.h | 2 -- include/configs/mccmon6.h | 1 - include/configs/mys_6ulx.h | 2 -- include/configs/nas220.h | 5 ----- include/configs/npi_imx6ull.h | 2 -- include/configs/nsa310s.h | 2 -- include/configs/omap3_evm.h | 2 -- include/configs/omap3_logic.h | 2 -- include/configs/pcl063.h | 2 -- include/configs/pcm052.h | 1 - include/configs/pcm058.h | 2 -- include/configs/phycore_am335x_r2.h | 2 -- include/configs/pm9261.h | 2 -- include/configs/pm9263.h | 2 -- include/configs/pogo_e02.h | 3 --- include/configs/pogo_v4.h | 2 -- include/configs/s5pc210_universal.h | 1 - include/configs/smartweb.h | 1 - include/configs/smdkc100.h | 1 - include/configs/socfpga_arria5_secu1.h | 2 -- include/configs/sunxi-common.h | 16 ---------------- include/configs/ti816x_evm.h | 4 +--- include/configs/ti_armv7_keystone2.h | 4 +--- include/configs/usb_a9263.h | 1 - include/configs/vcoreiii.h | 9 --------- include/env_default.h | 6 ++++++ 67 files changed, 20 insertions(+), 148 deletions(-) diff --git a/configs/aristainetos2c_defconfig b/configs/aristainetos2c_defconfig index 7a3e690ed66..26bcb00ff53 100644 --- a/configs/aristainetos2c_defconfig +++ b/configs/aristainetos2c_defconfig @@ -51,6 +51,8 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=spi0.0" +CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:832k(u-boot),64k(env),64k(env-red),-(ubi-nor)" CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_DTB_RESELECT=y diff --git a/configs/aristainetos2ccslb_defconfig b/configs/aristainetos2ccslb_defconfig index 6bc78b77329..682903082cb 100644 --- a/configs/aristainetos2ccslb_defconfig +++ b/configs/aristainetos2ccslb_defconfig @@ -51,6 +51,8 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=spi0.0" +CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:832k(u-boot),64k(env),64k(env-red),-(ubi-nor)" CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_DTB_RESELECT=y diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig index 3cb09ea4f7f..6f99cdd44b0 100644 --- a/configs/dockstar_defconfig +++ b/configs/dockstar_defconfig @@ -36,6 +36,7 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_CMD_JFFS2=y CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nand0=orion_nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:1m(uboot),-(root)" CONFIG_CMD_UBI=y CONFIG_ISO_PARTITION=y diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig index 4771e720c9b..6ed3d68cd9c 100644 --- a/configs/ib62x0_defconfig +++ b/configs/ib62x0_defconfig @@ -37,6 +37,7 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_CMD_JFFS2=y CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nand0=orion_nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0xe0000@0x0(uboot),0x20000@0xe0000(uboot_env),-@0x100000(root)" CONFIG_CMD_UBI=y CONFIG_ISO_PARTITION=y diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig index 644d0abd3aa..7adf76d7779 100644 --- a/configs/iconnect_defconfig +++ b/configs/iconnect_defconfig @@ -37,6 +37,7 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_CMD_JFFS2=y CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nand0=orion_nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0x80000@0x0(uboot),0x20000@0x80000(uboot_env),-@0xa0000(rootfs)" CONFIG_CMD_UBI=y CONFIG_ISO_PARTITION=y diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig index 99f36b72bf9..cc971f9b19a 100644 --- a/configs/nas220_defconfig +++ b/configs/nas220_defconfig @@ -38,6 +38,8 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_JFFS2=y CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nand0=orion_nand" +CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0xa0000@0x0(uboot),0x010000@0xa0000(env),0x500000@0xc0000(uimage),0x1a40000@0x5c0000(rootfs)" CONFIG_CMD_UBI=y CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig index 0c1d808f127..2b39ae74b31 100644 --- a/configs/nsa310s_defconfig +++ b/configs/nsa310s_defconfig @@ -39,6 +39,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_JFFS2=y CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nand0=orion_nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0xe0000@0x0(uboot),0x20000@0xe0000(uboot_env),0x100000@0x100000(second_stage_uboot),-@0x200000(root)" CONFIG_CMD_UBI=y CONFIG_ISO_PARTITION=y diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig index b7f9c12efcd..e1a2517eb63 100644 --- a/configs/pogo_e02_defconfig +++ b/configs/pogo_e02_defconfig @@ -35,6 +35,8 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_CMD_JFFS2=y CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nand0=orion_nand" +CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:1M(u-boot),4M(uImage),32M(rootfs),-(data)" CONFIG_CMD_UBI=y CONFIG_ISO_PARTITION=y CONFIG_OF_CONTROL=y diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 13d11084cd4..754bcc3304b 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -27,8 +27,6 @@ #ifdef CONFIG_MTD_RAW_NAND #define NANDARGS \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "nandargs=setenv bootargs console=${console} " \ "${optargs} " \ "root=${nandroot} " \ diff --git a/include/configs/am335x_igep003x.h b/include/configs/am335x_igep003x.h index 8d36ddeba59..3952783ee1a 100644 --- a/include/configs/am335x_igep003x.h +++ b/include/configs/am335x_igep003x.h @@ -54,8 +54,6 @@ "bootz ${loadaddr} - ${fdtaddr};" \ "fi;" \ "fi;\0" \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "nandroot=ubi0:rootfs rw ubi.mtd=1\0" \ "nandrootfstype=ubifs rootwait\0" \ "nandload=ubi part UBI; " \ diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index b896f962f08..e6c9039d166 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -49,8 +49,6 @@ "bootenv=uEnv.txt\0" \ "cmdline=\0" \ "optargs=\0" \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "mmcdev=0\0" \ "mmcpart=1\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index e3a01adae97..87d3a27099b 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -146,8 +146,6 @@ #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 26 #define NANDARGS \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "nandargs=setenv bootargs console=${console} " \ "${optargs} " \ "root=${nandroot} " \ diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h index 65b0a576a6f..d8f18d0b9ac 100644 --- a/include/configs/am65x_evm.h +++ b/include/configs/am65x_evm.h @@ -65,14 +65,6 @@ "0 /lib/firmware/am65x-mcu-r5f0_0-fw " \ "1 /lib/firmware/am65x-mcu-r5f0_1-fw " -#ifdef CONFIG_TARGET_AM654_A53_EVM -#define EXTRA_ENV_AM65X_BOARD_SETTINGS_MTD \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" -#else -#define EXTRA_ENV_AM65X_BOARD_SETTINGS_MTD -#endif - #define EXTRA_ENV_AM65X_BOARD_SETTINGS_UBI \ "init_ubi=run args_all args_ubi; sf probe; " \ "ubi part ospi.rootfs; ubifsmount ubi:rootfs;\0" \ @@ -104,7 +96,6 @@ DEFAULT_FIT_TI_ARGS \ EXTRA_ENV_AM65X_BOARD_SETTINGS \ EXTRA_ENV_AM65X_BOARD_SETTINGS_MMC \ - EXTRA_ENV_AM65X_BOARD_SETTINGS_MTD \ EXTRA_ENV_AM65X_BOARD_SETTINGS_UBI \ EXTRA_ENV_RPROC_SETTINGS \ EXTRA_ENV_DFUARGS \ diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index 0c44f7483bd..8997c6a0ea9 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -110,9 +110,6 @@ "splashpos=m,m\0" \ "console=" CONSOLE_DEV "\0" \ "emmcroot=/dev/mmcblk1p1 rootwait rw\0" \ - "mtdids=nor0=spi0.0\0" \ - "mtdparts=mtdparts=spi0.0:832k(u-boot),64k(env),64k(env-red)," \ - "-(ubi-nor)\0" \ "mk_fitfile_path=setenv fit_file /${sysnum}/system.itb\0" \ "mk_rescue_fitfile_path=setenv rescue_fit_file /${rescue_sysnum}/system.itb\0" \ "mk_uboot_path=setenv uboot /${sysnum}/u-boot.imx\0" \ diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index abcddc3cc9d..29affe7b5cd 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -36,7 +36,6 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ - "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \ "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\ "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0" diff --git a/include/configs/baltos.h b/include/configs/baltos.h index 1abda0836ab..25906e404b1 100644 --- a/include/configs/baltos.h +++ b/include/configs/baltos.h @@ -29,8 +29,6 @@ #ifdef CONFIG_MTD_RAW_NAND #define NANDARGS \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "nandargs=setenv bootargs console=${console} " \ "${optargs} " \ "${mtdparts} " \ diff --git a/include/configs/bk4r1.h b/include/configs/bk4r1.h index 5311dc4eff9..925a68787c9 100644 --- a/include/configs/bk4r1.h +++ b/include/configs/bk4r1.h @@ -80,7 +80,6 @@ "nfs_root=/path/to/nfs/root\0" \ "tftptimeout=1000\0" \ "tftptimeoutcountmax=1000000\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "ipaddr=192.168.0.60\0" \ "serverip=192.168.0.1\0" \ "bootargs_base=setenv bootargs rw " \ diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h index d7755b8cafa..c046fcb2bec 100644 --- a/include/configs/brppt1.h +++ b/include/configs/brppt1.h @@ -39,8 +39,6 @@ #ifdef CONFIG_MTD_RAW_NAND #define NANDTGTS \ -"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ -"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "cfgscr=mw ${dtbaddr} 0; nand read ${cfgaddr} cfgscr && source ${cfgaddr};" \ " fdt addr ${dtbaddr} || cp ${fdtcontroladdr} ${dtbaddr} 4000\0" \ "nandargs=setenv bootargs console=${console} ${optargs} ${optargs_rot} " \ diff --git a/include/configs/chiliboard.h b/include/configs/chiliboard.h index 8bad0f9ac4b..97adb835359 100644 --- a/include/configs/chiliboard.h +++ b/include/configs/chiliboard.h @@ -13,8 +13,6 @@ #define V_SCLK (V_OSCK) #define NANDARGS \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "nandargs=setenv bootargs console=${console} ${optargs} " \ "${mtdparts} " \ "root=${nandroot} " \ diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 3bb00a359f8..cbba7264400 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -53,8 +53,6 @@ "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \ "doboot=bootm ${kernel_addr_r}\0" \ "doloadfdt=false\0" \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "setboottypez=setenv kernel ${zImage};" \ "setenv doboot bootz ${kernel_addr_r} - ${fdt_addr_r};" \ "setenv doloadfdt true;\0" \ diff --git a/include/configs/cm_t335.h b/include/configs/cm_t335.h index b81c3af29f6..4baf7f7e24a 100644 --- a/include/configs/cm_t335.h +++ b/include/configs/cm_t335.h @@ -31,8 +31,6 @@ "bootm ${loadaddr}\0" #define NANDARGS \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "nandroot=ubi0:rootfs rw\0" \ "nandrootfstype=ubifs\0" \ "nandargs=setenv bootargs console=${console} " \ diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index bf020612837..528c7c98d23 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -65,7 +65,6 @@ #define DFU_ALT_NAND_INFO "imx6ull-bcb part 0,1;u-boot1 part 0,2;u-boot2 part 0,3;u-boot-env part 0,4;ubi partubi 0,5" #define MODULE_EXTRA_ENV_SETTINGS \ "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ UBI_BOOTCMD #else #define MODULE_EXTRA_ENV_SETTINGS "" diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index c8884e61b71..8a6536eec89 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -102,7 +102,6 @@ #if defined(CONFIG_TARGET_COLIBRI_IMX7_NAND) #define MODULE_EXTRA_ENV_SETTINGS \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ UBI_BOOTCMD #elif defined(CONFIG_TARGET_COLIBRI_IMX7_EMMC) #define MODULE_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index 1e6561dc281..73d18444215 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -25,7 +25,6 @@ /* Environment in NAND, 64K is a bit excessive but erase block is 512K anyway */ #define BOARD_EXTRA_ENV_SETTINGS \ "boot_script_dhcp=boot.scr\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ UBOOT_UPDATE #include "tegra-common-post.h" diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 7d2b7dece02..268afbb7fa3 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -68,7 +68,6 @@ "fdt_board=eval-v3\0" \ "fdt_fixup=;\0" \ "kernel_image=zImage\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "setsdupdate=mmc rescan && set interface mmc && " \ "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \ "source ${loadaddr}\0" \ diff --git a/include/configs/dns325.h b/include/configs/dns325.h index af2d3b6bcc3..015bc78648f 100644 --- a/include/configs/dns325.h +++ b/include/configs/dns325.h @@ -41,7 +41,6 @@ "stderr=serial\0" \ "loadaddr=0x800000\0" \ "console=ttyS0,115200\0" \ - "mtdparts="CONFIG_MTDPARTS_DEFAULT \ "optargs=\0" \ "bootenv=uEnv.txt\0" \ "importbootenv=echo Importing environment ...; " \ diff --git a/include/configs/dockstar.h b/include/configs/dockstar.h index 381a189149e..33ae7d654b0 100644 --- a/include/configs/dockstar.h +++ b/include/configs/dockstar.h @@ -24,8 +24,6 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ - "mtdids=nand0=orion_nand\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT \ "kernel=/boot/uImage\0" \ "initrd=/boot/uInitrd\0" \ "bootargs_root=ubi.mtd=1 root=ubi0:root rootfstype=ubifs ro\0" diff --git a/include/configs/goflexhome.h b/include/configs/goflexhome.h index d335a42e99c..66eed9e14f8 100644 --- a/include/configs/goflexhome.h +++ b/include/configs/goflexhome.h @@ -33,8 +33,6 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ - "mtdids=nand0=orion_nand\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT \ "kernel=/boot/uImage\0" \ "bootargs_root=ubi.mtd=root root=ubi0:root rootfstype=ubifs ro\0" diff --git a/include/configs/guruplug.h b/include/configs/guruplug.h index d5655e4ada6..4954c5ca080 100644 --- a/include/configs/guruplug.h +++ b/include/configs/guruplug.h @@ -26,7 +26,6 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ "mtdids=nand0=orion_nand\0" \ - "mtdparts="CONFIG_MTDPARTS_DEFAULT \ "kernel=/boot/zImage\0" \ "fdt=/boot/guruplug-server-plus.dtb\0" \ "bootargs_root=ubi.mtd=2 root=ubi0:rootfs rootfstype=ubifs rw\0" diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 251e360daa9..77f41502220 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -85,8 +85,6 @@ "hwconfig=_UNKNOWN_\0" \ "video=\0" \ \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ "disk=0\0" \ "part=1\0" \ \ diff --git a/include/configs/ib62x0.h b/include/configs/ib62x0.h index aff948cfe70..05192218d22 100644 --- a/include/configs/ib62x0.h +++ b/include/configs/ib62x0.h @@ -20,8 +20,6 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ - "mtdids=nand0=orion_nand\0" \ - "mtdparts="CONFIG_MTDPARTS_DEFAULT \ "kernel=/boot/zImage\0" \ "fdt=/boot/ib62x0.dtb\0" \ "bootargs_root=ubi.mtd=2 root=ubi0:rootfs rootfstype=ubifs rw\0" diff --git a/include/configs/iconnect.h b/include/configs/iconnect.h index cb4cf9beb74..f2e3608d3a3 100644 --- a/include/configs/iconnect.h +++ b/include/configs/iconnect.h @@ -13,8 +13,6 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ - "mtdids=nand0=orion_nand\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT \ "kernel=/boot/uImage\0" \ "bootargs_root=noinitrd ubi.mtd=2 root=ubi0:rootfs rootfstype=ubifs\0" diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h index aa6a471cc25..e0994d12baf 100644 --- a/include/configs/ids8313.h +++ b/include/configs/ids8313.h @@ -244,8 +244,6 @@ "${netmask}:${hostname}:${netdev}:off " \ "console=${console},${baudrate} ${othbootargs}\0" \ "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "\0" /* UBI Support */ diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h index 40c0f1fe36b..17430f15d13 100644 --- a/include/configs/imx27lite-common.h +++ b/include/configs/imx27lite-common.h @@ -132,8 +132,6 @@ " +${filesize};cp.b ${fileaddr} " \ __stringify(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \ "upd=run load update\0" \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ /* additions for new relocation code, must be added to all boards */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 diff --git a/include/configs/imx8mn_bsh_smm_s2.h b/include/configs/imx8mn_bsh_smm_s2.h index f7529783692..84c19824bdc 100644 --- a/include/configs/imx8mn_bsh_smm_s2.h +++ b/include/configs/imx8mn_bsh_smm_s2.h @@ -14,8 +14,6 @@ #include #define NANDARGS \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "nandargs=setenv bootargs console=${console} " \ "${optargs} " \ "root=${nandroot} " \ diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index c0b52558d81..ecf87647810 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -151,14 +151,6 @@ DFU_ALT_INFO_RAM \ DFU_ALT_INFO_OSPI -#if defined(CONFIG_TARGET_J721E_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM) -#define EXTRA_ENV_J721E_BOARD_SETTINGS_MTD \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" -#else -#define EXTRA_ENV_J721E_BOARD_SETTINGS_MTD -#endif - #if CONFIG_IS_ENABLED(CMD_PXE) # define BOOT_TARGET_PXE(func) func(PXE, pxe, na) #else @@ -189,7 +181,6 @@ EXTRA_ENV_RPROC_SETTINGS \ EXTRA_ENV_DFUARGS \ DEFAULT_UFS_TI_ARGS \ - EXTRA_ENV_J721E_BOARD_SETTINGS_MTD \ EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY \ BOOTENV diff --git a/include/configs/j721s2_evm.h b/include/configs/j721s2_evm.h index 8e3ea670d08..4c3a155a950 100644 --- a/include/configs/j721s2_evm.h +++ b/include/configs/j721s2_evm.h @@ -128,14 +128,6 @@ DFU_ALT_INFO_RAM \ DFU_ALT_INFO_OSPI -#if defined(CONFIG_TARGET_J721S2_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM) -#define EXTRA_ENV_J721S2_BOARD_SETTINGS_MTD \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" -#else -#define EXTRA_ENV_J721S2_BOARD_SETTINGS_MTD -#endif - /* Incorporate settings into the U-Boot environment */ #define CONFIG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ @@ -146,7 +138,6 @@ EXTRA_ENV_RPROC_SETTINGS \ EXTRA_ENV_DFUARGS \ DEFAULT_UFS_TI_ARGS \ - EXTRA_ENV_J721S2_BOARD_SETTINGS_MTD \ EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY /* Now for the remaining common defines */ diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h index 4bca1a78302..1bfc89bf44c 100644 --- a/include/configs/km/keymile-common.h +++ b/include/configs/km/keymile-common.h @@ -171,8 +171,6 @@ "init=/sbin/init-overlay.sh\0" \ "load_addr_r=" __stringify(CONFIG_KM_KERNEL_ADDR) "\0" \ "load=tftpboot ${load_addr_r} ${u-boot}\0" \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "" #endif /* CONFIG_KM_DEF_ENV */ diff --git a/include/configs/ls1028aqds.h b/include/configs/ls1028aqds.h index 52703632a7e..25391151866 100644 --- a/include/configs/ls1028aqds.h +++ b/include/configs/ls1028aqds.h @@ -87,7 +87,6 @@ "kernelhdr_addr_sd=0x3000\0" \ "kernelhdr_size_sd=0x10\0" \ "console=ttyS0,115200\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ BOOTENV \ "boot_scripts=ls1028aqds_boot.scr\0" \ "boot_script_hdr=hdr_ls1028aqds_bs.out\0" \ diff --git a/include/configs/ls1028ardb.h b/include/configs/ls1028ardb.h index 665723b1511..e7b2543b730 100644 --- a/include/configs/ls1028ardb.h +++ b/include/configs/ls1028ardb.h @@ -82,7 +82,6 @@ "kernelhdr_addr_sd=0x3000\0" \ "kernelhdr_size_sd=0x20\0" \ "console=ttyS0,115200\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ BOOTENV \ "boot_scripts=ls1028ardb_boot.scr\0" \ "boot_script_hdr=hdr_ls1028ardb_bs.out\0" \ diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 6e2c048fb12..8363969d557 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -167,7 +167,6 @@ "kernelhdr_size_sd=0x10\0" \ "console=ttyS0,115200\0" \ "boot_os=y\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ BOOTENV \ "boot_scripts=ls1043ardb_boot.scr\0" \ "boot_script_hdr=hdr_ls1043ardb_bs.out\0" \ diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 1533e57fa8c..b3348bc63bb 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -112,8 +112,6 @@ "mmcpart=1\0" \ "rootpath=/srv/\0" \ "kernel_addr_r=0x72000000\0" \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "netdev=eth0\0" \ "splashsource=mmc_fs\0" \ "splashfile=boot/usplash.bmp.gz\0" \ diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index 2c862e9ddcc..02a22351874 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -109,7 +109,6 @@ "fi;" \ "fi;" \ "fi\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "bootdev=1\0" \ "bootpart=1\0" \ "netdev=eth0\0" \ diff --git a/include/configs/mys_6ulx.h b/include/configs/mys_6ulx.h index f7dd31e5578..b9689238195 100644 --- a/include/configs/mys_6ulx.h +++ b/include/configs/mys_6ulx.h @@ -39,8 +39,6 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "console=ttymxc0,115200n8\0" \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "fdt_addr_r=0x82000000\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ diff --git a/include/configs/nas220.h b/include/configs/nas220.h index a8a905d4942..1b7eb343348 100644 --- a/include/configs/nas220.h +++ b/include/configs/nas220.h @@ -37,11 +37,6 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "bootargs=console=ttyS0,115200\0" \ - "mtdparts=mtdparts=orion_nand:0xa0000@0x0(uboot),"\ - "0x010000@0xa0000(env),"\ - "0x500000@0xc0000(uimage),"\ - "0x1a40000@0x5c0000(rootfs)\0" \ - "mtdids=nand0=orion_nand\0"\ "autostart=no\0" /* diff --git a/include/configs/npi_imx6ull.h b/include/configs/npi_imx6ull.h index 96f570af1d0..6cdb1afcd9a 100644 --- a/include/configs/npi_imx6ull.h +++ b/include/configs/npi_imx6ull.h @@ -48,8 +48,6 @@ "console=ttymxc0,115200n8\0" \ "image=zImage\0" \ "fdtfile=imx6ull-seeed-npi-dev-board.dtb\0" \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "fdt_addr_r=0x82000000\0" \ "kernel_addr_r=0x81000000\0" \ "pxefile_addr_r=0x87100000\0" \ diff --git a/include/configs/nsa310s.h b/include/configs/nsa310s.h index 46fd6e6e3b5..027a47b5a32 100644 --- a/include/configs/nsa310s.h +++ b/include/configs/nsa310s.h @@ -15,8 +15,6 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ - "mtdids=nand0=orion_nand\0" \ - "mtdparts="CONFIG_MTDPARTS_DEFAULT \ "kernel=/boot/zImage\0" \ "fdt=/boot/nsa310s.dtb\0" \ "bootargs_root=ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs rw\0" diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index 9c4e172d037..1b94f8efa22 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -76,8 +76,6 @@ DEFAULT_MMC_TI_ARGS \ DEFAULT_FIT_TI_ARGS \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "fdt_high=0xffffffff\0" \ "console=ttyO0,115200n8\0" \ "bootdir=/boot\0" \ diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index ef55a621674..38dc7ea88f7 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -35,8 +35,6 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "mmcdev=0\0" \ "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \ "mmcrootfstype=ext4 rootwait\0" \ diff --git a/include/configs/pcl063.h b/include/configs/pcl063.h index a07d3517ce2..6683f21d15d 100644 --- a/include/configs/pcl063.h +++ b/include/configs/pcl063.h @@ -51,8 +51,6 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "console=ttymxc0,115200n8\0" \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "fdt_addr_r=0x82000000\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h index bc4a59b3875..a8cfec96595 100644 --- a/include/configs/pcm052.h +++ b/include/configs/pcm052.h @@ -49,7 +49,6 @@ "nfs_root=/path/to/nfs/root\0" \ "tftptimeout=1000\0" \ "tftptimeoutcountmax=1000000\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "bootargs_base=setenv bootargs rw " \ " mem=" __stringify(CONFIG_PCM052_DDR_SIZE) "M " \ "console=ttyLP1,115200n8\0" \ diff --git a/include/configs/pcm058.h b/include/configs/pcm058.h index e87b6409bab..cff71df1c96 100644 --- a/include/configs/pcm058.h +++ b/include/configs/pcm058.h @@ -37,8 +37,6 @@ "mmcboot=run mmcloadfit;run mmcargs;bootm ${loadaddr}\0" #define ENV_NAND \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "nandroot=ubi0:root ubi.mtd=rootfs\0" \ "nandrootfstype=ubifs\0" \ "nandargs=setenv bootargs root=${nandroot} " \ diff --git a/include/configs/phycore_am335x_r2.h b/include/configs/phycore_am335x_r2.h index 7fa911620e1..f69d8adb91c 100644 --- a/include/configs/phycore_am335x_r2.h +++ b/include/configs/phycore_am335x_r2.h @@ -16,8 +16,6 @@ #ifdef CONFIG_MTD_RAW_NAND #define NANDARGS \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "nandargs=setenv bootargs console=${console} " \ "${optargs} " \ "root=${nandroot} " \ diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index 921f92bd012..bc15cdb4460 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -161,8 +161,6 @@ #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #define CONFIG_EXTRA_ENV_SETTINGS \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "partition=nand0,0\0" \ "ramargs=setenv bootargs $(bootargs) $(mtdparts)\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index c6b106c64cb..a0eed66b5ff 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -184,8 +184,6 @@ #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #define CONFIG_EXTRA_ENV_SETTINGS \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "partition=nand0,0\0" \ "ramargs=setenv bootargs $(bootargs) $(mtdparts)\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ diff --git a/include/configs/pogo_e02.h b/include/configs/pogo_e02.h index cb221501e26..085732214e5 100644 --- a/include/configs/pogo_e02.h +++ b/include/configs/pogo_e02.h @@ -19,9 +19,6 @@ */ #define CONFIG_EXTRA_ENV_SETTINGS \ - "mtdparts=mtdparts=orion_nand:1M(u-boot),4M(uImage)," \ - "32M(rootfs),-(data)\0"\ - "mtdids=nand0=orion_nand\0"\ "bootargs_console=console=ttyS0,115200\0" \ "bootcmd_usb=usb start; ext2load usb 0:1 0x00800000 /uImage; " \ "ext2load usb 0:1 0x01100000 /uInitrd\0" diff --git a/include/configs/pogo_v4.h b/include/configs/pogo_v4.h index 24cbf6b72ea..7fff78b7b5d 100644 --- a/include/configs/pogo_v4.h +++ b/include/configs/pogo_v4.h @@ -26,8 +26,6 @@ */ #define CONFIG_EXTRA_ENV_SETTINGS \ "dtb_file=/boot/dts/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"\ - "mtdids=nand0=orion_nand\0"\ "bootargs_console=console=ttyS0,115200\0" \ "bootcmd_usb=usb start; load usb 0:1 0x00800000 /boot/uImage; " \ "load usb 0:1 0x01100000 /boot/uInitrd; " \ diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 3b94b17ff78..ab4fe6b4602 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -75,7 +75,6 @@ "verify=n\0" \ "rootfstype=ext4\0" \ "console=console=ttySAC1,115200n8\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT \ "mbrparts=" MBRPARTS_DEFAULT \ "meminfo=crashkernel=32M@0x50000000\0" \ "nfsroot=/nfsroot/arm\0" \ diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index b86b05b3193..215c31bca41 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -92,7 +92,6 @@ \ "basicargs=console=ttyS0,115200\0" \ \ - "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" /* * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index 9a9f3fedff1..a7b0ce9f975 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -69,7 +69,6 @@ " console=ttySAC0,115200n8 mem=128M" \ " initrd=0x33000000,8M ramdisk=8192\0" \ "rootfstype=cramfs\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "meminfo=mem=128M\0" \ "nfsroot=/nfsroot/arm\0" \ "bootblock=5\0" \ diff --git a/include/configs/socfpga_arria5_secu1.h b/include/configs/socfpga_arria5_secu1.h index 3a77c71874d..2d654b42d56 100644 --- a/include/configs/socfpga_arria5_secu1.h +++ b/include/configs/socfpga_arria5_secu1.h @@ -66,8 +66,6 @@ "fdt_addr=" __stringify(CONFIG_KM_FDT_ADDR) "\0" \ "load=tftpboot ${loadaddr} u-boot-with-nand-spl.sfp\0" \ "loadaddr=" __stringify(CONFIG_KM_KERNEL_ADDR) "\0" \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "update=nand erase 0x0 0x00100000 && nand write ${loadaddr} 0x0 ${filesize}\0" \ "userload=ubi part nand.ubi &&" \ "ubi check rootfs$bootnum &&" \ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 1f77b7b2dfd..d52552c5fe7 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -317,20 +317,6 @@ "stderr=serial\0" #endif -#ifdef CONFIG_MTDIDS_DEFAULT -#define SUNXI_MTDIDS_DEFAULT \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" -#else -#define SUNXI_MTDIDS_DEFAULT -#endif - -#ifdef CONFIG_MTDPARTS_DEFAULT -#define SUNXI_MTDPARTS_DEFAULT \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" -#else -#define SUNXI_MTDPARTS_DEFAULT -#endif - #define PARTS_DEFAULT \ "name=loader1,start=8k,size=32k,uuid=${uuid_gpt_loader1};" \ "name=loader2,size=984k,uuid=${uuid_gpt_loader2};" \ @@ -362,8 +348,6 @@ DFU_ALT_INFO_RAM \ "fdtfile=" FDTFILE "\0" \ "console=ttyS0,115200\0" \ - SUNXI_MTDIDS_DEFAULT \ - SUNXI_MTDPARTS_DEFAULT \ "uuid_gpt_esp=" UUID_GPT_ESP "\0" \ "uuid_gpt_system=" UUID_GPT_SYSTEM "\0" \ "partitions=" PARTS_DEFAULT "\0" \ diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index fa5d91099e1..1aca83a9bce 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -13,9 +13,7 @@ #include #define CONFIG_EXTRA_ENV_SETTINGS \ - DEFAULT_LINUX_BOOT_ENV \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ + DEFAULT_LINUX_BOOT_ENV /* Clock Defines */ #define V_OSCK 24000000 /* Clock output from T2 */ diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 6952cc63719..bf76afaeded 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -184,9 +184,7 @@ "args_ramfs=setenv bootargs ${bootargs} " \ "rdinit=/sbin/init rw root=/dev/ram0 " \ "initrd=0x808080000,80M\0" \ - "no_post=1\0" \ - "mtdparts=mtdparts=davinci_nand.0:" \ - "1024k(bootloader)ro,512k(params)ro,-(ubifs)\0" + "no_post=1\0" /* Now for the remaining common defines */ #include diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h index 32e8f6be0d1..e432b04e9f5 100644 --- a/include/configs/usb_a9263.h +++ b/include/configs/usb_a9263.h @@ -55,6 +55,5 @@ /* bootstrap + u-boot + env + linux in dataflash on CS0 */ #define CONFIG_EXTRA_ENV_SETTINGS \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ #endif diff --git a/include/configs/vcoreiii.h b/include/configs/vcoreiii.h index 88c3061db63..43127ae649a 100644 --- a/include/configs/vcoreiii.h +++ b/include/configs/vcoreiii.h @@ -32,18 +32,9 @@ #error Unknown DDR size - please add! #endif -#if defined(CONFIG_MTDIDS_DEFAULT) && defined(CONFIG_MTDPARTS_DEFAULT) -#define VCOREIII_DEFAULT_MTD_ENV \ - "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \ - "mtdids="CONFIG_MTDIDS_DEFAULT"\0" -#else -#define VCOREIII_DEFAULT_MTD_ENV /* Go away */ -#endif - #define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */ #define CONFIG_EXTRA_ENV_SETTINGS \ - VCOREIII_DEFAULT_MTD_ENV \ "loadaddr=0x81000000\0" \ "spi_image_off=0x00100000\0" \ "console=ttyS0,115200\0" \ diff --git a/include/env_default.h b/include/env_default.h index d1508b3ff44..4e461c815a7 100644 --- a/include/env_default.h +++ b/include/env_default.h @@ -108,6 +108,12 @@ const char default_environment[] = { #if defined(CONFIG_BOOTCOUNT_BOOTLIMIT) && (CONFIG_BOOTCOUNT_BOOTLIMIT > 0) "bootlimit=" __stringify(CONFIG_BOOTCOUNT_BOOTLIMIT)"\0" #endif +#ifdef CONFIG_MTDIDS_DEFAULT + "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" +#endif +#ifdef CONFIG_MTDPARTS_DEFAULT + "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" +#endif #ifdef CONFIG_EXTRA_ENV_TEXT /* This is created in the Makefile */ CONFIG_EXTRA_ENV_TEXT -- GitLab From 613c326581fd96b55dd21e3a6d23e844e896832b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 13 Jun 2022 22:57:37 -0400 Subject: [PATCH 438/581] gw_ventana: Migrate to using CONFIG_EXTRA_ENV_TEXT Move the environment text over from being set via CONFIG_EXTRA_ENV_SETTINGS in include/configs/gw_ventana.h and over to plain text in board/gateworks/gw_ventana/gw_ventana.env. This lets us drop CONFIG_EXTRA_ENV_SETTINGS_COMMON as everything resides in a single environment file now. Cc: Tim Harvey Signed-off-by: Tom Rini Acked-by: Tim Harvey --- board/gateworks/gw_ventana/gw_ventana.env | 145 +++++++++++++++++++++ include/configs/gw_ventana.h | 148 ---------------------- 2 files changed, 145 insertions(+), 148 deletions(-) create mode 100644 board/gateworks/gw_ventana/gw_ventana.env diff --git a/board/gateworks/gw_ventana/gw_ventana.env b/board/gateworks/gw_ventana/gw_ventana.env new file mode 100644 index 00000000000..9a316c74f21 --- /dev/null +++ b/board/gateworks/gw_ventana/gw_ventana.env @@ -0,0 +1,145 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2013 Gateworks Corporation + */ + +splashpos=m,m +splashimage=CONFIG_SYS_LOAD_ADDR +usb_pgood_delay=2000 +console=ttymxc1 +bootdevs=usb mmc sata flash +hwconfig=_UNKNOWN_ + +disk=0 +part=1 + +fdt_high=0xffffffff +fdt_addr=0x18000000 +initrd_high=0xffffffff +fixfdt=fdt addr ${fdt_addr} +bootdir=boot +loadfdt= + if ${fsload} ${fdt_addr} ${bootdir}/${fdt_file}; then + echo Loaded DTB from ${bootdir}/${fdt_file}; + run fixfdt; + elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file1}; then + echo Loaded DTB from ${bootdir}/${fdt_file1}; + run fixfdt; + elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file2}; then + echo Loaded DTB from ${bootdir}/${fdt_file2}; + run fixfdt; + fi + +fs=ext4 +script=6x_bootscript-ventana +loadscript= + if ${fsload} ${loadaddr} ${bootdir}/${script}; then + source ${loadaddr}; + fi + +uimage=uImage +mmc_root=mmcblk0p1 +mmc_boot= + setenv fsload "${fs}load mmc ${disk}:${part}"; + mmc dev ${disk} && mmc rescan && + setenv dtype mmc; run loadscript; + if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then + setenv bootargs console=${console},${baudrate} + root=/dev/${mmc_root} rootfstype=${fs} + rootwait rw ${video} ${extra}; + if run loadfdt; then + bootm ${loadaddr} - ${fdt_addr}; + else + bootm; + fi; + fi + +sata_boot= + setenv fsload "${fs}load sata ${disk}:${part}"; + sata init && + setenv dtype sata; run loadscript; + if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then + setenv bootargs console=${console},${baudrate} + root=/dev/sda1 rootfstype=${fs} + rootwait rw ${video} ${extra}; + if run loadfdt; then + bootm ${loadaddr} - ${fdt_addr}; + else + bootm; + fi; + fi + +usb_boot= + setenv fsload "${fs}load usb ${disk}:${part}"; + usb start && usb dev ${disk} && + setenv dtype usb; run loadscript; + if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then + setenv bootargs console=${console},${baudrate} + root=/dev/sda1 rootfstype=${fs} + rootwait rw ${video} ${extra}; + if run loadfdt; then + bootm ${loadaddr} - ${fdt_addr}; + else + bootm; + fi; + fi + +#ifdef CONFIG_SPI_FLASH +image_os=ventana/openwrt-imx6-imx6q-gw5400-a-squashfs.bin +image_uboot=ventana/u-boot_spi.imx + +spi_koffset=0x90000 +spi_klen=0x200000 + +spi_updateuboot=echo Updating uboot from + ${serverip}:${image_uboot}...; + tftpboot ${loadaddr} ${image_uboot} && + sf probe && sf erase 0 80000 && + sf write ${loadaddr} 400 ${filesize} +spi_update=echo Updating OS from ${serverip}:${image_os} + to ${spi_koffset} ...; + tftp ${loadaddr} ${image_os} && + sf probe && + sf update ${loadaddr} ${spi_koffset} ${filesize} + +flash_boot= + if sf probe && + sf read ${loadaddr} ${spi_koffset} ${spi_klen}; then + setenv bootargs console=${console},${baudrate} + root=/dev/mtdblock3 + rootfstype=squashfs,jffs2 + ${video} ${extra}; + bootm; + fi +#else +image_rootfs=openwrt-imx6-ventana-rootfs.ubi +nand_update=echo Updating NAND from ${serverip}:${image_rootfs}...; + tftp ${loadaddr} ${image_rootfs} && + nand erase.part rootfs && + nand write ${loadaddr} rootfs ${filesize} + +flash_boot= + setenv fsload 'ubifsload'; + ubi part rootfs; + if ubi check boot; then + ubifsmount ubi0:boot; + setenv root ubi0:rootfs ubi.mtd=2 + rootfstype=squashfs,ubifs; + setenv bootdir; + elif ubi check rootfs; then + ubifsmount ubi0:rootfs; + setenv root ubi0:rootfs ubi.mtd=2 + rootfstype=ubifs; + fi; + setenv dtype nand; run loadscript; + if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then + setenv bootargs console=${console},${baudrate} + root=${root} ${video} ${extra}; + if run loadfdt; then + ubifsumount; + bootm ${loadaddr} - ${fdt_addr}; + else + ubifsumount; bootm; + fi; + fi +#endif diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 77f41502220..47a72fc8fce 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -76,152 +76,4 @@ #define CONFIG_IPADDR 192.168.1.1 #define CONFIG_SERVERIP 192.168.1.146 -#define CONFIG_EXTRA_ENV_SETTINGS_COMMON \ - "splashpos=m,m\0" \ - "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ - "usb_pgood_delay=2000\0" \ - "console=ttymxc1\0" \ - "bootdevs=usb mmc sata flash\0" \ - "hwconfig=_UNKNOWN_\0" \ - "video=\0" \ - \ - "disk=0\0" \ - "part=1\0" \ - \ - "fdt_high=0xffffffff\0" \ - "fdt_addr=0x18000000\0" \ - "initrd_high=0xffffffff\0" \ - "fixfdt=" \ - "fdt addr ${fdt_addr}\0" \ - "bootdir=boot\0" \ - "loadfdt=" \ - "if ${fsload} ${fdt_addr} ${bootdir}/${fdt_file}; then " \ - "echo Loaded DTB from ${bootdir}/${fdt_file}; " \ - "run fixfdt; " \ - "elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file1}; then " \ - "echo Loaded DTB from ${bootdir}/${fdt_file1}; " \ - "run fixfdt; " \ - "elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file2}; then " \ - "echo Loaded DTB from ${bootdir}/${fdt_file2}; " \ - "run fixfdt; " \ - "fi\0" \ - \ - "fs=ext4\0" \ - "script=6x_bootscript-ventana\0" \ - "loadscript=" \ - "if ${fsload} ${loadaddr} ${bootdir}/${script}; then " \ - "source ${loadaddr}; " \ - "fi\0" \ - \ - "uimage=uImage\0" \ - "mmc_root=mmcblk0p1\0" \ - "mmc_boot=" \ - "setenv fsload \"${fs}load mmc ${disk}:${part}\"; " \ - "mmc dev ${disk} && mmc rescan && " \ - "setenv dtype mmc; run loadscript; " \ - "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ - "setenv bootargs console=${console},${baudrate} " \ - "root=/dev/${mmc_root} rootfstype=${fs} " \ - "rootwait rw ${video} ${extra}; " \ - "if run loadfdt; then " \ - "bootm ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "bootm; " \ - "fi; " \ - "fi\0" \ - \ - "sata_boot=" \ - "setenv fsload \"${fs}load sata ${disk}:${part}\"; " \ - "sata init && " \ - "setenv dtype sata; run loadscript; " \ - "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ - "setenv bootargs console=${console},${baudrate} " \ - "root=/dev/sda1 rootfstype=${fs} " \ - "rootwait rw ${video} ${extra}; " \ - "if run loadfdt; then " \ - "bootm ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "bootm; " \ - "fi; " \ - "fi\0" \ - "usb_boot=" \ - "setenv fsload \"${fs}load usb ${disk}:${part}\"; " \ - "usb start && usb dev ${disk} && " \ - "setenv dtype usb; run loadscript; " \ - "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ - "setenv bootargs console=${console},${baudrate} " \ - "root=/dev/sda1 rootfstype=${fs} " \ - "rootwait rw ${video} ${extra}; " \ - "if run loadfdt; then " \ - "bootm ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "bootm; " \ - "fi; " \ - "fi\0" - -#ifdef CONFIG_SPI_FLASH - #define CONFIG_EXTRA_ENV_SETTINGS \ - CONFIG_EXTRA_ENV_SETTINGS_COMMON \ - "image_os=ventana/openwrt-imx6-imx6q-gw5400-a-squashfs.bin\0" \ - "image_uboot=ventana/u-boot_spi.imx\0" \ - \ - "spi_koffset=0x90000\0" \ - "spi_klen=0x200000\0" \ - \ - "spi_updateuboot=echo Updating uboot from " \ - "${serverip}:${image_uboot}...; " \ - "tftpboot ${loadaddr} ${image_uboot} && " \ - "sf probe && sf erase 0 80000 && " \ - "sf write ${loadaddr} 400 ${filesize}\0" \ - "spi_update=echo Updating OS from ${serverip}:${image_os} " \ - "to ${spi_koffset} ...; " \ - "tftp ${loadaddr} ${image_os} && " \ - "sf probe && " \ - "sf update ${loadaddr} ${spi_koffset} ${filesize}\0" \ - \ - "flash_boot=" \ - "if sf probe && " \ - "sf read ${loadaddr} ${spi_koffset} ${spi_klen}; then " \ - "setenv bootargs console=${console},${baudrate} " \ - "root=/dev/mtdblock3 " \ - "rootfstype=squashfs,jffs2 " \ - "${video} ${extra}; " \ - "bootm; " \ - "fi\0" -#else - #define CONFIG_EXTRA_ENV_SETTINGS \ - CONFIG_EXTRA_ENV_SETTINGS_COMMON \ - \ - "image_rootfs=openwrt-imx6-ventana-rootfs.ubi\0" \ - "nand_update=echo Updating NAND from ${serverip}:${image_rootfs}...; " \ - "tftp ${loadaddr} ${image_rootfs} && " \ - "nand erase.part rootfs && " \ - "nand write ${loadaddr} rootfs ${filesize}\0" \ - \ - "flash_boot=" \ - "setenv fsload 'ubifsload'; " \ - "ubi part rootfs; " \ - "if ubi check boot; then " \ - "ubifsmount ubi0:boot; " \ - "setenv root ubi0:rootfs ubi.mtd=2 " \ - "rootfstype=squashfs,ubifs; " \ - "setenv bootdir; " \ - "elif ubi check rootfs; then " \ - "ubifsmount ubi0:rootfs; " \ - "setenv root ubi0:rootfs ubi.mtd=2 " \ - "rootfstype=ubifs; " \ - "fi; " \ - "setenv dtype nand; run loadscript; " \ - "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ - "setenv bootargs console=${console},${baudrate} " \ - "root=${root} ${video} ${extra}; " \ - "if run loadfdt; then " \ - "ubifsumount; " \ - "bootm ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "ubifsumount; bootm; " \ - "fi; " \ - "fi\0" -#endif - #endif /* __CONFIG_H */ -- GitLab From baef13ec9d592a27b5d3bf03967bfd2bebd65157 Mon Sep 17 00:00:00 2001 From: Ashok Reddy Soma Date: Wed, 25 May 2022 10:47:12 +0530 Subject: [PATCH 439/581] mtd: spi-nor-ids: Add support for flashes tested by xilinx Add support for various flashes from below manufacturers which are tested by xilinx for years. EON: en25q128b GIGA: gd25lx256e ISSI: is25lp008 is25lp016 is25lp01g is25wp008 is25wp016 is25wp01g is25wx256 MACRONIX: mx25u51245f mx66u1g45g mx66l2g45g MICRON: mt35xl512aba mt35xu01g SPANSION: s70fs01gs_256k SST: sst26wf016b WINBOND: w25q16dw w25q16jv w25q512jv w25q32bv w25h02jv Signed-off-by: Ashok Reddy Soma Link: https://lore.kernel.org/r/1653455832-14763-1-git-send-email-ashok.reddy.soma@xilinx.com Signed-off-by: Michal Simek --- drivers/mtd/spi/spi-nor-ids.c | 37 +++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 20cd4d7fc9e..67278c40e35 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -82,6 +82,7 @@ const struct flash_info spi_nor_ids[] = { /* EON -- en25xxx */ { INFO("en25q32b", 0x1c3016, 0, 64 * 1024, 64, 0) }, { INFO("en25q64", 0x1c3017, 0, 64 * 1024, 128, SECT_4K) }, + { INFO("en25q128b", 0x1c3018, 0, 64 * 1024, 256, 0) }, { INFO("en25qh128", 0x1c7018, 0, 64 * 1024, 256, 0) }, { INFO("en25s64", 0x1c3817, 0, 64 * 1024, 128, SECT_4K) }, #endif @@ -127,11 +128,17 @@ const struct flash_info spi_nor_ids[] = { SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, + { + INFO("gd25lx256e", 0xc86819, 0, 64 * 1024, 512, + SECT_4K | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) + }, #endif #ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */ /* ISSI */ { INFO("is25lq040b", 0x9d4013, 0, 64 * 1024, 8, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("is25lp008", 0x9d6014, 0, 64 * 1024, 16, SPI_NOR_QUAD_READ) }, + { INFO("is25lp016", 0x9d6015, 0, 64 * 1024, 32, SPI_NOR_QUAD_READ) }, { INFO("is25lp032", 0x9d6016, 0, 64 * 1024, 64, 0) }, { INFO("is25lp064", 0x9d6017, 0, 64 * 1024, 128, 0) }, { INFO("is25lp128", 0x9d6018, 0, 64 * 1024, 256, @@ -140,6 +147,10 @@ const struct flash_info spi_nor_ids[] = { SECT_4K | SPI_NOR_DUAL_READ) }, { INFO("is25lp512", 0x9d601a, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("is25lp01g", 0x9d601b, 0, 64 * 1024, 2048, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("is25wp008", 0x9d7014, 0, 64 * 1024, 16, SPI_NOR_QUAD_READ) }, + { INFO("is25wp016", 0x9d7015, 0, 64 * 1024, 32, SPI_NOR_QUAD_READ) }, { INFO("is25wp032", 0x9d7016, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("is25wp064", 0x9d7017, 0, 64 * 1024, 128, @@ -151,6 +162,10 @@ const struct flash_info spi_nor_ids[] = { SPI_NOR_4B_OPCODES) }, { INFO("is25wp512", 0x9d701a, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("is25wp01g", 0x9d701b, 0, 64 * 1024, 2048, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("is25wx256", 0x9d5b19, 0, 128 * 1024, 256, + SECT_4K | USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) }, #endif #ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */ /* Macronix */ @@ -176,8 +191,11 @@ const struct flash_info spi_nor_ids[] = { { INFO("mx25l25655e", 0xc22619, 0, 64 * 1024, 512, 0) }, { INFO("mx66l51235l", 0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { INFO("mx66u51235f", 0xc2253a, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, + { INFO("mx25u51245f", 0xc2953a, 0, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, + { INFO("mx66u1g45g", 0xc2253b, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { INFO("mx66u2g45g", 0xc2253c, 0, 64 * 1024, 4096, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { INFO("mx66l1g45g", 0xc2201b, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("mx66l2g45g", 0xc2201c, 0, 64 * 1024, 4096, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { INFO("mx25l1633e", 0xc22415, 0, 64 * 1024, 32, SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | SECT_4K) }, { INFO("mx25r6435f", 0xc22817, 0, 64 * 1024, 128, SECT_4K) }, { INFO("mx66uw2g345g", 0xc2943c, 0, 64 * 1024, 4096, SECT_4K | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) }, @@ -208,8 +226,10 @@ const struct flash_info spi_nor_ids[] = { { INFO("mt25qu02g", 0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, { INFO("mt25ql02g", 0x20ba22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE | SPI_NOR_4B_OPCODES) }, #ifdef CONFIG_SPI_FLASH_MT35XU + { INFO("mt35xl512aba", 0x2c5a1a, 0, 128 * 1024, 512, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES | SPI_NOR_OCTAL_DTR_READ) }, { INFO("mt35xu512aba", 0x2c5b1a, 0, 128 * 1024, 512, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES | SPI_NOR_OCTAL_DTR_READ) }, #endif /* CONFIG_SPI_FLASH_MT35XU */ + { INFO6("mt35xu01g", 0x2c5b1b, 0x104100, 128 * 1024, 1024, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) }, { INFO("mt35xu02g", 0x2c5b1c, 0, 128 * 1024, 2048, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) }, #endif #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */ @@ -225,6 +245,7 @@ const struct flash_info spi_nor_ids[] = { { INFO("s25fl512s_256k", 0x010220, 0x4d00, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) }, { INFO("s25fl512s_64k", 0x010220, 0x4d01, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) }, { INFO("s25fl512s_512k", 0x010220, 0x4f00, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) }, + { INFO("s70fs01gs_256k", 0x010221, 0x4d00, 256 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("s25sl12800", 0x012018, 0x0300, 256 * 1024, 64, 0) }, { INFO("s25sl12801", 0x012018, 0x0301, 64 * 1024, 256, 0) }, { INFO6("s25fl128s", 0x012018, 0x4d0180, 64 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) }, @@ -275,6 +296,7 @@ const struct flash_info spi_nor_ids[] = { { INFO("sst25wf040", 0xbf2504, 0, 64 * 1024, 8, SECT_4K | SST_WRITE) }, { INFO("sst25wf080", 0xbf2505, 0, 64 * 1024, 16, SECT_4K | SST_WRITE) }, { INFO("sst26vf064b", 0xbf2643, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_HAS_SST26LOCK | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("sst26wf016b", 0xbf2641, 0, 64 * 1024, 32, SECT_4K) }, { INFO("sst26wf016", 0xbf2651, 0, 64 * 1024, 32, SECT_4K | SPI_NOR_HAS_SST26LOCK) }, { INFO("sst26wf032", 0xbf2622, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_HAS_SST26LOCK) }, { INFO("sst26wf064", 0xbf2643, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_HAS_SST26LOCK) }, @@ -311,11 +333,19 @@ const struct flash_info spi_nor_ids[] = { { INFO("w25q20bw", 0xef5012, 0, 64 * 1024, 4, SECT_4K) }, { INFO("w25q20ew", 0xef6012, 0, 64 * 1024, 4, SECT_4K) }, { INFO("w25q32", 0xef4016, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { + INFO("w25q16dw", 0xef6015, 0, 64 * 1024, 32, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) + }, { INFO("w25q32dw", 0xef6016, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, + { + INFO("w25q16jv", 0xef7015, 0, 64 * 1024, 32, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) + }, { INFO("w25q32jv", 0xef7016, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | @@ -362,6 +392,11 @@ const struct flash_info spi_nor_ids[] = { SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, + { + INFO("w25q512jv", 0xef7119, 0, 64 * 1024, 512, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) + }, { INFO("w25q01jv", 0xef4021, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | @@ -370,6 +405,7 @@ const struct flash_info spi_nor_ids[] = { { INFO("w25q80", 0xef5014, 0, 64 * 1024, 16, SECT_4K) }, { INFO("w25q80bl", 0xef4014, 0, 64 * 1024, 16, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("w25q16cl", 0xef4015, 0, 64 * 1024, 32, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("w25q32bv", 0xef4016, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("w25q64cv", 0xef4017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("w25q128", 0xef4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | @@ -378,6 +414,7 @@ const struct flash_info spi_nor_ids[] = { { INFO("w25q256", 0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("w25m512jw", 0xef6119, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("w25m512jv", 0xef7119, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("w25h02jv", 0xef9022, 0, 64 * 1024, 4096, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, #endif #ifdef CONFIG_SPI_FLASH_XMC /* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */ -- GitLab From 1e2b8139d95ea924d645886b323be7748579a6d1 Mon Sep 17 00:00:00 2001 From: T Karthik Reddy Date: Thu, 12 May 2022 04:05:31 -0600 Subject: [PATCH 440/581] spi: cadence-qspi: move cadence qspi macros to header file Move all the cadence macros from cadence_qspi_apb.c to cadence_qspi.h file. Signed-off-by: T Karthik Reddy Signed-off-by: Ashok Reddy Soma Link: https://lore.kernel.org/r/20220512100535.16364-2-ashok.reddy.soma@xilinx.com Signed-off-by: Michal Simek --- drivers/spi/cadence_qspi.h | 182 +++++++++++++++++++++++++++++++++ drivers/spi/cadence_qspi_apb.c | 151 --------------------------- 2 files changed, 182 insertions(+), 151 deletions(-) diff --git a/drivers/spi/cadence_qspi.h b/drivers/spi/cadence_qspi.h index a2b620a5fe2..4c2148136b5 100644 --- a/drivers/spi/cadence_qspi.h +++ b/drivers/spi/cadence_qspi.h @@ -8,6 +8,8 @@ #define __CADENCE_QSPI_H__ #include +#include +#include #define CQSPI_IS_ADDR(cmd_len) (cmd_len > 1 ? 1 : 0) @@ -15,6 +17,186 @@ #define CQSPI_DECODER_MAX_CS 16 #define CQSPI_READ_CAPTURE_MAX_DELAY 16 +#define CQSPI_REG_POLL_US 1 /* 1us */ +#define CQSPI_REG_RETRY 10000 +#define CQSPI_POLL_IDLE_RETRY 3 + +/* Transfer mode */ +#define CQSPI_INST_TYPE_SINGLE 0 +#define CQSPI_INST_TYPE_DUAL 1 +#define CQSPI_INST_TYPE_QUAD 2 +#define CQSPI_INST_TYPE_OCTAL 3 + +#define CQSPI_STIG_DATA_LEN_MAX 8 + +#define CQSPI_DUMMY_CLKS_PER_BYTE 8 +#define CQSPI_DUMMY_BYTES_MAX 4 +#define CQSPI_DUMMY_CLKS_MAX 31 + +/**************************************************************************** + * Controller's configuration and status register (offset from QSPI_BASE) + ****************************************************************************/ +#define CQSPI_REG_CONFIG 0x00 +#define CQSPI_REG_CONFIG_ENABLE BIT(0) +#define CQSPI_REG_CONFIG_CLK_POL BIT(1) +#define CQSPI_REG_CONFIG_CLK_PHA BIT(2) +#define CQSPI_REG_CONFIG_PHY_ENABLE_MASK BIT(3) +#define CQSPI_REG_CONFIG_DIRECT BIT(7) +#define CQSPI_REG_CONFIG_DECODE BIT(9) +#define CQSPI_REG_CONFIG_ENBL_DMA BIT(15) +#define CQSPI_REG_CONFIG_XIP_IMM BIT(18) +#define CQSPI_REG_CONFIG_DTR_PROT_EN_MASK BIT(24) +#define CQSPI_REG_CONFIG_CHIPSELECT_LSB 10 +#define CQSPI_REG_CONFIG_BAUD_LSB 19 +#define CQSPI_REG_CONFIG_DTR_PROTO BIT(24) +#define CQSPI_REG_CONFIG_DUAL_OPCODE BIT(30) +#define CQSPI_REG_CONFIG_IDLE_LSB 31 +#define CQSPI_REG_CONFIG_CHIPSELECT_MASK 0xF +#define CQSPI_REG_CONFIG_BAUD_MASK 0xF + +#define CQSPI_REG_RD_INSTR 0x04 +#define CQSPI_REG_RD_INSTR_OPCODE_LSB 0 +#define CQSPI_REG_RD_INSTR_TYPE_INSTR_LSB 8 +#define CQSPI_REG_RD_INSTR_TYPE_ADDR_LSB 12 +#define CQSPI_REG_RD_INSTR_TYPE_DATA_LSB 16 +#define CQSPI_REG_RD_INSTR_MODE_EN_LSB 20 +#define CQSPI_REG_RD_INSTR_DUMMY_LSB 24 +#define CQSPI_REG_RD_INSTR_TYPE_INSTR_MASK 0x3 +#define CQSPI_REG_RD_INSTR_TYPE_ADDR_MASK 0x3 +#define CQSPI_REG_RD_INSTR_TYPE_DATA_MASK 0x3 +#define CQSPI_REG_RD_INSTR_DUMMY_MASK 0x1F + +#define CQSPI_REG_WR_INSTR 0x08 +#define CQSPI_REG_WR_INSTR_OPCODE_LSB 0 +#define CQSPI_REG_WR_INSTR_TYPE_ADDR_LSB 12 +#define CQSPI_REG_WR_INSTR_TYPE_DATA_LSB 16 + +#define CQSPI_REG_DELAY 0x0C +#define CQSPI_REG_DELAY_TSLCH_LSB 0 +#define CQSPI_REG_DELAY_TCHSH_LSB 8 +#define CQSPI_REG_DELAY_TSD2D_LSB 16 +#define CQSPI_REG_DELAY_TSHSL_LSB 24 +#define CQSPI_REG_DELAY_TSLCH_MASK 0xFF +#define CQSPI_REG_DELAY_TCHSH_MASK 0xFF +#define CQSPI_REG_DELAY_TSD2D_MASK 0xFF +#define CQSPI_REG_DELAY_TSHSL_MASK 0xFF + +#define CQSPI_REG_RD_DATA_CAPTURE 0x10 +#define CQSPI_REG_RD_DATA_CAPTURE_BYPASS BIT(0) +#define CQSPI_REG_READCAPTURE_DQS_ENABLE BIT(8) +#define CQSPI_REG_RD_DATA_CAPTURE_DELAY_LSB 1 +#define CQSPI_REG_RD_DATA_CAPTURE_DELAY_MASK 0xF + +#define CQSPI_REG_SIZE 0x14 +#define CQSPI_REG_SIZE_ADDRESS_LSB 0 +#define CQSPI_REG_SIZE_PAGE_LSB 4 +#define CQSPI_REG_SIZE_BLOCK_LSB 16 +#define CQSPI_REG_SIZE_ADDRESS_MASK 0xF +#define CQSPI_REG_SIZE_PAGE_MASK 0xFFF +#define CQSPI_REG_SIZE_BLOCK_MASK 0x3F + +#define CQSPI_REG_SRAMPARTITION 0x18 +#define CQSPI_REG_INDIRECTTRIGGER 0x1C + +#define CQSPI_REG_REMAP 0x24 +#define CQSPI_REG_MODE_BIT 0x28 + +#define CQSPI_REG_SDRAMLEVEL 0x2C +#define CQSPI_REG_SDRAMLEVEL_RD_LSB 0 +#define CQSPI_REG_SDRAMLEVEL_WR_LSB 16 +#define CQSPI_REG_SDRAMLEVEL_RD_MASK 0xFFFF +#define CQSPI_REG_SDRAMLEVEL_WR_MASK 0xFFFF + +#define CQSPI_REG_WR_COMPLETION_CTRL 0x38 +#define CQSPI_REG_WR_DISABLE_AUTO_POLL BIT(14) + +#define CQSPI_REG_IRQSTATUS 0x40 +#define CQSPI_REG_IRQMASK 0x44 + +#define CQSPI_REG_INDIRECTRD 0x60 +#define CQSPI_REG_INDIRECTRD_START BIT(0) +#define CQSPI_REG_INDIRECTRD_CANCEL BIT(1) +#define CQSPI_REG_INDIRECTRD_INPROGRESS BIT(2) +#define CQSPI_REG_INDIRECTRD_DONE BIT(5) + +#define CQSPI_REG_INDIRECTRDWATERMARK 0x64 +#define CQSPI_REG_INDIRECTRDSTARTADDR 0x68 +#define CQSPI_REG_INDIRECTRDBYTES 0x6C + +#define CQSPI_REG_CMDCTRL 0x90 +#define CQSPI_REG_CMDCTRL_EXECUTE BIT(0) +#define CQSPI_REG_CMDCTRL_INPROGRESS BIT(1) +#define CQSPI_REG_CMDCTRL_DUMMY_LSB 7 +#define CQSPI_REG_CMDCTRL_WR_BYTES_LSB 12 +#define CQSPI_REG_CMDCTRL_WR_EN_LSB 15 +#define CQSPI_REG_CMDCTRL_ADD_BYTES_LSB 16 +#define CQSPI_REG_CMDCTRL_ADDR_EN_LSB 19 +#define CQSPI_REG_CMDCTRL_RD_BYTES_LSB 20 +#define CQSPI_REG_CMDCTRL_RD_EN_LSB 23 +#define CQSPI_REG_CMDCTRL_OPCODE_LSB 24 +#define CQSPI_REG_CMDCTRL_DUMMY_MASK 0x1F +#define CQSPI_REG_CMDCTRL_WR_BYTES_MASK 0x7 +#define CQSPI_REG_CMDCTRL_ADD_BYTES_MASK 0x3 +#define CQSPI_REG_CMDCTRL_RD_BYTES_MASK 0x7 +#define CQSPI_REG_CMDCTRL_OPCODE_MASK 0xFF + +#define CQSPI_REG_INDIRECTWR 0x70 +#define CQSPI_REG_INDIRECTWR_START BIT(0) +#define CQSPI_REG_INDIRECTWR_CANCEL BIT(1) +#define CQSPI_REG_INDIRECTWR_INPROGRESS BIT(2) +#define CQSPI_REG_INDIRECTWR_DONE BIT(5) + +#define CQSPI_REG_INDIRECTWRWATERMARK 0x74 +#define CQSPI_REG_INDIRECTWRSTARTADDR 0x78 +#define CQSPI_REG_INDIRECTWRBYTES 0x7C + +#define CQSPI_REG_CMDADDRESS 0x94 +#define CQSPI_REG_CMDREADDATALOWER 0xA0 +#define CQSPI_REG_CMDREADDATAUPPER 0xA4 +#define CQSPI_REG_CMDWRITEDATALOWER 0xA8 +#define CQSPI_REG_CMDWRITEDATAUPPER 0xAC + +#define CQSPI_REG_OP_EXT_LOWER 0xE0 +#define CQSPI_REG_OP_EXT_READ_LSB 24 +#define CQSPI_REG_OP_EXT_WRITE_LSB 16 +#define CQSPI_REG_OP_EXT_STIG_LSB 0 + +#define CQSPI_REG_PHY_CONFIG 0xB4 +#define CQSPI_REG_PHY_CONFIG_RESET_FLD_MASK 0x40000000 + +#define CQSPI_DMA_DST_ADDR_REG 0x1800 +#define CQSPI_DMA_DST_SIZE_REG 0x1804 +#define CQSPI_DMA_DST_STS_REG 0x1808 +#define CQSPI_DMA_DST_CTRL_REG 0x180C +#define CQSPI_DMA_DST_I_STS_REG 0x1814 +#define CQSPI_DMA_DST_I_ENBL_REG 0x1818 +#define CQSPI_DMA_DST_I_DISBL_REG 0x181C +#define CQSPI_DMA_DST_CTRL2_REG 0x1824 +#define CQSPI_DMA_DST_ADDR_MSB_REG 0x1828 + +#define CQSPI_DMA_SRC_RD_ADDR_REG 0x1000 + +#define CQSPI_REG_DMA_PERIPH_CFG 0x20 +#define CQSPI_REG_INDIR_TRIG_ADDR_RANGE 0x80 +#define CQSPI_DFLT_INDIR_TRIG_ADDR_RANGE 6 +#define CQSPI_DFLT_DMA_PERIPH_CFG 0x602 +#define CQSPI_DFLT_DST_CTRL_REG_VAL 0xF43FFA00 + +#define CQSPI_DMA_DST_I_STS_DONE BIT(1) +#define CQSPI_DMA_TIMEOUT 10000000 + +#define CQSPI_REG_IS_IDLE(base) \ + ((readl((base) + CQSPI_REG_CONFIG) >> \ + CQSPI_REG_CONFIG_IDLE_LSB) & 0x1) + +#define CQSPI_GET_RD_SRAM_LEVEL(reg_base) \ + (((readl((reg_base) + CQSPI_REG_SDRAMLEVEL)) >> \ + CQSPI_REG_SDRAMLEVEL_RD_LSB) & CQSPI_REG_SDRAMLEVEL_RD_MASK) + +#define CQSPI_GET_WR_SRAM_LEVEL(reg_base) \ + (((readl((reg_base) + CQSPI_REG_SDRAMLEVEL)) >> \ + CQSPI_REG_SDRAMLEVEL_WR_LSB) & CQSPI_REG_SDRAMLEVEL_WR_MASK) + struct cadence_spi_plat { unsigned int ref_clk_hz; unsigned int max_hz; diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index 2cdf4c9c9f8..ac8b1bef7fd 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -38,157 +38,6 @@ #include #include "cadence_qspi.h" -#define CQSPI_REG_POLL_US 1 /* 1us */ -#define CQSPI_REG_RETRY 10000 -#define CQSPI_POLL_IDLE_RETRY 3 - -/* Transfer mode */ -#define CQSPI_INST_TYPE_SINGLE 0 -#define CQSPI_INST_TYPE_DUAL 1 -#define CQSPI_INST_TYPE_QUAD 2 -#define CQSPI_INST_TYPE_OCTAL 3 - -#define CQSPI_STIG_DATA_LEN_MAX 8 - -#define CQSPI_DUMMY_CLKS_PER_BYTE 8 -#define CQSPI_DUMMY_CLKS_MAX 31 - -/**************************************************************************** - * Controller's configuration and status register (offset from QSPI_BASE) - ****************************************************************************/ -#define CQSPI_REG_CONFIG 0x00 -#define CQSPI_REG_CONFIG_ENABLE BIT(0) -#define CQSPI_REG_CONFIG_CLK_POL BIT(1) -#define CQSPI_REG_CONFIG_CLK_PHA BIT(2) -#define CQSPI_REG_CONFIG_DIRECT BIT(7) -#define CQSPI_REG_CONFIG_DECODE BIT(9) -#define CQSPI_REG_CONFIG_XIP_IMM BIT(18) -#define CQSPI_REG_CONFIG_CHIPSELECT_LSB 10 -#define CQSPI_REG_CONFIG_BAUD_LSB 19 -#define CQSPI_REG_CONFIG_DTR_PROTO BIT(24) -#define CQSPI_REG_CONFIG_DUAL_OPCODE BIT(30) -#define CQSPI_REG_CONFIG_IDLE_LSB 31 -#define CQSPI_REG_CONFIG_CHIPSELECT_MASK 0xF -#define CQSPI_REG_CONFIG_BAUD_MASK 0xF - -#define CQSPI_REG_RD_INSTR 0x04 -#define CQSPI_REG_RD_INSTR_OPCODE_LSB 0 -#define CQSPI_REG_RD_INSTR_TYPE_INSTR_LSB 8 -#define CQSPI_REG_RD_INSTR_TYPE_ADDR_LSB 12 -#define CQSPI_REG_RD_INSTR_TYPE_DATA_LSB 16 -#define CQSPI_REG_RD_INSTR_MODE_EN_LSB 20 -#define CQSPI_REG_RD_INSTR_DUMMY_LSB 24 -#define CQSPI_REG_RD_INSTR_TYPE_INSTR_MASK 0x3 -#define CQSPI_REG_RD_INSTR_TYPE_ADDR_MASK 0x3 -#define CQSPI_REG_RD_INSTR_TYPE_DATA_MASK 0x3 -#define CQSPI_REG_RD_INSTR_DUMMY_MASK 0x1F - -#define CQSPI_REG_WR_INSTR 0x08 -#define CQSPI_REG_WR_INSTR_OPCODE_LSB 0 -#define CQSPI_REG_WR_INSTR_TYPE_ADDR_LSB 12 -#define CQSPI_REG_WR_INSTR_TYPE_DATA_LSB 16 - -#define CQSPI_REG_DELAY 0x0C -#define CQSPI_REG_DELAY_TSLCH_LSB 0 -#define CQSPI_REG_DELAY_TCHSH_LSB 8 -#define CQSPI_REG_DELAY_TSD2D_LSB 16 -#define CQSPI_REG_DELAY_TSHSL_LSB 24 -#define CQSPI_REG_DELAY_TSLCH_MASK 0xFF -#define CQSPI_REG_DELAY_TCHSH_MASK 0xFF -#define CQSPI_REG_DELAY_TSD2D_MASK 0xFF -#define CQSPI_REG_DELAY_TSHSL_MASK 0xFF - -#define CQSPI_REG_RD_DATA_CAPTURE 0x10 -#define CQSPI_REG_RD_DATA_CAPTURE_BYPASS BIT(0) -#define CQSPI_REG_RD_DATA_CAPTURE_DELAY_LSB 1 -#define CQSPI_REG_RD_DATA_CAPTURE_DELAY_MASK 0xF - -#define CQSPI_REG_SIZE 0x14 -#define CQSPI_REG_SIZE_ADDRESS_LSB 0 -#define CQSPI_REG_SIZE_PAGE_LSB 4 -#define CQSPI_REG_SIZE_BLOCK_LSB 16 -#define CQSPI_REG_SIZE_ADDRESS_MASK 0xF -#define CQSPI_REG_SIZE_PAGE_MASK 0xFFF -#define CQSPI_REG_SIZE_BLOCK_MASK 0x3F - -#define CQSPI_REG_SRAMPARTITION 0x18 -#define CQSPI_REG_INDIRECTTRIGGER 0x1C - -#define CQSPI_REG_REMAP 0x24 -#define CQSPI_REG_MODE_BIT 0x28 - -#define CQSPI_REG_SDRAMLEVEL 0x2C -#define CQSPI_REG_SDRAMLEVEL_RD_LSB 0 -#define CQSPI_REG_SDRAMLEVEL_WR_LSB 16 -#define CQSPI_REG_SDRAMLEVEL_RD_MASK 0xFFFF -#define CQSPI_REG_SDRAMLEVEL_WR_MASK 0xFFFF - -#define CQSPI_REG_WR_COMPLETION_CTRL 0x38 -#define CQSPI_REG_WR_DISABLE_AUTO_POLL BIT(14) - -#define CQSPI_REG_IRQSTATUS 0x40 -#define CQSPI_REG_IRQMASK 0x44 - -#define CQSPI_REG_INDIRECTRD 0x60 -#define CQSPI_REG_INDIRECTRD_START BIT(0) -#define CQSPI_REG_INDIRECTRD_CANCEL BIT(1) -#define CQSPI_REG_INDIRECTRD_INPROGRESS BIT(2) -#define CQSPI_REG_INDIRECTRD_DONE BIT(5) - -#define CQSPI_REG_INDIRECTRDWATERMARK 0x64 -#define CQSPI_REG_INDIRECTRDSTARTADDR 0x68 -#define CQSPI_REG_INDIRECTRDBYTES 0x6C - -#define CQSPI_REG_CMDCTRL 0x90 -#define CQSPI_REG_CMDCTRL_EXECUTE BIT(0) -#define CQSPI_REG_CMDCTRL_INPROGRESS BIT(1) -#define CQSPI_REG_CMDCTRL_DUMMY_LSB 7 -#define CQSPI_REG_CMDCTRL_WR_BYTES_LSB 12 -#define CQSPI_REG_CMDCTRL_WR_EN_LSB 15 -#define CQSPI_REG_CMDCTRL_ADD_BYTES_LSB 16 -#define CQSPI_REG_CMDCTRL_ADDR_EN_LSB 19 -#define CQSPI_REG_CMDCTRL_RD_BYTES_LSB 20 -#define CQSPI_REG_CMDCTRL_RD_EN_LSB 23 -#define CQSPI_REG_CMDCTRL_OPCODE_LSB 24 -#define CQSPI_REG_CMDCTRL_DUMMY_MASK 0x1F -#define CQSPI_REG_CMDCTRL_WR_BYTES_MASK 0x7 -#define CQSPI_REG_CMDCTRL_ADD_BYTES_MASK 0x3 -#define CQSPI_REG_CMDCTRL_RD_BYTES_MASK 0x7 -#define CQSPI_REG_CMDCTRL_OPCODE_MASK 0xFF - -#define CQSPI_REG_INDIRECTWR 0x70 -#define CQSPI_REG_INDIRECTWR_START BIT(0) -#define CQSPI_REG_INDIRECTWR_CANCEL BIT(1) -#define CQSPI_REG_INDIRECTWR_INPROGRESS BIT(2) -#define CQSPI_REG_INDIRECTWR_DONE BIT(5) - -#define CQSPI_REG_INDIRECTWRWATERMARK 0x74 -#define CQSPI_REG_INDIRECTWRSTARTADDR 0x78 -#define CQSPI_REG_INDIRECTWRBYTES 0x7C - -#define CQSPI_REG_CMDADDRESS 0x94 -#define CQSPI_REG_CMDREADDATALOWER 0xA0 -#define CQSPI_REG_CMDREADDATAUPPER 0xA4 -#define CQSPI_REG_CMDWRITEDATALOWER 0xA8 -#define CQSPI_REG_CMDWRITEDATAUPPER 0xAC - -#define CQSPI_REG_OP_EXT_LOWER 0xE0 -#define CQSPI_REG_OP_EXT_READ_LSB 24 -#define CQSPI_REG_OP_EXT_WRITE_LSB 16 -#define CQSPI_REG_OP_EXT_STIG_LSB 0 - -#define CQSPI_REG_IS_IDLE(base) \ - ((readl(base + CQSPI_REG_CONFIG) >> \ - CQSPI_REG_CONFIG_IDLE_LSB) & 0x1) - -#define CQSPI_GET_RD_SRAM_LEVEL(reg_base) \ - (((readl(reg_base + CQSPI_REG_SDRAMLEVEL)) >> \ - CQSPI_REG_SDRAMLEVEL_RD_LSB) & CQSPI_REG_SDRAMLEVEL_RD_MASK) - -#define CQSPI_GET_WR_SRAM_LEVEL(reg_base) \ - (((readl(reg_base + CQSPI_REG_SDRAMLEVEL)) >> \ - CQSPI_REG_SDRAMLEVEL_WR_LSB) & CQSPI_REG_SDRAMLEVEL_WR_MASK) - void cadence_qspi_apb_controller_enable(void *reg_base) { unsigned int reg; -- GitLab From cf553bf20e51951110f88501577c7fe8bbf68386 Mon Sep 17 00:00:00 2001 From: T Karthik Reddy Date: Thu, 12 May 2022 04:05:32 -0600 Subject: [PATCH 441/581] arm64: versal: Add versal specific cadence ospi driver Add support for cadence ospi driver for Versal platform. This driver provides support for DMA read operation which utilizes cadence qspi driver. If "cdns,is-dma" DT property is specified use dma for read operation from cadence_qspi driver. As cadence_qspi_apb_dma_read() is defined in cadence_ospi_versal driver add a weak function defination in cadence_qspi driver. Signed-off-by: T Karthik Reddy Signed-off-by: Ashok Reddy Soma Link: https://lore.kernel.org/r/20220512100535.16364-3-ashok.reddy.soma@xilinx.com Signed-off-by: Michal Simek --- MAINTAINERS | 1 + configs/xilinx_versal_virt_defconfig | 2 + drivers/spi/Kconfig | 8 ++ drivers/spi/Makefile | 1 + drivers/spi/cadence_ospi_versal.c | 127 +++++++++++++++++++++++++++ drivers/spi/cadence_qspi.c | 16 +++- drivers/spi/cadence_qspi.h | 5 ++ drivers/spi/cadence_qspi_apb.c | 3 +- 8 files changed, 159 insertions(+), 4 deletions(-) create mode 100644 drivers/spi/cadence_ospi_versal.c diff --git a/MAINTAINERS b/MAINTAINERS index bfa3bfbc1f4..4b74866c71f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -640,6 +640,7 @@ T: git https://source.denx.de/u-boot/custodians/u-boot-microblaze.git F: arch/arm/mach-versal/ F: drivers/net/xilinx_axi_mrmac.* F: drivers/soc/soc_xilinx_versal.c +F: drivers/spi/cadence_ospi_versal.c F: drivers/watchdog/xilinx_wwdt.c N: (? +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "cadence_qspi.h" +#include + +#define CMD_4BYTE_READ 0x13 +#define CMD_4BYTE_FAST_READ 0x0C + +int cadence_qspi_apb_dma_read(struct cadence_spi_plat *plat, + const struct spi_mem_op *op) +{ + u32 reg, ret, rx_rem, n_rx, bytes_to_dma, data; + u8 opcode, addr_bytes, *rxbuf, dummy_cycles; + + n_rx = op->data.nbytes; + rxbuf = op->data.buf.in; + rx_rem = n_rx % 4; + bytes_to_dma = n_rx - rx_rem; + + if (bytes_to_dma) { + reg = readl(plat->regbase + CQSPI_REG_CONFIG); + reg |= CQSPI_REG_CONFIG_ENBL_DMA; + writel(reg, plat->regbase + CQSPI_REG_CONFIG); + + writel(bytes_to_dma, plat->regbase + CQSPI_REG_INDIRECTRDBYTES); + + writel(CQSPI_DFLT_INDIR_TRIG_ADDR_RANGE, + plat->regbase + CQSPI_REG_INDIR_TRIG_ADDR_RANGE); + writel(CQSPI_DFLT_DMA_PERIPH_CFG, + plat->regbase + CQSPI_REG_DMA_PERIPH_CFG); + writel((unsigned long)rxbuf, plat->regbase + + CQSPI_DMA_DST_ADDR_REG); + writel(plat->trigger_address, plat->regbase + + CQSPI_DMA_SRC_RD_ADDR_REG); + writel(bytes_to_dma, plat->regbase + + CQSPI_DMA_DST_SIZE_REG); + flush_dcache_range((unsigned long)rxbuf, + (unsigned long)rxbuf + bytes_to_dma); + writel(CQSPI_DFLT_DST_CTRL_REG_VAL, + plat->regbase + CQSPI_DMA_DST_CTRL_REG); + + /* Start the indirect read transfer */ + writel(CQSPI_REG_INDIRECTRD_START, plat->regbase + + CQSPI_REG_INDIRECTRD); + /* Wait for dma to complete transfer */ + ret = cadence_qspi_apb_wait_for_dma_cmplt(plat); + if (ret) + return ret; + + /* Clear indirect completion status */ + writel(CQSPI_REG_INDIRECTRD_DONE, plat->regbase + + CQSPI_REG_INDIRECTRD); + rxbuf += bytes_to_dma; + } + + if (rx_rem) { + reg = readl(plat->regbase + CQSPI_REG_CONFIG); + reg &= ~CQSPI_REG_CONFIG_ENBL_DMA; + writel(reg, plat->regbase + CQSPI_REG_CONFIG); + + reg = readl(plat->regbase + CQSPI_REG_INDIRECTRDSTARTADDR); + reg += bytes_to_dma; + writel(reg, plat->regbase + CQSPI_REG_CMDADDRESS); + + addr_bytes = readl(plat->regbase + CQSPI_REG_SIZE) & + CQSPI_REG_SIZE_ADDRESS_MASK; + + opcode = CMD_4BYTE_FAST_READ; + dummy_cycles = 8; + writel((dummy_cycles << CQSPI_REG_RD_INSTR_DUMMY_LSB) | opcode, + plat->regbase + CQSPI_REG_RD_INSTR); + + reg = opcode << CQSPI_REG_CMDCTRL_OPCODE_LSB; + reg |= (0x1 << CQSPI_REG_CMDCTRL_RD_EN_LSB); + reg |= (addr_bytes & CQSPI_REG_CMDCTRL_ADD_BYTES_MASK) << + CQSPI_REG_CMDCTRL_ADD_BYTES_LSB; + reg |= (0x1 << CQSPI_REG_CMDCTRL_ADDR_EN_LSB); + dummy_cycles = (readl(plat->regbase + CQSPI_REG_RD_INSTR) >> + CQSPI_REG_RD_INSTR_DUMMY_LSB) & + CQSPI_REG_RD_INSTR_DUMMY_MASK; + reg |= (dummy_cycles & CQSPI_REG_CMDCTRL_DUMMY_MASK) << + CQSPI_REG_CMDCTRL_DUMMY_LSB; + reg |= (((rx_rem - 1) & CQSPI_REG_CMDCTRL_RD_BYTES_MASK) << + CQSPI_REG_CMDCTRL_RD_BYTES_LSB); + ret = cadence_qspi_apb_exec_flash_cmd(plat->regbase, reg); + if (ret) + return ret; + + data = readl(plat->regbase + CQSPI_REG_CMDREADDATALOWER); + memcpy(rxbuf, &data, rx_rem); + } + + return 0; +} + +int cadence_qspi_apb_wait_for_dma_cmplt(struct cadence_spi_plat *plat) +{ + u32 timeout = CQSPI_DMA_TIMEOUT; + + while (!(readl(plat->regbase + CQSPI_DMA_DST_I_STS_REG) & + CQSPI_DMA_DST_I_STS_DONE) && timeout--) + udelay(1); + + if (!timeout) { + printf("DMA timeout\n"); + return -ETIMEDOUT; + } + + writel(readl(plat->regbase + CQSPI_DMA_DST_I_STS_REG), + plat->regbase + CQSPI_DMA_DST_I_STS_REG); + return 0; +} diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index 7209bb43a77..f1d3050d076 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -27,6 +27,12 @@ #define CQSPI_READ 2 #define CQSPI_WRITE 3 +__weak int cadence_qspi_apb_dma_read(struct cadence_spi_plat *plat, + const struct spi_mem_op *op) +{ + return 0; +} + static int cadence_spi_write_speed(struct udevice *bus, uint hz) { struct cadence_spi_plat *plat = dev_get_plat(bus); @@ -288,8 +294,12 @@ static int cadence_spi_mem_exec_op(struct spi_slave *spi, break; case CQSPI_READ: err = cadence_qspi_apb_read_setup(plat, op); - if (!err) - err = cadence_qspi_apb_read_execute(plat, op); + if (!err) { + if (plat->is_dma) + err = cadence_qspi_apb_dma_read(plat, op); + else + err = cadence_qspi_apb_read_execute(plat, op); + } break; case CQSPI_WRITE: err = cadence_qspi_apb_write_setup(plat, op); @@ -342,6 +352,8 @@ static int cadence_spi_of_to_plat(struct udevice *bus) if (plat->ahbsize >= SZ_8M) plat->use_dac_mode = true; + plat->is_dma = dev_read_bool(bus, "cdns,is-dma"); + /* All other paramters are embedded in the child node */ subnode = dev_read_first_subnode(bus); if (!ofnode_valid(subnode)) { diff --git a/drivers/spi/cadence_qspi.h b/drivers/spi/cadence_qspi.h index 4c2148136b5..a201ed7c4e6 100644 --- a/drivers/spi/cadence_qspi.h +++ b/drivers/spi/cadence_qspi.h @@ -224,6 +224,7 @@ struct cadence_spi_plat { u8 addr_width; u8 data_width; bool dtr; + bool is_dma; }; struct cadence_spi_priv { @@ -278,5 +279,9 @@ void cadence_qspi_apb_enter_xip(void *reg_base, char xip_dummy); void cadence_qspi_apb_readdata_capture(void *reg_base, unsigned int bypass, unsigned int delay); unsigned int cm_get_qspi_controller_clk_hz(void); +int cadence_qspi_apb_dma_read(struct cadence_spi_plat *plat, + const struct spi_mem_op *op); +int cadence_qspi_apb_wait_for_dma_cmplt(struct cadence_spi_plat *plat); +int cadence_qspi_apb_exec_flash_cmd(void *reg_base, unsigned int reg); #endif /* __CADENCE_QSPI_H__ */ diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index ac8b1bef7fd..b11bd2d2c61 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -336,8 +336,7 @@ void cadence_qspi_apb_controller_init(struct cadence_spi_plat *plat) cadence_qspi_apb_controller_enable(plat->regbase); } -static int cadence_qspi_apb_exec_flash_cmd(void *reg_base, - unsigned int reg) +int cadence_qspi_apb_exec_flash_cmd(void *reg_base, unsigned int reg) { unsigned int retry = CQSPI_REG_RETRY; -- GitLab From bf8dae5fcf400a593d56d5847d8ee62bc4c27855 Mon Sep 17 00:00:00 2001 From: T Karthik Reddy Date: Thu, 12 May 2022 04:05:33 -0600 Subject: [PATCH 442/581] spi: cadence-qspi: reset qspi flash for versal platform When flash operated at non default mode like DDR, flash need to be reset to operate in SDR mode to read flash ids by spi-nor framework. Reset the flash to the default state before using the flash. This reset is handled by a gpio driver, in case of mini U-Boot as gpio driver is disabled, we do raw read and write access by the registers. Versal platform utilizes spi calibration for read delay programming, so incase by default read delay property is set in DT. We make sure not to use read delay from DT by overwriting read_delay with -1. Signed-off-by: T Karthik Reddy Signed-off-by: Ashok Reddy Soma Link: https://lore.kernel.org/r/20220512100535.16364-4-ashok.reddy.soma@xilinx.com Signed-off-by: Michal Simek --- arch/arm/mach-versal/include/mach/hardware.h | 11 +++ drivers/spi/cadence_ospi_versal.c | 86 ++++++++++++++++++++ drivers/spi/cadence_qspi.c | 15 ++++ drivers/spi/cadence_qspi.h | 1 + include/zynqmp_firmware.h | 2 + 5 files changed, 115 insertions(+) diff --git a/arch/arm/mach-versal/include/mach/hardware.h b/arch/arm/mach-versal/include/mach/hardware.h index 7b728ac1101..c52c9d97925 100644 --- a/arch/arm/mach-versal/include/mach/hardware.h +++ b/arch/arm/mach-versal/include/mach/hardware.h @@ -82,3 +82,14 @@ struct crp_regs { #define JTAG_MODE 0x00000000 #define BOOT_MODE_USE_ALT 0x100 #define BOOT_MODE_ALT_SHIFT 12 + +#define FLASH_RESET_GPIO 0xc +#define WPROT_CRP 0xF126001C +#define RST_GPIO 0xF1260318 +#define WPROT_LPD_MIO 0xFF080728 +#define WPROT_PMC_MIO 0xF1060828 +#define BOOT_MODE_DIR 0xF1020204 +#define BOOT_MODE_OUT 0xF1020208 +#define MIO_PIN_12 0xF1060030 +#define BANK0_OUTPUT 0xF1020040 +#define BANK0_TRI 0xF1060200 diff --git a/drivers/spi/cadence_ospi_versal.c b/drivers/spi/cadence_ospi_versal.c index 4b13beb57a8..0caf2502034 100644 --- a/drivers/spi/cadence_ospi_versal.c +++ b/drivers/spi/cadence_ospi_versal.c @@ -125,3 +125,89 @@ int cadence_qspi_apb_wait_for_dma_cmplt(struct cadence_spi_plat *plat) plat->regbase + CQSPI_DMA_DST_I_STS_REG); return 0; } + +#if defined(CONFIG_DM_GPIO) +int cadence_spi_versal_flash_reset(struct udevice *dev) +{ + struct gpio_desc gpio; + u32 reset_gpio; + int ret; + + /* request gpio and set direction as output set to 1 */ + ret = gpio_request_by_name(dev, "reset-gpios", 0, &gpio, + GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE); + if (ret) { + printf("%s: unable to reset ospi flash device", __func__); + return ret; + } + + reset_gpio = PMIO_NODE_ID_BASE + gpio.offset; + + /* Request for pin */ + xilinx_pm_request(PM_PINCTRL_REQUEST, reset_gpio, 0, 0, 0, NULL); + + /* Enable hysteresis in cmos receiver */ + xilinx_pm_request(PM_PINCTRL_CONFIG_PARAM_SET, reset_gpio, + PM_PINCTRL_CONFIG_SCHMITT_CMOS, + PM_PINCTRL_INPUT_TYPE_SCHMITT, 0, NULL); + + /* Disable Tri-state */ + xilinx_pm_request(PM_PINCTRL_CONFIG_PARAM_SET, reset_gpio, + PM_PINCTRL_CONFIG_TRI_STATE, + PM_PINCTRL_TRI_STATE_DISABLE, 0, NULL); + udelay(1); + + /* Set value 0 to pin */ + dm_gpio_set_value(&gpio, 0); + udelay(1); + + /* Set value 1 to pin */ + dm_gpio_set_value(&gpio, 1); + udelay(1); + + return 0; +} +#else +int cadence_spi_versal_flash_reset(struct udevice *dev) +{ + /* CRP WPROT */ + writel(0, WPROT_CRP); + /* GPIO Reset */ + writel(0, RST_GPIO); + + /* disable IOU write protection */ + writel(0, WPROT_LPD_MIO); + + /* set direction as output */ + writel((readl(BOOT_MODE_DIR) | BIT(FLASH_RESET_GPIO)), + BOOT_MODE_POR_0); + + /* Data output enable */ + writel((readl(BOOT_MODE_OUT) | BIT(FLASH_RESET_GPIO)), + BOOT_MODE_POR_1); + + /* IOU SLCR write enable */ + writel(0, WPROT_PMC_MIO); + + /* set MIO as GPIO */ + writel(0x60, MIO_PIN_12); + + /* Set value 1 to pin */ + writel((readl(BANK0_OUTPUT) | BIT(FLASH_RESET_GPIO)), BANK0_OUTPUT); + udelay(10); + + /* Disable Tri-state */ + writel((readl(BANK0_TRI) & ~BIT(FLASH_RESET_GPIO)), BANK0_TRI); + udelay(1); + + /* Set value 0 to pin */ + writel((readl(BANK0_OUTPUT) & ~BIT(FLASH_RESET_GPIO)), BANK0_OUTPUT); + udelay(10); + + /* Set value 1 to pin */ + writel((readl(BANK0_OUTPUT) | BIT(FLASH_RESET_GPIO)), BANK0_OUTPUT); + udelay(10); + + return 0; +} +#endif diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index f1d3050d076..923c5f53182 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -33,6 +33,11 @@ __weak int cadence_qspi_apb_dma_read(struct cadence_spi_plat *plat, return 0; } +__weak int cadence_qspi_versal_flash_reset(struct udevice *dev) +{ + return 0; +} + static int cadence_spi_write_speed(struct udevice *bus, uint hz) { struct cadence_spi_plat *plat = dev_get_plat(bus); @@ -220,6 +225,16 @@ static int cadence_spi_probe(struct udevice *bus) plat->wr_delay = 50 * DIV_ROUND_UP(NSEC_PER_SEC, plat->ref_clk_hz); + if (CONFIG_IS_ENABLED(ARCH_VERSAL)) { + /* Versal platform uses spi calibration to set read delay */ + if (plat->read_delay >= 0) + plat->read_delay = -1; + /* Reset ospi flash device */ + ret = cadence_qspi_versal_flash_reset(bus); + if (ret) + return ret; + } + return 0; } diff --git a/drivers/spi/cadence_qspi.h b/drivers/spi/cadence_qspi.h index a201ed7c4e6..9d89e24ba49 100644 --- a/drivers/spi/cadence_qspi.h +++ b/drivers/spi/cadence_qspi.h @@ -283,5 +283,6 @@ int cadence_qspi_apb_dma_read(struct cadence_spi_plat *plat, const struct spi_mem_op *op); int cadence_qspi_apb_wait_for_dma_cmplt(struct cadence_spi_plat *plat); int cadence_qspi_apb_exec_flash_cmd(void *reg_base, unsigned int reg); +int cadence_qspi_versal_flash_reset(struct udevice *dev); #endif /* __CADENCE_QSPI_H__ */ diff --git a/include/zynqmp_firmware.h b/include/zynqmp_firmware.h index 76ec2141ff6..6a5f01c8391 100644 --- a/include/zynqmp_firmware.h +++ b/include/zynqmp_firmware.h @@ -428,6 +428,8 @@ enum pm_gem_config_type { #define PMUFW_V1_0 ((1 << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | 0) +#define PMIO_NODE_ID_BASE 0x1410801B + /* * Return payload size * Not every firmware call expects the same amount of return bytes, however the -- GitLab From 248fe9f302df5f20d75a7d88b793db017262d750 Mon Sep 17 00:00:00 2001 From: T Karthik Reddy Date: Thu, 12 May 2022 04:05:34 -0600 Subject: [PATCH 443/581] spi: cadence_qspi: Enable apb linear mode for apb read & write operations On versal platform, enable apb linear mode for apb read and write execute operations amd disable it when using dma reads. This is done by xilinx_pm_request() secure calls when CONFIG_ZYNQMP_FIRMWARE is enabled, else we use direct raw reads and writes in case of mini U-Boot. Signed-off-by: T Karthik Reddy Signed-off-by: Ashok Reddy Soma Link: https://lore.kernel.org/r/20220512100535.16364-5-ashok.reddy.soma@xilinx.com Signed-off-by: Michal Simek --- arch/arm/mach-versal/include/mach/hardware.h | 4 ++++ drivers/spi/cadence_ospi_versal.c | 24 ++++++++++++++++++++ drivers/spi/cadence_qspi.c | 7 ++++++ drivers/spi/cadence_qspi.h | 1 + drivers/spi/cadence_qspi_apb.c | 11 +++++++++ include/zynqmp_firmware.h | 7 ++++++ 6 files changed, 54 insertions(+) diff --git a/arch/arm/mach-versal/include/mach/hardware.h b/arch/arm/mach-versal/include/mach/hardware.h index c52c9d97925..000af974e86 100644 --- a/arch/arm/mach-versal/include/mach/hardware.h +++ b/arch/arm/mach-versal/include/mach/hardware.h @@ -58,6 +58,10 @@ struct rpu_regs { #define VERSAL_CRP_BASEADDR 0xF1260000 +#define VERSAL_SLCR_BASEADDR 0xF1060000 +#define VERSAL_AXI_MUX_SEL (VERSAL_SLCR_BASEADDR + 0x504) +#define VERSAL_OSPI_LINEAR_MODE BIT(1) + struct crp_regs { u32 reserved0[128]; u32 boot_mode_usr; diff --git a/drivers/spi/cadence_ospi_versal.c b/drivers/spi/cadence_ospi_versal.c index 0caf2502034..52bcad053fe 100644 --- a/drivers/spi/cadence_ospi_versal.c +++ b/drivers/spi/cadence_ospi_versal.c @@ -33,6 +33,7 @@ int cadence_qspi_apb_dma_read(struct cadence_spi_plat *plat, bytes_to_dma = n_rx - rx_rem; if (bytes_to_dma) { + cadence_qspi_apb_enable_linear_mode(false); reg = readl(plat->regbase + CQSPI_REG_CONFIG); reg |= CQSPI_REG_CONFIG_ENBL_DMA; writel(reg, plat->regbase + CQSPI_REG_CONFIG); @@ -211,3 +212,26 @@ int cadence_spi_versal_flash_reset(struct udevice *dev) return 0; } #endif + +void cadence_qspi_apb_enable_linear_mode(bool enable) +{ + if (CONFIG_IS_ENABLED(ZYNQMP_FIRMWARE)) { + if (enable) + /* ahb read mode */ + xilinx_pm_request(PM_IOCTL, PM_DEV_OSPI, + IOCTL_OSPI_MUX_SELECT, + PM_OSPI_MUX_SEL_LINEAR, 0, NULL); + else + /* DMA mode */ + xilinx_pm_request(PM_IOCTL, PM_DEV_OSPI, + IOCTL_OSPI_MUX_SELECT, + PM_OSPI_MUX_SEL_DMA, 0, NULL); + } else { + if (enable) + writel(readl(VERSAL_AXI_MUX_SEL) | + VERSAL_OSPI_LINEAR_MODE, VERSAL_AXI_MUX_SEL); + else + writel(readl(VERSAL_AXI_MUX_SEL) & + ~VERSAL_OSPI_LINEAR_MODE, VERSAL_AXI_MUX_SEL); + } +} diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index 923c5f53182..5fb4d2ff03b 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -18,7 +18,9 @@ #include #include #include +#include #include "cadence_qspi.h" +#include #define NSEC_PER_SEC 1000000000L @@ -196,6 +198,11 @@ static int cadence_spi_probe(struct udevice *bus) priv->regbase = plat->regbase; priv->ahbbase = plat->ahbbase; + if (CONFIG_IS_ENABLED(ZYNQMP_FIRMWARE)) + xilinx_pm_request(PM_REQUEST_NODE, PM_DEV_OSPI, + ZYNQMP_PM_CAPABILITY_ACCESS, ZYNQMP_PM_MAX_QOS, + ZYNQMP_PM_REQUEST_ACK_NO, NULL); + if (plat->ref_clk_hz == 0) { ret = clk_get_by_index(bus, 0, &clk); if (ret) { diff --git a/drivers/spi/cadence_qspi.h b/drivers/spi/cadence_qspi.h index 9d89e24ba49..c8d16bb0e44 100644 --- a/drivers/spi/cadence_qspi.h +++ b/drivers/spi/cadence_qspi.h @@ -284,5 +284,6 @@ int cadence_qspi_apb_dma_read(struct cadence_spi_plat *plat, int cadence_qspi_apb_wait_for_dma_cmplt(struct cadence_spi_plat *plat); int cadence_qspi_apb_exec_flash_cmd(void *reg_base, unsigned int reg); int cadence_qspi_versal_flash_reset(struct udevice *dev); +void cadence_qspi_apb_enable_linear_mode(bool enable); #endif /* __CADENCE_QSPI_H__ */ diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index b11bd2d2c61..c00755050e1 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -38,6 +38,11 @@ #include #include "cadence_qspi.h" +__weak void cadence_qspi_apb_enable_linear_mode(bool enable) +{ + return; +} + void cadence_qspi_apb_controller_enable(void *reg_base) { unsigned int reg; @@ -730,6 +735,9 @@ int cadence_qspi_apb_read_execute(struct cadence_spi_plat *plat, void *buf = op->data.buf.in; size_t len = op->data.nbytes; + if (CONFIG_IS_ENABLED(ARCH_VERSAL)) + cadence_qspi_apb_enable_linear_mode(true); + if (plat->use_dac_mode && (from + len < plat->ahbsize)) { if (len < 256 || dma_memcpy(buf, plat->ahbbase + from, len) < 0) { @@ -897,6 +905,9 @@ int cadence_qspi_apb_write_execute(struct cadence_spi_plat *plat, const void *buf = op->data.buf.out; size_t len = op->data.nbytes; + if (CONFIG_IS_ENABLED(ARCH_VERSAL)) + cadence_qspi_apb_enable_linear_mode(true); + /* * Some flashes like the Cypress Semper flash expect a dummy 4-byte * address (all 0s) with the read status register command in DTR mode. diff --git a/include/zynqmp_firmware.h b/include/zynqmp_firmware.h index 6a5f01c8391..6c4fd9a6c5f 100644 --- a/include/zynqmp_firmware.h +++ b/include/zynqmp_firmware.h @@ -160,6 +160,12 @@ enum dll_reset_type { PM_DLL_RESET_PULSE = 2, }; +enum ospi_mux_select_type { + PM_OSPI_MUX_SEL_DMA, + PM_OSPI_MUX_SEL_LINEAR, + PM_OSPI_MUX_GET_MODE, +}; + enum pm_query_id { PM_QID_INVALID = 0, PM_QID_CLOCK_GET_NAME = 1, @@ -427,6 +433,7 @@ enum pm_gem_config_type { #define ZYNQMP_PM_VERSION_INVALID ~0 #define PMUFW_V1_0 ((1 << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | 0) +#define PMIO_NODE_ID_BASE 0x1410801B #define PMIO_NODE_ID_BASE 0x1410801B -- GitLab From 2c27fdc0705251f594ecee3de0ea195ea421e05e Mon Sep 17 00:00:00 2001 From: T Karthik Reddy Date: Thu, 12 May 2022 04:05:35 -0600 Subject: [PATCH 444/581] spi: cadence-qspi: Fix programming ospi flash speed When the requested flash speed is 0, the baudrate division for the requested speed causing drop in the performance. So set the ospi flash to operate at max frequency when requested speed is zero. Signed-off-by: T Karthik Reddy Signed-off-by: Ashok Reddy Soma Link: https://lore.kernel.org/r/20220512100535.16364-6-ashok.reddy.soma@xilinx.com Signed-off-by: Michal Simek --- drivers/spi/cadence_qspi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index 5fb4d2ff03b..907f5dadc4f 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -151,7 +151,7 @@ static int cadence_spi_set_speed(struct udevice *bus, uint hz) struct cadence_spi_priv *priv = dev_get_priv(bus); int err; - if (hz > plat->max_hz) + if (!hz || hz > plat->max_hz) hz = plat->max_hz; /* Disable QSPI */ -- GitLab From c1cadac7933cbc3f81e9096843bffff8751baff9 Mon Sep 17 00:00:00 2001 From: Mihai Sain Date: Wed, 25 May 2022 13:32:08 +0300 Subject: [PATCH 445/581] gpio: atmel_pio4: add support for PIO_PORTE Add support for gpio PORT E, which is available on e.g. sama7g5 SoC. Signed-off-by: Mihai Sain --- arch/arm/mach-at91/include/mach/atmel_pio4.h | 1 + drivers/gpio/atmel_pio4.c | 5 +++++ 2 files changed, 6 insertions(+) diff --git a/arch/arm/mach-at91/include/mach/atmel_pio4.h b/arch/arm/mach-at91/include/mach/atmel_pio4.h index c3bd9140dfe..b712be8051a 100644 --- a/arch/arm/mach-at91/include/mach/atmel_pio4.h +++ b/arch/arm/mach-at91/include/mach/atmel_pio4.h @@ -74,6 +74,7 @@ struct atmel_pio4_port { #define AT91_PIO_PORTB 0x1 #define AT91_PIO_PORTC 0x2 #define AT91_PIO_PORTD 0x3 +#define AT91_PIO_PORTE 0x4 int atmel_pio4_set_gpio(u32 port, u32 pin, u32 config); int atmel_pio4_set_a_periph(u32 port, u32 pin, u32 config); diff --git a/drivers/gpio/atmel_pio4.c b/drivers/gpio/atmel_pio4.c index bea609db9df..77a76c1d505 100644 --- a/drivers/gpio/atmel_pio4.c +++ b/drivers/gpio/atmel_pio4.c @@ -36,6 +36,11 @@ static struct atmel_pio4_port *atmel_pio4_port_base(u32 port) case AT91_PIO_PORTD: base = (struct atmel_pio4_port *)ATMEL_BASE_PIOD; break; +#if (ATMEL_PIO_PORTS > 4) + case AT91_PIO_PORTE: + base = (struct atmel_pio4_port *)ATMEL_BASE_PIOE; + break; +#endif default: printf("Error: Atmel PIO4: Failed to get PIO base of port#%d!\n", port); -- GitLab From 712a172499a0c9baa93fdadbf62d10a0a0efbfeb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Mon, 20 Jun 2022 13:07:03 +0200 Subject: [PATCH 446/581] mtd: rawnand: fsl_elbc: Fix detection when nand_scan_ident() has not selected ecc.mode MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit ecc.mode is set to 0 (aliased to NAND_ECC_NONE) either when function nand_scan_ident() has not selected ecc.mode or when it selected it to none ecc mode. Distinguish between these two states by checking of node property "nand-ecc-mode" which function nand_scan_ident() uses for filling ecc.mode. This change fixes usage of none ecc mode if it is specified in DTS file. Fixes: c9ea9019c5aa ("mtd: rawnand: fsl_elbc: Use ECC configuration from device tree") Signed-off-by: Pali Rohár --- drivers/mtd/nand/raw/fsl_elbc_nand.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/nand/raw/fsl_elbc_nand.c b/drivers/mtd/nand/raw/fsl_elbc_nand.c index b0e3eb607ed..48a3687f272 100644 --- a/drivers/mtd/nand/raw/fsl_elbc_nand.c +++ b/drivers/mtd/nand/raw/fsl_elbc_nand.c @@ -745,7 +745,11 @@ static int fsl_elbc_chip_init(int devnum, u8 *addr, struct udevice *dev) return ret; /* If nand_scan_ident() has not selected ecc.mode, do it now */ - if (nand->ecc.mode == NAND_ECC_NONE) { + if (nand->ecc.mode == 0 +#if CONFIG_IS_ENABLED(OF_CONTROL) + && !ofnode_read_string(nand->flash_node, "nand-ecc-mode") +#endif + ) { /* If CS Base Register selects full hardware ECC then use it */ if ((br & BR_DECC) == BR_DECC_CHK_GEN) { nand->ecc.mode = NAND_ECC_HW; -- GitLab From a8436a01a833d23bc1a48a8c183bdb590bb416fe Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Thu, 23 Jun 2022 14:39:03 +0200 Subject: [PATCH 447/581] powerpc: dts: p2020: Sort DT nodes by their addresses MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit No functional change. Signed-off-by: Pali Rohár --- arch/powerpc/dts/p2020-post.dtsi | 89 ++++++++++++++++---------------- 1 file changed, 45 insertions(+), 44 deletions(-) diff --git a/arch/powerpc/dts/p2020-post.dtsi b/arch/powerpc/dts/p2020-post.dtsi index 0d0cd2273cd..3351874b538 100644 --- a/arch/powerpc/dts/p2020-post.dtsi +++ b/arch/powerpc/dts/p2020-post.dtsi @@ -13,49 +13,6 @@ compatible = "fsl,p2020-immr", "simple-bus"; bus-frequency = <0x0>; - usb@22000 { - compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr"; - reg = <0x22000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <28 0x2 0 0>; - phy_type = "ulpi"; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <4>; - reg = <0x40000 0x40000>; - compatible = "fsl,mpic"; - device_type = "open-pic"; - big-endian; - single-cpu-affinity; - last-interrupt-source = <255>; - }; - - esdhc: sdhc@2e000 { - compatible = "fsl,p2020-esdhc", "fsl,esdhc"; - reg = <0x2e000 0x1000>; - interrupts = <72 0x2 0 0>; - /* Filled in by U-Boot */ - clock-frequency = <0>; - }; - - espi0: spi@7000 { - compatible = "fsl,mpc8536-espi"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x7000 0x1000>; - interrupts = < 0x3b 0x02 0x00 0x00 >; - fsl,espi-num-chipselects = <4>; - }; - -/include/ "pq3-i2c-0.dtsi" -/include/ "pq3-i2c-1.dtsi" -/include/ "pq3-duart-0.dtsi" -/include/ "pq3-gpio-0.dtsi" - ecm-law@0 { compatible = "fsl,ecm-law"; reg = <0x0 0x1000>; @@ -74,6 +31,22 @@ interrupts = <18 2 0 0>; }; +/include/ "pq3-i2c-0.dtsi" +/include/ "pq3-i2c-1.dtsi" +/include/ "pq3-duart-0.dtsi" + + espi0: spi@7000 { + compatible = "fsl,mpc8536-espi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x7000 0x1000>; + interrupts = < 0x3b 0x02 0x00 0x00 >; + fsl,espi-num-chipselects = <4>; + }; + +/include/ "pq3-dma-1.dtsi" +/include/ "pq3-gpio-0.dtsi" + L2: l2-cache-controller@20000 { compatible = "fsl,p2020-l2-cache-controller"; reg = <0x20000 0x1000>; @@ -83,7 +56,15 @@ }; /include/ "pq3-dma-0.dtsi" -/include/ "pq3-dma-1.dtsi" + + usb@22000 { + compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr"; + reg = <0x22000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <28 0x2 0 0>; + phy_type = "ulpi"; + }; /include/ "pq3-etsec1-0.dtsi" /include/ "pq3-etsec1-timer-0.dtsi" @@ -95,10 +76,30 @@ /include/ "pq3-etsec1-1.dtsi" /include/ "pq3-etsec1-2.dtsi" + esdhc: sdhc@2e000 { + compatible = "fsl,p2020-esdhc", "fsl,esdhc"; + reg = <0x2e000 0x1000>; + interrupts = <72 0x2 0 0>; + /* Filled in by U-Boot */ + clock-frequency = <0>; + }; + /include/ "pq3-sec3.1-0.dtsi" /include/ "pq3-mpic.dtsi" /include/ "pq3-mpic-timer-B.dtsi" + mpic: pic@40000 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <4>; + reg = <0x40000 0x40000>; + compatible = "fsl,mpic"; + device_type = "open-pic"; + big-endian; + single-cpu-affinity; + last-interrupt-source = <255>; + }; + global-utilities@e0000 { compatible = "fsl,p2020-guts"; reg = <0xe0000 0x1000>; -- GitLab From 67ddd562515bda4d139df22cb318a6fc804fc573 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Thu, 23 Jun 2022 14:39:04 +0200 Subject: [PATCH 448/581] powerpc: dts: p2020: Remove duplicate pic@40000 node MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit DT node pic@40000 is defined explicitly in p2020-post.dtsi file and also transitionally via include file pq3-mpic.dtsi. Remove duplicate definition from p2020-post.dtsi. No change in final DTB file. Signed-off-by: Pali Rohár --- arch/powerpc/dts/p2020-post.dtsi | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/arch/powerpc/dts/p2020-post.dtsi b/arch/powerpc/dts/p2020-post.dtsi index 3351874b538..ea215ab075f 100644 --- a/arch/powerpc/dts/p2020-post.dtsi +++ b/arch/powerpc/dts/p2020-post.dtsi @@ -88,18 +88,6 @@ /include/ "pq3-mpic.dtsi" /include/ "pq3-mpic-timer-B.dtsi" - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <4>; - reg = <0x40000 0x40000>; - compatible = "fsl,mpic"; - device_type = "open-pic"; - big-endian; - single-cpu-affinity; - last-interrupt-source = <255>; - }; - global-utilities@e0000 { compatible = "fsl,p2020-guts"; reg = <0xe0000 0x1000>; -- GitLab From f7b4db358ce57b9d48930c9f88b523885a5d072f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Thu, 23 Jun 2022 15:18:52 +0200 Subject: [PATCH 449/581] board: freescale: p1_p2_rdb_pc: Allow to compile without BOARD_NAME MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Pali Rohár --- board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c index 947bbc9a5ab..949fe170ffd 100644 --- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c +++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c @@ -186,7 +186,11 @@ int checkboard(void) int bus_num = CONFIG_SYS_SPD_BUS_NUM; /* FIXME: This should just use the model from the device tree or similar */ - printf("Board: %s CPLD: V%d.%d PCBA: V%d.0\n", BOARD_NAME, +#ifdef BOARD_NAME + printf("Board: %s ", BOARD_NAME); +#endif + + printf("CPLD: V%d.%d PCBA: V%d.0\n", in_8(&cpld_data->cpld_rev_major) & 0x0F, in_8(&cpld_data->cpld_rev_minor) & 0x0F, in_8(&cpld_data->pcba_rev) & 0x0F); -- GitLab From 2c0073aadd0296f2b83c39260933089e18961f78 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Thu, 23 Jun 2022 15:25:36 +0200 Subject: [PATCH 450/581] board: freescale: p1_p2_rdb_pc: Allow to compile without __SW_BOOT_SD macro MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add #ifdef guard for __SW_BOOT_SD macro like there are guards for all other __SW_BOOT_* macros. Signed-off-by: Pali Rohár --- board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c index 949fe170ffd..56bc355d219 100644 --- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c +++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c @@ -228,8 +228,11 @@ int checkboard(void) val = (in & io_config) | (out & (~io_config)); puts("rom_loc: "); - if ((val & (~__SW_BOOT_MASK)) == __SW_BOOT_SD) { + if (0) { +#ifdef __SW_BOOT_SD + } else if ((val & (~__SW_BOOT_MASK)) == __SW_BOOT_SD) { puts("sd"); +#endif #ifdef __SW_BOOT_SD2 } else if ((val & (~__SW_BOOT_MASK)) == __SW_BOOT_SD2) { puts("sd"); -- GitLab From 6b74cfdcee4df3ee6400866f39e4806c1005a9fd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Thu, 23 Jun 2022 18:22:21 +0200 Subject: [PATCH 451/581] board: freescale: p1_p2_rdb_pc: Remove mapping for TDM-PMC card MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From whole P1/P2 family of RDB boards is TDM-PMC card (PCI Mezzanine Card, Freescale PQ-MDS-T1) available only on P1021RDB and P1025RDB boards. So address mapping for TDM-PMC card on LBC should not be enabled on any other P1/P2 RDB board as there is no device at that TDM-PMC address. Support for P1021RDB and P1025RDB boards was already removed from mainline U-Boot in commits 6d1dd76afe85 ("board/freescale: Remove P1021RDB board support") and d521cece5adb ("board/freescale: Remove P1025RDB board support"). So do not enable TDM-PMC address mapping on remaining P1/P2 RDB boards and remove all macros related to TDM-PMC address mappings. Signed-off-by: Pali Rohár --- board/freescale/p1_p2_rdb_pc/law.c | 1 - board/freescale/p1_p2_rdb_pc/tlb.c | 3 --- include/configs/p1_p2_rdb_pc.h | 9 --------- scripts/config_whitelist.txt | 4 ---- 4 files changed, 17 deletions(-) diff --git a/board/freescale/p1_p2_rdb_pc/law.c b/board/freescale/p1_p2_rdb_pc/law.c index 5f4d713ca56..6bdfb356eed 100644 --- a/board/freescale/p1_p2_rdb_pc/law.c +++ b/board/freescale/p1_p2_rdb_pc/law.c @@ -9,7 +9,6 @@ struct law_entry law_table[] = { SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC), - SET_LAW(CONFIG_SYS_PMC_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_LBC), #ifdef CONFIG_VSC7385_ENET SET_LAW(CONFIG_SYS_VSC7385_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC), #endif diff --git a/board/freescale/p1_p2_rdb_pc/tlb.c b/board/freescale/p1_p2_rdb_pc/tlb.c index 6ded38ac683..38843a96cbf 100644 --- a/board/freescale/p1_p2_rdb_pc/tlb.c +++ b/board/freescale/p1_p2_rdb_pc/tlb.c @@ -65,9 +65,6 @@ struct fsl_e_tlb_entry tlb_table[] = { SET_TLB_ENTRY(1, CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_BASE_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 6, BOOKE_PAGESZ_1M, 1), - SET_TLB_ENTRY(1, CONFIG_SYS_PMC_BASE, CONFIG_SYS_PMC_BASE_PHYS, - MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, - 0, 10, BOOKE_PAGESZ_64K, 1), #endif /* not SPL */ #ifdef CONFIG_SYS_NAND_BASE diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 6d417c57fdb..2a24236c111 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -173,7 +173,6 @@ * 0xf8f8_0000 0xf8ff_ffff L2 SRAM Up to 512K cacheable * (early boot only) * 0xff80_0000 0xff80_7fff NAND flash 32K non-cacheable CS1/0 - * 0xff98_0000 0xff98_ffff PMC 64K non-cacheable CS2 * 0xffa0_0000 0xffaf_ffff CPLD 1M non-cacheable CS3 * 0xffb0_0000 0xffbf_ffff VSC7385 switch 1M non-cacheable CS2 * 0xffc0_0000 0xffc3_ffff PCI IO range 256k non-cacheable @@ -280,14 +279,6 @@ #endif /* CPLD config size: 1Mb */ -#define CONFIG_SYS_PMC_BASE 0xff980000 -#define CONFIG_SYS_PMC_BASE_PHYS CONFIG_SYS_PMC_BASE -#define CONFIG_PMC_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_PMC_BASE_PHYS) | \ - BR_PS_8 | BR_V) -#define CONFIG_PMC_OR_PRELIM (OR_AM_64KB | OR_GPCM_CSNT | OR_GPCM_XACS | \ - OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \ - OR_GPCM_EAD) - /* Vsc7385 switch */ #ifdef CONFIG_VSC7385_ENET #define __VSCFW_ADDR "vscfw_addr=ef000000\0" diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index d9d63913dc3..b0d693a5826 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -418,8 +418,6 @@ CONFIG_PHY_IRAM_BASE CONFIG_PL011_CLOCK CONFIG_PL01x_PORTS CONFIG_PM -CONFIG_PMC_BR_PRELIM -CONFIG_PMC_OR_PRELIM CONFIG_PME_PLAT_CLK_DIV CONFIG_POST CONFIG_POSTBOOTMENU @@ -1413,8 +1411,6 @@ CONFIG_SYS_PLL_FDR CONFIG_SYS_PLL_ODR CONFIG_SYS_PLL_SETTLING_TIME CONFIG_SYS_PMAN -CONFIG_SYS_PMC_BASE -CONFIG_SYS_PMC_BASE_PHYS CONFIG_SYS_PME_CLK CONFIG_SYS_POST_MEMORY CONFIG_SYS_POST_MEM_REGIONS -- GitLab From 9167a1c28c2751b97ac48da5384e540e714a752a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Tue, 28 Jun 2022 17:54:00 +0200 Subject: [PATCH 452/581] powerpc: mpc85xx: Simplify jump to _start_cont in flash code MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit After more patches code for jumping to _start_cont symbol in flash memory involved to code with useless mathematical operations. Currently it does: r3 := CONFIG_SYS_MONITOR_BASE + ABS(_start_cont) - CONFIG_SYS_MONITOR_BASE jump to r3 Which is equivalent of just: r3 := ABS(_start_cont) jump to r3 The purpose of that code is just to jump to _start_code symbol, independently of program counter. So branch must be done to absolute address. Trying to write: ba _start_cont just cause linker error: LD u-boot powerpc-linux-gnuspe-ld.bfd: arch/powerpc/cpu/mpc85xx/start.o: in function `switch_as': (.bootpg+0x4b8): relocation truncated to fit: R_PPC_ADDR24 against symbol `_start_cont' defined in .text section in arch/powerpc/cpu/mpc85xx/start.o make: *** [Makefile:1801: u-boot] Error 1 Probably by the fact that absolute address cannot be expressed by 24-bits. So write the code via mtlr+blr pattern as it was before and load general purpose register with absolute address of the symbol: lis r3,_start_cont@h ori r3,r3,_start_cont@l mtlr r3 blr Seems that gcc and gnu ld linker support symbol@h and symbol@l syntax like number@h and number@l without any problem. And disassembling of compiler u-boot binary proved that lis+ori instructions are called with numbers which represent halves of absolute address of _start_cont symbol. Signed-off-by: Pali Rohár --- arch/powerpc/cpu/mpc85xx/start.S | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 5009cbef54a..8a6340d800c 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -1126,9 +1126,8 @@ switch_as: #else /* Calculate absolute address in FLASH and jump there */ /*--------------------------------------------------------------*/ - lis r3,CONFIG_VAL(SYS_MONITOR_BASE)@h - ori r3,r3,CONFIG_VAL(SYS_MONITOR_BASE)@l - addi r3,r3,_start_cont - CONFIG_VAL(SYS_MONITOR_BASE) + lis r3,_start_cont@h + ori r3,r3,_start_cont@l mtlr r3 blr #endif -- GitLab From 89d888ed6db14cf396ade61c38e71a93e57dd3b6 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 15 Jun 2022 12:03:43 -0400 Subject: [PATCH 453/581] Convert CONFIG_DW_ALTDESCRIPTOR to Kconfig This converts the following to Kconfig: CONFIG_DW_ALTDESCRIPTOR Signed-off-by: Tom Rini --- configs/galileo_defconfig | 1 + configs/stm32746g-eval_defconfig | 1 + configs/stm32746g-eval_spl_defconfig | 1 + configs/stm32f746-disco_defconfig | 1 + configs/stm32f746-disco_spl_defconfig | 1 + configs/stm32f769-disco_defconfig | 1 + configs/stm32f769-disco_spl_defconfig | 1 + configs/stv0991_defconfig | 1 + drivers/net/Kconfig | 5 +++++ include/configs/galileo.h | 3 --- include/configs/socfpga_common.h | 7 ------- include/configs/socfpga_soc64_common.h | 5 ----- include/configs/stm32f746-disco.h | 1 - include/configs/stv0991.h | 4 ---- 14 files changed, 13 insertions(+), 20 deletions(-) diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig index 104532bd05f..5ae13d5a1e2 100644 --- a/configs/galileo_defconfig +++ b/configs/galileo_defconfig @@ -49,6 +49,7 @@ CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CPU=y +CONFIG_DW_ALTDESCRIPTOR=y CONFIG_SPI=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y diff --git a/configs/stm32746g-eval_defconfig b/configs/stm32746g-eval_defconfig index 8ca8929f2a4..64610658c7b 100644 --- a/configs/stm32746g-eval_defconfig +++ b/configs/stm32746g-eval_defconfig @@ -48,6 +48,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DW_ALTDESCRIPTOR=y CONFIG_MII=y # CONFIG_PINCTRL_FULL is not set CONFIG_SPI=y diff --git a/configs/stm32746g-eval_spl_defconfig b/configs/stm32746g-eval_spl_defconfig index 55e44f863c1..753a4b80cbb 100644 --- a/configs/stm32746g-eval_spl_defconfig +++ b/configs/stm32746g-eval_spl_defconfig @@ -69,6 +69,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DW_ALTDESCRIPTOR=y CONFIG_MII=y # CONFIG_PINCTRL_FULL is not set CONFIG_SPL_PINCTRL=y diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig index 22274f99b18..e3f80ab8e20 100644 --- a/configs/stm32f746-disco_defconfig +++ b/configs/stm32f746-disco_defconfig @@ -48,6 +48,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DW_ALTDESCRIPTOR=y CONFIG_MII=y # CONFIG_PINCTRL_FULL is not set CONFIG_SPI=y diff --git a/configs/stm32f746-disco_spl_defconfig b/configs/stm32f746-disco_spl_defconfig index c174984b939..927d28dd973 100644 --- a/configs/stm32f746-disco_spl_defconfig +++ b/configs/stm32f746-disco_spl_defconfig @@ -69,6 +69,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DW_ALTDESCRIPTOR=y CONFIG_MII=y # CONFIG_PINCTRL_FULL is not set CONFIG_SPL_PINCTRL=y diff --git a/configs/stm32f769-disco_defconfig b/configs/stm32f769-disco_defconfig index 9845eb0a10b..b7e9ee92a7e 100644 --- a/configs/stm32f769-disco_defconfig +++ b/configs/stm32f769-disco_defconfig @@ -47,6 +47,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DW_ALTDESCRIPTOR=y CONFIG_MII=y # CONFIG_PINCTRL_FULL is not set CONFIG_SPI=y diff --git a/configs/stm32f769-disco_spl_defconfig b/configs/stm32f769-disco_spl_defconfig index a5dc89c8027..bae28b4ec13 100644 --- a/configs/stm32f769-disco_spl_defconfig +++ b/configs/stm32f769-disco_spl_defconfig @@ -68,6 +68,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DW_ALTDESCRIPTOR=y CONFIG_MII=y # CONFIG_PINCTRL_FULL is not set CONFIG_SPL_PINCTRL=y diff --git a/configs/stv0991_defconfig b/configs/stv0991_defconfig index d03d984871a..2c143068b79 100644 --- a/configs/stv0991_defconfig +++ b/configs/stv0991_defconfig @@ -37,6 +37,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y CONFIG_PHY_RESET_DELAY=10000 CONFIG_ETH_DESIGNWARE=y +CONFIG_DW_ALTDESCRIPTOR=y CONFIG_MII=y CONFIG_CADENCE_QSPI=y CONFIG_HAS_CQSPI_REF_CLK=y diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 56f9416a48d..40b5c8274e9 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -312,6 +312,7 @@ config ETH_DESIGNWARE_MESON8B config ETH_DESIGNWARE_SOCFPGA select REGMAP select SYSCON + select DW_ALTDESCRIPTOR bool "Altera SoCFPGA extras for Synopsys Designware Ethernet MAC" depends on DM_ETH && ETH_DESIGNWARE help @@ -326,6 +327,10 @@ config ETH_DESIGNWARE_S700 This provides glue layer to use Synopsys Designware Ethernet MAC present on Actions S700 SoC. +config DW_ALTDESCRIPTOR + bool "Designware Ethernet MAC uses alternate (enhanced) descriptors" + depends on ETH_DESIGNWARE + config ETHOC bool "OpenCores 10/100 Mbps Ethernet MAC" help diff --git a/include/configs/galileo.h b/include/configs/galileo.h index c50ecf27e44..49f57dda58f 100644 --- a/include/configs/galileo.h +++ b/include/configs/galileo.h @@ -21,9 +21,6 @@ "stdout=serial\0" \ "stderr=serial\0" -/* 10/100M Ethernet support */ -#define CONFIG_DW_ALTDESCRIPTOR - /* Environment configuration */ #endif /* __CONFIG_H */ diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 10ba2d22ffa..d1efba29fc4 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -51,13 +51,6 @@ #define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE SOCFPGA_MPUL2_ADDRESS -/* - * Ethernet on SoC (EMAC) - */ -#ifdef CONFIG_CMD_NET -#define CONFIG_DW_ALTDESCRIPTOR -#endif - /* * L4 OSC1 Timer 0 */ diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index c388ae9a816..c1037ab595f 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -89,11 +89,6 @@ * Flash configurations */ -/* Ethernet on SoC (EMAC) */ -#if defined(CONFIG_CMD_NET) -#define CONFIG_DW_ALTDESCRIPTOR -#endif /* CONFIG_CMD_NET */ - /* * L4 Watchdog */ diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h index 05ac900f3c3..73376f16b4d 100644 --- a/include/configs/stm32f746-disco.h +++ b/include/configs/stm32f746-disco.h @@ -21,7 +21,6 @@ #define CONFIG_SYS_MAX_FLASH_SECT 8 #define CONFIG_DW_GMAC_DEFAULT_DMA_PBL (8) -#define CONFIG_DW_ALTDESCRIPTOR #define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h index c57b1ad8a06..567aa1ffe43 100644 --- a/include/configs/stv0991.h +++ b/include/configs/stv0991.h @@ -20,10 +20,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x00190000 /* U-Boot Load Address */ -/* GMAC related configs */ - -#define CONFIG_DW_ALTDESCRIPTOR - /* Misc configuration */ #endif /* __CONFIG_H */ -- GitLab From 69a2bb63215f61cca52ecf037df18999edbf2061 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 15 Jun 2022 12:03:44 -0400 Subject: [PATCH 454/581] net: designware: Rename CONFIG_DW_GMAC_DEFAULT_DMA_PBL to GMAC_DEFAULT_DMA_PBL This value is always used at the default, rename it for now. This likely should come from the device tree if non-default, moving forward. Signed-off-by: Tom Rini --- drivers/net/designware.h | 8 +++----- include/configs/stm32f746-disco.h | 2 -- 2 files changed, 3 insertions(+), 7 deletions(-) diff --git a/drivers/net/designware.h b/drivers/net/designware.h index ddc3d4f1506..3793d550980 100644 --- a/drivers/net/designware.h +++ b/drivers/net/designware.h @@ -85,10 +85,8 @@ struct eth_dma_regs { #define DW_DMA_BASE_OFFSET (0x1000) -/* Default DMA Burst length */ -#ifndef CONFIG_DW_GMAC_DEFAULT_DMA_PBL -#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL 8 -#endif +/* DMA Burst length */ +#define GMAC_DEFAULT_DMA_PBL 8 /* Bus mode register definitions */ #define FIXEDBURST (1 << 16) @@ -96,7 +94,7 @@ struct eth_dma_regs { #define PRIORXTX_31 (2 << 14) #define PRIORXTX_21 (1 << 14) #define PRIORXTX_11 (0 << 14) -#define DMA_PBL (CONFIG_DW_GMAC_DEFAULT_DMA_PBL<<8) +#define DMA_PBL (GMAC_DEFAULT_DMA_PBL << 8) #define RXHIGHPRIO (1 << 1) #define DMAMAC_SRST (1 << 0) diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h index 73376f16b4d..df05ee4892a 100644 --- a/include/configs/stm32f746-disco.h +++ b/include/configs/stm32f746-disco.h @@ -20,8 +20,6 @@ #define CONFIG_SYS_MAX_FLASH_SECT 8 -#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL (8) - #define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ #define BOOT_TARGET_DEVICES(func) \ -- GitLab From fbc3621fb5c810711f5678aea61db1d1a856d0f0 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 15 Jun 2022 12:03:45 -0400 Subject: [PATCH 455/581] Convert CONFIG_ENABLE_36BIT_PHYS to Kconfig This converts the following to Kconfig: CONFIG_ENABLE_36BIT_PHYS Signed-off-by: Tom Rini --- arch/powerpc/cpu/mpc85xx/Kconfig | 3 +++ configs/MPC8548CDS_36BIT_defconfig | 1 + configs/MPC8548CDS_defconfig | 1 + configs/MPC8548CDS_legacy_defconfig | 1 + configs/P1010RDB-PA_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PA_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PA_NAND_defconfig | 1 + configs/P1010RDB-PA_NOR_defconfig | 1 + configs/P1010RDB-PA_SDCARD_defconfig | 1 + configs/P1010RDB-PA_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PB_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_NAND_defconfig | 1 + configs/P1010RDB-PB_NOR_defconfig | 1 + configs/P1010RDB-PB_SDCARD_defconfig | 1 + configs/P1010RDB-PB_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_defconfig | 1 + configs/P1020RDB-PC_NAND_defconfig | 1 + configs/P1020RDB-PC_SDCARD_defconfig | 1 + configs/P1020RDB-PC_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_defconfig | 1 + configs/P1020RDB-PD_NAND_defconfig | 1 + configs/P1020RDB-PD_SDCARD_defconfig | 1 + configs/P1020RDB-PD_SPIFLASH_defconfig | 1 + configs/P1020RDB-PD_defconfig | 1 + configs/P2020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_36BIT_defconfig | 1 + configs/P2020RDB-PC_NAND_defconfig | 1 + configs/P2020RDB-PC_SDCARD_defconfig | 1 + configs/P2020RDB-PC_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_defconfig | 1 + configs/P2041RDB_NAND_defconfig | 1 + configs/P2041RDB_SDCARD_defconfig | 1 + configs/P2041RDB_SPIFLASH_defconfig | 1 + configs/P2041RDB_defconfig | 1 + configs/P3041DS_NAND_defconfig | 1 + configs/P3041DS_SDCARD_defconfig | 1 + configs/P3041DS_SPIFLASH_defconfig | 1 + configs/P3041DS_defconfig | 1 + configs/P4080DS_SDCARD_defconfig | 1 + configs/P4080DS_SPIFLASH_defconfig | 1 + configs/P4080DS_defconfig | 1 + configs/P5040DS_NAND_defconfig | 1 + configs/P5040DS_SDCARD_defconfig | 1 + configs/P5040DS_SPIFLASH_defconfig | 1 + configs/P5040DS_defconfig | 1 + configs/T1024RDB_NAND_defconfig | 1 + configs/T1024RDB_SDCARD_defconfig | 1 + configs/T1024RDB_SPIFLASH_defconfig | 1 + configs/T1024RDB_defconfig | 1 + configs/T1042D4RDB_NAND_defconfig | 1 + configs/T1042D4RDB_SDCARD_defconfig | 1 + configs/T1042D4RDB_SPIFLASH_defconfig | 1 + configs/T1042D4RDB_defconfig | 1 + configs/T2080QDS_NAND_defconfig | 1 + configs/T2080QDS_SDCARD_defconfig | 1 + configs/T2080QDS_SECURE_BOOT_defconfig | 1 + configs/T2080QDS_SPIFLASH_defconfig | 1 + configs/T2080QDS_SRIO_PCIE_BOOT_defconfig | 1 + configs/T2080QDS_defconfig | 1 + configs/T2080RDB_NAND_defconfig | 1 + configs/T2080RDB_SDCARD_defconfig | 1 + configs/T2080RDB_SPIFLASH_defconfig | 1 + configs/T2080RDB_defconfig | 1 + configs/T2080RDB_revD_NAND_defconfig | 1 + configs/T2080RDB_revD_SDCARD_defconfig | 1 + configs/T2080RDB_revD_SPIFLASH_defconfig | 1 + configs/T2080RDB_revD_defconfig | 1 + configs/T4240RDB_SDCARD_defconfig | 1 + configs/T4240RDB_defconfig | 1 + configs/kmcent2_defconfig | 1 + configs/qemu-ppce500_defconfig | 1 + configs/socrates_defconfig | 1 + include/configs/MPC8548CDS.h | 1 - include/configs/P1010RDB.h | 3 --- include/configs/P2041RDB.h | 2 -- include/configs/T102xRDB.h | 1 - include/configs/T104xRDB.h | 2 -- include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240RDB.h | 2 -- include/configs/corenet_ds.h | 2 -- include/configs/kmcent2.h | 2 -- include/configs/p1_p2_rdb_pc.h | 2 -- include/configs/qemu-ppce500.h | 2 -- include/configs/socrates.h | 1 - 95 files changed, 84 insertions(+), 22 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 02efa1c6030..5510bc72878 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -1185,6 +1185,9 @@ config SYS_FSL_LBC_CLK_DIV Defines divider of platform clock(clock input to eLBC controller). +config ENABLE_36BIT_PHYS + bool "Enable 36bit physical address space support" + config SYS_MPC85XX_NO_RESETVEC bool "Discard resetvec section and move bootpg section up" depends on MPC85xx diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig index f2dd5d3f8cf..14eeef936eb 100644 --- a/configs/MPC8548CDS_36BIT_defconfig +++ b/configs/MPC8548CDS_36BIT_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_MPC8548CDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_PHYS_64BIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig index 55acf63ae1d..04f086e2d43 100644 --- a/configs/MPC8548CDS_defconfig +++ b/configs/MPC8548CDS_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_MPC8548CDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DYNAMIC_SYS_CLK_FREQ=y diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig index 4bd0b1a27b7..874de6aeb2e 100644 --- a/configs/MPC8548CDS_legacy_defconfig +++ b/configs/MPC8548CDS_legacy_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_MPC8548CDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_TARGET_MPC8548CDS_LEGACY=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index d1de7059317..dfedc1f35ab 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index 570ba4bbc90..fb71365692c 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index c407c276bc6..36231901347 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index fd2156a29ff..ad30bbb3fc2 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index eaa9efc1616..3e52bba8f53 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_FIT=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index 681af511aa2..6770981aba8 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index e18919ea2c0..c7b6008baac 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_FIT=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index 9f3c3375ea7..68c7bccae62 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_FIT=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 7a552982bdf..84e8f65bd00 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 7f749ed1a7f..427073a8614 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 3e7db0ad39b..81231e10ba3 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index c93e4d4770e..9313a5281e7 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index b85d14a4dde..2534a2e4900 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_FIT=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index 5861409a905..44f91fbf942 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index f9a06641ed4..dba240c9d4f 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_FIT=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 45945ca16c1..800d094d21b 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_FIT=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 3b320bc7306..7d695afce36 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index c4d5fe890e6..11894a149cb 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index cc9b113a3d2..86f41ca5e76 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index 6d98c2e7d41..de5b326f850 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y CONFIG_MP=y diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index d77c3eda347..54b78e8e182 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 75a967bc8d5..70a7569ed59 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index f0d9d29dec6..5c58c4a74c2 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 2631bb31b1b..247d28af795 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index f92e3f0bb8a..fb5d582e4d1 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index bb60f1f360f..98661bf3143 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index c03914ec3a6..b25b8da7c4f 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index 2e817473fc2..92ae6347f16 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index 91ebd892eb3..00d5afa0bfe 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index fddd5dacd8d..3cc100a28c6 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 69ccb8dbc99..0a61313e0b8 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index d9bf4dc862a..8804c7bff5f 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y CONFIG_MP=y diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 5a62055d1af..9a423882943 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 3e152f8111a..1cd2da10170 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 1b6ed864d4e..361b43645e6 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index d69e948d603..b070cb0843c 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index 193e4717478..53d97d9316a 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p2041rdb" CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index 4a97e85d11b..a54f35a6592 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p2041rdb" CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index 3a19e4d09d2..76cabd3de02 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p2041rdb" CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index 5dddbda5c96..e6df3c8fa02 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index d9bc80328b8..6da4e06ff90 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p3041ds" CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index e0e65eef68a..828896290e7 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p3041ds" CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index 761a9021b8c..ea2e1ebe9a1 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p3041ds" CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index 6798c1dde48..627795235b1 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index dde3351aa20..867f8aace4c 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p4080ds" CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index 1db447178c3..59984c916bc 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p4080ds" CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index 9eb49bf2f23..2733bb2cad9 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index 75b9c967481..e7f9755efb8 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p5040ds" CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index 015feac4e7f..32c1065c879 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p5040ds" CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index 7aa07692662..054f43e4c36 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p5040ds" CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index 8d5f1076e21..44abf8ff106 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index 940538b3def..88abd064dfc 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SYS_MEMTEST_START=0x00200000 diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index ac31a5597da..48976768ec1 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index 76883048ef9..ed2ad987ad8 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index a88b6a32343..adfad9839aa 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index f8772ccfdc2..e803f8b7673 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index 99280a07eab..a0179c4dc51 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 0f624f70e67..1f26a2106f3 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig index ae2f00587e6..7160e052f37 100644 --- a/configs/T1042D4RDB_defconfig +++ b/configs/T1042D4RDB_defconfig @@ -7,6 +7,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 3299fcd9173..a5469929d1f 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index b35c964e6e6..4024354dc59 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index 69597549e44..0a3e55b0f3d 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -13,6 +13,7 @@ CONFIG_FSL_QIXIS=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index ce0b15c9470..b0247be81a8 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig index 362d9fd6f56..a39587d3c7c 100644 --- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig @@ -13,6 +13,7 @@ CONFIG_ENV_ADDR=0xFFE20000 CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SRIO_PCIE_BOOT_SLAVE=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index e2b3ee11752..aa6d5596c7d 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -14,6 +14,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index c33ff6f2430..2b5249ccd84 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SYS_MEMTEST_START=0x00200000 diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index 4d4c37b39a0..9878c542eaa 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index 040e5bc3e12..5042e2a5afd 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index 0e001e2038c..e43168ea4de 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index 26ee2972bb2..bc2e758de90 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index c3c399ce9f5..31fe8be5063 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y CONFIG_SYS_MEMTEST_START=0x00200000 diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index fbae2c41b09..9d629ad2f64 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y CONFIG_SYS_MEMTEST_START=0x00200000 diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig index ef87c2ebafa..1af317aa4bf 100644 --- a/configs/T2080RDB_revD_defconfig +++ b/configs/T2080RDB_revD_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_T2080RDB_REV_D=y CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index dd5861ef0dc..b0c9776dbeb 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index 01236eddcd2..e5355eb7ae1 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_T4240RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig index 17e899a9196..8540923f891 100644 --- a/configs/kmcent2_defconfig +++ b/configs/kmcent2_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_ADDR=0xebf20000 CONFIG_MPC85xx=y CONFIG_TARGET_KMCENT2=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_KM_DEF_NETDEV="eth2" CONFIG_KM_IVM_BUS=2 CONFIG_MP=y diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig index 8c7b8b4ef98..034f7e6935b 100644 --- a/configs/qemu-ppce500_defconfig +++ b/configs/qemu-ppce500_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_CLK_FREQ=33000000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_QEMU_PPCE500=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig index d902019d6cd..28ea447ec55 100644 --- a/configs/socrates_defconfig +++ b/configs/socrates_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_ADDR=0xFFF40000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_SOCRATES=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index d8ffa2e28a9..5fba5bb198d 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -34,7 +34,6 @@ /* * Only possible on E500 Version 2 or newer cores. */ -#define CONFIG_ENABLE_36BIT_PHYS 1 #define CONFIG_SYS_CCSRBAR 0xe0000000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index ad78dba865b..53c719807d6 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -108,9 +108,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ - -#define CONFIG_ENABLE_36BIT_PHYS - /* DDR Setup */ #define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_SYS_SPD_BUS_NUM 1 diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index df16319de4a..8e5d18f6cca 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -58,8 +58,6 @@ #define CONFIG_SYS_CACHE_STASHING #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E -#define CONFIG_ENABLE_36BIT_PHYS - #define CONFIG_POST CONFIG_SYS_POST_MEMORY /* test POST memory test */ /* diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index bd458ff35e9..3f32354038e 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -15,7 +15,6 @@ /* High Level Configuration Options */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ -#define CONFIG_ENABLE_36BIT_PHYS #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 505bae931e6..bda25248621 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -83,8 +83,6 @@ #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif -#define CONFIG_ENABLE_36BIT_PHYS - /* * Config the L3 Cache as L3 SRAM */ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 2db2b07fb4b..0c13550ef23 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -22,7 +22,6 @@ /* High Level Configuration Options */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ -#define CONFIG_ENABLE_36BIT_PHYS #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 07e1108f0f0..5fb768ab92f 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -17,7 +17,6 @@ /* High Level Configuration Options */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ -#define CONFIG_ENABLE_36BIT_PHYS #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 526d40fa034..6f5b7594299 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -56,8 +56,6 @@ #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif -#define CONFIG_ENABLE_36BIT_PHYS - /* * Config the L3 Cache as L3 SRAM */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index f563a5f3816..034cd00381e 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -62,8 +62,6 @@ #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif -#define CONFIG_ENABLE_36BIT_PHYS - #define CONFIG_POST CONFIG_SYS_POST_MEMORY /* test POST memory test */ /* diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 4de5736d8ce..798688a220b 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -152,8 +152,6 @@ #define CONFIG_SYS_CACHE_STASHING #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E -#define CONFIG_ENABLE_36BIT_PHYS - /* POST memory regions test */ #define CONFIG_POST CONFIG_SYS_POST_MEM_REGIONS diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 2a24236c111..1be548e20d2 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -111,8 +111,6 @@ */ #define CONFIG_L2_CACHE -#define CONFIG_ENABLE_36BIT_PHYS - #define CONFIG_SYS_CCSRBAR 0xffe00000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index c3fef0de173..006593acfdd 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -11,8 +11,6 @@ #define CONFIG_SYS_RAMBOOT -#define CONFIG_ENABLE_36BIT_PHYS - /* Needed to fill the ccsrbar pointer */ /* Virtual address to CCSRBAR */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 3309779118a..73f82fc00ac 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -22,7 +22,6 @@ /* * Only possible on E500 Version 2 or newer cores. */ -#define CONFIG_ENABLE_36BIT_PHYS 1 /* * sysclk for MPC85xx -- GitLab From 0285455d905e5e2bc84b73fa6388ce5b1598d88b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 15 Jun 2022 12:03:46 -0400 Subject: [PATCH 456/581] watchdog: designware: Make this depend on WDT As this driver can dynamically determine the values set in CONFIG_DW_WDT_BASE when using WDT, so make this depend on WDT rather than migrate CONFIG_DW_WDT_BASE to Kconfig. Cc: Chee Tien Fong Cc: Chin-Liang See Cc: Dinh Nguyen Cc: Holger Brunck Cc: Ley Foon Tan Cc: Marek Vasut Cc: Siew Chin Lim Cc: Stefan Roese Cc: hee Hong Ang Signed-off-by: Tom Rini Reviewed-by: Stefan Roese --- drivers/watchdog/Kconfig | 4 ++-- drivers/watchdog/designware_wdt.c | 21 --------------------- include/configs/socfpga_common.h | 1 - include/configs/socfpga_soc64_common.h | 1 - 4 files changed, 2 insertions(+), 25 deletions(-) diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index c3eb8a8aec1..532ada89c1b 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -64,8 +64,8 @@ config ULP_WATCHDOG config DESIGNWARE_WATCHDOG bool "Designware watchdog timer support" - select HW_WATCHDOG if !WDT - default y if WDT && ROCKCHIP_RK3399 + depends on WDT + default y if ROCKCHIP_RK3399 help Enable this to support Designware Watchdog Timer IP, present e.g. on Altera SoCFPGA SoCs. diff --git a/drivers/watchdog/designware_wdt.c b/drivers/watchdog/designware_wdt.c index cfec29bd158..cad756aeaf2 100644 --- a/drivers/watchdog/designware_wdt.c +++ b/drivers/watchdog/designware_wdt.c @@ -60,26 +60,6 @@ static void designware_wdt_reset_common(void __iomem *base) writel(DW_WDT_CRR_RESTART_VAL, base + DW_WDT_CRR); } -#if !CONFIG_IS_ENABLED(WDT) -void hw_watchdog_reset(void) -{ - designware_wdt_reset_common((void __iomem *)CONFIG_DW_WDT_BASE); -} - -void hw_watchdog_init(void) -{ - /* reset to disable the watchdog */ - hw_watchdog_reset(); - /* set timer in miliseconds */ - designware_wdt_settimeout((void __iomem *)CONFIG_DW_WDT_BASE, - CONFIG_DW_WDT_CLOCK_KHZ, - CONFIG_WATCHDOG_TIMEOUT_MSECS); - /* enable the watchdog */ - designware_wdt_enable((void __iomem *)CONFIG_DW_WDT_BASE); - /* reset the watchdog */ - hw_watchdog_reset(); -} -#else static int designware_wdt_reset(struct udevice *dev) { struct designware_wdt_priv *priv = dev_get_priv(dev); @@ -195,4 +175,3 @@ U_BOOT_DRIVER(designware_wdt) = { .ops = &designware_wdt_ops, .flags = DM_FLAG_PRE_RELOC, }; -#endif diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index d1efba29fc4..4a7da76e51e 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -66,7 +66,6 @@ /* * L4 Watchdog */ -#define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS #define CONFIG_DW_WDT_CLOCK_KHZ 25000 /* diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index c1037ab595f..a3e8d549291 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -92,7 +92,6 @@ /* * L4 Watchdog */ -#define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS #ifdef CONFIG_TARGET_SOCFPGA_STRATIX10 #ifndef __ASSEMBLY__ unsigned int cm_get_l4_sys_free_clk_hz(void); -- GitLab From 140f0aa0deb745bad06ffb0c0e21d87424b12ea7 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 15 Jun 2022 12:03:47 -0400 Subject: [PATCH 457/581] nxp: Cleanup some emulator related options. - Drop the emulator CONFIG test from include/configs/ls1088ardb.h - Migrate CONFIG_SYS_FSL_DDR_EMU to a select'able option in drivers/ddr/fsl/Kconfig Signed-off-by: Tom Rini --- README | 4 ---- drivers/ddr/fsl/Kconfig | 6 ++++++ include/configs/ls1088ardb.h | 4 ---- 3 files changed, 6 insertions(+), 8 deletions(-) diff --git a/README b/README index c1d516beda8..0cf1c4991a4 100644 --- a/README +++ b/README @@ -388,10 +388,6 @@ The following options need to be configured: CONFIG_SYS_FSL_DDR_ADDR Freescale DDR memory-mapped register base. - CONFIG_SYS_FSL_DDR_EMU - Specify emulator support for DDR. Some DDR features such as - deskew training are not available. - CONFIG_SYS_FSL_DDRC_GEN1 Freescale DDR1 controller. diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig index fe69bef3d3a..6a29b23bab7 100644 --- a/drivers/ddr/fsl/Kconfig +++ b/drivers/ddr/fsl/Kconfig @@ -10,6 +10,12 @@ config SYS_FSL_MMDC help Select Freescale Multi Mode DDR controller (MMDC). +config SYS_FSL_DDR_EMU + bool + help + Specify emulator support for DDR. Some DDR features such as deskew + training are not available. + if SYS_FSL_DDR || SYS_FSL_MMDC config SYS_FSL_DDR_BE diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index c69003018bf..aeadf534bc3 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -15,11 +15,7 @@ #define COUNTER_FREQUENCY_REAL 25000000 /* 25MHz */ -#ifdef CONFIG_EMU -#define CONFIG_SYS_FSL_DDR_EMU -#else #define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#endif #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ -- GitLab From d398b29aa06553a65642ed49ab0bf98938ffa788 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 15 Jun 2022 12:03:48 -0400 Subject: [PATCH 458/581] smdkc100: Remove some unused options There are a few options we test and set and then never reference, remove them. Signed-off-by: Tom Rini --- include/configs/smdkc100.h | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index a7b0ce9f975..5edf6f60727 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -89,16 +89,6 @@ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 KiB */ -#if !defined(CONFIG_NAND_SPL) && (CONFIG_SYS_TEXT_BASE >= 0xc0000000) -#define CONFIG_ENABLE_MMU -#endif - -#ifdef CONFIG_ENABLE_MMU -#define CONFIG_SYS_MAPPED_RAM_BASE 0xc0000000 -#else -#define CONFIG_SYS_MAPPED_RAM_BASE CONFIG_SYS_SDRAM_BASE -#endif - /*----------------------------------------------------------------------- * Boot configuration */ -- GitLab From de0a73291550c68a7c7306c2627cbf6484241fef Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 15 Jun 2022 12:03:49 -0400 Subject: [PATCH 459/581] Rename CONFIG_PWM to CONFIG_PWM_S5P and move to Kconfig We rename the S5P specific "CONFIG_PWM" to CONFIG_PWM_S5P and move it to Kconfig. Given the usage of CONFIG_PWM_NX, we have that select this new symbol. Cc: Jaehoon Chung Cc: Minkyu Kang Signed-off-by: Tom Rini Reviewed-by: Jaehoon Chung --- arch/arm/cpu/armv7/s5p-common/Makefile | 3 +-- board/friendlyarm/Kconfig | 1 + configs/s5p_goni_defconfig | 1 + configs/smdkc100_defconfig | 1 + drivers/pwm/Kconfig | 5 +++++ include/configs/exynos-common.h | 3 --- include/configs/s5p_goni.h | 3 --- include/configs/smdkc100.h | 3 --- 8 files changed, 9 insertions(+), 11 deletions(-) diff --git a/arch/arm/cpu/armv7/s5p-common/Makefile b/arch/arm/cpu/armv7/s5p-common/Makefile index bfe02389cd9..0985420fe5c 100644 --- a/arch/arm/cpu/armv7/s5p-common/Makefile +++ b/arch/arm/cpu/armv7/s5p-common/Makefile @@ -3,14 +3,13 @@ # Copyright (C) 2009 Samsung Electronics # Minkyu Kang +obj-$(CONFIG_PWM_S5P) += pwm.o ifdef CONFIG_ARCH_NEXELL -obj-$(CONFIG_PWM_NX) += pwm.o obj-$(CONFIG_S5P4418_ONEWIRE) += pwm.o else obj-y += cpu_info.o ifndef CONFIG_SPL_BUILD obj-y += timer.o obj-y += sromc.o -obj-$(CONFIG_PWM) += pwm.o endif endif diff --git a/board/friendlyarm/Kconfig b/board/friendlyarm/Kconfig index f8f9cfd879a..fa04727a6a2 100644 --- a/board/friendlyarm/Kconfig +++ b/board/friendlyarm/Kconfig @@ -11,6 +11,7 @@ config S5P4418_ONEWIRE config PWM_NX bool "PWM" + select PWM_S5P help This enables LCD-Backlight control via PWM. endchoice diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig index a0104044a85..4d4005de1a4 100644 --- a/configs/s5p_goni_defconfig +++ b/configs/s5p_goni_defconfig @@ -52,6 +52,7 @@ CONFIG_MMC_SDHCI_S5P=y CONFIG_MTD=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_MAX8998=y +CONFIG_PWM_S5P=y CONFIG_USB=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Samsung" diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig index 2c8bd1c8ee2..8c89c39c9e2 100644 --- a/configs/smdkc100_defconfig +++ b/configs/smdkc100_defconfig @@ -38,3 +38,4 @@ CONFIG_ENV_IS_IN_ONENAND=y CONFIG_MTD=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0x98800300 +CONFIG_PWM_S5P=y diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig index cb54e67faeb..8fd5a2e2051 100644 --- a/drivers/pwm/Kconfig +++ b/drivers/pwm/Kconfig @@ -84,6 +84,11 @@ config PWM_SANDBOX useful. The PWM can be enabled but is not connected to any outputs so this is not very useful. +config PWM_S5P + bool "Enable non-DM support for S5P PWM" + depends on (S5P || ARCH_NEXELL) + default y + config PWM_SIFIVE bool "Enable support for SiFive PWM" depends on DM_PWM diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h index 79860212f40..246aa9b7ab9 100644 --- a/include/configs/exynos-common.h +++ b/include/configs/exynos-common.h @@ -18,9 +18,6 @@ /* select serial console configuration */ -/* PWM */ -#define CONFIG_PWM - /* Miscellaneous configurable options */ #endif /* __CONFIG_H */ diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 8b7e2e5dc9e..d9eeec48a0d 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -21,9 +21,6 @@ /* MMC */ #define SDHCI_MAX_HOSTS 4 -/* PWM */ -#define CONFIG_PWM 1 - /* USB Composite download gadget - g_dnl */ #define DFU_DEFAULT_POLL_TIMEOUT 300 diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index 5edf6f60727..995623e9a6f 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -24,9 +24,6 @@ * select serial console configuration */ -/* PWM */ -#define CONFIG_PWM 1 - #define COMMON_BOOT "console=ttySAC0,115200n8" \ " mem=128M " \ " " CONFIG_MTDPARTS_DEFAULT -- GitLab From ddd39d0cc1a025a1e2e3c792cc8286dbdfa29b54 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 15 Jun 2022 12:03:50 -0400 Subject: [PATCH 460/581] Convert CONFIG_SAMSUNG_ONENAND to Kconfig This converts the following to Kconfig: CONFIG_SAMSUNG_ONENAND Signed-off-by: Tom Rini Reviewed-by: Jaehoon Chung --- configs/s5p_goni_defconfig | 1 + configs/s5pc210_universal_defconfig | 1 + configs/smdkc100_defconfig | 1 + drivers/mtd/Kconfig | 3 +++ include/configs/s5p_goni.h | 1 - include/configs/s5pc210_universal.h | 1 - include/configs/smdkc100.h | 1 - 7 files changed, 6 insertions(+), 3 deletions(-) diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig index 4d4005de1a4..b5f3ae26b67 100644 --- a/configs/s5p_goni_defconfig +++ b/configs/s5p_goni_defconfig @@ -50,6 +50,7 @@ CONFIG_DM_I2C_GPIO=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_S5P=y CONFIG_MTD=y +CONFIG_SAMSUNG_ONENAND=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_MAX8998=y CONFIG_PWM_S5P=y diff --git a/configs/s5pc210_universal_defconfig b/configs/s5pc210_universal_defconfig index af7fef58a60..a66ae7dec9b 100644 --- a/configs/s5pc210_universal_defconfig +++ b/configs/s5pc210_universal_defconfig @@ -49,6 +49,7 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_S5P=y CONFIG_MTD=y +CONFIG_SAMSUNG_ONENAND=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_MAX8998=y CONFIG_SOFT_SPI=y diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig index 8c89c39c9e2..5f2ab44d404 100644 --- a/configs/smdkc100_defconfig +++ b/configs/smdkc100_defconfig @@ -36,6 +36,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_ONENAND=y # CONFIG_MMC is not set CONFIG_MTD=y +CONFIG_SAMSUNG_ONENAND=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0x98800300 CONFIG_PWM_S5P=y diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index d0ab7c18c64..3d1f6e43fd5 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -168,6 +168,9 @@ config STM32_FLASH This is the driver of embedded flash for some STMicroelectronics STM32 MCU. +config SAMSUNG_ONENAND + bool "Samsung OneNAND driver support" + config USE_SYS_MAX_FLASH_BANKS bool "Enable Max number of Flash memory banks" help diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index d9eeec48a0d..ed4f55a4323 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -127,7 +127,6 @@ #define CONFIG_MMC_DEFAULT_DEV 0 #define CONFIG_USE_ONENAND_BOARD_INIT -#define CONFIG_SAMSUNG_ONENAND 1 #define CONFIG_SYS_ONENAND_BASE 0xB0000000 #define CONFIG_USB_GADGET_DWC2_OTG_PHY diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index ab4fe6b4602..cbc941afb9d 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -88,7 +88,6 @@ "opts=always_resume=1" #define CONFIG_USE_ONENAND_BOARD_INIT -#define CONFIG_SAMSUNG_ONENAND #define CONFIG_SYS_ONENAND_BASE 0x0C000000 #define CONFIG_USB_GADGET_DWC2_OTG_PHY diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index 995623e9a6f..4199f2bc8e6 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -91,7 +91,6 @@ */ #define CONFIG_USE_ONENAND_BOARD_INIT -#define CONFIG_SAMSUNG_ONENAND 1 #define CONFIG_SYS_ONENAND_BASE 0xE7100000 /* -- GitLab From dd4bf244455acd5a18616872b4e76d93180762d0 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 15 Jun 2022 12:03:51 -0400 Subject: [PATCH 461/581] Convert CONFIG_USE_ONENAND_BOARD_INIT to Kconfig This converts the following to Kconfig: CONFIG_USE_ONENAND_BOARD_INIT Signed-off-by: Tom Rini --- cmd/Kconfig | 4 ++++ configs/igep00x0_defconfig | 1 + configs/s5p_goni_defconfig | 1 + configs/smdkc100_defconfig | 1 + include/configs/omap3_igep00x0.h | 1 - include/configs/s5p_goni.h | 1 - include/configs/s5pc210_universal.h | 1 - include/configs/smdkc100.h | 1 - 8 files changed, 7 insertions(+), 4 deletions(-) diff --git a/cmd/Kconfig b/cmd/Kconfig index ad36ae63c65..bb956e33075 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -1298,6 +1298,10 @@ config CMD_ONENAND and erasing blocks. It allso provides a way to show and change bad blocks, and test the device. +config USE_ONENAND_BOARD_INIT + bool "Call onenand_board_init() in the onenand command" + depends on CMD_ONENAND + config CMD_OSD bool "osd" help diff --git a/configs/igep00x0_defconfig b/configs/igep00x0_defconfig index 00f0a670c2b..17c97ac27f7 100644 --- a/configs/igep00x0_defconfig +++ b/configs/igep00x0_defconfig @@ -52,6 +52,7 @@ CONFIG_CMD_SPL=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y CONFIG_CMD_ONENAND=y +CONFIG_USE_ONENAND_BOARD_INIT=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig index b5f3ae26b67..17bd8424da2 100644 --- a/configs/s5p_goni_defconfig +++ b/configs/s5p_goni_defconfig @@ -32,6 +32,7 @@ CONFIG_CMD_DFU=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_ONENAND=y +CONFIG_USE_ONENAND_BOARD_INIT=y CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig index 5f2ab44d404..1ed3a8cd3a0 100644 --- a/configs/smdkc100_defconfig +++ b/configs/smdkc100_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=384 # CONFIG_CMD_FLASH is not set CONFIG_CMD_ONENAND=y +CONFIG_USE_ONENAND_BOARD_INIT=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_FAT=y diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h index 6be214753f1..97f47ea5b71 100644 --- a/include/configs/omap3_igep00x0.h +++ b/include/configs/omap3_igep00x0.h @@ -66,7 +66,6 @@ BOOTENV /* OneNAND config */ -#define CONFIG_USE_ONENAND_BOARD_INIT #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP #define CONFIG_SYS_ONENAND_BLOCK_SIZE (128*1024) diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index ed4f55a4323..8208f14e09e 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -126,7 +126,6 @@ /* FLASH and environment organization */ #define CONFIG_MMC_DEFAULT_DEV 0 -#define CONFIG_USE_ONENAND_BOARD_INIT #define CONFIG_SYS_ONENAND_BASE 0xB0000000 #define CONFIG_USB_GADGET_DWC2_OTG_PHY diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index cbc941afb9d..c51ff5718cf 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -87,7 +87,6 @@ "mmcrootpart=3\0" \ "opts=always_resume=1" -#define CONFIG_USE_ONENAND_BOARD_INIT #define CONFIG_SYS_ONENAND_BASE 0x0C000000 #define CONFIG_USB_GADGET_DWC2_OTG_PHY diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index 4199f2bc8e6..1395b8dfe38 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -90,7 +90,6 @@ * Boot configuration */ -#define CONFIG_USE_ONENAND_BOARD_INIT #define CONFIG_SYS_ONENAND_BASE 0xE7100000 /* -- GitLab From b68ba0e0eb796a2a05f89c09abaaca0f2f7b1462 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 15 Jun 2022 12:03:52 -0400 Subject: [PATCH 462/581] Convert CONFIG_USB_GADGET_DWC2_OTG_PHY to Kconfig This converts the following to Kconfig: CONFIG_USB_GADGET_DWC2_OTG_PHY Signed-off-by: Tom Rini --- configs/odroid_defconfig | 1 + configs/origen_defconfig | 1 + configs/s5p_goni_defconfig | 1 + configs/s5pc210_universal_defconfig | 1 + configs/trats2_defconfig | 1 + configs/trats_defconfig | 1 + drivers/usb/gadget/Kconfig | 5 +++++ include/configs/exynos4-common.h | 2 -- include/configs/s5p_goni.h | 2 -- include/configs/s5pc210_universal.h | 2 -- include/configs/smdkv310.h | 2 -- 11 files changed, 11 insertions(+), 8 deletions(-) diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig index 8beb6a006e5..9f4543c1ba8 100644 --- a/configs/odroid_defconfig +++ b/configs/odroid_defconfig @@ -72,6 +72,7 @@ CONFIG_USB_GADGET_MANUFACTURER="Samsung" CONFIG_USB_GADGET_VENDOR_NUM=0x04e8 CONFIG_USB_GADGET_PRODUCT_NUM=0x6601 CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_THOR=y CONFIG_LIB_HW_RAND=y diff --git a/configs/origen_defconfig b/configs/origen_defconfig index 0a36472d331..9a429a8704a 100644 --- a/configs/origen_defconfig +++ b/configs/origen_defconfig @@ -54,5 +54,6 @@ CONFIG_USB_GADGET_MANUFACTURER="Samsung" CONFIG_USB_GADGET_VENDOR_NUM=0x04e8 CONFIG_USB_GADGET_PRODUCT_NUM=0x6601 CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_THOR=y diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig index 17bd8424da2..c13602d3bb7 100644 --- a/configs/s5p_goni_defconfig +++ b/configs/s5p_goni_defconfig @@ -61,5 +61,6 @@ CONFIG_USB_GADGET_MANUFACTURER="Samsung" CONFIG_USB_GADGET_VENDOR_NUM=0x04e8 CONFIG_USB_GADGET_PRODUCT_NUM=0x6601 CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_THOR=y diff --git a/configs/s5pc210_universal_defconfig b/configs/s5pc210_universal_defconfig index a66ae7dec9b..cab0ac8e845 100644 --- a/configs/s5pc210_universal_defconfig +++ b/configs/s5pc210_universal_defconfig @@ -59,5 +59,6 @@ CONFIG_USB_GADGET_MANUFACTURER="Samsung" CONFIG_USB_GADGET_VENDOR_NUM=0x04e8 CONFIG_USB_GADGET_PRODUCT_NUM=0x6601 CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_THOR=y diff --git a/configs/trats2_defconfig b/configs/trats2_defconfig index 5c47a22d1e0..b48ed9c4242 100644 --- a/configs/trats2_defconfig +++ b/configs/trats2_defconfig @@ -62,6 +62,7 @@ CONFIG_USB_GADGET_MANUFACTURER="Samsung" CONFIG_USB_GADGET_VENDOR_NUM=0x04e8 CONFIG_USB_GADGET_PRODUCT_NUM=0x6601 CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_THOR=y CONFIG_LIB_HW_RAND=y diff --git a/configs/trats_defconfig b/configs/trats_defconfig index 008a8ff4b30..3e0fdfe8348 100644 --- a/configs/trats_defconfig +++ b/configs/trats_defconfig @@ -59,6 +59,7 @@ CONFIG_USB_GADGET_MANUFACTURER="Samsung" CONFIG_USB_GADGET_VENDOR_NUM=0x04e8 CONFIG_USB_GADGET_PRODUCT_NUM=0x6601 CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_THOR=y CONFIG_LIB_HW_RAND=y diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index d81a9c5a100..350036f2083 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -92,6 +92,11 @@ config USB_GADGET_DWC2_OTG if USB_GADGET_DWC2_OTG +config USB_GADGET_DWC2_OTG_PHY + bool "DesignWare USB2.0 HS OTG PHY" + help + Enable the DesignWare USB2.0 HS OTG physical device interface. + config USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8 bool "DesignWare USB2.0 HS OTG controller 8-bit PHY bus width" help diff --git a/include/configs/exynos4-common.h b/include/configs/exynos4-common.h index 625a2d8dc18..054cb5309e7 100644 --- a/include/configs/exynos4-common.h +++ b/include/configs/exynos4-common.h @@ -23,8 +23,6 @@ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ -#define CONFIG_USB_GADGET_DWC2_OTG_PHY - /* Common environment variables */ #define ENV_ITB \ "loadkernel=load mmc ${mmcbootdev}:${mmcbootpart} ${kerneladdr} " \ diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 8208f14e09e..712a47a4956 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -128,6 +128,4 @@ #define CONFIG_SYS_ONENAND_BASE 0xB0000000 -#define CONFIG_USB_GADGET_DWC2_OTG_PHY - #endif /* __CONFIG_H */ diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index c51ff5718cf..137537d65f6 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -89,8 +89,6 @@ #define CONFIG_SYS_ONENAND_BASE 0x0C000000 -#define CONFIG_USB_GADGET_DWC2_OTG_PHY - #ifndef __ASSEMBLY__ void universal_spi_scl(int bit); void universal_spi_sda(int bit); diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index bb0f5473030..0b1f0c5f54c 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -10,8 +10,6 @@ #include "exynos4-common.h" -#undef CONFIG_USB_GADGET_DWC2_OTG_PHY - /* High Level Configuration Options */ #define CONFIG_SYS_SDRAM_BASE 0x40000000 -- GitLab From 1f7e2fc324e414f28e9a6984f53a91da8ed8e64b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 15 Jun 2022 12:03:53 -0400 Subject: [PATCH 463/581] Convert CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR to Kconfig This converts the following to Kconfig: CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR Signed-off-by: Tom Rini --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 5 +++++ include/configs/ls2080aqds.h | 3 --- include/configs/ls2080ardb.h | 3 --- 3 files changed, 5 insertions(+), 6 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 5a809b46118..3ea023d36f9 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -511,6 +511,11 @@ config DP_DDR_CTRL depends on SYS_FSL_HAS_DP_DDR default 2 if ARCH_LS2080A +config DP_DDR_DIMM_SLOTS_PER_CTLR + int + depends on SYS_FSL_HAS_DP_DDR + default 1 if ARCH_LS2080A + config DP_DDR_NUM_CTRLS int depends on SYS_FSL_HAS_DP_DDR diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 21ca4afa51c..96da4ab2ec0 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -25,9 +25,6 @@ #define SPD_EEPROM_ADDRESS6 0x56 /* dummy address */ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 #define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ -#ifdef CONFIG_SYS_FSL_HAS_DP_DDR -#define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1 -#endif #define CONFIG_SYS_NOR0_CSPR_EXT (0x0) #define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 43bcc5a9b11..835fff4bc60 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -30,9 +30,6 @@ #define SPD_EEPROM_ADDRESS6 0x56 /* dummy address */ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 #define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ -#ifdef CONFIG_SYS_FSL_HAS_DP_DDR -#define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1 -#endif #if !defined(CONFIG_FSL_QSPI) || defined(CONFIG_TFABOOT) -- GitLab From bca4509d575912e0521ce8448d41aabfc1c5e964 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 15 Jun 2022 12:03:54 -0400 Subject: [PATCH 464/581] Convert CONFIG_SYS_SPD_BUS_NUM to Kconfig This converts the following to Kconfig: CONFIG_SYS_SPD_BUS_NUM Signed-off-by: Tom Rini --- README | 5 ----- configs/P1010RDB-PA_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PA_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PA_NAND_defconfig | 1 + configs/P1010RDB-PA_NOR_defconfig | 1 + configs/P1010RDB-PA_SDCARD_defconfig | 1 + configs/P1010RDB-PA_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PB_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_NAND_defconfig | 1 + configs/P1010RDB-PB_NOR_defconfig | 1 + configs/P1010RDB-PB_SDCARD_defconfig | 1 + configs/P1010RDB-PB_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_defconfig | 1 + configs/P1020RDB-PC_NAND_defconfig | 1 + configs/P1020RDB-PC_SDCARD_defconfig | 1 + configs/P1020RDB-PC_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_defconfig | 1 + configs/P1020RDB-PD_NAND_defconfig | 1 + configs/P1020RDB-PD_SDCARD_defconfig | 1 + configs/P1020RDB-PD_SPIFLASH_defconfig | 1 + configs/P1020RDB-PD_defconfig | 1 + configs/P2020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_36BIT_defconfig | 1 + configs/P2020RDB-PC_NAND_defconfig | 1 + configs/P2020RDB-PC_SDCARD_defconfig | 1 + configs/P2020RDB-PC_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_defconfig | 1 + configs/P3041DS_NAND_defconfig | 1 + configs/P3041DS_SDCARD_defconfig | 1 + configs/P3041DS_SPIFLASH_defconfig | 1 + configs/P3041DS_defconfig | 1 + configs/P4080DS_SDCARD_defconfig | 1 + configs/P4080DS_SPIFLASH_defconfig | 1 + configs/P4080DS_defconfig | 1 + configs/P5040DS_NAND_defconfig | 1 + configs/P5040DS_SDCARD_defconfig | 1 + configs/P5040DS_SPIFLASH_defconfig | 1 + configs/P5040DS_defconfig | 1 + drivers/ddr/Kconfig | 5 +++++ include/configs/MPC8548CDS.h | 2 -- include/configs/P1010RDB.h | 1 - include/configs/P2041RDB.h | 1 - include/configs/T102xRDB.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240RDB.h | 1 - include/configs/corenet_ds.h | 1 - include/configs/km/pg-wcom-ls102xa.h | 1 - include/configs/kmcent2.h | 1 - include/configs/ls1021aqds.h | 1 - include/configs/ls1043aqds.h | 1 - include/configs/ls1043ardb.h | 2 -- include/configs/ls1046aqds.h | 1 - include/configs/ls1046ardb.h | 1 - include/configs/ls1088aqds.h | 1 - include/configs/ls1088ardb.h | 1 - include/configs/ls2080aqds.h | 1 - include/configs/ls2080ardb.h | 1 - include/configs/lx2160a_common.h | 1 - include/configs/novena.h | 1 - include/configs/p1_p2_rdb_pc.h | 3 --- include/configs/socrates.h | 2 -- include/configs/vf610twr.h | 1 - include/i2c.h | 3 --- 75 files changed, 52 insertions(+), 38 deletions(-) diff --git a/README b/README index 0cf1c4991a4..c3308ec4d91 100644 --- a/README +++ b/README @@ -1302,11 +1302,6 @@ The following options need to be configured: will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1 - CONFIG_SYS_SPD_BUS_NUM - - If defined, then this indicates the I2C bus number for DDR SPD. - If not defined, then U-Boot assumes that SPD is on I2C bus 0. - CONFIG_SYS_RTC_BUS_NUM If defined, then this indicates the I2C bus number for the RTC. diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index dfedc1f35ab..a57da3e22ac 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -80,6 +80,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index fb71365692c..14f322f58fc 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -47,6 +47,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index 36231901347..ba9c8a05092 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -69,6 +69,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index ad30bbb3fc2..5948f699bc2 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -72,6 +72,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index 3e52bba8f53..ef7cc29b130 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -79,6 +79,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index 6770981aba8..2fe5b61d2cd 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -46,6 +46,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index c7b6008baac..573f799f5d7 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -68,6 +68,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index 68c7bccae62..086c34d0161 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -71,6 +71,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 84e8f65bd00..850a9746d84 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -81,6 +81,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 427073a8614..9ae73502c4f 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -48,6 +48,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 81231e10ba3..e26ffa2ae4e 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -70,6 +70,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index 9313a5281e7..1f3adaa5b2a 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -73,6 +73,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 2534a2e4900..b5d00173725 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -80,6 +80,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index 44f91fbf942..5118e83b6e0 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -47,6 +47,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index dba240c9d4f..1c8ebac4969 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -69,6 +69,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 800d094d21b..8354163bdec 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -72,6 +72,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 7d695afce36..4def5dc496e 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -78,6 +78,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 11894a149cb..87f4bf2c50c 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -68,6 +68,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index 86f41ca5e76..f5332eabc88 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -71,6 +71,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index de5b326f850..d6af6a82988 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -47,6 +47,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 54b78e8e182..2301d62d178 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -77,6 +77,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 70a7569ed59..87fb78c1821 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -67,6 +67,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 5c58c4a74c2..65de103a527 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -70,6 +70,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 247d28af795..4c3751e66eb 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -46,6 +46,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index fb5d582e4d1..9164276f946 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -80,6 +80,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index 98661bf3143..74d1235375b 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -70,6 +70,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEC001001 diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index b25b8da7c4f..11c9e11aae9 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -73,6 +73,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEC001001 diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index 92ae6347f16..d38c3e00e26 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -49,6 +49,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEC001001 diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index 00d5afa0bfe..459da473f64 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -82,6 +82,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 3cc100a28c6..3bc28d9d345 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -72,6 +72,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 0a61313e0b8..6158455af35 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -75,6 +75,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index 8804c7bff5f..8b521341625 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -51,6 +51,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 9a423882943..117382fe88e 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -81,6 +81,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 1cd2da10170..9c101e97374 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -71,6 +71,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 361b43645e6..4216eecf269 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -74,6 +74,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index b070cb0843c..e15213a9cb3 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -50,6 +50,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index 6da4e06ff90..9cf139f561c 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -48,6 +48,7 @@ CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index 828896290e7..223cd178111 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -48,6 +48,7 @@ CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index ea2e1ebe9a1..ed0f7a1f295 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -50,6 +50,7 @@ CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index 627795235b1..0a3937acca5 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -45,6 +45,7 @@ CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index 867f8aace4c..e87d506e1b5 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -47,6 +47,7 @@ CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index 59984c916bc..4b17f3614da 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -49,6 +49,7 @@ CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index 2733bb2cad9..5d6ffc5d1a3 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -44,6 +44,7 @@ CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index e7f9755efb8..dafb3ac2a0d 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -49,6 +49,7 @@ CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index 32c1065c879..083b2b39da6 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -48,6 +48,7 @@ CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index 054f43e4c36..270c5545c05 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -50,6 +50,7 @@ CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index 44abf8ff106..6ae3f7b522d 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -45,6 +45,7 @@ CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/drivers/ddr/Kconfig b/drivers/ddr/Kconfig index eec9d480b09..738b7884012 100644 --- a/drivers/ddr/Kconfig +++ b/drivers/ddr/Kconfig @@ -30,5 +30,10 @@ config DDR_SPD For memory controllers that can utilize it, add enable support for using the JEDEC SDP standard. +config SYS_SPD_BUS_NUM + int "I2C bus number for DDR SPD" + depends on DDR_SPD || SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY + default 0 + source "drivers/ddr/altera/Kconfig" source "drivers/ddr/imx/Kconfig" diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 5fba5bb198d..ce559e907c0 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -263,8 +263,6 @@ */ #if !CONFIG_IS_ENABLED(DM_I2C) #define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } -#else -#define CONFIG_SYS_SPD_BUS_NUM 0 #endif /* EEPROM */ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 53c719807d6..94fa3174de3 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -110,7 +110,6 @@ /* DDR Setup */ #define CONFIG_SYS_DDR_RAW_TIMING -#define CONFIG_SYS_SPD_BUS_NUM 1 #define SPD_EEPROM_ADDRESS 0x52 #define CONFIG_MEM_INIT_VALUE 0xDeadBeef diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 8e5d18f6cca..4e96d2a06b7 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -89,7 +89,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x52 #define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 3f32354038e..9d68f2568df 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -126,7 +126,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #if defined(CONFIG_TARGET_T1024RDB) -#define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ #elif defined(CONFIG_TARGET_T1023RDB) diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index bda25248621..f1738b32c5d 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -106,7 +106,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 0c13550ef23..eda03dad229 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -95,7 +95,6 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 5fb768ab92f..290fd7cf744 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -90,7 +90,6 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 6f5b7594299..29447e4895a 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -178,7 +178,6 @@ /* * DDR Setup */ -#define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS1 0x52 #define SPD_EEPROM_ADDRESS2 0x54 #define SPD_EEPROM_ADDRESS3 0x56 diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 034cd00381e..51bc772e238 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -92,7 +92,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SPD_BUS_NUM 1 #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 /* for p3041/p5010 */ diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 7430185666e..3927558467a 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -22,7 +22,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x54 /* POST memory regions test */ diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 798688a220b..3b4ddb0f94a 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -171,7 +171,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x54 #define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index e17bdcad6d0..dd389a9e16e 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -23,7 +23,6 @@ #endif #define SPD_EEPROM_ADDRESS 0x51 -#define CONFIG_SYS_SPD_BUS_NUM 0 #ifndef CONFIG_SYS_FSL_DDR4 #define CONFIG_SYS_DDR_RAW_TIMING diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index 75d655c50d6..e81384ab3f0 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -13,7 +13,6 @@ /* Physical Memory Map */ #define SPD_EEPROM_ADDRESS 0x51 -#define CONFIG_SYS_SPD_BUS_NUM 0 #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index edb4e64ee41..f39a9406556 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -12,8 +12,6 @@ /* Physical Memory Map */ -#define CONFIG_SYS_SPD_BUS_NUM 0 - #ifndef CONFIG_SPL #define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 6271135db9f..0e24209fbe9 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -13,7 +13,6 @@ /* Physical Memory Map */ #define SPD_EEPROM_ADDRESS 0x51 -#define CONFIG_SYS_SPD_BUS_NUM 0 #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 4ad62b43f8c..fdd251abcd1 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -14,7 +14,6 @@ /* Physical Memory Map */ #define SPD_EEPROM_ADDRESS 0x51 -#define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index e532c343f48..7c60f287981 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -16,7 +16,6 @@ #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS 0x51 -#define CONFIG_SYS_SPD_BUS_NUM 0 /* diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index aeadf534bc3..c0567c3fe58 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -17,7 +17,6 @@ #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS 0x51 -#define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 96da4ab2ec0..a0e2127f1dd 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -24,7 +24,6 @@ #define SPD_EEPROM_ADDRESS5 0x55 #define SPD_EEPROM_ADDRESS6 0x56 /* dummy address */ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 -#define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ #define CONFIG_SYS_NOR0_CSPR_EXT (0x0) #define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 835fff4bc60..9c4d2feb788 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -29,7 +29,6 @@ #define SPD_EEPROM_ADDRESS5 0x55 #define SPD_EEPROM_ADDRESS6 0x56 /* dummy address */ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 -#define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ #if !defined(CONFIG_FSL_QSPI) || defined(CONFIG_TFABOOT) diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 1669ecd2aba..bc3a0046ac6 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -31,7 +31,6 @@ #define SPD_EEPROM_ADDRESS5 0x55 #define SPD_EEPROM_ADDRESS6 0x56 #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 -#define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ #define CONFIG_SYS_MONITOR_LEN (936 * 1024) /* Miscellaneous configurable options */ diff --git a/include/configs/novena.h b/include/configs/novena.h index ee39b3c297c..9f18db465e1 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -39,7 +39,6 @@ /* I2C */ #define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_SPD_BUS_NUM 0 /* I2C EEPROM */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 1be548e20d2..6bc8a6aca03 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -116,7 +116,6 @@ /* DDR Setup */ #define CONFIG_SYS_DDR_RAW_TIMING -#define CONFIG_SYS_SPD_BUS_NUM 1 #define SPD_EEPROM_ADDRESS 0x52 #if defined(CONFIG_TARGET_P1020RDB_PD) @@ -346,8 +345,6 @@ #define CONFIG_SYS_I2C_NOPROBES { {0, 0x29} } #endif -#define CONFIG_SYS_SPD_BUS_NUM 1 /* For rom_loc and flash bank */ - /* * I2C2 EEPROM */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 73f82fc00ac..14f7bb9f713 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -118,8 +118,6 @@ #define CONFIG_SYS_LIME_BASE 0xc8000000 #define CONFIG_SYS_LIME_SIZE 0x04000000 /* 64 MB */ -#define CONFIG_SYS_SPD_BUS_NUM 0 - /* * General PCI * Memory space is mapped 1-1. diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index 7f4bfb5124a..32d9df0a00c 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -26,7 +26,6 @@ #define CONFIG_FEC_MXC_PHYADDR 0 /* I2C Configs */ -#define CONFIG_SYS_SPD_BUS_NUM 0 /* * We do have 128MB of memory on the Vybrid Tower board. Leave the last diff --git a/include/i2c.h b/include/i2c.h index 22add0b5282..e0ee94e5504 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -647,9 +647,6 @@ void i2c_early_init_f(void); #if !defined(CONFIG_SYS_RTC_BUS_NUM) #define CONFIG_SYS_RTC_BUS_NUM 0 #endif -#if !defined(CONFIG_SYS_SPD_BUS_NUM) -#define CONFIG_SYS_SPD_BUS_NUM 0 -#endif struct i2c_adapter { void (*init)(struct i2c_adapter *adap, int speed, -- GitLab From c24e8e2bb34da1fa17d19acf2b542dba5dfb7e47 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 15 Jun 2022 12:03:55 -0400 Subject: [PATCH 465/581] Convert CONFIG_SYS_DDR_RAW_TIMING to Kconfig This converts the following to Kconfig: CONFIG_SYS_DDR_RAW_TIMING Signed-off-by: Tom Rini --- README | 6 ------ configs/P1010RDB-PA_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PA_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PA_NAND_defconfig | 1 + configs/P1010RDB-PA_NOR_defconfig | 1 + configs/P1010RDB-PA_SDCARD_defconfig | 1 + configs/P1010RDB-PA_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PB_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_NAND_defconfig | 1 + configs/P1010RDB-PB_NOR_defconfig | 1 + configs/P1010RDB-PB_SDCARD_defconfig | 1 + configs/P1010RDB-PB_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_defconfig | 1 + configs/P1020RDB-PC_NAND_defconfig | 1 + configs/P1020RDB-PC_SDCARD_defconfig | 1 + configs/P1020RDB-PC_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_defconfig | 1 + configs/P1020RDB-PD_NAND_defconfig | 1 + configs/P1020RDB-PD_SDCARD_defconfig | 1 + configs/P1020RDB-PD_SPIFLASH_defconfig | 1 + configs/P1020RDB-PD_defconfig | 1 + configs/P2020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_36BIT_defconfig | 1 + configs/P2020RDB-PC_NAND_defconfig | 1 + configs/P2020RDB-PC_SDCARD_defconfig | 1 + configs/P2020RDB-PC_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_defconfig | 1 + configs/ls1021aqds_nand_defconfig | 1 + configs/ls1021aqds_nor_SECURE_BOOT_defconfig | 1 + configs/ls1021aqds_nor_defconfig | 1 + configs/ls1021aqds_nor_lpuart_defconfig | 1 + configs/ls1021aqds_qspi_defconfig | 1 + configs/ls1021aqds_sdcard_ifc_defconfig | 1 + configs/ls1021aqds_sdcard_qspi_defconfig | 1 + configs/ls1043ardb_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_defconfig | 1 + configs/ls1043ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_tfa_defconfig | 1 + drivers/ddr/fsl/Kconfig | 7 +++++++ include/configs/P1010RDB.h | 1 - include/configs/T102xRDB.h | 1 - include/configs/ls1021aqds.h | 4 ---- include/configs/ls1043ardb.h | 1 - include/configs/ls2080a_common.h | 4 ---- include/configs/p1_p2_rdb_pc.h | 1 - 55 files changed, 54 insertions(+), 18 deletions(-) diff --git a/README b/README index c3308ec4d91..f3d4a9c2b22 100644 --- a/README +++ b/README @@ -2079,12 +2079,6 @@ Low Level (hardware related) configuration options: one, specify here. Note that the value must resolve to something your driver can deal with. -- CONFIG_SYS_DDR_RAW_TIMING - Get DDR timing information from other than SPD. Common with - soldered DDR chips onboard without SPD. DDR raw timing - parameters are extracted from datasheet and hard-coded into - header files or board specific files. - - CONFIG_FSL_DDR_INTERACTIVE Enable interactive DDR debugging. See doc/README.fsl-ddr. diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index a57da3e22ac..121bb0cec92 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -82,6 +82,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index 14f322f58fc..ee6952e1707 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -49,6 +49,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index ba9c8a05092..8343e94748d 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -71,6 +71,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index 5948f699bc2..7336c3096ed 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -74,6 +74,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index ef7cc29b130..e77a790f523 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -81,6 +81,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index 2fe5b61d2cd..08cde4e2104 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -48,6 +48,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 573f799f5d7..06e39bc74c0 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -70,6 +70,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index 086c34d0161..b241d1f719f 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -73,6 +73,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 850a9746d84..7b67bc087f0 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -83,6 +83,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 9ae73502c4f..59125f2448f 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -50,6 +50,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index e26ffa2ae4e..c37eba17714 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -72,6 +72,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index 1f3adaa5b2a..906b48f2433 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -75,6 +75,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index b5d00173725..726de841048 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -82,6 +82,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index 5118e83b6e0..3d4fb2cc7c6 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -49,6 +49,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index 1c8ebac4969..ca5abd4ed10 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -71,6 +71,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 8354163bdec..e8d963bdb27 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -74,6 +74,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 4def5dc496e..c2a9a15cfa8 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -80,6 +80,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 CONFIG_SYS_OR0_PRELIM=0xFFFF8396 diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 87f4bf2c50c..d4ef3d9812d 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -70,6 +70,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index f5332eabc88..216429e989c 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -73,6 +73,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index d6af6a82988..7593507894c 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -49,6 +49,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 2301d62d178..2789ce99019 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -79,6 +79,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 CONFIG_SYS_OR0_PRELIM=0xFFFF8396 diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 87fb78c1821..944bf2379c5 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -69,6 +69,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 65de103a527..8ed7a7ad364 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -72,6 +72,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 4c3751e66eb..49c6037d4bf 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -48,6 +48,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index 9164276f946..f428c68e683 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -82,6 +82,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=2 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 CONFIG_SYS_OR0_PRELIM=0xFFFF8796 diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index 74d1235375b..9eab122f7ad 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -72,6 +72,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=2 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEC001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index 11c9e11aae9..ea2784da178 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -75,6 +75,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=2 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEC001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index d38c3e00e26..b63da1e9e2d 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -51,6 +51,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=2 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEC001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index 459da473f64..4dacb20a7c5 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -84,6 +84,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 CONFIG_SYS_OR0_PRELIM=0xFFFF8396 diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 3bc28d9d345..2c4c5483732 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -74,6 +74,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 6158455af35..ee6768b901a 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -77,6 +77,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index 8b521341625..2b5bc851602 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -53,6 +53,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 117382fe88e..022684cc40d 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -83,6 +83,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 CONFIG_SYS_OR0_PRELIM=0xFFFF8396 diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 9c101e97374..ca0c9025c7d 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -73,6 +73,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 4216eecf269..2bc755b83d4 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -76,6 +76,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index e15213a9cb3..fef773cb163 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -52,6 +52,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index cfa81baff60..9ab66cd53c2 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -95,6 +95,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig index ad7e390b5c4..d72af5de15e 100644 --- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig @@ -62,6 +62,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig index 1434817e1c4..42708b70f6b 100644 --- a/configs/ls1021aqds_nor_defconfig +++ b/configs/ls1021aqds_nor_defconfig @@ -65,6 +65,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig index 9bfbe2eff97..925b376086f 100644 --- a/configs/ls1021aqds_nor_lpuart_defconfig +++ b/configs/ls1021aqds_nor_lpuart_defconfig @@ -65,6 +65,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig index 02d056f4e6c..4e24e43c2fc 100644 --- a/configs/ls1021aqds_qspi_defconfig +++ b/configs/ls1021aqds_qspi_defconfig @@ -62,6 +62,7 @@ CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index 164e8b01768..d5f6c5c25cf 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -93,6 +93,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index 8a6357b0b21..addd100b2b2 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -89,6 +89,7 @@ CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index 7f4729fe7df..aeebd383af6 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -45,6 +45,7 @@ CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y # CONFIG_DDR_SPD is not set CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig index 454f3dccbba..243a03030a9 100644 --- a/configs/ls1043ardb_defconfig +++ b/configs/ls1043ardb_defconfig @@ -49,6 +49,7 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y # CONFIG_DDR_SPD is not set CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig index 34f6952f43d..e92c09976df 100644 --- a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig @@ -44,6 +44,7 @@ CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y # CONFIG_DDR_SPD is not set CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/ls1043ardb_tfa_defconfig b/configs/ls1043ardb_tfa_defconfig index 5d361831959..e065c723665 100644 --- a/configs/ls1043ardb_tfa_defconfig +++ b/configs/ls1043ardb_tfa_defconfig @@ -51,6 +51,7 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y # CONFIG_DDR_SPD is not set CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig index 6a29b23bab7..d93ed8d2feb 100644 --- a/drivers/ddr/fsl/Kconfig +++ b/drivers/ddr/fsl/Kconfig @@ -175,6 +175,13 @@ config ECC_INIT_VIA_DDRCONTROLLER Use the DDR controller to auto initialize memory. If not enabled, the DMA controller is responsible for doing this. +config SYS_DDR_RAW_TIMING + bool "Get DDR timing information from something other than SPD" + help + This is common with soldered DDR chips onboard without SPD. DDR raw + timing parameters are extracted from datasheet and hard-coded into + header files or board specific files. + endif menu "PowerPC / M68K initial memory controller definitions (FLASH, SDRAM, etc)" diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 94fa3174de3..200b88050cc 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -109,7 +109,6 @@ #define CONFIG_L2_CACHE /* toggle L2 cache */ /* DDR Setup */ -#define CONFIG_SYS_DDR_RAW_TIMING #define SPD_EEPROM_ADDRESS 0x52 #define CONFIG_MEM_INIT_VALUE 0xDeadBeef diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 9d68f2568df..2ccfd87bfb0 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -129,7 +129,6 @@ #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ #elif defined(CONFIG_TARGET_T1023RDB) -#define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_SYS_SDRAM_SIZE 2048 #endif diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index dd389a9e16e..012b47116b9 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -24,10 +24,6 @@ #define SPD_EEPROM_ADDRESS 0x51 -#ifndef CONFIG_SYS_FSL_DDR4 -#define CONFIG_SYS_DDR_RAW_TIMING -#endif - #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index f39a9406556..411721c1254 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -13,7 +13,6 @@ /* Physical Memory Map */ #ifndef CONFIG_SPL -#define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index f9eb829cda2..d2978713e6b 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -16,10 +16,6 @@ /* Link Definitions */ -#ifndef CONFIG_SYS_FSL_DDR4 -#define CONFIG_SYS_DDR_RAW_TIMING -#endif - #define CONFIG_SYS_FSL_DDR_INTLV_256B /* force 256 byte interleaving */ #define CONFIG_VERY_BIG_RAM diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 6bc8a6aca03..cb1b170a45b 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -115,7 +115,6 @@ #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_SYS_DDR_RAW_TIMING #define SPD_EEPROM_ADDRESS 0x52 #if defined(CONFIG_TARGET_P1020RDB_PD) -- GitLab From f96096d0dcb861e42cd74c5952101d27cb4bb705 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 16 Jun 2022 14:04:33 -0400 Subject: [PATCH 466/581] Convert CONFIG_EXTRA_CLOCK to Kconfig This converts the following to Kconfig: CONFIG_EXTRA_CLOCK Signed-off-by: Tom Rini --- board/sysam/stmark2/Kconfig | 3 +++ include/configs/stmark2.h | 1 - 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/board/sysam/stmark2/Kconfig b/board/sysam/stmark2/Kconfig index 4abcdb3aaf1..49d02744a9a 100644 --- a/board/sysam/stmark2/Kconfig +++ b/board/sysam/stmark2/Kconfig @@ -3,6 +3,9 @@ if TARGET_STMARK2 config CF_SBF def_bool y +config EXTRA_CLOCK + def_bool y + config SYS_INPUT_CLKSRC hex default 30000000 diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index 2195feeb658..797d9bbb4af 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -41,7 +41,6 @@ #define CONFIG_SYS_SBFHDR_SIZE 0x7 /* Input, PCI, Flexbus, and VCO */ -#define CONFIG_EXTRA_CLOCK #define CONFIG_PRAM 2048 /* 2048 KB */ -- GitLab From 1e7750f1bc8005844c937e0ca6feaef45743f0c8 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 16 Jun 2022 14:04:34 -0400 Subject: [PATCH 467/581] Convert CONFIG_HETROGENOUS_CLUSTERS et al to Kconfig This converts the following to Kconfig: CONFIG_HETROGENOUS_CLUSTERS CONFIG_SYS_MAPLE CONFIG_SYS_CPRI CONFIG_PPC_CLUSTER_START CONFIG_DSP_CLUSTER_START CONFIG_SYS_CPRI_CLK CONFIG_SYS_ULB_CLK CONFIG_SYS_ETVPE_CLK Signed-off-by: Tom Rini --- arch/powerpc/cpu/mpc85xx/Kconfig | 34 +++++++++++++++++++++++ arch/powerpc/include/asm/config_mpc85xx.h | 8 ------ 2 files changed, 34 insertions(+), 8 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 5510bc72878..2cc0185c377 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -187,6 +187,7 @@ config ARCH_B4420 select E500MC select E6500 select FSL_LAW + select HETROGENOUS_CLUSTERS select SYS_FSL_DDR_VER_47 select SYS_FSL_ERRATUM_A004477 select SYS_FSL_ERRATUM_A005871 @@ -214,6 +215,7 @@ config ARCH_B4860 select E500MC select E6500 select FSL_LAW + select HETROGENOUS_CLUSTERS select SYS_FSL_DDR_VER_47 select SYS_FSL_ERRATUM_A004477 select SYS_FSL_ERRATUM_A005871 @@ -822,6 +824,9 @@ config FSL_LAW help Use Freescale common code for Local Access Window +config HETROGENOUS_CLUSTERS + bool + config NXP_ESBC bool "NXP_ESBC" help @@ -1121,6 +1126,35 @@ config SYS_NUM_TLBCAMS Number of TLB CAM entries for Book-E chips. 64 for E500MC, 16 for other E500 SoCs. +if HETROGENOUS_CLUSTERS + +config SYS_MAPLE + def_bool y + +config SYS_CPRI + def_bool y + +config PPC_CLUSTER_START + int + default 0 + +config DSP_CLUSTER_START + int + default 1 + +config SYS_CPRI_CLK + int + default 3 + +config SYS_ULB_CLK + int + default 4 + +config SYS_ETVPE_CLK + int + default 1 +endif + config BACKSIDE_L2_CACHE bool diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 06f66d02de2..225befb3a5e 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -206,19 +206,11 @@ #elif defined(CONFIG_ARCH_B4860) || defined(CONFIG_ARCH_B4420) #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ #define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */ -#define CONFIG_HETROGENOUS_CLUSTERS /* DSP/SC3900 core clusters */ -#define CONFIG_PPC_CLUSTER_START 0 /*Start index of ppc clusters*/ -#define CONFIG_DSP_CLUSTER_START 1 /*Start index of dsp clusters*/ #define CONFIG_SYS_FSL_SRDS_1 #define CONFIG_SYS_FSL_SRDS_2 -#define CONFIG_SYS_MAPLE -#define CONFIG_SYS_CPRI #define CONFIG_SYS_FSL_NUM_CC_PLLS 5 #define CONFIG_SYS_NUM_FMAN 1 #define CONFIG_SYS_FM1_CLK 0 -#define CONFIG_SYS_CPRI_CLK 3 -#define CONFIG_SYS_ULB_CLK 4 -#define CONFIG_SYS_ETVPE_CLK 1 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 4 #define CONFIG_SYS_FMAN_V3 #define CONFIG_SYS_FM_MURAM_SIZE 0x60000 -- GitLab From 93145335fbf5cbe7f6b1ca42263a156620a37f7f Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 16 Jun 2022 14:04:35 -0400 Subject: [PATCH 468/581] nxp: Make board/freescale/common/Kconfig safe to include once in arch/Kconfig The way that we use this file currently means that we have to guard it in every platform Kconfig. But it is also required in all NXP platforms, including non-reference platforms. Make all options in it have appropriate dependencies so that we can include it a single time under arch/Kconfig Signed-off-by: Tom Rini --- arch/Kconfig | 1 + board/advantech/imx8mp_rsb3720a1/Kconfig | 2 -- board/advantech/imx8qm_rom7720_a1/Kconfig | 2 -- board/beacon/imx8mm/Kconfig | 2 -- board/beacon/imx8mn/Kconfig | 2 -- board/bsh/imx8mn_smm_s2/Kconfig | 4 ---- board/engicam/imx8mm/Kconfig | 2 -- board/freescale/common/Kconfig | 12 ++++++++---- board/freescale/corenet_ds/Kconfig | 6 ------ board/freescale/imx8mn_evk/Kconfig | 2 -- board/freescale/imx8mp_evk/Kconfig | 2 -- board/freescale/imx8qm_mek/Kconfig | 2 -- board/freescale/imx8qxp_mek/Kconfig | 2 -- board/freescale/imx8ulp_evk/Kconfig | 2 -- board/freescale/ls1012afrdm/Kconfig | 4 ---- board/freescale/ls1012aqds/Kconfig | 3 --- board/freescale/ls1012ardb/Kconfig | 4 ---- board/freescale/ls1021aiot/Kconfig | 2 -- board/freescale/ls1021aqds/Kconfig | 2 -- board/freescale/ls1021atsn/Kconfig | 2 -- board/freescale/ls1021atwr/Kconfig | 2 -- board/freescale/ls1028a/Kconfig | 4 ---- board/freescale/ls1043aqds/Kconfig | 2 -- board/freescale/ls1043ardb/Kconfig | 2 -- board/freescale/ls1046afrwy/Kconfig | 1 - board/freescale/ls1046aqds/Kconfig | 2 -- board/freescale/ls1046ardb/Kconfig | 1 - board/freescale/ls1088a/Kconfig | 2 -- board/freescale/ls2080aqds/Kconfig | 2 -- board/freescale/ls2080ardb/Kconfig | 4 ---- board/freescale/lx2160a/Kconfig | 3 --- board/freescale/p1010rdb/Kconfig | 2 -- board/freescale/p1_p2_rdb_pc/Kconfig | 2 -- board/freescale/p2041rdb/Kconfig | 2 -- board/freescale/t102xrdb/Kconfig | 2 -- board/freescale/t104xrdb/Kconfig | 2 -- board/freescale/t208xqds/Kconfig | 2 -- board/freescale/t208xrdb/Kconfig | 2 -- board/freescale/t4rdb/Kconfig | 2 -- board/variscite/imx8mn_var_som/Kconfig | 2 -- configs/kmcent2_defconfig | 1 + configs/pg_wcom_expu1_defconfig | 1 + configs/pg_wcom_expu1_update_defconfig | 1 + configs/pg_wcom_seli8_defconfig | 1 + configs/pg_wcom_seli8_update_defconfig | 1 + 45 files changed, 14 insertions(+), 94 deletions(-) diff --git a/arch/Kconfig b/arch/Kconfig index d35a590f93c..1ad61ab345a 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -451,6 +451,7 @@ source "arch/x86/Kconfig" source "arch/xtensa/Kconfig" source "arch/riscv/Kconfig" +source "board/freescale/common/Kconfig" source "board/keymile/Kconfig" if MIPS || MICROBLAZE diff --git a/board/advantech/imx8mp_rsb3720a1/Kconfig b/board/advantech/imx8mp_rsb3720a1/Kconfig index 4486ed6d335..95cac7c4f09 100644 --- a/board/advantech/imx8mp_rsb3720a1/Kconfig +++ b/board/advantech/imx8mp_rsb3720a1/Kconfig @@ -9,6 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "imx8mp_rsb3720" -source "board/freescale/common/Kconfig" - endif diff --git a/board/advantech/imx8qm_rom7720_a1/Kconfig b/board/advantech/imx8qm_rom7720_a1/Kconfig index 8bf3a7d3484..c846537f743 100644 --- a/board/advantech/imx8qm_rom7720_a1/Kconfig +++ b/board/advantech/imx8qm_rom7720_a1/Kconfig @@ -12,6 +12,4 @@ config SYS_CONFIG_NAME config IMX_CONFIG default "board/advantech/imx8qm_rom7720_a1/imximage.cfg" -source "board/freescale/common/Kconfig" - endif diff --git a/board/beacon/imx8mm/Kconfig b/board/beacon/imx8mm/Kconfig index 63f064e8cb8..e5d8aa3ec9c 100644 --- a/board/beacon/imx8mm/Kconfig +++ b/board/beacon/imx8mm/Kconfig @@ -12,6 +12,4 @@ config SYS_CONFIG_NAME config IMX_CONFIG default "board/beacon/imx8mm/imximage-8mm-lpddr4.cfg" -source "board/freescale/common/Kconfig" - endif diff --git a/board/beacon/imx8mn/Kconfig b/board/beacon/imx8mn/Kconfig index fb301397b1a..e11286c5c3a 100644 --- a/board/beacon/imx8mn/Kconfig +++ b/board/beacon/imx8mn/Kconfig @@ -18,6 +18,4 @@ config IMX8MN_BEACON_2GB_LPDDR config IMX_CONFIG default "board/beacon/imx8mn/imximage-8mn-lpddr4.cfg" -source "board/freescale/common/Kconfig" - endif diff --git a/board/bsh/imx8mn_smm_s2/Kconfig b/board/bsh/imx8mn_smm_s2/Kconfig index f43d058f218..041a9c78a66 100644 --- a/board/bsh/imx8mn_smm_s2/Kconfig +++ b/board/bsh/imx8mn_smm_s2/Kconfig @@ -22,8 +22,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select BSH_SMM_S2_DDR3L_256 -source "board/freescale/common/Kconfig" - endif if TARGET_IMX8MN_BSH_SMM_S2PRO @@ -44,6 +42,4 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select BSH_SMM_S2_DDR3L_512 -source "board/freescale/common/Kconfig" - endif diff --git a/board/engicam/imx8mm/Kconfig b/board/engicam/imx8mm/Kconfig index 5495b3bf99b..3b3b93bb2f0 100644 --- a/board/engicam/imx8mm/Kconfig +++ b/board/engicam/imx8mm/Kconfig @@ -12,6 +12,4 @@ config SYS_CONFIG_NAME config IMX_CONFIG default "arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg" -source "board/freescale/common/Kconfig" - endif diff --git a/board/freescale/common/Kconfig b/board/freescale/common/Kconfig index 195fc471a5b..85acdde4436 100644 --- a/board/freescale/common/Kconfig +++ b/board/freescale/common/Kconfig @@ -16,7 +16,8 @@ config CHAIN_OF_TRUST config CMD_ESBC_VALIDATE bool "Enable the 'esbc_validate' and 'esbc_halt' commands" - default y if CHAIN_OF_TRUST + depends on CHAIN_OF_TRUST + default y help This option enables two commands used for secure booting: @@ -25,26 +26,28 @@ config CMD_ESBC_VALIDATE config DEEP_SLEEP bool "Enable SoC deep sleep feature" - default y if ARCH_T1024 || ARCH_T1040 || ARCH_T1042 || ARCH_LS1021A + depends on ARCH_T1024 || ARCH_T1040 || ARCH_T1042 || ARCH_LS1021A + default y help Indicates this SoC supports deep sleep feature. If deep sleep is supported, core will start to execute uboot when wakes up. config FSL_USE_PCA9547_MUX bool "Enable PCA9547 I2C Mux on Freescale boards" + depends on PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3 help This option enables the PCA9547 I2C mux on Freescale boards. config VID bool "Enable Freescale VID" - depends on I2C || DM_I2C + depends on (PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3) && (I2C || DM_I2C) help This option enables setting core voltage based on individual values saved in SoC fuses. config SPL_VID bool "Enable Freescale VID in SPL" - depends on I2C || DM_I2C + depends on (PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3) && (SPL_I2C || DM_SPL_I2C) help This option enables setting core voltage based on individual values saved in SoC fuses, in SPL. @@ -103,6 +106,7 @@ endif config FSL_QIXIS bool "Enable QIXIS support" + depends on PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3 config QIXIS_I2C_ACCESS bool "Access to QIXIS is over i2c" diff --git a/board/freescale/corenet_ds/Kconfig b/board/freescale/corenet_ds/Kconfig index e92b0d099da..dbcd1afcbad 100644 --- a/board/freescale/corenet_ds/Kconfig +++ b/board/freescale/corenet_ds/Kconfig @@ -9,8 +9,6 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "P3041DS" -source "board/freescale/common/Kconfig" - endif if TARGET_P4080DS @@ -24,8 +22,6 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "P4080DS" -source "board/freescale/common/Kconfig" - endif if TARGET_P5040DS @@ -39,6 +35,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "P5040DS" -source "board/freescale/common/Kconfig" - endif diff --git a/board/freescale/imx8mn_evk/Kconfig b/board/freescale/imx8mn_evk/Kconfig index 0adf87bd42a..a148a9b998c 100644 --- a/board/freescale/imx8mn_evk/Kconfig +++ b/board/freescale/imx8mn_evk/Kconfig @@ -15,6 +15,4 @@ config IMX8MN_LOW_DRIVE_MODE config IMX_CONFIG default "board/freescale/imx8mn_evk/imximage-8mn-ddr4.cfg" -source "board/freescale/common/Kconfig" - endif diff --git a/board/freescale/imx8mp_evk/Kconfig b/board/freescale/imx8mp_evk/Kconfig index 42625fd5888..cafa6329a40 100644 --- a/board/freescale/imx8mp_evk/Kconfig +++ b/board/freescale/imx8mp_evk/Kconfig @@ -12,6 +12,4 @@ config SYS_CONFIG_NAME config IMX_CONFIG default "board/freescale/imx8mp_evk/imximage-8mp-lpddr4.cfg" -source "board/freescale/common/Kconfig" - endif diff --git a/board/freescale/imx8qm_mek/Kconfig b/board/freescale/imx8qm_mek/Kconfig index aed6ab25ce1..5f2413f8dbf 100644 --- a/board/freescale/imx8qm_mek/Kconfig +++ b/board/freescale/imx8qm_mek/Kconfig @@ -12,6 +12,4 @@ config SYS_CONFIG_NAME config IMX_CONFIG default "board/freescale/imx8qm_mek/imximage.cfg" -source "board/freescale/common/Kconfig" - endif diff --git a/board/freescale/imx8qxp_mek/Kconfig b/board/freescale/imx8qxp_mek/Kconfig index b9aab3789ee..6533b4d9535 100644 --- a/board/freescale/imx8qxp_mek/Kconfig +++ b/board/freescale/imx8qxp_mek/Kconfig @@ -12,6 +12,4 @@ config SYS_CONFIG_NAME config IMX_CONFIG default "board/freescale/imx8qxp_mek/imximage.cfg" -source "board/freescale/common/Kconfig" - endif diff --git a/board/freescale/imx8ulp_evk/Kconfig b/board/freescale/imx8ulp_evk/Kconfig index 1e461ee1da7..4637b969be6 100644 --- a/board/freescale/imx8ulp_evk/Kconfig +++ b/board/freescale/imx8ulp_evk/Kconfig @@ -9,6 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "imx8ulp_evk" -source "board/freescale/common/Kconfig" - endif diff --git a/board/freescale/ls1012afrdm/Kconfig b/board/freescale/ls1012afrdm/Kconfig index 4ac69d71174..75de782afc9 100644 --- a/board/freescale/ls1012afrdm/Kconfig +++ b/board/freescale/ls1012afrdm/Kconfig @@ -89,7 +89,3 @@ config SYS_LS_PFE_ESBC_LENGTH hex "length of PFE Firmware HDR" default 0xc00 endif - -if TARGET_LS1012AFRDM || TARGET_LS1012AFRWY -source "board/freescale/common/Kconfig" -endif diff --git a/board/freescale/ls1012aqds/Kconfig b/board/freescale/ls1012aqds/Kconfig index 59b1a876655..991ba6044db 100644 --- a/board/freescale/ls1012aqds/Kconfig +++ b/board/freescale/ls1012aqds/Kconfig @@ -77,7 +77,4 @@ config PFE_SGMII_2500_PHY2_ADDR endif - -source "board/freescale/common/Kconfig" - endif diff --git a/board/freescale/ls1012ardb/Kconfig b/board/freescale/ls1012ardb/Kconfig index c4acea3ae2d..aa15f5a027e 100644 --- a/board/freescale/ls1012ardb/Kconfig +++ b/board/freescale/ls1012ardb/Kconfig @@ -63,8 +63,6 @@ config PFE_EMAC2_PHY_ADDR endif -source "board/freescale/common/Kconfig" - endif if TARGET_LS1012A2G5RDB @@ -119,6 +117,4 @@ config PFE_EMAC2_PHY_ADDR endif -source "board/freescale/common/Kconfig" - endif diff --git a/board/freescale/ls1021aiot/Kconfig b/board/freescale/ls1021aiot/Kconfig index c6b16063a4a..4a12c1687fc 100644 --- a/board/freescale/ls1021aiot/Kconfig +++ b/board/freescale/ls1021aiot/Kconfig @@ -12,6 +12,4 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1021aiot" -source "board/freescale/common/Kconfig" - endif diff --git a/board/freescale/ls1021aqds/Kconfig b/board/freescale/ls1021aqds/Kconfig index 60b8472990d..119b9550410 100644 --- a/board/freescale/ls1021aqds/Kconfig +++ b/board/freescale/ls1021aqds/Kconfig @@ -12,6 +12,4 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1021aqds" -source "board/freescale/common/Kconfig" - endif diff --git a/board/freescale/ls1021atsn/Kconfig b/board/freescale/ls1021atsn/Kconfig index d999fa46900..aa42a06c663 100644 --- a/board/freescale/ls1021atsn/Kconfig +++ b/board/freescale/ls1021atsn/Kconfig @@ -13,6 +13,4 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1021atsn" -source "board/freescale/common/Kconfig" - endif diff --git a/board/freescale/ls1021atwr/Kconfig b/board/freescale/ls1021atwr/Kconfig index a4641cbca09..bc50b8d9668 100644 --- a/board/freescale/ls1021atwr/Kconfig +++ b/board/freescale/ls1021atwr/Kconfig @@ -12,6 +12,4 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1021atwr" -source "board/freescale/common/Kconfig" - endif diff --git a/board/freescale/ls1028a/Kconfig b/board/freescale/ls1028a/Kconfig index 40939816ad8..5c27f0f726d 100644 --- a/board/freescale/ls1028a/Kconfig +++ b/board/freescale/ls1028a/Kconfig @@ -32,8 +32,6 @@ config SYS_LS_PPA_ESBC_ADDR endif endif -source "board/freescale/common/Kconfig" - endif if TARGET_LS1028ARDB @@ -58,6 +56,4 @@ config SYS_TEXT_BASE default 0x82000000 if TFABOOT default 0x20100000 -source "board/freescale/common/Kconfig" - endif diff --git a/board/freescale/ls1043aqds/Kconfig b/board/freescale/ls1043aqds/Kconfig index 182900efb7b..4be445e8c8f 100644 --- a/board/freescale/ls1043aqds/Kconfig +++ b/board/freescale/ls1043aqds/Kconfig @@ -28,6 +28,4 @@ config SYS_LS_PPA_ESBC_ADDR endif endif -source "board/freescale/common/Kconfig" - endif diff --git a/board/freescale/ls1043ardb/Kconfig b/board/freescale/ls1043ardb/Kconfig index d66c7804b13..56502f9f9c6 100644 --- a/board/freescale/ls1043ardb/Kconfig +++ b/board/freescale/ls1043ardb/Kconfig @@ -27,6 +27,4 @@ config SYS_LS_PPA_ESBC_ADDR endif endif -source "board/freescale/common/Kconfig" - endif diff --git a/board/freescale/ls1046afrwy/Kconfig b/board/freescale/ls1046afrwy/Kconfig index 6a4c3e92f7b..68329d78caf 100644 --- a/board/freescale/ls1046afrwy/Kconfig +++ b/board/freescale/ls1046afrwy/Kconfig @@ -13,5 +13,4 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1046afrwy" -source "board/freescale/common/Kconfig" endif diff --git a/board/freescale/ls1046aqds/Kconfig b/board/freescale/ls1046aqds/Kconfig index 1616dcc683e..adf325f4efd 100644 --- a/board/freescale/ls1046aqds/Kconfig +++ b/board/freescale/ls1046aqds/Kconfig @@ -28,6 +28,4 @@ config SYS_LS_PPA_ESBC_ADDR endif endif -source "board/freescale/common/Kconfig" - endif diff --git a/board/freescale/ls1046ardb/Kconfig b/board/freescale/ls1046ardb/Kconfig index 4c31e0e8857..1fb391c991c 100644 --- a/board/freescale/ls1046ardb/Kconfig +++ b/board/freescale/ls1046ardb/Kconfig @@ -27,5 +27,4 @@ config SYS_LS_PPA_ESBC_ADDR endif endif -source "board/freescale/common/Kconfig" endif diff --git a/board/freescale/ls1088a/Kconfig b/board/freescale/ls1088a/Kconfig index 8bb828e3fd6..f1a45236061 100644 --- a/board/freescale/ls1088a/Kconfig +++ b/board/freescale/ls1088a/Kconfig @@ -26,7 +26,6 @@ config SYS_LS_PPA_ESBC_ADDR endif endif -source "board/freescale/common/Kconfig" endif if TARGET_LS1088ARDB @@ -57,5 +56,4 @@ config SYS_LS_PPA_ESBC_ADDR endif endif -source "board/freescale/common/Kconfig" endif diff --git a/board/freescale/ls2080aqds/Kconfig b/board/freescale/ls2080aqds/Kconfig index 6b2b64581d6..1036f33c61f 100644 --- a/board/freescale/ls2080aqds/Kconfig +++ b/board/freescale/ls2080aqds/Kconfig @@ -29,6 +29,4 @@ config SYS_LS_PPA_ESBC_ADDR endif endif -source "board/freescale/common/Kconfig" - endif diff --git a/board/freescale/ls2080ardb/Kconfig b/board/freescale/ls2080ardb/Kconfig index 678d5825730..c8b0b94596b 100644 --- a/board/freescale/ls2080ardb/Kconfig +++ b/board/freescale/ls2080ardb/Kconfig @@ -12,8 +12,6 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls2080ardb" -source "board/freescale/common/Kconfig" - if FSL_LS_PPA config SYS_LS_PPA_FW_ADDR hex "PPA Firmware Addr" @@ -30,6 +28,4 @@ config SYS_LS_PPA_ESBC_ADDR endif endif -source "board/freescale/common/Kconfig" - endif diff --git a/board/freescale/lx2160a/Kconfig b/board/freescale/lx2160a/Kconfig index 7556f7dd215..0e4b4158a7f 100644 --- a/board/freescale/lx2160a/Kconfig +++ b/board/freescale/lx2160a/Kconfig @@ -12,7 +12,6 @@ config SYS_SOC config SYS_CONFIG_NAME default "lx2160ardb" -source "board/freescale/common/Kconfig" endif if TARGET_LX2160AQDS @@ -29,7 +28,6 @@ config SYS_SOC config SYS_CONFIG_NAME default "lx2160aqds" -source "board/freescale/common/Kconfig" endif if TARGET_LX2162AQDS @@ -46,5 +44,4 @@ config SYS_SOC config SYS_CONFIG_NAME default "lx2162aqds" -source "board/freescale/common/Kconfig" endif diff --git a/board/freescale/p1010rdb/Kconfig b/board/freescale/p1010rdb/Kconfig index 3adac4af1e3..159bcc4f54d 100644 --- a/board/freescale/p1010rdb/Kconfig +++ b/board/freescale/p1010rdb/Kconfig @@ -9,6 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "P1010RDB" -source "board/freescale/common/Kconfig" - endif diff --git a/board/freescale/p1_p2_rdb_pc/Kconfig b/board/freescale/p1_p2_rdb_pc/Kconfig index db7b47a4635..cd36150f637 100644 --- a/board/freescale/p1_p2_rdb_pc/Kconfig +++ b/board/freescale/p1_p2_rdb_pc/Kconfig @@ -11,6 +11,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "p1_p2_rdb_pc" -source "board/freescale/common/Kconfig" - endif diff --git a/board/freescale/p2041rdb/Kconfig b/board/freescale/p2041rdb/Kconfig index 7e187dde725..78e11214a5b 100644 --- a/board/freescale/p2041rdb/Kconfig +++ b/board/freescale/p2041rdb/Kconfig @@ -9,6 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "P2041RDB" -source "board/freescale/common/Kconfig" - endif diff --git a/board/freescale/t102xrdb/Kconfig b/board/freescale/t102xrdb/Kconfig index 6deeb248a30..d538386d434 100644 --- a/board/freescale/t102xrdb/Kconfig +++ b/board/freescale/t102xrdb/Kconfig @@ -9,6 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "T102xRDB" -source "board/freescale/common/Kconfig" - endif diff --git a/board/freescale/t104xrdb/Kconfig b/board/freescale/t104xrdb/Kconfig index e6e46fa126f..e33d3173650 100644 --- a/board/freescale/t104xrdb/Kconfig +++ b/board/freescale/t104xrdb/Kconfig @@ -11,6 +11,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "T104xRDB" -source "board/freescale/common/Kconfig" - endif diff --git a/board/freescale/t208xqds/Kconfig b/board/freescale/t208xqds/Kconfig index 58a31b65278..c419a59dbb6 100644 --- a/board/freescale/t208xqds/Kconfig +++ b/board/freescale/t208xqds/Kconfig @@ -12,6 +12,4 @@ config SYS_CONFIG_NAME config SRIO_PCIE_BOOT_SLAVE bool "Boot as a SRIO PCIe slave device" -source "board/freescale/common/Kconfig" - endif diff --git a/board/freescale/t208xrdb/Kconfig b/board/freescale/t208xrdb/Kconfig index d4c061a5eab..35d884e6ccb 100644 --- a/board/freescale/t208xrdb/Kconfig +++ b/board/freescale/t208xrdb/Kconfig @@ -12,6 +12,4 @@ config SYS_CONFIG_NAME config T2080RDB_REV_D bool "Support for T2080RDB revisions D and up" -source "board/freescale/common/Kconfig" - endif diff --git a/board/freescale/t4rdb/Kconfig b/board/freescale/t4rdb/Kconfig index 542e574fed1..d93e4532ac4 100644 --- a/board/freescale/t4rdb/Kconfig +++ b/board/freescale/t4rdb/Kconfig @@ -9,6 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "T4240RDB" -source "board/freescale/common/Kconfig" - endif diff --git a/board/variscite/imx8mn_var_som/Kconfig b/board/variscite/imx8mn_var_som/Kconfig index cfe6fc8c2c7..9a4003aa11b 100644 --- a/board/variscite/imx8mn_var_som/Kconfig +++ b/board/variscite/imx8mn_var_som/Kconfig @@ -12,6 +12,4 @@ config SYS_CONFIG_NAME config IMX_CONFIG default "board/variscite/imx8mn_var_som/imximage-8mn-ddr4.cfg" -source "board/freescale/common/Kconfig" - endif diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig index 8540923f891..37529f21df3 100644 --- a/configs/kmcent2_defconfig +++ b/configs/kmcent2_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_KMCENT2=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +# CONFIG_DEEP_SLEEP is not set CONFIG_KM_DEF_NETDEV="eth2" CONFIG_KM_IVM_BUS=2 CONFIG_MP=y diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig index c5d65740834..fe864c75b7f 100644 --- a/configs/pg_wcom_expu1_defconfig +++ b/configs/pg_wcom_expu1_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_CLK_FREQ=66666666 CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_ENV_ADDR=0x60060000 CONFIG_AHCI=y +# CONFIG_DEEP_SLEEP is not set CONFIG_KM_DEF_NETDEV="eth2" CONFIG_KM_COMMON_ETH_INIT=y CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 diff --git a/configs/pg_wcom_expu1_update_defconfig b/configs/pg_wcom_expu1_update_defconfig index c2b079df379..787fe554bad 100644 --- a/configs/pg_wcom_expu1_update_defconfig +++ b/configs/pg_wcom_expu1_update_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_BOOTCOUNT_ADDR=0x70000020 CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_ENV_ADDR=0x60220000 CONFIG_AHCI=y +# CONFIG_DEEP_SLEEP is not set CONFIG_KM_DEF_NETDEV="eth2" CONFIG_KM_COMMON_ETH_INIT=y CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig index 56e922a241c..51919dc6cbb 100644 --- a/configs/pg_wcom_seli8_defconfig +++ b/configs/pg_wcom_seli8_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_CLK_FREQ=66666666 CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_ENV_ADDR=0x60060000 CONFIG_AHCI=y +# CONFIG_DEEP_SLEEP is not set CONFIG_KM_DEF_NETDEV="eth2" CONFIG_KM_COMMON_ETH_INIT=y CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 diff --git a/configs/pg_wcom_seli8_update_defconfig b/configs/pg_wcom_seli8_update_defconfig index 9d25094a9a6..0f22511dabc 100644 --- a/configs/pg_wcom_seli8_update_defconfig +++ b/configs/pg_wcom_seli8_update_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_BOOTCOUNT_ADDR=0x70000020 CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_ENV_ADDR=0x60220000 CONFIG_AHCI=y +# CONFIG_DEEP_SLEEP is not set CONFIG_KM_DEF_NETDEV="eth2" CONFIG_KM_COMMON_ETH_INIT=y CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 -- GitLab From d622b0892309a7835ee1ae50f2f07f0a14253ed1 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 16 Jun 2022 14:04:36 -0400 Subject: [PATCH 469/581] nxp: Rename board/freescale/common/Kconfig to arch/Kconfig.nxp Now that board/freescale/common/Kconfig is safe to be included once, globally, rename this to arch/Kconfig.nxp to better reflect that it contains options that are valid on multiple architectures and SoC families, and not specific to NXP reference platforms either. Cc: Stefano Babic Cc: Peng Fan Signed-off-by: Tom Rini --- arch/Kconfig | 7 ++++++- board/freescale/common/Kconfig => arch/Kconfig.nxp | 0 2 files changed, 6 insertions(+), 1 deletion(-) rename board/freescale/common/Kconfig => arch/Kconfig.nxp (100%) diff --git a/arch/Kconfig b/arch/Kconfig index 1ad61ab345a..6495e780fec 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -451,7 +451,12 @@ source "arch/x86/Kconfig" source "arch/xtensa/Kconfig" source "arch/riscv/Kconfig" -source "board/freescale/common/Kconfig" +if ARM || M68K || PPC + +source "arch/Kconfig.nxp" + +endif + source "board/keymile/Kconfig" if MIPS || MICROBLAZE diff --git a/board/freescale/common/Kconfig b/arch/Kconfig.nxp similarity index 100% rename from board/freescale/common/Kconfig rename to arch/Kconfig.nxp -- GitLab From 2b2817b5c879f784b37aa79eb66c5cee5db2685c Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 16 Jun 2022 14:04:37 -0400 Subject: [PATCH 470/581] Convert CONFIG_ESBC_HDR_LS et al to Kconfig This converts the following to Kconfig: CONFIG_ESBC_HDR_LS CONFIG_ESBC_ADDR_64BIT Signed-off-by: Tom Rini --- arch/Kconfig.nxp | 9 +++++++++ arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 5 +++++ arch/arm/include/asm/arch-fsl-layerscape/config.h | 12 ------------ arch/arm/include/asm/fsl_secure_boot.h | 8 -------- 4 files changed, 14 insertions(+), 20 deletions(-) diff --git a/arch/Kconfig.nxp b/arch/Kconfig.nxp index 85acdde4436..4d04c036b82 100644 --- a/arch/Kconfig.nxp +++ b/arch/Kconfig.nxp @@ -24,6 +24,15 @@ config CMD_ESBC_VALIDATE esbc_validate - validate signature using RSA verification esbc_halt - put the core in spin loop (Secure Boot Only) +config ESBC_HDR_LS + bool + +config ESBC_ADDR_64BIT + def_bool y + depends on ESBC_HDR_LS && FSL_LAYERSCAPE + help + For Layerscape based platforms, ESBC image Address in Header is 64bit. + config DEEP_SLEEP bool "Enable SoC deep sleep feature" depends on ARCH_T1024 || ARCH_T1040 || ARCH_T1042 || ARCH_LS1021A diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 3ea023d36f9..7f08733a35b 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -26,6 +26,7 @@ config ARCH_LS1012A config ARCH_LS1028A bool select ARMV8_SET_SMPEN + select ESBC_HDR_LS select FSL_LAYERSCAPE select FSL_LSCH3 select GICV3 @@ -138,6 +139,7 @@ config ARCH_LS1088A bool select ARMV8_SET_SMPEN select ARM_ERRATA_855873 if !TFABOOT + select ESBC_HDR_LS select FSL_IFC select FSL_LAYERSCAPE select FSL_LSCH3 @@ -187,6 +189,7 @@ config ARCH_LS2080A select ARM_ERRATA_828024 select ARM_ERRATA_829520 select ARM_ERRATA_833471 + select ESBC_HDR_LS select FSL_IFC select FSL_LAYERSCAPE select FSL_LSCH3 @@ -239,6 +242,7 @@ config ARCH_LS2080A config ARCH_LX2162A bool select ARMV8_SET_SMPEN + select ESBC_HDR_LS select FSL_DDR_BIST select FSL_DDR_INTERACTIVE select FSL_LAYERSCAPE @@ -277,6 +281,7 @@ config ARCH_LX2162A config ARCH_LX2160A bool select ARMV8_SET_SMPEN + select ESBC_HDR_LS select FSL_DDR_BIST select FSL_DDR_INTERACTIVE select FSL_LAYERSCAPE diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index 1315bebb56f..709c2933bae 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -63,9 +63,6 @@ /* Security Monitor */ #define CONFIG_SYS_FSL_SEC_MON_LE -/* Secure Boot */ -#define CONFIG_ESBC_HDR_LS - /* DCFG - GUR */ #define CONFIG_SYS_FSL_CCSR_GUR_LE @@ -168,9 +165,6 @@ /* Security Monitor */ #define CONFIG_SYS_FSL_SEC_MON_LE -/* Secure Boot */ -#define CONFIG_ESBC_HDR_LS - /* DCFG - GUR */ #define CONFIG_SYS_FSL_CCSR_GUR_LE #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 @@ -223,9 +217,6 @@ /* Security Monitor */ #define CONFIG_SYS_FSL_SEC_MON_LE -/* Secure Boot */ -#define CONFIG_ESBC_HDR_LS - /* DCFG - GUR */ #define CONFIG_SYS_FSL_CCSR_GUR_LE @@ -285,9 +276,6 @@ /* Security Monitor */ #define CONFIG_SYS_FSL_SEC_MON_LE -/* Secure Boot */ -#define CONFIG_ESBC_HDR_LS - /* DCFG - GUR */ #define CONFIG_SYS_FSL_CCSR_GUR_LE diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h index b0c7599e412..154663e192c 100644 --- a/arch/arm/include/asm/fsl_secure_boot.h +++ b/arch/arm/include/asm/fsl_secure_boot.h @@ -25,14 +25,6 @@ #define CONFIG_KEY_REVOCATION -#if defined(CONFIG_FSL_LAYERSCAPE) -/* - * For fsl layerscape based platforms, ESBC image Address in Header - * is 64 bit. - */ -#define CONFIG_ESBC_ADDR_64BIT -#endif - #ifndef CONFIG_SPL_BUILD #ifndef CONFIG_SYS_RAMBOOT /* The key used for verification of next level images -- GitLab From 7e7d04aecb99cfcec2c25581dcf307f2c7a82c6c Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 16 Jun 2022 14:04:38 -0400 Subject: [PATCH 471/581] Convert CONFIG_ESDHC_DETECT_QUIRK to Kconfig This converts the following to Kconfig: CONFIG_ESDHC_DETECT_QUIRK Signed-off-by: Tom Rini --- board/freescale/common/qixis.h | 21 +++++++++++++++++++ board/freescale/lx2160a/lx2160a.c | 21 ------------------- configs/ls1088aqds_defconfig | 1 + configs/ls1088aqds_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1088aqds_qspi_defconfig | 1 + configs/ls1088aqds_sdcard_ifc_defconfig | 1 + configs/ls1088aqds_sdcard_qspi_defconfig | 1 + configs/ls1088aqds_tfa_defconfig | 1 + configs/ls2080aqds_SECURE_BOOT_defconfig | 1 + configs/ls2080aqds_defconfig | 1 + configs/ls2080aqds_nand_defconfig | 1 + configs/ls2080aqds_qspi_defconfig | 1 + configs/ls2080aqds_sdcard_defconfig | 1 + configs/ls2088aqds_tfa_defconfig | 1 + configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160aqds_tfa_defconfig | 1 + drivers/mmc/Kconfig | 4 ++++ drivers/mmc/fsl_esdhc.c | 3 ++- include/configs/ls1088aqds.h | 4 ---- include/configs/ls2080aqds.h | 8 ------- include/configs/lx2160aqds.h | 10 --------- include/configs/lx2162aqds.h | 10 --------- 22 files changed, 41 insertions(+), 54 deletions(-) diff --git a/board/freescale/common/qixis.h b/board/freescale/common/qixis.h index 0860bd23126..af76327e4d2 100644 --- a/board/freescale/common/qixis.h +++ b/board/freescale/common/qixis.h @@ -166,4 +166,25 @@ defined(CONFIG_TARGET_LX2160ARDB) #define QIXIS_ESDHC_NO_ADAPTER 0x7 #endif +/* + * implementation of CONFIG_ESDHC_DETECT_QUIRK Macro. + */ +static inline u8 qixis_esdhc_detect_quirk(void) +{ + /* + * SDHC1 Card ID: + * Specifies the type of card installed in the SDHC1 adapter slot. + * 000= (reserved) + * 001= eMMC V4.5 adapter is installed. + * 010= SD/MMC 3.3V adapter is installed. + * 011= eMMC V4.4 adapter is installed. + * 100= eMMC V5.0 adapter is installed. + * 101= MMC card/Legacy (3.3V) adapter is installed. + * 110= SDCard V2/V3 adapter installed. + * 111= no adapter is installed. + */ + return ((QIXIS_READ(sdhc1) & QIXIS_SDID_MASK) != + QIXIS_ESDHC_NO_ADAPTER); +} + #endif diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c index 49d96d3fa2a..a078643708f 100644 --- a/board/freescale/lx2160a/lx2160a.c +++ b/board/freescale/lx2160a/lx2160a.c @@ -356,27 +356,6 @@ int checkboard(void) } #if defined(CONFIG_TARGET_LX2160AQDS) || defined(CONFIG_TARGET_LX2162AQDS) -/* - * implementation of CONFIG_ESDHC_DETECT_QUIRK Macro. - */ -u8 qixis_esdhc_detect_quirk(void) -{ - /* - * SDHC1 Card ID: - * Specifies the type of card installed in the SDHC1 adapter slot. - * 000= (reserved) - * 001= eMMC V4.5 adapter is installed. - * 010= SD/MMC 3.3V adapter is installed. - * 011= eMMC V4.4 adapter is installed. - * 100= eMMC V5.0 adapter is installed. - * 101= MMC card/Legacy (3.3V) adapter is installed. - * 110= SDCard V2/V3 adapter installed. - * 111= no adapter is installed. - */ - return ((QIXIS_READ(sdhc1) & QIXIS_SDID_MASK) != - QIXIS_ESDHC_NO_ADAPTER); -} - static void esdhc_adapter_card_ident(void) { u8 card_id, val; diff --git a/configs/ls1088aqds_defconfig b/configs/ls1088aqds_defconfig index 1580ceb6b72..be351a3b6bf 100644 --- a/configs/ls1088aqds_defconfig +++ b/configs/ls1088aqds_defconfig @@ -71,6 +71,7 @@ CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EARLY_INIT=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y +CONFIG_ESDHC_DETECT_QUIRK=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig index b20a5d20f7d..7c2134ae4d9 100644 --- a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig @@ -65,6 +65,7 @@ CONFIG_MPC8XXX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y +CONFIG_ESDHC_DETECT_QUIRK=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y diff --git a/configs/ls1088aqds_qspi_defconfig b/configs/ls1088aqds_qspi_defconfig index caf5d774f57..0aed10298b3 100644 --- a/configs/ls1088aqds_qspi_defconfig +++ b/configs/ls1088aqds_qspi_defconfig @@ -68,6 +68,7 @@ CONFIG_MPC8XXX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y +CONFIG_ESDHC_DETECT_QUIRK=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig index 663aacf876b..6ec9f2b333e 100644 --- a/configs/ls1088aqds_sdcard_ifc_defconfig +++ b/configs/ls1088aqds_sdcard_ifc_defconfig @@ -90,6 +90,7 @@ CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EARLY_INIT=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y +CONFIG_ESDHC_DETECT_QUIRK=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig index f3e204875ef..0ca54c8340b 100644 --- a/configs/ls1088aqds_sdcard_qspi_defconfig +++ b/configs/ls1088aqds_sdcard_qspi_defconfig @@ -86,6 +86,7 @@ CONFIG_MPC8XXX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y +CONFIG_ESDHC_DETECT_QUIRK=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y diff --git a/configs/ls1088aqds_tfa_defconfig b/configs/ls1088aqds_tfa_defconfig index a135de388ff..e5063be8fc3 100644 --- a/configs/ls1088aqds_tfa_defconfig +++ b/configs/ls1088aqds_tfa_defconfig @@ -79,6 +79,7 @@ CONFIG_I2C_MUX=y CONFIG_I2C_MUX_PCA954x=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y +CONFIG_ESDHC_DETECT_QUIRK=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig index abc958f5dd1..383e8928870 100644 --- a/configs/ls2080aqds_SECURE_BOOT_defconfig +++ b/configs/ls2080aqds_SECURE_BOOT_defconfig @@ -59,6 +59,7 @@ CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y +CONFIG_ESDHC_DETECT_QUIRK=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig index 9278a6e80f7..92f129551c2 100644 --- a/configs/ls2080aqds_defconfig +++ b/configs/ls2080aqds_defconfig @@ -62,6 +62,7 @@ CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y +CONFIG_ESDHC_DETECT_QUIRK=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index dab9a7fb85a..855d1176e0b 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -83,6 +83,7 @@ CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EARLY_INIT=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y +CONFIG_ESDHC_DETECT_QUIRK=y CONFIG_MTD=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig index afa2469b1b4..8ca856c788e 100644 --- a/configs/ls2080aqds_qspi_defconfig +++ b/configs/ls2080aqds_qspi_defconfig @@ -64,6 +64,7 @@ CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EARLY_INIT=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y +CONFIG_ESDHC_DETECT_QUIRK=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig index 3d6aa69d5f1..bc9febcf507 100644 --- a/configs/ls2080aqds_sdcard_defconfig +++ b/configs/ls2080aqds_sdcard_defconfig @@ -78,6 +78,7 @@ CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EARLY_INIT=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y +CONFIG_ESDHC_DETECT_QUIRK=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y diff --git a/configs/ls2088aqds_tfa_defconfig b/configs/ls2088aqds_tfa_defconfig index c46e506213c..60e489facb5 100644 --- a/configs/ls2088aqds_tfa_defconfig +++ b/configs/ls2088aqds_tfa_defconfig @@ -73,6 +73,7 @@ CONFIG_I2C_MUX=y CONFIG_I2C_MUX_PCA954x=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y +CONFIG_ESDHC_DETECT_QUIRK=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig index 317347b0d29..d65d611d7c4 100644 --- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig @@ -69,6 +69,7 @@ CONFIG_I2C_MUX=y CONFIG_I2C_MUX_PCA954x=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y +CONFIG_ESDHC_DETECT_QUIRK=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig index b6441a3abde..97cfb663fb6 100644 --- a/configs/lx2160aqds_tfa_defconfig +++ b/configs/lx2160aqds_tfa_defconfig @@ -76,6 +76,7 @@ CONFIG_I2C_MUX=y CONFIG_I2C_MUX_PCA954x=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y +CONFIG_ESDHC_DETECT_QUIRK=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 5a87db6be08..53a6b0093d1 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -844,6 +844,10 @@ config SYS_FSL_ESDHC_DEFAULT_BUS_WIDTH depends on FSL_ESDHC default 1 +config ESDHC_DETECT_QUIRK + bool "QIXIS-based eSDHC quirk detection" + depends on FSL_ESDHC && FSL_QIXIS + config FSL_ESDHC_IMX bool "Freescale/NXP i.MX eSDHC controller support" help diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 4e7bfdfaa7e..b49a7b425b9 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -30,6 +30,7 @@ #include #include #include +#include "../../board/freescale/common/qixis.h" DECLARE_GLOBAL_DATA_PTR; @@ -773,7 +774,7 @@ static int esdhc_getcd_common(struct fsl_esdhc_priv *priv) struct fsl_esdhc *regs = priv->esdhc_regs; #ifdef CONFIG_ESDHC_DETECT_QUIRK - if (CONFIG_ESDHC_DETECT_QUIRK) + if (qixis_esdhc_detect_quirk()) return 1; #endif if (esdhc_read32(®s->prsstat) & PRSSTAT_CINS) diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index 7c60f287981..debb60d25ce 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -305,10 +305,6 @@ #define CONFIG_FSL_MEMAC -/* MMC */ -#define CONFIG_ESDHC_DETECT_QUIRK ((readb(QIXIS_BASE + QIXIS_STAT_PRES1) & \ - QIXIS_SDID_MASK) != QIXIS_ESDHC_NO_ADAPTER) - #define COMMON_ENV \ "kernelheader_addr_r=0x80200000\0" \ "fdtheader_addr_r=0x80100000\0" \ diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index a0e2127f1dd..9de602bc164 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -238,14 +238,6 @@ */ #define FSL_QIXIS_BRDCFG9_QSPI 0x1 -/* - * MMC - */ -#ifdef CONFIG_MMC -#define CONFIG_ESDHC_DETECT_QUIRK ((readb(QIXIS_BASE + QIXIS_STAT_PRES1) & \ - QIXIS_SDID_MASK) != QIXIS_ESDHC_NO_ADAPTER) -#endif - /* * RTC configuration */ diff --git a/include/configs/lx2160aqds.h b/include/configs/lx2160aqds.h index e7aec6bc596..585aab26bff 100644 --- a/include/configs/lx2160aqds.h +++ b/include/configs/lx2160aqds.h @@ -11,16 +11,6 @@ /* RTC */ #define CONFIG_SYS_RTC_BUS_NUM 0 -/* - * MMC - */ -#ifdef CONFIG_MMC -#ifndef __ASSEMBLY__ -u8 qixis_esdhc_detect_quirk(void); -#endif -#define CONFIG_ESDHC_DETECT_QUIRK qixis_esdhc_detect_quirk() -#endif - /* MAC/PHY configuration */ /* EEPROM */ diff --git a/include/configs/lx2162aqds.h b/include/configs/lx2162aqds.h index 729c2707e99..d1ae4034731 100644 --- a/include/configs/lx2162aqds.h +++ b/include/configs/lx2162aqds.h @@ -13,16 +13,6 @@ /* RTC */ #define CONFIG_SYS_RTC_BUS_NUM 0 -/* - * MMC - */ -#ifdef CONFIG_MMC -#ifndef __ASSEMBLY__ -u8 qixis_esdhc_detect_quirk(void); -#endif -#define CONFIG_ESDHC_DETECT_QUIRK qixis_esdhc_detect_quirk() -#endif - /* EEPROM */ #define CONFIG_SYS_I2C_EEPROM_NXID #define CONFIG_SYS_EEPROM_BUS_NUM 0 -- GitLab From c9f85187e21ef64f65c1cd7202ef9199501a6f4d Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 16 Jun 2022 14:04:39 -0400 Subject: [PATCH 472/581] Convert CONFIG_SYS_FSL_SEC_MON et al to Kconfig This converts the following to Kconfig: CONFIG_SYS_FSL_SEC_MON CONFIG_SYS_FSL_SEC_MON_BE CONFIG_SYS_FSL_SEC_MON_LE Signed-off-by: Tom Rini --- arch/Kconfig.nxp | 1 + arch/arm/include/asm/arch-fsl-layerscape/config.h | 15 --------------- arch/arm/include/asm/arch-ls102xa/config.h | 1 - arch/arm/include/asm/fsl_secure_boot.h | 2 -- arch/powerpc/include/asm/config_mpc85xx.h | 1 - arch/powerpc/include/asm/fsl_secure_boot.h | 2 -- configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012ardb_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1012ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1043aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1046aqds_SECURE_BOOT_defconfig | 1 + configs/ls1046aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1046ardb_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig | 1 + configs/ls1046ardb_tfa_SECURE_BOOT_defconfig | 1 + drivers/misc/Kconfig | 14 ++++++++++++++ include/fsl_sec_mon.h | 2 -- 24 files changed, 31 insertions(+), 23 deletions(-) diff --git a/arch/Kconfig.nxp b/arch/Kconfig.nxp index 4d04c036b82..72cac0fb99d 100644 --- a/arch/Kconfig.nxp +++ b/arch/Kconfig.nxp @@ -4,6 +4,7 @@ config CHAIN_OF_TRUST imply CMD_HASH if ARM select FSL_CAAM select ARCH_MISC_INIT + select FSL_SEC_MON select SPL_BOARD_INIT if (ARM && SPL) select SPL_HASH if (ARM && SPL) select SHA_HW_ACCEL diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index 709c2933bae..fd41d30c28c 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -60,9 +60,6 @@ #define CONFIG_SYS_FSL_SFP_LE #define CONFIG_SYS_FSL_SRK_LE -/* Security Monitor */ -#define CONFIG_SYS_FSL_SEC_MON_LE - /* DCFG - GUR */ #define CONFIG_SYS_FSL_CCSR_GUR_LE @@ -162,9 +159,6 @@ #define CONFIG_SYS_FSL_SFP_LE #define CONFIG_SYS_FSL_SRK_LE -/* Security Monitor */ -#define CONFIG_SYS_FSL_SEC_MON_LE - /* DCFG - GUR */ #define CONFIG_SYS_FSL_CCSR_GUR_LE #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 @@ -214,9 +208,6 @@ #define CONFIG_SYS_FSL_SFP_LE #define CONFIG_SYS_FSL_SRK_LE -/* Security Monitor */ -#define CONFIG_SYS_FSL_SEC_MON_LE - /* DCFG - GUR */ #define CONFIG_SYS_FSL_CCSR_GUR_LE @@ -273,9 +264,6 @@ /* SEC */ #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 -/* Security Monitor */ -#define CONFIG_SYS_FSL_SEC_MON_LE - /* DCFG - GUR */ #define CONFIG_SYS_FSL_CCSR_GUR_LE @@ -310,7 +298,6 @@ #define CONFIG_SYS_FSL_IFC_BE #define CONFIG_SYS_FSL_SFP_VER_3_2 -#define CONFIG_SYS_FSL_SEC_MON_BE #define CONFIG_SYS_FSL_SFP_BE #define CONFIG_SYS_FSL_SRK_LE #define CONFIG_KEY_REVOCATION @@ -350,7 +337,6 @@ #define GICD_BASE 0x01401000 #define GICC_BASE 0x01402000 #define CONFIG_SYS_FSL_SFP_VER_3_2 -#define CONFIG_SYS_FSL_SEC_MON_BE #define CONFIG_SYS_FSL_SFP_BE #define CONFIG_SYS_FSL_SRK_LE #define CONFIG_KEY_REVOCATION @@ -369,7 +355,6 @@ #define CONFIG_SYS_FSL_IFC_BE #define CONFIG_SYS_FSL_SFP_VER_3_2 -#define CONFIG_SYS_FSL_SEC_MON_BE #define CONFIG_SYS_FSL_SFP_BE #define CONFIG_SYS_FSL_SRK_LE #define CONFIG_KEY_REVOCATION diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index aa790ab54c3..06ead24bf62 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -87,7 +87,6 @@ #define CONFIG_SYS_FSL_ESDHC_BE #define CONFIG_SYS_FSL_WDOG_BE #define CONFIG_SYS_FSL_DSPI_BE -#define CONFIG_SYS_FSL_SEC_MON_LE #define CONFIG_SYS_FSL_SFP_VER_3_2 #define CONFIG_SYS_FSL_SFP_BE #define CONFIG_SYS_FSL_SRK_LE diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h index 154663e192c..d6a7c3dcbd7 100644 --- a/arch/arm/include/asm/fsl_secure_boot.h +++ b/arch/arm/include/asm/fsl_secure_boot.h @@ -8,8 +8,6 @@ #define __FSL_SECURE_BOOT_H #ifdef CONFIG_CHAIN_OF_TRUST -#define CONFIG_FSL_SEC_MON - #ifdef CONFIG_SPL_BUILD /* * Define the key hash for U-Boot here if public/private key pair used to diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 225befb3a5e..47b46250479 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -19,7 +19,6 @@ /* IP endianness */ #define CONFIG_SYS_FSL_IFC_BE #define CONFIG_SYS_FSL_SFP_BE -#define CONFIG_SYS_FSL_SEC_MON_BE #if defined(CONFIG_ARCH_MPC8548) #define CONFIG_SYS_FSL_SRIO_MAX_PORTS 1 diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h index 3a1d858ec64..e073025ebfb 100644 --- a/arch/powerpc/include/asm/fsl_secure_boot.h +++ b/arch/powerpc/include/asm/fsl_secure_boot.h @@ -92,8 +92,6 @@ #define CONFIG_SPL_UBOOT_KEY_HASH NULL #endif /* ifdef CONFIG_SPL_BUILD */ -#define CONFIG_FSL_SEC_MON - #ifndef CONFIG_SPL_BUILD /* * fsl_setenv_chain_of_trust() must be called from diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig index 7c69d56d52c..51218193673 100644 --- a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig @@ -47,6 +47,7 @@ CONFIG_SATA_CEVA=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_FSL_SEC_MON_BE=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig index 21c989cff9f..155c47487f1 100644 --- a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig @@ -45,6 +45,7 @@ CONFIG_SATA_CEVA=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_FSL_SEC_MON_BE=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig index a77e124b4b7..b97cbaf8c36 100644 --- a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig @@ -52,6 +52,7 @@ CONFIG_DM=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_FSL_SEC_MON_BE=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y CONFIG_MTD=y diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig index 02d6e0f2e11..a39cb99cc0e 100644 --- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig @@ -50,6 +50,7 @@ CONFIG_SATA_CEVA=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_FSL_SEC_MON_BE=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig index 6dc5674dbf1..bcd9d73ee06 100644 --- a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig @@ -48,6 +48,7 @@ CONFIG_SATA_CEVA=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_FSL_SEC_MON_BE=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig index 9035594139d..6abb1bafe71 100644 --- a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig @@ -64,6 +64,7 @@ CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EARLY_INIT=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_FSL_SEC_MON_BE=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y CONFIG_MTD=y diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index aeebd383af6..3bbe46d43eb 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -50,6 +50,7 @@ CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_FSL_SEC_MON_BE=y CONFIG_SYS_I2C_EEPROM_ADDR=0x53 CONFIG_FSL_ESDHC=y CONFIG_MTD=y diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index 401bc393b23..51436de011e 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -73,6 +73,7 @@ CONFIG_SPL_DM=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_FSL_SEC_MON_BE=y CONFIG_SYS_I2C_EEPROM_ADDR=0x53 CONFIG_FSL_ESDHC=y CONFIG_MTD=y diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index 9d29c365c6e..1f7128e3109 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -73,6 +73,7 @@ CONFIG_SPL_DM=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_FSL_SEC_MON_BE=y CONFIG_SYS_I2C_EEPROM_ADDR=0x53 # CONFIG_SPL_DM_MMC is not set CONFIG_FSL_ESDHC=y diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig index e92c09976df..6911b00363a 100644 --- a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig @@ -49,6 +49,7 @@ CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_FSL_SEC_MON_BE=y CONFIG_SYS_I2C_EEPROM_ADDR=0x53 CONFIG_FSL_ESDHC=y CONFIG_MTD=y diff --git a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig index 00444420b9d..8cb86e1ffca 100644 --- a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig @@ -45,6 +45,7 @@ CONFIG_SATA_CEVA=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_FSL_SEC_MON_BE=y CONFIG_SYS_I2C_EEPROM_ADDR=0x52 CONFIG_FSL_ESDHC=y CONFIG_MTD=y diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig index 8b1713099d8..d4284728d4e 100644 --- a/configs/ls1046aqds_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_SECURE_BOOT_defconfig @@ -64,6 +64,7 @@ CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_FSL_SEC_MON_BE=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y CONFIG_MTD=y diff --git a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig index 58bc95d91c3..295cc66c866 100644 --- a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig @@ -64,6 +64,7 @@ CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_EARLY_INIT=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_FSL_SEC_MON_BE=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y CONFIG_MTD=y diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig index 2a7c730aa00..3b870788f77 100644 --- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig @@ -57,6 +57,7 @@ CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_FSL_SEC_MON_BE=y CONFIG_SYS_I2C_EEPROM_ADDR=0x53 CONFIG_FSL_ESDHC=y CONFIG_MTD=y diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig index 4301d38eb77..149d155d136 100644 --- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -80,6 +80,7 @@ CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y # CONFIG_SPL_DM_I2C is not set CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_FSL_SEC_MON_BE=y CONFIG_SYS_I2C_EEPROM_ADDR=0x53 # CONFIG_SPL_DM_MMC is not set CONFIG_FSL_ESDHC=y diff --git a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig index 62020ee6c89..827db1851f8 100644 --- a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig @@ -51,6 +51,7 @@ CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_FSL_SEC_MON_BE=y CONFIG_SYS_I2C_EEPROM_ADDR=0x53 CONFIG_FSL_ESDHC=y CONFIG_MTD=y diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 28d5da49ff1..92264e5935b 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -275,6 +275,20 @@ config FSL_SEC_MON Security Monitor can be transitioned on any security failures, like software violations or hardware security violations. +choice + prompt "Security monitor interaction endianess" + depends on FSL_SEC_MON + default SYS_FSL_SEC_MON_BE if PPC + default SYS_FSL_SEC_MON_LE + +config SYS_FSL_SEC_MON_LE + bool "Security monitor interactions are little endian" + +config SYS_FSL_SEC_MON_BE + bool "Security monitor interactions are big endian" + +endchoice + config IRQ bool "Interrupt controller" help diff --git a/include/fsl_sec_mon.h b/include/fsl_sec_mon.h index fb838db0b53..3092a0ea62a 100644 --- a/include/fsl_sec_mon.h +++ b/include/fsl_sec_mon.h @@ -23,8 +23,6 @@ #define sec_mon_in16(a) in_be16(a) #define sec_mon_clrbits32 clrbits_be32 #define sec_mon_setbits32 setbits_be32 -#else -#error Neither CONFIG_SYS_FSL_SEC_MON_LE nor CONFIG_SYS_FSL_SEC_MON_BE defined #endif struct ccsr_sec_mon_regs { -- GitLab From 601483ffd544f98023062949670e2aa048d31cc7 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 16 Jun 2022 14:04:40 -0400 Subject: [PATCH 473/581] Convert CONFIG_SYS_FSL_SFP_BE et al to Kconfig This converts the following to Kconfig: CONFIG_KEY_REVOCATION CONFIG_SYS_FSL_SFP_BE CONFIG_SYS_FSL_SFP_LE CONFIG_SYS_FSL_SFP_VER_3_0 CONFIG_SYS_FSL_SFP_VER_3_2 CONFIG_SYS_FSL_SFP_VER_3_4 CONFIG_SYS_FSL_SRK_LE This partly means making sure to enable SYS_FSL_ERRATUM_A007186 only for when CHAIN_OF_TRUST is enabled. Signed-off-by: Tom Rini --- arch/Kconfig.nxp | 33 +++++++++++++++++++ .../include/asm/arch-fsl-layerscape/config.h | 32 ------------------ arch/arm/include/asm/arch-ls102xa/config.h | 3 -- arch/arm/include/asm/fsl_secure_boot.h | 2 -- arch/powerpc/cpu/mpc85xx/Kconfig | 8 ++--- arch/powerpc/include/asm/config_mpc85xx.h | 7 ---- arch/powerpc/include/asm/fsl_secure_boot.h | 5 --- include/fsl_sfp.h | 2 -- 8 files changed, 37 insertions(+), 55 deletions(-) diff --git a/arch/Kconfig.nxp b/arch/Kconfig.nxp index 72cac0fb99d..22ae186b358 100644 --- a/arch/Kconfig.nxp +++ b/arch/Kconfig.nxp @@ -34,6 +34,39 @@ config ESBC_ADDR_64BIT help For Layerscape based platforms, ESBC image Address in Header is 64bit. +config SYS_FSL_SFP_BE + def_bool y + depends on CHAIN_OF_TRUST && (PPC || FSL_LSCH2 || ARCH_LS1021A) + +config SYS_FSL_SFP_LE + def_bool y + depends on CHAIN_OF_TRUST && !SYS_FSL_SFP_BE + +choice + prompt "SFP IP revision" + depends on CHAIN_OF_TRUST + default SYS_FSL_SFP_VER_3_0 if PPC + default SYS_FSL_SFP_VER_3_4 + +config SYS_FSL_SFP_VER_3_0 + bool "SFP version 3.0" + +config SYS_FSL_SFP_VER_3_2 + bool "SFP version 3.2" + +config SYS_FSL_SFP_VER_3_4 + bool "SFP version 3.4" + +endchoice + +config SYS_FSL_SRK_LE + def_bool y + depends on CHAIN_OF_TRUST && ARM + +config KEY_REVOCATION + def_bool y + depends on CHAIN_OF_TRUST + config DEEP_SLEEP bool "Enable SoC deep sleep feature" depends on ARCH_T1024 || ARCH_T1040 || ARCH_T1042 || ARCH_LS1021A diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index fd41d30c28c..cd795d6919a 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -55,11 +55,6 @@ /* SMMU Defintions */ #define SMMU_BASE 0x05000000 /* GR0 Base */ -/* SFP */ -#define CONFIG_SYS_FSL_SFP_VER_3_4 -#define CONFIG_SYS_FSL_SFP_LE -#define CONFIG_SYS_FSL_SRK_LE - /* DCFG - GUR */ #define CONFIG_SYS_FSL_CCSR_GUR_LE @@ -154,11 +149,6 @@ #define CONFIG_SYS_MEMAC_LITTLE_ENDIAN -/* SFP */ -#define CONFIG_SYS_FSL_SFP_VER_3_4 -#define CONFIG_SYS_FSL_SFP_LE -#define CONFIG_SYS_FSL_SRK_LE - /* DCFG - GUR */ #define CONFIG_SYS_FSL_CCSR_GUR_LE #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 @@ -203,11 +193,6 @@ /* SMMU Definitions */ #define SMMU_BASE 0x05000000 /* GR0 Base */ -/* SFP */ -#define CONFIG_SYS_FSL_SFP_VER_3_4 -#define CONFIG_SYS_FSL_SFP_LE -#define CONFIG_SYS_FSL_SRK_LE - /* DCFG - GUR */ #define CONFIG_SYS_FSL_CCSR_GUR_LE @@ -256,11 +241,6 @@ #define CONFIG_SYS_MEMAC_LITTLE_ENDIAN -/* SFP */ -#define CONFIG_SYS_FSL_SFP_VER_3_4 -#define CONFIG_SYS_FSL_SFP_LE -#define CONFIG_SYS_FSL_SRK_LE - /* SEC */ #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 @@ -297,10 +277,6 @@ #define QE_NUM_OF_SNUM 28 #define CONFIG_SYS_FSL_IFC_BE -#define CONFIG_SYS_FSL_SFP_VER_3_2 -#define CONFIG_SYS_FSL_SFP_BE -#define CONFIG_SYS_FSL_SRK_LE -#define CONFIG_KEY_REVOCATION /* SMMU Defintions */ #define SMMU_BASE 0x09000000 @@ -336,10 +312,6 @@ #elif defined(CONFIG_ARCH_LS1012A) #define GICD_BASE 0x01401000 #define GICC_BASE 0x01402000 -#define CONFIG_SYS_FSL_SFP_VER_3_2 -#define CONFIG_SYS_FSL_SFP_BE -#define CONFIG_SYS_FSL_SRK_LE -#define CONFIG_KEY_REVOCATION #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 #define CONFIG_SYS_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30) #define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_DDR_BLOCK1_SIZE @@ -354,10 +326,6 @@ #define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_DDR_BLOCK1_SIZE #define CONFIG_SYS_FSL_IFC_BE -#define CONFIG_SYS_FSL_SFP_VER_3_2 -#define CONFIG_SYS_FSL_SFP_BE -#define CONFIG_SYS_FSL_SRK_LE -#define CONFIG_KEY_REVOCATION /* SMMU Defintions */ #define SMMU_BASE 0x09000000 diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index 06ead24bf62..796e2b218e5 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -87,9 +87,6 @@ #define CONFIG_SYS_FSL_ESDHC_BE #define CONFIG_SYS_FSL_WDOG_BE #define CONFIG_SYS_FSL_DSPI_BE -#define CONFIG_SYS_FSL_SFP_VER_3_2 -#define CONFIG_SYS_FSL_SFP_BE -#define CONFIG_SYS_FSL_SRK_LE #define DCU_LAYER_MAX_NUM 16 diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h index d6a7c3dcbd7..09c88841e0c 100644 --- a/arch/arm/include/asm/fsl_secure_boot.h +++ b/arch/arm/include/asm/fsl_secure_boot.h @@ -21,8 +21,6 @@ #define CONFIG_SPL_UBOOT_KEY_HASH NULL #endif /* ifdef CONFIG_SPL_BUILD */ -#define CONFIG_KEY_REVOCATION - #ifndef CONFIG_SPL_BUILD #ifndef CONFIG_SYS_RAMBOOT /* The key used for verification of next level images diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 2cc0185c377..0ef5e730bdc 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -196,7 +196,7 @@ config ARCH_B4420 select SYS_FSL_ERRATUM_A006475 select SYS_FSL_ERRATUM_A006593 select SYS_FSL_ERRATUM_A007075 - select SYS_FSL_ERRATUM_A007186 + select SYS_FSL_ERRATUM_A007186 if CHAIN_OF_TRUST select SYS_FSL_ERRATUM_A007212 select SYS_FSL_ERRATUM_A009942 select SYS_FSL_HAS_DDR3 @@ -224,7 +224,7 @@ config ARCH_B4860 select SYS_FSL_ERRATUM_A006475 select SYS_FSL_ERRATUM_A006593 select SYS_FSL_ERRATUM_A007075 - select SYS_FSL_ERRATUM_A007186 + select SYS_FSL_ERRATUM_A007186 if CHAIN_OF_TRUST select SYS_FSL_ERRATUM_A007212 select SYS_FSL_ERRATUM_A007907 select SYS_FSL_ERRATUM_A009942 @@ -735,7 +735,7 @@ config ARCH_T2080 select SYS_FSL_DDR_VER_47 select SYS_FSL_ERRATUM_A006379 select SYS_FSL_ERRATUM_A006593 - select SYS_FSL_ERRATUM_A007186 + select SYS_FSL_ERRATUM_A007186 if CHAIN_OF_TRUST select SYS_FSL_ERRATUM_A007212 select SYS_FSL_ERRATUM_A007815 select SYS_FSL_ERRATUM_A007907 @@ -768,7 +768,7 @@ config ARCH_T4240 select SYS_FSL_ERRATUM_A006261 select SYS_FSL_ERRATUM_A006379 select SYS_FSL_ERRATUM_A006593 - select SYS_FSL_ERRATUM_A007186 + select SYS_FSL_ERRATUM_A007186 if CHAIN_OF_TRUST select SYS_FSL_ERRATUM_A007798 select SYS_FSL_ERRATUM_A007815 select SYS_FSL_ERRATUM_A007907 diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 47b46250479..e82adc6b454 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -18,7 +18,6 @@ /* IP endianness */ #define CONFIG_SYS_FSL_IFC_BE -#define CONFIG_SYS_FSL_SFP_BE #if defined(CONFIG_ARCH_MPC8548) #define CONFIG_SYS_FSL_SRIO_MAX_PORTS 1 @@ -199,7 +198,6 @@ #define CONFIG_SYS_FSL_SRIO_LIODN #define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY -#define CONFIG_SYS_FSL_SFP_VER_3_0 #define CONFIG_SYS_FSL_PCI_VER_3_X #elif defined(CONFIG_ARCH_B4860) || defined(CONFIG_ARCH_B4420) @@ -216,7 +214,6 @@ #define CONFIG_SYS_FSL_TBCLK_DIV 16 #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4" #define CONFIG_SYS_FSL_USB1_PHY_ENABLE -#define CONFIG_SYS_FSL_SFP_VER_3_0 #ifdef CONFIG_ARCH_B4860 #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4 @@ -264,7 +261,6 @@ #define QE_MURAM_SIZE 0x6000UL #define MAX_QE_RISC 1 #define QE_NUM_OF_SNUM 28 -#define CONFIG_SYS_FSL_SFP_VER_3_0 #elif defined(CONFIG_ARCH_T1024) #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ @@ -291,7 +287,6 @@ #define QE_MURAM_SIZE 0x6000UL #define MAX_QE_RISC 1 #define QE_NUM_OF_SNUM 28 -#define CONFIG_SYS_FSL_SFP_VER_3_0 #elif defined(CONFIG_ARCH_T2080) #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ @@ -321,10 +316,8 @@ #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v3.0" #define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY -#define CONFIG_SYS_FSL_SFP_VER_3_0 #define CONFIG_SYS_FSL_ISBC_VER 2 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE -#define CONFIG_SYS_FSL_SFP_VER_3_0 #elif defined(CONFIG_ARCH_C29X) diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h index e073025ebfb..9ae4c590f1d 100644 --- a/arch/powerpc/include/asm/fsl_secure_boot.h +++ b/arch/powerpc/include/asm/fsl_secure_boot.h @@ -31,7 +31,6 @@ #ifndef CONFIG_SYS_RAMBOOT #define CONFIG_SYS_CPC_REINIT_F #endif -#define CONFIG_KEY_REVOCATION #undef CONFIG_SYS_INIT_L3_ADDR #define CONFIG_SYS_INIT_L3_ADDR 0xbff00000 #endif @@ -47,10 +46,6 @@ #endif #endif -#if defined(CONFIG_TARGET_C29XPCIE) -#define CONFIG_KEY_REVOCATION -#endif - #if defined(CONFIG_ARCH_P3041) || \ defined(CONFIG_ARCH_P4080) || \ defined(CONFIG_ARCH_P5040) || \ diff --git a/include/fsl_sfp.h b/include/fsl_sfp.h index 613814d9057..e7674c1bff2 100644 --- a/include/fsl_sfp.h +++ b/include/fsl_sfp.h @@ -24,8 +24,6 @@ #define sfp_in32(a) in_be32(a) #define sfp_out32(a, v) out_be32(a, v) #define sfp_in16(a) in_be16(a) -#else -#error Neither CONFIG_SYS_FSL_SFP_LE nor CONFIG_SYS_FSL_SFP_BE is defined #endif /* Number of SRKH registers */ -- GitLab From 540b73a7be6dbe87a2f0c9e86d1d9178bc7f7b76 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 17 Jun 2022 16:24:31 -0400 Subject: [PATCH 474/581] arch/Kconfig.nxp: Re-organize slightly Make all of the CHAIN_OF_TRUST options be under a single menu and add a comment for the rest, so the resulting config file reads more clearly. Remove duplicate CHAIN_OF_TRUST options from board/congatec/common/Kconfig. Remove duplicate NXP_ESBC config questions and move to arch/Kconfig.nxp. Signed-off-by: Tom Rini --- arch/Kconfig.nxp | 30 +++++++++++------ arch/arm/cpu/armv7/ls102xa/Kconfig | 6 ---- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 15 +++------ arch/powerpc/cpu/mpc85xx/Kconfig | 6 ---- board/congatec/common/Kconfig | 41 ----------------------- 5 files changed, 24 insertions(+), 74 deletions(-) diff --git a/arch/Kconfig.nxp b/arch/Kconfig.nxp index 22ae186b358..273e8e86dae 100644 --- a/arch/Kconfig.nxp +++ b/arch/Kconfig.nxp @@ -1,7 +1,13 @@ -config CHAIN_OF_TRUST +config NXP_ESBC + bool "NXP ESBC (secure boot) functionality" + help + Enable Freescale Secure Boot feature. Normally selected by defconfig. + If unsure, do not change. + +menu "Chain of trust / secure boot options" depends on !FIT_SIGNATURE && NXP_ESBC - imply CMD_BLOB - imply CMD_HASH if ARM + +config CHAIN_OF_TRUST select FSL_CAAM select ARCH_MISC_INIT select FSL_SEC_MON @@ -12,12 +18,12 @@ config CHAIN_OF_TRUST select ENV_IS_NOWHERE select CMD_EXT4 if ARM select CMD_EXT4_WRITE if ARM - bool - default y + imply CMD_BLOB + imply CMD_HASH if ARM + def_bool y config CMD_ESBC_VALIDATE bool "Enable the 'esbc_validate' and 'esbc_halt' commands" - depends on CHAIN_OF_TRUST default y help This option enables two commands used for secure booting: @@ -36,15 +42,14 @@ config ESBC_ADDR_64BIT config SYS_FSL_SFP_BE def_bool y - depends on CHAIN_OF_TRUST && (PPC || FSL_LSCH2 || ARCH_LS1021A) + depends on PPC || FSL_LSCH2 || ARCH_LS1021A config SYS_FSL_SFP_LE def_bool y - depends on CHAIN_OF_TRUST && !SYS_FSL_SFP_BE + depends on !SYS_FSL_SFP_BE choice prompt "SFP IP revision" - depends on CHAIN_OF_TRUST default SYS_FSL_SFP_VER_3_0 if PPC default SYS_FSL_SFP_VER_3_4 @@ -61,11 +66,14 @@ endchoice config SYS_FSL_SRK_LE def_bool y - depends on CHAIN_OF_TRUST && ARM + depends on ARM config KEY_REVOCATION def_bool y - depends on CHAIN_OF_TRUST + +endmenu + +comment "Other functionality shared between NXP SoCs" config DEEP_SLEEP bool "Enable SoC deep sleep feature" diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig index c496e643919..a901360fa7d 100644 --- a/arch/arm/cpu/armv7/ls102xa/Kconfig +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig @@ -41,12 +41,6 @@ config MAX_CPUS cores, count the reserved ports. This will allocate enough memory in spin table to properly handle all cores. -config NXP_ESBC - bool "NXP_ESBC" - help - Enable Freescale Secure Boot feature. Normally selected - by defconfig. If unsure, do not change. - config SYS_CCI400_OFFSET hex "Offset for CCI400 base" depends on SYS_FSL_HAS_CCI400 diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 7f08733a35b..602b624dca5 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -26,7 +26,7 @@ config ARCH_LS1012A config ARCH_LS1028A bool select ARMV8_SET_SMPEN - select ESBC_HDR_LS + select ESBC_HDR_LS if CHAIN_OF_TRUST select FSL_LAYERSCAPE select FSL_LSCH3 select GICV3 @@ -139,7 +139,7 @@ config ARCH_LS1088A bool select ARMV8_SET_SMPEN select ARM_ERRATA_855873 if !TFABOOT - select ESBC_HDR_LS + select ESBC_HDR_LS if CHAIN_OF_TRUST select FSL_IFC select FSL_LAYERSCAPE select FSL_LSCH3 @@ -189,7 +189,7 @@ config ARCH_LS2080A select ARM_ERRATA_828024 select ARM_ERRATA_829520 select ARM_ERRATA_833471 - select ESBC_HDR_LS + select ESBC_HDR_LS if CHAIN_OF_TRUST select FSL_IFC select FSL_LAYERSCAPE select FSL_LSCH3 @@ -242,7 +242,7 @@ config ARCH_LS2080A config ARCH_LX2162A bool select ARMV8_SET_SMPEN - select ESBC_HDR_LS + select ESBC_HDR_LS if CHAIN_OF_TRUST select FSL_DDR_BIST select FSL_DDR_INTERACTIVE select FSL_LAYERSCAPE @@ -281,7 +281,7 @@ config ARCH_LX2162A config ARCH_LX2160A bool select ARMV8_SET_SMPEN - select ESBC_HDR_LS + select ESBC_HDR_LS if CHAIN_OF_TRUST select FSL_DDR_BIST select FSL_DDR_INTERACTIVE select FSL_LAYERSCAPE @@ -461,11 +461,6 @@ config EMC2305 Enable the EMC2305 fan controller for configuration of fan speed. -config NXP_ESBC - bool "NXP_ESBC" - help - Enable Freescale Secure Boot feature - config QSPI_AHB_INIT bool "Init the QSPI AHB bus" help diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 0ef5e730bdc..e7003d3b647 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -827,12 +827,6 @@ config FSL_LAW config HETROGENOUS_CLUSTERS bool -config NXP_ESBC - bool "NXP_ESBC" - help - Enable Freescale Secure Boot feature. Normally selected - by defconfig. If unsure, do not change. - config MAX_CPUS int "Maximum number of CPUs permitted for MPC85xx" default 12 if ARCH_T4240 diff --git a/board/congatec/common/Kconfig b/board/congatec/common/Kconfig index d4a238de99b..a1f2139219b 100644 --- a/board/congatec/common/Kconfig +++ b/board/congatec/common/Kconfig @@ -1,44 +1,3 @@ -if !ARCH_IMX8M && !ARCH_IMX8 - -config CHAIN_OF_TRUST - depends on !FIT_SIGNATURE && SECURE_BOOT - imply CMD_BLOB - imply CMD_HASH if ARM - select FSL_CAAM - select SPL_BOARD_INIT if (ARM && SPL) - select SHA_HW_ACCEL - select SHA_PROG_HW_ACCEL - select ENV_IS_NOWHERE - select CMD_EXT4 if ARM - select CMD_EXT4_WRITE if ARM - bool - default y - -config CMD_ESBC_VALIDATE - bool "Enable the 'esbc_validate' and 'esbc_halt' commands" - default y if CHAIN_OF_TRUST - help - This option enables two commands used for secure booting: - - esbc_validate - validate signature using RSA verification - esbc_halt - put the core in spin loop (Secure Boot Only) - -endif - -config VOL_MONITOR_LTC3882_READ - depends on VID - bool "Enable the LTC3882 voltage monitor read" - help - This option enables LTC3882 voltage monitor read - functionality. It is used by common VID driver. - -config VOL_MONITOR_LTC3882_SET - depends on VID - bool "Enable the LTC3882 voltage monitor set" - help - This option enables LTC3882 voltage monitor set - functionality. It is used by common VID driver. - config USB_TCPC bool "USB Typec port controller simple driver" help -- GitLab From 5aad0a14bacc22b9d36956f12fa9480e3c0c672f Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 17 Jun 2022 16:24:32 -0400 Subject: [PATCH 475/581] fsl_validate: Migrate SPL_UBOOT_KEY_HASH to Kconfig Move setting of SPL_UBOOT_KEY_HASH to a non-NULL value to Kconfig. As part of this, change fsl_secboot_validate(...) to check that it is passed a non-empty string, rather than non-NULL. Cc: Peng Fan Cc: Priyanka Jain Cc: Kshitiz Varshney Signed-off-by: Tom Rini --- arch/Kconfig.nxp | 11 +++++++++++ arch/arm/include/asm/fsl_secure_boot.h | 13 ------------- arch/powerpc/include/asm/fsl_secure_boot.h | 10 ---------- board/freescale/common/fsl_validate.c | 2 +- 4 files changed, 12 insertions(+), 24 deletions(-) diff --git a/arch/Kconfig.nxp b/arch/Kconfig.nxp index 273e8e86dae..ccbf684bdb3 100644 --- a/arch/Kconfig.nxp +++ b/arch/Kconfig.nxp @@ -64,6 +64,17 @@ config SYS_FSL_SFP_VER_3_4 endchoice +config SPL_UBOOT_KEY_HASH + string "Non-SRK key hash for U-Boot public/private key pair" + depends on SPL + default "" + help + Set the key hash for U-Boot here if public/private key pair used to + sign U-boot are different from the SRK hash put in the fuse. Example + of a key hash is + 41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b. + Otherwise leave this empty. + config SYS_FSL_SRK_LE def_bool y depends on ARM diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h index 09c88841e0c..9c9e1dab9a4 100644 --- a/arch/arm/include/asm/fsl_secure_boot.h +++ b/arch/arm/include/asm/fsl_secure_boot.h @@ -8,19 +8,6 @@ #define __FSL_SECURE_BOOT_H #ifdef CONFIG_CHAIN_OF_TRUST -#ifdef CONFIG_SPL_BUILD -/* - * Define the key hash for U-Boot here if public/private key pair used to - * sign U-boot are different from the SRK hash put in the fuse - * Example of defining KEY_HASH is - * #define CONFIG_SPL_UBOOT_KEY_HASH \ - * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b" - * else leave it defined as NULL - */ - -#define CONFIG_SPL_UBOOT_KEY_HASH NULL -#endif /* ifdef CONFIG_SPL_BUILD */ - #ifndef CONFIG_SPL_BUILD #ifndef CONFIG_SYS_RAMBOOT /* The key used for verification of next level images diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h index 9ae4c590f1d..c062fa5c191 100644 --- a/arch/powerpc/include/asm/fsl_secure_boot.h +++ b/arch/powerpc/include/asm/fsl_secure_boot.h @@ -75,16 +75,6 @@ #define CONFIG_SPL_SPAACT_ADDR 0x2f000000 #define CONFIG_SPL_JR0_LIODN_S 454 #define CONFIG_SPL_JR0_LIODN_NS 458 -/* - * Define the key hash for U-Boot here if public/private key pair used to - * sign U-boot are different from the SRK hash put in the fuse - * Example of defining KEY_HASH is - * #define CONFIG_SPL_UBOOT_KEY_HASH \ - * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b" - * else leave it defined as NULL - */ - -#define CONFIG_SPL_UBOOT_KEY_HASH NULL #endif /* ifdef CONFIG_SPL_BUILD */ #ifndef CONFIG_SPL_BUILD diff --git a/board/freescale/common/fsl_validate.c b/board/freescale/common/fsl_validate.c index 34875d0b8f2..f1a0b0cfc34 100644 --- a/board/freescale/common/fsl_validate.c +++ b/board/freescale/common/fsl_validate.c @@ -871,7 +871,7 @@ int fsl_secboot_validate(uintptr_t haddr, char *arg_hash_str, int ret, i, hash_cmd = 0; u32 srk_hash[8]; - if (arg_hash_str != NULL) { + if (strlen(arg_hash_str) != 0) { const char *cp = arg_hash_str; int i = 0; -- GitLab From 52aaa1840d226ab9863fd9b64c0a8623abb60706 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 17 Jun 2022 16:24:33 -0400 Subject: [PATCH 476/581] nxp: config_fsl_chain_trust.h: Clean up and remove unused portions The way that secure boot is implemented today on NXP ARM platforms does not reuse the elements found in include/config_fsl_chain_trust.h to construct CONFIG_SECBOOT but instead board header files have their environment setup as needed and then fsl_setenv_chain_of_trust() will set secureboot in the environment. Remove a large number of unused defines here. Cc: Peng Fan Signed-off-by: Tom Rini --- arch/arm/include/asm/fsl_secure_boot.h | 71 -------------------------- include/config_fsl_chain_trust.h | 25 --------- 2 files changed, 96 deletions(-) diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h index 9c9e1dab9a4..a4f4961fc87 100644 --- a/arch/arm/include/asm/fsl_secure_boot.h +++ b/arch/arm/include/asm/fsl_secure_boot.h @@ -24,76 +24,6 @@ #endif -#ifdef CONFIG_ARCH_LS2080A -#define CONFIG_EXTRA_ENV \ - "setenv fdt_high 0xa0000000;" \ - "setenv initrd_high 0xcfffffff;" \ - "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';" -#else -#define CONFIG_EXTRA_ENV \ - "setenv fdt_high 0xffffffff;" \ - "setenv initrd_high 0xffffffff;" \ - "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';" -#endif - -/* Copying Bootscript and Header to DDR from NOR for LS2 and for rest, from - * Non-XIP Memory (Nand/SD)*/ -#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_FSL_LSCH3) || \ - defined(CONFIG_SD_BOOT) || defined(CONFIG_NAND_BOOT) -#define CONFIG_BOOTSCRIPT_COPY_RAM -#endif -/* The address needs to be modified according to NOR, NAND, SD and - * DDR memory map - */ -#ifdef CONFIG_FSL_LSCH3 -#ifdef CONFIG_QSPI_BOOT -#define CONFIG_BS_ADDR_DEVICE 0x20600000 -#define CONFIG_BS_HDR_ADDR_DEVICE 0x20640000 -#else /* NOR BOOT */ -#define CONFIG_BS_ADDR_DEVICE 0x580600000 -#define CONFIG_BS_HDR_ADDR_DEVICE 0x580640000 -#endif /*ifdef CONFIG_QSPI_BOOT */ -#define CONFIG_BS_SIZE 0x00001000 -#define CONFIG_BS_HDR_SIZE 0x00004000 -#define CONFIG_BS_ADDR_RAM 0xa0600000 -#define CONFIG_BS_HDR_ADDR_RAM 0xa0640000 -#else -#ifdef CONFIG_SD_BOOT -/* For SD boot address and size are assigned in terms of sector - * offset and no. of sectors respectively. - */ -#define CONFIG_BS_ADDR_DEVICE 0x00003000 -#define CONFIG_BS_HDR_ADDR_DEVICE 0x00003200 -#define CONFIG_BS_SIZE 0x00000008 -#define CONFIG_BS_HDR_SIZE 0x00000010 -#elif defined(CONFIG_NAND_BOOT) -#define CONFIG_BS_ADDR_DEVICE 0x00600000 -#define CONFIG_BS_HDR_ADDR_DEVICE 0x00640000 -#define CONFIG_BS_SIZE 0x00001000 -#define CONFIG_BS_HDR_SIZE 0x00002000 -#elif defined(CONFIG_QSPI_BOOT) -#define CONFIG_BS_ADDR_DEVICE 0x40600000 -#define CONFIG_BS_HDR_ADDR_DEVICE 0x40640000 -#define CONFIG_BS_SIZE 0x00001000 -#define CONFIG_BS_HDR_SIZE 0x00002000 -#else /* Default NOR Boot */ -#define CONFIG_BS_ADDR_DEVICE 0x60600000 -#define CONFIG_BS_HDR_ADDR_DEVICE 0x60640000 -#define CONFIG_BS_SIZE 0x00001000 -#define CONFIG_BS_HDR_SIZE 0x00002000 -#endif -#define CONFIG_BS_ADDR_RAM 0x81000000 -#define CONFIG_BS_HDR_ADDR_RAM 0x81020000 -#endif - -#ifdef CONFIG_BOOTSCRIPT_COPY_RAM -#define CONFIG_BOOTSCRIPT_ADDR CONFIG_BS_ADDR_RAM -#define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM -#else -#define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_DEVICE -/* BOOTSCRIPT_ADDR is not required */ -#endif - #ifdef CONFIG_FSL_LS_PPA /* Define the key hash here if SRK used for signing PPA image is * different from SRK hash put in SFP used for U-Boot. @@ -104,7 +34,6 @@ #define PPA_KEY_HASH NULL #endif /* ifdef CONFIG_FSL_LS_PPA */ -#include #endif /* #ifndef CONFIG_SPL_BUILD */ #endif /* #ifdef CONFIG_CHAIN_OF_TRUST */ #endif diff --git a/include/config_fsl_chain_trust.h b/include/config_fsl_chain_trust.h index 3922241be00..dd01e966894 100644 --- a/include/config_fsl_chain_trust.h +++ b/include/config_fsl_chain_trust.h @@ -10,10 +10,6 @@ #ifdef CONFIG_CHAIN_OF_TRUST -#ifndef CONFIG_EXTRA_ENV -#define CONFIG_EXTRA_ENV "" -#endif - /* * Control should not reach back to uboot after validation of images * for secure boot flow and therefore bootscript should have @@ -21,14 +17,6 @@ * after validating images, core should just spin. */ -/* - * Define the key hash for boot script here if public/private key pair used to - * sign bootscript are different from the SRK hash put in the fuse - * Example of defining KEY_HASH is - * #define CONFIG_BOOTSCRIPT_KEY_HASH \ - * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b" - */ - #ifdef CONFIG_USE_BOOTARGS #define CONFIG_SET_BOOTARGS "setenv bootargs \'" CONFIG_BOOTARGS" \';" #else @@ -36,25 +24,12 @@ "rw console=ttyS0,115200 ramdisk_size=600000\';" #endif - -#ifdef CONFIG_BOOTSCRIPT_KEY_HASH #define CONFIG_SECBOOT \ "setenv bs_hdraddr " __stringify(CONFIG_BOOTSCRIPT_HDR_ADDR)";" \ CONFIG_SET_BOOTARGS \ - CONFIG_EXTRA_ENV \ - "esbc_validate $bs_hdraddr " \ - __stringify(CONFIG_BOOTSCRIPT_KEY_HASH)";" \ - "source $img_addr;" \ - "esbc_halt\0" -#else -#define CONFIG_SECBOOT \ - "setenv bs_hdraddr " __stringify(CONFIG_BOOTSCRIPT_HDR_ADDR)";" \ - CONFIG_SET_BOOTARGS \ - CONFIG_EXTRA_ENV \ "esbc_validate $bs_hdraddr;" \ "source $img_addr;" \ "esbc_halt\0" -#endif #ifdef CONFIG_BOOTSCRIPT_COPY_RAM #define CONFIG_BS_COPY_ENV \ -- GitLab From f4cd75e96a461e1b138c3af85a4085e2772e4f7c Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 17 Jun 2022 16:24:34 -0400 Subject: [PATCH 477/581] powerpc: Clean up CHAIN_OF_TRUST related options As things stand currently, there is only one PowerPC platform that enables the options for CHAIN_OF_TRUST. From the board header files, remove a number of never-set options. Remove board specific values from arch/powerpc/include/asm/fsl_secure_boot.h as well. Rework include/config_fsl_chain_trust.h to not abuse the CONFIG namespace for constructing CHAIN_BOOT_CMD. Migrate all of the configurable addresses to Kconfig. If any platforms are re-introduced with secure boot support, everything required should still be here, but now in Kconfig, or requires migration of an option to Kconfig. Cc: Peng Fan Signed-off-by: Tom Rini --- arch/Kconfig.nxp | 40 +++++++++++++++++++ arch/powerpc/include/asm/fsl_secure_boot.h | 43 +-------------------- board/freescale/common/fsl_chain_of_trust.c | 5 ++- configs/T2080QDS_SECURE_BOOT_defconfig | 11 +++--- include/config_fsl_chain_trust.h | 35 +++++++---------- include/configs/P1010RDB.h | 4 +- include/configs/T104xRDB.h | 8 ---- include/configs/corenet_ds.h | 9 ----- 8 files changed, 66 insertions(+), 89 deletions(-) diff --git a/arch/Kconfig.nxp b/arch/Kconfig.nxp index ccbf684bdb3..03b73d4cc34 100644 --- a/arch/Kconfig.nxp +++ b/arch/Kconfig.nxp @@ -75,6 +75,46 @@ config SPL_UBOOT_KEY_HASH 41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b. Otherwise leave this empty. +if PPC + +config BOOTSCRIPT_COPY_RAM + bool "Secure boot copies boot script to RAM" + help + On systems that support chain of trust booting, a number of addresses + are required to set variables that are used in the copying and then + verification of different parts of the system. If enabled, the subsequent + options are for what location to use in each step. + +config BS_ADDR_DEVICE + hex "Address in RAM for bs_device" + depends on BOOTSCRIPT_COPY_RAM + +config BS_SIZE + hex "The size of bs_size which is the amount read from bs_device" + depends on BOOTSCRIPT_COPY_RAM + +config BS_ADDR_RAM + hex "Address in RAM for bs_ram" + depends on BOOTSCRIPT_COPY_RAM + +config BS_HDR_ADDR_DEVICE + hex "Address in RAM for bs_hdr_device" + depends on BOOTSCRIPT_COPY_RAM + +config BS_HDR_SIZE + hex "The size of bs_hdr_size which is the amount read from bs_hdr_device" + depends on BOOTSCRIPT_COPY_RAM + +config BS_HDR_ADDR_RAM + hex "Address in RAM for bs_hdr_ram" + depends on BOOTSCRIPT_COPY_RAM + +config BOOTSCRIPT_HDR_ADDR + hex "CONFIG_BOOTSCRIPT_HDR_ADDR" + default BS_ADDR_RAM if BOOTSCRIPT_COPY_RAM + +endif + config SYS_FSL_SRK_LE def_bool y depends on ARM diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h index c062fa5c191..a96a1ac5d77 100644 --- a/arch/powerpc/include/asm/fsl_secure_boot.h +++ b/arch/powerpc/include/asm/fsl_secure_boot.h @@ -10,19 +10,12 @@ #ifdef CONFIG_NXP_ESBC #if defined(CONFIG_FSL_CORENET) #define CONFIG_SYS_PBI_FLASH_BASE 0xc0000000 -#elif defined(CONFIG_TARGET_BSC9132QDS) -#define CONFIG_SYS_PBI_FLASH_BASE 0xc8000000 -#elif defined(CONFIG_TARGET_C29XPCIE) -#define CONFIG_SYS_PBI_FLASH_BASE 0xcc000000 #else #define CONFIG_SYS_PBI_FLASH_BASE 0xce000000 #endif #define CONFIG_SYS_PBI_FLASH_WINDOW 0xcff80000 -#if defined(CONFIG_TARGET_B4860QDS) || \ - defined(CONFIG_TARGET_B4420QDS) || \ - defined(CONFIG_TARGET_T4240QDS) || \ - defined(CONFIG_TARGET_T2080QDS) || \ +#if defined(CONFIG_TARGET_T2080QDS) || \ defined(CONFIG_TARGET_T2080RDB) || \ defined(CONFIG_TARGET_T1042RDB) || \ defined(CONFIG_TARGET_T1042D4RDB) || \ @@ -78,40 +71,6 @@ #endif /* ifdef CONFIG_SPL_BUILD */ #ifndef CONFIG_SPL_BUILD -/* - * fsl_setenv_chain_of_trust() must be called from - * board_late_init() - */ - -/* If Boot Script is not on NOR and is required to be copied on RAM */ -#ifdef CONFIG_BOOTSCRIPT_COPY_RAM -#define CONFIG_BS_HDR_ADDR_RAM 0x00010000 -#define CONFIG_BS_HDR_ADDR_DEVICE 0x00800000 -#define CONFIG_BS_HDR_SIZE 0x00002000 -#define CONFIG_BS_ADDR_RAM 0x00012000 -#define CONFIG_BS_ADDR_DEVICE 0x00802000 -#define CONFIG_BS_SIZE 0x00001000 - -#define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM -#else - -/* The bootscript header address is different for B4860 because the NOR - * mapping is different on B4 due to reduced NOR size. - */ -#if defined(CONFIG_TARGET_B4860QDS) || defined(CONFIG_TARGET_B4420QDS) -#define CONFIG_BOOTSCRIPT_HDR_ADDR 0xecc00000 -#elif defined(CONFIG_FSL_CORENET) -#define CONFIG_BOOTSCRIPT_HDR_ADDR 0xe8e00000 -#elif defined(CONFIG_TARGET_BSC9132QDS) -#define CONFIG_BOOTSCRIPT_HDR_ADDR 0x88020000 -#elif defined(CONFIG_TARGET_C29XPCIE) -#define CONFIG_BOOTSCRIPT_HDR_ADDR 0xec020000 -#else -#define CONFIG_BOOTSCRIPT_HDR_ADDR 0xee020000 -#endif - -#endif /* #ifdef CONFIG_BOOTSCRIPT_COPY_RAM */ - #include #endif /* #ifndef CONFIG_SPL_BUILD */ #endif /* #ifdef CONFIG_CHAIN_OF_TRUST */ diff --git a/board/freescale/common/fsl_chain_of_trust.c b/board/freescale/common/fsl_chain_of_trust.c index 7ffb315bc93..d31fb821817 100644 --- a/board/freescale/common/fsl_chain_of_trust.c +++ b/board/freescale/common/fsl_chain_of_trust.c @@ -12,6 +12,7 @@ #include #include #include +#include #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_FRAMEWORK) #include @@ -76,14 +77,14 @@ int fsl_setenv_chain_of_trust(void) /* If Boot mode is Secure, set the environment variables * bootdelay = 0 (To disable Boot Prompt) - * bootcmd = CONFIG_CHAIN_BOOT_CMD (Validate and execute Boot script) + * bootcmd = CHAIN_BOOT_CMD (Validate and execute Boot script) */ env_set("bootdelay", "-2"); #ifdef CONFIG_ARM env_set("secureboot", "y"); #else - env_set("bootcmd", CONFIG_CHAIN_BOOT_CMD); + env_set("bootcmd", CHAIN_BOOT_CMD); #endif return 0; diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index 0a3e55b0f3d..00d36ff7599 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -1,8 +1,13 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_ENV_SIZE=0x2000 -CONFIG_NXP_ESBC=y CONFIG_DEFAULT_DEVICE_TREE="t2080qds" +CONFIG_MPC85xx=y +CONFIG_TARGET_T2080QDS=y +CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_NXP_ESBC=y +CONFIG_BOOTSCRIPT_HDR_ADDR=0xee020000 CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="t208xqds_vdd_mv" @@ -10,10 +15,6 @@ CONFIG_VOL_MONITOR_IR36021_READ=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_QIXIS=y # CONFIG_QIXIS_I2C_ACCESS is not set -CONFIG_MPC85xx=y -CONFIG_TARGET_T2080QDS=y -CONFIG_MPC85XX_HAVE_RESET_VECTOR=y -CONFIG_ENABLE_36BIT_PHYS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_MP=y CONFIG_FIT=y diff --git a/include/config_fsl_chain_trust.h b/include/config_fsl_chain_trust.h index dd01e966894..380c906ba83 100644 --- a/include/config_fsl_chain_trust.h +++ b/include/config_fsl_chain_trust.h @@ -18,21 +18,21 @@ */ #ifdef CONFIG_USE_BOOTARGS -#define CONFIG_SET_BOOTARGS "setenv bootargs \'" CONFIG_BOOTARGS" \';" +#define SET_BOOTARGS "setenv bootargs \'" CONFIG_BOOTARGS" \';" #else -#define CONFIG_SET_BOOTARGS "setenv bootargs \'root=/dev/ram " \ +#define SET_BOOTARGS "setenv bootargs \'root=/dev/ram " \ "rw console=ttyS0,115200 ramdisk_size=600000\';" #endif -#define CONFIG_SECBOOT \ +#define SECBOOT \ "setenv bs_hdraddr " __stringify(CONFIG_BOOTSCRIPT_HDR_ADDR)";" \ - CONFIG_SET_BOOTARGS \ + SET_BOOTARGS \ "esbc_validate $bs_hdraddr;" \ "source $img_addr;" \ "esbc_halt\0" #ifdef CONFIG_BOOTSCRIPT_COPY_RAM -#define CONFIG_BS_COPY_ENV \ +#define BS_COPY_ENV \ "setenv bs_hdr_ram " __stringify(CONFIG_BS_HDR_ADDR_RAM)";" \ "setenv bs_hdr_device " __stringify(CONFIG_BS_HDR_ADDR_DEVICE)";" \ "setenv bs_hdr_size " __stringify(CONFIG_BS_HDR_SIZE)";" \ @@ -43,33 +43,28 @@ /* For secure boot flow, default environment used will be used */ #if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_NAND_BOOT) || \ defined(CONFIG_SD_BOOT) -#if defined(CONFIG_RAMBOOT_NAND) || defined(CONFIG_NAND_BOOT) -#define CONFIG_BS_COPY_CMD \ +#if defined(CONFIG_NAND_BOOT) +#define BS_COPY_CMD \ "nand read $bs_hdr_ram $bs_hdr_device $bs_hdr_size ;" \ "nand read $bs_ram $bs_device $bs_size ;" #elif defined(CONFIG_SD_BOOT) -#define CONFIG_BS_COPY_CMD \ +#define BS_COPY_CMD \ "mmc read $bs_hdr_ram $bs_hdr_device $bs_hdr_size ;" \ "mmc read $bs_ram $bs_device $bs_size ;" #endif #else -#define CONFIG_BS_COPY_CMD \ +#define BS_COPY_CMD \ "cp.b $bs_hdr_device $bs_hdr_ram $bs_hdr_size ;" \ "cp.b $bs_device $bs_ram $bs_size ;" #endif +#else /* !CONFIG_BOOTSCRIPT_COPY_RAM */ +#define BS_COPY_ENV +#define BS_COPY_CMD #endif /* CONFIG_BOOTSCRIPT_COPY_RAM */ -#ifndef CONFIG_BS_COPY_ENV -#define CONFIG_BS_COPY_ENV -#endif - -#ifndef CONFIG_BS_COPY_CMD -#define CONFIG_BS_COPY_CMD -#endif - -#define CONFIG_CHAIN_BOOT_CMD CONFIG_BS_COPY_ENV \ - CONFIG_BS_COPY_CMD \ - CONFIG_SECBOOT +#define CHAIN_BOOT_CMD BS_COPY_ENV \ + BS_COPY_CMD \ + SECBOOT #endif #endif diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 200b88050cc..19aebb810c7 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -53,7 +53,6 @@ #endif #ifdef CONFIG_NAND_SECBOOT /* NAND Boot */ -#define CONFIG_RAMBOOT_NAND #define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc #endif @@ -348,8 +347,7 @@ extern unsigned long get_sdram_size(void); FTIM2_GPCM_TWP(0x1f)) #define CONFIG_SYS_CS3_FTIM3 0x0 -#if defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH) || \ - defined(CONFIG_RAMBOOT_NAND) +#if defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH) #define CONFIG_SYS_RAMBOOT #else #undef CONFIG_SYS_RAMBOOT diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index f1738b32c5d..1c2052608ec 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -66,14 +66,6 @@ #define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_PCIE4 /* PCIE controller 4 */ -#if defined(CONFIG_SPIFLASH) -#elif defined(CONFIG_MTD_RAW_NAND) -#ifdef CONFIG_NXP_ESBC -#define CONFIG_RAMBOOT_NAND -#define CONFIG_BOOTSCRIPT_COPY_RAM -#endif -#endif - /* * These can be toggled for performance analysis, otherwise use default. */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 51bc772e238..6a4fd90ded9 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -15,17 +15,8 @@ #include "../board/freescale/common/ics307_clk.h" #ifdef CONFIG_RAMBOOT_PBL -#ifdef CONFIG_NXP_ESBC #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#ifdef CONFIG_MTD_RAW_NAND -#define CONFIG_RAMBOOT_NAND -#endif -#define CONFIG_BOOTSCRIPT_COPY_RAM -#else -#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE -#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#endif #endif #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE -- GitLab From d8e8461709a4a996d8b65178a99c59024e9da5ac Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 20 Jun 2022 08:07:42 -0400 Subject: [PATCH 478/581] Convert CONFIG_FSL_FIXED_MMC_LOCATION et al to Kconfig This converts the following to Kconfig: CONFIG_FSL_FIXED_MMC_LOCATION CONFIG_ESDHC_HC_BLK_ADDR Signed-off-by: Tom Rini --- arch/powerpc/include/asm/config_mpc85xx.h | 3 --- boot/Kconfig | 13 +++++++++++++ configs/P1010RDB-PA_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PA_NOR_defconfig | 1 + configs/P1010RDB-PA_SDCARD_defconfig | 1 + configs/P1010RDB-PB_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PB_NOR_defconfig | 1 + configs/P1010RDB-PB_SDCARD_defconfig | 1 + configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P1020RDB-PC_36BIT_defconfig | 1 + configs/P1020RDB-PC_SDCARD_defconfig | 1 + configs/P1020RDB-PC_defconfig | 1 + configs/P1020RDB-PD_SDCARD_defconfig | 1 + configs/P1020RDB-PD_defconfig | 1 + configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P2020RDB-PC_36BIT_defconfig | 1 + configs/P2020RDB-PC_SDCARD_defconfig | 1 + configs/P2020RDB-PC_defconfig | 1 + include/configs/P1010RDB.h | 4 +--- include/configs/P2041RDB.h | 5 ----- include/configs/corenet_ds.h | 5 ----- include/configs/p1_p2_rdb_pc.h | 4 +--- 24 files changed, 33 insertions(+), 19 deletions(-) diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index e82adc6b454..ce3a776c7e8 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -33,7 +33,6 @@ #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2" #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY #define CONFIG_SYS_FSL_USB1_PHY_ENABLE -#define CONFIG_ESDHC_HC_BLK_ADDR /* P1011 is single core version of P1020 */ #elif defined(CONFIG_ARCH_P1011) @@ -148,7 +147,6 @@ #define CONFIG_SYS_FSL_DSP_M2_RAM_ADDR 0xb0000000 #define CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT 0xff600000 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 3 -#define CONFIG_ESDHC_HC_BLK_ADDR #elif defined(CONFIG_ARCH_BSC9132) #define CONFIG_FSL_SDHC_V2_3 @@ -160,7 +158,6 @@ #define CONFIG_SYS_FSL_IFC_BANK_COUNT 3 #define CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2" -#define CONFIG_ESDHC_HC_BLK_ADDR #elif defined(CONFIG_ARCH_T4240) #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ diff --git a/boot/Kconfig b/boot/Kconfig index 38fc71c6f79..945ef1ca133 100644 --- a/boot/Kconfig +++ b/boot/Kconfig @@ -575,6 +575,19 @@ config SPIFLASH endchoice +config FSL_FIXED_MMC_LOCATION + bool "PBL MMC is at a fixed location" + depends on SDCARD && !RAMBOOT_PBL + +config ESDHC_HC_BLK_ADDR + def_bool y + depends on FSL_FIXED_MMC_LOCATION && (ARCH_BSC9131 || ARCH_BSC9132 || ARCH_P1010) + help + In High Capacity SD Cards (> 2 GBytes), the 32-bit source address and + code length of these soc specify the memory address in block address + format. Block length is fixed to 512 bytes as per the SD High + Capacity specification. + config SYS_FSL_PBL_PBI string "PBI(pre-boot instructions) commands for the PBL image" depends on RAMBOOT_PBL diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index ee6952e1707..93e82650895 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -15,6 +15,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_FSL_FIXED_MMC_LOCATION=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index 8343e94748d..dd4f5f19e94 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -21,6 +21,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_FSL_FIXED_MMC_LOCATION=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index 08cde4e2104..7ad9b2279fa 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -14,6 +14,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_FSL_FIXED_MMC_LOCATION=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 06e39bc74c0..45d120ab198 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -20,6 +20,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_FSL_FIXED_MMC_LOCATION=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 59125f2448f..eb669a08a67 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -15,6 +15,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_FSL_FIXED_MMC_LOCATION=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index c37eba17714..2c8a460798a 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -21,6 +21,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_FSL_FIXED_MMC_LOCATION=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index 3d4fb2cc7c6..05a4c1286f8 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -14,6 +14,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_FSL_FIXED_MMC_LOCATION=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index ca5abd4ed10..0a9ac754ec7 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -20,6 +20,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_FSL_FIXED_MMC_LOCATION=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index d4ef3d9812d..044664658a9 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -23,6 +23,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SPL_SYS_MONITOR_BASE=0xF8F80000 +CONFIG_FSL_FIXED_MMC_LOCATION=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index 7593507894c..0a589bb9be9 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -17,6 +17,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_FSL_FIXED_MMC_LOCATION=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 944bf2379c5..6071fd450ef 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -22,6 +22,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SPL_SYS_MONITOR_BASE=0xF8F80000 +CONFIG_FSL_FIXED_MMC_LOCATION=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 49c6037d4bf..15a366f23da 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -16,6 +16,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_FSL_FIXED_MMC_LOCATION=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index 9eab122f7ad..a55b54db67a 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -22,6 +22,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SPL_SYS_MONITOR_BASE=0xF8F80000 +CONFIG_FSL_FIXED_MMC_LOCATION=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index b63da1e9e2d..ba841785cbd 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -16,6 +16,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_FSL_FIXED_MMC_LOCATION=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 2c4c5483732..984c0fb77da 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -23,6 +23,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SPL_SYS_MONITOR_BASE=0xF8F80000 +CONFIG_FSL_FIXED_MMC_LOCATION=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index 2b5bc851602..4feba614d23 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -17,6 +17,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_FSL_FIXED_MMC_LOCATION=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index ca0c9025c7d..9450de2130e 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -22,6 +22,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SPL_SYS_MONITOR_BASE=0xF8F80000 +CONFIG_FSL_FIXED_MMC_LOCATION=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index fef773cb163..d82e9c1563b 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -16,6 +16,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_FSL_FIXED_MMC_LOCATION=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 19aebb810c7..813516892c6 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -465,9 +465,7 @@ extern unsigned long get_sdram_size(void); /* * Environment */ -#if defined(CONFIG_SDCARD) -#define CONFIG_FSL_FIXED_MMC_LOCATION -#elif defined(CONFIG_MTD_RAW_NAND) +#if defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD #define SPL_ENV_ADDR (CONFIG_SYS_INIT_L2_ADDR + (160 << 10)) #endif diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 4e96d2a06b7..4a1fccff598 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -43,11 +43,6 @@ #define CONFIG_SRIO_PCIE_BOOT_MASTER #define CONFIG_SYS_DPAA_RMAN /* RMan */ -#if defined(CONFIG_SPIFLASH) -#elif defined(CONFIG_SDCARD) - #define CONFIG_FSL_FIXED_MMC_LOCATION -#endif - #ifndef __ASSEMBLY__ #include #endif diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 6a4fd90ded9..c0952e09285 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -39,11 +39,6 @@ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ -#if defined(CONFIG_SPIFLASH) -#elif defined(CONFIG_SDCARD) -#define CONFIG_FSL_FIXED_MMC_LOCATION -#endif - /* * These can be toggled for performance analysis, otherwise use default. */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index cb1b170a45b..3ba95b4b6c1 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -415,9 +415,7 @@ /* * Environment */ -#if defined(CONFIG_SDCARD) -#define CONFIG_FSL_FIXED_MMC_LOCATION -#elif defined(CONFIG_MTD_RAW_NAND) +#if defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD #define SPL_ENV_ADDR (CONFIG_SYS_INIT_L2_ADDR + (160 << 10)) #endif -- GitLab From 5d7f601480fa9a5327be14d14a5d12e3dc595559 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 20 Jun 2022 08:07:43 -0400 Subject: [PATCH 479/581] lcd: Remove legacy CONFIG_FB_ADDR code No platforms set both CONFIG_LCD and CONFIG_FB_ADDR at this time, drop this legacy code. Signed-off-by: Tom Rini --- README | 14 -------------- common/board_f.c | 4 ---- include/configs/at91sam9rlek.h | 2 -- include/configs/trats.h | 1 - include/configs/trats2.h | 1 - 5 files changed, 22 deletions(-) diff --git a/README b/README index f3d4a9c2b22..6bdfca66d65 100644 --- a/README +++ b/README @@ -1509,20 +1509,6 @@ The following options need to be configured: overwriting the architecture dependent default settings. -- Frame Buffer Address: - CONFIG_FB_ADDR - - Define CONFIG_FB_ADDR if you want to use specific - address for frame buffer. This is typically the case - when using a graphics controller has separate video - memory. U-Boot will then place the frame buffer at - the given address instead of dynamically reserving it - in system RAM by calling lcd_setmem(), which grabs - the memory for the frame buffer depending on the - configured panel size. - - Please see board_init_f function. - - Automatic software updates via TFTP server CONFIG_UPDATE_TFTP CONFIG_UPDATE_TFTP_CNT_MAX diff --git a/common/board_f.c b/common/board_f.c index a5666ca77c2..5c86faeb217 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -400,13 +400,9 @@ static int reserve_video(void) ((unsigned long)gd->relocaddr - addr) >> 10, addr); gd->relocaddr = addr; #elif defined(CONFIG_LCD) -# ifdef CONFIG_FB_ADDR - gd->fb_base = CONFIG_FB_ADDR; -# else /* reserve memory for LCD display (always full pages) */ gd->relocaddr = lcd_setmem(gd->relocaddr); gd->fb_base = gd->relocaddr; -# endif /* CONFIG_FB_ADDR */ #endif return 0; diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index e3350282bcf..e418edddfbe 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -22,8 +22,6 @@ /* LCD */ #define LCD_BPP LCD_COLOR8 -/* Let board_init_f handle the framebuffer allocation */ -#undef CONFIG_FB_ADDR /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 diff --git a/include/configs/trats.h b/include/configs/trats.h index bca239ae817..53f5a6996bd 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -149,7 +149,6 @@ #define LCD_BPP LCD_COLOR16 /* LCD */ -#define CONFIG_FB_ADDR 0x52504000 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54) #endif /* __CONFIG_H */ diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 20bd116c9e3..b7449dab8bd 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -139,7 +139,6 @@ #define LCD_BPP LCD_COLOR16 /* LCD */ -#define CONFIG_FB_ADDR 0x52504000 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54) #endif /* __CONFIG_H */ -- GitLab From a552ffc9d270769286d7a0697913689c31537bfa Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 20 Jun 2022 08:07:44 -0400 Subject: [PATCH 480/581] Convert CONFIG_LAYERSCAPE_NS_ACCESS to Kconfig This converts the following to Kconfig: CONFIG_LAYERSCAPE_NS_ACCESS Signed-off-by: Tom Rini --- arch/Kconfig.nxp | 4 ++++ configs/ls1012a2g5rdb_qspi_defconfig | 1 + configs/ls1012a2g5rdb_tfa_defconfig | 1 + configs/ls1012afrdm_qspi_defconfig | 1 + configs/ls1012afrdm_tfa_defconfig | 1 + configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig | 3 ++- configs/ls1012afrwy_qspi_defconfig | 1 + configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig | 3 ++- configs/ls1012afrwy_tfa_defconfig | 1 + configs/ls1012aqds_qspi_defconfig | 3 ++- configs/ls1012aqds_tfa_SECURE_BOOT_defconfig | 5 +++-- configs/ls1012aqds_tfa_defconfig | 3 ++- configs/ls1012ardb_qspi_SECURE_BOOT_defconfig | 3 ++- configs/ls1012ardb_qspi_defconfig | 1 + configs/ls1012ardb_tfa_SECURE_BOOT_defconfig | 3 ++- configs/ls1012ardb_tfa_defconfig | 1 + configs/ls1021aiot_qspi_defconfig | 3 ++- configs/ls1021aiot_sdcard_defconfig | 3 ++- configs/ls1021aqds_ddr4_nor_defconfig | 7 ++++--- configs/ls1021aqds_ddr4_nor_lpuart_defconfig | 7 ++++--- configs/ls1021aqds_nand_defconfig | 7 ++++--- configs/ls1021aqds_nor_SECURE_BOOT_defconfig | 7 ++++--- configs/ls1021aqds_nor_defconfig | 7 ++++--- configs/ls1021aqds_nor_lpuart_defconfig | 7 ++++--- configs/ls1021aqds_qspi_defconfig | 5 +++-- configs/ls1021aqds_sdcard_ifc_defconfig | 7 ++++--- configs/ls1021aqds_sdcard_qspi_defconfig | 5 +++-- configs/ls1021atsn_qspi_defconfig | 1 + configs/ls1021atsn_sdcard_defconfig | 1 + configs/ls1021atwr_nor_SECURE_BOOT_defconfig | 3 ++- configs/ls1021atwr_nor_defconfig | 1 + configs/ls1021atwr_nor_lpuart_defconfig | 1 + configs/ls1021atwr_qspi_defconfig | 1 + configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig | 3 ++- configs/ls1021atwr_sdcard_ifc_defconfig | 1 + configs/ls1021atwr_sdcard_qspi_defconfig | 1 + configs/ls1043aqds_defconfig | 7 ++++--- configs/ls1043aqds_lpuart_defconfig | 7 ++++--- configs/ls1043aqds_nand_defconfig | 11 ++++++----- configs/ls1043aqds_nor_ddr3_defconfig | 7 ++++--- configs/ls1043aqds_qspi_defconfig | 7 ++++--- configs/ls1043aqds_sdcard_ifc_defconfig | 13 +++++++------ configs/ls1043aqds_sdcard_qspi_defconfig | 13 +++++++------ configs/ls1043aqds_tfa_SECURE_BOOT_defconfig | 9 +++++---- configs/ls1043aqds_tfa_defconfig | 9 +++++---- configs/ls1043ardb_SECURE_BOOT_defconfig | 3 ++- configs/ls1043ardb_defconfig | 1 + configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 3 ++- configs/ls1043ardb_nand_defconfig | 1 + configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig | 3 ++- configs/ls1043ardb_sdcard_defconfig | 1 + configs/ls1043ardb_tfa_SECURE_BOOT_defconfig | 3 ++- configs/ls1043ardb_tfa_defconfig | 1 + configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig | 5 +++-- configs/ls1046afrwy_tfa_defconfig | 3 ++- configs/ls1046aqds_SECURE_BOOT_defconfig | 7 ++++--- configs/ls1046aqds_defconfig | 7 ++++--- configs/ls1046aqds_lpuart_defconfig | 7 ++++--- configs/ls1046aqds_nand_defconfig | 11 ++++++----- configs/ls1046aqds_qspi_defconfig | 7 ++++--- configs/ls1046aqds_sdcard_ifc_defconfig | 13 +++++++------ configs/ls1046aqds_sdcard_qspi_defconfig | 13 +++++++------ configs/ls1046aqds_tfa_SECURE_BOOT_defconfig | 9 +++++---- configs/ls1046aqds_tfa_defconfig | 9 +++++---- configs/ls1046ardb_emmc_defconfig | 1 + configs/ls1046ardb_qspi_SECURE_BOOT_defconfig | 3 ++- configs/ls1046ardb_qspi_defconfig | 1 + configs/ls1046ardb_qspi_spl_defconfig | 1 + configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig | 3 ++- configs/ls1046ardb_sdcard_defconfig | 1 + configs/ls1046ardb_tfa_SECURE_BOOT_defconfig | 3 ++- configs/ls1046ardb_tfa_defconfig | 1 + configs/pg_wcom_expu1_defconfig | 1 + configs/pg_wcom_expu1_update_defconfig | 1 + configs/pg_wcom_seli8_defconfig | 1 + configs/pg_wcom_seli8_update_defconfig | 1 + include/configs/km/pg-wcom-ls102xa.h | 1 - include/configs/ls1012a_common.h | 3 --- include/configs/ls1021aiot.h | 1 - include/configs/ls1021aqds.h | 1 - include/configs/ls1021atsn.h | 2 -- include/configs/ls1021atwr.h | 1 - include/configs/ls1043aqds.h | 2 -- include/configs/ls1043ardb.h | 2 -- include/configs/ls1046afrwy.h | 2 -- include/configs/ls1046aqds.h | 2 -- include/configs/ls1046ardb.h | 2 -- 87 files changed, 200 insertions(+), 140 deletions(-) diff --git a/arch/Kconfig.nxp b/arch/Kconfig.nxp index 03b73d4cc34..771a6c1e81a 100644 --- a/arch/Kconfig.nxp +++ b/arch/Kconfig.nxp @@ -134,6 +134,10 @@ config DEEP_SLEEP Indicates this SoC supports deep sleep feature. If deep sleep is supported, core will start to execute uboot when wakes up. +config LAYERSCAPE_NS_ACCESS + bool "Layerscape non-secure access support" + depends on ARCH_LS1021A || FSL_LSCH2 + config FSL_USE_PCA9547_MUX bool "Enable PCA9547 I2C Mux on Freescale boards" depends on PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3 diff --git a/configs/ls1012a2g5rdb_qspi_defconfig b/configs/ls1012a2g5rdb_qspi_defconfig index 0ab5c868af4..da72b39a494 100644 --- a/configs/ls1012a2g5rdb_qspi_defconfig +++ b/configs/ls1012a2g5rdb_qspi_defconfig @@ -12,6 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-2g5rdb" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1012a2g5rdb_tfa_defconfig b/configs/ls1012a2g5rdb_tfa_defconfig index 4a65705a8eb..8219d70e420 100644 --- a/configs/ls1012a2g5rdb_tfa_defconfig +++ b/configs/ls1012a2g5rdb_tfa_defconfig @@ -14,6 +14,7 @@ CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1012afrdm_qspi_defconfig b/configs/ls1012afrdm_qspi_defconfig index 8c70bf09515..c679b2b9836 100644 --- a/configs/ls1012afrdm_qspi_defconfig +++ b/configs/ls1012afrdm_qspi_defconfig @@ -11,6 +11,7 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frdm" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1012afrdm_tfa_defconfig b/configs/ls1012afrdm_tfa_defconfig index c425a7aae83..b580a59df42 100644 --- a/configs/ls1012afrdm_tfa_defconfig +++ b/configs/ls1012afrdm_tfa_defconfig @@ -13,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frdm" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig index 51218193673..6337508e67d 100644 --- a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig @@ -5,11 +5,12 @@ CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 -CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y +CONFIG_NXP_ESBC=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1012afrwy_qspi_defconfig b/configs/ls1012afrwy_qspi_defconfig index bb30e27e00f..35af5cde528 100644 --- a/configs/ls1012afrwy_qspi_defconfig +++ b/configs/ls1012afrwy_qspi_defconfig @@ -12,6 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" CONFIG_FSL_LS_PPA=y CONFIG_ENV_ADDR=0x401D0000 CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig index 155c47487f1..67335985740 100644 --- a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig @@ -6,12 +6,13 @@ CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 -CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y +CONFIG_NXP_ESBC=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1012afrwy_tfa_defconfig b/configs/ls1012afrwy_tfa_defconfig index 129855f9840..926d6c37744 100644 --- a/configs/ls1012afrwy_tfa_defconfig +++ b/configs/ls1012afrwy_tfa_defconfig @@ -13,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig index 1adf0fe0701..fabe357e581 100644 --- a/configs/ls1012aqds_qspi_defconfig +++ b/configs/ls1012aqds_qspi_defconfig @@ -9,10 +9,11 @@ CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds" -CONFIG_FSL_QIXIS=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig index b97cbaf8c36..0acad021fea 100644 --- a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig @@ -6,13 +6,14 @@ CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 -CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds" -CONFIG_FSL_QIXIS=y CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y +CONFIG_NXP_ESBC=y +CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1012aqds_tfa_defconfig b/configs/ls1012aqds_tfa_defconfig index 5f361b6a355..081d7a4275e 100644 --- a/configs/ls1012aqds_tfa_defconfig +++ b/configs/ls1012aqds_tfa_defconfig @@ -10,11 +10,12 @@ CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds" -CONFIG_FSL_QIXIS=y CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig index a39cb99cc0e..8c0184a92ef 100644 --- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig @@ -5,12 +5,13 @@ CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 -CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y +CONFIG_NXP_ESBC=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1012ardb_qspi_defconfig b/configs/ls1012ardb_qspi_defconfig index 0a6c43f04a5..560dba48690 100644 --- a/configs/ls1012ardb_qspi_defconfig +++ b/configs/ls1012ardb_qspi_defconfig @@ -13,6 +13,7 @@ CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_ENV_ADDR=0x40300000 CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig index bcd9d73ee06..051a4c56725 100644 --- a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig @@ -6,13 +6,14 @@ CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 -CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y +CONFIG_NXP_ESBC=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1012ardb_tfa_defconfig b/configs/ls1012ardb_tfa_defconfig index 4224b48f9d8..03b5a1369f0 100644 --- a/configs/ls1012ardb_tfa_defconfig +++ b/configs/ls1012ardb_tfa_defconfig @@ -14,6 +14,7 @@ CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1021aiot_qspi_defconfig b/configs/ls1021aiot_qspi_defconfig index 8b588f7d704..d8dd4c7ef19 100644 --- a/configs/ls1021aiot_qspi_defconfig +++ b/configs/ls1021aiot_qspi_defconfig @@ -12,9 +12,10 @@ CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart" -# CONFIG_DEEP_SLEEP is not set CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y +# CONFIG_DEEP_SLEEP is not set +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_QSPI_BOOT=y diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig index d34897a5080..df6ce92d5a6 100644 --- a/configs/ls1021aiot_sdcard_defconfig +++ b/configs/ls1021aiot_sdcard_defconfig @@ -14,12 +14,13 @@ CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart" CONFIG_SPL_TEXT_BASE=0x10000000 -# CONFIG_DEEP_SLEEP is not set CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y +# CONFIG_DEEP_SLEEP is not set +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_RAMBOOT_PBL=y diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig index 915871338e0..86f84720375 100644 --- a/configs/ls1021aqds_ddr4_nor_defconfig +++ b/configs/ls1021aqds_ddr4_nor_defconfig @@ -12,12 +12,13 @@ CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" -CONFIG_FSL_USE_PCA9547_MUX=y -CONFIG_FSL_QIXIS=y -# CONFIG_QIXIS_I2C_ACCESS is not set CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_ENV_ADDR=0x60300000 CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_FSL_QIXIS=y +# CONFIG_QIXIS_I2C_ACCESS is not set CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_FIT=y diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig index 00d9d3eced9..d8d7aa14678 100644 --- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig +++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig @@ -12,12 +12,13 @@ CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-lpuart" -CONFIG_FSL_USE_PCA9547_MUX=y -CONFIG_FSL_QIXIS=y -# CONFIG_QIXIS_I2C_ACCESS is not set CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_ENV_ADDR=0x60300000 CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_FSL_QIXIS=y +# CONFIG_QIXIS_I2C_ACCESS is not set CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_FIT=y diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index 9ab66cd53c2..649e2f99fac 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -16,14 +16,15 @@ CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 -CONFIG_FSL_USE_PCA9547_MUX=y -CONFIG_FSL_QIXIS=y -# CONFIG_QIXIS_I2C_ACCESS is not set CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_FSL_QIXIS=y +# CONFIG_QIXIS_I2C_ACCESS is not set CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_FIT=y diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig index d72af5de15e..ac5283603f3 100644 --- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig @@ -6,17 +6,18 @@ CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x1002000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 -CONFIG_NXP_ESBC=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" +CONFIG_SYS_LOAD_ADDR=0x82000000 +CONFIG_AHCI=y +CONFIG_NXP_ESBC=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_FSL_QIXIS=y # CONFIG_QIXIS_I2C_ACCESS is not set -CONFIG_SYS_LOAD_ADDR=0x82000000 -CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig index 42708b70f6b..21a5dae9491 100644 --- a/configs/ls1021aqds_nor_defconfig +++ b/configs/ls1021aqds_nor_defconfig @@ -12,12 +12,13 @@ CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" -CONFIG_FSL_USE_PCA9547_MUX=y -CONFIG_FSL_QIXIS=y -# CONFIG_QIXIS_I2C_ACCESS is not set CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_ENV_ADDR=0x60300000 CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_FSL_QIXIS=y +# CONFIG_QIXIS_I2C_ACCESS is not set CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_FIT=y diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig index 925b376086f..fca79f65bb6 100644 --- a/configs/ls1021aqds_nor_lpuart_defconfig +++ b/configs/ls1021aqds_nor_lpuart_defconfig @@ -12,12 +12,13 @@ CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-lpuart" -CONFIG_FSL_USE_PCA9547_MUX=y -CONFIG_FSL_QIXIS=y -# CONFIG_QIXIS_I2C_ACCESS is not set CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_ENV_ADDR=0x60300000 CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_FSL_QIXIS=y +# CONFIG_QIXIS_I2C_ACCESS is not set CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_FIT=y diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig index 4e24e43c2fc..75ec61fca36 100644 --- a/configs/ls1021aqds_qspi_defconfig +++ b/configs/ls1021aqds_qspi_defconfig @@ -13,10 +13,11 @@ CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" -CONFIG_FSL_USE_PCA9547_MUX=y -CONFIG_FSL_QIXIS=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_FIT=y diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index d5f6c5c25cf..db1a04f994e 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -16,15 +16,16 @@ CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 -CONFIG_FSL_USE_PCA9547_MUX=y -CONFIG_FSL_QIXIS=y -# CONFIG_QIXIS_I2C_ACCESS is not set CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_FSL_QIXIS=y +# CONFIG_QIXIS_I2C_ACCESS is not set CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_FIT=y diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index addd100b2b2..724c4106e07 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -16,14 +16,15 @@ CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 -CONFIG_FSL_USE_PCA9547_MUX=y -CONFIG_FSL_QIXIS=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_FIT=y diff --git a/configs/ls1021atsn_qspi_defconfig b/configs/ls1021atsn_qspi_defconfig index cfa83b8c3b8..fb89c217102 100644 --- a/configs/ls1021atsn_qspi_defconfig +++ b/configs/ls1021atsn_qspi_defconfig @@ -14,6 +14,7 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-tsn" CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig index 5e93f730b32..4d72c25f655 100644 --- a/configs/ls1021atsn_sdcard_defconfig +++ b/configs/ls1021atsn_sdcard_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig index 175f10f1f55..b2f081b8d7c 100644 --- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig @@ -6,7 +6,6 @@ CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x1020000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 -CONFIG_NXP_ESBC=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y @@ -14,6 +13,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y +CONFIG_NXP_ESBC=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig index e80b793a382..659ea4ef5a1 100644 --- a/configs/ls1021atwr_nor_defconfig +++ b/configs/ls1021atwr_nor_defconfig @@ -15,6 +15,7 @@ CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_ENV_ADDR=0x60300000 CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig index a22d2a59210..1399b09c83c 100644 --- a/configs/ls1021atwr_nor_lpuart_defconfig +++ b/configs/ls1021atwr_nor_lpuart_defconfig @@ -15,6 +15,7 @@ CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-lpuart" CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_ENV_ADDR=0x60300000 CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig index aadc61b66ca..e186dfe7c4c 100644 --- a/configs/ls1021atwr_qspi_defconfig +++ b/configs/ls1021atwr_qspi_defconfig @@ -15,6 +15,7 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index f16c156490d..0d4465edd53 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -9,7 +9,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 -CONFIG_NXP_ESBC=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y @@ -21,6 +20,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 +CONFIG_NXP_ESBC=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index c9a265d7819..5d9002a17f3 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index e4f2b858235..714835cb452 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index 5a40f002c86..3fa4440a786 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -12,6 +12,10 @@ CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" +CONFIG_FSL_LS_PPA=y +CONFIG_ENV_ADDR=0x60300000 +CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" @@ -19,9 +23,6 @@ CONFIG_VOL_MONITOR_INA220=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_QIXIS=y # CONFIG_QIXIS_I2C_ACCESS is not set -CONFIG_FSL_LS_PPA=y -CONFIG_ENV_ADDR=0x60300000 -CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig index 0acb8817ec0..ae9b3449b83 100644 --- a/configs/ls1043aqds_lpuart_defconfig +++ b/configs/ls1043aqds_lpuart_defconfig @@ -12,6 +12,10 @@ CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart" +CONFIG_FSL_LS_PPA=y +CONFIG_ENV_ADDR=0x60300000 +CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" @@ -19,9 +23,6 @@ CONFIG_VOL_MONITOR_INA220=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_QIXIS=y # CONFIG_QIXIS_I2C_ACCESS is not set -CONFIG_FSL_LS_PPA=y -CONFIG_ENV_ADDR=0x60300000 -CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index 1fe04fe769e..cbc58b2d98d 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -15,6 +15,12 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 +CONFIG_FSL_LS_PPA=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL=y +CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" @@ -22,11 +28,6 @@ CONFIG_VOL_MONITOR_INA220=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_QIXIS=y # CONFIG_QIXIS_I2C_ACCESS is not set -CONFIG_FSL_LS_PPA=y -CONFIG_SPL_SERIAL=y -CONFIG_SPL_DRIVERS_MISC=y -CONFIG_SPL=y -CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig index af362b13472..8b32b82fa5b 100644 --- a/configs/ls1043aqds_nor_ddr3_defconfig +++ b/configs/ls1043aqds_nor_ddr3_defconfig @@ -12,6 +12,10 @@ CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" +CONFIG_FSL_LS_PPA=y +CONFIG_ENV_ADDR=0x60300000 +CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" @@ -19,9 +23,6 @@ CONFIG_VOL_MONITOR_INA220=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_QIXIS=y # CONFIG_QIXIS_I2C_ACCESS is not set -CONFIG_FSL_LS_PPA=y -CONFIG_ENV_ADDR=0x60300000 -CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig index 6ba6b420c03..2716898fb6e 100644 --- a/configs/ls1043aqds_qspi_defconfig +++ b/configs/ls1043aqds_qspi_defconfig @@ -13,15 +13,16 @@ CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" +CONFIG_FSL_LS_PPA=y +CONFIG_ENV_ADDR=0x40300000 +CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" CONFIG_VOL_MONITOR_INA220=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_QIXIS=y -CONFIG_FSL_LS_PPA=y -CONFIG_ENV_ADDR=0x40300000 -CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index 21231cb416f..c95763ebe55 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -15,6 +15,13 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 +CONFIG_FSL_LS_PPA=y +CONFIG_SPL_MMC=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL=y +CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" @@ -22,12 +29,6 @@ CONFIG_VOL_MONITOR_INA220=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_QIXIS=y # CONFIG_QIXIS_I2C_ACCESS is not set -CONFIG_FSL_LS_PPA=y -CONFIG_SPL_MMC=y -CONFIG_SPL_SERIAL=y -CONFIG_SPL_DRIVERS_MISC=y -CONFIG_SPL=y -CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index 79914587277..15a1d158cce 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -15,18 +15,19 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 -CONFIG_FSL_USE_PCA9547_MUX=y -CONFIG_VID=y -CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" -CONFIG_VOL_MONITOR_INA220=y -CONFIG_VOL_MONITOR_IR36021_SET=y -CONFIG_FSL_QIXIS=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y +CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig index 6abb1bafe71..2ce742cd9f3 100644 --- a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig @@ -6,22 +6,23 @@ CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 -CONFIG_NXP_ESBC=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" +CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y +CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y +CONFIG_AHCI=y +CONFIG_NXP_ESBC=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" CONFIG_VOL_MONITOR_INA220=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_QIXIS=y -CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y -CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1043aqds_tfa_defconfig b/configs/ls1043aqds_tfa_defconfig index 6bf75006867..dff7fac4c8b 100644 --- a/configs/ls1043aqds_tfa_defconfig +++ b/configs/ls1043aqds_tfa_defconfig @@ -14,16 +14,17 @@ CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" +CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y +CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y +CONFIG_ENV_ADDR=0x60500000 +CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" CONFIG_VOL_MONITOR_INA220=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_QIXIS=y -CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y -CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_ENV_ADDR=0x60500000 -CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index 3bbe46d43eb..77a9d32df32 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -5,7 +5,6 @@ CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x120000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x20000 -CONFIG_NXP_ESBC=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y @@ -13,6 +12,8 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_FSL_LS_PPA=y +CONFIG_NXP_ESBC=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig index 243a03030a9..7a752495455 100644 --- a/configs/ls1043ardb_defconfig +++ b/configs/ls1043ardb_defconfig @@ -14,6 +14,7 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_FSL_LS_PPA=y CONFIG_ENV_ADDR=0x60300000 +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index 51436de011e..ce57a0a0d2f 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -7,7 +7,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 -CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_SPL_TEXT_BASE=0x10000000 @@ -15,6 +14,8 @@ CONFIG_FSL_LS_PPA=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y +CONFIG_NXP_ESBC=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index 3c5e5ce0ae8..13a35e601c1 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -19,6 +19,7 @@ CONFIG_FSL_LS_PPA=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index 1f7128e3109..d577a4c9b89 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -7,7 +7,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 -CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_SPL_TEXT_BASE=0x10000000 @@ -16,6 +15,8 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y +CONFIG_NXP_ESBC=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index 0c348615fa3..2211547dcc3 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig index 6911b00363a..428c3a84cce 100644 --- a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig @@ -6,7 +6,6 @@ CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 -CONFIG_NXP_ESBC=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y @@ -15,6 +14,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y +CONFIG_NXP_ESBC=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls1043ardb_tfa_defconfig b/configs/ls1043ardb_tfa_defconfig index e065c723665..ff703e57f17 100644 --- a/configs/ls1043ardb_tfa_defconfig +++ b/configs/ls1043ardb_tfa_defconfig @@ -17,6 +17,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_ENV_ADDR=0x60500000 +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig index 8cb86e1ffca..f7aa843c663 100644 --- a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig @@ -6,14 +6,15 @@ CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 -CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-frwy" -CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y +CONFIG_NXP_ESBC=y +CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls1046afrwy_tfa_defconfig b/configs/ls1046afrwy_tfa_defconfig index 95ecf2adfb4..1c0a24a9a60 100644 --- a/configs/ls1046afrwy_tfa_defconfig +++ b/configs/ls1046afrwy_tfa_defconfig @@ -10,12 +10,13 @@ CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-frwy" -CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_ENV_ADDR=0x40500000 CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig index d4284728d4e..ea69dafe51f 100644 --- a/configs/ls1046aqds_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_SECURE_BOOT_defconfig @@ -5,13 +5,16 @@ CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x120000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x20000 -CONFIG_NXP_ESBC=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" +CONFIG_FSL_LS_PPA=y +CONFIG_AHCI=y +CONFIG_NXP_ESBC=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" @@ -19,8 +22,6 @@ CONFIG_VOL_MONITOR_INA220=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_QIXIS=y # CONFIG_QIXIS_I2C_ACCESS is not set -CONFIG_FSL_LS_PPA=y -CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig index bf9f4803a99..59967d00f70 100644 --- a/configs/ls1046aqds_defconfig +++ b/configs/ls1046aqds_defconfig @@ -12,6 +12,10 @@ CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" +CONFIG_FSL_LS_PPA=y +CONFIG_ENV_ADDR=0x60300000 +CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" @@ -19,9 +23,6 @@ CONFIG_VOL_MONITOR_INA220=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_QIXIS=y # CONFIG_QIXIS_I2C_ACCESS is not set -CONFIG_FSL_LS_PPA=y -CONFIG_ENV_ADDR=0x60300000 -CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig index c4672d0366e..0254c92075f 100644 --- a/configs/ls1046aqds_lpuart_defconfig +++ b/configs/ls1046aqds_lpuart_defconfig @@ -12,6 +12,10 @@ CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-lpuart" +CONFIG_FSL_LS_PPA=y +CONFIG_ENV_ADDR=0x60300000 +CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" @@ -19,9 +23,6 @@ CONFIG_VOL_MONITOR_INA220=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_QIXIS=y # CONFIG_QIXIS_I2C_ACCESS is not set -CONFIG_FSL_LS_PPA=y -CONFIG_ENV_ADDR=0x60300000 -CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig index d63e5a53e4f..7ab5e4f7966 100644 --- a/configs/ls1046aqds_nand_defconfig +++ b/configs/ls1046aqds_nand_defconfig @@ -15,6 +15,12 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 +CONFIG_FSL_LS_PPA=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL=y +CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" @@ -22,11 +28,6 @@ CONFIG_VOL_MONITOR_INA220=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_QIXIS=y # CONFIG_QIXIS_I2C_ACCESS is not set -CONFIG_FSL_LS_PPA=y -CONFIG_SPL_SERIAL=y -CONFIG_SPL_DRIVERS_MISC=y -CONFIG_SPL=y -CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig index d62e5b611b3..931e70a6c62 100644 --- a/configs/ls1046aqds_qspi_defconfig +++ b/configs/ls1046aqds_qspi_defconfig @@ -13,15 +13,16 @@ CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" +CONFIG_FSL_LS_PPA=y +CONFIG_ENV_ADDR=0x40300000 +CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" CONFIG_VOL_MONITOR_INA220=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_QIXIS=y -CONFIG_FSL_LS_PPA=y -CONFIG_ENV_ADDR=0x40300000 -CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index 0fa3ea1c360..780c81959ba 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -15,6 +15,13 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 +CONFIG_FSL_LS_PPA=y +CONFIG_SPL_MMC=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL=y +CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" @@ -22,12 +29,6 @@ CONFIG_VOL_MONITOR_INA220=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_QIXIS=y # CONFIG_QIXIS_I2C_ACCESS is not set -CONFIG_FSL_LS_PPA=y -CONFIG_SPL_MMC=y -CONFIG_SPL_SERIAL=y -CONFIG_SPL_DRIVERS_MISC=y -CONFIG_SPL=y -CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index e55712fce1f..5a5e607e3ce 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -15,18 +15,19 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 -CONFIG_FSL_USE_PCA9547_MUX=y -CONFIG_VID=y -CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" -CONFIG_VOL_MONITOR_INA220=y -CONFIG_VOL_MONITOR_IR36021_SET=y -CONFIG_FSL_QIXIS=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y +CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig index 295cc66c866..2430c8c6d79 100644 --- a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig @@ -6,22 +6,23 @@ CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 -CONFIG_NXP_ESBC=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" +CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y +CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y +CONFIG_AHCI=y +CONFIG_NXP_ESBC=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" CONFIG_VOL_MONITOR_INA220=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_QIXIS=y -CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y -CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1046aqds_tfa_defconfig b/configs/ls1046aqds_tfa_defconfig index 881f1f1b636..6f208b9d589 100644 --- a/configs/ls1046aqds_tfa_defconfig +++ b/configs/ls1046aqds_tfa_defconfig @@ -14,16 +14,17 @@ CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" +CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y +CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y +CONFIG_ENV_ADDR=0x60500000 +CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" CONFIG_VOL_MONITOR_INA220=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_QIXIS=y -CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y -CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_ENV_ADDR=0x60500000 -CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig index 9cba997eb43..81659aa9cc3 100644 --- a/configs/ls1046ardb_emmc_defconfig +++ b/configs/ls1046ardb_emmc_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig index 3b870788f77..bc3123011a1 100644 --- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig @@ -5,7 +5,6 @@ CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 -CONFIG_NXP_ESBC=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y @@ -15,6 +14,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y +CONFIG_NXP_ESBC=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig index 6f9a2e8ea29..d958fb75321 100644 --- a/configs/ls1046ardb_qspi_defconfig +++ b/configs/ls1046ardb_qspi_defconfig @@ -17,6 +17,7 @@ CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_ENV_ADDR=0x40300000 CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig index 799d460f2bd..b1eda7b79a5 100644 --- a/configs/ls1046ardb_qspi_spl_defconfig +++ b/configs/ls1046ardb_qspi_spl_defconfig @@ -23,6 +23,7 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig index 149d155d136..6daaba6c192 100644 --- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -7,7 +7,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 -CONFIG_NXP_ESBC=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y @@ -20,6 +19,8 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y +CONFIG_NXP_ESBC=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig index 50efffa442f..c5653d72514 100644 --- a/configs/ls1046ardb_sdcard_defconfig +++ b/configs/ls1046ardb_sdcard_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 diff --git a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig index 827db1851f8..f8649c58c49 100644 --- a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig @@ -6,7 +6,6 @@ CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 -CONFIG_NXP_ESBC=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y @@ -17,6 +16,8 @@ CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y +CONFIG_NXP_ESBC=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls1046ardb_tfa_defconfig b/configs/ls1046ardb_tfa_defconfig index c0685777eac..2434ed379e1 100644 --- a/configs/ls1046ardb_tfa_defconfig +++ b/configs/ls1046ardb_tfa_defconfig @@ -19,6 +19,7 @@ CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_ENV_ADDR=0x40500000 CONFIG_AHCI=y +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig index fe864c75b7f..4b205e13831 100644 --- a/configs/pg_wcom_expu1_defconfig +++ b/configs/pg_wcom_expu1_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_ENV_ADDR=0x60060000 CONFIG_AHCI=y # CONFIG_DEEP_SLEEP is not set +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_KM_DEF_NETDEV="eth2" CONFIG_KM_COMMON_ETH_INIT=y CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 diff --git a/configs/pg_wcom_expu1_update_defconfig b/configs/pg_wcom_expu1_update_defconfig index 787fe554bad..98f3dcc4545 100644 --- a/configs/pg_wcom_expu1_update_defconfig +++ b/configs/pg_wcom_expu1_update_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_ENV_ADDR=0x60220000 CONFIG_AHCI=y # CONFIG_DEEP_SLEEP is not set +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_KM_DEF_NETDEV="eth2" CONFIG_KM_COMMON_ETH_INIT=y CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig index 51919dc6cbb..ce3e7eb179b 100644 --- a/configs/pg_wcom_seli8_defconfig +++ b/configs/pg_wcom_seli8_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_ENV_ADDR=0x60060000 CONFIG_AHCI=y # CONFIG_DEEP_SLEEP is not set +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_KM_DEF_NETDEV="eth2" CONFIG_KM_COMMON_ETH_INIT=y CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 diff --git a/configs/pg_wcom_seli8_update_defconfig b/configs/pg_wcom_seli8_update_defconfig index 0f22511dabc..623afa33877 100644 --- a/configs/pg_wcom_seli8_update_defconfig +++ b/configs/pg_wcom_seli8_update_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_ENV_ADDR=0x60220000 CONFIG_AHCI=y # CONFIG_DEEP_SLEEP is not set +CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_KM_DEF_NETDEV="eth2" CONFIG_KM_COMMON_ETH_INIT=y CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 3927558467a..a12923386a5 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -173,7 +173,6 @@ {1, {I2C_NULL_HOP} }, \ } -#define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_SMP_PEN_ADDR 0x01ee0200 #define CONFIG_HWCONFIG diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 19201a735f0..0c194ee575b 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -15,9 +15,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL -/* CSU */ -#define CONFIG_LAYERSCAPE_NS_ACCESS - /*SPI device */ #define CONFIG_SYS_FSL_QSPI_BASE 0x40000000 diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 6a0ccbf836f..f43ea2bd6ec 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -108,7 +108,6 @@ #endif #define CONFIG_PEN_ADDR_BIG_ENDIAN -#define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_SMP_PEN_ADDR 0x01ee0200 #define CONFIG_HWCONFIG diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 012b47116b9..1faa38b082b 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -310,7 +310,6 @@ #endif #define CONFIG_PEN_ADDR_BIG_ENDIAN -#define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_SMP_PEN_ADDR 0x01ee0200 #define CONFIG_HWCONFIG diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index b06394c3003..3ff694f6b58 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -87,8 +87,6 @@ #define CONFIG_PCI_SCAN_SHOW #endif -#define CONFIG_LAYERSCAPE_NS_ACCESS - #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 256 diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index d85a776daa1..eff919116ec 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -180,7 +180,6 @@ #endif #define CONFIG_PEN_ADDR_BIG_ENDIAN -#define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_SMP_PEN_ADDR 0x01ee0200 #define CONFIG_HWCONFIG diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index e81384ab3f0..15c3ff53fe8 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -8,8 +8,6 @@ #include "ls1043a_common.h" -#define CONFIG_LAYERSCAPE_NS_ACCESS - /* Physical Memory Map */ #define SPD_EEPROM_ADDRESS 0x51 diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 411721c1254..6c33847b27b 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -8,8 +8,6 @@ #include "ls1043a_common.h" -#define CONFIG_LAYERSCAPE_NS_ACCESS - /* Physical Memory Map */ #ifndef CONFIG_SPL diff --git a/include/configs/ls1046afrwy.h b/include/configs/ls1046afrwy.h index e663fa0f6c7..43717cdd4e6 100644 --- a/include/configs/ls1046afrwy.h +++ b/include/configs/ls1046afrwy.h @@ -8,8 +8,6 @@ #include "ls1046a_common.h" -#define CONFIG_LAYERSCAPE_NS_ACCESS - #define CONFIG_SYS_UBOOT_BASE 0x40100000 /* diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 0e24209fbe9..36c64db8f5d 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -8,8 +8,6 @@ #include "ls1046a_common.h" -#define CONFIG_LAYERSCAPE_NS_ACCESS - /* Physical Memory Map */ #define SPD_EEPROM_ADDRESS 0x51 diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index fdd251abcd1..382d5c76461 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -9,8 +9,6 @@ #include "ls1046a_common.h" -#define CONFIG_LAYERSCAPE_NS_ACCESS - /* Physical Memory Map */ #define SPD_EEPROM_ADDRESS 0x51 -- GitLab From 3dc2987f5c9b79e19ea6b0e69e01a817310abaac Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 20 Jun 2022 08:07:45 -0400 Subject: [PATCH 481/581] Convert CONFIG_PCIE1 et al to Kconfig This converts the following to Kconfig: CONFIG_PCIE1 CONFIG_PCIE2 CONFIG_PCIE3 CONFIG_PCIE4 CONFIG_PCI1 Signed-off-by: Tom Rini --- arch/Kconfig.nxp | 16 ++++++++++++++++ board/freescale/mpc8548cds/Kconfig | 3 +++ configs/MPC8548CDS_36BIT_defconfig | 1 + configs/MPC8548CDS_defconfig | 1 + configs/MPC8548CDS_legacy_defconfig | 1 + configs/P1010RDB-PA_36BIT_NAND_defconfig | 2 ++ configs/P1010RDB-PA_36BIT_NOR_defconfig | 2 ++ configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 2 ++ configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 2 ++ configs/P1010RDB-PA_NAND_defconfig | 2 ++ configs/P1010RDB-PA_NOR_defconfig | 2 ++ configs/P1010RDB-PA_SDCARD_defconfig | 2 ++ configs/P1010RDB-PA_SPIFLASH_defconfig | 2 ++ configs/P1010RDB-PB_36BIT_NAND_defconfig | 2 ++ configs/P1010RDB-PB_36BIT_NOR_defconfig | 2 ++ configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 2 ++ configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 2 ++ configs/P1010RDB-PB_NAND_defconfig | 2 ++ configs/P1010RDB-PB_NOR_defconfig | 2 ++ configs/P1010RDB-PB_SDCARD_defconfig | 2 ++ configs/P1010RDB-PB_SPIFLASH_defconfig | 2 ++ configs/P1020RDB-PC_36BIT_NAND_defconfig | 2 ++ configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 2 ++ configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 2 ++ configs/P1020RDB-PC_36BIT_defconfig | 2 ++ configs/P1020RDB-PC_NAND_defconfig | 2 ++ configs/P1020RDB-PC_SDCARD_defconfig | 2 ++ configs/P1020RDB-PC_SPIFLASH_defconfig | 2 ++ configs/P1020RDB-PC_defconfig | 2 ++ configs/P1020RDB-PD_NAND_defconfig | 2 ++ configs/P1020RDB-PD_SDCARD_defconfig | 2 ++ configs/P1020RDB-PD_SPIFLASH_defconfig | 2 ++ configs/P1020RDB-PD_defconfig | 2 ++ configs/P2020RDB-PC_36BIT_NAND_defconfig | 2 ++ configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 2 ++ configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 2 ++ configs/P2020RDB-PC_36BIT_defconfig | 2 ++ configs/P2020RDB-PC_NAND_defconfig | 2 ++ configs/P2020RDB-PC_SDCARD_defconfig | 2 ++ configs/P2020RDB-PC_SPIFLASH_defconfig | 2 ++ configs/P2020RDB-PC_defconfig | 2 ++ configs/P2041RDB_NAND_defconfig | 3 +++ configs/P2041RDB_SDCARD_defconfig | 3 +++ configs/P2041RDB_SPIFLASH_defconfig | 3 +++ configs/P2041RDB_defconfig | 3 +++ configs/P3041DS_NAND_defconfig | 4 ++++ configs/P3041DS_SDCARD_defconfig | 4 ++++ configs/P3041DS_SPIFLASH_defconfig | 4 ++++ configs/P3041DS_defconfig | 4 ++++ configs/P4080DS_SDCARD_defconfig | 3 +++ configs/P4080DS_SPIFLASH_defconfig | 3 +++ configs/P4080DS_defconfig | 3 +++ configs/P5040DS_NAND_defconfig | 3 +++ configs/P5040DS_SDCARD_defconfig | 3 +++ configs/P5040DS_SPIFLASH_defconfig | 3 +++ configs/P5040DS_defconfig | 3 +++ configs/T1024RDB_NAND_defconfig | 3 +++ configs/T1024RDB_SDCARD_defconfig | 3 +++ configs/T1024RDB_SPIFLASH_defconfig | 3 +++ configs/T1024RDB_defconfig | 3 +++ configs/T1042D4RDB_NAND_defconfig | 4 ++++ configs/T1042D4RDB_SDCARD_defconfig | 4 ++++ configs/T1042D4RDB_SPIFLASH_defconfig | 4 ++++ configs/T1042D4RDB_defconfig | 4 ++++ configs/T2080QDS_NAND_defconfig | 14 ++++++++++++++ configs/T2080QDS_SDCARD_defconfig | 14 ++++++++++++++ configs/T2080QDS_SECURE_BOOT_defconfig | 4 ++++ configs/T2080QDS_SPIFLASH_defconfig | 14 ++++++++++++++ configs/T2080QDS_SRIO_PCIE_BOOT_defconfig | 13 +++++++++++++ configs/T2080QDS_defconfig | 12 ++++++++++++ configs/T2080RDB_NAND_defconfig | 11 +++++++++++ configs/T2080RDB_SDCARD_defconfig | 11 +++++++++++ configs/T2080RDB_SPIFLASH_defconfig | 11 +++++++++++ configs/T2080RDB_defconfig | 11 +++++++++++ configs/T2080RDB_revD_NAND_defconfig | 11 +++++++++++ configs/T2080RDB_revD_SDCARD_defconfig | 11 +++++++++++ configs/T2080RDB_revD_SPIFLASH_defconfig | 11 +++++++++++ configs/T2080RDB_revD_defconfig | 11 +++++++++++ configs/T4240RDB_SDCARD_defconfig | 11 +++++++++++ configs/T4240RDB_defconfig | 11 +++++++++++ configs/kmcent2_defconfig | 1 + configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_qspi_defconfig | 1 + configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_tfa_defconfig | 1 + configs/ls1012aqds_qspi_defconfig | 1 + configs/ls1012aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012aqds_tfa_defconfig | 1 + configs/ls1012ardb_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1012ardb_qspi_defconfig | 1 + configs/ls1012ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012ardb_tfa_defconfig | 1 + configs/ls1021aiot_qspi_defconfig | 2 ++ configs/ls1021aiot_sdcard_defconfig | 2 ++ configs/ls1021aqds_ddr4_nor_defconfig | 2 ++ configs/ls1021aqds_ddr4_nor_lpuart_defconfig | 2 ++ configs/ls1021aqds_nand_defconfig | 2 ++ configs/ls1021aqds_nor_SECURE_BOOT_defconfig | 2 ++ configs/ls1021aqds_nor_defconfig | 2 ++ configs/ls1021aqds_nor_lpuart_defconfig | 2 ++ configs/ls1021aqds_qspi_defconfig | 2 ++ configs/ls1021aqds_sdcard_ifc_defconfig | 2 ++ configs/ls1021aqds_sdcard_qspi_defconfig | 2 ++ configs/ls1021atsn_qspi_defconfig | 2 ++ configs/ls1021atsn_sdcard_defconfig | 2 ++ configs/ls1021atwr_nor_SECURE_BOOT_defconfig | 2 ++ configs/ls1021atwr_nor_defconfig | 2 ++ configs/ls1021atwr_nor_lpuart_defconfig | 2 ++ configs/ls1021atwr_qspi_defconfig | 2 ++ .../ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig | 2 ++ configs/ls1021atwr_sdcard_ifc_defconfig | 2 ++ configs/ls1021atwr_sdcard_qspi_defconfig | 2 ++ configs/ls1043aqds_defconfig | 3 +++ configs/ls1043aqds_lpuart_defconfig | 3 +++ configs/ls1043aqds_nand_defconfig | 3 +++ configs/ls1043aqds_nor_ddr3_defconfig | 3 +++ configs/ls1043aqds_qspi_defconfig | 3 +++ configs/ls1043aqds_sdcard_ifc_defconfig | 3 +++ configs/ls1043aqds_sdcard_qspi_defconfig | 3 +++ configs/ls1043aqds_tfa_SECURE_BOOT_defconfig | 3 +++ configs/ls1043aqds_tfa_defconfig | 3 +++ configs/ls1043ardb_SECURE_BOOT_defconfig | 3 +++ configs/ls1043ardb_defconfig | 3 +++ configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 3 +++ configs/ls1043ardb_nand_defconfig | 3 +++ configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig | 3 +++ configs/ls1043ardb_sdcard_defconfig | 3 +++ configs/ls1043ardb_tfa_SECURE_BOOT_defconfig | 3 +++ configs/ls1043ardb_tfa_defconfig | 3 +++ configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig | 3 +++ configs/ls1046afrwy_tfa_defconfig | 3 +++ configs/ls1046aqds_SECURE_BOOT_defconfig | 3 +++ configs/ls1046aqds_defconfig | 3 +++ configs/ls1046aqds_lpuart_defconfig | 3 +++ configs/ls1046aqds_nand_defconfig | 3 +++ configs/ls1046aqds_qspi_defconfig | 3 +++ configs/ls1046aqds_sdcard_ifc_defconfig | 3 +++ configs/ls1046aqds_sdcard_qspi_defconfig | 3 +++ configs/ls1046aqds_tfa_SECURE_BOOT_defconfig | 3 +++ configs/ls1046aqds_tfa_defconfig | 3 +++ configs/ls1046ardb_emmc_defconfig | 3 +++ configs/ls1046ardb_qspi_SECURE_BOOT_defconfig | 3 +++ configs/ls1046ardb_qspi_defconfig | 3 +++ configs/ls1046ardb_qspi_spl_defconfig | 3 +++ configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig | 3 +++ configs/ls1046ardb_sdcard_defconfig | 3 +++ configs/ls1046ardb_tfa_SECURE_BOOT_defconfig | 3 +++ configs/ls1046ardb_tfa_defconfig | 3 +++ include/configs/MPC8548CDS.h | 4 ---- include/configs/P1010RDB.h | 3 --- include/configs/P2041RDB.h | 3 --- include/configs/P3041DS.h | 2 -- include/configs/P4080DS.h | 2 -- include/configs/P5040DS.h | 1 - include/configs/T102xRDB.h | 3 --- include/configs/T104xRDB.h | 4 ---- include/configs/T208xQDS.h | 4 ---- include/configs/T208xRDB.h | 4 ---- include/configs/T4240RDB.h | 5 ----- include/configs/corenet_ds.h | 2 -- include/configs/kmcent2.h | 1 - include/configs/ls1012afrwy.h | 2 -- include/configs/ls1012aqds.h | 2 -- include/configs/ls1012ardb.h | 2 -- include/configs/ls1021aiot.h | 4 ---- include/configs/ls1021aqds.h | 4 ---- include/configs/ls1021atsn.h | 2 -- include/configs/ls1021atwr.h | 4 ---- include/configs/ls1043a_common.h | 4 ---- include/configs/ls1046a_common.h | 5 ----- include/configs/p1_p2_rdb_pc.h | 3 --- 171 files changed, 512 insertions(+), 70 deletions(-) diff --git a/arch/Kconfig.nxp b/arch/Kconfig.nxp index 771a6c1e81a..5971ec5df4e 100644 --- a/arch/Kconfig.nxp +++ b/arch/Kconfig.nxp @@ -138,6 +138,22 @@ config LAYERSCAPE_NS_ACCESS bool "Layerscape non-secure access support" depends on ARCH_LS1021A || FSL_LSCH2 +config PCIE1 + bool "PCIe controller #1" + depends on LAYERSCAPE_NS_ACCESS || PPC + +config PCIE2 + bool "PCIe controller #2" + depends on LAYERSCAPE_NS_ACCESS || PPC + +config PCIE3 + bool "PCIe controller #3" + depends on LAYERSCAPE_NS_ACCESS || PPC + +config PCIE4 + bool "PCIe controller #4" + depends on LAYERSCAPE_NS_ACCESS || PPC + config FSL_USE_PCA9547_MUX bool "Enable PCA9547 I2C Mux on Freescale boards" depends on PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3 diff --git a/board/freescale/mpc8548cds/Kconfig b/board/freescale/mpc8548cds/Kconfig index 87f3374bf45..bd9153bc0d7 100644 --- a/board/freescale/mpc8548cds/Kconfig +++ b/board/freescale/mpc8548cds/Kconfig @@ -1,5 +1,8 @@ if TARGET_MPC8548CDS +config PCI1 + def_bool y + config SYS_BOARD default "mpc8548cds" diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig index 14eeef936eb..6fa89aad36a 100644 --- a/configs/MPC8548CDS_36BIT_defconfig +++ b/configs/MPC8548CDS_36BIT_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_MPC8548CDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_PCIE1=y CONFIG_PHYS_64BIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig index 04f086e2d43..82776497a59 100644 --- a/configs/MPC8548CDS_defconfig +++ b/configs/MPC8548CDS_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_MPC8548CDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_PCIE1=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DYNAMIC_SYS_CLK_FREQ=y diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig index 874de6aeb2e..c21ed57dc37 100644 --- a/configs/MPC8548CDS_legacy_defconfig +++ b/configs/MPC8548CDS_legacy_defconfig @@ -12,6 +12,7 @@ CONFIG_TARGET_MPC8548CDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_TARGET_MPC8548CDS_LEGACY=y +CONFIG_PCIE1=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DYNAMIC_SYS_CLK_FREQ=y diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index 121bb0cec92..7a50cd7f90d 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -17,6 +17,8 @@ CONFIG_TARGET_P1010RDB_PA=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index 93e82650895..5030afd098e 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -10,6 +10,8 @@ CONFIG_TARGET_P1010RDB_PA=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index dd4f5f19e94..dd04cff4a44 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -16,6 +16,8 @@ CONFIG_TARGET_P1010RDB_PA=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index 7336c3096ed..46613cce3b5 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -18,6 +18,8 @@ CONFIG_TARGET_P1010RDB_PA=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index e77a790f523..49acfd2d38e 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -17,6 +17,8 @@ CONFIG_TARGET_P1010RDB_PA=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index 7ad9b2279fa..89fccd6fc32 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -10,6 +10,8 @@ CONFIG_TARGET_P1010RDB_PA=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 45d120ab198..a2786616c8d 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -16,6 +16,8 @@ CONFIG_TARGET_P1010RDB_PA=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index b241d1f719f..17daecd2ece 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -18,6 +18,8 @@ CONFIG_TARGET_P1010RDB_PA=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 7b67bc087f0..6b73bf43413 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -17,6 +17,8 @@ CONFIG_TARGET_P1010RDB_PB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index eb669a08a67..7a5e057a2c2 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -10,6 +10,8 @@ CONFIG_TARGET_P1010RDB_PB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 2c8a460798a..ef85d48719c 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -16,6 +16,8 @@ CONFIG_TARGET_P1010RDB_PB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index 906b48f2433..bda32ccbf34 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -18,6 +18,8 @@ CONFIG_TARGET_P1010RDB_PB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 726de841048..50667e56f6a 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -17,6 +17,8 @@ CONFIG_TARGET_P1010RDB_PB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index 05a4c1286f8..c13369efe70 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -10,6 +10,8 @@ CONFIG_TARGET_P1010RDB_PB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index 0a9ac754ec7..691d6e33dac 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -16,6 +16,8 @@ CONFIG_TARGET_P1010RDB_PB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index e8d963bdb27..a630e961ee2 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -18,6 +18,8 @@ CONFIG_TARGET_P1010RDB_PB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index c2a9a15cfa8..8288e858ed0 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -17,6 +17,8 @@ CONFIG_TARGET_P1020RDB_PC=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 044664658a9..b581cb109b1 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -16,6 +16,8 @@ CONFIG_TARGET_P1020RDB_PC=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index 216429e989c..e8543c6461a 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -18,6 +18,8 @@ CONFIG_TARGET_P1020RDB_PC=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index 0a589bb9be9..2b9fcb034c9 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -11,6 +11,8 @@ CONFIG_TARGET_P1020RDB_PC=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 2789ce99019..fdb163f49c2 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -17,6 +17,8 @@ CONFIG_TARGET_P1020RDB_PC=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 6071fd450ef..7489ad3459f 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -16,6 +16,8 @@ CONFIG_TARGET_P1020RDB_PC=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 8ed7a7ad364..728592f6c3c 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -18,6 +18,8 @@ CONFIG_TARGET_P1020RDB_PC=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 15a366f23da..ada7e2d59a7 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -11,6 +11,8 @@ CONFIG_TARGET_P1020RDB_PC=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index f428c68e683..08392863371 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -17,6 +17,8 @@ CONFIG_TARGET_P1020RDB_PD=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index a55b54db67a..ddd9e335e64 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -16,6 +16,8 @@ CONFIG_TARGET_P1020RDB_PD=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index ea2784da178..88365bff62b 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -18,6 +18,8 @@ CONFIG_TARGET_P1020RDB_PD=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index ba841785cbd..ef31e0970ac 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -11,6 +11,8 @@ CONFIG_TARGET_P1020RDB_PD=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index 4dacb20a7c5..99f1d26446e 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -17,6 +17,8 @@ CONFIG_TARGET_P2020RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 984c0fb77da..856a78fdd13 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -16,6 +16,8 @@ CONFIG_TARGET_P2020RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index ee6768b901a..b03c17c7e7b 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -18,6 +18,8 @@ CONFIG_TARGET_P2020RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index 4feba614d23..c1a5ef9d30c 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -11,6 +11,8 @@ CONFIG_TARGET_P2020RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 022684cc40d..2558596b161 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -17,6 +17,8 @@ CONFIG_TARGET_P2020RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 9450de2130e..29cc14700ae 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -16,6 +16,8 @@ CONFIG_TARGET_P2020RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 2bc755b83d4..3ee43f8da61 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -18,6 +18,8 @@ CONFIG_TARGET_P2020RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index d82e9c1563b..7af0244078a 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -11,6 +11,8 @@ CONFIG_TARGET_P2020RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index 53d97d9316a..5063470d854 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -8,6 +8,9 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index a54f35a6592..a64f8924dd2 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -8,6 +8,9 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index 76cabd3de02..f295174da52 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -9,6 +9,9 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index e6df3c8fa02..e3dd1e93e32 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -9,6 +9,9 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index 9cf139f561c..3e4cb5180ea 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -8,6 +8,10 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y +CONFIG_PCIE4=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index 223cd178111..66eb6c3f3d9 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -8,6 +8,10 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y +CONFIG_PCIE4=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index ed0f7a1f295..87c62be04f8 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -9,6 +9,10 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y +CONFIG_PCIE4=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index 0a3937acca5..d083c256b08 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -9,6 +9,10 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y +CONFIG_PCIE4=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index e87d506e1b5..ed6f3de96ec 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -8,6 +8,9 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index 4b17f3614da..e77085ae3e2 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -9,6 +9,9 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index 5d6ffc5d1a3..91aa75d9e1c 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -9,6 +9,9 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index dafb3ac2a0d..3a48362c3b5 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -8,6 +8,9 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index 083b2b39da6..9aa293dc229 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -8,6 +8,9 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index 270c5545c05..6f0d51a7abf 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -9,6 +9,9 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index 6ae3f7b522d..ae5f7b7ba34 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -9,6 +9,9 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index 88abd064dfc..ad33aa8fe23 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -15,6 +15,9 @@ CONFIG_TARGET_T1024RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index 48976768ec1..06bb7b79534 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -15,6 +15,9 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index ed2ad987ad8..f88fb381a25 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -17,6 +17,9 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index adfad9839aa..a0908ac83a7 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -9,6 +9,9 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index e803f8b7673..bb32ddf8c14 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -14,6 +14,10 @@ CONFIG_TARGET_T1042D4RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y +CONFIG_PCIE4=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index a0179c4dc51..932a4e1507d 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -14,6 +14,10 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y +CONFIG_PCIE4=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 1f26a2106f3..0c4e339da79 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -16,6 +16,10 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y +CONFIG_PCIE4=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig index 7160e052f37..44458015c24 100644 --- a/configs/T1042D4RDB_defconfig +++ b/configs/T1042D4RDB_defconfig @@ -8,6 +8,10 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y +CONFIG_PCIE4=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index a5469929d1f..05e46e6cacd 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -21,6 +21,20 @@ CONFIG_TARGET_T2080QDS=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +<<<<<<< HEAD +======= +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y +CONFIG_PCIE4=y +CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xqds_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y +CONFIG_FSL_QIXIS=y +# CONFIG_QIXIS_I2C_ACCESS is not set +>>>>>>> Convert CONFIG_PCIE1 et al to Kconfig CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index 4024354dc59..1818762ded9 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -21,6 +21,20 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +<<<<<<< HEAD +======= +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y +CONFIG_PCIE4=y +CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xqds_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y +CONFIG_FSL_QIXIS=y +# CONFIG_QIXIS_I2C_ACCESS is not set +>>>>>>> Convert CONFIG_PCIE1 et al to Kconfig CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index 00d36ff7599..30d1b85a009 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -8,6 +8,10 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_NXP_ESBC=y CONFIG_BOOTSCRIPT_HDR_ADDR=0xee020000 +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y +CONFIG_PCIE4=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="t208xqds_vdd_mv" diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index b0247be81a8..73c50b9245a 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -23,6 +23,20 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +<<<<<<< HEAD +======= +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y +CONFIG_PCIE4=y +CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xqds_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y +CONFIG_FSL_QIXIS=y +# CONFIG_QIXIS_I2C_ACCESS is not set +>>>>>>> Convert CONFIG_PCIE1 et al to Kconfig CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig index a39587d3c7c..48ef69cbbb7 100644 --- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig @@ -2,6 +2,19 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xFFF40000 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="t2080qds" +<<<<<<< HEAD +======= +CONFIG_ENV_ADDR=0xFFE20000 +CONFIG_MPC85xx=y +CONFIG_TARGET_T2080QDS=y +CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SRIO_PCIE_BOOT_SLAVE=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y +CONFIG_PCIE4=y +>>>>>>> Convert CONFIG_PCIE1 et al to Kconfig CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="t208xqds_vdd_mv" diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index aa6d5596c7d..a94fd3f42e3 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -3,6 +3,18 @@ CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="t2080qds" +<<<<<<< HEAD +======= +CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_MPC85xx=y +CONFIG_TARGET_T2080QDS=y +CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y +CONFIG_PCIE4=y +>>>>>>> Convert CONFIG_PCIE1 et al to Kconfig CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="t208xqds_vdd_mv" diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index 2b5249ccd84..6566226abc8 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -18,6 +18,17 @@ CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +<<<<<<< HEAD +======= +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y +CONFIG_PCIE4=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y +>>>>>>> Convert CONFIG_PCIE1 et al to Kconfig CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index 9878c542eaa..3333ac145ad 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -18,6 +18,17 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +<<<<<<< HEAD +======= +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y +CONFIG_PCIE4=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y +>>>>>>> Convert CONFIG_PCIE1 et al to Kconfig CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index 5042e2a5afd..5812daad55c 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -20,6 +20,17 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +<<<<<<< HEAD +======= +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y +CONFIG_PCIE4=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y +>>>>>>> Convert CONFIG_PCIE1 et al to Kconfig CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index e43168ea4de..563d0b5f315 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -12,6 +12,17 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +<<<<<<< HEAD +======= +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y +CONFIG_PCIE4=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y +>>>>>>> Convert CONFIG_PCIE1 et al to Kconfig CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index bc2e758de90..98443438a94 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -19,6 +19,17 @@ CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y +<<<<<<< HEAD +======= +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y +CONFIG_PCIE4=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y +>>>>>>> Convert CONFIG_PCIE1 et al to Kconfig CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index 31fe8be5063..004f67703ff 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -19,6 +19,17 @@ CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y +<<<<<<< HEAD +======= +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y +CONFIG_PCIE4=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y +>>>>>>> Convert CONFIG_PCIE1 et al to Kconfig CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index 9d629ad2f64..610f3f89693 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -21,6 +21,17 @@ CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y +<<<<<<< HEAD +======= +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y +CONFIG_PCIE4=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y +>>>>>>> Convert CONFIG_PCIE1 et al to Kconfig CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig index 1af317aa4bf..ca6a741fef4 100644 --- a/configs/T2080RDB_revD_defconfig +++ b/configs/T2080RDB_revD_defconfig @@ -13,6 +13,17 @@ CONFIG_TARGET_T2080RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_T2080RDB_REV_D=y +<<<<<<< HEAD +======= +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y +CONFIG_PCIE4=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y +>>>>>>> Convert CONFIG_PCIE1 et al to Kconfig CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index b0c9776dbeb..3e43f9bb98f 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -18,6 +18,17 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T4240RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +<<<<<<< HEAD +======= +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y +CONFIG_PCIE4=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t4240rdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y +>>>>>>> Convert CONFIG_PCIE1 et al to Kconfig CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index e5355eb7ae1..9f6457fc3a3 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -12,6 +12,17 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T4240RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +<<<<<<< HEAD +======= +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y +CONFIG_PCIE4=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t4240rdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y +>>>>>>> Convert CONFIG_PCIE1 et al to Kconfig CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig index 37529f21df3..cd6fb9675b0 100644 --- a/configs/kmcent2_defconfig +++ b/configs/kmcent2_defconfig @@ -12,6 +12,7 @@ CONFIG_TARGET_KMCENT2=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y # CONFIG_DEEP_SLEEP is not set +CONFIG_PCIE1=y CONFIG_KM_DEF_NETDEV="eth2" CONFIG_KM_IVM_BUS=2 CONFIG_MP=y diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig index 6337508e67d..1f12a3b95ac 100644 --- a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig @@ -11,6 +11,7 @@ CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_NXP_ESBC=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1012afrwy_qspi_defconfig b/configs/ls1012afrwy_qspi_defconfig index 35af5cde528..dfa525f31d9 100644 --- a/configs/ls1012afrwy_qspi_defconfig +++ b/configs/ls1012afrwy_qspi_defconfig @@ -13,6 +13,7 @@ CONFIG_FSL_LS_PPA=y CONFIG_ENV_ADDR=0x401D0000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig index 67335985740..50855d54562 100644 --- a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig @@ -13,6 +13,7 @@ CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y CONFIG_NXP_ESBC=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1012afrwy_tfa_defconfig b/configs/ls1012afrwy_tfa_defconfig index 926d6c37744..2bdebe2da49 100644 --- a/configs/ls1012afrwy_tfa_defconfig +++ b/configs/ls1012afrwy_tfa_defconfig @@ -14,6 +14,7 @@ CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig index fabe357e581..0f6c2ac37dc 100644 --- a/configs/ls1012aqds_qspi_defconfig +++ b/configs/ls1012aqds_qspi_defconfig @@ -13,6 +13,7 @@ CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff diff --git a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig index 0acad021fea..fcc7914b565 100644 --- a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig @@ -13,6 +13,7 @@ CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_NXP_ESBC=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff diff --git a/configs/ls1012aqds_tfa_defconfig b/configs/ls1012aqds_tfa_defconfig index 081d7a4275e..98e48f2fbaa 100644 --- a/configs/ls1012aqds_tfa_defconfig +++ b/configs/ls1012aqds_tfa_defconfig @@ -15,6 +15,7 @@ CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig index 8c0184a92ef..6147d4b0bce 100644 --- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig @@ -12,6 +12,7 @@ CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y CONFIG_NXP_ESBC=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1012ardb_qspi_defconfig b/configs/ls1012ardb_qspi_defconfig index 560dba48690..f9b0e6edacd 100644 --- a/configs/ls1012ardb_qspi_defconfig +++ b/configs/ls1012ardb_qspi_defconfig @@ -14,6 +14,7 @@ CONFIG_QSPI_AHB_INIT=y CONFIG_ENV_ADDR=0x40300000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig index 051a4c56725..a603bd9acc5 100644 --- a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig @@ -14,6 +14,7 @@ CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y CONFIG_NXP_ESBC=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1012ardb_tfa_defconfig b/configs/ls1012ardb_tfa_defconfig index 03b5a1369f0..5a86992f099 100644 --- a/configs/ls1012ardb_tfa_defconfig +++ b/configs/ls1012ardb_tfa_defconfig @@ -15,6 +15,7 @@ CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1021aiot_qspi_defconfig b/configs/ls1021aiot_qspi_defconfig index d8dd4c7ef19..d731936d529 100644 --- a/configs/ls1021aiot_qspi_defconfig +++ b/configs/ls1021aiot_qspi_defconfig @@ -16,6 +16,8 @@ CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y # CONFIG_DEEP_SLEEP is not set CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_QSPI_BOOT=y diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig index df6ce92d5a6..c71ab781869 100644 --- a/configs/ls1021aiot_sdcard_defconfig +++ b/configs/ls1021aiot_sdcard_defconfig @@ -21,6 +21,8 @@ CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y # CONFIG_DEEP_SLEEP is not set CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_RAMBOOT_PBL=y diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig index 86f84720375..165e1a780fd 100644 --- a/configs/ls1021aqds_ddr4_nor_defconfig +++ b/configs/ls1021aqds_ddr4_nor_defconfig @@ -16,6 +16,8 @@ CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_ENV_ADDR=0x60300000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_FSL_QIXIS=y # CONFIG_QIXIS_I2C_ACCESS is not set diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig index d8d7aa14678..13ded158e68 100644 --- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig +++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig @@ -16,6 +16,8 @@ CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_ENV_ADDR=0x60300000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_FSL_QIXIS=y # CONFIG_QIXIS_I2C_ACCESS is not set diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index 649e2f99fac..1423d732f8a 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -22,6 +22,8 @@ CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_FSL_QIXIS=y # CONFIG_QIXIS_I2C_ACCESS is not set diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig index ac5283603f3..d4b9cd2b872 100644 --- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig @@ -15,6 +15,8 @@ CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y CONFIG_NXP_ESBC=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_FSL_QIXIS=y # CONFIG_QIXIS_I2C_ACCESS is not set diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig index 21a5dae9491..7cc61213e33 100644 --- a/configs/ls1021aqds_nor_defconfig +++ b/configs/ls1021aqds_nor_defconfig @@ -16,6 +16,8 @@ CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_ENV_ADDR=0x60300000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_FSL_QIXIS=y # CONFIG_QIXIS_I2C_ACCESS is not set diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig index fca79f65bb6..04cb087ad55 100644 --- a/configs/ls1021aqds_nor_lpuart_defconfig +++ b/configs/ls1021aqds_nor_lpuart_defconfig @@ -16,6 +16,8 @@ CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_ENV_ADDR=0x60300000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_FSL_QIXIS=y # CONFIG_QIXIS_I2C_ACCESS is not set diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig index 75ec61fca36..2d560b2ea6d 100644 --- a/configs/ls1021aqds_qspi_defconfig +++ b/configs/ls1021aqds_qspi_defconfig @@ -16,6 +16,8 @@ CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index db1a04f994e..8e23ccc7889 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -23,6 +23,8 @@ CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_FSL_QIXIS=y # CONFIG_QIXIS_I2C_ACCESS is not set diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index 724c4106e07..ff8fbeb7177 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -23,6 +23,8 @@ CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 diff --git a/configs/ls1021atsn_qspi_defconfig b/configs/ls1021atsn_qspi_defconfig index fb89c217102..b368791280a 100644 --- a/configs/ls1021atsn_qspi_defconfig +++ b/configs/ls1021atsn_qspi_defconfig @@ -15,6 +15,8 @@ CONFIG_DEFAULT_DEVICE_TREE="ls1021a-tsn" CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig index 4d72c25f655..64266afd013 100644 --- a/configs/ls1021atsn_sdcard_defconfig +++ b/configs/ls1021atsn_sdcard_defconfig @@ -20,6 +20,8 @@ CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig index b2f081b8d7c..41887e0921c 100644 --- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig @@ -15,6 +15,8 @@ CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y CONFIG_NXP_ESBC=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig index 659ea4ef5a1..c806309b093 100644 --- a/configs/ls1021atwr_nor_defconfig +++ b/configs/ls1021atwr_nor_defconfig @@ -16,6 +16,8 @@ CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_ENV_ADDR=0x60300000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig index 1399b09c83c..de025930d85 100644 --- a/configs/ls1021atwr_nor_lpuart_defconfig +++ b/configs/ls1021atwr_nor_lpuart_defconfig @@ -16,6 +16,8 @@ CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_ENV_ADDR=0x60300000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig index e186dfe7c4c..b5b2cf13f92 100644 --- a/configs/ls1021atwr_qspi_defconfig +++ b/configs/ls1021atwr_qspi_defconfig @@ -16,6 +16,8 @@ CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index 0d4465edd53..2b76f0a2b96 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -22,6 +22,8 @@ CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_NXP_ESBC=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index 5d9002a17f3..161fa1eebd6 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -22,6 +22,8 @@ CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index 714835cb452..2dc01e19bbc 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -22,6 +22,8 @@ CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index 3fa4440a786..364a34751fc 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -16,6 +16,9 @@ CONFIG_FSL_LS_PPA=y CONFIG_ENV_ADDR=0x60300000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig index ae9b3449b83..7b083b32fba 100644 --- a/configs/ls1043aqds_lpuart_defconfig +++ b/configs/ls1043aqds_lpuart_defconfig @@ -16,6 +16,9 @@ CONFIG_FSL_LS_PPA=y CONFIG_ENV_ADDR=0x60300000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index cbc58b2d98d..7446f01272e 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -21,6 +21,9 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig index 8b32b82fa5b..6dd797c652b 100644 --- a/configs/ls1043aqds_nor_ddr3_defconfig +++ b/configs/ls1043aqds_nor_ddr3_defconfig @@ -16,6 +16,9 @@ CONFIG_FSL_LS_PPA=y CONFIG_ENV_ADDR=0x60300000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig index 2716898fb6e..30cc15a12f3 100644 --- a/configs/ls1043aqds_qspi_defconfig +++ b/configs/ls1043aqds_qspi_defconfig @@ -17,6 +17,9 @@ CONFIG_FSL_LS_PPA=y CONFIG_ENV_ADDR=0x40300000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index c95763ebe55..53f19a376ee 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -22,6 +22,9 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index 15a1d158cce..447a51513fe 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -22,6 +22,9 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" diff --git a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig index 2ce742cd9f3..4c8a615f8ca 100644 --- a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig @@ -17,6 +17,9 @@ CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y CONFIG_NXP_ESBC=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" diff --git a/configs/ls1043aqds_tfa_defconfig b/configs/ls1043aqds_tfa_defconfig index dff7fac4c8b..d04d1d918b7 100644 --- a/configs/ls1043aqds_tfa_defconfig +++ b/configs/ls1043aqds_tfa_defconfig @@ -19,6 +19,9 @@ CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_ENV_ADDR=0x60500000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index 77a9d32df32..8b2f094dc17 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -14,6 +14,9 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_FSL_LS_PPA=y CONFIG_NXP_ESBC=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig index 7a752495455..341fb0f9269 100644 --- a/configs/ls1043ardb_defconfig +++ b/configs/ls1043ardb_defconfig @@ -15,6 +15,9 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_FSL_LS_PPA=y CONFIG_ENV_ADDR=0x60300000 CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index ce57a0a0d2f..305734d7482 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -16,6 +16,9 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_NXP_ESBC=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index 13a35e601c1..56cdef82216 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -20,6 +20,9 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index d577a4c9b89..bf2805db9e9 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -17,6 +17,9 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_NXP_ESBC=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index 2211547dcc3..f1370b5104b 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -21,6 +21,9 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig index 428c3a84cce..4ebc6367f21 100644 --- a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig @@ -16,6 +16,9 @@ CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_NXP_ESBC=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls1043ardb_tfa_defconfig b/configs/ls1043ardb_tfa_defconfig index ff703e57f17..db522948721 100644 --- a/configs/ls1043ardb_tfa_defconfig +++ b/configs/ls1043ardb_tfa_defconfig @@ -18,6 +18,9 @@ CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_ENV_ADDR=0x60500000 CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig index f7aa843c663..1be7002a185 100644 --- a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig @@ -14,6 +14,9 @@ CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y CONFIG_NXP_ESBC=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y diff --git a/configs/ls1046afrwy_tfa_defconfig b/configs/ls1046afrwy_tfa_defconfig index 1c0a24a9a60..f41434c7419 100644 --- a/configs/ls1046afrwy_tfa_defconfig +++ b/configs/ls1046afrwy_tfa_defconfig @@ -16,6 +16,9 @@ CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_ENV_ADDR=0x40500000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig index ea69dafe51f..fdeedca4767 100644 --- a/configs/ls1046aqds_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_SECURE_BOOT_defconfig @@ -15,6 +15,9 @@ CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_NXP_ESBC=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig index 59967d00f70..a66099c815d 100644 --- a/configs/ls1046aqds_defconfig +++ b/configs/ls1046aqds_defconfig @@ -16,6 +16,9 @@ CONFIG_FSL_LS_PPA=y CONFIG_ENV_ADDR=0x60300000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig index 0254c92075f..835159deefb 100644 --- a/configs/ls1046aqds_lpuart_defconfig +++ b/configs/ls1046aqds_lpuart_defconfig @@ -16,6 +16,9 @@ CONFIG_FSL_LS_PPA=y CONFIG_ENV_ADDR=0x60300000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig index 7ab5e4f7966..2a70d660ed6 100644 --- a/configs/ls1046aqds_nand_defconfig +++ b/configs/ls1046aqds_nand_defconfig @@ -21,6 +21,9 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig index 931e70a6c62..049cf1e56f9 100644 --- a/configs/ls1046aqds_qspi_defconfig +++ b/configs/ls1046aqds_qspi_defconfig @@ -17,6 +17,9 @@ CONFIG_FSL_LS_PPA=y CONFIG_ENV_ADDR=0x40300000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index 780c81959ba..11554a831d5 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -22,6 +22,9 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index 5a5e607e3ce..68aae882a80 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -22,6 +22,9 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" diff --git a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig index 2430c8c6d79..7fd24122f04 100644 --- a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig @@ -17,6 +17,9 @@ CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y CONFIG_NXP_ESBC=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" diff --git a/configs/ls1046aqds_tfa_defconfig b/configs/ls1046aqds_tfa_defconfig index 6f208b9d589..52d3d302d94 100644 --- a/configs/ls1046aqds_tfa_defconfig +++ b/configs/ls1046aqds_tfa_defconfig @@ -19,6 +19,9 @@ CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_ENV_ADDR=0x60500000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_VID=y CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig index 81659aa9cc3..33141984466 100644 --- a/configs/ls1046ardb_emmc_defconfig +++ b/configs/ls1046ardb_emmc_defconfig @@ -22,6 +22,9 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig index bc3123011a1..2ea72cc2a8a 100644 --- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig @@ -16,6 +16,9 @@ CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y CONFIG_NXP_ESBC=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig index d958fb75321..c6b537f3b8d 100644 --- a/configs/ls1046ardb_qspi_defconfig +++ b/configs/ls1046ardb_qspi_defconfig @@ -18,6 +18,9 @@ CONFIG_QSPI_AHB_INIT=y CONFIG_ENV_ADDR=0x40300000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig index b1eda7b79a5..57cebf5f8b4 100644 --- a/configs/ls1046ardb_qspi_spl_defconfig +++ b/configs/ls1046ardb_qspi_spl_defconfig @@ -24,6 +24,9 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig index 6daaba6c192..6960aa9d3ff 100644 --- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -21,6 +21,9 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_NXP_ESBC=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig index c5653d72514..9ca4315c83c 100644 --- a/configs/ls1046ardb_sdcard_defconfig +++ b/configs/ls1046ardb_sdcard_defconfig @@ -22,6 +22,9 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 diff --git a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig index f8649c58c49..e192ef48b13 100644 --- a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig @@ -18,6 +18,9 @@ CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y CONFIG_NXP_ESBC=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls1046ardb_tfa_defconfig b/configs/ls1046ardb_tfa_defconfig index 2434ed379e1..6e5f29a708d 100644 --- a/configs/ls1046ardb_tfa_defconfig +++ b/configs/ls1046ardb_tfa_defconfig @@ -20,6 +20,9 @@ CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_ENV_ADDR=0x40500000 CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y +CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index ce559e907c0..bec2ca0f81d 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -16,10 +16,6 @@ #define CONFIG_SYS_SRIO #define CONFIG_SRIO1 /* SRIO port 1 */ -#define CONFIG_PCI1 /* PCI controller 1 */ -#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ -#undef CONFIG_PCI2 - #define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */ #ifndef __ASSEMBLY__ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 813516892c6..5f64bd944b3 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -63,9 +63,6 @@ /* High Level Configuration Options */ #if defined(CONFIG_PCI) -#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ -#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ - /* * PCI Windows * Memory space is mapped 1-1, but I/O space must start from 0. diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 4a1fccff598..d7df5795cc2 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -33,9 +33,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_PCIE1 /* PCIE controller 1 */ -#define CONFIG_PCIE2 /* PCIE controller 2 */ -#define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_SYS_SRIO #define CONFIG_SRIO1 /* SRIO port 1 */ diff --git a/include/configs/P3041DS.h b/include/configs/P3041DS.h index 6063113634c..bc8aa3ce054 100644 --- a/include/configs/P3041DS.h +++ b/include/configs/P3041DS.h @@ -9,8 +9,6 @@ */ #define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */ -#define CONFIG_PCIE3 -#define CONFIG_PCIE4 #define CONFIG_SYS_DPAA_RMAN #define CONFIG_SYS_SRIO diff --git a/include/configs/P4080DS.h b/include/configs/P4080DS.h index 6615dd091e2..6375c65d483 100644 --- a/include/configs/P4080DS.h +++ b/include/configs/P4080DS.h @@ -9,8 +9,6 @@ */ #define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */ -#define CONFIG_PCIE3 - #define CONFIG_SYS_SRIO #define CONFIG_SRIO1 /* SRIO port 1 */ #define CONFIG_SRIO2 /* SRIO port 2 */ diff --git a/include/configs/P5040DS.h b/include/configs/P5040DS.h index 6e6e5bec66b..fb73f0b9539 100644 --- a/include/configs/P5040DS.h +++ b/include/configs/P5040DS.h @@ -9,7 +9,6 @@ */ #define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */ -#define CONFIG_PCIE3 #define CONFIG_SYS_FSL_RAID_ENGINE #define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 2ccfd87bfb0..cdae8a88df9 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -352,9 +352,6 @@ * General PCIe * Memory space is mapped 1-1, but I/O space must start from 0. */ -#define CONFIG_PCIE1 /* PCIE controller 1 */ -#define CONFIG_PCIE2 /* PCIE controller 2 */ -#define CONFIG_PCIE3 /* PCIE controller 3 */ #ifdef CONFIG_PCI /* controller 1, direct to uli, tgtid 3, Base address 20000 */ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 1c2052608ec..8222c674706 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -61,10 +61,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_PCIE1 /* PCIE controller 1 */ -#define CONFIG_PCIE2 /* PCIE controller 2 */ -#define CONFIG_PCIE3 /* PCIE controller 3 */ -#define CONFIG_PCIE4 /* PCIE controller 4 */ /* * These can be toggled for performance analysis, otherwise use default. diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index eda03dad229..53fc49fdcf2 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -368,10 +368,6 @@ * General PCI * Memory space is mapped 1-1, but I/O space must start from 0. */ -#define CONFIG_PCIE1 /* PCIE controller 1 */ -#define CONFIG_PCIE2 /* PCIE controller 2 */ -#define CONFIG_PCIE3 /* PCIE controller 3 */ -#define CONFIG_PCIE4 /* PCIE controller 4 */ /* controller 1, direct to uli, tgtid 3, Base address 20000 */ #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 290fd7cf744..b3648ae06fa 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -321,10 +321,6 @@ * General PCI * Memory space is mapped 1-1, but I/O space must start from 0. */ -#define CONFIG_PCIE1 /* PCIE controller 1 */ -#define CONFIG_PCIE2 /* PCIE controller 2 */ -#define CONFIG_PCIE3 /* PCIE controller 3 */ -#define CONFIG_PCIE4 /* PCIE controller 4 */ /* controller 1, direct to uli, tgtid 3, Base address 20000 */ #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 29447e4895a..3edae6b01b7 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -12,8 +12,6 @@ #include -#define CONFIG_PCIE4 - #define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ #ifdef CONFIG_RAMBOOT_PBL @@ -44,9 +42,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_PCIE1 /* PCIE controller 1 */ -#define CONFIG_PCIE2 /* PCIE controller 2 */ -#define CONFIG_PCIE3 /* PCIE controller 3 */ /* * These can be toggled for performance analysis, otherwise use default. diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index c0952e09285..59ec0641567 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -36,8 +36,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_PCIE1 /* PCIE controller 1 */ -#define CONFIG_PCIE2 /* PCIE controller 2 */ /* * These can be toggled for performance analysis, otherwise use default. diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 3b4ddb0f94a..ed24733abf5 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -140,7 +140,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_PCIE1 /* PCIE controller 1 */ /* Environment in parallel NOR-Flash */ #define CONFIG_ENV_TOTAL_SIZE 0x040000 diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index 7f083c597e3..ee67215a097 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -25,8 +25,6 @@ func(USB, usb, 0) \ func(DHCP, dhcp, na) -#define CONFIG_PCIE1 /* PCIE controller 1 */ - #define CONFIG_PCI_SCAN_SHOW #undef CONFIG_EXTRA_ENV_SETTINGS diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index b5992366cf4..9dbf1a7ab3c 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -82,8 +82,6 @@ DSPI_CTAR_CSSCK(2) | DSPI_CTAR_ASC(0) | \ DSPI_CTAR_DT(0)) -#define CONFIG_PCIE1 /* PCIE controller 1 */ - #define CONFIG_PCI_SCAN_SHOW #undef CONFIG_EXTRA_ENV_SETTINGS diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h index c57b598d70d..f71ab2c80c8 100644 --- a/include/configs/ls1012ardb.h +++ b/include/configs/ls1012ardb.h @@ -36,8 +36,6 @@ #define __PHY_ETH2_MASK 0xFB #define __PHY_ETH1_MASK 0xFD -#define CONFIG_PCIE1 /* PCIE controller 1 */ - #define CONFIG_PCI_SCAN_SHOW #undef CONFIG_EXTRA_ENV_SETTINGS diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index f43ea2bd6ec..6556f1aa65d 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -97,10 +97,6 @@ #define TSEC2_PHYIDX 0 #endif -/* PCIe */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ - #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie" #ifdef CONFIG_PCI diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 1faa38b082b..00825b373e6 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -301,10 +301,6 @@ #endif -/* PCIe */ -#define CONFIG_PCIE1 /* PCIE controller 1 */ -#define CONFIG_PCIE2 /* PCIE controller 2 */ - #ifdef CONFIG_PCI #define CONFIG_PCI_SCAN_SHOW #endif diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index 3ff694f6b58..791df844c14 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -80,8 +80,6 @@ #define FSL_QSPI_FLASH_NUM 2 /* PCIe */ -#define CONFIG_PCIE1 /* PCIE controller 1 */ -#define CONFIG_PCIE2 /* PCIE controller 2 */ #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie" #ifdef CONFIG_PCI #define CONFIG_PCI_SCAN_SHOW diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index eff919116ec..921399e31de 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -171,10 +171,6 @@ #define CONFIG_SYS_I2C_EEPROM_NXID #define CONFIG_SYS_EEPROM_BUS_NUM 1 -/* PCIe */ -#define CONFIG_PCIE1 /* PCIE controller 1 */ -#define CONFIG_PCIE2 /* PCIE controller 2 */ - #ifdef CONFIG_PCI #define CONFIG_PCI_SCAN_SHOW #endif diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 8363969d557..db00a0a002a 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -110,10 +110,6 @@ /* PCIe */ #ifndef SPL_NO_PCIE -#define CONFIG_PCIE1 /* PCIE controller 1 */ -#define CONFIG_PCIE2 /* PCIE controller 2 */ -#define CONFIG_PCIE3 /* PCIE controller 3 */ - #ifdef CONFIG_PCI #define CONFIG_PCI_SCAN_SHOW #endif diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index e139aa93e1f..3a1106777f9 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -76,11 +76,6 @@ /* I2C */ -/* PCIe */ -#define CONFIG_PCIE1 /* PCIE controller 1 */ -#define CONFIG_PCIE2 /* PCIE controller 2 */ -#define CONFIG_PCIE3 /* PCIE controller 3 */ - #ifdef CONFIG_PCI #define CONFIG_PCI_SCAN_SHOW #endif diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 3ba95b4b6c1..a639dbac788 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -102,9 +102,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif -#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ -#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ - #define CONFIG_HWCONFIG /* * These can be toggled for performance analysis, otherwise use default. -- GitLab From 4547a1bc926baaa695d639d636570a263f3a9c07 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 20 Jun 2022 08:07:46 -0400 Subject: [PATCH 482/581] Convert CONFIG_PCIE_IMX to Kconfig This converts the following to Kconfig: CONFIG_PCIE_IMX Signed-off-by: Tom Rini --- configs/ge_bx50v3_defconfig | 1 + configs/gwventana_emmc_defconfig | 1 + configs/gwventana_gw5904_defconfig | 1 + configs/gwventana_nand_defconfig | 1 + configs/mx6sabresd_defconfig | 1 + configs/mx6sxsabresd_defconfig | 1 + configs/novena_defconfig | 1 + configs/tbs2910_defconfig | 1 + configs/vining_2000_defconfig | 1 + drivers/pci/Kconfig | 4 ++++ include/configs/ge_bx50v3.h | 1 - include/configs/gw_ventana.h | 3 --- include/configs/mx6sabresd.h | 1 - include/configs/mx6sxsabresd.h | 1 - include/configs/nitrogen6x.h | 1 - include/configs/novena.h | 1 - include/configs/tbs2910.h | 1 - include/configs/vining_2000.h | 1 - 18 files changed, 13 insertions(+), 10 deletions(-) diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index c9e4ee8f93d..114a361a184 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -74,6 +74,7 @@ CONFIG_CMD_E1000=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_PCIE_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_PMIC=y diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index 0044d893128..ea9e7e2cbf0 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -114,6 +114,7 @@ CONFIG_E1000=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_PCIE_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_POWER_LEGACY=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index 08580255f79..c0c7c0daf13 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -118,6 +118,7 @@ CONFIG_E1000=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_PCIE_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_POWER_LEGACY=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index e2eab2bb381..7ce02fef8a2 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -124,6 +124,7 @@ CONFIG_E1000=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_PCIE_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_POWER_LEGACY=y diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index 15dbaf848cd..f5ad3664db7 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -97,6 +97,7 @@ CONFIG_FEC_MXC=y CONFIG_RGMII=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_PCIE_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_POWER_LEGACY=y diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig index c41b2d9264e..9a9e0da5140 100644 --- a/configs/mx6sxsabresd_defconfig +++ b/configs/mx6sxsabresd_defconfig @@ -60,6 +60,7 @@ CONFIG_DM_ETH=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_PCIE_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_PMIC=y diff --git a/configs/novena_defconfig b/configs/novena_defconfig index 6b0f17628dc..f156296adab 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -75,6 +75,7 @@ CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_FEC_MXC=y CONFIG_RGMII=y CONFIG_MII=y +CONFIG_PCIE_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_POWER_LEGACY=y diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 4b304f8c7f5..0401dc6142d 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -83,6 +83,7 @@ CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y # CONFIG_PCI_PNP is not set +CONFIG_PCIE_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_RTC=y diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig index da782889a1b..ad534ab5860 100644 --- a/configs/vining_2000_defconfig +++ b/configs/vining_2000_defconfig @@ -84,6 +84,7 @@ CONFIG_DM_ETH=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_PCIE_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_POWER_LEGACY=y diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index fd2203420c3..0c74f95f604 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -254,6 +254,10 @@ config FSL_PCIE_EP_COMPAT This compatible is used to find pci controller ep node in Kernel DT to complete fixup. +config PCIE_IMX + bool "i.MX PCIe support" + depends on ARCH_MX6 + config PCIE_INTEL_FPGA bool "Intel FPGA PCIe support" help diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index d813c6c22e7..b4638a2b9d8 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -110,6 +110,5 @@ #define CONFIG_IMX6_PWM_PER_CLK 66000000 #define CONFIG_PCI_SCAN_SHOW -#define CONFIG_PCIE_IMX #endif /* __GE_BX50V3_CONFIG_H */ diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 47a72fc8fce..4a0aaf4da58 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -31,9 +31,6 @@ /* * PCI express */ -#ifdef CONFIG_CMD_PCI -#define CONFIG_PCIE_IMX -#endif /* * PMIC diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index ef255aa360e..845154520e7 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -25,7 +25,6 @@ #ifdef CONFIG_CMD_PCI #define CONFIG_PCI_SCAN_SHOW -#define CONFIG_PCIE_IMX #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19) #endif diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 7bbc500ae12..fe3cb1e4dc5 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -130,7 +130,6 @@ #ifdef CONFIG_CMD_PCI #define CONFIG_PCI_SCAN_SHOW -#define CONFIG_PCIE_IMX #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0) #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1) #endif diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 72a9f4ec24f..ff9cb12a59c 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -102,7 +102,6 @@ */ #ifdef CONFIG_CMD_PCI #define CONFIG_PCI_SCAN_SHOW -#define CONFIG_PCIE_IMX #endif #endif /* __CONFIG_H */ diff --git a/include/configs/novena.h b/include/configs/novena.h index 9f18db465e1..54afcf620df 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -49,7 +49,6 @@ /* PCI express */ #ifdef CONFIG_CMD_PCI #define CONFIG_PCI_SCAN_SHOW -#define CONFIG_PCIE_IMX #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(3, 29) #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(7, 12) #endif diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index dd2c5d77445..357811f5fd4 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -27,7 +27,6 @@ /* PCI */ #ifdef CONFIG_CMD_PCI #define CONFIG_PCI_SCAN_SHOW -#define CONFIG_PCIE_IMX #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) #endif diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index 9cc8fc5ff53..beaff28aa2b 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -46,7 +46,6 @@ #ifdef CONFIG_CMD_PCI #define CONFIG_PCI_SCAN_SHOW -#define CONFIG_PCIE_IMX #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(4, 6) #endif -- GitLab From 4e7860288c2edb3d3f2e947e4a217e9a51787301 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 20 Jun 2022 08:07:47 -0400 Subject: [PATCH 483/581] pci: Remove pci_sh4 and related defines. This driver is not enabled anywhere, remove it. Also remove definitions of symbols only used in this driver, on platforms that did not enable it. Signed-off-by: Tom Rini --- drivers/pci/Makefile | 1 - drivers/pci/pci_sh4.c | 82 -------------------------------- include/configs/x86-chromebook.h | 12 ----- 3 files changed, 95 deletions(-) delete mode 100644 drivers/pci/pci_sh4.c diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile index 04f623652f0..cfcd6fd6c52 100644 --- a/drivers/pci/Makefile +++ b/drivers/pci/Makefile @@ -20,7 +20,6 @@ obj-$(CONFIG_PCIE_IMX) += pcie_imx.o obj-$(CONFIG_PCI_MVEBU) += pci_mvebu.o obj-$(CONFIG_PCI_RCAR_GEN2) += pci-rcar-gen2.o obj-$(CONFIG_PCI_RCAR_GEN3) += pci-rcar-gen3.o -obj-$(CONFIG_SH4_PCI) += pci_sh4.o obj-$(CONFIG_SH7751_PCI) +=pci_sh7751.o obj-$(CONFIG_SH7780_PCI) +=pci_sh7780.o obj-$(CONFIG_PCI_TEGRA) += pci_tegra.o diff --git a/drivers/pci/pci_sh4.c b/drivers/pci/pci_sh4.c deleted file mode 100644 index aac9be055e2..00000000000 --- a/drivers/pci/pci_sh4.c +++ /dev/null @@ -1,82 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * SH4 PCI Controller (PCIC) for U-Boot. - * (C) Dustin McIntire (dustin@sensoria.com) - * (C) 2007,2008 Nobuhiro Iwamatsu - * (C) 2008 Yusuke Goda - * - * u-boot/arch/sh/cpu/sh4/pci-sh4.c - */ - -#include -#include - -#include -#include -#include -#include - -int pci_sh4_init(struct pci_controller *hose) -{ - hose->first_busno = 0; - hose->region_count = 0; - hose->last_busno = 0xff; - - /* PCI memory space */ - pci_set_region(hose->regions + 0, - CONFIG_PCI_MEM_BUS, - CONFIG_PCI_MEM_PHYS, - CONFIG_PCI_MEM_SIZE, - PCI_REGION_MEM); - hose->region_count++; - - /* PCI IO space */ - pci_set_region(hose->regions + 1, - CONFIG_PCI_IO_BUS, - CONFIG_PCI_IO_PHYS, - CONFIG_PCI_IO_SIZE, - PCI_REGION_IO); - hose->region_count++; - -#if defined(CONFIG_PCI_SYS_BUS) - /* PCI System Memory space */ - pci_set_region(hose->regions + 2, - CONFIG_PCI_SYS_BUS, - CONFIG_PCI_SYS_PHYS, - CONFIG_PCI_SYS_SIZE, - PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); - hose->region_count++; -#endif - - udelay(1000); - - pci_set_ops(hose, - pci_hose_read_config_byte_via_dword, - pci_hose_read_config_word_via_dword, - pci_sh4_read_config_dword, - pci_hose_write_config_byte_via_dword, - pci_hose_write_config_word_via_dword, - pci_sh4_write_config_dword); - - pci_register_hose(hose); - - udelay(1000); - -#ifdef CONFIG_PCI_SCAN_SHOW - printf("PCI: Bus Dev VenId DevId Class Int\n"); -#endif - hose->last_busno = pci_hose_scan(hose); - return 0; -} - -int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev) -{ - return 0; -} - -#ifdef CONFIG_PCI_SCAN_SHOW -int pci_print_dev(struct pci_controller *hose, pci_dev_t dev) -{ - return 1; -} -#endif /* CONFIG_PCI_SCAN_SHOW */ diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h index b45d2bbd626..4109af7d851 100644 --- a/include/configs/x86-chromebook.h +++ b/include/configs/x86-chromebook.h @@ -12,18 +12,6 @@ #define CONFIG_X86_REFCODE_ADDR 0xffea0000 #define CONFIG_X86_REFCODE_RUN_ADDR 0 -#define CONFIG_PCI_MEM_BUS 0xe0000000 -#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS -#define CONFIG_PCI_MEM_SIZE 0x10000000 - -#define CONFIG_PCI_PREF_BUS 0xd0000000 -#define CONFIG_PCI_PREF_PHYS CONFIG_PCI_PREF_BUS -#define CONFIG_PCI_PREF_SIZE 0x10000000 - -#define CONFIG_PCI_IO_BUS 0x1000 -#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS -#define CONFIG_PCI_IO_SIZE 0xefff - #define VIDEO_IO_OFFSET 0 #define CONFIG_X86EMU_RAW_IO -- GitLab From f27bca4c27ef1503a85ad285a4a39c7c62fddc2d Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 20 Jun 2022 08:07:48 -0400 Subject: [PATCH 484/581] Convert CONFIG_PCI_SCAN_SHOW to Kconfig This converts the following to Kconfig: CONFIG_PCI_SCAN_SHOW Signed-off-by: Tom Rini --- configs/ge_bx50v3_defconfig | 1 + configs/mx6sabresd_defconfig | 1 + configs/mx6sxsabresd_defconfig | 1 + configs/novena_defconfig | 1 + configs/tbs2910_defconfig | 1 + configs/vining_2000_defconfig | 1 + drivers/pci/Kconfig | 4 ++++ include/configs/MPC837XERDB.h | 4 ---- include/configs/MPC8548CDS.h | 4 ---- include/configs/P1010RDB.h | 2 -- include/configs/P2041RDB.h | 4 ---- include/configs/T102xRDB.h | 2 -- include/configs/T104xRDB.h | 2 -- include/configs/T208xQDS.h | 4 ---- include/configs/T208xRDB.h | 4 ---- include/configs/T4240RDB.h | 4 ---- include/configs/apalis-tk1.h | 3 --- include/configs/clearfog.h | 3 --- include/configs/controlcenterdc.h | 3 --- include/configs/corenet_ds.h | 4 ---- include/configs/db-88f6820-amc.h | 3 --- include/configs/db-88f6820-gp.h | 3 --- include/configs/db-mv784mp-gp.h | 3 --- include/configs/ds414.h | 3 --- include/configs/durian.h | 3 --- include/configs/ge_bx50v3.h | 2 -- include/configs/helios4.h | 3 --- include/configs/ls1012afrwy.h | 2 -- include/configs/ls1012aqds.h | 2 -- include/configs/ls1012ardb.h | 2 -- include/configs/ls1021aiot.h | 4 ---- include/configs/ls1021aqds.h | 4 ---- include/configs/ls1021atsn.h | 3 --- include/configs/ls1021atwr.h | 4 ---- include/configs/ls1043a_common.h | 7 ------- include/configs/ls1046a_common.h | 4 ---- include/configs/ls2080aqds.h | 4 ---- include/configs/ls2080ardb.h | 4 ---- include/configs/lx2160a_common.h | 5 ----- include/configs/mx6sabresd.h | 1 - include/configs/mx6sxsabresd.h | 1 - include/configs/nitrogen6x.h | 7 ------- include/configs/novena.h | 1 - include/configs/p1_p2_rdb_pc.h | 2 -- include/configs/tbs2910.h | 1 - include/configs/vining_2000.h | 1 - include/configs/x530.h | 3 --- 47 files changed, 10 insertions(+), 125 deletions(-) diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index 114a361a184..c3328781266 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -74,6 +74,7 @@ CONFIG_CMD_E1000=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_PCI_SCAN_SHOW=y CONFIG_PCIE_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index f5ad3664db7..ea0c7646746 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -97,6 +97,7 @@ CONFIG_FEC_MXC=y CONFIG_RGMII=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_PCI_SCAN_SHOW=y CONFIG_PCIE_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig index 9a9e0da5140..1985ff96dec 100644 --- a/configs/mx6sxsabresd_defconfig +++ b/configs/mx6sxsabresd_defconfig @@ -60,6 +60,7 @@ CONFIG_DM_ETH=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_PCI_SCAN_SHOW=y CONFIG_PCIE_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y diff --git a/configs/novena_defconfig b/configs/novena_defconfig index f156296adab..d4ab93850c4 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -75,6 +75,7 @@ CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_FEC_MXC=y CONFIG_RGMII=y CONFIG_MII=y +CONFIG_PCI_SCAN_SHOW=y CONFIG_PCIE_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 0401dc6142d..892d7c60d28 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -83,6 +83,7 @@ CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y # CONFIG_PCI_PNP is not set +CONFIG_PCI_SCAN_SHOW=y CONFIG_PCIE_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig index ad534ab5860..8d87857ba0a 100644 --- a/configs/vining_2000_defconfig +++ b/configs/vining_2000_defconfig @@ -84,6 +84,7 @@ CONFIG_DM_ETH=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_PCI_SCAN_SHOW=y CONFIG_PCIE_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index 0c74f95f604..f4c4aece58d 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -81,6 +81,10 @@ config PCI_ARID support on PCI devices. This helps to skip some devices in BDF scan that are not present. +config PCI_SCAN_SHOW + bool "Show PCI devices during startup" + depends on PCIE_IMX + config PCIE_ECAM_GENERIC bool "Generic ECAM-based PCI host controller support" help diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 8e75d779c41..e8e0a1c6699 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -232,10 +232,6 @@ #define CONFIG_SYS_PCIE2_IO_PHYS 0xD8000000 #define CONFIG_SYS_PCIE2_IO_SIZE 0x00800000 -#ifdef CONFIG_PCI -#undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -#endif /* CONFIG_PCI */ - /* * TSEC */ diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index bec2ca0f81d..2eb33812f76 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -312,10 +312,6 @@ #endif #define CONFIG_SYS_SRIO1_MEM_SIZE 0x20000000 /* 512M */ -#if defined(CONFIG_PCI) -#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -#endif /* CONFIG_PCI */ - #if defined(CONFIG_TSEC_ENET) #define CONFIG_TSEC1 1 diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 5f64bd944b3..aea744c826c 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -94,8 +94,6 @@ #else #define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000 #endif - -#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif #define CONFIG_HWCONFIG diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index d7df5795cc2..e019c168434 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -321,10 +321,6 @@ #define CONFIG_SYS_DPAA_PME #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) -#ifdef CONFIG_PCI -#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -#endif /* CONFIG_PCI */ - #ifdef CONFIG_FMAN_ENET #define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x2 #define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x3 diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index cdae8a88df9..a519b5a9355 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -377,8 +377,6 @@ #define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000 #define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull #endif - -#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif /* CONFIG_PCI */ /* diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 8222c674706..3a7c643cfc9 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -362,8 +362,6 @@ #define CONFIG_SYS_PCIE4_IO_VIRT 0xf8030000 #define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull #endif - -#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif /* CONFIG_PCI */ /* diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 53fc49fdcf2..eff22c18bb7 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -391,10 +391,6 @@ #define CONFIG_SYS_PCIE4_MEM_PHYS 0xc40000000ull #define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull -#ifdef CONFIG_PCI -#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -#endif - /* Qman/Bman */ #ifndef CONFIG_NOBQFMAN #define CONFIG_SYS_BMAN_NUM_PORTALS 18 diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index b3648ae06fa..ba9bfdd72f7 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -344,10 +344,6 @@ #define CONFIG_SYS_PCIE4_MEM_PHYS 0xc40000000ull #define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull -#ifdef CONFIG_PCI -#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -#endif - /* Qman/Bman */ #ifndef CONFIG_NOBQFMAN #define CONFIG_SYS_BMAN_NUM_PORTALS 18 diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 3edae6b01b7..12b479f9c77 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -138,10 +138,6 @@ #define CONFIG_SYS_PCIE4_MEM_PHYS 0xc60000000ull #define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull -#ifdef CONFIG_PCI -#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -#endif /* CONFIG_PCI */ - /* * Environment */ diff --git a/include/configs/apalis-tk1.h b/include/configs/apalis-tk1.h index a362282a291..6a4092a83e2 100644 --- a/include/configs/apalis-tk1.h +++ b/include/configs/apalis-tk1.h @@ -19,9 +19,6 @@ #define FDT_MODULE "apalis-v1.2" #define FDT_MODULE_V1_0 "apalis" -/* PCI host support */ -#undef CONFIG_PCI_SCAN_SHOW - /* * Custom Distro Boot configuration: * 1. 8bit SD port (MMC1) diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h index 9969269bf2a..9c9e9506dc6 100644 --- a/include/configs/clearfog.h +++ b/include/configs/clearfog.h @@ -28,9 +28,6 @@ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ -/* PCIe support */ -#define CONFIG_PCI_SCAN_SHOW - /* Keep device tree and initrd in lower memory so the kernel can access them */ #define RELOCATION_LIMITS_ENV_SETTINGS \ "fdt_high=0x10000000\0" \ diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h index bb1595f9611..5da2778b67b 100644 --- a/include/configs/controlcenterdc.h +++ b/include/configs/controlcenterdc.h @@ -17,9 +17,6 @@ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ -/* PCIe support */ -#define CONFIG_PCI_SCAN_SHOW - /* * Environment Configuration */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 59ec0641567..2252bf89543 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -314,10 +314,6 @@ #define CONFIG_SYS_DPAA_PME #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) -#ifdef CONFIG_PCI -#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -#endif /* CONFIG_PCI */ - #ifdef CONFIG_FMAN_ENET #define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x1c #define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x1d diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h index 6912f39d32d..b9d03d253d9 100644 --- a/include/configs/db-88f6820-amc.h +++ b/include/configs/db-88f6820-amc.h @@ -14,9 +14,6 @@ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ -/* PCIe support */ -#define CONFIG_PCI_SCAN_SHOW - /* NAND */ /* Keep device tree and initrd in lower memory so the kernel can access them */ diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index 3b3a7abd281..bba2b607aa8 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -17,9 +17,6 @@ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ -/* PCIe support */ -#define CONFIG_PCI_SCAN_SHOW - /* Keep device tree and initrd in lower memory so the kernel can access them */ #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0x10000000\0" \ diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index 715a6d7a9e7..7b305955c96 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -21,9 +21,6 @@ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ -/* PCIe support */ -#define CONFIG_PCI_SCAN_SHOW - /* NAND */ /* diff --git a/include/configs/ds414.h b/include/configs/ds414.h index 7e3f657e31c..f8273a92f11 100644 --- a/include/configs/ds414.h +++ b/include/configs/ds414.h @@ -19,9 +19,6 @@ /* I2C */ #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE -/* PCIe support */ -#define CONFIG_PCI_SCAN_SHOW - /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros diff --git a/include/configs/durian.h b/include/configs/durian.h index c224511832f..7971df8c1d3 100644 --- a/include/configs/durian.h +++ b/include/configs/durian.h @@ -13,9 +13,6 @@ #define PHYS_SDRAM_1_SIZE 0x7B000000 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -/* PCI CONFIG */ -#define CONFIG_PCI_SCAN_SHOW - /* BOOT */ #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index b4638a2b9d8..ad00769bdee 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -109,6 +109,4 @@ #define CONFIG_IMX6_PWM_PER_CLK 66000000 -#define CONFIG_PCI_SCAN_SHOW - #endif /* __GE_BX50V3_CONFIG_H */ diff --git a/include/configs/helios4.h b/include/configs/helios4.h index ff2c5064432..fc32487e1c7 100644 --- a/include/configs/helios4.h +++ b/include/configs/helios4.h @@ -28,9 +28,6 @@ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ -/* PCIe support */ -#define CONFIG_PCI_SCAN_SHOW - /* Keep device tree and initrd in lower memory so the kernel can access them */ #define RELOCATION_LIMITS_ENV_SETTINGS \ "fdt_high=0x10000000\0" \ diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index ee67215a097..a0ff3b89790 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -25,8 +25,6 @@ func(USB, usb, 0) \ func(DHCP, dhcp, na) -#define CONFIG_PCI_SCAN_SHOW - #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ "verify=no\0" \ diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index 9dbf1a7ab3c..b124ce52620 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -82,8 +82,6 @@ DSPI_CTAR_CSSCK(2) | DSPI_CTAR_ASC(0) | \ DSPI_CTAR_DT(0)) -#define CONFIG_PCI_SCAN_SHOW - #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ "verify=no\0" \ diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h index f71ab2c80c8..4f77acdaede 100644 --- a/include/configs/ls1012ardb.h +++ b/include/configs/ls1012ardb.h @@ -36,8 +36,6 @@ #define __PHY_ETH2_MASK 0xFB #define __PHY_ETH1_MASK 0xFD -#define CONFIG_PCI_SCAN_SHOW - #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ "verify=no\0" \ diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 6556f1aa65d..ec688741a07 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -99,10 +99,6 @@ #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie" -#ifdef CONFIG_PCI -#define CONFIG_PCI_SCAN_SHOW -#endif - #define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_SMP_PEN_ADDR 0x01ee0200 diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 00825b373e6..1a46f72a735 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -301,10 +301,6 @@ #endif -#ifdef CONFIG_PCI -#define CONFIG_PCI_SCAN_SHOW -#endif - #define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_SMP_PEN_ADDR 0x01ee0200 diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index 791df844c14..e5754c94e0f 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -81,9 +81,6 @@ /* PCIe */ #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie" -#ifdef CONFIG_PCI -#define CONFIG_PCI_SCAN_SHOW -#endif #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 256 diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 921399e31de..09dce21aec5 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -171,10 +171,6 @@ #define CONFIG_SYS_I2C_EEPROM_NXID #define CONFIG_SYS_EEPROM_BUS_NUM 1 -#ifdef CONFIG_PCI -#define CONFIG_PCI_SCAN_SHOW -#endif - #define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_SMP_PEN_ADDR 0x01ee0200 diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index db00a0a002a..ed32e20dbf4 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -108,13 +108,6 @@ /* I2C */ -/* PCIe */ -#ifndef SPL_NO_PCIE -#ifdef CONFIG_PCI -#define CONFIG_PCI_SCAN_SHOW -#endif -#endif - /* DSPI */ /* FMan ucode */ diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 3a1106777f9..94118c420e6 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -76,10 +76,6 @@ /* I2C */ -#ifdef CONFIG_PCI -#define CONFIG_PCI_SCAN_SHOW -#endif - /* SATA */ #ifndef SPL_NO_SATA #define CONFIG_SYS_SATA AHCI_BASE_ADDR diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 9de602bc164..9ba7258572f 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -251,10 +251,6 @@ #define CONFIG_FSL_MEMAC -#ifdef CONFIG_PCI -#define CONFIG_PCI_SCAN_SHOW -#endif - /* Initial environment variables */ #undef CONFIG_EXTRA_ENV_SETTINGS #ifdef CONFIG_NXP_ESBC diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 9c4d2feb788..a504a0ea462 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -238,10 +238,6 @@ #define CONFIG_FSL_MEMAC -#ifdef CONFIG_PCI -#define CONFIG_PCI_SCAN_SHOW -#endif - #define BOOT_TARGET_DEVICES(func) \ func(USB, usb, 0) \ func(MMC, mmc, 0) \ diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index bc3a0046ac6..77e25822dcd 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -89,11 +89,6 @@ /* Qixis */ #define CONFIG_SYS_I2C_FPGA_ADDR 0x66 -/* PCI */ -#ifdef CONFIG_PCI -#define CONFIG_PCI_SCAN_SHOW -#endif - /* USB */ #define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4) diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 845154520e7..16f8858abb8 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -24,7 +24,6 @@ #define CONFIG_SYS_FSL_USDHC_NUM 3 #ifdef CONFIG_CMD_PCI -#define CONFIG_PCI_SCAN_SHOW #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19) #endif diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index fe3cb1e4dc5..58d550fee9e 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -129,7 +129,6 @@ #endif #ifdef CONFIG_CMD_PCI -#define CONFIG_PCI_SCAN_SHOW #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0) #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1) #endif diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index ff9cb12a59c..2007b48868f 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -97,11 +97,4 @@ /* Environment organization */ -/* - * PCI express - */ -#ifdef CONFIG_CMD_PCI -#define CONFIG_PCI_SCAN_SHOW -#endif - #endif /* __CONFIG_H */ diff --git a/include/configs/novena.h b/include/configs/novena.h index 54afcf620df..1696aa28520 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -48,7 +48,6 @@ /* PCI express */ #ifdef CONFIG_CMD_PCI -#define CONFIG_PCI_SCAN_SHOW #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(3, 29) #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(7, 12) #endif diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index a639dbac788..f4bf2ab830a 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -384,8 +384,6 @@ #else #define CONFIG_SYS_PCIE1_IO_PHYS 0xffc00000 #endif - -#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif /* CONFIG_PCI */ #if defined(CONFIG_TSEC_ENET) diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index 357811f5fd4..c93df00d58d 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -26,7 +26,6 @@ /* PCI */ #ifdef CONFIG_CMD_PCI -#define CONFIG_PCI_SCAN_SHOW #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) #endif diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index beaff28aa2b..6eb022f26c5 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -45,7 +45,6 @@ #define CONFIG_MXC_USB_FLAGS 0 #ifdef CONFIG_CMD_PCI -#define CONFIG_PCI_SCAN_SHOW #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(4, 6) #endif diff --git a/include/configs/x530.h b/include/configs/x530.h index 1f1b4e1449e..cb126837b9c 100644 --- a/include/configs/x530.h +++ b/include/configs/x530.h @@ -47,9 +47,6 @@ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ -/* PCIe support */ -#define CONFIG_PCI_SCAN_SHOW - /* NAND */ #include -- GitLab From bf2c48fa1a6e068f232d84aae43b5dad654a9017 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 20 Jun 2022 08:07:49 -0400 Subject: [PATCH 485/581] Convert CONFIG_PCI_GT64120 to Kconfig This converts the following to Kconfig: CONFIG_PCI_GT64120 Signed-off-by: Tom Rini --- configs/malta64_defconfig | 1 + configs/malta64el_defconfig | 1 + configs/malta_defconfig | 1 + configs/maltael_defconfig | 1 + drivers/pci/Kconfig | 4 ++++ include/configs/malta.h | 1 - 6 files changed, 8 insertions(+), 1 deletion(-) diff --git a/configs/malta64_defconfig b/configs/malta64_defconfig index cbea4fadff7..a2d938c0dc7 100644 --- a/configs/malta64_defconfig +++ b/configs/malta64_defconfig @@ -38,5 +38,6 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_PCNET=y +CONFIG_PCI_GT64120=y CONFIG_RTC_MC146818=y CONFIG_SYS_NS16550=y diff --git a/configs/malta64el_defconfig b/configs/malta64el_defconfig index 206d5bbbea7..301652c4767 100644 --- a/configs/malta64el_defconfig +++ b/configs/malta64el_defconfig @@ -40,5 +40,6 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_PCNET=y +CONFIG_PCI_GT64120=y CONFIG_RTC_MC146818=y CONFIG_SYS_NS16550=y diff --git a/configs/malta_defconfig b/configs/malta_defconfig index 7b1b50547a4..ae9cad857e2 100644 --- a/configs/malta_defconfig +++ b/configs/malta_defconfig @@ -37,5 +37,6 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_PCNET=y +CONFIG_PCI_GT64120=y CONFIG_RTC_MC146818=y CONFIG_SYS_NS16550=y diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig index 540864b5732..963b9be59ea 100644 --- a/configs/maltael_defconfig +++ b/configs/maltael_defconfig @@ -39,5 +39,6 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_PCNET=y +CONFIG_PCI_GT64120=y CONFIG_RTC_MC146818=y CONFIG_SYS_NS16550=y diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index f4c4aece58d..0ef5c292337 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -101,6 +101,10 @@ config PCIE_ECAM_SYNQUACER Note that this must be configured when boot because Linux driver expects the PCIe RC has been configured in the bootloader. +config PCI_GT64120 + bool "GT64120 PCI support" + depends on MIPS + config PCI_PHYTIUM bool "Phytium PCIe support" help diff --git a/include/configs/malta.h b/include/configs/malta.h index 225ed7cd5cd..75f38000f6b 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -13,7 +13,6 @@ #define CONFIG_MEMSIZE_IN_BYTES -#define CONFIG_PCI_GT64120 #define CONFIG_PCI_MSC01 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 -- GitLab From e58eebb5140ce52838a7a31279b434d7030b2e35 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 20 Jun 2022 08:07:50 -0400 Subject: [PATCH 486/581] Convert CONFIG_PCI_CONFIG_HOST_BRIDGE to Kconfig This converts the following to Kconfig: CONFIG_PCI_CONFIG_HOST_BRIDGE Signed-off-by: Tom Rini --- drivers/pci/Kconfig | 4 ++++ include/configs/x86-common.h | 5 ----- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index 0ef5c292337..53d0ebd745e 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -48,6 +48,10 @@ config PCI_REGION_MULTI_ENTRY region type. This helps to add support for SoC's like OcteonTX/TX2 where every peripheral is on the PCI bus. +config PCI_CONFIG_HOST_BRIDGE + bool "Configure PCI host bridges" + default y if X86 + config PCI_MAP_SYSTEM_MEMORY bool "Map local system memory from a virtual base address" depends on MIPS diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index f28fafe15c6..1366f623aa2 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -44,11 +44,6 @@ * Environment configuration */ -/*----------------------------------------------------------------------- - * PCI configuration - */ -#define CONFIG_PCI_CONFIG_HOST_BRIDGE - /*----------------------------------------------------------------------- * USB configuration */ -- GitLab From c55094f14d3362c9bceba867d0faecc733125f83 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 20 Jun 2022 08:07:51 -0400 Subject: [PATCH 487/581] m68k: Remove unused PCI code The only mcf5445x platform does not enable PCI, drop this code. Signed-off-by: Tom Rini --- arch/m68k/cpu/mcf5445x/Makefile | 2 +- arch/m68k/cpu/mcf5445x/pci.c | 151 -------------------------------- 2 files changed, 1 insertion(+), 152 deletions(-) delete mode 100644 arch/m68k/cpu/mcf5445x/pci.c diff --git a/arch/m68k/cpu/mcf5445x/Makefile b/arch/m68k/cpu/mcf5445x/Makefile index ba90fc3c34a..6a38c4838e9 100644 --- a/arch/m68k/cpu/mcf5445x/Makefile +++ b/arch/m68k/cpu/mcf5445x/Makefile @@ -6,4 +6,4 @@ # ccflags-y += -DET_DEBUG extra-y = start.o -obj-y = cpu.o speed.o cpu_init.o interrupts.o pci.o dspi.o +obj-y = cpu.o speed.o cpu_init.o interrupts.o dspi.o diff --git a/arch/m68k/cpu/mcf5445x/pci.c b/arch/m68k/cpu/mcf5445x/pci.c deleted file mode 100644 index d487468d0bf..00000000000 --- a/arch/m68k/cpu/mcf5445x/pci.c +++ /dev/null @@ -1,151 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc. - * TsiChung Liew (Tsi-Chung.Liew@freescale.com) - */ - -/* - * PCI Configuration space access support - */ -#include -#include -#include -#include -#include - -#if defined(CONFIG_PCI) -/* System RAM mapped over PCI */ -#define CONFIG_SYS_PCI_SYS_MEM_BUS CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_PCI_SYS_MEM_PHYS CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_PCI_SYS_MEM_SIZE (1024 * 1024 * 1024) - -#define cfg_read(val, addr, type, op) *val = op((type)(addr)); -#define cfg_write(val, addr, type, op) op((type *)(addr), (val)); - -#define PCI_OP(rw, size, type, op, mask) \ -int pci_##rw##_cfg_##size(struct pci_controller *hose, \ - pci_dev_t dev, int offset, type val) \ -{ \ - u32 addr = PCI_CONF1_ADDRESS(PCI_BUS(dev), PCI_DEV(dev), \ - PCI_FUNC(dev), offset); \ - out_be32(hose->cfg_addr, addr); \ - cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \ - out_be32(hose->cfg_addr, addr & ~PCI_CONF1_ENABLE); \ - return 0; \ -} - -PCI_OP(read, byte, u8 *, in_8, 3) -PCI_OP(read, word, u16 *, in_le16, 2) -PCI_OP(read, dword, u32 *, in_le32, 0) -PCI_OP(write, byte, u8, out_8, 3) -PCI_OP(write, word, u16, out_le16, 2) -PCI_OP(write, dword, u32, out_le32, 0) - -void pci_mcf5445x_init(struct pci_controller *hose) -{ - pci_t *pci = (pci_t *)MMAP_PCI; - pciarb_t *pciarb = (pciarb_t *)MMAP_PCIARB; - gpio_t *gpio = (gpio_t *) MMAP_GPIO; - u32 barEn = 0; - - out_be32(&pciarb->acr, 0x001f001f); - - /* Set PCIGNT1, PCIREQ1, PCIREQ0/PCIGNTIN, PCIGNT0/PCIREQOUT, - PCIREQ2, PCIGNT2 */ - out_be16(&gpio->par_pci, - GPIO_PAR_PCI_GNT3_GNT3 | GPIO_PAR_PCI_GNT2 | - GPIO_PAR_PCI_GNT1 | GPIO_PAR_PCI_GNT0 | - GPIO_PAR_PCI_REQ3_REQ3 | GPIO_PAR_PCI_REQ2 | - GPIO_PAR_PCI_REQ1 | GPIO_PAR_PCI_REQ0); - - /* Assert reset bit */ - setbits_be32(&pci->gscr, PCI_GSCR_PR); - - setbits_be32(&pci->tcr1, PCI_TCR1_P); - - /* Initiator windows */ - out_be32(&pci->iw0btar, - CONFIG_SYS_PCI_MEM_PHYS | (CONFIG_SYS_PCI_MEM_PHYS >> 16)); - out_be32(&pci->iw1btar, - CONFIG_SYS_PCI_IO_PHYS | (CONFIG_SYS_PCI_IO_PHYS >> 16)); - out_be32(&pci->iw2btar, - CONFIG_SYS_PCI_CFG_PHYS | (CONFIG_SYS_PCI_CFG_PHYS >> 16)); - - out_be32(&pci->iwcr, - PCI_IWCR_W0C_EN | PCI_IWCR_W1C_EN | PCI_IWCR_W1C_IO | - PCI_IWCR_W2C_EN | PCI_IWCR_W2C_IO); - - out_be32(&pci->icr, 0); - - /* Enable bus master and mem access */ - out_be32(&pci->scr, PCI_SCR_B | PCI_SCR_M); - - /* Cache line size and master latency */ - out_be32(&pci->cr1, PCI_CR1_CLS(8) | PCI_CR1_LTMR(0xF8)); - out_be32(&pci->cr2, 0); - -#ifdef CONFIG_SYS_PCI_BAR0 - out_be32(&pci->bar0, PCI_BAR_BAR0(CONFIG_SYS_PCI_BAR0)); - out_be32(&pci->tbatr0, CONFIG_SYS_PCI_TBATR0 | PCI_TBATR_EN); - barEn |= PCI_TCR2_B0E; -#endif -#ifdef CONFIG_SYS_PCI_BAR1 - out_be32(&pci->bar1, PCI_BAR_BAR1(CONFIG_SYS_PCI_BAR1)); - out_be32(&pci->tbatr1, CONFIG_SYS_PCI_TBATR1 | PCI_TBATR_EN); - barEn |= PCI_TCR2_B1E; -#endif -#ifdef CONFIG_SYS_PCI_BAR2 - out_be32(&pci->bar2, PCI_BAR_BAR2(CONFIG_SYS_PCI_BAR2)); - out_be32(&pci->tbatr2, CONFIG_SYS_PCI_TBATR2 | PCI_TBATR_EN); - barEn |= PCI_TCR2_B2E; -#endif -#ifdef CONFIG_SYS_PCI_BAR3 - out_be32(&pci->bar3, PCI_BAR_BAR3(CONFIG_SYS_PCI_BAR3)); - out_be32(&pci->tbatr3, CONFIG_SYS_PCI_TBATR3 | PCI_TBATR_EN); - barEn |= PCI_TCR2_B3E; -#endif -#ifdef CONFIG_SYS_PCI_BAR4 - out_be32(&pci->bar4, PCI_BAR_BAR4(CONFIG_SYS_PCI_BAR4)); - out_be32(&pci->tbatr4, CONFIG_SYS_PCI_TBATR4 | PCI_TBATR_EN); - barEn |= PCI_TCR2_B4E; -#endif -#ifdef CONFIG_SYS_PCI_BAR5 - out_be32(&pci->bar5, PCI_BAR_BAR5(CONFIG_SYS_PCI_BAR5)); - out_be32(&pci->tbatr5, CONFIG_SYS_PCI_TBATR5 | PCI_TBATR_EN); - barEn |= PCI_TCR2_B5E; -#endif - - out_be32(&pci->tcr2, barEn); - - /* Deassert reset bit */ - clrbits_be32(&pci->gscr, PCI_GSCR_PR); - udelay(1000); - - /* Enable PCI bus master support */ - hose->first_busno = 0; - hose->last_busno = 0xff; - - pci_set_region(hose->regions + 0, CONFIG_SYS_PCI_MEM_BUS, CONFIG_SYS_PCI_MEM_PHYS, - CONFIG_SYS_PCI_MEM_SIZE, PCI_REGION_MEM); - - pci_set_region(hose->regions + 1, CONFIG_SYS_PCI_IO_BUS, CONFIG_SYS_PCI_IO_PHYS, - CONFIG_SYS_PCI_IO_SIZE, PCI_REGION_IO); - - pci_set_region(hose->regions + 2, CONFIG_SYS_PCI_SYS_MEM_BUS, - CONFIG_SYS_PCI_SYS_MEM_PHYS, CONFIG_SYS_PCI_SYS_MEM_SIZE, - PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); - - hose->region_count = 3; - - hose->cfg_addr = &(pci->car); - hose->cfg_data = (volatile unsigned char *)CONFIG_SYS_PCI_CFG_BUS; - - pci_set_ops(hose, pci_read_cfg_byte, pci_read_cfg_word, - pci_read_cfg_dword, pci_write_cfg_byte, pci_write_cfg_word, - pci_write_cfg_dword); - - /* Hose scan */ - pci_register_hose(hose); - hose->last_busno = pci_hose_scan(hose); -} -#endif /* CONFIG_PCI */ -- GitLab From 9ee06d286ae6bd9ae5c5edbfdc07bba71e2badff Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 20 Jun 2022 08:07:52 -0400 Subject: [PATCH 488/581] MPC837XERDB: Remove unused PCI defines These defines aren't referenced in code today, remove them. Signed-off-by: Tom Rini --- include/configs/MPC837XERDB.h | 24 ------------------------ 1 file changed, 24 deletions(-) diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index e8e0a1c6699..3e4d66874df 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -198,39 +198,15 @@ * General PCI * Addresses are mapped 1-1. */ -#define CONFIG_SYS_PCI_MEM_BASE 0x80000000 -#define CONFIG_SYS_PCI_MEM_PHYS CONFIG_SYS_PCI_MEM_BASE -#define CONFIG_SYS_PCI_MEM_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_PCI_MMIO_BASE 0x90000000 -#define CONFIG_SYS_PCI_MMIO_PHYS CONFIG_SYS_PCI_MMIO_BASE -#define CONFIG_SYS_PCI_MMIO_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_PCI_IO_BASE 0x00000000 -#define CONFIG_SYS_PCI_IO_PHYS 0xE0300000 -#define CONFIG_SYS_PCI_IO_SIZE 0x100000 /* 1M */ - -#define CONFIG_SYS_PCI_SLV_MEM_LOCAL CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_PCI_SLV_MEM_BUS 0x00000000 -#define CONFIG_SYS_PCI_SLV_MEM_SIZE 0x80000000 - -#define CONFIG_SYS_PCIE1_BASE 0xA0000000 #define CONFIG_SYS_PCIE1_CFG_BASE 0xA0000000 #define CONFIG_SYS_PCIE1_CFG_SIZE 0x08000000 -#define CONFIG_SYS_PCIE1_MEM_BASE 0xA8000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xA8000000 -#define CONFIG_SYS_PCIE1_MEM_SIZE 0x10000000 -#define CONFIG_SYS_PCIE1_IO_BASE 0x00000000 #define CONFIG_SYS_PCIE1_IO_PHYS 0xB8000000 -#define CONFIG_SYS_PCIE1_IO_SIZE 0x00800000 -#define CONFIG_SYS_PCIE2_BASE 0xC0000000 #define CONFIG_SYS_PCIE2_CFG_BASE 0xC0000000 #define CONFIG_SYS_PCIE2_CFG_SIZE 0x08000000 -#define CONFIG_SYS_PCIE2_MEM_BASE 0xC8000000 #define CONFIG_SYS_PCIE2_MEM_PHYS 0xC8000000 -#define CONFIG_SYS_PCIE2_MEM_SIZE 0x10000000 -#define CONFIG_SYS_PCIE2_IO_BASE 0x00000000 #define CONFIG_SYS_PCIE2_IO_PHYS 0xD8000000 -#define CONFIG_SYS_PCIE2_IO_SIZE 0x00800000 /* * TSEC -- GitLab From 31a8f5545eb8f2d2e1bdf0ccdb1d1b63a16c9008 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 20 Jun 2022 08:07:53 -0400 Subject: [PATCH 489/581] Convert CONFIG_SH7751_PCI to Kconfig This converts the following to Kconfig: CONFIG_SH7751_PCI Signed-off-by: Tom Rini --- configs/r2dplus_defconfig | 1 + drivers/pci/Kconfig | 6 ++++++ include/configs/r2dplus.h | 5 ----- 3 files changed, 7 insertions(+), 5 deletions(-) diff --git a/configs/r2dplus_defconfig b/configs/r2dplus_defconfig index 5a38b070437..2beda3a2fe0 100644 --- a/configs/r2dplus_defconfig +++ b/configs/r2dplus_defconfig @@ -52,6 +52,7 @@ CONFIG_PCNET=y CONFIG_RTL8139=y CONFIG_TULIP=y CONFIG_PCI=y +CONFIG_SH7751_PCI=y CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_DM_SERIAL=y CONFIG_SERIAL_RX_BUFFER=y diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index 53d0ebd745e..680d5baa802 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -171,6 +171,12 @@ config PCI_SANDBOX the device tree but the normal PCI scan technique is used to find then. +config SH7751_PCI + bool "SH7751 PCI controller support" + depends on SH + help + SuperH PCI Bridge Configuration + config PCI_TEGRA bool "Tegra PCI support" depends on ARCH_TEGRA diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index ae712629df3..409d5af0241 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -25,9 +25,4 @@ */ #define CONFIG_SYS_PLL_SETTLING_TIME 100/* in us */ -/* - * SuperH PCI Bridge Configration - */ -#define CONFIG_SH7751_PCI - #endif /* __CONFIG_H */ -- GitLab From 1bc8ef4d702345117d77c2e704d82102774148aa Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 20 Jun 2022 08:07:54 -0400 Subject: [PATCH 490/581] socrates: Rework CONFIG_PCI_CLK_FREQ The symbol CONFIG_PCI_CLK_FREQ is local to this board. Provide equal clarity in the code by referencing the numeric value directly and move the explanatory comment to the code, just prior to use. Signed-off-by: Tom Rini --- board/socrates/socrates.c | 3 ++- include/configs/socrates.h | 2 -- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c index 3430a1ed017..27aad4eaae3 100644 --- a/board/socrates/socrates.c +++ b/board/socrates/socrates.c @@ -59,7 +59,8 @@ int checkboard (void) f = get_board_sys_clk(); } else { src = "PCI_CLK"; - f = CONFIG_PCI_CLK_FREQ; + /* PCI is clocked by the external source at 33 MHz */ + f = 33000000; } printf ("PCI1: 32 bit, %d MHz (%s)\n", f/1000000, src); #else diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 14f7bb9f713..6a78cb1f264 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -123,8 +123,6 @@ * Memory space is mapped 1-1. */ -/* PCI is clocked by the external source at 33 MHz */ -#define CONFIG_PCI_CLK_FREQ 33000000 #define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 #define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE #define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000 /* 512M */ -- GitLab From 363397ae1a17ae58f1ef6664e775d3c16091af87 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 20 Jun 2022 08:07:55 -0400 Subject: [PATCH 491/581] Convert CONFIG_PCI_MSC01 to Kconfig This converts the following to Kconfig: CONFIG_PCI_MSC01 Signed-off-by: Tom Rini --- configs/malta64_defconfig | 1 + configs/malta64el_defconfig | 1 + configs/malta_defconfig | 1 + configs/maltael_defconfig | 1 + drivers/pci/Kconfig | 4 ++++ include/configs/malta.h | 2 -- 6 files changed, 8 insertions(+), 2 deletions(-) diff --git a/configs/malta64_defconfig b/configs/malta64_defconfig index a2d938c0dc7..be868907166 100644 --- a/configs/malta64_defconfig +++ b/configs/malta64_defconfig @@ -39,5 +39,6 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_PCNET=y CONFIG_PCI_GT64120=y +CONFIG_PCI_MSC01=y CONFIG_RTC_MC146818=y CONFIG_SYS_NS16550=y diff --git a/configs/malta64el_defconfig b/configs/malta64el_defconfig index 301652c4767..6eef89db924 100644 --- a/configs/malta64el_defconfig +++ b/configs/malta64el_defconfig @@ -41,5 +41,6 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_PCNET=y CONFIG_PCI_GT64120=y +CONFIG_PCI_MSC01=y CONFIG_RTC_MC146818=y CONFIG_SYS_NS16550=y diff --git a/configs/malta_defconfig b/configs/malta_defconfig index ae9cad857e2..88c0d5628de 100644 --- a/configs/malta_defconfig +++ b/configs/malta_defconfig @@ -38,5 +38,6 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_PCNET=y CONFIG_PCI_GT64120=y +CONFIG_PCI_MSC01=y CONFIG_RTC_MC146818=y CONFIG_SYS_NS16550=y diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig index 963b9be59ea..58d31d6a443 100644 --- a/configs/maltael_defconfig +++ b/configs/maltael_defconfig @@ -40,5 +40,6 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_PCNET=y CONFIG_PCI_GT64120=y +CONFIG_PCI_MSC01=y CONFIG_RTC_MC146818=y CONFIG_SYS_NS16550=y diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index 680d5baa802..e4c60561ee5 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -146,6 +146,10 @@ config PCI_MPC85XX Say Y here if you want to enable PCI controller support on FSL PowerPC MPC85xx SoC. +config PCI_MSC01 + bool "MSC01 PCI support" + depends on TARGET_MALTA + config PCI_RCAR_GEN2 bool "Renesas RCar Gen2 PCIe driver" depends on RCAR_32 diff --git a/include/configs/malta.h b/include/configs/malta.h index 75f38000f6b..affee006940 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -13,8 +13,6 @@ #define CONFIG_MEMSIZE_IN_BYTES -#define CONFIG_PCI_MSC01 - #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 /* -- GitLab From 6bb74fe19bc74da78d8018a0ba024e34522bda51 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 20 Jun 2022 08:07:56 -0400 Subject: [PATCH 492/581] Convert CONFIG_SYS_FSL_PCI_VER_3_X to Kconfig This converts the following to Kconfig: CONFIG_SYS_FSL_PCI_VER_3_X Signed-off-by: Tom Rini --- arch/powerpc/include/asm/config_mpc85xx.h | 2 -- drivers/pci/Kconfig | 4 ++++ 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index ce3a776c7e8..a43e6e5e538 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -195,7 +195,6 @@ #define CONFIG_SYS_FSL_SRIO_LIODN #define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY -#define CONFIG_SYS_FSL_PCI_VER_3_X #elif defined(CONFIG_ARCH_B4860) || defined(CONFIG_ARCH_B4420) #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ @@ -293,7 +292,6 @@ #define CONFIG_SYS_NUM_FMAN 1 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 4, 4, 4 } #define CONFIG_SYS_FSL_SRDS_1 -#define CONFIG_SYS_FSL_PCI_VER_3_X #if defined(CONFIG_ARCH_T2080) #define CONFIG_SYS_NUM_FM1_DTSEC 8 #define CONFIG_SYS_NUM_FM1_10GEC 4 diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index e4c60561ee5..436acca898e 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -133,8 +133,12 @@ config PCIE_DW_SIFIVE Say Y here if you want to enable PCIe controller support on FU740. +config SYS_FSL_PCI_VER_3_X + bool + config PCIE_FSL bool "FSL PowerPC PCIe support" + select SYS_FSL_PCI_VER_3_X if ARCH_T2080 || ARCH_T4240 help Say Y here if you want to enable PCIe controller support on FSL PowerPC MPC85xx, MPC86xx, B series, P series and T series SoCs. -- GitLab From 604c62f5114d8cfd2f8fc7488ff739b6d1011c93 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 20 Jun 2022 08:07:57 -0400 Subject: [PATCH 493/581] qemu-ppce500: Move CONFIG_SYS_PCI_MAP_{START, END} to board code These CONFIG options are only used on this board, in the board file itself. Remove these from the CONFIG namespace and define in the board file. Signed-off-by: Tom Rini --- board/emulation/qemu-ppce500/qemu-ppce500.c | 8 ++++++-- include/configs/qemu-ppce500.h | 4 ---- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/board/emulation/qemu-ppce500/qemu-ppce500.c b/board/emulation/qemu-ppce500/qemu-ppce500.c index 348fcf3bb09..99edaa3b421 100644 --- a/board/emulation/qemu-ppce500/qemu-ppce500.c +++ b/board/emulation/qemu-ppce500/qemu-ppce500.c @@ -32,6 +32,10 @@ DECLARE_GLOBAL_DATA_PTR; +/* Virtual address range for PCI region maps */ +#define SYS_PCI_MAP_START 0x80000000 +#define SYS_PCI_MAP_END 0xe0000000 + static void *get_fdt_virt(void) { if (gd->flags & GD_FLG_RELOC) @@ -101,7 +105,7 @@ static int pci_map_region(phys_addr_t paddr, phys_size_t size, ulong *pmap_addr) map_addr += size - 1; map_addr &= ~(size - 1); - if (map_addr + size >= CONFIG_SYS_PCI_MAP_END) + if (map_addr + size >= SYS_PCI_MAP_END) return -1; /* Map virtual memory for range */ @@ -137,7 +141,7 @@ int misc_init_r(void) pci_get_regions(dev, &io, &mem, &pre); /* Start MMIO and PIO range maps above RAM */ - map_addr = CONFIG_SYS_PCI_MAP_START; + map_addr = SYS_PCI_MAP_START; /* Map MMIO range */ ret = pci_map_region(mem->phys_start, mem->size, &map_addr); diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index 006593acfdd..451ae0e1e6d 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -25,10 +25,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR #endif -/* Virtual address range for PCI region maps */ -#define CONFIG_SYS_PCI_MAP_START 0x80000000 -#define CONFIG_SYS_PCI_MAP_END 0xe0000000 - /* Virtual address to a temporary map if we need it (max 128MB) */ #define CONFIG_SYS_TMPVIRT 0xe8000000 -- GitLab From 432243cee100e1d8f60399f0ae8f76cf7c83975f Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 20 Jun 2022 08:07:58 -0400 Subject: [PATCH 494/581] Convert CONFIG_KIRKWOOD_PCIE_INIT et al to Kconfig This converts the following to Kconfig: CONFIG_KIRKWOOD_EGIGA_INIT CONFIG_KIRKWOOD_PCIE_INIT CONFIG_KIRKWOOD_RGMII_PAD_1V8 CONFIG_KM_DISABLE_PCIE Signed-off-by: Tom Rini --- arch/arm/mach-kirkwood/Kconfig | 12 ++++++++++++ arch/arm/mach-kirkwood/include/mach/config.h | 3 --- configs/km_kirkwood_128m16_defconfig | 1 + configs/km_kirkwood_defconfig | 1 + configs/kmcoge5un_defconfig | 1 + include/configs/SBx81LIFKW.h | 4 ---- include/configs/SBx81LIFXCAT.h | 4 ---- include/configs/km_kirkwood.h | 7 ------- 8 files changed, 15 insertions(+), 18 deletions(-) diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig index ca2da003b65..98bb10c2dee 100644 --- a/arch/arm/mach-kirkwood/Kconfig +++ b/arch/arm/mach-kirkwood/Kconfig @@ -121,6 +121,18 @@ endchoice config SYS_SOC default "kirkwood" +config KIRKWOOD_RGMII_PAD_1V8 + bool "Configures the I/O voltage of the pads connected gigabit interface to 1.8V" + default y + +config KIRKWOOD_EGIGA_INIT + bool "Enable GbePort0/1 for kernel" + default y + +config KIRKWOOD_PCIE_INIT + bool "Enable PCIe Port0 for kernel" + default y + source "board/Marvell/openrd/Kconfig" source "board/Marvell/dreamplug/Kconfig" source "board/Synology/ds109/Kconfig" diff --git a/arch/arm/mach-kirkwood/include/mach/config.h b/arch/arm/mach-kirkwood/include/mach/config.h index ca341570544..90e86ab99b4 100644 --- a/arch/arm/mach-kirkwood/include/mach/config.h +++ b/arch/arm/mach-kirkwood/include/mach/config.h @@ -23,9 +23,6 @@ #endif /* CONFIG_KW88F6281 */ #include -#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ -#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ -#define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 for kernel */ #define CONFIG_I2C_MVTWSI_BASE0 KW_TWSI_BASE #define MV_UART_CONSOLE_BASE KW_UART0_BASE diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig index 1d8ae5876b9..655759b09ce 100644 --- a/configs/km_kirkwood_128m16_defconfig +++ b/configs/km_kirkwood_128m16_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_KWD_CONFIG="board/keymile/km_arm/kwbimage_128M16_1.cfg" CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_TARGET_KM_KIRKWOOD=y +# CONFIG_KIRKWOOD_PCIE_INIT is not set CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig index d2f2ff4e23e..65378d3cec1 100644 --- a/configs/km_kirkwood_defconfig +++ b/configs/km_kirkwood_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_KWD_CONFIG="board/keymile/km_arm/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_TARGET_KM_KIRKWOOD=y +# CONFIG_KIRKWOOD_PCIE_INIT is not set CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig index 9654b8d8060..8b54f9c7c84 100644 --- a/configs/kmcoge5un_defconfig +++ b/configs/kmcoge5un_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_KWD_CONFIG="board/keymile/km_arm/kwbimage_256M8_1.cfg" CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_TARGET_KM_KIRKWOOD=y +# CONFIG_KIRKWOOD_PCIE_INIT is not set CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x10000 diff --git a/include/configs/SBx81LIFKW.h b/include/configs/SBx81LIFKW.h index 8114373655f..e42e6d56532 100644 --- a/include/configs/SBx81LIFKW.h +++ b/include/configs/SBx81LIFKW.h @@ -9,10 +9,6 @@ /* additions for new ARM relocation support */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ -#define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 */ -#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ - /* * NS16550 Configuration */ diff --git a/include/configs/SBx81LIFXCAT.h b/include/configs/SBx81LIFXCAT.h index b70829c09d5..8926c26b0bd 100644 --- a/include/configs/SBx81LIFXCAT.h +++ b/include/configs/SBx81LIFXCAT.h @@ -9,10 +9,6 @@ /* additions for new ARM relocation support */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ -#define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 */ -#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ - /* * NS16550 Configuration */ diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h index e58a69501b3..01482d53199 100644 --- a/include/configs/km_kirkwood.h +++ b/include/configs/km_kirkwood.h @@ -23,7 +23,6 @@ /* KM_KIRKWOOD */ #if defined(CONFIG_KM_KIRKWOOD) #define CONFIG_HOSTNAME "km_kirkwood" -#define CONFIG_KM_DISABLE_PCIE /* KM_KIRKWOOD_PCI */ #elif defined(CONFIG_KM_KIRKWOOD_PCI) @@ -34,7 +33,6 @@ /* KM_KIRKWOOD_128M16 */ #elif defined(CONFIG_KM_KIRKWOOD_128M16) #define CONFIG_HOSTNAME "km_kirkwood_128m16" -#define CONFIG_KM_DISABLE_PCIE /* KM_NUSA */ #elif defined(CONFIG_KM_NUSA) @@ -44,7 +42,6 @@ /* KMCOGE5UN */ #elif defined(CONFIG_KM_COGE5UN) #define CONFIG_HOSTNAME "kmcoge5un" -#define CONFIG_KM_DISABLE_PCIE /* KM_SUSE2 */ #elif defined(CONFIG_KM_SUSE2) @@ -118,8 +115,4 @@ MVGBE_SET_MII_SPEED_TO_100) #endif -#ifdef CONFIG_KM_DISABLE_PCIE -#undef CONFIG_KIRKWOOD_PCIE_INIT -#endif - #endif /* _CONFIG_KM_KIRKWOOD */ -- GitLab From 6dd18a6568a7272c86f12aec6f657b13fa52a226 Mon Sep 17 00:00:00 2001 From: Vaishnav Achath Date: Fri, 3 Jun 2022 11:32:15 +0530 Subject: [PATCH 495/581] common: spl: spl_spi: add support for dynamic override of sf bus Currently the SPI flash to load from is defined through the compile time config CONFIG_SF_DEFAULT_BUS and CONFIG_SF_DEFAULT_CS, this prevents the loading of binaries from different SPI flash using the same build.E.g. supporting QSPI flash boot and OSPI flash boot on J721E platform is not possible due to this limitation. This commit adds lookup functions spl_spi_boot_bus() and spl_spi_boot_cs for identifying the flash device based on the selected boot device, when not overridden the lookup functions are weakly defined in common/spl/spl_spi.c. Signed-off-by: Vaishnav Achath Reviewed-by: Heiko Schocher --- common/spl/spl_spi.c | 16 +++++++++++++--- include/spl.h | 16 ++++++++++++++++ 2 files changed, 29 insertions(+), 3 deletions(-) diff --git a/common/spl/spl_spi.c b/common/spl/spl_spi.c index cf3f7ef4c0d..3eef2f8d683 100644 --- a/common/spl/spl_spi.c +++ b/common/spl/spl_spi.c @@ -71,6 +71,16 @@ unsigned int __weak spl_spi_get_uboot_offs(struct spi_flash *flash) return CONFIG_SYS_SPI_U_BOOT_OFFS; } +u32 __weak spl_spi_boot_bus(void) +{ + return CONFIG_SF_DEFAULT_BUS; +} + +u32 __weak spl_spi_boot_cs(void) +{ + return CONFIG_SF_DEFAULT_CS; +} + /* * The main entry for SPI booting. It's necessary that SDRAM is already * configured and available since this code loads the main U-Boot image @@ -83,15 +93,15 @@ static int spl_spi_load_image(struct spl_image_info *spl_image, unsigned int payload_offs; struct spi_flash *flash; struct image_header *header; + unsigned int sf_bus = spl_spi_boot_bus(); + unsigned int sf_cs = spl_spi_boot_cs(); /* * Load U-Boot image from SPI flash into RAM * In DM mode: defaults speed and mode will be * taken from DT when available */ - - flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS, - CONFIG_SF_DEFAULT_CS, + flash = spi_flash_probe(sf_bus, sf_cs, CONFIG_SF_DEFAULT_SPEED, CONFIG_SF_DEFAULT_MODE); if (!flash) { diff --git a/include/spl.h b/include/spl.h index 83ac583e0b4..cc78bc3e318 100644 --- a/include/spl.h +++ b/include/spl.h @@ -377,6 +377,22 @@ int spl_load_imx_container(struct spl_image_info *spl_image, void preloader_console_init(void); u32 spl_boot_device(void); +/** + * spl_spi_boot_bus() - Lookup function for the SPI boot bus source. + * + * This function returns the SF bus to load from. + * If not overridden, it is weakly defined in common/spl/spl_spi.c. + */ +u32 spl_spi_boot_bus(void); + +/** + * spl_spi_boot_cs() - Lookup function for the SPI boot CS source. + * + * This function returns the SF CS to load from. + * If not overridden, it is weakly defined in common/spl/spl_spi.c. + */ +u32 spl_spi_boot_cs(void); + /** * spl_mmc_boot_mode() - Lookup function for the mode of an MMC boot source. * @boot_device: ID of the device which the MMC driver wants to read -- GitLab From c16b4f14a3f8e8d3d9635caae74cf87a290c53e7 Mon Sep 17 00:00:00 2001 From: Vaishnav Achath Date: Fri, 3 Jun 2022 11:32:16 +0530 Subject: [PATCH 496/581] arm: k3: j721e: add dynamic sf bus override support for j721e implement overrides for spl_spi_boot_bus() and spl_spi_boot_cs() lookup functions according to bootmode selection, so as to support both QSPI and OSPI boot using the same build. Signed-off-by: Vaishnav Achath Reviewed-by: Pratyush Yadav --- arch/arm/mach-k3/j721e_init.c | 11 +++++++++++ arch/arm/mach-k3/sysfw-loader.c | 4 ++-- 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c index f503f15f192..e56ca6d0f5f 100644 --- a/arch/arm/mach-k3/j721e_init.c +++ b/arch/arm/mach-k3/j721e_init.c @@ -355,6 +355,17 @@ static u32 __get_primary_bootmedia(u32 main_devstat, u32 wkup_devstat) return bootmode; } +u32 spl_spi_boot_bus(void) +{ + u32 wkup_devstat = readl(CTRLMMR_WKUP_DEVSTAT); + u32 main_devstat = readl(CTRLMMR_MAIN_DEVSTAT); + u32 bootmode = ((wkup_devstat & WKUP_DEVSTAT_PRIMARY_BOOTMODE_MASK) >> + WKUP_DEVSTAT_PRIMARY_BOOTMODE_SHIFT) | + ((main_devstat & MAIN_DEVSTAT_BOOT_MODE_B_MASK) << BOOT_MODE_B_SHIFT); + + return (bootmode == BOOT_DEVICE_QSPI) ? 1 : 0; +} + u32 spl_boot_device(void) { u32 wkup_devstat = readl(CTRLMMR_WKUP_DEVSTAT); diff --git a/arch/arm/mach-k3/sysfw-loader.c b/arch/arm/mach-k3/sysfw-loader.c index 988e7586292..b3beeca9472 100644 --- a/arch/arm/mach-k3/sysfw-loader.c +++ b/arch/arm/mach-k3/sysfw-loader.c @@ -324,9 +324,9 @@ static void *k3_sysfw_get_spi_addr(void) struct udevice *dev; fdt_addr_t addr; int ret; + unsigned int sf_bus = spl_spi_boot_bus(); - ret = uclass_find_device_by_seq(UCLASS_SPI, CONFIG_SF_DEFAULT_BUS, - &dev); + ret = uclass_find_device_by_seq(UCLASS_SPI, sf_bus, &dev); if (ret) return NULL; -- GitLab From e0392596e90488247d4d850168717b6b9f2b90da Mon Sep 17 00:00:00 2001 From: Aswath Govindraju Date: Fri, 10 Jun 2022 18:23:38 +0530 Subject: [PATCH 497/581] board: ti: j721e: Return if there is an error while configuring SerDes While configuring SerDes, errors could be encountered, in these cases, return instead of going ahead. This is will help in booting even if configuration of SerDes fails. Signed-off-by: Aswath Govindraju --- board/ti/j721e/evm.c | 32 ++++++++++++++++++++++---------- 1 file changed, 22 insertions(+), 10 deletions(-) diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c index 105461e1db6..5d090048ceb 100644 --- a/board/ti/j721e/evm.c +++ b/board/ti/j721e/evm.c @@ -382,19 +382,25 @@ void configure_serdes_torrent(void) ret = uclass_get_device_by_driver(UCLASS_PHY, DM_DRIVER_GET(torrent_phy_provider), &dev); - if (ret) + if (ret) { printf("Torrent init failed:%d\n", ret); + return; + } serdes.dev = dev; serdes.id = 0; ret = generic_phy_init(&serdes); - if (ret) - printf("phy_init failed!!\n"); + if (ret) { + printf("phy_init failed!!: %d\n", ret); + return; + } ret = generic_phy_power_on(&serdes); - if (ret) - printf("phy_power_on failed !!\n"); + if (ret) { + printf("phy_power_on failed!!: %d\n", ret); + return; + } } void configure_serdes_sierra(void) @@ -410,21 +416,27 @@ void configure_serdes_sierra(void) ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(sierra_phy_provider), &dev); - if (ret) + if (ret) { printf("Sierra init failed:%d\n", ret); + return; + } count = device_get_child_count(dev); for (i = 0; i < count; i++) { ret = device_get_child(dev, i, &link_dev); - if (ret) - printf("probe of sierra child node %d failed\n", i); + if (ret) { + printf("probe of sierra child node %d failed: %d\n", i, ret); + return; + } if (link_dev->driver->id == UCLASS_PHY) { link.dev = link_dev; link.id = link_count++; ret = generic_phy_power_on(&link); - if (ret) - printf("phy_power_on failed !!\n"); + if (ret) { + printf("phy_power_on failed!!: %d\n", ret); + return; + } } } } -- GitLab From 39ff0624bc5ad287fced0f60be9b977d07b1813a Mon Sep 17 00:00:00 2001 From: Philippe Schenker Date: Mon, 13 Jun 2022 19:35:21 +0200 Subject: [PATCH 498/581] toradex: tdx-cfg-block: use only snprintf Prevent memory issues that could appear with sprintf. Replace all sprintf occurences with snprintf. Signed-off-by: Philippe Schenker Reviewed-by: Francesco Dolcini Acked-by: Marcel Ziswiler --- board/toradex/common/tdx-common.c | 27 +++++++++++++++------------ 1 file changed, 15 insertions(+), 12 deletions(-) diff --git a/board/toradex/common/tdx-common.c b/board/toradex/common/tdx-common.c index 9db4553e0f7..2207818447a 100644 --- a/board/toradex/common/tdx-common.c +++ b/board/toradex/common/tdx-common.c @@ -89,11 +89,13 @@ int show_board_info(void) tdx_eth_addr.nic = htonl(tdx_serial << 8); checkboard(); } else { - sprintf(tdx_serial_str, "%08u", tdx_serial); - sprintf(tdx_board_rev_str, "V%1d.%1d%c", - tdx_hw_tag.ver_major, - tdx_hw_tag.ver_minor, - (char)tdx_hw_tag.ver_assembly + 'A'); + snprintf(tdx_serial_str, sizeof(tdx_serial_str), + "%08u", tdx_serial); + snprintf(tdx_board_rev_str, sizeof(tdx_board_rev_str), + "V%1d.%1d%c", + tdx_hw_tag.ver_major, + tdx_hw_tag.ver_minor, + (char)tdx_hw_tag.ver_assembly + 'A'); env_set("serial#", tdx_serial_str); @@ -109,12 +111,13 @@ int show_board_info(void) tdx_carrier_board_name = (char *) toradex_carrier_boards[tdx_car_hw_tag.prodid]; - sprintf(tdx_car_serial_str, "%08u", tdx_car_serial); - sprintf(tdx_car_rev_str, "V%1d.%1d%c", - tdx_car_hw_tag.ver_major, - tdx_car_hw_tag.ver_minor, - (char)tdx_car_hw_tag.ver_assembly + - 'A'); + snprintf(tdx_car_serial_str, sizeof(tdx_car_serial_str), + "%08u", tdx_car_serial); + snprintf(tdx_car_rev_str, sizeof(tdx_car_rev_str), + "V%1d.%1d%c", + tdx_car_hw_tag.ver_major, + tdx_car_hw_tag.ver_minor, + (char)tdx_car_hw_tag.ver_assembly + 'A'); env_set("carrier_serial#", tdx_car_serial_str); printf("Carrier: Toradex %s %s, Serial# %s\n", @@ -170,7 +173,7 @@ int ft_common_board_setup(void *blob, struct bd_info *bd) if (tdx_hw_tag.ver_major) { char prod_id[5]; - sprintf(prod_id, "%04u", tdx_hw_tag.prodid); + snprintf(prod_id, sizeof(prod_id), "%04u", tdx_hw_tag.prodid); fdt_setprop(blob, 0, "toradex,product-id", prod_id, 5); fdt_setprop(blob, 0, "toradex,board-rev", tdx_board_rev_str, -- GitLab From 494ef10c3bf7859e7d21d9e1d608dc0b634451c2 Mon Sep 17 00:00:00 2001 From: Philippe Schenker Date: Mon, 13 Jun 2022 19:35:22 +0200 Subject: [PATCH 499/581] toradex: tdx-cfg-block: use defines for string length With those defines the length can be reused and is in one place extendable. Signed-off-by: Philippe Schenker Reviewed-by: Francesco Dolcini Acked-by: Marcel Ziswiler --- board/toradex/common/tdx-common.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/board/toradex/common/tdx-common.c b/board/toradex/common/tdx-common.c index 2207818447a..94e603c14f4 100644 --- a/board/toradex/common/tdx-common.c +++ b/board/toradex/common/tdx-common.c @@ -22,13 +22,17 @@ #define TORADEX_OUI 0x00142dUL +#define SERIAL_STR_LEN 8 +#define MODULE_VER_STR_LEN 4 // V1.1 +#define MODULE_REV_STR_LEN 1 // [A-Z] + #ifdef CONFIG_TDX_CFG_BLOCK -static char tdx_serial_str[9]; -static char tdx_board_rev_str[6]; +static char tdx_serial_str[SERIAL_STR_LEN + 1]; +static char tdx_board_rev_str[MODULE_VER_STR_LEN + MODULE_REV_STR_LEN + 1]; #ifdef CONFIG_TDX_CFG_BLOCK_EXTRA -static char tdx_car_serial_str[9]; -static char tdx_car_rev_str[6]; +static char tdx_car_serial_str[SERIAL_STR_LEN + 1]; +static char tdx_car_rev_str[MODULE_VER_STR_LEN + MODULE_REV_STR_LEN + 1]; static char *tdx_carrier_board_name; #endif -- GitLab From 7e27ce16c5d289e5b9712a179e798ea4eb831816 Mon Sep 17 00:00:00 2001 From: Philippe Schenker Date: Mon, 13 Jun 2022 19:35:23 +0200 Subject: [PATCH 500/581] toradex: tdx-cfg-block: extend assembly version There are two decimal digits reserved to encode the module version and revision. This code so far implemented A-Z which used 0-25 of this range. This commit extends the range to make use of all 99 numbers. After capital letters the form with a hashtag and number (e.g. #26) is used. Examples: If the assembly version is between zero and 25 the numbering is as follows, as it also has been before this commit: 0: V0.0A 1: V0.0B ... 25: V0.0Z New numbering of assembly version: If the number is between 26 and 99 the new assembly version name is: 26: V0.0#26 27: V0.0#27 ... 99: V0.0#99 Signed-off-by: Philippe Schenker Reviewed-by: Francesco Dolcini Acked-by: Marcel Ziswiler --- board/toradex/common/tdx-cfg-block.c | 32 ++++++++++++++++++++++++---- board/toradex/common/tdx-common.c | 25 +++++++++++++++++----- 2 files changed, 48 insertions(+), 9 deletions(-) diff --git a/board/toradex/common/tdx-cfg-block.c b/board/toradex/common/tdx-cfg-block.c index 6c8cf4592d1..678d4e07c21 100644 --- a/board/toradex/common/tdx-cfg-block.c +++ b/board/toradex/common/tdx-cfg-block.c @@ -354,6 +354,18 @@ out: return ret; } +static int parse_assembly_string(char *string_to_parse, u16 *assembly) +{ + if (string_to_parse[3] >= 'A' && string_to_parse[3] <= 'Z') + *assembly = string_to_parse[3] - 'A'; + else if (string_to_parse[3] == '#') + *assembly = dectoul(&string_to_parse[4], NULL); + else + return -EINVAL; + + return 0; +} + static int get_cfgblock_interactive(void) { char message[CONFIG_SYS_CBSIZE]; @@ -362,6 +374,7 @@ static int get_cfgblock_interactive(void) char wb = 'n'; char mem8g = 'n'; int len = 0; + int ret = 0; /* Unknown module by default */ tdx_hw_tag.prodid = 0; @@ -545,13 +558,18 @@ static int get_cfgblock_interactive(void) } while (len < 4) { - sprintf(message, "Enter the module version (e.g. V1.1B): V"); + sprintf(message, "Enter the module version (e.g. V1.1B or V1.1#26): V"); len = cli_readline(message); } tdx_hw_tag.ver_major = console_buffer[0] - '0'; tdx_hw_tag.ver_minor = console_buffer[2] - '0'; - tdx_hw_tag.ver_assembly = console_buffer[3] - 'A'; + + ret = parse_assembly_string(console_buffer, &tdx_hw_tag.ver_assembly); + if (ret) { + printf("Parsing module version failed\n"); + return ret; + } while (len < 8) { sprintf(message, "Enter module serial number: "); @@ -754,6 +772,7 @@ static int get_cfgblock_carrier_interactive(void) { char message[CONFIG_SYS_CBSIZE]; int len; + int ret = 0; printf("Supported carrier boards:\n"); printf("CARRIER BOARD NAME\t\t [ID]\n"); @@ -767,13 +786,18 @@ static int get_cfgblock_carrier_interactive(void) tdx_car_hw_tag.prodid = dectoul(console_buffer, NULL); do { - sprintf(message, "Enter carrier board version (e.g. V1.1B): V"); + sprintf(message, "Enter carrier board version (e.g. V1.1B or V1.1#26): V"); len = cli_readline(message); } while (len < 4); tdx_car_hw_tag.ver_major = console_buffer[0] - '0'; tdx_car_hw_tag.ver_minor = console_buffer[2] - '0'; - tdx_car_hw_tag.ver_assembly = console_buffer[3] - 'A'; + + ret = parse_assembly_string(console_buffer, &tdx_car_hw_tag.ver_assembly); + if (ret) { + printf("Parsing module version failed\n"); + return ret; + } while (len < 8) { sprintf(message, "Enter carrier board serial number: "); diff --git a/board/toradex/common/tdx-common.c b/board/toradex/common/tdx-common.c index 94e603c14f4..5ad5d00a0d9 100644 --- a/board/toradex/common/tdx-common.c +++ b/board/toradex/common/tdx-common.c @@ -24,7 +24,7 @@ #define SERIAL_STR_LEN 8 #define MODULE_VER_STR_LEN 4 // V1.1 -#define MODULE_REV_STR_LEN 1 // [A-Z] +#define MODULE_REV_STR_LEN 3 // [A-Z] or #[26-99] #ifdef CONFIG_TDX_CFG_BLOCK static char tdx_serial_str[SERIAL_STR_LEN + 1]; @@ -83,6 +83,21 @@ void get_board_serial(struct tag_serialnr *serialnr) } #endif /* CONFIG_SERIAL_TAG */ +static const char *get_board_assembly(u16 ver_assembly) +{ + static char ver_name[MODULE_REV_STR_LEN + 1]; + + if (ver_assembly < 26) { + ver_name[0] = (char)ver_assembly + 'A'; + ver_name[1] = '\0'; + } else { + snprintf(ver_name, sizeof(ver_name), + "#%u", ver_assembly); + } + + return ver_name; +} + int show_board_info(void) { unsigned char ethaddr[6]; @@ -96,10 +111,10 @@ int show_board_info(void) snprintf(tdx_serial_str, sizeof(tdx_serial_str), "%08u", tdx_serial); snprintf(tdx_board_rev_str, sizeof(tdx_board_rev_str), - "V%1d.%1d%c", + "V%1d.%1d%s", tdx_hw_tag.ver_major, tdx_hw_tag.ver_minor, - (char)tdx_hw_tag.ver_assembly + 'A'); + get_board_assembly(tdx_hw_tag.ver_assembly)); env_set("serial#", tdx_serial_str); @@ -118,10 +133,10 @@ int show_board_info(void) snprintf(tdx_car_serial_str, sizeof(tdx_car_serial_str), "%08u", tdx_car_serial); snprintf(tdx_car_rev_str, sizeof(tdx_car_rev_str), - "V%1d.%1d%c", + "V%1d.%1d%s", tdx_car_hw_tag.ver_major, tdx_car_hw_tag.ver_minor, - (char)tdx_car_hw_tag.ver_assembly + 'A'); + get_board_assembly(tdx_car_hw_tag.ver_assembly)); env_set("carrier_serial#", tdx_car_serial_str); printf("Carrier: Toradex %s %s, Serial# %s\n", -- GitLab From a04bbb83b4f7d097c28b1ba4a34be950c6fa3fe2 Mon Sep 17 00:00:00 2001 From: Georgi Vlaev Date: Tue, 14 Jun 2022 17:45:30 +0300 Subject: [PATCH 501/581] arm: mach-k3: common: Use ddr_init in spl_enable_dcache The spl_enable_dcache() function calls dram_init_banksize() to get the total memory size. Normally the dram_init_banksize() setups the memory banks, while the total size is reported by ddr_init(). This worked so far for K3 since we set the gd->ram_size in dram_init_banksize() as well. Signed-off-by: Georgi Vlaev Reviewed-by: Tom Rini --- arch/arm/mach-k3/common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c index b4b75f4e6c8..70f6444e798 100644 --- a/arch/arm/mach-k3/common.c +++ b/arch/arm/mach-k3/common.c @@ -516,7 +516,7 @@ void spl_enable_dcache(void) #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) phys_addr_t ram_top = CONFIG_SYS_SDRAM_BASE; - dram_init_banksize(); + dram_init(); /* reserve TLB table */ gd->arch.tlb_size = PGTABLE_SIZE; -- GitLab From 362b0d2e6eb2fbea8d000f40243e8014d1b4645a Mon Sep 17 00:00:00 2001 From: Georgi Vlaev Date: Tue, 14 Jun 2022 17:45:31 +0300 Subject: [PATCH 502/581] arm: dts: k3-am625-*: Mark memory with u-boot,dm-spl Mark the memory node with u-boot,dm-spl so we can use it from early SPL on both R5 and A53. Signed-off-by: Georgi Vlaev Reviewed-by: Tom Rini --- arch/arm/dts/k3-am625-r5-sk.dts | 1 + arch/arm/dts/k3-am625-sk-u-boot.dtsi | 4 ++++ 2 files changed, 5 insertions(+) diff --git a/arch/arm/dts/k3-am625-r5-sk.dts b/arch/arm/dts/k3-am625-r5-sk.dts index 2691af40a14..5aab858edd1 100644 --- a/arch/arm/dts/k3-am625-r5-sk.dts +++ b/arch/arm/dts/k3-am625-r5-sk.dts @@ -28,6 +28,7 @@ /* 2G RAM */ reg = <0x00000000 0x80000000 0x00000000 0x80000000>; + u-boot,dm-spl; }; reserved-memory { diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi b/arch/arm/dts/k3-am625-sk-u-boot.dtsi index e1971ecdfed..159fa36bbe9 100644 --- a/arch/arm/dts/k3-am625-sk-u-boot.dtsi +++ b/arch/arm/dts/k3-am625-sk-u-boot.dtsi @@ -13,6 +13,10 @@ aliases { mmc1 = &sdhci1; }; + + memory@80000000 { + u-boot,dm-spl; + }; }; &cbass_main{ -- GitLab From 249e9f3d1966e55a2f3cf56e5b9700990bd72cef Mon Sep 17 00:00:00 2001 From: Georgi Vlaev Date: Tue, 14 Jun 2022 17:45:32 +0300 Subject: [PATCH 503/581] board: ti: am62x: Use fdt functions for ram and bank init Use the appropriate fdtdec_setup_mem_size_base() call in dram_init() and fdtdec_setup_bank_size() in dram_bank_init() to pull these values from DT, where they are already available, instead of hardcoding them. Signed-off-by: Georgi Vlaev Reviewed-by: Tom Rini --- board/ti/am62x/evm.c | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/board/ti/am62x/evm.c b/board/ti/am62x/evm.c index 4dd5e64299b..fb5106d1f3c 100644 --- a/board/ti/am62x/evm.c +++ b/board/ti/am62x/evm.c @@ -23,17 +23,10 @@ int board_init(void) int dram_init(void) { - gd->ram_size = 0x80000000; - - return 0; + return fdtdec_setup_mem_size_base(); } int dram_init_banksize(void) { - /* Bank 0 declares the memory available in the DDR low region */ - gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_dram[0].size = 0x80000000; - gd->ram_size = 0x80000000; - - return 0; + return fdtdec_setup_memory_banksize(); } -- GitLab From 4c092bb306b0443a7386fef8d7c20cf3aa52f54c Mon Sep 17 00:00:00 2001 From: Georgi Vlaev Date: Tue, 14 Jun 2022 17:45:33 +0300 Subject: [PATCH 504/581] board: ti: am62x: Account for DDR size fixups if ECC is enabled Call into k3-ddrss driver to fixup device tree and resize the available amount of DDR if ECC is enabled. A second fixup is required from A53 SPL to take the fixup as done from R5 SPL and apply it to DT passed to A53 U-boot, which in turn passes this to the OS. Signed-off-by: Georgi Vlaev Reviewed-by: Tom Rini --- board/ti/am62x/evm.c | 53 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/board/ti/am62x/evm.c b/board/ti/am62x/evm.c index fb5106d1f3c..d65ee1d6960 100644 --- a/board/ti/am62x/evm.c +++ b/board/ti/am62x/evm.c @@ -9,6 +9,8 @@ #include #include +#include +#include #include #include #include @@ -30,3 +32,54 @@ int dram_init_banksize(void) { return fdtdec_setup_memory_banksize(); } + +#if defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_K3_AM64_DDRSS) +static void fixup_ddr_driver_for_ecc(struct spl_image_info *spl_image) +{ + struct udevice *dev; + int ret; + + dram_init_banksize(); + + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) + panic("Cannot get RAM device for ddr size fixup: %d\n", ret); + + ret = k3_ddrss_ddr_fdt_fixup(dev, spl_image->fdt_addr, gd->bd); + if (ret) + printf("Error fixing up ddr node for ECC use! %d\n", ret); +} +#else +static void fixup_memory_node(struct spl_image_info *spl_image) +{ + u64 start[CONFIG_NR_DRAM_BANKS]; + u64 size[CONFIG_NR_DRAM_BANKS]; + int bank; + int ret; + + dram_init(); + dram_init_banksize(); + + for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { + start[bank] = gd->bd->bi_dram[bank].start; + size[bank] = gd->bd->bi_dram[bank].size; + } + + /* dram_init functions use SPL fdt, and we must fixup u-boot fdt */ + ret = fdt_fixup_memory_banks(spl_image->fdt_addr, start, size, + CONFIG_NR_DRAM_BANKS); + if (ret) + printf("Error fixing up memory node! %d\n", ret); +} +#endif + +void spl_perform_fixups(struct spl_image_info *spl_image) +{ +#if defined(CONFIG_K3_AM64_DDRSS) + fixup_ddr_driver_for_ecc(spl_image); +#else + fixup_memory_node(spl_image); +#endif +} +#endif -- GitLab From 6ea5bcc4a6a7a594754e7c82fc0e19da5746df2d Mon Sep 17 00:00:00 2001 From: Georgi Vlaev Date: Tue, 14 Jun 2022 17:45:34 +0300 Subject: [PATCH 505/581] configs: am62x_evm_r5: Add CONFIG_NR_DRAM_BANKS as done in a53 defconfig Add CONFIG_NR_DRAM_BANKS from am62x_evm_a53_defconfig as this is needed to calculate the size of DDR that is available. Signed-off-by: Georgi Vlaev Reviewed-by: Tom Rini --- configs/am62x_evm_r5_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/am62x_evm_r5_defconfig b/configs/am62x_evm_r5_defconfig index 2e340cd6f41..deafb92fc14 100644 --- a/configs/am62x_evm_r5_defconfig +++ b/configs/am62x_evm_r5_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_K3=y CONFIG_SYS_MALLOC_F_LEN=0x9000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM625=y CONFIG_TARGET_AM625_R5_EVM=y CONFIG_DM_GPIO=y -- GitLab From e4b4501edede200df526dd06af0fdbecf836f2ef Mon Sep 17 00:00:00 2001 From: Vignesh Raghavendra Date: Wed, 15 Jun 2022 19:33:05 +0530 Subject: [PATCH 506/581] firmware: ti_sci_static_data: Make file board agnostic Static DMA channel data for R5 SPL is mostly board agnostic so use SOC configs instead of EVM specific config to ease adding new board support. Drop J7200 EVM specific settings as its same as J721e Signed-off-by: Vignesh Raghavendra Reviewed-by: Nishanth Menon --- drivers/firmware/ti_sci_static_data.h | 42 +++------------------------ 1 file changed, 4 insertions(+), 38 deletions(-) diff --git a/drivers/firmware/ti_sci_static_data.h b/drivers/firmware/ti_sci_static_data.h index 8529ef29007..5ae0556a9a4 100644 --- a/drivers/firmware/ti_sci_static_data.h +++ b/drivers/firmware/ti_sci_static_data.h @@ -16,7 +16,7 @@ struct ti_sci_resource_static_data { #if IS_ENABLED(CONFIG_K3_DM_FW) -#if IS_ENABLED(CONFIG_TARGET_J721E_R5_EVM) +#if IS_ENABLED(CONFIG_SOC_K3_J721E) static struct ti_sci_resource_static_data rm_static_data[] = { /* Free rings */ { @@ -48,43 +48,9 @@ static struct ti_sci_resource_static_data rm_static_data[] = { }, { }, }; -#endif /* CONFIG_TARGET_J721E_R5_EVM */ +#endif /* CONFIG_SOC_K3_J721E */ -#if IS_ENABLED(CONFIG_TARGET_J7200_R5_EVM) -static struct ti_sci_resource_static_data rm_static_data[] = { - /* Free rings */ - { - .dev_id = 235, - .subtype = 1, - .range_start = 124, - .range_num = 32, - }, - /* TX channels */ - { - .dev_id = 236, - .subtype = 13, - .range_start = 6, - .range_num = 2, - }, - /* RX channels */ - { - .dev_id = 236, - .subtype = 10, - .range_start = 6, - .range_num = 2, - }, - /* RX Free flows */ - { - .dev_id = 236, - .subtype = 0, - .range_start = 60, - .range_num = 8, - }, - { }, -}; -#endif /* CONFIG_TARGET_J7200_R5_EVM */ - -#if IS_ENABLED(CONFIG_TARGET_J721S2_R5_EVM) +#if IS_ENABLED(CONFIG_SOC_K3_J721S2) static struct ti_sci_resource_static_data rm_static_data[] = { /* Free rings */ { @@ -116,7 +82,7 @@ static struct ti_sci_resource_static_data rm_static_data[] = { }, { }, }; -#endif /* CONFIG_TARGET_J721S2_R5_EVM */ +#endif /* CONFIG_SOC_K3_J721S2 */ #if IS_ENABLED(CONFIG_SOC_K3_AM625) static struct ti_sci_resource_static_data rm_static_data[] = { -- GitLab From 8b5218e7cb9ff4223f2825c04e45dabccbd15a48 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Fri, 17 Jun 2022 13:26:10 -0500 Subject: [PATCH 507/581] board: ti: common: Optimize boot when detecting consecutive bad records The eeprom data area is much bigger than the data we intend to store, however, with bad programming, we might end up reading bad records over and over till we run out of eeprom space. instead just exit when 10 consecutive records are read. Signed-off-by: Nishanth Menon Reviewed-by: Tom Rini --- board/ti/common/board_detect.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/board/ti/common/board_detect.c b/board/ti/common/board_detect.c index de92eb0981f..381cddc00ad 100644 --- a/board/ti/common/board_detect.c +++ b/board/ti/common/board_detect.c @@ -434,6 +434,7 @@ int __maybe_unused ti_i2c_eeprom_am6_get(int bus_addr, int dev_addr, struct ti_am6_eeprom_record_board_id board_id; struct ti_am6_eeprom_record record; int rc; + int consecutive_bad_records = 0; /* Initialize with a known bad marker for i2c fails.. */ memset(ep, 0, sizeof(*ep)); @@ -470,7 +471,7 @@ int __maybe_unused ti_i2c_eeprom_am6_get(int bus_addr, int dev_addr, */ eeprom_addr = sizeof(board_id); - while (true) { + while (consecutive_bad_records < 10) { rc = dm_i2c_read(dev, eeprom_addr, (uint8_t *)&record.header, sizeof(record.header)); if (rc) @@ -506,6 +507,7 @@ int __maybe_unused ti_i2c_eeprom_am6_get(int bus_addr, int dev_addr, pr_err("%s: EEPROM parsing error!\n", __func__); return rc; } + consecutive_bad_records = 0; } else { /* * We may get here in case of larger records which @@ -513,6 +515,7 @@ int __maybe_unused ti_i2c_eeprom_am6_get(int bus_addr, int dev_addr, */ pr_err("%s: Ignoring record id %u\n", __func__, record.header.id); + consecutive_bad_records++; } eeprom_addr += record.header.len; -- GitLab From bc1de483711c30e32dffdf71574aa878c1087ed0 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Fri, 17 Jun 2022 13:26:11 -0500 Subject: [PATCH 508/581] board: ti: common: Handle the legacy eeprom address width properly Due to supply chain issues, we are starting to see a mixture of eeprom usage including the smaller 7-bit addressing eeproms such as 24c04 used for eeproms. These eeproms don't respond well to 2 byte addressing and fail the read operation. We do have a check to ensure that we are reading the alternate addressing size, however the valid failure prevents us from checking at 1 byte anymore. Rectify the same by falling through and depend on header data comparison to ensure that we have valid data. Signed-off-by: Nishanth Menon Reviewed-by: Tom Rini --- board/ti/common/board_detect.c | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/board/ti/common/board_detect.c b/board/ti/common/board_detect.c index 381cddc00ad..0806dea11ed 100644 --- a/board/ti/common/board_detect.c +++ b/board/ti/common/board_detect.c @@ -86,7 +86,7 @@ __weak void gpi2c_init(void) static int __maybe_unused ti_i2c_eeprom_get(int bus_addr, int dev_addr, u32 header, u32 size, uint8_t *ep) { - u32 hdr_read; + u32 hdr_read = 0xdeadbeef; int rc; #if CONFIG_IS_ENABLED(DM_I2C) @@ -107,9 +107,13 @@ static int __maybe_unused ti_i2c_eeprom_get(int bus_addr, int dev_addr, if (rc) return rc; - rc = dm_i2c_read(dev, 0, (uint8_t *)&hdr_read, 4); - if (rc) - return rc; + /* + * Skip checking result here since this could be a valid i2c read fail + * on some boards that use 1 byte addressing. + * We must allow for fall through to check the data if 1 byte + * addressing works + */ + (void)dm_i2c_read(dev, 0, (uint8_t *)&hdr_read, 4); /* Corrupted data??? */ if (hdr_read != header) { @@ -144,9 +148,13 @@ static int __maybe_unused ti_i2c_eeprom_get(int bus_addr, int dev_addr, */ byte = 2; - rc = i2c_read(dev_addr, 0x0, byte, (uint8_t *)&hdr_read, 4); - if (rc) - return rc; + /* + * Skip checking result here since this could be a valid i2c read fail + * on some boards that use 1 byte addressing. + * We must allow for fall through to check the data if 1 byte + * addressing works + */ + (void)i2c_read(dev_addr, 0x0, byte, (uint8_t *)&hdr_read, 4); /* Corrupted data??? */ if (hdr_read != header) { -- GitLab From a58147c2dbbfbc436ba84463678e943146bcae7d Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Fri, 17 Jun 2022 13:26:12 -0500 Subject: [PATCH 509/581] board: ti: common: board_detect: Do 1byte address checks first. Do 1 byte address checks first prior to doing 2 byte address checks. When performing 2 byte addressing on 1 byte addressing eeprom, the second byte is taken in as a write operation and ends up erasing the eeprom region we want to preserve. While we could have theoretically handled this by ensuring the write protect of the eeproms are properly managed, this is not true in case where board are updated with 1 byte eeproms to handle supply status. Flipping the checks by checking for 1 byte addressing prior to 2 byte addressing check prevents this problem at the minor cost of additional overhead for boards with 2 byte addressing eeproms. Signed-off-by: Nishanth Menon Reviewed-by: Tom Rini --- board/ti/common/board_detect.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/board/ti/common/board_detect.c b/board/ti/common/board_detect.c index 0806dea11ed..ed34991377e 100644 --- a/board/ti/common/board_detect.c +++ b/board/ti/common/board_detect.c @@ -103,14 +103,14 @@ static int __maybe_unused ti_i2c_eeprom_get(int bus_addr, int dev_addr, /* * Read the header first then only read the other contents. */ - rc = i2c_set_chip_offset_len(dev, 2); + rc = i2c_set_chip_offset_len(dev, 1); if (rc) return rc; /* * Skip checking result here since this could be a valid i2c read fail - * on some boards that use 1 byte addressing. - * We must allow for fall through to check the data if 1 byte + * on some boards that use 2 byte addressing. + * We must allow for fall through to check the data if 2 byte * addressing works */ (void)dm_i2c_read(dev, 0, (uint8_t *)&hdr_read, 4); @@ -119,9 +119,9 @@ static int __maybe_unused ti_i2c_eeprom_get(int bus_addr, int dev_addr, if (hdr_read != header) { /* * read the eeprom header using i2c again, but use only a - * 1 byte address (some legacy boards need this..) + * 2 byte address (some newer boards need this..) */ - rc = i2c_set_chip_offset_len(dev, 1); + rc = i2c_set_chip_offset_len(dev, 2); if (rc) return rc; @@ -146,12 +146,12 @@ static int __maybe_unused ti_i2c_eeprom_get(int bus_addr, int dev_addr, /* * Read the header first then only read the other contents. */ - byte = 2; + byte = 1; /* * Skip checking result here since this could be a valid i2c read fail - * on some boards that use 1 byte addressing. - * We must allow for fall through to check the data if 1 byte + * on some boards that use 2 byte addressing. + * We must allow for fall through to check the data if 2 byte * addressing works */ (void)i2c_read(dev_addr, 0x0, byte, (uint8_t *)&hdr_read, 4); @@ -160,9 +160,9 @@ static int __maybe_unused ti_i2c_eeprom_get(int bus_addr, int dev_addr, if (hdr_read != header) { /* * read the eeprom header using i2c again, but use only a - * 1 byte address (some legacy boards need this..) + * 2 byte address (some newer boards need this..) */ - byte = 1; + byte = 2; rc = i2c_read(dev_addr, 0x0, byte, (uint8_t *)&hdr_read, 4); if (rc) -- GitLab From 1cf4e79f5776e9cc451b7f4affec7e47db9533f9 Mon Sep 17 00:00:00 2001 From: Philippe Schenker Date: Mon, 20 Jun 2022 16:57:45 +0200 Subject: [PATCH 510/581] toradex: tdx-cfg-block: add new toradex oui range Add new Toradex MAC OUI (8c:06:cb), to the config block. With this change we extend the possible serial-numbers as follows: For serial-numbers 00000000-16777215 OUI 00:14:2d is taken For serial-numbers 16777216-33554431 OUI 8c:06:cb is taken Lower 24-bit of the serial number are used in the NIC part of the MAC address, the complete serial number can be calculated using the OUI. Signed-off-by: Philippe Schenker Reviewed-by: Francesco Dolcini Reviewed-by: Fabio Estevam Acked-by: Marcel Ziswiler --- board/toradex/common/tdx-cfg-block.c | 42 +++++++++++++++++++++++++--- board/toradex/common/tdx-cfg-block.h | 2 ++ board/toradex/common/tdx-common.c | 5 +--- 3 files changed, 41 insertions(+), 8 deletions(-) diff --git a/board/toradex/common/tdx-cfg-block.c b/board/toradex/common/tdx-cfg-block.c index 678d4e07c21..9305709a3c0 100644 --- a/board/toradex/common/tdx-cfg-block.c +++ b/board/toradex/common/tdx-cfg-block.c @@ -159,6 +159,42 @@ const char * const toradex_display_adapters[] = { [159] = "Verdin DSI to LVDS Adapter", }; +const u32 toradex_ouis[] = { + [0] = 0x00142dUL, + [1] = 0x8c06cbUL, +}; + +static u32 get_serial_from_mac(struct toradex_eth_addr *eth_addr) +{ + int i; + u32 oui = ntohl(eth_addr->oui) >> 8; + u32 nic = ntohl(eth_addr->nic) >> 8; + + for (i = 0; i < ARRAY_SIZE(toradex_ouis); i++) { + if (toradex_ouis[i] == oui) + break; + } + + return (u32)((i << 24) + nic); +} + +void get_mac_from_serial(u32 tdx_serial, struct toradex_eth_addr *eth_addr) +{ + u8 oui_index = tdx_serial >> 24; + u32 nic = tdx_serial & GENMASK(23, 0); + u32 oui; + + if (oui_index >= ARRAY_SIZE(toradex_ouis)) { + puts("Can't find OUI for this serial#\n"); + oui_index = 0; + } + + oui = toradex_ouis[oui_index]; + + eth_addr->oui = htonl(oui << 8); + eth_addr->nic = htonl(nic << 8); +} + #ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_MMC static int tdx_cfg_block_mmc_storage(u8 *config_block, int write) { @@ -331,8 +367,7 @@ int read_tdx_cfg_block(void) memcpy(&tdx_eth_addr, config_block + offset, 6); - /* NIC part of MAC address is serial number */ - tdx_serial = ntohl(tdx_eth_addr.nic) >> 8; + tdx_serial = get_serial_from_mac(&tdx_eth_addr); break; case TAG_HW: memcpy(&tdx_hw_tag, config_block + offset, 8); @@ -974,8 +1009,7 @@ static int do_cfgblock_create(struct cmd_tbl *cmdtp, int flag, int argc, } /* Convert serial number to MAC address (the storage format) */ - tdx_eth_addr.oui = htonl(0x00142dUL << 8); - tdx_eth_addr.nic = htonl(tdx_serial << 8); + get_mac_from_serial(tdx_serial, &tdx_eth_addr); /* Valid Tag */ write_tag(config_block, &offset, TAG_VALID, NULL, 0); diff --git a/board/toradex/common/tdx-cfg-block.h b/board/toradex/common/tdx-cfg-block.h index 43e662e41da..17906984863 100644 --- a/board/toradex/common/tdx-cfg-block.h +++ b/board/toradex/common/tdx-cfg-block.h @@ -114,4 +114,6 @@ int read_tdx_cfg_block_carrier(void); int try_migrate_tdx_cfg_block_carrier(void); +void get_mac_from_serial(u32 tdx_serial, struct toradex_eth_addr *eth_addr); + #endif /* _TDX_CFG_BLOCK_H */ diff --git a/board/toradex/common/tdx-common.c b/board/toradex/common/tdx-common.c index 5ad5d00a0d9..3798bf95378 100644 --- a/board/toradex/common/tdx-common.c +++ b/board/toradex/common/tdx-common.c @@ -20,8 +20,6 @@ #include #include "tdx-common.h" -#define TORADEX_OUI 0x00142dUL - #define SERIAL_STR_LEN 8 #define MODULE_VER_STR_LEN 4 // V1.1 #define MODULE_REV_STR_LEN 3 // [A-Z] or #[26-99] @@ -104,8 +102,7 @@ int show_board_info(void) if (read_tdx_cfg_block()) { printf("MISSING TORADEX CONFIG BLOCK\n"); - tdx_eth_addr.oui = htonl(TORADEX_OUI << 8); - tdx_eth_addr.nic = htonl(tdx_serial << 8); + get_mac_from_serial(tdx_serial, &tdx_eth_addr); checkboard(); } else { snprintf(tdx_serial_str, sizeof(tdx_serial_str), -- GitLab From fdd08f896bcfc513a4cb7799d0094e4fabc73531 Mon Sep 17 00:00:00 2001 From: Jim Liu Date: Tue, 21 Jun 2022 17:03:38 +0800 Subject: [PATCH 511/581] phy: nuvoton: add NPCM7xx phy control driver add BMC NPCM750 phy control driver Signed-off-by: Jim Liu --- drivers/phy/Kconfig | 7 ++ drivers/phy/Makefile | 1 + drivers/phy/phy-npcm-usb.c | 215 +++++++++++++++++++++++++++++++++++++ 3 files changed, 223 insertions(+) create mode 100644 drivers/phy/phy-npcm-usb.c diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index c01d9e09b90..4a3856d3c2f 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -274,6 +274,13 @@ config PHY_MTK_TPHY multi-ports is first version, otherwise is second veriosn, so you can easily distinguish them by banks layout. +config PHY_NPCM_USB + bool "Nuvoton NPCM USB PHY support" + depends on PHY + depends on ARCH_NPCM + help + Support the USB PHY in NPCM SoCs + config PHY_IMX8MQ_USB bool "NXP i.MX8MQ/i.MX8MP USB PHY Driver" depends on PHY diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index bf9b40932fe..d95439c4257 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -37,6 +37,7 @@ obj-$(CONFIG_MT7620_USB_PHY) += mt7620-usb-phy.o obj-$(CONFIG_MT76X8_USB_PHY) += mt76x8-usb-phy.o obj-$(CONFIG_PHY_DA8XX_USB) += phy-da8xx-usb.o obj-$(CONFIG_PHY_MTK_TPHY) += phy-mtk-tphy.o +obj-$(CONFIG_PHY_NPCM_USB) += phy-npcm-usb.o obj-$(CONFIG_PHY_IMX8MQ_USB) += phy-imx8mq-usb.o obj-$(CONFIG_PHY_XILINX_ZYNQMP) += phy-zynqmp.o obj-y += cadence/ diff --git a/drivers/phy/phy-npcm-usb.c b/drivers/phy/phy-npcm-usb.c new file mode 100644 index 00000000000..24eba665543 --- /dev/null +++ b/drivers/phy/phy-npcm-usb.c @@ -0,0 +1,215 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2021 Nuvoton Technology Corp. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* GCR Register Offsets */ +#define GCR_INTCR3 0x9C +#define GCR_USB1PHYCTL 0x140 +#define GCR_USB2PHYCTL 0x144 +#define GCR_USB3PHYCTL 0x148 + +/* USBnPHYCTL bit fields */ +#define PHYCTL_RS BIT(28) + +#define USBPHY2SW GENMASK(13, 12) +#define USBPHY3SW GENMASK(15, 14) + +#define USBPHY2SW_DEV9_PHY1 FIELD_PREP(USBPHY2SW, 0) +#define USBPHY2SW_HOST1 FIELD_PREP(USBPHY2SW, 1) +#define USBPHY2SW_DEV9_PHY2 FIELD_PREP(USBPHY2SW, 3) +#define USBPHY3SW_DEV8_PHY1 FIELD_PREP(USBPHY3SW, 0) +#define USBPHY3SW_HOST2 FIELD_PREP(USBPHY3SW, 1) +#define USBPHY3SW_DEV8_PHY3 FIELD_PREP(USBPHY3SW, 3) + +enum controller_id { + UDC0_7, + UDC8, + UDC9, + USBH1, + USBH2, +}; + +enum phy_id { + PHY1 = 1, + PHY2, + PHY3, +}; + +/* Phy Switch Settings */ +#define USBDPHY1 ((PHY1 << 8) | UDC0_7) /* Connect UDC0~7 to PHY1 */ +#define USBD8PHY1 ((PHY1 << 8) | UDC8) /* Connect UDC8 to PHY1 */ +#define USBD9PHY1 ((PHY1 << 8) | UDC9) /* Connect UDC9 to PHY1 */ +#define USBD9PHY2 ((PHY2 << 8) | UDC9) /* Connect UDC9 to PHY2 */ +#define USBH1PHY2 ((PHY2 << 8) | USBH1) /* Connect USBH1 to PHY2 */ +#define USBD8PHY3 ((PHY3 << 8) | UDC8) /* Connect UDC8 to PHY3 */ +#define USBH2PHY3 ((PHY3 << 8) | USBH2) /* Connect USBH2 to PHY3 */ + +struct npcm_usbphy { + struct regmap *syscon; + u8 id; + u16 phy_switch; /* (phy_id << 8) | controller_id */ +}; + +static int npcm_usb_phy_init(struct phy *phy) +{ + struct npcm_usbphy *priv = dev_get_priv(phy->dev); + struct reset_ctl reset; + int ret; + + ret = reset_get_by_index(phy->dev, 0, &reset); + if (ret && ret != -ENOENT && ret != -ENOTSUPP) { + dev_err(phy->dev, "can't get phy reset ctrl (err %d)", ret); + return ret; + } + + /* setup PHY switch */ + switch (priv->phy_switch) { + case USBD8PHY1: + regmap_update_bits(priv->syscon, GCR_INTCR3, USBPHY3SW, + USBPHY3SW_DEV8_PHY1); + break; + case USBD8PHY3: + regmap_update_bits(priv->syscon, GCR_INTCR3, USBPHY3SW, + USBPHY3SW_DEV8_PHY3); + break; + case USBD9PHY1: + regmap_update_bits(priv->syscon, GCR_INTCR3, USBPHY2SW, + USBPHY2SW_DEV9_PHY1); + break; + case USBD9PHY2: + regmap_update_bits(priv->syscon, GCR_INTCR3, USBPHY2SW, + USBPHY2SW_DEV9_PHY2); + break; + case USBH1PHY2: + regmap_update_bits(priv->syscon, GCR_INTCR3, USBPHY2SW, + USBPHY2SW_HOST1); + break; + case USBH2PHY3: + regmap_update_bits(priv->syscon, GCR_INTCR3, USBPHY3SW, + USBPHY3SW_HOST2); + break; + default: + break; + } + /* reset phy */ + if (reset_valid(&reset)) + reset_assert(&reset); + + /* Wait for PHY clocks to stablize for 50us or more */ + udelay(100); + + /* release phy from reset */ + if (reset_valid(&reset)) + reset_deassert(&reset); + + /* PHY RS bit should be set after reset */ + switch (priv->id) { + case PHY1: + regmap_update_bits(priv->syscon, GCR_USB1PHYCTL, PHYCTL_RS, PHYCTL_RS); + break; + case PHY2: + regmap_update_bits(priv->syscon, GCR_USB2PHYCTL, PHYCTL_RS, PHYCTL_RS); + break; + case PHY3: + regmap_update_bits(priv->syscon, GCR_USB3PHYCTL, PHYCTL_RS, PHYCTL_RS); + break; + default: + break; + } + + return 0; +} + +static int npcm_usb_phy_exit(struct phy *phy) +{ + struct npcm_usbphy *priv = dev_get_priv(phy->dev); + + /* set PHY switch to default state */ + switch (priv->phy_switch) { + case USBD8PHY1: + case USBD8PHY3: + regmap_update_bits(priv->syscon, GCR_INTCR3, USBPHY3SW, + USBPHY3SW_HOST2); + break; + case USBD9PHY1: + case USBD9PHY2: + regmap_update_bits(priv->syscon, GCR_INTCR3, USBPHY2SW, + USBPHY2SW_HOST1); + break; + default: + break; + } + return 0; +} + +static int npcm_usb_phy_xlate(struct phy *phy, struct ofnode_phandle_args *args) +{ + struct npcm_usbphy *priv = dev_get_priv(phy->dev); + u16 phy_switch; + + if (args->args_count < 1 || args->args[0] > USBH2) + return -EINVAL; + + phy_switch = (priv->id << 8) | args->args[0]; + switch (phy_switch) { + case USBD9PHY1: + case USBH2PHY3: + case USBD8PHY3: + if (!IS_ENABLED(CONFIG_ARCH_NPCM8XX)) + return -EINVAL; + case USBDPHY1: + case USBD8PHY1: + case USBD9PHY2: + case USBH1PHY2: + priv->phy_switch = phy_switch; + return 0; + default: + return -EINVAL; + } +} + +static int npcm_usb_phy_probe(struct udevice *dev) +{ + struct npcm_usbphy *priv = dev_get_priv(dev); + + priv->syscon = syscon_regmap_lookup_by_phandle(dev->parent, "syscon"); + if (IS_ERR(priv->syscon)) { + dev_err(dev, "%s: unable to get syscon\n", __func__); + return PTR_ERR(priv->syscon); + } + priv->id = dev_read_u32_default(dev, "reg", -1); + + return 0; +} + +static const struct udevice_id npcm_phy_ids[] = { + { .compatible = "nuvoton,npcm845-usb-phy",}, + { .compatible = "nuvoton,npcm750-usb-phy",}, + { } +}; + +static struct phy_ops npcm_phy_ops = { + .init = npcm_usb_phy_init, + .exit = npcm_usb_phy_exit, + .of_xlate = npcm_usb_phy_xlate, +}; + +U_BOOT_DRIVER(npcm_phy) = { + .name = "npcm-usb-phy", + .id = UCLASS_PHY, + .of_match = npcm_phy_ids, + .ops = &npcm_phy_ops, + .probe = npcm_usb_phy_probe, + .priv_auto = sizeof(struct npcm_usbphy), +}; -- GitLab From 10c8bafbc3cd9a6434318b82b64444488b7dd677 Mon Sep 17 00:00:00 2001 From: Bryan Brattlof Date: Tue, 21 Jun 2022 16:36:03 -0500 Subject: [PATCH 512/581] soc: soc_ti_k3: identify j7200 SR2.0 SoCs Anytime a new revision of a chip is produced, Texas Instruments will increment the 4 bit VARIANT section of the CTRLMMR_WKUP_JTAGID register by one. Typically this will be decoded as SR1.0 -> SR2.0 ... however a few TI SoCs do not follow this convention. Rather than defining a revision string array for each SoC, use a default revision string array for all TI SoCs that continue to follow the typical 1.0 -> 2.0 revision scheme. Signed-off-by: Bryan Brattlof --- drivers/soc/soc_ti_k3.c | 16 +++++----------- 1 file changed, 5 insertions(+), 11 deletions(-) diff --git a/drivers/soc/soc_ti_k3.c b/drivers/soc/soc_ti_k3.c index 42344145f9f..b1e7c4ae5f6 100644 --- a/drivers/soc/soc_ti_k3.c +++ b/drivers/soc/soc_ti_k3.c @@ -64,8 +64,8 @@ static char *j721e_rev_string_map[] = { "1.0", "1.1", }; -static char *am65x_rev_string_map[] = { - "1.0", "2.0", +static char *typical_rev_string_map[] = { + "1.0", "2.0", "3.0", }; static const char *get_rev_string(u32 idreg) @@ -82,16 +82,10 @@ static const char *get_rev_string(u32 idreg) goto bail; return j721e_rev_string_map[rev]; - case AM65X: - if (rev > ARRAY_SIZE(am65x_rev_string_map)) - goto bail; - return am65x_rev_string_map[rev]; - - case AM64X: - case J7200: default: - if (!rev) - return "1.0"; + if (rev > ARRAY_SIZE(typical_rev_string_map)) + goto bail; + return typical_rev_string_map[rev]; }; bail: -- GitLab From 8c3019216edd18297527c3c0926c319eca2a43f5 Mon Sep 17 00:00:00 2001 From: Eddie James Date: Thu, 23 Jun 2022 14:40:31 +0930 Subject: [PATCH 513/581] ARM: dts: ast2600: Add I2C pinctrl Set the pinctrl groups for each I2C bus. These are essential to I2C operating correctly. Signed-off-by: Eddie James Reviewed-by: Ryan Chen Signed-off-by: Joel Stanley --- arch/arm/dts/ast2600.dtsi | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi index 64074309b7b..ef5b131ac0a 100644 --- a/arch/arm/dts/ast2600.dtsi +++ b/arch/arm/dts/ast2600.dtsi @@ -833,6 +833,8 @@ bus-frequency = <100000>; interrupts = ; clocks = <&scu ASPEED_CLK_APB2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1_default>; status = "disabled"; }; @@ -846,6 +848,8 @@ bus-frequency = <100000>; interrupts = ; clocks = <&scu ASPEED_CLK_APB2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2_default>; status = "disabled"; }; @@ -859,6 +863,8 @@ bus-frequency = <100000>; interrupts = ; clocks = <&scu ASPEED_CLK_APB2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3_default>; }; i2c3: i2c@200 { @@ -871,6 +877,8 @@ bus-frequency = <100000>; interrupts = ; clocks = <&scu ASPEED_CLK_APB2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4_default>; }; i2c4: i2c@280 { @@ -883,6 +891,8 @@ bus-frequency = <100000>; interrupts = ; clocks = <&scu ASPEED_CLK_APB2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c5_default>; }; i2c5: i2c@300 { @@ -895,6 +905,8 @@ bus-frequency = <100000>; interrupts = ; clocks = <&scu ASPEED_CLK_APB2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c6_default>; }; i2c6: i2c@380 { @@ -907,6 +919,8 @@ bus-frequency = <100000>; interrupts = ; clocks = <&scu ASPEED_CLK_APB2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c7_default>; }; i2c7: i2c@400 { @@ -919,6 +933,8 @@ bus-frequency = <100000>; interrupts = ; clocks = <&scu ASPEED_CLK_APB2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c8_default>; }; i2c8: i2c@480 { @@ -931,6 +947,8 @@ bus-frequency = <100000>; interrupts = ; clocks = <&scu ASPEED_CLK_APB2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c9_default>; }; i2c9: i2c@500 { @@ -943,6 +961,8 @@ bus-frequency = <100000>; interrupts = ; clocks = <&scu ASPEED_CLK_APB2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c10_default>; status = "disabled"; }; @@ -956,6 +976,8 @@ bus-frequency = <100000>; interrupts = ; clocks = <&scu ASPEED_CLK_APB2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c11_default>; status = "disabled"; }; @@ -969,6 +991,8 @@ bus-frequency = <100000>; interrupts = ; clocks = <&scu ASPEED_CLK_APB2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c12_default>; status = "disabled"; }; @@ -982,6 +1006,8 @@ bus-frequency = <100000>; interrupts = ; clocks = <&scu ASPEED_CLK_APB2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c13_default>; status = "disabled"; }; @@ -995,6 +1021,8 @@ bus-frequency = <100000>; interrupts = ; clocks = <&scu ASPEED_CLK_APB2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c14_default>; status = "disabled"; }; @@ -1008,6 +1036,8 @@ bus-frequency = <100000>; interrupts = ; clocks = <&scu ASPEED_CLK_APB2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c15_default>; status = "disabled"; }; @@ -1021,6 +1051,8 @@ bus-frequency = <100000>; interrupts = ; clocks = <&scu ASPEED_CLK_APB2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c16_default>; status = "disabled"; }; @@ -1246,6 +1278,7 @@ function = "I2C1"; groups = "I2C1"; }; + pinctrl_i2c2_default: i2c2_default { function = "I2C2"; groups = "I2C2"; -- GitLab From a87273bc4085854584a19abb65da7562c0967f9e Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Thu, 23 Jun 2022 14:40:32 +0930 Subject: [PATCH 514/581] ARM: dts: ast2600: Add I2C reset properties The same as the upstream Linux device tree, each i2c bus has a property specifying the reset line. Signed-off-by: Joel Stanley Reviewed-by: Ryan Chen --- arch/arm/dts/ast2600.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi index ef5b131ac0a..4b23d25ede0 100644 --- a/arch/arm/dts/ast2600.dtsi +++ b/arch/arm/dts/ast2600.dtsi @@ -832,6 +832,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <100000>; interrupts = ; + resets = <&rst ASPEED_RESET_I2C>; clocks = <&scu ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1_default>; @@ -847,6 +848,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <100000>; interrupts = ; + resets = <&rst ASPEED_RESET_I2C>; clocks = <&scu ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2_default>; @@ -862,6 +864,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <100000>; interrupts = ; + resets = <&rst ASPEED_RESET_I2C>; clocks = <&scu ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3_default>; @@ -876,6 +879,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <100000>; interrupts = ; + resets = <&rst ASPEED_RESET_I2C>; clocks = <&scu ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c4_default>; @@ -890,6 +894,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <100000>; interrupts = ; + resets = <&rst ASPEED_RESET_I2C>; clocks = <&scu ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c5_default>; @@ -904,6 +909,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <100000>; interrupts = ; + resets = <&rst ASPEED_RESET_I2C>; clocks = <&scu ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c6_default>; @@ -918,6 +924,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <100000>; interrupts = ; + resets = <&rst ASPEED_RESET_I2C>; clocks = <&scu ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c7_default>; @@ -932,6 +939,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <100000>; interrupts = ; + resets = <&rst ASPEED_RESET_I2C>; clocks = <&scu ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c8_default>; @@ -946,6 +954,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <100000>; interrupts = ; + resets = <&rst ASPEED_RESET_I2C>; clocks = <&scu ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c9_default>; @@ -960,6 +969,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <100000>; interrupts = ; + resets = <&rst ASPEED_RESET_I2C>; clocks = <&scu ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c10_default>; @@ -975,6 +985,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <100000>; interrupts = ; + resets = <&rst ASPEED_RESET_I2C>; clocks = <&scu ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c11_default>; @@ -990,6 +1001,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <100000>; interrupts = ; + resets = <&rst ASPEED_RESET_I2C>; clocks = <&scu ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c12_default>; @@ -1005,6 +1017,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <100000>; interrupts = ; + resets = <&rst ASPEED_RESET_I2C>; clocks = <&scu ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c13_default>; @@ -1020,6 +1033,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <100000>; interrupts = ; + resets = <&rst ASPEED_RESET_I2C>; clocks = <&scu ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c14_default>; @@ -1035,6 +1049,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <100000>; interrupts = ; + resets = <&rst ASPEED_RESET_I2C>; clocks = <&scu ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c15_default>; @@ -1050,6 +1065,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <100000>; interrupts = ; + resets = <&rst ASPEED_RESET_I2C>; clocks = <&scu ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c16_default>; -- GitLab From fc28e02404846954a6d294184adcd4fe3ced7da9 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Thu, 23 Jun 2022 14:40:33 +0930 Subject: [PATCH 515/581] ARM: dts: ast2600: Disable I2C nodes by default Allow boards to enable the buses they use. Signed-off-by: Joel Stanley Reviewed-by: Ryan Chen --- arch/arm/dts/ast2600.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi index 4b23d25ede0..a37d062bcad 100644 --- a/arch/arm/dts/ast2600.dtsi +++ b/arch/arm/dts/ast2600.dtsi @@ -868,6 +868,7 @@ clocks = <&scu ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3_default>; + status = "disabled"; }; i2c3: i2c@200 { @@ -883,6 +884,7 @@ clocks = <&scu ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c4_default>; + status = "disabled"; }; i2c4: i2c@280 { @@ -898,6 +900,7 @@ clocks = <&scu ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c5_default>; + status = "disabled"; }; i2c5: i2c@300 { @@ -913,6 +916,7 @@ clocks = <&scu ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c6_default>; + status = "disabled"; }; i2c6: i2c@380 { @@ -928,6 +932,7 @@ clocks = <&scu ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c7_default>; + status = "disabled"; }; i2c7: i2c@400 { @@ -943,6 +948,7 @@ clocks = <&scu ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c8_default>; + status = "disabled"; }; i2c8: i2c@480 { @@ -958,6 +964,7 @@ clocks = <&scu ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c9_default>; + status = "disabled"; }; i2c9: i2c@500 { -- GitLab From 3ad1d85d3c2163ec11934c77bc8c9aead37e9680 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Thu, 23 Jun 2022 14:40:34 +0930 Subject: [PATCH 516/581] ARM: dts: ast2600-evb: Remove redundant pinctrl Now that these are in the dtsi we don't need them in the EVB device tree. Signed-off-by: Joel Stanley --- arch/arm/dts/ast2600-evb.dts | 15 --------------- 1 file changed, 15 deletions(-) diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts index 0d650543134..806b76029ac 100644 --- a/arch/arm/dts/ast2600-evb.dts +++ b/arch/arm/dts/ast2600-evb.dts @@ -150,37 +150,22 @@ &i2c4 { status = "okay"; - - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c5_default>; }; &i2c5 { status = "okay"; - - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c6_default>; }; &i2c6 { status = "okay"; - - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c7_default>; }; &i2c7 { status = "okay"; - - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c8_default>; }; &i2c8 { status = "okay"; - - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c9_default>; }; &mdio0 { -- GitLab From 5ff466fade1884501acaa76c6e87b7613f250971 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Thu, 23 Jun 2022 14:40:35 +0930 Subject: [PATCH 517/581] ARM: dts: ast2500-evb: Add I2C devices The EVB has an EEPROM on bus 3 and a LM75 temp sensor on bus 7. Enable those busses we can test the I2C driver. Signed-off-by: Joel Stanley Reviewed-by: Ryan Chen --- arch/arm/dts/ast2500-evb.dts | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/dts/ast2500-evb.dts b/arch/arm/dts/ast2500-evb.dts index 4796ed445f5..874e042bc4c 100644 --- a/arch/arm/dts/ast2500-evb.dts +++ b/arch/arm/dts/ast2500-evb.dts @@ -73,3 +73,22 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sd2_default>; }; + +&i2c3 { + status = "okay"; + + eeprom@50 { + compatible = "atmel,24c08"; + reg = <0x50>; + pagesize = <16>; + }; +}; + +&i2c7 { + status = "okay"; + + lm75@4d { + compatible = "national,lm75"; + reg = <0x4d>; + }; +}; -- GitLab From b45768ebfe11109b995adc65ea7b5dc7228b7ed4 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Thu, 23 Jun 2022 14:40:36 +0930 Subject: [PATCH 518/581] ARM: dts: ast2600-evb: Add I2C devices The EVB has an EEPROM and ADT8490 temp sensor/fan controller on bus 7, and a LM75 temp sensor on bus 8. Signed-off-by: Joel Stanley --- arch/arm/dts/ast2600-evb.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts index 806b76029ac..bb438d57cb6 100644 --- a/arch/arm/dts/ast2600-evb.dts +++ b/arch/arm/dts/ast2600-evb.dts @@ -162,10 +162,26 @@ &i2c7 { status = "okay"; + + temp@2e { + compatible = "adi,adt7490"; + reg = <0x2e>; + }; + + eeprom@50 { + compatible = "atmel,24c08"; + reg = <0x50>; + pagesize = <16>; + }; }; &i2c8 { status = "okay"; + + lm75@4d { + compatible = "national,lm75"; + reg = <0x4d>; + }; }; &mdio0 { -- GitLab From 0a8bd97f883c554a4137b4f3a88d0d638c4d1b31 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Thu, 23 Jun 2022 14:40:37 +0930 Subject: [PATCH 519/581] reset/aspeed: Implement status callback The I2C driver shares a reset line between buses, so allow it to test the state of the reset line before resetting it. Signed-off-by: Joel Stanley Reviewed-by: Ryan Chen --- drivers/reset/reset-ast2500.c | 19 +++++++++++++++++++ drivers/reset/reset-ast2600.c | 17 +++++++++++++++++ 2 files changed, 36 insertions(+) diff --git a/drivers/reset/reset-ast2500.c b/drivers/reset/reset-ast2500.c index 0a1dd236aff..d9cecf3a72e 100644 --- a/drivers/reset/reset-ast2500.c +++ b/drivers/reset/reset-ast2500.c @@ -48,6 +48,24 @@ static int ast2500_reset_deassert(struct reset_ctl *reset_ctl) return 0; } +static int ast2500_reset_status(struct reset_ctl *reset_ctl) +{ + struct ast2500_reset_priv *priv = dev_get_priv(reset_ctl->dev); + struct ast2500_scu *scu = priv->scu; + int status; + + debug("%s: reset_ctl->id: %lu\n", __func__, reset_ctl->id); + + if (reset_ctl->id < 32) + status = BIT(reset_ctl->id) & readl(&scu->sysreset_ctrl1); + else + status = BIT(reset_ctl->id - 32) & readl(&scu->sysreset_ctrl2); + + return !!status; +} + + + static int ast2500_reset_probe(struct udevice *dev) { int rc; @@ -79,6 +97,7 @@ static const struct udevice_id ast2500_reset_ids[] = { struct reset_ops ast2500_reset_ops = { .rst_assert = ast2500_reset_assert, .rst_deassert = ast2500_reset_deassert, + .rst_status = ast2500_reset_status, }; U_BOOT_DRIVER(ast2500_reset) = { diff --git a/drivers/reset/reset-ast2600.c b/drivers/reset/reset-ast2600.c index 985235a3ac4..1732a450efc 100644 --- a/drivers/reset/reset-ast2600.c +++ b/drivers/reset/reset-ast2600.c @@ -47,6 +47,22 @@ static int ast2600_reset_deassert(struct reset_ctl *reset_ctl) return 0; } +static int ast2600_reset_status(struct reset_ctl *reset_ctl) +{ + struct ast2600_reset_priv *priv = dev_get_priv(reset_ctl->dev); + struct ast2600_scu *scu = priv->scu; + int status; + + debug("%s: reset_ctl->id: %lu\n", __func__, reset_ctl->id); + + if (reset_ctl->id < 32) + status = BIT(reset_ctl->id) & readl(&scu->modrst_ctrl1); + else + status = BIT(reset_ctl->id - 32) & readl(&scu->modrst_ctrl2); + + return !!status; +} + static int ast2600_reset_probe(struct udevice *dev) { int rc; @@ -78,6 +94,7 @@ static const struct udevice_id ast2600_reset_ids[] = { struct reset_ops ast2600_reset_ops = { .rst_assert = ast2600_reset_assert, .rst_deassert = ast2600_reset_deassert, + .rst_status = ast2600_reset_status, }; U_BOOT_DRIVER(ast2600_reset) = { -- GitLab From 453fe1eece2c9358db3e5e28ff6ca1e9403e5b80 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Thu, 23 Jun 2022 14:40:38 +0930 Subject: [PATCH 520/581] i2c/aspeed: Fix reset control The reset control was written for the ast2500 and directly programs the clocking register. So we can share the code with other SoC generations use the reset device to deassert the I2C reset line. Signed-off-by: Joel Stanley Reviewed-by: Ryan Chen --- drivers/i2c/ast_i2c.c | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/drivers/i2c/ast_i2c.c b/drivers/i2c/ast_i2c.c index 2d3fecaa14e..0a93d7c8291 100644 --- a/drivers/i2c/ast_i2c.c +++ b/drivers/i2c/ast_i2c.c @@ -16,6 +16,7 @@ #include #include #include +#include #include "ast_i2c.h" @@ -108,19 +109,26 @@ static int ast_i2c_of_to_plat(struct udevice *dev) static int ast_i2c_probe(struct udevice *dev) { - struct ast2500_scu *scu; + struct reset_ctl reset_ctl; + int rc; debug("Enabling I2C%u\n", dev_seq(dev)); /* * Get all I2C devices out of Reset. - * Only needs to be done once, but doing it for every - * device does not hurt. + * + * Only needs to be done once so test before performing reset. */ - scu = ast_get_scu(); - ast_scu_unlock(scu); - clrbits_le32(&scu->sysreset_ctrl1, SCU_SYSRESET_I2C); - ast_scu_lock(scu); + rc = reset_get_by_index(dev, 0, &reset_ctl); + if (rc) { + printf("%s: Failed to get reset signal\n", __func__); + return rc; + } + + if (reset_status(&reset_ctl) > 0) { + reset_assert(&reset_ctl); + reset_deassert(&reset_ctl); + } ast_i2c_init_bus(dev); -- GitLab From 50b23b1c5bc3bb8c43fd8cd13725d146e7251d1d Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Thu, 23 Jun 2022 14:40:39 +0930 Subject: [PATCH 521/581] i2c/aspeed: Add AST2600 compatible Signed-off-by: Joel Stanley Reviewed-by: Ryan Chen --- drivers/i2c/ast_i2c.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/i2c/ast_i2c.c b/drivers/i2c/ast_i2c.c index 0a93d7c8291..c9ffe2d6282 100644 --- a/drivers/i2c/ast_i2c.c +++ b/drivers/i2c/ast_i2c.c @@ -351,6 +351,7 @@ static const struct dm_i2c_ops ast_i2c_ops = { static const struct udevice_id ast_i2c_ids[] = { { .compatible = "aspeed,ast2400-i2c-bus" }, { .compatible = "aspeed,ast2500-i2c-bus" }, + { .compatible = "aspeed,ast2600-i2c-bus" }, { }, }; -- GitLab From 93330f28233c47d010ac0d89182a5fa4cbee4b36 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Thu, 23 Jun 2022 14:40:40 +0930 Subject: [PATCH 522/581] config/ast2600: Enable I2C driver Signed-off-by: Joel Stanley --- configs/evb-ast2600_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index 5c4d8426607..6aa61d112f6 100644 --- a/configs/evb-ast2600_defconfig +++ b/configs/evb-ast2600_defconfig @@ -69,6 +69,7 @@ CONFIG_HASH_ASPEED=y CONFIG_ASPEED_ACRY=y CONFIG_ASPEED_GPIO=y CONFIG_DM_I2C=y +CONFIG_SYS_I2C_ASPEED=y CONFIG_MISC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ASPEED=y -- GitLab From f760403f83c40dac72599e22aa6b5f2884a43763 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Thu, 23 Jun 2022 14:40:41 +0930 Subject: [PATCH 523/581] config/aspeed: Enable EEPROM options To allow testing of the I2C driver, enable the eprom command and the misc driver. Signed-off-by: Joel Stanley --- configs/evb-ast2500_defconfig | 3 +++ configs/evb-ast2600_defconfig | 2 ++ 2 files changed, 5 insertions(+) diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig index 9d2c4f81c5a..e56e3b9b12a 100644 --- a/configs/evb-ast2500_defconfig +++ b/configs/evb-ast2500_defconfig @@ -20,6 +20,7 @@ CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_CMD_EEPROM=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -35,6 +36,8 @@ CONFIG_CLK=y CONFIG_ASPEED_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_ASPEED=y +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ASPEED=y CONFIG_PHY_REALTEK=y diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index 6aa61d112f6..1629a3a074a 100644 --- a/configs/evb-ast2600_defconfig +++ b/configs/evb-ast2600_defconfig @@ -47,6 +47,7 @@ CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_CMD_EEPROM=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -71,6 +72,7 @@ CONFIG_ASPEED_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_ASPEED=y CONFIG_MISC=y +CONFIG_I2C_EEPROM=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ASPEED=y CONFIG_PHY_REALTEK=y -- GitLab From dedf8e31861d930927f270b9f5d01013fc54466c Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Thu, 23 Jun 2022 18:35:28 +0930 Subject: [PATCH 524/581] ARM: dts: ast2600: Update SDHCI nodes Match the description used by the Linux kernel, except use scu instead of syscon as the phandle. Signed-off-by: Joel Stanley --- arch/arm/dts/ast2600-evb.dts | 24 +++++++-------- arch/arm/dts/ast2600.dtsi | 57 +++++++++++++++--------------------- 2 files changed, 35 insertions(+), 46 deletions(-) diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts index bb438d57cb6..a9bba968160 100644 --- a/arch/arm/dts/ast2600-evb.dts +++ b/arch/arm/dts/ast2600-evb.dts @@ -15,9 +15,9 @@ }; aliases { - mmc0 = &emmc_slot0; - mmc1 = &sdhci_slot0; - mmc2 = &sdhci_slot1; + mmc0 = &emmc; + mmc1 = &sdhci0; + mmc2 = &sdhci1; spi0 = &fmc; spi1 = &spi1; spi2 = &spi2; @@ -134,18 +134,16 @@ }; }; -&emmc { - u-boot,dm-pre-reloc; - timing-phase = <0x700ff>; + +&emmc_controller { + status = "okay"; }; -&emmc_slot0 { - u-boot,dm-pre-reloc; - status = "okay"; - bus-width = <4>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_emmc_default>; - sdhci-drive-type = <1>; +&emmc { + non-removable; + bus-width = <4>; + max-frequency = <100000000>; + clk-phase-mmc-hs200 = <9>, <225>; }; &i2c4 { diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi index a37d062bcad..ac8cd4d67d8 100644 --- a/arch/arm/dts/ast2600.dtsi +++ b/arch/arm/dts/ast2600.dtsi @@ -416,60 +416,51 @@ status = "disabled"; }; - sdhci: sdhci@1e740000 { - #interrupt-cells = <1>; - compatible = "aspeed,aspeed-sdhci-irq", "simple-mfd"; - reg = <0x1e740000 0x1000>; - interrupts = ; - interrupt-controller; - clocks = <&scu ASPEED_CLK_GATE_SDCLK>, - <&scu ASPEED_CLK_GATE_SDEXTCLK>; - clock-names = "ctrlclk", "extclk"; + sdc: sdc@1e740000 { + compatible = "aspeed,ast2600-sd-controller"; + reg = <0x1e740000 0x100>; #address-cells = <1>; #size-cells = <1>; - ranges = <0x0 0x1e740000 0x1000>; + ranges = <0 0x1e740000 0x10000>; + clocks = <&scu ASPEED_CLK_GATE_SDCLK>; + status = "disabled"; - sdhci_slot0: sdhci_slot0@100 { - compatible = "aspeed,sdhci-ast2600"; + sdhci0: sdhci@1e740100 { + compatible = "aspeed,ast2600-sdhci", "sdhci"; reg = <0x100 0x100>; - interrupts = <0>; - interrupt-parent = <&sdhci>; + interrupts = ; sdhci,auto-cmd12; clocks = <&scu ASPEED_CLK_SDIO>; status = "disabled"; }; - sdhci_slot1: sdhci_slot1@200 { - compatible = "aspeed,sdhci-ast2600"; + sdhci1: sdhci@1e740200 { + compatible = "aspeed,ast2600-sdhci", "sdhci"; reg = <0x200 0x100>; - interrupts = <1>; - interrupt-parent = <&sdhci>; + interrupts = ; sdhci,auto-cmd12; clocks = <&scu ASPEED_CLK_SDIO>; status = "disabled"; }; }; - emmc: emmc@1e750000 { - #interrupt-cells = <1>; - compatible = "aspeed,aspeed-emmc-irq", "simple-mfd"; - reg = <0x1e750000 0x1000>; - interrupts = ; - interrupt-controller; - clocks = <&scu ASPEED_CLK_GATE_EMMCCLK>, - <&scu ASPEED_CLK_GATE_EMMCEXTCLK>; - clock-names = "ctrlclk", "extclk"; + emmc_controller: sdc@1e750000 { + compatible = "aspeed,ast2600-sd-controller"; + reg = <0x1e750000 0x100>; #address-cells = <1>; #size-cells = <1>; - ranges = <0x0 0x1e750000 0x1000>; + ranges = <0 0x1e750000 0x10000>; + clocks = <&scu ASPEED_CLK_GATE_EMMCCLK>; + status = "disabled"; - emmc_slot0: emmc_slot0@100 { - compatible = "aspeed,emmc-ast2600"; + emmc: sdhci@1e750100 { + compatible = "aspeed,ast2600-sdhci"; reg = <0x100 0x100>; - interrupts = <0>; - interrupt-parent = <&emmc>; + sdhci,auto-cmd12; + interrupts = ; clocks = <&scu ASPEED_CLK_EMMC>; - status = "disabled"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_emmc_default>; }; }; -- GitLab From 0b2a749bc6573a3e66d339d9d74de30c1ab15c46 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Thu, 23 Jun 2022 18:35:29 +0930 Subject: [PATCH 525/581] ARM: dts: ast2500: Update SDHCI nodes Match the description used by the Linux kernel, except use scu instead of syscon as the phandle. Signed-off-by: Joel Stanley --- arch/arm/dts/ast2500-evb.dts | 4 ++++ arch/arm/dts/ast2500-u-boot.dtsi | 25 ------------------------- arch/arm/dts/ast2500.dtsi | 28 ++++++++++++++++++++++++++++ 3 files changed, 32 insertions(+), 25 deletions(-) diff --git a/arch/arm/dts/ast2500-evb.dts b/arch/arm/dts/ast2500-evb.dts index 874e042bc4c..cc577761fa6 100644 --- a/arch/arm/dts/ast2500-evb.dts +++ b/arch/arm/dts/ast2500-evb.dts @@ -60,6 +60,10 @@ pinctrl-0 = <&pinctrl_mac2link_default &pinctrl_mdio2_default>; }; +&sdmmc { + status = "okay"; +}; + &sdhci0 { status = "okay"; diff --git a/arch/arm/dts/ast2500-u-boot.dtsi b/arch/arm/dts/ast2500-u-boot.dtsi index ea60e4c8db9..057390fe707 100644 --- a/arch/arm/dts/ast2500-u-boot.dtsi +++ b/arch/arm/dts/ast2500-u-boot.dtsi @@ -28,31 +28,6 @@ clocks = <&scu ASPEED_CLK_MPLL>; resets = <&rst ASPEED_RESET_SDRAM>; }; - - ahb { - u-boot,dm-pre-reloc; - - apb { - u-boot,dm-pre-reloc; - - sdhci0: sdhci@1e740100 { - compatible = "aspeed,ast2500-sdhci"; - reg = <0x1e740100>; - #reset-cells = <1>; - clocks = <&scu ASPEED_CLK_SDIO>; - resets = <&rst ASPEED_RESET_SDIO>; - }; - - sdhci1: sdhci@1e740200 { - compatible = "aspeed,ast2500-sdhci"; - reg = <0x1e740200>; - #reset-cells = <1>; - clocks = <&scu ASPEED_CLK_SDIO>; - resets = <&rst ASPEED_RESET_SDIO>; - }; - }; - - }; }; &uart1 { diff --git a/arch/arm/dts/ast2500.dtsi b/arch/arm/dts/ast2500.dtsi index ee66ef67042..cea08e6f08d 100644 --- a/arch/arm/dts/ast2500.dtsi +++ b/arch/arm/dts/ast2500.dtsi @@ -207,6 +207,34 @@ reg = <0x1e720000 0x9000>; // 36K }; + sdmmc: sd-controller@1e740000 { + compatible = "aspeed,ast2500-sd-controller"; + reg = <0x1e740000 0x100>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x1e740000 0x10000>; + clocks = <&scu ASPEED_CLK_GATE_SDCLK>; + status = "disabled"; + + sdhci0: sdhci@100 { + compatible = "aspeed,ast2500-sdhci"; + reg = <0x100 0x100>; + interrupts = <26>; + sdhci,auto-cmd12; + clocks = <&scu ASPEED_CLK_SDIO>; + status = "disabled"; + }; + + sdhci1: sdhci@200 { + compatible = "aspeed,ast2500-sdhci"; + reg = <0x200 0x100>; + interrupts = <26>; + sdhci,auto-cmd12; + clocks = <&scu ASPEED_CLK_SDIO>; + status = "disabled"; + }; + }; + gpio: gpio@1e780000 { #gpio-cells = <2>; gpio-controller; -- GitLab From 67e20f9d65f1de5bc68753beba6f94c87272629b Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Thu, 23 Jun 2022 18:35:30 +0930 Subject: [PATCH 526/581] clk/aspeed: Add debug message when clock fails A common message across platforms that prints the clock number. Signed-off-by: Joel Stanley --- drivers/clk/aspeed/clk_ast2500.c | 3 +++ drivers/clk/aspeed/clk_ast2600.c | 4 ++-- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/clk/aspeed/clk_ast2500.c b/drivers/clk/aspeed/clk_ast2500.c index a1b4496ca2c..dcf299548de 100644 --- a/drivers/clk/aspeed/clk_ast2500.c +++ b/drivers/clk/aspeed/clk_ast2500.c @@ -173,6 +173,7 @@ static ulong ast2500_clk_get_rate(struct clk *clk) rate = ast2500_get_uart_clk_rate(priv->scu, 5); break; default: + debug("%s: unknown clk %ld\n", __func__, clk->id); return -ENOENT; } @@ -438,6 +439,7 @@ static ulong ast2500_clk_set_rate(struct clk *clk, ulong rate) new_rate = ast2500_configure_d2pll(priv->scu, rate); break; default: + debug("%s: unknown clk %ld\n", __func__, clk->id); return -ENOENT; } @@ -480,6 +482,7 @@ static int ast2500_clk_enable(struct clk *clk) ast2500_configure_d2pll(priv->scu, D2PLL_DEFAULT_RATE); break; default: + debug("%s: unknown clk %ld\n", __func__, clk->id); return -ENOENT; } diff --git a/drivers/clk/aspeed/clk_ast2600.c b/drivers/clk/aspeed/clk_ast2600.c index f191b0f3170..7d85c7f0982 100644 --- a/drivers/clk/aspeed/clk_ast2600.c +++ b/drivers/clk/aspeed/clk_ast2600.c @@ -471,7 +471,7 @@ static ulong ast2600_clk_get_rate(struct clk *clk) rate = ast2600_get_uart_huxclk_rate(priv->scu); break; default: - debug("can't get clk rate\n"); + debug("%s: unknown clk %ld\n", __func__, clk->id); return -ENOENT; } @@ -1098,7 +1098,7 @@ static int ast2600_clk_enable(struct clk *clk) ast2600_enable_rsaclk(priv->scu); break; default: - pr_err("can't enable clk\n"); + debug("%s: unknown clk %ld\n", __func__, clk->id); return -ENOENT; } -- GitLab From 85bb3a4eee1a9822e4cbcdaa250ec58061bdee79 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Thu, 23 Jun 2022 18:35:31 +0930 Subject: [PATCH 527/581] clk/ast2600: Adjust eMMC clock names Adjust clock to stay compatible with those used by the Linux kernel device tree. Signed-off-by: Joel Stanley --- drivers/clk/aspeed/clk_ast2600.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/aspeed/clk_ast2600.c b/drivers/clk/aspeed/clk_ast2600.c index 7d85c7f0982..0df1dc3718d 100644 --- a/drivers/clk/aspeed/clk_ast2600.c +++ b/drivers/clk/aspeed/clk_ast2600.c @@ -1073,13 +1073,13 @@ static int ast2600_clk_enable(struct clk *clk) case ASPEED_CLK_GATE_SDCLK: ast2600_enable_sdclk(priv->scu); break; - case ASPEED_CLK_GATE_SDEXTCLK: + case ASPEED_CLK_SDIO: ast2600_enable_extsdclk(priv->scu); break; case ASPEED_CLK_GATE_EMMCCLK: ast2600_enable_emmcclk(priv->scu); break; - case ASPEED_CLK_GATE_EMMCEXTCLK: + case ASPEED_CLK_EMMC: ast2600_enable_extemmcclk(priv->scu); break; case ASPEED_CLK_GATE_FSICLK: -- GitLab From 50204533dc92b570e46b15e0bf2ab3feb57e8690 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Thu, 23 Jun 2022 18:35:32 +0930 Subject: [PATCH 528/581] clk/ast2500: Add SD clock In order to use the clock from the sdhci driver, add the SD clock. Signed-off-by: Joel Stanley --- drivers/clk/aspeed/clk_ast2500.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/clk/aspeed/clk_ast2500.c b/drivers/clk/aspeed/clk_ast2500.c index dcf299548de..623c6915b81 100644 --- a/drivers/clk/aspeed/clk_ast2500.c +++ b/drivers/clk/aspeed/clk_ast2500.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include @@ -426,6 +427,25 @@ static ulong ast2500_configure_d2pll(struct ast2500_scu *scu, ulong rate) return new_rate; } +#define SCU_CLKSTOP_SDIO 27 +static ulong ast2500_enable_sdclk(struct ast2500_scu *scu) +{ + u32 reset_bit; + u32 clkstop_bit; + + reset_bit = BIT(ASPEED_RESET_SDIO); + clkstop_bit = BIT(SCU_CLKSTOP_SDIO); + + setbits_le32(&scu->sysreset_ctrl1, reset_bit); + udelay(100); + //enable clk + clrbits_le32(&scu->clk_stop_ctrl1, clkstop_bit); + mdelay(10); + clrbits_le32(&scu->sysreset_ctrl1, reset_bit); + + return 0; +} + static ulong ast2500_clk_set_rate(struct clk *clk, ulong rate) { struct ast2500_clk_priv *priv = dev_get_priv(clk->dev); @@ -481,6 +501,9 @@ static int ast2500_clk_enable(struct clk *clk) case ASPEED_CLK_D2PLL: ast2500_configure_d2pll(priv->scu, D2PLL_DEFAULT_RATE); break; + case ASPEED_CLK_GATE_SDCLK: + ast2500_enable_sdclk(priv->scu); + break; default: debug("%s: unknown clk %ld\n", __func__, clk->id); return -ENOENT; -- GitLab From f49a7a160d8851d1a22928125d317f8ddfb3157b Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Thu, 23 Jun 2022 18:35:33 +0930 Subject: [PATCH 529/581] mmc/aspeed: Add debuging for clock probe failures Signed-off-by: Joel Stanley --- drivers/mmc/aspeed_sdhci.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/aspeed_sdhci.c b/drivers/mmc/aspeed_sdhci.c index 45373157198..c71daae9758 100644 --- a/drivers/mmc/aspeed_sdhci.c +++ b/drivers/mmc/aspeed_sdhci.c @@ -26,12 +26,16 @@ static int aspeed_sdhci_probe(struct udevice *dev) int ret; ret = clk_get_by_index(dev, 0, &clk); - if (ret) + if (ret) { + debug("%s: clock get failed %d\n", __func__, ret); return ret; + } ret = clk_enable(&clk); - if (ret) + if (ret) { + debug("%s: clock enable failed %d\n", __func__, ret); goto free; + } host->name = dev->name; host->ioaddr = dev_read_addr_ptr(dev); @@ -39,6 +43,7 @@ static int aspeed_sdhci_probe(struct udevice *dev) max_clk = clk_get_rate(&clk); if (IS_ERR_VALUE(max_clk)) { ret = max_clk; + debug("%s: clock rate get failed %d\n", __func__, ret); goto err; } -- GitLab From 66900bc25432ed0f99d6decbf7b383536b3456aa Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Thu, 23 Jun 2022 18:35:34 +0930 Subject: [PATCH 530/581] mmc/aspeed: Probe from controller The Aspeed SDHCI controller is arranged with some shared control registers, followed by one or two sets of actual SDHCI registers. Adjust the driver to probe this controller device first. The driver then wants to iterate over the child nodes to probe the SDHCI proper: ofnode node; dev_for_each_subnode(node, parent) { struct udevice *dev; int ret; ret = device_bind_driver_to_node(parent, "aspeed_sdhci", ofnode_get_name(node), node, &dev); if (ret) return ret; } However if we did this the sdhci driver would probe twice; once "naturally" from the device tree and a second time due to this code. Instead of doing this we can rely on the probe order, where the controller will be set up before the sdhci devices. A better solution is preferred. Select MISC as the controller driver is implemented as a misc device. Signed-off-by: Joel Stanley --- drivers/mmc/Kconfig | 1 + drivers/mmc/aspeed_sdhci.c | 21 +++++++++++++++++++++ 2 files changed, 22 insertions(+) diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 53a6b0093d1..b44cd98150f 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -502,6 +502,7 @@ config MMC_SDHCI_ASPEED depends on ARCH_ASPEED depends on DM_MMC depends on MMC_SDHCI + select MISC help Enables support for the Aspeed SDHCI 2.0 controller present on Aspeed SoCs. This device is compatible with SD 3.0 and/or MMC 4.3 diff --git a/drivers/mmc/aspeed_sdhci.c b/drivers/mmc/aspeed_sdhci.c index c71daae9758..5591fa2b089 100644 --- a/drivers/mmc/aspeed_sdhci.c +++ b/drivers/mmc/aspeed_sdhci.c @@ -10,6 +10,7 @@ #include #include #include +#include struct aspeed_sdhci_plat { struct mmc_config cfg; @@ -94,3 +95,23 @@ U_BOOT_DRIVER(aspeed_sdhci_drv) = { .priv_auto = sizeof(struct sdhci_host), .plat_auto = sizeof(struct aspeed_sdhci_plat), }; + + +static int aspeed_sdc_probe(struct udevice *parent) +{ + return 0; +} + +static const struct udevice_id aspeed_sdc_ids[] = { + { .compatible = "aspeed,ast2400-sd-controller" }, + { .compatible = "aspeed,ast2500-sd-controller" }, + { .compatible = "aspeed,ast2600-sd-controller" }, + { } +}; + +U_BOOT_DRIVER(aspeed_sdc_drv) = { + .name = "aspeed_sdc", + .id = UCLASS_MISC, + .of_match = aspeed_sdc_ids, + .probe = aspeed_sdc_probe, +}; -- GitLab From a7d606ff6156928693e19273f6d2f8153d2c7f27 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Thu, 23 Jun 2022 18:35:35 +0930 Subject: [PATCH 531/581] mmc/aspeed: Enable controller clocks Request and enable the controller level clocks. Signed-off-by: Joel Stanley --- drivers/mmc/aspeed_sdhci.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/mmc/aspeed_sdhci.c b/drivers/mmc/aspeed_sdhci.c index 5591fa2b089..9d79bf58cc7 100644 --- a/drivers/mmc/aspeed_sdhci.c +++ b/drivers/mmc/aspeed_sdhci.c @@ -99,6 +99,21 @@ U_BOOT_DRIVER(aspeed_sdhci_drv) = { static int aspeed_sdc_probe(struct udevice *parent) { + struct clk clk; + int ret; + + ret = clk_get_by_index(parent, 0, &clk); + if (ret) { + debug("%s: clock get failed %d\n", __func__, ret); + return ret; + } + + ret = clk_enable(&clk); + if (ret) { + debug("%s: clock enable failed %d\n", __func__, ret); + return ret; + } + return 0; } -- GitLab From dc96a8241dfa40f54f6b184a2fa4106511e7761e Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Thu, 23 Jun 2022 18:35:36 +0930 Subject: [PATCH 532/581] config/ast2600: Enable eMMC related boot options Allow booting zImage from ext4 devices with DOS or UEFI partition layouts. Signed-off-by: Joel Stanley --- configs/evb-ast2600_defconfig | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index 1629a3a074a..e62abbda04e 100644 --- a/configs/evb-ast2600_defconfig +++ b/configs/evb-ast2600_defconfig @@ -47,6 +47,13 @@ CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_CMD_BOOTZ=y +# CONFIG_BOOTM_NETBSD is not set +# CONFIG_BOOTM_PLAN9 is not set +# CONFIG_BOOTM_RTEMS is not set +# CONFIG_BOOTM_VXWORKS is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set CONFIG_CMD_EEPROM=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y @@ -55,6 +62,11 @@ CONFIG_CMD_DHCP=y CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y +CONFIG_CMD_EXT4=y +CONFIG_DOS_PARTITION=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_EFI_PARTITION=y +# CONFIG_SPL_EFI_PARTITION is not set CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -- GitLab From 82010a704e97b29de23e15e4d18dd98341f7bae1 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Wed, 29 Jun 2022 16:35:19 +0930 Subject: [PATCH 533/581] config/ast2600: Enable CRC32 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Useful for testing images with the default hash type. Reviewed-by: Chia-Wei Wang Reviewed-by: Cédric Le Goater Signed-off-by: Joel Stanley --- configs/evb-ast2600_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index e62abbda04e..3dcbcd2e363 100644 --- a/configs/evb-ast2600_defconfig +++ b/configs/evb-ast2600_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000000 CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SPL_CRC32=y CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_RAM_SUPPORT=y -- GitLab From c24129e8b2bb3113d84e30b805e6c689664050c9 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Wed, 29 Jun 2022 16:35:20 +0930 Subject: [PATCH 534/581] config/ast2600: Make position independent MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Allows loading one u-boot from another. Useful for testing on hardware. Reviewed-by: Chia-Wei Wang Reviewed-by: Cédric Le Goater Signed-off-by: Joel Stanley --- configs/evb-ast2600_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index 3dcbcd2e363..4788c4f4f7f 100644 --- a/configs/evb-ast2600_defconfig +++ b/configs/evb-ast2600_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SYS_DCACHE_OFF=y +CONFIG_POSITION_INDEPENDENT=y CONFIG_SPL_SYS_THUMB_BUILD=y CONFIG_ARCH_ASPEED=y CONFIG_SYS_TEXT_BASE=0x80000000 -- GitLab From f78a1f21171ce3d098053318b9238d38206ee595 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Wed, 29 Jun 2022 16:35:21 +0930 Subject: [PATCH 535/581] config/ast2600: Disable hash hardware accel MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The HACE driver lacks support for all the hash types, causing boot to fail with the default FIT configuration which uses CRC32. Additionally the Qemu model or the u-boot driver is unable to correctly compute the SHA256 hash used in a FIT. Disable HACE by default while the above issues are worked out to enable boot testing in Qemu. Reviewed-by: Chia-Wei Wang Reviewed-by: Cédric Le Goater Signed-off-by: Joel Stanley --- configs/evb-ast2600_defconfig | 3 --- 1 file changed, 3 deletions(-) diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index 4788c4f4f7f..588d78e6e3a 100644 --- a/configs/evb-ast2600_defconfig +++ b/configs/evb-ast2600_defconfig @@ -79,9 +79,6 @@ CONFIG_REGMAP=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_CLK=y CONFIG_SPL_CLK=y -CONFIG_DM_HASH=y -CONFIG_HASH_ASPEED=y -CONFIG_ASPEED_ACRY=y CONFIG_ASPEED_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_ASPEED=y -- GitLab From a16175350c3f1706c9bbfd8458c60ea6429034fc Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Wed, 29 Jun 2022 16:35:22 +0930 Subject: [PATCH 536/581] spl: Set SPL_MAX_SIZE default for AST2600 The AST2600 bootrom has a max size of 64KB. This can be overridden if the system is running the SPL from SPI NOR and not using secure boot. Signed-off-by: Joel Stanley --- common/spl/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 3fd56448006..4851834f9b6 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -82,6 +82,7 @@ config SPL_MAX_SIZE default 0x7fa0 if SUNXI_SRAM_ADDRESS = 0x20000 && !MACH_SUN50I_H616 default 0x7000 if RCAR_GEN3 default 0x5fa0 if SUNXI_SRAM_ADDRESS = 0x0 + default 0x10000 if ASPEED_AST2600 default 0x0 help Maximum size of the SPL image (text, data, rodata, and linker lists -- GitLab From 154cffa16a7b6647e180ed6cef55342b39580aff Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Wed, 29 Jun 2022 16:35:23 +0930 Subject: [PATCH 537/581] ast2600: Configure u-boot-with-spl.bin target MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The normal way of loading u-boot is as a FIT, so configure u-boot.img as the SPL playload. The u-boot-with-spl.bin target will add padding according to CONFIG_SPL_MAX_SIZE which defaults to 64KB on the AST2600. With this the following simple steps can be used to build and boot a system: make u-boot-with-spl.bin truncate -s 64M u-boot-with-spl.bin qemu-system-arm -nographic -M ast2600-evb \ -drive file=u-boot-with-spl.bin,if=mtd,format=raw Reviewed-by: Cédric Le Goater Reviewed-by: Chia-Wei Wang Signed-off-by: Joel Stanley --- configs/evb-ast2600_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index 588d78e6e3a..970d3569458 100644 --- a/configs/evb-ast2600_defconfig +++ b/configs/evb-ast2600_defconfig @@ -21,6 +21,8 @@ CONFIG_SPL_SIZE_LIMIT=0x10000 CONFIG_SPL=y # CONFIG_ARMV7_NONSEC is not set CONFIG_SYS_LOAD_ADDR=0x83000000 +CONFIG_SPL_PAYLOAD="u-boot.img" +CONFIG_BUILD_TARGET="u-boot-with-spl.bin" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y CONFIG_SPL_FIT_SIGNATURE=y -- GitLab From 3045d61c1c8e8a628aac02e841010f7cfcce85c1 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Wed, 29 Jun 2022 16:35:24 +0930 Subject: [PATCH 538/581] aspeed/spl: Remove OVERLAY from linker script The generic arm linker script contains this section: .bss __rel_dyn_start (OVERLAY) : { ... } The (OVERLAY) syntax in the description causes the .bss section to be included in the NOR area of the image: $ objdump -t -j .bss spl/u-boot-spl SYMBOL TABLE: 0000c61c l d .bss 00000000 .bss 0000c640 l O .bss 00000040 __value.0 0000c68c g O .bss 00000000 __bss_end 0000c61c g O .bss 00000000 __bss_start 0000c680 g O .bss 0000000c stdio_devices This is what the custom linker script tries to avoid, as the NOR area is read-only. Remove the OVERLAY syntax to fix the BSS location: $ objdump -t -j .bss spl/u-boot-spl SYMBOL TABLE: 83000000 l d .bss 00000000 .bss 83000000 l O .bss 00000040 __value.0 0000c61c g O .bss 00000000 __image_copy_end 8300004c g O .bss 00000000 __bss_end 83000000 g O .bss 00000000 __bss_start 83000040 g O .bss 0000000c stdio_devices This restores the state of the linker script before the patch that fixed the linker lists issue. Fixes: f6810b749f2e ("aspeed/ast2600: Fix SPL linker script") Signed-off-by: Joel Stanley --- arch/arm/mach-aspeed/ast2600/u-boot-spl.lds | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-aspeed/ast2600/u-boot-spl.lds b/arch/arm/mach-aspeed/ast2600/u-boot-spl.lds index 95a509ba3f3..37f0ccd9220 100644 --- a/arch/arm/mach-aspeed/ast2600/u-boot-spl.lds +++ b/arch/arm/mach-aspeed/ast2600/u-boot-spl.lds @@ -68,7 +68,7 @@ SECTIONS _image_binary_end = .; - .bss __rel_dyn_start (OVERLAY) : { + .bss : { __bss_start = .; *(.bss*) . = ALIGN(4); -- GitLab From b24087ae64bee572aa5feae91c1ded5ee92dc774 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Wed, 29 Jun 2022 16:35:25 +0930 Subject: [PATCH 539/581] CI: Add Aspeed AST2600 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The AST2600 has a Qemu model that allows testing. Create a SPI NOR image containing the combined SPL and u-boot FIT image. Reviewed-by: Chia-Wei Wang Reviewed-by: Cédric Le Goater Signed-off-by: Joel Stanley --- .azure-pipelines.yml | 3 +++ .gitlab-ci.yml | 6 ++++++ 2 files changed, 9 insertions(+) diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index 915d5115b12..bc2b437bd99 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -261,6 +261,9 @@ stages: evb_ast2500: TEST_PY_BD: "evb-ast2500" TEST_PY_ID: "--id qemu" + evb_ast2600: + TEST_PY_BD: "evb-ast2600" + TEST_PY_ID: "--id qemu" vexpress_ca9x4: TEST_PY_BD: "vexpress_ca9x4" TEST_PY_ID: "--id qemu" diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index c6a608f7e2a..f9cd4175079 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -272,6 +272,12 @@ evb-ast2500 test.py: TEST_PY_ID: "--id qemu" <<: *buildman_and_testpy_dfn +evb-ast2600 test.py: + variables: + TEST_PY_BD: "evb-ast2600" + TEST_PY_ID: "--id qemu" + <<: *buildman_and_testpy_dfn + sandbox_flattree test.py: variables: TEST_PY_BD: "sandbox_flattree" -- GitLab From 847505a3eefdadf44b4a2cc9325c5dcf7aa1cfa2 Mon Sep 17 00:00:00 2001 From: Jim Liu Date: Fri, 24 Jun 2022 16:24:37 +0800 Subject: [PATCH 540/581] misc: nuvoton: Add host interface configuration driver add nuvoton BMC npcm750 host configuration driver Signed-off-by: Jim Liu --- drivers/misc/Kconfig | 6 ++ drivers/misc/Makefile | 1 + drivers/misc/npcm_host_intf.c | 110 ++++++++++++++++++++++++++++++++++ 3 files changed, 117 insertions(+) create mode 100644 drivers/misc/npcm_host_intf.c diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 92264e5935b..e839c08c191 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -326,6 +326,12 @@ config MXC_OCOTP Programmable memory pages that are stored on the some Freescale i.MX processors. +config NPCM_HOST + bool "Enable support espi or LPC for Host" + depends on REGMAP && SYSCON + help + Enable NPCM BMC espi or LPC support for Host reading and writing. + config SPL_MXC_OCOTP bool "Enable MXC OCOTP driver in SPL" depends on SPL_MISC && (ARCH_IMX8M || ARCH_MX6 || ARCH_MX7 || ARCH_MX7ULP || ARCH_VF610) diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 0bf05ca05ef..022e54e0650 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -57,6 +57,7 @@ obj-$(CONFIG_$(SPL_TPL_)LS2_SFP) += ls2_sfp.o obj-$(CONFIG_$(SPL_)MXC_OCOTP) += mxc_ocotp.o obj-$(CONFIG_MXS_OCOTP) += mxs_ocotp.o obj-$(CONFIG_NPCM_OTP) += npcm_otp.o +obj-$(CONFIG_NPCM_HOST) += npcm_host_intf.o obj-$(CONFIG_NUVOTON_NCT6102D) += nuvoton_nct6102d.o obj-$(CONFIG_P2SB) += p2sb-uclass.o obj-$(CONFIG_PCA9551_LED) += pca9551_led.o diff --git a/drivers/misc/npcm_host_intf.c b/drivers/misc/npcm_host_intf.c new file mode 100644 index 00000000000..0244e404570 --- /dev/null +++ b/drivers/misc/npcm_host_intf.c @@ -0,0 +1,110 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Host interface (LPC or eSPI) configuration on Nuvoton BMC + * Copyright (c) 2022 Nuvoton Technology Corp. + */ + +#include +#include +#include +#include +#include +#include +#include + +#define SMC_CTL_REG_ADDR 0xc0001001 +#define SMC_CTL_HOSTWAIT 0x80 + +/* GCR Register Offsets */ +#define HIFCR 0x50 +#define MFSEL1 0x260 +#define MFSEL4 0x26c + +/* ESPI Register offsets */ +#define ESPICFG 0x4 +#define ESPIHINDP 0x80 + +/* MFSEL bit fileds */ +#define MFSEL1_LPCSEL BIT(26) +#define MFSEL4_ESPISEL BIT(8) + +/* ESPICFG bit fileds */ +#define CHSUPP_MASK GENMASK(27, 24) +#define IOMODE_MASK GENMASK(9, 8) +#define IOMODE_SDQ FIELD_PREP(IOMODE_MASK, 3) +#define MAXFREQ_MASK GENMASK(12, 10) +#define MAXFREQ_33MHZ FIELD_PREP(MAXFREQ_MASK, 2) + +/* ESPIHINDP bit fileds */ +#define AUTO_SBLD BIT(4) +#define AUTO_HS1 BIT(8) +#define AUTO_HS2 BIT(12) +#define AUTO_HS3 BIT(16) + +static int npcm_host_intf_bind(struct udevice *dev) +{ + struct regmap *syscon; + void __iomem *base; + u32 ch_supp, val; + u32 ioaddr; + const char *type; + int ret; + + /* Release host wait */ + setbits_8(SMC_CTL_REG_ADDR, SMC_CTL_HOSTWAIT); + + syscon = syscon_regmap_lookup_by_phandle(dev, "syscon"); + if (IS_ERR(syscon)) { + dev_err(dev, "%s: unable to get syscon, dev %s\n", __func__, dev->name); + return PTR_ERR(syscon); + } + + ioaddr = dev_read_u32_default(dev, "ioaddr", 0); + if (ioaddr) + regmap_write(syscon, HIFCR, ioaddr); + + type = dev_read_string(dev, "type"); + if (!type) + return -EINVAL; + + if (!strcmp(type, "espi")) { + base = dev_read_addr_ptr(dev); + if (!base) + return -EINVAL; + + ret = dev_read_u32(dev, "channel-support", &ch_supp); + if (ret) + return ret; + + /* Select eSPI pins function */ + regmap_update_bits(syscon, MFSEL1, MFSEL1_LPCSEL, 0); + regmap_update_bits(syscon, MFSEL4, MFSEL4_ESPISEL, MFSEL4_ESPISEL); + + val = AUTO_SBLD | AUTO_HS1 | AUTO_HS2 | AUTO_HS3 | ch_supp; + writel(val, base + ESPIHINDP); + + val = readl(base + ESPICFG); + val &= ~(CHSUPP_MASK | IOMODE_MASK | MAXFREQ_MASK); + val |= IOMODE_SDQ | MAXFREQ_33MHZ | FIELD_PREP(CHSUPP_MASK, ch_supp); + writel(val, base + ESPICFG); + } else if (!strcmp(type, "lpc")) { + /* Select LPC pin function */ + regmap_update_bits(syscon, MFSEL4, MFSEL4_ESPISEL, 0); + regmap_update_bits(syscon, MFSEL1, MFSEL1_LPCSEL, MFSEL1_LPCSEL); + } + + return 0; +} + +static const struct udevice_id npcm_hostintf_ids[] = { + { .compatible = "nuvoton,npcm750-host-intf" }, + { .compatible = "nuvoton,npcm845-host-intf" }, + { } +}; + +U_BOOT_DRIVER(npcm_host_intf) = { + .name = "npcm_host_intf", + .id = UCLASS_MISC, + .of_match = npcm_hostintf_ids, + .bind = npcm_host_intf_bind, +}; -- GitLab From abba59f1155aa45daf37c59e248164387482a3c4 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 10 Jun 2022 23:03:00 -0400 Subject: [PATCH 541/581] Convert CONFIG_USB_XHCI_EXYNOS et al to Kconfig This converts the following to Kconfig: CONFIG_USB_XHCI_EXYNOS CONFIG_USB_EHCI_EXYNOS Signed-off-by: Tom Rini --- drivers/usb/host/Kconfig | 16 ++++++++++++++++ include/configs/exynos5250-common.h | 5 ----- include/configs/exynos5420-common.h | 2 -- include/configs/odroid.h | 5 ----- include/configs/odroid_xu3.h | 3 --- include/configs/smdk5420.h | 3 --- 6 files changed, 16 insertions(+), 18 deletions(-) diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 7d5bde53870..0b82c2fdaf7 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -32,6 +32,14 @@ config USB_XHCI_DWC3_OF_SIMPLE Support USB2/3 functionality in simple SoC integrations with USB controller based on the DesignWare USB3 IP Core. +config USB_XHCI_EXYNOS + bool "Support for Samsung Exynos5 family on-chip xHCI USB controller" + depends on ARCH_EXYNOS5 + default y + help + Enables support for he on-chip xHCI controller on Samsung Exynos5 + SoCs. + config USB_XHCI_MTK bool "Support for MediaTek on-chip xHCI USB controller" depends on ARCH_MEDIATEK @@ -157,6 +165,14 @@ config USB_EHCI_ATMEL ---help--- Enables support for the on-chip EHCI controller on Atmel chips. +config USB_EHCI_EXYNOS + bool "Support for Samsung Exynos EHCI USB controller" + depends on ARCH_EXYNOS + default y + ---help--- + Enables support for the on-chip EHCI controller on Samsung Exynos + SoCs. + config USB_EHCI_MARVELL bool "Support for Marvell on-chip EHCI USB controller" depends on ARCH_MVEBU || ARCH_KIRKWOOD || ARCH_ORION5X diff --git a/include/configs/exynos5250-common.h b/include/configs/exynos5250-common.h index e6f6dbe6bff..8e2f135f934 100644 --- a/include/configs/exynos5250-common.h +++ b/include/configs/exynos5250-common.h @@ -11,11 +11,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x40000000 -/* USB */ -#define CONFIG_USB_EHCI_EXYNOS - -#define CONFIG_USB_XHCI_EXYNOS - /* DRAM Memory Banks */ #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ diff --git a/include/configs/exynos5420-common.h b/include/configs/exynos5420-common.h index cfff8bb27ae..7a9307ccc3d 100644 --- a/include/configs/exynos5420-common.h +++ b/include/configs/exynos5420-common.h @@ -20,6 +20,4 @@ #define CONFIG_LOWPOWER_FLAG 0x02020028 #define CONFIG_LOWPOWER_ADDR 0x0202002C -#define CONFIG_USB_XHCI_EXYNOS - #endif /* __CONFIG_EXYNOS5420_H */ diff --git a/include/configs/odroid.h b/include/configs/odroid.h index d4cc88206bd..7448cc95203 100644 --- a/include/configs/odroid.h +++ b/include/configs/odroid.h @@ -144,11 +144,6 @@ "kernel_addr_r=0x41000000\0" \ BOOTENV -/* GPT */ - -/* USB */ -#define CONFIG_USB_EHCI_EXYNOS - /* * Supported Odroid boards: X3, U3 * TODO: Add Odroid X support diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index 35e7d7d2658..15646297423 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -16,9 +16,6 @@ #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ -/* USB */ -#define CONFIG_USB_EHCI_EXYNOS - /* DFU */ #define DFU_DEFAULT_POLL_TIMEOUT 300 #define DFU_MANIFEST_POLL_TIMEOUT 25000 diff --git a/include/configs/smdk5420.h b/include/configs/smdk5420.h index 81ae6936178..12c2e1f6159 100644 --- a/include/configs/smdk5420.h +++ b/include/configs/smdk5420.h @@ -16,9 +16,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x20000000 -/* USB */ -#define CONFIG_USB_XHCI_EXYNOS - /* DRAM Memory Banks */ #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ -- GitLab From b340199f828e7d57945785b698ff97469972d1ca Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 10 Jun 2022 23:03:09 -0400 Subject: [PATCH 542/581] spl: Ensure all SPL symbols in Kconfig have some SPL dependency MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Tighten up symbol dependencies in a number of places. Ensure that a SPL specific option has at least a direct dependency on SPL. In places where it's clear that we depend on something more specific, use that dependency instead. This means in a very small number of places we can drop redundant dependencies. Reported-by: Pali Rohár Signed-off-by: Tom Rini --- arch/arm/Kconfig | 1 - arch/arm/cpu/armv8/Kconfig | 2 ++ arch/arm/mach-imx/imx8/Kconfig | 4 ++-- arch/x86/Kconfig | 1 + boot/Kconfig | 2 +- common/Kconfig | 3 ++- configs/at91sam9n12ek_nandflash_defconfig | 4 +--- configs/at91sam9x5ek_dataflash_defconfig | 4 +--- configs/at91sam9x5ek_nandflash_defconfig | 4 +--- configs/sama5d36ek_cmp_nandflash_defconfig | 4 +--- configs/socfpga_secu1_defconfig | 1 + drivers/firmware/Kconfig | 2 +- drivers/gpio/Kconfig | 4 ++-- drivers/i2c/muxes/Kconfig | 2 +- drivers/led/Kconfig | 4 ++-- drivers/mmc/Kconfig | 6 +++++- drivers/mtd/nand/raw/Kconfig | 6 ++++-- drivers/mtd/spi/Kconfig | 2 +- drivers/power/Kconfig | 1 + drivers/power/acpi_pmc/Kconfig | 1 + drivers/power/regulator/Kconfig | 12 ++++++------ fs/cbfs/Kconfig | 1 + lib/Kconfig | 8 +++++++- lib/crypto/Kconfig | 4 ++-- lib/ecdsa/Kconfig | 1 + lib/rsa/Kconfig | 1 + test/Kconfig | 1 + 27 files changed, 50 insertions(+), 36 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ef79fc3a0a7..423fca27de6 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1119,7 +1119,6 @@ config ARCH_SOCFPGA select SPL_DM_SERIAL select SPL_LIBCOMMON_SUPPORT select SPL_LIBGENERIC_SUPPORT - select SPL_NAND_SUPPORT if SPL_NAND_DENALI select SPL_OF_CONTROL select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64 select SPL_SERIAL diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index 72d12b4e070..1305238c9d2 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -76,6 +76,7 @@ config ARMV8_SEC_FIRMWARE_SUPPORT config SPL_ARMV8_SEC_FIRMWARE_SUPPORT bool "Enable ARMv8 secure monitor firmware framework support for SPL" + depends on SPL select SPL_FIT select SPL_OF_LIBFDT help @@ -83,6 +84,7 @@ config SPL_ARMV8_SEC_FIRMWARE_SUPPORT config SPL_RECOVER_DATA_SECTION bool "save/restore SPL data section" + depends on SPL help Say Y here to save SPL data section for cold boot, and restore at warm boot in SPL phase. diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig index 8f185c192d5..2ba7454457d 100644 --- a/arch/arm/mach-imx/imx8/Kconfig +++ b/arch/arm/mach-imx/imx8/Kconfig @@ -20,13 +20,13 @@ config MU_BASE_SPL config IMX8QM select IMX8 select SUPPORT_SPL - select SPL_RECOVER_DATA_SECTION + select SPL_RECOVER_DATA_SECTION if SPL bool config IMX8QXP select IMX8 select SUPPORT_SPL - select SPL_RECOVER_DATA_SECTION + select SPL_RECOVER_DATA_SECTION if SPL bool config SYS_SOC diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 1ac43e98bb6..7e86c6a0cd0 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -945,6 +945,7 @@ config ACPI_GPE config SPL_ACPI_GPE bool "Support ACPI general-purpose events in SPL" + depends on SPL help Enable a driver for ACPI GPEs to allow peripherals to send interrupts via ACPI to the OS. In U-Boot this is only used when U-Boot itself diff --git a/boot/Kconfig b/boot/Kconfig index 945ef1ca133..ee0dc90e93c 100644 --- a/boot/Kconfig +++ b/boot/Kconfig @@ -626,7 +626,7 @@ config BOOTSTAGE config SPL_BOOTSTAGE bool "Boot timing and reported in SPL" - depends on BOOTSTAGE + depends on BOOTSTAGE && SPL help Enable recording of boot time in SPL. To make this visible to U-Boot proper, enable BOOTSTAGE_STASH as well. This will stash the timing diff --git a/common/Kconfig b/common/Kconfig index f08a8e7493d..e7914ca750a 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -83,6 +83,7 @@ config LOGLEVEL config SPL_LOGLEVEL int + depends on SPL default LOGLEVEL config TPL_LOGLEVEL @@ -358,7 +359,7 @@ config LOG_SYSLOG config SPL_LOG bool "Enable logging support in SPL" - depends on LOG + depends on LOG && SPL help This enables support for logging of status and debug messages. These can be displayed on the console, recorded in a memory buffer, or diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig index 18ec990fe3b..5ffa2944822 100644 --- a/configs/at91sam9n12ek_nandflash_defconfig +++ b/configs/at91sam9n12ek_nandflash_defconfig @@ -48,9 +48,7 @@ CONFIG_AT91_GPIO=y CONFIG_GENERIC_ATMEL_MCI=y CONFIG_MTD=y CONFIG_NAND_ATMEL=y -CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y -CONFIG_SYS_NAND_PAGE_SIZE=0x800 -CONFIG_SYS_NAND_OOBSIZE=0x40 +CONFIG_ATMEL_NAND_HW_PMECC=y CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=30000000 CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig index 6e36b60ce05..da37fb507a9 100644 --- a/configs/at91sam9x5ek_dataflash_defconfig +++ b/configs/at91sam9x5ek_dataflash_defconfig @@ -55,9 +55,7 @@ CONFIG_GENERIC_ATMEL_MCI=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_ATMEL=y -CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y -CONFIG_SYS_NAND_PAGE_SIZE=0x800 -CONFIG_SYS_NAND_OOBSIZE=0x40 +CONFIG_ATMEL_NAND_HW_PMECC=y CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=30000000 CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig index a32eb130f1b..9d581734f94 100644 --- a/configs/at91sam9x5ek_nandflash_defconfig +++ b/configs/at91sam9x5ek_nandflash_defconfig @@ -54,9 +54,7 @@ CONFIG_AT91_GPIO=y CONFIG_GENERIC_ATMEL_MCI=y CONFIG_MTD=y CONFIG_NAND_ATMEL=y -CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y -CONFIG_SYS_NAND_PAGE_SIZE=0x800 -CONFIG_SYS_NAND_OOBSIZE=0x40 +CONFIG_ATMEL_NAND_HW_PMECC=y CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=30000000 CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig index 0139ebefe2f..2fd58b07bd1 100644 --- a/configs/sama5d36ek_cmp_nandflash_defconfig +++ b/configs/sama5d36ek_cmp_nandflash_defconfig @@ -53,11 +53,9 @@ CONFIG_AT91_GPIO=y CONFIG_GENERIC_ATMEL_MCI=y CONFIG_MTD=y CONFIG_NAND_ATMEL=y +CONFIG_ATMEL_NAND_HW_PMECC=y CONFIG_PMECC_CAP=4 -CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SYS_NAND_ONFI_DETECTION=y -CONFIG_SYS_NAND_PAGE_SIZE=0x800 -CONFIG_SYS_NAND_OOBSIZE=0x40 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=30000000 CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig index 72cf0d1bc88..4a244e17bc4 100644 --- a/configs/socfpga_secu1_defconfig +++ b/configs/socfpga_secu1_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_STACK=0x0 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE is not set CONFIG_SPL_MTD_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig index f10d1aaf4b6..eae1c8ddc9f 100644 --- a/drivers/firmware/Kconfig +++ b/drivers/firmware/Kconfig @@ -3,7 +3,7 @@ config FIRMWARE config SPL_FIRMWARE bool "Enable Firmware driver support in SPL" - depends on FIRMWARE + depends on FIRMWARE && SPL config SPL_ARM_PSCI_FW bool diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 149a62ffe61..8ab22ed8173 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -89,7 +89,7 @@ config DM_GPIO_LOOKUP_LABEL config SPL_DM_GPIO_LOOKUP_LABEL bool "Enable searching for gpio labelnames" - depends on DM_GPIO && SPL_DM && SPL_GPIO + depends on SPL_DM_GPIO help This option enables searching for gpio names in the defined gpio labels, if the search for the @@ -490,7 +490,7 @@ config DM_PCA953X config SPL_DM_PCA953X bool "PCA95[357]x, PCA9698, TCA64xx, and MAX7310 I/O ports in SPL" - depends on DM_GPIO + depends on SPL_DM_GPIO help Say yes here to provide access to several register-oriented SMBus I/O expanders, made mostly by NXP or TI. Compatible diff --git a/drivers/i2c/muxes/Kconfig b/drivers/i2c/muxes/Kconfig index 39683fc43b4..323c4fbe9cc 100644 --- a/drivers/i2c/muxes/Kconfig +++ b/drivers/i2c/muxes/Kconfig @@ -9,7 +9,7 @@ config I2C_MUX config SPL_I2C_MUX bool "Support I2C multiplexers on SPL" - depends on I2C_MUX + depends on SPL && I2C_MUX help This enables I2C buses to be multiplexed, so that you can select one of several buses using some sort of control mechanism. The diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig index 418ed215c57..ccdd7d7395c 100644 --- a/drivers/led/Kconfig +++ b/drivers/led/Kconfig @@ -67,7 +67,7 @@ config LED_BLINK config SPL_LED bool "Enable LED support in SPL" - depends on SPL && SPL_DM + depends on SPL_DM help The LED subsystem adds a small amount of overhead to the image. If this is acceptable and you have a need to use LEDs in SPL, @@ -85,7 +85,7 @@ config LED_GPIO config SPL_LED_GPIO bool "LED support for GPIO-connected LEDs in SPL" - depends on SPL_LED && DM_GPIO + depends on SPL_LED && SPL_DM_GPIO help This option is an SPL-variant of the LED_GPIO option. See the help of LED_GPIO for details. diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index b44cd98150f..fd444219315 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -123,6 +123,7 @@ config MMC_IO_VOLTAGE config SPL_MMC_IO_VOLTAGE bool "Support IO voltage configuration in SPL" + depends on SPL_MMC help IO voltage configuration allows selecting the voltage level of the IO lines (not the level of main supply). This is required for UHS @@ -153,6 +154,7 @@ config MMC_HS400_ES_SUPPORT config SPL_MMC_HS400_ES_SUPPORT bool "enable HS400 Enhanced Strobe support in SPL" + depends on SPL_MMC help The HS400 Enhanced Strobe mode is support by some eMMC. The bus frequency is up to 200MHz. This mode does not tune the IO. @@ -166,6 +168,7 @@ config MMC_HS400_SUPPORT config SPL_MMC_HS400_SUPPORT bool "enable HS400 support in SPL" + depends on SPL_MMC select SPL_MMC_HS200_SUPPORT help The HS400 mode is support by some eMMC. The bus frequency is up to @@ -179,6 +182,7 @@ config MMC_HS200_SUPPORT config SPL_MMC_HS200_SUPPORT bool "enable HS200 support in SPL" + depends on SPL_MMC help The HS200 mode is support by some eMMC. The bus frequency is up to 200MHz. This mode requires tuning the IO. @@ -478,7 +482,7 @@ config MMC_SDHCI_ADMA config SPL_MMC_SDHCI_ADMA bool "Support SDHCI ADMA2 in SPL" - depends on MMC_SDHCI + depends on SPL_MMC && MMC_SDHCI select MMC_SDHCI_ADMA_HELPERS help This enables support for the ADMA (Advanced DMA) defined diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index 4129a33866b..190300fc179 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -73,6 +73,7 @@ config PMECC_SECTOR_SIZE config SPL_GENERATE_ATMEL_PMECC_HEADER bool "Atmel PMECC Header Generation" + depends on SPL select ATMEL_NAND_HWECC select ATMEL_NAND_HW_PMECC help @@ -647,7 +648,7 @@ config SYS_NAND_U_BOOT_OFFS_REDUND config SPL_NAND_AM33XX_BCH bool "Enables SPL-NAND driver which supports ELM based" - depends on NAND_OMAP_GPMC && !OMAP34XX + depends on SPL_NAND_SUPPORT && NAND_OMAP_GPMC && !OMAP34XX default y help Hardware ECC correction. This is useful for platforms which have ELM @@ -658,6 +659,7 @@ config SPL_NAND_AM33XX_BCH config SPL_NAND_DENALI bool "Support Denali NAND controller for SPL" + depends on SPL_NAND_SUPPORT help This is a small implementation of the Denali NAND controller for use on SPL. @@ -673,7 +675,7 @@ config NAND_DENALI_SPARE_AREA_SKIP_BYTES config SPL_NAND_SIMPLE bool "Use simple SPL NAND driver" - depends on !SPL_NAND_AM33XX_BCH + depends on !SPL_NAND_AM33XX_BCH && SPL_NAND_SUPPORT help Support for NAND boot using simple NAND drivers that expose the cmd_ctrl() interface. diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig index f350c7e5dc2..f83876c5761 100644 --- a/drivers/mtd/spi/Kconfig +++ b/drivers/mtd/spi/Kconfig @@ -248,7 +248,7 @@ config SPI_FLASH_MTD config SPL_SPI_FLASH_MTD bool "SPI flash MTD support for SPL" - depends on SPI_FLASH + depends on SPI_FLASH && SPL help Enable the MTD support for the SPI flash layer in SPL. diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig index 2c20dc7c831..0af53a6c67f 100644 --- a/drivers/power/Kconfig +++ b/drivers/power/Kconfig @@ -29,6 +29,7 @@ config POWER_LEGACY config SPL_POWER_LEGACY bool "Legacy power support in SPL" + depends on SPL && !SPL_DM_PMIC default y if POWER_LEGACY help Note: This is a legacy option. Use SPL_DM_PMIC instead. diff --git a/drivers/power/acpi_pmc/Kconfig b/drivers/power/acpi_pmc/Kconfig index 355d1618c61..629acb07142 100644 --- a/drivers/power/acpi_pmc/Kconfig +++ b/drivers/power/acpi_pmc/Kconfig @@ -8,6 +8,7 @@ config ACPI_PMC config SPL_ACPI_PMC bool "Power Manager (x86 PMC) support in SPL" + depends on SPL default y if ACPI_PMC help Enable support for an x86-style power-management controller which diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig index d6cea8ec666..c519e066ef0 100644 --- a/drivers/power/regulator/Kconfig +++ b/drivers/power/regulator/Kconfig @@ -55,7 +55,7 @@ config DM_REGULATOR_BD71837 config SPL_DM_REGULATOR_BD71837 bool "Enable Driver Model for ROHM BD71837/BD71847 regulators in SPL" - depends on DM_REGULATOR_BD71837 + depends on DM_REGULATOR_BD71837 && SPL help This config enables implementation of driver-model regulator uclass features for regulators on ROHM BD71837 and BD71847 in SPL. @@ -70,7 +70,7 @@ config DM_REGULATOR_PCA9450 config SPL_DM_REGULATOR_PCA9450 bool "Enable Driver Model for NXP PCA9450 regulators in SPL" - depends on DM_REGULATOR_PCA9450 + depends on DM_REGULATOR_PCA9450 && SPL help This config enables implementation of driver-model regulator uclass features for regulators on ROHM PCA9450 in SPL. @@ -115,7 +115,7 @@ config REGULATOR_PWM config SPL_REGULATOR_PWM bool "Enable Driver for PWM regulators in SPL" - depends on REGULATOR_PWM + depends on REGULATOR_PWM && SPL help This config enables implementation of driver-model regulator uclass features for PWM regulators in SPL. @@ -163,7 +163,7 @@ config DM_REGULATOR_FIXED config SPL_DM_REGULATOR_FIXED bool "Enable Driver Model for REGULATOR Fixed value in SPL" - depends on DM_REGULATOR_FIXED + depends on DM_REGULATOR_FIXED && SPL select SPL_DM_REGULATOR_COMMON ---help--- This config enables implementation of driver-model regulator uclass @@ -345,7 +345,7 @@ config SPL_DM_REGULATOR_STPMIC1 config SPL_DM_REGULATOR_PALMAS bool "Enable driver for PALMAS PMIC regulators" - depends on SPL_PMIC_PALMAS + depends on SPL_PMIC_PALMAS help This enables implementation of driver-model regulator uclass features for REGULATOR PALMAS and the family of PALMAS PMICs. @@ -353,7 +353,7 @@ config SPL_DM_REGULATOR_PALMAS config SPL_DM_REGULATOR_LP87565 bool "Enable driver for LP87565 PMIC regulators" - depends on SPL_PMIC_LP87565 + depends on SPL_PMIC_LP87565 help This enables implementation of driver-model regulator uclass features for REGULATOR LP87565 and the family of LP87565 PMICs. diff --git a/fs/cbfs/Kconfig b/fs/cbfs/Kconfig index 03980d830d3..b6639928f4a 100644 --- a/fs/cbfs/Kconfig +++ b/fs/cbfs/Kconfig @@ -9,6 +9,7 @@ config FS_CBFS config SPL_FS_CBFS bool "Enable CBFS (Coreboot Filesystem) in SPL" + depends on SPL help Define this to enable support for reading from a Coreboot filesystem. This is a ROM-based filesystem used for accessing files diff --git a/lib/Kconfig b/lib/Kconfig index c9f9ddce7d0..7dd777b56a7 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -239,6 +239,7 @@ config GENERATE_ACPI_TABLE config SPL_TINY_MEMSET bool "Use a very small memset() in SPL" + depends on SPL help The faster memset() is the arch-specific one (if available) enabled by CONFIG_USE_ARCH_MEMSET. If that is not enabled, we can still get @@ -557,6 +558,7 @@ config MD5 config SPL_MD5 bool "Support MD5 algorithm in SPL" + depends on SPL help This option enables MD5 support in SPL. MD5 is an algorithm designed in 1991 that produces a 16-byte digest (or checksum) from its input @@ -643,6 +645,7 @@ config ZSTD config SPL_LZ4 bool "Enable LZ4 decompression support in SPL" + depends on SPL help This enables support for the LZ4 decompression algorithm in SPL. LZ4 is a lossless data compression algorithm that is focused on @@ -651,6 +654,7 @@ config SPL_LZ4 config SPL_LZMA bool "Enable LZMA decompression support for SPL build" + depends on SPL help This enables support for LZMA compression algorithm for SPL boot. @@ -662,6 +666,7 @@ config VPL_LZMA config SPL_LZO bool "Enable LZO decompression support in SPL" + depends on SPL help This enables support for LZO compression algorithm in the SPL. @@ -678,6 +683,7 @@ config SPL_ZLIB config SPL_ZSTD bool "Enable Zstandard decompression support in SPL" + depends on SPL select XXHASH help This enables Zstandard decompression library in the SPL. @@ -750,7 +756,7 @@ config SPL_OF_LIBFDT config SPL_OF_LIBFDT_ASSUME_MASK hex "Mask of conditions to assume for libfdt" - depends on SPL_OF_LIBFDT || FIT + depends on SPL_OF_LIBFDT || (FIT && SPL) default 0xff help Use this to change the assumptions made by libfdt in SPL about the diff --git a/lib/crypto/Kconfig b/lib/crypto/Kconfig index 1c04a7ec5f4..152eb2a9cac 100644 --- a/lib/crypto/Kconfig +++ b/lib/crypto/Kconfig @@ -28,7 +28,7 @@ config ASYMMETRIC_PUBLIC_KEY_SUBTYPE config SPL_ASYMMETRIC_PUBLIC_KEY_SUBTYPE bool "Asymmetric public-key crypto algorithm subtype within SPL" - depends on ASYMMETRIC_PUBLIC_KEY_SUBTYPE + depends on ASYMMETRIC_PUBLIC_KEY_SUBTYPE && SPL help This option provides support for asymmetric public key type handling in the SPL. If signature generation and/or verification are to be used, @@ -48,7 +48,7 @@ config RSA_PUBLIC_KEY_PARSER config SPL_RSA_PUBLIC_KEY_PARSER bool "RSA public key parser within SPL" - depends on ASYMMETRIC_PUBLIC_KEY_SUBTYPE + depends on ASYMMETRIC_PUBLIC_KEY_SUBTYPE && SPL select SPL_ASN1_DECODER select ASN1_COMPILER select SPL_OID_REGISTRY diff --git a/lib/ecdsa/Kconfig b/lib/ecdsa/Kconfig index a95c4ff581f..5c3d67d8144 100644 --- a/lib/ecdsa/Kconfig +++ b/lib/ecdsa/Kconfig @@ -17,6 +17,7 @@ config ECDSA_VERIFY config SPL_ECDSA_VERIFY bool "Enable ECDSA verification support in SPL" + depends on SPL help Allow ECDSA signatures to be recognized and verified in SPL. diff --git a/lib/rsa/Kconfig b/lib/rsa/Kconfig index b773f17c261..9033384e60a 100644 --- a/lib/rsa/Kconfig +++ b/lib/rsa/Kconfig @@ -18,6 +18,7 @@ if RSA config SPL_RSA bool "Use RSA Library within SPL" + depends on SPL config SPL_RSA_VERIFY bool diff --git a/test/Kconfig b/test/Kconfig index 7f3447ae5ac..9b283a57ba9 100644 --- a/test/Kconfig +++ b/test/Kconfig @@ -8,6 +8,7 @@ menuconfig UNIT_TEST config SPL_UNIT_TEST bool "Unit tests in SPL" + depends on SPL # We need to be able to unbind devices for tests to work select SPL_DM_DEVICE_REMOVE help -- GitLab From cd6a45a41fb2c19884ac87afade87b4d53601929 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 25 Jun 2022 11:02:31 -0400 Subject: [PATCH 543/581] Convert CONFIG_USB_OHCI_NEW et al to Kconfig This converts the following to Kconfig: CONFIG_SYS_OHCI_SWAP_REG_ACCESS CONFIG_SYS_USB_OHCI_CPU_INIT CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS CONFIG_SYS_USB_OHCI_SLOT_NAME CONFIG_USB_ATMEL CONFIG_USB_ATMEL_CLK_SEL_PLLB CONFIG_USB_ATMEL_CLK_SEL_UPLL CONFIG_USB_OHCI_LPC32XX CONFIG_USB_OHCI_NEW Signed-off-by: Tom Rini --- arch/arm/include/asm/arch-lpc32xx/config.h | 4 -- configs/at91sam9260ek_dataflash_cs0_defconfig | 3 ++ configs/at91sam9260ek_dataflash_cs1_defconfig | 3 ++ configs/at91sam9260ek_nandflash_defconfig | 3 ++ configs/at91sam9261ek_dataflash_cs0_defconfig | 3 ++ configs/at91sam9261ek_dataflash_cs3_defconfig | 3 ++ configs/at91sam9261ek_nandflash_defconfig | 3 ++ configs/at91sam9263ek_dataflash_cs0_defconfig | 3 ++ configs/at91sam9263ek_dataflash_defconfig | 3 ++ configs/at91sam9263ek_nandflash_defconfig | 3 ++ configs/at91sam9263ek_norflash_boot_defconfig | 3 ++ configs/at91sam9263ek_norflash_defconfig | 3 ++ configs/at91sam9g10ek_dataflash_cs0_defconfig | 3 ++ configs/at91sam9g10ek_dataflash_cs3_defconfig | 3 ++ configs/at91sam9g10ek_nandflash_defconfig | 3 ++ configs/at91sam9g20ek_2mmc_defconfig | 3 ++ .../at91sam9g20ek_2mmc_nandflash_defconfig | 3 ++ configs/at91sam9g20ek_dataflash_cs0_defconfig | 3 ++ configs/at91sam9g20ek_dataflash_cs1_defconfig | 3 ++ configs/at91sam9g20ek_nandflash_defconfig | 3 ++ configs/at91sam9xeek_dataflash_cs0_defconfig | 3 ++ configs/at91sam9xeek_dataflash_cs1_defconfig | 3 ++ configs/at91sam9xeek_nandflash_defconfig | 3 ++ configs/axs103_defconfig | 1 + configs/chromebook_bob_defconfig | 1 + configs/chromebook_kevin_defconfig | 1 + configs/comtrend_ar5315u_ram_defconfig | 2 + configs/comtrend_ar5387un_ram_defconfig | 2 + configs/comtrend_ct5361_ram_defconfig | 2 + configs/comtrend_vr3032u_ram_defconfig | 2 + configs/comtrend_wap5813n_ram_defconfig | 2 + configs/da850evm_defconfig | 1 + configs/da850evm_direct_nor_defconfig | 1 + configs/da850evm_nand_defconfig | 1 + configs/devkit3250_defconfig | 3 ++ configs/elgin-rv1108_defconfig | 1 + configs/evb-rk3128_defconfig | 1 + configs/evb-rk3328_defconfig | 1 + configs/evb-rv1108_defconfig | 1 + configs/hsdk_4xd_defconfig | 1 + configs/hsdk_defconfig | 1 + configs/huawei_hg556a_ram_defconfig | 2 + configs/khadas-edge-captain-rk3399_defconfig | 1 + configs/khadas-edge-rk3399_defconfig | 1 + configs/khadas-edge-v-rk3399_defconfig | 1 + configs/nanopi-r2s-rk3328_defconfig | 1 + configs/netgear_dgnd3700v2_ram_defconfig | 2 + configs/omapl138_lcdk_defconfig | 1 + configs/pinebook-pro-rk3399_defconfig | 1 + configs/pm9261_defconfig | 3 ++ configs/pm9263_defconfig | 3 ++ configs/roc-cc-rk3328_defconfig | 1 + configs/rock-pi-e-rk3328_defconfig | 1 + configs/rock64-rk3328_defconfig | 1 + configs/rock960-rk3399_defconfig | 1 + configs/rockpro64-rk3399_defconfig | 1 + configs/sama5d3_xplained_mmc_defconfig | 3 ++ configs/sama5d3_xplained_nandflash_defconfig | 3 ++ configs/sfr_nb4-ser_ram_defconfig | 2 + configs/smartweb_defconfig | 2 + configs/socrates_defconfig | 2 + configs/stih410-b2260_defconfig | 1 + configs/taurus_defconfig | 2 + configs/vexpress_aemv8a_juno_defconfig | 1 + drivers/usb/host/Kconfig | 44 +++++++++++++++++++ drivers/usb/host/ohci-at91.c | 5 --- drivers/usb/host/ohci-generic.c | 4 -- drivers/usb/host/ohci.h | 2 +- include/configs/at91sam9260ek.h | 6 --- include/configs/at91sam9261ek.h | 10 ----- include/configs/at91sam9263ek.h | 6 --- include/configs/at91sam9n12ek.h | 6 --- include/configs/at91sam9x5ek.h | 6 --- include/configs/axs10x.h | 2 - include/configs/bmips_bcm6318.h | 7 --- include/configs/bmips_bcm63268.h | 7 --- include/configs/bmips_bcm6328.h | 7 --- include/configs/bmips_bcm6348.h | 7 --- include/configs/bmips_bcm6358.h | 7 --- include/configs/bmips_bcm6362.h | 7 --- include/configs/bmips_bcm6368.h | 7 --- include/configs/da850evm.h | 4 -- include/configs/devkit3250.h | 1 - include/configs/ethernut5.h | 6 --- include/configs/evb_rk3399.h | 3 -- include/configs/gru.h | 3 -- include/configs/hsdk-4xd.h | 6 --- include/configs/hsdk.h | 6 --- include/configs/omapl138_lcdk.h | 6 --- include/configs/pinebook-pro-rk3399.h | 3 -- include/configs/pm9261.h | 6 --- include/configs/pm9263.h | 6 --- include/configs/rk3128_common.h | 3 -- include/configs/rk3328_common.h | 4 -- include/configs/rock960_rk3399.h | 3 -- include/configs/rockpro64_rk3399.h | 3 -- include/configs/rv1108_common.h | 2 - include/configs/sama5d3_xplained.h | 6 --- include/configs/sama5d3xek.h | 5 --- include/configs/smartweb.h | 6 --- include/configs/snapper9260.h | 6 --- include/configs/socrates.h | 4 -- include/configs/stih410-b2260.h | 2 - include/configs/sunxi-common.h | 5 --- include/configs/taurus.h | 6 --- include/configs/usb_a9263.h | 5 --- include/configs/vexpress_aemv8.h | 5 --- 107 files changed, 173 insertions(+), 214 deletions(-) diff --git a/arch/arm/include/asm/arch-lpc32xx/config.h b/arch/arm/include/asm/arch-lpc32xx/config.h index 653792c610c..32d68cbeb81 100644 --- a/arch/arm/include/asm/arch-lpc32xx/config.h +++ b/arch/arm/include/asm/arch-lpc32xx/config.h @@ -52,11 +52,7 @@ /* USB OHCI */ #if defined(CONFIG_USB_OHCI_LPC32XX) -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_CPU_INIT -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 #define CONFIG_SYS_USB_OHCI_REGS_BASE USB_BASE -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "lpc32xx-ohci" #endif #endif /* _LPC32XX_CONFIG_H */ diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig index 9947d1d4c67..62b467ea309 100644 --- a/configs/at91sam9260ek_dataflash_cs0_defconfig +++ b/configs/at91sam9260ek_dataflash_cs0_defconfig @@ -65,3 +65,6 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig index 8e54f1b1335..a5ccce1eae2 100644 --- a/configs/at91sam9260ek_dataflash_cs1_defconfig +++ b/configs/at91sam9260ek_dataflash_cs1_defconfig @@ -65,3 +65,6 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/at91sam9260ek_nandflash_defconfig b/configs/at91sam9260ek_nandflash_defconfig index 1badceeb2c1..d3706d158b7 100644 --- a/configs/at91sam9260ek_nandflash_defconfig +++ b/configs/at91sam9260ek_nandflash_defconfig @@ -63,3 +63,6 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig index 8b2f27a406e..d479d76c79e 100644 --- a/configs/at91sam9261ek_dataflash_cs0_defconfig +++ b/configs/at91sam9261ek_dataflash_cs0_defconfig @@ -65,4 +65,7 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9261" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y CONFIG_ATMEL_LCD_BGR555=y diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig index e5350cfd6fe..96c44e9a162 100644 --- a/configs/at91sam9261ek_dataflash_cs3_defconfig +++ b/configs/at91sam9261ek_dataflash_cs3_defconfig @@ -65,4 +65,7 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9261" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y CONFIG_ATMEL_LCD_BGR555=y diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig index 3557c4e57a6..16de5195119 100644 --- a/configs/at91sam9261ek_nandflash_defconfig +++ b/configs/at91sam9261ek_nandflash_defconfig @@ -63,4 +63,7 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9261" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y CONFIG_ATMEL_LCD_BGR555=y diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig index aa69b0f97a0..e73ff8861be 100644 --- a/configs/at91sam9263ek_dataflash_cs0_defconfig +++ b/configs/at91sam9263ek_dataflash_cs0_defconfig @@ -68,4 +68,7 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9263" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y CONFIG_ATMEL_LCD_BGR555=y diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig index aa69b0f97a0..e73ff8861be 100644 --- a/configs/at91sam9263ek_dataflash_defconfig +++ b/configs/at91sam9263ek_dataflash_defconfig @@ -68,4 +68,7 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9263" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y CONFIG_ATMEL_LCD_BGR555=y diff --git a/configs/at91sam9263ek_nandflash_defconfig b/configs/at91sam9263ek_nandflash_defconfig index f88ea5cc3dc..184431640e6 100644 --- a/configs/at91sam9263ek_nandflash_defconfig +++ b/configs/at91sam9263ek_nandflash_defconfig @@ -66,4 +66,7 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9263" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y CONFIG_ATMEL_LCD_BGR555=y diff --git a/configs/at91sam9263ek_norflash_boot_defconfig b/configs/at91sam9263ek_norflash_boot_defconfig index b93eeaa2143..7b975813928 100644 --- a/configs/at91sam9263ek_norflash_boot_defconfig +++ b/configs/at91sam9263ek_norflash_boot_defconfig @@ -68,4 +68,7 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9263" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y CONFIG_ATMEL_LCD_BGR555=y diff --git a/configs/at91sam9263ek_norflash_defconfig b/configs/at91sam9263ek_norflash_defconfig index eb2e13ccc09..2c354f3b5b5 100644 --- a/configs/at91sam9263ek_norflash_defconfig +++ b/configs/at91sam9263ek_norflash_defconfig @@ -69,4 +69,7 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9263" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y CONFIG_ATMEL_LCD_BGR555=y diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig index 818e630ea2c..ee4de9b67d6 100644 --- a/configs/at91sam9g10ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig @@ -62,3 +62,6 @@ CONFIG_ATMEL_USART=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9261" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig index 118d778d4cf..4a47ad12865 100644 --- a/configs/at91sam9g10ek_dataflash_cs3_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig @@ -62,3 +62,6 @@ CONFIG_ATMEL_USART=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9261" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/at91sam9g10ek_nandflash_defconfig b/configs/at91sam9g10ek_nandflash_defconfig index bf667606a2a..0e3d0b13140 100644 --- a/configs/at91sam9g10ek_nandflash_defconfig +++ b/configs/at91sam9g10ek_nandflash_defconfig @@ -60,3 +60,6 @@ CONFIG_ATMEL_USART=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9261" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/at91sam9g20ek_2mmc_defconfig b/configs/at91sam9g20ek_2mmc_defconfig index d175575f791..add019c10af 100644 --- a/configs/at91sam9g20ek_2mmc_defconfig +++ b/configs/at91sam9g20ek_2mmc_defconfig @@ -66,3 +66,6 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig b/configs/at91sam9g20ek_2mmc_nandflash_defconfig index 2ea5bbd0340..72a21c3da94 100644 --- a/configs/at91sam9g20ek_2mmc_nandflash_defconfig +++ b/configs/at91sam9g20ek_2mmc_nandflash_defconfig @@ -65,3 +65,6 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig index 304ee157bb7..03b029cee8d 100644 --- a/configs/at91sam9g20ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig @@ -65,3 +65,6 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig index a93ae955a57..1ae1b28feef 100644 --- a/configs/at91sam9g20ek_dataflash_cs1_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig @@ -65,3 +65,6 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/at91sam9g20ek_nandflash_defconfig b/configs/at91sam9g20ek_nandflash_defconfig index 4c51e7a3355..77ad4b9fda2 100644 --- a/configs/at91sam9g20ek_nandflash_defconfig +++ b/configs/at91sam9g20ek_nandflash_defconfig @@ -63,3 +63,6 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig index 9947d1d4c67..62b467ea309 100644 --- a/configs/at91sam9xeek_dataflash_cs0_defconfig +++ b/configs/at91sam9xeek_dataflash_cs0_defconfig @@ -65,3 +65,6 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig index 8e54f1b1335..a5ccce1eae2 100644 --- a/configs/at91sam9xeek_dataflash_cs1_defconfig +++ b/configs/at91sam9xeek_dataflash_cs1_defconfig @@ -65,3 +65,6 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/at91sam9xeek_nandflash_defconfig b/configs/at91sam9xeek_nandflash_defconfig index 1badceeb2c1..d3706d158b7 100644 --- a/configs/at91sam9xeek_nandflash_defconfig +++ b/configs/at91sam9xeek_nandflash_defconfig @@ -63,3 +63,6 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig index 64407655767..0d176495822 100644 --- a/configs/axs103_defconfig +++ b/configs/axs103_defconfig @@ -62,5 +62,6 @@ CONFIG_DESIGNWARE_SPI=y CONFIG_USB=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 CONFIG_USB_STORAGE=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig index 84fe5be19d5..938bc28a1d2 100644 --- a/configs/chromebook_bob_defconfig +++ b/configs/chromebook_bob_defconfig @@ -102,6 +102,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 CONFIG_USB_DWC3=y CONFIG_USB_KEYBOARD=y CONFIG_USB_HOST_ETHER=y diff --git a/configs/chromebook_kevin_defconfig b/configs/chromebook_kevin_defconfig index 669d6f570b9..6f88002f968 100644 --- a/configs/chromebook_kevin_defconfig +++ b/configs/chromebook_kevin_defconfig @@ -103,6 +103,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 CONFIG_USB_DWC3=y CONFIG_USB_KEYBOARD=y CONFIG_USB_HOST_ETHER=y diff --git a/configs/comtrend_ar5315u_ram_defconfig b/configs/comtrend_ar5315u_ram_defconfig index 170b766089d..36eab571eaf 100644 --- a/configs/comtrend_ar5315u_ram_defconfig +++ b/configs/comtrend_ar5315u_ram_defconfig @@ -72,3 +72,5 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_SYS_OHCI_SWAP_REG_ACCESS=y diff --git a/configs/comtrend_ar5387un_ram_defconfig b/configs/comtrend_ar5387un_ram_defconfig index 599fda481aa..68969c04138 100644 --- a/configs/comtrend_ar5387un_ram_defconfig +++ b/configs/comtrend_ar5387un_ram_defconfig @@ -73,3 +73,5 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_SYS_OHCI_SWAP_REG_ACCESS=y diff --git a/configs/comtrend_ct5361_ram_defconfig b/configs/comtrend_ct5361_ram_defconfig index b1ad57b5a56..cb2caf45435 100644 --- a/configs/comtrend_ct5361_ram_defconfig +++ b/configs/comtrend_ct5361_ram_defconfig @@ -67,4 +67,6 @@ CONFIG_BCM6345_SERIAL=y CONFIG_USB=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_SYS_OHCI_SWAP_REG_ACCESS=y CONFIG_WDT_BCM6345=y diff --git a/configs/comtrend_vr3032u_ram_defconfig b/configs/comtrend_vr3032u_ram_defconfig index d07895de9b8..138d3c84bac 100644 --- a/configs/comtrend_vr3032u_ram_defconfig +++ b/configs/comtrend_vr3032u_ram_defconfig @@ -72,3 +72,5 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_SYS_OHCI_SWAP_REG_ACCESS=y diff --git a/configs/comtrend_wap5813n_ram_defconfig b/configs/comtrend_wap5813n_ram_defconfig index ca370e66a34..b7174ff5ee3 100644 --- a/configs/comtrend_wap5813n_ram_defconfig +++ b/configs/comtrend_wap5813n_ram_defconfig @@ -69,3 +69,5 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_SYS_OHCI_SWAP_REG_ACCESS=y diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index de2d709a7a2..d7348298587 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -110,6 +110,7 @@ CONFIG_USB=y # CONFIG_SPL_DM_USB is not set CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_DA8XX=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=15 CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_DA8XX=y CONFIG_USB_MUSB_PIO_ONLY=y diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig index 88ef772d9d5..8f6b8b9702f 100644 --- a/configs/da850evm_direct_nor_defconfig +++ b/configs/da850evm_direct_nor_defconfig @@ -88,6 +88,7 @@ CONFIG_DAVINCI_SPI=y CONFIG_USB=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_DA8XX=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=15 CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_DA8XX=y CONFIG_USB_MUSB_PIO_ONLY=y diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig index 052ef307033..95b41ef32b1 100644 --- a/configs/da850evm_nand_defconfig +++ b/configs/da850evm_nand_defconfig @@ -113,6 +113,7 @@ CONFIG_USB=y # CONFIG_SPL_DM_USB is not set CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_DA8XX=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=15 CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_DA8XX=y CONFIG_USB_MUSB_PIO_ONLY=y diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig index a0b7a2e2d36..eae073d76ea 100644 --- a/configs/devkit3250_defconfig +++ b/configs/devkit3250_defconfig @@ -86,4 +86,7 @@ CONFIG_CONS_INDEX=5 CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="lpc32xx-ohci" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 +CONFIG_USB_OHCI_LPC32XX=y CONFIG_OF_LIBFDT=y diff --git a/configs/elgin-rv1108_defconfig b/configs/elgin-rv1108_defconfig index 2f595be1c24..263fe3b7c8d 100644 --- a/configs/elgin-rv1108_defconfig +++ b/configs/elgin-rv1108_defconfig @@ -55,6 +55,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 CONFIG_USB_DWC2=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_PRODUCT_NUM=0x110a diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig index e0fb3f62b45..ac38d5e7885 100644 --- a/configs/evb-rk3128_defconfig +++ b/configs/evb-rk3128_defconfig @@ -51,6 +51,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 CONFIG_USB_DWC2=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DWC2_OTG=y diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig index 4d6d235cb12..c81437300c7 100644 --- a/configs/evb-rk3328_defconfig +++ b/configs/evb-rk3328_defconfig @@ -99,6 +99,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 CONFIG_USB_DWC2=y CONFIG_USB_DWC3=y # CONFIG_USB_DWC3_GADGET is not set diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig index dbca68fcf30..65b76c6b36d 100644 --- a/configs/evb-rv1108_defconfig +++ b/configs/evb-rv1108_defconfig @@ -49,6 +49,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 CONFIG_USB_DWC2=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_PRODUCT_NUM=0x110a diff --git a/configs/hsdk_4xd_defconfig b/configs/hsdk_4xd_defconfig index 85844f7ec88..1d78c17d13b 100644 --- a/configs/hsdk_4xd_defconfig +++ b/configs/hsdk_4xd_defconfig @@ -68,6 +68,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 CONFIG_USB_STORAGE=y CONFIG_USE_PRIVATE_LIBGCC=y CONFIG_PANIC_HANG=y diff --git a/configs/hsdk_defconfig b/configs/hsdk_defconfig index a714d28134b..f9823af34d4 100644 --- a/configs/hsdk_defconfig +++ b/configs/hsdk_defconfig @@ -67,6 +67,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 CONFIG_USB_STORAGE=y CONFIG_USE_PRIVATE_LIBGCC=y CONFIG_PANIC_HANG=y diff --git a/configs/huawei_hg556a_ram_defconfig b/configs/huawei_hg556a_ram_defconfig index 1c43ae262d8..2b5a5871410 100644 --- a/configs/huawei_hg556a_ram_defconfig +++ b/configs/huawei_hg556a_ram_defconfig @@ -69,3 +69,5 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_SYS_OHCI_SWAP_REG_ACCESS=y diff --git a/configs/khadas-edge-captain-rk3399_defconfig b/configs/khadas-edge-captain-rk3399_defconfig index e9618e3e207..9a0171e4a8a 100644 --- a/configs/khadas-edge-captain-rk3399_defconfig +++ b/configs/khadas-edge-captain-rk3399_defconfig @@ -65,6 +65,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX88179=y diff --git a/configs/khadas-edge-rk3399_defconfig b/configs/khadas-edge-rk3399_defconfig index 252a02b579e..27f119931fb 100644 --- a/configs/khadas-edge-rk3399_defconfig +++ b/configs/khadas-edge-rk3399_defconfig @@ -64,6 +64,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX88179=y diff --git a/configs/khadas-edge-v-rk3399_defconfig b/configs/khadas-edge-v-rk3399_defconfig index 731fbfcab26..de2b625120a 100644 --- a/configs/khadas-edge-v-rk3399_defconfig +++ b/configs/khadas-edge-v-rk3399_defconfig @@ -65,6 +65,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX88179=y diff --git a/configs/nanopi-r2s-rk3328_defconfig b/configs/nanopi-r2s-rk3328_defconfig index 41793ca7e48..15c2e1698c2 100644 --- a/configs/nanopi-r2s-rk3328_defconfig +++ b/configs/nanopi-r2s-rk3328_defconfig @@ -102,6 +102,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 CONFIG_USB_DWC2=y CONFIG_USB_DWC3=y # CONFIG_USB_DWC3_GADGET is not set diff --git a/configs/netgear_dgnd3700v2_ram_defconfig b/configs/netgear_dgnd3700v2_ram_defconfig index bbfa9e13fa3..73de5ed15b1 100644 --- a/configs/netgear_dgnd3700v2_ram_defconfig +++ b/configs/netgear_dgnd3700v2_ram_defconfig @@ -68,3 +68,5 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_SYS_OHCI_SWAP_REG_ACCESS=y diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index b45f6d8564e..28f4f95c95b 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -105,6 +105,7 @@ CONFIG_USB=y # CONFIG_SPL_DM_USB is not set CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_DA8XX=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=15 CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_DA8XX=y CONFIG_USB_MUSB_PIO_ONLY=y diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig index 121182c55d7..af473f91367 100644 --- a/configs/pinebook-pro-rk3399_defconfig +++ b/configs/pinebook-pro-rk3399_defconfig @@ -90,6 +90,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_KEYBOARD=y diff --git a/configs/pm9261_defconfig b/configs/pm9261_defconfig index c22076250bc..6922380b009 100644 --- a/configs/pm9261_defconfig +++ b/configs/pm9261_defconfig @@ -61,6 +61,9 @@ CONFIG_ATMEL_USART=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9261" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y CONFIG_DM_VIDEO=y # CONFIG_VIDEO_BPP32 is not set CONFIG_ATMEL_LCD=y diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig index 1406e7f1aa4..2b4a844d804 100644 --- a/configs/pm9263_defconfig +++ b/configs/pm9263_defconfig @@ -65,6 +65,9 @@ CONFIG_ATMEL_USART=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9263" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y CONFIG_DM_VIDEO=y # CONFIG_VIDEO_BPP32 is not set CONFIG_ATMEL_LCD=y diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig index ab25abc1a03..43b90c7879b 100644 --- a/configs/roc-cc-rk3328_defconfig +++ b/configs/roc-cc-rk3328_defconfig @@ -108,6 +108,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 CONFIG_USB_DWC2=y CONFIG_USB_DWC3=y # CONFIG_USB_DWC3_GADGET is not set diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig index 1d51a267b93..7d95e171f7f 100644 --- a/configs/rock-pi-e-rk3328_defconfig +++ b/configs/rock-pi-e-rk3328_defconfig @@ -109,6 +109,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 CONFIG_USB_DWC2=y CONFIG_USB_DWC3=y # CONFIG_USB_DWC3_GADGET is not set diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig index 640fe558d41..bc333a5e2a6 100644 --- a/configs/rock64-rk3328_defconfig +++ b/configs/rock64-rk3328_defconfig @@ -106,6 +106,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 CONFIG_USB_DWC2=y CONFIG_USB_DWC3=y # CONFIG_USB_DWC3_GADGET is not set diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig index 78e50dbfbcb..bb5b2143691 100644 --- a/configs/rock960-rk3399_defconfig +++ b/configs/rock960-rk3399_defconfig @@ -74,6 +74,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 CONFIG_USB_DWC3=y CONFIG_USB_KEYBOARD=y CONFIG_USB_HOST_ETHER=y diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig index 4d2a5b32e31..ef28fe6a937 100644 --- a/configs/rockpro64-rk3399_defconfig +++ b/configs/rockpro64-rk3399_defconfig @@ -87,6 +87,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_KEYBOARD=y diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index 84832605123..486e2190b2b 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -104,6 +104,9 @@ CONFIG_ATMEL_PIT_TIMER=y CONFIG_SPL_ATMEL_PIT_TIMER=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y +CONFIG_USB_ATMEL_CLK_SEL_UPLL=y CONFIG_USB_STORAGE=y CONFIG_W1=y CONFIG_W1_GPIO=y diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index f12c5d79172..184ff5ff724 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -107,6 +107,9 @@ CONFIG_ATMEL_PIT_TIMER=y CONFIG_SPL_ATMEL_PIT_TIMER=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y +CONFIG_USB_ATMEL_CLK_SEL_UPLL=y CONFIG_USB_STORAGE=y CONFIG_W1=y CONFIG_W1_GPIO=y diff --git a/configs/sfr_nb4-ser_ram_defconfig b/configs/sfr_nb4-ser_ram_defconfig index 6f261882faa..df008b797f8 100644 --- a/configs/sfr_nb4-ser_ram_defconfig +++ b/configs/sfr_nb4-ser_ram_defconfig @@ -71,3 +71,5 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_SYS_OHCI_SWAP_REG_ACCESS=y diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig index 4e05f71bf3a..84337e49e6c 100644 --- a/configs/smartweb_defconfig +++ b/configs/smartweb_defconfig @@ -92,6 +92,8 @@ CONFIG_MACB=y CONFIG_RMII=y CONFIG_ATMEL_USART=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Siemens AG" CONFIG_USB_GADGET_VENDOR_NUM=0x0908 diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig index 28ea447ec55..62157365378 100644 --- a/configs/socrates_defconfig +++ b/configs/socrates_defconfig @@ -96,4 +96,6 @@ CONFIG_USB=y # CONFIG_USB_EHCI_HCD is not set CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_PCI=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=15 +CONFIG_SYS_OHCI_SWAP_REG_ACCESS=y CONFIG_USB_STORAGE=y diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig index 198a0c7f9e5..cb8c73afd47 100644 --- a/configs/stih410-b2260_defconfig +++ b/configs/stih410-b2260_defconfig @@ -58,6 +58,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 CONFIG_USB_DWC3=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig index cf538d0f5f5..3d61c7b57b5 100644 --- a/configs/taurus_defconfig +++ b/configs/taurus_defconfig @@ -110,6 +110,8 @@ CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_ATMEL_USART=y CONFIG_USB=y # CONFIG_SPL_DM_USB is not set +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Siemens AG" CONFIG_USB_GADGET_VENDOR_NUM=0x0908 diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig index ba8883dced5..792bcf1eb5d 100644 --- a/configs/vexpress_aemv8a_juno_defconfig +++ b/configs/vexpress_aemv8a_juno_defconfig @@ -35,3 +35,4 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_DM_ETH=y CONFIG_PCI=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 0b82c2fdaf7..31ae9f74e7a 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -297,10 +297,17 @@ config USB_EHCI_TXFIFO_THRESH endif # USB_EHCI_HCD +config USB_OHCI_NEW + bool + +config SYS_USB_OHCI_CPU_INIT + bool + config USB_OHCI_HCD bool "OHCI HCD (USB 1.1) support" depends on DM && OF_CONTROL select USB_HOST + select USB_OHCI_NEW ---help--- The Open Host Controller Interface (OHCI) is a standard for accessing USB 1.1 host controller hardware. It does more in hardware than Intel's @@ -332,6 +339,19 @@ config USB_OHCI_DA8XX endif # USB_OHCI_HCD +config SYS_USB_OHCI_SLOT_NAME + string "Display name for the OHCI controller" + depends on USB_OHCI_NEW && !DM_USB + +config SYS_USB_OHCI_MAX_ROOT_PORTS + int "Maximal number of ports of the root hub" + depends on USB_OHCI_NEW + default 1 if ARCH_SUNXI + +config SYS_OHCI_SWAP_REG_ACCESS + bool "Perform byte swapping on OHCI controller register accesses" + depends on USB_OHCI_NEW + config USB_UHCI_HCD bool "UHCI HCD (most Intel and VIA) support" select USB_HOST @@ -381,6 +401,30 @@ config USB_R8A66597_HCD This enables support for the on-chip Renesas R8A66597 USB 2.0 controller, present in various RZ and SH SoCs. +config USB_ATMEL + bool "AT91 OHCI USB support" + depends on ARCH_AT91 + select SYS_USB_OHCI_CPU_INIT + select USB_OHCI_NEW + +choice + prompt "Clock for OHCI" + depends on USB_ATMEL + +config USB_ATMEL_CLK_SEL_PLLB + bool "PLLB" + +config USB_ATMEL_CLK_SEL_UPLL + bool "UPLL" + +endchoice + +config USB_OHCI_LPC32XX + bool "LPC32xx USB OHCI support" + depends on ARCH_LPC32XX + select SYS_USB_OHCI_CPU_INIT + select USB_OHCI_NEW + config USB_MAX_CONTROLLER_COUNT int "Maximum number of USB host controllers" depends on USB_EHCI_FSL || USB_XHCI_FSL || \ diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c index 8ceabaf45c1..9b955c1bd67 100644 --- a/drivers/usb/host/ohci-at91.c +++ b/drivers/usb/host/ohci-at91.c @@ -5,9 +5,6 @@ */ #include - -#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) - #include int usb_cpu_init(void) @@ -65,5 +62,3 @@ int usb_cpu_init_fail(void) { return usb_cpu_stop(); } - -#endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */ diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c index 163f0ef17b1..5d23058aaf6 100644 --- a/drivers/usb/host/ohci-generic.c +++ b/drivers/usb/host/ohci-generic.c @@ -14,10 +14,6 @@ #include #include "ohci.h" -#if !defined(CONFIG_USB_OHCI_NEW) -# error "Generic OHCI driver requires CONFIG_USB_OHCI_NEW" -#endif - struct generic_ohci { ohci_t ohci; struct clk *clocks; /* clock list */ diff --git a/drivers/usb/host/ohci.h b/drivers/usb/host/ohci.h index a38cd25eb85..7699f2e6b15 100644 --- a/drivers/usb/host/ohci.h +++ b/drivers/usb/host/ohci.h @@ -151,7 +151,7 @@ struct ohci_hcca { * Maximum number of root hub ports. */ #ifndef CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS -# error "CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS undefined!" +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 #endif /* diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 2c4f229d347..ef9335c523f 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -53,12 +53,6 @@ #endif /* USB */ -#define CONFIG_USB_ATMEL -#define CONFIG_USB_ATMEL_CLK_SEL_PLLB -#define CONFIG_USB_OHCI_NEW 1 -#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */ -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #endif diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 563fff531d1..12726c10bd6 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -51,16 +51,6 @@ #define CONFIG_DM9000_NO_SROM /* USB */ -#define CONFIG_USB_ATMEL -#define CONFIG_USB_ATMEL_CLK_SEL_PLLB -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_CPU_INIT #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */ -#ifdef CONFIG_AT91SAM9G10EK -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g10" -#else -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261" -#endif -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #endif diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index c100a411b2d..9497f055035 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -173,12 +173,6 @@ #endif /* USB */ -#define CONFIG_USB_ATMEL -#define CONFIG_USB_ATMEL_CLK_SEL_PLLB -#define CONFIG_USB_OHCI_NEW 1 -#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000 /* AT91SAM9263_UHP_BASE */ -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #endif diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index 29affe7b5cd..4fac0aad42c 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -41,13 +41,7 @@ /* USB host */ #ifdef CONFIG_CMD_USB -#define CONFIG_USB_ATMEL -#define CONFIG_USB_ATMEL_CLK_SEL_PLLB -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_CPU_INIT #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 #endif /* SPL */ diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index 6857f2e3c4a..758a91cdaa9 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -41,13 +41,7 @@ /* USB */ #ifdef CONFIG_CMD_USB #ifndef CONFIG_USB_EHCI_HCD -#define CONFIG_USB_ATMEL -#define CONFIG_USB_ATMEL_CLK_SEL_UPLL -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_CPU_INIT #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9x5" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3 #endif #endif diff --git a/include/configs/axs10x.h b/include/configs/axs10x.h index 7e25846e401..3e98ce09c72 100644 --- a/include/configs/axs10x.h +++ b/include/configs/axs10x.h @@ -39,8 +39,6 @@ /* * USB 1.1 configuration */ -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 /* * Environment settings diff --git a/include/configs/bmips_bcm6318.h b/include/configs/bmips_bcm6318.h index ad7781bd3a2..55c1d439d58 100644 --- a/include/configs/bmips_bcm6318.h +++ b/include/configs/bmips_bcm6318.h @@ -14,13 +14,6 @@ /* RAM */ #define CONFIG_SYS_SDRAM_BASE 0x80000000 -/* USB */ -#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -#if defined(CONFIG_USB_OHCI_HCD) -#define CONFIG_USB_OHCI_NEW -#endif /* CONFIG_USB_OHCI_HCD */ - /* U-Boot */ #if defined(CONFIG_BMIPS_BOOT_RAM) diff --git a/include/configs/bmips_bcm63268.h b/include/configs/bmips_bcm63268.h index 0901f6e88ac..f046b7e6622 100644 --- a/include/configs/bmips_bcm63268.h +++ b/include/configs/bmips_bcm63268.h @@ -14,13 +14,6 @@ /* RAM */ #define CONFIG_SYS_SDRAM_BASE 0x80000000 -/* USB */ -#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -#if defined(CONFIG_USB_OHCI_HCD) -#define CONFIG_USB_OHCI_NEW -#endif /* CONFIG_USB_OHCI_HCD */ - /* U-Boot */ #if defined(CONFIG_BMIPS_BOOT_RAM) diff --git a/include/configs/bmips_bcm6328.h b/include/configs/bmips_bcm6328.h index 3f45f1f2550..7e488072edc 100644 --- a/include/configs/bmips_bcm6328.h +++ b/include/configs/bmips_bcm6328.h @@ -14,13 +14,6 @@ /* RAM */ #define CONFIG_SYS_SDRAM_BASE 0x80000000 -/* USB */ -#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -#if defined(CONFIG_USB_OHCI_HCD) -#define CONFIG_USB_OHCI_NEW -#endif /* CONFIG_USB_OHCI_HCD */ - /* U-Boot */ #if defined(CONFIG_BMIPS_BOOT_RAM) diff --git a/include/configs/bmips_bcm6348.h b/include/configs/bmips_bcm6348.h index af1c3673fbb..f704fe26ca0 100644 --- a/include/configs/bmips_bcm6348.h +++ b/include/configs/bmips_bcm6348.h @@ -14,13 +14,6 @@ /* RAM */ #define CONFIG_SYS_SDRAM_BASE 0x80000000 -/* USB */ -#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -#if defined(CONFIG_USB_OHCI_HCD) -#define CONFIG_USB_OHCI_NEW -#endif /* CONFIG_USB_OHCI_HCD */ - /* U-Boot */ #if defined(CONFIG_BMIPS_BOOT_RAM) diff --git a/include/configs/bmips_bcm6358.h b/include/configs/bmips_bcm6358.h index c15218fc9cb..9aaa694cad9 100644 --- a/include/configs/bmips_bcm6358.h +++ b/include/configs/bmips_bcm6358.h @@ -14,13 +14,6 @@ /* RAM */ #define CONFIG_SYS_SDRAM_BASE 0x80000000 -/* USB */ -#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -#if defined(CONFIG_USB_OHCI_HCD) -#define CONFIG_USB_OHCI_NEW -#endif /* CONFIG_USB_OHCI_HCD */ - /* U-Boot */ #if defined(CONFIG_BMIPS_BOOT_RAM) diff --git a/include/configs/bmips_bcm6362.h b/include/configs/bmips_bcm6362.h index 0c94b2c5254..34e542544cb 100644 --- a/include/configs/bmips_bcm6362.h +++ b/include/configs/bmips_bcm6362.h @@ -14,13 +14,6 @@ /* RAM */ #define CONFIG_SYS_SDRAM_BASE 0x80000000 -/* USB */ -#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -#if defined(CONFIG_USB_OHCI_HCD) -#define CONFIG_USB_OHCI_NEW -#endif /* CONFIG_USB_OHCI_HCD */ - /* U-Boot */ #if defined(CONFIG_BMIPS_BOOT_RAM) diff --git a/include/configs/bmips_bcm6368.h b/include/configs/bmips_bcm6368.h index 6486b7e6110..0319124a0ed 100644 --- a/include/configs/bmips_bcm6368.h +++ b/include/configs/bmips_bcm6368.h @@ -14,13 +14,6 @@ /* RAM */ #define CONFIG_SYS_SDRAM_BASE 0x80000000 -/* USB */ -#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -#if defined(CONFIG_USB_OHCI_HCD) -#define CONFIG_USB_OHCI_NEW -#endif /* CONFIG_USB_OHCI_HCD */ - /* U-Boot */ #if defined(CONFIG_BMIPS_BOOT_RAM) diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 1f6ac8d28ad..3db97205dab 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -170,10 +170,6 @@ "console=ttyS2,115200n8\0" \ "hwconfig=dsp:wake=yes" -/* USB Configs */ -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 - #ifdef CONFIG_SPL_BUILD /* defines for SPL */ diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index e101d1f6004..328e4958f86 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -55,7 +55,6 @@ /* * USB */ -#define CONFIG_USB_OHCI_LPC32XX #define CONFIG_USB_ISP1301_I2C_ADDR 0x2d /* diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index 2126731ccfc..529b9837318 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -61,13 +61,7 @@ /* USB */ #ifdef CONFIG_CMD_USB -#define CONFIG_USB_ATMEL -#define CONFIG_USB_ATMEL_CLK_SEL_PLLB -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_CPU_INIT #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "host" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #endif /* RTC */ diff --git a/include/configs/evb_rk3399.h b/include/configs/evb_rk3399.h index 492b7b4df12..b7e850370b3 100644 --- a/include/configs/evb_rk3399.h +++ b/include/configs/evb_rk3399.h @@ -15,7 +15,4 @@ #define SDRAM_BANK_SIZE (2UL << 30) -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 - #endif diff --git a/include/configs/gru.h b/include/configs/gru.h index b1084bb21d4..be2dc79968c 100644 --- a/include/configs/gru.h +++ b/include/configs/gru.h @@ -13,7 +13,4 @@ #include -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 - #endif diff --git a/include/configs/hsdk-4xd.h b/include/configs/hsdk-4xd.h index 7785bab7147..03ca9281c82 100644 --- a/include/configs/hsdk-4xd.h +++ b/include/configs/hsdk-4xd.h @@ -38,12 +38,6 @@ * Ethernet PHY configuration */ -/* - * USB 1.1 configuration - */ -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 - /* * Environment settings */ diff --git a/include/configs/hsdk.h b/include/configs/hsdk.h index 6dd69ca38b4..0b8ac78e279 100644 --- a/include/configs/hsdk.h +++ b/include/configs/hsdk.h @@ -37,12 +37,6 @@ * Ethernet PHY configuration */ -/* - * USB 1.1 configuration - */ -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 - /* * Environment settings */ diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index a344a46a3e6..c9f5004117f 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -137,12 +137,6 @@ * U-Boot general configuration */ -/* - * USB Configs - */ -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 - /* * Linux Information */ diff --git a/include/configs/pinebook-pro-rk3399.h b/include/configs/pinebook-pro-rk3399.h index d478b19917d..241dc39be00 100644 --- a/include/configs/pinebook-pro-rk3399.h +++ b/include/configs/pinebook-pro-rk3399.h @@ -16,7 +16,4 @@ #define SDRAM_BANK_SIZE (2UL << 30) -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 - #endif diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index bc15cdb4460..7374514698f 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -152,13 +152,7 @@ #define CONFIG_SYS_MAX_FLASH_SECT 256 /* USB */ -#define CONFIG_USB_ATMEL -#define CONFIG_USB_ATMEL_CLK_SEL_PLLB -#define CONFIG_USB_OHCI_NEW 1 -#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #define CONFIG_EXTRA_ENV_SETTINGS \ "partition=nand0,0\0" \ diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index a0eed66b5ff..7a6d817926c 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -175,13 +175,7 @@ AT91_MATRIX_SCFG_SLOT_CYCLE(255)) /* USB */ -#define CONFIG_USB_ATMEL -#define CONFIG_USB_ATMEL_CLK_SEL_PLLB -#define CONFIG_USB_OHCI_NEW 1 -#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000 /* AT91SAM9263_UHP_BASE */ -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #define CONFIG_EXTRA_ENV_SETTINGS \ "partition=nand0,0\0" \ diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h index f3e0eefb9a2..d5a4ca26b04 100644 --- a/include/configs/rk3128_common.h +++ b/include/configs/rk3128_common.h @@ -19,9 +19,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x60000000 #define SDRAM_MAX_SIZE 0x80000000 -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 - /* usb mass storage */ #define ENV_MEM_LAYOUT_SETTINGS \ diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 90183579202..165b78ff330 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -30,8 +30,4 @@ "partitions=" PARTS_DEFAULT \ BOOTENV -/* rockchip ohci host driver */ -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 - #endif diff --git a/include/configs/rock960_rk3399.h b/include/configs/rock960_rk3399.h index 2edad710284..6099d2fa55a 100644 --- a/include/configs/rock960_rk3399.h +++ b/include/configs/rock960_rk3399.h @@ -14,7 +14,4 @@ #include #define SDRAM_BANK_SIZE (2UL << 30) - -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #endif diff --git a/include/configs/rockpro64_rk3399.h b/include/configs/rockpro64_rk3399.h index 903e9df527c..9195b9b99e4 100644 --- a/include/configs/rockpro64_rk3399.h +++ b/include/configs/rockpro64_rk3399.h @@ -14,7 +14,4 @@ #include #define SDRAM_BANK_SIZE (2UL << 30) - -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #endif diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h index d8de9c25df2..83c3167f38d 100644 --- a/include/configs/rv1108_common.h +++ b/include/configs/rv1108_common.h @@ -18,8 +18,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x60000000 /* rockchip ohci host driver */ -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x60000000\0" \ diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index a10057452fe..22839d544a5 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -39,13 +39,7 @@ /* USB */ #ifdef CONFIG_CMD_USB -#define CONFIG_USB_ATMEL -#define CONFIG_USB_ATMEL_CLK_SEL_UPLL -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_CPU_INIT #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00600000 -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "SAMA5D3 Xplained" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #endif /* SPL */ diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index f61b6e0dabc..dc89148a045 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -52,12 +52,7 @@ /* USB */ #ifdef CONFIG_CMD_USB -#define CONFIG_USB_ATMEL_CLK_SEL_UPLL -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_CPU_INIT #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "sama5d3" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3 #endif /* SPL */ diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 215c31bca41..65bc3c672ee 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -67,13 +67,7 @@ #define CONFIG_USART_ID ATMEL_ID_SYS /* USB configuration */ -#define CONFIG_USB_ATMEL -#define CONFIG_USB_ATMEL_CLK_SEL_PLLB -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_CPU_INIT #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 /* USB DFU support */ diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h index 6ff21b92168..2b7afb5d25e 100644 --- a/include/configs/snapper9260.h +++ b/include/configs/snapper9260.h @@ -38,13 +38,7 @@ #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 /* USB */ -#define CONFIG_USB_ATMEL -#define CONFIG_USB_ATMEL_CLK_SEL_PLLB -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_CPU_INIT #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 /* GPIOs and IO expander */ #define CONFIG_PCA953X diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 6a78cb1f264..db282681326 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -223,10 +223,6 @@ /* pass open firmware flat tree */ /* USB support */ -#define CONFIG_USB_OHCI_NEW 1 #define CONFIG_PCI_OHCI 1 -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "ohci_pci" -#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS 1 #endif /* __CONFIG_H */ diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h index a425dad6921..1b8d38f4b52 100644 --- a/include/configs/stih410-b2260.h +++ b/include/configs/stih410-b2260.h @@ -43,8 +43,6 @@ /* Extra Commands */ /* USB Configs */ -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 /* NET Configs */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index d52552c5fe7..2bf4e58cddf 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -120,11 +120,6 @@ /* Ethernet support */ -#ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 -#endif - #ifdef CONFIG_ARM64 /* * Boards seem to come with at least 512MB of DRAM. diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 798d72d8e26..ab2dc3d7146 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -65,13 +65,7 @@ /* USB */ #if defined(CONFIG_BOARD_TAURUS) -#define CONFIG_USB_ATMEL -#define CONFIG_USB_ATMEL_CLK_SEL_PLLB -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_CPU_INIT #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 /* USB DFU support */ diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h index e432b04e9f5..8cb8c609d05 100644 --- a/include/configs/usb_a9263.h +++ b/include/configs/usb_a9263.h @@ -45,12 +45,7 @@ /* USB */ #ifdef CONFIG_CMD_USB -#define CONFIG_USB_ATMEL -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_CPU_INIT #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000 -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #endif /* bootstrap + u-boot + env + linux in dataflash on CS0 */ diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index 14b92c095a0..e864b3fee6a 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -274,11 +274,6 @@ /* Store environment at top of flash */ #endif -#ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 -#endif - #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ #define FLASH_MAX_SECTOR_SIZE 0x00040000 -- GitLab From dea25842ab72427fde250992da1d29c2fbc256f8 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 25 Jun 2022 11:02:32 -0400 Subject: [PATCH 544/581] usb: ohci-hcd: Remove some unused legacy code At this point, the only user of ohci-hcd that also uses PCI is using DM, so we can drop CONFIG_PCI_OHCI* usage. No platforms set either of CONFIG_SYS_USB_OHCI_BOARD_INIT or CONFIG_SYS_USB_OHCI_CPU_INIT so those hooks can be removed as well. Signed-off-by: Tom Rini --- doc/README.generic_usb_ohci | 30 ------------ drivers/usb/host/ohci-hcd.c | 93 ------------------------------------- include/configs/socrates.h | 3 -- 3 files changed, 126 deletions(-) diff --git a/doc/README.generic_usb_ohci b/doc/README.generic_usb_ohci index 65b0896c7fd..a7da4bcb836 100644 --- a/doc/README.generic_usb_ohci +++ b/doc/README.generic_usb_ohci @@ -11,18 +11,6 @@ Configuration options CONFIG_USB_OHCI_NEW: enable the new OHCI driver - CONFIG_SYS_USB_OHCI_BOARD_INIT: call the board dependant hooks: - - - extern int board_usb_init(void); - - extern int usb_board_stop(void); - - extern int usb_cpu_init_fail(void); - - CONFIG_SYS_USB_OHCI_CPU_INIT: call the cpu dependant hooks: - - - extern int usb_cpu_init(void); - - extern int usb_cpu_stop(void); - - extern int usb_cpu_init_fail(void); - CONFIG_SYS_USB_OHCI_REGS_BASE: defines the base address of the OHCI registers @@ -43,21 +31,3 @@ config option needs to be defined. - -PCI Controllers ----------------- - -You'll need to define - - CONFIG_PCI_OHCI - -If you have several USB PCI controllers, define - - CONFIG_PCI_OHCI_DEVNO: number of the OHCI device in PCI list - -If undefined, the first instance found in PCI space will be used. - -PCI Controllers need to do byte swapping on register accesses, so they -should to define: - - CONFIG_SYS_OHCI_SWAP_REG_ACCESS diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c index fedf0db9c7e..9acef5ee4f8 100644 --- a/drivers/usb/host/ohci-hcd.c +++ b/drivers/usb/host/ohci-hcd.c @@ -35,13 +35,6 @@ #include #include -#if defined(CONFIG_PCI_OHCI) -# include -#if !defined(CONFIG_PCI_OHCI_DEVNO) -#define CONFIG_PCI_OHCI_DEVNO 0 -#endif -#endif - #include #include #include @@ -53,7 +46,6 @@ #endif #if defined(CONFIG_CPU_ARM920T) || \ - defined(CONFIG_PCI_OHCI) || \ defined(CONFIG_PCI) || \ defined(CONFIG_SYS_OHCI_USE_NPS) # define OHCI_USE_NPS /* force NoPowerSwitching mode */ @@ -68,26 +60,6 @@ #define OHCI_CONTROL_INIT \ (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE -#if !CONFIG_IS_ENABLED(DM_USB) -#ifdef CONFIG_PCI_OHCI -static struct pci_device_id ohci_pci_ids[] = { - {0x10b9, 0x5237}, /* ULI1575 PCI OHCI module ids */ - {0x1033, 0x0035}, /* NEC PCI OHCI module ids */ - {0x1131, 0x1561}, /* Philips 1561 PCI OHCI module ids */ - /* Please add supported PCI OHCI controller ids here */ - {0, 0} -}; -#endif -#endif - -#ifdef CONFIG_PCI_EHCI_DEVNO -static struct pci_device_id ehci_pci_ids[] = { - {0x1131, 0x1562}, /* Philips 1562 PCI EHCI module ids */ - /* Please add supported PCI EHCI controller ids here */ - {0, 0} -}; -#endif - #ifdef DEBUG #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg) #else @@ -2007,21 +1979,6 @@ static char ohci_inited = 0; int usb_lowlevel_init(int index, enum usb_init_type init, void **controller) { -#ifdef CONFIG_PCI_OHCI - pci_dev_t pdev; -#endif - -#ifdef CONFIG_SYS_USB_OHCI_CPU_INIT - /* cpu dependant init */ - if (usb_cpu_init()) - return -1; -#endif - -#ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT - /* board dependant init */ - if (board_usb_init(index, USB_INIT_HOST)) - return -1; -#endif memset(&gohci, 0, sizeof(ohci_t)); /* align the storage */ @@ -2036,28 +1993,7 @@ int usb_lowlevel_init(int index, enum usb_init_type init, void **controller) gohci.disabled = 1; gohci.sleeping = 0; gohci.irq = -1; -#ifdef CONFIG_PCI_OHCI - pdev = pci_find_devices(ohci_pci_ids, CONFIG_PCI_OHCI_DEVNO); - - if (pdev != -1) { - u16 vid, did; - u32 base; - pci_read_config_word(pdev, PCI_VENDOR_ID, &vid); - pci_read_config_word(pdev, PCI_DEVICE_ID, &did); - printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n", - vid, did, (pdev >> 16) & 0xff, - (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7); - pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base); - printf("OHCI regs address 0x%08x\n", base); - gohci.regs = (struct ohci_regs *)base; - } else { - printf("%s: OHCI devnr: %d not found\n", __func__, - CONFIG_PCI_OHCI_DEVNO); - return -1; - } -#else gohci.regs = (struct ohci_regs *)CONFIG_SYS_USB_OHCI_REGS_BASE; -#endif gohci.flags = 0; gohci.slot_name = CONFIG_SYS_USB_OHCI_SLOT_NAME; @@ -2065,15 +2001,6 @@ int usb_lowlevel_init(int index, enum usb_init_type init, void **controller) if (hc_reset (&gohci) < 0) { hc_release_ohci (&gohci); err ("can't reset usb-%s", gohci.slot_name); -#ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT - /* board dependant cleanup */ - board_usb_cleanup(index, USB_INIT_HOST); -#endif - -#ifdef CONFIG_SYS_USB_OHCI_CPU_INIT - /* cpu dependant cleanup */ - usb_cpu_init_fail(); -#endif return -1; } @@ -2081,15 +2008,6 @@ int usb_lowlevel_init(int index, enum usb_init_type init, void **controller) err("can't start usb-%s", gohci.slot_name); hc_release_ohci(&gohci); /* Initialization failed */ -#ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT - /* board dependant cleanup */ - usb_board_stop(); -#endif - -#ifdef CONFIG_SYS_USB_OHCI_CPU_INIT - /* cpu dependant cleanup */ - usb_cpu_stop(); -#endif return -1; } @@ -2112,17 +2030,6 @@ int usb_lowlevel_stop(int index) /* call hc_release_ohci() here ? */ hc_reset(&gohci); -#ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT - /* board dependant cleanup */ - if (usb_board_stop()) - return -1; -#endif - -#ifdef CONFIG_SYS_USB_OHCI_CPU_INIT - /* cpu dependant cleanup */ - if (usb_cpu_stop()) - return -1; -#endif /* This driver is no longer initialised. It needs a new low-level * init (board/cpu) before it can be used again. */ ohci_inited = 0; diff --git a/include/configs/socrates.h b/include/configs/socrates.h index db282681326..5dc8d855988 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -222,7 +222,4 @@ /* pass open firmware flat tree */ -/* USB support */ -#define CONFIG_PCI_OHCI 1 - #endif /* __CONFIG_H */ -- GitLab From ac8b36938a74d87a272e730998d03fe15aa9f503 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 25 Jun 2022 11:02:33 -0400 Subject: [PATCH 545/581] usb: Remove some unused CONFIG settings On platforms that use CONFIG_USB_OHCI_NEW we do not need to set CONFIG_SYS_USB_OHCI_REGS_BASE nor CONFIG_SYS_USB_OHCI_SLOT_NAME. Drop these from platforms that we can. Signed-off-by: Tom Rini --- include/configs/at91sam9n12ek.h | 5 ----- include/configs/at91sam9x5ek.h | 7 ------- include/configs/ethernut5.h | 5 ----- include/configs/sama5d3_xplained.h | 5 ----- include/configs/sama5d3xek.h | 5 ----- include/configs/smartweb.h | 3 --- include/configs/snapper9260.h | 3 --- include/configs/taurus.h | 3 --- include/configs/usb_a9263.h | 5 ----- 9 files changed, 41 deletions(-) diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index 4fac0aad42c..4d492988eba 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -39,11 +39,6 @@ "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\ "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0" -/* USB host */ -#ifdef CONFIG_CMD_USB -#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI -#endif - /* SPL */ #define CONFIG_SYS_MONITOR_LEN (512 << 10) diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index 758a91cdaa9..0e7665843db 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -38,13 +38,6 @@ #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 #endif -/* USB */ -#ifdef CONFIG_CMD_USB -#ifndef CONFIG_USB_EHCI_HCD -#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI -#endif -#endif - /* SPL */ #define CONFIG_SYS_MONITOR_LEN (512 << 10) diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index 529b9837318..88a702f1af2 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -59,11 +59,6 @@ #define CONFIG_SYS_MMC_CD_PIN AT91_PIO_PORTC, 8 #endif -/* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 -#endif - /* RTC */ #if defined(CONFIG_CMD_DATE) || defined(CONFIG_CMD_SNTP) #define CONFIG_SYS_I2C_RTC_ADDR 0x51 diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index 22839d544a5..fad65cb1123 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -37,11 +37,6 @@ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #endif -/* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00600000 -#endif - /* SPL */ /* size of u-boot.bin to load */ diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index dc89148a045..7bc3f91e77a 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -50,11 +50,6 @@ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #endif -/* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI -#endif - /* SPL */ #define CONFIG_SYS_MONITOR_LEN (512 << 10) diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 65bc3c672ee..1a3ac817fbf 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -66,9 +66,6 @@ #define CONFIG_USART_BASE ATMEL_BASE_DBGU #define CONFIG_USART_ID ATMEL_ID_SYS -/* USB configuration */ -#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE - /* USB DFU support */ #define CONFIG_USB_GADGET_AT91 diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h index 2b7afb5d25e..7adb349f9a5 100644 --- a/include/configs/snapper9260.h +++ b/include/configs/snapper9260.h @@ -37,9 +37,6 @@ #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 -/* USB */ -#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE - /* GPIOs and IO expander */ #define CONFIG_PCA953X #define CONFIG_SYS_I2C_PCA953X_ADDR 0x28 diff --git a/include/configs/taurus.h b/include/configs/taurus.h index ab2dc3d7146..4758e23f557 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -63,10 +63,7 @@ #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 #endif -/* USB */ #if defined(CONFIG_BOARD_TAURUS) -#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 - /* USB DFU support */ #define CONFIG_USB_GADGET_AT91 diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h index 8cb8c609d05..e0dde1cc836 100644 --- a/include/configs/usb_a9263.h +++ b/include/configs/usb_a9263.h @@ -43,11 +43,6 @@ #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22) #endif -/* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000 -#endif - /* bootstrap + u-boot + env + linux in dataflash on CS0 */ #define CONFIG_EXTRA_ENV_SETTINGS \ -- GitLab From f1c6dfa4264cdb4da68e0f47a5a8b046fb67b0d1 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 25 Jun 2022 11:02:34 -0400 Subject: [PATCH 546/581] layerscape: Remove some unused CONFIG symbols All of these symbols are not referenced anywhere else in the code, so remove them. Cc: Peng Fan Signed-off-by: Tom Rini --- arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 4 ---- arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 1 - arch/arm/include/asm/arch-ls102xa/config.h | 6 +----- include/configs/MPC837XERDB.h | 1 - include/configs/ids8313.h | 1 - include/configs/mx6ullevk.h | 6 ------ 6 files changed, 1 insertion(+), 18 deletions(-) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index 4b0f554e336..f2dbcdc8164 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -13,10 +13,8 @@ #define CONFIG_SYS_DCSRBAR 0x20000000 #define CONFIG_SYS_DCSR_DCFG_ADDR (CONFIG_SYS_DCSRBAR + 0x00140000) -#define CONFIG_SYS_DCSR_COP_CCP_ADDR (CONFIG_SYS_DCSRBAR + 0x02008040) #define CONFIG_SYS_FSL_DDR_ADDR (CONFIG_SYS_IMMR + 0x00080000) -#define CONFIG_SYS_GIC400_ADDR (CONFIG_SYS_IMMR + 0x00400000) #define CONFIG_SYS_IFC_ADDR (CONFIG_SYS_IMMR + 0x00530000) #define SYS_FSL_QSPI_ADDR (CONFIG_SYS_IMMR + 0x00550000) #define CONFIG_SYS_FSL_ESDHC_ADDR (CONFIG_SYS_IMMR + 0x00560000) @@ -26,9 +24,7 @@ #define CONFIG_SYS_FSL_SCFG_ADDR (CONFIG_SYS_IMMR + 0x00570000) #define CONFIG_SYS_FSL_BMAN_ADDR (CONFIG_SYS_IMMR + 0x00890000) #define CONFIG_SYS_FSL_QMAN_ADDR (CONFIG_SYS_IMMR + 0x00880000) -#define CONFIG_SYS_FSL_FMAN_ADDR (CONFIG_SYS_IMMR + 0x00a00000) #define CONFIG_SYS_FSL_SERDES_ADDR (CONFIG_SYS_IMMR + 0x00ea0000) -#define CONFIG_SYS_FSL_DCFG_ADDR (CONFIG_SYS_IMMR + 0x00ee0000) #define CONFIG_SYS_FSL_CLK_ADDR (CONFIG_SYS_IMMR + 0x00ee1000) #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x011c0500) #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x011c0600) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index 304cd7980a6..570397b3c04 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -52,7 +52,6 @@ #define CONFIG_SYS_FSL_DCSR_DDR_ADDR 0x70012c000ULL #define CONFIG_SYS_FSL_DCSR_DDR2_ADDR 0x70012d000ULL #define CONFIG_SYS_FSL_DCSR_DDR3_ADDR 0x700132000ULL -#define CONFIG_SYS_FSL_DCSR_DDR4_ADDR 0x700133000ULL #define I2C1_BASE_ADDR (CONFIG_SYS_IMMR + 0x01000000) #define I2C2_BASE_ADDR (CONFIG_SYS_IMMR + 0x01010000) diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index 796e2b218e5..e5f61ea4a6e 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -32,14 +32,11 @@ #define CONFIG_SYS_FSL_RCPM_ADDR (CONFIG_SYS_IMMR + 0x00ee2000) #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x011c0500) #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x011d0500) -#define CONFIG_SYS_DCU_ADDR (CONFIG_SYS_IMMR + 0x01ce0000) #define CONFIG_SYS_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x02100000) #define CONFIG_SYS_FSL_SEC_OFFSET 0x00700000 #define CONFIG_SYS_FSL_JR0_OFFSET 0x00710000 #define CONFIG_SYS_TSEC1_OFFSET 0x01d10000 -#define CONFIG_SYS_TSEC2_OFFSET 0x01d50000 -#define CONFIG_SYS_TSEC3_OFFSET 0x01d90000 #define CONFIG_SYS_MDIO1_OFFSET 0x01d24000 #define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET) @@ -79,8 +76,7 @@ #define AHCI_BASE_ADDR (CONFIG_SYS_IMMR + 0x02200000) #ifdef CONFIG_DDR_SPD #define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_LS1_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30) -#define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_LS1_DDR_BLOCK1_SIZE +#define CONFIG_MAX_MEM_MAPPED ((phys_size_t)2 << 30) #endif #define CONFIG_SYS_FSL_IFC_BE diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 3e4d66874df..8517b0330f5 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -227,7 +227,6 @@ #ifdef CONFIG_TSEC2 #define CONFIG_TSEC2_NAME "TSEC1" -#define CONFIG_SYS_TSEC2_OFFSET 0x25000 #define TSEC2_PHY_ADDR 0x1c #define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) #define TSEC2_PHYIDX 0 diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h index e0994d12baf..a8bb2090ec4 100644 --- a/include/configs/ids8313.h +++ b/include/configs/ids8313.h @@ -164,7 +164,6 @@ #ifdef CONFIG_TSEC2 #define CONFIG_TSEC2_NAME "TSEC1" -#define CONFIG_SYS_TSEC2_OFFSET 0x25000 #define TSEC2_PHY_ADDR 0x3 #define TSEC2_FLAGS TSEC_GIGABIT #define TSEC2_PHYIDX 0 diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h index db09db44d53..00cc547b900 100644 --- a/include/configs/mx6ullevk.h +++ b/include/configs/mx6ullevk.h @@ -21,14 +21,8 @@ /* MMC Configs */ #ifdef CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR - -/* NAND pin conflicts with usdhc2 */ -#ifdef CONFIG_SYS_USE_NAND -#define CONFIG_SYS_FSL_USDHC_NUM 1 -#else #define CONFIG_SYS_FSL_USDHC_NUM 2 #endif -#endif #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ -- GitLab From 7675a526e01d5714e3a3ec4d22e854104e65590c Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 25 Jun 2022 11:02:35 -0400 Subject: [PATCH 547/581] Convert CONFIG_SYS_UNIFY_CACHE to Kconfig This converts the following to Kconfig: CONFIG_SYS_UNIFY_CACHE Signed-off-by: Tom Rini --- configs/M53017EVB_defconfig | 1 + configs/M5329AFEE_defconfig | 1 + configs/M5329BFEE_defconfig | 1 + configs/M5373EVB_defconfig | 1 + drivers/net/Kconfig | 4 ++++ include/configs/M53017EVB.h | 2 -- include/configs/M5329EVB.h | 2 -- include/configs/M5373EVB.h | 2 -- include/configs/astro_mcf5373l.h | 2 -- 9 files changed, 8 insertions(+), 8 deletions(-) diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig index 901a15d5061..cec2520bdd7 100644 --- a/configs/M53017EVB_defconfig +++ b/configs/M53017EVB_defconfig @@ -42,6 +42,7 @@ CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_DM_ETH=y CONFIG_MCFFEC=y +CONFIG_SYS_UNIFY_CACHE=y CONFIG_MII=y CONFIG_MCFRTC=y CONFIG_SYS_MCFRTC_BASE=0xFC0A8000 diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig index 0bce9d8f422..9d55d5058e5 100644 --- a/configs/M5329AFEE_defconfig +++ b/configs/M5329AFEE_defconfig @@ -41,6 +41,7 @@ CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_DM_ETH=y CONFIG_MCFFEC=y +CONFIG_SYS_UNIFY_CACHE=y CONFIG_MII=y CONFIG_MCFRTC=y CONFIG_SYS_MCFRTC_BASE=0xFC0A8000 diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig index efc7733b44c..bd0cbddfb89 100644 --- a/configs/M5329BFEE_defconfig +++ b/configs/M5329BFEE_defconfig @@ -43,6 +43,7 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_DM_ETH=y CONFIG_MCFFEC=y +CONFIG_SYS_UNIFY_CACHE=y CONFIG_MII=y CONFIG_MCFRTC=y CONFIG_SYS_MCFRTC_BASE=0xFC0A8000 diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig index 920a86fa9aa..0a159eb170e 100644 --- a/configs/M5373EVB_defconfig +++ b/configs/M5373EVB_defconfig @@ -43,6 +43,7 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_DM_ETH=y CONFIG_MCFFEC=y +CONFIG_SYS_UNIFY_CACHE=y CONFIG_MII=y CONFIG_MCFRTC=y CONFIG_SYS_MCFRTC_BASE=0xFC0A8000 diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 40b5c8274e9..cb891f5dbed 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -409,6 +409,10 @@ config MCFFEC This driver supports the network interface units in the ColdFire family. +config SYS_UNIFY_CACHE + depends on MCFFEC + bool "Invalidate icache during ethernet operations" + config FSLDMAFEC bool "ColdFire DMA Ethernet Support" depends on DM_ETH diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index b38260ed09a..fd6aee127d8 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -22,8 +22,6 @@ #define CONFIG_WATCHDOG_TIMEOUT 5000 -#define CONFIG_SYS_UNIFY_CACHE - #ifdef CONFIG_MCFFEC # define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_TX_ETH_BUFFER 8 diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index c65f26cc091..b7ccdd08ac4 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -22,8 +22,6 @@ #define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */ -#define CONFIG_SYS_UNIFY_CACHE - #ifdef CONFIG_MCFFEC # define CONFIG_SYS_DISCOVER_PHY /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index 7e45d358797..06ee0748b93 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -24,8 +24,6 @@ #define CONFIG_WATCHDOG_TIMEOUT 3360 /* timeout in ms, max is 3.36 sec */ -#define CONFIG_SYS_UNIFY_CACHE - #ifdef CONFIG_MCFFEC # define CONFIG_SYS_DISCOVER_PHY /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index 18e06076a4a..a8265e961a2 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -65,8 +65,6 @@ #define CONFIG_SYS_CORE_SRAM_SIZE 0x8000 #define CONFIG_SYS_CORE_SRAM 0x80000000 -#define CONFIG_SYS_UNIFY_CACHE - /* * Define baudrate for UART1 (console output, tftp, ...) * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud -- GitLab From 0d121ad6de1706e8820067864be90add218cba2f Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 25 Jun 2022 11:02:36 -0400 Subject: [PATCH 548/581] Convert CONFIG_SYS_DISCOVER_PHY to Kconfig This converts the following to Kconfig: CONFIG_SYS_DISCOVER_PHY Signed-off-by: Tom Rini --- drivers/net/Kconfig | 5 +++++ drivers/net/fsl_mcdmafec.c | 8 -------- drivers/net/mcffec.c | 8 -------- include/configs/M5208EVBE.h | 9 --------- include/configs/M5235EVB.h | 9 --------- include/configs/M5272C3.h | 9 --------- include/configs/M5275EVB.h | 9 --------- include/configs/M5282EVB.h | 9 --------- include/configs/M53017EVB.h | 7 ------- include/configs/M5329EVB.h | 9 --------- include/configs/M5373EVB.h | 9 --------- include/configs/MCR3000.h | 1 - include/configs/cobra5272.h | 10 ---------- include/configs/eb_cpu5282.h | 1 - include/configs/stmark2.h | 8 -------- 15 files changed, 5 insertions(+), 106 deletions(-) diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index cb891f5dbed..b671e72580e 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -400,11 +400,14 @@ config FTGMAC100 offers high-priority transmit queue for QoS and CoS applications. +config SYS_DISCOVER_PHY + bool config MCFFEC bool "ColdFire Ethernet Support" depends on DM_ETH select PHYLIB + select SYS_DISCOVER_PHY help This driver supports the network interface units in the ColdFire family. @@ -417,6 +420,7 @@ config FSLDMAFEC bool "ColdFire DMA Ethernet Support" depends on DM_ETH select PHYLIB + select SYS_DISCOVER_PHY help This driver supports the network interface units in the ColdFire family. @@ -732,6 +736,7 @@ config MPC8XX_FEC bool "Fast Ethernet Controller on MPC8XX" depends on MPC8xx select MII + select SYS_DISCOVER_PHY help This driver implements support for the Fast Ethernet Controller on MPC8XX diff --git a/drivers/net/fsl_mcdmafec.c b/drivers/net/fsl_mcdmafec.c index e103f79305e..6825f9e27c0 100644 --- a/drivers/net/fsl_mcdmafec.c +++ b/drivers/net/fsl_mcdmafec.c @@ -243,16 +243,8 @@ static int fec_init(struct udevice *dev) fecpin_setclear(info, 1); fec_halt(dev); -#if defined(CONFIG_CMD_MII) || defined (CONFIG_MII) || \ - defined (CONFIG_SYS_DISCOVER_PHY) - mii_init(); set_fec_duplex_speed(fecp, info->dup_spd); -#else -#ifndef CONFIG_SYS_DISCOVER_PHY - set_fec_duplex_speed(fecp, (FECDUPLEX << 16) | FECSPEED); -#endif /* ifndef CONFIG_SYS_DISCOVER_PHY */ -#endif /* CONFIG_CMD_MII || CONFIG_MII */ /* We use strictly polling mode only */ fecp->eimr = 0; diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c index cef9eecac21..4dd848932b9 100644 --- a/drivers/net/mcffec.c +++ b/drivers/net/mcffec.c @@ -278,17 +278,9 @@ int mcffec_init(struct udevice *dev) fecpin_setclear(info, 1); fec_reset(info); -#if defined(CONFIG_CMD_MII) || defined (CONFIG_MII) || \ - defined (CONFIG_SYS_DISCOVER_PHY) - mii_init(); set_fec_duplex_speed(fecp, info->dup_spd); -#else -#ifndef CONFIG_SYS_DISCOVER_PHY - set_fec_duplex_speed(fecp, (FECDUPLEX << 16) | FECSPEED); -#endif /* ifndef CONFIG_SYS_DISCOVER_PHY */ -#endif /* CONFIG_CMD_MII || CONFIG_MII */ /* We use strictly polling mode only */ fecp->eimr = 0; diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index fec73ba3426..14b35d7ef50 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -17,15 +17,6 @@ #define CONFIG_WATCHDOG_TIMEOUT 5000 -#ifdef CONFIG_MCFFEC -# define CONFIG_SYS_DISCOVER_PHY -/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ -# ifndef CONFIG_SYS_DISCOVER_PHY -# define FECDUPLEX FULL -# define FECSPEED _100BASET -# endif /* CONFIG_SYS_DISCOVER_PHY */ -#endif - /* I2C */ #ifdef CONFIG_MCFFEC diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index ea89b03c66e..762d1dd94b1 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -22,15 +22,6 @@ #define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */ -#ifdef CONFIG_MCFFEC -# define CONFIG_SYS_DISCOVER_PHY -/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ -# ifndef CONFIG_SYS_DISCOVER_PHY -# define FECDUPLEX FULL -# define FECSPEED _100BASET -# endif /* CONFIG_SYS_DISCOVER_PHY */ -#endif - /* I2C */ #define CONFIG_SYS_I2C_PINMUX_REG (gpio->par_qspi) #define CONFIG_SYS_I2C_PINMUX_CLR ~(GPIO_PAR_FECI2C_SCL_MASK | GPIO_PAR_FECI2C_SDA_MASK) diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index 4a2b37653e0..2fa1e4356e3 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -31,15 +31,6 @@ . = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text); -#ifdef CONFIG_MCFFEC -# define CONFIG_SYS_DISCOVER_PHY -/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ -# ifndef CONFIG_SYS_DISCOVER_PHY -# define FECDUPLEX FULL -# define FECSPEED _100BASET -# endif /* CONFIG_SYS_DISCOVER_PHY */ -#endif - #ifdef CONFIG_MCFFEC # define CONFIG_IPADDR 192.162.1.2 # define CONFIG_NETMASK 255.255.255.0 diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 5e6d0856246..4f6fc6d8cb9 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -33,15 +33,6 @@ /* Available command configuration */ -#ifdef CONFIG_MCFFEC -#define CONFIG_SYS_DISCOVER_PHY -/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ -#ifndef CONFIG_SYS_DISCOVER_PHY -#define FECDUPLEX FULL -#define FECSPEED _100BASET -#endif -#endif - /* I2C */ #define CONFIG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c) #define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0) diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index bb6fbac6876..9f06f41ce11 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -29,15 +29,6 @@ . = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text*); -#ifdef CONFIG_MCFFEC -# define CONFIG_SYS_DISCOVER_PHY -/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ -# ifndef CONFIG_SYS_DISCOVER_PHY -# define FECDUPLEX FULL -# define FECSPEED _100BASET -# endif /* CONFIG_SYS_DISCOVER_PHY */ -#endif - #ifdef CONFIG_MCFFEC # define CONFIG_IPADDR 192.162.1.2 # define CONFIG_NETMASK 255.255.255.0 diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index fd6aee127d8..90b0d41078a 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -23,15 +23,8 @@ #define CONFIG_WATCHDOG_TIMEOUT 5000 #ifdef CONFIG_MCFFEC -# define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_TX_ETH_BUFFER 8 # define CONFIG_SYS_FEC_BUF_USE_SRAM - -/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ -# ifndef CONFIG_SYS_DISCOVER_PHY -# define FECDUPLEX FULL -# define FECSPEED _100BASET -# endif /* CONFIG_SYS_DISCOVER_PHY */ #endif #define CONFIG_SYS_RTC_CNT (0x8000) diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index b7ccdd08ac4..6eaa660e11f 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -22,15 +22,6 @@ #define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */ -#ifdef CONFIG_MCFFEC -# define CONFIG_SYS_DISCOVER_PHY -/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ -# ifndef CONFIG_SYS_DISCOVER_PHY -# define FECDUPLEX FULL -# define FECSPEED _100BASET -# endif /* CONFIG_SYS_DISCOVER_PHY */ -#endif - /* I2C */ #ifdef CONFIG_MCFFEC diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index 06ee0748b93..2e3988f6c72 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -24,15 +24,6 @@ #define CONFIG_WATCHDOG_TIMEOUT 3360 /* timeout in ms, max is 3.36 sec */ -#ifdef CONFIG_MCFFEC -# define CONFIG_SYS_DISCOVER_PHY -/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ -# ifndef CONFIG_SYS_DISCOVER_PHY -# define FECDUPLEX FULL -# define FECSPEED _100BASET -# endif /* CONFIG_SYS_DISCOVER_PHY */ -#endif - /* I2C */ #ifdef CONFIG_MCFFEC diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h index 01b33c77a88..41ab8608508 100644 --- a/include/configs/MCR3000.h +++ b/include/configs/MCR3000.h @@ -86,7 +86,6 @@ /* environment is in FLASH */ /* Ethernet configuration part */ -#define CONFIG_SYS_DISCOVER_PHY 1 /* NAND configuration part */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index c926e6ac8ca..dd7b6c08730 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -85,15 +85,6 @@ . = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text); -#ifdef CONFIG_MCFFEC -# define CONFIG_SYS_DISCOVER_PHY -/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ -# ifndef CONFIG_SYS_DISCOVER_PHY -# define FECDUPLEX FULL -# define FECSPEED _100BASET -# endif /* CONFIG_SYS_DISCOVER_PHY */ -#endif - /* *----------------------------------------------------------------------------- * Define user parameters that have to be customized most likely @@ -157,7 +148,6 @@ enter a valid image address in flash */ * --- */ -#define CONFIG_SYS_DISCOVER_PHY #define CONFIG_SYS_ENET_BD_BASE 0x780000 /*----------------------------------------------------------------------- diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 61571575081..6e444c47892 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -47,7 +47,6 @@ *----------------------------------------------------------------------*/ #ifdef CONFIG_MCFFEC -#define CONFIG_SYS_DISCOVER_PHY #define CONFIG_OVERWRITE_ETHADDR_ONCE #endif diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index 797d9bbb4af..d8a334868f3 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -106,12 +106,4 @@ #define CACR_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 12) -#ifdef CONFIG_MCFFEC -#define CONFIG_SYS_DISCOVER_PHY -/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ -#ifndef CONFIG_SYS_DISCOVER_PHY -#define FECDUPLEX FULL -#define FECSPEED _100BASET -#endif /* CONFIG_SYS_DISCOVER_PHY */ -#endif #endif /* __STMARK2_CONFIG_H */ -- GitLab From 2bb9d7c65ae54e6cd1ed2c5fb109de6d697f429f Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 25 Jun 2022 11:02:37 -0400 Subject: [PATCH 549/581] Convert CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS et al to Kconfig This converts the following to Kconfig: CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS Signed-off-by: Tom Rini --- arch/arm/mach-omap2/Kconfig | 21 +++++++++++++++++++++ include/configs/ti_omap4_common.h | 11 ----------- include/configs/ti_omap5_common.h | 11 ----------- 3 files changed, 21 insertions(+), 22 deletions(-) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 51d1db4a87b..fa410474767 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -169,6 +169,27 @@ config TI_SECURE_EMIF_PROTECTED_REGION_SIZE using hardware memory firewalls. This value must be smaller than the TI_SECURE_EMIF_TOTAL_REGION_SIZE value. +config SYS_AUTOMATIC_SDRAM_DETECTION + bool + +choice + depends on OMAP44XX || OMAP54XX + prompt "Static or dynamic DDR timing calculations" + default SYS_EMIF_PRECALCULATED_TIMING_REGS + help + For the DDR timing information we can either dynamically determine + the timings to use or use pre-determined timings (based on using the + dynamic method). Default to the static timing information. + +config SYS_EMIF_PRECALCULATED_TIMING_REGS + bool "Use precalcualted timing values" + +config SYS_DEFAULT_LPDDR2_TIMINGS + bool "Use default LPDDR2 timing values" + select SYS_AUTOMATIC_SDRAM_DETECTION + +endchoice + source "arch/arm/mach-omap2/omap3/Kconfig" source "arch/arm/mach-omap2/omap4/Kconfig" diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index fcf282bc4c1..3d78972bfeb 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -23,17 +23,6 @@ /* Use General purpose timer 1 */ #define CONFIG_SYS_TIMERBASE GPT2_BASE -/* - * For the DDR timing information we can either dynamically determine - * the timings to use or use pre-determined timings (based on using the - * dynamic method. Default to the static timing infomation. - */ -#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS -#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS -#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION -#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS -#endif - #include /* diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index f7f17d0f502..a9d4cf905f8 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -19,17 +19,6 @@ /* Use General purpose timer 1 */ #define CONFIG_SYS_TIMERBASE GPT2_BASE -/* - * For the DDR timing information we can either dynamically determine - * the timings to use or use pre-determined timings (based on using the - * dynamic method. Default to the static timing infomation. - */ -#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS -#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS -#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION -#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS -#endif - #define CONFIG_PALMAS_POWER #include -- GitLab From afe33787011526e0acb17c926565806052929941 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 25 Jun 2022 11:02:38 -0400 Subject: [PATCH 550/581] Convert CONFIG_PALMAS_POWER to Kconfig This converts the following to Kconfig: CONFIG_PALMAS_POWER Signed-off-by: Tom Rini --- configs/am57xx_evm_defconfig | 1 + configs/am57xx_hs_evm_defconfig | 1 + configs/am57xx_hs_evm_usb_defconfig | 1 + configs/dra7xx_evm_defconfig | 1 + configs/dra7xx_hs_evm_defconfig | 1 + configs/dra7xx_hs_evm_usb_defconfig | 1 + configs/omap5_uevm_defconfig | 1 + drivers/power/Kconfig | 4 ++++ include/configs/ti_omap5_common.h | 2 -- 9 files changed, 11 insertions(+), 2 deletions(-) diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index d82c66572cc..a077ef8ae24 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -107,6 +107,7 @@ CONFIG_DM_PMIC=y CONFIG_PMIC_PALMAS=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_PALMAS=y +CONFIG_PALMAS_POWER=y CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_SPI=y diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index 33209177301..e22c11d9807 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -97,6 +97,7 @@ CONFIG_DM_PMIC=y CONFIG_PMIC_PALMAS=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_PALMAS=y +CONFIG_PALMAS_POWER=y CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_SPI=y diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index 014a3830df7..fc1bc01c062 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -106,6 +106,7 @@ CONFIG_DM_PMIC=y CONFIG_PMIC_PALMAS=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_PALMAS=y +CONFIG_PALMAS_POWER=y CONFIG_SCSI_AHCI_PLAT=y CONFIG_DM_SERIAL=y CONFIG_SPI=y diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index aae84dc6ade..bd3ce11b79f 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -130,6 +130,7 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_REGULATOR_PALMAS=y CONFIG_DM_REGULATOR_LP873X=y +CONFIG_PALMAS_POWER=y CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_SPI=y diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index 51ffd2779c1..63b8f2b6fe7 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -124,6 +124,7 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_REGULATOR_PALMAS=y CONFIG_DM_REGULATOR_LP873X=y +CONFIG_PALMAS_POWER=y CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_SPI=y diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig index 34dcdede923..cd4b8bbce0a 100644 --- a/configs/dra7xx_hs_evm_usb_defconfig +++ b/configs/dra7xx_hs_evm_usb_defconfig @@ -113,6 +113,7 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_REGULATOR_PALMAS=y CONFIG_DM_REGULATOR_LP873X=y +CONFIG_PALMAS_POWER=y CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_SPI=y diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig index 73d742ea1d2..912dd91259c 100644 --- a/configs/omap5_uevm_defconfig +++ b/configs/omap5_uevm_defconfig @@ -54,6 +54,7 @@ CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_OMAP_HS=y CONFIG_DM_ETH=y +CONFIG_PALMAS_POWER=y CONFIG_SCSI=y CONFIG_SCSI_AHCI_PLAT=y CONFIG_CONS_INDEX=3 diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig index 0af53a6c67f..bc47cf144dd 100644 --- a/drivers/power/Kconfig +++ b/drivers/power/Kconfig @@ -426,6 +426,10 @@ config POWER_MT6323 This adds poweroff driver for mt6323 this pmic is used on mt7623 / Bananapi R2 +config PALMAS_POWER + bool "Palmas power support" + depends on OMAP54XX + config POWER_I2C bool "I2C-based power control for legacy power" depends on POWER_LEGACY diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index a9d4cf905f8..24bbf9e7c2c 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -19,8 +19,6 @@ /* Use General purpose timer 1 */ #define CONFIG_SYS_TIMERBASE GPT2_BASE -#define CONFIG_PALMAS_POWER - #include #include -- GitLab From d9d4978143ac9b446d7b035b3617f11799128d42 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 25 Jun 2022 11:02:40 -0400 Subject: [PATCH 551/581] thunerx_88xx: Clean up config slightly. We don't use CONFIG_SYS_64BIT anywhere and can use CONFIG_TARGET_THUNDERX_88XX to build the device trees. Signed-off-by: Tom Rini --- arch/arm/dts/Makefile | 2 +- include/configs/thunderx_88xx.h | 4 ---- 2 files changed, 1 insertion(+), 5 deletions(-) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 87b210dbb01..8f7ecfd0f66 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -414,7 +414,7 @@ dtb-$(CONFIG_AM43XX) += am437x-gp-evm.dtb am437x-sk-evm.dtb \ am437x-cm-t43.dtb dtb-$(CONFIG_TARGET_AM3517_EVM) += am3517-evm.dtb dtb-$(CONFIG_TI816X) += dm8168-evm.dtb -dtb-$(CONFIG_THUNDERX) += thunderx-88xx.dtb +dtb-$(CONFIG_TARGET_THUNDERX_88XX) += thunderx-88xx.dtb dtb-$(CONFIG_ARCH_SOCFPGA) += \ socfpga_agilex_socdk.dtb \ diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h index cc3891fd6df..cf2efdbe230 100644 --- a/include/configs/thunderx_88xx.h +++ b/include/configs/thunderx_88xx.h @@ -6,10 +6,6 @@ #ifndef __THUNDERX_88XX_H__ #define __THUNDERX_88XX_H__ -#define CONFIG_THUNDERX - -#define CONFIG_SYS_64BIT - #define MEM_BASE 0x00500000 #define CONFIG_SYS_LOWMEM_BASE MEM_BASE -- GitLab From fcf4fa71ab96650e9097ce06b39e4515a353ac04 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 25 Jun 2022 11:02:41 -0400 Subject: [PATCH 552/581] Convert CONFIG_SYS_83XX_DDR_USES_CS0 to Kconfig This converts the following to Kconfig: CONFIG_SYS_83XX_DDR_USES_CS0 Signed-off-by: Tom Rini --- README | 4 ---- arch/powerpc/cpu/mpc83xx/Kconfig | 6 ++++++ include/configs/MPC837XERDB.h | 1 - 3 files changed, 6 insertions(+), 5 deletions(-) diff --git a/README b/README index 6bdfca66d65..efc75a3f75b 100644 --- a/README +++ b/README @@ -2074,10 +2074,6 @@ Low Level (hardware related) configuration options: - CONFIG_FSL_DDR_BIST Enable built-in memory test for Freescale DDR controllers. -- CONFIG_SYS_83XX_DDR_USES_CS0 - Only for 83xx systems. If specified, then DDR should - be configured using CS0 and CS1 instead of CS2 and CS3. - - CONFIG_RMII Enable RMII mode for all FECs. Note that this is a global option, we can't diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig index d1b9ae4c3c9..9a31604ba3e 100644 --- a/arch/powerpc/cpu/mpc83xx/Kconfig +++ b/arch/powerpc/cpu/mpc83xx/Kconfig @@ -11,6 +11,11 @@ config E300 config SYS_CPU default "mpc83xx" +config SYS_83XX_DDR_USES_CS0 + bool + help + DDR should be configured using CS0 and CS1 instead of CS2 and CS3. + choice prompt "Target select" optional @@ -19,6 +24,7 @@ config TARGET_MPC837XERDB bool "Support MPC837XERDB" select ARCH_MPC837X select BOARD_EARLY_INIT_F + select SYS_83XX_DDR_USES_CS0 config TARGET_IDS8313 bool "Support ids8313" diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 8517b0330f5..fc55e5c2f61 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -61,7 +61,6 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */ #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL 0x03000000 -#define CONFIG_SYS_83XX_DDR_USES_CS0 #define CONFIG_SYS_DDRCDR_VALUE (DDRCDR_DHC_EN | DDRCDR_ODT | DDRCDR_Q_DRN) -- GitLab From a457ebd78684ba0dba18b1bb5564331f47c180ed Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 25 Jun 2022 11:02:42 -0400 Subject: [PATCH 553/581] arm: Remove PXA architecture support With the last platform for this architecture removed, remove the rest of the architecture support as well. Cc: Marek Vasut Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- MAINTAINERS | 7 - README | 7 - arch/arm/Kconfig | 14 +- arch/arm/Makefile | 2 - arch/arm/cpu/pxa/Makefile | 14 - arch/arm/cpu/pxa/cache.c | 58 - arch/arm/cpu/pxa/config.mk | 18 - arch/arm/cpu/pxa/cpuinfo.c | 139 -- arch/arm/cpu/pxa/pxa2xx.c | 295 --- arch/arm/cpu/pxa/relocate.S | 22 - arch/arm/cpu/pxa/start.S | 98 - arch/arm/cpu/pxa/timer.c | 16 - arch/arm/cpu/pxa/usb.c | 89 - arch/arm/include/asm/arch-pxa/bitfield.h | 112 - arch/arm/include/asm/arch-pxa/config.h | 22 - arch/arm/include/asm/arch-pxa/hardware.h | 82 - arch/arm/include/asm/arch-pxa/pxa-regs.h | 2635 --------------------- arch/arm/include/asm/arch-pxa/pxa.h | 28 - arch/arm/include/asm/arch-pxa/regs-mmc.h | 140 -- arch/arm/include/asm/arch-pxa/regs-uart.h | 95 - arch/arm/include/asm/arch-pxa/regs-usb.h | 146 -- arch/arm/include/asm/config.h | 2 - doc/develop/driver-model/serial-howto.rst | 9 - drivers/mmc/Kconfig | 8 - drivers/mmc/Makefile | 1 - drivers/mmc/pxa_mmc_gen.c | 531 ----- drivers/serial/Kconfig | 6 - drivers/serial/Makefile | 1 - drivers/serial/serial_pxa.c | 342 --- drivers/serial/usbtty.h | 2 - drivers/usb/gadget/Makefile | 1 - drivers/usb/gadget/epautoconf.c | 6 - drivers/usb/gadget/ether.c | 25 +- drivers/usb/gadget/gadget_chips.h | 17 - drivers/usb/gadget/pxa27x_udc.c | 703 ------ drivers/video/Makefile | 1 - drivers/video/pxa_lcd.c | 549 ----- include/dm/platform_data/pxa_mmc_gen.h | 22 - include/dm/platform_data/serial_pxa.h | 40 - include/lcd.h | 4 +- include/pxa_lcd.h | 80 - include/usb/pxa27x_udc.h | 31 - 42 files changed, 3 insertions(+), 6417 deletions(-) delete mode 100644 arch/arm/cpu/pxa/Makefile delete mode 100644 arch/arm/cpu/pxa/cache.c delete mode 100644 arch/arm/cpu/pxa/config.mk delete mode 100644 arch/arm/cpu/pxa/cpuinfo.c delete mode 100644 arch/arm/cpu/pxa/pxa2xx.c delete mode 100644 arch/arm/cpu/pxa/relocate.S delete mode 100644 arch/arm/cpu/pxa/start.S delete mode 100644 arch/arm/cpu/pxa/timer.c delete mode 100644 arch/arm/cpu/pxa/usb.c delete mode 100644 arch/arm/include/asm/arch-pxa/bitfield.h delete mode 100644 arch/arm/include/asm/arch-pxa/config.h delete mode 100644 arch/arm/include/asm/arch-pxa/hardware.h delete mode 100644 arch/arm/include/asm/arch-pxa/pxa-regs.h delete mode 100644 arch/arm/include/asm/arch-pxa/pxa.h delete mode 100644 arch/arm/include/asm/arch-pxa/regs-mmc.h delete mode 100644 arch/arm/include/asm/arch-pxa/regs-uart.h delete mode 100644 arch/arm/include/asm/arch-pxa/regs-usb.h delete mode 100644 drivers/mmc/pxa_mmc_gen.c delete mode 100644 drivers/serial/serial_pxa.c delete mode 100644 drivers/usb/gadget/pxa27x_udc.c delete mode 100644 drivers/video/pxa_lcd.c delete mode 100644 include/dm/platform_data/pxa_mmc_gen.h delete mode 100644 include/dm/platform_data/serial_pxa.h delete mode 100644 include/pxa_lcd.h delete mode 100644 include/usb/pxa27x_udc.h diff --git a/MAINTAINERS b/MAINTAINERS index 4b74866c71f..a6a16a3053d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -348,13 +348,6 @@ S: Maintained T: git https://source.denx.de/u-boot/custodians/u-boot-marvell.git F: drivers/serial/serial_mvebu_a3700.c -ARM MARVELL PXA -M: Marek Vasut -S: Maintained -T: git https://source.denx.de/u-boot/custodians/u-boot-pxa.git -F: arch/arm/cpu/pxa/ -F: arch/arm/include/asm/arch-pxa/ - ARM MEDIATEK M: Ryder Lee M: Weijie Gao diff --git a/README b/README index efc75a3f75b..ed8e807c8f3 100644 --- a/README +++ b/README @@ -850,13 +850,6 @@ The following options need to be configured: the appropriate value in Hz. - MMC Support: - The MMC controller on the Intel PXA is supported. To - enable this define CONFIG_MMC. The MMC can be - accessed from the boot prompt by mapping the device - to physical memory similar to flash. Command line is - enabled with CONFIG_CMD_MMC. The MMC driver also works with - the FAT fs. This is enabled with CONFIG_CMD_FAT. - CONFIG_SH_MMCIF Support for Renesas on-chip MMCIF controller diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 423fca27de6..434c5e98fa3 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -330,15 +330,6 @@ config CPU_V7R select SYS_ARM_MPU select SYS_CACHE_SHIFT_6 -config CPU_PXA - bool - select SYS_CACHE_SHIFT_5 - imply SYS_ARM_MMU - -config CPU_PXA27X - bool - select CPU_PXA - config CPU_SA1100 bool select SYS_CACHE_SHIFT_5 @@ -354,7 +345,6 @@ config SYS_CPU default "armv7" if CPU_V7A default "armv7" if CPU_V7R default "armv7m" if CPU_V7M - default "pxa" if CPU_PXA default "sa1100" if CPU_SA1100 default "armv8" if ARM64 @@ -369,14 +359,12 @@ config SYS_ARM_ARCH default 7 if CPU_V7A default 7 if CPU_V7M default 7 if CPU_V7R - default 5 if CPU_PXA default 4 if CPU_SA1100 default 8 if ARM64 choice prompt "Select the ARM data write cache policy" - default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \ - CPU_PXA || RZA1 + default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || RZA1 default SYS_ARM_CACHE_WRITEBACK config SYS_ARM_CACHE_WRITEBACK diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 64c58f4c4a3..09fc3188788 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -11,7 +11,6 @@ arch-$(CONFIG_CPU_ARM920T) =-march=armv4t arch-$(CONFIG_CPU_ARM926EJS) =-march=armv5te arch-$(CONFIG_CPU_ARM946ES) =-march=armv5te arch-$(CONFIG_CPU_SA1100) =-march=armv4 -arch-$(CONFIG_CPU_PXA) = arch-$(CONFIG_CPU_ARM1136) =-march=armv5t arch-$(CONFIG_CPU_ARM1176) =-march=armv5t arch-$(CONFIG_CPU_V7A) =$(call cc-option, -march=armv7-a, \ @@ -41,7 +40,6 @@ tune-$(CONFIG_CPU_ARM920T) = tune-$(CONFIG_CPU_ARM926EJS) = tune-$(CONFIG_CPU_ARM946ES) = tune-$(CONFIG_CPU_SA1100) =-mtune=strongarm1100 -tune-$(CONFIG_CPU_PXA) =-mcpu=xscale tune-$(CONFIG_CPU_ARM1136) = tune-$(CONFIG_CPU_ARM1176) = tune-$(CONFIG_CPU_V7A) =-mtune=generic-armv7-a diff --git a/arch/arm/cpu/pxa/Makefile b/arch/arm/cpu/pxa/Makefile deleted file mode 100644 index fab77325c79..00000000000 --- a/arch/arm/cpu/pxa/Makefile +++ /dev/null @@ -1,14 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. - -extra-y = start.o - -obj-$(CONFIG_CPU_PXA27X) += pxa2xx.o - -obj-y += cpuinfo.o -obj-y += timer.o -obj-y += usb.o -obj-y += relocate.o -obj-y += cache.o diff --git a/arch/arm/cpu/pxa/cache.c b/arch/arm/cpu/pxa/cache.c deleted file mode 100644 index a2ec5e28c7d..00000000000 --- a/arch/arm/cpu/pxa/cache.c +++ /dev/null @@ -1,58 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2016 Vasily Khoruzhick - */ - -#include -#include -#include -#include - -#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) -void invalidate_dcache_all(void) -{ - /* Flush/Invalidate I cache */ - asm volatile("mcr p15, 0, %0, c7, c5, 0\n" : : "r"(0)); - /* Flush/Invalidate D cache */ - asm volatile("mcr p15, 0, %0, c7, c6, 0\n" : : "r"(0)); -} - -void flush_dcache_all(void) -{ - return invalidate_dcache_all(); -} - -void invalidate_dcache_range(unsigned long start, unsigned long stop) -{ - start &= ~(CONFIG_SYS_CACHELINE_SIZE - 1); - stop &= ~(CONFIG_SYS_CACHELINE_SIZE - 1); - - while (start <= stop) { - asm volatile("mcr p15, 0, %0, c7, c6, 1\n" : : "r"(start)); - start += CONFIG_SYS_CACHELINE_SIZE; - } -} - -void flush_dcache_range(unsigned long start, unsigned long stop) -{ - return invalidate_dcache_range(start, stop); -} -#else /* #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */ -void invalidate_dcache_all(void) -{ -} - -void flush_dcache_all(void) -{ -} -#endif /* #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */ - -/* - * Stub implementations for l2 cache operations - */ - -__weak void l2_cache_disable(void) {} - -#if CONFIG_IS_ENABLED(SYS_THUMB_BUILD) -__weak void invalidate_l2_cache(void) {} -#endif diff --git a/arch/arm/cpu/pxa/config.mk b/arch/arm/cpu/pxa/config.mk deleted file mode 100644 index e7b183674a2..00000000000 --- a/arch/arm/cpu/pxa/config.mk +++ /dev/null @@ -1,18 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2002 -# Sysgo Real-Time Solutions, GmbH -# Marius Groeger - -# -# !WARNING! -# The PXA's OneNAND SPL uses .text.0 and .text.1 segments to allow booting from -# really small OneNAND memories where the mmap'd window is only 1KiB big. The -# .text.0 contains only the bare minimum needed to load the real SPL into SRAM. -# Add .text.0 and .text.1 into OBJFLAGS, so when the SPL is being objcopy'd, -# they are not discarded. -# - -#ifdef CONFIG_SPL_BUILD -OBJCOPYFLAGS += -j .text.0 -j .text.1 -#endif diff --git a/arch/arm/cpu/pxa/cpuinfo.c b/arch/arm/cpu/pxa/cpuinfo.c deleted file mode 100644 index 549b61d6e0f..00000000000 --- a/arch/arm/cpu/pxa/cpuinfo.c +++ /dev/null @@ -1,139 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * PXA CPU information display - * - * Copyright (C) 2011 Marek Vasut - */ - -#include -#include -#include -#include -#include - -#define CPU_MASK_PXA_PRODID 0x000003f0 -#define CPU_MASK_PXA_REVID 0x0000000f - -#define CPU_MASK_PRODREV (CPU_MASK_PXA_PRODID | CPU_MASK_PXA_REVID) - -#define CPU_VALUE_PXA25X 0x100 -#define CPU_VALUE_PXA27X 0x110 - -static uint32_t pxa_get_cpuid(void) -{ - uint32_t cpuid; - asm volatile("mrc p15, 0, %0, c0, c0, 0" : "=r"(cpuid)); - return cpuid; -} - -int cpu_is_pxa25x(void) -{ - uint32_t id = pxa_get_cpuid(); - id &= CPU_MASK_PXA_PRODID; - return id == CPU_VALUE_PXA25X; -} - -int cpu_is_pxa27x(void) -{ - uint32_t id = pxa_get_cpuid(); - id &= CPU_MASK_PXA_PRODID; - return id == CPU_VALUE_PXA27X; -} - -int cpu_is_pxa27xm(void) -{ - uint32_t id = pxa_get_cpuid(); - return ((id & CPU_MASK_PXA_PRODID) == CPU_VALUE_PXA27X) && - ((id & CPU_MASK_PXA_REVID) == 8); -} - -uint32_t pxa_get_cpu_revision(void) -{ - return pxa_get_cpuid() & CPU_MASK_PRODREV; -} - -#ifdef CONFIG_DISPLAY_CPUINFO -static const char *pxa25x_get_revision(void) -{ - static __maybe_unused const char * const revs_25x[] = { "A0" }; - static __maybe_unused const char * const revs_26x[] = { - "A0", "B0", "B1" - }; - static const char *unknown = "Unknown"; - uint32_t id; - - if (!cpu_is_pxa25x()) - return unknown; - - id = pxa_get_cpuid() & CPU_MASK_PXA_REVID; - -/* PXA26x is a sick special case as it can't be told apart from PXA25x :-( */ -#ifdef CONFIG_CPU_PXA26X - switch (id) { - case 3: return revs_26x[0]; - case 5: return revs_26x[1]; - case 6: return revs_26x[2]; - } -#else - if (id == 6) - return revs_25x[0]; -#endif - return unknown; -} - -static const char *pxa27x_get_revision(void) -{ - static const char *const rev[] = { "A0", "A1", "B0", "B1", "C0", "C5" }; - static const char *unknown = "Unknown"; - uint32_t id; - - if (!cpu_is_pxa27x()) - return unknown; - - id = pxa_get_cpuid() & CPU_MASK_PXA_REVID; - - if ((id == 5) || (id == 6) || (id > 8)) - return unknown; - - /* Cap the special PXA270 C5 case. */ - if (id == 7) - id = 5; - - /* Cap the special PXA270M A1 case. */ - if (id == 8) - id = 1; - - return rev[id]; -} - -static int print_cpuinfo_pxa2xx(void) -{ - if (cpu_is_pxa25x()) { - puts("Marvell PXA25x rev. "); - puts(pxa25x_get_revision()); - } else if (cpu_is_pxa27x()) { - puts("Marvell PXA27x"); - if (cpu_is_pxa27xm()) puts("M"); - puts(" rev. "); - puts(pxa27x_get_revision()); - } else - return -EINVAL; - - puts("\n"); - - return 0; -} - -int print_cpuinfo(void) -{ - int ret; - - puts("CPU: "); - - ret = print_cpuinfo_pxa2xx(); - if (!ret) - return ret; - - return ret; -} -#endif diff --git a/arch/arm/cpu/pxa/pxa2xx.c b/arch/arm/cpu/pxa/pxa2xx.c deleted file mode 100644 index c7efb67754e..00000000000 --- a/arch/arm/cpu/pxa/pxa2xx.c +++ /dev/null @@ -1,295 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Marius Groeger - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Alex Zuepke - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* Flush I/D-cache */ -static void cache_flush(void) -{ - unsigned long i = 0; - - asm ("mcr p15, 0, %0, c7, c5, 0" : : "r" (i)); -} - -int cleanup_before_linux(void) -{ - /* - * This function is called just before we call Linux. It prepares - * the processor for Linux by just disabling everything that can - * disturb booting Linux. - */ - - disable_interrupts(); - icache_disable(); - dcache_disable(); - cache_flush(); - - return 0; -} - -inline void writelrb(uint32_t val, uint32_t addr) -{ - writel(val, addr); - asm volatile("" : : : "memory"); - readl(addr); - asm volatile("" : : : "memory"); -} - -void pxa2xx_dram_init(void) -{ - uint32_t tmp; - int i; - /* - * 1) Initialize Asynchronous static memory controller - */ - - writelrb(CONFIG_SYS_MSC0_VAL, MSC0); - writelrb(CONFIG_SYS_MSC1_VAL, MSC1); - writelrb(CONFIG_SYS_MSC2_VAL, MSC2); - /* - * 2) Initialize Card Interface - */ - - /* MECR: Memory Expansion Card Register */ - writelrb(CONFIG_SYS_MECR_VAL, MECR); - /* MCMEM0: Card Interface slot 0 timing */ - writelrb(CONFIG_SYS_MCMEM0_VAL, MCMEM0); - /* MCMEM1: Card Interface slot 1 timing */ - writelrb(CONFIG_SYS_MCMEM1_VAL, MCMEM1); - /* MCATT0: Card Interface Attribute Space Timing, slot 0 */ - writelrb(CONFIG_SYS_MCATT0_VAL, MCATT0); - /* MCATT1: Card Interface Attribute Space Timing, slot 1 */ - writelrb(CONFIG_SYS_MCATT1_VAL, MCATT1); - /* MCIO0: Card Interface I/O Space Timing, slot 0 */ - writelrb(CONFIG_SYS_MCIO0_VAL, MCIO0); - /* MCIO1: Card Interface I/O Space Timing, slot 1 */ - writelrb(CONFIG_SYS_MCIO1_VAL, MCIO1); - - /* - * 3) Configure Fly-By DMA register - */ - - writelrb(CONFIG_SYS_FLYCNFG_VAL, FLYCNFG); - - /* - * 4) Initialize Timing for Sync Memory (SDCLK0) - */ - - /* - * Before accessing MDREFR we need a valid DRI field, so we set - * this to power on defaults + DRI field. - */ - - /* Read current MDREFR config and zero out DRI */ - tmp = readl(MDREFR) & ~0xfff; - /* Add user-specified DRI */ - tmp |= CONFIG_SYS_MDREFR_VAL & 0xfff; - /* Configure important bits */ - tmp |= MDREFR_K0RUN | MDREFR_SLFRSH; - tmp &= ~(MDREFR_APD | MDREFR_E1PIN); - - /* Write MDREFR back */ - writelrb(tmp, MDREFR); - - /* - * 5) Initialize Synchronous Static Memory (Flash/Peripherals) - */ - - /* Initialize SXCNFG register. Assert the enable bits. - * - * Write SXMRS to cause an MRS command to all enabled banks of - * synchronous static memory. Note that SXLCR need not be written - * at this time. - */ - writelrb(CONFIG_SYS_SXCNFG_VAL, SXCNFG); - - /* - * 6) Initialize SDRAM - */ - - writelrb(CONFIG_SYS_MDREFR_VAL & ~MDREFR_SLFRSH, MDREFR); - writelrb(CONFIG_SYS_MDREFR_VAL | MDREFR_E1PIN, MDREFR); - - /* - * 7) Write MDCNFG with MDCNFG:DEx deasserted (set to 0), to configure - * but not enable each SDRAM partition pair. - */ - - writelrb(CONFIG_SYS_MDCNFG_VAL & - ~(MDCNFG_DE0 | MDCNFG_DE1 | MDCNFG_DE2 | MDCNFG_DE3), MDCNFG); - - /* Wait for the clock to the SDRAMs to stabilize, 100..200 usec. */ - writel(0, OSCR); - while (readl(OSCR) < 0x300) - asm volatile("" : : : "memory"); - - /* - * 8) Trigger a number (usually 8) refresh cycles by attempting - * non-burst read or write accesses to disabled SDRAM, as commonly - * specified in the power up sequence documented in SDRAM data - * sheets. The address(es) used for this purpose must not be - * cacheable. - */ - for (i = 9; i >= 0; i--) { - writel(i, 0xa0000000); - asm volatile("" : : : "memory"); - } - /* - * 9) Write MDCNFG with enable bits asserted (MDCNFG:DEx set to 1). - */ - - tmp = CONFIG_SYS_MDCNFG_VAL & - (MDCNFG_DE0 | MDCNFG_DE1 | MDCNFG_DE2 | MDCNFG_DE3); - tmp |= readl(MDCNFG); - writelrb(tmp, MDCNFG); - - /* - * 10) Write MDMRS. - */ - - writelrb(CONFIG_SYS_MDMRS_VAL, MDMRS); - - /* - * 11) Enable APD - */ - - if (CONFIG_SYS_MDREFR_VAL & MDREFR_APD) { - tmp = readl(MDREFR); - tmp |= MDREFR_APD; - writelrb(tmp, MDREFR); - } -} - -void pxa_gpio_setup(void) -{ - writel(CONFIG_SYS_GPSR0_VAL, GPSR0); - writel(CONFIG_SYS_GPSR1_VAL, GPSR1); - writel(CONFIG_SYS_GPSR2_VAL, GPSR2); -#if defined(CONFIG_CPU_PXA27X) - writel(CONFIG_SYS_GPSR3_VAL, GPSR3); -#endif - - writel(CONFIG_SYS_GPCR0_VAL, GPCR0); - writel(CONFIG_SYS_GPCR1_VAL, GPCR1); - writel(CONFIG_SYS_GPCR2_VAL, GPCR2); -#if defined(CONFIG_CPU_PXA27X) - writel(CONFIG_SYS_GPCR3_VAL, GPCR3); -#endif - - writel(CONFIG_SYS_GPDR0_VAL, GPDR0); - writel(CONFIG_SYS_GPDR1_VAL, GPDR1); - writel(CONFIG_SYS_GPDR2_VAL, GPDR2); -#if defined(CONFIG_CPU_PXA27X) - writel(CONFIG_SYS_GPDR3_VAL, GPDR3); -#endif - - writel(CONFIG_SYS_GAFR0_L_VAL, GAFR0_L); - writel(CONFIG_SYS_GAFR0_U_VAL, GAFR0_U); - writel(CONFIG_SYS_GAFR1_L_VAL, GAFR1_L); - writel(CONFIG_SYS_GAFR1_U_VAL, GAFR1_U); - writel(CONFIG_SYS_GAFR2_L_VAL, GAFR2_L); - writel(CONFIG_SYS_GAFR2_U_VAL, GAFR2_U); -#if defined(CONFIG_CPU_PXA27X) - writel(CONFIG_SYS_GAFR3_L_VAL, GAFR3_L); - writel(CONFIG_SYS_GAFR3_U_VAL, GAFR3_U); -#endif - - writel(CONFIG_SYS_PSSR_VAL, PSSR); -} - -void pxa_interrupt_setup(void) -{ - writel(0, ICLR); - writel(0, ICMR); -#if defined(CONFIG_CPU_PXA27X) - writel(0, ICLR2); - writel(0, ICMR2); -#endif -} - -void pxa_clock_setup(void) -{ - writel(CONFIG_SYS_CKEN, CKEN); - writel(CONFIG_SYS_CCCR, CCCR); - asm volatile("mcr p14, 0, %0, c6, c0, 0" : : "r"(0x0b)); - - /* enable the 32Khz oscillator for RTC and PowerManager */ - writel(OSCC_OON, OSCC); - while (!(readl(OSCC) & OSCC_OOK)) - asm volatile("" : : : "memory"); -} - -void pxa_wakeup(void) -{ - uint32_t rcsr; - - rcsr = readl(RCSR); - writel(rcsr & (RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR), RCSR); - - /* Wakeup */ - if (rcsr & RCSR_SMR) { - writel(PSSR_PH, PSSR); - pxa2xx_dram_init(); - icache_disable(); - dcache_disable(); - asm volatile("mov pc, %0" : : "r"(readl(PSPR))); - } -} - -int arch_cpu_init(void) -{ - pxa_gpio_setup(); - pxa_wakeup(); - pxa_interrupt_setup(); - pxa_clock_setup(); - return 0; -} - -void i2c_clk_enable(void) -{ - /* Set the global I2C clock on */ - writel(readl(CKEN) | CKEN14_I2C, CKEN); -} - -void __attribute__((weak)) reset_cpu(void) __attribute__((noreturn)); - -void reset_cpu(void) -{ - uint32_t tmp; - - setbits_le32(OWER, OWER_WME); - - tmp = readl(OSCR); - tmp += 0x1000; - writel(tmp, OSMR3); - writel(MDREFR_SLFRSH, MDREFR); - - for (;;) - ; -} - -void enable_caches(void) -{ -#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) - icache_enable(); -#endif -#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) - dcache_enable(); -#endif -} diff --git a/arch/arm/cpu/pxa/relocate.S b/arch/arm/cpu/pxa/relocate.S deleted file mode 100644 index 778cd45e9c2..00000000000 --- a/arch/arm/cpu/pxa/relocate.S +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * relocate - PXA270 vector relocation - * - * Copyright (c) 2013 Albert ARIBAUD - */ - -#include - -/* - * The PXA SoC is very specific with respect to exceptions: it - * does not provide RAM at the high vectors address (0xFFFF0000), - * thus only the low address (0x00000000) is useable; but that is - * in ROM, so let's avoid relocating the vectors. - */ - .section .text.relocate_vectors,"ax",%progbits - -ENTRY(relocate_vectors) - - bx lr - -ENDPROC(relocate_vectors) diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S deleted file mode 100644 index ab7bcb4e562..00000000000 --- a/arch/arm/cpu/pxa/start.S +++ /dev/null @@ -1,98 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * armboot - Startup Code for XScale CPU-core - * - * Copyright (C) 1998 Dan Malek - * Copyright (C) 1999 Magnus Damm - * Copyright (C) 2000 Wolfgang Denk - * Copyright (C) 2001 Alex Zuepke - * Copyright (C) 2001 Marius Groger - * Copyright (C) 2002 Alex Zupke - * Copyright (C) 2002 Gary Jennejohn - * Copyright (C) 2002 Kyle Harris - * Copyright (C) 2003 Kai-Uwe Bloem - * Copyright (C) 2003 Kshitij - * Copyright (C) 2003 Richard Woodruff - * Copyright (C) 2003 Robert Schwebel - * Copyright (C) 2004 Texas Instruments - * Copyright (C) 2010 Marek Vasut - */ - -#include -#include - -/* - ************************************************************************* - * - * Startup Code (reset vector) - * - * do important init only if we don't start from memory! - * setup Memory and board specific bits prior to relocation. - * relocate armboot to ram - * setup stack - * - ************************************************************************* - */ - - .globl reset - -reset: - /* - * set the cpu to SVC32 mode - */ - mrs r0,cpsr - bic r0,r0,#0x1f - orr r0,r0,#0xd3 - msr cpsr,r0 - -#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) - bl cpu_init_crit -#endif - -#ifdef CONFIG_CPU_PXA27X - /* - * enable clock for SRAM - */ - ldr r0,=CKEN - ldr r1,[r0] - orr r1,r1,#(1 << 20) - str r1,[r0] -#endif - bl _main - -/*------------------------------------------------------------------------------*/ - - .globl c_runtime_cpu_setup -c_runtime_cpu_setup: - bx lr - -/* - ************************************************************************* - * - * CPU_init_critical registers - * - * setup important registers - * setup memory timing - * - ************************************************************************* - */ -#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) -cpu_init_crit: - /* - * flush v4 I/D caches - */ - mov r0, #0 - mcr p15, 0, r0, c7, c7, 0 /* Invalidate I+D+BTB caches */ - mcr p15, 0, r0, c8, c7, 0 /* Invalidate Unified TLB */ - - /* - * disable MMU stuff and caches - */ - mrc p15, 0, r0, c1, c0, 0 - bic r0, r0, #0x00003300 @ clear bits 13:12, 9:8 (--VI --RS) - bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM) - orr r0, r0, #0x00000002 @ set bit 1 (A) Align - mcr p15, 0, r0, c1, c0, 0 - - mov pc, lr /* back to my caller */ -#endif /* !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) */ diff --git a/arch/arm/cpu/pxa/timer.c b/arch/arm/cpu/pxa/timer.c deleted file mode 100644 index 8e9d610441e..00000000000 --- a/arch/arm/cpu/pxa/timer.c +++ /dev/null @@ -1,16 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Marvell PXA2xx/3xx timer driver - * - * Copyright (C) 2011 Marek Vasut - */ - -#include -#include -#include - -int timer_init(void) -{ - writel(0, CONFIG_SYS_TIMER_COUNTER); - return 0; -} diff --git a/arch/arm/cpu/pxa/usb.c b/arch/arm/cpu/pxa/usb.c deleted file mode 100644 index 13e010d91ec..00000000000 --- a/arch/arm/cpu/pxa/usb.c +++ /dev/null @@ -1,89 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2006 - * Markus Klotzbuecher, DENX Software Engineering - */ - -#include -#include - -#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) -# if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_CPU_PXA27X) - -#include -#include -#include - -int usb_cpu_init(void) -{ -#if defined(CONFIG_CPU_MONAHANS) - /* Enable USB host clock. */ - writel(readl(CKENA) | CKENA_2_USBHOST | CKENA_20_UDC, CKENA); - udelay(100); -#endif -#if defined(CONFIG_CPU_PXA27X) - /* Enable USB host clock. */ - writel(readl(CKEN) | CKEN10_USBHOST, CKEN); -#endif - -#if defined(CONFIG_CPU_MONAHANS) - /* Configure Port 2 for Host (USB Client Registers) */ - writel(0x3000c, UP2OCR); -#endif - - writel(readl(UHCHR) | UHCHR_FHR, UHCHR); - mdelay(11); - writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR); - - writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR); - while (readl(UHCHR) & UHCHR_FSBIR) - udelay(1); - -#if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X) - writel(readl(UHCHR) & ~UHCHR_SSEP0, UHCHR); -#endif -#if defined(CONFIG_CPU_PXA27X) - writel(readl(UHCHR) & ~UHCHR_SSEP2, UHCHR); -#endif - writel(readl(UHCHR) & ~(UHCHR_SSEP1 | UHCHR_SSE), UHCHR); - - return 0; -} - -int usb_cpu_stop(void) -{ - writel(readl(UHCHR) | UHCHR_FHR, UHCHR); - udelay(11); - writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR); - - writel(readl(UHCCOMS) | UHCCOMS_HCR, UHCCOMS); - udelay(10); - -#if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X) - writel(readl(UHCHR) | UHCHR_SSEP0, UHCHR); -#endif -#if defined(CONFIG_CPU_PXA27X) - writel(readl(UHCHR) | UHCHR_SSEP2, UHCHR); -#endif - writel(readl(UHCHR) | UHCHR_SSEP1 | UHCHR_SSE, UHCHR); - -#if defined(CONFIG_CPU_MONAHANS) - /* Disable USB host clock. */ - writel(readl(CKENA) & ~(CKENA_2_USBHOST | CKENA_20_UDC), CKENA); - udelay(100); -#endif -#if defined(CONFIG_CPU_PXA27X) - /* Disable USB host clock. */ - writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN); -#endif - - return 0; -} - -int usb_cpu_init_fail(void) -{ - return usb_cpu_stop(); -} - -# endif /* defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_CPU_PXA27X) */ -#endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */ diff --git a/arch/arm/include/asm/arch-pxa/bitfield.h b/arch/arm/include/asm/arch-pxa/bitfield.h deleted file mode 100644 index 104a21c2e47..00000000000 --- a/arch/arm/include/asm/arch-pxa/bitfield.h +++ /dev/null @@ -1,112 +0,0 @@ -/* - * FILE bitfield.h - * - * Version 1.1 - * Author Copyright (c) Marc A. Viredaz, 1998 - * DEC Western Research Laboratory, Palo Alto, CA - * Date April 1998 (April 1997) - * System Advanced RISC Machine (ARM) - * Language C or ARM Assembly - * Purpose Definition of macros to operate on bit fields. - */ - - -#ifndef __BITFIELD_H -#define __BITFIELD_H - -#ifndef __ASSEMBLY__ -#define UData(Data) ((unsigned long) (Data)) -#else -#define UData(Data) (Data) -#endif - - -/* - * MACRO: Fld - * - * Purpose - * The macro "Fld" encodes a bit field, given its size and its shift value - * with respect to bit 0. - * - * Note - * A more intuitive way to encode bit fields would have been to use their - * mask. However, extracting size and shift value information from a bit - * field's mask is cumbersome and might break the assembler (255-character - * line-size limit). - * - * Input - * Size Size of the bit field, in number of bits. - * Shft Shift value of the bit field with respect to bit 0. - * - * Output - * Fld Encoded bit field. - */ - -#define Fld(Size, Shft) (((Size) << 16) + (Shft)) - - -/* - * MACROS: FSize, FShft, FMsk, FAlnMsk, F1stBit - * - * Purpose - * The macros "FSize", "FShft", "FMsk", "FAlnMsk", and "F1stBit" return - * the size, shift value, mask, aligned mask, and first bit of a - * bit field. - * - * Input - * Field Encoded bit field (using the macro "Fld"). - * - * Output - * FSize Size of the bit field, in number of bits. - * FShft Shift value of the bit field with respect to bit 0. - * FMsk Mask for the bit field. - * FAlnMsk Mask for the bit field, aligned on bit 0. - * F1stBit First bit of the bit field. - */ - -#define FSize(Field) ((Field) >> 16) -#define FShft(Field) ((Field) & 0x0000FFFF) -#define FMsk(Field) (((UData (1) << FSize (Field)) - 1) << FShft (Field)) -#define FAlnMsk(Field) ((UData (1) << FSize (Field)) - 1) -#define F1stBit(Field) (UData (1) << FShft (Field)) - - -/* - * MACRO: FInsrt - * - * Purpose - * The macro "FInsrt" inserts a value into a bit field by shifting the - * former appropriately. - * - * Input - * Value Bit-field value. - * Field Encoded bit field (using the macro "Fld"). - * - * Output - * FInsrt Bit-field value positioned appropriately. - */ - -#define FInsrt(Value, Field) \ - (UData (Value) << FShft (Field)) - - -/* - * MACRO: FExtr - * - * Purpose - * The macro "FExtr" extracts the value of a bit field by masking and - * shifting it appropriately. - * - * Input - * Data Data containing the bit-field to be extracted. - * Field Encoded bit field (using the macro "Fld"). - * - * Output - * FExtr Bit-field value. - */ - -#define FExtr(Data, Field) \ - ((UData (Data) >> FShft (Field)) & FAlnMsk (Field)) - - -#endif /* __BITFIELD_H */ diff --git a/arch/arm/include/asm/arch-pxa/config.h b/arch/arm/include/asm/arch-pxa/config.h deleted file mode 100644 index 11effd47f5b..00000000000 --- a/arch/arm/include/asm/arch-pxa/config.h +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2014 Andrew Ruder - */ - -#ifndef _ASM_ARM_PXA_CONFIG_ -#define _ASM_ARM_PXA_CONFIG_ - -#include - -/* - * Generic timer support - */ -#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS) -#define CONFIG_SYS_TIMER_RATE 3250000 -#else -#error "Timer frequency unknown - please config PXA CPU type" -#endif - -#define CONFIG_SYS_TIMER_COUNTER OSCR - -#endif /* _ASM_ARM_PXA_CONFIG_ */ diff --git a/arch/arm/include/asm/arch-pxa/hardware.h b/arch/arm/include/asm/arch-pxa/hardware.h deleted file mode 100644 index 6d0023d7b86..00000000000 --- a/arch/arm/include/asm/arch-pxa/hardware.h +++ /dev/null @@ -1,82 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/hardware.h - * - * Author: Nicolas Pitre - * Created: Jun 15, 2001 - * Copyright: MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Note: This file was taken from linux-2.4.19-rmk4-pxa1 - * - * - 2003/01/20 implementation specifics activated - * Robert Schwebel - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include - -/* - * Define CONFIG_CPU_MONAHANS in case some CPU of the PXA3xx family is selected. - * PXA300/310/320 all have distinct register mappings in some cases, that's why - * the exact CPU has to be selected. CONFIG_CPU_MONAHANS is a helper for common - * drivers and compatibility glue with old source then. - */ -#ifndef CONFIG_CPU_MONAHANS -#if defined(CONFIG_CPU_PXA300) || \ - defined(CONFIG_CPU_PXA310) || \ - defined(CONFIG_CPU_PXA320) -#define CONFIG_CPU_MONAHANS -#endif -#endif - -/* - * These are statically mapped PCMCIA IO space for designs using it as a - * generic IO bus, typically with ISA parts, hardwired IDE interfaces, etc. - * The actual PCMCIA code is mapping required IO region at run time. - */ -#define PCMCIA_IO_0_BASE 0xf6000000 -#define PCMCIA_IO_1_BASE 0xf7000000 - - -/* - * We requires absolute addresses. - */ -#define PCIO_BASE 0 - -/* - * Workarounds for at least 2 errata so far require this. - * The mapping is set in mach-pxa/generic.c. - */ -#define UNCACHED_PHYS_0 0xff000000 -#define UNCACHED_ADDR UNCACHED_PHYS_0 - -/* - * Intel PXA internal I/O mappings: - * - * 0x40000000 - 0x41ffffff <--> 0xf8000000 - 0xf9ffffff - * 0x44000000 - 0x45ffffff <--> 0xfa000000 - 0xfbffffff - * 0x48000000 - 0x49ffffff <--> 0xfc000000 - 0xfdffffff - */ - -#include "pxa-regs.h" - -#ifndef __ASSEMBLY__ - -/* - * GPIO edge detection for IRQs: - * IRQs are generated on Falling-Edge, Rising-Edge, or both. - * This must be called *before* the corresponding IRQ is registered. - * Use this instead of directly setting GRER/GFER. - */ -#define GPIO_FALLING_EDGE 1 -#define GPIO_RISING_EDGE 2 -#define GPIO_BOTH_EDGES 3 - -#endif - -#endif /* _ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/include/asm/arch-pxa/pxa-regs.h b/arch/arm/include/asm/arch-pxa/pxa-regs.h deleted file mode 100644 index b81b42c07c7..00000000000 --- a/arch/arm/include/asm/arch-pxa/pxa-regs.h +++ /dev/null @@ -1,2635 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/pxa-regs.h - * - * Author: Nicolas Pitre - * Created: Jun 15, 2001 - * Copyright: MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * - 2003/01/20: Robert Schwebel */ -#define GPLR1 0x40E00004 /* GPIO Pin-Level Register GPIO<63:32> */ -#define GPLR2 0x40E00008 /* GPIO Pin-Level Register GPIO<80:64> */ - -#define GPDR0 0x40E0000C /* GPIO Pin Direction Register GPIO<31:0> */ -#define GPDR1 0x40E00010 /* GPIO Pin Direction Register GPIO<63:32> */ -#define GPDR2 0x40E00014 /* GPIO Pin Direction Register GPIO<80:64> */ - -#define GPSR0 0x40E00018 /* GPIO Pin Output Set Register GPIO<31:0> */ -#define GPSR1 0x40E0001C /* GPIO Pin Output Set Register GPIO<63:32> */ -#define GPSR2 0x40E00020 /* GPIO Pin Output Set Register GPIO<80:64> */ - -#define GPCR0 0x40E00024 /* GPIO Pin Output Clear Register GPIO<31:0> */ -#define GPCR1 0x40E00028 /* GPIO Pin Output Clear Register GPIO <63:32> */ -#define GPCR2 0x40E0002C /* GPIO Pin Output Clear Register GPIO <80:64> */ - -#define GRER0 0x40E00030 /* GPIO Rising-Edge Detect Register GPIO<31:0> */ -#define GRER1 0x40E00034 /* GPIO Rising-Edge Detect Register GPIO<63:32> */ -#define GRER2 0x40E00038 /* GPIO Rising-Edge Detect Register GPIO<80:64> */ - -#define GFER0 0x40E0003C /* GPIO Falling-Edge Detect Register GPIO<31:0> */ -#define GFER1 0x40E00040 /* GPIO Falling-Edge Detect Register GPIO<63:32> */ -#define GFER2 0x40E00044 /* GPIO Falling-Edge Detect Register GPIO<80:64> */ - -#define GEDR0 0x40E00048 /* GPIO Edge Detect Status Register GPIO<31:0> */ -#define GEDR1 0x40E0004C /* GPIO Edge Detect Status Register GPIO<63:32> */ -#define GEDR2 0x40E00050 /* GPIO Edge Detect Status Register GPIO<80:64> */ - -#define GAFR0_L 0x40E00054 /* GPIO Alternate Function Select Register GPIO<15:0> */ -#define GAFR0_U 0x40E00058 /* GPIO Alternate Function Select Register GPIO<31:16> */ -#define GAFR1_L 0x40E0005C /* GPIO Alternate Function Select Register GPIO<47:32> */ -#define GAFR1_U 0x40E00060 /* GPIO Alternate Function Select Register GPIO<63:48> */ -#define GAFR2_L 0x40E00064 /* GPIO Alternate Function Select Register GPIO<79:64> */ -#define GAFR2_U 0x40E00068 /* GPIO Alternate Function Select Register GPIO 80 */ - -#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS) -#define GPLR3 0x40E00100 /* GPIO Pin-Level Register GPIO<127:96> */ -#define GPDR3 0x40E0010C /* GPIO Pin Direction Register GPIO<127:96> */ -#define GPSR3 0x40E00118 /* GPIO Pin Output Set Register GPIO<127:96> */ -#define GPCR3 0x40E00124 /* GPIO Pin Output Clear Register GPIO<127:96> */ -#define GRER3 0x40E00130 /* GPIO Rising-Edge Detect Register GPIO<127:96> */ -#define GFER3 0x40E0013C /* GPIO Falling-Edge Detect Register GPIO<127:96> */ -#define GEDR3 0x40E00148 /* GPIO Edge Detect Status Register GPIO<127:96> */ -#define GAFR3_L 0x40E0006C /* GPIO Alternate Function Select Register GPIO<111:96> */ -#define GAFR3_U 0x40E00070 /* GPIO Alternate Function Select Register GPIO<127:112> */ -#endif /* CONFIG_CPU_PXA27X || CONFIG_CPU_MONAHANS */ - -#ifdef CONFIG_CPU_MONAHANS -#define GSDR0 0x40E00400 /* Bit-wise Set of GPDR[31:0] */ -#define GSDR1 0x40E00404 /* Bit-wise Set of GPDR[63:32] */ -#define GSDR2 0x40E00408 /* Bit-wise Set of GPDR[95:64] */ -#define GSDR3 0x40E0040C /* Bit-wise Set of GPDR[127:96] */ - -#define GCDR0 0x40E00420 /* Bit-wise Clear of GPDR[31:0] */ -#define GCDR1 0x40E00424 /* Bit-wise Clear of GPDR[63:32] */ -#define GCDR2 0x40E00428 /* Bit-wise Clear of GPDR[95:64] */ -#define GCDR3 0x40E0042C /* Bit-wise Clear of GPDR[127:96] */ - -#define GSRER0 0x40E00440 /* Set Rising Edge Det. Enable [31:0] */ -#define GSRER1 0x40E00444 /* Set Rising Edge Det. Enable [63:32] */ -#define GSRER2 0x40E00448 /* Set Rising Edge Det. Enable [95:64] */ -#define GSRER3 0x40E0044C /* Set Rising Edge Det. Enable [127:96] */ - -#define GCRER0 0x40E00460 /* Clear Rising Edge Det. Enable [31:0] */ -#define GCRER1 0x40E00464 /* Clear Rising Edge Det. Enable [63:32] */ -#define GCRER2 0x40E00468 /* Clear Rising Edge Det. Enable [95:64] */ -#define GCRER3 0x40E0046C /* Clear Rising Edge Det. Enable[127:96] */ - -#define GSFER0 0x40E00480 /* Set Falling Edge Det. Enable [31:0] */ -#define GSFER1 0x40E00484 /* Set Falling Edge Det. Enable [63:32] */ -#define GSFER2 0x40E00488 /* Set Falling Edge Det. Enable [95:64] */ -#define GSFER3 0x40E0048C /* Set Falling Edge Det. Enable[127:96] */ - -#define GCFER0 0x40E004A0 /* Clr Falling Edge Det. Enable [31:0] */ -#define GCFER1 0x40E004A4 /* Clr Falling Edge Det. Enable [63:32] */ -#define GCFER2 0x40E004A8 /* Clr Falling Edge Det. Enable [95:64] */ -#define GCFER3 0x40E004AC /* Clr Falling Edge Det. Enable[127:96] */ - -#define GSDR(x) (0x40E00400 | ((x) & 0x60) >> 3) -#define GCDR(x) (0x40E00420 | ((x) & 0x60) >> 3) -#endif - -#define _GPLR(x) (0x40E00000 + (((x) & 0x60) >> 3)) -#define _GPDR(x) (0x40E0000C + (((x) & 0x60) >> 3)) -#define _GPSR(x) (0x40E00018 + (((x) & 0x60) >> 3)) -#define _GPCR(x) (0x40E00024 + (((x) & 0x60) >> 3)) -#define _GRER(x) (0x40E00030 + (((x) & 0x60) >> 3)) -#define _GFER(x) (0x40E0003C + (((x) & 0x60) >> 3)) -#define _GEDR(x) (0x40E00048 + (((x) & 0x60) >> 3)) -#define _GAFR(x) (0x40E00054 + (((x) & 0x70) >> 2)) - -#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS) -#define GPLR(x) (((((x) & 0x7f) < 96) ? _GPLR(x) : GPLR3)) -#define GPDR(x) (((((x) & 0x7f) < 96) ? _GPDR(x) : GPDR3)) -#define GPSR(x) (((((x) & 0x7f) < 96) ? _GPSR(x) : GPSR3)) -#define GPCR(x) (((((x) & 0x7f) < 96) ? _GPCR(x) : GPCR3)) -#define GRER(x) (((((x) & 0x7f) < 96) ? _GRER(x) : GRER3)) -#define GFER(x) (((((x) & 0x7f) < 96) ? _GFER(x) : GFER3)) -#define GEDR(x) (((((x) & 0x7f) < 96) ? _GEDR(x) : GEDR3)) -#define GAFR(x) (((((x) & 0x7f) < 96) ? _GAFR(x) : \ - ((((x) & 0x7f) < 112) ? GAFR3_L : GAFR3_U))) -#else -#define GPLR(x) _GPLR(x) -#define GPDR(x) _GPDR(x) -#define GPSR(x) _GPSR(x) -#define GPCR(x) _GPCR(x) -#define GRER(x) _GRER(x) -#define GFER(x) _GFER(x) -#define GEDR(x) _GEDR(x) -#define GAFR(x) _GAFR(x) -#endif - -#define GPIO_bit(x) (1 << ((x) & 0x1f)) - -/******************************************************************************/ -/* - * Multi-function Pin Registers: - */ -/* PXA320 */ -#if defined(CONFIG_CPU_PXA320) -#define DF_IO0 0x40e1024c -#define DF_IO1 0x40e10254 -#define DF_IO2 0x40e1025c -#define DF_IO3 0x40e10264 -#define DF_IO4 0x40e1026c -#define DF_IO5 0x40e10274 -#define DF_IO6 0x40e1027c -#define DF_IO7 0x40e10284 -#define DF_IO8 0x40e10250 -#define DF_IO9 0x40e10258 -#define DF_IO10 0x40e10260 -#define DF_IO11 0x40e10268 -#define DF_IO12 0x40e10270 -#define DF_IO13 0x40e10278 -#define DF_IO14 0x40e10280 -#define DF_IO15 0x40e10288 -#define DF_CLE_nOE 0x40e10204 -#define DF_ALE_nWE1 0x40e10208 -#define DF_ALE_nWE2 0x40e1021c -#define DF_SCLK_E 0x40e10210 -#define DF_nCS0 0x40e10224 -#define DF_nCS1 0x40e10228 -#define nBE0 0x40e10214 -#define nBE1 0x40e10218 -#define nLUA 0x40e10234 -#define nLLA 0x40e10238 -#define DF_ADDR0 0x40e1023c -#define DF_ADDR1 0x40e10240 -#define DF_ADDR2 0x40e10244 -#define DF_ADDR3 0x40e10248 -#define DF_INT_RnB 0x40e10220 -#define DF_nCS0 0x40e10224 -#define DF_nCS1 0x40e10228 -#define DF_nWE 0x40e1022c -#define DF_nRE 0x40e10230 - -#define nXCVREN 0x40e10138 - -#define GPIO0 0x40e10124 -#define GPIO1 0x40e10128 -#define GPIO2 0x40e1012c -#define GPIO3 0x40e10130 -#define GPIO4 0x40e10134 -#define GPIO5 0x40e1028c -#define GPIO6 0x40e10290 -#define GPIO7 0x40e10294 -#define GPIO8 0x40e10298 -#define GPIO9 0x40e1029c -#define GPIO10 0x40e10458 -#define GPIO11 0x40e102a0 -#define GPIO12 0x40e102a4 -#define GPIO13 0x40e102a8 -#define GPIO14 0x40e102ac -#define GPIO15 0x40e102b0 -#define GPIO16 0x40e102b4 -#define GPIO17 0x40e102b8 -#define GPIO18 0x40e102bc -#define GPIO19 0x40e102c0 -#define GPIO20 0x40e102c4 -#define GPIO21 0x40e102c8 -#define GPIO22 0x40e102cc -#define GPIO23 0x40e102d0 -#define GPIO24 0x40e102d4 -#define GPIO25 0x40e102d8 -#define GPIO26 0x40e102dc - -#define GPIO27 0x40e10400 -#define GPIO28 0x40e10404 -#define GPIO29 0x40e10408 -#define GPIO30 0x40e1040c -#define GPIO31 0x40e10410 -#define GPIO32 0x40e10414 -#define GPIO33 0x40e10418 -#define GPIO34 0x40e1041c -#define GPIO35 0x40e10420 -#define GPIO36 0x40e10424 -#define GPIO37 0x40e10428 -#define GPIO38 0x40e1042c -#define GPIO39 0x40e10430 -#define GPIO40 0x40e10434 -#define GPIO41 0x40e10438 -#define GPIO42 0x40e1043c -#define GPIO43 0x40e10440 -#define GPIO44 0x40e10444 -#define GPIO45 0x40e10448 -#define GPIO46 0x40e1044c -#define GPIO47 0x40e10450 -#define GPIO48 0x40e10454 -#define GPIO49 0x40e1045c -#define GPIO50 0x40e10460 -#define GPIO51 0x40e10464 -#define GPIO52 0x40e10468 -#define GPIO53 0x40e1046c -#define GPIO54 0x40e10470 -#define GPIO55 0x40e10474 -#define GPIO56 0x40e10478 -#define GPIO57 0x40e1047c -#define GPIO58 0x40e10480 -#define GPIO59 0x40e10484 -#define GPIO60 0x40e10488 -#define GPIO61 0x40e1048c -#define GPIO62 0x40e10490 - -#define GPIO6_2 0x40e10494 -#define GPIO7_2 0x40e10498 -#define GPIO8_2 0x40e1049c -#define GPIO9_2 0x40e104a0 -#define GPIO10_2 0x40e104a4 -#define GPIO11_2 0x40e104a8 -#define GPIO12_2 0x40e104ac -#define GPIO13_2 0x40e104b0 - -#define GPIO63 0x40e104b4 -#define GPIO64 0x40e104b8 -#define GPIO65 0x40e104bc -#define GPIO66 0x40e104c0 -#define GPIO67 0x40e104c4 -#define GPIO68 0x40e104c8 -#define GPIO69 0x40e104cc -#define GPIO70 0x40e104d0 -#define GPIO71 0x40e104d4 -#define GPIO72 0x40e104d8 -#define GPIO73 0x40e104dc - -#define GPIO14_2 0x40e104e0 -#define GPIO15_2 0x40e104e4 -#define GPIO16_2 0x40e104e8 -#define GPIO17_2 0x40e104ec - -#define GPIO74 0x40e104f0 -#define GPIO75 0x40e104f4 -#define GPIO76 0x40e104f8 -#define GPIO77 0x40e104fc -#define GPIO78 0x40e10500 -#define GPIO79 0x40e10504 -#define GPIO80 0x40e10508 -#define GPIO81 0x40e1050c -#define GPIO82 0x40e10510 -#define GPIO83 0x40e10514 -#define GPIO84 0x40e10518 -#define GPIO85 0x40e1051c -#define GPIO86 0x40e10520 -#define GPIO87 0x40e10524 -#define GPIO88 0x40e10528 -#define GPIO89 0x40e1052c -#define GPIO90 0x40e10530 -#define GPIO91 0x40e10534 -#define GPIO92 0x40e10538 -#define GPIO93 0x40e1053c -#define GPIO94 0x40e10540 -#define GPIO95 0x40e10544 -#define GPIO96 0x40e10548 -#define GPIO97 0x40e1054c -#define GPIO98 0x40e10550 - -#define GPIO99 0x40e10600 -#define GPIO100 0x40e10604 -#define GPIO101 0x40e10608 -#define GPIO102 0x40e1060c -#define GPIO103 0x40e10610 -#define GPIO104 0x40e10614 -#define GPIO105 0x40e10618 -#define GPIO106 0x40e1061c -#define GPIO107 0x40e10620 -#define GPIO108 0x40e10624 -#define GPIO109 0x40e10628 -#define GPIO110 0x40e1062c -#define GPIO111 0x40e10630 -#define GPIO112 0x40e10634 - -#define GPIO113 0x40e10638 -#define GPIO114 0x40e1063c -#define GPIO115 0x40e10640 -#define GPIO116 0x40e10644 -#define GPIO117 0x40e10648 -#define GPIO118 0x40e1064c -#define GPIO119 0x40e10650 -#define GPIO120 0x40e10654 -#define GPIO121 0x40e10658 -#define GPIO122 0x40e1065c -#define GPIO123 0x40e10660 -#define GPIO124 0x40e10664 -#define GPIO125 0x40e10668 -#define GPIO126 0x40e1066c -#define GPIO127 0x40e10670 - -#define GPIO0_2 0x40e10674 -#define GPIO1_2 0x40e10678 -#define GPIO2_2 0x40e1067c -#define GPIO3_2 0x40e10680 -#define GPIO4_2 0x40e10684 -#define GPIO5_2 0x40e10688 - -/* PXA300 and PXA310 */ -#elif defined(CONFIG_CPU_PXA300) || defined(CONFIG_CPU_PXA310) -#define DF_IO0 0x40e10220 -#define DF_IO1 0x40e10228 -#define DF_IO2 0x40e10230 -#define DF_IO3 0x40e10238 -#define DF_IO4 0x40e10258 -#define DF_IO5 0x40e10260 -#define DF_IO7 0x40e10270 -#define DF_IO6 0x40e10268 -#define DF_IO8 0x40e10224 -#define DF_IO9 0x40e1022c -#define DF_IO10 0x40e10234 -#define DF_IO11 0x40e1023c -#define DF_IO12 0x40e1025c -#define DF_IO13 0x40e10264 -#define DF_IO14 0x40e1026c -#define DF_IO15 0x40e10274 -#define DF_CLE_NOE 0x40e10240 -#define DF_ALE_nWE 0x40e1020c -#define DF_SCLK_E 0x40e10250 -#define nCS0 0x40e100c4 -#define nCS1 0x40e100c0 -#define nBE0 0x40e10204 -#define nBE1 0x40e10208 -#define nLUA 0x40e10244 -#define nLLA 0x40e10254 -#define DF_ADDR0 0x40e10210 -#define DF_ADDR1 0x40e10214 -#define DF_ADDR2 0x40e10218 -#define DF_ADDR3 0x40e1021c -#define DF_INT_RnB 0x40e100c8 -#define DF_nCS0 0x40e10248 -#define DF_nCS1 0x40e10278 -#define DF_nWE 0x40e100cc -#define DF_nRE 0x40e10200 - -#define GPIO0 0x40e100b4 -#define GPIO1 0x40e100b8 -#define GPIO2 0x40e100bc -#define GPIO3 0x40e1027c -#define GPIO4 0x40e10280 - -#define GPIO5 0x40e10284 -#define GPIO6 0x40e10288 -#define GPIO7 0x40e1028c -#define GPIO8 0x40e10290 -#define GPIO9 0x40e10294 -#define GPIO10 0x40e10298 -#define GPIO11 0x40e1029c -#define GPIO12 0x40e102a0 -#define GPIO13 0x40e102a4 -#define GPIO14 0x40e102a8 -#define GPIO15 0x40e102ac -#define GPIO16 0x40e102b0 -#define GPIO17 0x40e102b4 -#define GPIO18 0x40e102b8 -#define GPIO19 0x40e102bc -#define GPIO20 0x40e102c0 -#define GPIO21 0x40e102c4 -#define GPIO22 0x40e102c8 -#define GPIO23 0x40e102cc -#define GPIO24 0x40e102d0 -#define GPIO25 0x40e102d4 -#define GPIO26 0x40e102d8 - -#define GPIO27 0x40e10400 -#define GPIO28 0x40e10404 -#define GPIO29 0x40e10408 -#define ULPI_STP 0x40e1040c -#define ULPI_NXT 0x40e10410 -#define ULPI_DIR 0x40e10414 -#define GPIO30 0x40e10418 -#define GPIO31 0x40e1041c -#define GPIO32 0x40e10420 -#define GPIO33 0x40e10424 -#define GPIO34 0x40e10428 -#define GPIO35 0x40e1042c -#define GPIO36 0x40e10430 -#define GPIO37 0x40e10434 -#define GPIO38 0x40e10438 -#define GPIO39 0x40e1043c -#define GPIO40 0x40e10440 -#define GPIO41 0x40e10444 -#define GPIO42 0x40e10448 -#define GPIO43 0x40e1044c -#define GPIO44 0x40e10450 -#define GPIO45 0x40e10454 -#define GPIO46 0x40e10458 -#define GPIO47 0x40e1045c -#define GPIO48 0x40e10460 - -#define GPIO49 0x40e10464 -#define GPIO50 0x40e10468 -#define GPIO51 0x40e1046c -#define GPIO52 0x40e10470 -#define GPIO53 0x40e10474 -#define GPIO54 0x40e10478 -#define GPIO55 0x40e1047c -#define GPIO56 0x40e10480 -#define GPIO57 0x40e10484 -#define GPIO58 0x40e10488 -#define GPIO59 0x40e1048c -#define GPIO60 0x40e10490 -#define GPIO61 0x40e10494 -#define GPIO62 0x40e10498 -#define GPIO63 0x40e1049c -#define GPIO64 0x40e104a0 -#define GPIO65 0x40e104a4 -#define GPIO66 0x40e104a8 -#define GPIO67 0x40e104ac -#define GPIO68 0x40e104b0 -#define GPIO69 0x40e104b4 -#define GPIO70 0x40e104b8 -#define GPIO71 0x40e104bc -#define GPIO72 0x40e104c0 -#define GPIO73 0x40e104c4 -#define GPIO74 0x40e104c8 -#define GPIO75 0x40e104cc -#define GPIO76 0x40e104d0 -#define GPIO77 0x40e104d4 -#define GPIO78 0x40e104d8 -#define GPIO79 0x40e104dc -#define GPIO80 0x40e104e0 -#define GPIO81 0x40e104e4 -#define GPIO82 0x40e104e8 -#define GPIO83 0x40e104ec -#define GPIO84 0x40e104f0 -#define GPIO85 0x40e104f4 -#define GPIO86 0x40e104f8 -#define GPIO87 0x40e104fc -#define GPIO88 0x40e10500 -#define GPIO89 0x40e10504 -#define GPIO90 0x40e10508 -#define GPIO91 0x40e1050c -#define GPIO92 0x40e10510 -#define GPIO93 0x40e10514 -#define GPIO94 0x40e10518 -#define GPIO95 0x40e1051c -#define GPIO96 0x40e10520 -#define GPIO97 0x40e10524 -#define GPIO98 0x40e10528 - -#define GPIO99 0x40e10600 -#define GPIO100 0x40e10604 -#define GPIO101 0x40e10608 -#define GPIO102 0x40e1060c -#define GPIO103 0x40e10610 -#define GPIO104 0x40e10614 -#define GPIO105 0x40e10618 -#define GPIO106 0x40e1061c -#define GPIO107 0x40e10620 -#define GPIO108 0x40e10624 -#define GPIO109 0x40e10628 -#define GPIO110 0x40e1062c -#define GPIO111 0x40e10630 -#define GPIO112 0x40e10634 - -#define GPIO113 0x40e10638 -#define GPIO114 0x40e1063c -#define GPIO115 0x40e10640 -#define GPIO116 0x40e10644 -#define GPIO117 0x40e10648 -#define GPIO118 0x40e1064c -#define GPIO119 0x40e10650 -#define GPIO120 0x40e10654 -#define GPIO121 0x40e10658 -#define GPIO122 0x40e1065c -#define GPIO123 0x40e10660 -#define GPIO124 0x40e10664 -#define GPIO125 0x40e10668 -#define GPIO126 0x40e1066c -#define GPIO127 0x40e10670 - -#define GPIO0_2 0x40e10674 -#define GPIO1_2 0x40e10678 -#define GPIO2_2 0x40e102dc -#define GPIO3_2 0x40e102e0 -#define GPIO4_2 0x40e102e4 -#define GPIO5_2 0x40e102e8 -#define GPIO6_2 0x40e102ec - -#ifndef CONFIG_CPU_PXA300 /* PXA310 only */ -#define GPIO7_2 0x40e1052c -#define GPIO8_2 0x40e10530 -#define GPIO9_2 0x40e10534 -#define GPIO10_2 0x40e10538 -#endif -#endif - -#ifdef CONFIG_CPU_MONAHANS -/* MFPR Bit Definitions, see 4-10, Vol. 1 */ -#define PULL_SEL 0x8000 -#define PULLUP_EN 0x4000 -#define PULLDOWN_EN 0x2000 - -#define DRIVE_FAST_1mA 0x0 -#define DRIVE_FAST_2mA 0x400 -#define DRIVE_FAST_3mA 0x800 -#define DRIVE_FAST_4mA 0xC00 -#define DRIVE_SLOW_6mA 0x1000 -#define DRIVE_FAST_6mA 0x1400 -#define DRIVE_SLOW_10mA 0x1800 -#define DRIVE_FAST_10mA 0x1C00 - -#define SLEEP_SEL 0x200 -#define SLEEP_DATA 0x100 -#define SLEEP_OE_N 0x80 -#define EDGE_CLEAR 0x40 -#define EDGE_FALL_EN 0x20 -#define EDGE_RISE_EN 0x10 - -#define AF_SEL_0 0x0 /* Alternate function 0 (reset state) */ -#define AF_SEL_1 0x1 /* Alternate function 1 */ -#define AF_SEL_2 0x2 /* Alternate function 2 */ -#define AF_SEL_3 0x3 /* Alternate function 3 */ -#define AF_SEL_4 0x4 /* Alternate function 4 */ -#define AF_SEL_5 0x5 /* Alternate function 5 */ -#define AF_SEL_6 0x6 /* Alternate function 6 */ -#define AF_SEL_7 0x7 /* Alternate function 7 */ - -#endif /* CONFIG_CPU_MONAHANS */ - -/* GPIO alternate function assignments */ - -#define GPIO1_RST 1 /* reset */ -#define GPIO6_MMCCLK 6 /* MMC Clock */ -#define GPIO8_48MHz 7 /* 48 MHz clock output */ -#define GPIO8_MMCCS0 8 /* MMC Chip Select 0 */ -#define GPIO9_MMCCS1 9 /* MMC Chip Select 1 */ -#define GPIO10_RTCCLK 10 /* real time clock (1 Hz) */ -#define GPIO11_3_6MHz 11 /* 3.6 MHz oscillator out */ -#define GPIO12_32KHz 12 /* 32 kHz out */ -#define GPIO13_MBGNT 13 /* memory controller grant */ -#define GPIO14_MBREQ 14 /* alternate bus master request */ -#define GPIO15_nCS_1 15 /* chip select 1 */ -#define GPIO16_PWM0 16 /* PWM0 output */ -#define GPIO17_PWM1 17 /* PWM1 output */ -#define GPIO18_RDY 18 /* Ext. Bus Ready */ -#define GPIO19_DREQ1 19 /* External DMA Request */ -#define GPIO20_DREQ0 20 /* External DMA Request */ -#define GPIO23_SCLK 23 /* SSP clock */ -#define GPIO24_SFRM 24 /* SSP Frame */ -#define GPIO25_STXD 25 /* SSP transmit */ -#define GPIO26_SRXD 26 /* SSP receive */ -#define GPIO27_SEXTCLK 27 /* SSP ext_clk */ -#define GPIO28_BITCLK 28 /* AC97/I2S bit_clk */ -#define GPIO29_SDATA_IN 29 /* AC97 Sdata_in0 / I2S Sdata_in */ -#define GPIO30_SDATA_OUT 30 /* AC97/I2S Sdata_out */ -#define GPIO31_SYNC 31 /* AC97/I2S sync */ -#define GPIO32_SDATA_IN1 32 /* AC97 Sdata_in1 */ -#define GPIO33_nCS_5 33 /* chip select 5 */ -#define GPIO34_FFRXD 34 /* FFUART receive */ -#define GPIO34_MMCCS0 34 /* MMC Chip Select 0 */ -#define GPIO35_FFCTS 35 /* FFUART Clear to send */ -#define GPIO36_FFDCD 36 /* FFUART Data carrier detect */ -#define GPIO37_FFDSR 37 /* FFUART data set ready */ -#define GPIO38_FFRI 38 /* FFUART Ring Indicator */ -#define GPIO39_MMCCS1 39 /* MMC Chip Select 1 */ -#define GPIO39_FFTXD 39 /* FFUART transmit data */ -#define GPIO40_FFDTR 40 /* FFUART data terminal Ready */ -#define GPIO41_FFRTS 41 /* FFUART request to send */ -#define GPIO42_BTRXD 42 /* BTUART receive data */ -#define GPIO43_BTTXD 43 /* BTUART transmit data */ -#define GPIO44_BTCTS 44 /* BTUART clear to send */ -#define GPIO45_BTRTS 45 /* BTUART request to send */ -#define GPIO46_ICPRXD 46 /* ICP receive data */ -#define GPIO46_STRXD 46 /* STD_UART receive data */ -#define GPIO47_ICPTXD 47 /* ICP transmit data */ -#define GPIO47_STTXD 47 /* STD_UART transmit data */ -#define GPIO48_nPOE 48 /* Output Enable for Card Space */ -#define GPIO49_nPWE 49 /* Write Enable for Card Space */ -#define GPIO50_nPIOR 50 /* I/O Read for Card Space */ -#define GPIO51_nPIOW 51 /* I/O Write for Card Space */ -#define GPIO52_nPCE_1 52 /* Card Enable for Card Space */ -#define GPIO53_nPCE_2 53 /* Card Enable for Card Space */ -#define GPIO53_MMCCLK 53 /* MMC Clock */ -#define GPIO54_MMCCLK 54 /* MMC Clock */ -#define GPIO54_pSKTSEL 54 /* Socket Select for Card Space */ -#define GPIO55_nPREG 55 /* Card Address bit 26 */ -#define GPIO56_nPWAIT 56 /* Wait signal for Card Space */ -#define GPIO57_nIOIS16 57 /* Bus Width select for I/O Card Space */ -#define GPIO58_LDD_0 58 /* LCD data pin 0 */ -#define GPIO59_LDD_1 59 /* LCD data pin 1 */ -#define GPIO60_LDD_2 60 /* LCD data pin 2 */ -#define GPIO61_LDD_3 61 /* LCD data pin 3 */ -#define GPIO62_LDD_4 62 /* LCD data pin 4 */ -#define GPIO63_LDD_5 63 /* LCD data pin 5 */ -#define GPIO64_LDD_6 64 /* LCD data pin 6 */ -#define GPIO65_LDD_7 65 /* LCD data pin 7 */ -#define GPIO66_LDD_8 66 /* LCD data pin 8 */ -#define GPIO66_MBREQ 66 /* alternate bus master req */ -#define GPIO67_LDD_9 67 /* LCD data pin 9 */ -#define GPIO67_MMCCS0 67 /* MMC Chip Select 0 */ -#define GPIO68_LDD_10 68 /* LCD data pin 10 */ -#define GPIO68_MMCCS1 68 /* MMC Chip Select 1 */ -#define GPIO69_LDD_11 69 /* LCD data pin 11 */ -#define GPIO69_MMCCLK 69 /* MMC_CLK */ -#define GPIO70_LDD_12 70 /* LCD data pin 12 */ -#define GPIO70_RTCCLK 70 /* Real Time clock (1 Hz) */ -#define GPIO71_LDD_13 71 /* LCD data pin 13 */ -#define GPIO71_3_6MHz 71 /* 3.6 MHz Oscillator clock */ -#define GPIO72_LDD_14 72 /* LCD data pin 14 */ -#define GPIO72_32kHz 72 /* 32 kHz clock */ -#define GPIO73_LDD_15 73 /* LCD data pin 15 */ -#define GPIO73_MBGNT 73 /* Memory controller grant */ -#define GPIO74_LCD_FCLK 74 /* LCD Frame clock */ -#define GPIO75_LCD_LCLK 75 /* LCD line clock */ -#define GPIO76_LCD_PCLK 76 /* LCD Pixel clock */ -#define GPIO77_LCD_ACBIAS 77 /* LCD AC Bias */ -#define GPIO78_nCS_2 78 /* chip select 2 */ -#define GPIO79_nCS_3 79 /* chip select 3 */ -#define GPIO80_nCS_4 80 /* chip select 4 */ - -/* GPIO alternate function mode & direction */ - -#define GPIO_IN 0x000 -#define GPIO_OUT 0x080 -#define GPIO_ALT_FN_1_IN 0x100 -#define GPIO_ALT_FN_1_OUT 0x180 -#define GPIO_ALT_FN_2_IN 0x200 -#define GPIO_ALT_FN_2_OUT 0x280 -#define GPIO_ALT_FN_3_IN 0x300 -#define GPIO_ALT_FN_3_OUT 0x380 -#define GPIO_MD_MASK_NR 0x07f -#define GPIO_MD_MASK_DIR 0x080 -#define GPIO_MD_MASK_FN 0x300 - -#define GPIO1_RTS_MD ( 1 | GPIO_ALT_FN_1_IN) -#define GPIO6_MMCCLK_MD ( 6 | GPIO_ALT_FN_1_OUT) -#define GPIO8_48MHz_MD ( 8 | GPIO_ALT_FN_1_OUT) -#define GPIO8_MMCCS0_MD ( 8 | GPIO_ALT_FN_1_OUT) -#define GPIO9_MMCCS1_MD ( 9 | GPIO_ALT_FN_1_OUT) -#define GPIO10_RTCCLK_MD (10 | GPIO_ALT_FN_1_OUT) -#define GPIO11_3_6MHz_MD (11 | GPIO_ALT_FN_1_OUT) -#define GPIO12_32KHz_MD (12 | GPIO_ALT_FN_1_OUT) -#define GPIO13_MBGNT_MD (13 | GPIO_ALT_FN_2_OUT) -#define GPIO14_MBREQ_MD (14 | GPIO_ALT_FN_1_IN) -#define GPIO15_nCS_1_MD (15 | GPIO_ALT_FN_2_OUT) -#define GPIO16_PWM0_MD (16 | GPIO_ALT_FN_2_OUT) -#define GPIO17_PWM1_MD (17 | GPIO_ALT_FN_2_OUT) -#define GPIO18_RDY_MD (18 | GPIO_ALT_FN_1_IN) -#define GPIO19_DREQ1_MD (19 | GPIO_ALT_FN_1_IN) -#define GPIO20_DREQ0_MD (20 | GPIO_ALT_FN_1_IN) -#define GPIO23_SCLK_md (23 | GPIO_ALT_FN_2_OUT) -#define GPIO24_SFRM_MD (24 | GPIO_ALT_FN_2_OUT) -#define GPIO25_STXD_MD (25 | GPIO_ALT_FN_2_OUT) -#define GPIO26_SRXD_MD (26 | GPIO_ALT_FN_1_IN) -#define GPIO27_SEXTCLK_MD (27 | GPIO_ALT_FN_1_IN) -#define GPIO28_BITCLK_AC97_MD (28 | GPIO_ALT_FN_1_IN) -#define GPIO28_BITCLK_I2S_MD (28 | GPIO_ALT_FN_2_IN) -#define GPIO29_SDATA_IN_AC97_MD (29 | GPIO_ALT_FN_1_IN) -#define GPIO29_SDATA_IN_I2S_MD (29 | GPIO_ALT_FN_2_IN) -#define GPIO30_SDATA_OUT_AC97_MD (30 | GPIO_ALT_FN_2_OUT) -#define GPIO30_SDATA_OUT_I2S_MD (30 | GPIO_ALT_FN_1_OUT) -#define GPIO31_SYNC_AC97_MD (31 | GPIO_ALT_FN_2_OUT) -#define GPIO31_SYNC_I2S_MD (31 | GPIO_ALT_FN_1_OUT) -#define GPIO32_SDATA_IN1_AC97_MD (32 | GPIO_ALT_FN_1_IN) -#define GPIO33_nCS_5_MD (33 | GPIO_ALT_FN_2_OUT) -#define GPIO34_FFRXD_MD (34 | GPIO_ALT_FN_1_IN) -#define GPIO34_MMCCS0_MD (34 | GPIO_ALT_FN_2_OUT) -#define GPIO35_FFCTS_MD (35 | GPIO_ALT_FN_1_IN) -#define GPIO36_FFDCD_MD (36 | GPIO_ALT_FN_1_IN) -#define GPIO37_FFDSR_MD (37 | GPIO_ALT_FN_1_IN) -#define GPIO38_FFRI_MD (38 | GPIO_ALT_FN_1_IN) -#define GPIO39_MMCCS1_MD (39 | GPIO_ALT_FN_1_OUT) -#define GPIO39_FFTXD_MD (39 | GPIO_ALT_FN_2_OUT) -#define GPIO40_FFDTR_MD (40 | GPIO_ALT_FN_2_OUT) -#define GPIO41_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT) -#define GPIO42_BTRXD_MD (42 | GPIO_ALT_FN_1_IN) -#define GPIO43_BTTXD_MD (43 | GPIO_ALT_FN_2_OUT) -#define GPIO44_BTCTS_MD (44 | GPIO_ALT_FN_1_IN) -#define GPIO45_BTRTS_MD (45 | GPIO_ALT_FN_2_OUT) -#define GPIO46_ICPRXD_MD (46 | GPIO_ALT_FN_1_IN) -#define GPIO46_STRXD_MD (46 | GPIO_ALT_FN_2_IN) -#define GPIO47_ICPTXD_MD (47 | GPIO_ALT_FN_2_OUT) -#define GPIO47_STTXD_MD (47 | GPIO_ALT_FN_1_OUT) -#define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT) -#define GPIO49_nPWE_MD (49 | GPIO_ALT_FN_2_OUT) -#define GPIO50_nPIOR_MD (50 | GPIO_ALT_FN_2_OUT) -#define GPIO51_nPIOW_MD (51 | GPIO_ALT_FN_2_OUT) -#define GPIO52_nPCE_1_MD (52 | GPIO_ALT_FN_2_OUT) -#define GPIO53_nPCE_2_MD (53 | GPIO_ALT_FN_2_OUT) -#define GPIO53_MMCCLK_MD (53 | GPIO_ALT_FN_1_OUT) -#define GPIO54_MMCCLK_MD (54 | GPIO_ALT_FN_1_OUT) -#define GPIO54_pSKTSEL_MD (54 | GPIO_ALT_FN_2_OUT) -#define GPIO55_nPREG_MD (55 | GPIO_ALT_FN_2_OUT) -#define GPIO56_nPWAIT_MD (56 | GPIO_ALT_FN_1_IN) -#define GPIO57_nIOIS16_MD (57 | GPIO_ALT_FN_1_IN) -#define GPIO58_LDD_0_MD (58 | GPIO_ALT_FN_2_OUT) -#define GPIO59_LDD_1_MD (59 | GPIO_ALT_FN_2_OUT) -#define GPIO60_LDD_2_MD (60 | GPIO_ALT_FN_2_OUT) -#define GPIO61_LDD_3_MD (61 | GPIO_ALT_FN_2_OUT) -#define GPIO62_LDD_4_MD (62 | GPIO_ALT_FN_2_OUT) -#define GPIO63_LDD_5_MD (63 | GPIO_ALT_FN_2_OUT) -#define GPIO64_LDD_6_MD (64 | GPIO_ALT_FN_2_OUT) -#define GPIO65_LDD_7_MD (65 | GPIO_ALT_FN_2_OUT) -#define GPIO66_LDD_8_MD (66 | GPIO_ALT_FN_2_OUT) -#define GPIO66_MBREQ_MD (66 | GPIO_ALT_FN_1_IN) -#define GPIO67_LDD_9_MD (67 | GPIO_ALT_FN_2_OUT) -#define GPIO67_MMCCS0_MD (67 | GPIO_ALT_FN_1_OUT) -#define GPIO68_LDD_10_MD (68 | GPIO_ALT_FN_2_OUT) -#define GPIO68_MMCCS1_MD (68 | GPIO_ALT_FN_1_OUT) -#define GPIO69_LDD_11_MD (69 | GPIO_ALT_FN_2_OUT) -#define GPIO69_MMCCLK_MD (69 | GPIO_ALT_FN_1_OUT) -#define GPIO70_LDD_12_MD (70 | GPIO_ALT_FN_2_OUT) -#define GPIO70_RTCCLK_MD (70 | GPIO_ALT_FN_1_OUT) -#define GPIO71_LDD_13_MD (71 | GPIO_ALT_FN_2_OUT) -#define GPIO71_3_6MHz_MD (71 | GPIO_ALT_FN_1_OUT) -#define GPIO72_LDD_14_MD (72 | GPIO_ALT_FN_2_OUT) -#define GPIO72_32kHz_MD (72 | GPIO_ALT_FN_1_OUT) -#define GPIO73_LDD_15_MD (73 | GPIO_ALT_FN_2_OUT) -#define GPIO73_MBGNT_MD (73 | GPIO_ALT_FN_1_OUT) -#define GPIO74_LCD_FCLK_MD (74 | GPIO_ALT_FN_2_OUT) -#define GPIO75_LCD_LCLK_MD (75 | GPIO_ALT_FN_2_OUT) -#define GPIO76_LCD_PCLK_MD (76 | GPIO_ALT_FN_2_OUT) -#define GPIO77_LCD_ACBIAS_MD (77 | GPIO_ALT_FN_2_OUT) -#define GPIO78_nCS_2_MD (78 | GPIO_ALT_FN_2_OUT) -#define GPIO79_nCS_3_MD (79 | GPIO_ALT_FN_2_OUT) -#define GPIO80_nCS_4_MD (80 | GPIO_ALT_FN_2_OUT) - -#define GPIO117_SCL (117 | GPIO_ALT_FN_1_OUT) -#define GPIO118_SDA (118 | GPIO_ALT_FN_1_OUT) - -/* - * Power Manager - */ -#ifdef CONFIG_CPU_MONAHANS - -#define ASCR 0x40F40000 /* Application Subsystem Power Status/Control Register */ -#define ARSR 0x40F40004 /* Application Subsystem Reset Status Register */ -#define AD3ER 0x40F40008 /* Application Subsystem D3 state Wakeup Enable Register */ -#define AD3SR 0x40F4000C /* Application Subsystem D3 state Wakeup Status Register */ -#define AD2D0ER 0x40F40010 /* Application Subsystem D2 to D0 state Wakeup Enable Register */ -#define AD2D0SR 0x40F40014 /* Application Subsystem D2 to D0 state Wakeup Status Register */ -#define AD2D1ER 0x40F40018 /* Application Subsystem D2 to D1 state Wakeup Enable Register */ -#define AD2D1SR 0x40F4001C /* Application Subsystem D2 to D1 state Wakeup Status Register */ -#define AD1D0ER 0x40F40020 /* Application Subsystem D1 to D0 state Wakeup Enable Register */ -#define AD1D0SR 0x40F40024 /* Application Subsystem D1 to D0 state Wakeup Status Register */ -#define ASDCNT 0x40F40028 /* Application Subsystem SRAM Drowsy Count Register */ -#define AD3R 0x40F40030 /* Application Subsystem D3 State Configuration Register */ -#define AD2R 0x40F40034 /* Application Subsystem D2 State Configuration Register */ -#define AD1R 0x40F40038 /* Application Subsystem D1 State Configuration Register */ - -#define PMCR 0x40F50000 /* Power Manager Control Register */ -#define PSR 0x40F50004 /* Power Manager S2 Status Register */ -#define PSPR 0x40F50008 /* Power Manager Scratch Pad Register */ -#define PCFR 0x40F5000C /* Power Manager General Configuration Register */ -#define PWER 0x40F50010 /* Power Manager Wake-up Enable Register */ -#define PWSR 0x40F50014 /* Power Manager Wake-up Status Register */ -#define PECR 0x40F50018 /* Power Manager EXT_WAKEUP[1:0] Control Register */ -#define DCDCSR 0x40F50080 /* DC-DC Controller Status Register */ -#define PVCR 0x40F50100 /* Power Manager Voltage Change Control Register */ -#define PCMD(x) (0x40F50110 + x*4) -#define PCMD0 (0x40F50110 + 0 * 4) -#define PCMD1 (0x40F50110 + 1 * 4) -#define PCMD2 (0x40F50110 + 2 * 4) -#define PCMD3 (0x40F50110 + 3 * 4) -#define PCMD4 (0x40F50110 + 4 * 4) -#define PCMD5 (0x40F50110 + 5 * 4) -#define PCMD6 (0x40F50110 + 6 * 4) -#define PCMD7 (0x40F50110 + 7 * 4) -#define PCMD8 (0x40F50110 + 8 * 4) -#define PCMD9 (0x40F50110 + 9 * 4) -#define PCMD10 (0x40F50110 + 10 * 4) -#define PCMD11 (0x40F50110 + 11 * 4) -#define PCMD12 (0x40F50110 + 12 * 4) -#define PCMD13 (0x40F50110 + 13 * 4) -#define PCMD14 (0x40F50110 + 14 * 4) -#define PCMD15 (0x40F50110 + 15 * 4) -#define PCMD16 (0x40F50110 + 16 * 4) -#define PCMD17 (0x40F50110 + 17 * 4) -#define PCMD18 (0x40F50110 + 18 * 4) -#define PCMD19 (0x40F50110 + 19 * 4) -#define PCMD20 (0x40F50110 + 20 * 4) -#define PCMD21 (0x40F50110 + 21 * 4) -#define PCMD22 (0x40F50110 + 22 * 4) -#define PCMD23 (0x40F50110 + 23 * 4) -#define PCMD24 (0x40F50110 + 24 * 4) -#define PCMD25 (0x40F50110 + 25 * 4) -#define PCMD26 (0x40F50110 + 26 * 4) -#define PCMD27 (0x40F50110 + 27 * 4) -#define PCMD28 (0x40F50110 + 28 * 4) -#define PCMD29 (0x40F50110 + 29 * 4) -#define PCMD30 (0x40F50110 + 30 * 4) -#define PCMD31 (0x40F50110 + 31 * 4) - -#define PCMD_MBC (1<<12) -#define PCMD_DCE (1<<11) -#define PCMD_LC (1<<10) -#define PCMD_SQC (3<<8) /* only 00 and 01 are valid */ - -#define PVCR_FVC (0x1 << 28) -#define PVCR_VCSA (0x1<<14) -#define PVCR_CommandDelay (0xf80) -#define PVCR_ReadPointer 0x01f00000 -#define PVCR_SlaveAddress (0x7f) - -#else /* ifdef CONFIG_CPU_MONAHANS */ - -#define PMCR 0x40F00000 /* Power Manager Control Register */ -#define PSSR 0x40F00004 /* Power Manager Sleep Status Register */ -#define PSPR 0x40F00008 /* Power Manager Scratch Pad Register */ -#define PWER 0x40F0000C /* Power Manager Wake-up Enable Register */ -#define PRER 0x40F00010 /* Power Manager GPIO Rising-Edge Detect Enable Register */ -#define PFER 0x40F00014 /* Power Manager GPIO Falling-Edge Detect Enable Register */ -#define PEDR 0x40F00018 /* Power Manager GPIO Edge Detect Status Register */ -#define PCFR 0x40F0001C /* Power Manager General Configuration Register */ -#define PGSR0 0x40F00020 /* Power Manager GPIO Sleep State Register for GP[31-0] */ -#define PGSR1 0x40F00024 /* Power Manager GPIO Sleep State Register for GP[63-32] */ -#define PGSR2 0x40F00028 /* Power Manager GPIO Sleep State Register for GP[84-64] */ -#define PGSR3 0x40F0002C /* Power Manager GPIO Sleep State Register for GP[118-96] */ -#define RCSR 0x40F00030 /* Reset Controller Status Register */ - -#define PSLR 0x40F00034 /* Power Manager Sleep Config Register */ -#define PSTR 0x40F00038 /* Power Manager Standby Config Register */ -#define PSNR 0x40F0003C /* Power Manager Sense Config Register */ -#define PVCR 0x40F00040 /* Power Manager VoltageControl Register */ -#define PKWR 0x40F00050 /* Power Manager KB Wake-up Enable Reg */ -#define PKSR 0x40F00054 /* Power Manager KB Level-Detect Register */ -#define PCMD(x) (0x40F00080 + x*4) -#define PCMD0 (0x40F00080 + 0 * 4) -#define PCMD1 (0x40F00080 + 1 * 4) -#define PCMD2 (0x40F00080 + 2 * 4) -#define PCMD3 (0x40F00080 + 3 * 4) -#define PCMD4 (0x40F00080 + 4 * 4) -#define PCMD5 (0x40F00080 + 5 * 4) -#define PCMD6 (0x40F00080 + 6 * 4) -#define PCMD7 (0x40F00080 + 7 * 4) -#define PCMD8 (0x40F00080 + 8 * 4) -#define PCMD9 (0x40F00080 + 9 * 4) -#define PCMD10 (0x40F00080 + 10 * 4) -#define PCMD11 (0x40F00080 + 11 * 4) -#define PCMD12 (0x40F00080 + 12 * 4) -#define PCMD13 (0x40F00080 + 13 * 4) -#define PCMD14 (0x40F00080 + 14 * 4) -#define PCMD15 (0x40F00080 + 15 * 4) -#define PCMD16 (0x40F00080 + 16 * 4) -#define PCMD17 (0x40F00080 + 17 * 4) -#define PCMD18 (0x40F00080 + 18 * 4) -#define PCMD19 (0x40F00080 + 19 * 4) -#define PCMD20 (0x40F00080 + 20 * 4) -#define PCMD21 (0x40F00080 + 21 * 4) -#define PCMD22 (0x40F00080 + 22 * 4) -#define PCMD23 (0x40F00080 + 23 * 4) -#define PCMD24 (0x40F00080 + 24 * 4) -#define PCMD25 (0x40F00080 + 25 * 4) -#define PCMD26 (0x40F00080 + 26 * 4) -#define PCMD27 (0x40F00080 + 27 * 4) -#define PCMD28 (0x40F00080 + 28 * 4) -#define PCMD29 (0x40F00080 + 29 * 4) -#define PCMD30 (0x40F00080 + 30 * 4) -#define PCMD31 (0x40F00080 + 31 * 4) - -#define PCMD_MBC (1<<12) -#define PCMD_DCE (1<<11) -#define PCMD_LC (1<<10) -/* FIXME: PCMD_SQC need be checked. */ -#define PCMD_SQC (3<<8) /* currently only bit 8 is changerable, */ - /* bit 9 should be 0 all day. */ -#define PVCR_VCSA (0x1<<14) -#define PVCR_CommandDelay (0xf80) -/* define MACRO for Power Manager General Configuration Register (PCFR) */ -#define PCFR_FVC (0x1 << 10) -#define PCFR_PI2C_EN (0x1 << 6) - -#define PSSR_OTGPH (1 << 6) /* OTG Peripheral control Hold */ -#define PSSR_RDH (1 << 5) /* Read Disable Hold */ -#define PSSR_PH (1 << 4) /* Peripheral Control Hold */ -#define PSSR_VFS (1 << 2) /* VDD Fault Status */ -#define PSSR_BFS (1 << 1) /* Battery Fault Status */ -#define PSSR_SSS (1 << 0) /* Software Sleep Status */ - -#define PCFR_DS (1 << 3) /* Deep Sleep Mode */ -#define PCFR_FS (1 << 2) /* Float Static Chip Selects */ -#define PCFR_FP (1 << 1) /* Float PCMCIA controls */ -#define PCFR_OPDE (1 << 0) /* 3.6864 MHz oscillator power-down enable */ - -#define RCSR_GPR (1 << 3) /* GPIO Reset */ -#define RCSR_SMR (1 << 2) /* Sleep Mode */ -#define RCSR_WDR (1 << 1) /* Watchdog Reset */ -#define RCSR_HWR (1 << 0) /* Hardware Reset */ - -#endif /* CONFIG_CPU_MONAHANS */ - -/* - * SSP Serial Port Registers - */ -#define SSCR0 0x41000000 /* SSP Control Register 0 */ -#define SSCR1 0x41000004 /* SSP Control Register 1 */ -#define SSSR 0x41000008 /* SSP Status Register */ -#define SSITR 0x4100000C /* SSP Interrupt Test Register */ -#define SSDR 0x41000010 /* (Write / Read) SSP Data Write Register/SSP Data Read Register */ - -/* - * MultiMediaCard (MMC) controller - */ -#define MMC_STRPCL 0x41100000 /* Control to start and stop MMC clock */ -#define MMC_STAT 0x41100004 /* MMC Status Register (read only) */ -#define MMC_CLKRT 0x41100008 /* MMC clock rate */ -#define MMC_SPI 0x4110000c /* SPI mode control bits */ -#define MMC_CMDAT 0x41100010 /* Command/response/data sequence control */ -#define MMC_RESTO 0x41100014 /* Expected response time out */ -#define MMC_RDTO 0x41100018 /* Expected data read time out */ -#define MMC_BLKLEN 0x4110001c /* Block length of data transaction */ -#define MMC_NOB 0x41100020 /* Number of blocks, for block mode */ -#define MMC_PRTBUF 0x41100024 /* Partial MMC_TXFIFO FIFO written */ -#define MMC_I_MASK 0x41100028 /* Interrupt Mask */ -#define MMC_I_REG 0x4110002c /* Interrupt Register (read only) */ -#define MMC_CMD 0x41100030 /* Index of current command */ -#define MMC_ARGH 0x41100034 /* MSW part of the current command argument */ -#define MMC_ARGL 0x41100038 /* LSW part of the current command argument */ -#define MMC_RES 0x4110003c /* Response FIFO (read only) */ -#define MMC_RXFIFO 0x41100040 /* Receive FIFO (read only) */ -#define MMC_TXFIFO 0x41100044 /* Transmit FIFO (write only) */ - - -/* - * LCD - */ -#define LCCR0 0x44000000 /* LCD Controller Control Register 0 */ -#define LCCR1 0x44000004 /* LCD Controller Control Register 1 */ -#define LCCR2 0x44000008 /* LCD Controller Control Register 2 */ -#define LCCR3 0x4400000C /* LCD Controller Control Register 3 */ -#define DFBR0 0x44000020 /* DMA Channel 0 Frame Branch Register */ -#define DFBR1 0x44000024 /* DMA Channel 1 Frame Branch Register */ -#define LCSR0 0x44000038 /* LCD Controller Status Register */ -#define LCSR1 0x44000034 /* LCD Controller Status Register */ -#define LIIDR 0x4400003C /* LCD Controller Interrupt ID Register */ -#define TMEDRGBR 0x44000040 /* TMED RGB Seed Register */ -#define TMEDCR 0x44000044 /* TMED Control Register */ - -#define FDADR0 0x44000200 /* DMA Channel 0 Frame Descriptor Address Register */ -#define FSADR0 0x44000204 /* DMA Channel 0 Frame Source Address Register */ -#define FIDR0 0x44000208 /* DMA Channel 0 Frame ID Register */ -#define LDCMD0 0x4400020C /* DMA Channel 0 Command Register */ -#define FDADR1 0x44000210 /* DMA Channel 1 Frame Descriptor Address Register */ -#define FSADR1 0x44000214 /* DMA Channel 1 Frame Source Address Register */ -#define FIDR1 0x44000218 /* DMA Channel 1 Frame ID Register */ -#define LDCMD1 0x4400021C /* DMA Channel 1 Command Register */ - -#define LCCR0_ENB (1 << 0) /* LCD Controller enable */ -#define LCCR0_CMS (1 << 1) /* Color = 0, Monochrome = 1 */ -#define LCCR0_SDS (1 << 2) /* Single Panel = 0, Dual Panel = 1 */ -#define LCCR0_LDM (1 << 3) /* LCD Disable Done Mask */ -#define LCCR0_SFM (1 << 4) /* Start of frame mask */ -#define LCCR0_IUM (1 << 5) /* Input FIFO underrun mask */ -#define LCCR0_EFM (1 << 6) /* End of Frame mask */ -#define LCCR0_PAS (1 << 7) /* Passive = 0, Active = 1 */ -#define LCCR0_BLE (1 << 8) /* Little Endian = 0, Big Endian = 1 */ -#define LCCR0_DPD (1 << 9) /* Double Pixel mode, 4 pixel value = 0, 8 pixle values = 1 */ -#define LCCR0_DIS (1 << 10) /* LCD Disable */ -#define LCCR0_QDM (1 << 11) /* LCD Quick Disable mask */ -#define LCCR0_PDD (0xff << 12) /* Palette DMA request delay */ -#define LCCR0_PDD_S 12 -#define LCCR0_BM (1 << 20) /* Branch mask */ -#define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */ -#if defined(CONFIG_CPU_PXA27X) -#define LCCR0_LCDT (1 << 22) /* LCD Panel Type */ -#define LCCR0_RDSTM (1 << 23) /* Read Status Interrupt Mask */ -#define LCCR0_CMDIM (1 << 24) /* Command Interrupt Mask */ -#endif - -#define LCCR1_PPL Fld (10, 0) /* Pixels Per Line - 1 */ -#define LCCR1_DisWdth(Pixel) /* Display Width [1..800 pix.] */ \ - (((Pixel) - 1) << FShft (LCCR1_PPL)) - -#define LCCR1_HSW Fld (6, 10) /* Horizontal Synchronization */ -#define LCCR1_HorSnchWdth(Tpix) /* Horizontal Synchronization */ \ - /* pulse Width [1..64 Tpix] */ \ - (((Tpix) - 1) << FShft (LCCR1_HSW)) - -#define LCCR1_ELW Fld (8, 16) /* End-of-Line pixel clock Wait */ - /* count - 1 [Tpix] */ -#define LCCR1_EndLnDel(Tpix) /* End-of-Line Delay */ \ - /* [1..256 Tpix] */ \ - (((Tpix) - 1) << FShft (LCCR1_ELW)) - -#define LCCR1_BLW Fld (8, 24) /* Beginning-of-Line pixel clock */ - /* Wait count - 1 [Tpix] */ -#define LCCR1_BegLnDel(Tpix) /* Beginning-of-Line Delay */ \ - /* [1..256 Tpix] */ \ - (((Tpix) - 1) << FShft (LCCR1_BLW)) - - -#define LCCR2_LPP Fld (10, 0) /* Line Per Panel - 1 */ -#define LCCR2_DisHght(Line) /* Display Height [1..1024 lines] */ \ - (((Line) - 1) << FShft (LCCR2_LPP)) - -#define LCCR2_VSW Fld (6, 10) /* Vertical Synchronization pulse */ - /* Width - 1 [Tln] (L_FCLK) */ -#define LCCR2_VrtSnchWdth(Tln) /* Vertical Synchronization pulse */ \ - /* Width [1..64 Tln] */ \ - (((Tln) - 1) << FShft (LCCR2_VSW)) - -#define LCCR2_EFW Fld (8, 16) /* End-of-Frame line clock Wait */ - /* count [Tln] */ -#define LCCR2_EndFrmDel(Tln) /* End-of-Frame Delay */ \ - /* [0..255 Tln] */ \ - ((Tln) << FShft (LCCR2_EFW)) - -#define LCCR2_BFW Fld (8, 24) /* Beginning-of-Frame line clock */ - /* Wait count [Tln] */ -#define LCCR2_BegFrmDel(Tln) /* Beginning-of-Frame Delay */ \ - /* [0..255 Tln] */ \ - ((Tln) << FShft (LCCR2_BFW)) - -#define LCCR3_API (0xf << 16) /* AC Bias pin trasitions per interrupt */ -#define LCCR3_API_S 16 -#define LCCR3_VSP (1 << 20) /* vertical sync polarity */ -#define LCCR3_HSP (1 << 21) /* horizontal sync polarity */ -#define LCCR3_PCP (1 << 22) /* pixel clock polarity */ -#define LCCR3_OEP (1 << 23) /* output enable polarity */ -#define LCCR3_DPC (1 << 27) /* double pixel clock mode */ - -#define LCCR3_PDFOR_0 (0 << 30) -#define LCCR3_PDFOR_1 (1 << 30) -#define LCCR3_PDFOR_2 (2 << 30) -#define LCCR3_PDFOR_3 (3 << 30) - - -#define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor */ -#define LCCR3_PixClkDiv(Div) /* Pixel Clock Divisor */ \ - (((Div) << FShft (LCCR3_PCD))) - - -#define LCCR3_BPP Fld (3, 24) /* Bit Per Pixel */ -#define LCCR3_Bpp(Bpp) /* Bit Per Pixel */ \ - ((((Bpp&0x7) << FShft (LCCR3_BPP)))|(((Bpp&0x8)<<26))) - -#define LCCR3_ACB Fld (8, 8) /* AC Bias */ -#define LCCR3_Acb(Acb) /* BAC Bias */ \ - (((Acb) << FShft (LCCR3_ACB))) - -#define LCCR3_HorSnchH (LCCR3_HSP*0) /* Horizontal Synchronization */ - /* pulse active High */ -#define LCCR3_HorSnchL (LCCR3_HSP*1) /* Horizontal Synchronization */ - -#define LCCR3_VrtSnchH (LCCR3_VSP*0) /* Vertical Synchronization pulse */ - /* active High */ -#define LCCR3_VrtSnchL (LCCR3_VSP*1) /* Vertical Synchronization pulse */ - /* active Low */ - -#define LCSR0_LDD (1 << 0) /* LCD Disable Done */ -#define LCSR0_SOF (1 << 1) /* Start of frame */ -#define LCSR0_BER (1 << 2) /* Bus error */ -#define LCSR0_ABC (1 << 3) /* AC Bias count */ -#define LCSR0_IUL (1 << 4) /* input FIFO underrun Lower panel */ -#define LCSR0_IUU (1 << 5) /* input FIFO underrun Upper panel */ -#define LCSR0_OU (1 << 6) /* output FIFO underrun */ -#define LCSR0_QD (1 << 7) /* quick disable */ -#define LCSR0_EOF0 (1 << 8) /* end of frame */ -#define LCSR0_BS (1 << 9) /* branch status */ -#define LCSR0_SINT (1 << 10) /* subsequent interrupt */ - -#define LCSR1_SOF1 (1 << 0) -#define LCSR1_SOF2 (1 << 1) -#define LCSR1_SOF3 (1 << 2) -#define LCSR1_SOF4 (1 << 3) -#define LCSR1_SOF5 (1 << 4) -#define LCSR1_SOF6 (1 << 5) - -#define LCSR1_EOF1 (1 << 8) -#define LCSR1_EOF2 (1 << 9) -#define LCSR1_EOF3 (1 << 10) -#define LCSR1_EOF4 (1 << 11) -#define LCSR1_EOF5 (1 << 12) -#define LCSR1_EOF6 (1 << 13) - -#define LCSR1_BS1 (1 << 16) -#define LCSR1_BS2 (1 << 17) -#define LCSR1_BS3 (1 << 18) -#define LCSR1_BS4 (1 << 19) -#define LCSR1_BS5 (1 << 20) -#define LCSR1_BS6 (1 << 21) - -#define LCSR1_IU2 (1 << 25) -#define LCSR1_IU3 (1 << 26) -#define LCSR1_IU4 (1 << 27) -#define LCSR1_IU5 (1 << 28) -#define LCSR1_IU6 (1 << 29) - -#define LDCMD_PAL (1 << 26) /* instructs DMA to load palette buffer */ -#if defined(CONFIG_CPU_PXA27X) -#define LDCMD_SOFINT (1 << 22) -#define LDCMD_EOFINT (1 << 21) -#endif - -/* - * Memory controller - */ - -#ifdef CONFIG_CPU_MONAHANS - -/* PXA3xx */ - -/* Static Memory Controller Registers */ -#define MSC0 0x4A000008 /* Static Memory Control Register 0 */ -#define MSC1 0x4A00000C /* Static Memory Control Register 1 */ -#define MECR 0x4A000014 /* Expansion Memory (PCMCIA/Compact Flash) Bus Configuration */ -#define SXCNFG 0x4A00001C /* Synchronous Static Memory Control Register */ -#define MCMEM0 0x4A000028 /* Card interface Common Memory Space Socket 0 Timing */ -#define MCATT0 0x4A000030 /* Card interface Attribute Space Socket 0 Timing Configuration */ -#define MCIO0 0x4A000038 /* Card interface I/O Space Socket 0 Timing Configuration */ -#define MEMCLKCFG 0x4A000068 /* SCLK speed configuration */ -#define CSADRCFG0 0x4A000080 /* Address Configuration for chip select 0 */ -#define CSADRCFG1 0x4A000084 /* Address Configuration for chip select 1 */ -#define CSADRCFG2 0x4A000088 /* Address Configuration for chip select 2 */ -#define CSADRCFG3 0x4A00008C /* Address Configuration for chip select 3 */ -#define CSADRCFG_P 0x4A000090 /* Address Configuration for pcmcia card interface */ -#define CSMSADRCFG 0x4A0000A0 /* Master Address Configuration Register */ -#define CLK_RET_DEL 0x4A0000B0 /* Delay line and mux selects for return data latching for sync. flash */ -#define ADV_RET_DEL 0x4A0000B4 /* Delay line and mux selects for return data latching for sync. flash */ - -/* Dynamic Memory Controller Registers */ -#define MDCNFG 0x48100000 /* SDRAM Configuration Register 0 */ -#define MDREFR 0x48100004 /* SDRAM Refresh Control Register */ -#define FLYCNFG 0x48100020 /* Fly-by DMA DVAL[1:0] polarities */ -#define MDMRS 0x48100040 /* MRS value to be written to SDRAM */ -#define DDR_SCAL 0x48100050 /* Software Delay Line Calibration/Configuration for external DDR memory. */ -#define DDR_HCAL 0x48100060 /* Hardware Delay Line Calibration/Configuration for external DDR memory. */ -#define DDR_WCAL 0x48100068 /* DDR Write Strobe Calibration Register */ -#define DMCIER 0x48100070 /* Dynamic MC Interrupt Enable Register. */ -#define DMCISR 0x48100078 /* Dynamic MC Interrupt Status Register. */ -#define DDR_DLS 0x48100080 /* DDR Delay Line Value Status register for external DDR memory. */ -#define EMPI 0x48100090 /* EMPI Control Register */ -#define RCOMP 0x48100100 -#define PAD_MA 0x48100110 -#define PAD_MDMSB 0x48100114 -#define PAD_MDLSB 0x48100118 -#define PAD_DMEM 0x4810011c -#define PAD_SDCLK 0x48100120 -#define PAD_SDCS 0x48100124 -#define PAD_SMEM 0x48100128 -#define PAD_SCLK 0x4810012C -#define TAI 0x48100F00 /* TAI Tavor Address Isolation Register */ - -/* Some frequently used bits */ -#define MDCNFG_DMAP 0x80000000 /* SDRAM 1GB Memory Map Enable */ -#define MDCNFG_DMCEN 0x40000000 /* Enable Dynamic Memory Controller */ -#define MDCNFG_HWFREQ 0x20000000 /* Hardware Frequency Change Calibration */ -#define MDCNFG_DTYPE 0x400 /* SDRAM Type: 1=DDR SDRAM */ - -#define MDCNFG_DTC_0 0x0 /* Timing Category of SDRAM */ -#define MDCNFG_DTC_1 0x100 -#define MDCNFG_DTC_2 0x200 -#define MDCNFG_DTC_3 0x300 - -#define MDCNFG_DRAC_12 0x0 /* Number of Row Access Bits */ -#define MDCNFG_DRAC_13 0x20 -#define MDCNFG_DRAC_14 0x40 - -#define MDCNFG_DCAC_9 0x0 /* Number of Column Acess Bits */ -#define MDCNFG_DCAC_10 0x08 -#define MDCNFG_DCAC_11 0x10 - -#define MDCNFG_DBW_16 0x4 /* SDRAM Data Bus width 16bit */ -#define MDCNFG_DCSE1 0x2 /* SDRAM CS 1 Enable */ -#define MDCNFG_DCSE0 0x1 /* SDRAM CS 0 Enable */ - - -/* Data Flash Controller Registers */ - -#define NDCR 0x43100000 /* Data Flash Control register */ -#define NDTR0CS0 0x43100004 /* Data Controller Timing Parameter 0 Register for ND_nCS0 */ -/* #define NDTR0CS1 0x43100008 /\* Data Controller Timing Parameter 0 Register for ND_nCS1 *\/ */ -#define NDTR1CS0 0x4310000C /* Data Controller Timing Parameter 1 Register for ND_nCS0 */ -/* #define NDTR1CS1 0x43100010 /\* Data Controller Timing Parameter 1 Register for ND_nCS1 *\/ */ -#define NDSR 0x43100014 /* Data Controller Status Register */ -#define NDPCR 0x43100018 /* Data Controller Page Count Register */ -#define NDBDR0 0x4310001C /* Data Controller Bad Block Register 0 */ -#define NDBDR1 0x43100020 /* Data Controller Bad Block Register 1 */ -#define NDDB 0x43100040 /* Data Controller Data Buffer */ -#define NDCB0 0x43100048 /* Data Controller Command Buffer0 */ -#define NDCB1 0x4310004C /* Data Controller Command Buffer1 */ -#define NDCB2 0x43100050 /* Data Controller Command Buffer2 */ - -#define NDCR_SPARE_EN (0x1<<31) -#define NDCR_ECC_EN (0x1<<30) -#define NDCR_DMA_EN (0x1<<29) -#define NDCR_ND_RUN (0x1<<28) -#define NDCR_DWIDTH_C (0x1<<27) -#define NDCR_DWIDTH_M (0x1<<26) -#define NDCR_PAGE_SZ (0x3<<24) -#define NDCR_NCSX (0x1<<23) -#define NDCR_ND_STOP (0x1<<22) -/* reserved: - * #define NDCR_ND_MODE (0x3<<21) - * #define NDCR_NAND_MODE 0x0 */ -#define NDCR_CLR_PG_CNT (0x1<<20) -#define NDCR_CLR_ECC (0x1<<19) -#define NDCR_RD_ID_CNT (0x7<<16) -#define NDCR_RA_START (0x1<<15) -#define NDCR_PG_PER_BLK (0x1<<14) -#define NDCR_ND_ARB_EN (0x1<<12) -#define NDCR_RDYM (0x1<<11) -#define NDCR_CS0_PAGEDM (0x1<<10) -#define NDCR_CS1_PAGEDM (0x1<<9) -#define NDCR_CS0_CMDDM (0x1<<8) -#define NDCR_CS1_CMDDM (0x1<<7) -#define NDCR_CS0_BBDM (0x1<<6) -#define NDCR_CS1_BBDM (0x1<<5) -#define NDCR_DBERRM (0x1<<4) -#define NDCR_SBERRM (0x1<<3) -#define NDCR_WRDREQM (0x1<<2) -#define NDCR_RDDREQM (0x1<<1) -#define NDCR_WRCMDREQM (0x1) - -#define NDSR_RDY (0x1<<11) -#define NDSR_CS0_PAGED (0x1<<10) -#define NDSR_CS1_PAGED (0x1<<9) -#define NDSR_CS0_CMDD (0x1<<8) -#define NDSR_CS1_CMDD (0x1<<7) -#define NDSR_CS0_BBD (0x1<<6) -#define NDSR_CS1_BBD (0x1<<5) -#define NDSR_DBERR (0x1<<4) -#define NDSR_SBERR (0x1<<3) -#define NDSR_WRDREQ (0x1<<2) -#define NDSR_RDDREQ (0x1<<1) -#define NDSR_WRCMDREQ (0x1) - -#define NDCB0_AUTO_RS (0x1<<25) -#define NDCB0_CSEL (0x1<<24) -#define NDCB0_CMD_TYPE (0x7<<21) -#define NDCB0_NC (0x1<<20) -#define NDCB0_DBC (0x1<<19) -#define NDCB0_ADDR_CYC (0x7<<16) -#define NDCB0_CMD2 (0xff<<8) -#define NDCB0_CMD1 (0xff) -#define MCMEM(s) MCMEM0 -#define MCATT(s) MCATT0 -#define MCIO(s) MCIO0 -#define MECR_CIT (1 << 1)/* Card Is There: 0 -> no card, 1 -> card inserted */ - -/* Maximum values for NAND Interface Timing Registers in DFC clock - * periods */ -#define DFC_MAX_tCH 7 -#define DFC_MAX_tCS 7 -#define DFC_MAX_tWH 7 -#define DFC_MAX_tWP 7 -#define DFC_MAX_tRH 7 -#define DFC_MAX_tRP 15 -#define DFC_MAX_tR 65535 -#define DFC_MAX_tWHR 15 -#define DFC_MAX_tAR 15 - -#define DFC_CLOCK 104 /* DFC Clock is 104 MHz */ -#define DFC_CLK_PER_US DFC_CLOCK/1000 /* clock period in ns */ - -#else /* CONFIG_CPU_MONAHANS */ - -/* PXA2xx */ - -#define MEMC_BASE 0x48000000 /* Base of Memory Controller */ -#define MDCNFG_OFFSET 0x0 -#define MDREFR_OFFSET 0x4 -#define MSC0_OFFSET 0x8 -#define MSC1_OFFSET 0xC -#define MSC2_OFFSET 0x10 -#define MECR_OFFSET 0x14 -#define SXLCR_OFFSET 0x18 -#define SXCNFG_OFFSET 0x1C -#define FLYCNFG_OFFSET 0x20 -#define SXMRS_OFFSET 0x24 -#define MCMEM0_OFFSET 0x28 -#define MCMEM1_OFFSET 0x2C -#define MCATT0_OFFSET 0x30 -#define MCATT1_OFFSET 0x34 -#define MCIO0_OFFSET 0x38 -#define MCIO1_OFFSET 0x3C -#define MDMRS_OFFSET 0x40 - -#define MDCNFG 0x48000000 /* SDRAM Configuration Register 0 */ -#define MDCNFG_DE0 0x00000001 -#define MDCNFG_DE1 0x00000002 -#define MDCNFG_DE2 0x00010000 -#define MDCNFG_DE3 0x00020000 -#define MDCNFG_DWID0 0x00000004 - -#define MDREFR 0x48000004 /* SDRAM Refresh Control Register */ -#define MSC0 0x48000008 /* Static Memory Control Register 0 */ -#define MSC1 0x4800000C /* Static Memory Control Register 1 */ -#define MSC2 0x48000010 /* Static Memory Control Register 2 */ -#define MECR 0x48000014 /* Expansion Memory (PCMCIA/Compact Flash) Bus Configuration */ -#define SXLCR 0x48000018 /* LCR value to be written to SDRAM-Timing Synchronous Flash */ -#define SXCNFG 0x4800001C /* Synchronous Static Memory Control Register */ -#define FLYCNFG 0x48000020 -#define SXMRS 0x48000024 /* MRS value to be written to Synchronous Flash or SMROM */ -#define MCMEM0 0x48000028 /* Card interface Common Memory Space Socket 0 Timing */ -#define MCMEM1 0x4800002C /* Card interface Common Memory Space Socket 1 Timing */ -#define MCATT0 0x48000030 /* Card interface Attribute Space Socket 0 Timing Configuration */ -#define MCATT1 0x48000034 /* Card interface Attribute Space Socket 1 Timing Configuration */ -#define MCIO0 0x48000038 /* Card interface I/O Space Socket 0 Timing Configuration */ -#define MCIO1 0x4800003C /* Card interface I/O Space Socket 1 Timing Configuration */ -#define MDMRS 0x48000040 /* MRS value to be written to SDRAM */ -#define BOOT_DEF 0x48000044 /* Read-Only Boot-Time Register. Contains BOOT_SEL and PKG_SEL */ - -#define MDREFR_ALTREFA (1 << 31) /* Exiting Alternate Bus Master Mode Refresh Control */ -#define MDREFR_ALTREFB (1 << 30) /* Entering Alternate Bus Master Mode Refresh Control */ -#define MDREFR_K0DB4 (1 << 29) /* SDCLK0 Divide by 4 Control/Status */ -#define MDREFR_K2FREE (1 << 25) /* SDRAM Free-Running Control */ -#define MDREFR_K1FREE (1 << 24) /* SDRAM Free-Running Control */ -#define MDREFR_K0FREE (1 << 23) /* SDRAM Free-Running Control */ -#define MDREFR_SLFRSH (1 << 22) /* SDRAM Self-Refresh Control/Status */ -#define MDREFR_APD (1 << 20) /* SDRAM/SSRAM Auto-Power-Down Enable */ -#define MDREFR_K2DB2 (1 << 19) /* SDCLK2 Divide by 2 Control/Status */ -#define MDREFR_K2RUN (1 << 18) /* SDCLK2 Run Control/Status */ -#define MDREFR_K1DB2 (1 << 17) /* SDCLK1 Divide by 2 Control/Status */ -#define MDREFR_K1RUN (1 << 16) /* SDCLK1 Run Control/Status */ -#define MDREFR_E1PIN (1 << 15) /* SDCKE1 Level Control/Status */ -#define MDREFR_K0DB2 (1 << 14) /* SDCLK0 Divide by 2 Control/Status */ -#define MDREFR_K0RUN (1 << 13) /* SDCLK0 Run Control/Status */ -#define MDREFR_E0PIN (1 << 12) /* SDCKE0 Level Control/Status */ - -#if defined(CONFIG_CPU_PXA27X) - -#define ARB_CNTRL 0x48000048 /* Arbiter Control Register */ - -#define ARB_DMA_SLV_PARK (1<<31) /* Be parked with DMA slave when idle */ -#define ARB_CI_PARK (1<<30) /* Be parked with Camera Interface when idle */ -#define ARB_EX_MEM_PARK (1<<29) /* Be parked with external MEMC when idle */ -#define ARB_INT_MEM_PARK (1<<28) /* Be parked with internal MEMC when idle */ -#define ARB_USB_PARK (1<<27) /* Be parked with USB when idle */ -#define ARB_LCD_PARK (1<<26) /* Be parked with LCD when idle */ -#define ARB_DMA_PARK (1<<25) /* Be parked with DMA when idle */ -#define ARB_CORE_PARK (1<<24) /* Be parked with core when idle */ -#define ARB_LOCK_FLAG (1<<23) /* Only Locking masters gain access to the bus */ - -#endif /* CONFIG_CPU_PXA27X */ - -/* LCD registers */ -#define LCCR4 0x44000010 /* LCD Controller Control Register 4 */ -#define LCCR5 0x44000014 /* LCD Controller Control Register 5 */ -#define FBR0 0x44000020 /* DMA Channel 0 Frame Branch Register */ -#define FBR1 0x44000024 /* DMA Channel 1 Frame Branch Register */ -#define FBR2 0x44000028 /* DMA Channel 2 Frame Branch Register */ -#define FBR3 0x4400002C /* DMA Channel 3 Frame Branch Register */ -#define FBR4 0x44000030 /* DMA Channel 4 Frame Branch Register */ -#define FDADR2 0x44000220 /* DMA Channel 2 Frame Descriptor Address Register */ -#define FSADR2 0x44000224 /* DMA Channel 2 Frame Source Address Register */ -#define FIDR2 0x44000228 /* DMA Channel 2 Frame ID Register */ -#define LDCMD2 0x4400022C /* DMA Channel 2 Command Register */ -#define FDADR3 0x44000230 /* DMA Channel 3 Frame Descriptor Address Register */ -#define FSADR3 0x44000234 /* DMA Channel 3 Frame Source Address Register */ -#define FIDR3 0x44000238 /* DMA Channel 3 Frame ID Register */ -#define LDCMD3 0x4400023C /* DMA Channel 3 Command Register */ -#define FDADR4 0x44000240 /* DMA Channel 4 Frame Descriptor Address Register */ -#define FSADR4 0x44000244 /* DMA Channel 4 Frame Source Address Register */ -#define FIDR4 0x44000248 /* DMA Channel 4 Frame ID Register */ -#define LDCMD4 0x4400024C /* DMA Channel 4 Command Register */ -#define FDADR5 0x44000250 /* DMA Channel 5 Frame Descriptor Address Register */ -#define FSADR5 0x44000254 /* DMA Channel 5 Frame Source Address Register */ -#define FIDR5 0x44000258 /* DMA Channel 5 Frame ID Register */ -#define LDCMD5 0x4400025C /* DMA Channel 5 Command Register */ - -#define OVL1C1 0x44000050 /* Overlay 1 Control Register 1 */ -#define OVL1C2 0x44000060 /* Overlay 1 Control Register 2 */ -#define OVL2C1 0x44000070 /* Overlay 2 Control Register 1 */ -#define OVL2C2 0x44000080 /* Overlay 2 Control Register 2 */ -#define CCR 0x44000090 /* Cursor Control Register */ - -#define FBR5 0x44000110 /* DMA Channel 5 Frame Branch Register */ -#define FBR6 0x44000114 /* DMA Channel 6 Frame Branch Register */ - -#define LCCR0_LDDALT (1<<26) /* LDD Alternate mapping bit when base pixel is RGBT16 */ -#define LCCR0_OUC (1<<25) /* Overlay Underlay Control Bit */ - -#define LCCR5_SOFM1 (1<<0) /* Start Of Frame Mask for Overlay 1 (channel 1) */ -#define LCCR5_SOFM2 (1<<1) /* Start Of Frame Mask for Overlay 2 (channel 2) */ -#define LCCR5_SOFM3 (1<<2) /* Start Of Frame Mask for Overlay 2 (channel 3) */ -#define LCCR5_SOFM4 (1<<3) /* Start Of Frame Mask for Overlay 2 (channel 4) */ -#define LCCR5_SOFM5 (1<<4) /* Start Of Frame Mask for cursor (channel 5) */ -#define LCCR5_SOFM6 (1<<5) /* Start Of Frame Mask for command data (channel 6) */ - -#define LCCR5_EOFM1 (1<<8) /* End Of Frame Mask for Overlay 1 (channel 1) */ -#define LCCR5_EOFM2 (1<<9) /* End Of Frame Mask for Overlay 2 (channel 2) */ -#define LCCR5_EOFM3 (1<<10) /* End Of Frame Mask for Overlay 2 (channel 3) */ -#define LCCR5_EOFM4 (1<<11) /* End Of Frame Mask for Overlay 2 (channel 4) */ -#define LCCR5_EOFM5 (1<<12) /* End Of Frame Mask for cursor (channel 5) */ -#define LCCR5_EOFM6 (1<<13) /* End Of Frame Mask for command data (channel 6) */ - -#define LCCR5_BSM1 (1<<16) /* Branch mask for Overlay 1 (channel 1) */ -#define LCCR5_BSM2 (1<<17) /* Branch mask for Overlay 2 (channel 2) */ -#define LCCR5_BSM3 (1<<18) /* Branch mask for Overlay 2 (channel 3) */ -#define LCCR5_BSM4 (1<<19) /* Branch mask for Overlay 2 (channel 4) */ -#define LCCR5_BSM5 (1<<20) /* Branch mask for cursor (channel 5) */ -#define LCCR5_BSM6 (1<<21) /* Branch mask for data command (channel 6) */ - -#define LCCR5_IUM1 (1<<24) /* Input FIFO Underrun Mask for Overlay 1 */ -#define LCCR5_IUM2 (1<<25) /* Input FIFO Underrun Mask for Overlay 2 */ -#define LCCR5_IUM3 (1<<26) /* Input FIFO Underrun Mask for Overlay 2 */ -#define LCCR5_IUM4 (1<<27) /* Input FIFO Underrun Mask for Overlay 2 */ -#define LCCR5_IUM5 (1<<28) /* Input FIFO Underrun Mask for cursor */ -#define LCCR5_IUM6 (1<<29) /* Input FIFO Underrun Mask for data command */ - -#define OVL1C1_O1EN (1<<31) /* Enable bit for Overlay 1 */ -#define OVL2C1_O2EN (1<<31) /* Enable bit for Overlay 2 */ -#define CCR_CEN (1<<31) /* Enable bit for Cursor */ - -/* Keypad controller */ - -#define KPC 0x41500000 /* Keypad Interface Control register */ -#define KPDK 0x41500008 /* Keypad Interface Direct Key register */ -#define KPREC 0x41500010 /* Keypad Intefcace Rotary Encoder register */ -#define KPMK 0x41500018 /* Keypad Intefcace Matrix Key register */ -#define KPAS 0x41500020 /* Keypad Interface Automatic Scan register */ -#define KPASMKP0 0x41500028 /* Keypad Interface Automatic Scan Multiple Key Presser register 0 */ -#define KPASMKP1 0x41500030 /* Keypad Interface Automatic Scan Multiple Key Presser register 1 */ -#define KPASMKP2 0x41500038 /* Keypad Interface Automatic Scan Multiple Key Presser register 2 */ -#define KPASMKP3 0x41500040 /* Keypad Interface Automatic Scan Multiple Key Presser register 3 */ -#define KPKDI 0x41500048 /* Keypad Interface Key Debounce Interval register */ - -#define KPC_AS (0x1 << 30) /* Automatic Scan bit */ -#define KPC_ASACT (0x1 << 29) /* Automatic Scan on Activity */ -#define KPC_MI (0x1 << 22) /* Matrix interrupt bit */ -#define KPC_IMKP (0x1 << 21) /* Ignore Multiple Key Press */ -#define KPC_MS7 (0x1 << 20) /* Matrix scan line 7 */ -#define KPC_MS6 (0x1 << 19) /* Matrix scan line 6 */ -#define KPC_MS5 (0x1 << 18) /* Matrix scan line 5 */ -#define KPC_MS4 (0x1 << 17) /* Matrix scan line 4 */ -#define KPC_MS3 (0x1 << 16) /* Matrix scan line 3 */ -#define KPC_MS2 (0x1 << 15) /* Matrix scan line 2 */ -#define KPC_MS1 (0x1 << 14) /* Matrix scan line 1 */ -#define KPC_MS0 (0x1 << 13) /* Matrix scan line 0 */ -#define KPC_ME (0x1 << 12) /* Matrix Keypad Enable */ -#define KPC_MIE (0x1 << 11) /* Matrix Interrupt Enable */ -#define KPC_DK_DEB_SEL (0x1 << 9) /* Direct Key Debounce select */ -#define KPC_DI (0x1 << 5) /* Direct key interrupt bit */ -#define KPC_DEE0 (0x1 << 2) /* Rotary Encoder 0 Enable */ -#define KPC_DE (0x1 << 1) /* Direct Keypad Enable */ -#define KPC_DIE (0x1 << 0) /* Direct Keypad interrupt Enable */ - -#define KPDK_DKP (0x1 << 31) -#define KPDK_DK7 (0x1 << 7) -#define KPDK_DK6 (0x1 << 6) -#define KPDK_DK5 (0x1 << 5) -#define KPDK_DK4 (0x1 << 4) -#define KPDK_DK3 (0x1 << 3) -#define KPDK_DK2 (0x1 << 2) -#define KPDK_DK1 (0x1 << 1) -#define KPDK_DK0 (0x1 << 0) - -#define KPREC_OF1 (0x1 << 31) -#define kPREC_UF1 (0x1 << 30) -#define KPREC_OF0 (0x1 << 15) -#define KPREC_UF0 (0x1 << 14) - -#define KPMK_MKP (0x1 << 31) -#define KPAS_SO (0x1 << 31) -#define KPASMKPx_SO (0x1 << 31) - -#define GPIO113_BIT (1 << 17)/* GPIO113 in GPSR, GPCR, bit 17 */ -#define PSLR 0x40F00034 -#define PSTR 0x40F00038 /* Power Manager Standby Configuration Reg */ -#define PSNR 0x40F0003C /* Power Manager Sense Configuration Reg */ -#define PVCR 0x40F00040 /* Power Manager Voltage Change Control Reg */ -#define PKWR 0x40F00050 /* Power Manager KB Wake-Up Enable Reg */ -#define PKSR 0x40F00054 /* Power Manager KB Level-Detect Status Reg */ -#define OSMR4 0x40A00080 /* */ -#define OSCR4 0x40A00040 /* OS Timer Counter Register */ -#define OMCR4 0x40A000C0 /* */ - -#endif /* CONFIG_CPU_PXA27X */ - -#endif /* _PXA_REGS_H_ */ diff --git a/arch/arm/include/asm/arch-pxa/pxa.h b/arch/arm/include/asm/arch-pxa/pxa.h deleted file mode 100644 index 428a848e157..00000000000 --- a/arch/arm/include/asm/arch-pxa/pxa.h +++ /dev/null @@ -1,28 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * PXA common functions - * - * Copyright (C) 2011 Marek Vasut - */ - -#ifndef __PXA_H__ -#define __PXA_H__ - -#define PXA255_A0 0x00000106 -#define PXA250_C0 0x00000105 -#define PXA250_B2 0x00000104 -#define PXA250_B1 0x00000103 -#define PXA250_B0 0x00000102 -#define PXA250_A1 0x00000101 -#define PXA250_A0 0x00000100 -#define PXA210_C0 0x00000125 -#define PXA210_B2 0x00000124 -#define PXA210_B1 0x00000123 -#define PXA210_B0 0x00000122 - -int cpu_is_pxa25x(void); -int cpu_is_pxa27x(void); -uint32_t pxa_get_cpu_revision(void); -void pxa2xx_dram_init(void); - -#endif /* __PXA_H__ */ diff --git a/arch/arm/include/asm/arch-pxa/regs-mmc.h b/arch/arm/include/asm/arch-pxa/regs-mmc.h deleted file mode 100644 index 6d9a736d9c0..00000000000 --- a/arch/arm/include/asm/arch-pxa/regs-mmc.h +++ /dev/null @@ -1,140 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2011 Marek Vasut - */ - -#ifndef __REGS_MMC_H__ -#define __REGS_MMC_H__ - -#define MMC0_BASE 0x41100000 -#define MMC1_BASE 0x42000000 - -int pxa_mmc_register(int card_index); - -struct pxa_mmc_regs { - uint32_t strpcl; - uint32_t stat; - uint32_t clkrt; - uint32_t spi; - uint32_t cmdat; - uint32_t resto; - uint32_t rdto; - uint32_t blklen; - uint32_t nob; - uint32_t prtbuf; - uint32_t i_mask; - uint32_t i_reg; - uint32_t cmd; - uint32_t argh; - uint32_t argl; - uint32_t res; - uint32_t rxfifo; - uint32_t txfifo; -}; - -/* MMC_STRPCL */ -#define MMC_STRPCL_STOP_CLK (1 << 0) -#define MMC_STRPCL_START_CLK (1 << 1) - -/* MMC_STAT */ -#define MMC_STAT_END_CMD_RES (1 << 13) -#define MMC_STAT_PRG_DONE (1 << 12) -#define MMC_STAT_DATA_TRAN_DONE (1 << 11) -#define MMC_STAT_CLK_EN (1 << 8) -#define MMC_STAT_RECV_FIFO_FULL (1 << 7) -#define MMC_STAT_XMIT_FIFO_EMPTY (1 << 6) -#define MMC_STAT_RES_CRC_ERROR (1 << 5) -#define MMC_STAT_SPI_READ_ERROR_TOKEN (1 << 4) -#define MMC_STAT_CRC_READ_ERROR (1 << 3) -#define MMC_STAT_CRC_WRITE_ERROR (1 << 2) -#define MMC_STAT_TIME_OUT_RESPONSE (1 << 1) -#define MMC_STAT_READ_TIME_OUT (1 << 0) - -/* MMC_CLKRT */ -#define MMC_CLKRT_20MHZ 0 -#define MMC_CLKRT_10MHZ 1 -#define MMC_CLKRT_5MHZ 2 -#define MMC_CLKRT_2_5MHZ 3 -#define MMC_CLKRT_1_25MHZ 4 -#define MMC_CLKRT_0_625MHZ 5 -#define MMC_CLKRT_0_3125MHZ 6 - -/* MMC_SPI */ -#define MMC_SPI_EN (1 << 0) -#define MMC_SPI_CS_EN (1 << 2) -#define MMC_SPI_CS_ADDRESS (1 << 3) -#define MMC_SPI_CRC_ON (1 << 1) - -/* MMC_CMDAT */ -#define MMC_CMDAT_SD_4DAT (1 << 8) -#define MMC_CMDAT_MMC_DMA_EN (1 << 7) -#define MMC_CMDAT_INIT (1 << 6) -#define MMC_CMDAT_BUSY (1 << 5) -#define MMC_CMDAT_BCR (MMC_CMDAT_BUSY | MMC_CMDAT_INIT) -#define MMC_CMDAT_STREAM (1 << 4) -#define MMC_CMDAT_WRITE (1 << 3) -#define MMC_CMDAT_DATA_EN (1 << 2) -#define MMC_CMDAT_R0 0 -#define MMC_CMDAT_R1 1 -#define MMC_CMDAT_R2 2 -#define MMC_CMDAT_R3 3 - -/* MMC_RESTO */ -#define MMC_RES_TO_MAX_MASK 0x7f - -/* MMC_RDTO */ -#define MMC_READ_TO_MAX_MASK 0xffff - -/* MMC_BLKLEN */ -#define MMC_BLK_LEN_MAX_MASK 0x3ff - -/* MMC_PRTBUF */ -#define MMC_PRTBUF_BUF_PART_FULL (1 << 0) - -/* MMC_I_MASK */ -#define MMC_I_MASK_TXFIFO_WR_REQ (1 << 6) -#define MMC_I_MASK_RXFIFO_RD_REQ (1 << 5) -#define MMC_I_MASK_CLK_IS_OFF (1 << 4) -#define MMC_I_MASK_STOP_CMD (1 << 3) -#define MMC_I_MASK_END_CMD_RES (1 << 2) -#define MMC_I_MASK_PRG_DONE (1 << 1) -#define MMC_I_MASK_DATA_TRAN_DONE (1 << 0) -#define MMC_I_MASK_ALL 0x7f - - -/* MMC_I_REG */ -#define MMC_I_REG_TXFIFO_WR_REQ (1 << 6) -#define MMC_I_REG_RXFIFO_RD_REQ (1 << 5) -#define MMC_I_REG_CLK_IS_OFF (1 << 4) -#define MMC_I_REG_STOP_CMD (1 << 3) -#define MMC_I_REG_END_CMD_RES (1 << 2) -#define MMC_I_REG_PRG_DONE (1 << 1) -#define MMC_I_REG_DATA_TRAN_DONE (1 << 0) - -/* MMC_CMD */ -#define MMC_CMD_INDEX_MAX 0x6f - -#define MMC_R1_IDLE_STATE 0x01 -#define MMC_R1_ERASE_STATE 0x02 -#define MMC_R1_ILLEGAL_CMD 0x04 -#define MMC_R1_COM_CRC_ERR 0x08 -#define MMC_R1_ERASE_SEQ_ERR 0x01 -#define MMC_R1_ADDR_ERR 0x02 -#define MMC_R1_PARAM_ERR 0x04 - -#define MMC_R1B_WP_ERASE_SKIP 0x0002 -#define MMC_R1B_ERR 0x0004 -#define MMC_R1B_CC_ERR 0x0008 -#define MMC_R1B_CARD_ECC_ERR 0x0010 -#define MMC_R1B_WP_VIOLATION 0x0020 -#define MMC_R1B_ERASE_PARAM 0x0040 -#define MMC_R1B_OOR 0x0080 -#define MMC_R1B_IDLE_STATE 0x0100 -#define MMC_R1B_ERASE_RESET 0x0200 -#define MMC_R1B_ILLEGAL_CMD 0x0400 -#define MMC_R1B_COM_CRC_ERR 0x0800 -#define MMC_R1B_ERASE_SEQ_ERR 0x1000 -#define MMC_R1B_ADDR_ERR 0x2000 -#define MMC_R1B_PARAM_ERR 0x4000 - -#endif /* __REGS_MMC_H__ */ diff --git a/arch/arm/include/asm/arch-pxa/regs-uart.h b/arch/arm/include/asm/arch-pxa/regs-uart.h deleted file mode 100644 index bdd0a4757b5..00000000000 --- a/arch/arm/include/asm/arch-pxa/regs-uart.h +++ /dev/null @@ -1,95 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2011 Marek Vasut - */ - -#ifndef __REGS_UART_H__ -#define __REGS_UART_H__ - -#define FFUART_BASE 0x40100000 -#define BTUART_BASE 0x40200000 -#define STUART_BASE 0x40700000 -#define HWUART_BASE 0x41600000 - -struct pxa_uart_regs { - union { - uint32_t thr; - uint32_t rbr; - uint32_t dll; - }; - union { - uint32_t ier; - uint32_t dlh; - }; - union { - uint32_t fcr; - uint32_t iir; - }; - uint32_t lcr; - uint32_t mcr; - uint32_t lsr; - uint32_t msr; - uint32_t spr; - uint32_t isr; -}; - -#define IER_DMAE (1 << 7) -#define IER_UUE (1 << 6) -#define IER_NRZE (1 << 5) -#define IER_RTIOE (1 << 4) -#define IER_MIE (1 << 3) -#define IER_RLSE (1 << 2) -#define IER_TIE (1 << 1) -#define IER_RAVIE (1 << 0) - -#define IIR_FIFOES1 (1 << 7) -#define IIR_FIFOES0 (1 << 6) -#define IIR_TOD (1 << 3) -#define IIR_IID2 (1 << 2) -#define IIR_IID1 (1 << 1) -#define IIR_IP (1 << 0) - -#define FCR_ITL2 (1 << 7) -#define FCR_ITL1 (1 << 6) -#define FCR_RESETTF (1 << 2) -#define FCR_RESETRF (1 << 1) -#define FCR_TRFIFOE (1 << 0) -#define FCR_ITL_1 0 -#define FCR_ITL_8 (FCR_ITL1) -#define FCR_ITL_16 (FCR_ITL2) -#define FCR_ITL_32 (FCR_ITL2|FCR_ITL1) - -#define LCR_DLAB (1 << 7) -#define LCR_SB (1 << 6) -#define LCR_STKYP (1 << 5) -#define LCR_EPS (1 << 4) -#define LCR_PEN (1 << 3) -#define LCR_STB (1 << 2) -#define LCR_WLS1 (1 << 1) -#define LCR_WLS0 (1 << 0) - -#define LSR_FIFOE (1 << 7) -#define LSR_TEMT (1 << 6) -#define LSR_TDRQ (1 << 5) -#define LSR_BI (1 << 4) -#define LSR_FE (1 << 3) -#define LSR_PE (1 << 2) -#define LSR_OE (1 << 1) -#define LSR_DR (1 << 0) - -#define MCR_LOOP (1 << 4) -#define MCR_OUT2 (1 << 3) -#define MCR_OUT1 (1 << 2) -#define MCR_RTS (1 << 1) -#define MCR_DTR (1 << 0) - -#define MSR_DCD (1 << 7) -#define MSR_RI (1 << 6) -#define MSR_DSR (1 << 5) -#define MSR_CTS (1 << 4) -#define MSR_DDCD (1 << 3) -#define MSR_TERI (1 << 2) -#define MSR_DDSR (1 << 1) -#define MSR_DCTS (1 << 0) - -#endif /* __REGS_UART_H__ */ diff --git a/arch/arm/include/asm/arch-pxa/regs-usb.h b/arch/arm/include/asm/arch-pxa/regs-usb.h deleted file mode 100644 index e46887c9ed4..00000000000 --- a/arch/arm/include/asm/arch-pxa/regs-usb.h +++ /dev/null @@ -1,146 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * PXA25x UDC definitions - * - * Copyright (C) 2012 Łukasz Dałek - */ - -#ifndef __REGS_USB_H__ -#define __REGS_USB_H__ - -struct pxa25x_udc_regs { - /* UDC Control Register */ - uint32_t udccr; /* 0x000 */ - uint32_t reserved1; - - /* UDC Control Function Register */ - uint32_t udccfr; /* 0x008 */ - uint32_t reserved2; - - /* UDC Endpoint Control/Status Registers */ - uint32_t udccs[16]; /* 0x010 - 0x04c */ - - /* UDC Interrupt Control/Status Registers */ - uint32_t uicr0; /* 0x050 */ - uint32_t uicr1; /* 0x054 */ - uint32_t usir0; /* 0x058 */ - uint32_t usir1; /* 0x05c */ - - /* UDC Frame Number/Byte Count Registers */ - uint32_t ufnrh; /* 0x060 */ - uint32_t ufnrl; /* 0x064 */ - uint32_t ubcr2; /* 0x068 */ - uint32_t ubcr4; /* 0x06c */ - uint32_t ubcr7; /* 0x070 */ - uint32_t ubcr9; /* 0x074 */ - uint32_t ubcr12; /* 0x078 */ - uint32_t ubcr14; /* 0x07c */ - - /* UDC Endpoint Data Registers */ - uint32_t uddr0; /* 0x080 */ - uint32_t reserved3[7]; - uint32_t uddr5; /* 0x0a0 */ - uint32_t reserved4[7]; - uint32_t uddr10; /* 0x0c0 */ - uint32_t reserved5[7]; - uint32_t uddr15; /* 0x0e0 */ - uint32_t reserved6[7]; - uint32_t uddr1; /* 0x100 */ - uint32_t reserved7[31]; - uint32_t uddr2; /* 0x180 */ - uint32_t reserved8[31]; - uint32_t uddr3; /* 0x200 */ - uint32_t reserved9[127]; - uint32_t uddr4; /* 0x400 */ - uint32_t reserved10[127]; - uint32_t uddr6; /* 0x600 */ - uint32_t reserved11[31]; - uint32_t uddr7; /* 0x680 */ - uint32_t reserved12[31]; - uint32_t uddr8; /* 0x700 */ - uint32_t reserved13[127]; - uint32_t uddr9; /* 0x900 */ - uint32_t reserved14[127]; - uint32_t uddr11; /* 0xb00 */ - uint32_t reserved15[31]; - uint32_t uddr12; /* 0xb80 */ - uint32_t reserved16[31]; - uint32_t uddr13; /* 0xc00 */ - uint32_t reserved17[127]; - uint32_t uddr14; /* 0xe00 */ - -}; - -#define PXA25X_UDC_BASE 0x40600000 - -#define UDCCR_UDE (1 << 0) -#define UDCCR_UDA (1 << 1) -#define UDCCR_RSM (1 << 2) -#define UDCCR_RESIR (1 << 3) -#define UDCCR_SUSIR (1 << 4) -#define UDCCR_SRM (1 << 5) -#define UDCCR_RSTIR (1 << 6) -#define UDCCR_REM (1 << 7) - -/* Bulk IN endpoint 1/6/11 */ -#define UDCCS_BI_TSP (1 << 7) -#define UDCCS_BI_FST (1 << 5) -#define UDCCS_BI_SST (1 << 4) -#define UDCCS_BI_TUR (1 << 3) -#define UDCCS_BI_FTF (1 << 2) -#define UDCCS_BI_TPC (1 << 1) -#define UDCCS_BI_TFS (1 << 0) - -/* Bulk OUT endpoint 2/7/12 */ -#define UDCCS_BO_RSP (1 << 7) -#define UDCCS_BO_RNE (1 << 6) -#define UDCCS_BO_FST (1 << 5) -#define UDCCS_BO_SST (1 << 4) -#define UDCCS_BO_DME (1 << 3) -#define UDCCS_BO_RPC (1 << 1) -#define UDCCS_BO_RFS (1 << 0) - -/* Isochronous OUT endpoint 4/9/14 */ -#define UDCCS_IO_RSP (1 << 7) -#define UDCCS_IO_RNE (1 << 6) -#define UDCCS_IO_DME (1 << 3) -#define UDCCS_IO_ROF (1 << 2) -#define UDCCS_IO_RPC (1 << 1) -#define UDCCS_IO_RFS (1 << 0) - -/* Control endpoint 0 */ -#define UDCCS0_OPR (1 << 0) -#define UDCCS0_IPR (1 << 1) -#define UDCCS0_FTF (1 << 2) -#define UDCCS0_DRWF (1 << 3) -#define UDCCS0_SST (1 << 4) -#define UDCCS0_FST (1 << 5) -#define UDCCS0_RNE (1 << 6) -#define UDCCS0_SA (1 << 7) - -#define UICR0_IM0 (1 << 0) - -#define USIR0_IR0 (1 << 0) -#define USIR0_IR1 (1 << 1) -#define USIR0_IR2 (1 << 2) -#define USIR0_IR3 (1 << 3) -#define USIR0_IR4 (1 << 4) -#define USIR0_IR5 (1 << 5) -#define USIR0_IR6 (1 << 6) -#define USIR0_IR7 (1 << 7) - -#define UDCCFR_AREN (1 << 7) /* ACK response enable (now) */ -#define UDCCFR_ACM (1 << 2) /* ACK control mode (wait for AREN) */ -/* - * Intel(R) PXA255 Processor Specification, September 2003 (page 31) - * define new "must be one" bits in UDCCFR (see Table 12-13.) - */ -#define UDCCFR_MB1 (0xff & ~(UDCCFR_AREN | UDCCFR_ACM)) - -#define UFNRH_SIR (1 << 7) /* SOF interrupt request */ -#define UFNRH_SIM (1 << 6) /* SOF interrupt mask */ -#define UFNRH_IPE14 (1 << 5) /* ISO packet error, ep14 */ -#define UFNRH_IPE9 (1 << 4) /* ISO packet error, ep9 */ -#define UFNRH_IPE4 (1 << 3) /* ISO packet error, ep4 */ - -#endif /* __REGS_USB_H__ */ diff --git a/arch/arm/include/asm/config.h b/arch/arm/include/asm/config.h index 26f18777914..be44b767642 100644 --- a/arch/arm/include/asm/config.h +++ b/arch/arm/include/asm/config.h @@ -9,8 +9,6 @@ #define CONFIG_SYS_BOOT_RAMDISK_HIGH #if defined(CONFIG_ARCH_LS1021A) || \ - defined(CONFIG_CPU_PXA27X) || \ - defined(CONFIG_CPU_MONAHANS) || \ defined(CONFIG_FSL_LAYERSCAPE) #include #endif diff --git a/doc/develop/driver-model/serial-howto.rst b/doc/develop/driver-model/serial-howto.rst index 8af79a90f46..9da0e57eab6 100644 --- a/doc/develop/driver-model/serial-howto.rst +++ b/doc/develop/driver-model/serial-howto.rst @@ -3,15 +3,6 @@ How to port a serial driver to driver model =========================================== -Almost all of the serial drivers have been converted as at January 2016. These -ones remain: - - * serial_bfin.c - * serial_pxa.c - -The deadline for this work was the end of January 2016. If no one steps -forward to convert these, at some point there may come a patch to remove them! - Here is a suggested approach for converting your serial driver over to driver model. Please feel free to update this file with your ideas and suggestions. diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index fd444219315..6ff00a7cbd3 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -346,14 +346,6 @@ config MVEBU_MMC If unsure, say N. -config PXA_MMC_GENERIC - bool "Support for MMC controllers on PXA" - help - This selects MMC controllers on PXA. - If you are on a PXA architecture, say Y here. - - If unsure, say N. - config MMC_OMAP_HS bool "TI OMAP High Speed Multimedia Card Interface support" select DM_REGULATOR_PBIAS if DM_MMC && DM_REGULATOR diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 96275093022..7c4243289c4 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -46,7 +46,6 @@ obj-$(CONFIG_MMC_MXS) += mxsmmc.o obj-$(CONFIG_MMC_OCTEONTX) += octeontx_hsmmc.o obj-$(CONFIG_MMC_OWL) += owl_mmc.o obj-$(CONFIG_MMC_PCI) += pci_mmc.o -obj-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o obj-$(CONFIG_$(SPL_TPL_)SUPPORT_EMMC_RPMB) += rpmb.o obj-$(CONFIG_MMC_SANDBOX) += sandbox_mmc.o obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o diff --git a/drivers/mmc/pxa_mmc_gen.c b/drivers/mmc/pxa_mmc_gen.c deleted file mode 100644 index a0e1a76d571..00000000000 --- a/drivers/mmc/pxa_mmc_gen.c +++ /dev/null @@ -1,531 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2010 Marek Vasut - * - * Modified to add driver model (DM) support - * Copyright (C) 2019 Marcel Ziswiler - * - * Loosely based on the old code and Linux's PXA MMC driver - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* PXAMMC Generic default config for various CPUs */ -#if defined(CONFIG_CPU_PXA27X) -#define PXAMMC_CRC_SKIP -#define PXAMMC_FIFO_SIZE 32 -#define PXAMMC_MIN_SPEED 304000 -#define PXAMMC_MAX_SPEED 19500000 -#define PXAMMC_HOST_CAPS (MMC_MODE_4BIT) -#elif defined(CONFIG_CPU_MONAHANS) -#define PXAMMC_FIFO_SIZE 32 -#define PXAMMC_MIN_SPEED 304000 -#define PXAMMC_MAX_SPEED 26000000 -#define PXAMMC_HOST_CAPS (MMC_MODE_4BIT | MMC_MODE_HS) -#else -#error "This CPU isn't supported by PXA MMC!" -#endif - -#define MMC_STAT_ERRORS \ - (MMC_STAT_RES_CRC_ERROR | MMC_STAT_SPI_READ_ERROR_TOKEN | \ - MMC_STAT_CRC_READ_ERROR | MMC_STAT_TIME_OUT_RESPONSE | \ - MMC_STAT_READ_TIME_OUT | MMC_STAT_CRC_WRITE_ERROR) - -/* 1 millisecond (in wait cycles below it's 100 x 10uS waits) */ -#define PXA_MMC_TIMEOUT 100 - -struct pxa_mmc_priv { - struct pxa_mmc_regs *regs; -}; - -/* Wait for bit to be set */ -static int pxa_mmc_wait(struct mmc *mmc, uint32_t mask) -{ - struct pxa_mmc_priv *priv = mmc->priv; - struct pxa_mmc_regs *regs = priv->regs; - unsigned int timeout = PXA_MMC_TIMEOUT; - - /* Wait for bit to be set */ - while (--timeout) { - if (readl(®s->stat) & mask) - break; - udelay(10); - } - - if (!timeout) - return -ETIMEDOUT; - - return 0; -} - -static int pxa_mmc_stop_clock(struct mmc *mmc) -{ - struct pxa_mmc_priv *priv = mmc->priv; - struct pxa_mmc_regs *regs = priv->regs; - unsigned int timeout = PXA_MMC_TIMEOUT; - - /* If the clock aren't running, exit */ - if (!(readl(®s->stat) & MMC_STAT_CLK_EN)) - return 0; - - /* Tell the controller to turn off the clock */ - writel(MMC_STRPCL_STOP_CLK, ®s->strpcl); - - /* Wait until the clock are off */ - while (--timeout) { - if (!(readl(®s->stat) & MMC_STAT_CLK_EN)) - break; - udelay(10); - } - - /* The clock refused to stop, scream and die a painful death */ - if (!timeout) - return -ETIMEDOUT; - - /* The clock stopped correctly */ - return 0; -} - -static int pxa_mmc_start_cmd(struct mmc *mmc, struct mmc_cmd *cmd, - uint32_t cmdat) -{ - struct pxa_mmc_priv *priv = mmc->priv; - struct pxa_mmc_regs *regs = priv->regs; - int ret; - - /* The card can send a "busy" response */ - if (cmd->resp_type & MMC_RSP_BUSY) - cmdat |= MMC_CMDAT_BUSY; - - /* Inform the controller about response type */ - switch (cmd->resp_type) { - case MMC_RSP_R1: - case MMC_RSP_R1b: - cmdat |= MMC_CMDAT_R1; - break; - case MMC_RSP_R2: - cmdat |= MMC_CMDAT_R2; - break; - case MMC_RSP_R3: - cmdat |= MMC_CMDAT_R3; - break; - default: - break; - } - - /* Load command and it's arguments into the controller */ - writel(cmd->cmdidx, ®s->cmd); - writel(cmd->cmdarg >> 16, ®s->argh); - writel(cmd->cmdarg & 0xffff, ®s->argl); - writel(cmdat, ®s->cmdat); - - /* Start the controller clock and wait until they are started */ - writel(MMC_STRPCL_START_CLK, ®s->strpcl); - - ret = pxa_mmc_wait(mmc, MMC_STAT_CLK_EN); - if (ret) - return ret; - - /* Correct and happy end */ - return 0; -} - -static int pxa_mmc_cmd_done(struct mmc *mmc, struct mmc_cmd *cmd) -{ - struct pxa_mmc_priv *priv = mmc->priv; - struct pxa_mmc_regs *regs = priv->regs; - u32 a, b, c; - int i; - int stat; - - /* Read the controller status */ - stat = readl(®s->stat); - - /* - * Linux says: - * Did I mention this is Sick. We always need to - * discard the upper 8 bits of the first 16-bit word. - */ - a = readl(®s->res) & 0xffff; - for (i = 0; i < 4; i++) { - b = readl(®s->res) & 0xffff; - c = readl(®s->res) & 0xffff; - cmd->response[i] = (a << 24) | (b << 8) | (c >> 8); - a = c; - } - - /* The command response didn't arrive */ - if (stat & MMC_STAT_TIME_OUT_RESPONSE) { - return -ETIMEDOUT; - } else if (stat & MMC_STAT_RES_CRC_ERROR && - cmd->resp_type & MMC_RSP_CRC) { -#ifdef PXAMMC_CRC_SKIP - if (cmd->resp_type & MMC_RSP_136 && - cmd->response[0] & (1 << 31)) - printf("Ignoring CRC, this may be dangerous!\n"); - else -#endif - return -EILSEQ; - } - - /* The command response was successfully read */ - return 0; -} - -static int pxa_mmc_do_read_xfer(struct mmc *mmc, struct mmc_data *data) -{ - struct pxa_mmc_priv *priv = mmc->priv; - struct pxa_mmc_regs *regs = priv->regs; - u32 len; - u32 *buf = (uint32_t *)data->dest; - int size; - int ret; - - len = data->blocks * data->blocksize; - - while (len) { - /* The controller has data ready */ - if (readl(®s->i_reg) & MMC_I_REG_RXFIFO_RD_REQ) { - size = min(len, (uint32_t)PXAMMC_FIFO_SIZE); - len -= size; - size /= 4; - - /* Read data into the buffer */ - while (size--) - *buf++ = readl(®s->rxfifo); - } - - if (readl(®s->stat) & MMC_STAT_ERRORS) - return -EIO; - } - - /* Wait for the transmission-done interrupt */ - ret = pxa_mmc_wait(mmc, MMC_STAT_DATA_TRAN_DONE); - if (ret) - return ret; - - return 0; -} - -static int pxa_mmc_do_write_xfer(struct mmc *mmc, struct mmc_data *data) -{ - struct pxa_mmc_priv *priv = mmc->priv; - struct pxa_mmc_regs *regs = priv->regs; - u32 len; - u32 *buf = (uint32_t *)data->src; - int size; - int ret; - - len = data->blocks * data->blocksize; - - while (len) { - /* The controller is ready to receive data */ - if (readl(®s->i_reg) & MMC_I_REG_TXFIFO_WR_REQ) { - size = min(len, (uint32_t)PXAMMC_FIFO_SIZE); - len -= size; - size /= 4; - - while (size--) - writel(*buf++, ®s->txfifo); - - if (min(len, (uint32_t)PXAMMC_FIFO_SIZE) < 32) - writel(MMC_PRTBUF_BUF_PART_FULL, ®s->prtbuf); - } - - if (readl(®s->stat) & MMC_STAT_ERRORS) - return -EIO; - } - - /* Wait for the transmission-done interrupt */ - ret = pxa_mmc_wait(mmc, MMC_STAT_DATA_TRAN_DONE); - if (ret) - return ret; - - /* Wait until the data are really written to the card */ - ret = pxa_mmc_wait(mmc, MMC_STAT_PRG_DONE); - if (ret) - return ret; - - return 0; -} - -static int pxa_mmc_send_cmd_common(struct pxa_mmc_priv *priv, struct mmc *mmc, - struct mmc_cmd *cmd, struct mmc_data *data) -{ - struct pxa_mmc_regs *regs = priv->regs; - u32 cmdat = 0; - int ret; - - /* Stop the controller */ - ret = pxa_mmc_stop_clock(mmc); - if (ret) - return ret; - - /* If we're doing data transfer, configure the controller accordingly */ - if (data) { - writel(data->blocks, ®s->nob); - writel(data->blocksize, ®s->blklen); - /* This delay can be optimized, but stick with max value */ - writel(0xffff, ®s->rdto); - cmdat |= MMC_CMDAT_DATA_EN; - if (data->flags & MMC_DATA_WRITE) - cmdat |= MMC_CMDAT_WRITE; - } - - /* Run in 4bit mode if the card can do it */ - if (mmc->bus_width == 4) - cmdat |= MMC_CMDAT_SD_4DAT; - - /* Execute the command */ - ret = pxa_mmc_start_cmd(mmc, cmd, cmdat); - if (ret) - return ret; - - /* Wait until the command completes */ - ret = pxa_mmc_wait(mmc, MMC_STAT_END_CMD_RES); - if (ret) - return ret; - - /* Read back the result */ - ret = pxa_mmc_cmd_done(mmc, cmd); - if (ret) - return ret; - - /* In case there was a data transfer scheduled, do it */ - if (data) { - if (data->flags & MMC_DATA_WRITE) - pxa_mmc_do_write_xfer(mmc, data); - else - pxa_mmc_do_read_xfer(mmc, data); - } - - return 0; -} - -static int pxa_mmc_set_ios_common(struct pxa_mmc_priv *priv, struct mmc *mmc) -{ - struct pxa_mmc_regs *regs = priv->regs; - u32 tmp; - u32 pxa_mmc_clock; - - if (!mmc->clock) { - pxa_mmc_stop_clock(mmc); - return 0; - } - - /* PXA3xx can do 26MHz with special settings. */ - if (mmc->clock == 26000000) { - writel(0x7, ®s->clkrt); - return 0; - } - - /* Set clock to the card the usual way. */ - pxa_mmc_clock = 0; - tmp = mmc->cfg->f_max / mmc->clock; - tmp += tmp % 2; - - while (tmp > 1) { - pxa_mmc_clock++; - tmp >>= 1; - } - - writel(pxa_mmc_clock, ®s->clkrt); - - return 0; -} - -static int pxa_mmc_init_common(struct pxa_mmc_priv *priv, struct mmc *mmc) -{ - struct pxa_mmc_regs *regs = priv->regs; - - /* Make sure the clock are stopped */ - pxa_mmc_stop_clock(mmc); - - /* Turn off SPI mode */ - writel(0, ®s->spi); - - /* Set up maximum timeout to wait for command response */ - writel(MMC_RES_TO_MAX_MASK, ®s->resto); - - /* Mask all interrupts */ - writel(~(MMC_I_MASK_TXFIFO_WR_REQ | MMC_I_MASK_RXFIFO_RD_REQ), - ®s->i_mask); - - return 0; -} - -#if !CONFIG_IS_ENABLED(DM_MMC) -static int pxa_mmc_init(struct mmc *mmc) -{ - struct pxa_mmc_priv *priv = mmc->priv; - - return pxa_mmc_init_common(priv, mmc); -} - -static int pxa_mmc_request(struct mmc *mmc, struct mmc_cmd *cmd, - struct mmc_data *data) -{ - struct pxa_mmc_priv *priv = mmc->priv; - - return pxa_mmc_send_cmd_common(priv, mmc, cmd, data); -} - -static int pxa_mmc_set_ios(struct mmc *mmc) -{ - struct pxa_mmc_priv *priv = mmc->priv; - - return pxa_mmc_set_ios_common(priv, mmc); -} - -static const struct mmc_ops pxa_mmc_ops = { - .send_cmd = pxa_mmc_request, - .set_ios = pxa_mmc_set_ios, - .init = pxa_mmc_init, -}; - -static struct mmc_config pxa_mmc_cfg = { - .name = "PXA MMC", - .ops = &pxa_mmc_ops, - .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, - .f_max = PXAMMC_MAX_SPEED, - .f_min = PXAMMC_MIN_SPEED, - .host_caps = PXAMMC_HOST_CAPS, - .b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT, -}; - -int pxa_mmc_register(int card_index) -{ - struct mmc *mmc; - struct pxa_mmc_priv *priv; - u32 reg; - int ret = -ENOMEM; - - priv = malloc(sizeof(struct pxa_mmc_priv)); - if (!priv) - goto err0; - - memset(priv, 0, sizeof(*priv)); - - switch (card_index) { - case 0: - priv->regs = (struct pxa_mmc_regs *)MMC0_BASE; - break; - case 1: - priv->regs = (struct pxa_mmc_regs *)MMC1_BASE; - break; - default: - ret = -EINVAL; - printf("PXA MMC: Invalid MMC controller ID (card_index = %d)\n", - card_index); - goto err1; - } - -#ifndef CONFIG_CPU_MONAHANS /* PXA2xx */ - reg = readl(CKEN); - reg |= CKEN12_MMC; - writel(reg, CKEN); -#else /* PXA3xx */ - reg = readl(CKENA); - reg |= CKENA_12_MMC0 | CKENA_13_MMC1; - writel(reg, CKENA); -#endif - - mmc = mmc_create(&pxa_mmc_cfg, priv); - if (!mmc) - goto err1; - - return 0; - -err1: - free(priv); -err0: - return ret; -} -#else /* !CONFIG_IS_ENABLED(DM_MMC) */ -static int pxa_mmc_probe(struct udevice *dev) -{ - struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); - struct pxa_mmc_plat *plat = dev_get_plat(dev); - struct mmc_config *cfg = &plat->cfg; - struct mmc *mmc = &plat->mmc; - struct pxa_mmc_priv *priv = dev_get_priv(dev); - u32 reg; - - upriv->mmc = mmc; - - cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; - cfg->f_max = PXAMMC_MAX_SPEED; - cfg->f_min = PXAMMC_MIN_SPEED; - cfg->host_caps = PXAMMC_HOST_CAPS; - cfg->name = dev->name; - cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; - - mmc->priv = priv; - - priv->regs = plat->base; - -#ifndef CONFIG_CPU_MONAHANS /* PXA2xx */ - reg = readl(CKEN); - reg |= CKEN12_MMC; - writel(reg, CKEN); -#else /* PXA3xx */ - reg = readl(CKENA); - reg |= CKENA_12_MMC0 | CKENA_13_MMC1; - writel(reg, CKENA); -#endif - - return pxa_mmc_init_common(priv, mmc); -} - -static int pxa_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, - struct mmc_data *data) -{ - struct pxa_mmc_plat *plat = dev_get_plat(dev); - struct pxa_mmc_priv *priv = dev_get_priv(dev); - - return pxa_mmc_send_cmd_common(priv, &plat->mmc, cmd, data); -} - -static int pxa_mmc_set_ios(struct udevice *dev) -{ - struct pxa_mmc_plat *plat = dev_get_plat(dev); - struct pxa_mmc_priv *priv = dev_get_priv(dev); - - return pxa_mmc_set_ios_common(priv, &plat->mmc); -} - -static const struct dm_mmc_ops pxa_mmc_ops = { - .get_cd = NULL, - .send_cmd = pxa_mmc_send_cmd, - .set_ios = pxa_mmc_set_ios, -}; - -#if CONFIG_IS_ENABLED(BLK) -static int pxa_mmc_bind(struct udevice *dev) -{ - struct pxa_mmc_plat *plat = dev_get_plat(dev); - - return mmc_bind(dev, &plat->mmc, &plat->cfg); -} -#endif - -U_BOOT_DRIVER(pxa_mmc) = { -#if CONFIG_IS_ENABLED(BLK) - .bind = pxa_mmc_bind, -#endif - .id = UCLASS_MMC, - .name = "pxa_mmc", - .ops = &pxa_mmc_ops, - .priv_auto = sizeof(struct pxa_mmc_priv), - .probe = pxa_mmc_probe, -}; -#endif /* !CONFIG_IS_ENABLED(DM_MMC) */ diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index f585622fdb7..de02e08a299 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -940,12 +940,6 @@ config OWL_SERIAL serial port, say Y to this option. If unsure, say N. Single baudrate is supported in current implementation (115200). -config PXA_SERIAL - bool "PXA serial port support" - help - If you have a machine based on a Marvell XScale PXA2xx CPU you - can enable its onboard serial ports by enabling this option. - config HTIF_CONSOLE bool "RISC-V HTIF console support" depends on DM_SERIAL && 64BIT diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 51de06a78c5..eb7b8f23ee9 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -43,7 +43,6 @@ obj-$(CONFIG_MCFUART) += serial_mcf.o obj-$(CONFIG_SYS_NS16550) += ns16550.o obj-$(CONFIG_S5P_SERIAL) += serial_s5p.o obj-$(CONFIG_MXC_UART) += serial_mxc.o -obj-$(CONFIG_PXA_SERIAL) += serial_pxa.o obj-$(CONFIG_MESON_SERIAL) += serial_meson.o obj-$(CONFIG_INTEL_MID_SERIAL) += serial_intel_mid.o obj-$(CONFIG_ROCKCHIP_SERIAL) += serial_rockchip.o diff --git a/drivers/serial/serial_pxa.c b/drivers/serial/serial_pxa.c deleted file mode 100644 index aa928efdc00..00000000000 --- a/drivers/serial/serial_pxa.c +++ /dev/null @@ -1,342 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2011 Marek Vasut - * - * (C) Copyright 2002 - * Wolfgang Denk, DENX Software Engineering, - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Marius Groeger - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Alex Zuepke - * - * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) - * - * Modified to add driver model (DM) support - * (C) Copyright 2016 Marcel Ziswiler - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -static uint32_t pxa_uart_get_baud_divider(int baudrate) -{ - return 921600 / baudrate; -} - -static void pxa_uart_toggle_clock(uint32_t uart_index, int enable) -{ - uint32_t clk_reg, clk_offset, reg; - - clk_reg = UART_CLK_REG; - clk_offset = UART_CLK_BASE << uart_index; - - reg = readl(clk_reg); - - if (enable) - reg |= clk_offset; - else - reg &= ~clk_offset; - - writel(reg, clk_reg); -} - -/* - * Enable clock and set baud rate, parity etc. - */ -void pxa_setbrg_common(struct pxa_uart_regs *uart_regs, int port, int baudrate) -{ - uint32_t divider = pxa_uart_get_baud_divider(baudrate); - if (!divider) - hang(); - - - pxa_uart_toggle_clock(port, 1); - - /* Disable interrupts and FIFOs */ - writel(0, &uart_regs->ier); - writel(0, &uart_regs->fcr); - - /* Set baud rate */ - writel(LCR_WLS0 | LCR_WLS1 | LCR_DLAB, &uart_regs->lcr); - writel(divider & 0xff, &uart_regs->dll); - writel(divider >> 8, &uart_regs->dlh); - writel(LCR_WLS0 | LCR_WLS1, &uart_regs->lcr); - - /* Enable UART */ - writel(IER_UUE, &uart_regs->ier); -} - -#ifndef CONFIG_DM_SERIAL -static struct pxa_uart_regs *pxa_uart_index_to_regs(uint32_t uart_index) -{ - switch (uart_index) { - case FFUART_INDEX: return (struct pxa_uart_regs *)FFUART_BASE; - case BTUART_INDEX: return (struct pxa_uart_regs *)BTUART_BASE; - case STUART_INDEX: return (struct pxa_uart_regs *)STUART_BASE; - default: - return NULL; - } -} - -/* - * Enable clock and set baud rate, parity etc. - */ -void pxa_setbrg_dev(uint32_t uart_index) -{ - struct pxa_uart_regs *uart_regs = pxa_uart_index_to_regs(uart_index); - if (!uart_regs) - panic("Failed getting UART registers\n"); - - pxa_setbrg_common(uart_regs, uart_index, gd->baudrate); -} - -/* - * Initialise the serial port with the given baudrate. The settings - * are always 8 data bits, no parity, 1 stop bit, no start bits. - */ -int pxa_init_dev(unsigned int uart_index) -{ - pxa_setbrg_dev(uart_index); - return 0; -} - -/* - * Output a single byte to the serial port. - */ -void pxa_putc_dev(unsigned int uart_index, const char c) -{ - struct pxa_uart_regs *uart_regs; - - /* If \n, also do \r */ - if (c == '\n') - pxa_putc_dev(uart_index, '\r'); - - uart_regs = pxa_uart_index_to_regs(uart_index); - if (!uart_regs) - hang(); - - while (!(readl(&uart_regs->lsr) & LSR_TEMT)) - WATCHDOG_RESET(); - writel(c, &uart_regs->thr); -} - -/* - * Read a single byte from the serial port. Returns 1 on success, 0 - * otherwise. When the function is succesfull, the character read is - * written into its argument c. - */ -int pxa_tstc_dev(unsigned int uart_index) -{ - struct pxa_uart_regs *uart_regs; - - uart_regs = pxa_uart_index_to_regs(uart_index); - if (!uart_regs) - return -1; - - return readl(&uart_regs->lsr) & LSR_DR; -} - -/* - * Read a single byte from the serial port. Returns 1 on success, 0 - * otherwise. When the function is succesfull, the character read is - * written into its argument c. - */ -int pxa_getc_dev(unsigned int uart_index) -{ - struct pxa_uart_regs *uart_regs; - - uart_regs = pxa_uart_index_to_regs(uart_index); - if (!uart_regs) - return -1; - - while (!(readl(&uart_regs->lsr) & LSR_DR)) - WATCHDOG_RESET(); - return readl(&uart_regs->rbr) & 0xff; -} - -void pxa_puts_dev(unsigned int uart_index, const char *s) -{ - while (*s) - pxa_putc_dev(uart_index, *s++); -} - -#define pxa_uart(uart, UART) \ - int uart##_init(void) \ - { \ - return pxa_init_dev(UART##_INDEX); \ - } \ - \ - void uart##_setbrg(void) \ - { \ - return pxa_setbrg_dev(UART##_INDEX); \ - } \ - \ - void uart##_putc(const char c) \ - { \ - return pxa_putc_dev(UART##_INDEX, c); \ - } \ - \ - void uart##_puts(const char *s) \ - { \ - return pxa_puts_dev(UART##_INDEX, s); \ - } \ - \ - int uart##_getc(void) \ - { \ - return pxa_getc_dev(UART##_INDEX); \ - } \ - \ - int uart##_tstc(void) \ - { \ - return pxa_tstc_dev(UART##_INDEX); \ - } \ - -#define pxa_uart_desc(uart) \ - struct serial_device serial_##uart##_device = \ - { \ - .name = "serial_"#uart, \ - .start = uart##_init, \ - .stop = NULL, \ - .setbrg = uart##_setbrg, \ - .getc = uart##_getc, \ - .tstc = uart##_tstc, \ - .putc = uart##_putc, \ - .puts = uart##_puts, \ - }; - -#define pxa_uart_multi(uart, UART) \ - pxa_uart(uart, UART) \ - pxa_uart_desc(uart) - -#if defined(CONFIG_HWUART) - pxa_uart_multi(hwuart, HWUART) -#endif -#if defined(CONFIG_STUART) - pxa_uart_multi(stuart, STUART) -#endif -#if defined(CONFIG_FFUART) - pxa_uart_multi(ffuart, FFUART) -#endif -#if defined(CONFIG_BTUART) - pxa_uart_multi(btuart, BTUART) -#endif - -__weak struct serial_device *default_serial_console(void) -{ -#if CONFIG_CONS_INDEX == 1 - return &serial_hwuart_device; -#elif CONFIG_CONS_INDEX == 2 - return &serial_stuart_device; -#elif CONFIG_CONS_INDEX == 3 - return &serial_ffuart_device; -#elif CONFIG_CONS_INDEX == 4 - return &serial_btuart_device; -#else -#error "Bad CONFIG_CONS_INDEX." -#endif -} - -void pxa_serial_initialize(void) -{ -#if defined(CONFIG_FFUART) - serial_register(&serial_ffuart_device); -#endif -#if defined(CONFIG_BTUART) - serial_register(&serial_btuart_device); -#endif -#if defined(CONFIG_STUART) - serial_register(&serial_stuart_device); -#endif -} -#endif /* CONFIG_DM_SERIAL */ - -#ifdef CONFIG_DM_SERIAL -static int pxa_serial_probe(struct udevice *dev) -{ - struct pxa_serial_plat *plat = dev_get_plat(dev); - - pxa_setbrg_common((struct pxa_uart_regs *)plat->base, plat->port, - plat->baudrate); - return 0; -} - -static int pxa_serial_putc(struct udevice *dev, const char ch) -{ - struct pxa_serial_plat *plat = dev_get_plat(dev); - struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)plat->base; - - /* Wait for last character to go. */ - if (!(readl(&uart_regs->lsr) & LSR_TEMT)) - return -EAGAIN; - - writel(ch, &uart_regs->thr); - - return 0; -} - -static int pxa_serial_getc(struct udevice *dev) -{ - struct pxa_serial_plat *plat = dev_get_plat(dev); - struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)plat->base; - - /* Wait for a character to arrive. */ - if (!(readl(&uart_regs->lsr) & LSR_DR)) - return -EAGAIN; - - return readl(&uart_regs->rbr) & 0xff; -} - -int pxa_serial_setbrg(struct udevice *dev, int baudrate) -{ - struct pxa_serial_plat *plat = dev_get_plat(dev); - struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)plat->base; - int port = plat->port; - - pxa_setbrg_common(uart_regs, port, baudrate); - - return 0; -} - -static int pxa_serial_pending(struct udevice *dev, bool input) -{ - struct pxa_serial_plat *plat = dev_get_plat(dev); - struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)plat->base; - - if (input) - return readl(&uart_regs->lsr) & LSR_DR ? 1 : 0; - else - return readl(&uart_regs->lsr) & LSR_TEMT ? 0 : 1; - - return 0; -} - -static const struct dm_serial_ops pxa_serial_ops = { - .putc = pxa_serial_putc, - .pending = pxa_serial_pending, - .getc = pxa_serial_getc, - .setbrg = pxa_serial_setbrg, -}; - -U_BOOT_DRIVER(serial_pxa) = { - .name = "serial_pxa", - .id = UCLASS_SERIAL, - .probe = pxa_serial_probe, - .ops = &pxa_serial_ops, - .flags = DM_FLAG_PRE_RELOC, -}; -#endif /* CONFIG_DM_SERIAL */ diff --git a/drivers/serial/usbtty.h b/drivers/serial/usbtty.h index 05b3c01e5fc..0d89fc085fb 100644 --- a/drivers/serial/usbtty.h +++ b/drivers/serial/usbtty.h @@ -13,8 +13,6 @@ #include #if defined(CONFIG_PPC) #include -#elif defined(CONFIG_CPU_PXA27X) -#include #elif defined(CONFIG_DW_UDC) #include #elif defined(CONFIG_CI_UDC) diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile index d8de8efa0a4..306dd3127f4 100644 --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile @@ -43,6 +43,5 @@ ifdef CONFIG_USB_DEVICE obj-y += core.o obj-y += ep0.o obj-$(CONFIG_DW_UDC) += designware_udc.o -obj-$(CONFIG_CPU_PXA27X) += pxa27x_udc.o endif endif diff --git a/drivers/usb/gadget/epautoconf.c b/drivers/usb/gadget/epautoconf.c index 01337d6511b..bb0d2971d06 100644 --- a/drivers/usb/gadget/epautoconf.c +++ b/drivers/usb/gadget/epautoconf.c @@ -79,12 +79,6 @@ static int ep_matches( */ if ('s' == tmp[2]) /* == "-iso" */ return 0; - /* for now, avoid PXA "interrupt-in"; - * it's documented as never using DATA1. - */ - if (gadget_is_pxa(gadget) - && 'i' == tmp[1]) - return 0; break; case USB_ENDPOINT_XFER_BULK: if ('b' != tmp[1]) /* != "-bulk" */ diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c index 43073286572..72b4f7f306a 100644 --- a/drivers/usb/gadget/ether.c +++ b/drivers/usb/gadget/ether.c @@ -1325,24 +1325,6 @@ eth_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl) if (!cdc_active(dev) && wIndex != 0) break; - /* - * PXA hardware partially handles SET_INTERFACE; - * we need to kluge around that interference. - */ - if (gadget_is_pxa(gadget)) { - value = eth_set_config(dev, DEV_CONFIG_VALUE, - GFP_ATOMIC); - /* - * PXA25x driver use non-CDC ethernet gadget. - * But only _CDC and _RNDIS code can signalize - * that network is working. So we signalize it - * here. - */ - dev->network_started = 1; - debug("USB network up!\n"); - goto done_set_intf; - } - #ifdef CONFIG_USB_ETH_CDC switch (wIndex) { case 0: /* control/master intf */ @@ -1386,8 +1368,6 @@ eth_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl) */ debug("set_interface ignored!\n"); #endif /* CONFIG_USB_ETH_CDC */ - -done_set_intf: break; case USB_REQ_GET_INTERFACE: if (ctrl->bRequestType != (USB_DIR_IN|USB_RECIP_INTERFACE) @@ -2032,10 +2012,7 @@ static int eth_bind(struct usb_gadget *gadget) * standard protocol is _strongly_ preferred for interop purposes. * (By everyone except Microsoft.) */ - if (gadget_is_pxa(gadget)) { - /* pxa doesn't support altsettings */ - cdc = 0; - } else if (gadget_is_musbhdrc(gadget)) { + if (gadget_is_musbhdrc(gadget)) { /* reduce tx dma overhead by avoiding special cases */ zlp = 0; } else if (gadget_is_sh(gadget)) { diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h index 06e6a489495..66ccd054172 100644 --- a/drivers/usb/gadget/gadget_chips.h +++ b/drivers/usb/gadget/gadget_chips.h @@ -32,12 +32,6 @@ #define gadget_is_dummy(g) 0 #endif -#ifdef CONFIG_USB_GADGET_PXA2XX -#define gadget_is_pxa(g) (!strcmp("pxa2xx_udc", (g)->name)) -#else -#define gadget_is_pxa(g) 0 -#endif - #ifdef CONFIG_USB_GADGET_GOKU #define gadget_is_goku(g) (!strcmp("goku_udc", (g)->name)) #else @@ -78,13 +72,6 @@ #define gadget_is_n9604(g) 0 #endif -/* various unstable versions available */ -#ifdef CONFIG_USB_GADGET_PXA27X -#define gadget_is_pxa27x(g) (!strcmp("pxa27x_udc", (g)->name)) -#else -#define gadget_is_pxa27x(g) 0 -#endif - #ifdef CONFIG_USB_GADGET_ATMEL_USBA #define gadget_is_atmel_usba(g) (!strcmp("atmel_usba_udc", (g)->name)) #else @@ -194,8 +181,6 @@ static inline int usb_gadget_controller_number(struct usb_gadget *gadget) return 0x01; else if (gadget_is_dummy(gadget)) return 0x02; - else if (gadget_is_pxa(gadget)) - return 0x03; else if (gadget_is_sh(gadget)) return 0x04; else if (gadget_is_sa1100(gadget)) @@ -208,8 +193,6 @@ static inline int usb_gadget_controller_number(struct usb_gadget *gadget) return 0x08; else if (gadget_is_n9604(gadget)) return 0x09; - else if (gadget_is_pxa27x(gadget)) - return 0x10; else if (gadget_is_at91(gadget)) return 0x12; else if (gadget_is_imx(gadget)) diff --git a/drivers/usb/gadget/pxa27x_udc.c b/drivers/usb/gadget/pxa27x_udc.c deleted file mode 100644 index 583ceb4d55c..00000000000 --- a/drivers/usb/gadget/pxa27x_udc.c +++ /dev/null @@ -1,703 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * PXA27x USB device driver for u-boot. - * - * Copyright (C) 2007 Rodolfo Giometti - * Copyright (C) 2007 Eurotech S.p.A. - * Copyright (C) 2008 Vivek Kutal - */ - - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "ep0.h" - -/* number of endpoints on this UDC */ -#define UDC_MAX_ENDPOINTS 24 - -static struct urb *ep0_urb; -static struct usb_device_instance *udc_device; -static int ep0state = EP0_IDLE; - -#ifdef USBDDBG -static void udc_dump_buffer(char *name, u8 *buf, int len) -{ - usbdbg("%s - buf %p, len %d", name, buf, len); - print_buffer(0, buf, 1, len, 0); -} -#else -#define udc_dump_buffer(name, buf, len) /* void */ -#endif - -static inline void udc_ack_int_UDCCR(int mask) -{ - writel(readl(USIR1) | mask, USIR1); -} - -/* - * If the endpoint has an active tx_urb, then the next packet of data from the - * URB is written to the tx FIFO. - * The total amount of data in the urb is given by urb->actual_length. - * The maximum amount of data that can be sent in any one packet is given by - * endpoint->tx_packetSize. - * The number of data bytes from this URB that have already been transmitted - * is given by endpoint->sent. - * endpoint->last is updated by this routine with the number of data bytes - * transmitted in this packet. - */ -static int udc_write_urb(struct usb_endpoint_instance *endpoint) -{ - struct urb *urb = endpoint->tx_urb; - int ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK; - u32 *data32 = (u32 *) urb->buffer; - u8 *data8 = (u8 *) urb->buffer; - unsigned int i, n, w, b, is_short; - int timeout = 2000; /* 2ms */ - - if (!urb || !urb->actual_length) - return -1; - - n = min_t(unsigned int, urb->actual_length - endpoint->sent, - endpoint->tx_packetSize); - if (n <= 0) - return -1; - - usbdbg("write urb on ep %d", ep_num); -#if defined(USBDDBG) && defined(USBDPARANOIA) - usbdbg("urb: buf %p, buf_len %d, actual_len %d", - urb->buffer, urb->buffer_length, urb->actual_length); - usbdbg("endpoint: sent %d, tx_packetSize %d, last %d", - endpoint->sent, endpoint->tx_packetSize, endpoint->last); -#endif - - is_short = n != endpoint->tx_packetSize; - w = n / 4; - b = n % 4; - usbdbg("n %d%s w %d b %d", n, is_short ? "-s" : "", w, b); - udc_dump_buffer("urb write", data8 + endpoint->sent, n); - - /* Prepare for data send */ - if (ep_num) - writel(UDCCSR_PC ,UDCCSN(ep_num)); - - for (i = 0; i < w; i++) - writel(data32[endpoint->sent / 4 + i], UDCDN(ep_num)); - - for (i = 0; i < b; i++) - writeb(data8[endpoint->sent + w * 4 + i], UDCDN(ep_num)); - - /* Set "Packet Complete" if less data then tx_packetSize */ - if (is_short) - writel(ep_num ? UDCCSR_SP : UDCCSR0_IPR, UDCCSN(ep_num)); - - /* Wait for data sent */ - if (ep_num) { - while (!(readl(UDCCSN(ep_num)) & UDCCSR_PC)) { - if (timeout-- == 0) - return -1; - else - udelay(1); - } - } - - endpoint->last = n; - - if (ep_num) { - usbd_tx_complete(endpoint); - } else { - endpoint->sent += n; - endpoint->last -= n; - } - - if (endpoint->sent >= urb->actual_length) { - urb->actual_length = 0; - endpoint->sent = 0; - endpoint->last = 0; - } - - if ((endpoint->sent >= urb->actual_length) && (!ep_num)) { - usbdbg("ep0 IN stage done"); - if (is_short) - ep0state = EP0_IDLE; - else - ep0state = EP0_XFER_COMPLETE; - } - - return 0; -} - -static int udc_read_urb(struct usb_endpoint_instance *endpoint) -{ - struct urb *urb = endpoint->rcv_urb; - int ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK; - u32 *data32 = (u32 *) urb->buffer; - unsigned int i, n; - - usbdbg("read urb on ep %d", ep_num); -#if defined(USBDDBG) && defined(USBDPARANOIA) - usbdbg("urb: buf %p, buf_len %d, actual_len %d", - urb->buffer, urb->buffer_length, urb->actual_length); - usbdbg("endpoint: rcv_packetSize %d", - endpoint->rcv_packetSize); -#endif - - if (readl(UDCCSN(ep_num)) & UDCCSR_BNE) - n = readl(UDCBCN(ep_num)) & 0x3ff; - else /* zlp */ - n = 0; - - usbdbg("n %d%s", n, n != endpoint->rcv_packetSize ? "-s" : ""); - for (i = 0; i < n; i += 4) - data32[urb->actual_length / 4 + i / 4] = readl(UDCDN(ep_num)); - - udc_dump_buffer("urb read", (u8 *) data32, urb->actual_length + n); - usbd_rcv_complete(endpoint, n, 0); - - return 0; -} - -static int udc_read_urb_ep0(void) -{ - u32 *data32 = (u32 *) ep0_urb->buffer; - u8 *data8 = (u8 *) ep0_urb->buffer; - unsigned int i, n, w, b; - - usbdbg("read urb on ep 0"); -#if defined(USBDDBG) && defined(USBDPARANOIA) - usbdbg("urb: buf %p, buf_len %d, actual_len %d", - ep0_urb->buffer, ep0_urb->buffer_length, ep0_urb->actual_length); -#endif - - n = readl(UDCBCR0); - w = n / 4; - b = n % 4; - - for (i = 0; i < w; i++) { - data32[ep0_urb->actual_length / 4 + i] = readl(UDCDN(0)); - /* ep0_urb->actual_length += 4; */ - } - - for (i = 0; i < b; i++) { - data8[ep0_urb->actual_length + w * 4 + i] = readb(UDCDN(0)); - /* ep0_urb->actual_length++; */ - } - - ep0_urb->actual_length += n; - - udc_dump_buffer("urb read", (u8 *) data32, ep0_urb->actual_length); - - writel(UDCCSR0_OPC | UDCCSR0_IPR, UDCCSR0); - if (ep0_urb->actual_length == ep0_urb->device_request.wLength) - return 1; - - return 0; -} - -static void udc_handle_ep0(struct usb_endpoint_instance *endpoint) -{ - u32 udccsr0 = readl(UDCCSR0); - u32 *data = (u32 *) &ep0_urb->device_request; - int i; - - usbdbg("udccsr0 %x", udccsr0); - - /* Clear stall status */ - if (udccsr0 & UDCCSR0_SST) { - usberr("clear stall status"); - writel(UDCCSR0_SST, UDCCSR0); - ep0state = EP0_IDLE; - } - - /* previous request unfinished? non-error iff back-to-back ... */ - if ((udccsr0 & UDCCSR0_SA) != 0 && ep0state != EP0_IDLE) - ep0state = EP0_IDLE; - - switch (ep0state) { - - case EP0_IDLE: - udccsr0 = readl(UDCCSR0); - /* Start control request? */ - if ((udccsr0 & (UDCCSR0_OPC | UDCCSR0_SA | UDCCSR0_RNE)) - == (UDCCSR0_OPC | UDCCSR0_SA | UDCCSR0_RNE)) { - - /* Read SETUP packet. - * SETUP packet size is 8 bytes (aka 2 words) - */ - usbdbg("try reading SETUP packet"); - for (i = 0; i < 2; i++) { - if ((readl(UDCCSR0) & UDCCSR0_RNE) == 0) { - usberr("setup packet too short:%d", i); - goto stall; - } - data[i] = readl(UDCDR0); - } - - writel(readl(UDCCSR0) | UDCCSR0_OPC | UDCCSR0_SA, UDCCSR0); - if ((readl(UDCCSR0) & UDCCSR0_RNE) != 0) { - usberr("setup packet too long"); - goto stall; - } - - udc_dump_buffer("ep0 setup read", (u8 *) data, 8); - - if (ep0_urb->device_request.wLength == 0) { - usbdbg("Zero Data control Packet\n"); - if (ep0_recv_setup(ep0_urb)) { - usberr("Invalid Setup Packet\n"); - udc_dump_buffer("ep0 setup read", - (u8 *)data, 8); - goto stall; - } - writel(UDCCSR0_IPR, UDCCSR0); - ep0state = EP0_IDLE; - } else { - /* Check direction */ - if ((ep0_urb->device_request.bmRequestType & - USB_REQ_DIRECTION_MASK) - == USB_REQ_HOST2DEVICE) { - ep0state = EP0_OUT_DATA; - ep0_urb->buffer = - (u8 *)ep0_urb->buffer_data; - ep0_urb->buffer_length = - sizeof(ep0_urb->buffer_data); - ep0_urb->actual_length = 0; - writel(UDCCSR0_IPR, UDCCSR0); - } else { - /* The ep0_recv_setup function has - * already placed our response packet - * data in ep0_urb->buffer and the - * packet length in - * ep0_urb->actual_length. - */ - if (ep0_recv_setup(ep0_urb)) { -stall: - usberr("Invalid setup packet"); - udc_dump_buffer("ep0 setup read" - , (u8 *) data, 8); - ep0state = EP0_IDLE; - - writel(UDCCSR0_SA | - UDCCSR0_OPC | UDCCSR0_FST | - UDCCS0_FTF, UDCCSR0); - - return; - } - - endpoint->tx_urb = ep0_urb; - endpoint->sent = 0; - usbdbg("EP0_IN_DATA"); - ep0state = EP0_IN_DATA; - if (udc_write_urb(endpoint) < 0) - goto stall; - - } - } - return; - } else if ((udccsr0 & (UDCCSR0_OPC | UDCCSR0_SA)) - == (UDCCSR0_OPC|UDCCSR0_SA)) { - usberr("Setup Active but no data. Stalling ....\n"); - goto stall; - } else { - usbdbg("random early IRQs"); - /* Some random early IRQs: - * - we acked FST - * - IPR cleared - * - OPC got set, without SA (likely status stage) - */ - writel(udccsr0 & (UDCCSR0_SA | UDCCSR0_OPC), UDCCSR0); - } - break; - - case EP0_OUT_DATA: - - if ((udccsr0 & UDCCSR0_OPC) && !(udccsr0 & UDCCSR0_SA)) { - if (udc_read_urb_ep0()) { -read_complete: - ep0state = EP0_IDLE; - if (ep0_recv_setup(ep0_urb)) { - /* Not a setup packet, stall next - * EP0 transaction - */ - udc_dump_buffer("ep0 setup read", - (u8 *) data, 8); - usberr("can't parse setup packet\n"); - goto stall; - } - } - } else if (!(udccsr0 & UDCCSR0_OPC) && - !(udccsr0 & UDCCSR0_IPR)) { - if (ep0_urb->device_request.wLength == - ep0_urb->actual_length) - goto read_complete; - - usberr("Premature Status\n"); - ep0state = EP0_IDLE; - } - break; - - case EP0_IN_DATA: - /* GET_DESCRIPTOR etc */ - if (udccsr0 & UDCCSR0_OPC) { - writel(UDCCSR0_OPC | UDCCSR0_FTF, UDCCSR0); - usberr("ep0in premature status"); - ep0state = EP0_IDLE; - } else { - /* irq was IPR clearing */ - if (udc_write_urb(endpoint) < 0) { - usberr("ep0_write_error\n"); - goto stall; - } - } - break; - - case EP0_XFER_COMPLETE: - writel(UDCCSR0_IPR, UDCCSR0); - ep0state = EP0_IDLE; - break; - - default: - usbdbg("Default\n"); - } - writel(USIR0_IR0, USIR0); -} - -static void udc_handle_ep(struct usb_endpoint_instance *endpoint) -{ - int ep_addr = endpoint->endpoint_address; - int ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK; - int ep_isout = (ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT; - - u32 flags = readl(UDCCSN(ep_num)) & (UDCCSR_SST | UDCCSR_TRN); - if (flags) - writel(flags, UDCCSN(ep_num)); - - if (ep_isout) - udc_read_urb(endpoint); - else - udc_write_urb(endpoint); - - writel(UDCCSR_PC, UDCCSN(ep_num)); -} - -static void udc_state_changed(void) -{ - - writel(readl(UDCCR) | UDCCR_SMAC, UDCCR); - - usbdbg("New UDC settings are: conf %d - inter %d - alter %d", - (readl(UDCCR) & UDCCR_ACN) >> UDCCR_ACN_S, - (readl(UDCCR) & UDCCR_AIN) >> UDCCR_AIN_S, - (readl(UDCCR) & UDCCR_AAISN) >> UDCCR_AAISN_S); - - usbd_device_event_irq(udc_device, DEVICE_CONFIGURED, 0); - writel(UDCISR1_IRCC, UDCISR1); -} - -void udc_irq(void) -{ - int handled; - struct usb_endpoint_instance *endpoint; - int ep_num, i; - u32 udcisr0; - - do { - handled = 0; - /* Suspend Interrupt Request */ - if (readl(USIR1) & UDCCR_SUSIR) { - usbdbg("Suspend\n"); - udc_ack_int_UDCCR(UDCCR_SUSIR); - handled = 1; - ep0state = EP0_IDLE; - } - - /* Resume Interrupt Request */ - if (readl(USIR1) & UDCCR_RESIR) { - udc_ack_int_UDCCR(UDCCR_RESIR); - handled = 1; - usbdbg("USB resume\n"); - } - - if (readl(USIR1) & (1<<31)) { - handled = 1; - udc_state_changed(); - } - - /* Reset Interrupt Request */ - if (readl(USIR1) & UDCCR_RSTIR) { - udc_ack_int_UDCCR(UDCCR_RSTIR); - handled = 1; - usbdbg("Reset\n"); - usbd_device_event_irq(udc_device, DEVICE_RESET, 0); - } else { - if (readl(USIR0)) - usbdbg("UISR0: %x \n", readl(USIR0)); - - if (readl(USIR0) & 0x2) - writel(0x2, USIR0); - - /* Control traffic */ - if (readl(USIR0) & USIR0_IR0) { - handled = 1; - writel(USIR0_IR0, USIR0); - udc_handle_ep0(udc_device->bus->endpoint_array); - } - - endpoint = udc_device->bus->endpoint_array; - for (i = 0; i < udc_device->bus->max_endpoints; i++) { - ep_num = (endpoint[i].endpoint_address) & - USB_ENDPOINT_NUMBER_MASK; - if (!ep_num) - continue; - udcisr0 = readl(UDCISR0); - if (udcisr0 & - UDCISR_INT(ep_num, UDC_INT_PACKETCMP)) { - writel(UDCISR_INT(ep_num, UDC_INT_PACKETCMP), - UDCISR0); - udc_handle_ep(&endpoint[i]); - } - } - } - - } while (handled); -} - -/* The UDCCR reg contains mask and interrupt status bits, - * so using '|=' isn't safe as it may ack an interrupt. - */ -#define UDCCR_OEN (1 << 31) /* On-the-Go Enable */ -#define UDCCR_MASK_BITS (UDCCR_OEN | UDCCR_UDE) - -static inline void udc_set_mask_UDCCR(int mask) -{ - writel((readl(UDCCR) & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS), UDCCR); -} - -static inline void udc_clear_mask_UDCCR(int mask) -{ - writel((readl(UDCCR) & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS), UDCCR); -} - -static void pio_irq_enable(int ep_num) -{ - if (ep_num < 16) - writel(readl(UDCICR0) | 3 << (ep_num * 2), UDCICR0); - else { - ep_num -= 16; - writel(readl(UDCICR1) | 3 << (ep_num * 2), UDCICR1); - } -} - -/* - * udc_set_nak - * - * Allow upper layers to signal lower layers should not accept more RX data - */ -void udc_set_nak(int ep_num) -{ - /* TODO */ -} - -/* - * udc_unset_nak - * - * Suspend sending of NAK tokens for DATA OUT tokens on a given endpoint. - * Switch off NAKing on this endpoint to accept more data output from host. - */ -void udc_unset_nak(int ep_num) -{ - /* TODO */ -} - -int udc_endpoint_write(struct usb_endpoint_instance *endpoint) -{ - return udc_write_urb(endpoint); -} - -/* Associate a physical endpoint with endpoint instance */ -void udc_setup_ep(struct usb_device_instance *device, unsigned int id, - struct usb_endpoint_instance *endpoint) -{ - int ep_num, ep_addr, ep_isout, ep_type, ep_size; - int config, interface, alternate; - u32 tmp; - - usbdbg("setting up endpoint id %d", id); - - if (!endpoint) { - usberr("endpoint void!"); - return; - } - - ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK; - if (ep_num >= UDC_MAX_ENDPOINTS) { - usberr("unable to setup ep %d!", ep_num); - return; - } - - pio_irq_enable(ep_num); - if (ep_num == 0) { - /* Done for ep0 */ - return; - } - - config = 1; - interface = 0; - alternate = 0; - - usbdbg("config %d - interface %d - alternate %d", - config, interface, alternate); - - ep_addr = endpoint->endpoint_address; - ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK; - ep_isout = (ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT; - ep_type = ep_isout ? endpoint->rcv_attributes : endpoint->tx_attributes; - ep_size = ep_isout ? endpoint->rcv_packetSize : endpoint->tx_packetSize; - - usbdbg("addr %x, num %d, dir %s, type %s, packet size %d", - ep_addr, ep_num, - ep_isout ? "out" : "in", - ep_type == USB_ENDPOINT_XFER_ISOC ? "isoc" : - ep_type == USB_ENDPOINT_XFER_BULK ? "bulk" : - ep_type == USB_ENDPOINT_XFER_INT ? "int" : "???", - ep_size - ); - - /* Configure UDCCRx */ - tmp = 0; - tmp |= (config << UDCCONR_CN_S) & UDCCONR_CN; - tmp |= (interface << UDCCONR_IN_S) & UDCCONR_IN; - tmp |= (alternate << UDCCONR_AISN_S) & UDCCONR_AISN; - tmp |= (ep_num << UDCCONR_EN_S) & UDCCONR_EN; - tmp |= (ep_type << UDCCONR_ET_S) & UDCCONR_ET; - tmp |= ep_isout ? 0 : UDCCONR_ED; - tmp |= (ep_size << UDCCONR_MPS_S) & UDCCONR_MPS; - tmp |= UDCCONR_EE; - - writel(tmp, UDCCN(ep_num)); - - usbdbg("UDCCR%c = %x", 'A' + ep_num-1, readl(UDCCN(ep_num))); - usbdbg("UDCCSR%c = %x", 'A' + ep_num-1, readl(UDCCSN(ep_num))); -} - -/* Connect the USB device to the bus */ -void udc_connect(void) -{ - usbdbg("UDC connect"); - -#ifdef CONFIG_USB_DEV_PULLUP_GPIO - /* Turn on the USB connection by enabling the pullup resistor */ - writel(readl(GPDR(CONFIG_USB_DEV_PULLUP_GPIO)) - | GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), - GPDR(CONFIG_USB_DEV_PULLUP_GPIO)); - writel(GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), GPSR(CONFIG_USB_DEV_PULLUP_GPIO)); -#else - /* Host port 2 transceiver D+ pull up enable */ - writel(readl(UP2OCR) | UP2OCR_DPPUE, UP2OCR); -#endif -} - -/* Disconnect the USB device to the bus */ -void udc_disconnect(void) -{ - usbdbg("UDC disconnect"); - -#ifdef CONFIG_USB_DEV_PULLUP_GPIO - /* Turn off the USB connection by disabling the pullup resistor */ - writel(GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), GPCR(CONFIG_USB_DEV_PULLUP_GPIO)); -#else - /* Host port 2 transceiver D+ pull up disable */ - writel(readl(UP2OCR) & ~UP2OCR_DPPUE, UP2OCR); -#endif -} - -/* Switch on the UDC */ -void udc_enable(struct usb_device_instance *device) -{ - - ep0state = EP0_IDLE; - - /* enable endpoint 0, A, B's Packet Complete Interrupt. */ - writel(0xffffffff, UDCICR0); - writel(0xa8000000, UDCICR1); - - /* clear the interrupt status/control registers */ - writel(0xffffffff, UDCISR0); - writel(0xffffffff, UDCISR1); - - /* set UDC-enable */ - udc_set_mask_UDCCR(UDCCR_UDE); - - udc_device = device; - if (!ep0_urb) - ep0_urb = usbd_alloc_urb(udc_device, - udc_device->bus->endpoint_array); - else - usbinfo("ep0_urb %p already allocated", ep0_urb); - - usbdbg("UDC Enabled\n"); -} - -/* Need to check this again */ -void udc_disable(void) -{ - usbdbg("disable UDC"); - - udc_clear_mask_UDCCR(UDCCR_UDE); - - /* Disable clock for USB device */ - writel(readl(CKEN) & ~CKEN11_USB, CKEN); - - /* Free ep0 URB */ - if (ep0_urb) { - usbd_dealloc_urb(ep0_urb); - ep0_urb = NULL; - } - - /* Reset device pointer */ - udc_device = NULL; -} - -/* Allow udc code to do any additional startup */ -void udc_startup_events(struct usb_device_instance *device) -{ - /* The DEVICE_INIT event puts the USB device in the state STATE_INIT */ - usbd_device_event_irq(device, DEVICE_INIT, 0); - - /* The DEVICE_CREATE event puts the USB device in the state - * STATE_ATTACHED */ - usbd_device_event_irq(device, DEVICE_CREATE, 0); - - /* Some USB controller driver implementations signal - * DEVICE_HUB_CONFIGURED and DEVICE_RESET events here. - * DEVICE_HUB_CONFIGURED causes a transition to the state - * STATE_POWERED, and DEVICE_RESET causes a transition to - * the state STATE_DEFAULT. - */ - udc_enable(device); -} - -/* Initialize h/w stuff */ -int udc_init(void) -{ - udc_device = NULL; - usbdbg("PXA27x usbd start"); - - /* Enable clock for USB device */ - writel(readl(CKEN) | CKEN11_USB, CKEN); - - /* Disable the UDC */ - udc_clear_mask_UDCCR(UDCCR_UDE); - - /* Disable IRQs: we don't use them */ - writel(0, UDCICR0); - writel(0, UDCICR1); - - return 0; -} diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 63d8dbe3c85..7019b263963 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -36,7 +36,6 @@ obj-$(CONFIG_LG4573) += lg4573.o obj-$(CONFIG_LOGICORE_DP_TX) += logicore_dp_tx.o obj-$(CONFIG_NXP_TDA19988) += tda19988.o obj-$(CONFIG_OSD) += video_osd-uclass.o -obj-$(CONFIG_PXA_LCD) += pxa_lcd.o obj-$(CONFIG_SANDBOX_OSD) += sandbox_osd.o obj-$(CONFIG_SCF0403_LCD) += scf0403_lcd.o obj-$(CONFIG_VIDEO_ARM_MALIDP) += mali_dp.o diff --git a/drivers/video/pxa_lcd.c b/drivers/video/pxa_lcd.c deleted file mode 100644 index 21ade8d93c4..00000000000 --- a/drivers/video/pxa_lcd.c +++ /dev/null @@ -1,549 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * PXA LCD Controller - * - * (C) Copyright 2001-2002 - * Wolfgang Denk, DENX Software Engineering -- wd@denx.de - */ - -/************************************************************************/ -/* ** HEADER FILES */ -/************************************************************************/ - -#include -#include -#include -#include -#include -#include -#include -#include - -/* #define DEBUG */ - -#ifdef CONFIG_LCD - -/*----------------------------------------------------------------------*/ -/* - * Define panel bpp, LCCR0, LCCR3 and panel_info video struct for - * your display. - */ - -#ifdef CONFIG_PXA_VGA -/* LCD outputs connected to a video DAC */ -# define LCD_BPP LCD_COLOR8 - -/* you have to set lccr0 and lccr3 (including pcd) */ -# define REG_LCCR0 0x003008f8 -# define REG_LCCR3 0x0300FF01 - -/* 640x480x16 @ 61 Hz */ -vidinfo_t panel_info = { - .vl_col = 640, - .vl_row = 480, - .vl_width = 640, - .vl_height = 480, - .vl_clkp = CONFIG_SYS_HIGH, - .vl_oep = CONFIG_SYS_HIGH, - .vl_hsp = CONFIG_SYS_HIGH, - .vl_vsp = CONFIG_SYS_HIGH, - .vl_dp = CONFIG_SYS_HIGH, - .vl_bpix = LCD_BPP, - .vl_lbw = 0, - .vl_splt = 0, - .vl_clor = 0, - .vl_tft = 1, - .vl_hpw = 40, - .vl_blw = 56, - .vl_elw = 56, - .vl_vpw = 20, - .vl_bfw = 8, - .vl_efw = 8, -}; -#endif /* CONFIG_PXA_VIDEO */ - -/*----------------------------------------------------------------------*/ -#ifdef CONFIG_SHARP_LM8V31 - -# define LCD_BPP LCD_COLOR8 -# define LCD_INVERT_COLORS /* Needed for colors to be correct, but why? */ - -/* you have to set lccr0 and lccr3 (including pcd) */ -# define REG_LCCR0 0x0030087C -# define REG_LCCR3 0x0340FF08 - -vidinfo_t panel_info = { - .vl_col = 640, - .vl_row = 480, - .vl_width = 157, - .vl_height = 118, - .vl_clkp = CONFIG_SYS_HIGH, - .vl_oep = CONFIG_SYS_HIGH, - .vl_hsp = CONFIG_SYS_HIGH, - .vl_vsp = CONFIG_SYS_HIGH, - .vl_dp = CONFIG_SYS_HIGH, - .vl_bpix = LCD_BPP, - .vl_lbw = 0, - .vl_splt = 1, - .vl_clor = 1, - .vl_tft = 0, - .vl_hpw = 1, - .vl_blw = 3, - .vl_elw = 3, - .vl_vpw = 1, - .vl_bfw = 0, - .vl_efw = 0, -}; -#endif /* CONFIG_SHARP_LM8V31 */ -/*----------------------------------------------------------------------*/ -#ifdef CONFIG_VOIPAC_LCD - -# define LCD_BPP LCD_COLOR8 -# define LCD_INVERT_COLORS - -/* you have to set lccr0 and lccr3 (including pcd) */ -# define REG_LCCR0 0x043008f8 -# define REG_LCCR3 0x0340FF08 - -vidinfo_t panel_info = { - .vl_col = 640, - .vl_row = 480, - .vl_width = 157, - .vl_height = 118, - .vl_clkp = CONFIG_SYS_HIGH, - .vl_oep = CONFIG_SYS_HIGH, - .vl_hsp = CONFIG_SYS_HIGH, - .vl_vsp = CONFIG_SYS_HIGH, - .vl_dp = CONFIG_SYS_HIGH, - .vl_bpix = LCD_BPP, - .vl_lbw = 0, - .vl_splt = 1, - .vl_clor = 1, - .vl_tft = 1, - .vl_hpw = 32, - .vl_blw = 144, - .vl_elw = 32, - .vl_vpw = 2, - .vl_bfw = 13, - .vl_efw = 30, -}; -#endif /* CONFIG_VOIPAC_LCD */ - -/*----------------------------------------------------------------------*/ -#ifdef CONFIG_HITACHI_SX14 -/* Hitachi SX14Q004-ZZA color STN LCD */ -#define LCD_BPP LCD_COLOR8 - -/* you have to set lccr0 and lccr3 (including pcd) */ -#define REG_LCCR0 0x00301079 -#define REG_LCCR3 0x0340FF20 - -vidinfo_t panel_info = { - .vl_col = 320, - .vl_row = 240, - .vl_width = 167, - .vl_height = 109, - .vl_clkp = CONFIG_SYS_HIGH, - .vl_oep = CONFIG_SYS_HIGH, - .vl_hsp = CONFIG_SYS_HIGH, - .vl_vsp = CONFIG_SYS_HIGH, - .vl_dp = CONFIG_SYS_HIGH, - .vl_bpix = LCD_BPP, - .vl_lbw = 1, - .vl_splt = 0, - .vl_clor = 1, - .vl_tft = 0, - .vl_hpw = 1, - .vl_blw = 1, - .vl_elw = 1, - .vl_vpw = 7, - .vl_bfw = 0, - .vl_efw = 0, -}; -#endif /* CONFIG_HITACHI_SX14 */ - -/*----------------------------------------------------------------------*/ -#ifdef CONFIG_LMS283GF05 - -# define LCD_BPP LCD_COLOR8 -/*# define LCD_INVERT_COLORS*/ - -/* you have to set lccr0 and lccr3 (including pcd) */ -# define REG_LCCR0 0x043008f8 -# define REG_LCCR3 0x03b00009 - -vidinfo_t panel_info = { - .vl_col = 240, - .vl_row = 320, - .vl_rot = 3, - .vl_width = 240, - .vl_height = 320, - .vl_clkp = CONFIG_SYS_HIGH, - .vl_oep = CONFIG_SYS_LOW, - .vl_hsp = CONFIG_SYS_LOW, - .vl_vsp = CONFIG_SYS_LOW, - .vl_dp = CONFIG_SYS_HIGH, - .vl_bpix = LCD_BPP, - .vl_lbw = 0, - .vl_splt = 1, - .vl_clor = 1, - .vl_tft = 1, - .vl_hpw = 4, - .vl_blw = 4, - .vl_elw = 8, - .vl_vpw = 4, - .vl_bfw = 4, - .vl_efw = 8, -}; -#endif /* CONFIG_LMS283GF05 */ - -/*----------------------------------------------------------------------*/ - -#ifdef CONFIG_LQ038J7DH53 - -# define LCD_BPP LCD_COLOR8 - -/* you have to set lccr0 and lccr3 (including pcd) */ -# define REG_LCCR0 0x003008f9 -# define REG_LCCR3 0x03700004 - -vidinfo_t panel_info = { - .vl_col = 320, - .vl_row = 480, - .vl_width = 320, - .vl_height = 480, - .vl_clkp = CONFIG_SYS_HIGH, - .vl_oep = CONFIG_SYS_LOW, - .vl_hsp = CONFIG_SYS_LOW, - .vl_vsp = CONFIG_SYS_LOW, - .vl_dp = CONFIG_SYS_HIGH, - .vl_bpix = LCD_BPP, - .vl_lbw = 0, - .vl_splt = 1, - .vl_clor = 1, - .vl_tft = 1, - .vl_hpw = 0x04, - .vl_blw = 0x20, - .vl_elw = 0x01, - .vl_vpw = 0x01, - .vl_bfw = 0x04, - .vl_efw = 0x01, -}; -#endif /* CONFIG_LQ038J7DH53 */ - -/*----------------------------------------------------------------------*/ - -#ifdef CONFIG_LITTLETON_LCD -# define LCD_BPP LCD_COLOR8 - -/* you have to set lccr0 and lccr3 (including pcd) */ -# define REG_LCCR0 0x003008f8 -# define REG_LCCR3 0x0300FF04 - -vidinfo_t panel_info = { - .vl_col = 480, - .vl_row = 640, - .vl_width = 480, - .vl_height = 640, - .vl_clkp = CONFIG_SYS_HIGH, - .vl_oep = CONFIG_SYS_HIGH, - .vl_hsp = CONFIG_SYS_HIGH, - .vl_vsp = CONFIG_SYS_HIGH, - .vl_dp = CONFIG_SYS_HIGH, - .vl_bpix = LCD_BPP, - .vl_lbw = 0, - .vl_splt = 0, - .vl_clor = 0, - .vl_tft = 1, - .vl_hpw = 9, - .vl_blw = 8, - .vl_elw = 24, - .vl_vpw = 2, - .vl_bfw = 2, - .vl_efw = 4, -}; -#endif /* CONFIG_LITTLETON_LCD */ - -/*----------------------------------------------------------------------*/ - -static int pxafb_init_mem (void *lcdbase, vidinfo_t *vid); -static void pxafb_setup_gpio (vidinfo_t *vid); -static void pxafb_enable_controller (vidinfo_t *vid); -static int pxafb_init (vidinfo_t *vid); - -/************************************************************************/ -/* --------------- PXA chipset specific functions ------------------- */ -/************************************************************************/ - -ushort *configuration_get_cmap(void) -{ - struct pxafb_info *fbi = &panel_info.pxa; - return (ushort *)fbi->palette; -} - -void lcd_ctrl_init (void *lcdbase) -{ - pxafb_init_mem(lcdbase, &panel_info); - pxafb_init(&panel_info); - pxafb_setup_gpio(&panel_info); - pxafb_enable_controller(&panel_info); -} - -/*----------------------------------------------------------------------*/ -#if LCD_BPP == LCD_COLOR8 -void -lcd_setcolreg (ushort regno, ushort red, ushort green, ushort blue) -{ - struct pxafb_info *fbi = &panel_info.pxa; - unsigned short *palette = (unsigned short *)fbi->palette; - u_int val; - - if (regno < fbi->palette_size) { - val = ((red << 8) & 0xf800); - val |= ((green << 4) & 0x07e0); - val |= (blue & 0x001f); - -#ifdef LCD_INVERT_COLORS - palette[regno] = ~val; -#else - palette[regno] = val; -#endif - } - - debug ("setcolreg: reg %2d @ %p: R=%02X G=%02X B=%02X => %04X\n", - regno, &palette[regno], - red, green, blue, - palette[regno]); -} -#endif /* LCD_COLOR8 */ - -/*----------------------------------------------------------------------*/ -__weak void lcd_enable(void) -{ -} - -/************************************************************************/ -/* ** PXA255 specific routines */ -/************************************************************************/ - -/* - * Calculate fb size for VIDEOLFB_ATAG. Size returned contains fb, - * descriptors and palette areas. - */ -ulong calc_fbsize (void) -{ - ulong size; - int line_length = (panel_info.vl_col * NBITS (panel_info.vl_bpix)) / 8; - - size = line_length * panel_info.vl_row; - size += PAGE_SIZE; - - return size; -} - -static int pxafb_init_mem (void *lcdbase, vidinfo_t *vid) -{ - u_long palette_mem_size; - struct pxafb_info *fbi = &vid->pxa; - int fb_size = vid->vl_row * (vid->vl_col * NBITS (vid->vl_bpix)) / 8; - - fbi->screen = (u_long)lcdbase; - - fbi->palette_size = NBITS(vid->vl_bpix) == 8 ? 256 : 16; - palette_mem_size = fbi->palette_size * sizeof(u16); - - debug("palette_mem_size = 0x%08lx\n", (u_long) palette_mem_size); - /* locate palette and descs at end of page following fb */ - fbi->palette = (u_long)lcdbase + fb_size + PAGE_SIZE - palette_mem_size; - - return 0; -} -#ifdef CONFIG_CPU_MONAHANS -static inline void pxafb_setup_gpio (vidinfo_t *vid) {} -#else -static void pxafb_setup_gpio (vidinfo_t *vid) -{ - u_long lccr0; - - /* - * setup is based on type of panel supported - */ - - lccr0 = vid->pxa.reg_lccr0; - - /* 4 bit interface */ - if ((lccr0 & LCCR0_CMS) && (lccr0 & LCCR0_SDS) && !(lccr0 & LCCR0_DPD)) - { - debug("Setting GPIO for 4 bit data\n"); - /* bits 58-61 */ - writel(readl(GPDR1) | (0xf << 26), GPDR1); - writel((readl(GAFR1_U) & ~(0xff << 20)) | (0xaa << 20), - GAFR1_U); - - /* bits 74-77 */ - writel(readl(GPDR2) | (0xf << 10), GPDR2); - writel((readl(GAFR2_L) & ~(0xff << 20)) | (0xaa << 20), - GAFR2_L); - } - - /* 8 bit interface */ - else if (((lccr0 & LCCR0_CMS) && ((lccr0 & LCCR0_SDS) || (lccr0 & LCCR0_DPD))) || - (!(lccr0 & LCCR0_CMS) && !(lccr0 & LCCR0_PAS) && !(lccr0 & LCCR0_SDS))) - { - debug("Setting GPIO for 8 bit data\n"); - /* bits 58-65 */ - writel(readl(GPDR1) | (0x3f << 26), GPDR1); - writel(readl(GPDR2) | (0x3), GPDR2); - - writel((readl(GAFR1_U) & ~(0xfff << 20)) | (0xaaa << 20), - GAFR1_U); - writel((readl(GAFR2_L) & ~0xf) | (0xa), GAFR2_L); - - /* bits 74-77 */ - writel(readl(GPDR2) | (0xf << 10), GPDR2); - writel((readl(GAFR2_L) & ~(0xff << 20)) | (0xaa << 20), - GAFR2_L); - } - - /* 16 bit interface */ - else if (!(lccr0 & LCCR0_CMS) && ((lccr0 & LCCR0_SDS) || (lccr0 & LCCR0_PAS))) - { - debug("Setting GPIO for 16 bit data\n"); - /* bits 58-77 */ - writel(readl(GPDR1) | (0x3f << 26), GPDR1); - writel(readl(GPDR2) | 0x00003fff, GPDR2); - - writel((readl(GAFR1_U) & ~(0xfff << 20)) | (0xaaa << 20), - GAFR1_U); - writel((readl(GAFR2_L) & 0xf0000000) | 0x0aaaaaaa, GAFR2_L); - } - else - { - printf("pxafb_setup_gpio: unable to determine bits per pixel\n"); - } -} -#endif - -static void pxafb_enable_controller (vidinfo_t *vid) -{ - debug("Enabling LCD controller\n"); - - /* Sequence from 11.7.10 */ - writel(vid->pxa.reg_lccr3, LCCR3); - writel(vid->pxa.reg_lccr2, LCCR2); - writel(vid->pxa.reg_lccr1, LCCR1); - writel(vid->pxa.reg_lccr0 & ~LCCR0_ENB, LCCR0); - writel(vid->pxa.fdadr0, FDADR0); - writel(vid->pxa.fdadr1, FDADR1); - writel(readl(LCCR0) | LCCR0_ENB, LCCR0); - -#ifdef CONFIG_CPU_MONAHANS - writel(readl(CKENA) | CKENA_1_LCD, CKENA); -#else - writel(readl(CKEN) | CKEN16_LCD, CKEN); -#endif - - debug("FDADR0 = 0x%08x\n", readl(FDADR0)); - debug("FDADR1 = 0x%08x\n", readl(FDADR1)); - debug("LCCR0 = 0x%08x\n", readl(LCCR0)); - debug("LCCR1 = 0x%08x\n", readl(LCCR1)); - debug("LCCR2 = 0x%08x\n", readl(LCCR2)); - debug("LCCR3 = 0x%08x\n", readl(LCCR3)); -} - -static int pxafb_init (vidinfo_t *vid) -{ - struct pxafb_info *fbi = &vid->pxa; - - debug("Configuring PXA LCD\n"); - - fbi->reg_lccr0 = REG_LCCR0; - fbi->reg_lccr3 = REG_LCCR3; - - debug("vid: vl_col=%d hslen=%d lm=%d rm=%d\n", - vid->vl_col, vid->vl_hpw, - vid->vl_blw, vid->vl_elw); - debug("vid: vl_row=%d vslen=%d um=%d bm=%d\n", - vid->vl_row, vid->vl_vpw, - vid->vl_bfw, vid->vl_efw); - - fbi->reg_lccr1 = - LCCR1_DisWdth(vid->vl_col) + - LCCR1_HorSnchWdth(vid->vl_hpw) + - LCCR1_BegLnDel(vid->vl_blw) + - LCCR1_EndLnDel(vid->vl_elw); - - fbi->reg_lccr2 = - LCCR2_DisHght(vid->vl_row) + - LCCR2_VrtSnchWdth(vid->vl_vpw) + - LCCR2_BegFrmDel(vid->vl_bfw) + - LCCR2_EndFrmDel(vid->vl_efw); - - fbi->reg_lccr3 = REG_LCCR3 & ~(LCCR3_HSP | LCCR3_VSP); - fbi->reg_lccr3 |= (vid->vl_hsp ? LCCR3_HorSnchL : LCCR3_HorSnchH) - | (vid->vl_vsp ? LCCR3_VrtSnchL : LCCR3_VrtSnchH); - - - /* setup dma descriptors */ - fbi->dmadesc_fblow = (struct pxafb_dma_descriptor *)((unsigned int)fbi->palette - 3*16); - fbi->dmadesc_fbhigh = (struct pxafb_dma_descriptor *)((unsigned int)fbi->palette - 2*16); - fbi->dmadesc_palette = (struct pxafb_dma_descriptor *)((unsigned int)fbi->palette - 1*16); - - #define BYTES_PER_PANEL ((fbi->reg_lccr0 & LCCR0_SDS) ? \ - (vid->vl_col * vid->vl_row * NBITS(vid->vl_bpix) / 8 / 2) : \ - (vid->vl_col * vid->vl_row * NBITS(vid->vl_bpix) / 8)) - - /* populate descriptors */ - fbi->dmadesc_fblow->fdadr = (u_long)fbi->dmadesc_fblow; - fbi->dmadesc_fblow->fsadr = fbi->screen + BYTES_PER_PANEL; - fbi->dmadesc_fblow->fidr = 0; - fbi->dmadesc_fblow->ldcmd = BYTES_PER_PANEL; - - fbi->fdadr1 = (u_long)fbi->dmadesc_fblow; /* only used in dual-panel mode */ - - fbi->dmadesc_fbhigh->fsadr = fbi->screen; - fbi->dmadesc_fbhigh->fidr = 0; - fbi->dmadesc_fbhigh->ldcmd = BYTES_PER_PANEL; - - fbi->dmadesc_palette->fsadr = fbi->palette; - fbi->dmadesc_palette->fidr = 0; - fbi->dmadesc_palette->ldcmd = (fbi->palette_size * 2) | LDCMD_PAL; - - if( NBITS(vid->vl_bpix) < 12) - { - /* assume any mode with <12 bpp is palette driven */ - fbi->dmadesc_palette->fdadr = (u_long)fbi->dmadesc_fbhigh; - fbi->dmadesc_fbhigh->fdadr = (u_long)fbi->dmadesc_palette; - /* flips back and forth between pal and fbhigh */ - fbi->fdadr0 = (u_long)fbi->dmadesc_palette; - } - else - { - /* palette shouldn't be loaded in true-color mode */ - fbi->dmadesc_fbhigh->fdadr = (u_long)fbi->dmadesc_fbhigh; - fbi->fdadr0 = (u_long)fbi->dmadesc_fbhigh; /* no pal just fbhigh */ - } - - debug("fbi->dmadesc_fblow = 0x%lx\n", (u_long)fbi->dmadesc_fblow); - debug("fbi->dmadesc_fbhigh = 0x%lx\n", (u_long)fbi->dmadesc_fbhigh); - debug("fbi->dmadesc_palette = 0x%lx\n", (u_long)fbi->dmadesc_palette); - - debug("fbi->dmadesc_fblow->fdadr = 0x%lx\n", fbi->dmadesc_fblow->fdadr); - debug("fbi->dmadesc_fbhigh->fdadr = 0x%lx\n", fbi->dmadesc_fbhigh->fdadr); - debug("fbi->dmadesc_palette->fdadr = 0x%lx\n", fbi->dmadesc_palette->fdadr); - - debug("fbi->dmadesc_fblow->fsadr = 0x%lx\n", fbi->dmadesc_fblow->fsadr); - debug("fbi->dmadesc_fbhigh->fsadr = 0x%lx\n", fbi->dmadesc_fbhigh->fsadr); - debug("fbi->dmadesc_palette->fsadr = 0x%lx\n", fbi->dmadesc_palette->fsadr); - - debug("fbi->dmadesc_fblow->ldcmd = 0x%lx\n", fbi->dmadesc_fblow->ldcmd); - debug("fbi->dmadesc_fbhigh->ldcmd = 0x%lx\n", fbi->dmadesc_fbhigh->ldcmd); - debug("fbi->dmadesc_palette->ldcmd = 0x%lx\n", fbi->dmadesc_palette->ldcmd); - - return 0; -} - -/************************************************************************/ -/************************************************************************/ - -#endif /* CONFIG_LCD */ diff --git a/include/dm/platform_data/pxa_mmc_gen.h b/include/dm/platform_data/pxa_mmc_gen.h deleted file mode 100644 index d15c1551f46..00000000000 --- a/include/dm/platform_data/pxa_mmc_gen.h +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (c) 2019 Marcel Ziswiler - */ - -#ifndef __PXA_MMC_GEN_H -#define __PXA_MMC_GEN_H - -#include - -/* - * struct pxa_mmc_plat - information about a PXA MMC controller - * - * @base: MMC controller base register address - */ -struct pxa_mmc_plat { - struct mmc_config cfg; - struct mmc mmc; - struct pxa_mmc_regs *base; -}; - -#endif /* __PXA_MMC_GEN_H */ diff --git a/include/dm/platform_data/serial_pxa.h b/include/dm/platform_data/serial_pxa.h deleted file mode 100644 index e1a02aed28e..00000000000 --- a/include/dm/platform_data/serial_pxa.h +++ /dev/null @@ -1,40 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (c) 2016 Marcel Ziswiler - */ - -#ifndef __SERIAL_PXA_H -#define __SERIAL_PXA_H - -/* - * The numbering scheme differs here for PXA25x, PXA27x and PXA3xx so we can - * easily handle enabling of clock. - */ -#ifdef CONFIG_CPU_MONAHANS -#define UART_CLK_BASE CKENA_21_BTUART -#define UART_CLK_REG CKENA -#define BTUART_INDEX 0 -#define FFUART_INDEX 1 -#define STUART_INDEX 2 -#else /* PXA27x */ -#define UART_CLK_BASE CKEN5_STUART -#define UART_CLK_REG CKEN -#define STUART_INDEX 0 -#define FFUART_INDEX 1 -#define BTUART_INDEX 2 -#endif - -/* - * struct pxa_serial_plat - information about a PXA port - * - * @base: Uart port base register address - * @port: Uart port index, for cpu with pinmux for uart / gpio - * baudrtatre: Uart port baudrate - */ -struct pxa_serial_plat { - struct pxa_uart_regs *base; - int port; - int baudrate; -}; - -#endif /* __SERIAL_PXA_H */ diff --git a/include/lcd.h b/include/lcd.h index 7570e7ac609..4f180692781 100644 --- a/include/lcd.h +++ b/include/lcd.h @@ -40,9 +40,7 @@ ulong lcd_setmem(ulong addr); */ void lcd_set_flush_dcache(int flush); -#if defined(CONFIG_CPU_PXA27X) || defined CONFIG_CPU_MONAHANS -#include -#elif defined(CONFIG_ATMEL_LCD) || defined(CONFIG_ATMEL_HLCD) +#if defined(CONFIG_ATMEL_LCD) || defined(CONFIG_ATMEL_HLCD) #include #elif defined(CONFIG_EXYNOS_FB) #include diff --git a/include/pxa_lcd.h b/include/pxa_lcd.h deleted file mode 100644 index 11a22abca6d..00000000000 --- a/include/pxa_lcd.h +++ /dev/null @@ -1,80 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * pxa_lcd.h - PXA LCD Controller structures - * - * (C) Copyright 2001 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - */ - -#ifndef _PXA_LCD_H_ -#define _PXA_LCD_H_ - -/* - * PXA LCD DMA descriptor - */ -struct pxafb_dma_descriptor { - u_long fdadr; /* Frame descriptor address register */ - u_long fsadr; /* Frame source address register */ - u_long fidr; /* Frame ID register */ - u_long ldcmd; /* Command register */ -}; - -/* - * PXA LCD info - */ -struct pxafb_info { - /* Misc registers */ - u_long reg_lccr3; - u_long reg_lccr2; - u_long reg_lccr1; - u_long reg_lccr0; - u_long fdadr0; - u_long fdadr1; - - /* DMA descriptors */ - struct pxafb_dma_descriptor *dmadesc_fblow; - struct pxafb_dma_descriptor *dmadesc_fbhigh; - struct pxafb_dma_descriptor *dmadesc_palette; - - u_long screen; /* physical address of frame buffer */ - u_long palette; /* physical address of palette memory */ - u_int palette_size; -}; - -/* - * LCD controller stucture for PXA CPU - */ -typedef struct vidinfo { - ushort vl_col; /* Number of columns (i.e. 640) */ - ushort vl_row; /* Number of rows (i.e. 480) */ - ushort vl_rot; /* Rotation of Display (0, 1, 2, 3) */ - ushort vl_width; /* Width of display area in millimeters */ - ushort vl_height; /* Height of display area in millimeters */ - - /* LCD configuration register */ - u_char vl_clkp; /* Clock polarity */ - u_char vl_oep; /* Output Enable polarity */ - u_char vl_hsp; /* Horizontal Sync polarity */ - u_char vl_vsp; /* Vertical Sync polarity */ - u_char vl_dp; /* Data polarity */ - u_char vl_bpix;/* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */ - u_char vl_lbw; /* LCD Bus width, 0 = 4, 1 = 8 */ - u_char vl_splt;/* Split display, 0 = single-scan, 1 = dual-scan */ - u_char vl_clor; /* Color, 0 = mono, 1 = color */ - u_char vl_tft; /* 0 = passive, 1 = TFT */ - - /* Horizontal control register. Timing from data sheet */ - ushort vl_hpw; /* Horz sync pulse width */ - u_char vl_blw; /* Wait before of line */ - u_char vl_elw; /* Wait end of line */ - - /* Vertical control register. */ - u_char vl_vpw; /* Vertical sync pulse width */ - u_char vl_bfw; /* Wait before of frame */ - u_char vl_efw; /* Wait end of frame */ - - /* PXA LCD controller params */ - struct pxafb_info pxa; -} vidinfo_t; - -#endif diff --git a/include/usb/pxa27x_udc.h b/include/usb/pxa27x_udc.h deleted file mode 100644 index 07d14821c31..00000000000 --- a/include/usb/pxa27x_udc.h +++ /dev/null @@ -1,31 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * PXA27x register declarations and HCD data structures - * - * Copyright (C) 2007 Rodolfo Giometti - * Copyright (C) 2007 Eurotech S.p.A. - */ - - -#ifndef __PXA270X_UDC_H__ -#define __PXA270X_UDC_H__ - -#include - -/* Endpoint 0 states */ -#define EP0_IDLE 0 -#define EP0_IN_DATA 1 -#define EP0_OUT_DATA 2 -#define EP0_XFER_COMPLETE 3 - - -/* Endpoint parameters */ -#define MAX_ENDPOINTS 4 - -#define EP0_MAX_PACKET_SIZE 16 - -#define UDC_OUT_ENDPOINT 0x02 -#define UDC_IN_ENDPOINT 0x01 -#define UDC_INT_ENDPOINT 0x05 - -#endif -- GitLab From 3dab405b45e5089d42f59d01e3803fab8ac56fcf Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 25 Jun 2022 11:02:43 -0400 Subject: [PATCH 554/581] Convert CONFIG_SYS_BOOK3E_HV to Kconfig This converts the following to Kconfig: CONFIG_SYS_BOOK3E_HV Signed-off-by: Tom Rini --- arch/powerpc/cpu/mpc85xx/Kconfig | 4 ++++ configs/P2041RDB_NAND_defconfig | 1 + configs/P2041RDB_SDCARD_defconfig | 1 + configs/P2041RDB_SPIFLASH_defconfig | 1 + configs/P2041RDB_defconfig | 1 + configs/P3041DS_NAND_defconfig | 1 + configs/P3041DS_SDCARD_defconfig | 1 + configs/P3041DS_SPIFLASH_defconfig | 1 + configs/P3041DS_defconfig | 1 + configs/P4080DS_SDCARD_defconfig | 1 + configs/P4080DS_SPIFLASH_defconfig | 1 + configs/P4080DS_defconfig | 1 + configs/P5040DS_NAND_defconfig | 1 + configs/P5040DS_SDCARD_defconfig | 1 + configs/P5040DS_SPIFLASH_defconfig | 1 + configs/P5040DS_defconfig | 1 + configs/T1024RDB_NAND_defconfig | 1 + configs/T1024RDB_SDCARD_defconfig | 1 + configs/T1024RDB_SPIFLASH_defconfig | 1 + configs/T1024RDB_defconfig | 1 + configs/T1042D4RDB_NAND_defconfig | 1 + configs/T1042D4RDB_SDCARD_defconfig | 1 + configs/T1042D4RDB_SPIFLASH_defconfig | 1 + configs/T1042D4RDB_defconfig | 1 + configs/T2080QDS_NAND_defconfig | 1 + configs/T2080QDS_SDCARD_defconfig | 1 + configs/T2080QDS_SECURE_BOOT_defconfig | 1 + configs/T2080QDS_SPIFLASH_defconfig | 1 + configs/T2080QDS_SRIO_PCIE_BOOT_defconfig | 1 + configs/T2080QDS_defconfig | 1 + configs/T2080RDB_NAND_defconfig | 1 + configs/T2080RDB_SDCARD_defconfig | 1 + configs/T2080RDB_SPIFLASH_defconfig | 1 + configs/T2080RDB_defconfig | 4 +--- configs/T2080RDB_revD_NAND_defconfig | 1 + configs/T2080RDB_revD_SDCARD_defconfig | 1 + configs/T2080RDB_revD_SPIFLASH_defconfig | 1 + configs/T2080RDB_revD_defconfig | 1 + configs/T4240RDB_SDCARD_defconfig | 1 + configs/T4240RDB_defconfig | 4 +--- configs/kmcent2_defconfig | 1 + include/configs/P2041RDB.h | 1 - include/configs/T102xRDB.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240RDB.h | 1 - include/configs/corenet_ds.h | 1 - include/configs/kmcent2.h | 1 - 49 files changed, 44 insertions(+), 14 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index e7003d3b647..f4f5ebfe0c4 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -1216,6 +1216,10 @@ config SYS_FSL_LBC_CLK_DIV config ENABLE_36BIT_PHYS bool "Enable 36bit physical address space support" +config SYS_BOOK3E_HV + bool "Category E.HV is supported" + depends on BOOKE + config SYS_MPC85XX_NO_RESETVEC bool "Discard resetvec section and move bootpg section up" depends on MPC85xx diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index 5063470d854..459b9e6c544 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index a64f8924dd2..6ff6a428306 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index f295174da52..a5872faa474 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index e3dd1e93e32..247db8e0fef 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index 3e4cb5180ea..91ad3ee3051 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index 66eb6c3f3d9..6ca91fe77ed 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index 87c62be04f8..13857b8208f 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index d083c256b08..b587d525a26 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index ed6f3de96ec..c88a869bc8f 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index e77085ae3e2..a627475420f 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index 91aa75d9e1c..82371ea9897 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index 3a48362c3b5..be3d388484f 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index 9aa293dc229..4dcdb391e40 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index 6f0d51a7abf..7620f4879a7 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index ae5f7b7ba34..68573a5c982 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index ad33aa8fe23..d10799f83cf 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index 06bb7b79534..22c404e27c2 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index f88fb381a25..2f1e9ca46ef 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index a0908ac83a7..5c30e9fe376 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index bb32ddf8c14..00ea2175a77 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index 932a4e1507d..c738e9c4133 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 0c4e339da79..bc38fa68b2f 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig index 44458015c24..af7df9ee91c 100644 --- a/configs/T1042D4RDB_defconfig +++ b/configs/T1042D4RDB_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 05e46e6cacd..e7ce3631e0a 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y <<<<<<< HEAD diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index 1818762ded9..a2a2c589d7c 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y <<<<<<< HEAD ======= diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index 30d1b85a009..4f35dbd945f 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -6,6 +6,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_NXP_ESBC=y CONFIG_BOOTSCRIPT_HDR_ADDR=0xee020000 CONFIG_PCIE1=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 73c50b9245a..b02939f679c 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -22,6 +22,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y <<<<<<< HEAD ======= diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig index 48ef69cbbb7..6caffde6d4e 100644 --- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SRIO_PCIE_BOOT_SLAVE=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index a94fd3f42e3..4ec70d678c0 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index 6566226abc8..f382288ebbb 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y <<<<<<< HEAD diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index 3333ac145ad..5837b3d26da 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y <<<<<<< HEAD ======= diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index 5812daad55c..ab191c702f1 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y <<<<<<< HEAD ======= diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index 563d0b5f315..fff8a26b323 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -12,8 +12,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y -<<<<<<< HEAD -======= +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -22,7 +21,6 @@ CONFIG_VID=y CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv" CONFIG_VOL_MONITOR_IR36021_READ=y CONFIG_VOL_MONITOR_IR36021_SET=y ->>>>>>> Convert CONFIG_PCIE1 et al to Kconfig CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index 98443438a94..c5ab7af3351 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index 004f67703ff..83f47250094 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y <<<<<<< HEAD diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index 610f3f89693..0c5365217ee 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y <<<<<<< HEAD diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig index ca6a741fef4..66a9d5dcadb 100644 --- a/configs/T2080RDB_revD_defconfig +++ b/configs/T2080RDB_revD_defconfig @@ -12,6 +12,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_T2080RDB_REV_D=y <<<<<<< HEAD ======= diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index 3e43f9bb98f..639cb80e8e9 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y <<<<<<< HEAD ======= diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index 9f6457fc3a3..6f403619d67 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -12,8 +12,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T4240RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y -<<<<<<< HEAD -======= +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -22,7 +21,6 @@ CONFIG_VID=y CONFIG_VID_FLS_ENV="t4240rdb_vdd_mv" CONFIG_VOL_MONITOR_IR36021_READ=y CONFIG_VOL_MONITOR_IR36021_SET=y ->>>>>>> Convert CONFIG_PCIE1 et al to Kconfig CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig index cd6fb9675b0..38d33c20dc9 100644 --- a/configs/kmcent2_defconfig +++ b/configs/kmcent2_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_KMCENT2=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y # CONFIG_DEEP_SLEEP is not set CONFIG_PCIE1=y CONFIG_KM_DEF_NETDEV="eth2" diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index e019c168434..2dc7da62160 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -25,7 +25,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #ifndef CONFIG_RESET_VECTOR_ADDRESS #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index a519b5a9355..159002d1ed8 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -14,7 +14,6 @@ #include /* High Level Configuration Options */ -#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 3a7c643cfc9..25d82db0f8e 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -53,7 +53,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #ifndef CONFIG_RESET_VECTOR_ADDRESS #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index eff22c18bb7..969e7f728fe 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -21,7 +21,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index ba9bfdd72f7..098125989e9 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -16,7 +16,6 @@ #define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ /* High Level Configuration Options */ -#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 12b479f9c77..6ec3c6a8c03 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -34,7 +34,6 @@ #endif /* CONFIG_RAMBOOT_PBL */ /* High Level Configuration Options */ -#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #ifndef CONFIG_RESET_VECTOR_ADDRESS #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 2252bf89543..d8ad4568816 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -28,7 +28,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #ifndef CONFIG_RESET_VECTOR_ADDRESS #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index ed24733abf5..eafdc35c27b 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -133,7 +133,6 @@ #define KM_I2C_DEBLOCK_SDA 21 /* High Level Configuration Options */ -#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ #define CONFIG_RESET_VECTOR_ADDRESS 0xebfffffc -- GitLab From 5a4461867cee452f7e2e23d2afc29f34f659f67b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 25 Jun 2022 11:02:44 -0400 Subject: [PATCH 555/581] Convert CONFIG_SYS_RAMBOOT to Kconfig This converts the following to Kconfig: CONFIG_SYS_RAMBOOT Signed-off-by: Tom Rini --- arch/powerpc/cpu/mpc85xx/Kconfig | 1 + boot/Kconfig | 4 ++++ include/configs/MPC837XERDB.h | 6 ------ include/configs/P1010RDB.h | 6 ------ include/configs/P2041RDB.h | 4 ---- include/configs/T102xRDB.h | 4 ---- include/configs/T104xRDB.h | 4 ---- include/configs/T208xQDS.h | 4 ---- include/configs/T208xRDB.h | 4 ---- include/configs/T4240RDB.h | 4 ---- include/configs/corenet_ds.h | 4 ---- include/configs/km/km-mpc83xx.h | 8 -------- include/configs/p1_p2_rdb_pc.h | 2 -- include/configs/qemu-ppce500.h | 2 -- 14 files changed, 5 insertions(+), 52 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index f4f5ebfe0c4..9c5b1af8b59 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -109,6 +109,7 @@ config TARGET_QEMU_PPCE500 bool "Support qemu-ppce500" select ARCH_QEMU_E500 select PHYS_64BIT + select SYS_RAMBOOT imply OF_HAS_PRIOR_STAGE config TARGET_T1024RDB diff --git a/boot/Kconfig b/boot/Kconfig index ee0dc90e93c..e7a4d538d1c 100644 --- a/boot/Kconfig +++ b/boot/Kconfig @@ -555,8 +555,12 @@ config CHROMEOS_VBOOT distinguishing between booting Chrome OS in a basic way (developer mode) and a full boot. +config SYS_RAMBOOT + bool + config RAMBOOT_PBL bool "Freescale PBL(pre-boot loader) image format support" + select SYS_RAMBOOT if PPC help Some SoCs use PBL to load RCW and/or pre-initialization instructions. For more details refer to doc/README.pblimage diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index fc55e5c2f61..b6621f9a072 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -126,12 +126,6 @@ * The reserved memory */ -#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) -#define CONFIG_SYS_RAMBOOT -#else -#undef CONFIG_SYS_RAMBOOT -#endif - #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */ /* diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index aea744c826c..b5e0e2901f0 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -342,12 +342,6 @@ extern unsigned long get_sdram_size(void); FTIM2_GPCM_TWP(0x1f)) #define CONFIG_SYS_CS3_FTIM3 0x0 -#if defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH) -#define CONFIG_SYS_RAMBOOT -#else -#undef CONFIG_SYS_RAMBOOT -#endif - #define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* stack in RAM */ #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* End of used area in RAM */ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 2dc7da62160..72dd39d2306 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -129,10 +129,6 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Write Timeout (ms) */ -#if defined(CONFIG_RAMBOOT_PBL) -#define CONFIG_SYS_RAMBOOT -#endif - /* Nand Flash */ #ifdef CONFIG_NAND_FSL_ELBC #define CONFIG_SYS_NAND_BASE 0xffa00000 diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 159002d1ed8..a93e9d0b58a 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -287,10 +287,6 @@ #define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3 #endif -#if defined(CONFIG_RAMBOOT_PBL) -#define CONFIG_SYS_RAMBOOT -#endif - #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 25d82db0f8e..365640dffc1 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -259,10 +259,6 @@ #define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3 #endif -#if defined(CONFIG_RAMBOOT_PBL) -#define CONFIG_SYS_RAMBOOT -#endif - #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 969e7f728fe..2faec638e2d 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -267,10 +267,6 @@ #define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3 #endif -#if defined(CONFIG_RAMBOOT_PBL) -#define CONFIG_SYS_RAMBOOT -#endif - #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 098125989e9..5ed9e1badb3 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -226,10 +226,6 @@ #define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3 #endif -#if defined(CONFIG_RAMBOOT_PBL) -#define CONFIG_SYS_RAMBOOT -#endif - #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 6ec3c6a8c03..96e8ff4842b 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -321,10 +321,6 @@ FTIM2_GPCM_TWP(0x1f)) #define CONFIG_SYS_CS3_FTIM3 0x0 -#if defined(CONFIG_RAMBOOT_PBL) -#define CONFIG_SYS_RAMBOOT -#endif - /* I2C */ #define I2C_MUX_PCA_ADDR_PRI 0x77 /* I2C bus multiplexer,primary */ #define I2C_MUX_PCA_ADDR_SEC 0x76 /* I2C bus multiplexer,secondary */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index d8ad4568816..66bd5cb9c0f 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -119,10 +119,6 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#if defined(CONFIG_RAMBOOT_PBL) -#define CONFIG_SYS_RAMBOOT -#endif - /* Nand Flash */ #ifdef CONFIG_NAND_FSL_ELBC #define CONFIG_SYS_NAND_BASE 0xffa00000 diff --git a/include/configs/km/km-mpc83xx.h b/include/configs/km/km-mpc83xx.h index c8929814aaa..9f76f48a5c6 100644 --- a/include/configs/km/km-mpc83xx.h +++ b/include/configs/km/km-mpc83xx.h @@ -25,10 +25,6 @@ */ #define CONFIG_SYS_FLASH_BASE 0xF0000000 -#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) -#define CONFIG_SYS_RAMBOOT -#endif - /* Reserve 768 kB for Mon */ #define CONFIG_SYS_MONITOR_LEN (768 * 1024) @@ -81,10 +77,6 @@ * Environment */ -#ifndef CONFIG_SYS_RAMBOOT -/* Address and size of Redundant Environment Sector */ -#endif /* CFG_SYS_RAMBOOT */ - /* * Environment Configuration */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index f4bf2ab830a..1c234c76a50 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -414,8 +414,6 @@ #ifdef CONFIG_TPL_BUILD #define SPL_ENV_ADDR (CONFIG_SYS_INIT_L2_ADDR + (160 << 10)) #endif -#elif defined(CONFIG_SYS_RAMBOOT) -#define SPL_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000) #endif #define CONFIG_LOADS_ECHO /* echo on for serial download */ diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index 451ae0e1e6d..ce60a3c7421 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -9,8 +9,6 @@ #ifndef __QEMU_PPCE500_H #define __QEMU_PPCE500_H -#define CONFIG_SYS_RAMBOOT - /* Needed to fill the ccsrbar pointer */ /* Virtual address to CCSRBAR */ -- GitLab From f6c1f91761aef72961466c7f15e25148c7f17040 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 25 Jun 2022 11:02:45 -0400 Subject: [PATCH 556/581] Convert CONFIG_SYS_FSL_CPC et al to Kconfig This converts the following to Kconfig: CONFIG_SYS_FSL_CPC CONFIG_SYS_CPC_REINIT_F Signed-off-by: Tom Rini --- README | 4 ---- arch/Kconfig.nxp | 1 + arch/powerpc/cpu/mpc85xx/Kconfig | 9 +++++++++ arch/powerpc/include/asm/fsl_secure_boot.h | 3 --- configs/P2041RDB_NAND_defconfig | 1 + configs/P2041RDB_SDCARD_defconfig | 1 + configs/P2041RDB_SPIFLASH_defconfig | 1 + configs/P2041RDB_defconfig | 1 + configs/P3041DS_NAND_defconfig | 1 + configs/P3041DS_SDCARD_defconfig | 1 + configs/P3041DS_SPIFLASH_defconfig | 1 + configs/P3041DS_defconfig | 1 + configs/P4080DS_SDCARD_defconfig | 1 + configs/P4080DS_SPIFLASH_defconfig | 1 + configs/P4080DS_defconfig | 1 + configs/P5040DS_NAND_defconfig | 1 + configs/P5040DS_SDCARD_defconfig | 1 + configs/P5040DS_SPIFLASH_defconfig | 1 + configs/P5040DS_defconfig | 1 + configs/T1024RDB_NAND_defconfig | 1 + configs/T1024RDB_SDCARD_defconfig | 1 + configs/T1024RDB_SPIFLASH_defconfig | 1 + configs/T1024RDB_defconfig | 1 + configs/T1042D4RDB_NAND_defconfig | 1 + configs/T1042D4RDB_SDCARD_defconfig | 1 + configs/T1042D4RDB_SPIFLASH_defconfig | 1 + configs/T1042D4RDB_defconfig | 1 + configs/T2080QDS_NAND_defconfig | 1 + configs/T2080QDS_SDCARD_defconfig | 1 + configs/T2080QDS_SECURE_BOOT_defconfig | 1 + configs/T2080QDS_SPIFLASH_defconfig | 1 + configs/T2080QDS_SRIO_PCIE_BOOT_defconfig | 1 + configs/T2080QDS_defconfig | 1 + configs/T2080RDB_NAND_defconfig | 1 + configs/T2080RDB_SDCARD_defconfig | 1 + configs/T2080RDB_SPIFLASH_defconfig | 1 + configs/T2080RDB_defconfig | 1 + configs/T2080RDB_revD_NAND_defconfig | 1 + configs/T2080RDB_revD_SDCARD_defconfig | 1 + configs/T2080RDB_revD_SPIFLASH_defconfig | 1 + configs/T2080RDB_revD_defconfig | 1 + configs/T4240RDB_SDCARD_defconfig | 1 + configs/T4240RDB_defconfig | 1 + configs/kmcent2_defconfig | 1 + include/configs/P2041RDB.h | 1 - include/configs/T102xRDB.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240RDB.h | 1 - include/configs/corenet_ds.h | 1 - include/configs/kmcent2.h | 1 - 52 files changed, 50 insertions(+), 15 deletions(-) diff --git a/README b/README index ed8e807c8f3..dae467a4da0 100644 --- a/README +++ b/README @@ -371,10 +371,6 @@ The following options need to be configured: In this mode, a single differential clock is used to supply clocks to the sysclock, ddrclock and usbclock. - CONFIG_SYS_CPC_REINIT_F - This CONFIG is defined when the CPC is configured as SRAM at the - time of U-Boot entry and is required to be re-initialized. - - Generic CPU options: CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN diff --git a/arch/Kconfig.nxp b/arch/Kconfig.nxp index 5971ec5df4e..d3ebbff43be 100644 --- a/arch/Kconfig.nxp +++ b/arch/Kconfig.nxp @@ -16,6 +16,7 @@ config CHAIN_OF_TRUST select SHA_HW_ACCEL select SHA_PROG_HW_ACCEL select ENV_IS_NOWHERE + select SYS_CPC_REINIT_F if MPC85xx && !SYS_RAMBOOT select CMD_EXT4 if ARM select CMD_EXT4_WRITE if ARM imply CMD_BLOB diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 9c5b1af8b59..915e28e1108 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -1221,6 +1221,15 @@ config SYS_BOOK3E_HV bool "Category E.HV is supported" depends on BOOKE +config SYS_CPC_REINIT_F + bool + help + The CPC is configured as SRAM at the time of U-Boot entry and is + required to be re-initialized. + +config SYS_FSL_CPC + bool "Corenet Platform Cache support" + config SYS_MPC85XX_NO_RESETVEC bool "Discard resetvec section and move bootpg section up" depends on MPC85xx diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h index a96a1ac5d77..3e707600f28 100644 --- a/arch/powerpc/include/asm/fsl_secure_boot.h +++ b/arch/powerpc/include/asm/fsl_secure_boot.h @@ -21,9 +21,6 @@ defined(CONFIG_TARGET_T1042D4RDB) || \ defined(CONFIG_TARGET_T1042RDB_PI) || \ defined(CONFIG_ARCH_T1024) -#ifndef CONFIG_SYS_RAMBOOT -#define CONFIG_SYS_CPC_REINIT_F -#endif #undef CONFIG_SYS_INIT_L3_ADDR #define CONFIG_SYS_INIT_L3_ADDR 0xbff00000 #endif diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index 459b9e6c544..4c453a7cd94 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index 6ff6a428306..b5f920b013e 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index a5872faa474..ecf63e59c6b 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -10,6 +10,7 @@ CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index 247db8e0fef..e609dfcbf21 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -10,6 +10,7 @@ CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index 91ad3ee3051..59fdc33ad47 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index 6ca91fe77ed..17aa980518d 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index 13857b8208f..2be600a5847 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -10,6 +10,7 @@ CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index b587d525a26..f22719558fe 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -10,6 +10,7 @@ CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index c88a869bc8f..2aba2228947 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_P4080DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index a627475420f..9bfb0a88f11 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -10,6 +10,7 @@ CONFIG_TARGET_P4080DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index 82371ea9897..1d5f00d1c8b 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -10,6 +10,7 @@ CONFIG_TARGET_P4080DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index be3d388484f..741adc51622 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index 4dcdb391e40..c10c94849e0 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index 7620f4879a7..111ca1d4877 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -10,6 +10,7 @@ CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index 68573a5c982..fd94afa762f 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -10,6 +10,7 @@ CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index d10799f83cf..d44f0625585 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -14,6 +14,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index 22c404e27c2..fdff32c2d2d 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -15,6 +15,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index 2f1e9ca46ef..fdfbdd2ec04 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -17,6 +17,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index 5c30e9fe376..9f1599fb633 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -10,6 +10,7 @@ CONFIG_TARGET_T1024RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index 00ea2175a77..aca69b32160 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -13,6 +13,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index c738e9c4133..fcf530d44f1 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index bc38fa68b2f..3e0239edf3d 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig index af7df9ee91c..3063157a7f6 100644 --- a/configs/T1042D4RDB_defconfig +++ b/configs/T1042D4RDB_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_T1042D4RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index e7ce3631e0a..8cb38f2d11f 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -20,6 +20,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y <<<<<<< HEAD diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index a2a2c589d7c..5691ba5fc09 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -21,6 +21,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y <<<<<<< HEAD ======= diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index 4f35dbd945f..ee7edd5af99 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -7,6 +7,7 @@ CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_NXP_ESBC=y CONFIG_BOOTSCRIPT_HDR_ADDR=0xee020000 CONFIG_PCIE1=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index b02939f679c..53a50514931 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -23,6 +23,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y <<<<<<< HEAD ======= diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig index 6caffde6d4e..5deb88da225 100644 --- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig @@ -10,6 +10,7 @@ CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SRIO_PCIE_BOOT_SLAVE=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index 4ec70d678c0..4969909504a 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -11,6 +11,7 @@ CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index f382288ebbb..af66fd2013a 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -17,6 +17,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y <<<<<<< HEAD diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index 5837b3d26da..41956d8d3df 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -18,6 +18,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y <<<<<<< HEAD ======= diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index ab191c702f1..0811b18fb6e 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -20,6 +20,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y <<<<<<< HEAD ======= diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index fff8a26b323..b8b66d41180 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -13,6 +13,7 @@ CONFIG_TARGET_T2080RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index c5ab7af3351..48711c5c947 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -17,6 +17,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index 83f47250094..bd98910c003 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -18,6 +18,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y <<<<<<< HEAD diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index 0c5365217ee..04ef733621f 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -20,6 +20,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y <<<<<<< HEAD diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig index 66a9d5dcadb..25ee845627d 100644 --- a/configs/T2080RDB_revD_defconfig +++ b/configs/T2080RDB_revD_defconfig @@ -13,6 +13,7 @@ CONFIG_TARGET_T2080RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_T2080RDB_REV_D=y <<<<<<< HEAD ======= diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index 639cb80e8e9..6141f558e7f 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -18,6 +18,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T4240RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y <<<<<<< HEAD ======= diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index 6f403619d67..7fc4dc951eb 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -13,6 +13,7 @@ CONFIG_TARGET_T4240RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig index 38d33c20dc9..bcecb88e4d1 100644 --- a/configs/kmcent2_defconfig +++ b/configs/kmcent2_defconfig @@ -12,6 +12,7 @@ CONFIG_TARGET_KMCENT2=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y # CONFIG_DEEP_SLEEP is not set CONFIG_PCIE1=y CONFIG_KM_DEF_NETDEV="eth2" diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 72dd39d2306..27889e3033c 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -30,7 +30,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif -#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_SYS_SRIO diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index a93e9d0b58a..aa80d400bd9 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -15,7 +15,6 @@ /* High Level Configuration Options */ -#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #ifdef CONFIG_RAMBOOT_PBL diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 365640dffc1..2fb181090b5 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -58,7 +58,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif -#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS /* diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 2faec638e2d..84dfc894819 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -22,7 +22,6 @@ /* High Level Configuration Options */ -#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #ifdef CONFIG_RAMBOOT_PBL diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 5ed9e1badb3..716e9c3d556 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -17,7 +17,6 @@ /* High Level Configuration Options */ -#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #ifdef CONFIG_RAMBOOT_PBL diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 96e8ff4842b..e697d8490c9 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -39,7 +39,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif -#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS /* diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 66bd5cb9c0f..d1a5d866d2d 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -33,7 +33,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif -#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS /* diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index eafdc35c27b..ff9d7d59a39 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -137,7 +137,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xebfffffc -#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS /* Environment in parallel NOR-Flash */ -- GitLab From bb20a105e9fa475eb4258086cf59173540e7ff23 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 25 Jun 2022 11:02:46 -0400 Subject: [PATCH 557/581] Convert CONFIG_SYS_BOOT_RAMDISK_HIGH to Kconfig This converts the following to Kconfig: CONFIG_SYS_BOOT_RAMDISK_HIGH Signed-off-by: Tom Rini --- README | 5 ----- arch/arc/include/asm/config.h | 2 -- arch/arm/include/asm/config.h | 2 -- arch/m68k/include/asm/config.h | 2 -- arch/microblaze/include/asm/config.h | 2 -- arch/mips/include/asm/config.h | 2 -- arch/powerpc/include/asm/config.h | 2 -- arch/riscv/include/asm/config.h | 2 -- arch/x86/include/asm/config.h | 2 -- boot/Kconfig | 8 ++++++++ scripts/config_whitelist.txt | 1 - 11 files changed, 8 insertions(+), 22 deletions(-) diff --git a/README b/README index dae467a4da0..fb0284d4ecb 100644 --- a/README +++ b/README @@ -1754,11 +1754,6 @@ Configuration Settings: CONFIG_SYS_BOOTMAPSZ. If CONFIG_SYS_BOOTMAPSZ is undefined, then the value in "bootm_size" will be used instead. -- CONFIG_SYS_BOOT_RAMDISK_HIGH: - Enable initrd_high functionality. If defined then the - initrd_high feature is enabled and the bootm ramdisk subcommand - is enabled. - - CONFIG_SYS_BOOT_GET_CMDLINE: Enables allocating and saving kernel cmdline in space between "bootm_low" and "bootm_low" + BOOTMAPSZ. diff --git a/arch/arc/include/asm/config.h b/arch/arc/include/asm/config.h index 46e94be141b..afdfcaa78b5 100644 --- a/arch/arc/include/asm/config.h +++ b/arch/arc/include/asm/config.h @@ -6,6 +6,4 @@ #ifndef __ASM_ARC_CONFIG_H_ #define __ASM_ARC_CONFIG_H_ -#define CONFIG_SYS_BOOT_RAMDISK_HIGH - #endif /*__ASM_ARC_CONFIG_H_ */ diff --git a/arch/arm/include/asm/config.h b/arch/arm/include/asm/config.h index be44b767642..5870412c439 100644 --- a/arch/arm/include/asm/config.h +++ b/arch/arm/include/asm/config.h @@ -6,8 +6,6 @@ #ifndef _ASM_CONFIG_H_ #define _ASM_CONFIG_H_ -#define CONFIG_SYS_BOOT_RAMDISK_HIGH - #if defined(CONFIG_ARCH_LS1021A) || \ defined(CONFIG_FSL_LAYERSCAPE) #include diff --git a/arch/m68k/include/asm/config.h b/arch/m68k/include/asm/config.h index 221eb93d58b..bad0026648a 100644 --- a/arch/m68k/include/asm/config.h +++ b/arch/m68k/include/asm/config.h @@ -6,6 +6,4 @@ #ifndef _ASM_CONFIG_H_ #define _ASM_CONFIG_H_ -#define CONFIG_SYS_BOOT_RAMDISK_HIGH - #endif diff --git a/arch/microblaze/include/asm/config.h b/arch/microblaze/include/asm/config.h index 221eb93d58b..bad0026648a 100644 --- a/arch/microblaze/include/asm/config.h +++ b/arch/microblaze/include/asm/config.h @@ -6,6 +6,4 @@ #ifndef _ASM_CONFIG_H_ #define _ASM_CONFIG_H_ -#define CONFIG_SYS_BOOT_RAMDISK_HIGH - #endif diff --git a/arch/mips/include/asm/config.h b/arch/mips/include/asm/config.h index 221eb93d58b..bad0026648a 100644 --- a/arch/mips/include/asm/config.h +++ b/arch/mips/include/asm/config.h @@ -6,6 +6,4 @@ #ifndef _ASM_CONFIG_H_ #define _ASM_CONFIG_H_ -#define CONFIG_SYS_BOOT_RAMDISK_HIGH - #endif diff --git a/arch/powerpc/include/asm/config.h b/arch/powerpc/include/asm/config.h index 059ffe1fd4f..79fe567b587 100644 --- a/arch/powerpc/include/asm/config.h +++ b/arch/powerpc/include/asm/config.h @@ -14,8 +14,6 @@ #define HWCONFIG_BUFFER_SIZE 256 #endif -#define CONFIG_SYS_BOOT_RAMDISK_HIGH - #ifndef CONFIG_MAX_MEM_MAPPED #if defined(CONFIG_E500) || \ defined(CONFIG_MPC86xx) || \ diff --git a/arch/riscv/include/asm/config.h b/arch/riscv/include/asm/config.h index d9110075376..c55c85d4e6c 100644 --- a/arch/riscv/include/asm/config.h +++ b/arch/riscv/include/asm/config.h @@ -7,6 +7,4 @@ #ifndef _ASM_CONFIG_H_ #define _ASM_CONFIG_H_ -#define CONFIG_SYS_BOOT_RAMDISK_HIGH - #endif diff --git a/arch/x86/include/asm/config.h b/arch/x86/include/asm/config.h index 221eb93d58b..bad0026648a 100644 --- a/arch/x86/include/asm/config.h +++ b/arch/x86/include/asm/config.h @@ -6,6 +6,4 @@ #ifndef _ASM_CONFIG_H_ #define _ASM_CONFIG_H_ -#define CONFIG_SYS_BOOT_RAMDISK_HIGH - #endif diff --git a/boot/Kconfig b/boot/Kconfig index e7a4d538d1c..17438b566d5 100644 --- a/boot/Kconfig +++ b/boot/Kconfig @@ -606,6 +606,14 @@ config SYS_FSL_PBL_RCW Enables addition of RCW (Power on reset configuration) in built image. Please refer doc/README.pblimage for more details. +config SYS_BOOT_RAMDISK_HIGH + depends on CMD_BOOTM || CMD_BOOTI || CMD_BOOTZ + depends on !(NIOS2 || SANDBOX || SH || XTENSA) + def_bool y + help + Enable initrd_high functionality. If defined then the initrd_high + feature is enabled and the boot* ramdisk subcommand is enabled. + endmenu # Boot images menu "Boot timing" diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index b0d693a5826..6faa64fd2ec 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -565,7 +565,6 @@ CONFIG_SYS_BOOTCOUNT_LE CONFIG_SYS_BOOTMAPSZ CONFIG_SYS_BOOTM_LEN CONFIG_SYS_BOOT_BLOCK -CONFIG_SYS_BOOT_RAMDISK_HIGH CONFIG_SYS_CACHE_ACR0 CONFIG_SYS_CACHE_ACR1 CONFIG_SYS_CACHE_ACR2 -- GitLab From 56fc54ad0625f73c3a74f2fa3217255b5353a835 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 25 Jun 2022 11:02:47 -0400 Subject: [PATCH 558/581] mx*sabresd: Reference CONFIG_SYS_AUXCORE_BOOTDATA value directly As this is used in the environment, reference it directly rather than as a CONFIG value. Cc: Fabio Estevam Cc: Adrian Alonso Signed-off-by: Tom Rini --- include/configs/mx6sxsabresd.h | 4 +--- include/configs/mx7dsabresd.h | 5 +---- 2 files changed, 2 insertions(+), 7 deletions(-) diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 58d550fee9e..570e2ce687a 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -19,8 +19,6 @@ #define CONFIG_MXC_UART_BASE UART1_BASE #ifdef CONFIG_IMX_BOOTAUX -/* Set to QSPI2 B flash at default */ -#define CONFIG_SYS_AUXCORE_BOOTDATA 0x78000000 #define UPDATE_M4_ENV \ "m4image=m4_qspi.bin\0" \ @@ -35,7 +33,7 @@ "sf write ${loadaddr} 0x0 ${filesize}; " \ "fi; " \ "fi\0" \ - "m4boot=sf probe 1:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0" + "m4boot=sf probe 1:0; bootaux 0x78000000\0" #else #define UPDATE_M4_ENV "" #endif diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index a6b8c275fe7..b96341a587c 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -12,10 +12,7 @@ #define PHYS_SDRAM_SIZE SZ_1G - #ifdef CONFIG_IMX_BOOTAUX -/* Set to QSPI1 A flash at default */ -#define CONFIG_SYS_AUXCORE_BOOTDATA 0x60000000 #define UPDATE_M4_ENV \ "m4image=m4_qspi.bin\0" \ @@ -30,7 +27,7 @@ "sf write ${loadaddr} 0x0 ${filesize}; " \ "fi; " \ "fi\0" \ - "m4boot=sf probe 0:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0" + "m4boot=sf probe 0:0; bootaux 0x60000000\0" #else #define UPDATE_M4_ENV "" #endif -- GitLab From d9c4d66aefeab1a005d71e24cd5349095fdd8916 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 25 Jun 2022 11:02:48 -0400 Subject: [PATCH 559/581] kmcoge5ne: Move BFTIC3 CONFIG references to their usage We only reference CONFIG_SYS_BFTIC3_BASE in one location. Move the comment to where we reference it, and use the value directly. Signed-off-by: Tom Rini Reviewed-by: Holger Brunck Reviewed-by: Heiko Schocher --- board/keymile/km83xx/km83xx.c | 6 ++++-- include/configs/kmcoge5ne.h | 6 ------ 2 files changed, 4 insertions(+), 8 deletions(-) diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c index ecc8c786b6b..8a0b1758566 100644 --- a/board/keymile/km83xx/km83xx.c +++ b/board/keymile/km83xx/km83xx.c @@ -102,8 +102,10 @@ int misc_init_r(void) int last_stage_init(void) { #if defined(CONFIG_TARGET_KMCOGE5NE) - struct bfticu_iomap *base = - (struct bfticu_iomap *)CONFIG_SYS_BFTIC3_BASE; + /* + * BFTIC3 on the local bus CS4 + */ + struct bfticu_iomap *base = (struct bfticu_iomap *)0xB0000000; u8 dip_switch = in_8((u8 *)&(base->mswitch)) & BFTICU_DIPSWITCH_MASK; if (dip_switch != 0) { diff --git a/include/configs/kmcoge5ne.h b/include/configs/kmcoge5ne.h index 8f4685c271c..b9d20c9c8eb 100644 --- a/include/configs/kmcoge5ne.h +++ b/include/configs/kmcoge5ne.h @@ -35,12 +35,6 @@ CSCONFIG_ROW_BIT_13 | \ CSCONFIG_COL_BIT_10) -/* - * BFTIC3 on the local bus CS4 - */ -#define CONFIG_SYS_BFTIC3_BASE 0xB0000000 -#define CONFIG_SYS_BFTIC3_SIZE 256 - /* enable POST tests */ #define CONFIG_POST (CONFIG_SYS_POST_MEMORY|CONFIG_SYS_POST_MEM_REGIONS) #define CONFIG_POST_EXTERNAL_WORD_FUNCS /* use own functions, not generic */ -- GitLab From 64a2a7b04b0a50e50a7cd36d7956d40c7a874478 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 25 Jun 2022 11:02:49 -0400 Subject: [PATCH 560/581] Convert CONFIG_SYS_BOOTCOUNT_LE et al to Kconfig This converts the following to Kconfig: CONFIG_SYS_BOOTCOUNT_LE CONFIG_SYS_BOOTCOUNT_BE Signed-off-by: Tom Rini --- configs/am335x_boneblack_vboot_defconfig | 1 + configs/am335x_evm_defconfig | 1 + configs/am335x_evm_spiboot_defconfig | 1 + configs/am335x_hs_evm_defconfig | 1 + configs/am335x_hs_evm_uart_defconfig | 1 + configs/am335x_sl50_defconfig | 1 + configs/chiliboard_defconfig | 1 + configs/dh_imx6_defconfig | 1 + configs/kmcent2_defconfig | 1 + configs/kmcoge5ne_defconfig | 1 + configs/kmeter1_defconfig | 1 + configs/kmsupx5_defconfig | 1 + configs/kmtegr1_defconfig | 1 + configs/pg_wcom_expu1_defconfig | 1 + configs/pg_wcom_expu1_update_defconfig | 1 + configs/pg_wcom_seli8_defconfig | 1 + configs/pg_wcom_seli8_update_defconfig | 1 + configs/socfpga_is1_defconfig | 1 + configs/socfpga_sr1500_defconfig | 1 + configs/tuge1_defconfig | 1 + drivers/bootcount/Kconfig | 11 +++++++++++ include/bootcount.h | 8 -------- include/configs/am335x_evm.h | 8 -------- include/configs/am335x_guardian.h | 3 --- include/configs/am335x_sl50.h | 3 --- include/configs/chiliboard.h | 2 -- include/configs/dh_imx6.h | 3 --- include/configs/highbank.h | 2 -- include/configs/km/pg-wcom-ls102xa.h | 2 -- include/configs/socfpga_is1.h | 5 ----- include/configs/socfpga_sr1500.h | 5 ----- include/configs/tqma6_wru4.h | 3 --- 32 files changed, 31 insertions(+), 44 deletions(-) diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig index b5ba2ccda5c..ab74bdb2f88 100644 --- a/configs/am335x_boneblack_vboot_defconfig +++ b/configs/am335x_boneblack_vboot_defconfig @@ -54,6 +54,7 @@ CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y # CONFIG_SPL_BLK is not set CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y CONFIG_USB_FUNCTION_FASTBOOT=y diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig index c7dbd3c5702..de13af62be2 100644 --- a/configs/am335x_evm_defconfig +++ b/configs/am335x_evm_defconfig @@ -63,6 +63,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_CLK=y CONFIG_CLK_CDCE9XX=y CONFIG_CLK_TI_CTRL=y diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig index 00e80a89ded..bcead2e5c5f 100644 --- a/configs/am335x_evm_spiboot_defconfig +++ b/configs/am335x_evm_spiboot_defconfig @@ -53,6 +53,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_CLK=y CONFIG_CLK_CDCE9XX=y CONFIG_DFU_TFTP=y diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig index ef0a09877c1..4d0ee46ac70 100644 --- a/configs/am335x_hs_evm_defconfig +++ b/configs/am335x_hs_evm_defconfig @@ -51,6 +51,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_CLK=y CONFIG_CLK_CDCE9XX=y CONFIG_DFU_MMC=y diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig index d7ea5a31cd1..9a86e869aa1 100644 --- a/configs/am335x_hs_evm_uart_defconfig +++ b/configs/am335x_hs_evm_uart_defconfig @@ -52,6 +52,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_CLK=y CONFIG_CLK_CDCE9XX=y CONFIG_DFU_MMC=y diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig index 1338190e9ff..8808e1ff658 100644 --- a/configs/am335x_sl50_defconfig +++ b/configs/am335x_sl50_defconfig @@ -68,6 +68,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EEPROM_ADDR=0x50 diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig index 849d751f08e..05569061429 100644 --- a/configs/chiliboard_defconfig +++ b/configs/chiliboard_defconfig @@ -54,6 +54,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_MISC=y diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index 7cb4f417e7e..051816f719f 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -69,6 +69,7 @@ CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y CONFIG_LBA48=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000 CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig index bcecb88e4d1..ee900f5d9cd 100644 --- a/configs/kmcent2_defconfig +++ b/configs/kmcent2_defconfig @@ -57,6 +57,7 @@ CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="fm1-mac5" CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=2 diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig index 924f9ac4637..3b73fbc812c 100644 --- a/configs/kmcoge5ne_defconfig +++ b/configs/kmcoge5ne_defconfig @@ -200,6 +200,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_BOOTCOUNT_MEM=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xF0001001 CONFIG_SYS_OR0_PRELIM=0xF0000E55 diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig index dfa2500a29a..310278d6112 100644 --- a/configs/kmeter1_defconfig +++ b/configs/kmeter1_defconfig @@ -169,6 +169,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_BOOTCOUNT_MEM=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xF0001001 CONFIG_SYS_OR0_PRELIM=0xF0000E55 diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig index 221335da8ea..027bb73b57c 100644 --- a/configs/kmsupx5_defconfig +++ b/configs/kmsupx5_defconfig @@ -160,6 +160,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_BOOTCOUNT_MEM=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xF0001001 CONFIG_SYS_OR0_PRELIM=0xF0000E55 diff --git a/configs/kmtegr1_defconfig b/configs/kmtegr1_defconfig index f1791a0fc0e..19cb1e85b04 100644 --- a/configs/kmtegr1_defconfig +++ b/configs/kmtegr1_defconfig @@ -161,6 +161,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_BOOTCOUNT_MEM=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xF0001001 CONFIG_SYS_OR0_PRELIM=0xF0000E55 diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig index 4b205e13831..a84e0cdd9eb 100644 --- a/configs/pg_wcom_expu1_defconfig +++ b/configs/pg_wcom_expu1_defconfig @@ -70,6 +70,7 @@ CONFIG_ETHPRIME="ethernet@2d90000" CONFIG_VERSION_VARIABLE=y CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_DDR_CLK_FREQ=50000000 CONFIG_SYS_FSL_DDR3=y CONFIG_SYS_I2C_LEGACY=y diff --git a/configs/pg_wcom_expu1_update_defconfig b/configs/pg_wcom_expu1_update_defconfig index 98f3dcc4545..f04c3ac6147 100644 --- a/configs/pg_wcom_expu1_update_defconfig +++ b/configs/pg_wcom_expu1_update_defconfig @@ -68,6 +68,7 @@ CONFIG_ETHPRIME="ethernet@2d90000" CONFIG_VERSION_VARIABLE=y CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_DDR_CLK_FREQ=50000000 CONFIG_SYS_FSL_DDR3=y CONFIG_SYS_I2C_LEGACY=y diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig index ce3e7eb179b..4380d883635 100644 --- a/configs/pg_wcom_seli8_defconfig +++ b/configs/pg_wcom_seli8_defconfig @@ -70,6 +70,7 @@ CONFIG_ETHPRIME="ethernet@2d90000" CONFIG_VERSION_VARIABLE=y CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_DDR_CLK_FREQ=50000000 CONFIG_SYS_FSL_DDR3=y CONFIG_SYS_I2C_LEGACY=y diff --git a/configs/pg_wcom_seli8_update_defconfig b/configs/pg_wcom_seli8_update_defconfig index 623afa33877..ca05e25d47e 100644 --- a/configs/pg_wcom_seli8_update_defconfig +++ b/configs/pg_wcom_seli8_update_defconfig @@ -68,6 +68,7 @@ CONFIG_ETHPRIME="ethernet@2d90000" CONFIG_VERSION_VARIABLE=y CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_DDR_CLK_FREQ=50000000 CONFIG_SYS_FSL_DDR3=y CONFIG_SYS_I2C_LEGACY=y diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig index c3b6368f617..958adfe25a4 100644 --- a/configs/socfpga_is1_defconfig +++ b/configs/socfpga_is1_defconfig @@ -52,6 +52,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_ARP_TIMEOUT=500 CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_DWAPB_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_DW=y diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index 53d6b82972f..def2ee8dbc1 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -56,6 +56,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_DWAPB_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_DW=y diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig index 3c2a7a34d1c..1bd48cb82a1 100644 --- a/configs/tuge1_defconfig +++ b/configs/tuge1_defconfig @@ -160,6 +160,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_BOOTCOUNT_MEM=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xF0001001 CONFIG_SYS_OR0_PRELIM=0xF0000E55 diff --git a/drivers/bootcount/Kconfig b/drivers/bootcount/Kconfig index 66ce4cc29ba..e918f746946 100644 --- a/drivers/bootcount/Kconfig +++ b/drivers/bootcount/Kconfig @@ -237,4 +237,15 @@ config SYS_BOOTCOUNT_MAGIC help Set the magic value used for the boot counter. +choice + prompt "Endianness of bootcount accessors" + default SYS_BOOTCOUNT_LE + +config SYS_BOOTCOUNT_LE + bool "Little endian accessors" + +config SYS_BOOTCOUNT_BE + bool "Big endian accessors" + +endchoice endif diff --git a/include/bootcount.h b/include/bootcount.h index fccee7e15bf..bfa5d464276 100644 --- a/include/bootcount.h +++ b/include/bootcount.h @@ -72,14 +72,6 @@ ulong bootcount_load(void); #if defined(CONFIG_SPL_BOOTCOUNT_LIMIT) || defined(CONFIG_TPL_BOOTCOUNT_LIMIT) || defined(CONFIG_BOOTCOUNT_LIMIT) -#if !defined(CONFIG_SYS_BOOTCOUNT_LE) && !defined(CONFIG_SYS_BOOTCOUNT_BE) -# if __BYTE_ORDER == __LITTLE_ENDIAN -# define CONFIG_SYS_BOOTCOUNT_LE -# else -# define CONFIG_SYS_BOOTCOUNT_BE -# endif -#endif - #ifdef CONFIG_SYS_BOOTCOUNT_LE static inline void raw_bootcount_store(volatile u32 *addr, u32 data) { diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 754bcc3304b..f0a979423de 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -170,14 +170,6 @@ /* PMIC support */ #define CONFIG_POWER_TPS65910 -/* SPL */ -#ifndef CONFIG_NOR_BOOT -/* Bootcount using the RTC block */ -#define CONFIG_SYS_BOOTCOUNT_BE - -/* USB gadget RNDIS */ -#endif - #ifdef CONFIG_MTD_RAW_NAND /* NAND: device related configs */ /* NAND: driver related configs */ diff --git a/include/configs/am335x_guardian.h b/include/configs/am335x_guardian.h index 93fea95996c..356c21a1b0a 100644 --- a/include/configs/am335x_guardian.h +++ b/include/configs/am335x_guardian.h @@ -93,9 +93,6 @@ #define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ #define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ -/* Bootcount using the RTC block */ -#define CONFIG_SYS_BOOTCOUNT_LE - #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \ diff --git a/include/configs/am335x_sl50.h b/include/configs/am335x_sl50.h index 79d9d03a176..4289836bc3f 100644 --- a/include/configs/am335x_sl50.h +++ b/include/configs/am335x_sl50.h @@ -50,9 +50,6 @@ /* SPL */ -/* Bootcount using the RTC block */ -#define CONFIG_SYS_BOOTCOUNT_BE - /* Network. */ #endif /* ! __CONFIG_AM335X_SL50_H */ diff --git a/include/configs/chiliboard.h b/include/configs/chiliboard.h index 97adb835359..965eba58b31 100644 --- a/include/configs/chiliboard.h +++ b/include/configs/chiliboard.h @@ -105,8 +105,6 @@ #define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ /* SPL */ -/* Bootcount using the RTC block */ -#define CONFIG_SYS_BOOTCOUNT_BE /* NAND: device related configs */ /* NAND: driver related configs */ diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index f770b355286..79424647f61 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -26,9 +26,6 @@ /* Miscellaneous configurable options */ -/* Bootcounter */ -#define CONFIG_SYS_BOOTCOUNT_BE - /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_USDHC_NUM 3 diff --git a/include/configs/highbank.h b/include/configs/highbank.h index 1fc38cfa0cc..bb6cc957261 100644 --- a/include/configs/highbank.h +++ b/include/configs/highbank.h @@ -14,8 +14,6 @@ #define CONFIG_PL011_CLOCK 150000000 -#define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */ - /* * Miscellaneous configurable options */ diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index a12923386a5..dd6747388c7 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -187,8 +187,6 @@ #define CONFIG_SYS_MONITOR_LEN 0x100000 /* 1Mbyte */ -#define CONFIG_SYS_BOOTCOUNT_BE - /* * Environment */ diff --git a/include/configs/socfpga_is1.h b/include/configs/socfpga_is1.h index 468a35d4ff9..ad271791206 100644 --- a/include/configs/socfpga_is1.h +++ b/include/configs/socfpga_is1.h @@ -16,9 +16,4 @@ /* The rest of the configuration is shared */ #include -/* - * Bootcounter - */ -#define CONFIG_SYS_BOOTCOUNT_BE - #endif /* __CONFIG_SOCFPGA_IS1_H__ */ diff --git a/include/configs/socfpga_sr1500.h b/include/configs/socfpga_sr1500.h index 62c1bc7408a..432144cb40c 100644 --- a/include/configs/socfpga_sr1500.h +++ b/include/configs/socfpga_sr1500.h @@ -18,11 +18,6 @@ /* Enable SPI NOR flash reset, needed for SPI booting */ #define CONFIG_SPI_N25Q256A_RESET -/* - * Bootcounter - */ -#define CONFIG_SYS_BOOTCOUNT_BE - /* Environment setting for SPI flash */ /* The rest of the configuration is shared */ diff --git a/include/configs/tqma6_wru4.h b/include/configs/tqma6_wru4.h index 90db96599c1..999130600cc 100644 --- a/include/configs/tqma6_wru4.h +++ b/include/configs/tqma6_wru4.h @@ -24,9 +24,6 @@ /* LED */ -/* Bootcounter */ -#define CONFIG_SYS_BOOTCOUNT_BE - /* I2C */ #endif /* __CONFIG_TQMA6_WRU4_H */ -- GitLab From c45568cc4e51b7bbe2f3ce28d8f2566048aeebf3 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 25 Jun 2022 19:29:46 -0400 Subject: [PATCH 561/581] Convert CONFIG_SYS_BOOTM_LEN to Kconfig This converts the following to Kconfig: CONFIG_SYS_BOOTM_LEN As part of this, rework error handling in boot/bootm.c so that we pass the buffer size to handle_decomp_error as CONFIG_SYS_BOOTM_LEN will not be available to host tools but we do know the size that we passed to malloc(). Cc: Soeren Moch Signed-off-by: Tom Rini --- README | 6 ----- boot/bootm.c | 24 +++++++++---------- cmd/Kconfig | 10 ++++++++ configs/M5208EVBE_defconfig | 1 + configs/M5235EVB_Flash32_defconfig | 1 + configs/M5235EVB_defconfig | 1 + configs/M5253DEMO_defconfig | 1 + configs/M5275EVB_defconfig | 1 + configs/M53017EVB_defconfig | 1 + configs/M5329AFEE_defconfig | 1 + configs/M5329BFEE_defconfig | 1 + configs/M5373EVB_defconfig | 1 + configs/MCR3000_defconfig | 1 + configs/a3y17lte_defconfig | 1 + configs/a5y17lte_defconfig | 1 + configs/a64-olinuxino-emmc_defconfig | 1 + configs/a64-olinuxino_defconfig | 1 + configs/a7y17lte_defconfig | 1 + configs/ae350_rv32_defconfig | 1 + configs/ae350_rv32_spl_defconfig | 1 + configs/ae350_rv32_spl_xip_defconfig | 1 + configs/ae350_rv32_xip_defconfig | 1 + configs/ae350_rv64_defconfig | 1 + configs/ae350_rv64_spl_defconfig | 1 + configs/ae350_rv64_spl_xip_defconfig | 1 + configs/ae350_rv64_xip_defconfig | 1 + configs/am335x_baltos_defconfig | 1 + configs/am335x_boneblack_vboot_defconfig | 1 + configs/am335x_evm_defconfig | 1 + configs/am335x_evm_spiboot_defconfig | 1 + configs/am335x_guardian_defconfig | 1 + configs/am335x_hs_evm_defconfig | 1 + configs/am335x_hs_evm_uart_defconfig | 1 + configs/am335x_shc_defconfig | 1 + configs/am335x_shc_ict_defconfig | 1 + configs/am335x_shc_netboot_defconfig | 1 + configs/am335x_shc_sdboot_defconfig | 1 + configs/am335x_sl50_defconfig | 1 + configs/am57xx_evm_defconfig | 1 + configs/am57xx_hs_evm_defconfig | 1 + configs/am57xx_hs_evm_usb_defconfig | 1 + configs/am62x_evm_a53_defconfig | 1 + configs/am64x_evm_a53_defconfig | 1 + configs/am65x_evm_r5_defconfig | 1 + configs/am65x_evm_r5_usbdfu_defconfig | 1 + configs/am65x_evm_r5_usbmsc_defconfig | 1 + configs/am65x_hs_evm_r5_defconfig | 1 + configs/amarula_a64_relic_defconfig | 1 + configs/apple_m1_defconfig | 1 + ...edev_cc_v1_0_ultrazedev_som_v1_0_defconfig | 1 + configs/axs101_defconfig | 1 + configs/axs103_defconfig | 1 + configs/bananapi_m2_plus_h5_defconfig | 1 + configs/bananapi_m64_defconfig | 1 + configs/bcm7260_defconfig | 1 + configs/bcm7445_defconfig | 1 + configs/bcm947622_defconfig | 1 + configs/bcm963158_ram_defconfig | 1 + configs/bcm968360bg_ram_defconfig | 1 + configs/bcm968580xref_ram_defconfig | 1 + configs/bcm_ns3_defconfig | 1 + configs/beelink_gs1_defconfig | 1 + configs/bitmain_antminer_s9_defconfig | 1 + configs/boston32r2_defconfig | 1 + configs/boston32r2el_defconfig | 1 + configs/boston32r6_defconfig | 1 + configs/boston32r6el_defconfig | 1 + configs/boston64r2_defconfig | 1 + configs/boston64r2el_defconfig | 1 + configs/boston64r6_defconfig | 1 + configs/boston64r6el_defconfig | 1 + configs/brppt1_mmc_defconfig | 1 + configs/brppt1_nand_defconfig | 1 + configs/brppt1_spi_defconfig | 1 + configs/brsmarc1_defconfig | 1 + configs/bubblegum_96_defconfig | 1 + configs/cgtqmx8_defconfig | 1 + configs/chromebit_mickey_defconfig | 1 + configs/chromebook_jerry_defconfig | 1 + configs/chromebook_minnie_defconfig | 1 + configs/chromebook_speedy_defconfig | 1 + configs/ci20_mmc_defconfig | 1 + configs/clearfog_gt_8k_defconfig | 1 + configs/corstone1000_defconfig | 1 + configs/cortina_presidio-asic-base_defconfig | 1 + configs/cortina_presidio-asic-emmc_defconfig | 1 + configs/cortina_presidio-asic-pnand_defconfig | 1 + configs/crs305-1g-4s-bit_defconfig | 1 + configs/crs305-1g-4s_defconfig | 1 + configs/crs326-24g-2s-bit_defconfig | 1 + configs/crs326-24g-2s_defconfig | 1 + configs/crs328-4c-20s-4s-bit_defconfig | 1 + configs/crs328-4c-20s-4s_defconfig | 1 + configs/cubieboard7_defconfig | 1 + configs/deneb_defconfig | 1 + configs/durian_defconfig | 1 + configs/emlid_neutis_n5_devboard_defconfig | 1 + configs/espresso7420_defconfig | 1 + configs/evb-rk3128_defconfig | 1 + configs/evb-rk3229_defconfig | 1 + configs/evb-rk3288_defconfig | 1 + configs/firefly-rk3288_defconfig | 1 + configs/gazerbeam_defconfig | 1 + configs/giedi_defconfig | 1 + configs/gwventana_emmc_defconfig | 1 + configs/gwventana_gw5904_defconfig | 1 + configs/gwventana_nand_defconfig | 1 + configs/hsdk_4xd_defconfig | 1 + configs/hsdk_defconfig | 1 + configs/ids8313_defconfig | 1 + configs/imx8mm-cl-iot-gate-optee_defconfig | 1 + configs/imx8mm-cl-iot-gate_defconfig | 1 + configs/imx8mm-icore-mx8mm-ctouch2_defconfig | 1 + configs/imx8mm-icore-mx8mm-edimm2.2_defconfig | 1 + configs/imx8mm_beacon_defconfig | 1 + configs/imx8mm_data_modul_edm_sbc_defconfig | 1 + configs/imx8mm_venice_defconfig | 1 + configs/imx8mn_beacon_2g_defconfig | 1 + configs/imx8mn_beacon_defconfig | 1 + configs/imx8mn_bsh_smm_s2_defconfig | 1 + configs/imx8mn_bsh_smm_s2pro_defconfig | 1 + configs/imx8mn_ddr4_evk_defconfig | 1 + configs/imx8mn_evk_defconfig | 1 + configs/imx8mn_var_som_defconfig | 1 + configs/imx8mn_venice_defconfig | 1 + configs/imx8mp_dhcom_pdk2_defconfig | 1 + configs/imx8mp_evk_defconfig | 1 + configs/imx8mp_rsb3720a1_4G_defconfig | 1 + configs/imx8mp_rsb3720a1_6G_defconfig | 1 + configs/imx8mp_venice_defconfig | 1 + configs/imx8mq_cm_defconfig | 1 + configs/imx8mq_phanbell_defconfig | 1 + configs/imx8qxp_mek_defconfig | 1 + configs/j7200_evm_r5_defconfig | 1 + configs/j721e_evm_r5_defconfig | 1 + configs/j721e_hs_evm_r5_defconfig | 1 + configs/j721s2_evm_r5_defconfig | 1 + configs/km_kirkwood_128m16_defconfig | 1 + configs/km_kirkwood_defconfig | 1 + configs/km_kirkwood_pci_defconfig | 1 + configs/kmcoge5ne_defconfig | 1 + configs/kmcoge5un_defconfig | 1 + configs/kmeter1_defconfig | 1 + configs/kmnusa_defconfig | 1 + configs/kmopti2_defconfig | 1 + configs/kmsupx5_defconfig | 1 + configs/kmsuse2_defconfig | 1 + configs/kmtegr1_defconfig | 1 + configs/kmtepr2_defconfig | 1 + configs/kontron_pitx_imx8m_defconfig | 1 + configs/kontron_sl28_defconfig | 1 + configs/libretech_all_h3_cc_h5_defconfig | 1 + configs/libretech_all_h3_it_h5_defconfig | 1 + configs/libretech_all_h5_cc_h5_defconfig | 1 + configs/ls1021aqds_ddr4_nor_defconfig | 1 + configs/ls1021aqds_ddr4_nor_lpuart_defconfig | 1 + configs/ls1021aqds_nand_defconfig | 1 + configs/ls1021aqds_nor_SECURE_BOOT_defconfig | 1 + configs/ls1021aqds_nor_defconfig | 1 + configs/ls1021aqds_nor_lpuart_defconfig | 1 + configs/ls1021aqds_qspi_defconfig | 1 + configs/ls1021aqds_sdcard_ifc_defconfig | 1 + configs/ls1021aqds_sdcard_qspi_defconfig | 1 + configs/ls1021atsn_qspi_defconfig | 1 + configs/ls1021atsn_sdcard_defconfig | 1 + configs/ls1021atwr_nor_SECURE_BOOT_defconfig | 1 + configs/ls1021atwr_nor_defconfig | 1 + configs/ls1021atwr_nor_lpuart_defconfig | 1 + configs/ls1021atwr_qspi_defconfig | 1 + ...s1021atwr_sdcard_ifc_SECURE_BOOT_defconfig | 1 + configs/ls1021atwr_sdcard_ifc_defconfig | 1 + configs/ls1021atwr_sdcard_qspi_defconfig | 1 + configs/malta64_defconfig | 1 + configs/malta64el_defconfig | 1 + configs/malta_defconfig | 1 + configs/maltael_defconfig | 1 + configs/microblaze-generic_defconfig | 1 + configs/microchip_mpfs_icicle_defconfig | 1 + configs/miqi-rk3288_defconfig | 1 + configs/mscc_jr2_defconfig | 1 + configs/mscc_luton_defconfig | 1 + configs/mscc_ocelot_defconfig | 1 + configs/mscc_serval_defconfig | 1 + configs/mscc_servalt_defconfig | 1 + configs/mt7620_mt7530_rfb_defconfig | 1 + configs/mt7620_rfb_defconfig | 1 + configs/mt7623a_unielec_u7623_02_defconfig | 1 + configs/mt7623n_bpir2_defconfig | 1 + configs/mt7628_rfb_defconfig | 1 + configs/mt7629_rfb_defconfig | 1 + configs/mvebu_crb_cn9130_defconfig | 1 + configs/mvebu_db_armada8k_defconfig | 1 + configs/mvebu_db_cn9130_defconfig | 1 + configs/mvebu_mcbin-88f8040_defconfig | 1 + configs/mvebu_puzzle-m801-88f8040_defconfig | 1 + configs/mx7ulp_com_defconfig | 1 + configs/mx7ulp_evk_defconfig | 1 + configs/mx7ulp_evk_plugin_defconfig | 1 + configs/nanopi_a64_defconfig | 1 + configs/nanopi_neo2_defconfig | 1 + configs/nanopi_neo_plus2_defconfig | 1 + configs/nanopi_r1s_h5_defconfig | 1 + configs/nsim_700_defconfig | 1 + configs/nsim_700be_defconfig | 1 + configs/nsim_hs38_defconfig | 1 + configs/nsim_hs38be_defconfig | 1 + configs/oceanic_5205_5inmfd_defconfig | 1 + configs/octeon_ebb7304_defconfig | 1 + configs/octeon_nic23_defconfig | 1 + configs/octeontx2_95xx_defconfig | 1 + configs/octeontx2_96xx_defconfig | 1 + configs/octeontx_81xx_defconfig | 1 + configs/octeontx_83xx_defconfig | 1 + configs/openpiton_riscv64_defconfig | 1 + configs/openpiton_riscv64_spl_defconfig | 1 + configs/orangepi_3_defconfig | 1 + configs/orangepi_lite2_defconfig | 1 + configs/orangepi_one_plus_defconfig | 1 + configs/orangepi_pc2_defconfig | 1 + configs/orangepi_prime_defconfig | 1 + configs/orangepi_win_defconfig | 1 + configs/orangepi_zero2_defconfig | 1 + configs/orangepi_zero_plus2_defconfig | 1 + configs/orangepi_zero_plus_defconfig | 1 + configs/p2371-0000_defconfig | 1 + configs/p2371-2180_defconfig | 1 + configs/p2571_defconfig | 1 + configs/p2771-0000-000_defconfig | 1 + configs/p2771-0000-500_defconfig | 1 + configs/p3450-0000_defconfig | 1 + configs/pg_wcom_expu1_defconfig | 1 + configs/pg_wcom_expu1_update_defconfig | 1 + configs/pg_wcom_seli8_defconfig | 1 + configs/pg_wcom_seli8_update_defconfig | 1 + configs/phycore-rk3288_defconfig | 1 + configs/pico-imx8mq_defconfig | 1 + configs/pine64-lts_defconfig | 1 + configs/pine64_plus_defconfig | 1 + configs/pine_h64_defconfig | 1 + configs/pinebook_defconfig | 1 + configs/pinephone_defconfig | 1 + configs/pinetab_defconfig | 1 + configs/pomelo_defconfig | 1 + configs/popmetal-rk3288_defconfig | 1 + configs/qemu-riscv32_defconfig | 1 + configs/qemu-riscv32_smode_defconfig | 1 + configs/qemu-riscv32_spl_defconfig | 1 + configs/qemu-riscv64_defconfig | 1 + configs/qemu-riscv64_smode_defconfig | 1 + configs/qemu-riscv64_spl_defconfig | 1 + configs/qemu_arm_defconfig | 1 + configs/rock-pi-n8-rk3288_defconfig | 1 + configs/rock2_defconfig | 1 + configs/sama7g5ek_mmc1_defconfig | 1 + configs/sama7g5ek_mmc_defconfig | 1 + configs/sifive_unleashed_defconfig | 1 + configs/sifive_unmatched_defconfig | 1 + configs/socfpga_agilex_atf_defconfig | 1 + configs/socfpga_agilex_defconfig | 1 + configs/socfpga_agilex_vab_defconfig | 1 + configs/socfpga_n5x_atf_defconfig | 1 + configs/socfpga_n5x_defconfig | 1 + configs/socfpga_n5x_vab_defconfig | 1 + configs/socfpga_secu1_defconfig | 1 + configs/socfpga_stratix10_atf_defconfig | 1 + configs/socfpga_stratix10_defconfig | 1 + configs/socfpga_vining_fpga_defconfig | 1 + configs/socrates_defconfig | 1 + configs/sopine_baseboard_defconfig | 1 + configs/stemmy_defconfig | 1 + configs/stih410-b2260_defconfig | 1 + configs/stm32mp13_defconfig | 1 + ...stm32mp15-icore-stm32mp1-ctouch2_defconfig | 1 + ...tm32mp15-icore-stm32mp1-edimm2.2_defconfig | 1 + ...-microgea-stm32mp1-microdev2-of7_defconfig | 1 + ...mp15-microgea-stm32mp1-microdev2_defconfig | 1 + configs/stm32mp15_basic_defconfig | 1 + configs/stm32mp15_defconfig | 1 + configs/stm32mp15_dhcom_basic_defconfig | 1 + configs/stm32mp15_dhcor_basic_defconfig | 1 + configs/stm32mp15_trusted_defconfig | 1 + configs/synquacer_developerbox_defconfig | 1 + configs/syzygy_hub_defconfig | 1 + configs/tanix_tx6_defconfig | 1 + configs/tb100_defconfig | 1 + configs/teres_i_defconfig | 1 + configs/thunderx_88xx_defconfig | 1 + configs/tinker-rk3288_defconfig | 1 + configs/tinker-s-rk3288_defconfig | 1 + configs/topic_miami_defconfig | 1 + configs/topic_miamilite_defconfig | 1 + configs/topic_miamiplus_defconfig | 1 + configs/tuge1_defconfig | 1 + configs/tuxx1_defconfig | 1 + configs/uniphier_ld4_sld8_defconfig | 1 + configs/uniphier_v7_defconfig | 1 + configs/uniphier_v8_defconfig | 1 + configs/vyasa-rk3288_defconfig | 1 + configs/xenguest_arm64_defconfig | 1 + configs/xilinx_versal_virt_defconfig | 1 + configs/xilinx_zynq_virt_defconfig | 1 + configs/xilinx_zynqmp_r5_defconfig | 1 + configs/xilinx_zynqmp_virt_defconfig | 1 + include/configs/M5208EVBE.h | 1 - include/configs/M5235EVB.h | 1 - include/configs/M5253DEMO.h | 1 - include/configs/M5275EVB.h | 1 - include/configs/M53017EVB.h | 1 - include/configs/M5329EVB.h | 1 - include/configs/M5373EVB.h | 1 - include/configs/MPC837XERDB.h | 1 - include/configs/MPC8548CDS.h | 1 - include/configs/P1010RDB.h | 1 - include/configs/P2041RDB.h | 1 - include/configs/T102xRDB.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240RDB.h | 1 - include/configs/am335x_evm.h | 2 -- include/configs/am335x_guardian.h | 2 -- include/configs/am335x_shc.h | 2 -- include/configs/am335x_sl50.h | 2 -- include/configs/am57xx_evm.h | 2 -- include/configs/am65x_evm.h | 2 -- include/configs/apalis-imx8.h | 2 -- include/configs/ax25-ae350.h | 1 - include/configs/axs10x.h | 2 -- include/configs/baltos.h | 1 - include/configs/bcm947622.h | 2 -- include/configs/bcm_ns3.h | 1 - include/configs/bcmstb.h | 1 - include/configs/boston.h | 1 - include/configs/broadcom_bcm963158.h | 1 - include/configs/brppt1.h | 1 - include/configs/brsmarc1.h | 1 - include/configs/ci20.h | 1 - include/configs/colibri-imx8x.h | 2 -- include/configs/corenet_ds.h | 1 - include/configs/crs3xx-98dx3236.h | 2 -- include/configs/dragonboard410c.h | 1 - include/configs/dragonboard820c.h | 1 - include/configs/durian.h | 1 - include/configs/exynos78x0-common.h | 1 - include/configs/gw_ventana.h | 3 --- include/configs/hikey.h | 2 -- include/configs/hikey960.h | 2 -- include/configs/hsdk-4xd.h | 2 -- include/configs/hsdk.h | 2 -- include/configs/imx8mm-cl-iot-gate.h | 1 - include/configs/imx8mm_data_modul_edm_sbc.h | 2 -- include/configs/imx8mm_evk.h | 1 - include/configs/imx8mm_icore_mx8mm.h | 1 - include/configs/imx8mm_venice.h | 1 - include/configs/imx8mn_bsh_smm_s2_common.h | 2 -- include/configs/imx8mn_evk.h | 2 -- include/configs/imx8mn_var_som.h | 2 -- include/configs/imx8mn_venice.h | 1 - include/configs/imx8mp_dhcom_pdk2.h | 2 -- include/configs/imx8mp_evk.h | 2 -- include/configs/imx8mp_rsb3720.h | 2 -- include/configs/imx8mp_venice.h | 1 - include/configs/imx8mq_cm.h | 2 -- include/configs/imx8mq_evk.h | 2 -- include/configs/imx8qm_mek.h | 2 -- include/configs/imx8qm_rom7720.h | 2 -- include/configs/imx8ulp_evk.h | 1 - include/configs/iot2050.h | 2 -- include/configs/iot_devkit.h | 2 -- include/configs/j721e_evm.h | 2 -- include/configs/j721s2_evm.h | 2 -- include/configs/km/km-powerpc.h | 1 - include/configs/km/km_arm.h | 1 - include/configs/km/pg-wcom-ls102xa.h | 1 - include/configs/kmcent2.h | 1 - include/configs/kontron-sl-mx8mm.h | 2 -- include/configs/kontron_pitx_imx8m.h | 2 -- include/configs/ls1012a_common.h | 2 -- include/configs/ls1021aqds.h | 1 - include/configs/ls1021atsn.h | 2 -- include/configs/ls1021atwr.h | 1 - include/configs/ls1028a_common.h | 2 -- include/configs/ls1043a_common.h | 2 -- include/configs/ls1046a_common.h | 2 -- include/configs/ls1088a_common.h | 1 - include/configs/ls2080a_common.h | 2 -- include/configs/lx2160a_common.h | 2 -- include/configs/malta.h | 2 -- include/configs/meson64.h | 1 - include/configs/microblaze-generic.h | 2 -- include/configs/microchip_mpfs_icicle.h | 2 -- include/configs/mt7620.h | 2 -- include/configs/mt7622.h | 1 - include/configs/mt7623.h | 2 -- include/configs/mt7628.h | 2 -- include/configs/mt7629.h | 2 -- include/configs/mt8183.h | 2 -- include/configs/mt8512.h | 3 --- include/configs/mt8516.h | 2 -- include/configs/mt8518.h | 2 -- include/configs/mvebu_armada-37xx.h | 2 -- include/configs/mx6_common.h | 2 -- include/configs/mx7_common.h | 2 -- include/configs/mx7ulp_com.h | 2 -- include/configs/mx7ulp_evk.h | 2 -- include/configs/nsim.h | 2 -- include/configs/octeon_common.h | 2 -- include/configs/octeontx2_common.h | 1 - include/configs/octeontx_common.h | 1 - include/configs/openpiton-riscv64.h | 1 - include/configs/p1_p2_rdb_pc.h | 1 - include/configs/phycore_imx8mm.h | 1 - include/configs/phycore_imx8mp.h | 2 -- include/configs/pico-imx8mq.h | 2 -- include/configs/pomelo.h | 1 - include/configs/poplar.h | 1 - include/configs/presidio_asic.h | 2 -- include/configs/px30_common.h | 4 ---- include/configs/qemu-arm.h | 2 -- include/configs/qemu-ppce500.h | 1 - include/configs/qemu-riscv.h | 2 -- include/configs/rcar-gen3-common.h | 1 - include/configs/rk3128_common.h | 2 -- include/configs/rk322x_common.h | 2 -- include/configs/rk3288_common.h | 2 -- include/configs/rk3308_common.h | 4 ---- include/configs/rk3328_common.h | 2 -- include/configs/rk3368_common.h | 2 -- include/configs/rk3399_common.h | 2 -- include/configs/rk3568_common.h | 2 -- include/configs/rpi.h | 4 ---- include/configs/sama7g5ek.h | 1 - include/configs/sdm845.h | 1 - include/configs/sifive-unleashed.h | 2 -- include/configs/sifive-unmatched.h | 2 -- include/configs/socfpga_arria5_secu1.h | 2 -- include/configs/socfpga_soc64_common.h | 1 - include/configs/socfpga_vining_fpga.h | 1 - include/configs/stemmy.h | 1 - include/configs/stih410-b2260.h | 2 -- include/configs/stm32mp13_common.h | 1 - include/configs/stm32mp15_common.h | 1 - include/configs/sunxi-common.h | 4 ---- include/configs/tb100.h | 2 -- include/configs/total_compute.h | 2 -- include/configs/turris_mox.h | 1 - include/configs/uniphier.h | 2 -- include/configs/vcoreiii.h | 2 -- include/configs/verdin-imx8mm.h | 2 -- include/configs/verdin-imx8mp.h | 2 -- include/configs/vexpress_aemv8.h | 2 -- include/configs/x86-common.h | 1 - include/configs/xilinx_versal.h | 2 -- include/configs/xilinx_zynqmp.h | 2 -- include/configs/xilinx_zynqmp_r5.h | 1 - include/configs/zynq-common.h | 1 - 456 files changed, 321 insertions(+), 269 deletions(-) diff --git a/README b/README index fb0284d4ecb..ff0df3797d2 100644 --- a/README +++ b/README @@ -1736,12 +1736,6 @@ Configuration Settings: Non-cached memory is only supported on 32-bit ARM at present. -- CONFIG_SYS_BOOTM_LEN: - Normally compressed uImages are limited to an - uncompressed size of 8 MBytes. If this is not enough, - you can define CONFIG_SYS_BOOTM_LEN in your board config file - to adjust this setting to your needs. - - CONFIG_SYS_BOOTMAPSZ: Maximum size of memory mapped by the startup code of the Linux kernel; all data that must be processed by diff --git a/boot/bootm.c b/boot/bootm.c index dfa65f125e5..86dbfbcfed5 100644 --- a/boot/bootm.c +++ b/boot/bootm.c @@ -33,11 +33,6 @@ #include #include -#ifndef CONFIG_SYS_BOOTM_LEN -/* use 8MByte as default max gunzip size */ -#define CONFIG_SYS_BOOTM_LEN 0x800000 -#endif - #define MAX_CMDLINE_SIZE SZ_4K #define IH_INITRD_ARCH IH_ARCH_DEFAULT @@ -369,10 +364,12 @@ static int bootm_find_other(struct cmd_tbl *cmdtp, int flag, int argc, * * @comp_type: Compression type being used (IH_COMP_...) * @uncomp_size: Number of bytes uncompressed + * @buf_size: Number of bytes the decompresion buffer was * @ret: errno error code received from compression library * Return: Appropriate BOOTM_ERR_ error code */ -static int handle_decomp_error(int comp_type, size_t uncomp_size, int ret) +static int handle_decomp_error(int comp_type, size_t uncomp_size, + size_t buf_size, int ret) { const char *name = genimg_get_comp_name(comp_type); @@ -380,7 +377,7 @@ static int handle_decomp_error(int comp_type, size_t uncomp_size, int ret) if (ret == -ENOSYS) return BOOTM_ERR_UNIMPLEMENTED; - if (uncomp_size >= CONFIG_SYS_BOOTM_LEN) + if (uncomp_size >= buf_size) printf("Image too large: increase CONFIG_SYS_BOOTM_LEN\n"); else printf("%s: uncompress error %d\n", name, ret); @@ -420,7 +417,8 @@ static int bootm_load_os(bootm_headers_t *images, int boot_progress) load_buf, image_buf, image_len, CONFIG_SYS_BOOTM_LEN, &load_end); if (err) { - err = handle_decomp_error(os.comp, load_end - load, err); + err = handle_decomp_error(os.comp, load_end - load, + CONFIG_SYS_BOOTM_LEN, err); bootstage_error(BOOTSTAGE_ID_DECOMP_IMAGE); return err; } @@ -1006,7 +1004,7 @@ static int bootm_host_load_image(const void *fit, int req_image_type, ulong data, len; bootm_headers_t images; int noffset; - ulong load_end; + ulong load_end, buf_size; uint8_t image_type; uint8_t imape_comp; void *load_buf; @@ -1032,14 +1030,14 @@ static int bootm_host_load_image(const void *fit, int req_image_type, } /* Allow the image to expand by a factor of 4, should be safe */ - load_buf = malloc((1 << 20) + len * 4); + buf_size = (1 << 20) + len * 4; + load_buf = malloc(buf_size); ret = image_decomp(imape_comp, 0, data, image_type, load_buf, - (void *)data, len, CONFIG_SYS_BOOTM_LEN, - &load_end); + (void *)data, len, buf_size, &load_end); free(load_buf); if (ret) { - ret = handle_decomp_error(imape_comp, load_end - 0, ret); + ret = handle_decomp_error(imape_comp, load_end - 0, buf_size, ret); if (ret != BOOTM_ERR_UNIMPLEMENTED) return ret; } diff --git a/cmd/Kconfig b/cmd/Kconfig index bb956e33075..d5f842136cf 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -335,6 +335,16 @@ config BOOTM_VXWORKS help Support booting VxWorks images via the bootm command. +config SYS_BOOTM_LEN + hex "Maximum size of a decompresed OS image" + depends on CMD_BOOTM || CMD_BOOTI || CMD_BOOTZ + default 0x4000000 if PPC || ARM64 + default 0x1000000 if X86 || ARCH_MX6 || ARCH_MX7 + default 0x800000 + help + This is the maximum size of the buffer that is used to decompress the OS + image in to, if passing a compressed image to bootm/booti/bootz. + config CMD_BOOTEFI bool "bootefi" depends on EFI_LOADER diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig index 4ab888f59ed..858fc5bbfd2 100644 --- a/configs/M5208EVBE_defconfig +++ b/configs/M5208EVBE_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_MII=y diff --git a/configs/M5235EVB_Flash32_defconfig b/configs/M5235EVB_Flash32_defconfig index 2a799627841..c7fd5a07a7c 100644 --- a/configs/M5235EVB_Flash32_defconfig +++ b/configs/M5235EVB_Flash32_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig index 5eeed2d2f31..a14bf427ad0 100644 --- a/configs/M5235EVB_defconfig +++ b/configs/M5235EVB_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set diff --git a/configs/M5253DEMO_defconfig b/configs/M5253DEMO_defconfig index b3e6277a7e6..3ed703a7a79 100644 --- a/configs/M5253DEMO_defconfig +++ b/configs/M5253DEMO_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5275EVB_defconfig b/configs/M5275EVB_defconfig index 3420934caf7..fe6ffca43c9 100644 --- a/configs/M5275EVB_defconfig +++ b/configs/M5275EVB_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig index cec2520bdd7..28d51eaa9de 100644 --- a/configs/M53017EVB_defconfig +++ b/configs/M53017EVB_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_MII=y diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig index 9d55d5058e5..c59359b820c 100644 --- a/configs/M5329AFEE_defconfig +++ b/configs/M5329AFEE_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig index bd0cbddfb89..ae4add504b1 100644 --- a/configs/M5329BFEE_defconfig +++ b/configs/M5329BFEE_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig index 0a159eb170e..aead0f45bd3 100644 --- a/configs/M5373EVB_defconfig +++ b/configs/M5373EVB_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig index 236be1628ce..6adba431ef0 100644 --- a/configs/MCR3000_defconfig +++ b/configs/MCR3000_defconfig @@ -34,6 +34,7 @@ CONFIG_SYS_PROMPT="S3K> " CONFIG_SYS_PBSIZE=278 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_IMI is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_LOADB is not set diff --git a/configs/a3y17lte_defconfig b/configs/a3y17lte_defconfig index 67eb7aff1fd..9c0427236b9 100644 --- a/configs/a3y17lte_defconfig +++ b/configs/a3y17lte_defconfig @@ -20,6 +20,7 @@ CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_DM_I2C_GPIO=y diff --git a/configs/a5y17lte_defconfig b/configs/a5y17lte_defconfig index 44915ea5341..ea0773e7a26 100644 --- a/configs/a5y17lte_defconfig +++ b/configs/a5y17lte_defconfig @@ -20,6 +20,7 @@ CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_DM_I2C_GPIO=y diff --git a/configs/a64-olinuxino-emmc_defconfig b/configs/a64-olinuxino-emmc_defconfig index 7d8e7649f2a..afa0c24b688 100644 --- a/configs/a64-olinuxino-emmc_defconfig +++ b/configs/a64-olinuxino-emmc_defconfig @@ -8,6 +8,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/a64-olinuxino_defconfig b/configs/a64-olinuxino_defconfig index 06f51a8f8d3..ccb5abc9845 100644 --- a/configs/a64-olinuxino_defconfig +++ b/configs/a64-olinuxino_defconfig @@ -8,6 +8,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/a7y17lte_defconfig b/configs/a7y17lte_defconfig index 58486f6a571..952c72b760d 100644 --- a/configs/a7y17lte_defconfig +++ b/configs/a7y17lte_defconfig @@ -20,6 +20,7 @@ CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_DM_I2C_GPIO=y diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig index fcfc7b3fe23..b7ea28b1786 100644 --- a/configs/ae350_rv32_defconfig +++ b/configs/ae350_rv32_defconfig @@ -15,6 +15,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig index cfd857c183f..fd89ea14e9c 100644 --- a/configs/ae350_rv32_spl_defconfig +++ b/configs/ae350_rv32_spl_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x4000000 CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig index 36345fbfdc3..2a0c1abf6e5 100644 --- a/configs/ae350_rv32_spl_xip_defconfig +++ b/configs/ae350_rv32_spl_xip_defconfig @@ -23,6 +23,7 @@ CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x4000000 CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv32_xip_defconfig b/configs/ae350_rv32_xip_defconfig index 01883850f9a..e85921bcb3a 100644 --- a/configs/ae350_rv32_xip_defconfig +++ b/configs/ae350_rv32_xip_defconfig @@ -16,6 +16,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig index 477329fa67a..cab5a387e5a 100644 --- a/configs/ae350_rv64_defconfig +++ b/configs/ae350_rv64_defconfig @@ -16,6 +16,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig index eba12a8f0d4..a5cc7571822 100644 --- a/configs/ae350_rv64_spl_defconfig +++ b/configs/ae350_rv64_spl_defconfig @@ -22,6 +22,7 @@ CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x4000000 CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig index 6ade12b740e..dbe5db278fd 100644 --- a/configs/ae350_rv64_spl_xip_defconfig +++ b/configs/ae350_rv64_spl_xip_defconfig @@ -24,6 +24,7 @@ CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x4000000 CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv64_xip_defconfig b/configs/ae350_rv64_xip_defconfig index 2be91815a8e..c9dc1d10f82 100644 --- a/configs/ae350_rv64_xip_defconfig +++ b/configs/ae350_rv64_xip_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig index 0ec44091751..bbb987c5edd 100644 --- a/configs/am335x_baltos_defconfig +++ b/configs/am335x_baltos_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig index ab74bdb2f88..9fe5ac4a161 100644 --- a/configs/am335x_boneblack_vboot_defconfig +++ b/configs/am335x_boneblack_vboot_defconfig @@ -36,6 +36,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_ETHER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_SPL=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 # CONFIG_CMD_FLASH is not set diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig index de13af62be2..b5801094e8c 100644 --- a/configs/am335x_evm_defconfig +++ b/configs/am335x_evm_defconfig @@ -42,6 +42,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_ETHER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x00080000 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig index bcead2e5c5f..efec1a94269 100644 --- a/configs/am335x_evm_spiboot_defconfig +++ b/configs/am335x_evm_spiboot_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_SPL=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 # CONFIG_CMD_FLASH is not set diff --git a/configs/am335x_guardian_defconfig b/configs/am335x_guardian_defconfig index 34bef30edd3..56da3720d96 100644 --- a/configs/am335x_guardian_defconfig +++ b/configs/am335x_guardian_defconfig @@ -48,6 +48,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_ETHER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig index 4d0ee46ac70..bb03e487f87 100644 --- a/configs/am335x_hs_evm_defconfig +++ b/configs/am335x_hs_evm_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_BASE=y # CONFIG_SPL_YMODEM_SUPPORT is not set CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig index 9a86e869aa1..ac451026b09 100644 --- a/configs/am335x_hs_evm_uart_defconfig +++ b/configs/am335x_hs_evm_uart_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_BASE=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig index 77593e3e3dc..070674651ff 100644 --- a/configs/am335x_shc_defconfig +++ b/configs/am335x_shc_defconfig @@ -49,6 +49,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1049 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig index 97a361ce4d6..595e7301cf9 100644 --- a/configs/am335x_shc_ict_defconfig +++ b/configs/am335x_shc_ict_defconfig @@ -47,6 +47,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1049 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig index 2c6fc5496eb..d5cd182acb8 100644 --- a/configs/am335x_shc_netboot_defconfig +++ b/configs/am335x_shc_netboot_defconfig @@ -51,6 +51,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1049 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig index a154a342551..e9e89f627e2 100644 --- a/configs/am335x_shc_sdboot_defconfig +++ b/configs/am335x_shc_sdboot_defconfig @@ -50,6 +50,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1049 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig index 8808e1ff658..f2385e3d703 100644 --- a/configs/am335x_sl50_defconfig +++ b/configs/am335x_sl50_defconfig @@ -44,6 +44,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index a077ef8ae24..249e6702dd7 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -45,6 +45,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ABOOTIMG=y CONFIG_CMD_SPL=y diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index e22c11d9807..aa0b466d954 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ABOOTIMG=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index fc1bc01c062..1c37b635406 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -49,6 +49,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ABOOTIMG=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig index 7ebf3665214..2c0bd4d2e10 100644 --- a/configs/am62x_evm_a53_defconfig +++ b/configs/am62x_evm_a53_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_DM_MAILBOX=y CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_MMC=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig index 49bfc006ddb..0f547526fe6 100644 --- a/configs/am64x_evm_a53_defconfig +++ b/configs/am64x_evm_a53_defconfig @@ -63,6 +63,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y CONFIG_CMD_DM=y diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index 2d8add2fbd5..5232b979709 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -64,6 +64,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/am65x_evm_r5_usbdfu_defconfig b/configs/am65x_evm_r5_usbdfu_defconfig index 05a6a9219ea..7507128c11e 100644 --- a/configs/am65x_evm_r5_usbdfu_defconfig +++ b/configs/am65x_evm_r5_usbdfu_defconfig @@ -56,6 +56,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y CONFIG_CMD_GPT=y diff --git a/configs/am65x_evm_r5_usbmsc_defconfig b/configs/am65x_evm_r5_usbmsc_defconfig index 37e04483dbd..e7e22264732 100644 --- a/configs/am65x_evm_r5_usbmsc_defconfig +++ b/configs/am65x_evm_r5_usbmsc_defconfig @@ -56,6 +56,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/am65x_hs_evm_r5_defconfig b/configs/am65x_hs_evm_r5_defconfig index fc0c5432dbc..6e63f0e8807 100644 --- a/configs/am65x_hs_evm_r5_defconfig +++ b/configs/am65x_hs_evm_r5_defconfig @@ -60,6 +60,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/amarula_a64_relic_defconfig b/configs/amarula_a64_relic_defconfig index 0e173c28c12..72f97cee4de 100644 --- a/configs/amarula_a64_relic_defconfig +++ b/configs/amarula_a64_relic_defconfig @@ -9,6 +9,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_MUSB_GADGET=y diff --git a/configs/apple_m1_defconfig b/configs/apple_m1_defconfig index c4fd8034565..4ba09334d42 100644 --- a/configs/apple_m1_defconfig +++ b/configs/apple_m1_defconfig @@ -8,6 +8,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_LATE_INIT=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_NET is not set CONFIG_APPLE_SPI_KEYB=y # CONFIG_MMC is not set diff --git a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig index 6eefc29ab90..0574ee95e42 100644 --- a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig +++ b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0x8000000 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2073 +CONFIG_SYS_BOOTM_LEN=0x6400000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_FPGA_LOADBP=y CONFIG_CMD_FPGA_LOADP=y diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig index efad458720b..c744b38cc48 100644 --- a/configs/axs101_defconfig +++ b/configs/axs101_defconfig @@ -21,6 +21,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="AXS# " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=278 +CONFIG_SYS_BOOTM_LEN=0x8000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y CONFIG_CMD_SPI=y diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig index 0d176495822..29affdc5e96 100644 --- a/configs/axs103_defconfig +++ b/configs/axs103_defconfig @@ -21,6 +21,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="AXS# " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=278 +CONFIG_SYS_BOOTM_LEN=0x8000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y CONFIG_CMD_SPI=y diff --git a/configs/bananapi_m2_plus_h5_defconfig b/configs/bananapi_m2_plus_h5_defconfig index 0fb1bda1c6e..a68742e9d6a 100644 --- a/configs/bananapi_m2_plus_h5_defconfig +++ b/configs/bananapi_m2_plus_h5_defconfig @@ -9,6 +9,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig index 5d1d10a0918..36aa80a09ba 100644 --- a/configs/bananapi_m64_defconfig +++ b/configs/bananapi_m64_defconfig @@ -9,6 +9,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/bcm7260_defconfig b/configs/bcm7260_defconfig index 28042202109..c44e6ba4ffc 100644 --- a/configs/bcm7260_defconfig +++ b/configs/bcm7260_defconfig @@ -22,6 +22,7 @@ CONFIG_SYS_PROMPT="U-Boot>" CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=536 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GPT=y # CONFIG_RANDOM_UUID is not set diff --git a/configs/bcm7445_defconfig b/configs/bcm7445_defconfig index 0382034a479..bab2c76efb7 100644 --- a/configs/bcm7445_defconfig +++ b/configs/bcm7445_defconfig @@ -23,6 +23,7 @@ CONFIG_SYS_PROMPT="U-Boot>" CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=536 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/bcm947622_defconfig b/configs/bcm947622_defconfig index af9e0c742c6..c61fbe1848e 100644 --- a/configs/bcm947622_defconfig +++ b/configs/bcm947622_defconfig @@ -16,6 +16,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_CACHE=y CONFIG_OF_EMBED=y CONFIG_CLK=y diff --git a/configs/bcm963158_ram_defconfig b/configs/bcm963158_ram_defconfig index 3bc4ca3ef6e..424eca7946b 100644 --- a/configs/bcm963158_ram_defconfig +++ b/configs/bcm963158_ram_defconfig @@ -25,6 +25,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=24 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_LZMADEC is not set # CONFIG_CMD_UNZIP is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/bcm968360bg_ram_defconfig b/configs/bcm968360bg_ram_defconfig index d327dc68b11..7f9093c6f6d 100644 --- a/configs/bcm968360bg_ram_defconfig +++ b/configs/bcm968360bg_ram_defconfig @@ -23,6 +23,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=24 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_GPIO=y CONFIG_CMD_MTD=y CONFIG_CMD_NAND=y diff --git a/configs/bcm968580xref_ram_defconfig b/configs/bcm968580xref_ram_defconfig index ef5ae44345e..a8c7ffa7487 100644 --- a/configs/bcm968580xref_ram_defconfig +++ b/configs/bcm968580xref_ram_defconfig @@ -23,6 +23,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=24 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_GPIO=y CONFIG_CMD_MTD=y CONFIG_CMD_NAND=y diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig index 9446f8454c1..9181b9e4774 100644 --- a/configs/bcm_ns3_defconfig +++ b/configs/bcm_ns3_defconfig @@ -29,6 +29,7 @@ CONFIG_SYS_PROMPT="u-boot> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1049 # CONFIG_SYS_XTRACE is not set +CONFIG_SYS_BOOTM_LEN=0x1800000 CONFIG_CMD_GPT=y CONFIG_CMD_GPT_RENAME=y CONFIG_CMD_MMC=y diff --git a/configs/beelink_gs1_defconfig b/configs/beelink_gs1_defconfig index 6453a72a7d7..2c440e44f5d 100644 --- a/configs/beelink_gs1_defconfig +++ b/configs/beelink_gs1_defconfig @@ -10,6 +10,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x118000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig index f6451b97018..b0d2105db6e 100644 --- a/configs/bitmain_antminer_s9_defconfig +++ b/configs/bitmain_antminer_s9_defconfig @@ -40,6 +40,7 @@ CONFIG_SYS_PROMPT="antminer> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=2075 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x3c00000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_DM is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/boston32r2_defconfig b/configs/boston32r2_defconfig index 691e47c5508..2be57d2d1ed 100644 --- a/configs/boston32r2_defconfig +++ b/configs/boston32r2_defconfig @@ -21,6 +21,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston32r2el_defconfig b/configs/boston32r2el_defconfig index 93c5aec101c..524564355f4 100644 --- a/configs/boston32r2el_defconfig +++ b/configs/boston32r2el_defconfig @@ -22,6 +22,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston32r6_defconfig b/configs/boston32r6_defconfig index 30c5356c015..7bb4e692d6b 100644 --- a/configs/boston32r6_defconfig +++ b/configs/boston32r6_defconfig @@ -22,6 +22,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston32r6el_defconfig b/configs/boston32r6el_defconfig index 2a2169fb77b..8ae2f235b1a 100644 --- a/configs/boston32r6el_defconfig +++ b/configs/boston32r6el_defconfig @@ -23,6 +23,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston64r2_defconfig b/configs/boston64r2_defconfig index a7c67805ab1..4a41e6b5cc6 100644 --- a/configs/boston64r2_defconfig +++ b/configs/boston64r2_defconfig @@ -22,6 +22,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston64r2el_defconfig b/configs/boston64r2el_defconfig index 139ea4e1dc2..0670ffabbbb 100644 --- a/configs/boston64r2el_defconfig +++ b/configs/boston64r2el_defconfig @@ -23,6 +23,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston64r6_defconfig b/configs/boston64r6_defconfig index d31b92dc3cd..bf7f709524b 100644 --- a/configs/boston64r6_defconfig +++ b/configs/boston64r6_defconfig @@ -22,6 +22,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston64r6el_defconfig b/configs/boston64r6el_defconfig index d2af060fd68..e1d46d30606 100644 --- a/configs/boston64r6el_defconfig +++ b/configs/boston64r6el_defconfig @@ -23,6 +23,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig index b1c8577ab62..f088e0bdc09 100644 --- a/configs/brppt1_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -46,6 +46,7 @@ CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set diff --git a/configs/brppt1_nand_defconfig b/configs/brppt1_nand_defconfig index 5addd4970b2..7f961ae473c 100644 --- a/configs/brppt1_nand_defconfig +++ b/configs/brppt1_nand_defconfig @@ -46,6 +46,7 @@ CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig index 67683c895d2..5d6dfbd5c44 100644 --- a/configs/brppt1_spi_defconfig +++ b/configs/brppt1_spi_defconfig @@ -54,6 +54,7 @@ CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set diff --git a/configs/brsmarc1_defconfig b/configs/brsmarc1_defconfig index 2f7ff524cc1..0a906ca9551 100644 --- a/configs/brsmarc1_defconfig +++ b/configs/brsmarc1_defconfig @@ -56,6 +56,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set diff --git a/configs/bubblegum_96_defconfig b/configs/bubblegum_96_defconfig index 0daff7d1505..8dc928a9274 100644 --- a/configs/bubblegum_96_defconfig +++ b/configs/bubblegum_96_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTARGS="console=ttyOWL5,115200n8" CONFIG_SYS_PROMPT="U-Boot => " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1051 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_MD5SUM=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_CACHE=y diff --git a/configs/cgtqmx8_defconfig b/configs/cgtqmx8_defconfig index 17219969f60..5dea71980ba 100644 --- a/configs/cgtqmx8_defconfig +++ b/configs/cgtqmx8_defconfig @@ -49,6 +49,7 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_IMPORTENV is not set CONFIG_CMD_CLK=y CONFIG_CMD_DM=y diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index 862b37d0fb6..dad3b36b993 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SPL_CRC32 is not set CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index a0f15f6e7b2..35d546e6315 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SPL_CRC32 is not set CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index 513e5f85e9c..60fc528a8ce 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SPL_CRC32 is not set CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig index 7fc505ee4e3..e6f03faa87e 100644 --- a/configs/chromebook_speedy_defconfig +++ b/configs/chromebook_speedy_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SPL_CRC32 is not set CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/ci20_mmc_defconfig b/configs/ci20_mmc_defconfig index 983642dac5c..07848a5933e 100644 --- a/configs/ci20_mmc_defconfig +++ b/configs/ci20_mmc_defconfig @@ -34,6 +34,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1c CONFIG_SPL_MMC_TINY=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_DM=y CONFIG_CMD_MMC=y CONFIG_CMD_DHCP=y diff --git a/configs/clearfog_gt_8k_defconfig b/configs/clearfog_gt_8k_defconfig index cf35307937f..baafe3c58c6 100644 --- a/configs/clearfog_gt_8k_defconfig +++ b/configs/clearfog_gt_8k_defconfig @@ -26,6 +26,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig index 49a651aba23..ba5cf0308f3 100644 --- a/configs/corstone1000_defconfig +++ b/configs/corstone1000_defconfig @@ -24,6 +24,7 @@ CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=512 # CONFIG_CMD_CONSOLE is not set CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_XIMG is not set CONFIG_CMD_LOADM=y # CONFIG_CMD_LOADS is not set diff --git a/configs/cortina_presidio-asic-base_defconfig b/configs/cortina_presidio-asic-base_defconfig index 3edc532e31e..1471deb0a98 100644 --- a/configs/cortina_presidio-asic-base_defconfig +++ b/configs/cortina_presidio-asic-base_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_PROMPT="G3#" CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0xc00000 CONFIG_CMD_WDT=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIMER=y diff --git a/configs/cortina_presidio-asic-emmc_defconfig b/configs/cortina_presidio-asic-emmc_defconfig index becb1beb1f9..456f26ced3c 100644 --- a/configs/cortina_presidio-asic-emmc_defconfig +++ b/configs/cortina_presidio-asic-emmc_defconfig @@ -23,6 +23,7 @@ CONFIG_SYS_PROMPT="G3#" CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0xc00000 CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_WDT=y diff --git a/configs/cortina_presidio-asic-pnand_defconfig b/configs/cortina_presidio-asic-pnand_defconfig index 842ec9fa92a..be3e6a9bd19 100644 --- a/configs/cortina_presidio-asic-pnand_defconfig +++ b/configs/cortina_presidio-asic-pnand_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_PROMPT="G3#" CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0xc00000 CONFIG_CMD_MTD=y CONFIG_CMD_WDT=y CONFIG_CMD_CACHE=y diff --git a/configs/crs305-1g-4s-bit_defconfig b/configs/crs305-1g-4s-bit_defconfig index 01e784efa85..1b46ab4bf97 100644 --- a/configs/crs305-1g-4s-bit_defconfig +++ b/configs/crs305-1g-4s-bit_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=96 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTD=y CONFIG_CMD_SPI=y diff --git a/configs/crs305-1g-4s_defconfig b/configs/crs305-1g-4s_defconfig index 98e10d509dd..a7a3ffe4812 100644 --- a/configs/crs305-1g-4s_defconfig +++ b/configs/crs305-1g-4s_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=96 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTD=y CONFIG_CMD_SPI=y diff --git a/configs/crs326-24g-2s-bit_defconfig b/configs/crs326-24g-2s-bit_defconfig index dd04bd18a1c..70f71de6ae0 100644 --- a/configs/crs326-24g-2s-bit_defconfig +++ b/configs/crs326-24g-2s-bit_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=96 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTD=y CONFIG_CMD_SPI=y diff --git a/configs/crs326-24g-2s_defconfig b/configs/crs326-24g-2s_defconfig index 8f7b839460b..5991b62923a 100644 --- a/configs/crs326-24g-2s_defconfig +++ b/configs/crs326-24g-2s_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=96 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTD=y CONFIG_CMD_SPI=y diff --git a/configs/crs328-4c-20s-4s-bit_defconfig b/configs/crs328-4c-20s-4s-bit_defconfig index 68a47fc7c21..434e9fb90f3 100644 --- a/configs/crs328-4c-20s-4s-bit_defconfig +++ b/configs/crs328-4c-20s-4s-bit_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=96 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTD=y CONFIG_CMD_SPI=y diff --git a/configs/crs328-4c-20s-4s_defconfig b/configs/crs328-4c-20s-4s_defconfig index fbf81013634..8e08cceaac4 100644 --- a/configs/crs328-4c-20s-4s_defconfig +++ b/configs/crs328-4c-20s-4s_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=96 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTD=y CONFIG_CMD_SPI=y diff --git a/configs/cubieboard7_defconfig b/configs/cubieboard7_defconfig index 223a775387a..7437d4b4b9d 100644 --- a/configs/cubieboard7_defconfig +++ b/configs/cubieboard7_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTARGS="console=ttyOWL3,115200n8" CONFIG_SYS_PROMPT="U-Boot => " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1051 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_MMC=y CONFIG_MMC_OWL=y CONFIG_PHY_REALTEK=y diff --git a/configs/deneb_defconfig b/configs/deneb_defconfig index 309545be531..ae1179a1160 100644 --- a/configs/deneb_defconfig +++ b/configs/deneb_defconfig @@ -59,6 +59,7 @@ CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2073 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/durian_defconfig b/configs/durian_defconfig index eccf55f895e..27c8e260d92 100644 --- a/configs/durian_defconfig +++ b/configs/durian_defconfig @@ -22,6 +22,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_SYS_PROMPT="durian#" CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=280 +CONFIG_SYS_BOOTM_LEN=0x3c00000 # CONFIG_CMD_LZMADEC is not set # CONFIG_CMD_UNZIP is not set CONFIG_CMD_PCI=y diff --git a/configs/emlid_neutis_n5_devboard_defconfig b/configs/emlid_neutis_n5_devboard_defconfig index d9272eae168..73121f2f4eb 100644 --- a/configs/emlid_neutis_n5_devboard_defconfig +++ b/configs/emlid_neutis_n5_devboard_defconfig @@ -10,4 +10,5 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUPPORT_EMMC_BOOT=y diff --git a/configs/espresso7420_defconfig b/configs/espresso7420_defconfig index 9128fa086a7..34e5b4e743f 100644 --- a/configs/espresso7420_defconfig +++ b/configs/espresso7420_defconfig @@ -20,6 +20,7 @@ CONFIG_CONSOLE_MUX=y # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_PROMPT="ESPRESSO7420 # " CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_SETEXPR is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_MMC is not set diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig index ac38d5e7885..6526933274a 100644 --- a/configs/evb-rk3128_defconfig +++ b/configs/evb-rk3128_defconfig @@ -18,6 +18,7 @@ CONFIG_FIT=y CONFIG_DEFAULT_FDT_FILE="rk3128-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig index f44dec09c27..ebf13c31c5b 100644 --- a/configs/evb-rk3229_defconfig +++ b/configs/evb-rk3229_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_OPTEE_IMAGE=y CONFIG_TPL_MAX_SIZE=0x100000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB_MASS_STORAGE=y diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index 6587c19c36a..a2b88169c67 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SPL_OPTEE_IMAGE=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index c2b3a0e315d..b3198bfa380 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/gazerbeam_defconfig b/configs/gazerbeam_defconfig index c48541a9ec5..a81aa00f2db 100644 --- a/configs/gazerbeam_defconfig +++ b/configs/gazerbeam_defconfig @@ -133,6 +133,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=1024 CONFIG_CMD_CPU=y +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_BINOP=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y diff --git a/configs/giedi_defconfig b/configs/giedi_defconfig index 7e9a7ea7c0b..016282080be 100644 --- a/configs/giedi_defconfig +++ b/configs/giedi_defconfig @@ -59,6 +59,7 @@ CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2073 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index ea9e7e2cbf0..0516176e6d0 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -57,6 +57,7 @@ CONFIG_SYS_PROMPT="Ventana > " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=539 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 CONFIG_CMD_UNZIP=y # CONFIG_CMD_FLASH is not set diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index c0c7c0daf13..63c87f17a5c 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -57,6 +57,7 @@ CONFIG_SYS_PROMPT="Ventana > " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=539 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 CONFIG_CMD_UNZIP=y # CONFIG_CMD_FLASH is not set diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index 7ce02fef8a2..9d6819f19d3 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -59,6 +59,7 @@ CONFIG_SYS_PROMPT="Ventana > " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=539 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_SPL_NAND_OFS=0x1100000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 CONFIG_CMD_UNZIP=y diff --git a/configs/hsdk_4xd_defconfig b/configs/hsdk_4xd_defconfig index 1d78c17d13b..8e673545a96 100644 --- a/configs/hsdk_4xd_defconfig +++ b/configs/hsdk_4xd_defconfig @@ -23,6 +23,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="hsdk-4xd# " CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2075 +CONFIG_SYS_BOOTM_LEN=0x8000000 CONFIG_CMD_ENV_FLAGS=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y diff --git a/configs/hsdk_defconfig b/configs/hsdk_defconfig index f9823af34d4..3bd6f9314cc 100644 --- a/configs/hsdk_defconfig +++ b/configs/hsdk_defconfig @@ -22,6 +22,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="hsdk# " CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2071 +CONFIG_SYS_BOOTM_LEN=0x8000000 CONFIG_CMD_ENV_FLAGS=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig index b8070e7351a..74dfc668042 100644 --- a/configs/ids8313_defconfig +++ b/configs/ids8313_defconfig @@ -142,6 +142,7 @@ CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_CBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_IMLS=y CONFIG_CMD_ENV_FLAGS=y CONFIG_CMD_I2C=y diff --git a/configs/imx8mm-cl-iot-gate-optee_defconfig b/configs/imx8mm-cl-iot-gate-optee_defconfig index 80055912096..2a209bcfe47 100644 --- a/configs/imx8mm-cl-iot-gate-optee_defconfig +++ b/configs/imx8mm-cl-iot-gate-optee_defconfig @@ -43,6 +43,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_EEPROM=y diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig index dae7ddc20e0..07084988139 100644 --- a/configs/imx8mm-cl-iot-gate_defconfig +++ b/configs/imx8mm-cl-iot-gate_defconfig @@ -45,6 +45,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_EEPROM=y diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig index 69ebc6fa325..7040d782ef6 100644 --- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig +++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig @@ -41,6 +41,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig index a3c142feb28..0488ec223f0 100644 --- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig +++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig @@ -41,6 +41,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig index bf2b6486347..1a0672879e5 100644 --- a/configs/imx8mm_beacon_defconfig +++ b/configs/imx8mm_beacon_defconfig @@ -46,6 +46,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/imx8mm_data_modul_edm_sbc_defconfig b/configs/imx8mm_data_modul_edm_sbc_defconfig index 399b388460f..da59e4c7adf 100644 --- a/configs/imx8mm_data_modul_edm_sbc_defconfig +++ b/configs/imx8mm_data_modul_edm_sbc_defconfig @@ -71,6 +71,7 @@ CONFIG_SYS_PBSIZE=2074 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x8000000 CONFIG_CMD_ASKENV=y # CONFIG_CMD_EXPORTENV is not set CONFIG_CMD_ERASEENV=y diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig index 190209d6325..49b36e0c8f4 100644 --- a/configs/imx8mm_venice_defconfig +++ b/configs/imx8mm_venice_defconfig @@ -49,6 +49,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CRC32_VERIFY=y diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig index cadef45028d..bd177887689 100644 --- a/configs/imx8mn_beacon_2g_defconfig +++ b/configs/imx8mn_beacon_2g_defconfig @@ -54,6 +54,7 @@ CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CMD_ERASEENV=y diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig index 357109e32e5..738d308f45b 100644 --- a/configs/imx8mn_beacon_defconfig +++ b/configs/imx8mn_beacon_defconfig @@ -54,6 +54,7 @@ CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CMD_ERASEENV=y diff --git a/configs/imx8mn_bsh_smm_s2_defconfig b/configs/imx8mn_bsh_smm_s2_defconfig index 68c2940456d..5013dc5895c 100644 --- a/configs/imx8mn_bsh_smm_s2_defconfig +++ b/configs/imx8mn_bsh_smm_s2_defconfig @@ -48,6 +48,7 @@ CONFIG_SYS_PROMPT="> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2067 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_FUSE=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y diff --git a/configs/imx8mn_bsh_smm_s2pro_defconfig b/configs/imx8mn_bsh_smm_s2pro_defconfig index 4bc55121051..74d033eb403 100644 --- a/configs/imx8mn_bsh_smm_s2pro_defconfig +++ b/configs/imx8mn_bsh_smm_s2pro_defconfig @@ -48,6 +48,7 @@ CONFIG_SYS_PROMPT="> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2067 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_FUSE=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig index e16c1f60e67..e53e00845ed 100644 --- a/configs/imx8mn_ddr4_evk_defconfig +++ b/configs/imx8mn_ddr4_evk_defconfig @@ -45,6 +45,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CMD_ERASEENV=y diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig index 6390a274e50..7c1e48dccce 100644 --- a/configs/imx8mn_evk_defconfig +++ b/configs/imx8mn_evk_defconfig @@ -50,6 +50,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CMD_ERASEENV=y diff --git a/configs/imx8mn_var_som_defconfig b/configs/imx8mn_var_som_defconfig index 889bcf7dc58..927b449e03f 100644 --- a/configs/imx8mn_var_som_defconfig +++ b/configs/imx8mn_var_som_defconfig @@ -48,6 +48,7 @@ CONFIG_SYS_PROMPT="> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2067 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_FUSE=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig index 4a0bf393986..935de023161 100644 --- a/configs/imx8mn_venice_defconfig +++ b/configs/imx8mn_venice_defconfig @@ -51,6 +51,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CRC32_VERIFY=y diff --git a/configs/imx8mp_dhcom_pdk2_defconfig b/configs/imx8mp_dhcom_pdk2_defconfig index 3a41767c156..f3b69070698 100644 --- a/configs/imx8mp_dhcom_pdk2_defconfig +++ b/configs/imx8mp_dhcom_pdk2_defconfig @@ -71,6 +71,7 @@ CONFIG_SYS_PBSIZE=2081 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x8000000 CONFIG_CMD_ASKENV=y # CONFIG_CMD_EXPORTENV is not set CONFIG_CMD_ERASEENV=y diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index 2b2a025c2b2..dcee933a1be 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -50,6 +50,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/imx8mp_rsb3720a1_4G_defconfig b/configs/imx8mp_rsb3720a1_4G_defconfig index 97925196a85..9f067fc6336 100644 --- a/configs/imx8mp_rsb3720a1_4G_defconfig +++ b/configs/imx8mp_rsb3720a1_4G_defconfig @@ -56,6 +56,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/imx8mp_rsb3720a1_6G_defconfig b/configs/imx8mp_rsb3720a1_6G_defconfig index df35dcbb762..2271f2a14e5 100644 --- a/configs/imx8mp_rsb3720a1_6G_defconfig +++ b/configs/imx8mp_rsb3720a1_6G_defconfig @@ -56,6 +56,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/imx8mp_venice_defconfig b/configs/imx8mp_venice_defconfig index cef5f26d0ba..7fdde41b6da 100644 --- a/configs/imx8mp_venice_defconfig +++ b/configs/imx8mp_venice_defconfig @@ -51,6 +51,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CRC32_VERIFY=y diff --git a/configs/imx8mq_cm_defconfig b/configs/imx8mq_cm_defconfig index cd1ee4d9e70..6f59f29dac0 100644 --- a/configs/imx8mq_cm_defconfig +++ b/configs/imx8mq_cm_defconfig @@ -44,6 +44,7 @@ CONFIG_SPL_I2C=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/imx8mq_phanbell_defconfig b/configs/imx8mq_phanbell_defconfig index 2c566e068fd..dc3992b0b45 100644 --- a/configs/imx8mq_phanbell_defconfig +++ b/configs/imx8mq_phanbell_defconfig @@ -49,6 +49,7 @@ CONFIG_SPL_POWER=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index 5c361780267..f250425e26a 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -51,6 +51,7 @@ CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2068 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig index a0f9f20f2f5..9ac6ef16786 100644 --- a/configs/j7200_evm_r5_defconfig +++ b/configs/j7200_evm_r5_defconfig @@ -66,6 +66,7 @@ CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPT=y diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index 21ec66d7e4a..5e25ed620fa 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -67,6 +67,7 @@ CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPT=y diff --git a/configs/j721e_hs_evm_r5_defconfig b/configs/j721e_hs_evm_r5_defconfig index 02a66652238..add8da02056 100644 --- a/configs/j721e_hs_evm_r5_defconfig +++ b/configs/j721e_hs_evm_r5_defconfig @@ -59,6 +59,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig index fb6e69197d1..98d69a18b95 100644 --- a/configs/j721s2_evm_r5_defconfig +++ b/configs/j721s2_evm_r5_defconfig @@ -73,6 +73,7 @@ CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPT=y diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig index 655759b09ce..054038fdd04 100644 --- a/configs/km_kirkwood_128m16_defconfig +++ b/configs/km_kirkwood_128m16_defconfig @@ -32,6 +32,7 @@ CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig index 65378d3cec1..ac2deeb27c2 100644 --- a/configs/km_kirkwood_defconfig +++ b/configs/km_kirkwood_defconfig @@ -32,6 +32,7 @@ CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig index 4d116c3a7ad..80746791fe3 100644 --- a/configs/km_kirkwood_pci_defconfig +++ b/configs/km_kirkwood_pci_defconfig @@ -32,6 +32,7 @@ CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig index 3b73fbc812c..34ab31565ca 100644 --- a/configs/kmcoge5ne_defconfig +++ b/configs/kmcoge5ne_defconfig @@ -171,6 +171,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig index 8b54f9c7c84..5766f49d774 100644 --- a/configs/kmcoge5un_defconfig +++ b/configs/kmcoge5un_defconfig @@ -35,6 +35,7 @@ CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig index 310278d6112..98f23dbbf17 100644 --- a/configs/kmeter1_defconfig +++ b/configs/kmeter1_defconfig @@ -141,6 +141,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig index 8cbde0e178a..a309acae7dc 100644 --- a/configs/kmnusa_defconfig +++ b/configs/kmnusa_defconfig @@ -35,6 +35,7 @@ CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig index 7775b604f57..6a6f20890a7 100644 --- a/configs/kmopti2_defconfig +++ b/configs/kmopti2_defconfig @@ -154,6 +154,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig index 027bb73b57c..d251eba0d04 100644 --- a/configs/kmsupx5_defconfig +++ b/configs/kmsupx5_defconfig @@ -134,6 +134,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kmsuse2_defconfig b/configs/kmsuse2_defconfig index 8e27f9f6af3..de44deb1ad1 100644 --- a/configs/kmsuse2_defconfig +++ b/configs/kmsuse2_defconfig @@ -36,6 +36,7 @@ CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/kmtegr1_defconfig b/configs/kmtegr1_defconfig index 19cb1e85b04..7c0ebefa698 100644 --- a/configs/kmtegr1_defconfig +++ b/configs/kmtegr1_defconfig @@ -133,6 +133,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig index 6670c317a19..5bb3d9c1160 100644 --- a/configs/kmtepr2_defconfig +++ b/configs/kmtepr2_defconfig @@ -154,6 +154,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kontron_pitx_imx8m_defconfig b/configs/kontron_pitx_imx8m_defconfig index 27a89f9b1b6..49671e8fb47 100644 --- a/configs/kontron_pitx_imx8m_defconfig +++ b/configs/kontron_pitx_imx8m_defconfig @@ -48,6 +48,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/kontron_sl28_defconfig b/configs/kontron_sl28_defconfig index aaabb14f91a..aaca8966c8f 100644 --- a/configs/kontron_sl28_defconfig +++ b/configs/kontron_sl28_defconfig @@ -50,6 +50,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x230000 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/libretech_all_h3_cc_h5_defconfig b/configs/libretech_all_h3_cc_h5_defconfig index 524138aa2e1..13ff7582124 100644 --- a/configs/libretech_all_h3_cc_h5_defconfig +++ b/configs/libretech_all_h3_cc_h5_defconfig @@ -8,6 +8,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/libretech_all_h3_it_h5_defconfig b/configs/libretech_all_h3_it_h5_defconfig index 1b083335863..75280ee1e3b 100644 --- a/configs/libretech_all_h3_it_h5_defconfig +++ b/configs/libretech_all_h3_it_h5_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPI_FLASH_XMC=y CONFIG_SPI=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/libretech_all_h5_cc_h5_defconfig b/configs/libretech_all_h5_cc_h5_defconfig index e0734f96735..f42747e9466 100644 --- a/configs/libretech_all_h5_cc_h5_defconfig +++ b/configs/libretech_all_h5_cc_h5_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPI_FLASH_XMC=y CONFIG_SUN8I_EMAC=y CONFIG_SPI=y diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig index 165e1a780fd..92fa4f000ed 100644 --- a/configs/ls1021aqds_ddr4_nor_defconfig +++ b/configs/ls1021aqds_ddr4_nor_defconfig @@ -38,6 +38,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig index 13ded158e68..fcbaf9b685e 100644 --- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig +++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig @@ -38,6 +38,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index 1423d732f8a..19a21f4a047 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -66,6 +66,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig index d4b9cd2b872..01db23c5190 100644 --- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig @@ -37,6 +37,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig index 7cc61213e33..82c6a1bdc3b 100644 --- a/configs/ls1021aqds_nor_defconfig +++ b/configs/ls1021aqds_nor_defconfig @@ -38,6 +38,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig index 04cb087ad55..438a8ecf0ae 100644 --- a/configs/ls1021aqds_nor_lpuart_defconfig +++ b/configs/ls1021aqds_nor_lpuart_defconfig @@ -38,6 +38,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig index 2d560b2ea6d..750a5a501e5 100644 --- a/configs/ls1021aqds_qspi_defconfig +++ b/configs/ls1021aqds_qspi_defconfig @@ -37,6 +37,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index 8e23ccc7889..cbb7c55944f 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -64,6 +64,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index ff8fbeb7177..71eff4582f9 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -63,6 +63,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1021atsn_qspi_defconfig b/configs/ls1021atsn_qspi_defconfig index b368791280a..4ee30728663 100644 --- a/configs/ls1021atsn_qspi_defconfig +++ b/configs/ls1021atsn_qspi_defconfig @@ -29,6 +29,7 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x8000000 CONFIG_CMD_GREPENV=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig index 64266afd013..aad99783311 100644 --- a/configs/ls1021atsn_sdcard_defconfig +++ b/configs/ls1021atsn_sdcard_defconfig @@ -55,6 +55,7 @@ CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x8000000 CONFIG_CMD_GREPENV=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig index 41887e0921c..8daa1c67e44 100644 --- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig @@ -35,6 +35,7 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig index c806309b093..0410249b316 100644 --- a/configs/ls1021atwr_nor_defconfig +++ b/configs/ls1021atwr_nor_defconfig @@ -36,6 +36,7 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig index de025930d85..82e3b39a522 100644 --- a/configs/ls1021atwr_nor_lpuart_defconfig +++ b/configs/ls1021atwr_nor_lpuart_defconfig @@ -36,6 +36,7 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig index b5b2cf13f92..9343203eacf 100644 --- a/configs/ls1021atwr_qspi_defconfig +++ b/configs/ls1021atwr_qspi_defconfig @@ -37,6 +37,7 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index 2b76f0a2b96..d247d114f39 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -62,6 +62,7 @@ CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index 161fa1eebd6..855657ca37a 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -63,6 +63,7 @@ CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index 2dc01e19bbc..a225f1a37bf 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -64,6 +64,7 @@ CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/malta64_defconfig b/configs/malta64_defconfig index be868907166..e55b4a49145 100644 --- a/configs/malta64_defconfig +++ b/configs/malta64_defconfig @@ -17,6 +17,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="malta # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y # CONFIG_CMD_LOADB is not set diff --git a/configs/malta64el_defconfig b/configs/malta64el_defconfig index 6eef89db924..6c6492d3feb 100644 --- a/configs/malta64el_defconfig +++ b/configs/malta64el_defconfig @@ -19,6 +19,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="maltael # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=283 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y # CONFIG_CMD_LOADB is not set diff --git a/configs/malta_defconfig b/configs/malta_defconfig index 88c0d5628de..3aff68b0188 100644 --- a/configs/malta_defconfig +++ b/configs/malta_defconfig @@ -16,6 +16,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="malta # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y # CONFIG_CMD_LOADB is not set diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig index 58d31d6a443..e268fb63743 100644 --- a/configs/maltael_defconfig +++ b/configs/maltael_defconfig @@ -18,6 +18,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="maltael # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=283 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y # CONFIG_CMD_LOADB is not set diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index 5828d84fb1e..ad61859b897 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -39,6 +39,7 @@ CONFIG_SYS_PROMPT="U-Boot-mONStR> " CONFIG_SYS_MAXARGS=15 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=544 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y diff --git a/configs/microchip_mpfs_icicle_defconfig b/configs/microchip_mpfs_icicle_defconfig index 462c8b7f291..cf093532b19 100644 --- a/configs/microchip_mpfs_icicle_defconfig +++ b/configs/microchip_mpfs_icicle_defconfig @@ -16,6 +16,7 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_DM_MTD=y diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig index 7000b89311a..34465f99a52 100644 --- a/configs/miqi-rk3288_defconfig +++ b/configs/miqi-rk3288_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/mscc_jr2_defconfig b/configs/mscc_jr2_defconfig index 082a32b7f72..b2e1a8e8261 100644 --- a/configs/mscc_jr2_defconfig +++ b/configs/mscc_jr2_defconfig @@ -30,6 +30,7 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=279 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/mscc_luton_defconfig b/configs/mscc_luton_defconfig index 722a585d56a..8eebe7b314d 100644 --- a/configs/mscc_luton_defconfig +++ b/configs/mscc_luton_defconfig @@ -32,6 +32,7 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/mscc_ocelot_defconfig b/configs/mscc_ocelot_defconfig index 0b1e49926a0..6ba93116265 100644 --- a/configs/mscc_ocelot_defconfig +++ b/configs/mscc_ocelot_defconfig @@ -29,6 +29,7 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/mscc_serval_defconfig b/configs/mscc_serval_defconfig index 4dfb6b79cae..1b9096682f0 100644 --- a/configs/mscc_serval_defconfig +++ b/configs/mscc_serval_defconfig @@ -27,6 +27,7 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/mscc_servalt_defconfig b/configs/mscc_servalt_defconfig index 3104ac35b8a..ca358e666a1 100644 --- a/configs/mscc_servalt_defconfig +++ b/configs/mscc_servalt_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=283 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/mt7620_mt7530_rfb_defconfig b/configs/mt7620_mt7530_rfb_defconfig index 9e409b60b27..8c64bb740a3 100644 --- a/configs/mt7620_mt7530_rfb_defconfig +++ b/configs/mt7620_mt7530_rfb_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_BSS_START_ADDR=0x80010000 CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/mt7620_rfb_defconfig b/configs/mt7620_rfb_defconfig index f3f5e3a8871..2aa6eb7e269 100644 --- a/configs/mt7620_rfb_defconfig +++ b/configs/mt7620_rfb_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_BSS_START_ADDR=0x80010000 CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/mt7623a_unielec_u7623_02_defconfig b/configs/mt7623a_unielec_u7623_02_defconfig index 06e85c2f57d..c8ac1997ca5 100644 --- a/configs/mt7623a_unielec_u7623_02_defconfig +++ b/configs/mt7623a_unielec_u7623_02_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_MAXARGS=8 CONFIG_SYS_PBSIZE=1049 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/mt7623n_bpir2_defconfig b/configs/mt7623n_bpir2_defconfig index 4320fe5bb62..4e8905b68f7 100644 --- a/configs/mt7623n_bpir2_defconfig +++ b/configs/mt7623n_bpir2_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_MAXARGS=8 CONFIG_SYS_PBSIZE=1049 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/mt7628_rfb_defconfig b/configs/mt7628_rfb_defconfig index 7690213ab80..14fc8b05e3c 100644 --- a/configs/mt7628_rfb_defconfig +++ b/configs/mt7628_rfb_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_BSS_START_ADDR=0x80010000 CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/mt7629_rfb_defconfig b/configs/mt7629_rfb_defconfig index f5e3c26d66c..a74c3edbf8e 100644 --- a/configs/mt7629_rfb_defconfig +++ b/configs/mt7629_rfb_defconfig @@ -37,6 +37,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_MAXARGS=8 CONFIG_SYS_PBSIZE=1049 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/mvebu_crb_cn9130_defconfig b/configs/mvebu_crb_cn9130_defconfig index 2541b8a22ae..bcffaefb9b1 100644 --- a/configs/mvebu_crb_cn9130_defconfig +++ b/configs/mvebu_crb_cn9130_defconfig @@ -26,6 +26,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="Marvell>> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=1051 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_MTD=y diff --git a/configs/mvebu_db_armada8k_defconfig b/configs/mvebu_db_armada8k_defconfig index d3633d04dcb..2eee745ed67 100644 --- a/configs/mvebu_db_armada8k_defconfig +++ b/configs/mvebu_db_armada8k_defconfig @@ -25,6 +25,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/mvebu_db_cn9130_defconfig b/configs/mvebu_db_cn9130_defconfig index 7563873ef2e..99d46c1a2a8 100644 --- a/configs/mvebu_db_cn9130_defconfig +++ b/configs/mvebu_db_cn9130_defconfig @@ -28,6 +28,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="Marvell>> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=1051 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_MTD=y diff --git a/configs/mvebu_mcbin-88f8040_defconfig b/configs/mvebu_mcbin-88f8040_defconfig index d334c89ed31..8164beb1413 100644 --- a/configs/mvebu_mcbin-88f8040_defconfig +++ b/configs/mvebu_mcbin-88f8040_defconfig @@ -26,6 +26,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/mvebu_puzzle-m801-88f8040_defconfig b/configs/mvebu_puzzle-m801-88f8040_defconfig index 5cec3d8a682..25ae690fe60 100644 --- a/configs/mvebu_puzzle-m801-88f8040_defconfig +++ b/configs/mvebu_puzzle-m801-88f8040_defconfig @@ -30,6 +30,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/mx7ulp_com_defconfig b/configs/mx7ulp_com_defconfig index 5b3b332f10d..2b55fbd3b29 100644 --- a/configs/mx7ulp_com_defconfig +++ b/configs/mx7ulp_com_defconfig @@ -20,6 +20,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/mx7ulp_evk_defconfig b/configs/mx7ulp_evk_defconfig index 6a22040c035..95cd22a59d8 100644 --- a/configs/mx7ulp_evk_defconfig +++ b/configs/mx7ulp_evk_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_MAXARGS=256 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y diff --git a/configs/mx7ulp_evk_plugin_defconfig b/configs/mx7ulp_evk_plugin_defconfig index ea03eb37717..45cdd74f09a 100644 --- a/configs/mx7ulp_evk_plugin_defconfig +++ b/configs/mx7ulp_evk_plugin_defconfig @@ -19,6 +19,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=256 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y diff --git a/configs/nanopi_a64_defconfig b/configs/nanopi_a64_defconfig index 8f3c242a7a9..226ccaa12ff 100644 --- a/configs/nanopi_a64_defconfig +++ b/configs/nanopi_a64_defconfig @@ -7,6 +7,7 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nanopi_neo2_defconfig b/configs/nanopi_neo2_defconfig index 66df94b33b9..6fedf056ff7 100644 --- a/configs/nanopi_neo2_defconfig +++ b/configs/nanopi_neo2_defconfig @@ -9,6 +9,7 @@ CONFIG_DRAM_ZQ=3881977 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nanopi_neo_plus2_defconfig b/configs/nanopi_neo_plus2_defconfig index 60f26318429..3f834b756df 100644 --- a/configs/nanopi_neo_plus2_defconfig +++ b/configs/nanopi_neo_plus2_defconfig @@ -11,6 +11,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nanopi_r1s_h5_defconfig b/configs/nanopi_r1s_h5_defconfig index 06c564ec8cd..a0cf8ff0442 100644 --- a/configs/nanopi_r1s_h5_defconfig +++ b/configs/nanopi_r1s_h5_defconfig @@ -11,6 +11,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nsim_700_defconfig b/configs/nsim_700_defconfig index bcf954aa632..60809400d26 100644 --- a/configs/nsim_700_defconfig +++ b/configs/nsim_700_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_SYS_PROMPT="nsim# " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=279 +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y diff --git a/configs/nsim_700be_defconfig b/configs/nsim_700be_defconfig index 5a09db2f9bf..e021cc94cca 100644 --- a/configs/nsim_700be_defconfig +++ b/configs/nsim_700be_defconfig @@ -19,6 +19,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_SYS_PROMPT="nsim# " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=279 +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y diff --git a/configs/nsim_hs38_defconfig b/configs/nsim_hs38_defconfig index ad8acec4e08..3c3d1812a79 100644 --- a/configs/nsim_hs38_defconfig +++ b/configs/nsim_hs38_defconfig @@ -20,6 +20,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SYS_PROMPT="nsim# " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=279 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_DM=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y diff --git a/configs/nsim_hs38be_defconfig b/configs/nsim_hs38be_defconfig index 8a63e58263f..9e1a14845df 100644 --- a/configs/nsim_hs38be_defconfig +++ b/configs/nsim_hs38be_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_SYS_PROMPT="nsim# " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=279 +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y diff --git a/configs/oceanic_5205_5inmfd_defconfig b/configs/oceanic_5205_5inmfd_defconfig index 21468c426b5..1cd8e9f2b68 100644 --- a/configs/oceanic_5205_5inmfd_defconfig +++ b/configs/oceanic_5205_5inmfd_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_SPI=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/octeon_ebb7304_defconfig b/configs/octeon_ebb7304_defconfig index dc2e215c050..0a18b94295a 100644 --- a/configs/octeon_ebb7304_defconfig +++ b/configs/octeon_ebb7304_defconfig @@ -20,6 +20,7 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/octeon_nic23_defconfig b/configs/octeon_nic23_defconfig index 23cdef3316c..95e98c1161d 100644 --- a/configs/octeon_nic23_defconfig +++ b/configs/octeon_nic23_defconfig @@ -27,6 +27,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/octeontx2_95xx_defconfig b/configs/octeontx2_95xx_defconfig index 2b3748b2d04..d4f9f565aef 100644 --- a/configs/octeontx2_95xx_defconfig +++ b/configs/octeontx2_95xx_defconfig @@ -37,6 +37,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Marvell> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set CONFIG_CMD_MD5SUM=y CONFIG_MD5SUM_VERIFY=y diff --git a/configs/octeontx2_96xx_defconfig b/configs/octeontx2_96xx_defconfig index 0fd5b7212b8..aeb9f8a8b6d 100644 --- a/configs/octeontx2_96xx_defconfig +++ b/configs/octeontx2_96xx_defconfig @@ -37,6 +37,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Marvell> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set CONFIG_CMD_MD5SUM=y CONFIG_MD5SUM_VERIFY=y diff --git a/configs/octeontx_81xx_defconfig b/configs/octeontx_81xx_defconfig index 38ef7f41632..6fe96f47553 100644 --- a/configs/octeontx_81xx_defconfig +++ b/configs/octeontx_81xx_defconfig @@ -37,6 +37,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Marvell> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set CONFIG_CMD_MD5SUM=y CONFIG_MD5SUM_VERIFY=y diff --git a/configs/octeontx_83xx_defconfig b/configs/octeontx_83xx_defconfig index 371f6186697..5ba4fc1cad8 100644 --- a/configs/octeontx_83xx_defconfig +++ b/configs/octeontx_83xx_defconfig @@ -35,6 +35,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Marvell> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set CONFIG_CMD_MD5SUM=y CONFIG_MD5SUM_VERIFY=y diff --git a/configs/openpiton_riscv64_defconfig b/configs/openpiton_riscv64_defconfig index 5605fbcab57..5672ffa631f 100644 --- a/configs/openpiton_riscv64_defconfig +++ b/configs/openpiton_riscv64_defconfig @@ -27,6 +27,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_RUN is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/openpiton_riscv64_spl_defconfig b/configs/openpiton_riscv64_spl_defconfig index e9514f3da1d..8ae265f902b 100644 --- a/configs/openpiton_riscv64_spl_defconfig +++ b/configs/openpiton_riscv64_spl_defconfig @@ -43,6 +43,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_RUN is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/orangepi_3_defconfig b/configs/orangepi_3_defconfig index 824f017dae4..dbca66d1429 100644 --- a/configs/orangepi_3_defconfig +++ b/configs/orangepi_3_defconfig @@ -10,6 +10,7 @@ CONFIG_BLUETOOTH_DT_DEVICE_FIXUP="brcm,bcm4345c5" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x118000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_PHY_SUN50I_USB3=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y diff --git a/configs/orangepi_lite2_defconfig b/configs/orangepi_lite2_defconfig index cfce6cb0d47..14c88062812 100644 --- a/configs/orangepi_lite2_defconfig +++ b/configs/orangepi_lite2_defconfig @@ -9,5 +9,6 @@ CONFIG_MMC0_CD_PIN="PF6" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x118000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_one_plus_defconfig b/configs/orangepi_one_plus_defconfig index 63d3addbdd3..a4336332fc7 100644 --- a/configs/orangepi_one_plus_defconfig +++ b/configs/orangepi_one_plus_defconfig @@ -9,5 +9,6 @@ CONFIG_MMC0_CD_PIN="PF6" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x118000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig index 7b12bf00ff2..d0cad2a7461 100644 --- a/configs/orangepi_pc2_defconfig +++ b/configs/orangepi_pc2_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL_SPI_SUNXI=y CONFIG_SPL_STACK=0x54000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/orangepi_prime_defconfig b/configs/orangepi_prime_defconfig index 8c4cb57ef0f..690a5f195b6 100644 --- a/configs/orangepi_prime_defconfig +++ b/configs/orangepi_prime_defconfig @@ -9,6 +9,7 @@ CONFIG_DRAM_ZQ=3881977 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_win_defconfig b/configs/orangepi_win_defconfig index 830cbbaaeba..7a9ca8e88a8 100644 --- a/configs/orangepi_win_defconfig +++ b/configs/orangepi_win_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_REALTEK=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_zero2_defconfig b/configs/orangepi_zero2_defconfig index 62117548e2b..cad7a7bb064 100644 --- a/configs/orangepi_zero2_defconfig +++ b/configs/orangepi_zero2_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_MAX_SIZE=0xbfa0 CONFIG_SPL_STACK=0x58000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/orangepi_zero_plus2_defconfig b/configs/orangepi_zero_plus2_defconfig index 79040125dcc..02f70ccf0c0 100644 --- a/configs/orangepi_zero_plus2_defconfig +++ b/configs/orangepi_zero_plus2_defconfig @@ -11,6 +11,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_zero_plus_defconfig b/configs/orangepi_zero_plus_defconfig index 008384e4601..15520955f5e 100644 --- a/configs/orangepi_zero_plus_defconfig +++ b/configs/orangepi_zero_plus_defconfig @@ -9,6 +9,7 @@ CONFIG_DRAM_ZQ=3881977 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig index dcba51de8e5..3852f7ba07f 100644 --- a/configs/p2371-0000_defconfig +++ b/configs/p2371-0000_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P2371-0000) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2089 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig index f8a8407a7f8..bf5872203b3 100644 --- a/configs/p2371-2180_defconfig +++ b/configs/p2371-2180_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P2371-2180) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2089 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig index 031549470f7..5f57b1c0198 100644 --- a/configs/p2571_defconfig +++ b/configs/p2571_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P2571) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2084 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig index 7b2fd5795a0..ed23937fed5 100644 --- a/configs/p2771-0000-000_defconfig +++ b/configs/p2771-0000-000_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-000) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2093 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig index 41621970f00..15e07a12942 100644 --- a/configs/p2771-0000-500_defconfig +++ b/configs/p2771-0000-500_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-500) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2093 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig index 7604e8a1223..36a001b83b6 100644 --- a/configs/p3450-0000_defconfig +++ b/configs/p3450-0000_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P3450-0000) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2089 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig index a84e0cdd9eb..bc58a631bed 100644 --- a/configs/pg_wcom_expu1_defconfig +++ b/configs/pg_wcom_expu1_defconfig @@ -46,6 +46,7 @@ CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/pg_wcom_expu1_update_defconfig b/configs/pg_wcom_expu1_update_defconfig index f04c3ac6147..5d70160bd3b 100644 --- a/configs/pg_wcom_expu1_update_defconfig +++ b/configs/pg_wcom_expu1_update_defconfig @@ -44,6 +44,7 @@ CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig index 4380d883635..a604d3248f2 100644 --- a/configs/pg_wcom_seli8_defconfig +++ b/configs/pg_wcom_seli8_defconfig @@ -46,6 +46,7 @@ CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/pg_wcom_seli8_update_defconfig b/configs/pg_wcom_seli8_update_defconfig index ca05e25d47e..dfd6d627e1c 100644 --- a/configs/pg_wcom_seli8_update_defconfig +++ b/configs/pg_wcom_seli8_update_defconfig @@ -44,6 +44,7 @@ CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig index d791e9dcf8d..519a705a40e 100644 --- a/configs/phycore-rk3288_defconfig +++ b/configs/phycore-rk3288_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/pico-imx8mq_defconfig b/configs/pico-imx8mq_defconfig index 8e27f723142..6d4bebd6dcf 100644 --- a/configs/pico-imx8mq_defconfig +++ b/configs/pico-imx8mq_defconfig @@ -49,6 +49,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x8000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/pine64-lts_defconfig b/configs/pine64-lts_defconfig index c6b4f7bf143..3f9ea1e329f 100644 --- a/configs/pine64-lts_defconfig +++ b/configs/pine64-lts_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SUN8I_EMAC=y diff --git a/configs/pine64_plus_defconfig b/configs/pine64_plus_defconfig index 7dbe061790c..62608f93bdb 100644 --- a/configs/pine64_plus_defconfig +++ b/configs/pine64_plus_defconfig @@ -8,6 +8,7 @@ CONFIG_PINE64_DT_SELECTION=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_OF_LIST="sun50i-a64-pine64 sun50i-a64-pine64-plus" CONFIG_PHY_REALTEK=y CONFIG_SUN8I_EMAC=y diff --git a/configs/pine_h64_defconfig b/configs/pine_h64_defconfig index 2cddcf58301..2f511c80517 100644 --- a/configs/pine_h64_defconfig +++ b/configs/pine_h64_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x118000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SUN8I_EMAC=y diff --git a/configs/pinebook_defconfig b/configs/pinebook_defconfig index bf070aab8b3..982f68143b9 100644 --- a/configs/pinebook_defconfig +++ b/configs/pinebook_defconfig @@ -10,6 +10,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_R_I2C_ENABLE=y CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_DM_REGULATOR_FIXED=y diff --git a/configs/pinephone_defconfig b/configs/pinephone_defconfig index d882c0cc880..905b47d29e6 100644 --- a/configs/pinephone_defconfig +++ b/configs/pinephone_defconfig @@ -12,6 +12,7 @@ CONFIG_PINEPHONE_DT_SELECTION=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_OF_LIST="sun50i-a64-pinephone-1.1 sun50i-a64-pinephone-1.2" CONFIG_LED_STATUS=y CONFIG_LED_STATUS_GPIO=y diff --git a/configs/pinetab_defconfig b/configs/pinetab_defconfig index f90cb0d1f81..e20d20a2fd5 100644 --- a/configs/pinetab_defconfig +++ b/configs/pinetab_defconfig @@ -10,3 +10,4 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 diff --git a/configs/pomelo_defconfig b/configs/pomelo_defconfig index 13b1d7b628b..515624fd42e 100644 --- a/configs/pomelo_defconfig +++ b/configs/pomelo_defconfig @@ -18,6 +18,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_SYS_PROMPT="pomelo#" CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=280 +CONFIG_SYS_BOOTM_LEN=0x3c00000 CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig index 5b5039e290b..7b024437c2b 100644 --- a/configs/popmetal-rk3288_defconfig +++ b/configs/popmetal-rk3288_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/qemu-riscv32_defconfig b/configs/qemu-riscv32_defconfig index 1f169e1a34f..9634d7f77f1 100644 --- a/configs/qemu-riscv32_defconfig +++ b/configs/qemu-riscv32_defconfig @@ -13,6 +13,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set diff --git a/configs/qemu-riscv32_smode_defconfig b/configs/qemu-riscv32_smode_defconfig index 6f501a8798c..1c5a0617aa8 100644 --- a/configs/qemu-riscv32_smode_defconfig +++ b/configs/qemu-riscv32_smode_defconfig @@ -14,6 +14,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig index 2bc7b9fbd0f..2421c9a3719 100644 --- a/configs/qemu-riscv32_spl_defconfig +++ b/configs/qemu-riscv32_spl_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_BSS_START_ADDR=0x84000000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_MII is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y diff --git a/configs/qemu-riscv64_defconfig b/configs/qemu-riscv64_defconfig index 95dc1b47699..d5eae95c80f 100644 --- a/configs/qemu-riscv64_defconfig +++ b/configs/qemu-riscv64_defconfig @@ -14,6 +14,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig index 3eb3ea756e4..2861d07f97e 100644 --- a/configs/qemu-riscv64_smode_defconfig +++ b/configs/qemu-riscv64_smode_defconfig @@ -17,6 +17,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig index e39accf9400..1ecfa27ce29 100644 --- a/configs/qemu-riscv64_spl_defconfig +++ b/configs/qemu-riscv64_spl_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_BSS_START_ADDR=0x84000000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_MII is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig index d14a7adc5df..50945472315 100644 --- a/configs/qemu_arm_defconfig +++ b/configs/qemu_arm_defconfig @@ -28,6 +28,7 @@ CONFIG_USE_PREBOOT=y CONFIG_PCI_INIT_R=y CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_DFU=y diff --git a/configs/rock-pi-n8-rk3288_defconfig b/configs/rock-pi-n8-rk3288_defconfig index 7abb343ad69..87b050f5dc8 100644 --- a/configs/rock-pi-n8-rk3288_defconfig +++ b/configs/rock-pi-n8-rk3288_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_SPL=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig index c06ab641c30..dcececdc315 100644 --- a/configs/rock2_defconfig +++ b/configs/rock2_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig index 20ca98821a0..860362e1589 100644 --- a/configs/sama7g5ek_mmc1_defconfig +++ b/configs/sama7g5ek_mmc1_defconfig @@ -28,6 +28,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_IMI is not set CONFIG_CMD_MD5SUM=y CONFIG_CMD_MEMTEST=y diff --git a/configs/sama7g5ek_mmc_defconfig b/configs/sama7g5ek_mmc_defconfig index c9f62a8ebe5..bc2852f0916 100644 --- a/configs/sama7g5ek_mmc_defconfig +++ b/configs/sama7g5ek_mmc_defconfig @@ -28,6 +28,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_IMI is not set CONFIG_CMD_MD5SUM=y CONFIG_CMD_MEMTEST=y diff --git a/configs/sifive_unleashed_defconfig b/configs/sifive_unleashed_defconfig index 84bc49c0f23..99faabaa2ff 100644 --- a/configs/sifive_unleashed_defconfig +++ b/configs/sifive_unleashed_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_DM_RESET=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_CLK=y diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig index 02d4e54b071..c390af26897 100644 --- a/configs/sifive_unmatched_defconfig +++ b/configs/sifive_unmatched_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_DM_RESET=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_EEPROM=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_PWM=y diff --git a/configs/socfpga_agilex_atf_defconfig b/configs/socfpga_agilex_atf_defconfig index 8f2d26e43d0..bdfe764d9e4 100644 --- a/configs/socfpga_agilex_atf_defconfig +++ b/configs/socfpga_agilex_atf_defconfig @@ -48,6 +48,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2082 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig index 7ae2b164a02..e2d869610cf 100644 --- a/configs/socfpga_agilex_defconfig +++ b/configs/socfpga_agilex_defconfig @@ -42,6 +42,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2082 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_agilex_vab_defconfig b/configs/socfpga_agilex_vab_defconfig index 2beadc7ff7a..6f15b3e9622 100644 --- a/configs/socfpga_agilex_vab_defconfig +++ b/configs/socfpga_agilex_vab_defconfig @@ -49,6 +49,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2082 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_n5x_atf_defconfig b/configs/socfpga_n5x_atf_defconfig index 2917ece783d..37c84363188 100644 --- a/configs/socfpga_n5x_atf_defconfig +++ b/configs/socfpga_n5x_atf_defconfig @@ -47,6 +47,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_N5X # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2079 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_n5x_defconfig b/configs/socfpga_n5x_defconfig index 92d6045c6a7..5f415b7ad4f 100644 --- a/configs/socfpga_n5x_defconfig +++ b/configs/socfpga_n5x_defconfig @@ -39,6 +39,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_N5X # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2079 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_n5x_vab_defconfig b/configs/socfpga_n5x_vab_defconfig index b9358fcc5d0..a57d54a7f27 100644 --- a/configs/socfpga_n5x_vab_defconfig +++ b/configs/socfpga_n5x_vab_defconfig @@ -48,6 +48,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_N5X # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2079 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig index 4a244e17bc4..83e24402a88 100644 --- a/configs/socfpga_secu1_defconfig +++ b/configs/socfpga_secu1_defconfig @@ -44,6 +44,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1 CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/socfpga_stratix10_atf_defconfig b/configs/socfpga_stratix10_atf_defconfig index 6c8ea81b67b..6be4210c7d6 100644 --- a/configs/socfpga_stratix10_atf_defconfig +++ b/configs/socfpga_stratix10_atf_defconfig @@ -47,6 +47,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2085 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index 6aff07d7784..07e9f20a41a 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -43,6 +43,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2085 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index 0f4aa905147..d0c87416efd 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_CMDLINE_PS_SUPPORT=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig index 62157365378..60a38abc8e3 100644 --- a/configs/socrates_defconfig +++ b/configs/socrates_defconfig @@ -28,6 +28,7 @@ CONFIG_CMD_REGINFO=y # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_IMLS=y CONFIG_CMD_DM=y CONFIG_CMD_I2C=y diff --git a/configs/sopine_baseboard_defconfig b/configs/sopine_baseboard_defconfig index 576e86493a2..55116f72d0d 100644 --- a/configs/sopine_baseboard_defconfig +++ b/configs/sopine_baseboard_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SUN8I_EMAC=y diff --git a/configs/stemmy_defconfig b/configs/stemmy_defconfig index 28a31298737..7fc0a39872c 100644 --- a/configs/stemmy_defconfig +++ b/configs/stemmy_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_CONFIG=y CONFIG_CMD_LICENSE=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig index cb8c73afd47..c9be056cf62 100644 --- a/configs/stih410-b2260_defconfig +++ b/configs/stih410-b2260_defconfig @@ -19,6 +19,7 @@ CONFIG_BOOTARGS="console=ttyAS1,115200 CONSOLE=/dev/ttyAS1 consoleblank=0 root=/ # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="stih410-b2260 => " CONFIG_SYS_PBSIZE=1058 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig index b5dcec78f51..f5b62628833 100644 --- a/configs/stm32mp13_defconfig +++ b/configs/stm32mp13_defconfig @@ -18,6 +18,7 @@ CONFIG_FIT=y CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_SYS_PROMPT="STM32MP> " +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig index 76a450952fc..c70329cd4a6 100644 --- a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig index d413d2cac4b..838fd89eb99 100644 --- a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig index dd270975508..d503c1a36fe 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig index 54a5385926f..c2792aaad30 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index a17dbed6590..416d92bf1bb 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -47,6 +47,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index 48185d32baa..3452403c61d 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -23,6 +23,7 @@ CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 178c51687be..4f478c13120 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -52,6 +52,7 @@ CONFIG_SPL_DFU=y CONFIG_SPL_TARGET="u-boot.itb" CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXPORTENV is not set CONFIG_CMD_EEPROM=y diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index 67a2c249007..01fbb05123a 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -50,6 +50,7 @@ CONFIG_SPL_DFU=y CONFIG_SPL_TARGET="u-boot.itb" CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXPORTENV is not set CONFIG_CMD_EEPROM=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index 7cb430fc328..e14668042fa 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -24,6 +24,7 @@ CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/synquacer_developerbox_defconfig b/configs/synquacer_developerbox_defconfig index 5e4accf4b12..9ddc80fe17d 100644 --- a/configs/synquacer_developerbox_defconfig +++ b/configs/synquacer_developerbox_defconfig @@ -17,6 +17,7 @@ CONFIG_FIT=y CONFIG_BOOTSTAGE_STASH_SIZE=4096 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=128 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_IMLS=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig index 4db09311895..51f629488b9 100644 --- a/configs/syzygy_hub_defconfig +++ b/configs/syzygy_hub_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0x10000000 CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=2071 +CONFIG_SYS_BOOTM_LEN=0x3c00000 CONFIG_CMD_FPGA_LOADBP=y CONFIG_CMD_FPGA_LOADFS=y CONFIG_CMD_FPGA_LOADMK=y diff --git a/configs/tanix_tx6_defconfig b/configs/tanix_tx6_defconfig index d1f12fba9bb..84dbf106d49 100644 --- a/configs/tanix_tx6_defconfig +++ b/configs/tanix_tx6_defconfig @@ -10,3 +10,4 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x118000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 diff --git a/configs/tb100_defconfig b/configs/tb100_defconfig index 575bf2dae28..aebaa6ad147 100644 --- a/configs/tb100_defconfig +++ b/configs/tb100_defconfig @@ -15,6 +15,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_SYS_PROMPT="[tb100]:~# " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=284 +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y diff --git a/configs/teres_i_defconfig b/configs/teres_i_defconfig index cd6d825715e..6f202dc8a43 100644 --- a/configs/teres_i_defconfig +++ b/configs/teres_i_defconfig @@ -11,6 +11,7 @@ CONFIG_I2C0_ENABLE=y CONFIG_PREBOOT="setenv usb_pgood_delay 2000; usb start" CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_DM_REGULATOR_FIXED=y diff --git a/configs/thunderx_88xx_defconfig b/configs/thunderx_88xx_defconfig index 03b6201591f..71fbf2122cd 100644 --- a/configs/thunderx_88xx_defconfig +++ b/configs/thunderx_88xx_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_PROMPT="ThunderX_88XX> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=544 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_EDITENV is not set diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig index ce12b79ac47..839b93284f8 100644 --- a/configs/tinker-rk3288_defconfig +++ b/configs/tinker-rk3288_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig index 8dede27efcc..886c6a933a7 100644 --- a/configs/tinker-s-rk3288_defconfig +++ b/configs/tinker-s-rk3288_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x300000 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig index 4e8519b5b1b..faa0c4b10e2 100644 --- a/configs/topic_miami_defconfig +++ b/configs/topic_miami_defconfig @@ -38,6 +38,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SYS_PROMPT="zynq-uboot> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=2077 +CONFIG_SYS_BOOTM_LEN=0x3c00000 CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig index 7b97527507e..97b3f237dc3 100644 --- a/configs/topic_miamilite_defconfig +++ b/configs/topic_miamilite_defconfig @@ -38,6 +38,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SYS_PROMPT="zynq-uboot> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=2077 +CONFIG_SYS_BOOTM_LEN=0x3c00000 CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig index 372bf654ba6..4c76e8d1805 100644 --- a/configs/topic_miamiplus_defconfig +++ b/configs/topic_miamiplus_defconfig @@ -38,6 +38,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SYS_PROMPT="zynq-uboot> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=2077 +CONFIG_SYS_BOOTM_LEN=0x3c00000 CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig index 1bd48cb82a1..0d1c99c62c5 100644 --- a/configs/tuge1_defconfig +++ b/configs/tuge1_defconfig @@ -134,6 +134,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/tuxx1_defconfig b/configs/tuxx1_defconfig index 8f273da2f1f..3fe731fd188 100644 --- a/configs/tuxx1_defconfig +++ b/configs/tuxx1_defconfig @@ -156,6 +156,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig index 72306ab25eb..5de9a688343 100644 --- a/configs/uniphier_ld4_sld8_defconfig +++ b/configs/uniphier_ld4_sld8_defconfig @@ -27,6 +27,7 @@ CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_CMD_CONFIG=y +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_XIMG is not set CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_GPIO=y diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig index a448d1cb4be..b6b5ca58c27 100644 --- a/configs/uniphier_v7_defconfig +++ b/configs/uniphier_v7_defconfig @@ -27,6 +27,7 @@ CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_CMD_CONFIG=y +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_XIMG is not set CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_GPIO=y diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig index db986cf13b8..eccfb0dbb16 100644 --- a/configs/uniphier_v8_defconfig +++ b/configs/uniphier_v8_defconfig @@ -16,6 +16,7 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="env exist ${bootdev}preboot && run ${bootdev}preboot" CONFIG_LOGLEVEL=6 CONFIG_CMD_CONFIG=y +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_XIMG is not set CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_GPIO=y diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig index cbaf970e6ad..516e2cc32b8 100644 --- a/configs/vyasa-rk3288_defconfig +++ b/configs/vyasa-rk3288_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x8800 CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x8000 CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x10 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_SPL=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y diff --git a/configs/xenguest_arm64_defconfig b/configs/xenguest_arm64_defconfig index fec124204b7..31fb4fde40e 100644 --- a/configs/xenguest_arm64_defconfig +++ b/configs/xenguest_arm64_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1051 # CONFIG_CMD_BDI is not set # CONFIG_CMD_BOOTD is not set +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_GO is not set # CONFIG_CMD_IMI is not set diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index c50ea96afc7..b91955ccaaf 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -24,6 +24,7 @@ CONFIG_CLOCKS=y CONFIG_SYS_PROMPT="Versal> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2073 +CONFIG_SYS_BOOTM_LEN=0x6400000 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_MEMTEST=y diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index fb4e72be0dd..b3834b4952f 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -47,6 +47,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=2071 # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x3c00000 CONFIG_CMD_IMLS=y CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_MEMTEST=y diff --git a/configs/xilinx_zynqmp_r5_defconfig b/configs/xilinx_zynqmp_r5_defconfig index 1ae63490306..1784792ce49 100644 --- a/configs/xilinx_zynqmp_r5_defconfig +++ b/configs/xilinx_zynqmp_r5_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_PROMPT="ZynqMP r5> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=284 +CONFIG_SYS_BOOTM_LEN=0x3c00000 # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_BOOTSTAGE=y CONFIG_OF_EMBED=y diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 855a1c97731..89622d18f8e 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -55,6 +55,7 @@ CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2073 +CONFIG_SYS_BOOTM_LEN=0x6400000 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index 14b35d7ef50..c773164c869 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -78,7 +78,6 @@ * the maximum mapped by the Linux kernel during initialization ?? */ #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) -#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20) /* FLASH organization */ #ifdef CONFIG_SYS_FLASH_CFI diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 762d1dd94b1..79448cf4404 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -84,7 +84,6 @@ */ /* Initial Memory map for Linux */ #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) -#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20) /*----------------------------------------------------------------------- * FLASH organization diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index 840d3b4672e..cac9b24ead8 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -90,7 +90,6 @@ * the maximum mapped by the Linux kernel during initialization ?? */ #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) -#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20) /* FLASH organization */ #define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE) diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 4f6fc6d8cb9..292578fc15b 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -87,7 +87,6 @@ * the maximum mapped by the Linux kernel during initialization ?? */ #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) -#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20) /*----------------------------------------------------------------------- * FLASH organization diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index 90b0d41078a..4d8f752777d 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -92,7 +92,6 @@ * the maximum mapped by the Linux kernel during initialization ?? */ #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) -#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20) /*----------------------------------------------------------------------- * FLASH organization diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index 6eaa660e11f..87d3e8fb153 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -86,7 +86,6 @@ * the maximum mapped by the Linux kernel during initialization ?? */ #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) -#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20) /*----------------------------------------------------------------------- * FLASH organization diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index 2e3988f6c72..d920587c379 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -88,7 +88,6 @@ * the maximum mapped by the Linux kernel during initialization ?? */ #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) -#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20) /*----------------------------------------------------------------------- * FLASH organization diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index b6621f9a072..d56d60306ab 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -248,7 +248,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Initial Memory map for Linux */ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ /* * Environment Configuration diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 2eb33812f76..c3c68071f2f 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -356,7 +356,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ /* * Environment Configuration diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index b5e0e2901f0..d263999b5a7 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -477,7 +477,6 @@ extern unsigned long get_sdram_size(void); * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux */ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ /* * Environment Configuration diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 27889e3033c..64f4c244fa2 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -353,7 +353,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory for Linux */ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ /* * Environment Configuration diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index aa80d400bd9..3df6ec6246a 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -457,7 +457,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ /* * Environment Configuration diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 2fb181090b5..8503fd10879 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -447,7 +447,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ /* * Dynamic MTD Partition support with mtdparts diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 84dfc894819..e981f621c37 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -464,7 +464,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ /* * Environment Configuration diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 716e9c3d556..48cdc75a08d 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -418,7 +418,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ /* * Environment Configuration diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index e697d8490c9..c31b0b68415 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -152,7 +152,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ /* * Environment Configuration diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index f0a979423de..4b59759f818 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -19,8 +19,6 @@ #include #include -#define CONFIG_SYS_BOOTM_LEN SZ_16M - /* Clock Defines */ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) diff --git a/include/configs/am335x_guardian.h b/include/configs/am335x_guardian.h index 356c21a1b0a..7a9928fba74 100644 --- a/include/configs/am335x_guardian.h +++ b/include/configs/am335x_guardian.h @@ -12,8 +12,6 @@ #include -#define CONFIG_SYS_BOOTM_LEN (16 << 20) - /* Clock Defines */ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) diff --git a/include/configs/am335x_shc.h b/include/configs/am335x_shc.h index 5964ccc74c2..08bae9b886f 100644 --- a/include/configs/am335x_shc.h +++ b/include/configs/am335x_shc.h @@ -16,8 +16,6 @@ /* settings we don;t want on this board */ -#define CONFIG_SYS_BOOTM_LEN (16 << 20) - /* Clock Defines */ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) diff --git a/include/configs/am335x_sl50.h b/include/configs/am335x_sl50.h index 4289836bc3f..7df5f140551 100644 --- a/include/configs/am335x_sl50.h +++ b/include/configs/am335x_sl50.h @@ -10,8 +10,6 @@ #include -#define CONFIG_SYS_BOOTM_LEN (16 << 20) - /* Clock Defines */ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h index c36311e06d7..d8b0531673f 100644 --- a/include/configs/am57xx_evm.h +++ b/include/configs/am57xx_evm.h @@ -16,8 +16,6 @@ #define CONFIG_IODELAY_RECALIBRATION -#define CONFIG_SYS_BOOTM_LEN SZ_64M - #define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */ #define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */ #define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */ diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h index d8f18d0b9ac..0345160787e 100644 --- a/include/configs/am65x_evm.h +++ b/include/configs/am65x_evm.h @@ -17,8 +17,6 @@ /* DDR Configuration */ #define CONFIG_SYS_SDRAM_BASE1 0x880000000 -#define CONFIG_SYS_BOOTM_LEN SZ_64M - #define PARTS_DEFAULT \ /* Linux partitions */ \ "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index 4a3e51d19ef..c9f876f5da7 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -63,8 +63,6 @@ /* On Apalis iMX8 USDHC1 is eMMC, USDHC2 is 8-bit and USDHC3 is 4-bit MMC/SD */ #define CONFIG_SYS_FSL_USDHC_NUM 3 -#define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */ - #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 #define PHYS_SDRAM_2 0x880000000 diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index 754e9096194..daa5cdf5b26 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -73,7 +73,6 @@ /* Initial Memory map for Linux*/ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Increase max gunzip size */ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Support autoboot from RAM (kernel image is loaded via debug port) */ #define KERNEL_IMAGE_ADDR "0x2000000 " diff --git a/include/configs/axs10x.h b/include/configs/axs10x.h index 3e98ce09c72..f2357b5785a 100644 --- a/include/configs/axs10x.h +++ b/include/configs/axs10x.h @@ -23,8 +23,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_512M -#define CONFIG_SYS_BOOTM_LEN SZ_128M - /* * UART configuration */ diff --git a/include/configs/baltos.h b/include/configs/baltos.h index 25906e404b1..266b2ae04b3 100644 --- a/include/configs/baltos.h +++ b/include/configs/baltos.h @@ -24,7 +24,6 @@ #define V_SCLK (V_OSCK) /* FIT support */ -#define CONFIG_SYS_BOOTM_LEN SZ_64M #ifdef CONFIG_MTD_RAW_NAND diff --git a/include/configs/bcm947622.h b/include/configs/bcm947622.h index 3a02806878b..d0c46a2c823 100644 --- a/include/configs/bcm947622.h +++ b/include/configs/bcm947622.h @@ -6,8 +6,6 @@ #ifndef __BCM947622_H #define __BCM947622_H -#define CONFIG_SYS_BOOTM_LEN (32 * 1024 * 1024) - #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define COUNTER_FREQUENCY 50000000 diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h index 97e1a88f270..795de469384 100644 --- a/include/configs/bcm_ns3.h +++ b/include/configs/bcm_ns3.h @@ -32,7 +32,6 @@ * Increase max uncompressed/gunzip size, keeping size same as EMMC linux * partition. */ -#define CONFIG_SYS_BOOTM_LEN 0x01800000 /* Access eMMC Boot_1 and Boot_2 partitions */ diff --git a/include/configs/bcmstb.h b/include/configs/bcmstb.h index ed78b732121..134a3ec2892 100644 --- a/include/configs/bcmstb.h +++ b/include/configs/bcmstb.h @@ -91,7 +91,6 @@ extern phys_addr_t prior_stage_fdt_address; /* * Large kernel image bootm configuration. */ -#define CONFIG_SYS_BOOTM_LEN SZ_64M /* * NS16550 configuration. diff --git a/include/configs/boston.h b/include/configs/boston.h index 3bf85b6c28d..8b04492753a 100644 --- a/include/configs/boston.h +++ b/include/configs/boston.h @@ -9,7 +9,6 @@ /* * General board configuration */ -#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) /* * CPU diff --git a/include/configs/broadcom_bcm963158.h b/include/configs/broadcom_bcm963158.h index 493114836c8..0c8d352be97 100644 --- a/include/configs/broadcom_bcm963158.h +++ b/include/configs/broadcom_bcm963158.h @@ -13,7 +13,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ 230400, 500000, 1500000 } /* Memory usage */ -#define CONFIG_SYS_BOOTM_LEN (16 * 1024 * 1024) /* * 63158 diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h index c046fcb2bec..789e6a4c9d5 100644 --- a/include/configs/brppt1.h +++ b/include/configs/brppt1.h @@ -16,7 +16,6 @@ #include /* ------------------------------------------------------------------------- */ /* memory */ -#define CONFIG_SYS_BOOTM_LEN SZ_32M /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ diff --git a/include/configs/brsmarc1.h b/include/configs/brsmarc1.h index 8fa5843be5d..f9908352b0d 100644 --- a/include/configs/brsmarc1.h +++ b/include/configs/brsmarc1.h @@ -18,7 +18,6 @@ /* ------------------------------------------------------------------------- */ /* memory */ -#define CONFIG_SYS_BOOTM_LEN (32 * 1024 * 1024) /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ diff --git a/include/configs/ci20.h b/include/configs/ci20.h index 01f63649053..192da015e18 100644 --- a/include/configs/ci20.h +++ b/include/configs/ci20.h @@ -28,6 +28,5 @@ #define DM9000_DATA (CONFIG_DM9000_BASE + 2) /* Miscellaneous configuration options */ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) #endif /* __CONFIG_CI20_H__ */ diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h index fb7de896b75..5d6449c7f74 100644 --- a/include/configs/colibri-imx8x.h +++ b/include/configs/colibri-imx8x.h @@ -96,8 +96,6 @@ /* On Colibri iMX8X USDHC1 is eMMC, USDHC2 is 4-bit SD */ #define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */ - #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 #define PHYS_SDRAM_2 0x880000000 diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index d1a5d866d2d..f20f4e35e95 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -345,7 +345,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ /* * Environment Configuration diff --git a/include/configs/crs3xx-98dx3236.h b/include/configs/crs3xx-98dx3236.h index 07769c9e0e4..25bcc2a6841 100644 --- a/include/configs/crs3xx-98dx3236.h +++ b/include/configs/crs3xx-98dx3236.h @@ -10,8 +10,6 @@ * High Level Configuration Options (easy to change) */ -#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) /* 64 MB */ - /* Environment in SPI NOR flash */ /* Keep device tree and initrd in lower memory so the kernel can access them */ diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h index e1d580b1c8f..c37b4c635b2 100644 --- a/include/configs/dragonboard410c.h +++ b/include/configs/dragonboard410c.h @@ -18,7 +18,6 @@ /* Note: 8 MiB (0x86000000 - 0x86800000) are reserved for tz/smem/hyp/rmtfs/rfsa */ #define PHYS_SDRAM_1_SIZE SZ_1G #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_BOOTM_LEN SZ_64M /* Environment */ #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/dragonboard820c.h b/include/configs/dragonboard820c.h index 705146d04f7..1fa5d05e7b4 100644 --- a/include/configs/dragonboard820c.h +++ b/include/configs/dragonboard820c.h @@ -20,7 +20,6 @@ #define PHYS_SDRAM_2_SIZE 0x5ea4ffff #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_BOOTM_LEN SZ_64M #include diff --git a/include/configs/durian.h b/include/configs/durian.h index 7971df8c1d3..8f0e8be4330 100644 --- a/include/configs/durian.h +++ b/include/configs/durian.h @@ -14,7 +14,6 @@ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* BOOT */ -#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) #define CONFIG_EXTRA_ENV_SETTINGS \ "load_kernel=ext4load scsi 0:1 0x90100000 uImage-2004\0" \ diff --git a/include/configs/exynos78x0-common.h b/include/configs/exynos78x0-common.h index 6b1de18bc15..b05846d0b92 100644 --- a/include/configs/exynos78x0-common.h +++ b/include/configs/exynos78x0-common.h @@ -22,7 +22,6 @@ {9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600} #define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define CONFIG_SYS_BOOTM_LEN SZ_32M /* DRAM Memory Banks */ #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 4a0aaf4da58..82076ff74ff 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -22,9 +22,6 @@ /* NAND */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#undef CONFIG_SYS_BOOTM_LEN -#define CONFIG_SYS_BOOTM_LEN (64 << 20) - /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 33e9aa5ffb4..5be6eb4e766 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -15,8 +15,6 @@ #define CONFIG_POWER_HI6553 -#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* Physical Memory Map */ /* CONFIG_SYS_TEXT_BASE needs to align with where ATF loads bl33.bin */ diff --git a/include/configs/hikey960.h b/include/configs/hikey960.h index caa6abb9d9d..ad070439d00 100644 --- a/include/configs/hikey960.h +++ b/include/configs/hikey960.h @@ -9,8 +9,6 @@ #include -#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* Physical Memory Map */ /* CONFIG_SYS_TEXT_BASE needs to align with where ATF loads bl33.bin */ diff --git a/include/configs/hsdk-4xd.h b/include/configs/hsdk-4xd.h index 03ca9281c82..4af845ea9c2 100644 --- a/include/configs/hsdk-4xd.h +++ b/include/configs/hsdk-4xd.h @@ -25,8 +25,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_1G -#define CONFIG_SYS_BOOTM_LEN SZ_128M - /* * UART configuration */ diff --git a/include/configs/hsdk.h b/include/configs/hsdk.h index 0b8ac78e279..0ce65e7755e 100644 --- a/include/configs/hsdk.h +++ b/include/configs/hsdk.h @@ -24,8 +24,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_1G -#define CONFIG_SYS_BOOTM_LEN SZ_128M - /* * UART configuration */ diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index 60a0c16f904..c69f2fa19f3 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -11,7 +11,6 @@ #include #include -#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h index 5392569a556..fb05958bdc8 100644 --- a/include/configs/imx8mm_data_modul_edm_sbc.h +++ b/include/configs/imx8mm_data_modul_edm_sbc.h @@ -10,8 +10,6 @@ #include #include -#define CONFIG_SYS_BOOTM_LEN SZ_128M - #define CONFIG_SYS_MONITOR_LEN SZ_1M #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index 227e9649f53..5e9e3e800d8 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -10,7 +10,6 @@ #include #include -#define CONFIG_SYS_BOOTM_LEN (64 * SZ_1M) #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index ec4aea337c9..6b7f3af53a2 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -47,7 +47,6 @@ /* SDRAM configuration */ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */ -#define CONFIG_SYS_BOOTM_LEN SZ_256M /* USDHC */ #define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index cfcad110c71..13015604509 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -83,7 +83,6 @@ /* SDRAM configuration */ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE SZ_4G -#define CONFIG_SYS_BOOTM_LEN SZ_256M /* FEC */ #define CONFIG_FEC_MXC_PHYADDR 0 diff --git a/include/configs/imx8mn_bsh_smm_s2_common.h b/include/configs/imx8mn_bsh_smm_s2_common.h index 63f7da740ef..a371c5b3832 100644 --- a/include/configs/imx8mn_bsh_smm_s2_common.h +++ b/include/configs/imx8mn_bsh_smm_s2_common.h @@ -10,8 +10,6 @@ #include #include -#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) - #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index 9de31cfe81c..ae7fcb1027a 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -10,8 +10,6 @@ #include #include -#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) - #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mn_var_som.h b/include/configs/imx8mn_var_som.h index ccf83128f28..c8604e0de59 100644 --- a/include/configs/imx8mn_var_som.h +++ b/include/configs/imx8mn_var_som.h @@ -10,8 +10,6 @@ #include #include -#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) - #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index adac387fac9..c43c4da6fbf 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -79,7 +79,6 @@ /* SDRAM configuration */ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE SZ_4G -#define CONFIG_SYS_BOOTM_LEN SZ_256M /* FEC */ #define CONFIG_FEC_MXC_PHYADDR 0 diff --git a/include/configs/imx8mp_dhcom_pdk2.h b/include/configs/imx8mp_dhcom_pdk2.h index 797ea0c7fad..4b4731c3035 100644 --- a/include/configs/imx8mp_dhcom_pdk2.h +++ b/include/configs/imx8mp_dhcom_pdk2.h @@ -10,8 +10,6 @@ #include #include -#define CONFIG_SYS_BOOTM_LEN SZ_128M - #define CONFIG_SYS_MONITOR_LEN SZ_1M /* Link Definitions */ diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index f161cffb971..5581c0fac02 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -10,8 +10,6 @@ #include #include -#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) - #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index 1d4c057ccc0..17e00f958b6 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -12,8 +12,6 @@ #include #include -#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) - #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h index 51fdcb7d5b1..9f4c1b161f7 100644 --- a/include/configs/imx8mp_venice.h +++ b/include/configs/imx8mp_venice.h @@ -79,7 +79,6 @@ /* SDRAM configuration */ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE SZ_4G -#define CONFIG_SYS_BOOTM_LEN SZ_256M /* FEC */ #define FEC_QUIRK_ENET_MAC diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index f7a254359c9..ab74d5b26b6 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -10,8 +10,6 @@ #include #include -#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) - #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 43328082edc..ea4305667f2 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -10,8 +10,6 @@ #include #include -#define CONFIG_SYS_BOOTM_LEN (64 * SZ_1M) - #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index 25d35f04e27..5f9d06e0f6f 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -10,8 +10,6 @@ #include #include -#define CONFIG_SYS_BOOTM_LEN (64 * SZ_1M) - #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h index 88d38a1dcbd..308f17fd595 100644 --- a/include/configs/imx8qm_rom7720.h +++ b/include/configs/imx8qm_rom7720.h @@ -16,8 +16,6 @@ #define USDHC2_BASE_ADDR 0x5B020000 #define USDHC3_BASE_ADDR 0x5B030000 -#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* FUSE command */ /* Boot M4 */ diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index f9080216f1f..ebfc166b4d4 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -9,7 +9,6 @@ #include #include -#define CONFIG_SYS_BOOTM_LEN (SZ_64M) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/iot2050.h b/include/configs/iot2050.h index d379bad0b15..0f6150fc9c7 100644 --- a/include/configs/iot2050.h +++ b/include/configs/iot2050.h @@ -15,8 +15,6 @@ /* SPL Loader Configuration */ -#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* U-Boot general configuration */ #define EXTRA_ENV_IOT2050_BOARD_SETTINGS \ "usb_pgood_delay=900\0" diff --git a/include/configs/iot_devkit.h b/include/configs/iot_devkit.h index 0ebb1b526e9..a2e50c3b8df 100644 --- a/include/configs/iot_devkit.h +++ b/include/configs/iot_devkit.h @@ -53,8 +53,6 @@ #define CONFIG_SYS_SDRAM_BASE DCCM_BASE #define CONFIG_SYS_SDRAM_SIZE DCCM_SIZE -#define CONFIG_SYS_BOOTM_LEN SZ_128K - #define ROM_BASE CONFIG_SYS_MONITOR_BASE #define ROM_SIZE SZ_256K diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index ecf87647810..9f54f259994 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -28,8 +28,6 @@ #define CONFIG_SYS_UBOOT_BASE 0x50080000 #endif -#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* HyperFlash related configuration */ /* U-Boot general configuration */ diff --git a/include/configs/j721s2_evm.h b/include/configs/j721s2_evm.h index 4c3a155a950..932d7d3c8cb 100644 --- a/include/configs/j721s2_evm.h +++ b/include/configs/j721s2_evm.h @@ -27,8 +27,6 @@ #define CONFIG_SYS_UBOOT_BASE 0x50080000 #endif -#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* U-Boot general configuration */ #define EXTRA_ENV_J721S2_BOARD_SETTINGS \ "default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ diff --git a/include/configs/km/km-powerpc.h b/include/configs/km/km-powerpc.h index a9a6a41f6b7..6becd7cd31a 100644 --- a/include/configs/km/km-powerpc.h +++ b/include/configs/km/km-powerpc.h @@ -13,7 +13,6 @@ #define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE /* Increase max size of compressed kernel */ -#define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MB */ /****************************************************************************** * (PRAM usage) diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h index a485c3ac6d1..eee71db37c2 100644 --- a/include/configs/km/km_arm.h +++ b/include/configs/km/km_arm.h @@ -25,7 +25,6 @@ #include "keymile-common.h" /* Increase max size of compressed kernel */ -#define CONFIG_SYS_BOOTM_LEN (32 << 20) #include "asm/arch/config.h" diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index dd6747388c7..f8373901350 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -249,7 +249,6 @@ "ethrotate=no\0" \ "" -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Increase map for Linux */ #endif diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index ff9d7d59a39..3f22ddc6dd8 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -409,7 +409,6 @@ int get_scl(void); * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ /* * Environment Configuration diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h index 6b591ed7872..622ab597624 100644 --- a/include/configs/kontron-sl-mx8mm.h +++ b/include/configs/kontron-sl-mx8mm.h @@ -45,8 +45,6 @@ #undef BOOTENV_RUN_NET_USB_START #define BOOTENV_RUN_NET_USB_START -#define CONFIG_SYS_BOOTM_LEN SZ_64M - #ifdef CONFIG_SPL_BUILD /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x930000 diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index bf336b99d6a..d77e4b4e100 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -7,8 +7,6 @@ #include #include -#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) - #define CONFIG_SYS_MONITOR_LEN (512 * SZ_1K) /* GUID for capsule updatable firmware image */ diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 0c194ee575b..87eb10db19f 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -57,8 +57,6 @@ "bootm $kernel_load" #endif -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - #include #endif /* __LS1012A_COMMON_H */ diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 1a46f72a735..517ade383be 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -333,6 +333,5 @@ */ #include -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ #endif diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index e5754c94e0f..2fbd495e119 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -162,6 +162,4 @@ /* Environment */ -#define CONFIG_SYS_BOOTM_LEN 0x8000000 /* 128 MB */ - #endif diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 09dce21aec5..1aa29e541ec 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -324,6 +324,5 @@ */ #include -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ #endif diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index 5b0b86b39be..b104524becb 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -57,8 +57,6 @@ "run emmc_hdploadcmd; run distro_bootcmd;run emmc_bootcmd; " \ "env exists secureboot && esbc_halt;" -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - #define OCRAM_NONSECURE_SIZE 0x00010000 #define CONFIG_SYS_FSL_QSPI_BASE 0x20000000 diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index ed32e20dbf4..95cbcb036eb 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -217,8 +217,6 @@ #endif #endif -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - #include #endif /* __LS1043A_COMMON_H */ diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 94118c420e6..2e48ea0f8aa 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -191,8 +191,6 @@ #endif -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - #include #endif /* __LS1046A_COMMON_H */ diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index ff85f1eb4ac..4b8462da7bc 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -153,6 +153,5 @@ unsigned long long get_qixis_addr(void); #endif /* ifdef CONFIG_NXP_ESBC */ #endif -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ #endif /* __LS1088_COMMON_H */ diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index d2978713e6b..3e86d1bff21 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -139,8 +139,6 @@ unsigned long long get_qixis_addr(void); #endif #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - #include #endif /* __LS2_COMMON_H */ diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 77e25822dcd..b7543731691 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -96,8 +96,6 @@ #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - /* Initial environment variables */ #define XSPI_MC_INIT_CMD \ "sf probe 0:0 && " \ diff --git a/include/configs/malta.h b/include/configs/malta.h index affee006940..c8b230ab21e 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -34,8 +34,6 @@ #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 -#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) - /* * Serial driver */ diff --git a/include/configs/meson64.h b/include/configs/meson64.h index 51dd4d706e0..40803ee9da1 100644 --- a/include/configs/meson64.h +++ b/include/configs/meson64.h @@ -30,7 +30,6 @@ #endif #define CONFIG_SYS_SDRAM_BASE 0 -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64 MiB */ /* ROM USB boot support, auto-execute boot.scr at scriptaddr */ #define BOOTENV_DEV_ROMUSB(devtypeu, devtypel, instance) \ diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index af6c728790c..73f84922288 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -11,8 +11,6 @@ /* Microblaze is microblaze_0 */ #define XILINX_FSL_NUMBER 3 -#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) - /* uart */ /* The following table includes the supported baudrates */ # define CONFIG_SYS_BAUDRATE_TABLE \ diff --git a/include/configs/microchip_mpfs_icicle.h b/include/configs/microchip_mpfs_icicle.h index 236db537db7..4c7cfac8af7 100644 --- a/include/configs/microchip_mpfs_icicle.h +++ b/include/configs/microchip_mpfs_icicle.h @@ -11,8 +11,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_BOOTM_LEN SZ_64M - #define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 /* Environment options */ diff --git a/include/configs/mt7620.h b/include/configs/mt7620.h index db4d68d7507..049d9a1b55b 100644 --- a/include/configs/mt7620.h +++ b/include/configs/mt7620.h @@ -14,8 +14,6 @@ #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 -#define CONFIG_SYS_BOOTM_LEN 0x1000000 - /* SPL */ #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE diff --git a/include/configs/mt7622.h b/include/configs/mt7622.h index 6c681a3c30b..78d79b7780b 100644 --- a/include/configs/mt7622.h +++ b/include/configs/mt7622.h @@ -11,7 +11,6 @@ #include -#define CONFIG_SYS_BOOTM_LEN SZ_64M #define CONFIG_SYS_NONCACHED_MEMORY SZ_1M /* Uboot definition */ diff --git a/include/configs/mt7623.h b/include/configs/mt7623.h index 06367221ebc..0cd8b08552c 100644 --- a/include/configs/mt7623.h +++ b/include/configs/mt7623.h @@ -13,8 +13,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_SYS_BOOTM_LEN SZ_64M - #define CONFIG_SYS_NONCACHED_MEMORY SZ_1M /* Environment */ diff --git a/include/configs/mt7628.h b/include/configs/mt7628.h index 4dcfa39350c..3680c0fe442 100644 --- a/include/configs/mt7628.h +++ b/include/configs/mt7628.h @@ -14,8 +14,6 @@ #define CONFIG_SYS_INIT_SP_OFFSET 0x80000 -#define CONFIG_SYS_BOOTM_LEN 0x1000000 - /* Serial SPL */ #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL) #define CONFIG_SYS_NS16550_MEM32 diff --git a/include/configs/mt7629.h b/include/configs/mt7629.h index 87e2251777c..22d11d01476 100644 --- a/include/configs/mt7629.h +++ b/include/configs/mt7629.h @@ -13,8 +13,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_SYS_BOOTM_LEN SZ_64M - #define CONFIG_SYS_NONCACHED_MEMORY SZ_1M /* Environment */ diff --git a/include/configs/mt8183.h b/include/configs/mt8183.h index 665a4e44f3f..c93d70ddf1a 100644 --- a/include/configs/mt8183.h +++ b/include/configs/mt8183.h @@ -18,8 +18,6 @@ #define CONFIG_SYS_NS16550_COM1 0x11005200 #define CONFIG_SYS_NS16550_CLK 26000000 -#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* Environment settings */ #include diff --git a/include/configs/mt8512.h b/include/configs/mt8512.h index d4aa279b551..964c9578133 100644 --- a/include/configs/mt8512.h +++ b/include/configs/mt8512.h @@ -13,9 +13,6 @@ #define CONFIG_SYS_NONCACHED_MEMORY SZ_1M - -#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* Uboot definition */ #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE diff --git a/include/configs/mt8516.h b/include/configs/mt8516.h index 928f4b0dc77..7228f3e4288 100644 --- a/include/configs/mt8516.h +++ b/include/configs/mt8516.h @@ -18,8 +18,6 @@ #define CONFIG_SYS_NS16550_COM1 0x11005000 #define CONFIG_SYS_NS16550_CLK 26000000 -#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* Environment settings */ #include diff --git a/include/configs/mt8518.h b/include/configs/mt8518.h index e313f6f6afa..6d4704644e4 100644 --- a/include/configs/mt8518.h +++ b/include/configs/mt8518.h @@ -18,8 +18,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 -#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* Uboot definition */ #define ENV_BOOT_READ_IMAGE \ diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h index 56f640226dd..51f7e16ece1 100644 --- a/include/configs/mvebu_armada-37xx.h +++ b/include/configs/mvebu_armada-37xx.h @@ -15,8 +15,6 @@ /* additions for new ARM relocation support */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */ - #define CONFIG_SYS_BAUDRATE_TABLE { 300, 600, 1200, 1800, 2400, 4800, \ 9600, 19200, 38400, 57600, 115200, \ 230400, 460800, 500000, 576000, \ diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 75bc27d1798..e416f81e43a 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -19,8 +19,6 @@ #endif #define CONFIG_MXC_GPT_HCLK -#define CONFIG_SYS_BOOTM_LEN 0x1000000 - #include #include #include diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index 9f4dbec0700..4704276a74d 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -17,8 +17,6 @@ #define CONFIG_MXC_GPT_HCLK #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */ -#define CONFIG_SYS_BOOTM_LEN 0x1000000 - /* Enable iomux-lpsr support */ #define CONFIG_IOMUX_LPSR diff --git a/include/configs/mx7ulp_com.h b/include/configs/mx7ulp_com.h index c6c3695e5df..62e8e629911 100644 --- a/include/configs/mx7ulp_com.h +++ b/include/configs/mx7ulp_com.h @@ -15,8 +15,6 @@ #include "imx7ulp_spl.h" #endif -#define CONFIG_SYS_BOOTM_LEN 0x1000000 - /* Using ULP WDOG for reset */ #define WDOG_BASE_ADDR WDG1_RBASE diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h index 57fed4ed69c..e93824928b3 100644 --- a/include/configs/mx7ulp_evk.h +++ b/include/configs/mx7ulp_evk.h @@ -11,8 +11,6 @@ #include #include -#define CONFIG_SYS_BOOTM_LEN 0x1000000 - /* Using ULP WDOG for reset */ #define WDOG_BASE_ADDR WDG1_RBASE diff --git a/include/configs/nsim.h b/include/configs/nsim.h index 586ac3ebcaa..d469ef83c24 100644 --- a/include/configs/nsim.h +++ b/include/configs/nsim.h @@ -16,8 +16,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_256M -#define CONFIG_SYS_BOOTM_LEN SZ_32M - /* * Console configuration */ diff --git a/include/configs/octeon_common.h b/include/configs/octeon_common.h index 7e71c83887f..0fa7490e7de 100644 --- a/include/configs/octeon_common.h +++ b/include/configs/octeon_common.h @@ -16,6 +16,4 @@ #define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000 -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - #endif /* __OCTEON_COMMON_H__ */ diff --git a/include/configs/octeontx2_common.h b/include/configs/octeontx2_common.h index f377ba8fa2e..2c430e8d376 100644 --- a/include/configs/octeontx2_common.h +++ b/include/configs/octeontx2_common.h @@ -8,7 +8,6 @@ #define __OCTEONTX2_COMMON_H__ /** Maximum size of image supported for bootm (and bootable FIT images) */ -#define CONFIG_SYS_BOOTM_LEN (256 << 20) /** Memory base address */ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_TEXT_BASE diff --git a/include/configs/octeontx_common.h b/include/configs/octeontx_common.h index 73a14b25de6..e7a6bd41db0 100644 --- a/include/configs/octeontx_common.h +++ b/include/configs/octeontx_common.h @@ -34,7 +34,6 @@ #endif /* ifdef CONFIG_DISTRO_DEFAULTS*/ /** Maximum size of image supported for bootm (and bootable FIT images) */ -#define CONFIG_SYS_BOOTM_LEN (256 << 20) /** Memory base address */ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_TEXT_BASE diff --git a/include/configs/openpiton-riscv64.h b/include/configs/openpiton-riscv64.h index 12bd8fb99cd..3ff8187b5df 100644 --- a/include/configs/openpiton-riscv64.h +++ b/include/configs/openpiton-riscv64.h @@ -15,7 +15,6 @@ /* Environment options */ #define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_BOOTM_LEN SZ_256M /* --------------------------------------------------------------------- * Board boot configuration diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 1c234c76a50..e9217394e02 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -437,7 +437,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ /* * Environment Configuration diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h index f8c3e1f10db..049d1d74345 100644 --- a/include/configs/phycore_imx8mm.h +++ b/include/configs/phycore_imx8mm.h @@ -11,7 +11,6 @@ #include #include -#define CONFIG_SYS_BOOTM_LEN SZ_64M #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h index dd0b108a89f..df1716106fe 100644 --- a/include/configs/phycore_imx8mp.h +++ b/include/configs/phycore_imx8mp.h @@ -10,8 +10,6 @@ #include #include -#define CONFIG_SYS_BOOTM_LEN SZ_64M - #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index a587570ea17..d1cc1b9d63f 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -78,6 +78,4 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_BOOTM_LEN SZ_128M - #endif diff --git a/include/configs/pomelo.h b/include/configs/pomelo.h index 647bb3d02a1..2e206542f8d 100644 --- a/include/configs/pomelo.h +++ b/include/configs/pomelo.h @@ -14,7 +14,6 @@ /* SIZE of malloc pool */ /*BOOT*/ -#define CONFIG_SYS_BOOTM_LEN 0x3c00000 #define BOOT_TARGET_DEVICES(func) \ func(SCSI, scsi, 0) \ diff --git a/include/configs/poplar.h b/include/configs/poplar.h index 4b749b13ee8..c58105597e4 100644 --- a/include/configs/poplar.h +++ b/include/configs/poplar.h @@ -16,7 +16,6 @@ /* DRAM banks */ /* SYS */ -#define CONFIG_SYS_BOOTM_LEN SZ_64M /* ATF bl33.bin load address (must match) */ diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h index 48c0584d5b3..90f548cc6c1 100644 --- a/include/configs/presidio_asic.h +++ b/include/configs/presidio_asic.h @@ -8,8 +8,6 @@ #ifndef __PRESIDIO_ASIC_H #define __PRESIDIO_ASIC_H -#define CONFIG_SYS_BOOTM_LEN 0x00c00000 - /* Generic Timer Definitions */ #define CONFIG_SYS_TIMER_RATE 25000000 #define CONFIG_SYS_TIMER_COUNTER 0xf4321008 diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h index 62ed86b29c8..49d1878ebdd 100644 --- a/include/configs/px30_common.h +++ b/include/configs/px30_common.h @@ -13,13 +13,9 @@ /* FIXME: ff020000 is pmu_mem (10k), while ff0e0000 is regular int_mem */ #define CONFIG_IRAM_BASE 0xff020000 -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - #define GICD_BASE 0xff131000 #define GICC_BASE 0xff132000 -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - #define CONFIG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 #define SDRAM_BANK_SIZE (2UL << 30) diff --git a/include/configs/qemu-arm.h b/include/configs/qemu-arm.h index 14cae43db3a..e9f756b13ed 100644 --- a/include/configs/qemu-arm.h +++ b/include/configs/qemu-arm.h @@ -12,8 +12,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* GUIDs for capsule updatable firmware images */ #define QEMU_ARM_UBOOT_IMAGE_GUID \ EFI_GUID(0xf885b085, 0x99f8, 0x45af, 0x84, 0x7d, \ diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index ce60a3c7421..31e94df84df 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -69,7 +69,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ /* * Environment Configuration diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h index a81c503d9fd..d81e5d6c862 100644 --- a/include/configs/qemu-riscv.h +++ b/include/configs/qemu-riscv.h @@ -10,8 +10,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_BOOTM_LEN SZ_64M - #define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 #define RISCV_MMODE_TIMERBASE 0x2000000 diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index e80e45dcbd7..9efda3eeea9 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -32,7 +32,6 @@ #define CONFIG_MAX_MEM_MAPPED (0x80000000u - DRAM_RSV_SIZE) #define CONFIG_SYS_MONITOR_LEN (1 * 1024 * 1024) -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* ENV setting */ diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h index d5a4ca26b04..12d4bc65d7e 100644 --- a/include/configs/rk3128_common.h +++ b/include/configs/rk3128_common.h @@ -12,8 +12,6 @@ #define CONFIG_IRAM_BASE 0x10080000 -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - /* RAW SD card / eMMC locations. */ #define CONFIG_SYS_SDRAM_BASE 0x60000000 diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index c3279b84d3a..ec9e9ca1e31 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -8,8 +8,6 @@ #include #include "rockchip-common.h" -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - #define CONFIG_SYS_HZ_CLOCK 24000000 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (28 << 10) diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 18f4289d29a..f4b3481115b 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -9,8 +9,6 @@ #include #include "rockchip-common.h" -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64MB */ - #define CONFIG_SYS_HZ_CLOCK 24000000 #define CONFIG_IRAM_BASE 0xff700000 diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h index d5aadd5fa80..200b34b35ba 100644 --- a/include/configs/rk3308_common.h +++ b/include/configs/rk3308_common.h @@ -11,10 +11,6 @@ #define CONFIG_SYS_NS16550_MEM32 #define CONFIG_IRAM_BASE 0xfff80000 -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - - -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ #define CONFIG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 165b78ff330..1e214e4ebe1 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -10,8 +10,6 @@ #define CONFIG_IRAM_BASE 0xff090000 -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - /* FAT sd card locations. */ #define CONFIG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index 4db4026ebe5..37e0c1d936c 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -16,8 +16,6 @@ #define CONFIG_IRAM_BASE 0xff8c0000 -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x00500000\0" \ "pxefile_addr_r=0x00600000\0" \ diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 3ca80c8c7c0..2f9aee58197 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -15,8 +15,6 @@ /* BSS setup */ #endif -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - /* MMC/SD IP block */ #define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ 200000000 diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h index ef4f725b579..15e81523402 100644 --- a/include/configs/rk3568_common.h +++ b/include/configs/rk3568_common.h @@ -10,8 +10,6 @@ #define CONFIG_IRAM_BASE 0xfdcc0000 -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - #define CONFIG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xf0000000 diff --git a/include/configs/rpi.h b/include/configs/rpi.h index 27738ab1933..4f5025d0da5 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -33,10 +33,6 @@ */ #define CONFIG_SYS_SDRAM_SIZE SZ_128M -#ifdef CONFIG_ARM64 -#define CONFIG_SYS_BOOTM_LEN SZ_64M -#endif - /* Devices */ /* LCD */ diff --git a/include/configs/sama7g5ek.h b/include/configs/sama7g5ek.h index 78347373fca..3f905bf2d77 100644 --- a/include/configs/sama7g5ek.h +++ b/include/configs/sama7g5ek.h @@ -11,7 +11,6 @@ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 #define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ -#define CONFIG_SYS_BOOTM_LEN SZ_32M /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE 0x60000000 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 diff --git a/include/configs/sdm845.h b/include/configs/sdm845.h index e1b8c61d076..af5fe27e68b 100644 --- a/include/configs/sdm845.h +++ b/include/configs/sdm845.h @@ -22,6 +22,5 @@ "bootcmd=source $prevbl_initrd_start_addr:bootscript\0" /* Size of malloc() pool */ -#define CONFIG_SYS_BOOTM_LEN SZ_64M #endif diff --git a/include/configs/sifive-unleashed.h b/include/configs/sifive-unleashed.h index a99d143485c..2e5592cf94d 100644 --- a/include/configs/sifive-unleashed.h +++ b/include/configs/sifive-unleashed.h @@ -13,8 +13,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_BOOTM_LEN SZ_64M - #define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 #define RISCV_MMODE_TIMERBASE 0x2000000 diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h index 680caac377b..9923f3d9c34 100644 --- a/include/configs/sifive-unmatched.h +++ b/include/configs/sifive-unmatched.h @@ -13,8 +13,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_BOOTM_LEN SZ_64M - #define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 /* Environment options */ diff --git a/include/configs/socfpga_arria5_secu1.h b/include/configs/socfpga_arria5_secu1.h index 2d654b42d56..261ae56c1dc 100644 --- a/include/configs/socfpga_arria5_secu1.h +++ b/include/configs/socfpga_arria5_secu1.h @@ -23,8 +23,6 @@ */ #define CONFIG_SYS_I2C_RTC_ADDR 0x68 -#define CONFIG_SYS_BOOTM_LEN (64 << 20) - /* Environment settings */ /* diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index a3e8d549291..06198ddd82a 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -22,7 +22,6 @@ */ /* Extend size of kernel image for uncompression */ -#define CONFIG_SYS_BOOTM_LEN (32 * 1024 * 1024) /* * U-Boot run time memory configurations diff --git a/include/configs/socfpga_vining_fpga.h b/include/configs/socfpga_vining_fpga.h index c333c931ab7..70d9f3607a6 100644 --- a/include/configs/socfpga_vining_fpga.h +++ b/include/configs/socfpga_vining_fpga.h @@ -11,7 +11,6 @@ #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on VINING_FPGA */ /* Booting Linux */ -#define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MiB */ /* Extra Environment */ #define CONFIG_HOSTNAME "socfpga_vining_fpga" diff --git a/include/configs/stemmy.h b/include/configs/stemmy.h index 4ad55afad86..71b25c23b13 100644 --- a/include/configs/stemmy.h +++ b/include/configs/stemmy.h @@ -13,7 +13,6 @@ * low-level initialization and rely on configuration provided by the Samsung * bootloader. New images are loaded at the same address for compatibility. */ -#define CONFIG_SYS_BOOTM_LEN SZ_64M /* FIXME: This should be loaded from device tree... */ #define CONFIG_SYS_L2_PL310 diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h index 1b8d38f4b52..b1a011bacb2 100644 --- a/include/configs/stih410-b2260.h +++ b/include/configs/stih410-b2260.h @@ -24,8 +24,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ SZ_256M -#define CONFIG_SYS_BOOTM_LEN SZ_16M - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(USB, usb, 0) \ diff --git a/include/configs/stm32mp13_common.h b/include/configs/stm32mp13_common.h index beb56fcb5af..3ca65ea2a37 100644 --- a/include/configs/stm32mp13_common.h +++ b/include/configs/stm32mp13_common.h @@ -22,7 +22,6 @@ #define CONFIG_SYS_BOOTMAPSZ SZ_256M /* Extend size of kernel image for uncompression */ -#define CONFIG_SYS_BOOTM_LEN SZ_32M /*MMC SD*/ #define CONFIG_SYS_MMC_MAX_DEVICE 2 diff --git a/include/configs/stm32mp15_common.h b/include/configs/stm32mp15_common.h index 1e14e91ea70..56fb4d38e45 100644 --- a/include/configs/stm32mp15_common.h +++ b/include/configs/stm32mp15_common.h @@ -22,7 +22,6 @@ #define CONFIG_SYS_BOOTMAPSZ SZ_256M /* Extend size of kernel image for uncompression */ -#define CONFIG_SYS_BOOTM_LEN SZ_32M /*MMC SD*/ #define CONFIG_SYS_MMC_MAX_DEVICE 3 diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 2bf4e58cddf..0f0ef4f64bb 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -15,10 +15,6 @@ #include #include -#ifdef CONFIG_ARM64 -#define CONFIG_SYS_BOOTM_LEN (32 << 20) -#endif - /* Serial & console */ #define CONFIG_SYS_NS16550_SERIAL /* ns16550 reg in the low bits of cpu reg */ diff --git a/include/configs/tb100.h b/include/configs/tb100.h index 03aeb4f5d2e..16bdc39b750 100644 --- a/include/configs/tb100.h +++ b/include/configs/tb100.h @@ -16,8 +16,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_128M -#define CONFIG_SYS_BOOTM_LEN SZ_32M - /* * UART configuration */ diff --git a/include/configs/total_compute.h b/include/configs/total_compute.h index 41297b693cf..4fb3d731c67 100644 --- a/include/configs/total_compute.h +++ b/include/configs/total_compute.h @@ -11,8 +11,6 @@ /* Link Definitions */ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) - #define UART0_BASE 0x7ff80000 /* PL011 Serial Configuration */ diff --git a/include/configs/turris_mox.h b/include/configs/turris_mox.h index d4aa312da4f..401627a47a2 100644 --- a/include/configs/turris_mox.h +++ b/include/configs/turris_mox.h @@ -8,7 +8,6 @@ #ifndef _CONFIG_TURRIS_MOX_H #define _CONFIG_TURRIS_MOX_H -#define CONFIG_SYS_BOOTM_LEN (64 << 20) #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_BAUDRATE_TABLE { 300, 600, 1200, 1800, 2400, 4800, \ 9600, 19200, 38400, 57600, 115200, \ diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 8096b2c8960..15d41fba95c 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -54,8 +54,6 @@ #define CONFIG_GATEWAYIP 192.168.11.1 #define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_SYS_BOOTM_LEN (32 << 20) - #if defined(CONFIG_ARM64) /* ARM Trusted Firmware */ #define BOOT_IMAGES \ diff --git a/include/configs/vcoreiii.h b/include/configs/vcoreiii.h index 43127ae649a..78a62a8b028 100644 --- a/include/configs/vcoreiii.h +++ b/include/configs/vcoreiii.h @@ -32,8 +32,6 @@ #error Unknown DDR size - please add! #endif -#define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */ - #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x81000000\0" \ "spi_image_off=0x00100000\0" \ diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 6d77df09fb5..5b5fce9bda1 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -13,8 +13,6 @@ #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) -#define CONFIG_SYS_BOOTM_LEN SZ_64M - #ifdef CONFIG_SPL_BUILD /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x930000 diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index 0de249aa96b..fca40beba18 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -75,8 +75,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE SZ_512K -#define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */ - /* i.MX 8M Plus supports max. 8GB memory in two albeit concecutive banks */ #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index e864b3fee6a..3705313aec0 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -15,8 +15,6 @@ /* ATF loads u-boot here for BASE_FVP model */ #endif -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - /* CS register bases for the original memory map. */ #ifdef CONFIG_TARGET_VEXPRESS64_BASER_FVP #define V2M_DRAM_BASE 0x00000000 diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 1366f623aa2..42b2cb2fc85 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -14,7 +14,6 @@ * High Level Configuration Options * (easy to change) */ -#define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Generic TPM interfaced through LPC bus */ #define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000 diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h index 55837e1c564..971bd69dec8 100644 --- a/include/configs/xilinx_versal.h +++ b/include/configs/xilinx_versal.h @@ -37,8 +37,6 @@ # define PHY_ANEG_TIMEOUT 20000 #endif -#define CONFIG_SYS_BOOTM_LEN (100 * 1024 * 1024) - #define ENV_MEM_LAYOUT_SETTINGS \ "fdt_addr_r=0x40000000\0" \ "fdt_size_r=0x400000\0" \ diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 4e71a42cd34..f72f3e64476 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -54,8 +54,6 @@ # define PHY_ANEG_TIMEOUT 20000 #endif -#define CONFIG_SYS_BOOTM_LEN (100 * 1024 * 1024) - #define ENV_MEM_LAYOUT_SETTINGS \ "fdt_addr_r=0x40000000\0" \ "fdt_size_r=0x400000\0" \ diff --git a/include/configs/xilinx_zynqmp_r5.h b/include/configs/xilinx_zynqmp_r5.h index 37750d3d15d..b6bc402a7e9 100644 --- a/include/configs/xilinx_zynqmp_r5.h +++ b/include/configs/xilinx_zynqmp_r5.h @@ -19,6 +19,5 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Extend size of kernel image for uncompression */ -#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) #endif /* __CONFIG_ZYNQ_ZYNQMP_R5_H */ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 6a045ec60ae..1fdde90654f 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -204,7 +204,6 @@ /* Extend size of kernel image for uncompression */ -#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) /* Boot FreeBSD/vxWorks from an ELF image */ #define CONFIG_SYS_MMC_MAX_DEVICE 1 -- GitLab From 54ee5ae84191aa7c53c9de709f6c66411d3e2dda Mon Sep 17 00:00:00 2001 From: Rogier Stam Date: Wed, 11 May 2022 23:20:28 +0200 Subject: [PATCH 562/581] Add SCSI scan for ENV in EXT4 or FAT MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When having environment stored in EXT4 or FAT and using an AHCI or SCSI device / partition the scan would not be performed early enough and hence the device would not be recognized. This change adds the scan when the interface is "scsi" in a similar way to mmc_initialize. Signed-off-by: Rogier Stam Reviewed-by: Pali Rohár --- env/ext4.c | 5 +++++ env/fat.c | 8 +++++++- 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/env/ext4.c b/env/ext4.c index 9f65afb8a42..47e05a48919 100644 --- a/env/ext4.c +++ b/env/ext4.c @@ -31,6 +31,7 @@ #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; @@ -146,6 +147,10 @@ static int env_ext4_load(void) if (!strcmp(ifname, "mmc")) mmc_initialize(NULL); #endif +#if defined(CONFIG_AHCI) || defined(CONFIG_SCSI) + if (!strcmp(ifname, "scsi")) + scsi_scan(true); +#endif part = blk_get_device_part_str(ifname, dev_and_part, &dev_desc, &info, 1); diff --git a/env/fat.c b/env/fat.c index 6251d9649b1..3172130d75d 100644 --- a/env/fat.c +++ b/env/fat.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -128,7 +129,12 @@ static int env_fat_load(void) if (!strcmp(ifname, "mmc")) mmc_initialize(NULL); #endif - +#ifndef CONFIG_SPL_BUILD +#if defined(CONFIG_AHCI) || defined(CONFIG_SCSI) + if (!strcmp(CONFIG_ENV_FAT_INTERFACE, "scsi")) + scsi_scan(true); +#endif +#endif part = blk_get_device_part_str(ifname, dev_and_part, &dev_desc, &info, 1); if (part < 0) -- GitLab From 69ca709d0fb001851f443b0b744c6d65bb6c22c1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Mon, 30 May 2022 11:09:11 +0200 Subject: [PATCH 563/581] ubifs: Fix reference count leak in ubifsumount MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Original ubifs code was designed that after ubifs_umount() call it is required to also call ubi_close_volume() which closes underlying UBI volume. But U-Boot ubifs modification have not implemented it properly which caused that ubifsumount command contains resource leak. It can be observed by calling simple sequence of commands: => ubi part mtd2 ubi0: attaching mtd2 ... => ubifsmount ubi0 => ubifsumount Unmounting UBIFS volume rootfs! => ubi detach ubi0 error: ubi_detach_mtd_dev: ubi0 reference count 1, destroy anyway ubi0: detaching mtd2 ubi0: mtd2 is detached Fix this issue by calling ubi_close_volume() and mutex_unlock() in directly in ubifs_umount() function before freeing U-Boot's global ubifs_sb. And remove duplicate calls of these two functions in remaining places. Note that when ubifs_umount() is not called then during error handling is still needed to call ubi_close_volume() and mutex_unlock. With this change ubifsumount command does not throw that error anymore: => ubi part rootfs ubi0: attaching mtd2 ... => ubifsmount ubi0 => ubifsumount Unmounting UBIFS volume rootfs! => ubi detach ubi0: detaching mtd2 ubi0: mtd2 is detached Signed-off-by: Pali Rohár --- fs/ubifs/super.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/fs/ubifs/super.c b/fs/ubifs/super.c index e3a4c0bca27..034c41a7035 100644 --- a/fs/ubifs/super.c +++ b/fs/ubifs/super.c @@ -1757,6 +1757,8 @@ void ubifs_umount(struct ubifs_info *c) kfree(c->bottom_up_buf); ubifs_debugging_exit(c); #ifdef __UBOOT__ + ubi_close_volume(c->ubi); + mutex_unlock(&c->umount_mutex); /* Finally free U-Boot's global copy of superblock */ if (ubifs_sb != NULL) { free(ubifs_sb->s_fs_info); @@ -2058,9 +2060,9 @@ static void ubifs_put_super(struct super_block *sb) ubifs_umount(c); #ifndef __UBOOT__ bdi_destroy(&c->bdi); -#endif ubi_close_volume(c->ubi); mutex_unlock(&c->umount_mutex); +#endif } #endif @@ -2327,6 +2329,9 @@ static int ubifs_fill_super(struct super_block *sb, void *data, int silent) out_umount: ubifs_umount(c); +#ifdef __UBOOT__ + goto out; +#endif out_unlock: mutex_unlock(&c->umount_mutex); #ifndef __UBOOT__ -- GitLab From e6ca148104fe66ccc5991b06a88f431c9537c366 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Tue, 31 May 2022 10:32:36 +0200 Subject: [PATCH 564/581] distroboot: Fix ubifs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix multiple issues in ubifs distroboot code: U-Boot supports attaching only one MTD device as UBI at the time. So always call 'ubifsmount ubi0:${bootubivol}' for mounting UBI volume ${bootubivol}. Usage of 'ubi${devnum}' is incorrect as 'ubi part' command attach MTD device always as UBI device ubi0. Set distroboot ${bootfstype} variable to ubifs in ubifs_boot command. Distroboot scripts require ${bootfstype} variable to be properly set and it is already set for all other boot types. Set distroboot ${distro_bootpart} variable to ${bootubivol} value. UBI device does not have partitions, but has volumes. Distroboot scripts require something to be set in ${distro_bootpart} variable, so set it to the UBI volume which is currently mounted by ubifs. Set distroboot ${devnum} variable to fixed string "ubi0". ubifs code differs from the other partition code that it requires "ubi" prefix before number. Explicitly unmount ubifs volume after loading all data from it. This allows to detach UBI device from MTD device. Move definition of MTD device with UBI and UBI volume with ubifs filesystem from global env variables ${bootubipart} and ${bootubivol} into the distroboot "func" macro, defined in board include config files. UBIFS distroboot macros then set ${bootubipart} and ${bootubivol} local variables for compatibility with existing distroboot scripts. This last change allows to define more UBIFS target devices and make it clear what is boot MTD/UBI device. All board include config files are adjusted to use this new scheme of specifying boot MTD/UBI device. Signed-off-by: Pali Rohár Acked-by: Frieder Schrempf --- include/config_distro_bootcmd.h | 27 ++++++++++++++++----------- include/configs/am335x_guardian.h | 3 +-- include/configs/colibri-imx6ull.h | 1 - include/configs/colibri_imx7.h | 1 - include/configs/kontron-sl-mx6ul.h | 2 +- include/configs/mys_6ulx.h | 2 +- include/configs/npi_imx6ull.h | 2 +- include/configs/omap3_beagle.h | 4 +--- include/configs/omap3_evm.h | 4 +--- include/configs/pcl063.h | 2 +- include/configs/stm32mp15_common.h | 2 +- include/configs/uniphier.h | 2 +- 12 files changed, 25 insertions(+), 27 deletions(-) diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h index c55023889ca..c6e9c497413 100644 --- a/include/config_distro_bootcmd.h +++ b/include/config_distro_bootcmd.h @@ -70,18 +70,23 @@ #ifdef CONFIG_CMD_UBIFS #define BOOTENV_SHARED_UBIFS \ "ubifs_boot=" \ - "env exists bootubipart || " \ - "env set bootubipart UBI; " \ - "env exists bootubivol || " \ - "env set bootubivol boot; " \ "if ubi part ${bootubipart} && " \ - "ubifsmount ubi${devnum}:${bootubivol}; " \ + "ubifsmount ubi0:${bootubivol}; " \ "then " \ "devtype=ubi; " \ + "devnum=ubi0; " \ + "bootfstype=ubifs; " \ + "distro_bootpart=${bootubivol}; " \ "run scan_dev_for_boot; " \ + "ubifsumount; " \ "fi\0" -#define BOOTENV_DEV_UBIFS BOOTENV_DEV_BLKDEV -#define BOOTENV_DEV_NAME_UBIFS BOOTENV_DEV_NAME_BLKDEV +#define BOOTENV_DEV_UBIFS(devtypeu, devtypel, instance, bootubipart, bootubivol) \ + "bootcmd_ubifs" #instance "=" \ + "bootubipart=" #bootubipart "; " \ + "bootubivol=" #bootubivol "; " \ + "run ubifs_boot\0" +#define BOOTENV_DEV_NAME_UBIFS(devtypeu, devtypel, instance, bootubipart, bootubivol) \ + #devtypel #instance " " #else #define BOOTENV_SHARED_UBIFS #define BOOTENV_DEV_UBIFS \ @@ -411,13 +416,13 @@ BOOT_TARGET_DEVICES_references_PXE_without_CONFIG_CMD_DHCP_or_PXE #endif -#define BOOTENV_DEV_NAME(devtypeu, devtypel, instance) \ - BOOTENV_DEV_NAME_##devtypeu(devtypeu, devtypel, instance) +#define BOOTENV_DEV_NAME(devtypeu, devtypel, instance, ...) \ + BOOTENV_DEV_NAME_##devtypeu(devtypeu, devtypel, instance, ## __VA_ARGS__) #define BOOTENV_BOOT_TARGETS \ "boot_targets=" BOOT_TARGET_DEVICES(BOOTENV_DEV_NAME) "\0" -#define BOOTENV_DEV(devtypeu, devtypel, instance) \ - BOOTENV_DEV_##devtypeu(devtypeu, devtypel, instance) +#define BOOTENV_DEV(devtypeu, devtypel, instance, ...) \ + BOOTENV_DEV_##devtypeu(devtypeu, devtypel, instance, ## __VA_ARGS__) #define BOOTENV \ BOOTENV_SHARED_HOST \ BOOTENV_SHARED_MMC \ diff --git a/include/configs/am335x_guardian.h b/include/configs/am335x_guardian.h index 7a9928fba74..7fa1847c1fc 100644 --- a/include/configs/am335x_guardian.h +++ b/include/configs/am335x_guardian.h @@ -27,7 +27,7 @@ "ramdisk_addr_r=0x88080000\0" \ #define BOOT_TARGET_DEVICES(func) \ - func(UBIFS, ubifs, 0) + func(UBIFS, ubifs, 0, UBI, rootfs) #define AM335XX_BOARD_FDTFILE "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" @@ -51,7 +51,6 @@ BOOTENV \ GUARDIAN_DEFAULT_PROD_ENV \ "backlight_brightness=50\0" \ - "bootubivol=rootfs\0" \ "distro_bootcmd=" \ "setenv rootflags \"bulk_read,chk_data_crc\"; " \ "setenv ethact usb_ether; " \ diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index 528c7c98d23..04cde9530ad 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -90,7 +90,6 @@ UBI_BOOTCMD \ UBOOT_UPDATE \ "boot_script_dhcp=boot.scr\0" \ - "bootubipart=ubi\0" \ "console=ttymxc0\0" \ "defargs=user_debug=30\0" \ "fdt_board=eval-v3\0" \ diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index 8a6536eec89..9543e0233ee 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -130,7 +130,6 @@ UBOOT_UPDATE \ "boot_file=zImage\0" \ "boot_script_dhcp=boot.scr\0" \ - "bootubipart=ubi\0" \ "console=ttymxc0\0" \ "defargs=\0" \ "fdt_board=eval-v3\0" \ diff --git a/include/configs/kontron-sl-mx6ul.h b/include/configs/kontron-sl-mx6ul.h index 512cef09f80..7aac5d3f5a1 100644 --- a/include/configs/kontron-sl-mx6ul.h +++ b/include/configs/kontron-sl-mx6ul.h @@ -37,7 +37,7 @@ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 0) \ - func(UBIFS, ubifs, 0) \ + func(UBIFS, ubifs, 0, UBI, boot) \ func(USB, usb, 0) \ func(PXE, pxe, na) \ func(DHCP, dhcp, na) diff --git a/include/configs/mys_6ulx.h b/include/configs/mys_6ulx.h index b9689238195..4162ee8caa2 100644 --- a/include/configs/mys_6ulx.h +++ b/include/configs/mys_6ulx.h @@ -50,7 +50,7 @@ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ - func(UBIFS, ubifs, 0) \ + func(UBIFS, ubifs, 0, UBI, boot) \ func(PXE, pxe, na) \ func(DHCP, dhcp, na) diff --git a/include/configs/npi_imx6ull.h b/include/configs/npi_imx6ull.h index 6cdb1afcd9a..217427a302e 100644 --- a/include/configs/npi_imx6ull.h +++ b/include/configs/npi_imx6ull.h @@ -58,7 +58,7 @@ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ - func(UBIFS, ubifs, 0) \ + func(UBIFS, ubifs, 0, UBI, boot) \ func(PXE, pxe, na) \ func(DHCP, dhcp, na) diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index ab742798b92..2cd42e5a1dc 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -62,7 +62,7 @@ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(LEGACY_MMC, legacy_mmc, 0) \ - func(UBIFS, ubifs, 0) \ + func(UBIFS, ubifs, 0, rootfs, rootfs) \ func(NAND, nand, 0) #else /* !CONFIG_MTD_RAW_NAND */ @@ -84,8 +84,6 @@ "bootenv=uEnv.txt\0" \ "bootfile=zImage\0" \ "bootpart=0:2\0" \ - "bootubivol=rootfs\0" \ - "bootubipart=rootfs\0" \ "usbtty=cdc_acm\0" \ "mpurate=auto\0" \ "buddy=none\0" \ diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index 1b94f8efa22..2683d4c7ea4 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -56,7 +56,7 @@ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(LEGACY_MMC, legacy_mmc, 0) \ - func(UBIFS, ubifs, 0) \ + func(UBIFS, ubifs, 0, rootfs, rootfs) \ func(NAND, nand, 0) #else /* !CONFIG_MTD_RAW_NAND */ @@ -82,8 +82,6 @@ "bootenv=uEnv.txt\0" \ "bootfile=zImage\0" \ "bootpart=0:2\0" \ - "bootubivol=rootfs\0" \ - "bootubipart=rootfs\0" \ "optargs=\0" \ "nandroot=ubi0:rootfs ubi.mtd=rootfs rw noinitrd\0" \ "nandrootfstype=ubifs rootwait\0" \ diff --git a/include/configs/pcl063.h b/include/configs/pcl063.h index 6683f21d15d..6e593da936c 100644 --- a/include/configs/pcl063.h +++ b/include/configs/pcl063.h @@ -62,7 +62,7 @@ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ - func(UBIFS, ubifs, 0) \ + func(UBIFS, ubifs, 0, UBI, boot) \ func(PXE, pxe, na) \ func(DHCP, dhcp, na) diff --git a/include/configs/stm32mp15_common.h b/include/configs/stm32mp15_common.h index 56fb4d38e45..c5412ffeb31 100644 --- a/include/configs/stm32mp15_common.h +++ b/include/configs/stm32mp15_common.h @@ -57,7 +57,7 @@ #endif #ifdef CONFIG_CMD_UBIFS -#define BOOT_TARGET_UBIFS(func) func(UBIFS, ubifs, 0) +#define BOOT_TARGET_UBIFS(func) func(UBIFS, ubifs, 0, UBI, boot) #else #define BOOT_TARGET_UBIFS(func) #endif diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 15d41fba95c..15ae0844c1a 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -19,7 +19,7 @@ #endif #ifdef CONFIG_CMD_UBIFS -#define BOOT_TARGET_DEVICE_UBIFS(func) func(UBIFS, ubifs, 0) +#define BOOT_TARGET_DEVICE_UBIFS(func) func(UBIFS, ubifs, 0, UBI, boot) #else #define BOOT_TARGET_DEVICE_UBIFS(func) #endif -- GitLab From ebaa3d053e5e36bfc8c826e9a87a05d65a2b8ab0 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sun, 12 Jun 2022 12:28:22 +0000 Subject: [PATCH 565/581] test: fix CONFIG_ACPIGEN dependencies Some tests cannot be built with CONFIG_ACPIGEN=n. Consider this in the Makefile. Signed-off-by: Heinrich Schuchardt --- test/dm/Makefile | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/test/dm/Makefile b/test/dm/Makefile index caea52f4e2a..52fe178a828 100644 --- a/test/dm/Makefile +++ b/test/dm/Makefile @@ -18,9 +18,13 @@ obj-$(CONFIG_UT_DM) += core.o obj-$(CONFIG_UT_DM) += read.o obj-$(CONFIG_UT_DM) += phys2bus.o ifneq ($(CONFIG_SANDBOX),) -obj-$(CONFIG_ACPIGEN) += acpi.o -obj-$(CONFIG_ACPIGEN) += acpigen.o -obj-$(CONFIG_ACPIGEN) += acpi_dp.o +ifeq ($(CONFIG_ACPIGEN),y) +obj-y += acpi.o +obj-y += acpigen.o +obj-y += acpi_dp.o +obj-(CONFIG_DM_GPIO) += gpio.o +obj-y += irq.o +endif obj-$(CONFIG_ADC) += adc.o obj-$(CONFIG_SOUND) += audio.o obj-$(CONFIG_AXI) += axi.o @@ -43,11 +47,9 @@ ifneq ($(CONFIG_EFI_PARTITION),) obj-$(CONFIG_FASTBOOT_FLASH_MMC) += fastboot.o endif obj-$(CONFIG_FIRMWARE) += firmware.o -obj-$(CONFIG_DM_GPIO) += gpio.o obj-$(CONFIG_DM_HWSPINLOCK) += hwspinlock.o obj-$(CONFIG_DM_I2C) += i2c.o obj-$(CONFIG_SOUND) += i2s.o -obj-y += irq.o obj-$(CONFIG_CLK_K210_SET_RATE) += k210_pll.o obj-$(CONFIG_IOMMU) += iommu.o obj-$(CONFIG_LED) += led.o -- GitLab From 3ca32c806b266d8fb0a3f4d7b8c7f6ef75f43cb3 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sun, 12 Jun 2022 13:13:05 +0000 Subject: [PATCH 566/581] snd: enable building max98357a driver with ACPIGEN=n sandbox_defconfig builds the max98357a driver. It should be possible to build the sandbox without ACPI support. ACPI support in the max98357a driver is only needed when creating an ACPI table. Fix building with ACPIGEN=n. Fixes: 54bcca29737f ("sound: Add an ACPI driver for Maxim MAX98357ac") Signed-off-by: Heinrich Schuchardt --- drivers/sound/max98357a.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/sound/max98357a.c b/drivers/sound/max98357a.c index a2088f03014..bdf6dc236ec 100644 --- a/drivers/sound/max98357a.c +++ b/drivers/sound/max98357a.c @@ -38,6 +38,7 @@ static int max98357a_of_to_plat(struct udevice *dev) return 0; } +__maybe_unused static int max98357a_acpi_fill_ssdt(const struct udevice *dev, struct acpi_ctx *ctx) { @@ -137,10 +138,12 @@ static int max98357a_acpi_setup_nhlt(const struct udevice *dev, #endif struct acpi_ops max98357a_acpi_ops = { +#ifdef CONFIG_ACPIGEN .fill_ssdt = max98357a_acpi_fill_ssdt, #ifdef CONFIG_X86 .setup_nhlt = max98357a_acpi_setup_nhlt, #endif +#endif }; static const struct audio_codec_ops max98357a_ops = { -- GitLab From d1a03e6bbc4e025797af17168b4909b3b14a2590 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sun, 12 Jun 2022 13:15:34 +0000 Subject: [PATCH 567/581] sound: enable building DA7219 driver with ACPIGEN=n sandbox_defconfig builds the DA7219 driver. It should be possible to build the sandbox without ACPI support. ACPI support in the DA7219 driver is only needed when creating an ACPI table. Fix building with ACPIGEN=n. Fixes: 0324b7123e22 ("sound: Add an ACPI driver for Dialog Semicondutor da7219") Signed-off-by: Heinrich Schuchardt --- drivers/sound/da7219.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/sound/da7219.c b/drivers/sound/da7219.c index 8d674bcb4fa..c1edef44360 100644 --- a/drivers/sound/da7219.c +++ b/drivers/sound/da7219.c @@ -23,6 +23,7 @@ #define DA7219_ACPI_HID "DLGS7219" +__maybe_unused static int da7219_acpi_fill_ssdt(const struct udevice *dev, struct acpi_ctx *ctx) { @@ -171,10 +172,12 @@ static int da7219_acpi_setup_nhlt(const struct udevice *dev, #endif struct acpi_ops da7219_acpi_ops = { +#ifdef CONFIG_ACPIGEN .fill_ssdt = da7219_acpi_fill_ssdt, #ifdef CONFIG_X86 .setup_nhlt = da7219_acpi_setup_nhlt, #endif +#endif }; static const struct udevice_id da7219_ids[] = { -- GitLab From 9b78c9297b3c9277089c1130363ed6b1bb38f57d Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Thu, 16 Jun 2022 13:43:50 +0200 Subject: [PATCH 568/581] Makefile: respect CONFIG_CC_OPTIMIZE_FOR_DEBUG for host tools If CONFIG_CC_OPTIMIZE_FOR_DEBUG=y, the host tools should be built with debug symbols and with reduced optimization. Signed-off-by: Heinrich Schuchardt --- Makefile | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Makefile b/Makefile index 93571d37d98..7f7dd81b028 100644 --- a/Makefile +++ b/Makefile @@ -673,6 +673,12 @@ else include/config/auto.conf: ; endif # $(dot-config) +ifdef CONFIG_CC_OPTIMIZE_FOR_DEBUG +KBUILD_HOSTCFLAGS := -Wall -Wstrict-prototypes -Og -g -fomit-frame-pointer \ + $(HOST_LFS_CFLAGS) $(HOSTCFLAGS) +KBUILD_HOSTCXXFLAGS := -Og -g $(HOST_LFS_CFLAGS) $(HOSTCXXFLAGS) +endif + # # Xtensa linker script cannot be preprocessed with -ansi because of # preprocessor operations on strings that don't make C identifiers. -- GitLab From 8142c4554ffaa927529f24427a35f7ee2861793a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= Date: Thu, 16 Jun 2022 20:59:03 +0200 Subject: [PATCH 569/581] fw_env: add fallback to Linux's NVMEM based access MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit A new DT binding for describing environment data block has been added in Linux's commit 5db1c2dbc04c ("dt-bindings: nvmem: add U-Boot environment variables binding"). Once we get a proper Linux NVMEM driver it'll be possible to use Linux's binary interface for user-space as documented in the: https://www.kernel.org/doc/html/latest/driver-api/nvmem.html This commits makes fw_env fallback to looking for a compatible NVMEM device in case config file isn't present. In a long term this may make config files redundant and avoid code (info) duplication. Signed-off-by: Rafał Miłecki --- tools/env/fw_env.c | 70 ++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 67 insertions(+), 3 deletions(-) diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c index 31afef6f3b1..908a162202d 100644 --- a/tools/env/fw_env.c +++ b/tools/env/fw_env.c @@ -1713,6 +1713,67 @@ static int check_device_config(int dev) return rc; } +static int find_nvmem_device(void) +{ + const char *path = "/sys/bus/nvmem/devices"; + struct dirent *dent; + char *nvmem = NULL; + char comp[256]; + char buf[32]; + int bytes; + DIR *dir; + + dir = opendir(path); + if (!dir) { + return -EIO; + } + + while (!nvmem && (dent = readdir(dir))) { + FILE *fp; + + if (!strcmp(dent->d_name, ".") || !strcmp(dent->d_name, "..")) { + continue; + } + + bytes = snprintf(comp, sizeof(comp), "%s/%s/of_node/compatible", path, dent->d_name); + if (bytes < 0 || bytes == sizeof(comp)) { + continue; + } + + fp = fopen(comp, "r"); + if (!fp) { + continue; + } + + fread(buf, sizeof(buf), 1, fp); + + if (!strcmp(buf, "u-boot,env")) { + bytes = asprintf(&nvmem, "%s/%s/nvmem", path, dent->d_name); + if (bytes < 0) { + nvmem = NULL; + } + } + + fclose(fp); + } + + closedir(dir); + + if (nvmem) { + struct stat s; + + stat(nvmem, &s); + + DEVNAME(0) = nvmem; + DEVOFFSET(0) = 0; + ENVSIZE(0) = s.st_size; + + return 0; + } + + return -ENOENT; +} + static int parse_config(struct env_opts *opts) { int rc; @@ -1723,9 +1784,12 @@ static int parse_config(struct env_opts *opts) #if defined(CONFIG_FILE) /* Fills in DEVNAME(), ENVSIZE(), DEVESIZE(). Or don't. */ if (get_config(opts->config_file)) { - fprintf(stderr, "Cannot parse config file '%s': %m\n", - opts->config_file); - return -1; + if (find_nvmem_device()) { + fprintf(stderr, "Cannot parse config file '%s': %m\n", + opts->config_file); + fprintf(stderr, "Failed to find NVMEM device\n"); + return -1; + } } #else DEVNAME(0) = DEVICE1_NAME; -- GitLab From 7886c45d422ca92f86a88580442bd526435bec25 Mon Sep 17 00:00:00 2001 From: Kory Maincent Date: Wed, 22 Jun 2022 11:11:45 +0200 Subject: [PATCH 570/581] mtd: rawnand: Add support to dedicated function to set timings With the current code if the board has an ONFI compliant NAND without support to the get and set features, U-boot returns an ENOTSUP error when trying to tune the timings which prevents the probe of the device. Indeed onfi_set_features() return ENOTSUP error if set/get features is not supported. In the case of timings we should not return ENOTSUP because we can use the default timings. The NAND is already capable of listening at its highest supported rate, so we assume in this case that it is fine to skip the operation. Fix it by adding an intermediate nand_onfi_set_timings() function which does not error out if set/get feature is not supported. Signed-off-by: Kory Maincent Reviewed-by: Miquel Raynal --- drivers/mtd/nand/raw/nand_base.c | 30 +++++++++++++++++++----------- 1 file changed, 19 insertions(+), 11 deletions(-) diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index 6f81257cf1f..e8ece0a4a0d 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -974,6 +974,22 @@ static int nand_reset_data_interface(struct nand_chip *chip, int chipnr) return ret; } +static int nand_onfi_set_timings(struct mtd_info *mtd, struct nand_chip *chip) +{ + if (!chip->onfi_version || + !(le16_to_cpu(chip->onfi_params.opt_cmd) + & ONFI_OPT_CMD_SET_GET_FEATURES)) + return 0; + + u8 tmode_param[ONFI_SUBFEATURE_PARAM_LEN] = { + chip->onfi_timing_mode_default, + }; + + return chip->onfi_set_features(mtd, chip, + ONFI_FEATURE_ADDR_TIMING_MODE, + tmode_param); +} + /** * nand_setup_data_interface - Setup the best data interface and timings * @chip: The NAND chip @@ -999,17 +1015,9 @@ static int nand_setup_data_interface(struct nand_chip *chip, int chipnr) * Ensure the timing mode has been changed on the chip side * before changing timings on the controller side. */ - if (chip->onfi_version) { - u8 tmode_param[ONFI_SUBFEATURE_PARAM_LEN] = { - chip->onfi_timing_mode_default, - }; - - ret = chip->onfi_set_features(mtd, chip, - ONFI_FEATURE_ADDR_TIMING_MODE, - tmode_param); - if (ret) - goto err; - } + ret = nand_onfi_set_timings(mtd, chip); + if (ret) + goto err; ret = chip->setup_data_interface(mtd, chipnr, chip->data_interface); err: -- GitLab From e3812b5b083e39f3dd11009579cc7d44008adaf5 Mon Sep 17 00:00:00 2001 From: Stefan Herbrechtsmeier Date: Thu, 23 Jun 2022 11:25:29 +0200 Subject: [PATCH 571/581] led: pwm: Use NOP uclass driver for top-level node The top level DT node of pwm-leds is not a LED itself, bind NOP uclass driver to it, and bind different LED uclass driver to its subnodes which represent the actual LEDs. This change removes the top-level node from the 'led list' command output and is based on the commit 01074697801b ("led: gpio: Use NOP uclass driver for top-level node"). Signed-off-by: Stefan Herbrechtsmeier --- drivers/led/led_pwm.c | 19 +++++++------------ 1 file changed, 7 insertions(+), 12 deletions(-) diff --git a/drivers/led/led_pwm.c b/drivers/led/led_pwm.c index 10bd1636c38..0ebae358ebb 100644 --- a/drivers/led/led_pwm.c +++ b/drivers/led/led_pwm.c @@ -95,27 +95,17 @@ static enum led_state_t led_pwm_get_state(struct udevice *dev) static int led_pwm_probe(struct udevice *dev) { struct led_pwm_priv *priv = dev_get_priv(dev); - struct led_uc_plat *uc_plat = dev_get_uclass_plat(dev); - - /* Ignore the top-level LED node */ - if (!uc_plat->label) - return 0; return led_pwm_set_state(dev, (priv->enabled) ? LEDST_ON : LEDST_OFF); } static int led_pwm_of_to_plat(struct udevice *dev) { - struct led_uc_plat *uc_plat = dev_get_uclass_plat(dev); struct led_pwm_priv *priv = dev_get_priv(dev); struct ofnode_phandle_args args; uint def_brightness, max_brightness; int ret; - /* Ignore the top-level LED node */ - if (!uc_plat->label) - return 0; - ret = dev_read_phandle_with_args(dev, "pwms", "#pwm-cells", 0, 0, &args); if (ret) return ret; @@ -173,10 +163,15 @@ static const struct udevice_id led_pwm_ids[] = { U_BOOT_DRIVER(led_pwm) = { .name = LEDS_PWM_DRIVER_NAME, .id = UCLASS_LED, - .of_match = led_pwm_ids, .ops = &led_pwm_ops, .priv_auto = sizeof(struct led_pwm_priv), - .bind = led_pwm_bind, .probe = led_pwm_probe, .of_to_plat = led_pwm_of_to_plat, }; + +U_BOOT_DRIVER(led_pwm_wrap) = { + .name = LEDS_PWM_DRIVER_NAME "_wrap", + .id = UCLASS_NOP, + .of_match = led_pwm_ids, + .bind = led_pwm_bind, +}; -- GitLab From 5e998b4de33fed22da29e3a12e2856f9c00eaebc Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Thu, 23 Jun 2022 14:13:56 +0200 Subject: [PATCH 572/581] serial: ns16550: Wait in debug_uart_init until tx buffer is empty MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Commit d293759d55cc ("serial: ns16550: Add support for SPL_DEBUG_UART_BASE") fixed support for setting correct early debug UART base address in SPL. But after this commit, output from Marvell A385 BootROM is truncated or lost and not fully present on serial console. Debugging this issue showed that BootROM just put bytes into UART HW output buffer and does not wait until UART HW transmit all characters. U-Boot ns16550 early debug is initialized very early and during its initialization is resetting UART HW and flushing remaining transmit buffer (which still contains BootROM output). Fix this issue by waiting in init function prior resetting UART HW until TxEmpty bit in UART Line Status Register is set. TxEmpty is set when all remaining bytes from HW buffer are transmitted. Signed-off-by: Pali Rohár Reviewed-by: Stefan Roese [trini: Add comment, move ';' to new line per checkpatch.pl] Signed-off-by: Tom Rini --- drivers/serial/ns16550.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 78bfe6281ce..47bad6f8e2a 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -328,6 +328,10 @@ static inline void _debug_uart_init(void) struct ns16550 *com_port = (struct ns16550 *)CONFIG_VAL(DEBUG_UART_BASE); int baud_divisor; + /* Wait until tx buffer is empty */ + while (!(serial_din(&com_port->lsr) & UART_LSR_TEMT)) + ; + /* * We copy the code from above because it is already horribly messy. * Trying to refactor to nicely remove the duplication doesn't seem -- GitLab From cc5dfdee6b8a2c558f5c52f11004e26eb55fd830 Mon Sep 17 00:00:00 2001 From: Ralph Siemsen Date: Fri, 24 Jun 2022 11:19:15 -0400 Subject: [PATCH 573/581] regmap: fix some comments Correct spelling and copy/paste errors in comments. Fixes 1c4db59d9b ("regmap: Add support for regmap fields") Signed-off-by: Ralph Siemsen Reviewed-by: Simon Glass --- include/regmap.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/regmap.h b/include/regmap.h index 8216de015dd..e81a3602aea 100644 --- a/include/regmap.h +++ b/include/regmap.h @@ -460,7 +460,7 @@ struct reg_field { struct regmap_field; /** - * REG_FIELD() - A convenient way to initialize a 'struct reg_feild'. + * REG_FIELD() - A convenient way to initialize a 'struct reg_field'. * * @_reg: Offset of the register within the regmap bank * @_lsb: lsb of the register field. @@ -519,9 +519,9 @@ void devm_regmap_field_free(struct udevice *dev, struct regmap_field *field); int regmap_field_write(struct regmap_field *field, unsigned int val); /** - * regmap_read() - Read a 32-bit value from a regmap + * regmap_field_read() - Read a 32-bit value from a regmap * - * @field: Regmap field to write to + * @field: Regmap field to read from * @valp: Pointer to the buffer to receive the data read from the regmap * field * -- GitLab From 5004901efb3b47f7fb22b29cdd127245d3814fd2 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 25 Jun 2022 19:58:24 +0200 Subject: [PATCH 574/581] board_init: Do not reserve MALLOC_F area on stack if non-zero MALLOC_F_ADDR In case the MALLOC_F_ADDR is set to non-zero value, the early malloc area is not going to be placed just below stack top, but elsewhere. Do not reserve MALLOC_F bytes in this case, as that wastes stack space and may even cause insufficient stack space in SPL. This functionality is particularly useful on i.MX8M, where the insufficient stack space can be triggered. Signed-off-by: Marek Vasut Cc: Albert ARIBAUD Cc: Fabio Estevam Cc: Peng Fan Cc: Simon Glass Cc: Stefano Babic Cc: Thomas Chou Cc: Tom Rini --- common/init/board_init.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/common/init/board_init.c b/common/init/board_init.c index eab5ee13953..6a550261778 100644 --- a/common/init/board_init.c +++ b/common/init/board_init.c @@ -78,8 +78,10 @@ __weak void board_init_f_init_stack_protection(void) ulong board_init_f_alloc_reserve(ulong top) { /* Reserve early malloc arena */ +#ifndef CONFIG_MALLOC_F_ADDR #if CONFIG_VAL(SYS_MALLOC_F_LEN) top -= CONFIG_VAL(SYS_MALLOC_F_LEN); +#endif #endif /* LAST : reserve GD (rounded up to a multiple of 16 bytes) */ top = rounddown(top-sizeof(struct global_data), 16); -- GitLab From 52686b87390791945eb05deaedac3c47f193a80f Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 8 Jul 2022 15:23:05 -0400 Subject: [PATCH 575/581] requirements: Move to atomicwrites==1.4.1 As explained upstream: https://github.com/untitaker/python-atomicwrites/issues/61 there is no longer a 1.3.0 version but the API is unchanged. Move to 1.4.1. Signed-off-by: Tom Rini --- test/py/requirements.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test/py/requirements.txt b/test/py/requirements.txt index 33c5c0bbc41..2d0fcc965cf 100644 --- a/test/py/requirements.txt +++ b/test/py/requirements.txt @@ -1,4 +1,4 @@ -atomicwrites==1.3.0 +atomicwrites==1.4.1 attrs==19.3.0 coverage==4.5.4 extras==1.0.0 -- GitLab From 38d091ac1d2d57612adb53b802609a7c3dcdbe3d Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 27 Jun 2022 13:35:46 -0400 Subject: [PATCH 576/581] Convert CONFIG_SYS_CACHE_STASHING to Kconfig This converts the following to Kconfig: CONFIG_SYS_CACHE_STASHING Signed-off-by: Tom Rini --- arch/powerpc/cpu/mpc85xx/Kconfig | 3 +++ configs/P2041RDB_NAND_defconfig | 1 + configs/P2041RDB_SDCARD_defconfig | 1 + configs/P2041RDB_SPIFLASH_defconfig | 1 + configs/P2041RDB_defconfig | 1 + configs/P3041DS_NAND_defconfig | 1 + configs/P3041DS_SDCARD_defconfig | 1 + configs/P3041DS_SPIFLASH_defconfig | 1 + configs/P3041DS_defconfig | 1 + configs/P4080DS_SDCARD_defconfig | 1 + configs/P4080DS_SPIFLASH_defconfig | 1 + configs/P4080DS_defconfig | 1 + configs/P5040DS_NAND_defconfig | 1 + configs/P5040DS_SDCARD_defconfig | 1 + configs/P5040DS_SPIFLASH_defconfig | 1 + configs/P5040DS_defconfig | 1 + configs/T1024RDB_NAND_defconfig | 1 + configs/T1024RDB_SDCARD_defconfig | 1 + configs/T1024RDB_SPIFLASH_defconfig | 1 + configs/T1024RDB_defconfig | 1 + configs/T1042D4RDB_NAND_defconfig | 1 + configs/T1042D4RDB_SDCARD_defconfig | 1 + configs/T1042D4RDB_SPIFLASH_defconfig | 1 + configs/T1042D4RDB_defconfig | 1 + configs/T2080QDS_NAND_defconfig | 1 + configs/T2080QDS_SDCARD_defconfig | 1 + configs/T2080QDS_SECURE_BOOT_defconfig | 1 + configs/T2080QDS_SPIFLASH_defconfig | 1 + configs/T2080QDS_SRIO_PCIE_BOOT_defconfig | 1 + configs/T2080QDS_defconfig | 1 + configs/T2080RDB_NAND_defconfig | 1 + configs/T2080RDB_SDCARD_defconfig | 1 + configs/T2080RDB_SPIFLASH_defconfig | 1 + configs/T2080RDB_defconfig | 1 + configs/T2080RDB_revD_NAND_defconfig | 1 + configs/T2080RDB_revD_SDCARD_defconfig | 1 + configs/T2080RDB_revD_SPIFLASH_defconfig | 1 + configs/T2080RDB_revD_defconfig | 1 + configs/T4240RDB_SDCARD_defconfig | 1 + configs/T4240RDB_defconfig | 1 + configs/kmcent2_defconfig | 1 + include/configs/P2041RDB.h | 1 - include/configs/T102xRDB.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240RDB.h | 1 - include/configs/corenet_ds.h | 1 - include/configs/kmcent2.h | 1 - scripts/config_whitelist.txt | 1 - 50 files changed, 43 insertions(+), 9 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 915e28e1108..b6881bf1ff3 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -1230,6 +1230,9 @@ config SYS_CPC_REINIT_F config SYS_FSL_CPC bool "Corenet Platform Cache support" +config SYS_CACHE_STASHING + bool "Enable cache stashing" + config SYS_MPC85XX_NO_RESETVEC bool "Discard resetvec section and move bootpg section up" depends on MPC85xx diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index 4c453a7cd94..30bf78be1e6 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index b5f920b013e..d5ad60981a2 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index ecf63e59c6b..97b01b498bf 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index e609dfcbf21..c1eb0805329 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index 59fdc33ad47..1df522a7449 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index 17aa980518d..2380cfc7710 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index 2be600a5847..8a2464df91d 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index f22719558fe..0abf6e1631d 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index 2aba2228947..66769e03c77 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index 9bfb0a88f11..8b5b81448a5 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index 1d5f00d1c8b..a0b12d049ef 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index 741adc51622..f48b0f92f72 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index c10c94849e0..bf7287417e9 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index 111ca1d4877..c3a5f630a97 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index fd94afa762f..9dac9e94c64 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index d44f0625585..de2b09c18fe 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -15,6 +15,7 @@ CONFIG_TARGET_T1024RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index fdff32c2d2d..3a3cff873b2 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -16,6 +16,7 @@ CONFIG_TARGET_T1024RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index fdfbdd2ec04..9499f585f1a 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -18,6 +18,7 @@ CONFIG_TARGET_T1024RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index 9f1599fb633..da28ef143f8 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index aca69b32160..e51e363cfdd 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -14,6 +14,7 @@ CONFIG_TARGET_T1042D4RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index fcf530d44f1..e86f0fa99a6 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -15,6 +15,7 @@ CONFIG_TARGET_T1042D4RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 3e0239edf3d..c8d8857ccbc 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -17,6 +17,7 @@ CONFIG_TARGET_T1042D4RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig index 3063157a7f6..1f3d6f6985f 100644 --- a/configs/T1042D4RDB_defconfig +++ b/configs/T1042D4RDB_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 0a83ed19b19..f9475619603 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -14,6 +14,7 @@ CONFIG_TARGET_T2080QDS=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index 2f12b4e609e..d83d3654237 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -15,6 +15,7 @@ CONFIG_TARGET_T2080QDS=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index 2fc4e16cfe2..a18ea565166 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_NXP_ESBC=y CONFIG_BOOTSCRIPT_HDR_ADDR=0xee020000 CONFIG_PCIE1=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 7adf3af6b80..160e697159f 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -17,6 +17,7 @@ CONFIG_TARGET_T2080QDS=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig index 2228c64d10f..16563ea8afc 100644 --- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SRIO_PCIE_BOOT_SLAVE=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index fbfbab84a18..e7775dac0b8 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index b84d653d49f..472e5779af6 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -14,6 +14,7 @@ CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index 21f76bd4b0d..6882baf164a 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -15,6 +15,7 @@ CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index bcc60b7ade9..5b1824ddb9b 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -17,6 +17,7 @@ CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index 8df5b3db290..6c6835eee31 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index a8e020ae684..a34c7caec7e 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -14,6 +14,7 @@ CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index 3baf69a0886..0f503a889cc 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -15,6 +15,7 @@ CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y CONFIG_PCIE1=y diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index 9d8feac9ec2..d5845febd8d 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -17,6 +17,7 @@ CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y CONFIG_PCIE1=y diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig index e4eaa75d302..e599c4e640e 100644 --- a/configs/T2080RDB_revD_defconfig +++ b/configs/T2080RDB_revD_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_T2080RDB_REV_D=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index a2062b4b3d1..bd467ac7cfb 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -15,6 +15,7 @@ CONFIG_TARGET_T4240RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index c3216474c31..5b7849ea6ba 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig index ee900f5d9cd..a0c92441cea 100644 --- a/configs/kmcent2_defconfig +++ b/configs/kmcent2_defconfig @@ -13,6 +13,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_FSL_CPC=y +CONFIG_SYS_CACHE_STASHING=y # CONFIG_DEEP_SLEEP is not set CONFIG_PCIE1=y CONFIG_KM_DEF_NETDEV="eth2" diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 64f4c244fa2..2d552835b77 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -45,7 +45,6 @@ /* * These can be toggled for performance analysis, otherwise use default. */ -#define CONFIG_SYS_CACHE_STASHING #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E #define CONFIG_POST CONFIG_SYS_POST_MEMORY /* test POST memory test */ diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 3df6ec6246a..c90ffe048c6 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -95,7 +95,6 @@ /* * These can be toggled for performance analysis, otherwise use default. */ -#define CONFIG_SYS_CACHE_STASHING #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 8503fd10879..56486cf5c93 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -63,7 +63,6 @@ /* * These can be toggled for performance analysis, otherwise use default. */ -#define CONFIG_SYS_CACHE_STASHING #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index e981f621c37..710254a8fb4 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -68,7 +68,6 @@ /* * These can be toggled for performance analysis, otherwise use default. */ -#define CONFIG_SYS_CACHE_STASHING #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 48cdc75a08d..8ade2e3c829 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -63,7 +63,6 @@ /* * These can be toggled for performance analysis, otherwise use default. */ -#define CONFIG_SYS_CACHE_STASHING #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index c31b0b68415..653483cc99f 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -44,7 +44,6 @@ /* * These can be toggled for performance analysis, otherwise use default. */ -#define CONFIG_SYS_CACHE_STASHING #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index f20f4e35e95..4eeca47c253 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -38,7 +38,6 @@ /* * These can be toggled for performance analysis, otherwise use default. */ -#define CONFIG_SYS_CACHE_STASHING #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 3f22ddc6dd8..b389229b754 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -146,7 +146,6 @@ /* * These can be toggled for performance analysis, otherwise use default. */ -#define CONFIG_SYS_CACHE_STASHING #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E /* POST memory regions test */ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 0a2b8179d49..000ec0945f9 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -495,7 +495,6 @@ CONFIG_SYS_CACHE_ACR1 CONFIG_SYS_CACHE_ACR2 CONFIG_SYS_CACHE_DCACR CONFIG_SYS_CACHE_ICACR -CONFIG_SYS_CACHE_STASHING CONFIG_SYS_CCSRBAR CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR_PHYS_HIGH -- GitLab From 95cc3efcc1ec22be2c649ef4cdc065fa9f7fb697 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 27 Jun 2022 13:35:47 -0400 Subject: [PATCH 577/581] arm: Remove strongarm support There are no platforms using this architecture anymore, remove it. Signed-off-by: Tom Rini --- arch/arm/Kconfig | 7 - arch/arm/Makefile | 2 - arch/arm/cpu/sa1100/Makefile | 9 - arch/arm/cpu/sa1100/cpu.c | 65 - arch/arm/cpu/sa1100/start.S | 126 - arch/arm/cpu/sa1100/timer.c | 66 - arch/arm/include/asm/arch-sa1100/bitfield.h | 112 - arch/arm/include/asm/proc-armv/system.h | 3 +- drivers/usb/gadget/ether.c | 15 - drivers/usb/gadget/gadget_chips.h | 9 - include/SA-1100.h | 2833 ------------------- 11 files changed, 1 insertion(+), 3246 deletions(-) delete mode 100644 arch/arm/cpu/sa1100/Makefile delete mode 100644 arch/arm/cpu/sa1100/cpu.c delete mode 100644 arch/arm/cpu/sa1100/start.S delete mode 100644 arch/arm/cpu/sa1100/timer.c delete mode 100644 arch/arm/include/asm/arch-sa1100/bitfield.h delete mode 100644 include/SA-1100.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 434c5e98fa3..163e94fec0c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -330,11 +330,6 @@ config CPU_V7R select SYS_ARM_MPU select SYS_CACHE_SHIFT_6 -config CPU_SA1100 - bool - select SYS_CACHE_SHIFT_5 - imply SYS_ARM_MMU - config SYS_CPU default "arm720t" if CPU_ARM720T default "arm920t" if CPU_ARM920T @@ -345,7 +340,6 @@ config SYS_CPU default "armv7" if CPU_V7A default "armv7" if CPU_V7R default "armv7m" if CPU_V7M - default "sa1100" if CPU_SA1100 default "armv8" if ARM64 config SYS_ARM_ARCH @@ -359,7 +353,6 @@ config SYS_ARM_ARCH default 7 if CPU_V7A default 7 if CPU_V7M default 7 if CPU_V7R - default 4 if CPU_SA1100 default 8 if ARM64 choice diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 09fc3188788..a37603035d8 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -10,7 +10,6 @@ arch-$(CONFIG_CPU_ARM720T) =-march=armv4 arch-$(CONFIG_CPU_ARM920T) =-march=armv4t arch-$(CONFIG_CPU_ARM926EJS) =-march=armv5te arch-$(CONFIG_CPU_ARM946ES) =-march=armv5te -arch-$(CONFIG_CPU_SA1100) =-march=armv4 arch-$(CONFIG_CPU_ARM1136) =-march=armv5t arch-$(CONFIG_CPU_ARM1176) =-march=armv5t arch-$(CONFIG_CPU_V7A) =$(call cc-option, -march=armv7-a, \ @@ -39,7 +38,6 @@ tune-$(CONFIG_CPU_ARM720T) =-mtune=arm7tdmi tune-$(CONFIG_CPU_ARM920T) = tune-$(CONFIG_CPU_ARM926EJS) = tune-$(CONFIG_CPU_ARM946ES) = -tune-$(CONFIG_CPU_SA1100) =-mtune=strongarm1100 tune-$(CONFIG_CPU_ARM1136) = tune-$(CONFIG_CPU_ARM1176) = tune-$(CONFIG_CPU_V7A) =-mtune=generic-armv7-a diff --git a/arch/arm/cpu/sa1100/Makefile b/arch/arm/cpu/sa1100/Makefile deleted file mode 100644 index 38193092cdb..00000000000 --- a/arch/arm/cpu/sa1100/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. - -extra-y = start.o - -obj-y += cpu.o -obj-y += timer.o diff --git a/arch/arm/cpu/sa1100/cpu.c b/arch/arm/cpu/sa1100/cpu.c deleted file mode 100644 index 6f67f7fc228..00000000000 --- a/arch/arm/cpu/sa1100/cpu.c +++ /dev/null @@ -1,65 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Marius Groeger - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Alex Zuepke - */ - -/* - * CPU specific code - */ - -#include -#include -#include -#include -#include -#include - -static void cache_flush(void); - -int cleanup_before_linux (void) -{ - /* - * this function is called just before we call linux - * it prepares the processor for linux - * - * just disable everything that can disturb booting linux - */ - - disable_interrupts(); - - /* turn off I-cache */ - icache_disable(); - dcache_disable(); - - /* flush I-cache */ - cache_flush(); - - return (0); -} - -/* flush I/D-cache */ -static void cache_flush (void) -{ - unsigned long i = 0; - - asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i)); -} - -#define RST_BASE 0x90030000 -#define RSRR 0x00 -#define RCSR 0x04 - -__attribute__((noreturn)) void reset_cpu(void) -{ - /* repeat endlessly */ - while (1) { - writel(0, RST_BASE + RCSR); - writel(1, RST_BASE + RSRR); - } -} diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S deleted file mode 100644 index 2f84f20575c..00000000000 --- a/arch/arm/cpu/sa1100/start.S +++ /dev/null @@ -1,126 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * armboot - Startup Code for SA1100 CPU - * - * Copyright (C) 1998 Dan Malek - * Copyright (C) 1999 Magnus Damm - * Copyright (C) 2000 Wolfgang Denk - * Copyright (c) 2001 Alex Züpke - */ - -#include -#include - -/* - ************************************************************************* - * - * Startup Code (reset vector) - * - * do important init only if we don't start from memory! - * relocate armboot to ram - * setup stack - * jump to second stage - * - ************************************************************************* - */ - - .globl reset - -reset: - /* - * set the cpu to SVC32 mode - */ - mrs r0,cpsr - bic r0,r0,#0x1f - orr r0,r0,#0xd3 - msr cpsr,r0 - - /* - * we do sys-critical inits only at reboot, - * not when booting from ram! - */ -#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) - bl cpu_init_crit -#endif - - bl _main - -/*------------------------------------------------------------------------------*/ - - .globl c_runtime_cpu_setup -c_runtime_cpu_setup: - - mov pc, lr - -/* - ************************************************************************* - * - * CPU_init_critical registers - * - * setup important registers - * setup memory timing - * - ************************************************************************* - */ - - -/* Interrupt-Controller base address */ -IC_BASE: .word 0x90050000 -#define ICMR 0x04 - - -/* Reset-Controller */ -RST_BASE: .word 0x90030000 -#define RSRR 0x00 -#define RCSR 0x04 - - -/* PWR */ -PWR_BASE: .word 0x90020000 -#define PSPR 0x08 -#define PPCR 0x14 -cpuspeed: .word CONFIG_SYS_CPUSPEED - - -cpu_init_crit: - /* - * mask all IRQs - */ - ldr r0, IC_BASE - mov r1, #0x00 - str r1, [r0, #ICMR] - - /* set clock speed */ - ldr r0, PWR_BASE - ldr r1, cpuspeed - str r1, [r0, #PPCR] - -#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT_ONLY) - /* - * before relocating, we have to setup RAM timing - * because memory timing is board-dependend, you will - * find a lowlevel_init.S in your board directory. - */ - mov ip, lr - bl lowlevel_init - mov lr, ip -#endif - - /* - * disable MMU stuff and enable I-cache - */ - mrc p15,0,r0,c1,c0 - bic r0, r0, #0x00002000 @ clear bit 13 (X) - bic r0, r0, #0x0000000f @ clear bits 3-0 (WCAM) - orr r0, r0, #0x00001000 @ set bit 12 (I) Icache - orr r0, r0, #0x00000002 @ set bit 1 (A) Align - mcr p15,0,r0,c1,c0 - - /* - * flush v4 I/D caches - */ - mov r0, #0 - mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */ - mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */ - - mov pc, lr diff --git a/arch/arm/cpu/sa1100/timer.c b/arch/arm/cpu/sa1100/timer.c deleted file mode 100644 index a5cdaf5a66c..00000000000 --- a/arch/arm/cpu/sa1100/timer.c +++ /dev/null @@ -1,66 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Marius Groeger - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Alex Zuepke - */ - -#include -#include -#include -#include - -static ulong get_timer_masked (void) -{ - return OSCR; -} - -ulong get_timer (ulong base) -{ - return get_timer_masked (); -} - -void __udelay(unsigned long usec) -{ - ulong tmo; - ulong endtime; - signed long diff; - - if (usec >= 1000) { - tmo = usec / 1000; - tmo *= CONFIG_SYS_HZ; - tmo /= 1000; - } else { - tmo = usec * CONFIG_SYS_HZ; - tmo /= (1000*1000); - } - - endtime = get_timer_masked () + tmo; - - do { - ulong now = get_timer_masked (); - diff = endtime - now; - } while (diff >= 0); -} - -/* - * This function is derived from PowerPC code (read timebase as long long). - * On ARM it just returns the timer value. - */ -unsigned long long get_ticks(void) -{ - return get_timer(0); -} - -/* - * This function is derived from PowerPC code (timebase clock frequency). - * On ARM it returns the number of timer ticks per second. - */ -ulong get_tbclk(void) -{ - return CONFIG_SYS_HZ; -} diff --git a/arch/arm/include/asm/arch-sa1100/bitfield.h b/arch/arm/include/asm/arch-sa1100/bitfield.h deleted file mode 100644 index 104a21c2e47..00000000000 --- a/arch/arm/include/asm/arch-sa1100/bitfield.h +++ /dev/null @@ -1,112 +0,0 @@ -/* - * FILE bitfield.h - * - * Version 1.1 - * Author Copyright (c) Marc A. Viredaz, 1998 - * DEC Western Research Laboratory, Palo Alto, CA - * Date April 1998 (April 1997) - * System Advanced RISC Machine (ARM) - * Language C or ARM Assembly - * Purpose Definition of macros to operate on bit fields. - */ - - -#ifndef __BITFIELD_H -#define __BITFIELD_H - -#ifndef __ASSEMBLY__ -#define UData(Data) ((unsigned long) (Data)) -#else -#define UData(Data) (Data) -#endif - - -/* - * MACRO: Fld - * - * Purpose - * The macro "Fld" encodes a bit field, given its size and its shift value - * with respect to bit 0. - * - * Note - * A more intuitive way to encode bit fields would have been to use their - * mask. However, extracting size and shift value information from a bit - * field's mask is cumbersome and might break the assembler (255-character - * line-size limit). - * - * Input - * Size Size of the bit field, in number of bits. - * Shft Shift value of the bit field with respect to bit 0. - * - * Output - * Fld Encoded bit field. - */ - -#define Fld(Size, Shft) (((Size) << 16) + (Shft)) - - -/* - * MACROS: FSize, FShft, FMsk, FAlnMsk, F1stBit - * - * Purpose - * The macros "FSize", "FShft", "FMsk", "FAlnMsk", and "F1stBit" return - * the size, shift value, mask, aligned mask, and first bit of a - * bit field. - * - * Input - * Field Encoded bit field (using the macro "Fld"). - * - * Output - * FSize Size of the bit field, in number of bits. - * FShft Shift value of the bit field with respect to bit 0. - * FMsk Mask for the bit field. - * FAlnMsk Mask for the bit field, aligned on bit 0. - * F1stBit First bit of the bit field. - */ - -#define FSize(Field) ((Field) >> 16) -#define FShft(Field) ((Field) & 0x0000FFFF) -#define FMsk(Field) (((UData (1) << FSize (Field)) - 1) << FShft (Field)) -#define FAlnMsk(Field) ((UData (1) << FSize (Field)) - 1) -#define F1stBit(Field) (UData (1) << FShft (Field)) - - -/* - * MACRO: FInsrt - * - * Purpose - * The macro "FInsrt" inserts a value into a bit field by shifting the - * former appropriately. - * - * Input - * Value Bit-field value. - * Field Encoded bit field (using the macro "Fld"). - * - * Output - * FInsrt Bit-field value positioned appropriately. - */ - -#define FInsrt(Value, Field) \ - (UData (Value) << FShft (Field)) - - -/* - * MACRO: FExtr - * - * Purpose - * The macro "FExtr" extracts the value of a bit field by masking and - * shifting it appropriately. - * - * Input - * Data Data containing the bit-field to be extracted. - * Field Encoded bit field (using the macro "Fld"). - * - * Output - * FExtr Bit-field value. - */ - -#define FExtr(Data, Field) \ - ((UData (Data) >> FShft (Field)) & FAlnMsk (Field)) - - -#endif /* __BITFIELD_H */ diff --git a/arch/arm/include/asm/proc-armv/system.h b/arch/arm/include/asm/proc-armv/system.h index c61374e9f2e..a1f59d9cbae 100644 --- a/arch/arm/include/asm/proc-armv/system.h +++ b/arch/arm/include/asm/proc-armv/system.h @@ -163,8 +163,7 @@ #endif /* CONFIG_ARM64 */ -#if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110) || \ - defined(CONFIG_ARM64) +#if defined(CONFIG_ARM64) /* * On the StrongARM, "swp" is terminally broken since it bypasses the * cache totally. This means that the cache becomes inconsistent, and, diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c index 72b4f7f306a..abb5332f139 100644 --- a/drivers/usb/gadget/ether.c +++ b/drivers/usb/gadget/ether.c @@ -1048,13 +1048,6 @@ static int eth_set_config(struct eth_dev *dev, unsigned number, int result = 0; struct usb_gadget *gadget = dev->gadget; - if (gadget_is_sa1100(gadget) - && dev->config - && dev->tx_qlen != 0) { - /* tx fifo is full, but we can't clear it...*/ - pr_err("can't change configurations"); - return -ESPIPE; - } eth_reset_config(dev); switch (number) { @@ -2019,14 +2012,6 @@ static int eth_bind(struct usb_gadget *gadget) /* sh doesn't support multiple interfaces or configs */ cdc = 0; rndis = 0; - } else if (gadget_is_sa1100(gadget)) { - /* hardware can't write zlps */ - zlp = 0; - /* - * sa1100 CAN do CDC, without status endpoint ... we use - * non-CDC to be compatible with ARM Linux-2.4 "usb-eth". - */ - cdc = 0; } gcnum = usb_gadget_controller_number(gadget); diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h index 66ccd054172..abc6dc7f89f 100644 --- a/drivers/usb/gadget/gadget_chips.h +++ b/drivers/usb/gadget/gadget_chips.h @@ -45,13 +45,6 @@ #define gadget_is_sh(g) 0 #endif -/* not yet stable on 2.6 (would help "original Zaurus") */ -#ifdef CONFIG_USB_GADGET_SA1100 -#define gadget_is_sa1100(g) (!strcmp("sa1100_udc", (g)->name)) -#else -#define gadget_is_sa1100(g) 0 -#endif - /* handhelds.org tree (?) */ #ifdef CONFIG_USB_GADGET_MQ11XX #define gadget_is_mq11xx(g) (!strcmp("mq11xx_udc", (g)->name)) @@ -183,8 +176,6 @@ static inline int usb_gadget_controller_number(struct usb_gadget *gadget) return 0x02; else if (gadget_is_sh(gadget)) return 0x04; - else if (gadget_is_sa1100(gadget)) - return 0x05; else if (gadget_is_goku(gadget)) return 0x06; else if (gadget_is_mq11xx(gadget)) diff --git a/include/SA-1100.h b/include/SA-1100.h deleted file mode 100644 index 7589df238a6..00000000000 --- a/include/SA-1100.h +++ /dev/null @@ -1,2833 +0,0 @@ -/* - * FILE SA-1100.h - * - * Version 1.2 - * Author Copyright (c) Marc A. Viredaz, 1998 - * DEC Western Research Laboratory, Palo Alto, CA - * Date January 1998 (April 1997) - * System StrongARM SA-1100 - * Language C or ARM Assembly - * Purpose Definition of constants related to the StrongARM - * SA-1100 microprocessor (Advanced RISC Machine (ARM) - * architecture version 4). This file is based on the - * StrongARM SA-1100 data sheet version 2.2. - * - * Language-specific definitions are selected by the - * macro "LANGUAGE", which should be defined as either - * "C" (default) or "Assembly". - */ - - -#ifndef LANGUAGE -# ifdef __ASSEMBLY__ -# define LANGUAGE Assembly -# else -# define LANGUAGE C -# endif -#endif - -#ifndef io_p2v -#define io_p2v(PhAdd) (PhAdd) -#endif - -#include - -#define C 0 -#define Assembly 1 - - -#if LANGUAGE == C -typedef unsigned short Word16 ; -typedef unsigned int Word32 ; -typedef Word32 Word ; -typedef Word Quad [4] ; -typedef void *Address ; -typedef void (*ExcpHndlr) (void) ; -#endif /* LANGUAGE == C */ - - -/* - * Memory - */ - -#define MemBnkSp 0x08000000 /* Memory Bank Space [byte] */ - -#define StMemBnkSp MemBnkSp /* Static Memory Bank Space [byte] */ -#define StMemBnk0Sp StMemBnkSp /* Static Memory Bank 0 Space */ - /* [byte] */ -#define StMemBnk1Sp StMemBnkSp /* Static Memory Bank 1 Space */ - /* [byte] */ -#define StMemBnk2Sp StMemBnkSp /* Static Memory Bank 2 Space */ - /* [byte] */ -#define StMemBnk3Sp StMemBnkSp /* Static Memory Bank 3 Space */ - /* [byte] */ - -#define DRAMBnkSp MemBnkSp /* DRAM Bank Space [byte] */ -#define DRAMBnk0Sp DRAMBnkSp /* DRAM Bank 0 Space [byte] */ -#define DRAMBnk1Sp DRAMBnkSp /* DRAM Bank 1 Space [byte] */ -#define DRAMBnk2Sp DRAMBnkSp /* DRAM Bank 2 Space [byte] */ -#define DRAMBnk3Sp DRAMBnkSp /* DRAM Bank 3 Space [byte] */ - -#define ZeroMemSp MemBnkSp /* Zero Memory bank Space [byte] */ - -#define _StMemBnk(Nb) /* Static Memory Bank [0..3] */ \ - (0x00000000 + (Nb)*StMemBnkSp) -#define _StMemBnk0 _StMemBnk (0) /* Static Memory Bank 0 */ -#define _StMemBnk1 _StMemBnk (1) /* Static Memory Bank 1 */ -#define _StMemBnk2 _StMemBnk (2) /* Static Memory Bank 2 */ -#define _StMemBnk3 _StMemBnk (3) /* Static Memory Bank 3 */ - -#if LANGUAGE == C -typedef Quad StMemBnkType [StMemBnkSp/sizeof (Quad)] ; -#define StMemBnk /* Static Memory Bank [0..3] */ \ - ((StMemBnkType *) io_p2v (_StMemBnk (0))) -#define StMemBnk0 (StMemBnk [0]) /* Static Memory Bank 0 */ -#define StMemBnk1 (StMemBnk [1]) /* Static Memory Bank 1 */ -#define StMemBnk2 (StMemBnk [2]) /* Static Memory Bank 2 */ -#define StMemBnk3 (StMemBnk [3]) /* Static Memory Bank 3 */ -#endif /* LANGUAGE == C */ - -#define _DRAMBnk(Nb) /* DRAM Bank [0..3] */ \ - (0xC0000000 + (Nb)*DRAMBnkSp) -#define _DRAMBnk0 _DRAMBnk (0) /* DRAM Bank 0 */ -#define _DRAMBnk1 _DRAMBnk (1) /* DRAM Bank 1 */ -#define _DRAMBnk2 _DRAMBnk (2) /* DRAM Bank 2 */ -#define _DRAMBnk3 _DRAMBnk (3) /* DRAM Bank 3 */ - -#if LANGUAGE == C -typedef Quad DRAMBnkType [DRAMBnkSp/sizeof (Quad)] ; -#define DRAMBnk /* DRAM Bank [0..3] */ \ - ((DRAMBnkType *) io_p2v (_DRAMBnk (0))) -#define DRAMBnk0 (DRAMBnk [0]) /* DRAM Bank 0 */ -#define DRAMBnk1 (DRAMBnk [1]) /* DRAM Bank 1 */ -#define DRAMBnk2 (DRAMBnk [2]) /* DRAM Bank 2 */ -#define DRAMBnk3 (DRAMBnk [3]) /* DRAM Bank 3 */ -#endif /* LANGUAGE == C */ - -#define _ZeroMem 0xE0000000 /* Zero Memory bank */ - -#if LANGUAGE == C -typedef Quad ZeroMemType [ZeroMemSp/sizeof (Quad)] ; -#define ZeroMem /* Zero Memory bank */ \ - (*((ZeroMemType *) io_p2v (_ZeroMem))) -#endif /* LANGUAGE == C */ - - -/* - * Personal Computer Memory Card International Association (PCMCIA) sockets - */ - -#define PCMCIAPrtSp 0x04000000 /* PCMCIA Partition Space [byte] */ -#define PCMCIASp (4*PCMCIAPrtSp) /* PCMCIA Space [byte] */ -#define PCMCIAIOSp PCMCIAPrtSp /* PCMCIA I/O Space [byte] */ -#define PCMCIAAttrSp PCMCIAPrtSp /* PCMCIA Attribute Space [byte] */ -#define PCMCIAMemSp PCMCIAPrtSp /* PCMCIA Memory Space [byte] */ - -#define PCMCIA0Sp PCMCIASp /* PCMCIA 0 Space [byte] */ -#define PCMCIA0IOSp PCMCIAIOSp /* PCMCIA 0 I/O Space [byte] */ -#define PCMCIA0AttrSp PCMCIAAttrSp /* PCMCIA 0 Attribute Space [byte] */ -#define PCMCIA0MemSp PCMCIAMemSp /* PCMCIA 0 Memory Space [byte] */ - -#define PCMCIA1Sp PCMCIASp /* PCMCIA 1 Space [byte] */ -#define PCMCIA1IOSp PCMCIAIOSp /* PCMCIA 1 I/O Space [byte] */ -#define PCMCIA1AttrSp PCMCIAAttrSp /* PCMCIA 1 Attribute Space [byte] */ -#define PCMCIA1MemSp PCMCIAMemSp /* PCMCIA 1 Memory Space [byte] */ - -#define _PCMCIA(Nb) /* PCMCIA [0..1] */ \ - (0x20000000 + (Nb)*PCMCIASp) -#define _PCMCIAIO(Nb) _PCMCIA (Nb) /* PCMCIA I/O [0..1] */ -#define _PCMCIAAttr(Nb) /* PCMCIA Attribute [0..1] */ \ - (_PCMCIA (Nb) + 2*PCMCIAPrtSp) -#define _PCMCIAMem(Nb) /* PCMCIA Memory [0..1] */ \ - (_PCMCIA (Nb) + 3*PCMCIAPrtSp) - -#define _PCMCIA0 _PCMCIA (0) /* PCMCIA 0 */ -#define _PCMCIA0IO _PCMCIAIO (0) /* PCMCIA 0 I/O */ -#define _PCMCIA0Attr _PCMCIAAttr (0) /* PCMCIA 0 Attribute */ -#define _PCMCIA0Mem _PCMCIAMem (0) /* PCMCIA 0 Memory */ - -#define _PCMCIA1 _PCMCIA (1) /* PCMCIA 1 */ -#define _PCMCIA1IO _PCMCIAIO (1) /* PCMCIA 1 I/O */ -#define _PCMCIA1Attr _PCMCIAAttr (1) /* PCMCIA 1 Attribute */ -#define _PCMCIA1Mem _PCMCIAMem (1) /* PCMCIA 1 Memory */ - -#if LANGUAGE == C - -typedef Quad PCMCIAPrtType [PCMCIAPrtSp/sizeof (Quad)] ; -typedef PCMCIAPrtType PCMCIAType [PCMCIASp/PCMCIAPrtSp] ; - -#define PCMCIA0 /* PCMCIA 0 */ \ - (*((PCMCIAType *) io_p2v (_PCMCIA0))) -#define PCMCIA0IO /* PCMCIA 0 I/O */ \ - (*((PCMCIAPrtType *) io_p2v (_PCMCIA0IO))) -#define PCMCIA0Attr /* PCMCIA 0 Attribute */ \ - (*((PCMCIAPrtType *) io_p2v (_PCMCIA0Attr))) -#define PCMCIA0Mem /* PCMCIA 0 Memory */ \ - (*((PCMCIAPrtType *) io_p2v (_PCMCIA0Mem))) - -#define PCMCIA1 /* PCMCIA 1 */ \ - (*((PCMCIAType *) io_p2v (_PCMCIA1))) -#define PCMCIA1IO /* PCMCIA 1 I/O */ \ - (*((PCMCIAPrtType *) io_p2v (_PCMCIA1IO))) -#define PCMCIA1Attr /* PCMCIA 1 Attribute */ \ - (*((PCMCIAPrtType *) io_p2v (_PCMCIA1Attr))) -#define PCMCIA1Mem /* PCMCIA 1 Memory */ \ - (*((PCMCIAPrtType *) io_p2v (_PCMCIA1Mem))) - -#endif /* LANGUAGE == C */ - - -/* - * Universal Serial Bus (USB) Device Controller (UDC) control registers - * - * Registers - * Ser0UDCCR Serial port 0 Universal Serial Bus (USB) Device - * Controller (UDC) Control Register (read/write). - * Ser0UDCAR Serial port 0 Universal Serial Bus (USB) Device - * Controller (UDC) Address Register (read/write). - * Ser0UDCOMP Serial port 0 Universal Serial Bus (USB) Device - * Controller (UDC) Output Maximum Packet size register - * (read/write). - * Ser0UDCIMP Serial port 0 Universal Serial Bus (USB) Device - * Controller (UDC) Input Maximum Packet size register - * (read/write). - * Ser0UDCCS0 Serial port 0 Universal Serial Bus (USB) Device - * Controller (UDC) Control/Status register end-point 0 - * (read/write). - * Ser0UDCCS1 Serial port 0 Universal Serial Bus (USB) Device - * Controller (UDC) Control/Status register end-point 1 - * (output, read/write). - * Ser0UDCCS2 Serial port 0 Universal Serial Bus (USB) Device - * Controller (UDC) Control/Status register end-point 2 - * (input, read/write). - * Ser0UDCD0 Serial port 0 Universal Serial Bus (USB) Device - * Controller (UDC) Data register end-point 0 - * (read/write). - * Ser0UDCWC Serial port 0 Universal Serial Bus (USB) Device - * Controller (UDC) Write Count register end-point 0 - * (read). - * Ser0UDCDR Serial port 0 Universal Serial Bus (USB) Device - * Controller (UDC) Data Register (read/write). - * Ser0UDCSR Serial port 0 Universal Serial Bus (USB) Device - * Controller (UDC) Status Register (read/write). - */ - -#define _Ser0UDCCR 0x80000000 /* Ser. port 0 UDC Control Reg. */ -#define _Ser0UDCAR 0x80000004 /* Ser. port 0 UDC Address Reg. */ -#define _Ser0UDCOMP 0x80000008 /* Ser. port 0 UDC Output Maximum */ - /* Packet size reg. */ -#define _Ser0UDCIMP 0x8000000C /* Ser. port 0 UDC Input Maximum */ - /* Packet size reg. */ -#define _Ser0UDCCS0 0x80000010 /* Ser. port 0 UDC Control/Status */ - /* reg. end-point 0 */ -#define _Ser0UDCCS1 0x80000014 /* Ser. port 0 UDC Control/Status */ - /* reg. end-point 1 (output) */ -#define _Ser0UDCCS2 0x80000018 /* Ser. port 0 UDC Control/Status */ - /* reg. end-point 2 (input) */ -#define _Ser0UDCD0 0x8000001C /* Ser. port 0 UDC Data reg. */ - /* end-point 0 */ -#define _Ser0UDCWC 0x80000020 /* Ser. port 0 UDC Write Count */ - /* reg. end-point 0 */ -#define _Ser0UDCDR 0x80000028 /* Ser. port 0 UDC Data Reg. */ -#define _Ser0UDCSR 0x80000030 /* Ser. port 0 UDC Status Reg. */ - -#if LANGUAGE == C -#define Ser0UDCCR /* Ser. port 0 UDC Control Reg. */ \ - (*((volatile Word *) io_p2v (_Ser0UDCCR))) -#define Ser0UDCAR /* Ser. port 0 UDC Address Reg. */ \ - (*((volatile Word *) io_p2v (_Ser0UDCAR))) -#define Ser0UDCOMP /* Ser. port 0 UDC Output Maximum */ \ - /* Packet size reg. */ \ - (*((volatile Word *) io_p2v (_Ser0UDCOMP))) -#define Ser0UDCIMP /* Ser. port 0 UDC Input Maximum */ \ - /* Packet size reg. */ \ - (*((volatile Word *) io_p2v (_Ser0UDCIMP))) -#define Ser0UDCCS0 /* Ser. port 0 UDC Control/Status */ \ - /* reg. end-point 0 */ \ - (*((volatile Word *) io_p2v (_Ser0UDCCS0))) -#define Ser0UDCCS1 /* Ser. port 0 UDC Control/Status */ \ - /* reg. end-point 1 (output) */ \ - (*((volatile Word *) io_p2v (_Ser0UDCCS1))) -#define Ser0UDCCS2 /* Ser. port 0 UDC Control/Status */ \ - /* reg. end-point 2 (input) */ \ - (*((volatile Word *) io_p2v (_Ser0UDCCS2))) -#define Ser0UDCD0 /* Ser. port 0 UDC Data reg. */ \ - /* end-point 0 */ \ - (*((volatile Word *) io_p2v (_Ser0UDCD0))) -#define Ser0UDCWC /* Ser. port 0 UDC Write Count */ \ - /* reg. end-point 0 */ \ - (*((volatile Word *) io_p2v (_Ser0UDCWC))) -#define Ser0UDCDR /* Ser. port 0 UDC Data Reg. */ \ - (*((volatile Word *) io_p2v (_Ser0UDCDR))) -#define Ser0UDCSR /* Ser. port 0 UDC Status Reg. */ \ - (*((volatile Word *) io_p2v (_Ser0UDCSR))) -#endif /* LANGUAGE == C */ - -#define UDCCR_UDD 0x00000001 /* UDC Disable */ -#define UDCCR_UDA 0x00000002 /* UDC Active (read) */ -#define UDCCR_RESIM 0x00000004 /* Resume Interrupt Mask, per errata */ -#define UDCCR_EIM 0x00000008 /* End-point 0 Interrupt Mask */ - /* (disable) */ -#define UDCCR_RIM 0x00000010 /* Receive Interrupt Mask */ - /* (disable) */ -#define UDCCR_TIM 0x00000020 /* Transmit Interrupt Mask */ - /* (disable) */ -#define UDCCR_SRM 0x00000040 /* Suspend/Resume interrupt Mask */ - /* (disable) */ -#define UDCCR_SUSIM UDCCR_SRM /* Per errata, SRM just masks suspend */ -#define UDCCR_REM 0x00000080 /* REset interrupt Mask (disable) */ - -#define UDCAR_ADD Fld (7, 0) /* function ADDress */ - -#define UDCOMP_OUTMAXP Fld (8, 0) /* OUTput MAXimum Packet size - 1 */ - /* [byte] */ -#define UDCOMP_OutMaxPkt(Size) /* Output Maximum Packet size */ \ - /* [1..256 byte] */ \ - (((Size) - 1) << FShft (UDCOMP_OUTMAXP)) - -#define UDCIMP_INMAXP Fld (8, 0) /* INput MAXimum Packet size - 1 */ - /* [byte] */ -#define UDCIMP_InMaxPkt(Size) /* Input Maximum Packet size */ \ - /* [1..256 byte] */ \ - (((Size) - 1) << FShft (UDCIMP_INMAXP)) - -#define UDCCS0_OPR 0x00000001 /* Output Packet Ready (read) */ -#define UDCCS0_IPR 0x00000002 /* Input Packet Ready */ -#define UDCCS0_SST 0x00000004 /* Sent STall */ -#define UDCCS0_FST 0x00000008 /* Force STall */ -#define UDCCS0_DE 0x00000010 /* Data End */ -#define UDCCS0_SE 0x00000020 /* Setup End (read) */ -#define UDCCS0_SO 0x00000040 /* Serviced Output packet ready */ - /* (write) */ -#define UDCCS0_SSE 0x00000080 /* Serviced Setup End (write) */ - -#define UDCCS1_RFS 0x00000001 /* Receive FIFO 12-bytes or more */ - /* Service request (read) */ -#define UDCCS1_RPC 0x00000002 /* Receive Packet Complete */ -#define UDCCS1_RPE 0x00000004 /* Receive Packet Error (read) */ -#define UDCCS1_SST 0x00000008 /* Sent STall */ -#define UDCCS1_FST 0x00000010 /* Force STall */ -#define UDCCS1_RNE 0x00000020 /* Receive FIFO Not Empty (read) */ - -#define UDCCS2_TFS 0x00000001 /* Transmit FIFO 8-bytes or less */ - /* Service request (read) */ -#define UDCCS2_TPC 0x00000002 /* Transmit Packet Complete */ -#define UDCCS2_TPE 0x00000004 /* Transmit Packet Error (read) */ -#define UDCCS2_TUR 0x00000008 /* Transmit FIFO Under-Run */ -#define UDCCS2_SST 0x00000010 /* Sent STall */ -#define UDCCS2_FST 0x00000020 /* Force STall */ - -#define UDCD0_DATA Fld (8, 0) /* receive/transmit DATA FIFOs */ - -#define UDCWC_WC Fld (4, 0) /* Write Count */ - -#define UDCDR_DATA Fld (8, 0) /* receive/transmit DATA FIFOs */ - -#define UDCSR_EIR 0x00000001 /* End-point 0 Interrupt Request */ -#define UDCSR_RIR 0x00000002 /* Receive Interrupt Request */ -#define UDCSR_TIR 0x00000004 /* Transmit Interrupt Request */ -#define UDCSR_SUSIR 0x00000008 /* SUSpend Interrupt Request */ -#define UDCSR_RESIR 0x00000010 /* RESume Interrupt Request */ -#define UDCSR_RSTIR 0x00000020 /* ReSeT Interrupt Request */ - - -/* - * Universal Asynchronous Receiver/Transmitter (UART) control registers - * - * Registers - * Ser1UTCR0 Serial port 1 Universal Asynchronous - * Receiver/Transmitter (UART) Control Register 0 - * (read/write). - * Ser1UTCR1 Serial port 1 Universal Asynchronous - * Receiver/Transmitter (UART) Control Register 1 - * (read/write). - * Ser1UTCR2 Serial port 1 Universal Asynchronous - * Receiver/Transmitter (UART) Control Register 2 - * (read/write). - * Ser1UTCR3 Serial port 1 Universal Asynchronous - * Receiver/Transmitter (UART) Control Register 3 - * (read/write). - * Ser1UTDR Serial port 1 Universal Asynchronous - * Receiver/Transmitter (UART) Data Register - * (read/write). - * Ser1UTSR0 Serial port 1 Universal Asynchronous - * Receiver/Transmitter (UART) Status Register 0 - * (read/write). - * Ser1UTSR1 Serial port 1 Universal Asynchronous - * Receiver/Transmitter (UART) Status Register 1 (read). - * - * Ser2UTCR0 Serial port 2 Universal Asynchronous - * Receiver/Transmitter (UART) Control Register 0 - * (read/write). - * Ser2UTCR1 Serial port 2 Universal Asynchronous - * Receiver/Transmitter (UART) Control Register 1 - * (read/write). - * Ser2UTCR2 Serial port 2 Universal Asynchronous - * Receiver/Transmitter (UART) Control Register 2 - * (read/write). - * Ser2UTCR3 Serial port 2 Universal Asynchronous - * Receiver/Transmitter (UART) Control Register 3 - * (read/write). - * Ser2UTCR4 Serial port 2 Universal Asynchronous - * Receiver/Transmitter (UART) Control Register 4 - * (read/write). - * Ser2UTDR Serial port 2 Universal Asynchronous - * Receiver/Transmitter (UART) Data Register - * (read/write). - * Ser2UTSR0 Serial port 2 Universal Asynchronous - * Receiver/Transmitter (UART) Status Register 0 - * (read/write). - * Ser2UTSR1 Serial port 2 Universal Asynchronous - * Receiver/Transmitter (UART) Status Register 1 (read). - * - * Ser3UTCR0 Serial port 3 Universal Asynchronous - * Receiver/Transmitter (UART) Control Register 0 - * (read/write). - * Ser3UTCR1 Serial port 3 Universal Asynchronous - * Receiver/Transmitter (UART) Control Register 1 - * (read/write). - * Ser3UTCR2 Serial port 3 Universal Asynchronous - * Receiver/Transmitter (UART) Control Register 2 - * (read/write). - * Ser3UTCR3 Serial port 3 Universal Asynchronous - * Receiver/Transmitter (UART) Control Register 3 - * (read/write). - * Ser3UTDR Serial port 3 Universal Asynchronous - * Receiver/Transmitter (UART) Data Register - * (read/write). - * Ser3UTSR0 Serial port 3 Universal Asynchronous - * Receiver/Transmitter (UART) Status Register 0 - * (read/write). - * Ser3UTSR1 Serial port 3 Universal Asynchronous - * Receiver/Transmitter (UART) Status Register 1 (read). - * - * Clocks - * fxtl, Txtl Frequency, period of the system crystal (3.6864 MHz - * or 3.5795 MHz). - * fua, Tua Frequency, period of the UART communication. - */ - -#define _UTCR0(Nb) /* UART Control Reg. 0 [1..3] */ \ - (0x80010000 + ((Nb) - 1)*0x00020000) -#define _UTCR1(Nb) /* UART Control Reg. 1 [1..3] */ \ - (0x80010004 + ((Nb) - 1)*0x00020000) -#define _UTCR2(Nb) /* UART Control Reg. 2 [1..3] */ \ - (0x80010008 + ((Nb) - 1)*0x00020000) -#define _UTCR3(Nb) /* UART Control Reg. 3 [1..3] */ \ - (0x8001000C + ((Nb) - 1)*0x00020000) -#define _UTCR4(Nb) /* UART Control Reg. 4 [2] */ \ - (0x80010010 + ((Nb) - 1)*0x00020000) -#define _UTDR(Nb) /* UART Data Reg. [1..3] */ \ - (0x80010014 + ((Nb) - 1)*0x00020000) -#define _UTSR0(Nb) /* UART Status Reg. 0 [1..3] */ \ - (0x8001001C + ((Nb) - 1)*0x00020000) -#define _UTSR1(Nb) /* UART Status Reg. 1 [1..3] */ \ - (0x80010020 + ((Nb) - 1)*0x00020000) - -#define _Ser1UTCR0 _UTCR0 (1) /* Ser. port 1 UART Control Reg. 0 */ -#define _Ser1UTCR1 _UTCR1 (1) /* Ser. port 1 UART Control Reg. 1 */ -#define _Ser1UTCR2 _UTCR2 (1) /* Ser. port 1 UART Control Reg. 2 */ -#define _Ser1UTCR3 _UTCR3 (1) /* Ser. port 1 UART Control Reg. 3 */ -#define _Ser1UTDR _UTDR (1) /* Ser. port 1 UART Data Reg. */ -#define _Ser1UTSR0 _UTSR0 (1) /* Ser. port 1 UART Status Reg. 0 */ -#define _Ser1UTSR1 _UTSR1 (1) /* Ser. port 1 UART Status Reg. 1 */ - -#define _Ser2UTCR0 _UTCR0 (2) /* Ser. port 2 UART Control Reg. 0 */ -#define _Ser2UTCR1 _UTCR1 (2) /* Ser. port 2 UART Control Reg. 1 */ -#define _Ser2UTCR2 _UTCR2 (2) /* Ser. port 2 UART Control Reg. 2 */ -#define _Ser2UTCR3 _UTCR3 (2) /* Ser. port 2 UART Control Reg. 3 */ -#define _Ser2UTCR4 _UTCR4 (2) /* Ser. port 2 UART Control Reg. 4 */ -#define _Ser2UTDR _UTDR (2) /* Ser. port 2 UART Data Reg. */ -#define _Ser2UTSR0 _UTSR0 (2) /* Ser. port 2 UART Status Reg. 0 */ -#define _Ser2UTSR1 _UTSR1 (2) /* Ser. port 2 UART Status Reg. 1 */ - -#define _Ser3UTCR0 _UTCR0 (3) /* Ser. port 3 UART Control Reg. 0 */ -#define _Ser3UTCR1 _UTCR1 (3) /* Ser. port 3 UART Control Reg. 1 */ -#define _Ser3UTCR2 _UTCR2 (3) /* Ser. port 3 UART Control Reg. 2 */ -#define _Ser3UTCR3 _UTCR3 (3) /* Ser. port 3 UART Control Reg. 3 */ -#define _Ser3UTDR _UTDR (3) /* Ser. port 3 UART Data Reg. */ -#define _Ser3UTSR0 _UTSR0 (3) /* Ser. port 3 UART Status Reg. 0 */ -#define _Ser3UTSR1 _UTSR1 (3) /* Ser. port 3 UART Status Reg. 1 */ - -#if LANGUAGE == C - -#define Ser1UTCR0 /* Ser. port 1 UART Control Reg. 0 */ \ - (*((volatile Word *) io_p2v (_Ser1UTCR0))) -#define Ser1UTCR1 /* Ser. port 1 UART Control Reg. 1 */ \ - (*((volatile Word *) io_p2v (_Ser1UTCR1))) -#define Ser1UTCR2 /* Ser. port 1 UART Control Reg. 2 */ \ - (*((volatile Word *) io_p2v (_Ser1UTCR2))) -#define Ser1UTCR3 /* Ser. port 1 UART Control Reg. 3 */ \ - (*((volatile Word *) io_p2v (_Ser1UTCR3))) -#define Ser1UTDR /* Ser. port 1 UART Data Reg. */ \ - (*((volatile Word *) io_p2v (_Ser1UTDR))) -#define Ser1UTSR0 /* Ser. port 1 UART Status Reg. 0 */ \ - (*((volatile Word *) io_p2v (_Ser1UTSR0))) -#define Ser1UTSR1 /* Ser. port 1 UART Status Reg. 1 */ \ - (*((volatile Word *) io_p2v (_Ser1UTSR1))) - -#define Ser2UTCR0 /* Ser. port 2 UART Control Reg. 0 */ \ - (*((volatile Word *) io_p2v (_Ser2UTCR0))) -#define Ser2UTCR1 /* Ser. port 2 UART Control Reg. 1 */ \ - (*((volatile Word *) io_p2v (_Ser2UTCR1))) -#define Ser2UTCR2 /* Ser. port 2 UART Control Reg. 2 */ \ - (*((volatile Word *) io_p2v (_Ser2UTCR2))) -#define Ser2UTCR3 /* Ser. port 2 UART Control Reg. 3 */ \ - (*((volatile Word *) io_p2v (_Ser2UTCR3))) -#define Ser2UTCR4 /* Ser. port 2 UART Control Reg. 4 */ \ - (*((volatile Word *) io_p2v (_Ser2UTCR4))) -#define Ser2UTDR /* Ser. port 2 UART Data Reg. */ \ - (*((volatile Word *) io_p2v (_Ser2UTDR))) -#define Ser2UTSR0 /* Ser. port 2 UART Status Reg. 0 */ \ - (*((volatile Word *) io_p2v (_Ser2UTSR0))) -#define Ser2UTSR1 /* Ser. port 2 UART Status Reg. 1 */ \ - (*((volatile Word *) io_p2v (_Ser2UTSR1))) - -#define Ser3UTCR0 /* Ser. port 3 UART Control Reg. 0 */ \ - (*((volatile Word *) io_p2v (_Ser3UTCR0))) -#define Ser3UTCR1 /* Ser. port 3 UART Control Reg. 1 */ \ - (*((volatile Word *) io_p2v (_Ser3UTCR1))) -#define Ser3UTCR2 /* Ser. port 3 UART Control Reg. 2 */ \ - (*((volatile Word *) io_p2v (_Ser3UTCR2))) -#define Ser3UTCR3 /* Ser. port 3 UART Control Reg. 3 */ \ - (*((volatile Word *) io_p2v (_Ser3UTCR3))) -#define Ser3UTDR /* Ser. port 3 UART Data Reg. */ \ - (*((volatile Word *) io_p2v (_Ser3UTDR))) -#define Ser3UTSR0 /* Ser. port 3 UART Status Reg. 0 */ \ - (*((volatile Word *) io_p2v (_Ser3UTSR0))) -#define Ser3UTSR1 /* Ser. port 3 UART Status Reg. 1 */ \ - (*((volatile Word *) io_p2v (_Ser3UTSR1))) - -#elif LANGUAGE == Assembly -#define Ser1UTCR0 ( io_p2v (_Ser1UTCR0)) -#define Ser1UTCR1 ( io_p2v (_Ser1UTCR1)) -#define Ser1UTCR2 ( io_p2v (_Ser1UTCR2)) -#define Ser1UTCR3 ( io_p2v (_Ser1UTCR3)) -#define Ser1UTDR ( io_p2v (_Ser1UTDR)) -#define Ser1UTSR0 ( io_p2v (_Ser1UTSR0)) -#define Ser1UTSR1 ( io_p2v (_Ser1UTSR1)) - -#define Ser2UTCR0 ( io_p2v (_Ser2UTCR0)) -#define Ser2UTCR1 ( io_p2v (_Ser2UTCR1)) -#define Ser2UTCR2 ( io_p2v (_Ser2UTCR2)) -#define Ser2UTCR3 ( io_p2v (_Ser2UTCR3)) -#define Ser2UTCR4 ( io_p2v (_Ser2UTCR4)) -#define Ser2UTDR ( io_p2v (_Ser2UTDR)) -#define Ser2UTSR0 ( io_p2v (_Ser2UTSR0)) -#define Ser2UTSR1 ( io_p2v (_Ser2UTSR1)) - -#define Ser3UTCR0 ( io_p2v (_Ser3UTCR0)) -#define Ser3UTCR1 ( io_p2v (_Ser3UTCR1)) -#define Ser3UTCR2 ( io_p2v (_Ser3UTCR2)) -#define Ser3UTCR3 ( io_p2v (_Ser3UTCR3)) -#define Ser3UTDR ( io_p2v (_Ser3UTDR)) -#define Ser3UTSR0 ( io_p2v (_Ser3UTSR0)) -#define Ser3UTSR1 ( io_p2v (_Ser3UTSR1)) - -#endif /* LANGUAGE == C */ - -#define UTCR0_PE 0x00000001 /* Parity Enable */ -#define UTCR0_OES 0x00000002 /* Odd/Even parity Select */ -#define UTCR0_OddPar (UTCR0_OES*0) /* Odd Parity */ -#define UTCR0_EvenPar (UTCR0_OES*1) /* Even Parity */ -#define UTCR0_SBS 0x00000004 /* Stop Bit Select */ -#define UTCR0_1StpBit (UTCR0_SBS*0) /* 1 Stop Bit per frame */ -#define UTCR0_2StpBit (UTCR0_SBS*1) /* 2 Stop Bits per frame */ -#define UTCR0_DSS 0x00000008 /* Data Size Select */ -#define UTCR0_7BitData (UTCR0_DSS*0) /* 7-Bit Data */ -#define UTCR0_8BitData (UTCR0_DSS*1) /* 8-Bit Data */ -#define UTCR0_SCE 0x00000010 /* Sample Clock Enable */ - /* (ser. port 1: GPIO [18], */ - /* ser. port 3: GPIO [20]) */ -#define UTCR0_RCE 0x00000020 /* Receive Clock Edge select */ -#define UTCR0_RcRsEdg (UTCR0_RCE*0) /* Receive clock Rising-Edge */ -#define UTCR0_RcFlEdg (UTCR0_RCE*1) /* Receive clock Falling-Edge */ -#define UTCR0_TCE 0x00000040 /* Transmit Clock Edge select */ -#define UTCR0_TrRsEdg (UTCR0_TCE*0) /* Transmit clock Rising-Edge */ -#define UTCR0_TrFlEdg (UTCR0_TCE*1) /* Transmit clock Falling-Edge */ -#define UTCR0_Ser2IrDA /* Ser. port 2 IrDA settings */ \ - (UTCR0_1StpBit + UTCR0_8BitData) - -#define UTCR1_BRD Fld (4, 0) /* Baud Rate Divisor/16 - 1 [11:8] */ -#define UTCR2_BRD Fld (8, 0) /* Baud Rate Divisor/16 - 1 [7:0] */ - /* fua = fxtl/(16*(BRD[11:0] + 1)) */ - /* Tua = 16*(BRD [11:0] + 1)*Txtl */ -#define UTCR1_BdRtDiv(Div) /* Baud Rate Divisor [16..65536] */ \ - (((Div) - 16)/16 >> FSize (UTCR2_BRD) << \ - FShft (UTCR1_BRD)) -#define UTCR2_BdRtDiv(Div) /* Baud Rate Divisor [16..65536] */ \ - (((Div) - 16)/16 & FAlnMsk (UTCR2_BRD) << \ - FShft (UTCR2_BRD)) - /* fua = fxtl/(16*Floor (Div/16)) */ - /* Tua = 16*Floor (Div/16)*Txtl */ -#define UTCR1_CeilBdRtDiv(Div) /* Ceil. of BdRtDiv [16..65536] */ \ - (((Div) - 1)/16 >> FSize (UTCR2_BRD) << \ - FShft (UTCR1_BRD)) -#define UTCR2_CeilBdRtDiv(Div) /* Ceil. of BdRtDiv [16..65536] */ \ - (((Div) - 1)/16 & FAlnMsk (UTCR2_BRD) << \ - FShft (UTCR2_BRD)) - /* fua = fxtl/(16*Ceil (Div/16)) */ - /* Tua = 16*Ceil (Div/16)*Txtl */ - -#define UTCR3_RXE 0x00000001 /* Receive Enable */ -#define UTCR3_TXE 0x00000002 /* Transmit Enable */ -#define UTCR3_BRK 0x00000004 /* BReaK mode */ -#define UTCR3_RIE 0x00000008 /* Receive FIFO 1/3-to-2/3-full or */ - /* more Interrupt Enable */ -#define UTCR3_TIE 0x00000010 /* Transmit FIFO 1/2-full or less */ - /* Interrupt Enable */ -#define UTCR3_LBM 0x00000020 /* Look-Back Mode */ -#define UTCR3_Ser2IrDA /* Ser. port 2 IrDA settings (RIE, */ \ - /* TIE, LBM can be set or cleared) */ \ - (UTCR3_RXE + UTCR3_TXE) - -#define UTCR4_HSE 0x00000001 /* Hewlett-Packard Serial InfraRed */ - /* (HP-SIR) modulation Enable */ -#define UTCR4_NRZ (UTCR4_HSE*0) /* Non-Return to Zero modulation */ -#define UTCR4_HPSIR (UTCR4_HSE*1) /* HP-SIR modulation */ -#define UTCR4_LPM 0x00000002 /* Low-Power Mode */ -#define UTCR4_Z3_16Bit (UTCR4_LPM*0) /* Zero pulse = 3/16 Bit time */ -#define UTCR4_Z1_6us (UTCR4_LPM*1) /* Zero pulse = 1.6 us */ - -#define UTDR_DATA Fld (8, 0) /* receive/transmit DATA FIFOs */ -#if 0 /* Hidden receive FIFO bits */ -#define UTDR_PRE 0x00000100 /* receive PaRity Error (read) */ -#define UTDR_FRE 0x00000200 /* receive FRaming Error (read) */ -#define UTDR_ROR 0x00000400 /* Receive FIFO Over-Run (read) */ -#endif /* 0 */ - -#define UTSR0_TFS 0x00000001 /* Transmit FIFO 1/2-full or less */ - /* Service request (read) */ -#define UTSR0_RFS 0x00000002 /* Receive FIFO 1/3-to-2/3-full or */ - /* more Service request (read) */ -#define UTSR0_RID 0x00000004 /* Receiver IDle */ -#define UTSR0_RBB 0x00000008 /* Receive Beginning of Break */ -#define UTSR0_REB 0x00000010 /* Receive End of Break */ -#define UTSR0_EIF 0x00000020 /* Error In FIFO (read) */ - -#define UTSR1_TBY 0x00000001 /* Transmitter BusY (read) */ -#define UTSR1_RNE 0x00000002 /* Receive FIFO Not Empty (read) */ -#define UTSR1_TNF 0x00000004 /* Transmit FIFO Not Full (read) */ -#define UTSR1_PRE 0x00000008 /* receive PaRity Error (read) */ -#define UTSR1_FRE 0x00000010 /* receive FRaming Error (read) */ -#define UTSR1_ROR 0x00000020 /* Receive FIFO Over-Run (read) */ - - -/* - * Synchronous Data Link Controller (SDLC) control registers - * - * Registers - * Ser1SDCR0 Serial port 1 Synchronous Data Link Controller (SDLC) - * Control Register 0 (read/write). - * Ser1SDCR1 Serial port 1 Synchronous Data Link Controller (SDLC) - * Control Register 1 (read/write). - * Ser1SDCR2 Serial port 1 Synchronous Data Link Controller (SDLC) - * Control Register 2 (read/write). - * Ser1SDCR3 Serial port 1 Synchronous Data Link Controller (SDLC) - * Control Register 3 (read/write). - * Ser1SDCR4 Serial port 1 Synchronous Data Link Controller (SDLC) - * Control Register 4 (read/write). - * Ser1SDDR Serial port 1 Synchronous Data Link Controller (SDLC) - * Data Register (read/write). - * Ser1SDSR0 Serial port 1 Synchronous Data Link Controller (SDLC) - * Status Register 0 (read/write). - * Ser1SDSR1 Serial port 1 Synchronous Data Link Controller (SDLC) - * Status Register 1 (read/write). - * - * Clocks - * fxtl, Txtl Frequency, period of the system crystal (3.6864 MHz - * or 3.5795 MHz). - * fsd, Tsd Frequency, period of the SDLC communication. - */ - -#define _Ser1SDCR0 0x80020060 /* Ser. port 1 SDLC Control Reg. 0 */ -#define _Ser1SDCR1 0x80020064 /* Ser. port 1 SDLC Control Reg. 1 */ -#define _Ser1SDCR2 0x80020068 /* Ser. port 1 SDLC Control Reg. 2 */ -#define _Ser1SDCR3 0x8002006C /* Ser. port 1 SDLC Control Reg. 3 */ -#define _Ser1SDCR4 0x80020070 /* Ser. port 1 SDLC Control Reg. 4 */ -#define _Ser1SDDR 0x80020078 /* Ser. port 1 SDLC Data Reg. */ -#define _Ser1SDSR0 0x80020080 /* Ser. port 1 SDLC Status Reg. 0 */ -#define _Ser1SDSR1 0x80020084 /* Ser. port 1 SDLC Status Reg. 1 */ - -#if LANGUAGE == C -#define Ser1SDCR0 /* Ser. port 1 SDLC Control Reg. 0 */ \ - (*((volatile Word *) io_p2v (_Ser1SDCR0))) -#define Ser1SDCR1 /* Ser. port 1 SDLC Control Reg. 1 */ \ - (*((volatile Word *) io_p2v (_Ser1SDCR1))) -#define Ser1SDCR2 /* Ser. port 1 SDLC Control Reg. 2 */ \ - (*((volatile Word *) io_p2v (_Ser1SDCR2))) -#define Ser1SDCR3 /* Ser. port 1 SDLC Control Reg. 3 */ \ - (*((volatile Word *) io_p2v (_Ser1SDCR3))) -#define Ser1SDCR4 /* Ser. port 1 SDLC Control Reg. 4 */ \ - (*((volatile Word *) io_p2v (_Ser1SDCR4))) -#define Ser1SDDR /* Ser. port 1 SDLC Data Reg. */ \ - (*((volatile Word *) io_p2v (_Ser1SDDR))) -#define Ser1SDSR0 /* Ser. port 1 SDLC Status Reg. 0 */ \ - (*((volatile Word *) io_p2v (_Ser1SDSR0))) -#define Ser1SDSR1 /* Ser. port 1 SDLC Status Reg. 1 */ \ - (*((volatile Word *) io_p2v (_Ser1SDSR1))) -#endif /* LANGUAGE == C */ - -#define SDCR0_SUS 0x00000001 /* SDLC/UART Select */ -#define SDCR0_SDLC (SDCR0_SUS*0) /* SDLC mode (TXD1 & RXD1) */ -#define SDCR0_UART (SDCR0_SUS*1) /* UART mode (TXD1 & RXD1) */ -#define SDCR0_SDF 0x00000002 /* Single/Double start Flag select */ -#define SDCR0_SglFlg (SDCR0_SDF*0) /* Single start Flag */ -#define SDCR0_DblFlg (SDCR0_SDF*1) /* Double start Flag */ -#define SDCR0_LBM 0x00000004 /* Look-Back Mode */ -#define SDCR0_BMS 0x00000008 /* Bit Modulation Select */ -#define SDCR0_FM0 (SDCR0_BMS*0) /* Freq. Modulation zero (0) */ -#define SDCR0_NRZ (SDCR0_BMS*1) /* Non-Return to Zero modulation */ -#define SDCR0_SCE 0x00000010 /* Sample Clock Enable (GPIO [16]) */ -#define SDCR0_SCD 0x00000020 /* Sample Clock Direction select */ - /* (GPIO [16]) */ -#define SDCR0_SClkIn (SDCR0_SCD*0) /* Sample Clock Input */ -#define SDCR0_SClkOut (SDCR0_SCD*1) /* Sample Clock Output */ -#define SDCR0_RCE 0x00000040 /* Receive Clock Edge select */ -#define SDCR0_RcRsEdg (SDCR0_RCE*0) /* Receive clock Rising-Edge */ -#define SDCR0_RcFlEdg (SDCR0_RCE*1) /* Receive clock Falling-Edge */ -#define SDCR0_TCE 0x00000080 /* Transmit Clock Edge select */ -#define SDCR0_TrRsEdg (SDCR0_TCE*0) /* Transmit clock Rising-Edge */ -#define SDCR0_TrFlEdg (SDCR0_TCE*1) /* Transmit clock Falling-Edge */ - -#define SDCR1_AAF 0x00000001 /* Abort After Frame enable */ - /* (GPIO [17]) */ -#define SDCR1_TXE 0x00000002 /* Transmit Enable */ -#define SDCR1_RXE 0x00000004 /* Receive Enable */ -#define SDCR1_RIE 0x00000008 /* Receive FIFO 1/3-to-2/3-full or */ - /* more Interrupt Enable */ -#define SDCR1_TIE 0x00000010 /* Transmit FIFO 1/2-full or less */ - /* Interrupt Enable */ -#define SDCR1_AME 0x00000020 /* Address Match Enable */ -#define SDCR1_TUS 0x00000040 /* Transmit FIFO Under-run Select */ -#define SDCR1_EFrmURn (SDCR1_TUS*0) /* End Frame on Under-Run */ -#define SDCR1_AbortURn (SDCR1_TUS*1) /* Abort on Under-Run */ -#define SDCR1_RAE 0x00000080 /* Receive Abort interrupt Enable */ - -#define SDCR2_AMV Fld (8, 0) /* Address Match Value */ - -#define SDCR3_BRD Fld (4, 0) /* Baud Rate Divisor/16 - 1 [11:8] */ -#define SDCR4_BRD Fld (8, 0) /* Baud Rate Divisor/16 - 1 [7:0] */ - /* fsd = fxtl/(16*(BRD[11:0] + 1)) */ - /* Tsd = 16*(BRD[11:0] + 1)*Txtl */ -#define SDCR3_BdRtDiv(Div) /* Baud Rate Divisor [16..65536] */ \ - (((Div) - 16)/16 >> FSize (SDCR4_BRD) << \ - FShft (SDCR3_BRD)) -#define SDCR4_BdRtDiv(Div) /* Baud Rate Divisor [16..65536] */ \ - (((Div) - 16)/16 & FAlnMsk (SDCR4_BRD) << \ - FShft (SDCR4_BRD)) - /* fsd = fxtl/(16*Floor (Div/16)) */ - /* Tsd = 16*Floor (Div/16)*Txtl */ -#define SDCR3_CeilBdRtDiv(Div) /* Ceil. of BdRtDiv [16..65536] */ \ - (((Div) - 1)/16 >> FSize (SDCR4_BRD) << \ - FShft (SDCR3_BRD)) -#define SDCR4_CeilBdRtDiv(Div) /* Ceil. of BdRtDiv [16..65536] */ \ - (((Div) - 1)/16 & FAlnMsk (SDCR4_BRD) << \ - FShft (SDCR4_BRD)) - /* fsd = fxtl/(16*Ceil (Div/16)) */ - /* Tsd = 16*Ceil (Div/16)*Txtl */ - -#define SDDR_DATA Fld (8, 0) /* receive/transmit DATA FIFOs */ -#if 0 /* Hidden receive FIFO bits */ -#define SDDR_EOF 0x00000100 /* receive End-Of-Frame (read) */ -#define SDDR_CRE 0x00000200 /* receive CRC Error (read) */ -#define SDDR_ROR 0x00000400 /* Receive FIFO Over-Run (read) */ -#endif /* 0 */ - -#define SDSR0_EIF 0x00000001 /* Error In FIFO (read) */ -#define SDSR0_TUR 0x00000002 /* Transmit FIFO Under-Run */ -#define SDSR0_RAB 0x00000004 /* Receive ABort */ -#define SDSR0_TFS 0x00000008 /* Transmit FIFO 1/2-full or less */ - /* Service request (read) */ -#define SDSR0_RFS 0x00000010 /* Receive FIFO 1/3-to-2/3-full or */ - /* more Service request (read) */ - -#define SDSR1_RSY 0x00000001 /* Receiver SYnchronized (read) */ -#define SDSR1_TBY 0x00000002 /* Transmitter BusY (read) */ -#define SDSR1_RNE 0x00000004 /* Receive FIFO Not Empty (read) */ -#define SDSR1_TNF 0x00000008 /* Transmit FIFO Not Full (read) */ -#define SDSR1_RTD 0x00000010 /* Receive Transition Detected */ -#define SDSR1_EOF 0x00000020 /* receive End-Of-Frame (read) */ -#define SDSR1_CRE 0x00000040 /* receive CRC Error (read) */ -#define SDSR1_ROR 0x00000080 /* Receive FIFO Over-Run (read) */ - - -/* - * High-Speed Serial to Parallel controller (HSSP) control registers - * - * Registers - * Ser2HSCR0 Serial port 2 High-Speed Serial to Parallel - * controller (HSSP) Control Register 0 (read/write). - * Ser2HSCR1 Serial port 2 High-Speed Serial to Parallel - * controller (HSSP) Control Register 1 (read/write). - * Ser2HSDR Serial port 2 High-Speed Serial to Parallel - * controller (HSSP) Data Register (read/write). - * Ser2HSSR0 Serial port 2 High-Speed Serial to Parallel - * controller (HSSP) Status Register 0 (read/write). - * Ser2HSSR1 Serial port 2 High-Speed Serial to Parallel - * controller (HSSP) Status Register 1 (read). - * Ser2HSCR2 Serial port 2 High-Speed Serial to Parallel - * controller (HSSP) Control Register 2 (read/write). - * [The HSCR2 register is only implemented in - * versions 2.0 (rev. = 8) and higher of the StrongARM - * SA-1100.] - */ - -#define _Ser2HSCR0 0x80040060 /* Ser. port 2 HSSP Control Reg. 0 */ -#define _Ser2HSCR1 0x80040064 /* Ser. port 2 HSSP Control Reg. 1 */ -#define _Ser2HSDR 0x8004006C /* Ser. port 2 HSSP Data Reg. */ -#define _Ser2HSSR0 0x80040074 /* Ser. port 2 HSSP Status Reg. 0 */ -#define _Ser2HSSR1 0x80040078 /* Ser. port 2 HSSP Status Reg. 1 */ -#define _Ser2HSCR2 0x90060028 /* Ser. port 2 HSSP Control Reg. 2 */ - -#if LANGUAGE == C -#define Ser2HSCR0 /* Ser. port 2 HSSP Control Reg. 0 */ \ - (*((volatile Word *) io_p2v (_Ser2HSCR0))) -#define Ser2HSCR1 /* Ser. port 2 HSSP Control Reg. 1 */ \ - (*((volatile Word *) io_p2v (_Ser2HSCR1))) -#define Ser2HSDR /* Ser. port 2 HSSP Data Reg. */ \ - (*((volatile Word *) io_p2v (_Ser2HSDR))) -#define Ser2HSSR0 /* Ser. port 2 HSSP Status Reg. 0 */ \ - (*((volatile Word *) io_p2v (_Ser2HSSR0))) -#define Ser2HSSR1 /* Ser. port 2 HSSP Status Reg. 1 */ \ - (*((volatile Word *) io_p2v (_Ser2HSSR1))) -#define Ser2HSCR2 /* Ser. port 2 HSSP Control Reg. 2 */ \ - (*((volatile Word *) io_p2v (_Ser2HSCR2))) -#endif /* LANGUAGE == C */ - -#define HSCR0_ITR 0x00000001 /* IrDA Transmission Rate */ -#define HSCR0_UART (HSCR0_ITR*0) /* UART mode (115.2 kb/s if IrDA) */ -#define HSCR0_HSSP (HSCR0_ITR*1) /* HSSP mode (4 Mb/s) */ -#define HSCR0_LBM 0x00000002 /* Look-Back Mode */ -#define HSCR0_TUS 0x00000004 /* Transmit FIFO Under-run Select */ -#define HSCR0_EFrmURn (HSCR0_TUS*0) /* End Frame on Under-Run */ -#define HSCR0_AbortURn (HSCR0_TUS*1) /* Abort on Under-Run */ -#define HSCR0_TXE 0x00000008 /* Transmit Enable */ -#define HSCR0_RXE 0x00000010 /* Receive Enable */ -#define HSCR0_RIE 0x00000020 /* Receive FIFO 2/5-to-3/5-full or */ - /* more Interrupt Enable */ -#define HSCR0_TIE 0x00000040 /* Transmit FIFO 1/2-full or less */ - /* Interrupt Enable */ -#define HSCR0_AME 0x00000080 /* Address Match Enable */ - -#define HSCR1_AMV Fld (8, 0) /* Address Match Value */ - -#define HSDR_DATA Fld (8, 0) /* receive/transmit DATA FIFOs */ -#if 0 /* Hidden receive FIFO bits */ -#define HSDR_EOF 0x00000100 /* receive End-Of-Frame (read) */ -#define HSDR_CRE 0x00000200 /* receive CRC Error (read) */ -#define HSDR_ROR 0x00000400 /* Receive FIFO Over-Run (read) */ -#endif /* 0 */ - -#define HSSR0_EIF 0x00000001 /* Error In FIFO (read) */ -#define HSSR0_TUR 0x00000002 /* Transmit FIFO Under-Run */ -#define HSSR0_RAB 0x00000004 /* Receive ABort */ -#define HSSR0_TFS 0x00000008 /* Transmit FIFO 1/2-full or less */ - /* Service request (read) */ -#define HSSR0_RFS 0x00000010 /* Receive FIFO 2/5-to-3/5-full or */ - /* more Service request (read) */ -#define HSSR0_FRE 0x00000020 /* receive FRaming Error */ - -#define HSSR1_RSY 0x00000001 /* Receiver SYnchronized (read) */ -#define HSSR1_TBY 0x00000002 /* Transmitter BusY (read) */ -#define HSSR1_RNE 0x00000004 /* Receive FIFO Not Empty (read) */ -#define HSSR1_TNF 0x00000008 /* Transmit FIFO Not Full (read) */ -#define HSSR1_EOF 0x00000010 /* receive End-Of-Frame (read) */ -#define HSSR1_CRE 0x00000020 /* receive CRC Error (read) */ -#define HSSR1_ROR 0x00000040 /* Receive FIFO Over-Run (read) */ - -#define HSCR2_TXP 0x00040000 /* Transmit data Polarity (TXD_2) */ -#define HSCR2_TrDataL (HSCR2_TXP*0) /* Transmit Data active Low */ - /* (inverted) */ -#define HSCR2_TrDataH (HSCR2_TXP*1) /* Transmit Data active High */ - /* (non-inverted) */ -#define HSCR2_RXP 0x00080000 /* Receive data Polarity (RXD_2) */ -#define HSCR2_RcDataL (HSCR2_RXP*0) /* Receive Data active Low */ - /* (inverted) */ -#define HSCR2_RcDataH (HSCR2_RXP*1) /* Receive Data active High */ - /* (non-inverted) */ - - -/* - * Multi-media Communications Port (MCP) control registers - * - * Registers - * Ser4MCCR0 Serial port 4 Multi-media Communications Port (MCP) - * Control Register 0 (read/write). - * Ser4MCDR0 Serial port 4 Multi-media Communications Port (MCP) - * Data Register 0 (audio, read/write). - * Ser4MCDR1 Serial port 4 Multi-media Communications Port (MCP) - * Data Register 1 (telecom, read/write). - * Ser4MCDR2 Serial port 4 Multi-media Communications Port (MCP) - * Data Register 2 (CODEC registers, read/write). - * Ser4MCSR Serial port 4 Multi-media Communications Port (MCP) - * Status Register (read/write). - * Ser4MCCR1 Serial port 4 Multi-media Communications Port (MCP) - * Control Register 1 (read/write). - * [The MCCR1 register is only implemented in - * versions 2.0 (rev. = 8) and higher of the StrongARM - * SA-1100.] - * - * Clocks - * fmc, Tmc Frequency, period of the MCP communication (10 MHz, - * 12 MHz, or GPIO [21]). - * faud, Taud Frequency, period of the audio sampling. - * ftcm, Ttcm Frequency, period of the telecom sampling. - */ - -#define _Ser4MCCR0 0x80060000 /* Ser. port 4 MCP Control Reg. 0 */ -#define _Ser4MCDR0 0x80060008 /* Ser. port 4 MCP Data Reg. 0 */ - /* (audio) */ -#define _Ser4MCDR1 0x8006000C /* Ser. port 4 MCP Data Reg. 1 */ - /* (telecom) */ -#define _Ser4MCDR2 0x80060010 /* Ser. port 4 MCP Data Reg. 2 */ - /* (CODEC reg.) */ -#define _Ser4MCSR 0x80060018 /* Ser. port 4 MCP Status Reg. */ -#define _Ser4MCCR1 0x90060030 /* Ser. port 4 MCP Control Reg. 1 */ - -#if LANGUAGE == C -#define Ser4MCCR0 /* Ser. port 4 MCP Control Reg. 0 */ \ - (*((volatile Word *) io_p2v (_Ser4MCCR0))) -#define Ser4MCDR0 /* Ser. port 4 MCP Data Reg. 0 */ \ - /* (audio) */ \ - (*((volatile Word *) io_p2v (_Ser4MCDR0))) -#define Ser4MCDR1 /* Ser. port 4 MCP Data Reg. 1 */ \ - /* (telecom) */ \ - (*((volatile Word *) io_p2v (_Ser4MCDR1))) -#define Ser4MCDR2 /* Ser. port 4 MCP Data Reg. 2 */ \ - /* (CODEC reg.) */ \ - (*((volatile Word *) io_p2v (_Ser4MCDR2))) -#define Ser4MCSR /* Ser. port 4 MCP Status Reg. */ \ - (*((volatile Word *) io_p2v (_Ser4MCSR))) -#define Ser4MCCR1 /* Ser. port 4 MCP Control Reg. 1 */ \ - (*((volatile Word *) io_p2v (_Ser4MCCR1))) -#endif /* LANGUAGE == C */ - -#define MCCR0_ASD Fld (7, 0) /* Audio Sampling rate Divisor/32 */ - /* [6..127] */ - /* faud = fmc/(32*ASD) */ - /* Taud = 32*ASD*Tmc */ -#define MCCR0_AudSmpDiv(Div) /* Audio Sampling rate Divisor */ \ - /* [192..4064] */ \ - ((Div)/32 << FShft (MCCR0_ASD)) - /* faud = fmc/(32*Floor (Div/32)) */ - /* Taud = 32*Floor (Div/32)*Tmc */ -#define MCCR0_CeilAudSmpDiv(Div) /* Ceil. of AudSmpDiv [192..4064] */ \ - (((Div) + 31)/32 << FShft (MCCR0_ASD)) - /* faud = fmc/(32*Ceil (Div/32)) */ - /* Taud = 32*Ceil (Div/32)*Tmc */ -#define MCCR0_TSD Fld (7, 8) /* Telecom Sampling rate */ - /* Divisor/32 [16..127] */ - /* ftcm = fmc/(32*TSD) */ - /* Ttcm = 32*TSD*Tmc */ -#define MCCR0_TcmSmpDiv(Div) /* Telecom Sampling rate Divisor */ \ - /* [512..4064] */ \ - ((Div)/32 << FShft (MCCR0_TSD)) - /* ftcm = fmc/(32*Floor (Div/32)) */ - /* Ttcm = 32*Floor (Div/32)*Tmc */ -#define MCCR0_CeilTcmSmpDiv(Div) /* Ceil. of TcmSmpDiv [512..4064] */ \ - (((Div) + 31)/32 << FShft (MCCR0_TSD)) - /* ftcm = fmc/(32*Ceil (Div/32)) */ - /* Ttcm = 32*Ceil (Div/32)*Tmc */ -#define MCCR0_MCE 0x00010000 /* MCP Enable */ -#define MCCR0_ECS 0x00020000 /* External Clock Select */ -#define MCCR0_IntClk (MCCR0_ECS*0) /* Internal Clock (10 or 12 MHz) */ -#define MCCR0_ExtClk (MCCR0_ECS*1) /* External Clock (GPIO [21]) */ -#define MCCR0_ADM 0x00040000 /* A/D (audio/telecom) data */ - /* sampling/storing Mode */ -#define MCCR0_VldBit (MCCR0_ADM*0) /* Valid Bit storing mode */ -#define MCCR0_SmpCnt (MCCR0_ADM*1) /* Sampling Counter storing mode */ -#define MCCR0_TTE 0x00080000 /* Telecom Transmit FIFO 1/2-full */ - /* or less interrupt Enable */ -#define MCCR0_TRE 0x00100000 /* Telecom Receive FIFO 1/2-full */ - /* or more interrupt Enable */ -#define MCCR0_ATE 0x00200000 /* Audio Transmit FIFO 1/2-full */ - /* or less interrupt Enable */ -#define MCCR0_ARE 0x00400000 /* Audio Receive FIFO 1/2-full or */ - /* more interrupt Enable */ -#define MCCR0_LBM 0x00800000 /* Look-Back Mode */ -#define MCCR0_ECP Fld (2, 24) /* External Clock Prescaler - 1 */ -#define MCCR0_ExtClkDiv(Div) /* External Clock Divisor [1..4] */ \ - (((Div) - 1) << FShft (MCCR0_ECP)) - -#define MCDR0_DATA Fld (12, 4) /* receive/transmit audio DATA */ - /* FIFOs */ - -#define MCDR1_DATA Fld (14, 2) /* receive/transmit telecom DATA */ - /* FIFOs */ - - /* receive/transmit CODEC reg. */ - /* FIFOs: */ -#define MCDR2_DATA Fld (16, 0) /* reg. DATA */ -#define MCDR2_RW 0x00010000 /* reg. Read/Write (transmit) */ -#define MCDR2_Rd (MCDR2_RW*0) /* reg. Read */ -#define MCDR2_Wr (MCDR2_RW*1) /* reg. Write */ -#define MCDR2_ADD Fld (4, 17) /* reg. ADDress */ - -#define MCSR_ATS 0x00000001 /* Audio Transmit FIFO 1/2-full */ - /* or less Service request (read) */ -#define MCSR_ARS 0x00000002 /* Audio Receive FIFO 1/2-full or */ - /* more Service request (read) */ -#define MCSR_TTS 0x00000004 /* Telecom Transmit FIFO 1/2-full */ - /* or less Service request (read) */ -#define MCSR_TRS 0x00000008 /* Telecom Receive FIFO 1/2-full */ - /* or more Service request (read) */ -#define MCSR_ATU 0x00000010 /* Audio Transmit FIFO Under-run */ -#define MCSR_ARO 0x00000020 /* Audio Receive FIFO Over-run */ -#define MCSR_TTU 0x00000040 /* Telecom Transmit FIFO Under-run */ -#define MCSR_TRO 0x00000080 /* Telecom Receive FIFO Over-run */ -#define MCSR_ANF 0x00000100 /* Audio transmit FIFO Not Full */ - /* (read) */ -#define MCSR_ANE 0x00000200 /* Audio receive FIFO Not Empty */ - /* (read) */ -#define MCSR_TNF 0x00000400 /* Telecom transmit FIFO Not Full */ - /* (read) */ -#define MCSR_TNE 0x00000800 /* Telecom receive FIFO Not Empty */ - /* (read) */ -#define MCSR_CWC 0x00001000 /* CODEC register Write Completed */ - /* (read) */ -#define MCSR_CRC 0x00002000 /* CODEC register Read Completed */ - /* (read) */ -#define MCSR_ACE 0x00004000 /* Audio CODEC Enabled (read) */ -#define MCSR_TCE 0x00008000 /* Telecom CODEC Enabled (read) */ - -#define MCCR1_CFS 0x00100000 /* Clock Freq. Select */ -#define MCCR1_F12MHz (MCCR1_CFS*0) /* Freq. (fmc) = ~ 12 MHz */ - /* (11.981 MHz) */ -#define MCCR1_F10MHz (MCCR1_CFS*1) /* Freq. (fmc) = ~ 10 MHz */ - /* (9.585 MHz) */ - - -/* - * Synchronous Serial Port (SSP) control registers - * - * Registers - * Ser4SSCR0 Serial port 4 Synchronous Serial Port (SSP) Control - * Register 0 (read/write). - * Ser4SSCR1 Serial port 4 Synchronous Serial Port (SSP) Control - * Register 1 (read/write). - * [Bits SPO and SP are only implemented in versions 2.0 - * (rev. = 8) and higher of the StrongARM SA-1100.] - * Ser4SSDR Serial port 4 Synchronous Serial Port (SSP) Data - * Register (read/write). - * Ser4SSSR Serial port 4 Synchronous Serial Port (SSP) Status - * Register (read/write). - * - * Clocks - * fxtl, Txtl Frequency, period of the system crystal (3.6864 MHz - * or 3.5795 MHz). - * fss, Tss Frequency, period of the SSP communication. - */ - -#define _Ser4SSCR0 0x80070060 /* Ser. port 4 SSP Control Reg. 0 */ -#define _Ser4SSCR1 0x80070064 /* Ser. port 4 SSP Control Reg. 1 */ -#define _Ser4SSDR 0x8007006C /* Ser. port 4 SSP Data Reg. */ -#define _Ser4SSSR 0x80070074 /* Ser. port 4 SSP Status Reg. */ - -#if LANGUAGE == C -#define Ser4SSCR0 /* Ser. port 4 SSP Control Reg. 0 */ \ - (*((volatile Word *) io_p2v (_Ser4SSCR0))) -#define Ser4SSCR1 /* Ser. port 4 SSP Control Reg. 1 */ \ - (*((volatile Word *) io_p2v (_Ser4SSCR1))) -#define Ser4SSDR /* Ser. port 4 SSP Data Reg. */ \ - (*((volatile Word *) io_p2v (_Ser4SSDR))) -#define Ser4SSSR /* Ser. port 4 SSP Status Reg. */ \ - (*((volatile Word *) io_p2v (_Ser4SSSR))) -#endif /* LANGUAGE == C */ - -#define SSCR0_DSS Fld (4, 0) /* Data Size - 1 Select [3..15] */ -#define SSCR0_DataSize(Size) /* Data Size Select [4..16] */ \ - (((Size) - 1) << FShft (SSCR0_DSS)) -#define SSCR0_FRF Fld (2, 4) /* FRame Format */ -#define SSCR0_Motorola /* Motorola Serial Peripheral */ \ - /* Interface (SPI) format */ \ - (0 << FShft (SSCR0_FRF)) -#define SSCR0_TI /* Texas Instruments Synchronous */ \ - /* Serial format */ \ - (1 << FShft (SSCR0_FRF)) -#define SSCR0_National /* National Microwire format */ \ - (2 << FShft (SSCR0_FRF)) -#define SSCR0_SSE 0x00000080 /* SSP Enable */ -#define SSCR0_SCR Fld (8, 8) /* Serial Clock Rate divisor/2 - 1 */ - /* fss = fxtl/(2*(SCR + 1)) */ - /* Tss = 2*(SCR + 1)*Txtl */ -#define SSCR0_SerClkDiv(Div) /* Serial Clock Divisor [2..512] */ \ - (((Div) - 2)/2 << FShft (SSCR0_SCR)) - /* fss = fxtl/(2*Floor (Div/2)) */ - /* Tss = 2*Floor (Div/2)*Txtl */ -#define SSCR0_CeilSerClkDiv(Div) /* Ceil. of SerClkDiv [2..512] */ \ - (((Div) - 1)/2 << FShft (SSCR0_SCR)) - /* fss = fxtl/(2*Ceil (Div/2)) */ - /* Tss = 2*Ceil (Div/2)*Txtl */ - -#define SSCR1_RIE 0x00000001 /* Receive FIFO 1/2-full or more */ - /* Interrupt Enable */ -#define SSCR1_TIE 0x00000002 /* Transmit FIFO 1/2-full or less */ - /* Interrupt Enable */ -#define SSCR1_LBM 0x00000004 /* Look-Back Mode */ -#define SSCR1_SPO 0x00000008 /* Sample clock (SCLK) POlarity */ -#define SSCR1_SClkIactL (SSCR1_SPO*0) /* Sample Clock Inactive Low */ -#define SSCR1_SClkIactH (SSCR1_SPO*1) /* Sample Clock Inactive High */ -#define SSCR1_SP 0x00000010 /* Sample clock (SCLK) Phase */ -#define SSCR1_SClk1P (SSCR1_SP*0) /* Sample Clock active 1 Period */ - /* after frame (SFRM, 1st edge) */ -#define SSCR1_SClk1_2P (SSCR1_SP*1) /* Sample Clock active 1/2 Period */ - /* after frame (SFRM, 1st edge) */ -#define SSCR1_ECS 0x00000020 /* External Clock Select */ -#define SSCR1_IntClk (SSCR1_ECS*0) /* Internal Clock */ -#define SSCR1_ExtClk (SSCR1_ECS*1) /* External Clock (GPIO [19]) */ - -#define SSDR_DATA Fld (16, 0) /* receive/transmit DATA FIFOs */ - -#define SSSR_TNF 0x00000002 /* Transmit FIFO Not Full (read) */ -#define SSSR_RNE 0x00000004 /* Receive FIFO Not Empty (read) */ -#define SSSR_BSY 0x00000008 /* SSP BuSY (read) */ -#define SSSR_TFS 0x00000010 /* Transmit FIFO 1/2-full or less */ - /* Service request (read) */ -#define SSSR_RFS 0x00000020 /* Receive FIFO 1/2-full or more */ - /* Service request (read) */ -#define SSSR_ROR 0x00000040 /* Receive FIFO Over-Run */ - - -/* - * Operating System (OS) timer control registers - * - * Registers - * OSMR0 Operating System (OS) timer Match Register 0 - * (read/write). - * OSMR1 Operating System (OS) timer Match Register 1 - * (read/write). - * OSMR2 Operating System (OS) timer Match Register 2 - * (read/write). - * OSMR3 Operating System (OS) timer Match Register 3 - * (read/write). - * OSCR Operating System (OS) timer Counter Register - * (read/write). - * OSSR Operating System (OS) timer Status Register - * (read/write). - * OWER Operating System (OS) timer Watch-dog Enable Register - * (read/write). - * OIER Operating System (OS) timer Interrupt Enable Register - * (read/write). - */ - -#define _OSMR(Nb) /* OS timer Match Reg. [0..3] */ \ - (0x90000000 + (Nb)*4) -#define _OSMR0 _OSMR (0) /* OS timer Match Reg. 0 */ -#define _OSMR1 _OSMR (1) /* OS timer Match Reg. 1 */ -#define _OSMR2 _OSMR (2) /* OS timer Match Reg. 2 */ -#define _OSMR3 _OSMR (3) /* OS timer Match Reg. 3 */ -#define _OSCR 0x90000010 /* OS timer Counter Reg. */ -#define _OSSR 0x90000014 /* OS timer Status Reg. */ -#define _OWER 0x90000018 /* OS timer Watch-dog Enable Reg. */ -#define _OIER 0x9000001C /* OS timer Interrupt Enable Reg. */ - -#if LANGUAGE == C -#define OSMR /* OS timer Match Reg. [0..3] */ \ - ((volatile Word *) io_p2v (_OSMR (0))) -#define OSMR0 (OSMR [0]) /* OS timer Match Reg. 0 */ -#define OSMR1 (OSMR [1]) /* OS timer Match Reg. 1 */ -#define OSMR2 (OSMR [2]) /* OS timer Match Reg. 2 */ -#define OSMR3 (OSMR [3]) /* OS timer Match Reg. 3 */ -#define OSCR /* OS timer Counter Reg. */ \ - (*((volatile Word *) io_p2v (_OSCR))) -#define OSSR /* OS timer Status Reg. */ \ - (*((volatile Word *) io_p2v (_OSSR))) -#define OWER /* OS timer Watch-dog Enable Reg. */ \ - (*((volatile Word *) io_p2v (_OWER))) -#define OIER /* OS timer Interrupt Enable Reg. */ \ - (*((volatile Word *) io_p2v (_OIER))) -#endif /* LANGUAGE == C */ - -#define OSSR_M(Nb) /* Match detected [0..3] */ \ - (0x00000001 << (Nb)) -#define OSSR_M0 OSSR_M (0) /* Match detected 0 */ -#define OSSR_M1 OSSR_M (1) /* Match detected 1 */ -#define OSSR_M2 OSSR_M (2) /* Match detected 2 */ -#define OSSR_M3 OSSR_M (3) /* Match detected 3 */ - -#define OWER_WME 0x00000001 /* Watch-dog Match Enable */ - /* (set only) */ - -#define OIER_E(Nb) /* match interrupt Enable [0..3] */ \ - (0x00000001 << (Nb)) -#define OIER_E0 OIER_E (0) /* match interrupt Enable 0 */ -#define OIER_E1 OIER_E (1) /* match interrupt Enable 1 */ -#define OIER_E2 OIER_E (2) /* match interrupt Enable 2 */ -#define OIER_E3 OIER_E (3) /* match interrupt Enable 3 */ - - -/* - * Real-Time Clock (RTC) control registers - * - * Registers - * RTAR Real-Time Clock (RTC) Alarm Register (read/write). - * RCNR Real-Time Clock (RTC) CouNt Register (read/write). - * RTTR Real-Time Clock (RTC) Trim Register (read/write). - * RTSR Real-Time Clock (RTC) Status Register (read/write). - * - * Clocks - * frtx, Trtx Frequency, period of the real-time clock crystal - * (32.768 kHz nominal). - * frtc, Trtc Frequency, period of the real-time clock counter - * (1 Hz nominal). - */ - -#define _RTAR 0x90010000 /* RTC Alarm Reg. */ -#define _RCNR 0x90010004 /* RTC CouNt Reg. */ -#define _RTTR 0x90010008 /* RTC Trim Reg. */ -#define _RTSR 0x90010010 /* RTC Status Reg. */ - -#if LANGUAGE == C -#define RTAR /* RTC Alarm Reg. */ \ - (*((volatile Word *) io_p2v (_RTAR))) -#define RCNR /* RTC CouNt Reg. */ \ - (*((volatile Word *) io_p2v (_RCNR))) -#define RTTR /* RTC Trim Reg. */ \ - (*((volatile Word *) io_p2v (_RTTR))) -#define RTSR /* RTC Status Reg. */ \ - (*((volatile Word *) io_p2v (_RTSR))) -#endif /* LANGUAGE == C */ - -#define RTTR_C Fld (16, 0) /* clock divider Count - 1 */ -#define RTTR_D Fld (10, 16) /* trim Delete count */ - /* frtc = (1023*(C + 1) - D)*frtx/ */ - /* (1023*(C + 1)^2) */ - /* Trtc = (1023*(C + 1)^2)*Trtx/ */ - /* (1023*(C + 1) - D) */ - -#define RTSR_AL 0x00000001 /* ALarm detected */ -#define RTSR_HZ 0x00000002 /* 1 Hz clock detected */ -#define RTSR_ALE 0x00000004 /* ALarm interrupt Enable */ -#define RTSR_HZE 0x00000008 /* 1 Hz clock interrupt Enable */ - - -/* - * Power Manager (PM) control registers - * - * Registers - * PMCR Power Manager (PM) Control Register (read/write). - * PSSR Power Manager (PM) Sleep Status Register (read/write). - * PSPR Power Manager (PM) Scratch-Pad Register (read/write). - * PWER Power Manager (PM) Wake-up Enable Register - * (read/write). - * PCFR Power Manager (PM) general ConFiguration Register - * (read/write). - * PPCR Power Manager (PM) Phase-Locked Loop (PLL) - * Configuration Register (read/write). - * PGSR Power Manager (PM) General-Purpose Input/Output (GPIO) - * Sleep state Register (read/write, see GPIO pins). - * POSR Power Manager (PM) Oscillator Status Register (read). - * - * Clocks - * fxtl, Txtl Frequency, period of the system crystal (3.6864 MHz - * or 3.5795 MHz). - * fcpu, Tcpu Frequency, period of the CPU core clock (CCLK). - */ - -#define _PMCR 0x90020000 /* PM Control Reg. */ -#define _PSSR 0x90020004 /* PM Sleep Status Reg. */ -#define _PSPR 0x90020008 /* PM Scratch-Pad Reg. */ -#define _PWER 0x9002000C /* PM Wake-up Enable Reg. */ -#define _PCFR 0x90020010 /* PM general ConFiguration Reg. */ -#define _PPCR 0x90020014 /* PM PLL Configuration Reg. */ -#define _PGSR 0x90020018 /* PM GPIO Sleep state Reg. */ -#define _POSR 0x9002001C /* PM Oscillator Status Reg. */ - -#if LANGUAGE == C -#define PMCR /* PM Control Reg. */ \ - (*((volatile Word *) io_p2v (_PMCR))) -#define PSSR /* PM Sleep Status Reg. */ \ - (*((volatile Word *) io_p2v (_PSSR))) -#define PSPR /* PM Scratch-Pad Reg. */ \ - (*((volatile Word *) io_p2v (_PSPR))) -#define PWER /* PM Wake-up Enable Reg. */ \ - (*((volatile Word *) io_p2v (_PWER))) -#define PCFR /* PM general ConFiguration Reg. */ \ - (*((volatile Word *) io_p2v (_PCFR))) -#define PPCR /* PM PLL Configuration Reg. */ \ - (*((volatile Word *) io_p2v (_PPCR))) -#define PGSR /* PM GPIO Sleep state Reg. */ \ - (*((volatile Word *) io_p2v (_PGSR))) -#define POSR /* PM Oscillator Status Reg. */ \ - (*((volatile Word *) io_p2v (_POSR))) - -#elif LANGUAGE == Assembly -#define PMCR (io_p2v (_PMCR)) -#define PSSR (io_p2v (_PSSR)) -#define PSPR (io_p2v (_PSPR)) -#define PWER (io_p2v (_PWER)) -#define PCFR (io_p2v (_PCFR)) -#define PPCR (io_p2v (_PPCR)) -#define PGSR (io_p2v (_PGSR)) -#define POSR (io_p2v (_POSR)) - -#endif /* LANGUAGE == C */ - -#define PMCR_SF 0x00000001 /* Sleep Force (set only) */ - -#define PSSR_SS 0x00000001 /* Software Sleep */ -#define PSSR_BFS 0x00000002 /* Battery Fault Status */ - /* (BATT_FAULT) */ -#define PSSR_VFS 0x00000004 /* Vdd Fault Status (VDD_FAULT) */ -#define PSSR_DH 0x00000008 /* DRAM control Hold */ -#define PSSR_PH 0x00000010 /* Peripheral control Hold */ - -#define PWER_GPIO(Nb) GPIO_GPIO (Nb) /* GPIO [0..27] wake-up enable */ -#define PWER_GPIO0 PWER_GPIO (0) /* GPIO [0] wake-up enable */ -#define PWER_GPIO1 PWER_GPIO (1) /* GPIO [1] wake-up enable */ -#define PWER_GPIO2 PWER_GPIO (2) /* GPIO [2] wake-up enable */ -#define PWER_GPIO3 PWER_GPIO (3) /* GPIO [3] wake-up enable */ -#define PWER_GPIO4 PWER_GPIO (4) /* GPIO [4] wake-up enable */ -#define PWER_GPIO5 PWER_GPIO (5) /* GPIO [5] wake-up enable */ -#define PWER_GPIO6 PWER_GPIO (6) /* GPIO [6] wake-up enable */ -#define PWER_GPIO7 PWER_GPIO (7) /* GPIO [7] wake-up enable */ -#define PWER_GPIO8 PWER_GPIO (8) /* GPIO [8] wake-up enable */ -#define PWER_GPIO9 PWER_GPIO (9) /* GPIO [9] wake-up enable */ -#define PWER_GPIO10 PWER_GPIO (10) /* GPIO [10] wake-up enable */ -#define PWER_GPIO11 PWER_GPIO (11) /* GPIO [11] wake-up enable */ -#define PWER_GPIO12 PWER_GPIO (12) /* GPIO [12] wake-up enable */ -#define PWER_GPIO13 PWER_GPIO (13) /* GPIO [13] wake-up enable */ -#define PWER_GPIO14 PWER_GPIO (14) /* GPIO [14] wake-up enable */ -#define PWER_GPIO15 PWER_GPIO (15) /* GPIO [15] wake-up enable */ -#define PWER_GPIO16 PWER_GPIO (16) /* GPIO [16] wake-up enable */ -#define PWER_GPIO17 PWER_GPIO (17) /* GPIO [17] wake-up enable */ -#define PWER_GPIO18 PWER_GPIO (18) /* GPIO [18] wake-up enable */ -#define PWER_GPIO19 PWER_GPIO (19) /* GPIO [19] wake-up enable */ -#define PWER_GPIO20 PWER_GPIO (20) /* GPIO [20] wake-up enable */ -#define PWER_GPIO21 PWER_GPIO (21) /* GPIO [21] wake-up enable */ -#define PWER_GPIO22 PWER_GPIO (22) /* GPIO [22] wake-up enable */ -#define PWER_GPIO23 PWER_GPIO (23) /* GPIO [23] wake-up enable */ -#define PWER_GPIO24 PWER_GPIO (24) /* GPIO [24] wake-up enable */ -#define PWER_GPIO25 PWER_GPIO (25) /* GPIO [25] wake-up enable */ -#define PWER_GPIO26 PWER_GPIO (26) /* GPIO [26] wake-up enable */ -#define PWER_GPIO27 PWER_GPIO (27) /* GPIO [27] wake-up enable */ -#define PWER_RTC 0x80000000 /* RTC alarm wake-up enable */ - -#define PCFR_OPDE 0x00000001 /* Oscillator Power-Down Enable */ -#define PCFR_ClkRun (PCFR_OPDE*0) /* Clock Running in sleep mode */ -#define PCFR_ClkStp (PCFR_OPDE*1) /* Clock Stopped in sleep mode */ -#define PCFR_FP 0x00000002 /* Float PCMCIA pins */ -#define PCFR_PCMCIANeg (PCFR_FP*0) /* PCMCIA pins Negated (1) */ -#define PCFR_PCMCIAFlt (PCFR_FP*1) /* PCMCIA pins Floating */ -#define PCFR_FS 0x00000004 /* Float Static memory pins */ -#define PCFR_StMemNeg (PCFR_FS*0) /* Static Memory pins Negated (1) */ -#define PCFR_StMemFlt (PCFR_FS*1) /* Static Memory pins Floating */ -#define PCFR_FO 0x00000008 /* Force RTC oscillator */ - /* (32.768 kHz) enable On */ - -#define PPCR_CCF Fld (5, 0) /* CPU core Clock (CCLK) Freq. */ -#define PPCR_Fx16 /* Freq. x 16 (fcpu = 16*fxtl) */ \ - (0x00 << FShft (PPCR_CCF)) -#define PPCR_Fx20 /* Freq. x 20 (fcpu = 20*fxtl) */ \ - (0x01 << FShft (PPCR_CCF)) -#define PPCR_Fx24 /* Freq. x 24 (fcpu = 24*fxtl) */ \ - (0x02 << FShft (PPCR_CCF)) -#define PPCR_Fx28 /* Freq. x 28 (fcpu = 28*fxtl) */ \ - (0x03 << FShft (PPCR_CCF)) -#define PPCR_Fx32 /* Freq. x 32 (fcpu = 32*fxtl) */ \ - (0x04 << FShft (PPCR_CCF)) -#define PPCR_Fx36 /* Freq. x 36 (fcpu = 36*fxtl) */ \ - (0x05 << FShft (PPCR_CCF)) -#define PPCR_Fx40 /* Freq. x 40 (fcpu = 40*fxtl) */ \ - (0x06 << FShft (PPCR_CCF)) -#define PPCR_Fx44 /* Freq. x 44 (fcpu = 44*fxtl) */ \ - (0x07 << FShft (PPCR_CCF)) -#define PPCR_Fx48 /* Freq. x 48 (fcpu = 48*fxtl) */ \ - (0x08 << FShft (PPCR_CCF)) -#define PPCR_Fx52 /* Freq. x 52 (fcpu = 52*fxtl) */ \ - (0x09 << FShft (PPCR_CCF)) -#define PPCR_Fx56 /* Freq. x 56 (fcpu = 56*fxtl) */ \ - (0x0A << FShft (PPCR_CCF)) -#define PPCR_Fx60 /* Freq. x 60 (fcpu = 60*fxtl) */ \ - (0x0B << FShft (PPCR_CCF)) -#define PPCR_Fx64 /* Freq. x 64 (fcpu = 64*fxtl) */ \ - (0x0C << FShft (PPCR_CCF)) -#define PPCR_Fx68 /* Freq. x 68 (fcpu = 68*fxtl) */ \ - (0x0D << FShft (PPCR_CCF)) -#define PPCR_Fx72 /* Freq. x 72 (fcpu = 72*fxtl) */ \ - (0x0E << FShft (PPCR_CCF)) -#define PPCR_Fx76 /* Freq. x 76 (fcpu = 76*fxtl) */ \ - (0x0F << FShft (PPCR_CCF)) - /* 3.6864 MHz crystal (fxtl): */ -#define PPCR_F59_0MHz PPCR_Fx16 /* Freq. (fcpu) = 59.0 MHz */ -#define PPCR_F73_7MHz PPCR_Fx20 /* Freq. (fcpu) = 73.7 MHz */ -#define PPCR_F88_5MHz PPCR_Fx24 /* Freq. (fcpu) = 88.5 MHz */ -#define PPCR_F103_2MHz PPCR_Fx28 /* Freq. (fcpu) = 103.2 MHz */ -#define PPCR_F118_0MHz PPCR_Fx32 /* Freq. (fcpu) = 118.0 MHz */ -#define PPCR_F132_7MHz PPCR_Fx36 /* Freq. (fcpu) = 132.7 MHz */ -#define PPCR_F147_5MHz PPCR_Fx40 /* Freq. (fcpu) = 147.5 MHz */ -#define PPCR_F162_2MHz PPCR_Fx44 /* Freq. (fcpu) = 162.2 MHz */ -#define PPCR_F176_9MHz PPCR_Fx48 /* Freq. (fcpu) = 176.9 MHz */ -#define PPCR_F191_7MHz PPCR_Fx52 /* Freq. (fcpu) = 191.7 MHz */ -#define PPCR_F206_4MHz PPCR_Fx56 /* Freq. (fcpu) = 206.4 MHz */ -#define PPCR_F221_2MHz PPCR_Fx60 /* Freq. (fcpu) = 221.2 MHz */ -#define PPCR_F239_6MHz PPCR_Fx64 /* Freq. (fcpu) = 239.6 MHz */ -#define PPCR_F250_7MHz PPCR_Fx68 /* Freq. (fcpu) = 250.7 MHz */ -#define PPCR_F265_4MHz PPCR_Fx72 /* Freq. (fcpu) = 265.4 MHz */ -#define PPCR_F280_2MHz PPCR_Fx76 /* Freq. (fcpu) = 280.2 MHz */ - /* 3.5795 MHz crystal (fxtl): */ -#define PPCR_F57_3MHz PPCR_Fx16 /* Freq. (fcpu) = 57.3 MHz */ -#define PPCR_F71_6MHz PPCR_Fx20 /* Freq. (fcpu) = 71.6 MHz */ -#define PPCR_F85_9MHz PPCR_Fx24 /* Freq. (fcpu) = 85.9 MHz */ -#define PPCR_F100_2MHz PPCR_Fx28 /* Freq. (fcpu) = 100.2 MHz */ -#define PPCR_F114_5MHz PPCR_Fx32 /* Freq. (fcpu) = 114.5 MHz */ -#define PPCR_F128_9MHz PPCR_Fx36 /* Freq. (fcpu) = 128.9 MHz */ -#define PPCR_F143_2MHz PPCR_Fx40 /* Freq. (fcpu) = 143.2 MHz */ -#define PPCR_F157_5MHz PPCR_Fx44 /* Freq. (fcpu) = 157.5 MHz */ -#define PPCR_F171_8MHz PPCR_Fx48 /* Freq. (fcpu) = 171.8 MHz */ -#define PPCR_F186_1MHz PPCR_Fx52 /* Freq. (fcpu) = 186.1 MHz */ -#define PPCR_F200_5MHz PPCR_Fx56 /* Freq. (fcpu) = 200.5 MHz */ -#define PPCR_F214_8MHz PPCR_Fx60 /* Freq. (fcpu) = 214.8 MHz */ -#define PPCR_F229_1MHz PPCR_Fx64 /* Freq. (fcpu) = 229.1 MHz */ -#define PPCR_F243_4MHz PPCR_Fx68 /* Freq. (fcpu) = 243.4 MHz */ -#define PPCR_F257_7MHz PPCR_Fx72 /* Freq. (fcpu) = 257.7 MHz */ -#define PPCR_F272_0MHz PPCR_Fx76 /* Freq. (fcpu) = 272.0 MHz */ - -#define POSR_OOK 0x00000001 /* RTC Oscillator (32.768 kHz) OK */ - - -/* - * Reset Controller (RC) control registers - * - * Registers - * RSRR Reset Controller (RC) Software Reset Register - * (read/write). - * RCSR Reset Controller (RC) Status Register (read/write). - */ - -#define _RSRR 0x90030000 /* RC Software Reset Reg. */ -#define _RCSR 0x90030004 /* RC Status Reg. */ - -#if LANGUAGE == C -#define RSRR /* RC Software Reset Reg. */ \ - (*((volatile Word *) io_p2v (_RSRR))) -#define RCSR /* RC Status Reg. */ \ - (*((volatile Word *) io_p2v (_RCSR))) -#endif /* LANGUAGE == C */ - -#define RSRR_SWR 0x00000001 /* SoftWare Reset (set only) */ - -#define RCSR_HWR 0x00000001 /* HardWare Reset */ -#define RCSR_SWR 0x00000002 /* SoftWare Reset */ -#define RCSR_WDR 0x00000004 /* Watch-Dog Reset */ -#define RCSR_SMR 0x00000008 /* Sleep-Mode Reset */ - - -/* - * Test unit control registers - * - * Registers - * TUCR Test Unit Control Register (read/write). - */ - -#define _TUCR 0x90030008 /* Test Unit Control Reg. */ - -#if LANGUAGE == C -#define TUCR /* Test Unit Control Reg. */ \ - (*((volatile Word *) io_p2v (_TUCR))) -#endif /* LANGUAGE == C */ - -#define TUCR_TIC 0x00000040 /* TIC mode */ -#define TUCR_TTST 0x00000080 /* Trim TeST mode */ -#define TUCR_RCRC 0x00000100 /* Richard's Cyclic Redundancy */ - /* Check */ -#define TUCR_PMD 0x00000200 /* Power Management Disable */ -#define TUCR_MR 0x00000400 /* Memory Request mode */ -#define TUCR_NoMB (TUCR_MR*0) /* No Memory Bus request & grant */ -#define TUCR_MBGPIO (TUCR_MR*1) /* Memory Bus request (MBREQ) & */ - /* grant (MBGNT) on GPIO [22:21] */ -#define TUCR_CTB Fld (3, 20) /* Clock Test Bits */ -#define TUCR_FDC 0x00800000 /* RTC Force Delete Count */ -#define TUCR_FMC 0x01000000 /* Force Michelle's Control mode */ -#define TUCR_TMC 0x02000000 /* RTC Trimmer Multiplexer Control */ -#define TUCR_DPS 0x04000000 /* Disallow Pad Sleep */ -#define TUCR_TSEL Fld (3, 29) /* clock Test SELect on GPIO [27] */ -#define TUCR_32_768kHz /* 32.768 kHz osc. on GPIO [27] */ \ - (0 << FShft (TUCR_TSEL)) -#define TUCR_3_6864MHz /* 3.6864 MHz osc. on GPIO [27] */ \ - (1 << FShft (TUCR_TSEL)) -#define TUCR_VDD /* VDD ring osc./16 on GPIO [27] */ \ - (2 << FShft (TUCR_TSEL)) -#define TUCR_96MHzPLL /* 96 MHz PLL/4 on GPIO [27] */ \ - (3 << FShft (TUCR_TSEL)) -#define TUCR_Clock /* internal (fcpu/2) & 32.768 kHz */ \ - /* Clocks on GPIO [26:27] */ \ - (4 << FShft (TUCR_TSEL)) -#define TUCR_3_6864MHzA /* 3.6864 MHz osc. on GPIO [27] */ \ - /* (Alternative) */ \ - (5 << FShft (TUCR_TSEL)) -#define TUCR_MainPLL /* Main PLL/16 on GPIO [27] */ \ - (6 << FShft (TUCR_TSEL)) -#define TUCR_VDDL /* VDDL ring osc./4 on GPIO [27] */ \ - (7 << FShft (TUCR_TSEL)) - - -/* - * General-Purpose Input/Output (GPIO) control registers - * - * Registers - * GPLR General-Purpose Input/Output (GPIO) Pin Level - * Register (read). - * GPDR General-Purpose Input/Output (GPIO) Pin Direction - * Register (read/write). - * GPSR General-Purpose Input/Output (GPIO) Pin output Set - * Register (write). - * GPCR General-Purpose Input/Output (GPIO) Pin output Clear - * Register (write). - * GRER General-Purpose Input/Output (GPIO) Rising-Edge - * detect Register (read/write). - * GFER General-Purpose Input/Output (GPIO) Falling-Edge - * detect Register (read/write). - * GEDR General-Purpose Input/Output (GPIO) Edge Detect - * status Register (read/write). - * GAFR General-Purpose Input/Output (GPIO) Alternate - * Function Register (read/write). - * - * Clock - * fcpu, Tcpu Frequency, period of the CPU core clock (CCLK). - */ - -#define _GPLR 0x90040000 /* GPIO Pin Level Reg. */ -#define _GPDR 0x90040004 /* GPIO Pin Direction Reg. */ -#define _GPSR 0x90040008 /* GPIO Pin output Set Reg. */ -#define _GPCR 0x9004000C /* GPIO Pin output Clear Reg. */ -#define _GRER 0x90040010 /* GPIO Rising-Edge detect Reg. */ -#define _GFER 0x90040014 /* GPIO Falling-Edge detect Reg. */ -#define _GEDR 0x90040018 /* GPIO Edge Detect status Reg. */ -#define _GAFR 0x9004001C /* GPIO Alternate Function Reg. */ - -#if LANGUAGE == C -#define GPLR /* GPIO Pin Level Reg. */ \ - (*((volatile Word *) io_p2v (_GPLR))) -#define GPDR /* GPIO Pin Direction Reg. */ \ - (*((volatile Word *) io_p2v (_GPDR))) -#define GPSR /* GPIO Pin output Set Reg. */ \ - (*((volatile Word *) io_p2v (_GPSR))) -#define GPCR /* GPIO Pin output Clear Reg. */ \ - (*((volatile Word *) io_p2v (_GPCR))) -#define GRER /* GPIO Rising-Edge detect Reg. */ \ - (*((volatile Word *) io_p2v (_GRER))) -#define GFER /* GPIO Falling-Edge detect Reg. */ \ - (*((volatile Word *) io_p2v (_GFER))) -#define GEDR /* GPIO Edge Detect status Reg. */ \ - (*((volatile Word *) io_p2v (_GEDR))) -#define GAFR /* GPIO Alternate Function Reg. */ \ - (*((volatile Word *) io_p2v (_GAFR))) -#elif LANGUAGE == Assembly - -#define GPLR (io_p2v (_GPLR)) -#define GPDR (io_p2v (_GPDR)) -#define GPSR (io_p2v (_GPSR)) -#define GPCR (io_p2v (_GPCR)) -#define GRER (io_p2v (_GRER)) -#define GFER (io_p2v (_GFER)) -#define GEDR (io_p2v (_GEDR)) -#define GAFR (io_p2v (_GAFR)) - -#endif /* LANGUAGE == C */ - -#define GPIO_MIN (0) -#define GPIO_MAX (27) - -#define GPIO_GPIO(Nb) /* GPIO [0..27] */ \ - (0x00000001 << (Nb)) -#define GPIO_GPIO0 GPIO_GPIO (0) /* GPIO [0] */ -#define GPIO_GPIO1 GPIO_GPIO (1) /* GPIO [1] */ -#define GPIO_GPIO2 GPIO_GPIO (2) /* GPIO [2] */ -#define GPIO_GPIO3 GPIO_GPIO (3) /* GPIO [3] */ -#define GPIO_GPIO4 GPIO_GPIO (4) /* GPIO [4] */ -#define GPIO_GPIO5 GPIO_GPIO (5) /* GPIO [5] */ -#define GPIO_GPIO6 GPIO_GPIO (6) /* GPIO [6] */ -#define GPIO_GPIO7 GPIO_GPIO (7) /* GPIO [7] */ -#define GPIO_GPIO8 GPIO_GPIO (8) /* GPIO [8] */ -#define GPIO_GPIO9 GPIO_GPIO (9) /* GPIO [9] */ -#define GPIO_GPIO10 GPIO_GPIO (10) /* GPIO [10] */ -#define GPIO_GPIO11 GPIO_GPIO (11) /* GPIO [11] */ -#define GPIO_GPIO12 GPIO_GPIO (12) /* GPIO [12] */ -#define GPIO_GPIO13 GPIO_GPIO (13) /* GPIO [13] */ -#define GPIO_GPIO14 GPIO_GPIO (14) /* GPIO [14] */ -#define GPIO_GPIO15 GPIO_GPIO (15) /* GPIO [15] */ -#define GPIO_GPIO16 GPIO_GPIO (16) /* GPIO [16] */ -#define GPIO_GPIO17 GPIO_GPIO (17) /* GPIO [17] */ -#define GPIO_GPIO18 GPIO_GPIO (18) /* GPIO [18] */ -#define GPIO_GPIO19 GPIO_GPIO (19) /* GPIO [19] */ -#define GPIO_GPIO20 GPIO_GPIO (20) /* GPIO [20] */ -#define GPIO_GPIO21 GPIO_GPIO (21) /* GPIO [21] */ -#define GPIO_GPIO22 GPIO_GPIO (22) /* GPIO [22] */ -#define GPIO_GPIO23 GPIO_GPIO (23) /* GPIO [23] */ -#define GPIO_GPIO24 GPIO_GPIO (24) /* GPIO [24] */ -#define GPIO_GPIO25 GPIO_GPIO (25) /* GPIO [25] */ -#define GPIO_GPIO26 GPIO_GPIO (26) /* GPIO [26] */ -#define GPIO_GPIO27 GPIO_GPIO (27) /* GPIO [27] */ - -#define GPIO_LDD(Nb) /* LCD Data [8..15] (O) */ \ - GPIO_GPIO ((Nb) - 6) -#define GPIO_LDD8 GPIO_LDD (8) /* LCD Data [8] (O) */ -#define GPIO_LDD9 GPIO_LDD (9) /* LCD Data [9] (O) */ -#define GPIO_LDD10 GPIO_LDD (10) /* LCD Data [10] (O) */ -#define GPIO_LDD11 GPIO_LDD (11) /* LCD Data [11] (O) */ -#define GPIO_LDD12 GPIO_LDD (12) /* LCD Data [12] (O) */ -#define GPIO_LDD13 GPIO_LDD (13) /* LCD Data [13] (O) */ -#define GPIO_LDD14 GPIO_LDD (14) /* LCD Data [14] (O) */ -#define GPIO_LDD15 GPIO_LDD (15) /* LCD Data [15] (O) */ - /* ser. port 4: */ -#define GPIO_SSP_TXD GPIO_GPIO (10) /* SSP Transmit Data (O) */ -#define GPIO_SSP_RXD GPIO_GPIO (11) /* SSP Receive Data (I) */ -#define GPIO_SSP_SCLK GPIO_GPIO (12) /* SSP Sample CLocK (O) */ -#define GPIO_SSP_SFRM GPIO_GPIO (13) /* SSP Sample FRaMe (O) */ - /* ser. port 1: */ -#define GPIO_UART_TXD GPIO_GPIO (14) /* UART Transmit Data (O) */ -#define GPIO_UART_RXD GPIO_GPIO (15) /* UART Receive Data (I) */ -#define GPIO_SDLC_SCLK GPIO_GPIO (16) /* SDLC Sample CLocK (I/O) */ -#define GPIO_SDLC_AAF GPIO_GPIO (17) /* SDLC Abort After Frame (O) */ -#define GPIO_UART_SCLK1 GPIO_GPIO (18) /* UART Sample CLocK 1 (I) */ - /* ser. port 4: */ -#define GPIO_SSP_CLK GPIO_GPIO (19) /* SSP external CLocK (I) */ - /* ser. port 3: */ -#define GPIO_UART_SCLK3 GPIO_GPIO (20) /* UART Sample CLocK 3 (I) */ - /* ser. port 4: */ -#define GPIO_MCP_CLK GPIO_GPIO (21) /* MCP CLocK (I) */ - /* test controller: */ -#define GPIO_TIC_ACK GPIO_GPIO (21) /* TIC ACKnowledge (O) */ -#define GPIO_MBGNT GPIO_GPIO (21) /* Memory Bus GraNT (O) */ -#define GPIO_TREQA GPIO_GPIO (22) /* TIC REQuest A (I) */ -#define GPIO_MBREQ GPIO_GPIO (22) /* Memory Bus REQuest (I) */ -#define GPIO_TREQB GPIO_GPIO (23) /* TIC REQuest B (I) */ -#define GPIO_1Hz GPIO_GPIO (25) /* 1 Hz clock (O) */ -#define GPIO_RCLK GPIO_GPIO (26) /* internal (R) CLocK (O, fcpu/2) */ -#define GPIO_32_768kHz GPIO_GPIO (27) /* 32.768 kHz clock (O, RTC) */ - -#define GPDR_In 0 /* Input */ -#define GPDR_Out 1 /* Output */ - - -/* - * Interrupt Controller (IC) control registers - * - * Registers - * ICIP Interrupt Controller (IC) Interrupt ReQuest (IRQ) - * Pending register (read). - * ICMR Interrupt Controller (IC) Mask Register (read/write). - * ICLR Interrupt Controller (IC) Level Register (read/write). - * ICCR Interrupt Controller (IC) Control Register - * (read/write). - * [The ICCR register is only implemented in versions 2.0 - * (rev. = 8) and higher of the StrongARM SA-1100.] - * ICFP Interrupt Controller (IC) Fast Interrupt reQuest - * (FIQ) Pending register (read). - * ICPR Interrupt Controller (IC) Pending Register (read). - * [The ICPR register is active low (inverted) in - * versions 1.0 (rev. = 1) and 1.1 (rev. = 2) of the - * StrongARM SA-1100, it is active high (non-inverted) in - * versions 2.0 (rev. = 8) and higher.] - */ - -#define _ICIP 0x90050000 /* IC IRQ Pending reg. */ -#define _ICMR 0x90050004 /* IC Mask Reg. */ -#define _ICLR 0x90050008 /* IC Level Reg. */ -#define _ICCR 0x9005000C /* IC Control Reg. */ -#define _ICFP 0x90050010 /* IC FIQ Pending reg. */ -#define _ICPR 0x90050020 /* IC Pending Reg. */ - -#if LANGUAGE == C -#define ICIP /* IC IRQ Pending reg. */ \ - (*((volatile Word *) io_p2v (_ICIP))) -#define ICMR /* IC Mask Reg. */ \ - (*((volatile Word *) io_p2v (_ICMR))) -#define ICLR /* IC Level Reg. */ \ - (*((volatile Word *) io_p2v (_ICLR))) -#define ICCR /* IC Control Reg. */ \ - (*((volatile Word *) io_p2v (_ICCR))) -#define ICFP /* IC FIQ Pending reg. */ \ - (*((volatile Word *) io_p2v (_ICFP))) -#define ICPR /* IC Pending Reg. */ \ - (*((volatile Word *) io_p2v (_ICPR))) -#endif /* LANGUAGE == C */ - -#define IC_GPIO(Nb) /* GPIO [0..10] */ \ - (0x00000001 << (Nb)) -#define IC_GPIO0 IC_GPIO (0) /* GPIO [0] */ -#define IC_GPIO1 IC_GPIO (1) /* GPIO [1] */ -#define IC_GPIO2 IC_GPIO (2) /* GPIO [2] */ -#define IC_GPIO3 IC_GPIO (3) /* GPIO [3] */ -#define IC_GPIO4 IC_GPIO (4) /* GPIO [4] */ -#define IC_GPIO5 IC_GPIO (5) /* GPIO [5] */ -#define IC_GPIO6 IC_GPIO (6) /* GPIO [6] */ -#define IC_GPIO7 IC_GPIO (7) /* GPIO [7] */ -#define IC_GPIO8 IC_GPIO (8) /* GPIO [8] */ -#define IC_GPIO9 IC_GPIO (9) /* GPIO [9] */ -#define IC_GPIO10 IC_GPIO (10) /* GPIO [10] */ -#define IC_GPIO11_27 0x00000800 /* GPIO [11:27] (ORed) */ -#define IC_LCD 0x00001000 /* LCD controller */ -#define IC_Ser0UDC 0x00002000 /* Ser. port 0 UDC */ -#define IC_Ser1SDLC 0x00004000 /* Ser. port 1 SDLC */ -#define IC_Ser1UART 0x00008000 /* Ser. port 1 UART */ -#define IC_Ser2ICP 0x00010000 /* Ser. port 2 ICP */ -#define IC_Ser3UART 0x00020000 /* Ser. port 3 UART */ -#define IC_Ser4MCP 0x00040000 /* Ser. port 4 MCP */ -#define IC_Ser4SSP 0x00080000 /* Ser. port 4 SSP */ -#define IC_DMA(Nb) /* DMA controller channel [0..5] */ \ - (0x00100000 << (Nb)) -#define IC_DMA0 IC_DMA (0) /* DMA controller channel 0 */ -#define IC_DMA1 IC_DMA (1) /* DMA controller channel 1 */ -#define IC_DMA2 IC_DMA (2) /* DMA controller channel 2 */ -#define IC_DMA3 IC_DMA (3) /* DMA controller channel 3 */ -#define IC_DMA4 IC_DMA (4) /* DMA controller channel 4 */ -#define IC_DMA5 IC_DMA (5) /* DMA controller channel 5 */ -#define IC_OST(Nb) /* OS Timer match [0..3] */ \ - (0x04000000 << (Nb)) -#define IC_OST0 IC_OST (0) /* OS Timer match 0 */ -#define IC_OST1 IC_OST (1) /* OS Timer match 1 */ -#define IC_OST2 IC_OST (2) /* OS Timer match 2 */ -#define IC_OST3 IC_OST (3) /* OS Timer match 3 */ -#define IC_RTC1Hz 0x40000000 /* RTC 1 Hz clock */ -#define IC_RTCAlrm 0x80000000 /* RTC Alarm */ - -#define ICLR_IRQ 0 /* Interrupt ReQuest */ -#define ICLR_FIQ 1 /* Fast Interrupt reQuest */ - -#define ICCR_DIM 0x00000001 /* Disable Idle-mode interrupt */ - /* Mask */ -#define ICCR_IdleAllInt (ICCR_DIM*0) /* Idle-mode All Interrupt enable */ - /* (ICMR ignored) */ -#define ICCR_IdleMskInt (ICCR_DIM*1) /* Idle-mode non-Masked Interrupt */ - /* enable (ICMR used) */ - - -/* - * Peripheral Pin Controller (PPC) control registers - * - * Registers - * PPDR Peripheral Pin Controller (PPC) Pin Direction - * Register (read/write). - * PPSR Peripheral Pin Controller (PPC) Pin State Register - * (read/write). - * PPAR Peripheral Pin Controller (PPC) Pin Assignment - * Register (read/write). - * PSDR Peripheral Pin Controller (PPC) Sleep-mode pin - * Direction Register (read/write). - * PPFR Peripheral Pin Controller (PPC) Pin Flag Register - * (read). - */ - -#define _PPDR 0x90060000 /* PPC Pin Direction Reg. */ -#define _PPSR 0x90060004 /* PPC Pin State Reg. */ -#define _PPAR 0x90060008 /* PPC Pin Assignment Reg. */ -#define _PSDR 0x9006000C /* PPC Sleep-mode pin Direction */ - /* Reg. */ -#define _PPFR 0x90060010 /* PPC Pin Flag Reg. */ - -#if LANGUAGE == C -#define PPDR /* PPC Pin Direction Reg. */ \ - (*((volatile Word *) io_p2v (_PPDR))) -#define PPSR /* PPC Pin State Reg. */ \ - (*((volatile Word *) io_p2v (_PPSR))) -#define PPAR /* PPC Pin Assignment Reg. */ \ - (*((volatile Word *) io_p2v (_PPAR))) -#define PSDR /* PPC Sleep-mode pin Direction */ \ - /* Reg. */ \ - (*((volatile Word *) io_p2v (_PSDR))) -#define PPFR /* PPC Pin Flag Reg. */ \ - (*((volatile Word *) io_p2v (_PPFR))) -#endif /* LANGUAGE == C */ - -#define PPC_LDD(Nb) /* LCD Data [0..7] */ \ - (0x00000001 << (Nb)) -#define PPC_LDD0 PPC_LDD (0) /* LCD Data [0] */ -#define PPC_LDD1 PPC_LDD (1) /* LCD Data [1] */ -#define PPC_LDD2 PPC_LDD (2) /* LCD Data [2] */ -#define PPC_LDD3 PPC_LDD (3) /* LCD Data [3] */ -#define PPC_LDD4 PPC_LDD (4) /* LCD Data [4] */ -#define PPC_LDD5 PPC_LDD (5) /* LCD Data [5] */ -#define PPC_LDD6 PPC_LDD (6) /* LCD Data [6] */ -#define PPC_LDD7 PPC_LDD (7) /* LCD Data [7] */ -#define PPC_L_PCLK 0x00000100 /* LCD Pixel CLocK */ -#define PPC_L_LCLK 0x00000200 /* LCD Line CLocK */ -#define PPC_L_FCLK 0x00000400 /* LCD Frame CLocK */ -#define PPC_L_BIAS 0x00000800 /* LCD AC BIAS */ - /* ser. port 1: */ -#define PPC_TXD1 0x00001000 /* SDLC/UART Transmit Data 1 */ -#define PPC_RXD1 0x00002000 /* SDLC/UART Receive Data 1 */ - /* ser. port 2: */ -#define PPC_TXD2 0x00004000 /* IPC Transmit Data 2 */ -#define PPC_RXD2 0x00008000 /* IPC Receive Data 2 */ - /* ser. port 3: */ -#define PPC_TXD3 0x00010000 /* UART Transmit Data 3 */ -#define PPC_RXD3 0x00020000 /* UART Receive Data 3 */ - /* ser. port 4: */ -#define PPC_TXD4 0x00040000 /* MCP/SSP Transmit Data 4 */ -#define PPC_RXD4 0x00080000 /* MCP/SSP Receive Data 4 */ -#define PPC_SCLK 0x00100000 /* MCP/SSP Sample CLocK */ -#define PPC_SFRM 0x00200000 /* MCP/SSP Sample FRaMe */ - -#define PPDR_In 0 /* Input */ -#define PPDR_Out 1 /* Output */ - - /* ser. port 1: */ -#define PPAR_UPR 0x00001000 /* UART Pin Reassignment */ -#define PPAR_UARTTR (PPAR_UPR*0) /* UART on TXD_1 & RXD_1 */ -#define PPAR_UARTGPIO (PPAR_UPR*1) /* UART on GPIO [14:15] */ - /* ser. port 4: */ -#define PPAR_SPR 0x00040000 /* SSP Pin Reassignment */ -#define PPAR_SSPTRSS (PPAR_SPR*0) /* SSP on TXD_C, RXD_C, SCLK_C, */ - /* & SFRM_C */ -#define PPAR_SSPGPIO (PPAR_SPR*1) /* SSP on GPIO [10:13] */ - -#define PSDR_OutL 0 /* Output Low in sleep mode */ -#define PSDR_Flt 1 /* Floating (input) in sleep mode */ - -#define PPFR_LCD 0x00000001 /* LCD controller */ -#define PPFR_SP1TX 0x00001000 /* Ser. Port 1 SDLC/UART Transmit */ -#define PPFR_SP1RX 0x00002000 /* Ser. Port 1 SDLC/UART Receive */ -#define PPFR_SP2TX 0x00004000 /* Ser. Port 2 ICP Transmit */ -#define PPFR_SP2RX 0x00008000 /* Ser. Port 2 ICP Receive */ -#define PPFR_SP3TX 0x00010000 /* Ser. Port 3 UART Transmit */ -#define PPFR_SP3RX 0x00020000 /* Ser. Port 3 UART Receive */ -#define PPFR_SP4 0x00040000 /* Ser. Port 4 MCP/SSP */ -#define PPFR_PerEn 0 /* Peripheral Enabled */ -#define PPFR_PPCEn 1 /* PPC Enabled */ - - -/* - * Dynamic Random-Access Memory (DRAM) control registers - * - * Registers - * MDCNFG Memory system: Dynamic Random-Access Memory (DRAM) - * CoNFiGuration register (read/write). - * MDCAS0 Memory system: Dynamic Random-Access Memory (DRAM) - * Column Address Strobe (CAS) shift register 0 - * (read/write). - * MDCAS1 Memory system: Dynamic Random-Access Memory (DRAM) - * Column Address Strobe (CAS) shift register 1 - * (read/write). - * MDCAS2 Memory system: Dynamic Random-Access Memory (DRAM) - * Column Address Strobe (CAS) shift register 2 - * (read/write). - * - * Clocks - * fcpu, Tcpu Frequency, period of the CPU core clock (CCLK). - * fmem, Tmem Frequency, period of the memory clock (fmem = fcpu/2). - * fcas, Tcas Frequency, period of the DRAM CAS shift registers. - */ - - /* Memory system: */ -#define _MDCNFG 0xA0000000 /* DRAM CoNFiGuration reg. */ -#define _MDCAS(Nb) /* DRAM CAS shift reg. [0..3] */ \ - (0xA0000004 + (Nb)*4) -#define _MDCAS0 _MDCAS (0) /* DRAM CAS shift reg. 0 */ -#define _MDCAS1 _MDCAS (1) /* DRAM CAS shift reg. 1 */ -#define _MDCAS2 _MDCAS (2) /* DRAM CAS shift reg. 2 */ - -#if LANGUAGE == C - /* Memory system: */ -#define MDCNFG /* DRAM CoNFiGuration reg. */ \ - (*((volatile Word *) io_p2v (_MDCNFG))) -#define MDCAS /* DRAM CAS shift reg. [0..3] */ \ - ((volatile Word *) io_p2v (_MDCAS (0))) -#define MDCAS0 (MDCAS [0]) /* DRAM CAS shift reg. 0 */ -#define MDCAS1 (MDCAS [1]) /* DRAM CAS shift reg. 1 */ -#define MDCAS2 (MDCAS [2]) /* DRAM CAS shift reg. 2 */ - -#elif LANGUAGE == Assembly - -#define MDCNFG (io_p2v(_MDCNFG)) - -#endif /* LANGUAGE == C */ - -/* SA1100 MDCNFG values */ -#define MDCNFG_DE(Nb) /* DRAM Enable bank [0..3] */ \ - (0x00000001 << (Nb)) -#define MDCNFG_DE0 MDCNFG_DE (0) /* DRAM Enable bank 0 */ -#define MDCNFG_DE1 MDCNFG_DE (1) /* DRAM Enable bank 1 */ -#define MDCNFG_DE2 MDCNFG_DE (2) /* DRAM Enable bank 2 */ -#define MDCNFG_DE3 MDCNFG_DE (3) /* DRAM Enable bank 3 */ -#define MDCNFG_DRAC Fld (2, 4) /* DRAM Row Address Count - 9 */ -#define MDCNFG_RowAdd(Add) /* Row Address count [9..12] */ \ - (((Add) - 9) << FShft (MDCNFG_DRAC)) -#define MDCNFG_CDB2 0x00000040 /* shift reg. Clock Divide By 2 */ - /* (fcas = fcpu/2) */ -#define MDCNFG_TRP Fld (4, 7) /* Time RAS Pre-charge - 1 [Tmem] */ -#define MDCNFG_PrChrg(Tcpu) /* Pre-Charge time [2..32 Tcpu] */ \ - (((Tcpu) - 2)/2 << FShft (MDCNFG_TRP)) -#define MDCNFG_CeilPrChrg(Tcpu) /* Ceil. of PrChrg [2..32 Tcpu] */ \ - (((Tcpu) - 1)/2 << FShft (MDCNFG_TRP)) -#define MDCNFG_TRASR Fld (4, 11) /* Time RAS Refresh - 1 [Tmem] */ -#define MDCNFG_Ref(Tcpu) /* Refresh time [2..32 Tcpu] */ \ - (((Tcpu) - 2)/2 << FShft (MDCNFG_TRASR)) -#define MDCNFG_CeilRef(Tcpu) /* Ceil. of Ref [2..32 Tcpu] */ \ - (((Tcpu) - 1)/2 << FShft (MDCNFG_TRASR)) -#define MDCNFG_TDL Fld (2, 15) /* Time Data Latch [Tcpu] */ -#define MDCNFG_DataLtch(Tcpu) /* Data Latch delay [0..3 Tcpu] */ \ - ((Tcpu) << FShft (MDCNFG_TDL)) -#define MDCNFG_DRI Fld (15, 17) /* min. DRAM Refresh Interval/4 */ - /* [Tmem] */ -#define MDCNFG_RefInt(Tcpu) /* min. Refresh Interval */ \ - /* [0..262136 Tcpu] */ \ - ((Tcpu)/8 << FShft (MDCNFG_DRI)) - -/* SA1110 MDCNFG values */ -#define MDCNFG_SA1110_DE0 0x00000001 /* DRAM Enable bank 0 */ -#define MDCNFG_SA1110_DE1 0x00000002 /* DRAM Enable bank 1 */ -#define MDCNFG_SA1110_DTIM0 0x00000004 /* DRAM timing type 0/1 */ -#define MDCNFG_SA1110_DWID0 0x00000008 /* DRAM bus width 0/1 */ -#define MDCNFG_SA1110_DRAC0 Fld(3, 4) /* DRAM row addr bit count */ - /* bank 0/1 */ -#define MDCNFG_SA1110_CDB20 0x00000080 /* Mem Clock divide by 2 0/1 */ -#define MDCNFG_SA1110_TRP0 Fld(3, 8) /* RAS precharge 0/1 */ -#define MDCNFG_SA1110_TDL0 Fld(2, 12) /* Data input latch after CAS*/ - /* deassertion 0/1 */ -#define MDCNFG_SA1110_TWR0 Fld(2, 14) /* SDRAM write recovery 0/1 */ -#define MDCNFG_SA1110_DE2 0x00010000 /* DRAM Enable bank 0 */ -#define MDCNFG_SA1110_DE3 0x00020000 /* DRAM Enable bank 1 */ -#define MDCNFG_SA1110_DTIM2 0x00040000 /* DRAM timing type 0/1 */ -#define MDCNFG_SA1110_DWID2 0x00080000 /* DRAM bus width 0/1 */ -#define MDCNFG_SA1110_DRAC2 Fld(3, 20) /* DRAM row addr bit count */ - /* bank 0/1 */ -#define MDCNFG_SA1110_CDB22 0x00800000 /* Mem Clock divide by 2 0/1 */ -#define MDCNFG_SA1110_TRP2 Fld(3, 24) /* RAS precharge 0/1 */ -#define MDCNFG_SA1110_TDL2 Fld(2, 28) /* Data input latch after CAS*/ - /* deassertion 0/1 */ -#define MDCNFG_SA1110_TWR2 Fld(2, 30) /* SDRAM write recovery 0/1 */ - - -/* - * Static memory control registers - * - * Registers - * MSC0 Memory system: Static memory Control register 0 - * (read/write). - * MSC1 Memory system: Static memory Control register 1 - * (read/write). - * - * Clocks - * fcpu, Tcpu Frequency, period of the CPU core clock (CCLK). - * fmem, Tmem Frequency, period of the memory clock (fmem = fcpu/2). - */ - - /* Memory system: */ -#define _MSC(Nb) /* Static memory Control reg. */ \ - /* [0..1] */ \ - (0xA0000010 + (Nb)*4) -#define _MSC0 _MSC (0) /* Static memory Control reg. 0 */ -#define _MSC1 _MSC (1) /* Static memory Control reg. 1 */ -#define _MSC2 0xA000002C /* Static memory Control reg. 2, not contiguous */ - -#if LANGUAGE == C - /* Memory system: */ -#define MSC /* Static memory Control reg. */ \ - /* [0..1] */ \ - ((volatile Word *) io_p2v (_MSC (0))) -#define MSC0 (MSC [0]) /* Static memory Control reg. 0 */ -#define MSC1 (MSC [1]) /* Static memory Control reg. 1 */ -#define MSC2 (*(volatile Word *) io_p2v (_MSC2)) /* Static memory Control reg. 2 */ - -#elif LANGUAGE == Assembly - -#define MSC0 io_p2v(0xa0000010) -#define MSC1 io_p2v(0xa0000014) -#define MSC2 io_p2v(0xa000002c) - -#endif /* LANGUAGE == C */ - -#define MSC_Bnk(Nb) /* static memory Bank [0..3] */ \ - Fld (16, ((Nb) Modulo 2)*16) -#define MSC0_Bnk0 MSC_Bnk (0) /* static memory Bank 0 */ -#define MSC0_Bnk1 MSC_Bnk (1) /* static memory Bank 1 */ -#define MSC1_Bnk2 MSC_Bnk (2) /* static memory Bank 2 */ -#define MSC1_Bnk3 MSC_Bnk (3) /* static memory Bank 3 */ - -#define MSC_RT Fld (2, 0) /* ROM/static memory Type */ -#define MSC_NonBrst /* Non-Burst static memory */ \ - (0 << FShft (MSC_RT)) -#define MSC_SRAM /* 32-bit byte-writable SRAM */ \ - (1 << FShft (MSC_RT)) -#define MSC_Brst4 /* Burst-of-4 static memory */ \ - (2 << FShft (MSC_RT)) -#define MSC_Brst8 /* Burst-of-8 static memory */ \ - (3 << FShft (MSC_RT)) -#define MSC_RBW 0x0004 /* ROM/static memory Bus Width */ -#define MSC_32BitStMem (MSC_RBW*0) /* 32-Bit Static Memory */ -#define MSC_16BitStMem (MSC_RBW*1) /* 16-Bit Static Memory */ -#define MSC_RDF Fld (5, 3) /* ROM/static memory read Delay */ - /* First access - 1(.5) [Tmem] */ -#define MSC_1stRdAcc(Tcpu) /* 1st Read Access time (burst */ \ - /* static memory) [3..65 Tcpu] */ \ - ((((Tcpu) - 3)/2) << FShft (MSC_RDF)) -#define MSC_Ceil1stRdAcc(Tcpu) /* Ceil. of 1stRdAcc [3..65 Tcpu] */ \ - ((((Tcpu) - 2)/2) << FShft (MSC_RDF)) -#define MSC_RdAcc(Tcpu) /* Read Access time (non-burst */ \ - /* static memory) [2..64 Tcpu] */ \ - ((((Tcpu) - 2)/2) << FShft (MSC_RDF)) -#define MSC_CeilRdAcc(Tcpu) /* Ceil. of RdAcc [2..64 Tcpu] */ \ - ((((Tcpu) - 1)/2) << FShft (MSC_RDF)) -#define MSC_RDN Fld (5, 8) /* ROM/static memory read Delay */ - /* Next access - 1 [Tmem] */ -#define MSC_NxtRdAcc(Tcpu) /* Next Read Access time (burst */ \ - /* static memory) [2..64 Tcpu] */ \ - ((((Tcpu) - 2)/2) << FShft (MSC_RDN)) -#define MSC_CeilNxtRdAcc(Tcpu) /* Ceil. of NxtRdAcc [2..64 Tcpu] */ \ - ((((Tcpu) - 1)/2) << FShft (MSC_RDN)) -#define MSC_WrAcc(Tcpu) /* Write Access time (non-burst */ \ - /* static memory) [2..64 Tcpu] */ \ - ((((Tcpu) - 2)/2) << FShft (MSC_RDN)) -#define MSC_CeilWrAcc(Tcpu) /* Ceil. of WrAcc [2..64 Tcpu] */ \ - ((((Tcpu) - 1)/2) << FShft (MSC_RDN)) -#define MSC_RRR Fld (3, 13) /* ROM/static memory RecoveRy */ - /* time/2 [Tmem] */ -#define MSC_Rec(Tcpu) /* Recovery time [0..28 Tcpu] */ \ - (((Tcpu)/4) << FShft (MSC_RRR)) -#define MSC_CeilRec(Tcpu) /* Ceil. of Rec [0..28 Tcpu] */ \ - ((((Tcpu) + 3)/4) << FShft (MSC_RRR)) - - -/* - * Personal Computer Memory Card International Association (PCMCIA) control - * register - * - * Register - * MECR Memory system: Expansion memory bus (PCMCIA) - * Configuration Register (read/write). - * - * Clocks - * fcpu, Tcpu Frequency, period of the CPU core clock (CCLK). - * fmem, Tmem Frequency, period of the memory clock (fmem = fcpu/2). - * fbclk, Tbclk Frequency, period of the PCMCIA clock (BCLK). - */ - - /* Memory system: */ -#define _MECR 0xA0000018 /* Expansion memory bus (PCMCIA) */ - /* Configuration Reg. */ - -#if LANGUAGE == C - /* Memory system: */ -#define MECR /* Expansion memory bus (PCMCIA) */ \ - /* Configuration Reg. */ \ - (*((volatile Word *) io_p2v (_MECR))) -#endif /* LANGUAGE == C */ - -#define MECR_PCMCIA(Nb) /* PCMCIA [0..1] */ \ - Fld (15, (Nb)*16) -#define MECR_PCMCIA0 MECR_PCMCIA (0) /* PCMCIA 0 */ -#define MECR_PCMCIA1 MECR_PCMCIA (1) /* PCMCIA 1 */ - -#define MECR_BSIO Fld (5, 0) /* BCLK Select I/O - 1 [Tmem] */ -#define MECR_IOClk(Tcpu) /* I/O Clock [2..64 Tcpu] */ \ - ((((Tcpu) - 2)/2) << FShft (MECR_BSIO)) -#define MECR_CeilIOClk(Tcpu) /* Ceil. of IOClk [2..64 Tcpu] */ \ - ((((Tcpu) - 1)/2) << FShft (MECR_BSIO)) -#define MECR_BSA Fld (5, 5) /* BCLK Select Attribute - 1 */ - /* [Tmem] */ -#define MECR_AttrClk(Tcpu) /* Attribute Clock [2..64 Tcpu] */ \ - ((((Tcpu) - 2)/2) << FShft (MECR_BSA)) -#define MECR_CeilAttrClk(Tcpu) /* Ceil. of AttrClk [2..64 Tcpu] */ \ - ((((Tcpu) - 1)/2) << FShft (MECR_BSA)) -#define MECR_BSM Fld (5, 10) /* BCLK Select Memory - 1 [Tmem] */ -#define MECR_MemClk(Tcpu) /* Memory Clock [2..64 Tcpu] */ \ - ((((Tcpu) - 2)/2) << FShft (MECR_BSM)) -#define MECR_CeilMemClk(Tcpu) /* Ceil. of MemClk [2..64 Tcpu] */ \ - ((((Tcpu) - 1)/2) << FShft (MECR_BSM)) - -/* - * On SA1110 only - */ - -#define _MDREFR 0xA000001C - -#if LANGUAGE == C - /* Memory system: */ -#define MDREFR \ - (*((volatile Word *) io_p2v (_MDREFR))) - -#elif LANGUAGE == Assembly - -#define MDREFR (io_p2v(_MDREFR)) - -#endif /* LANGUAGE == C */ - -#define MDREFR_TRASR Fld (4, 0) -#define MDREFR_DRI Fld (12, 4) -#define MDREFR_E0PIN (1 << 16) -#define MDREFR_K0RUN (1 << 17) -#define MDREFR_K0DB2 (1 << 18) -#define MDREFR_E1PIN (1 << 20) -#define MDREFR_K1RUN (1 << 21) -#define MDREFR_K1DB2 (1 << 22) -#define MDREFR_K2RUN (1 << 25) -#define MDREFR_K2DB2 (1 << 26) -#define MDREFR_EAPD (1 << 28) -#define MDREFR_KAPD (1 << 29) -#define MDREFR_SLFRSH (1 << 31) - - -/* - * Direct Memory Access (DMA) control registers - * - * Registers - * DDAR0 Direct Memory Access (DMA) Device Address Register - * channel 0 (read/write). - * DCSR0 Direct Memory Access (DMA) Control and Status - * Register channel 0 (read/write). - * DBSA0 Direct Memory Access (DMA) Buffer Start address - * register A channel 0 (read/write). - * DBTA0 Direct Memory Access (DMA) Buffer Transfer count - * register A channel 0 (read/write). - * DBSB0 Direct Memory Access (DMA) Buffer Start address - * register B channel 0 (read/write). - * DBTB0 Direct Memory Access (DMA) Buffer Transfer count - * register B channel 0 (read/write). - * - * DDAR1 Direct Memory Access (DMA) Device Address Register - * channel 1 (read/write). - * DCSR1 Direct Memory Access (DMA) Control and Status - * Register channel 1 (read/write). - * DBSA1 Direct Memory Access (DMA) Buffer Start address - * register A channel 1 (read/write). - * DBTA1 Direct Memory Access (DMA) Buffer Transfer count - * register A channel 1 (read/write). - * DBSB1 Direct Memory Access (DMA) Buffer Start address - * register B channel 1 (read/write). - * DBTB1 Direct Memory Access (DMA) Buffer Transfer count - * register B channel 1 (read/write). - * - * DDAR2 Direct Memory Access (DMA) Device Address Register - * channel 2 (read/write). - * DCSR2 Direct Memory Access (DMA) Control and Status - * Register channel 2 (read/write). - * DBSA2 Direct Memory Access (DMA) Buffer Start address - * register A channel 2 (read/write). - * DBTA2 Direct Memory Access (DMA) Buffer Transfer count - * register A channel 2 (read/write). - * DBSB2 Direct Memory Access (DMA) Buffer Start address - * register B channel 2 (read/write). - * DBTB2 Direct Memory Access (DMA) Buffer Transfer count - * register B channel 2 (read/write). - * - * DDAR3 Direct Memory Access (DMA) Device Address Register - * channel 3 (read/write). - * DCSR3 Direct Memory Access (DMA) Control and Status - * Register channel 3 (read/write). - * DBSA3 Direct Memory Access (DMA) Buffer Start address - * register A channel 3 (read/write). - * DBTA3 Direct Memory Access (DMA) Buffer Transfer count - * register A channel 3 (read/write). - * DBSB3 Direct Memory Access (DMA) Buffer Start address - * register B channel 3 (read/write). - * DBTB3 Direct Memory Access (DMA) Buffer Transfer count - * register B channel 3 (read/write). - * - * DDAR4 Direct Memory Access (DMA) Device Address Register - * channel 4 (read/write). - * DCSR4 Direct Memory Access (DMA) Control and Status - * Register channel 4 (read/write). - * DBSA4 Direct Memory Access (DMA) Buffer Start address - * register A channel 4 (read/write). - * DBTA4 Direct Memory Access (DMA) Buffer Transfer count - * register A channel 4 (read/write). - * DBSB4 Direct Memory Access (DMA) Buffer Start address - * register B channel 4 (read/write). - * DBTB4 Direct Memory Access (DMA) Buffer Transfer count - * register B channel 4 (read/write). - * - * DDAR5 Direct Memory Access (DMA) Device Address Register - * channel 5 (read/write). - * DCSR5 Direct Memory Access (DMA) Control and Status - * Register channel 5 (read/write). - * DBSA5 Direct Memory Access (DMA) Buffer Start address - * register A channel 5 (read/write). - * DBTA5 Direct Memory Access (DMA) Buffer Transfer count - * register A channel 5 (read/write). - * DBSB5 Direct Memory Access (DMA) Buffer Start address - * register B channel 5 (read/write). - * DBTB5 Direct Memory Access (DMA) Buffer Transfer count - * register B channel 5 (read/write). - */ - -#define DMASp 0x00000020 /* DMA control reg. Space [byte] */ - -#define _DDAR(Nb) /* DMA Device Address Reg. */ \ - /* channel [0..5] */ \ - (0xB0000000 + (Nb)*DMASp) -#define _SetDCSR(Nb) /* Set DMA Control & Status Reg. */ \ - /* channel [0..5] (write) */ \ - (0xB0000004 + (Nb)*DMASp) -#define _ClrDCSR(Nb) /* Clear DMA Control & Status Reg. */ \ - /* channel [0..5] (write) */ \ - (0xB0000008 + (Nb)*DMASp) -#define _RdDCSR(Nb) /* Read DMA Control & Status Reg. */ \ - /* channel [0..5] (read) */ \ - (0xB000000C + (Nb)*DMASp) -#define _DBSA(Nb) /* DMA Buffer Start address reg. A */ \ - /* channel [0..5] */ \ - (0xB0000010 + (Nb)*DMASp) -#define _DBTA(Nb) /* DMA Buffer Transfer count */ \ - /* reg. A channel [0..5] */ \ - (0xB0000014 + (Nb)*DMASp) -#define _DBSB(Nb) /* DMA Buffer Start address reg. B */ \ - /* channel [0..5] */ \ - (0xB0000018 + (Nb)*DMASp) -#define _DBTB(Nb) /* DMA Buffer Transfer count */ \ - /* reg. B channel [0..5] */ \ - (0xB000001C + (Nb)*DMASp) - -#define _DDAR0 _DDAR (0) /* DMA Device Address Reg. */ - /* channel 0 */ -#define _SetDCSR0 _SetDCSR (0) /* Set DMA Control & Status Reg. */ - /* channel 0 (write) */ -#define _ClrDCSR0 _ClrDCSR (0) /* Clear DMA Control & Status Reg. */ - /* channel 0 (write) */ -#define _RdDCSR0 _RdDCSR (0) /* Read DMA Control & Status Reg. */ - /* channel 0 (read) */ -#define _DBSA0 _DBSA (0) /* DMA Buffer Start address reg. A */ - /* channel 0 */ -#define _DBTA0 _DBTA (0) /* DMA Buffer Transfer count */ - /* reg. A channel 0 */ -#define _DBSB0 _DBSB (0) /* DMA Buffer Start address reg. B */ - /* channel 0 */ -#define _DBTB0 _DBTB (0) /* DMA Buffer Transfer count */ - /* reg. B channel 0 */ - -#define _DDAR1 _DDAR (1) /* DMA Device Address Reg. */ - /* channel 1 */ -#define _SetDCSR1 _SetDCSR (1) /* Set DMA Control & Status Reg. */ - /* channel 1 (write) */ -#define _ClrDCSR1 _ClrDCSR (1) /* Clear DMA Control & Status Reg. */ - /* channel 1 (write) */ -#define _RdDCSR1 _RdDCSR (1) /* Read DMA Control & Status Reg. */ - /* channel 1 (read) */ -#define _DBSA1 _DBSA (1) /* DMA Buffer Start address reg. A */ - /* channel 1 */ -#define _DBTA1 _DBTA (1) /* DMA Buffer Transfer count */ - /* reg. A channel 1 */ -#define _DBSB1 _DBSB (1) /* DMA Buffer Start address reg. B */ - /* channel 1 */ -#define _DBTB1 _DBTB (1) /* DMA Buffer Transfer count */ - /* reg. B channel 1 */ - -#define _DDAR2 _DDAR (2) /* DMA Device Address Reg. */ - /* channel 2 */ -#define _SetDCSR2 _SetDCSR (2) /* Set DMA Control & Status Reg. */ - /* channel 2 (write) */ -#define _ClrDCSR2 _ClrDCSR (2) /* Clear DMA Control & Status Reg. */ - /* channel 2 (write) */ -#define _RdDCSR2 _RdDCSR (2) /* Read DMA Control & Status Reg. */ - /* channel 2 (read) */ -#define _DBSA2 _DBSA (2) /* DMA Buffer Start address reg. A */ - /* channel 2 */ -#define _DBTA2 _DBTA (2) /* DMA Buffer Transfer count */ - /* reg. A channel 2 */ -#define _DBSB2 _DBSB (2) /* DMA Buffer Start address reg. B */ - /* channel 2 */ -#define _DBTB2 _DBTB (2) /* DMA Buffer Transfer count */ - /* reg. B channel 2 */ - -#define _DDAR3 _DDAR (3) /* DMA Device Address Reg. */ - /* channel 3 */ -#define _SetDCSR3 _SetDCSR (3) /* Set DMA Control & Status Reg. */ - /* channel 3 (write) */ -#define _ClrDCSR3 _ClrDCSR (3) /* Clear DMA Control & Status Reg. */ - /* channel 3 (write) */ -#define _RdDCSR3 _RdDCSR (3) /* Read DMA Control & Status Reg. */ - /* channel 3 (read) */ -#define _DBSA3 _DBSA (3) /* DMA Buffer Start address reg. A */ - /* channel 3 */ -#define _DBTA3 _DBTA (3) /* DMA Buffer Transfer count */ - /* reg. A channel 3 */ -#define _DBSB3 _DBSB (3) /* DMA Buffer Start address reg. B */ - /* channel 3 */ -#define _DBTB3 _DBTB (3) /* DMA Buffer Transfer count */ - /* reg. B channel 3 */ - -#define _DDAR4 _DDAR (4) /* DMA Device Address Reg. */ - /* channel 4 */ -#define _SetDCSR4 _SetDCSR (4) /* Set DMA Control & Status Reg. */ - /* channel 4 (write) */ -#define _ClrDCSR4 _ClrDCSR (4) /* Clear DMA Control & Status Reg. */ - /* channel 4 (write) */ -#define _RdDCSR4 _RdDCSR (4) /* Read DMA Control & Status Reg. */ - /* channel 4 (read) */ -#define _DBSA4 _DBSA (4) /* DMA Buffer Start address reg. A */ - /* channel 4 */ -#define _DBTA4 _DBTA (4) /* DMA Buffer Transfer count */ - /* reg. A channel 4 */ -#define _DBSB4 _DBSB (4) /* DMA Buffer Start address reg. B */ - /* channel 4 */ -#define _DBTB4 _DBTB (4) /* DMA Buffer Transfer count */ - /* reg. B channel 4 */ - -#define _DDAR5 _DDAR (5) /* DMA Device Address Reg. */ - /* channel 5 */ -#define _SetDCSR5 _SetDCSR (5) /* Set DMA Control & Status Reg. */ - /* channel 5 (write) */ -#define _ClrDCSR5 _ClrDCSR (5) /* Clear DMA Control & Status Reg. */ - /* channel 5 (write) */ -#define _RdDCSR5 _RdDCSR (5) /* Read DMA Control & Status Reg. */ - /* channel 5 (read) */ -#define _DBSA5 _DBSA (5) /* DMA Buffer Start address reg. A */ - /* channel 5 */ -#define _DBTA5 _DBTA (5) /* DMA Buffer Transfer count */ - /* reg. A channel 5 */ -#define _DBSB5 _DBSB (5) /* DMA Buffer Start address reg. B */ - /* channel 5 */ -#define _DBTB5 _DBTB (5) /* DMA Buffer Transfer count */ - /* reg. B channel 5 */ - -#if LANGUAGE == C - -#define DDAR0 /* DMA Device Address Reg. */ \ - /* channel 0 */ \ - (*((volatile Word *) io_p2v (_DDAR0))) -#define SetDCSR0 /* Set DMA Control & Status Reg. */ \ - /* channel 0 (write) */ \ - (*((volatile Word *) io_p2v (_SetDCSR0))) -#define ClrDCSR0 /* Clear DMA Control & Status Reg. */ \ - /* channel 0 (write) */ \ - (*((volatile Word *) io_p2v (_ClrDCSR0))) -#define RdDCSR0 /* Read DMA Control & Status Reg. */ \ - /* channel 0 (read) */ \ - (*((volatile Word *) io_p2v (_RdDCSR0))) -#define DBSA0 /* DMA Buffer Start address reg. A */ \ - /* channel 0 */ \ - (*((volatile Address *) io_p2v (_DBSA0))) -#define DBTA0 /* DMA Buffer Transfer count */ \ - /* reg. A channel 0 */ \ - (*((volatile Word *) io_p2v (_DBTA0))) -#define DBSB0 /* DMA Buffer Start address reg. B */ \ - /* channel 0 */ \ - (*((volatile Address *) io_p2v (_DBSB0))) -#define DBTB0 /* DMA Buffer Transfer count */ \ - /* reg. B channel 0 */ \ - (*((volatile Word *) io_p2v (_DBTB0))) - -#define DDAR1 /* DMA Device Address Reg. */ \ - /* channel 1 */ \ - (*((volatile Word *) io_p2v (_DDAR1))) -#define SetDCSR1 /* Set DMA Control & Status Reg. */ \ - /* channel 1 (write) */ \ - (*((volatile Word *) io_p2v (_SetDCSR1))) -#define ClrDCSR1 /* Clear DMA Control & Status Reg. */ \ - /* channel 1 (write) */ \ - (*((volatile Word *) io_p2v (_ClrDCSR1))) -#define RdDCSR1 /* Read DMA Control & Status Reg. */ \ - /* channel 1 (read) */ \ - (*((volatile Word *) io_p2v (_RdDCSR1))) -#define DBSA1 /* DMA Buffer Start address reg. A */ \ - /* channel 1 */ \ - (*((volatile Address *) io_p2v (_DBSA1))) -#define DBTA1 /* DMA Buffer Transfer count */ \ - /* reg. A channel 1 */ \ - (*((volatile Word *) io_p2v (_DBTA1))) -#define DBSB1 /* DMA Buffer Start address reg. B */ \ - /* channel 1 */ \ - (*((volatile Address *) io_p2v (_DBSB1))) -#define DBTB1 /* DMA Buffer Transfer count */ \ - /* reg. B channel 1 */ \ - (*((volatile Word *) io_p2v (_DBTB1))) - -#define DDAR2 /* DMA Device Address Reg. */ \ - /* channel 2 */ \ - (*((volatile Word *) io_p2v (_DDAR2))) -#define SetDCSR2 /* Set DMA Control & Status Reg. */ \ - /* channel 2 (write) */ \ - (*((volatile Word *) io_p2v (_SetDCSR2))) -#define ClrDCSR2 /* Clear DMA Control & Status Reg. */ \ - /* channel 2 (write) */ \ - (*((volatile Word *) io_p2v (_ClrDCSR2))) -#define RdDCSR2 /* Read DMA Control & Status Reg. */ \ - /* channel 2 (read) */ \ - (*((volatile Word *) io_p2v (_RdDCSR2))) -#define DBSA2 /* DMA Buffer Start address reg. A */ \ - /* channel 2 */ \ - (*((volatile Address *) io_p2v (_DBSA2))) -#define DBTA2 /* DMA Buffer Transfer count */ \ - /* reg. A channel 2 */ \ - (*((volatile Word *) io_p2v (_DBTA2))) -#define DBSB2 /* DMA Buffer Start address reg. B */ \ - /* channel 2 */ \ - (*((volatile Address *) io_p2v (_DBSB2))) -#define DBTB2 /* DMA Buffer Transfer count */ \ - /* reg. B channel 2 */ \ - (*((volatile Word *) io_p2v (_DBTB2))) - -#define DDAR3 /* DMA Device Address Reg. */ \ - /* channel 3 */ \ - (*((volatile Word *) io_p2v (_DDAR3))) -#define SetDCSR3 /* Set DMA Control & Status Reg. */ \ - /* channel 3 (write) */ \ - (*((volatile Word *) io_p2v (_SetDCSR3))) -#define ClrDCSR3 /* Clear DMA Control & Status Reg. */ \ - /* channel 3 (write) */ \ - (*((volatile Word *) io_p2v (_ClrDCSR3))) -#define RdDCSR3 /* Read DMA Control & Status Reg. */ \ - /* channel 3 (read) */ \ - (*((volatile Word *) io_p2v (_RdDCSR3))) -#define DBSA3 /* DMA Buffer Start address reg. A */ \ - /* channel 3 */ \ - (*((volatile Address *) io_p2v (_DBSA3))) -#define DBTA3 /* DMA Buffer Transfer count */ \ - /* reg. A channel 3 */ \ - (*((volatile Word *) io_p2v (_DBTA3))) -#define DBSB3 /* DMA Buffer Start address reg. B */ \ - /* channel 3 */ \ - (*((volatile Address *) io_p2v (_DBSB3))) -#define DBTB3 /* DMA Buffer Transfer count */ \ - /* reg. B channel 3 */ \ - (*((volatile Word *) io_p2v (_DBTB3))) - -#define DDAR4 /* DMA Device Address Reg. */ \ - /* channel 4 */ \ - (*((volatile Word *) io_p2v (_DDAR4))) -#define SetDCSR4 /* Set DMA Control & Status Reg. */ \ - /* channel 4 (write) */ \ - (*((volatile Word *) io_p2v (_SetDCSR4))) -#define ClrDCSR4 /* Clear DMA Control & Status Reg. */ \ - /* channel 4 (write) */ \ - (*((volatile Word *) io_p2v (_ClrDCSR4))) -#define RdDCSR4 /* Read DMA Control & Status Reg. */ \ - /* channel 4 (read) */ \ - (*((volatile Word *) io_p2v (_RdDCSR4))) -#define DBSA4 /* DMA Buffer Start address reg. A */ \ - /* channel 4 */ \ - (*((volatile Address *) io_p2v (_DBSA4))) -#define DBTA4 /* DMA Buffer Transfer count */ \ - /* reg. A channel 4 */ \ - (*((volatile Word *) io_p2v (_DBTA4))) -#define DBSB4 /* DMA Buffer Start address reg. B */ \ - /* channel 4 */ \ - (*((volatile Address *) io_p2v (_DBSB4))) -#define DBTB4 /* DMA Buffer Transfer count */ \ - /* reg. B channel 4 */ \ - (*((volatile Word *) io_p2v (_DBTB4))) - -#define DDAR5 /* DMA Device Address Reg. */ \ - /* channel 5 */ \ - (*((volatile Word *) io_p2v (_DDAR5))) -#define SetDCSR5 /* Set DMA Control & Status Reg. */ \ - /* channel 5 (write) */ \ - (*((volatile Word *) io_p2v (_SetDCSR5))) -#define ClrDCSR5 /* Clear DMA Control & Status Reg. */ \ - /* channel 5 (write) */ \ - (*((volatile Word *) io_p2v (_ClrDCSR5))) -#define RdDCSR5 /* Read DMA Control & Status Reg. */ \ - /* channel 5 (read) */ \ - (*((volatile Word *) io_p2v (_RdDCSR5))) -#define DBSA5 /* DMA Buffer Start address reg. A */ \ - /* channel 5 */ \ - (*((volatile Address *) io_p2v (_DBSA5))) -#define DBTA5 /* DMA Buffer Transfer count */ \ - /* reg. A channel 5 */ \ - (*((volatile Word *) io_p2v (_DBTA5))) -#define DBSB5 /* DMA Buffer Start address reg. B */ \ - /* channel 5 */ \ - (*((volatile Address *) io_p2v (_DBSB5))) -#define DBTB5 /* DMA Buffer Transfer count */ \ - /* reg. B channel 5 */ \ - (*((volatile Word *) io_p2v (_DBTB5))) - -#endif /* LANGUAGE == C */ - -#define DDAR_RW 0x00000001 /* device data Read/Write */ -#define DDAR_DevWr (DDAR_RW*0) /* Device data Write */ - /* (memory -> device) */ -#define DDAR_DevRd (DDAR_RW*1) /* Device data Read */ - /* (device -> memory) */ -#define DDAR_E 0x00000002 /* big/little Endian device */ -#define DDAR_LtlEnd (DDAR_E*0) /* Little Endian device */ -#define DDAR_BigEnd (DDAR_E*1) /* Big Endian device */ -#define DDAR_BS 0x00000004 /* device Burst Size */ -#define DDAR_Brst4 (DDAR_BS*0) /* Burst-of-4 device */ -#define DDAR_Brst8 (DDAR_BS*1) /* Burst-of-8 device */ -#define DDAR_DW 0x00000008 /* device Data Width */ -#define DDAR_8BitDev (DDAR_DW*0) /* 8-Bit Device */ -#define DDAR_16BitDev (DDAR_DW*1) /* 16-Bit Device */ -#define DDAR_DS Fld (4, 4) /* Device Select */ -#define DDAR_Ser0UDCTr /* Ser. port 0 UDC Transmit */ \ - (0x0 << FShft (DDAR_DS)) -#define DDAR_Ser0UDCRc /* Ser. port 0 UDC Receive */ \ - (0x1 << FShft (DDAR_DS)) -#define DDAR_Ser1SDLCTr /* Ser. port 1 SDLC Transmit */ \ - (0x2 << FShft (DDAR_DS)) -#define DDAR_Ser1SDLCRc /* Ser. port 1 SDLC Receive */ \ - (0x3 << FShft (DDAR_DS)) -#define DDAR_Ser1UARTTr /* Ser. port 1 UART Transmit */ \ - (0x4 << FShft (DDAR_DS)) -#define DDAR_Ser1UARTRc /* Ser. port 1 UART Receive */ \ - (0x5 << FShft (DDAR_DS)) -#define DDAR_Ser2ICPTr /* Ser. port 2 ICP Transmit */ \ - (0x6 << FShft (DDAR_DS)) -#define DDAR_Ser2ICPRc /* Ser. port 2 ICP Receive */ \ - (0x7 << FShft (DDAR_DS)) -#define DDAR_Ser3UARTTr /* Ser. port 3 UART Transmit */ \ - (0x8 << FShft (DDAR_DS)) -#define DDAR_Ser3UARTRc /* Ser. port 3 UART Receive */ \ - (0x9 << FShft (DDAR_DS)) -#define DDAR_Ser4MCP0Tr /* Ser. port 4 MCP 0 Transmit */ \ - /* (audio) */ \ - (0xA << FShft (DDAR_DS)) -#define DDAR_Ser4MCP0Rc /* Ser. port 4 MCP 0 Receive */ \ - /* (audio) */ \ - (0xB << FShft (DDAR_DS)) -#define DDAR_Ser4MCP1Tr /* Ser. port 4 MCP 1 Transmit */ \ - /* (telecom) */ \ - (0xC << FShft (DDAR_DS)) -#define DDAR_Ser4MCP1Rc /* Ser. port 4 MCP 1 Receive */ \ - /* (telecom) */ \ - (0xD << FShft (DDAR_DS)) -#define DDAR_Ser4SSPTr /* Ser. port 4 SSP Transmit */ \ - (0xE << FShft (DDAR_DS)) -#define DDAR_Ser4SSPRc /* Ser. port 4 SSP Receive */ \ - (0xF << FShft (DDAR_DS)) -#define DDAR_DA Fld (24, 8) /* Device Address */ -#define DDAR_DevAdd(Add) /* Device Address */ \ - (((Add) & 0xF0000000) | \ - (((Add) & 0X003FFFFC) << (FShft (DDAR_DA) - 2))) -#define DDAR_Ser0UDCWr /* Ser. port 0 UDC Write */ \ - (DDAR_DevWr + DDAR_Brst8 + DDAR_8BitDev + \ - DDAR_Ser0UDCTr + DDAR_DevAdd (_Ser0UDCDR)) -#define DDAR_Ser0UDCRd /* Ser. port 0 UDC Read */ \ - (DDAR_DevRd + DDAR_Brst8 + DDAR_8BitDev + \ - DDAR_Ser0UDCRc + DDAR_DevAdd (_Ser0UDCDR)) -#define DDAR_Ser1UARTWr /* Ser. port 1 UART Write */ \ - (DDAR_DevWr + DDAR_Brst4 + DDAR_8BitDev + \ - DDAR_Ser1UARTTr + DDAR_DevAdd (_Ser1UTDR)) -#define DDAR_Ser1UARTRd /* Ser. port 1 UART Read */ \ - (DDAR_DevRd + DDAR_Brst4 + DDAR_8BitDev + \ - DDAR_Ser1UARTRc + DDAR_DevAdd (_Ser1UTDR)) -#define DDAR_Ser1SDLCWr /* Ser. port 1 SDLC Write */ \ - (DDAR_DevWr + DDAR_Brst4 + DDAR_8BitDev + \ - DDAR_Ser1SDLCTr + DDAR_DevAdd (_Ser1SDDR)) -#define DDAR_Ser1SDLCRd /* Ser. port 1 SDLC Read */ \ - (DDAR_DevRd + DDAR_Brst4 + DDAR_8BitDev + \ - DDAR_Ser1SDLCRc + DDAR_DevAdd (_Ser1SDDR)) -#define DDAR_Ser2UARTWr /* Ser. port 2 UART Write */ \ - (DDAR_DevWr + DDAR_Brst4 + DDAR_8BitDev + \ - DDAR_Ser2ICPTr + DDAR_DevAdd (_Ser2UTDR)) -#define DDAR_Ser2UARTRd /* Ser. port 2 UART Read */ \ - (DDAR_DevRd + DDAR_Brst4 + DDAR_8BitDev + \ - DDAR_Ser2ICPRc + DDAR_DevAdd (_Ser2UTDR)) -#define DDAR_Ser2HSSPWr /* Ser. port 2 HSSP Write */ \ - (DDAR_DevWr + DDAR_Brst8 + DDAR_8BitDev + \ - DDAR_Ser2ICPTr + DDAR_DevAdd (_Ser2HSDR)) -#define DDAR_Ser2HSSPRd /* Ser. port 2 HSSP Read */ \ - (DDAR_DevRd + DDAR_Brst8 + DDAR_8BitDev + \ - DDAR_Ser2ICPRc + DDAR_DevAdd (_Ser2HSDR)) -#define DDAR_Ser3UARTWr /* Ser. port 3 UART Write */ \ - (DDAR_DevWr + DDAR_Brst4 + DDAR_8BitDev + \ - DDAR_Ser3UARTTr + DDAR_DevAdd (_Ser3UTDR)) -#define DDAR_Ser3UARTRd /* Ser. port 3 UART Read */ \ - (DDAR_DevRd + DDAR_Brst4 + DDAR_8BitDev + \ - DDAR_Ser3UARTRc + DDAR_DevAdd (_Ser3UTDR)) -#define DDAR_Ser4MCP0Wr /* Ser. port 4 MCP 0 Write (audio) */ \ - (DDAR_DevWr + DDAR_Brst4 + DDAR_16BitDev + \ - DDAR_Ser4MCP0Tr + DDAR_DevAdd (_Ser4MCDR0)) -#define DDAR_Ser4MCP0Rd /* Ser. port 4 MCP 0 Read (audio) */ \ - (DDAR_DevRd + DDAR_Brst4 + DDAR_16BitDev + \ - DDAR_Ser4MCP0Rc + DDAR_DevAdd (_Ser4MCDR0)) -#define DDAR_Ser4MCP1Wr /* Ser. port 4 MCP 1 Write */ \ - /* (telecom) */ \ - (DDAR_DevWr + DDAR_Brst4 + DDAR_16BitDev + \ - DDAR_Ser4MCP1Tr + DDAR_DevAdd (_Ser4MCDR1)) -#define DDAR_Ser4MCP1Rd /* Ser. port 4 MCP 1 Read */ \ - /* (telecom) */ \ - (DDAR_DevRd + DDAR_Brst4 + DDAR_16BitDev + \ - DDAR_Ser4MCP1Rc + DDAR_DevAdd (_Ser4MCDR1)) -#define DDAR_Ser4SSPWr /* Ser. port 4 SSP Write (16 bits) */ \ - (DDAR_DevWr + DDAR_Brst4 + DDAR_16BitDev + \ - DDAR_Ser4SSPTr + DDAR_DevAdd (_Ser4SSDR)) -#define DDAR_Ser4SSPRd /* Ser. port 4 SSP Read (16 bits) */ \ - (DDAR_DevRd + DDAR_Brst4 + DDAR_16BitDev + \ - DDAR_Ser4SSPRc + DDAR_DevAdd (_Ser4SSDR)) - -#define DCSR_RUN 0x00000001 /* DMA RUNing */ -#define DCSR_IE 0x00000002 /* DMA Interrupt Enable */ -#define DCSR_ERROR 0x00000004 /* DMA ERROR */ -#define DCSR_DONEA 0x00000008 /* DONE DMA transfer buffer A */ -#define DCSR_STRTA 0x00000010 /* STaRTed DMA transfer buffer A */ -#define DCSR_DONEB 0x00000020 /* DONE DMA transfer buffer B */ -#define DCSR_STRTB 0x00000040 /* STaRTed DMA transfer buffer B */ -#define DCSR_BIU 0x00000080 /* DMA Buffer In Use */ -#define DCSR_BufA (DCSR_BIU*0) /* DMA Buffer A in use */ -#define DCSR_BufB (DCSR_BIU*1) /* DMA Buffer B in use */ - -#define DBT_TC Fld (13, 0) /* Transfer Count */ -#define DBTA_TCA DBT_TC /* Transfer Count buffer A */ -#define DBTB_TCB DBT_TC /* Transfer Count buffer B */ - - -/* - * Liquid Crystal Display (LCD) control registers - * - * Registers - * LCCR0 Liquid Crystal Display (LCD) Control Register 0 - * (read/write). - * [Bits LDM, BAM, and ERM are only implemented in - * versions 2.0 (rev. = 8) and higher of the StrongARM - * SA-1100.] - * LCSR Liquid Crystal Display (LCD) Status Register - * (read/write). - * [Bit LDD can be only read in versions 1.0 (rev. = 1) - * and 1.1 (rev. = 2) of the StrongARM SA-1100, it can be - * read and written (cleared) in versions 2.0 (rev. = 8) - * and higher.] - * DBAR1 Liquid Crystal Display (LCD) Direct Memory Access - * (DMA) Base Address Register channel 1 (read/write). - * DCAR1 Liquid Crystal Display (LCD) Direct Memory Access - * (DMA) Current Address Register channel 1 (read). - * DBAR2 Liquid Crystal Display (LCD) Direct Memory Access - * (DMA) Base Address Register channel 2 (read/write). - * DCAR2 Liquid Crystal Display (LCD) Direct Memory Access - * (DMA) Current Address Register channel 2 (read). - * LCCR1 Liquid Crystal Display (LCD) Control Register 1 - * (read/write). - * [The LCCR1 register can be only written in - * versions 1.0 (rev. = 1) and 1.1 (rev. = 2) of the - * StrongARM SA-1100, it can be written and read in - * versions 2.0 (rev. = 8) and higher.] - * LCCR2 Liquid Crystal Display (LCD) Control Register 2 - * (read/write). - * [The LCCR1 register can be only written in - * versions 1.0 (rev. = 1) and 1.1 (rev. = 2) of the - * StrongARM SA-1100, it can be written and read in - * versions 2.0 (rev. = 8) and higher.] - * LCCR3 Liquid Crystal Display (LCD) Control Register 3 - * (read/write). - * [The LCCR1 register can be only written in - * versions 1.0 (rev. = 1) and 1.1 (rev. = 2) of the - * StrongARM SA-1100, it can be written and read in - * versions 2.0 (rev. = 8) and higher. Bit PCP is only - * implemented in versions 2.0 (rev. = 8) and higher of - * the StrongARM SA-1100.] - * - * Clocks - * fcpu, Tcpu Frequency, period of the CPU core clock (CCLK). - * fmem, Tmem Frequency, period of the memory clock (fmem = fcpu/2). - * fpix, Tpix Frequency, period of the pixel clock. - * fln, Tln Frequency, period of the line clock. - * fac, Tac Frequency, period of the AC bias clock. - */ - -#define LCD_PEntrySp 2 /* LCD Palette Entry Space [byte] */ -#define LCD_4BitPSp /* LCD 4-Bit pixel Palette Space */ \ - /* [byte] */ \ - (16*LCD_PEntrySp) -#define LCD_8BitPSp /* LCD 8-Bit pixel Palette Space */ \ - /* [byte] */ \ - (256*LCD_PEntrySp) -#define LCD_12_16BitPSp /* LCD 12/16-Bit pixel */ \ - /* dummy-Palette Space [byte] */ \ - (16*LCD_PEntrySp) - -#define LCD_PGrey Fld (4, 0) /* LCD Palette entry Grey value */ -#define LCD_PBlue Fld (4, 0) /* LCD Palette entry Blue value */ -#define LCD_PGreen Fld (4, 4) /* LCD Palette entry Green value */ -#define LCD_PRed Fld (4, 8) /* LCD Palette entry Red value */ -#define LCD_PBS Fld (2, 12) /* LCD Pixel Bit Size */ -#define LCD_4Bit /* LCD 4-Bit pixel mode */ \ - (0 << FShft (LCD_PBS)) -#define LCD_8Bit /* LCD 8-Bit pixel mode */ \ - (1 << FShft (LCD_PBS)) -#define LCD_12_16Bit /* LCD 12/16-Bit pixel mode */ \ - (2 << FShft (LCD_PBS)) - -#define LCD_Int0_0 0x0 /* LCD Intensity = 0.0% = 0 */ -#define LCD_Int11_1 0x1 /* LCD Intensity = 11.1% = 1/9 */ -#define LCD_Int20_0 0x2 /* LCD Intensity = 20.0% = 1/5 */ -#define LCD_Int26_7 0x3 /* LCD Intensity = 26.7% = 4/15 */ -#define LCD_Int33_3 0x4 /* LCD Intensity = 33.3% = 3/9 */ -#define LCD_Int40_0 0x5 /* LCD Intensity = 40.0% = 2/5 */ -#define LCD_Int44_4 0x6 /* LCD Intensity = 44.4% = 4/9 */ -#define LCD_Int50_0 0x7 /* LCD Intensity = 50.0% = 1/2 */ -#define LCD_Int55_6 0x8 /* LCD Intensity = 55.6% = 5/9 */ -#define LCD_Int60_0 0x9 /* LCD Intensity = 60.0% = 3/5 */ -#define LCD_Int66_7 0xA /* LCD Intensity = 66.7% = 6/9 */ -#define LCD_Int73_3 0xB /* LCD Intensity = 73.3% = 11/15 */ -#define LCD_Int80_0 0xC /* LCD Intensity = 80.0% = 4/5 */ -#define LCD_Int88_9 0xD /* LCD Intensity = 88.9% = 8/9 */ -#define LCD_Int100_0 0xE /* LCD Intensity = 100.0% = 1 */ -#define LCD_Int100_0A 0xF /* LCD Intensity = 100.0% = 1 */ - /* (Alternative) */ - -#define _LCCR0 0xB0100000 /* LCD Control Reg. 0 */ -#define _LCSR 0xB0100004 /* LCD Status Reg. */ -#define _DBAR1 0xB0100010 /* LCD DMA Base Address Reg. */ - /* channel 1 */ -#define _DCAR1 0xB0100014 /* LCD DMA Current Address Reg. */ - /* channel 1 */ -#define _DBAR2 0xB0100018 /* LCD DMA Base Address Reg. */ - /* channel 2 */ -#define _DCAR2 0xB010001C /* LCD DMA Current Address Reg. */ - /* channel 2 */ -#define _LCCR1 0xB0100020 /* LCD Control Reg. 1 */ -#define _LCCR2 0xB0100024 /* LCD Control Reg. 2 */ -#define _LCCR3 0xB0100028 /* LCD Control Reg. 3 */ - -#if LANGUAGE == C -#define LCCR0 /* LCD Control Reg. 0 */ \ - (*((volatile Word *) io_p2v (_LCCR0))) -#define LCSR /* LCD Status Reg. */ \ - (*((volatile Word *) io_p2v (_LCSR))) -#define DBAR1 /* LCD DMA Base Address Reg. */ \ - /* channel 1 */ \ - (*((volatile Address *) io_p2v (_DBAR1))) -#define DCAR1 /* LCD DMA Current Address Reg. */ \ - /* channel 1 */ \ - (*((volatile Address *) io_p2v (_DCAR1))) -#define DBAR2 /* LCD DMA Base Address Reg. */ \ - /* channel 2 */ \ - (*((volatile Address *) io_p2v (_DBAR2))) -#define DCAR2 /* LCD DMA Current Address Reg. */ \ - /* channel 2 */ \ - (*((volatile Address *) io_p2v (_DCAR2))) -#define LCCR1 /* LCD Control Reg. 1 */ \ - (*((volatile Word *) io_p2v (_LCCR1))) -#define LCCR2 /* LCD Control Reg. 2 */ \ - (*((volatile Word *) io_p2v (_LCCR2))) -#define LCCR3 /* LCD Control Reg. 3 */ \ - (*((volatile Word *) io_p2v (_LCCR3))) -#endif /* LANGUAGE == C */ - -#define LCCR0_LEN 0x00000001 /* LCD ENable */ -#define LCCR0_CMS 0x00000002 /* Color/Monochrome display Select */ -#define LCCR0_Color (LCCR0_CMS*0) /* Color display */ -#define LCCR0_Mono (LCCR0_CMS*1) /* Monochrome display */ -#define LCCR0_SDS 0x00000004 /* Single/Dual panel display */ - /* Select */ -#define LCCR0_Sngl (LCCR0_SDS*0) /* Single panel display */ -#define LCCR0_Dual (LCCR0_SDS*1) /* Dual panel display */ -#define LCCR0_LDM 0x00000008 /* LCD Disable done (LDD) */ - /* interrupt Mask (disable) */ -#define LCCR0_BAM 0x00000010 /* Base Address update (BAU) */ - /* interrupt Mask (disable) */ -#define LCCR0_ERM 0x00000020 /* LCD ERror (BER, IOL, IUL, IOU, */ - /* IUU, OOL, OUL, OOU, and OUU) */ - /* interrupt Mask (disable) */ -#define LCCR0_PAS 0x00000080 /* Passive/Active display Select */ -#define LCCR0_Pas (LCCR0_PAS*0) /* Passive display (STN) */ -#define LCCR0_Act (LCCR0_PAS*1) /* Active display (TFT) */ -#define LCCR0_BLE 0x00000100 /* Big/Little Endian select */ -#define LCCR0_LtlEnd (LCCR0_BLE*0) /* Little Endian frame buffer */ -#define LCCR0_BigEnd (LCCR0_BLE*1) /* Big Endian frame buffer */ -#define LCCR0_DPD 0x00000200 /* Double Pixel Data (monochrome */ - /* display mode) */ -#define LCCR0_4PixMono (LCCR0_DPD*0) /* 4-Pixel/clock Monochrome */ - /* display */ -#define LCCR0_8PixMono (LCCR0_DPD*1) /* 8-Pixel/clock Monochrome */ - /* display */ -#define LCCR0_PDD Fld (8, 12) /* Palette DMA request Delay */ - /* [Tmem] */ -#define LCCR0_DMADel(Tcpu) /* palette DMA request Delay */ \ - /* [0..510 Tcpu] */ \ - ((Tcpu)/2 << FShft (LCCR0_PDD)) - -#define LCSR_LDD 0x00000001 /* LCD Disable Done */ -#define LCSR_BAU 0x00000002 /* Base Address Update (read) */ -#define LCSR_BER 0x00000004 /* Bus ERror */ -#define LCSR_ABC 0x00000008 /* AC Bias clock Count */ -#define LCSR_IOL 0x00000010 /* Input FIFO Over-run Lower */ - /* panel */ -#define LCSR_IUL 0x00000020 /* Input FIFO Under-run Lower */ - /* panel */ -#define LCSR_IOU 0x00000040 /* Input FIFO Over-run Upper */ - /* panel */ -#define LCSR_IUU 0x00000080 /* Input FIFO Under-run Upper */ - /* panel */ -#define LCSR_OOL 0x00000100 /* Output FIFO Over-run Lower */ - /* panel */ -#define LCSR_OUL 0x00000200 /* Output FIFO Under-run Lower */ - /* panel */ -#define LCSR_OOU 0x00000400 /* Output FIFO Over-run Upper */ - /* panel */ -#define LCSR_OUU 0x00000800 /* Output FIFO Under-run Upper */ - /* panel */ - -#define LCCR1_PPL Fld (6, 4) /* Pixels Per Line/16 - 1 */ -#define LCCR1_DisWdth(Pixel) /* Display Width [16..1024 pix.] */ \ - (((Pixel) - 16)/16 << FShft (LCCR1_PPL)) -#define LCCR1_HSW Fld (6, 10) /* Horizontal Synchronization */ - /* pulse Width - 2 [Tpix] (L_LCLK) */ -#define LCCR1_HorSnchWdth(Tpix) /* Horizontal Synchronization */ \ - /* pulse Width [2..65 Tpix] */ \ - (((Tpix) - 2) << FShft (LCCR1_HSW)) -#define LCCR1_ELW Fld (8, 16) /* End-of-Line pixel clock Wait */ - /* count - 1 [Tpix] */ -#define LCCR1_EndLnDel(Tpix) /* End-of-Line Delay */ \ - /* [1..256 Tpix] */ \ - (((Tpix) - 1) << FShft (LCCR1_ELW)) -#define LCCR1_BLW Fld (8, 24) /* Beginning-of-Line pixel clock */ - /* Wait count - 1 [Tpix] */ -#define LCCR1_BegLnDel(Tpix) /* Beginning-of-Line Delay */ \ - /* [1..256 Tpix] */ \ - (((Tpix) - 1) << FShft (LCCR1_BLW)) - -#define LCCR2_LPP Fld (10, 0) /* Line Per Panel - 1 */ -#define LCCR2_DisHght(Line) /* Display Height [1..1024 lines] */ \ - (((Line) - 1) << FShft (LCCR2_LPP)) -#define LCCR2_VSW Fld (6, 10) /* Vertical Synchronization pulse */ - /* Width - 1 [Tln] (L_FCLK) */ -#define LCCR2_VrtSnchWdth(Tln) /* Vertical Synchronization pulse */ \ - /* Width [1..64 Tln] */ \ - (((Tln) - 1) << FShft (LCCR2_VSW)) -#define LCCR2_EFW Fld (8, 16) /* End-of-Frame line clock Wait */ - /* count [Tln] */ -#define LCCR2_EndFrmDel(Tln) /* End-of-Frame Delay */ \ - /* [0..255 Tln] */ \ - ((Tln) << FShft (LCCR2_EFW)) -#define LCCR2_BFW Fld (8, 24) /* Beginning-of-Frame line clock */ - /* Wait count [Tln] */ -#define LCCR2_BegFrmDel(Tln) /* Beginning-of-Frame Delay */ \ - /* [0..255 Tln] */ \ - ((Tln) << FShft (LCCR2_BFW)) - -#define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor/2 - 2 */ - /* [1..255] (L_PCLK) */ - /* fpix = fcpu/(2*(PCD + 2)) */ - /* Tpix = 2*(PCD + 2)*Tcpu */ -#define LCCR3_PixClkDiv(Div) /* Pixel Clock Divisor [6..514] */ \ - (((Div) - 4)/2 << FShft (LCCR3_PCD)) - /* fpix = fcpu/(2*Floor (Div/2)) */ - /* Tpix = 2*Floor (Div/2)*Tcpu */ -#define LCCR3_CeilPixClkDiv(Div) /* Ceil. of PixClkDiv [6..514] */ \ - (((Div) - 3)/2 << FShft (LCCR3_PCD)) - /* fpix = fcpu/(2*Ceil (Div/2)) */ - /* Tpix = 2*Ceil (Div/2)*Tcpu */ -#define LCCR3_ACB Fld (8, 8) /* AC Bias clock half period - 1 */ - /* [Tln] (L_BIAS) */ -#define LCCR3_ACBsDiv(Div) /* AC Bias clock Divisor [2..512] */ \ - (((Div) - 2)/2 << FShft (LCCR3_ACB)) - /* fac = fln/(2*Floor (Div/2)) */ - /* Tac = 2*Floor (Div/2)*Tln */ -#define LCCR3_CeilACBsDiv(Div) /* Ceil. of ACBsDiv [2..512] */ \ - (((Div) - 1)/2 << FShft (LCCR3_ACB)) - /* fac = fln/(2*Ceil (Div/2)) */ - /* Tac = 2*Ceil (Div/2)*Tln */ -#define LCCR3_API Fld (4, 16) /* AC bias Pin transitions per */ - /* Interrupt */ -#define LCCR3_ACBsCntOff /* AC Bias clock transition Count */ \ - /* Off */ \ - (0 << FShft (LCCR3_API)) -#define LCCR3_ACBsCnt(Trans) /* AC Bias clock transition Count */ \ - /* [1..15] */ \ - ((Trans) << FShft (LCCR3_API)) -#define LCCR3_VSP 0x00100000 /* Vertical Synchronization pulse */ - /* Polarity (L_FCLK) */ -#define LCCR3_VrtSnchH (LCCR3_VSP*0) /* Vertical Synchronization pulse */ - /* active High */ -#define LCCR3_VrtSnchL (LCCR3_VSP*1) /* Vertical Synchronization pulse */ - /* active Low */ -#define LCCR3_HSP 0x00200000 /* Horizontal Synchronization */ - /* pulse Polarity (L_LCLK) */ -#define LCCR3_HorSnchH (LCCR3_HSP*0) /* Horizontal Synchronization */ - /* pulse active High */ -#define LCCR3_HorSnchL (LCCR3_HSP*1) /* Horizontal Synchronization */ - /* pulse active Low */ -#define LCCR3_PCP 0x00400000 /* Pixel Clock Polarity (L_PCLK) */ -#define LCCR3_PixRsEdg (LCCR3_PCP*0) /* Pixel clock Rising-Edge */ -#define LCCR3_PixFlEdg (LCCR3_PCP*1) /* Pixel clock Falling-Edge */ -#define LCCR3_OEP 0x00800000 /* Output Enable Polarity (L_BIAS, */ - /* active display mode) */ -#define LCCR3_OutEnH (LCCR3_OEP*0) /* Output Enable active High */ -#define LCCR3_OutEnL (LCCR3_OEP*1) /* Output Enable active Low */ - - -#undef C -#undef Assembly -- GitLab From edcbd6e38899589b8d03d1f1f8ebc01beb3b574b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 27 Jun 2022 13:35:48 -0400 Subject: [PATCH 578/581] omap3: emif4: More clearly hard-code cs0 size We have a single platform that is both in the OMAP3 family of parts, but has an EMIF4 memory controller. Currently we hard-code the size of chip select 0. Make this more clear by putting the value in the function rather than a CONFIG option. Signed-off-by: Tom Rini --- arch/arm/mach-omap2/omap3/emif4.c | 2 +- include/configs/am3517_evm.h | 3 --- 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/arch/arm/mach-omap2/omap3/emif4.c b/arch/arm/mach-omap2/omap3/emif4.c index d7d779819bf..491e7c23dbc 100644 --- a/arch/arm/mach-omap2/omap3/emif4.c +++ b/arch/arm/mach-omap2/omap3/emif4.c @@ -41,7 +41,7 @@ static u32 get_sdr_cs_size(u32 cs) /* TODO: Calculate the size based on EMIF4 configuration */ if (cs == CS0) - size = CONFIG_SYS_CS0_SIZE; + size = 256 * 1024 * 1024; return size; } diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index e6c9039d166..93beed4ad73 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -85,9 +85,6 @@ /* memtest works on */ -/* Physical Memory Map */ -#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) - /* FLASH and environment organization */ /* **** PISMO SUPPORT *** */ -- GitLab From ba39d90728ee9a51861dc4803e9a41925d52ad55 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 27 Jun 2022 13:35:49 -0400 Subject: [PATCH 579/581] legoev3: Migrate to DM_I2C Perform a basic migration of the calls in setup_serial_number() to DM so that we can switch to using DM_I2C on this platform. Cc: David Lechner Signed-off-by: Tom Rini Acked-by: David Lechner --- board/lego/ev3/legoev3.c | 15 +++++++++++++-- configs/legoev3_defconfig | 2 +- 2 files changed, 14 insertions(+), 3 deletions(-) diff --git a/board/lego/ev3/legoev3.c b/board/lego/ev3/legoev3.c index 980ffef4cdf..83492601310 100644 --- a/board/lego/ev3/legoev3.c +++ b/board/lego/ev3/legoev3.c @@ -27,6 +27,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -57,6 +58,8 @@ const int lpsc_size = ARRAY_SIZE(lpsc); */ static void setup_serial_number(void) { + struct udevice *idev, *ibus; + int ret; u32 offset; char serial_number[13]; u8 buf[6]; @@ -65,7 +68,15 @@ static void setup_serial_number(void) if (env_get("serial#")) return; - if (i2c_read(EEPROM_I2C_ADDR, EEPROM_REV_OFFSET, 2, buf, 2)) { + ret = uclass_get_device_by_seq(UCLASS_I2C, 0, &ibus); + if (ret) + return; + + ret = dm_i2c_probe(ibus, EEPROM_I2C_ADDR, 0, &idev); + if (ret) + return; + + if (dm_i2c_read(idev, EEPROM_REV_OFFSET, buf, 2)) { printf("\nEEPROM revision read failed!\n"); return; } @@ -83,7 +94,7 @@ static void setup_serial_number(void) /* EEPROM rev 3 has Bluetooth address where rev should be */ offset = (eeprom_rev == 3) ? EEPROM_REV_OFFSET : EEPROM_BDADDR_OFFSET; - if (i2c_read(EEPROM_I2C_ADDR, offset, 2, buf, 6)) { + if (dm_i2c_read(idev, offset, buf, 6)) { printf("\nEEPROM serial read failed!\n"); return; } diff --git a/configs/legoev3_defconfig b/configs/legoev3_defconfig index 3612afb463c..36e3d706923 100644 --- a/configs/legoev3_defconfig +++ b/configs/legoev3_defconfig @@ -46,7 +46,7 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_NET is not set CONFIG_DM=y # CONFIG_DM_DEVICE_REMOVE is not set -CONFIG_SYS_I2C_LEGACY=y +CONFIG_DM_I2C=y CONFIG_SYS_I2C_DAVINCI=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y -- GitLab From cb42c1f9b168d0e561855870b11e5c02f70e2d0a Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 27 Jun 2022 13:35:50 -0400 Subject: [PATCH 580/581] i2c: Remove non-DM_I2C support from davinci_i2c.c As the migration deadline has passed, and all platforms have been migrated, remove the non-DM code here. Signed-off-by: Tom Rini --- arch/arm/mach-keystone/ddr3_spd.c | 13 ---- drivers/i2c/Kconfig | 4 +- drivers/i2c/davinci_i2c.c | 97 ---------------------------- include/configs/legoev3.h | 6 -- include/configs/omapl138_lcdk.h | 2 - include/configs/ti_armv7_keystone2.h | 8 --- 6 files changed, 2 insertions(+), 128 deletions(-) diff --git a/arch/arm/mach-keystone/ddr3_spd.c b/arch/arm/mach-keystone/ddr3_spd.c index c4a1908af8d..6f7f8ab7b40 100644 --- a/arch/arm/mach-keystone/ddr3_spd.c +++ b/arch/arm/mach-keystone/ddr3_spd.c @@ -404,24 +404,11 @@ static void init_ddr3param(struct ddr3_spd_cb *spd_cb, static int ddr3_read_spd(ddr3_spd_eeprom_t *spd_params) { int ret; -#if !CONFIG_IS_ENABLED(DM_I2C) - int old_bus; - - i2c_init(CONFIG_SYS_DAVINCI_I2C_SPEED, CONFIG_SYS_DAVINCI_I2C_SLAVE); - - old_bus = i2c_get_bus_num(); - i2c_set_bus_num(1); - - ret = i2c_read(0x53, 0, 1, (unsigned char *)spd_params, 256); - - i2c_set_bus_num(old_bus); -#else struct udevice *dev; ret = i2c_get_chip_for_busnum(1, 0x53, 1, &dev); if (!ret) ret = dm_i2c_read(dev, 0, (unsigned char *)spd_params, 256); -#endif if (ret) { printf("Cannot read DIMM params\n"); return 1; diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index d25c5736ef0..72d06e4972b 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -687,9 +687,9 @@ config SYS_I2C_SPEED config SYS_I2C_BUS_MAX int "Max I2C busses" - depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_SOCFPGA + depends on ARCH_OMAP2PLUS || ARCH_SOCFPGA default 2 if TI816X - default 3 if OMAP34XX || AM33XX || AM43XX || ARCH_KEYSTONE + default 3 if OMAP34XX || AM33XX || AM43XX default 4 if ARCH_SOCFPGA || OMAP44XX || TI814X default 5 if OMAP54XX help diff --git a/drivers/i2c/davinci_i2c.c b/drivers/i2c/davinci_i2c.c index a4abd25c398..ae177227dea 100644 --- a/drivers/i2c/davinci_i2c.c +++ b/drivers/i2c/davinci_i2c.c @@ -21,14 +21,12 @@ #include #include "davinci_i2c.h" -#if CONFIG_IS_ENABLED(DM_I2C) /* Information about i2c controller */ struct i2c_bus { int id; uint speed; struct i2c_regs *regs; }; -#endif #define CHECK_NACK() \ do {\ @@ -340,99 +338,6 @@ static int _davinci_i2c_probe_chip(struct i2c_regs *i2c_base, uint8_t chip) return rc; } -#if !CONFIG_IS_ENABLED(DM_I2C) -static struct i2c_regs *davinci_get_base(struct i2c_adapter *adap) -{ - switch (adap->hwadapnr) { -#if CONFIG_SYS_I2C_BUS_MAX >= 3 - case 2: - return (struct i2c_regs *)I2C2_BASE; -#endif -#if CONFIG_SYS_I2C_BUS_MAX >= 2 - case 1: - return (struct i2c_regs *)I2C1_BASE; -#endif - case 0: - return (struct i2c_regs *)I2C_BASE; - - default: - printf("wrong hwadapnr: %d\n", adap->hwadapnr); - } - - return NULL; -} - -static uint davinci_i2c_setspeed(struct i2c_adapter *adap, uint speed) -{ - struct i2c_regs *i2c_base = davinci_get_base(adap); - uint ret; - - adap->speed = speed; - ret = _davinci_i2c_setspeed(i2c_base, speed); - - return ret; -} - -static void davinci_i2c_init(struct i2c_adapter *adap, int speed, - int slaveadd) -{ - struct i2c_regs *i2c_base = davinci_get_base(adap); - - adap->speed = speed; - _davinci_i2c_init(i2c_base, speed, slaveadd); - - return; -} - -static int davinci_i2c_read(struct i2c_adapter *adap, uint8_t chip, - uint32_t addr, int alen, uint8_t *buf, int len) -{ - struct i2c_regs *i2c_base = davinci_get_base(adap); - return _davinci_i2c_read(i2c_base, chip, addr, alen, buf, len); -} - -static int davinci_i2c_write(struct i2c_adapter *adap, uint8_t chip, - uint32_t addr, int alen, uint8_t *buf, int len) -{ - struct i2c_regs *i2c_base = davinci_get_base(adap); - - return _davinci_i2c_write(i2c_base, chip, addr, alen, buf, len); -} - -static int davinci_i2c_probe_chip(struct i2c_adapter *adap, uint8_t chip) -{ - struct i2c_regs *i2c_base = davinci_get_base(adap); - - return _davinci_i2c_probe_chip(i2c_base, chip); -} - -U_BOOT_I2C_ADAP_COMPLETE(davinci_0, davinci_i2c_init, davinci_i2c_probe_chip, - davinci_i2c_read, davinci_i2c_write, - davinci_i2c_setspeed, - CONFIG_SYS_DAVINCI_I2C_SPEED, - CONFIG_SYS_DAVINCI_I2C_SLAVE, - 0) - -#if CONFIG_SYS_I2C_BUS_MAX >= 2 -U_BOOT_I2C_ADAP_COMPLETE(davinci_1, davinci_i2c_init, davinci_i2c_probe_chip, - davinci_i2c_read, davinci_i2c_write, - davinci_i2c_setspeed, - CONFIG_SYS_DAVINCI_I2C_SPEED1, - CONFIG_SYS_DAVINCI_I2C_SLAVE1, - 1) -#endif - -#if CONFIG_SYS_I2C_BUS_MAX >= 3 -U_BOOT_I2C_ADAP_COMPLETE(davinci_2, davinci_i2c_init, davinci_i2c_probe_chip, - davinci_i2c_read, davinci_i2c_write, - davinci_i2c_setspeed, - CONFIG_SYS_DAVINCI_I2C_SPEED2, - CONFIG_SYS_DAVINCI_I2C_SLAVE2, - 2) -#endif - -#else /* CONFIG_DM_I2C */ - static int davinci_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs) { @@ -507,5 +412,3 @@ U_BOOT_DRIVER(i2c_davinci) = { .priv_auto = sizeof(struct i2c_bus), .ops = &davinci_i2c_ops, }; - -#endif /* CONFIG_DM_I2C */ diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index 418b08e7335..f0ae9248af3 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -41,12 +41,6 @@ #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI0_CLKID) -/* - * I2C Configuration - */ -#define CONFIG_SYS_DAVINCI_I2C_SPEED 400000 -#define CONFIG_SYS_DAVINCI_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ - /* * U-Boot general configuration */ diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index c9f5004117f..c644768ae7d 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -99,8 +99,6 @@ /* * I2C Configuration */ -#define CONFIG_SYS_DAVINCI_I2C_SPEED 25000 -#define CONFIG_SYS_DAVINCI_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ #define CONFIG_SYS_I2C_EXPANDER_ADDR 0x20 /* diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index bf76afaeded..29a6038f898 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -59,14 +59,6 @@ #define CONFIG_KSNET_SERDES_SGMII2_BASE KS2_SGMII_SERDES2_BASE #define CONFIG_KSNET_SERDES_LANES_PER_SGMII KS2_LANES_PER_SGMII_SERDES -/* I2C Configuration */ -#define CONFIG_SYS_DAVINCI_I2C_SPEED 100000 -#define CONFIG_SYS_DAVINCI_I2C_SLAVE 0x10 /* SMBus host address */ -#define CONFIG_SYS_DAVINCI_I2C_SPEED1 100000 -#define CONFIG_SYS_DAVINCI_I2C_SLAVE1 0x10 /* SMBus host address */ -#define CONFIG_SYS_DAVINCI_I2C_SPEED2 100000 -#define CONFIG_SYS_DAVINCI_I2C_SLAVE2 0x10 /* SMBus host address */ - /* EEPROM definitions */ /* NAND Configuration */ -- GitLab From 07ef80cd9d735d7e2ee9c07bcc74e3786107e780 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 27 Jun 2022 13:35:51 -0400 Subject: [PATCH 581/581] powerpc: Use the poison value of 0xdeadbeef directly in DDR init On p1_p2_rdb_pc platforms, we set ddr_data_init to the "poison" value of 0xdeadbeef rather than a real calculated / derived value. Do this directly and comment rather than via CONFIG. Signed-off-by: Tom Rini --- board/freescale/corenet_ds/p4080ds_ddr.c | 1 - board/freescale/p1_p2_rdb_pc/ddr.c | 2 +- include/configs/P1010RDB.h | 1 - include/configs/p1_p2_rdb_pc.h | 1 - 4 files changed, 1 insertion(+), 4 deletions(-) diff --git a/board/freescale/corenet_ds/p4080ds_ddr.c b/board/freescale/corenet_ds/p4080ds_ddr.c index 3469064562b..9839eaceaf9 100644 --- a/board/freescale/corenet_ds/p4080ds_ddr.c +++ b/board/freescale/corenet_ds/p4080ds_ddr.c @@ -62,7 +62,6 @@ #define CONFIG_SYS_DDR_INIT_ADDR 0x00000000 #define CONFIG_SYS_DDR_INIT_EXT_ADDR 0x00000000 #define CONFIG_SYS_DDR_CS1_CONFIG 0x80004202 -#define CONFIG_SYS_DDR_DATA_INIT 0xdeadbeef #define CONFIG_SYS_DDR_TIMING_4 0x00000001 #define CONFIG_SYS_DDR_TIMING_5 0x02401400 #define CONFIG_SYS_DDR_MODE_CONTROL 0x00000000 diff --git a/board/freescale/p1_p2_rdb_pc/ddr.c b/board/freescale/p1_p2_rdb_pc/ddr.c index be803ddf9c6..038e6736ace 100644 --- a/board/freescale/p1_p2_rdb_pc/ddr.c +++ b/board/freescale/p1_p2_rdb_pc/ddr.c @@ -227,7 +227,7 @@ phys_size_t fixed_sdram(void) .ddr_sdram_mode_2 = CONFIG_SYS_DDR_MODE_2, .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL, .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL, - .ddr_data_init = CONFIG_SYS_DDR_DATA_INIT, + .ddr_data_init = 0xdeadbeef, /* Poison value */ .ddr_sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CTRL, .ddr_init_addr = CONFIG_SYS_DDR_INIT_ADDR, .ddr_init_ext_addr = CONFIG_SYS_DDR_INIT_EXT_ADDR, diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index d263999b5a7..12a78eac17c 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -118,7 +118,6 @@ extern unsigned long get_sdram_size(void); #define CONFIG_SYS_DDR_CS0_BNDS 0x0000003f #define CONFIG_SYS_DDR_CS0_CONFIG 0x80014302 #define CONFIG_SYS_DDR_CS0_CONFIG_2 0x00000000 -#define CONFIG_SYS_DDR_DATA_INIT 0xdeadbeef #define CONFIG_SYS_DDR_INIT_ADDR 0x00000000 #define CONFIG_SYS_DDR_INIT_EXT_ADDR 0x00000000 #define CONFIG_SYS_DDR_MODE_CONTROL 0x00000000 diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index e9217394e02..a0d583040cd 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -132,7 +132,6 @@ #define CONFIG_SYS_DDR_CS1_CONFIG 0x80014302 #define CONFIG_SYS_DDR_CS1_CONFIG_2 0x00000000 -#define CONFIG_SYS_DDR_DATA_INIT 0xdeadbeef #define CONFIG_SYS_DDR_INIT_ADDR 0x00000000 #define CONFIG_SYS_DDR_INIT_EXT_ADDR 0x00000000 #define CONFIG_SYS_DDR_MODE_CONTROL 0x00000000 -- GitLab