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Commit 404a98b0 authored by Siew Chin Lim's avatar Siew Chin Lim Committed by Ley Foon Tan
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arm: socfpga: Changed to store QSPI reference clock in kHz



Changed to store QSPI reference clock in kHz instead of Hz in
boot scratch cold0 register for Stratix10 and Agilex.

This patch is in preparation for Intel N5X SDRAM driver
support. Reserved 4 bits for Intel N5X SDRAM driver,
and there will be 28 bits to store QSPI reference clock.
Due to limited bits, QSPI reference clock frequency is
converted to kHz from Hz.

Signed-off-by: default avatarSiew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: default avatarTien Fong Chee <tien.fong.chee@intel.com>
parent 3aef59f2
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