Commit ffa4ebc4 authored by Gabriel Somlo's avatar Gabriel Somlo Committed by Stafford Horne
Browse files

drivers/soc/litex: s/LITEX_REG_SIZE/LITEX_SUBREG_ALIGN/g 



The constant LITEX_REG_SIZE is renamed to the more descriptive
LITEX_SUBREG_ALIGN (LiteX CSR subregisters are located at 32-bit
aligned MMIO addresses).

NOTE: this is a non-functional change.

Signed-off-by: default avatarGabriel Somlo <gsomlo@gmail.com>
Signed-off-by: default avatarStafford Horne <shorne@gmail.com>
parent b5d3061e

include/linux/litex.h

+5 −3
Original line number Diff line number Diff line
@@ -20,10 +20,12 @@ 
 * Supporting other configurations will require extending the logic in this

 * header and in the LiteX SoC controller driver.

 */

#define LITEX_REG_SIZE	  0x4

#define LITEX_SUBREG_SIZE	0x1

#define LITEX_SUBREG_SIZE_BIT	 (LITEX_SUBREG_SIZE * 8)



/* LiteX subregisters of any width are always aligned on a 4-byte boundary */

#define LITEX_SUBREG_ALIGN	  0x4



static inline void _write_litex_subregister(u32 val, void __iomem *addr)

{

	writel((u32 __force)cpu_to_le32(val), addr);
@@ -36,11 +38,11 @@ static inline u32 _read_litex_subregister(void __iomem *addr) 


#define WRITE_LITEX_SUBREGISTER(val, base_offset, subreg_id) \

	_write_litex_subregister(val, (base_offset) + \

					LITEX_REG_SIZE * (subreg_id))

					LITEX_SUBREG_ALIGN * (subreg_id))



#define READ_LITEX_SUBREGISTER(base_offset, subreg_id) \

	_read_litex_subregister((base_offset) + \

					LITEX_REG_SIZE * (subreg_id))

					LITEX_SUBREG_ALIGN * (subreg_id))



/*

 * LiteX SoC Generator, depending on the configuration, can split a single