Commit ffa17265 authored by Pierre-Louis Bossart's avatar Pierre-Louis Bossart Committed by Vinod Koul
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soundwire: enable optional clock registers for SoundWire 1.2 devices



The bus supports the mandatory clock registers for SDCA devices, these
registers can also be optionally supported by SoundWire 1.2 devices
that don't follow the SDCA class specification.

Signed-off-by: default avatarPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: default avatarRander Wang <rander.wang@intel.com>
Reviewed-by: default avatarPéter Ujfalusi <peter.ujfalusi@linux.intel.com>
Signed-off-by: default avatarBard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: default avatarCharles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20221118025807.534863-3-yung-chuan.liao@linux.intel.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent be505ba8
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+4 −3
Original line number Diff line number Diff line
@@ -1233,10 +1233,11 @@ static int sdw_slave_set_frequency(struct sdw_slave *slave)

	/*
	 * frequency base and scale registers are required for SDCA
	 * devices. They may also be used for 1.2+/non-SDCA devices,
	 * but we will need a DisCo property to cover this case
	 * devices. They may also be used for 1.2+/non-SDCA devices.
	 * Driver can set the property, we will need a DisCo property
	 * to discover this case from platform firmware.
	 */
	if (!slave->id.class_id)
	if (!slave->id.class_id && !slave->prop.clock_reg_supported)
		return 0;

	if (!mclk_freq) {
+4 −0
Original line number Diff line number Diff line
@@ -365,6 +365,9 @@ struct sdw_dpn_prop {
 * @sink_dpn_prop: Sink Data Port N properties
 * @scp_int1_mask: SCP_INT1_MASK desired settings
 * @quirks: bitmask identifying deltas from the MIPI specification
 * @clock_reg_supported: the Peripheral implements the clock base and scale
 * registers introduced with the SoundWire 1.2 specification. SDCA devices
 * do not need to set this boolean property as the registers are required.
 */
struct sdw_slave_prop {
	u32 mipi_revision;
@@ -388,6 +391,7 @@ struct sdw_slave_prop {
	struct sdw_dpn_prop *sink_dpn_prop;
	u8 scp_int1_mask;
	u32 quirks;
	bool clock_reg_supported;
};

#define SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY	BIT(0)