Commit ff61bc81 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'pinctrl-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl 

Pull pin control updates from Linus Walleij:
 "No core changes this time. Just new driver code and improvements!

  New drivers:

   - New driver for the Broadcom BCM4908 SoC.

   - New subdriver for Tesla FSD (Full Self Driving) SoC, a derivative
     of the Samsung Exynos pin control driver.

   - New driver for the Amlogic Meson S4 SoC.

   - New driver for the Sunplus SP7021 SoC.

   - New driver for the Microsemi Ocelot family ServalT SoC.

   - New subdriver for Intel Alder Lake-M SoC.

   - New subdriver for Intel Ice Lake-N SoC, including PCH support.

   - New subdriver for Renesas R8A779F0 SoC.

   - New subdriver for Mediatek MT8186 SoC.

   - New subdriver for NXP Freescale i.MX93 SoC.

   - New driver for Nuvoton WPCM450 SoC.

   - New driver for Qualcomm SC8280XP SoC.

  Improvements:

   - Wakeup support on Samsung Exynos850 and ExynosAutov9.

   - Serious and voluminous maintenance cleanup and refactoring in the
     Renesas drivers. Mainly sharing similar data between the different
     SoC subdrivers.

   - Qualcomm SM8450 EGPIO support.

   - Drive strength support on the Mediatek MT8195.

   - Add some missing groups and functions to the Ralink RT2880"

* tag 'pinctrl-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (188 commits)
  pinctrl: mediatek: common-v1: fix semicolon.cocci warnings
  pinctrl: nuvoton: wpcm450: Fix build error without OF
  pinctrl: qcom-pmic-gpio: Add support for pm8450
  dt-bindings: pinctrl: aspeed: Update gfx node in example
  dt-bindings: pinctrl: rt2880: add missing pin groups and functions
  pinctrl: ingenic: Fix regmap on X series SoCs
  pinctrl: nuvoton: Fix return value check in wpcm450_gpio_register()
  pinctrl: nuvoton: wpcm450: off by one in wpcm450_gpio_register()
  pinctrl: nuvoton: wpcm450: select GENERIC_PINCTRL_GROUPS
  pinctrl: nuvoton: Fix sparse warning
  pinctrl: mediatek: mt8186: Account for probe refactoring
  pinctrl: mediatek: common-v1: Commonize spec_ies_smt_set callback
  pinctrl: mediatek: common-v1: Commonize spec_pupd callback
  pinctrl: mediatek: common-v1: Use common probe function
  pinctrl: mediatek: common-v1: Add common probe function
  pinctrl: mediatek: paris: Unify probe function by using OF match data
  pinctrl/rockchip: Add missing of_node_put() in rockchip_pinctrl_probe
  pinctrl: nomadik: Add missing of_node_put() in nmk_pinctrl_probe
  pinctrl: berlin: fix error return code of berlin_pinctrl_build_state()
  pinctrl: qcom: Introduce sc8280xp TLMM driver
  ...
parents 901c7280 4a6d0149

Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml

+16 −0
Original line number Diff line number Diff line
@@ -75,6 +75,7 @@ additionalProperties: false 


examples:

  - |

    #include <dt-bindings/clock/aspeed-clock.h>

    apb {

        compatible = "simple-bus";

        #address-cells = <1>;
@@ -84,6 +85,8 @@ examples: 
        syscon: scu@1e6e2000 {

            compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";

            reg = <0x1e6e2000 0x1a8>;

            #clock-cells = <1>;

            #reset-cells = <1>;



            pinctrl: pinctrl {

                compatible = "aspeed,ast2500-pinctrl";
@@ -104,6 +107,12 @@ examples: 
        gfx: display@1e6e6000 {

            compatible = "aspeed,ast2500-gfx", "syscon";

            reg = <0x1e6e6000 0x1000>;

            reg-io-width = <4>;

            clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;

            resets = <&syscon ASPEED_RESET_CRT1>;

            interrupts = <0x19>;

            syscon = <&syscon>;

            memory-region = <&gfx_memory>;

        };

    };
@@ -130,3 +139,10 @@ examples: 
            };

        };

    };



    gfx_memory: framebuffer {

        size = <0x01000000>;

        alignment = <0x01000000>;

        compatible = "shared-dma-pool";

        reusable;

    };

Documentation/devicetree/bindings/pinctrl/brcm,bcm11351-pinctrl.txt

+1 −1
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@@ -85,7 +85,7 @@ Optional Properties (for I2C pins): 
- function:			String. Specifies the pin mux selection. Values

				must be one of: "alt1", "alt2", "alt3", "alt4"

- bias-pull-up:			Integer. Pull up strength in Ohm. There are 3

				pull-up resisitors (1.2k, 1.8k, 2.7k) available

				pull-up resistors (1.2k, 1.8k, 2.7k) available

				in parallel for I2C pins, so the valid values

				are: 568, 720, 831, 1080, 1200, 1800, 2700 Ohm.

- bias-disable:			No arguments. Disable pin bias.

Documentation/devicetree/bindings/pinctrl/brcm,bcm4908-pinctrl.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/pinctrl/brcm,bcm4908-pinctrl.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Broadcom BCM4908 pin controller



maintainers:

  - Rafał Miłecki <rafal@milecki.pl>



description:

  Binding for pin controller present on BCM4908 family SoCs.



properties:

  compatible:

    const: brcm,bcm4908-pinctrl



  reg:

    maxItems: 1



patternProperties:

  '-pins$':

    type: object

    $ref: pinmux-node.yaml#



    properties:

      function:

        enum: [ led_0, led_1, led_2, led_3, led_4, led_5, led_6, led_7, led_8,

                led_9, led_10, led_11, led_12, led_13, led_14, led_15, led_16,

                led_17, led_18, led_19, led_20, led_21, led_22, led_23, led_24,

                led_25, led_26, led_27, led_28, led_29, led_30, led_31,

                hs_uart, i2c, i2s, nand_ctrl, nand_data, emmc_ctrl, usb0_pwr,

                usb1_pwr ]



      groups:

        minItems: 1

        maxItems: 2

        items:

          enum: [ led_0_grp_a, led_1_grp_a, led_2_grp_a, led_3_grp_a,

                  led_4_grp_a, led_5_grp_a, led_6_grp_a, led_7_grp_a,

                  led_8_grp_a, led_9_grp_a, led_10_grp_a, led_10_grp_b,

                  led_11_grp_a, led_11_grp_b, led_12_grp_a, led_12_grp_b,

                  led_13_grp_a, led_13_grp_b, led_14_grp_a, led_15_grp_a,

                  led_16_grp_a, led_17_grp_a, led_18_grp_a, led_19_grp_a,

                  led_20_grp_a, led_21_grp_a, led_22_grp_a, led_23_grp_a,

                  led_24_grp_a, led_25_grp_a, led_26_grp_a, led_27_grp_a,

                  led_28_grp_a, led_29_grp_a, led_30_grp_a, led_31_grp_a,

                  led_31_grp_b, hs_uart_grp, i2c_grp_a, i2c_grp_b, i2s_grp,

                  nand_ctrl_grp, nand_data_grp, emmc_ctrl_grp, usb0_pwr_grp,

                  usb1_pwr_grp ]



allOf:

  - $ref: pinctrl.yaml#



required:

  - compatible

  - reg



unevaluatedProperties: false



examples:

  - |

    pinctrl@ff800560 {

        compatible = "brcm,bcm4908-pinctrl";

        reg = <0xff800560 0x10>;



        led_0-a-pins {

            function = "led_0";

            groups = "led_0_grp_a";

        };

    };

Documentation/devicetree/bindings/pinctrl/fsl,imx93-pinctrl.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/pinctrl/fsl,imx93-pinctrl.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Freescale IMX93 IOMUX Controller



maintainers:

  - Peng Fan <peng.fan@nxp.com>



description:

  Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory

  for common binding part and usage.



allOf:

  - $ref: "pinctrl.yaml#"



properties:

  compatible:

    const: fsl,imx93-iomuxc



  reg:

    maxItems: 1



# Client device subnode's properties

patternProperties:

  'grp$':

    type: object

    description:

      Pinctrl node's client devices use subnodes for desired pin configuration.

      Client device subnodes use below standard properties.



    properties:

      fsl,pins:

        description:

          each entry consists of 6 integers and represents the mux and config

          setting for one pin. The first 5 integers <mux_reg conf_reg input_reg

          mux_val input_val> are specified using a PIN_FUNC_ID macro, which can

          be found in <arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h>. The last

          integer CONFIG is the pad setting value like pull-up on this pin. Please

          refer to i.MX8M Plus Reference Manual for detailed CONFIG settings.

        $ref: /schemas/types.yaml#/definitions/uint32-matrix

        items:

          items:

            - description: |

                "mux_reg" indicates the offset of mux register.

            - description: |

                "conf_reg" indicates the offset of pad configuration register.

            - description: |

                "input_reg" indicates the offset of select input register.

            - description: |

                "mux_val" indicates the mux value to be applied.

            - description: |

                "input_val" indicates the select input value to be applied.

            - description: |

                "pad_setting" indicates the pad configuration value to be applied.





    required:

      - fsl,pins



    additionalProperties: false



required:

  - compatible

  - reg



additionalProperties: false



examples:

  # Pinmux controller node

  - |

    iomuxc: pinctrl@443c0000 {

        compatible = "fsl,imx93-iomuxc";

        reg = <0x30330000 0x10000>;



        pinctrl_uart3: uart3grp {

            fsl,pins =

                <0x48 0x1f8 0x41c 0x1 0x0	0x49>,

                <0x4c 0x1fc 0x418 0x1 0x0	0x49>;

        };

    };



...

Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt

+1 −0
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@@ -16,6 +16,7 @@ Required properties for the root node: 
		      "amlogic,meson-g12a-periphs-pinctrl"

		      "amlogic,meson-g12a-aobus-pinctrl"

		      "amlogic,meson-a1-periphs-pinctrl"

		      "amlogic,meson-s4-periphs-pinctrl"

 - reg: address and size of registers controlling irq functionality



=== GPIO sub-nodes ===