Commit fef92cd2 authored by Thomas Gleixner's avatar Thomas Gleixner
Browse files

Merge tag 'timers-v5.11' of https://git.linaro.org/people/daniel.lezcano/linux into timers/core 

Pull clocksource/event driver updates from Daniel Lezcano:

 - Add static annotation for the sp804 init functions (Zhen Lei)

 - Code cleanups and error code path at init time fixes on the sp804
   (Kefen Wang)

 - Add new OST timer driver device tree bindings (Zhou Yanjie)

 - Remove EZChip NPS clocksource driver corresponding to the NPS
   platform which was removed from the ARC architecture (Vineet Gupta)

 - Add missing clk_disable_unprepare() on error path for Orion (Yang
   Yingliang)

 - Add device tree bindings documentation for Renesas r8a774e1
   (Marian-Cristian Rotariu)

 - Convert Renesas TMU to json-schema (Geert Uytterhoeven)

 - Fix memory leak on the error path at init time on the cadence_ttc
   driver (Yu Kuai)

 - Fix section mismatch for Ingenic timer driver (Daniel Lezcano)

 - Make RISCV_TIMER depends on RISCV_SBI (Kefeng Wang)

Link: https://lore.kernel.org/r/028084fa-d29b-a1d5-7eab-17f77ef69863@linaro.org
parents b9965449 ab310544

Documentation/devicetree/bindings/timer/renesas,tmu.txt

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* Renesas R-Mobile/R-Car Timer Unit (TMU)



The TMU is a 32-bit timer/counter with configurable clock inputs and

programmable compare match.



Channels share hardware resources but their counter and compare match value

are independent. The TMU hardware supports up to three channels.



Required Properties:



  - compatible: must contain one or more of the following:

    - "renesas,tmu-r8a7740" for the r8a7740 TMU

    - "renesas,tmu-r8a774a1" for the r8a774A1 TMU

    - "renesas,tmu-r8a774b1" for the r8a774B1 TMU

    - "renesas,tmu-r8a774c0" for the r8a774C0 TMU

    - "renesas,tmu-r8a7778" for the r8a7778 TMU

    - "renesas,tmu-r8a7779" for the r8a7779 TMU

    - "renesas,tmu-r8a77970" for the r8a77970 TMU

    - "renesas,tmu-r8a77980" for the r8a77980 TMU

    - "renesas,tmu" for any TMU.

      This is a fallback for the above renesas,tmu-* entries



  - reg: base address and length of the registers block for the timer module.



  - interrupts: interrupt-specifier for the timer, one per channel.



  - clocks: a list of phandle + clock-specifier pairs, one for each entry

    in clock-names.

  - clock-names: must contain "fck" for the functional clock.



Optional Properties:



  - #renesas,channels: number of channels implemented by the timer, must be 2

    or 3 (if not specified the value defaults to 3).





Example: R8A7779 (R-Car H1) TMU0 node



	tmu0: timer@ffd80000 {

		compatible = "renesas,tmu-r8a7779", "renesas,tmu";

		reg = <0xffd80000 0x30>;

		interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,

			     <0 33 IRQ_TYPE_LEVEL_HIGH>,

			     <0 34 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp0_clks R8A7779_CLK_TMU0>;

		clock-names = "fck";



		#renesas,channels = <3>;

	};

Documentation/devicetree/bindings/timer/renesas,tmu.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/timer/renesas,tmu.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Renesas R-Mobile/R-Car Timer Unit (TMU)



maintainers:

  - Geert Uytterhoeven <geert+renesas@glider.be>

  - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>



description:

  The TMU is a 32-bit timer/counter with configurable clock inputs and

  programmable compare match.



  Channels share hardware resources but their counter and compare match value

  are independent. The TMU hardware supports up to three channels.



properties:

  compatible:

    items:

      - enum:

          - renesas,tmu-r8a7740  # R-Mobile A1

          - renesas,tmu-r8a774a1 # RZ/G2M

          - renesas,tmu-r8a774b1 # RZ/G2N

          - renesas,tmu-r8a774c0 # RZ/G2E

          - renesas,tmu-r8a774e1 # RZ/G2H

          - renesas,tmu-r8a7778  # R-Car M1A

          - renesas,tmu-r8a7779  # R-Car H1

          - renesas,tmu-r8a77970 # R-Car V3M

          - renesas,tmu-r8a77980 # R-Car V3H

      - const: renesas,tmu



  reg:

    maxItems: 1



  interrupts:

    minItems: 2

    maxItems: 3



  clocks:

    maxItems: 1



  clock-names:

    const: fck



  power-domains:

    maxItems: 1



  resets:

    maxItems: 1



  '#renesas,channels':

    description:

      Number of channels implemented by the timer.

    $ref: /schemas/types.yaml#/definitions/uint32

    enum: [ 2, 3 ]

    default: 3



required:

  - compatible

  - reg

  - interrupts

  - clocks

  - clock-names

  - power-domains



if:

  not:

    properties:

      compatible:

        contains:

          enum:

            - renesas,tmu-r8a7740

            - renesas,tmu-r8a7778

            - renesas,tmu-r8a7779

then:

  required:

    - resets



additionalProperties: false



examples:

  - |

    #include <dt-bindings/clock/r8a7779-clock.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/power/r8a7779-sysc.h>

    tmu0: timer@ffd80000 {

            compatible = "renesas,tmu-r8a7779", "renesas,tmu";

            reg = <0xffd80000 0x30>;

            interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,

                         <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,

                         <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;

            clocks = <&mstp0_clks R8A7779_CLK_TMU0>;

            clock-names = "fck";

            power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;

            #renesas,channels = <3>;

    };

drivers/clocksource/Kconfig

+1 −11
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@@ -275,16 +275,6 @@ config CLKSRC_TI_32K 
	  This option enables support for Texas Instruments 32.768 Hz clocksource

	  available on many OMAP-like platforms.



config CLKSRC_NPS

	bool "NPS400 clocksource driver" if COMPILE_TEST

	depends on !PHYS_ADDR_T_64BIT

	select CLKSRC_MMIO

	select TIMER_OF if OF

	help

	  NPS400 clocksource support.

	  It has a 64-bit counter with update rate up to 1000MHz.

	  This counter is accessed via couple of 32-bit memory-mapped registers.



config CLKSRC_STM32

	bool "Clocksource for STM32 SoCs" if !ARCH_STM32

	depends on OF && ARM && (ARCH_STM32 || COMPILE_TEST)
@@ -654,7 +644,7 @@ config ATCPIT100_TIMER 


config RISCV_TIMER

	bool "Timer for the RISC-V platform" if COMPILE_TEST

	depends on GENERIC_SCHED_CLOCK && RISCV

	depends on GENERIC_SCHED_CLOCK && RISCV && RISCV_SBI

	select TIMER_PROBE

	select TIMER_OF

	help

drivers/clocksource/Makefile

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@@ -56,7 +56,6 @@ obj-$(CONFIG_CLKSRC_QCOM) += timer-qcom.o 
obj-$(CONFIG_MTK_TIMER)		+= timer-mediatek.o

obj-$(CONFIG_CLKSRC_PISTACHIO)	+= timer-pistachio.o

obj-$(CONFIG_CLKSRC_TI_32K)	+= timer-ti-32k.o

obj-$(CONFIG_CLKSRC_NPS)	+= timer-nps.o

obj-$(CONFIG_OXNAS_RPS_TIMER)	+= timer-oxnas-rps.o

obj-$(CONFIG_OWL_TIMER)		+= timer-owl.o

obj-$(CONFIG_MILBEAUT_TIMER)	+= timer-milbeaut.o

drivers/clocksource/ingenic-timer.c

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@@ -127,7 +127,7 @@ static irqreturn_t ingenic_tcu_cevt_cb(int irq, void *dev_id) 
	return IRQ_HANDLED;

}



static struct clk * __init ingenic_tcu_get_clock(struct device_node *np, int id)

static struct clk *ingenic_tcu_get_clock(struct device_node *np, int id)

{

	struct of_phandle_args args;