Commit feed6541 authored by Chia-Yuan Li's avatar Chia-Yuan Li Committed by Kalle Valo
Browse files

rtw89: 8852c: add mac_ctrl_path and mac_cfg_gnt APIs



The BT-coexistence uses these function to control antenna and TDMA, so
implement the variant type to support all chips.

Signed-off-by: default avatarChia-Yuan Li <leo.li@realtek.com>
Signed-off-by: default avatarPing-Ke Shih <pkshih@realtek.com>
Signed-off-by: default avatarKalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20220317055543.40514-10-pkshih@realtek.com
parent de78869d
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+12 −12
Original line number Diff line number Diff line
@@ -1478,7 +1478,7 @@ static void _set_gnt_wl(struct rtw89_dev *rtwdev, u8 phy_map, u8 state)
		}
	}

	rtw89_mac_cfg_gnt(rtwdev, &dm->gnt);
	rtw89_chip_mac_cfg_gnt(rtwdev, &dm->gnt);
}

#define BTC_TDMA_WLROLE_MAX 2
@@ -2233,7 +2233,7 @@ static void _set_gnt_bt(struct rtw89_dev *rtwdev, u8 phy_map, u8 state)
		}
	}

	rtw89_mac_cfg_gnt(rtwdev, &dm->gnt);
	rtw89_chip_mac_cfg_gnt(rtwdev, &dm->gnt);
}

static void _set_bt_plut(struct rtw89_dev *rtwdev, u8 phy_map,
@@ -2300,7 +2300,7 @@ static void _set_ant(struct rtw89_dev *rtwdev, bool force_exec,

	switch (type) {
	case BTC_ANT_WPOWERON:
		rtw89_mac_cfg_ctrl_path(rtwdev, false);
		rtw89_chip_cfg_ctrl_path(rtwdev, false);
		break;
	case BTC_ANT_WINIT:
		if (bt->enable.now) {
@@ -2310,21 +2310,21 @@ static void _set_ant(struct rtw89_dev *rtwdev, bool force_exec,
			_set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI);
			_set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_LO);
		}
		rtw89_mac_cfg_ctrl_path(rtwdev, true);
		rtw89_chip_cfg_ctrl_path(rtwdev, true);
		_set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_BT, BTC_PLT_BT);
		break;
	case BTC_ANT_WONLY:
		_set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI);
		_set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_LO);
		rtw89_mac_cfg_ctrl_path(rtwdev, true);
		rtw89_chip_cfg_ctrl_path(rtwdev, true);
		_set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE);
		break;
	case BTC_ANT_WOFF:
		rtw89_mac_cfg_ctrl_path(rtwdev, false);
		rtw89_chip_cfg_ctrl_path(rtwdev, false);
		_set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE);
		break;
	case BTC_ANT_W2G:
		rtw89_mac_cfg_ctrl_path(rtwdev, true);
		rtw89_chip_cfg_ctrl_path(rtwdev, true);
		if (rtwdev->dbcc_en) {
			for (i = 0; i < RTW89_PHY_MAX; i++) {
				b2g = (wl_dinfo->real_band[i] == RTW89_BAND_2G);
@@ -2352,32 +2352,32 @@ static void _set_ant(struct rtw89_dev *rtwdev, bool force_exec,
		}
		break;
	case BTC_ANT_W5G:
		rtw89_mac_cfg_ctrl_path(rtwdev, true);
		rtw89_chip_cfg_ctrl_path(rtwdev, true);
		_set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI);
		_set_gnt_bt(rtwdev, phy_map, BTC_GNT_HW);
		_set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE);
		break;
	case BTC_ANT_W25G:
		rtw89_mac_cfg_ctrl_path(rtwdev, true);
		rtw89_chip_cfg_ctrl_path(rtwdev, true);
		_set_gnt_wl(rtwdev, phy_map, BTC_GNT_HW);
		_set_gnt_bt(rtwdev, phy_map, BTC_GNT_HW);
		_set_bt_plut(rtwdev, BTC_PHY_ALL,
			     BTC_PLT_GNT_WL, BTC_PLT_GNT_WL);
		break;
	case BTC_ANT_FREERUN:
		rtw89_mac_cfg_ctrl_path(rtwdev, true);
		rtw89_chip_cfg_ctrl_path(rtwdev, true);
		_set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI);
		_set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_HI);
		_set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE);
		break;
	case BTC_ANT_WRFK:
		rtw89_mac_cfg_ctrl_path(rtwdev, true);
		rtw89_chip_cfg_ctrl_path(rtwdev, true);
		_set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI);
		_set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_LO);
		_set_bt_plut(rtwdev, phy_map, BTC_PLT_NONE, BTC_PLT_NONE);
		break;
	case BTC_ANT_BRFK:
		rtw89_mac_cfg_ctrl_path(rtwdev, false);
		rtw89_chip_cfg_ctrl_path(rtwdev, false);
		_set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_LO);
		_set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_HI);
		_set_bt_plut(rtwdev, phy_map, BTC_PLT_NONE, BTC_PLT_NONE);
+19 −0
Original line number Diff line number Diff line
@@ -2068,6 +2068,9 @@ struct rtw89_chip_ops {
				       s8 pw_ofst, enum rtw89_mac_idx mac_idx);
	int (*pwr_on_func)(struct rtw89_dev *rtwdev);
	int (*pwr_off_func)(struct rtw89_dev *rtwdev);
	int (*cfg_ctrl_path)(struct rtw89_dev *rtwdev, bool wl);
	int (*mac_cfg_gnt)(struct rtw89_dev *rtwdev,
			   const struct rtw89_mac_ax_coex_gnt *gnt_cfg);

	void (*btc_set_rfe)(struct rtw89_dev *rtwdev);
	void (*btc_init_cfg)(struct rtw89_dev *rtwdev);
@@ -3467,6 +3470,22 @@ static inline void rtw89_ctrl_btg(struct rtw89_dev *rtwdev, bool btg)
		chip->ops->ctrl_btg(rtwdev, btg);
}

static inline
void rtw89_chip_mac_cfg_gnt(struct rtw89_dev *rtwdev,
			    const struct rtw89_mac_ax_coex_gnt *gnt_cfg)
{
	const struct rtw89_chip_info *chip = rtwdev->chip;

	chip->ops->mac_cfg_gnt(rtwdev, gnt_cfg);
}

static inline void rtw89_chip_cfg_ctrl_path(struct rtw89_dev *rtwdev, bool wl)
{
	const struct rtw89_chip_info *chip = rtwdev->chip;

	chip->ops->cfg_ctrl_path(rtwdev, wl);
}

static inline u8 *get_hdr_bssid(struct ieee80211_hdr *hdr)
{
	__le16 fc = hdr->frame_control;
+70 −0
Original line number Diff line number Diff line
@@ -3652,6 +3652,54 @@ int rtw89_mac_cfg_gnt(struct rtw89_dev *rtwdev,

	return 0;
}
EXPORT_SYMBOL(rtw89_mac_cfg_gnt);

int rtw89_mac_cfg_gnt_v1(struct rtw89_dev *rtwdev,
			 const struct rtw89_mac_ax_coex_gnt *gnt_cfg)
{
	u32 val = 0;

	if (gnt_cfg->band[0].gnt_bt)
		val |= B_AX_GNT_BT_RFC_S0_VAL | B_AX_GNT_BT_RX_VAL |
		       B_AX_GNT_BT_TX_VAL;
	else
		val |= B_AX_WL_ACT_VAL;

	if (gnt_cfg->band[0].gnt_bt_sw_en)
		val |= B_AX_GNT_BT_RFC_S0_SWCTRL | B_AX_GNT_BT_RX_SWCTRL |
		       B_AX_GNT_BT_TX_SWCTRL | B_AX_WL_ACT_SWCTRL;

	if (gnt_cfg->band[0].gnt_wl)
		val |= B_AX_GNT_WL_RFC_S0_VAL | B_AX_GNT_WL_RX_VAL |
		       B_AX_GNT_WL_TX_VAL | B_AX_GNT_WL_BB_VAL;

	if (gnt_cfg->band[0].gnt_wl_sw_en)
		val |= B_AX_GNT_WL_RFC_S0_SWCTRL | B_AX_GNT_WL_RX_SWCTRL |
		       B_AX_GNT_WL_TX_SWCTRL | B_AX_GNT_WL_BB_SWCTRL;

	if (gnt_cfg->band[1].gnt_bt)
		val |= B_AX_GNT_BT_RFC_S1_VAL | B_AX_GNT_BT_RX_VAL |
		       B_AX_GNT_BT_TX_VAL;
	else
		val |= B_AX_WL_ACT_VAL;

	if (gnt_cfg->band[1].gnt_bt_sw_en)
		val |= B_AX_GNT_BT_RFC_S1_SWCTRL | B_AX_GNT_BT_RX_SWCTRL |
		       B_AX_GNT_BT_TX_SWCTRL | B_AX_WL_ACT_SWCTRL;

	if (gnt_cfg->band[1].gnt_wl)
		val |= B_AX_GNT_WL_RFC_S1_VAL | B_AX_GNT_WL_RX_VAL |
		       B_AX_GNT_WL_TX_VAL | B_AX_GNT_WL_BB_VAL;

	if (gnt_cfg->band[1].gnt_wl_sw_en)
		val |= B_AX_GNT_WL_RFC_S1_SWCTRL | B_AX_GNT_WL_RX_SWCTRL |
		       B_AX_GNT_WL_TX_SWCTRL | B_AX_GNT_WL_BB_SWCTRL;

	rtw89_write32(rtwdev, R_AX_GNT_SW_CTRL, val);

	return 0;
}
EXPORT_SYMBOL(rtw89_mac_cfg_gnt_v1);

int rtw89_mac_cfg_plt(struct rtw89_dev *rtwdev, struct rtw89_mac_ax_plt *plt)
{
@@ -3711,6 +3759,28 @@ int rtw89_mac_cfg_ctrl_path(struct rtw89_dev *rtwdev, bool wl)

	return 0;
}
EXPORT_SYMBOL(rtw89_mac_cfg_ctrl_path);

int rtw89_mac_cfg_ctrl_path_v1(struct rtw89_dev *rtwdev, bool wl)
{
	struct rtw89_btc *btc = &rtwdev->btc;
	struct rtw89_btc_dm *dm = &btc->dm;
	struct rtw89_mac_ax_gnt *g = dm->gnt.band;
	int i;

	if (wl)
		return 0;

	for (i = 0; i < RTW89_PHY_MAX; i++) {
		g[i].gnt_bt_sw_en = 1;
		g[i].gnt_bt = 1;
		g[i].gnt_wl_sw_en = 1;
		g[i].gnt_wl = 0;
	}

	return rtw89_mac_cfg_gnt_v1(rtwdev, &dm->gnt);
}
EXPORT_SYMBOL(rtw89_mac_cfg_ctrl_path_v1);

bool rtw89_mac_get_ctrl_path(struct rtw89_dev *rtwdev)
{
+3 −0
Original line number Diff line number Diff line
@@ -799,12 +799,15 @@ void rtw89_mac_flush_txq(struct rtw89_dev *rtwdev, u32 queues, bool drop);
int rtw89_mac_coex_init(struct rtw89_dev *rtwdev, const struct rtw89_mac_ax_coex *coex);
int rtw89_mac_cfg_gnt(struct rtw89_dev *rtwdev,
		      const struct rtw89_mac_ax_coex_gnt *gnt_cfg);
int rtw89_mac_cfg_gnt_v1(struct rtw89_dev *rtwdev,
			 const struct rtw89_mac_ax_coex_gnt *gnt_cfg);
int rtw89_mac_cfg_plt(struct rtw89_dev *rtwdev, struct rtw89_mac_ax_plt *plt);
u16 rtw89_mac_get_plt_cnt(struct rtw89_dev *rtwdev, u8 band);
void rtw89_mac_cfg_sb(struct rtw89_dev *rtwdev, u32 val);
u32 rtw89_mac_get_sb(struct rtw89_dev *rtwdev);
bool rtw89_mac_get_ctrl_path(struct rtw89_dev *rtwdev);
int rtw89_mac_cfg_ctrl_path(struct rtw89_dev *rtwdev, bool wl);
int rtw89_mac_cfg_ctrl_path_v1(struct rtw89_dev *rtwdev, bool wl);
bool rtw89_mac_get_txpwr_cr(struct rtw89_dev *rtwdev,
			    enum rtw89_phy_idx phy_idx,
			    u32 reg_base, u32 *cr);
+25 −0
Original line number Diff line number Diff line
@@ -1620,6 +1620,31 @@
#define B_AX_STATIS_BT_LO_TX_1_MASK GENMASK(15, 0)
#define B_AX_STATIS_BT_LO_RX_1_MASK GENMASK(31, 16)

#define R_AX_GNT_SW_CTRL 0xDA48
#define R_AX_GNT_SW_CTRL_C1 0xFA48
#define B_AX_WL_ACT2_VAL BIT(21)
#define B_AX_WL_ACT2_SWCTRL BIT(20)
#define B_AX_WL_ACT_VAL BIT(19)
#define B_AX_WL_ACT_SWCTRL BIT(18)
#define B_AX_GNT_BT_RX_VAL BIT(17)
#define B_AX_GNT_BT_RX_SWCTRL BIT(16)
#define B_AX_GNT_BT_TX_VAL BIT(15)
#define B_AX_GNT_BT_TX_SWCTRL BIT(14)
#define B_AX_GNT_WL_RX_VAL BIT(13)
#define B_AX_GNT_WL_RX_SWCTRL BIT(12)
#define B_AX_GNT_WL_TX_VAL BIT(11)
#define B_AX_GNT_WL_TX_SWCTRL BIT(10)
#define B_AX_GNT_BT_RFC_S1_VAL BIT(9)
#define B_AX_GNT_BT_RFC_S1_SWCTRL BIT(8)
#define B_AX_GNT_WL_RFC_S1_VAL BIT(7)
#define B_AX_GNT_WL_RFC_S1_SWCTRL BIT(6)
#define B_AX_GNT_BT_RFC_S0_VAL BIT(5)
#define B_AX_GNT_BT_RFC_S0_SWCTRL BIT(4)
#define B_AX_GNT_WL_RFC_S0_VAL BIT(3)
#define B_AX_GNT_WL_RFC_S0_SWCTRL BIT(2)
#define B_AX_GNT_WL_BB_VAL BIT(1)
#define B_AX_GNT_WL_BB_SWCTRL BIT(0)

#define R_AX_TDMA_MODE 0xDA4C
#define R_AX_TDMA_MODE_C1 0xFA4C
#define B_AX_R_BT_CMD_RPT_MASK GENMASK(31, 16)
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