Commit fe88f5f7 authored by AngeloGioacchino Del Regno's avatar AngeloGioacchino Del Regno Committed by Rob Herring
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dt-bindings: i2c: convert i2c-mt65xx to json-schema

parent 2b18b93e
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* MediaTek's I2C controller

The MediaTek's I2C controller is used to interface with I2C devices.

Required properties:
  - compatible: value should be either of the following.
      "mediatek,mt2701-i2c", "mediatek,mt6577-i2c": for MediaTek MT2701
      "mediatek,mt2712-i2c": for MediaTek MT2712
      "mediatek,mt6577-i2c": for MediaTek MT6577
      "mediatek,mt6589-i2c": for MediaTek MT6589
      "mediatek,mt6797-i2c", "mediatek,mt6577-i2c": for MediaTek MT6797
      "mediatek,mt7622-i2c": for MediaTek MT7622
      "mediatek,mt7623-i2c", "mediatek,mt6577-i2c": for MediaTek MT7623
      "mediatek,mt7629-i2c", "mediatek,mt2712-i2c": for MediaTek MT7629
      "mediatek,mt8168-i2c": for MediaTek MT8168
      "mediatek,mt8173-i2c": for MediaTek MT8173
      "mediatek,mt8183-i2c": for MediaTek MT8183
      "mediatek,mt8186-i2c": for MediaTek MT8186
      "mediatek,mt8192-i2c": for MediaTek MT8192
      "mediatek,mt8195-i2c", "mediatek,mt8192-i2c": for MediaTek MT8195
      "mediatek,mt8516-i2c", "mediatek,mt2712-i2c": for MediaTek MT8516
  - reg: physical base address of the controller and dma base, length of memory
    mapped region.
  - interrupts: interrupt number to the cpu.
  - clock-div: the fixed value for frequency divider of clock source in i2c
    module. Each IC may be different.
  - clocks: clock name from clock manager
  - clock-names: Must include "main" and "dma", "arb" is for multi-master that
    one bus has more than two i2c controllers, if enable have-pmic need include
    "pmic" extra.

Optional properties:
  - clock-frequency: Frequency in Hz of the bus when transfer, the default value
    is 100000.
  - mediatek,have-pmic: platform can control i2c form special pmic side.
    Only mt6589 and mt8135 support this feature.
  - mediatek,use-push-pull: IO config use push-pull mode.
  - vbus-supply: phandle to the regulator that provides power to SCL/SDA.

Example:

	i2c0: i2c@1100d000 {
			compatible = "mediatek,mt6577-i2c";
			reg = <0x1100d000 0x70>,
			      <0x11000300 0x80>;
			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_LOW>;
			clock-frequency = <400000>;
			mediatek,have-pmic;
			clock-div = <16>;
			clocks = <&i2c0_ck>, <&ap_dma_ck>;
			clock-names = "main", "dma";
	};
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/i2c/i2c-mt65xx.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: MediaTek I2C controller

description:
  This driver interfaces with the native I2C controller present in
  various MediaTek SoCs.

allOf:
  - $ref: /schemas/i2c/i2c-controller.yaml#

maintainers:
  - Qii Wang <qii.wang@mediatek.com>

properties:
  compatible:
    oneOf:
      - const: mediatek,mt2712-i2c
      - const: mediatek,mt6577-i2c
      - const: mediatek,mt6589-i2c
      - const: mediatek,mt7622-i2c
      - const: mediatek,mt8168-i2c
      - const: mediatek,mt8173-i2c
      - const: mediatek,mt8183-i2c
      - const: mediatek,mt8186-i2c
      - const: mediatek,mt8192-i2c
      - items:
          - enum:
              - mediatek,mt7629-i2c
              - mediatek,mt8516-i2c
          - const: mediatek,mt2712-i2c
      - items:
          - enum:
              - mediatek,mt2701-i2c
              - mediatek,mt6797-i2c
              - mediatek,mt7623-i2c
          - const: mediatek,mt6577-i2c
      - items:
          - enum:
              - mediatek,mt8195-i2c
          - const: mediatek,mt8192-i2c

  reg:
    items:
      - description: Physical base address
      - description: DMA base address

  interrupts:
    maxItems: 1

  clocks:
    minItems: 2
    items:
      - description: Main clock for I2C bus
      - description: Clock for I2C via DMA
      - description: Bus arbitrator clock
      - description: Clock for I2C from PMIC

  clock-names:
    minItems: 2
    items:
      - const: main
      - const: dma
      - const: arb
      - const: pmic

  clock-div:
    $ref: /schemas/types.yaml#/definitions/uint32
    description: Frequency divider of clock source in I2C module

  clock-frequency:
    default: 100000
    description:
      SCL frequency to use (in Hz). If omitted, 100kHz is used.

  mediatek,have-pmic:
    description: Platform controls I2C from PMIC side
    type: boolean

  mediatek,use-push-pull:
    description: Use push-pull mode I/O config
    type: boolean

  vbus-supply:
    description: Phandle to the regulator providing power to SCL/SDA

required:
  - compatible
  - reg
  - clocks
  - clock-names
  - clock-div
  - interrupts

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/interrupt-controller/irq.h>

    i2c0: i2c@1100d000 {
      compatible = "mediatek,mt6577-i2c";
      reg = <0x1100d000 0x70>, <0x11000300 0x80>;
      interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_LOW>;
      clocks = <&i2c0_ck>, <&ap_dma_ck>;
      clock-names = "main", "dma";
      clock-div = <16>;
      clock-frequency = <400000>;
      mediatek,have-pmic;

      #address-cells = <1>;
      #size-cells = <0>;
    };
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@@ -12356,7 +12356,7 @@ MEDIATEK I2C CONTROLLER DRIVER
M:	Qii Wang <qii.wang@mediatek.com>
L:	linux-i2c@vger.kernel.org
S:	Maintained
F:	Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt
F:	Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml
F:	drivers/i2c/busses/i2c-mt65xx.c
MEDIATEK IOMMU DRIVER