Loading drivers/gpu/drm/radeon/radeon.h +1 −0 Original line number Diff line number Diff line Loading @@ -1070,5 +1070,6 @@ extern void r600_scratch_init(struct radeon_device *rdev); extern int r600_blit_init(struct radeon_device *rdev); extern void r600_blit_fini(struct radeon_device *rdev); extern int r600_cp_init_microcode(struct radeon_device *rdev); extern int r600_gpu_reset(struct radeon_device *rdev); #endif drivers/gpu/drm/radeon/rv770.c +11 −10 Original line number Diff line number Diff line Loading @@ -56,8 +56,6 @@ int rv770_pcie_gart_enable(struct radeon_device *rdev) r = radeon_gart_table_vram_pin(rdev); if (r) return r; for (i = 0; i < rdev->gart.num_gpu_pages; i++) r600_gart_clear_page(rdev, i); /* Setup L2 cache */ WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING | ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE | Loading Loading @@ -848,14 +846,15 @@ int rv770_mc_init(struct radeon_device *rdev) } int rv770_gpu_reset(struct radeon_device *rdev) { /* FIXME: implement */ return 0; /* FIXME: implement any rv770 specific bits */ return r600_gpu_reset(rdev); } static int rv770_startup(struct radeon_device *rdev) { int r; radeon_gpu_reset(rdev); rv770_mc_resume(rdev); r = rv770_pcie_gart_enable(rdev); if (r) Loading Loading @@ -1039,6 +1038,8 @@ int rv770_init(struct radeon_device *rdev) void rv770_fini(struct radeon_device *rdev) { rv770_suspend(rdev); r600_blit_fini(rdev); radeon_ring_fini(rdev); rv770_pcie_gart_fini(rdev); Loading Loading
drivers/gpu/drm/radeon/radeon.h +1 −0 Original line number Diff line number Diff line Loading @@ -1070,5 +1070,6 @@ extern void r600_scratch_init(struct radeon_device *rdev); extern int r600_blit_init(struct radeon_device *rdev); extern void r600_blit_fini(struct radeon_device *rdev); extern int r600_cp_init_microcode(struct radeon_device *rdev); extern int r600_gpu_reset(struct radeon_device *rdev); #endif
drivers/gpu/drm/radeon/rv770.c +11 −10 Original line number Diff line number Diff line Loading @@ -56,8 +56,6 @@ int rv770_pcie_gart_enable(struct radeon_device *rdev) r = radeon_gart_table_vram_pin(rdev); if (r) return r; for (i = 0; i < rdev->gart.num_gpu_pages; i++) r600_gart_clear_page(rdev, i); /* Setup L2 cache */ WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING | ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE | Loading Loading @@ -848,14 +846,15 @@ int rv770_mc_init(struct radeon_device *rdev) } int rv770_gpu_reset(struct radeon_device *rdev) { /* FIXME: implement */ return 0; /* FIXME: implement any rv770 specific bits */ return r600_gpu_reset(rdev); } static int rv770_startup(struct radeon_device *rdev) { int r; radeon_gpu_reset(rdev); rv770_mc_resume(rdev); r = rv770_pcie_gart_enable(rdev); if (r) Loading Loading @@ -1039,6 +1038,8 @@ int rv770_init(struct radeon_device *rdev) void rv770_fini(struct radeon_device *rdev) { rv770_suspend(rdev); r600_blit_fini(rdev); radeon_ring_fini(rdev); rv770_pcie_gart_fini(rdev); Loading