Commit fe5e8f07 authored by Dillon Varone's avatar Dillon Varone Committed by Alex Deucher
Browse files

drm/amd/display: Modify plane removal sequence to avoid hangs. 



Reviewed-by: default avatarAric Cyr <Aric.Cyr@amd.com>
Acked-by: default avatarAlan Liu <HaoPing.Liu@amd.com>
Signed-off-by: default avatarDillon Varone <dillon.varone@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 7952fa0d

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

+1 −1
Original line number Diff line number Diff line
@@ -107,7 +107,7 @@ void dcn10_lock_all_pipes(struct dc *dc, 
		 * (un)locking. Also skip if pipe is disabled.

		 */

		if (pipe_ctx->top_pipe ||

		    !pipe_ctx->stream || !pipe_ctx->plane_state ||

		    !pipe_ctx->stream ||

		    !tg->funcs->is_tg_enabled(tg))

			continue;

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c

+5 −5
Original line number Diff line number Diff line
@@ -931,10 +931,6 @@ void hubp2_set_blank_regs(struct hubp *hubp, bool blank) 
	struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp);

	uint32_t blank_en = blank ? 1 : 0;



	REG_UPDATE_2(DCHUBP_CNTL,

			HUBP_BLANK_EN, blank_en,

			HUBP_TTU_DISABLE, blank_en);



	if (blank) {

		uint32_t reg_val = REG_READ(DCHUBP_CNTL);
@@ -947,9 +943,13 @@ void hubp2_set_blank_regs(struct hubp *hubp, bool blank) 
			 */

			REG_WAIT(DCHUBP_CNTL,

					HUBP_NO_OUTSTANDING_REQ, 1,

					1, 200);

					1, 100000);

		}

	}



	REG_UPDATE_2(DCHUBP_CNTL,

			HUBP_BLANK_EN, blank_en,

			HUBP_TTU_DISABLE, 0);

}



void hubp2_cursor_set_position(