Commit fdffb7db authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Tvrtko Ursulin
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drm/i915/psr: Fix BDW PSR AUX CH data register offsets 



The multiplication got replaced by an addition in some cleanup.
This means we never write the correct data to some of the BDW
PSR data registers and thus we fail to actually wake up the
panel from PSR.

Fixes: 4ab4fa10 ("drm/i915/psr: Make PSR registers relative to transcoders")
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230609141404.12729-3-ville.syrjala@linux.intel.com


Reviewed-by: default avatarJouni Högander <jouni.hogander@intel.com>
(cherry picked from commit 460dc4ba)
Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
parent 5b782635

drivers/gpu/drm/i915/display/intel_psr_regs.h

+1 −1
Original line number Diff line number Diff line
@@ -81,7 +81,7 @@ 


#define _SRD_AUX_DATA_A				0x60814

#define _SRD_AUX_DATA_EDP			0x6f814

#define EDP_PSR_AUX_DATA(tran, i)		_MMIO_TRANS2(tran, _SRD_AUX_DATA_A + (i) + 4) /* 5 registers */

#define EDP_PSR_AUX_DATA(tran, i)		_MMIO_TRANS2(tran, _SRD_AUX_DATA_A + (i) * 4) /* 5 registers */



#define _SRD_STATUS_A				0x60840

#define _SRD_STATUS_EDP				0x6f840