Commit fdb2981c authored by Horatiu Vultur's avatar Horatiu Vultur Committed by Jakub Kicinski
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net: lan966x: Add registers that are used for FDMA. 



Add the registers that are used to configure the FDMA.

Signed-off-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent d6967d04

drivers/net/ethernet/microchip/lan966x/lan966x_main.c

+1 −0
Original line number Diff line number Diff line
@@ -43,6 +43,7 @@ struct lan966x_main_io_resource { 


static const struct lan966x_main_io_resource lan966x_main_iomap[] =  {

	{ TARGET_CPU,                   0xc0000, 0 }, /* 0xe00c0000 */

	{ TARGET_FDMA,                  0xc0400, 0 }, /* 0xe00c0400 */

	{ TARGET_ORG,                         0, 1 }, /* 0xe2000000 */

	{ TARGET_GCB,                    0x4000, 1 }, /* 0xe2004000 */

	{ TARGET_QS,                     0x8000, 1 }, /* 0xe2008000 */

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

+106 −0
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ enum lan966x_target { 
	TARGET_CHIP_TOP = 5,

	TARGET_CPU = 6,

	TARGET_DEV = 13,

	TARGET_FDMA = 21,

	TARGET_GCB = 27,

	TARGET_ORG = 36,

	TARGET_PTP = 41,
@@ -578,6 +579,111 @@ enum lan966x_target { 
#define DEV_PCS1G_STICKY_LINK_DOWN_STICKY_GET(x)\

	FIELD_GET(DEV_PCS1G_STICKY_LINK_DOWN_STICKY, x)



/*      FDMA:FDMA:FDMA_CH_ACTIVATE */

#define FDMA_CH_ACTIVATE          __REG(TARGET_FDMA, 0, 1, 8, 0, 1, 428, 0, 0, 1, 4)



#define FDMA_CH_ACTIVATE_CH_ACTIVATE             GENMASK(7, 0)

#define FDMA_CH_ACTIVATE_CH_ACTIVATE_SET(x)\

	FIELD_PREP(FDMA_CH_ACTIVATE_CH_ACTIVATE, x)

#define FDMA_CH_ACTIVATE_CH_ACTIVATE_GET(x)\

	FIELD_GET(FDMA_CH_ACTIVATE_CH_ACTIVATE, x)



/*      FDMA:FDMA:FDMA_CH_RELOAD */

#define FDMA_CH_RELOAD            __REG(TARGET_FDMA, 0, 1, 8, 0, 1, 428, 4, 0, 1, 4)



#define FDMA_CH_RELOAD_CH_RELOAD                 GENMASK(7, 0)

#define FDMA_CH_RELOAD_CH_RELOAD_SET(x)\

	FIELD_PREP(FDMA_CH_RELOAD_CH_RELOAD, x)

#define FDMA_CH_RELOAD_CH_RELOAD_GET(x)\

	FIELD_GET(FDMA_CH_RELOAD_CH_RELOAD, x)



/*      FDMA:FDMA:FDMA_CH_DISABLE */

#define FDMA_CH_DISABLE           __REG(TARGET_FDMA, 0, 1, 8, 0, 1, 428, 8, 0, 1, 4)



#define FDMA_CH_DISABLE_CH_DISABLE               GENMASK(7, 0)

#define FDMA_CH_DISABLE_CH_DISABLE_SET(x)\

	FIELD_PREP(FDMA_CH_DISABLE_CH_DISABLE, x)

#define FDMA_CH_DISABLE_CH_DISABLE_GET(x)\

	FIELD_GET(FDMA_CH_DISABLE_CH_DISABLE, x)



/*      FDMA:FDMA:FDMA_CH_DB_DISCARD */

#define FDMA_CH_DB_DISCARD        __REG(TARGET_FDMA, 0, 1, 8, 0, 1, 428, 16, 0, 1, 4)



#define FDMA_CH_DB_DISCARD_DB_DISCARD            GENMASK(7, 0)

#define FDMA_CH_DB_DISCARD_DB_DISCARD_SET(x)\

	FIELD_PREP(FDMA_CH_DB_DISCARD_DB_DISCARD, x)

#define FDMA_CH_DB_DISCARD_DB_DISCARD_GET(x)\

	FIELD_GET(FDMA_CH_DB_DISCARD_DB_DISCARD, x)



/*      FDMA:FDMA:FDMA_DCB_LLP */

#define FDMA_DCB_LLP(r)           __REG(TARGET_FDMA, 0, 1, 8, 0, 1, 428, 52, r, 8, 4)



/*      FDMA:FDMA:FDMA_DCB_LLP1 */

#define FDMA_DCB_LLP1(r)          __REG(TARGET_FDMA, 0, 1, 8, 0, 1, 428, 84, r, 8, 4)



/*      FDMA:FDMA:FDMA_CH_ACTIVE */

#define FDMA_CH_ACTIVE            __REG(TARGET_FDMA, 0, 1, 8, 0, 1, 428, 180, 0, 1, 4)



/*      FDMA:FDMA:FDMA_CH_CFG */

#define FDMA_CH_CFG(r)            __REG(TARGET_FDMA, 0, 1, 8, 0, 1, 428, 224, r, 8, 4)



#define FDMA_CH_CFG_CH_INTR_DB_EOF_ONLY          BIT(4)

#define FDMA_CH_CFG_CH_INTR_DB_EOF_ONLY_SET(x)\

	FIELD_PREP(FDMA_CH_CFG_CH_INTR_DB_EOF_ONLY, x)

#define FDMA_CH_CFG_CH_INTR_DB_EOF_ONLY_GET(x)\

	FIELD_GET(FDMA_CH_CFG_CH_INTR_DB_EOF_ONLY, x)



#define FDMA_CH_CFG_CH_INJ_PORT                  BIT(3)

#define FDMA_CH_CFG_CH_INJ_PORT_SET(x)\

	FIELD_PREP(FDMA_CH_CFG_CH_INJ_PORT, x)

#define FDMA_CH_CFG_CH_INJ_PORT_GET(x)\

	FIELD_GET(FDMA_CH_CFG_CH_INJ_PORT, x)



#define FDMA_CH_CFG_CH_DCB_DB_CNT                GENMASK(2, 1)

#define FDMA_CH_CFG_CH_DCB_DB_CNT_SET(x)\

	FIELD_PREP(FDMA_CH_CFG_CH_DCB_DB_CNT, x)

#define FDMA_CH_CFG_CH_DCB_DB_CNT_GET(x)\

	FIELD_GET(FDMA_CH_CFG_CH_DCB_DB_CNT, x)



#define FDMA_CH_CFG_CH_MEM                       BIT(0)

#define FDMA_CH_CFG_CH_MEM_SET(x)\

	FIELD_PREP(FDMA_CH_CFG_CH_MEM, x)

#define FDMA_CH_CFG_CH_MEM_GET(x)\

	FIELD_GET(FDMA_CH_CFG_CH_MEM, x)



/*      FDMA:FDMA:FDMA_PORT_CTRL */

#define FDMA_PORT_CTRL(r)         __REG(TARGET_FDMA, 0, 1, 8, 0, 1, 428, 376, r, 2, 4)



#define FDMA_PORT_CTRL_INJ_STOP                  BIT(4)

#define FDMA_PORT_CTRL_INJ_STOP_SET(x)\

	FIELD_PREP(FDMA_PORT_CTRL_INJ_STOP, x)

#define FDMA_PORT_CTRL_INJ_STOP_GET(x)\

	FIELD_GET(FDMA_PORT_CTRL_INJ_STOP, x)



#define FDMA_PORT_CTRL_XTR_STOP                  BIT(2)

#define FDMA_PORT_CTRL_XTR_STOP_SET(x)\

	FIELD_PREP(FDMA_PORT_CTRL_XTR_STOP, x)

#define FDMA_PORT_CTRL_XTR_STOP_GET(x)\

	FIELD_GET(FDMA_PORT_CTRL_XTR_STOP, x)



/*      FDMA:FDMA:FDMA_INTR_DB */

#define FDMA_INTR_DB              __REG(TARGET_FDMA, 0, 1, 8, 0, 1, 428, 392, 0, 1, 4)



/*      FDMA:FDMA:FDMA_INTR_DB_ENA */

#define FDMA_INTR_DB_ENA          __REG(TARGET_FDMA, 0, 1, 8, 0, 1, 428, 396, 0, 1, 4)



#define FDMA_INTR_DB_ENA_INTR_DB_ENA             GENMASK(7, 0)

#define FDMA_INTR_DB_ENA_INTR_DB_ENA_SET(x)\

	FIELD_PREP(FDMA_INTR_DB_ENA_INTR_DB_ENA, x)

#define FDMA_INTR_DB_ENA_INTR_DB_ENA_GET(x)\

	FIELD_GET(FDMA_INTR_DB_ENA_INTR_DB_ENA, x)



/*      FDMA:FDMA:FDMA_INTR_ERR */

#define FDMA_INTR_ERR             __REG(TARGET_FDMA, 0, 1, 8, 0, 1, 428, 400, 0, 1, 4)



/*      FDMA:FDMA:FDMA_ERRORS */

#define FDMA_ERRORS               __REG(TARGET_FDMA, 0, 1, 8, 0, 1, 428, 412, 0, 1, 4)



/*      PTP:PTP_CFG:PTP_DOM_CFG */

#define PTP_DOM_CFG               __REG(TARGET_PTP, 0, 1, 512, 0, 1, 16, 12, 0, 1, 4)