dt-binding: perf: Add Amlogic DDR PMU

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/perf/amlogic,g12-ddr-pmu.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Amlogic G12 DDR performance monitor

maintainers:

  - Jiucheng Xu <jiucheng.xu@amlogic.com>

description: |

  Amlogic G12 series SoC integrate DDR bandwidth monitor.

  A timer is inside and can generate interrupt when timeout.

  The bandwidth is counted in the timer ISR. Different platform

  has different subset of event format attribute.

properties:

  compatible:

    enum:

      - amlogic,g12a-ddr-pmu

      - amlogic,g12b-ddr-pmu

      - amlogic,sm1-ddr-pmu

  reg:

    items:

      - description: DMC bandwidth register space.

      - description: DMC PLL register space.

  interrupts:

    items:

      - description: The IRQ of the inside timer timeout.

required:

  - compatible

  - reg

  - interrupts

additionalProperties: false

examples:

  - |

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    pmu {

        #address-cells=<2>;

        #size-cells=<2>;

        pmu@ff638000 {

            compatible = "amlogic,g12a-ddr-pmu";

            reg = <0x0 0xff638000 0x0 0x100>,

                  <0x0 0xff638c00 0x0 0x100>;

            interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>;

        };

    };

S:	Supported

W:	http://www.amlogic.com

F:	Documentation/admin-guide/perf/meson-ddr-pmu.rst

F:	Documentation/devicetree/bindings/perf/amlogic,g12-ddr-pmu.yaml

F:	drivers/perf/amlogic/

F:	include/soc/amlogic/