Commit fd5e3c4a authored by Kalle Valo's avatar Kalle Valo
Browse files

Merge ath-next from git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git 

ath.git patches for v5.17. Major changes:

ath11k

* support PCI devices with 1 MSI vector

* WCN6855 hw2.1 support

* 11d scan offload support

* full monitor mode, only supported on QCN9074

* scan MAC address randomization support

* reserved host DDR addresses from DT for PCI devices support

ath9k

* switch to rate table based lookup

ath

* extend South Korea regulatory domain support

wcn36xx

* beacon filter support
parents b530d5f3 bebd87ee

Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml

+30 −0
Original line number Diff line number Diff line
@@ -150,6 +150,12 @@ properties: 
      string to uniquely identify variant of the calibration data in the

      board-2.bin for designs with colliding bus and device specific ids



  memory-region:

    maxItems: 1

    description:

      phandle to a node describing reserved memory (System RAM memory)

      used by ath11k firmware (see bindings/reserved-memory/reserved-memory.txt)



required:

  - compatible

  - reg
@@ -279,3 +285,27 @@ examples: 
                          "tcl2host-status-ring";

        qcom,rproc = <&q6v5_wcss>;

    };



  - |



    reserved-memory {

        #address-cells = <2>;

        #size-cells = <2>;



        qcn9074_0: qcn9074_0@51100000 {

            no-map;

            reg = <0x0 0x51100000 0x0 0x03500000>;

        };

    };



    pci {

        pcie0 {

            #size-cells = <2>;

            #address-cells = <3>;

 

            wifi_0: wifi@0 {

                reg = <0 0 0 0 0>;

                memory-region = <&qcn9074_0>;

            };

        };

    };

drivers/net/wireless/ath/ath10k/core.c

+18 −1
Original line number Diff line number Diff line
@@ -90,6 +90,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.rri_on_ddr = false,

		.hw_filter_reset_required = true,

		.fw_diag_ce_download = false,

		.credit_size_workaround = false,

		.tx_stats_over_pktlog = true,

		.dynamic_sar_support = false,

	},
@@ -125,6 +126,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.rri_on_ddr = false,

		.hw_filter_reset_required = true,

		.fw_diag_ce_download = false,

		.credit_size_workaround = false,

		.tx_stats_over_pktlog = true,

		.dynamic_sar_support = false,

	},
@@ -161,6 +163,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.rri_on_ddr = false,

		.hw_filter_reset_required = true,

		.fw_diag_ce_download = false,

		.credit_size_workaround = false,

		.tx_stats_over_pktlog = false,

		.dynamic_sar_support = false,

	},
@@ -191,6 +194,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.num_wds_entries = 0x20,

		.uart_pin_workaround = true,

		.tx_stats_over_pktlog = false,

		.credit_size_workaround = false,

		.bmi_large_size_download = true,

		.supports_peer_stats_info = true,

		.dynamic_sar_support = true,
@@ -227,6 +231,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.rri_on_ddr = false,

		.hw_filter_reset_required = true,

		.fw_diag_ce_download = false,

		.credit_size_workaround = false,

		.tx_stats_over_pktlog = false,

		.dynamic_sar_support = false,

	},
@@ -262,6 +267,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.rri_on_ddr = false,

		.hw_filter_reset_required = true,

		.fw_diag_ce_download = false,

		.credit_size_workaround = false,

		.tx_stats_over_pktlog = false,

		.dynamic_sar_support = false,

	},
@@ -297,6 +303,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.rri_on_ddr = false,

		.hw_filter_reset_required = true,

		.fw_diag_ce_download = false,

		.credit_size_workaround = false,

		.tx_stats_over_pktlog = false,

		.dynamic_sar_support = false,

	},
@@ -335,6 +342,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.rri_on_ddr = false,

		.hw_filter_reset_required = true,

		.fw_diag_ce_download = true,

		.credit_size_workaround = false,

		.tx_stats_over_pktlog = false,

		.supports_peer_stats_info = true,

		.dynamic_sar_support = true,
@@ -377,6 +385,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.rri_on_ddr = false,

		.hw_filter_reset_required = true,

		.fw_diag_ce_download = false,

		.credit_size_workaround = false,

		.tx_stats_over_pktlog = false,

		.dynamic_sar_support = false,

	},
@@ -425,6 +434,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.rri_on_ddr = false,

		.hw_filter_reset_required = true,

		.fw_diag_ce_download = false,

		.credit_size_workaround = false,

		.tx_stats_over_pktlog = false,

		.dynamic_sar_support = false,

	},
@@ -470,6 +480,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.rri_on_ddr = false,

		.hw_filter_reset_required = true,

		.fw_diag_ce_download = false,

		.credit_size_workaround = false,

		.tx_stats_over_pktlog = false,

		.dynamic_sar_support = false,

	},
@@ -505,6 +516,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.rri_on_ddr = false,

		.hw_filter_reset_required = true,

		.fw_diag_ce_download = false,

		.credit_size_workaround = false,

		.tx_stats_over_pktlog = false,

		.dynamic_sar_support = false,

	},
@@ -542,6 +554,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.rri_on_ddr = false,

		.hw_filter_reset_required = true,

		.fw_diag_ce_download = true,

		.credit_size_workaround = false,

		.tx_stats_over_pktlog = false,

		.dynamic_sar_support = false,

	},
@@ -571,6 +584,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.ast_skid_limit = 0x10,

		.num_wds_entries = 0x20,

		.uart_pin_workaround = true,

		.credit_size_workaround = true,

		.dynamic_sar_support = false,

	},

	{
@@ -612,6 +626,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.rri_on_ddr = false,

		.hw_filter_reset_required = true,

		.fw_diag_ce_download = false,

		.credit_size_workaround = false,

		.tx_stats_over_pktlog = false,

		.dynamic_sar_support = false,

	},
@@ -640,6 +655,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.rri_on_ddr = true,

		.hw_filter_reset_required = false,

		.fw_diag_ce_download = false,

		.credit_size_workaround = false,

		.tx_stats_over_pktlog = false,

		.dynamic_sar_support = true,

	},
@@ -715,6 +731,7 @@ static void ath10k_send_suspend_complete(struct ath10k *ar) 


static int ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode)

{

	bool mtu_workaround = ar->hw_params.credit_size_workaround;

	int ret;

	u32 param = 0;
@@ -732,7 +749,7 @@ static int ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode) 


	param |= HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET;



	if (mode == ATH10K_FIRMWARE_MODE_NORMAL)

	if (mode == ATH10K_FIRMWARE_MODE_NORMAL && !mtu_workaround)

		param |= HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;

	else

		param &= ~HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;

drivers/net/wireless/ath/ath10k/htt.h

+0 −110
Original line number Diff line number Diff line
@@ -1400,115 +1400,6 @@ enum htt_dbg_stats_status { 
	HTT_DBG_STATS_STATUS_SERIES_DONE = 7

};



/*

 * target -> host statistics upload

 *

 * The following field definitions describe the format of the HTT target

 * to host stats upload confirmation message.

 * The message contains a cookie echoed from the HTT host->target stats

 * upload request, which identifies which request the confirmation is

 * for, and a series of tag-length-value stats information elements.

 * The tag-length header for each stats info element also includes a

 * status field, to indicate whether the request for the stat type in

 * question was fully met, partially met, unable to be met, or invalid

 * (if the stat type in question is disabled in the target).

 * A special value of all 1's in this status field is used to indicate

 * the end of the series of stats info elements.

 *

 *

 * |31                         16|15           8|7   5|4       0|

 * |------------------------------------------------------------|

 * |                  reserved                  |    msg type   |

 * |------------------------------------------------------------|

 * |                        cookie LSBs                         |

 * |------------------------------------------------------------|

 * |                        cookie MSBs                         |

 * |------------------------------------------------------------|

 * |      stats entry length     |   reserved   |  S  |stat type|

 * |------------------------------------------------------------|

 * |                                                            |

 * |                  type-specific stats info                  |

 * |                                                            |

 * |------------------------------------------------------------|

 * |      stats entry length     |   reserved   |  S  |stat type|

 * |------------------------------------------------------------|

 * |                                                            |

 * |                  type-specific stats info                  |

 * |                                                            |

 * |------------------------------------------------------------|

 * |              n/a            |   reserved   | 111 |   n/a   |

 * |------------------------------------------------------------|

 * Header fields:

 *  - MSG_TYPE

 *    Bits 7:0

 *    Purpose: identifies this is a statistics upload confirmation message

 *    Value: 0x9

 *  - COOKIE_LSBS

 *    Bits 31:0

 *    Purpose: Provide a mechanism to match a target->host stats confirmation

 *        message with its preceding host->target stats request message.

 *    Value: LSBs of the opaque cookie specified by the host-side requestor

 *  - COOKIE_MSBS

 *    Bits 31:0

 *    Purpose: Provide a mechanism to match a target->host stats confirmation

 *        message with its preceding host->target stats request message.

 *    Value: MSBs of the opaque cookie specified by the host-side requestor

 *

 * Stats Information Element tag-length header fields:

 *  - STAT_TYPE

 *    Bits 4:0

 *    Purpose: identifies the type of statistics info held in the

 *        following information element

 *    Value: htt_dbg_stats_type

 *  - STATUS

 *    Bits 7:5

 *    Purpose: indicate whether the requested stats are present

 *    Value: htt_dbg_stats_status, including a special value (0x7) to mark

 *        the completion of the stats entry series

 *  - LENGTH

 *    Bits 31:16

 *    Purpose: indicate the stats information size

 *    Value: This field specifies the number of bytes of stats information

 *       that follows the element tag-length header.

 *       It is expected but not required that this length is a multiple of

 *       4 bytes.  Even if the length is not an integer multiple of 4, the

 *       subsequent stats entry header will begin on a 4-byte aligned

 *       boundary.

 */



#define HTT_STATS_CONF_ITEM_INFO_STAT_TYPE_MASK 0x1F

#define HTT_STATS_CONF_ITEM_INFO_STAT_TYPE_LSB  0

#define HTT_STATS_CONF_ITEM_INFO_STATUS_MASK    0xE0

#define HTT_STATS_CONF_ITEM_INFO_STATUS_LSB     5



struct htt_stats_conf_item {

	union {

		u8 info;

		struct {

			u8 stat_type:5; /* %HTT_DBG_STATS_ */

			u8 status:3; /* %HTT_DBG_STATS_STATUS_ */

		} __packed;

	} __packed;

	u8 pad;

	__le16 length;

	u8 payload[]; /* roundup(length, 4) long */

} __packed;



struct htt_stats_conf {

	u8 pad[3];

	__le32 cookie_lsb;

	__le32 cookie_msb;



	/* each item has variable length! */

	struct htt_stats_conf_item items[];

} __packed;



static inline struct htt_stats_conf_item *htt_stats_conf_next_item(

					const struct htt_stats_conf_item *item)

{

	return (void *)item + sizeof(*item) + roundup(item->length, 4);

}



/*

 * host -> target FRAG DESCRIPTOR/MSDU_EXT DESC bank

 *
@@ -1828,7 +1719,6 @@ struct htt_resp { 
		struct htt_rc_update rc_update;

		struct htt_rx_test rx_test;

		struct htt_pktlog_msg pktlog_msg;

		struct htt_stats_conf stats_conf;

		struct htt_rx_pn_ind rx_pn_ind;

		struct htt_rx_offload_ind rx_offload_ind;

		struct htt_rx_in_ord_ind rx_in_ord_ind;

drivers/net/wireless/ath/ath10k/htt_tx.c

+3 −0
Original line number Diff line number Diff line
@@ -147,6 +147,9 @@ void ath10k_htt_tx_dec_pending(struct ath10k_htt *htt) 
	htt->num_pending_tx--;

	if (htt->num_pending_tx == htt->max_num_pending_tx - 1)

		ath10k_mac_tx_unlock(htt->ar, ATH10K_TX_PAUSE_Q_FULL);



	if (htt->num_pending_tx == 0)

		wake_up(&htt->empty_tx_wq);

}



int ath10k_htt_tx_inc_pending(struct ath10k_htt *htt)

drivers/net/wireless/ath/ath10k/hw.h

+3 −0
Original line number Diff line number Diff line
@@ -618,6 +618,9 @@ struct ath10k_hw_params { 
	 */

	bool uart_pin_workaround;



	/* Workaround for the credit size calculation */

	bool credit_size_workaround;



	/* tx stats support over pktlog */

	bool tx_stats_over_pktlog;