Loading drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c +5 −0 Original line number Diff line number Diff line Loading @@ -66,6 +66,7 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) { struct drm_device *dev = crtc->dev; struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; struct drm_connector *con = &fsl_dev->connector.base; struct drm_display_mode *mode = &crtc->state->mode; unsigned int hbp, hfp, hsw, vbp, vfp, vsw, index, pol = 0; Loading @@ -80,6 +81,10 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) vfp = mode->vsync_start - mode->vdisplay; vsw = mode->vsync_end - mode->vsync_start; /* INV_PXCK as default (most display sample data on rising edge) */ if (!(con->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_POSEDGE)) pol |= DCU_SYN_POL_INV_PXCK; if (mode->flags & DRM_MODE_FLAG_NHSYNC) pol |= DCU_SYN_POL_INV_HS_LOW; Loading drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h +2 −2 Original line number Diff line number Diff line Loading @@ -47,8 +47,8 @@ #define DCU_VSYN_PARA_FP(x) (x) #define DCU_SYN_POL 0x0024 #define DCU_SYN_POL_INV_PXCK_FALL (0 << 6) #define DCU_SYN_POL_NEG_REMAIN (0 << 5) #define DCU_SYN_POL_INV_PXCK BIT(6) #define DCU_SYN_POL_NEG BIT(5) #define DCU_SYN_POL_INV_VS_LOW BIT(1) #define DCU_SYN_POL_INV_HS_LOW BIT(0) Loading drivers/gpu/drm/panel/panel-simple.c +4 −1 Original line number Diff line number Diff line Loading @@ -72,6 +72,7 @@ struct panel_desc { } delay; u32 bus_format; u32 bus_flags; }; struct panel_simple { Loading Loading @@ -144,6 +145,7 @@ static int panel_simple_get_fixed_modes(struct panel_simple *panel) if (panel->desc->bus_format) drm_display_info_set_bus_formats(&connector->display_info, &panel->desc->bus_format, 1); connector->display_info.bus_flags = panel->desc->bus_flags; return num; } Loading Loading @@ -1051,7 +1053,8 @@ static const struct panel_desc nec_nl4827hc19_05b = { .width = 95, .height = 54, }, .bus_format = MEDIA_BUS_FMT_RGB888_1X24 .bus_format = MEDIA_BUS_FMT_RGB888_1X24, .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE, }; static const struct display_timing okaya_rs800480t_7x0gp_timing = { Loading include/drm/drm_crtc.h +9 −0 Original line number Diff line number Diff line Loading @@ -118,6 +118,14 @@ enum subpixel_order { #define DRM_COLOR_FORMAT_RGB444 (1<<0) #define DRM_COLOR_FORMAT_YCRCB444 (1<<1) #define DRM_COLOR_FORMAT_YCRCB422 (1<<2) #define DRM_BUS_FLAG_DE_LOW (1<<0) #define DRM_BUS_FLAG_DE_HIGH (1<<1) /* drive data on pos. edge */ #define DRM_BUS_FLAG_PIXDATA_POSEDGE (1<<2) /* drive data on neg. edge */ #define DRM_BUS_FLAG_PIXDATA_NEGEDGE (1<<3) /* * Describes a given display (e.g. CRT or flat panel) and its limitations. */ Loading @@ -139,6 +147,7 @@ struct drm_display_info { const u32 *bus_formats; unsigned int num_bus_formats; u32 bus_flags; /* Mask of supported hdmi deep color modes */ u8 edid_hdmi_dc_modes; Loading Loading
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c +5 −0 Original line number Diff line number Diff line Loading @@ -66,6 +66,7 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) { struct drm_device *dev = crtc->dev; struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; struct drm_connector *con = &fsl_dev->connector.base; struct drm_display_mode *mode = &crtc->state->mode; unsigned int hbp, hfp, hsw, vbp, vfp, vsw, index, pol = 0; Loading @@ -80,6 +81,10 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) vfp = mode->vsync_start - mode->vdisplay; vsw = mode->vsync_end - mode->vsync_start; /* INV_PXCK as default (most display sample data on rising edge) */ if (!(con->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_POSEDGE)) pol |= DCU_SYN_POL_INV_PXCK; if (mode->flags & DRM_MODE_FLAG_NHSYNC) pol |= DCU_SYN_POL_INV_HS_LOW; Loading
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h +2 −2 Original line number Diff line number Diff line Loading @@ -47,8 +47,8 @@ #define DCU_VSYN_PARA_FP(x) (x) #define DCU_SYN_POL 0x0024 #define DCU_SYN_POL_INV_PXCK_FALL (0 << 6) #define DCU_SYN_POL_NEG_REMAIN (0 << 5) #define DCU_SYN_POL_INV_PXCK BIT(6) #define DCU_SYN_POL_NEG BIT(5) #define DCU_SYN_POL_INV_VS_LOW BIT(1) #define DCU_SYN_POL_INV_HS_LOW BIT(0) Loading
drivers/gpu/drm/panel/panel-simple.c +4 −1 Original line number Diff line number Diff line Loading @@ -72,6 +72,7 @@ struct panel_desc { } delay; u32 bus_format; u32 bus_flags; }; struct panel_simple { Loading Loading @@ -144,6 +145,7 @@ static int panel_simple_get_fixed_modes(struct panel_simple *panel) if (panel->desc->bus_format) drm_display_info_set_bus_formats(&connector->display_info, &panel->desc->bus_format, 1); connector->display_info.bus_flags = panel->desc->bus_flags; return num; } Loading Loading @@ -1051,7 +1053,8 @@ static const struct panel_desc nec_nl4827hc19_05b = { .width = 95, .height = 54, }, .bus_format = MEDIA_BUS_FMT_RGB888_1X24 .bus_format = MEDIA_BUS_FMT_RGB888_1X24, .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE, }; static const struct display_timing okaya_rs800480t_7x0gp_timing = { Loading
include/drm/drm_crtc.h +9 −0 Original line number Diff line number Diff line Loading @@ -118,6 +118,14 @@ enum subpixel_order { #define DRM_COLOR_FORMAT_RGB444 (1<<0) #define DRM_COLOR_FORMAT_YCRCB444 (1<<1) #define DRM_COLOR_FORMAT_YCRCB422 (1<<2) #define DRM_BUS_FLAG_DE_LOW (1<<0) #define DRM_BUS_FLAG_DE_HIGH (1<<1) /* drive data on pos. edge */ #define DRM_BUS_FLAG_PIXDATA_POSEDGE (1<<2) /* drive data on neg. edge */ #define DRM_BUS_FLAG_PIXDATA_NEGEDGE (1<<3) /* * Describes a given display (e.g. CRT or flat panel) and its limitations. */ Loading @@ -139,6 +147,7 @@ struct drm_display_info { const u32 *bus_formats; unsigned int num_bus_formats; u32 bus_flags; /* Mask of supported hdmi deep color modes */ u8 edid_hdmi_dc_modes; Loading