Commit fd228eb0 authored by Tomi Valkeinen's avatar Tomi Valkeinen Committed by Laurent Pinchart
Browse files

drm: rcar-du: Stop accessing non-existent registers on gen4 



The following registers do not exist on gen4, so we should not write
them: DEF6Rm, DEF7Rm, DEF8Rm, ESCRn, OTARn.

Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com>
Reviewed-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
parent 5fbc2f3b

drivers/gpu/drm/rcar-du/rcar_du_crtc.c

+5 −3
Original line number Diff line number Diff line
@@ -298,10 +298,12 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc) 
		escr = params.escr;

	}



	if (rcdu->info->gen < 4) {

		dev_dbg(rcrtc->dev->dev, "%s: ESCR 0x%08x\n", __func__, escr);



		rcar_du_crtc_write(rcrtc, rcrtc->index % 2 ? ESCR13 : ESCR02, escr);

		rcar_du_crtc_write(rcrtc, rcrtc->index % 2 ? OTAR13 : OTAR02, 0);

	}



	/* Signal polarities */

	dsmr = ((mode->flags & DRM_MODE_FLAG_PVSYNC) ? DSMR_VSL : 0)

drivers/gpu/drm/rcar-du/rcar_du_group.c

+14 −10
Original line number Diff line number Diff line
@@ -148,18 +148,22 @@ static void rcar_du_group_setup(struct rcar_du_group *rgrp) 
	}

	rcar_du_group_write(rgrp, DEFR5, DEFR5_CODE | DEFR5_DEFE5);



	if (rcdu->info->gen < 4)

		rcar_du_group_setup_pins(rgrp);



	if (rcdu->info->gen < 4) {

		/*

	 * TODO: Handle routing of the DU output to CMM dynamically, as we

	 * should bypass CMM completely when no color management feature is

	 * used.

		 * TODO: Handle routing of the DU output to CMM dynamically, as

		 * we should bypass CMM completely when no color management

		 * feature is used.

		 */

		defr7 |= (rgrp->cmms_mask & BIT(1) ? DEFR7_CMME1 : 0) |

			 (rgrp->cmms_mask & BIT(0) ? DEFR7_CMME0 : 0);

		rcar_du_group_write(rgrp, DEFR7, defr7);

	}



	if (rcdu->info->gen >= 2) {

		if (rcdu->info->gen < 4)

			rcar_du_group_setup_defr8(rgrp);

		rcar_du_group_setup_didsr(rgrp);

	}